--- gcc-5-5.4.0.orig/debian/FAQ.gcj
+++ gcc-5-5.4.0/debian/FAQ.gcj
@@ -0,0 +1,494 @@
+The GCJ FAQ
+===========
+
+      The latest version of this document is always available at
+      http://gcc.gnu.org/java/faq.html.
+
+        General Questions
+
+            What license is used for libgcj?
+            How can I report a bug in libgcj?
+            How can I contribute to libgcj
+            Is libgcj part of GCC?
+            Will gcj and libgcj work on my machine?
+            How can I debug my Java program?
+            Can I interface byte-compiled and native java code?
+
+
+        Java Feature Support
+
+            What Java API's are supported? How complete is
+              the support?
+            Does GCJ support using straight C native methods
+              ala JNI?
+            Why does GCJ use CNI?
+            What is the state of AWT support?
+            How about support for Swing ?
+            What support is there for RMI ?
+            Can I use any code from other OpenSource projects
+              to supplement libgcj's current features ?
+            What features of the Java language are/arn't supported
+
+
+        Build Issues
+
+            I need something more recent than the last release; how
+                  should I build it?
+            Linker bug on Solaris
+            Can I configure/build in the source tree?
+            My libgcj build fails with "invalid use of undefined type
+                  struct sigcontext_struct"
+
+
+        Gcj Compile/Link Questions
+
+            Why do I get undefined reference to `main' errors?
+            Can GCJ only handle source code?
+            "gcj -C" Doesn't seem to work like javac/jikes. Whats going on?
+            Where does GCJ look for files?
+            How does gcj resolve wether to compile .class or .java files?
+            I'm getting link errors!
+            I'm getting 'undefined symbol: __dso_handle'
+
+
+        Runtime Questions
+
+            My program is dumping core! What's going on?
+            When I run the debugger I get a SEGV in the GC! What's going on?
+            I have just compiled and benchmarked my Java application
+            and it seems to be running slower than than XXX JIT JVM. Is there
+            anything I can do to make it go faster?
+            Can I profile Garbage Collection?
+            How do I increase the runtime's initial and maximum heap sizes?
+            How can I profile my application?
+            My program seems to hang and doesn't produce any output
+
+
+        Programming Issues
+
+            Are there any examples of how to use CNI?
+            Is it possible to invoke GCJ compiled Java code from a
+            C++ application?
+
+General Questions
+=================
+
+      1.1 What license is used for libgcj?
+
+          libgcj is distributed under the GPL, with the 'libgcc exception'.
+          This means that linking with libgcj does not by itself cause
+          your program to fall under the GPL.  See LIBGCJ_LICENSE in
+          the source tree for more details.
+
+      1.2 How can I report a bug in libgcj?
+
+          libgcj has a corresponding Gnats bug database which you can
+          browse. You can also submit new bug reports from the Gnats
+          page.
+
+      1.3 How can I contribute to libgcj?
+
+          You can send simple bug fixes in as patches. Please follow
+          the GCC guidelines for submitting patches. For more complex
+          changes, you must sign copyright over to the Free Software
+          Foundation. See the contribution page for details.
+
+      1.4 Is libgcj part of GCC?
+
+          Yes, libgcj is now part of GCC. It can be downloaded,
+          configured and built as one single tree.
+
+      1.5 Will gcj and libgcj work on my machine?
+
+          Gcj and libgcj are known to work more or less with IA-32 and
+          Sparc Solaris, Tru64 Unix, as well as IA-32, IA-64, Alpha,
+          and PowerPC Linux. They might work on other
+          systems. Generally speaking, porting to a new system should
+          not be hard. This would be a good way to volunteer.
+
+      1.6 How can I debug my Java program?
+
+          gdb 5.0 includes support for debugging gcj-compiled Java
+          programs. For more information please read Java Debugging
+          with gdb.
+
+      1.7 Can I interface byte-compiled and native java code
+
+          libgcj has a bytecode interpreter that allows you to mix
+          .class files with compiled code. It works pretty
+          transparently: if a compiled version of a class is not found
+          in the application binary or linked shared libraries, the
+          class loader will search for a bytecode version in your
+          classpath, much like a VM would. Be sure to build libgcj
+          with the --enable-interpreter option to enable this
+          functionality.
+
+          The program "gij" provides a front end to the interpreter
+          that behaves much like a traditional virtual machine. You
+          can even use "gij" to run a shared library which is compiled
+          from java code and contains a main method:
+
+          $ gcj -shared -o lib-HelloWorld.so HelloWorld.java
+          $ gij HelloWorld
+
+          This works because gij uses Class.forName, which knows how
+          to load shared objects.
+
+Java Feature Support
+====================
+
+      2.1 What Java API's are supported? How complete is
+        the support?
+
+          Matt Welsh writes:
+
+            Just look in the 'libjava' directory of libgcj and see
+            what classes are there. Most GUI stuff isn't there yet,
+            that's true, but many of the other classes are easy to add
+            if they don't yet exist.
+
+            I think it's important to stress that there is a big
+            difference between Java and the many libraries which Java
+            supports. Unfortunately, Sun's promise of "write once, run
+            everywhere" assumes much more than a JVM: you also need
+            the full set of JDK libraries. Considering that new Java
+            APIs come out every week, it's going to be impossible to
+            track everything.
+
+            To make things worse, you can't simply run Sun's JDK
+            classes on any old JVM -- they assume that a bunch of
+            native methods are also defined. Since this native method
+            requirement isn't defined by the JDK specs, you're
+            effectively constrained to using Sun's JVMs if you want to
+            use Sun's JDK libraries. Oh yes -- you could also
+            reimplement all of those native methods yourself, and make
+            sure they behave exactly as Sun's do. Note that they're
+            undocumented!
+
+      2.2 Does GCJ support using straight C native methods
+         ala JNI?
+
+          Yes. libgcj now has experimental support for JNI, in
+          addition to its native Compiled Native Interface (CNI). gcjh
+          will generate JNI stubs and headers using the "-jni"
+          option. However, we do prefer CNI: it is more efficient,
+          easier to write, and (at least potentially) easier to debug.
+
+      2.3 Why does GCJ use CNI?
+
+          Per Bothner explains:
+
+            We use CNI because we think it is a better solution,
+            especially for a Java implementation that is based on the
+            idea that Java is just another programming language that
+            can be implemented using standard compilation
+            techniques. Given that, and the idea that languages
+            implemented using Gcc should be compatible where it makes
+            sense, it follows that the Java calling convention should
+            be as similar as practical to that used for other
+            languages, especially C++, since we can think of Java as a
+            subset of C++. CNI is just a set of helper functions and
+            conventions built on the idea that C++ and Java have the
+            *same* calling convention and object layout; they are
+            binary compatible. (This is a simplification, but close
+            enough.)
+
+      2.4 What is the state of AWT support?
+
+          Work is in progress to implement AWT and Java2D. We intend
+          to support both GTK and xlib peers written using CNI. Some
+          components are already working atop the xlib peers.
+
+      2.5 How about support for Swing?
+
+          Once AWT support is working then Swing support can be
+          considered. There is at least one free-software partial
+          implementations of Swing that may be usable.
+
+      2.6 What support is there for RMI?
+
+         RMI code exists on the CVS trunk (aka gcc 3.1), but it has
+         not been heavily tested.  This code was donated by
+         Transvirtual Technologies.
+
+      2.7 Can I use any code from other OpenSource
+          projects to supplement libgcj's current features?
+
+           Certainly. However, in many cases, if you wanted to
+           contribute the code back into the official libgcj
+           distribution, we would require that the original author(s)
+           assign copyright to the Free Software Foundation.  As of
+           March 6, 2000, libgcj has been relicenced, and copyright
+           has been assigned to the FSF. This allows us to share and
+           merge much of the libgcj codebase with the Classpath
+           project.  Our eventual goal is for Classpath to be an
+           upstream source provider for libgcj, however it will be
+           some time before this becomes reality: libgcj and Classpath
+           have different implementations of many core java
+           classes. In order to merge them, we need to select the best
+           (most efficient, cleanest) implementation of each
+           method/class/package, resolve any conflicts created by the
+           merge, and test the final result.  Needless to say, this is
+           a lot of work. If you can help out, please let us know!
+
+      2.8 What features of the Java language are/aren't supported.
+
+          GCJ supports all Java language constructs as per the Java
+          language Specification.  Recent GCJ snapshots have added
+          support for most JDK1.1 (and beyond) language features,
+          including inner classes.
+
+Build Issues
+============
+
+      3.1 I need something more recent than the last release.
+          How should I build it?
+
+          Please read here: http://gcc.gnu.org/java/build-snapshot.html
+
+      3.2 Linker bug on Solaris
+
+          There is a known problem with the native Solaris linker when
+          using gcc/gcj. A good indication you've run into this
+          problem is if you get an error that looks like the following
+          when building libgcj:
+
+ld: warning: option -o appears more than once, first setting taken
+ld: fatal: file libfoo.so: cannot open file: No such file or directory
+ld: fatal: File processing errors. No output written to .libs/libfoo.so
+collect2: ld returned 1 exit status
+
+          A known workaround for this and other reported link problems
+          on the various releases of Solaris is to build gcc/gcj with
+          the latest GNU binutils instead of the native Solaris
+          ld. The most straightforward way to do this is to build and
+          install binutils, and then reference it in the configure for
+          gcc via --with-ld=/path_to_binutils_install/bin/ld
+          (--with-as may also be similarly specified but is not
+          believed to be required).
+
+          Please note, gcc/gcj must be built using GNU ld prior to
+          doing a clean build of libgcj!
+
+      3.3 Can I configure/build in the source tree?
+
+          No.  You cannot configure/build in the source tree.  If you
+          try, you'll see something like:
+
+              $ ./configure [...]
+              Configuring for a i686-pc-linux-gnu host.
+              *** Cannot currently configure in source tree.
+
+          Instead, you must build in another directory.  E.g.:
+
+              $ mkdir build
+              $ cd build
+              $ ../configure [...]
+
+      3.4 My libgcj build fails with "invalid use of undefined type
+          struct sigcontext_struct"
+
+          If you're using Linux, this probably means you need to
+          upgrade to a newwer, glibc (libc6) based Linux
+          distribution. libgcj does not support the older linux libc5.
+          It might be possible to get a working libgcj by changing
+          occurances of "sigcontext_struct" to "sigcontext", however
+          this has not been tested.  Even if it works, it is likely
+          that there are other issues with older libc versions that
+          would prevent libgcj from working correctly (threads bugs,
+          for example).
+
+Gcj Compile/Link Questions
+==========================
+
+      4.1 Why do I get undefined reference to `main' errors?
+
+          When using gcj to link a Java program, you must use the --main=
+          option to indicate the class that has the desired main method.
+          This is because every Java class can have a main method, thus
+          you have to tell gcj which one to use.
+
+      4.2 Can GCJ only handle source code?
+
+          GCJ will compile both source (.java) and bytecode (.class)
+          files. However, in many cases the native code produced by
+          compiling from source is better optimized than that compiled
+          from .class files.
+
+          Per Bothner explains:
+
+            The reason is that when you compile to bytecode you lose a
+            lot of information about program structure etc. That
+            information helps in generating better code. We can in
+            theory recover the information we need by analysing the
+            structure of the bytecodes, but it is sometimes difficult
+            - or sometimes it just that no-one has gotten around to
+            it.  Specific examples include loop structure (gcc
+            generates better code with explicit loops rather than with
+            the equivalent spaghetti code), array initializers, and
+            the JDK 1.1 `CLASS.class' syntax, all of which are
+            represented using more low-level constructs in bytecode.
+
+      4.3 "gcj -C" Doesn't seem to work like javac/jikes.  Whats going on?
+
+          The behavior of "gcj -C" is not at all like javac or jikes,
+          which will compile (not just scan) all .java's which are out
+          of date with regard to their .class's.
+
+      4.4 Where does GCJ look for files?
+
+          GCJ looks for classes to compile based on the CLASSPATH
+          environment variable. libgcj.jar and other files are found
+          relative to the path of the compiler itself, so it is safe
+          to move the entire compiler tree to a different path, and
+          there is no need to include libgcj.jar in your CLASSPATH.
+
+      4.5 How does gcj resolve whether to compile .class or .java files?
+
+          GCJ compiles only the files presented to it on the command
+          line. However, it also needs to scan other files in order to
+          determine the layout of other classes and check for errors
+          in your code.  For these dependencies, GCJ will favour
+          .class files if they are available because it is faster to
+          parse a class file than source code.
+
+      4.6 I'm getting link errors
+
+          If you get errors at link time that refer to 'undefined
+          reference to `java::lang::Object type_info function', verify
+          that you have compiled any CNI C++ files with the -fno-rtti
+          option. This is only required for versions of GCJ earlier
+          than 3.0.
+
+      4.7 I'm getting 'undefined symbol: __dso_handle'
+
+          Some versions of the GNU linker have broken support for the
+          '.hidden' directive, which results in problems with shared
+          libraries built with recent versions of gcc.
+
+          There are three solutions:
+
+            - downgrade to binutils that don't support .hidden at all,
+            - upgrade to a recent binutils, or
+            - undef the HAVE_GAS_HIDDEN definition in gcc's auto-host.h
+              (and rebuild gcc).
+
+Runtime Questions
+=================
+
+      5.1 My program is dumping core! What's going on?
+
+          It could be any number of things. One common mistake is
+          having your CLASSPATH environment variable pointing at a
+          third party's java.lang and friends. Either unset CLASSPATH,
+          or make sure it does not refer to core libraries other than
+          those found in libgcj.jar.Note that newwer versions of GCJ
+          will reject the core class library if it wasn't generated by
+          GCJ itself.
+
+      5.2 When I run the debugger I get a SEGV in the GC! What's going on?
+
+          This is "normal"; the Garbage Collector (GC) uses it to
+          determine stack boundaries. It is ordinarily caught and
+          handled by the GC -- you can see this in the debugger by
+          using cont to continue to the "real" segv.
+
+      5.3 I have just compiled and benchmarked my Java application
+          and it seems to be running slower than than XXX JIT JVM. Is there
+          anything I can do to make it go faster?
+
+        A few things:
+
+          - If your programs allocate many small, short lived objects,
+            the heap could be filling and triggering GC too
+            regularly. Try increasing the initial and maximum heap sizes
+            as per 5.5 How do I increase the runtime's initial and
+            maximum heap size?
+          - RE - array accesses. We have sub-optimal runtime checking
+            code, and the compiler is still not so smart about
+            automatically removing array checks. If your code is ready,
+            and it doesn't rely on them, try compiling with
+            --no-bounds-check.
+          - Try static linking.  On many platforms, dynamic (PIC)
+            function calls are more expensive than static ones. In
+            particular, the interaction with boehm-gc seems to incur
+            extra overhead when shared libraries are used.
+          - If your Java application doesn't need threads, try
+            building libgcj using --enable-threads=none. Portions of the
+            libgcj runtime are still more efficient when
+            single-threaded.
+
+       5.4 Can I profile Garbage Collection?
+
+          It is possible to turn on verbose GC output by supressing
+          the -DSILENT flag during build. One way to do this is to
+          comment out the line with #define SILENT 1 from
+          boehm-gc/configure before configuring libgcj.  The GC will
+          print collection statistics to stdout. (Rebuilding boehm-gc
+          alone without this flag doesn't seem to work.)
+
+      5.5 How do I increase the runtime's initial and maximum heap sizes?
+
+          Some programs that allocate many small, short-lived objects
+          can cause the default-sized heap to fill quickly and GC
+          often. With the 2.95.1 release there is no means to adjust
+          the heap at runtime. Recent snapshots provide the -ms and
+          -mx arguments to gij to specify the initial and maximum heap
+          sizes, respectively.
+
+      5.6 How can I profile my application?
+
+          Currently, only single threaded Java code may be used by the
+          profiler (gprof). POSIX threads seem to be incompatible with
+          the gmon stuff.  A couple of other tools that have been
+          mentioned on the GCJ mailing list are sprof and cprof.  The
+          former is part of GNU libc.
+
+      5.7 My program seems to hang and doesn't produce any output
+
+          Some versions had a bug in the iconv support. You can work
+          around it by setting LANG=en_US.UTF-8 at runtime, or give
+          the following option during compile time
+          -Dfile.encoding=UTF-8.  This problem should no longer occur
+          as of November 1, 2000.
+
+Programming Issues
+==================
+
+      6.1 Are there any examples of how to use CNI?
+
+          Glenn Chambers has created a couple of trivial examples for
+          version 2.95 and version 3.0.  As a comparison, here is the
+          same example as a JNI application using Kaffe.  The same
+          code will work with GCJ, as shown here.
+
+          Note that for version 2.95, you must compile the C++ files
+          used for CNI with the -fno-rtti option.  This constraint
+          does not apply in version 3.0 and later.
+
+          The primary source of documentation for CNI is at
+          http://gcc.gnu.org/java/papers/cni/t1.html
+
+      6.2 Is it possible to invoke GCJ compiled Java code from a
+          C++ application?
+
+          Yes, GCJ 3.1 supports a CNI-based invocation interface as
+          well as the traditional JNI invocation API.  See the GCJ
+          Manual for more details on how to use the CNI interface.
+
+Please send FSF & GNU inquiries & questions tognu@gnu.org.There are
+also other waysto contact the FSF.
+
+These pages are maintained by The GCC team.
+
+Please send comments on these web pages and GCC to our publicmailing
+list at gcc@gnu.org orgcc@gcc.gnu.org, send other questions to
+gnu@gnu.org.
+
+Copyright (C) Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA  02111,  USA.
+
+Verbatim copying and distribution of this entire article is permitted
+in any medium, provided this notice is preserved.
+
+Last modified 2003-04-30
--- gcc-5-5.4.0.orig/debian/NEWS.gcc
+++ gcc-5-5.4.0/debian/NEWS.gcc
@@ -0,0 +1,15550 @@
+This file contains information about GCC releases which has been generated
+automatically from the online release notes.  It covers releases of GCC
+(and the former EGCS project) since EGCS 1.0, on the line of development
+that led to GCC 3. For information on GCC 2.8.1 and older releases of GCC 2,
+see ONEWS.
+
+======================================================================
+http://gcc.gnu.org/gcc-5/index.html
+                              GCC 5 Release Series
+
+   April 22, 2015
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 5.1.
+
+   This release is a major release, containing new features (as well as
+   many other improvements) relative to GCC 4.9.x.
+
+Release History
+
+   GCC 5.1
+          April 22, 2015 ([2]changes, [3]documentation)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [4]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [5]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [6]GCC project
+   web site or contact the [7]GCC development mailing list.
+
+   To obtain GCC please use [8]our mirror sites or [9]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [10]GCC manuals. If that fails, the
+    [11]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [12]gcc@gcc.gnu.org. All of [13]our lists have public
+    archives.
+
+   Copyright (C) [14]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [15]maintained by the GCC team. Last modified
+   2015-04-22[16].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-5/changes.html
+   3. http://gcc.gnu.org/onlinedocs/5.1.0/
+   4. http://gcc.gnu.org/gcc-5/buildstat.html
+   5. http://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   6. http://gcc.gnu.org/index.html
+   7. mailto:gcc@gcc.gnu.org
+   8. http://gcc.gnu.org/mirrors.html
+   9. http://gcc.gnu.org/svn.html
+  10. https://gcc.gnu.org/onlinedocs/
+  11. mailto:gcc-help@gcc.gnu.org
+  12. mailto:gcc@gcc.gnu.org
+  13. https://gcc.gnu.org/lists.html
+  14. http://www.fsf.org/
+  15. https://gcc.gnu.org/about.html
+  16. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-5/changes.html
+                              GCC 5 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * The default mode for C is now -std=gnu11 instead of -std=gnu89.
+     * The C++ runtime library (libstdc++) uses a new ABI by default (see
+       [1]below).
+     * The Graphite framework for loop optimizations no longer requires
+       the CLooG library, only ISL version 0.14 (recommended) or 0.12.2.
+       The installation manual contains more information about
+       requirements to build GCC.
+     * The non-standard C++0x type traits has_trivial_default_constructor,
+       has_trivial_copy_constructor and has_trivial_copy_assign have been
+       deprecated and will be removed in a future version. The standard
+       C++11 traits is_trivially_default_constructible,
+       is_trivially_copy_constructible and is_trivially_copy_assignable
+       should be used instead.
+
+General Optimizer Improvements
+
+     * Inter-procedural optimization improvements:
+          + An Identical Code Folding (ICF) pass (controlled via
+            -fipa-icf) has been added. Compared to the identical code
+            folding performed by the Gold linker this pass does not
+            require function sections. It also performs merging before
+            inlining, so inter-procedural optimizations are aware of the
+            code re-use. On the other hand not all unifications performed
+            by a linker are doable by GCC which must honor aliasing
+            information. During link-time optimization of Firefox, this
+            pass unifies about 31000 functions, that is 14% overall.
+          + The devirtualization pass was significantly improved by adding
+            better support for speculative devirtualization and dynamic
+            type detection. About 50% of virtual calls in Firefox are now
+            speculatively devirtualized during link-time optimization.
+          + A new comdat localization pass allows the linker to eliminate
+            more dead code in presence of C++ inline functions.
+          + Virtual tables are now optimized. Local aliases are used to
+            reduce dynamic linking time of C++ virtual tables on ELF
+            targets and data alignment has been reduced to limit data
+            segment bloat.
+          + A new -fno-semantic-interposition option can be used to
+            improve code quality of shared libraries where interposition
+            of exported symbols is not allowed.
+          + Write-only variables are now detected and optimized out.
+          + With profile feedback the function inliner can now bypass
+            --param inline-insns-auto and --param inline-insns-single
+            limits for hot calls.
+          + The IPA reference pass was significantly sped up making it
+            feasible to enable -fipa-reference with -fprofile-generate.
+            This also solves a bottleneck seen when building Chromium with
+            link-time optimization.
+          + The symbol table and call-graph API was reworked to C++ and
+            simplified.
+          + The interprocedural propagation of constants now also
+            propagates alignments of pointer parameters. This for example
+            means that the vectorizer often does not need to generate loop
+            prologues and epilogues to make up for potential
+            misalignments.
+     * Link-time optimization improvements:
+          + One Definition Rule based merging of C++ types has been
+            implemented. Type merging enables better devirtualization and
+            alias analysis. Streaming extra information needed to merge
+            types adds about 2-6% of memory size and object size increase.
+            This can be controlled by -flto-odr-type-merging.
+          + Command-line optimization and target options are now streamed
+            on a per-function basis and honored by the link-time
+            optimizer. This change makes link-time optimization a more
+            transparent replacement of per-file optimizations. It is now
+            possible to build projects that require different optimization
+            settings for different translation units (such as -ffast-math,
+            -mavx, or -finline). Contrary to earlier GCC releases, the
+            optimization and target options passed on the link command
+            line are ignored.
+            Note that this applies only to those command-line options that
+            can be passed to optimize and target attributes. Command-line
+            options affecting global code generation (such as -fpic),
+            warnings (such as -Wodr), optimizations affecting the way
+            static variables are optimized (such as -fcommon), debug
+            output (such as -g), and --param parameters can be applied
+            only to the whole link-time optimization unit. In these cases,
+            it is recommended to consistently use the same options at both
+            compile time and link time.
+          + GCC bootstrap now uses slim LTO object files.
+          + Memory usage and link times were improved. Tree merging was
+            sped up, memory usage of GIMPLE declarations and types was
+            reduced, and, support for on-demand streaming of variable
+            constructors was added.
+     * Feedback directed optimization improvements:
+          + A new auto-FDO mode uses profiles collected by low overhead
+            profiling tools (perf) instead of more expensive program
+            instrumentation (via -fprofile-generate). SPEC2006 benchmarks
+            on x86-64 improve by 4.7% with auto-FDO and by 7.3% with
+            traditional feedback directed optimization.
+          + Profile precision was improved in presence of C++ inline and
+            extern inline functions.
+          + The new gcov-tool utility allows manipulating profiles.
+          + Profiles are now more tolerant to source file changes (this
+            can be controlled by --param profile-func-internal-id).
+     * Register allocation improvements:
+          + A new local register allocator (LRA) sub-pass, controlled by
+            -flra-remat, implements control-flow sensitive global register
+            rematerialization. Instead of spilling and restoring a
+            register value, it is recalculated if it is profitable. The
+            sub-pass improved SPEC2000 generated code by 1% and 0.5%
+            correspondingly on ARM and x86-64.
+          + Reuse of the PIC hard register, instead of using a fixed
+            register, was implemented on x86/x86-64 targets. This improves
+            generated PIC code performance as more hard registers can be
+            used. Shared libraries can significantly benefit from this
+            optimization. Currently it is switched on only for x86/x86-64
+            targets. As RA infrastructure is already implemented for PIC
+            register reuse, other targets might follow this in the future.
+          + A simple form of inter-procedural RA was implemented. When it
+            is known that a called function does not use caller-saved
+            registers, save/restore code is not generated around the call
+            for such registers. This optimization can be controlled by
+            -fipa-ra
+          + LRA is now much more effective at generating spills of general
+            registers into vector registers instead of memory on
+            architectures (e.g., modern Intel processors) where this is
+            profitable.
+     * UndefinedBehaviorSanitizer gained a few new sanitization options:
+          + -fsanitize=float-divide-by-zero: detect floating-point
+            division by zero;
+          + -fsanitize=float-cast-overflow: check that the result of
+            floating-point type to integer conversions do not overflow;
+          + -fsanitize=bounds: enable instrumentation of array bounds and
+            detect out-of-bounds accesses;
+          + -fsanitize=alignment: enable alignment checking, detect
+            various misaligned objects;
+          + -fsanitize=object-size: enable object size checking, detect
+            various out-of-bounds accesses.
+          + -fsanitize=vptr: enable checking of C++ member function calls,
+            member accesses and some conversions between pointers to base
+            and derived classes, detect if the referenced object does not
+            have the correct dynamic type.
+     * Pointer Bounds Checker, a bounds violation detector, has been added
+       and can be enabled via -fcheck-pointer-bounds. Memory accesses are
+       instrumented with run-time checks of used pointers against their
+       bounds to detect pointer bounds violations (overflows). The Pointer
+       Bounds Checker is available on x86/x86-64 GNU/Linux targets with a
+       new ISA extension Intel MPX support. See the Pointer Bounds Checker
+       [2]Wiki page for more details.
+
+New Languages and Language specific improvements
+
+     * [3]OpenMP 4.0 specification offloading features are now supported
+       by the C, C++, and Fortran compilers. Generic changes:
+          + Infrastructure (suitable for any vendor).
+          + Testsuite which covers offloading from the [4]OpenMP 4.0
+            Examples document.
+       Specific for upcoming Intel Xeon Phi products:
+          + Run-time library.
+          + Card emulator.
+     * GCC 5 includes a preliminary implementation of the OpenACC 2.0a
+       specification. OpenACC is intended for programming accelerator
+       devices such as GPUs. See [5]the OpenACC wiki page for more
+       information.
+
+  C family
+
+     * The default setting of the -fdiagnostics-color= command-line option
+       is now [6]configurable when building GCC using configuration option
+       --with-diagnostics-color=. The possible values are: never, always,
+       auto and auto-if-env. The new default auto uses color only when the
+       standard error is a terminal. The default in GCC 4.9 was
+       auto-if-env, which is equivalent to auto if there is a non-empty
+       GCC_COLORS environment variable, and never otherwise. As in GCC
+       4.9, an empty GCC_COLORS variable in the environment will always
+       disable colors, no matter what the default is or what command-line
+       options are used.
+     * A new command-line option -Wswitch-bool has been added for the C
+       and C++ compilers, which warns whenever a switch statement has an
+       index of boolean type.
+     * A new command-line option -Wlogical-not-parentheses has been added
+       for the C and C++ compilers, which warns about "logical not" used
+       on the left hand side operand of a comparison.
+     * A new command-line option -Wsizeof-array-argument has been added
+       for the C and C++ compilers, which warns when the sizeof operator
+       is applied to a parameter that has been declared as an array in a
+       function definition.
+     * A new command-line option -Wbool-compare has been added for the C
+       and C++ compilers, which warns about boolean expressions compared
+       with an integer value different from true/false.
+     * Full support for [7]Cilk Plus has been added to the GCC compiler.
+       Cilk Plus is an extension to the C and C++ languages to support
+       data and task parallelism.
+     * A new attribute no_reorder prevents reordering of selected symbols
+       against other such symbols or inline assembler. This enables to
+       link-time optimize the Linux kernel without having to resort to
+       -fno-toplevel-reorder that disables several optimizations.
+     * New preprocessor constructs, __has_include and __has_include_next,
+       to test the availability of headers have been added.
+       This demonstrates a way to include the header <optional> only if it
+       is available:
+
+#ifdef __has_include
+#  if __has_include(<optional>)
+#    include <optional>
+#    define have_optional 1
+#  elif __has_include(<experimental/optional>)
+#    include <experimental/optional>
+#    define have_optional 1
+#    define experimental_optional
+#  else
+#    define have_optional 0
+#  endif
+#endif
+
+       The header search paths for __has_include and __has_include_next
+       are equivalent to those of the standard directive #include and the
+       extension #include_next respectively.
+     * A new built-in function-like macro to determine the existence of an
+       attribute, __has_attribute, has been added. The equivalent built-in
+       macro __has_cpp_attribute was added to C++ to support
+       [8]Feature-testing recommendations for C++. The macro
+       __has_attribute is added to all C-like languages as an extension:
+
+int
+#ifdef __has_attribute
+#  if __has_attribute(__noinline__)
+  __attribute__((__noinline__))
+#  endif
+#endif
+foo(int x);
+
+       If an attribute exists, a nonzero constant integer is returned. For
+       standardized C++ attributes a date is returned, otherwise the
+       constant returned is 1. Both __has_attribute and
+       __has_cpp_attribute will add underscores to an attribute name if
+       necessary to resolve the name. For C++11 and onwards the attribute
+       may be scoped.
+     * A new set of built-in functions for arithmetics with overflow
+       checking has been added: __builtin_add_overflow,
+       __builtin_sub_overflow and __builtin_mul_overflow and for
+       compatibility with clang also other variants. These builtins have
+       two integral arguments (which don't need to have the same type),
+       the arguments are extended to infinite precision signed type, +, -
+       or * is performed on those, and the result is stored in an integer
+       variable pointed to by the last argument. If the stored value is
+       equal to the infinite precision result, the built-in functions
+       return false, otherwise true. The type of the integer variable that
+       will hold the result can be different from the types of the first
+       two arguments. The following snippet demonstrates how this can be
+       used in computing the size for the calloc function:
+
+void *
+calloc (size_t x, size_t y)
+{
+  size_t sz;
+  if (__builtin_mul_overflow (x, y, &sz))
+    return NULL;
+  void *ret = malloc (sz);
+  if (ret) memset (res, 0, sz);
+  return ret;
+}
+
+       On e.g. i?86 or x86-64 the above will result in a mul instruction
+       followed by a jump on overflow.
+     * The option -fextended-identifiers is now enabled by default for
+       C++, and for C99 and later C versions. Various bugs in the
+       implementation of extended identifiers have been fixed.
+
+  C
+
+     * The default mode has been changed to -std=gnu11.
+     * A new command-line option -Wc90-c99-compat has been added to warn
+       about features not present in ISO C90, but present in ISO C99.
+     * A new command-line option -Wc99-c11-compat has been added to warn
+       about features not present in ISO C99, but present in ISO C11.
+     * It is possible to disable warnings about conversions between
+       pointers that have incompatible types via a new warning option
+       -Wno-incompatible-pointer-types; warnings about implicit
+       incompatible integer to pointer and pointer to integer conversions
+       via a new warning option -Wno-int-conversion; and warnings about
+       qualifiers on pointers being discarded via a new warning option
+       -Wno-discarded-qualifiers.
+     * To allow proper use of const qualifiers with multidimensional
+       arrays, GCC will not warn about incompatible pointer types anymore
+       for conversions between pointers to arrays with and without const
+       qualifier (except when using -pedantic). Instead, a new warning is
+       emitted only if the const qualifier is lost. This can be controlled
+       with a new warning option -Wno-discarded-array-qualifiers.
+     * The C front end now generates more precise caret diagnostics.
+     * The -pg command-line option now only affects the current file in an
+       LTO build.
+
+  C++
+
+     * G++ now supports [9]C++14 variable templates.
+     * -Wnon-virtual-dtor doesn't warn anymore for final classes.
+     * Excessive template instantiation depth is now a fatal error. This
+       prevents excessive diagnostics that usually do not help to identify
+       the problem.
+     * G++ and libstdc++ now implement the feature-testing macros from
+       [10]Feature-testing recommendations for C++.
+     * G++ now allows typename in a template template parameter.
+
+template<template<typename> typename X> struct D; // OK
+
+     * G++ now supports [11]C++14 aggregates with non-static data member
+       initializers.
+
+struct A { int i, j = i; };
+A a = { 42 }; // a.j is also 42
+
+     * G++ now supports [12]C++14 extended constexpr.
+
+constexpr int f (int i)
+{
+  int j = 0;
+  for (; i > 0; --i)
+    ++j;
+  return j;
+}
+
+constexpr int i = f(42); // i is 42
+
+     * G++ now supports the [13]C++14 sized deallocation functions.
+
+void operator delete (void *, std::size_t) noexcept;
+void operator delete[] (void *, std::size_t) noexcept;
+
+     * A new One Definition Rule violation warning (controlled by -Wodr)
+       detects mismatches in type definitions and virtual table contents
+       during link-time optimization.
+     * New warnings -Wsuggest-final-types and -Wsuggest-final-methods help
+       developers to annotate programs with final specifiers (or anonymous
+       namespaces) to improve code generation. These warnings can be used
+       at compile time, but they are more useful in combination with
+       link-time optimization.
+     * G++ no longer supports [14]N3639 variable length arrays, as they
+       were removed from the C++14 working paper prior to ratification.
+       GNU VLAs are still supported, so VLA support is now the same in
+       C++14 mode as in C++98 and C++11 modes.
+     * G++ now allows passing a non-trivially-copyable class via C
+       varargs, which is conditionally-supported with
+       implementation-defined semantics in the standard. This uses the
+       same calling convention as a normal value parameter.
+     * G++ now defaults to -fabi-version=0 and -fabi-compat-version=2. So
+       various mangling bugs are fixed, but G++ will still emit aliases
+       with the old, wrong mangling where feasible. -Wabi continues to
+       warn about differences.
+
+    Runtime Library (libstdc++)
+
+     * A [15]Dual ABI is provided by the library. A new ABI is enabled by
+       default. The old ABI is still supported and can be used by defining
+       the macro _GLIBCXX_USE_CXX11_ABI to 0 before including any C++
+       standard library headers.
+     * A new implementation of std::string is enabled by default, using
+       the small string optimization instead of copy-on-write reference
+       counting.
+     * A new implementation of std::list is enabled by default, with an
+       O(1) size() function;
+     * [16]Full support for C++11, including the following new features:
+          + std::deque and std::vector<bool> meet the allocator-aware
+            container requirements;
+          + movable and swappable iostream classes;
+          + support for std::align and std::aligned_union;
+          + type traits std::is_trivially_copyable,
+            std::is_trivially_constructible, std::is_trivially_assignable
+            etc.;
+          + I/O manipulators std::put_time, std::get_time, std::hexfloat
+            and std::defaultfloat;
+          + generic locale-aware std::isblank;
+          + locale facets for Unicode conversion;
+          + atomic operations for std::shared_ptr;
+          + std::notify_all_at_thread_exit() and functions for making
+            futures ready at thread exit.
+     * Support for the C++11 hexfloat manipulator changes how the num_put
+       facet formats floating point types when
+       ios_base::fixed|ios_base::scientific is set in a stream's fmtflags.
+       This change affects all language modes, even though the C++98
+       standard gave no special meaning to that combination of flags. To
+       prevent the use of hexadecimal notation for floating point types
+       use str.unsetf(std::ios_base::floatfield) to clear the relevant
+       bits in str.flags().
+     * [17]Full experimental support for C++14, including the following
+       new features:
+          + std::is_final type trait;
+          + heterogeneous comparison lookup in associative containers.
+          + global functions cbegin, cend, rbegin, rend, crbegin, and
+            crend for range access to containers, arrays and initializer
+            lists.
+     * [18]Improved experimental support for the Library Fundamentals TS,
+       including:
+          + class std::experimental::any;
+          + function template std::experimental::apply;
+          + function template std::experimental::sample;
+          + function template std::experimental::search and related
+            searcher types;
+          + variable templates for type traits;
+          + function template std::experimental::not_fn.
+     * New random number distributions logistic_distribution and
+       uniform_on_sphere_distribution as extensions.
+     * [19]GDB Xmethods for containers and std::unique_ptr.
+
+  Fortran
+
+     * Compatibility notice:
+          + The version of the module files (.mod) has been incremented.
+          + For free-form source files, [20]-Werror=line-truncation is now
+            enabled by default; note that comments exceeding the line
+            length are not diagnosed. (For fixed-form source code, the
+            same warning is available but turned off by default, such that
+            excess characters are ignored. -ffree-line-length-n and
+            -ffixed-line-length-n can be used to modify the default line
+            lengths of 132 and 72 columns, respectively.)
+          + The -Wtabs option is now more sensible: with -Wtabs the
+            compiler warns if it encounters tabs and with -Wno-tabs this
+            warning is turned off. Before, -Wno-tabs warned and -Wtabs
+            turned the warning off. As before, the warning is also enabled
+            by -Wall, -pedantic and the f95, f2003, f2008 and f2008ts
+            options of -std=.
+     * Incomplete support for colorizing diagnostics emitted by gfortran
+       has been added. The option [21]-fdiagnostics-color controls when
+       color is used in diagnostics. The default value of this option can
+       be [22]configured when building GCC. The GCC_COLORS environment
+       variable can be used to customize the colors or disable coloring
+       completely. Sample diagnostics output:
+      $ gfortran -fdiagnostics-color=always -Wuse-without-only test.f90
+      test.f90:6:1:
+
+       0 continue
+       1
+      Error: Zero is not a valid statement label at (1)
+      test.f90:9:6:
+
+         USE foo
+            1
+      Warning: USE statement at (1) has no ONLY qualifier [-Wuse-without-only]
+
+     * The -Wuse-without-only option has been added to warn when a USE
+       statement has no ONLY qualifier and, thus, implicitly imports all
+       public entities of the used module.
+     * Formatted READ and WRITE statements now work correctly in
+       locale-aware programs. For more information and potential caveats,
+       see [23]Section 5.3 Thread-safety of the runtime library in the
+       manual.
+     * [24]Fortran 2003:
+          + The intrinsic IEEE modules (IEEE_FEATURES, IEEE_EXCEPTIONS and
+            IEEE_ARITHMETIC) are now supported.
+     * [25]Fortran 2008:
+          + [26]Coarrays: Full experimental support of Fortran 2008's
+            coarrays with -fcoarray=lib except for allocatable/pointer
+            components of derived-type coarrays. GCC currently only ships
+            with a single-image library (libcaf_single), but multi-image
+            support based on MPI and GASNet is provided by the libraries
+            of the [27]OpenCoarrays project.
+     * TS18508 Additional Parallel Features in Fortran:
+          + Support for the collective intrinsic subroutines CO_MAX,
+            CO_MIN, CO_SUM, CO_BROADCAST and CO_REDUCE has been added,
+            including -fcoarray=lib support.
+          + Support for the new atomic intrinsics has been added,
+            including -fcoarray=lib support.
+     * Fortran 2015:
+          + Support for IMPLICIT NONE (external, type).
+          + ERROR STOP is now permitted in pure procedures.
+
+  Go
+
+     * GCC 5 provides a complete implementation of the Go 1.4.2 release.
+     * Building GCC 5 with Go enabled will install two new programs:
+       [28]go and [29]gofmt.
+
+libgccjit
+
+   New in GCC 5 is the ability to build GCC as a shared library for
+   embedding in other processes (such as interpreters), suitable for
+   Just-In-Time compilation to machine code.
+
+   The shared library has a [30]C API and a [31]C++ wrapper API providing
+   some "syntactic sugar". There are also bindings available from 3rd
+   parties for [32]Python and for [33]D.
+
+   For example, this library can be used by interpreters for [34]compiling
+   functions from bytecode to machine code.
+
+   The library can also be used for ahead-of-time compilation, enabling
+   GCC to be plugged into a pre-existing frontend. An example of using
+   this to build a compiler for an esoteric language we'll refer to as
+   "brainf" can be seen [35]here.
+
+   libgccjit is licensed under the GPLv3 (or at your option, any later
+   version)
+
+   It should be regarded as experimental at this time.
+
+New Targets and Target Specific Improvements
+
+  AArch64
+
+     * Code generation for the ARM Cortex-A57 processor has been improved.
+       A more accurate instruction scheduling model for the processor is
+       now used, and a number of compiler tuning parameters have been set
+       to offer increased performance when compiling with -mcpu=cortex-a57
+       or -mtune=cortex-a57.
+     * A workaround for the ARM Cortex-A53 erratum 835769 has been added
+       and can be enabled by giving the -mfix-cortex-a53-835769 option.
+       Alternatively it can be enabled by default by configuring GCC with
+       the --enable-fix-cortex-a53-835769 option.
+     * The optional cryptographic extensions to the ARMv8-A architecture
+       are no longer enabled by default when specifying the
+       -mcpu=cortex-a53, -mcpu=cortex-a57 or -mcpu=cortex-a57.cortex-a53
+       options. To enable these extensions add +crypto to the value of
+       -mcpu or -march e.g. -mcpu=cortex-a53+crypto.
+     * Support has been added for the following processors (GCC
+       identifiers in parentheses): ARM Cortex-A72 (cortex-a72) and
+       initial support for its big.LITTLE combination with the ARM
+       Cortex-A53 (cortex-a72.cortex-a53), Cavium ThunderX (thunderx),
+       Applied Micro X-Gene 1 (xgene1), and Samsung Exynos M1 (exynos-m1).
+       The GCC identifiers can be used as arguments to the -mcpu or -mtune
+       options, for example: -mcpu=xgene1 or -mtune=cortex-a72.cortex-a53.
+       Using -mcpu=cortex-a72 requires a version of GNU binutils that has
+       support for the Cortex-A72.
+     * The transitional options -mlra and -mno-lra have been removed. The
+       AArch64 backend now uses the local register allocator (LRA) only.
+
+  ARM
+
+     * Thumb-1 assembly code is now generated in unified syntax. The new
+       option -masm-syntax-unified specifies whether inline assembly code
+       is using unified syntax. By default the option is off which means
+       non-unified syntax is used. However this is subject to change in
+       future releases. Eventually the non-unified syntax will be
+       deprecated.
+     * It is now a configure-time error to use the --with-cpu configure
+       option with either of --with-tune or --with-arch.
+     * Code generation for the ARM Cortex-A57 processor has been improved.
+       A more accurate instruction scheduling model for the processor is
+       now used, and a number of compiler tuning parameters have been set
+       to offer increased performance when compiling with -mcpu=cortex-a57
+       or -mtune=cortex-a57.
+     * Support has been added for the following processors (GCC
+       identifiers in parentheses): ARM Cortex-A17 (cortex-a17) and
+       initial support for its big.LITTLE combination with the ARM
+       Cortex-A7 (cortex-a17.cortex-a7), ARM Cortex-A72 (cortex-a72) and
+       initial support for its big.LITTLE combination with the ARM
+       Cortex-A53 (cortex-a72.cortex-a53), ARM Cortex-M7 (cortex-m7),
+       Applied Micro X-Gene 1 (xgene1), and Samsung Exynos M1 (exynos-m1).
+       The GCC identifiers can be used as arguments to the -mcpu or -mtune
+       options, for example: -mcpu=xgene1 or -mtune=cortex-a72.cortex-a53.
+       Using -mcpu=cortex-a72 requires a version of GNU binutils that has
+       support for the Cortex-A72.
+     * The deprecated option -mwords-little-endian has been removed.
+     * The options -mapcs, -mapcs-frame, -mtpcs-frame and
+       -mtpcs-leaf-frame which are only applicable to the old ABI have
+       been deprecated.
+     * The transitional options -mlra and -mno-lra have been removed. The
+       ARM backend now uses the local register allocator (LRA) only.
+
+  IA-32/x86-64
+
+     * New ISA extensions support [36]AVX-512{BW,DQ,VL,IFMA,VBMI} of
+       Intel's CPU codenamed Skylake Server was added to GCC. That
+       includes inline assembly support, new intrinsics, and basic
+       autovectorization. These new AVX-512 extensions are available via
+       the following GCC switches: AVX-512 Vector Length EVEX feature:
+       -mavx512vl, AVX-512 Byte and Word instructions: -mavx512bw, AVX-512
+       Dword and Qword instructions: -mavx512dq, AVX-512 FMA-52
+       instructions: -mavx512ifma and for AVX-512 Vector Bit Manipulation
+       Instructions: -mavx512vbmi.
+     * New ISA extensions support [37]Intel MPX was added to GCC. This new
+       extension is available via the -mmpx compiler switch. Intel MPX is
+       a set of processor features which, with compiler, run-time library
+       and OS support, brings increased robustness to software by run-time
+       checking pointer references against their bounds. In GCC Intel MPX
+       is supported by Pointer Bounds Checker and libmpx run-time
+       libraries.
+     * The new -mrecord-mcount option for -pg generates a Linux kernel
+       style table of pointers to mcount or __fentry__ calls at the
+       beginning of functions. The new -mnop-mcount option in addition
+       also generates nops in place of the __fentry__ or mcount call, so
+       that a call per function can be later patched in. This can be used
+       for low overhead tracing or hot code patching.
+     * The new -malign-data option controls how GCC aligns variables.
+       -malign-data=compat uses increased alignment compatible with GCC
+       4.8 and earlier, -malign-data=abi uses alignment as specified by
+       the psABI, and -malign-data=cacheline uses increased alignment to
+       match the cache line size. -malign-data=compat is the default.
+     * The new -mskip-rax-setup option skips setting up the RAX register
+       when SSE is disabled and there are no variable arguments passed in
+       vector registers. This can be used to optimize the Linux kernel.
+
+  MIPS
+
+     * MIPS Releases 3 and 5 are now directly supported. Use the
+       command-line options -mips32r3, -mips64r3, -mips32r5 and -mips64r5
+       to enable code-generation for these processors.
+     * The Imagination P5600 processor is now supported using the
+       -march=p5600 command-line option.
+     * The Cavium Octeon3 processor is now supported using the
+       -march=octeon3 command-line option.
+     * MIPS Release 6 is now supported using the -mips32r6 and -mips64r6
+       command-line options.
+     * The o32 ABI has been modified and extended. The o32 64-bit
+       floating-point register support is now obsolete and has been
+       removed. It has been replaced by three ABI extensions FPXX, FP64A,
+       and FP64. The meaning of the -mfp64 command-line option has
+       changed. It is now used to enable the FP64A and FP64 ABI
+       extensions.
+          + The FPXX extension requires that code generated to access
+            double-precision values use even-numbered registers. Code that
+            adheres to this extension is link-compatible with all other
+            o32 double-precision ABI variants and will execute correctly
+            in all hardware FPU modes. The command-line options -mabi=32
+            -mfpxx can be used to enable this extension. MIPS II is the
+            minimum processor required.
+          + The o32 FP64A extension requires that floating-point registers
+            be 64-bit and odd-numbered single-precision registers are not
+            allowed. Code that adheres to the o32 FP64A variant is
+            link-compatible with all other o32 double-precision ABI
+            variants. The command-line options -mabi=32 -mfp64
+            -mno-odd-spreg can be used to enable this extension. MIPS32R2
+            is the minimum processor required.
+          + The o32 FP64 extension also requires that floating-point
+            registers be 64-bit, but permits the use of single-precision
+            registers. Code that adheres to the o32 FP64 variant is
+            link-compatible with o32 FPXX and o32 FP64A variants only,
+            i.e. it is not compatible with the original o32
+            double-precision ABI. The command-line options -mabi=32 -mfp64
+            -modd-spreg can be used to enable this extension. MIPS32R2 is
+            the minimum processor required.
+       The new ABI variants can be enabled by default using the configure
+       time options --with-fp-32=[32|xx|64] and --with(out)-odd-sp-reg-32.
+       It is strongly recommended that all vendors begin to set o32 FPXX
+       as the default ABI. This will be required to run the generated code
+       on MIPSR5 cores in conjunction with future MIPS SIMD (MSA) code and
+       MIPSR6 cores.
+     * GCC will now pass all floating-point options to the assembler if
+       GNU binutils 2.25 is used. As a result, any inline assembly code
+       that uses hard-float instructions should be amended to include a
+       .set directive to override the global assembler options when
+       compiling for soft-float targets.
+
+  NDS32
+
+     * The variadic function ABI implementation is now compatible with
+       past Andes toolchains where the caller uses registers to pass
+       arguments and the callee is in charge of pushing them on stack.
+     * The options -mforce-fp-as-gp, -mforbid-fp-as-gp, and -mex9 have
+       been removed since they are not yet available in the nds32 port of
+       GNU binutils.
+     * A new option -mcmodel=[small|medium|large] supports varied code
+       models on code generation. The -mgp-direct option became
+       meaningless and can be discarded.
+
+  RX
+
+     * A new command line option -mno-allow-string-insns can be used to
+       disable the generation of the SCMPU, SMOVU, SMOVB, SMOVF, SUNTIL,
+       SWHILE and RMPA instructions. An erratum released by Renesas shows
+       that it is unsafe to use these instructions on addresses within the
+       I/O space of the processor. The new option can be used when the
+       programmer is concerned that the I/O space might be accessed. The
+       default is still to enable these instructions.
+
+  SH
+
+     * The compiler will now pass the appropriate --isa= option to the
+       assembler.
+     * The default handling for the GBR has been changed from call
+       clobbered to call preserved. The old behavior can be reinstated by
+       specifying the option -fcall-used-gbr.
+     * Support for the SH4A fpchg instruction has been added which will be
+       utilized when switching between single and double precision FPU
+       modes.
+     * The compiler no longer uses the __fpscr_values array for switching
+       between single and double FPU precision modes on non-SH4A targets.
+       Instead mode switching will now be performed by storing, modifying
+       and reloading the FPSCR, so that other FPSCR bits are preserved
+       across mode switches. The __fpscr_values array that is defined in
+       libgcc is still present for backwards compatibility, but it will
+       not be referenced by compiler generated code anymore.
+     * New builtin functions __builtin_sh_get_fpscr and
+       __builtin_sh_set_fpscr have been added. The __builtin_sh_set_fpscr
+       function will mask the specified bits in such a way that the SZ, PR
+       and FR mode bits will be preserved, while changing the other bits.
+       These new functions do not reference the __fpscr_values array. The
+       old functions __set_fpscr and __get_fpscr in libgcc which access
+       the __fpscr_values array are still present for backwards
+       compatibility, but their usage is highly discouraged.
+     * Some improvements to code generated for __atomic built-in
+       functions.
+     * When compiling for SH2E the compiler will no longer force the usage
+       of delay slots for conditional branch instructions bt and bf. The
+       old behavior can be reinstated (e.g. to work around a hardware bug
+       in the original SH7055) by specifying the new option
+       -mcbranch-force-delay-slot.
+
+Operating Systems
+
+  DragonFly BSD
+
+     * GCC now supports the DragonFly BSD operating system.
+
+  FreeBSD
+
+     * GCC now supports the FreeBSD operating system for the arm port
+       through the arm*-*-freebsd* target triplets.
+
+  VxWorks MILS
+
+     * GCC now supports the MILS (Multiple Independent Levels of Security)
+       variant of WindRiver's VxWorks operating system for PowerPC
+       targets.
+
+Other significant improvements
+
+     * The gcc-ar, gcc-nm, gcc-ranlib wrappers now understand a -B option
+       to set the compiler to use.
+
+     * When the new command-line option -freport-bug is used, GCC
+       automatically generates a developer-friendly reproducer whenever an
+       internal compiler error is encountered.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [38]GCC manuals. If that fails, the
+    [39]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [40]gcc@gcc.gnu.org. All of [41]our lists have public
+    archives.
+
+   Copyright (C) [42]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [43]maintained by the GCC team. Last modified
+   2015-04-22[44].
+
+References
+
+   1. http://gcc.gnu.org/gcc-5/changes.html#libstdcxx
+   2. https://gcc.gnu.org/wiki/Intel MPX support in the GCC compiler
+   3. http://www.openmp.org/mp-documents/OpenMP4.0.0.pdf
+   4. http://openmp.org/mp-documents/OpenMP4.0.0.Examples.pdf
+   5. https://gcc.gnu.org/wiki/OpenACC
+   6. https://gcc.gnu.org/install/configure.html
+   7. https://www.cilkplus.org/
+   8. http://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
+   9. http://gcc.gnu.org/projects/cxx1y.html
+  10. http://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations
+  11. http://gcc.gnu.org/projects/cxx1y.html
+  12. http://gcc.gnu.org/projects/cxx1y.html
+  13. http://gcc.gnu.org/projects/cxx1y.html
+  14. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html
+  15. http://gcc.gnu.org/onlinedocs/libstdc++/manual/using_dual_abi.html
+  16. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2011
+  17. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
+  18. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
+  19. https://sourceware.org/gdb/current/onlinedocs/gdb/Xmethods-In-Python.html
+  20. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
+  21. https://gcc.gnu.org/onlinedocs/gcc/Language-Independent-Options.html
+  22. https://gcc.gnu.org/install/configure.html
+  23. https://gcc.gnu.org/onlinedocs/gfortran/Thread-safety-of-the-runtime-library.html
+  24. https://gcc.gnu.org/wiki/Fortran2003Status
+  25. https://gcc.gnu.org/wiki/Fortran2008Status
+  26. https://gcc.gnu.org/wiki/Coarray
+  27. http://www.opencoarrays.org/
+  28. http://golang.org/cmd/go
+  29. http://golang.org/cmd/gofmt
+  30. https://gcc.gnu.org/onlinedocs/jit/intro/index.html
+  31. https://gcc.gnu.org/onlinedocs/jit/cp/index.html
+  32. https://github.com/davidmalcolm/pygccjit
+  33. https://github.com/ibuclaw/gccjitd
+  34. https://gcc.gnu.org/onlinedocs/jit/intro/tutorial04.html
+  35. https://gcc.gnu.org/onlinedocs/jit/intro/tutorial05.html
+  36. https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
+  37. https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
+  38. https://gcc.gnu.org/onlinedocs/
+  39. mailto:gcc-help@gcc.gnu.org
+  40. mailto:gcc@gcc.gnu.org
+  41. https://gcc.gnu.org/lists.html
+  42. http://www.fsf.org/
+  43. https://gcc.gnu.org/about.html
+  44. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.9/index.html
+                             GCC 4.9 Release Series
+
+   October 30, 2014
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.9.2.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.9.1 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.9.2
+          October 30, 2014 ([2]changes, [3]documentation)
+
+   GCC 4.9.1
+          July 16, 2014 ([4]changes, [5]documentation)
+
+   GCC 4.9.0
+          April 22, 2014 ([6]changes, [7]documentation)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [8]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [9]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [10]GCC
+   project web site or contact the [11]GCC development mailing list.
+
+   To obtain GCC please use [12]our mirror sites or [13]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [14]GCC manuals. If that fails, the
+    [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
+    archives.
+
+   Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [19]maintained by the GCC team. Last modified
+   2014-10-30[20].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.9/changes.html
+   3. http://gcc.gnu.org/onlinedocs/4.9.2/
+   4. http://gcc.gnu.org/gcc-4.9/changes.html
+   5. http://gcc.gnu.org/onlinedocs/4.9.1/
+   6. http://gcc.gnu.org/gcc-4.9/changes.html
+   7. https://gcc.gnu.org/onlinedocs/4.9.0/
+   8. http://gcc.gnu.org/gcc-4.9/buildstat.html
+   9. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  10. http://gcc.gnu.org/index.html
+  11. mailto:gcc@gcc.gnu.org
+  12. http://gcc.gnu.org/mirrors.html
+  13. http://gcc.gnu.org/svn.html
+  14. https://gcc.gnu.org/onlinedocs/
+  15. mailto:gcc-help@gcc.gnu.org
+  16. mailto:gcc@gcc.gnu.org
+  17. https://gcc.gnu.org/lists.html
+  18. http://www.fsf.org/
+  19. https://gcc.gnu.org/about.html
+  20. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.9/changes.html
+                             GCC 4.9 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * The mudflap run time checker has been removed. The mudflap options
+       remain, but do nothing.
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.9.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       The following ports for individual systems on particular
+       architectures have been obsoleted:
+          + Solaris 9 (*-*-solaris2.9). Details can be found in the
+            [1]announcement.
+     * On AArch64, the singleton vector types int64x1_t, uint64x1_t and
+       float64x1_t exported by arm_neon.h are defined to be the same as
+       their base types. This results in incorrect application of
+       parameter passing rules to arguments of types int64x1_t and
+       uint64x1_t, with respect to the AAPCS64 ABI specification. In
+       addition, names of C++ functions with parameters of these types
+       (including float64x1_t) are not mangled correctly. The current
+       typedef declarations also unintentionally allow implicit casting
+       between singleton vector types and their base types. These issues
+       will be resolved in a near future release. See [2]PR60825 for more
+       information.
+
+   More information on porting to GCC 4.9 from previous versions of GCC
+   can be found in the [3]porting guide for this release.
+
+General Optimizer Improvements
+
+     * AddressSanitizer, a fast memory error detector, is now available on
+       ARM.
+     * UndefinedBehaviorSanitizer (ubsan), a fast undefined behavior
+       detector, has been added and can be enabled via
+       -fsanitize=undefined. Various computations will be instrumented to
+       detect undefined behavior at runtime. UndefinedBehaviorSanitizer is
+       currently available for the C and C++ languages.
+     * Link-time optimization (LTO) improvements:
+          + Type merging was rewritten. The new implementation is
+            significantly faster and uses less memory.
+          + Better partitioning algorithm resulting in less streaming
+            during link time.
+          + Early removal of virtual methods reduces the size of object
+            files and improves link-time memory usage and compile time.
+          + Function bodies are now loaded on-demand and released early
+            improving overall memory usage at link time.
+          + C++ hidden keyed methods can now be optimized out.
+          + When using a linker plugin, compiling with the -flto option
+            now generates slim object files (.o) which only contain
+            intermediate language representation for LTO. Use
+            -ffat-lto-objects to create files which contain additionally
+            the object code. To generate static libraries suitable for LTO
+            processing, use gcc-ar and gcc-ranlib; to list symbols from a
+            slim object file use gcc-nm. (This requires that ar, ranlib
+            and nm have been compiled with plugin support.)
+       Memory usage building Firefox with debug enabled was reduced from
+       15GB to 3.5GB; link time from 1700 seconds to 350 seconds.
+     * Inter-procedural optimization improvements:
+          + New type inheritance analysis module improving
+            devirtualization. Devirtualization now takes into account
+            anonymous name-spaces and the C++11 final keyword.
+          + New speculative devirtualization pass (controlled by
+            -fdevirtualize-speculatively.
+          + Calls that were speculatively made direct are turned back to
+            indirect where direct call is not cheaper.
+          + Local aliases are introduced for symbols that are known to be
+            semantically equivalent across shared libraries improving
+            dynamic linking times.
+     * Feedback directed optimization improvements:
+          + Profiling of programs using C++ inline functions is now more
+            reliable.
+          + New time profiling determines typical order in which functions
+            are executed.
+          + A new function reordering pass (controlled by
+            -freorder-functions) significantly reduces startup time of
+            large applications. Until binutils support is completed, it is
+            effective only with link-time optimization.
+          + Feedback driven indirect call removal and devirtualization now
+            handle cross-module calls when link-time optimization is
+            enabled.
+
+New Languages and Language specific improvements
+
+     * Version 4.0 of the [4]OpenMP specification is now supported in the
+       C and C++ compilers and starting with the 4.9.1 release also in the
+       Fortran compiler. The new -fopenmp-simd option can be used to
+       enable OpenMP's SIMD directives, while ignoring other OpenMP
+       directives. The new [5]-fsimd-cost-model= option permits to tune
+       the vectorization cost model for loops annotated with OpenMP and
+       Cilk Plus simd directives; -Wopenmp-simd warns when the current
+       cost model overrides simd directives set by the user.
+     * The -Wdate-time option has been added for the C, C++ and Fortran
+       compilers, which warns when the __DATE__, __TIME__ or __TIMESTAMP__
+       macros are used. Those macros might prevent bit-wise-identical
+       reproducible compilations.
+
+  Ada
+
+     * GNAT switched to Ada 2012 instead of Ada 2005 by default.
+
+  C family
+
+     * Support for colorizing diagnostics emitted by GCC has been added.
+       The [6]-fdiagnostics-color=auto will enable it when outputting to
+       terminals, -fdiagnostics-color=always unconditionally. The
+       GCC_COLORS environment variable can be used to customize the colors
+       or disable coloring. If GCC_COLORS variable is present in the
+       environment, the default is -fdiagnostics-color=auto, otherwise
+       -fdiagnostics-color=never.
+       Sample diagnostics output:
+    $ g++ -fdiagnostics-color=always -S -Wall test.C
+    test.C: In function ‘int foo()’:
+    test.C:1:14: warning: no return statement in function returning non-void [-W
+return-type]
+     int foo () { }
+                  ^
+    test.C:2:46: error: template instantiation depth exceeds maximum of 900 (use
+ -ftemplate-depth= to increase the maximum) instantiating ‘struct X<100>’
+     template <int N> struct X { static const int value = X<N-1>::value; }; temp
+late struct X<1000>;
+                                                  ^
+    test.C:2:46:   recursively required from ‘const int X<999>::value’
+    test.C:2:46:   required from ‘const int X<1000>::value’
+    test.C:2:88:   required from here
+
+    test.C:2:46: error: incomplete type ‘X<100>’ used in nested name specifier
+
+     * With the new [7]#pragma GCC ivdep, the user can assert that there
+       are no loop-carried dependencies which would prevent concurrent
+       execution of consecutive iterations using SIMD (single instruction
+       multiple data) instructions.
+     * Support for [8]Cilk Plus has been added and can be enabled with the
+       -fcilkplus option. Cilk Plus is an extension to the C and C++
+       languages to support data and task parallelism. The present
+       implementation follows ABI version 1.2; all features but _Cilk_for
+       have been implemented.
+
+  C
+
+     * ISO C11 atomics (the _Atomic type specifier and qualifier and the
+       <stdatomic.h> header) are now supported.
+     * ISO C11 generic selections (_Generic keyword) are now supported.
+     * ISO C11 thread-local storage (_Thread_local, similar to GNU C
+       __thread) is now supported.
+     * ISO C11 support is now at a similar level of completeness to ISO
+       C99 support: substantially complete modulo bugs, extended
+       identifiers (supported except for corner cases when
+       -fextended-identifiers is used), floating-point issues (mainly but
+       not entirely relating to optional C99 features from Annexes F and
+       G) and the optional Annexes K (Bounds-checking interfaces) and L
+       (Analyzability).
+     * A new C extension __auto_type provides a subset of the
+       functionality of C++11 auto in GNU C.
+
+  C++
+
+     * The G++ implementation of [9]C++1y return type deduction for normal
+       functions has been updated to conform to [10]N3638, the proposal
+       accepted into the working paper. Most notably, it adds
+       decltype(auto) for getting decltype semantics rather than the
+       template argument deduction semantics of plain auto:
+
+int& f();
+         auto  i1 = f(); // int
+decltype(auto) i2 = f(); // int&
+
+     * G++ supports [11]C++1y lambda capture initializers:
+
+[x = 42]{ ... };
+
+       Actually, they have been accepted since GCC 4.5, but now the
+       compiler doesn't warn about them with -std=c++1y, and supports
+       parenthesized and brace-enclosed initializers as well.
+     * G++ supports [12]C++1y variable length arrays. G++ has supported
+       GNU/C99-style VLAs for a long time, but now additionally supports
+       initializers and lambda capture by reference. In C++1y mode G++
+       will complain about VLA uses that are not permitted by the draft
+       standard, such as forming a pointer to VLA type or applying sizeof
+       to a VLA variable. Note that it now appears that VLAs will not be
+       part of C++14, but will be part of a separate document and then
+       perhaps C++17.
+
+void f(int n) {
+  int a[n] = { 1, 2, 3 }; // throws std::bad_array_length if n < 3
+  [&a]{ for (int i : a) { cout << i << endl; } }();
+  &a; // error, taking address of VLA
+}
+
+     * G++ supports the [13]C++1y [[deprecated]] attribute modulo bugs in
+       the underlying [[gnu::deprecated]] attribute. Classes and functions
+       can be marked deprecated and a diagnostic message added:
+
+class A;
+int bar(int n);
+#if __cplusplus > 201103
+class [[deprecated("A is deprecated in C++14; Use B instead")]] A;
+[[deprecated("bar is unsafe; use foo() instead")]]
+int bar(int n);
+
+int foo(int n);
+class B;
+#endif
+A aa; // warning: 'A' is deprecated : A is deprecated in C++14; Use B instead
+int j = bar(2); // warning: 'int bar(int)' is deprecated : bar is unsafe; use fo
+o() instead
+
+     * G++ supports [14]C++1y digit separators. Long numeric literals can
+       be subdivided with a single quote ' to enhance readability:
+
+int i = 1048576;
+int j = 1'048'576;
+int k = 0x10'0000;
+int m = 0'004'000'000;
+int n = 0b0001'0000'0000'0000'0000'0000;
+
+double x = 1.602'176'565e-19;
+double y = 1.602'176'565e-1'9;
+
+     * G++ supports [15]C++1y generic (polymorphic) lambdas.
+
+// a functional object that will increment any type
+auto incr = [](auto x) { return x++; };
+
+     * As a GNU extension, G++ supports explicit template parameter syntax
+       for generic lambdas. This can be combined in the expected way with
+       the standard auto syntax.
+
+// a functional object that will add two like-type objects
+auto add = [] <typename T> (T a, T b) { return a + b; };
+
+     * G++ supports unconstrained generic functions as specified by §4.1.2
+       and §5.1.1 of [16]N3889: Concepts Lite Specification. Briefly, auto
+       may be used as a type-specifier in a parameter declaration of any
+       function declarator in order to introduce an implicit function
+       template parameter, akin to generic lambdas.
+
+// the following two function declarations are equivalent
+auto incr(auto x) { return x++; }
+template <typename T>
+auto incr(T x) { return x++; }
+
+    Runtime Library (libstdc++)
+
+     * [17]Improved support for C++11, including:
+          + support for <regex>;
+          + The associative containers in <map> and <set> and the
+            unordered associative containers in <unordered_map> and
+            <unordered_set> meet the allocator-aware container
+            requirements;
+     * [18]Improved experimental support for the upcoming ISO C++
+       standard, C++14, including:
+          + fixing constexpr member functions without const;
+          + implementation of the std::exchange() utility function;
+          + addressing tuples by type;
+          + implemention of std::make_unique;
+          + implemention of std::shared_lock;
+          + making std::result_of SFINAE-friendly;
+          + adding operator() to std::integral_constant;
+          + adding user-defined literals for standard library types
+            std::basic_string, std::chrono::duration, and std::complex;
+          + adding two range overloads to non-modifying sequence oprations
+            std::equal and std::mismatch;
+          + adding IO manipulators for quoted strings;
+          + adding constexpr members to <utility>, <complex>, <chrono>,
+            and some containers;
+          + adding compile-time std::integer_sequence;
+          + adding cleaner transformation traits;
+          + making <functional>s operator functors easier to use and more
+            generic;
+     * An implementation of std::experimental::optional.
+     * An implementation of std::experimental::string_view.
+     * The non-standard function std::copy_exception has been deprecated
+       and will be removed in a future version. std::make_exception_ptr
+       should be used instead.
+
+  Fortran
+
+     * Compatibility notice:
+          + Module files: The version of the module files (.mod) has been
+            incremented; additionally, module files are now compressed.
+            Fortran MODULEs compiled by earlier GCC versions have to be
+            recompiled, when they are USEd by files compiled with GCC 4.9.
+            GCC 4.9 is not able to read .mod files of earlier GCC
+            versions; attempting to do so gives an error message. Note:
+            The ABI of the produced assembler data itself has not changed:
+            object files and libraries are fully compatible with older
+            versions (except as stated below).
+          + ABI changes:
+               o The [19]argument passing ABI has changed for scalar dummy
+                 arguments of type INTEGER, REAL, COMPLEX and LOGICAL,
+                 which have both the VALUE and the OPTIONAL attributes.
+               o To support finalization the virtual table associated with
+                 polymorphic variables has changed. Code containing CLASS
+                 should be recompiled, including all files which define
+                 derived types involved in the type definition used by
+                 polymorphic variables. (Note: Due to the incremented
+                 module version, trying to mix old code with new code will
+                 usually give an error message.)
+          + GNU Fortran no longer deallocates allocatable variables or
+            allocatable components of variables declared in the main
+            program. Since Fortran 2008, the standard explicitly states
+            that variables declared in the Fortran main program
+            automatically have the SAVE attribute.
+          + When opening files, the close-on-exec flag is set if the
+            system supports such a feature. This is generally considered
+            good practice these days, but if there is a need to pass file
+            descriptors to child processes the parent process must now
+            remember to clear the close-on-exec flag by calling fcntl(),
+            e.g. via ISO_C_BINDING, before executing the child process.
+     * The deprecated command-line option -fno-whole-file has been
+       removed. (-fwhole-file is the default since GCC 4.6.)
+       -fwhole-file/-fno-whole-file continue to be accepted but do not
+       influence the code generation.
+     * The compiler no longer unconditionally warns about DO loops with
+       zero iterations. This warning is now controlled by the -Wzerotrip
+       option, which is implied by -Wall.
+     * The new NO_ARG_CHECK attribute of the [20]!GCC$ directive can be
+       used to disable the type-kind-rank (TKR) argument check for a dummy
+       argument. The feature is similar to ISO/IEC TS 29133:2012's
+       TYPE(*), except that it additionally also disables the rank check.
+       Variables with NO_ARG_CHECK have to be dummy arguments and may only
+       be used as argument to ISO_C_BINDING's C_LOC and as actual argument
+       to another NO_ARG_CHECK dummy argument; also the other constraints
+       of TYPE(*) apply. The dummy arguments should be declared as scalar
+       or assumed-size variable of type type(*) (recommended) – or of type
+       integer, real, complex or logical. With NO_ARG_CHECK, a pointer to
+       the data without further type or shape information is passed,
+       similar to C's void*. Note that also TS 29113's
+       type(*),dimension(..) accepts arguments of any type and rank;
+       contrary to NO_ARG_CHECK assumed-rank arguments pass an array
+       descriptor which contains the array shape and stride of the
+       argument.
+     * [21]Fortran 2003:
+          + Finalization is now supported. It is currently only done for a
+            subset of those situations in which it should occur.
+          + Experimental support for scalar character components with
+            deferred length (i.e. allocatable string length) in derived
+            types has been added. (Deferred-length character variables are
+            supported since GCC 4.6.)
+     * [22]Fortran 2008:
+          + When STOP or ERROR STOP are used to terminate the execution
+            and any exception (but inexact) is signaling, a warning is
+            printed to ERROR_UNIT, indicating which exceptions are
+            signaling. The [23]-ffpe-summary= command-line option can be
+            used to fine-tune for which exceptions the warning should be
+            shown.
+          + Rounding on input (READ) is now handled on systems where
+            strtod honours the rounding mode. (For output, rounding is
+            supported since GCC 4.5.) Note that for input, the compatible
+            rounding mode is handled as nearest (i.e., for a tie, rounding
+            to an even last significant [cf. IEC 60559:1989] – while
+            compatible rounds away from zero for a tie).
+
+  Go
+
+     * GCC 4.9 provides a complete implementation of the Go 1.2.1 release.
+
+New Targets and Target Specific Improvements
+
+  AArch64
+
+     * The ARMv8-A crypto and CRC instructions are now supported through
+       intrinsics. These are enabled when the architecture supports these
+       and are available through the -march=armv8-a+crc and
+       -march=armv8-a+crypto options.
+     * Initial support for ILP32 has now been added to the compiler. This
+       is now available through the command-line option -mabi=ilp32.
+       Support for ILP32 is considered experimental as the ABI
+       specification is still beta.
+     * Coverage of more of the ISA including the SIMD extensions has been
+       added. The Advanced SIMD intrinsics have also been improved.
+     * The new local register allocator (LRA) is now on by default for the
+       AArch64 backend.
+     * The REE (Redundant extension elimination) pass has now been enabled
+       by default for the AArch64 backend.
+     * Tuning for the Cortex-A53 and Cortex-A57 has been improved.
+     * Initial big.LITTLE tuning support for the combination of Cortex-A57
+       and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
+       option.
+     * A number of structural changes have been made to both the ARM and
+       AArch64 backends to facilitate improved code-generation.
+     * As of GCC 4.9.2 a workaround for the ARM Cortex-A53 erratum 835769
+       has been added and can be enabled by giving the
+       -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
+       default by configuring GCC with the --enable-fix-cortex-a53-835769
+       option.
+
+  ARC
+
+     * A port for Synopsys Designware ARC has been contributed by Embecosm
+       and Synopsys Inc.
+
+  ARM
+
+     * Use of Advanced SIMD (Neon) for 64-bit scalar computations has been
+       disabled by default. This was found to generate better code in only
+       a small number of cases. It can be turned back on with the
+       -mneon-for-64bits option.
+     * Further support for the ARMv8-A architecture, notably implementing
+       the restriction around IT blocks in the Thumb32 instruction set has
+       been added. The -mrestrict-it option can be used with
+       -march=armv7-a or the -march=armv7ve options to make code
+       generation fully compatible with the deprecated instructions in
+       ARMv8-A.
+     * Support has now been added for the ARMv7ve variant of the
+       architecture. This can be used by the -march=armv7ve option.
+     * The ARMv8-A crypto and CRC instructions are now supported through
+       intrinsics and are available through the -march=armv8-a+crc and
+       mfpu=crypto-neon-fp-armv8 options.
+     * LRA is now on by default for the ARM target. This can be turned off
+       using the -mno-lra option. This option is a purely transitionary
+       command-line option and will be removed in a future release. We are
+       interested in any bug reports regarding functional and performance
+       regressions with LRA.
+     * A new option -mslow-flash-data to improve performance of programs
+       fetching data on slow flash memory has now been introduced for the
+       ARMv7-M profile cores.
+     * A new option -mpic-data-is-text-relative for targets that allows
+       data segments to be relative to text segments has been added. This
+       is on by default for all targets except VxWorks RTP.
+     * A number of infrastructural changes have been made to both the ARM
+       and AArch64 backends to facilitate improved code-generation.
+     * GCC now supports Cortex-A12 and the Cortex-R7 through the
+       -mcpu=cortex-a12 and -mcpu=cortex-r7 options.
+     * GCC now has tuning for the Cortex-A57 and Cortex-A53 through the
+       -mcpu=cortex-a57 and -mcpu=cortex-a53 options.
+     * Initial big.LITTLE tuning support for the combination of Cortex-A57
+       and Cortex-A53 was added through the -mcpu=cortex-a57.cortex-a53
+       option. Similar support was added for the combination of Cortex-A15
+       and Cortex-A7 through the -mcpu=cortex-a15.cortex-a7 option.
+     * Further performance optimizations for the Cortex-A15 and the
+       Cortex-M4 have been added.
+     * A number of code generation improvements for Thumb2 to reduce code
+       size when compiling for the M-profile processors.
+
+  IA-32/x86-64
+
+     * -mfpmath=sse is now implied by -ffast-math on all targets where
+       SSE2 is supported.
+     * Intel AVX-512 support was added to GCC. That includes inline
+       assembly support, new registers and extending existing ones, new
+       intrinsics (covered by corresponding testsuite), and basic
+       autovectorization. AVX-512 instructions are available via the
+       following GCC switches: AVX-512 foundation instructions: -mavx512f,
+       AVX-512 prefetch instructions: -mavx512pf, AVX-512 exponential and
+       reciprocal instructions: -mavx512er, AVX-512 conflict detection
+       instructions: -mavx512cd.
+     * It is now possible to call x86 intrinsics from select functions in
+       a file that are tagged with the corresponding target attribute
+       without having to compile the entire file with the -mxxx option.
+       This improves the usability of x86 intrinsics and is particularly
+       useful when doing [24]Function Multiversioning.
+     * GCC now supports the new Intel microarchitecture named Silvermont
+       through -march=silvermont.
+     * GCC now supports the new Intel microarchitecture named Broadwell
+       through -march=broadwell.
+     * Optimizing for other Intel microarchitectures have been renamed to
+       -march=nehalem, westmere, sandybridge, ivybridge, haswell, bonnell.
+     * -march=generic has been retuned for better support of Intel core
+       and AMD Bulldozer architectures. Performance of AMD K7, K8, Intel
+       Pentium-M, and Pentium4 based CPUs is no longer considered
+       important for generic.
+     * -mtune=intel can now be used to generate code running well on the
+       most current Intel processors, which are Haswell and Silvermont for
+       GCC 4.9.
+     * Support to encode 32-bit assembly instructions in 16-bit format is
+       now available through the -m16 command-line option.
+     * Better inlining of memcpy and memset that is aware of value ranges
+       and produces shorter alignment prologues.
+     * -mno-accumulate-outgoing-args is now honored when unwind
+       information is output. Argument accumulation is also now turned off
+       for portions of programs optimized for size.
+     * Support for new AMD family 15h processors (Excavator core) is now
+       available through the -march=bdver4 and -mtune=bdver4 options.
+
+  MSP430
+
+     * A new command-line option -mcpu= has been added to the MSP430
+       backend. This option is used to specify the ISA to be used.
+       Accepted values are msp430 (the default), msp430x and msp430xv2.
+       The ISA is no longer deduced from the -mmcu= option as there are
+       far too many different MCU names. The -mmcu= option is still
+       supported, and this is still used to select linker scripts and
+       generate a C preprocessor symbol that will be recognised by the
+       msp430.h header file.
+
+  NDS32
+
+     * A new nds32 port supports the 32-bit architecture from Andes
+       Technology Corporation.
+     * The port provides initial support for the V2, V3, V3m instruction
+       set architectures.
+
+  Nios II
+
+     * A port for the Altera Nios II has been contributed by Mentor
+       Graphics.
+
+  PowerPC / PowerPC64 / RS6000
+
+     * GCC now supports Power ISA 2.07, which includes support for
+       Hardware Transactional Memory (HTM), Quadword atomics and several
+       VMX and VSX additions, including Crypto, 64-bit integer, 128-bit
+       integer and decimal integer operations.
+     * Support for the POWER8 processor is now available through the
+       -mcpu=power8 and -mtune=power8 options.
+     * The libitm library has been modified to add a HTM fastpath that
+       automatically uses POWER's HTM hardware instructions when it is
+       executing on a HTM enabled processor.
+     * Support for the new powerpc64le-linux platform has been added. It
+       defaults to generating code that conforms to the ELFV2 ABI.
+
+  S/390, System z
+
+     * Support for the Transactional Execution Facility included with the
+       IBM zEnterprise zEC12 processor has been added. A set of GCC style
+       builtins as well as XLC style builtins are provided. The builtins
+       are enabled by default when using the -march=zEC12 option but can
+       explicitly be disabled with -mno-htm. Using the GCC builtins also
+       libitm supports hardware transactions on S/390.
+     * The hotpatch features allows to prepare functions for hotpatching.
+       A certain amount of bytes is reserved before the function entry
+       label plus a NOP is inserted at its very beginning to implement a
+       backward jump when applying a patch. The feature can either be
+       enabled per compilation unit via the command-line option -mhotpatch
+       or per function using the hotpatch attribute.
+     * The shrink wrap optimization is now supported on S/390 and enabled
+       by default.
+     * A major rework of the routines to determine which registers need to
+       be saved and restored in function prologue/epilogue now allow to
+       use floating point registers as save slots. This will happen for
+       certain leaf function with -march=z10 or higher.
+     * The LRA rtl pass replaces reload by default on S/390.
+
+  RX
+
+     * The port now allows to specify the RX100, RX200, and RX600
+       processors with the command-line options -mcpu=rx100, -mcpu=rx200
+       and -mcpu=rx600.
+
+  SH
+
+     * Minor improvements to code generated for integer arithmetic and
+       code that involves the T bit.
+     * Added support for the SH2A clips and clipu instructions. The
+       compiler will now try to utilize them for min/max expressions such
+       as max (-128, min (127, x)).
+     * Added support for the cmp/str instruction through built-in
+       functions such as __builtin_strlen. When not optimizing for size,
+       the compiler will now expand calls to e.g. strlen as an inlined
+       sequences which utilize the cmp/str instruction.
+     * Improved code generated around volatile memory loads and stores.
+     * The option -mcbranchdi has been deprecated. Specifying it will
+       result in a warning and will not influence code generation.
+     * The option -mcmpeqdi has been deprecated. Specifying it will result
+       in a warning and will not influence code generation.
+
+GCC 4.9.1
+
+   This is the [25]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.9.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   Version 4.0 of the [26]OpenMP specification is supported even in
+   Fortran, not just C and C++.
+
+GCC 4.9.2
+
+   This is the [27]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.9.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [28]GCC manuals. If that fails, the
+    [29]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [30]gcc@gcc.gnu.org. All of [31]our lists have public
+    archives.
+
+   Copyright (C) [32]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [33]maintained by the GCC team. Last modified
+   2015-04-08[34].
+
+References
+
+   1. https://gcc.gnu.org/ml/gcc-patches/2013-05/msg00728.html
+   2. https://gcc.gnu.org/PR60825
+   3. https://gcc.gnu.org/gcc-4.9/porting_to.html
+   4. http://openmp.org/wp/openmp-specifications/
+   5. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908
+   6. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Language-Independent-Options.html#index-fdiagnostics-color-252
+   7. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Loop-Specific-Pragmas.html
+   8. https://www.cilkplus.org/
+   9. http://gcc.gnu.org/projects/cxx1y.html
+  10. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3638.html
+  11. http://gcc.gnu.org/projects/cxx1y.html
+  12. http://gcc.gnu.org/projects/cxx1y.html
+  13. http://gcc.gnu.org/projects/cxx1y.html
+  14. http://gcc.gnu.org/projects/cxx1y.html
+  15. http://gcc.gnu.org/projects/cxx1y.html
+  16. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2014/n3889.pdf
+  17. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/libstdc++/manual/manual/status.html#status.iso.2011
+  18. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.2014
+  19. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gfortran/Argument-passing-conventions.html
+  20. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gfortran/GNU-Fortran-Compiler-Directives.html
+  21. https://gcc.gnu.org/wiki/Fortran2003Status
+  22. https://gcc.gnu.org/wiki/Fortran2008Status
+  23. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gfortran/Debugging-Options.html
+  24. https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Function-Multiversioning.html
+  25. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.9.1
+  26. http://openmp.org/wp/openmp-specifications/
+  27. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.9.2
+  28. https://gcc.gnu.org/onlinedocs/
+  29. mailto:gcc-help@gcc.gnu.org
+  30. mailto:gcc@gcc.gnu.org
+  31. https://gcc.gnu.org/lists.html
+  32. http://www.fsf.org/
+  33. https://gcc.gnu.org/about.html
+  34. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.8/index.html
+                             GCC 4.8 Release Series
+
+   December 19, 2014
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.8.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.8.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.8.4
+          December 19, 2014 ([2]changes, [3]documentation)
+
+   GCC 4.8.3
+          May 22, 2014 ([4]changes, [5]documentation)
+
+   GCC 4.8.2
+          October 16, 2013 ([6]changes, [7]documentation)
+
+   GCC 4.8.1
+          May 31, 2013 ([8]changes, [9]documentation)
+
+   GCC 4.8.0
+          March 22, 2013 ([10]changes, [11]documentation)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [12]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [13]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [14]GCC
+   project web site or contact the [15]GCC development mailing list.
+
+   To obtain GCC please use [16]our mirror sites or [17]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [18]GCC manuals. If that fails, the
+    [19]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [20]gcc@gcc.gnu.org. All of [21]our lists have public
+    archives.
+
+   Copyright (C) [22]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [23]maintained by the GCC team. Last modified
+   2014-12-19[24].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.8/changes.html
+   3. https://gcc.gnu.org/onlinedocs/4.8.4/
+   4. http://gcc.gnu.org/gcc-4.8/changes.html
+   5. https://gcc.gnu.org/onlinedocs/4.8.3/
+   6. http://gcc.gnu.org/gcc-4.8/changes.html
+   7. https://gcc.gnu.org/onlinedocs/4.8.2/
+   8. http://gcc.gnu.org/gcc-4.8/changes.html
+   9. https://gcc.gnu.org/onlinedocs/4.8.1/
+  10. http://gcc.gnu.org/gcc-4.8/changes.html
+  11. https://gcc.gnu.org/onlinedocs/4.8.0/
+  12. http://gcc.gnu.org/gcc-4.8/buildstat.html
+  13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  14. http://gcc.gnu.org/index.html
+  15. mailto:gcc@gcc.gnu.org
+  16. http://gcc.gnu.org/mirrors.html
+  17. http://gcc.gnu.org/svn.html
+  18. https://gcc.gnu.org/onlinedocs/
+  19. mailto:gcc-help@gcc.gnu.org
+  20. mailto:gcc@gcc.gnu.org
+  21. https://gcc.gnu.org/lists.html
+  22. http://www.fsf.org/
+  23. https://gcc.gnu.org/about.html
+  24. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.8/changes.html
+                             GCC 4.8 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+   GCC now uses C++ as its implementation language. This means that to
+   build GCC from sources, you will need a C++ compiler that understands
+   C++ 2003. For more details on the rationale and specific changes,
+   please refer to the [1]C++ conversion page.
+
+   To enable the Graphite framework for loop optimizations you now need
+   CLooG version 0.18.0 and ISL version 0.11.1. Both can be obtained from
+   the [2]GCC infrastructure directory. The installation manual contains
+   more information about requirements to build GCC.
+
+   GCC now uses a more aggressive analysis to derive an upper bound for
+   the number of iterations of loops using constraints imposed by language
+   standards. This may cause non-conforming programs to no longer work as
+   expected, such as SPEC CPU 2006 464.h264ref and 416.gamess. A new
+   option, -fno-aggressive-loop-optimizations, was added to disable this
+   aggressive analysis. In some loops that have known constant number of
+   iterations, but undefined behavior is known to occur in the loop before
+   reaching or during the last iteration, GCC will warn about the
+   undefined behavior in the loop instead of deriving lower upper bound of
+   the number of iterations for the loop. The warning can be disabled with
+   -Wno-aggressive-loop-optimizations.
+
+   On ARM, a bug has been fixed in GCC's implementation of the AAPCS rules
+   for the layout of vectors that could lead to wrong code being
+   generated. Vectors larger than 8 bytes in size are now by default
+   aligned to an 8-byte boundary. This is an ABI change: code that makes
+   explicit use of vector types may be incompatible with binary objects
+   built with older versions of GCC. Auto-vectorized code is not affected
+   by this change.
+
+   On AVR, support has been removed for the command-line option
+   -mshort-calls deprecated in GCC 4.7.
+
+   On AVR, the configure option --with-avrlibc supported since GCC 4.7.2
+   is turned on per default for all non-RTEMS configurations. This option
+   arranges for a better integration of [3]AVR Libc with avr-gcc. For
+   technical details, see [4]PR54461. To turn off the option in non-RTEMS
+   configurations, use --with-avrlibc=no. If the compiler is configured
+   for RTEMS, the option is always turned off.
+
+   More information on porting to GCC 4.8 from previous versions of GCC
+   can be found in the [5]porting guide for this release.
+
+General Optimizer Improvements (and Changes)
+
+     * DWARF4 is now the default when generating DWARF debug information.
+       When -g is used on a platform that uses DWARF debugging
+       information, GCC will now default to -gdwarf-4
+       -fno-debug-types-section.
+       GDB 7.5, Valgrind 3.8.0 and elfutils 0.154 debug information
+       consumers support DWARF4 by default. Before GCC 4.8 the default
+       version used was DWARF2. To make GCC 4.8 generate an older DWARF
+       version use -g together with -gdwarf-2 or -gdwarf-3. The default
+       for Darwin and VxWorks is still -gdwarf-2 -gstrict-dwarf.
+     * A new general optimization level, -Og, has been introduced. It
+       addresses the need for fast compilation and a superior debugging
+       experience while providing a reasonable level of run-time
+       performance. Overall experience for development should be better
+       than the default optimization level -O0.
+     * A new option -ftree-partial-pre was added to control the partial
+       redundancy elimination (PRE) optimization. This option is enabled
+       by default at the -O3 optimization level, and it makes PRE more
+       aggressive.
+     * The option -fconserve-space has been removed; it was no longer
+       useful on most targets since GCC supports putting variables into
+       BSS without making them common.
+     * The struct reorg and matrix reorg optimizations (command-line
+       options -fipa-struct-reorg and -fipa-matrix-reorg) have been
+       removed. They did not always work correctly, nor did they work with
+       link-time optimization (LTO), hence were only applicable to
+       programs consisting of a single translation unit.
+     * Several scalability bottle-necks have been removed from GCC's
+       optimization passes. Compilation of extremely large functions, e.g.
+       due to the use of the flatten attribute in the "Eigen" C++ linear
+       algebra templates library, is significantly faster than previous
+       releases of GCC.
+     * Link-time optimization (LTO) improvements:
+          + LTO partitioning has been rewritten for better reliability and
+            maintanibility. Several important bugs leading to link
+            failures have been fixed.
+     * Interprocedural optimization improvements:
+          + A new symbol table has been implemented. It builds on existing
+            callgraph and varpool modules and provide a new API. Unusual
+            symbol visibilities and aliases are handled more consistently
+            leading to, for example, more aggressive unreachable code
+            removal with LTO.
+          + The inline heuristic can now bypass limits on the size of of
+            inlined functions when the inlining is particularly
+            profitable. This happens, for example, when loop bounds or
+            array strides get propagated.
+          + Values passed through aggregates (either by value or
+            reference) are now propagated at the inter-procedural level
+            leading to better inlining decisions (for example in the case
+            of Fortran array descriptors) and devirtualization.
+     * [6]AddressSanitizer , a fast memory error detector, has been added
+       and can be enabled via -fsanitize=address. Memory access
+       instructions will be instrumented to detect heap-, stack-, and
+       global-buffer overflow as well as use-after-free bugs. To get nicer
+       stacktraces, use -fno-omit-frame-pointer. The AddressSanitizer is
+       available on IA-32/x86-64/x32/PowerPC/PowerPC64 GNU/Linux and on
+       x86-64 Darwin.
+     * [7]ThreadSanitizer has been added and can be enabled via
+       -fsanitize=thread. Instructions will be instrumented to detect data
+       races. The ThreadSanitizer is available on x86-64 GNU/Linux.
+     * A new local register allocator (LRA) has been implemented, which
+       replaces the 26 year old reload pass and improves generated code
+       quality. For now it is active on the IA-32 and x86-64 targets.
+     * Support for transactional memory has been implemented on the
+       following architectures: IA-32/x86-64, ARM, PowerPC, SH, SPARC, and
+       Alpha.
+
+New Languages and Language specific improvements
+
+  C family
+
+     * Each diagnostic emitted now includes the original source line and a
+       caret '^' indicating the column. The option
+       -fno-diagnostics-show-caret suppresses this information.
+     * The option -ftrack-macro-expansion=2 is now enabled by default.
+       This allows the compiler to display the macro expansion stack in
+       diagnostics. Combined with the caret information, an example
+       diagnostic showing these two features is:
+
+t.c:1:94: error: invalid operands to binary < (have ‘struct mystruct’ and ‘float
+’)
+ #define MYMAX(A,B)    __extension__ ({ __typeof__(A) __a = (A); __typeof__(B) _
+_b = (B); __a < __b ? __b : __a; })
+
+              ^
+t.c:7:7: note: in expansion of macro 'MYMAX'
+   X = MYMAX(P, F);
+       ^
+
+     * A new -Wsizeof-pointer-memaccess warning has been added (also
+       enabled by -Wall) to warn about suspicious length parameters to
+       certain string and memory built-in functions if the argument uses
+       sizeof. This warning warns e.g. about memset (ptr, 0, sizeof
+       (ptr)); if ptr is not an array, but a pointer, and suggests a
+       possible fix, or about memcpy (&foo, ptr, sizeof (&foo));.
+     * The new option -Wpedantic is an alias for -pedantic, which is now
+       deprecated. The forms -Wno-pedantic, -Werror=pedantic, and
+       -Wno-error=pedantic work in the same way as for any other -W
+       option. One caveat is that -Werror=pedantic is not equivalent to
+       -pedantic-errors, since the latter makes into errors some warnings
+       that are not controlled by -Wpedantic, and the former only affects
+       diagnostics that are disabled when using -Wno-pedantic.
+     * The option -Wshadow no longer warns if a declaration shadows a
+       function declaration, unless the former declares a function or
+       pointer to function, because this is [8]a common and valid case in
+       real-world code.
+
+  C++
+
+     * G++ now implements the [9]C++11 thread_local keyword; this differs
+       from the GNU __thread keyword primarily in that it allows dynamic
+       initialization and destruction semantics. Unfortunately, this
+       support requires a run-time penalty for references to
+       non-function-local thread_local variables defined in a different
+       translation unit even if they don't need dynamic initialization, so
+       users may want to continue to use __thread for TLS variables with
+       static initialization semantics.
+       If the programmer can be sure that no use of the variable in a
+       non-defining TU needs to trigger dynamic initialization (either
+       because the variable is statically initialized, or a use of the
+       variable in the defining TU will be executed before any uses in
+       another TU), they can avoid this overhead with the
+       -fno-extern-tls-init option.
+       OpenMP threadprivate variables now also support dynamic
+       initialization and destruction by the same mechanism.
+     * G++ now implements the [10]C++11 attribute syntax, e.g.
+
+[[noreturn]] void f();
+
+       and also the alignment specifier, e.g.
+
+alignas(double) int i;
+
+     * G++ now implements [11]C++11 inheriting constructors, e.g.
+
+struct A { A(int); };
+struct B: A { using A::A; }; // defines B::B(int)
+B b(42); // OK
+
+     * As of GCC 4.8.1, G++ implements the change to decltype semantics
+       from [12]N3276.
+
+struct A f();
+decltype(f()) g();    // OK, return type of f() is not required to be complete.
+
+     * As of GCC 4.8.1, G++ implements [13]C++11 ref-qualifiers, e.g.
+
+struct A { int f() &; };
+int i = A().f();  // error, f() requires an lvalue object
+
+     * G++ now supports a -std=c++1y option for experimentation with
+       features proposed for the next revision of the standard, expected
+       around 2014. Currently the only difference from -std=c++11 is
+       support for return type deduction in normal functions, as proposed
+       in [14]N3386. Status of C++1y features in GCC 4.8 can be found
+       [15]here.
+     * The G++ namespace association extension, __attribute ((strong)),
+       has been deprecated. Inline namespaces should be used instead.
+     * G++ now supports a -fext-numeric-literal option to control whether
+       GNU numeric literal suffixes are accepted as extensions or
+       processed as C++11 user-defined numeric literal suffixes. The flag
+       is on (use suffixes for GNU literals) by default for -std=gnu++*,
+       and -std=c++98. The flag is off (use suffixes for user-defined
+       literals) by default for -std=c++11 and later.
+
+    Runtime Library (libstdc++)
+
+     * [16]Improved experimental support for the new ISO C++ standard,
+       C++11, including:
+          + forward_list meets the allocator-aware container requirements;
+          + this_thread::sleep_for(), this_thread::sleep_until() and
+            this_thread::yield() are defined without requiring the
+            configure option --enable-libstdcxx-time;
+     * Improvements to <random>:
+          + SSE optimized normal_distribution.
+          + Use of hardware RNG instruction for random_device on new x86
+            processors (requires the assembler to support the
+            instruction.)
+       and <ext/random>:
+          + New random number engine simd_fast_mersenne_twister_engine
+            with an optimized SSE implementation.
+          + New random number distributions beta_distribution,
+            normal_mv_distribution, rice_distribution,
+            nakagami_distribution, pareto_distribution, k_distribution,
+            arcsine_distribution, hoyt_distribution.
+     * Added --disable-libstdcxx-verbose configure option to disable
+       diagnostic messages issued when a process terminates abnormally.
+       This may be useful for embedded systems to reduce the size of
+       executables that link statically to the library.
+
+  Fortran
+
+     * Compatibility notice:
+          + Module files: The version of module files (.mod) has been
+            incremented. Fortran MODULEs compiled by earlier GCC versions
+            have to be recompiled, when they are USEd by files compiled
+            with GCC 4.8. GCC 4.8 is not able to read .mod files created
+            by earlier versions; attempting to do so gives an error
+            message.
+            Note: The ABI of the produced assembler data itself has not
+            changed; object files and libraries are fully compatible with
+            older versions except as noted below.
+          + ABI: Some internal names (used in the assembler/object file)
+            have changed for symbols declared in the specification part of
+            a module. If an affected module – or a file using it via use
+            association – is recompiled, the module and all files which
+            directly use such symbols have to be recompiled as well. This
+            change only affects the following kind of module symbols:
+               o Procedure pointers. Note: C-interoperable function
+                 pointers (type(c_funptr)) are not affected nor are
+                 procedure-pointer components.
+               o Deferred-length character strings.
+     * The [17]BACKTRACE intrinsic subroutine has been added. It shows a
+       backtrace at an arbitrary place in user code; program execution
+       continues normally afterwards.
+     * The [18]-Wc-binding-type warning option has been added (disabled by
+       default). It warns if the a variable might not be C interoperable;
+       in particular, if the variable has been declared using an intrinsic
+       type with default kind instead of using a kind parameter defined
+       for C interoperability in the intrinsic ISO_C_Binding module.
+       Before, this warning was always printed. The -Wc-binding-type
+       option is enabled by -Wall.
+     * The [19]-Wrealloc-lhs and -Wrealloc-lhs-all warning command-line
+       options have been added, which diagnose when code is inserted for
+       automatic (re)allocation of a variable during assignment. This
+       option can be used to decide whether it is safe to use
+       [20]-fno-realloc-lhs. Additionally, it can be used to find
+       automatic (re)allocation in hot loops. (For arrays, replacing
+       "var=" by "var(:)=" disables the automatic reallocation.)
+     * The [21]-Wcompare-reals command-line option has been added. When
+       this is set, warnings are issued when comparing REAL or COMPLEX
+       types for equality and inequality; consider replacing a == b by
+       abs(a−b) < eps with a suitable eps. -Wcompare-reals is enabled by
+       -Wextra.
+     * The [22]-Wtarget-lifetime command-line option has been added
+       (enabled with -Wall), which warns if the pointer in a pointer
+       assignment might outlive its target.
+     * Reading floating point numbers which use "q" for the exponential
+       (such as 4.0q0) is now supported as vendor extension for better
+       compatibility with old data files. It is strongly recommended to
+       use for I/O the equivalent but standard conforming "e" (such as
+       4.0e0).
+       (For Fortran source code, consider replacing the "q" in
+       floating-point literals by a kind parameter (e.g. 4.0e0_qp with a
+       suitable qp). Note that – in Fortran source code – replacing "q" by
+       a simple "e" is not equivalent.)
+     * The GFORTRAN_TMPDIR environment variable for specifying a
+       non-default directory for files opened with STATUS="SCRATCH", is
+       not used anymore. Instead gfortran checks the POSIX/GNU standard
+       TMPDIR environment variable. If TMPDIR is not defined, gfortran
+       falls back to other methods to determine the directory for
+       temporary files as documented in the [23]user manual.
+     * [24]Fortran 2003:
+          + Support for unlimited polymorphic variables (CLASS(*)) has
+            been added. Nonconstant character lengths are not yet
+            supported.
+     * [25]TS 29113:
+          + Assumed types (TYPE(*)) are now supported.
+          + Experimental support for assumed-rank arrays (dimension(..))
+            has been added. Note that currently gfortran's own array
+            descriptor is used, which is different from the one defined in
+            TS29113, see [26]gfortran's header file or use the [27]Chasm
+            Language Interoperability Tools.
+
+  Go
+
+     * GCC 4.8.2 provides a complete implementation of the Go 1.1.2
+       release.
+     * GCC 4.8.0 and 4.8.1 implement a preliminary version of the Go 1.1
+       release. The library support is not quite complete.
+     * Go has been tested on GNU/Linux and Solaris platforms for various
+       processors including x86, x86_64, PowerPC, SPARC, and Alpha. It may
+       work on other platforms as well.
+
+New Targets and Target Specific Improvements
+
+  AArch64
+
+     * A new port has been added to support AArch64, the new 64-bit
+       architecture from ARM. Note that this is a separate port from the
+       existing 32-bit ARM port.
+     * The port provides initial support for the Cortex-A53 and the
+       Cortex-A57 processors with the command line options
+       -mcpu=cortex-a53 and -mcpu=cortex-a57.
+     * As of GCC 4.8.4 a workaround for the ARM Cortex-A53 erratum 835769
+       has been added and can be enabled by giving the
+       -mfix-cortex-a53-835769 option. Alternatively it can be enabled by
+       default by configuring GCC with the --enable-fix-cortex-a53-835769
+       option.
+
+  ARM
+
+     * Initial support has been added for the AArch32 extensions defined
+       in the ARMv8 architecture.
+     * Code generation improvements for the Cortex-A7 and Cortex-A15 CPUs.
+     * A new option, -mcpu=marvell-pj4, has been added to generate code
+       for the Marvell PJ4 processor.
+     * The compiler can now automatically generate the VFMA, VFMS, REVSH
+       and REV16 instructions.
+     * A new vectorizer cost model for Advanced SIMD configurations to
+       improve the auto-vectorization strategies used.
+     * The scheduler now takes into account the number of live registers
+       to reduce the amount of spilling that can occur. This should
+       improve code performance in large functions. The limit can be
+       removed by using the option -fno-sched-pressure.
+     * Improvements have been made to the Marvell iWMMX code generation
+       and support for the iWMMX2 SIMD unit has been added. The option
+       -mcpu=iwmmxt2 can be used to enable code generation for the latter.
+     * A number of code generation improvements for Thumb2 to reduce code
+       size when compiling for the M-profile processors.
+     * The RTEMS (arm-rtems) port has been updated to use the EABI.
+     * Code generation support for the old FPA and Maverick floating-point
+       architectures has been removed. Ports that previously relied on
+       these features have also been removed. This includes the targets:
+          + arm*-*-linux-gnu (use arm*-*-linux-gnueabi)
+          + arm*-*-elf (use arm*-*-eabi)
+          + arm*-*-uclinux* (use arm*-*-uclinux*eabi)
+          + arm*-*-ecos-elf (no alternative)
+          + arm*-*-freebsd (no alternative)
+          + arm*-wince-pe* (no alternative).
+
+  AVR
+
+     * Support for the "Embedded C" fixed-point has been added. For
+       details, see the [28]GCC wiki and the [29]user manual. The support
+       is not complete.
+     * A new print modifier %r for register operands in inline assembler
+       is supported. It will print the raw register number without the
+       register prefix 'r':
+    /* Return the most significant byte of 'val', a 64-bit value.  */
+
+    unsigned char msb (long long val)
+    {
+      unsigned char c;
+      __asm__ ("mov %0, %r1+7" : "=r" (c) : "r" (val));
+      return c;
+    }
+       The inline assembler in this example will generate code like
+    mov r24, 8+7
+       provided c is allocated to R24 and val is allocated to R8…R15. This
+       works because the GNU assembler accepts plain register numbers
+       without register prefix.
+     * Static initializers with 3-byte symbols are supported now:
+    extern const __memx char foo;
+    const __memx void *pfoo = &foo;
+       This requires at least Binutils 2.23.
+
+  IA-32/x86-64
+
+     * Allow -mpreferred-stack-boundary=3 for the x86-64 architecture with
+       SSE extensions disabled. Since the x86-64 ABI requires 16 byte
+       stack alignment, this is ABI incompatible and intended to be used
+       in controlled environments where stack space is an important
+       limitation. This option will lead to wrong code when functions
+       compiled with 16 byte stack alignment (such as functions from a
+       standard library) are called with misaligned stack. In this case,
+       SSE instructions may lead to misaligned memory access traps. In
+       addition, variable arguments will be handled incorrectly for 16
+       byte aligned objects (including x87 long double and __int128),
+       leading to wrong results. You must build all modules with
+       -mpreferred-stack-boundary=3, including any libraries. This
+       includes the system libraries and startup modules.
+     * Support for the new Intel processor codename Broadwell with RDSEED,
+       ADCX, ADOX, PREFETCHW is available through -madx, -mprfchw,
+       -mrdseed command-line options.
+     * Support for the Intel RTM and HLE intrinsics, built-in functions
+       and code generation is available via -mrtm and -mhle.
+     * Support for the Intel FXSR, XSAVE and XSAVEOPT instruction sets.
+       Intrinsics and built-in functions are available via -mfxsr, -mxsave
+       and -mxsaveopt respectively.
+     * New -maddress-mode=[short|long] options for x32.
+       -maddress-mode=short overrides default 64-bit addresses to 32-bit
+       by emitting the 0x67 address-size override prefix. This is the
+       default address mode for x32.
+     * New built-in functions to detect run-time CPU type and ISA:
+          + A built-in function __builtin_cpu_is has been added to detect
+            if the run-time CPU is of a particular type. It returns a
+            positive integer on a match and zero otherwise. It accepts one
+            string literal argument, the CPU name. For example,
+            __builtin_cpu_is("westmere") returns a positive integer if the
+            run-time CPU is an Intel Core i7 Westmere processor. Please
+            refer to the [30]user manual for the list of valid CPU names
+            recognized.
+          + A built-in function __builtin_cpu_supports has been added to
+            detect if the run-time CPU supports a particular ISA feature.
+            It returns a positive integer on a match and zero otherwise.
+            It accepts one string literal argument, the ISA feature. For
+            example, __builtin_cpu_supports("ssse3") returns a positive
+            integer if the run-time CPU supports SSSE3 instructions.
+            Please refer to the [31]user manual for the list of valid ISA
+            names recognized.
+       Caveat: If these built-in functions are called before any static
+       constructors are invoked, like during IFUNC initialization, then
+       the CPU detection initialization must be explicitly run using this
+       newly provided built-in function, __builtin_cpu_init. The
+       initialization needs to be done only once. For example, this is how
+       the invocation would look like inside an IFUNC initializer:
+    static void (*some_ifunc_resolver(void))(void)
+    {
+      __builtin_cpu_init();
+      if (__builtin_cpu_is("amdfam10h") ...
+      if (__builtin_cpu_supports("popcnt") ...
+    }
+
+     * Function Multiversioning Support with G++:
+       It is now possible to create multiple function versions each
+       targeting a specific processor and/or ISA. Function versions have
+       the same signature but different target attributes. For example,
+       here is a program with function versions:
+    __attribute__ ((target ("default")))
+    int foo(void)
+    {
+      return 1;
+    }
+
+    __attribute__ ((target ("sse4.2")))
+    int foo(void)
+    {
+      return 2;
+    }
+
+    int main (void)
+    {
+      int (*p) = &foo;
+      assert ((*p)() == foo());
+      return 0;
+    }
+
+       Please refer to this [32]wiki for more information.
+     * The x86 back end has been improved to allow option -fschedule-insns
+       to work reliably. This option can be used to schedule instructions
+       better and leads to improved performace in certain cases.
+     * Windows MinGW-w64 targets (*-w64-mingw*) require at least r5437
+       from the Mingw-w64 trunk.
+     * Support for new AMD family 15h processors (Steamroller core) is now
+       available through the -march=bdver3 and -mtune=bdver3 options.
+     * Support for new AMD family 16h processors (Jaguar core) is now
+       available through the -march=btver2 and -mtune=btver2 options.
+
+  FRV
+
+     * This target now supports the -fstack-usage command-line option.
+
+  MIPS
+
+     * GCC can now generate code specifically for the R4700, Broadcom XLP
+       and MIPS 34kn processors. The associated -march options are
+       -march=r4700, -march=xlp and -march=34kn respectively.
+     * GCC now generates better DSP code for MIPS 74k cores thanks to
+       further scheduling optimizations.
+     * The MIPS port now supports the -fstack-check option.
+     * GCC now passes the -mmcu and -mno-mcu options to the assembler.
+     * Previous versions of GCC would silently accept -fpic and -fPIC for
+       -mno-abicalls targets like mips*-elf. This combination was not
+       intended or supported, and did not generate position-independent
+       code. GCC 4.8 now reports an error when this combination is used.
+
+  PowerPC / PowerPC64 / RS6000
+
+     * SVR4 configurations (GNU/Linux, FreeBSD, NetBSD) no longer save,
+       restore or update the VRSAVE register by default. The respective
+       operating systems manage the VRSAVE register directly.
+     * Large TOC support has been added for AIX through the command line
+       option -mcmodel=large.
+     * Native Thread-Local Storage support has been added for AIX.
+     * VMX (Altivec) and VSX instruction sets now are enabled implicitly
+       when targetting processors that support those hardware features on
+       AIX 6.1 and above.
+
+  RX
+
+     * This target will now issue a warning message whenever multiple fast
+       interrupt handlers are found in the same compilation unit. This
+       feature can be turned off by the new
+       -mno-warn-multiple-fast-interrupts command-line option.
+
+  S/390, System z
+
+     * Support for the IBM zEnterprise zEC12 processor has been added.
+       When using the -march=zEC12 option, the compiler will generate code
+       making use of the following new instructions:
+          + load and trap instructions
+          + 2 new compare and trap instructions
+          + rotate and insert selected bits - without CC clobber
+       The -mtune=zEC12 option enables zEC12 specific instruction
+       scheduling without making use of new instructions.
+     * Register pressure sensitive instruction scheduling is enabled by
+       default.
+     * The ifunc function attribute is enabled by default.
+     * memcpy and memcmp invokations on big memory chunks or with run time
+       lengths are not generated inline anymore when tuning for z10 or
+       higher. The purpose is to make use of the IFUNC optimized versions
+       in Glibc.
+
+  SH
+
+     * The default alignment settings have been reduced to be less
+       aggressive. This results in more compact code for optimization
+       levels other than -Os.
+     * Improved support for the __atomic built-in functions:
+          + A new option -matomic-model=model selects the model for the
+            generated atomic sequences. The following models are
+            supported:
+
+              soft-gusa
+                      Software gUSA sequences (SH3* and SH4* only). On
+                      SH4A targets this will now also partially utilize
+                      the movco.l and movli.l instructions. This is the
+                      default when the target is sh3*-*-linux* or
+                      sh4*-*-linux*.
+
+              hard-llcs
+                      Hardware movco.l / movli.l sequences (SH4A only).
+
+              soft-tcb
+                      Software thread control block sequences.
+
+              soft-imask
+                      Software interrupt flipping sequences (privileged
+                      mode only). This is the default when the target is
+                      sh1*-*-linux* or sh2*-*-linux*.
+
+              none
+                      Generates function calls to the respective __atomic
+                      built-in functions. This is the default for SH64
+                      targets or when the target is not sh*-*-linux*.
+
+          + The option -msoft-atomic has been deprecated. It is now an
+            alias for -matomic-model=soft-gusa.
+          + A new option -mtas makes the compiler generate the tas.b
+            instruction for the __atomic_test_and_set built-in function
+            regardless of the selected atomic model.
+          + The __sync functions in libgcc now reflect the selected atomic
+            model when building the toolchain.
+     * Added support for the mov.b and mov.w instructions with
+       displacement addressing.
+     * Added support for the SH2A instructions movu.b and movu.w.
+     * Various improvements to code generated for integer arithmetic.
+     * Improvements to conditional branches and code that involves the T
+       bit. A new option -mzdcbranch tells the compiler to favor
+       zero-displacement branches. This is enabled by default for SH4*
+       targets.
+     * The pref instruction will now be emitted by the __builtin_prefetch
+       built-in function for SH3* targets.
+     * The fmac instruction will now be emitted by the fmaf standard
+       function and the __builtin_fmaf built-in function.
+     * The -mfused-madd option has been deprecated in favor of the
+       machine-independent -ffp-contract option. Notice that the fmac
+       instruction will now be generated by default for expressions like a
+       * b + c. This is due to the compiler default setting
+       -ffp-contract=fast.
+     * Added new options -mfsrra and -mfsca to allow the compiler using
+       the fsrra and fsca instructions on targets other than SH4A (where
+       they are already enabled by default).
+     * Added support for the __builtin_bswap32 built-in function. It is
+       now expanded as a sequence of swap.b and swap.w instructions
+       instead of a library function call.
+     * The behavior of the -mieee option has been fixed and the negative
+       form -mno-ieee has been added to control the IEEE conformance of
+       floating point comparisons. By default -mieee is now enabled and
+       the option -ffinite-math-only implicitly sets -mno-ieee.
+     * Added support for the built-in functions __builtin_thread_pointer
+       and __builtin_set_thread_pointer. This assumes that GBR is used to
+       hold the thread pointer of the current thread. Memory loads and
+       stores relative to the address returned by __builtin_thread_pointer
+       will now also utilize GBR based displacement address modes.
+     * The -mdiv= option for targets other than SHmedia has been fixed and
+       documented.
+
+  SPARC
+
+     * Added optimized instruction scheduling for Niagara4.
+
+  TILE-Gx
+
+     * Added support for the -mcmodel=MODEL command-line option. The
+       models supported are small and large.
+
+  V850
+
+     * This target now supports the E3V5 architecture via the use of the
+       new -mv850e3v5 command-line option. It also has experimental
+       support for the e3v5 LOOP instruction which can be enabled via the
+       new -mloop command-line option.
+
+  XStormy16
+
+     * This target now supports the -fstack-usage command-line option.
+
+Operating Systems
+
+  Windows (Cygwin)
+
+     * Executables are now linked against shared libgcc by default. The
+       previous default was to link statically, which can still be done by
+       explicitly specifying -static or static-libgcc on the command line.
+       However it is strongly advised against, as it will cause problems
+       for any application that makes use of DLLs compiled by GCC. It
+       should be alright for a monolithic stand-alone application that
+       only links against the Windows DLLs, but offers little or no
+       benefit.
+
+GCC 4.8.1
+
+   This is the [33]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.8.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   The C++11 <chrono> std::chrono::system_clock and
+   std::chrono::steady_clock classes have changed ABI in GCC 4.8.1, they
+   both are now separate (never typedefs of each other), both use
+   std::chrono::nanoseconds resolution, on most GNU/Linux configurations
+   std::chrono::steady_clock is now finally monotonic, and both classes
+   are mangled differently than in the previous GCC releases.
+   std::chrono::system_clock::now() with std::chrono::microseconds resp.
+   std::chrono::seconds resolution is still exported for backwards
+   compatibility with default configured libstdc++. Note that libstdc++
+   configured with --enable-libstdcxx-time= used to be ABI incompatible
+   with default configured libstdc++ for those two classes and no ABI
+   compatibility can be offered for those configurations, so any C++11
+   code that uses those classes and has been compiled and linked against
+   libstdc++ configured with the non-default --enable-libstdcxx-time=
+   configuration option needs to be recompiled.
+
+GCC 4.8.2
+
+   This is the [34]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.8.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.8.3
+
+   This is the [35]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.8.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   Support for the new powerpc64le-linux platform has been added. It
+   defaults to generating code that conforms to the ELFV2 ABI.
+
+GCC 4.8.4
+
+   This is the [36]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.8.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [37]GCC manuals. If that fails, the
+    [38]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [39]gcc@gcc.gnu.org. All of [40]our lists have public
+    archives.
+
+   Copyright (C) [41]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [42]maintained by the GCC team. Last modified
+   2015-04-20[43].
+
+References
+
+   1. https://gcc.gnu.org/wiki/cxx-conversion
+   2. ftp://gcc.gnu.org/pub/gcc/infrastructure/
+   3. http://www.nongnu.org/avr-libc/
+   4. https://gcc.gnu.org/PR54461
+   5. https://gcc.gnu.org/gcc-4.8/porting_to.html
+   6. https://code.google.com/p/address-sanitizer/
+   7. https://code.google.com/p/data-race-test/wiki/ThreadSanitizer
+   8. https://lkml.org/lkml/2006/11/28/239
+   9. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
+  10. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
+  11. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
+  12. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3276.pdf
+  13. http://gcc.gnu.org/gcc-4.8/cxx0x_status.html
+  14. http://www.open-std.org/JTC1/SC22/WG21/docs/papers/2012/n3386.html
+  15. http://gcc.gnu.org/projects/cxx1y.html
+  16. https://gcc.gnu.org/onlinedocs/gcc-4.8.4/libstdc++/manual/manual/status.html#status.iso.2011
+  17. https://gcc.gnu.org/onlinedocs/gfortran/BACKTRACE.html
+  18. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
+  19. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
+  20. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
+  21. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
+  22. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html
+  23. https://gcc.gnu.org/onlinedocs/gfortran/TMPDIR.html
+  24. https://gcc.gnu.org/wiki/Fortran2003Status
+  25. https://gcc.gnu.org/wiki/TS29113Status
+  26. https://gcc.gnu.org/viewcvs/trunk/libgfortran/libgfortran.h?content-type=text/plain&view=co
+  27. http://chasm-interop.sourceforge.net/
+  28. https://gcc.gnu.org/wiki/avr-gcc#Fixed-Point_Support
+  29. https://gcc.gnu.org/onlinedocs/gcc/Fixed-Point.html
+  30. https://gcc.gnu.org/onlinedocs/gcc/X86-Built-in-Functions.html#X86-Built-in-Functions
+  31. https://gcc.gnu.org/onlinedocs/gcc/X86-Built-in-Functions.html#X86-Built-in-Functions
+  32. https://gcc.gnu.org/wiki/FunctionMultiVersioning
+  33. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.8.1
+  34. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.8.2
+  35. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.8.3
+  36. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.8.4
+  37. https://gcc.gnu.org/onlinedocs/
+  38. mailto:gcc-help@gcc.gnu.org
+  39. mailto:gcc@gcc.gnu.org
+  40. https://gcc.gnu.org/lists.html
+  41. http://www.fsf.org/
+  42. https://gcc.gnu.org/about.html
+  43. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.7/index.html
+                             GCC 4.7 Release Series
+
+   June 12, 2014
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.7.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.7.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.7.4
+          June 12, 2014 ([2]changes, [3]documentation)
+
+   GCC 4.7.3
+          April 11, 2013 ([4]changes, [5]documentation)
+
+   GCC 4.7.2
+          September 20, 2012 ([6]changes, [7]documentation)
+
+   GCC 4.7.1
+          June 14, 2012 ([8]changes, [9]documentation)
+
+   GCC 4.7.0
+          March 22, 2012 ([10]changes, [11]documentation)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [12]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [13]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [14]GCC
+   project web site or contact the [15]GCC development mailing list.
+
+   To obtain GCC please use [16]our mirror sites or [17]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [18]GCC manuals. If that fails, the
+    [19]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [20]gcc@gcc.gnu.org. All of [21]our lists have public
+    archives.
+
+   Copyright (C) [22]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [23]maintained by the GCC team. Last modified
+   2014-06-12[24].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.7/changes.html
+   3. https://gcc.gnu.org/onlinedocs/4.7.4/
+   4. http://gcc.gnu.org/gcc-4.7/changes.html
+   5. https://gcc.gnu.org/onlinedocs/4.7.3/
+   6. http://gcc.gnu.org/gcc-4.7/changes.html
+   7. https://gcc.gnu.org/onlinedocs/4.7.2/
+   8. http://gcc.gnu.org/gcc-4.7/changes.html
+   9. https://gcc.gnu.org/onlinedocs/4.7.1/
+  10. http://gcc.gnu.org/gcc-4.7/changes.html
+  11. https://gcc.gnu.org/onlinedocs/4.7.0/
+  12. http://gcc.gnu.org/gcc-4.7/buildstat.html
+  13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  14. http://gcc.gnu.org/index.html
+  15. mailto:gcc@gcc.gnu.org
+  16. http://gcc.gnu.org/mirrors.html
+  17. http://gcc.gnu.org/svn.html
+  18. https://gcc.gnu.org/onlinedocs/
+  19. mailto:gcc-help@gcc.gnu.org
+  20. mailto:gcc@gcc.gnu.org
+  21. https://gcc.gnu.org/lists.html
+  22. http://www.fsf.org/
+  23. https://gcc.gnu.org/about.html
+  24. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.7/changes.html
+                             GCC 4.7 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * The -fconserve-space flag has been deprecated. The flag had no
+       effect for most targets: only targets without a global .bss section
+       and without support for switchable sections. Furthermore, the flag
+       only had an effect for G++, where it could result in wrong
+       semantics (please refer to the GCC manual for further details). The
+       flag will be removed in GCC 4.8
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.7.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       All GCC ports for the following processor architectures have been
+       declared obsolete:
+          + picoChip (picochip-*)
+       The following ports for individual systems on particular
+       architectures have been obsoleted:
+          + IRIX 6.5 (mips-sgi-irix6.5)
+          + MIPS OpenBSD (mips*-*-openbsd*)
+          + Solaris 8 (*-*-solaris2.8). Details can be found in the
+            [1]announcement.
+          + Tru64 UNIX V5.1 (alpha*-dec-osf5.1*)
+     * On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A,
+       ARMv7-R, or ARMv7-M, the new option -munaligned-access is active by
+       default, which for some sources generates code that accesses memory
+       on unaligned addresses. This requires the kernel of those systems
+       to enable such accesses (controlled by CP15 register c1, refer to
+       ARM documentation). Alternatively, or for compatibility with
+       kernels where unaligned accesses are not supported, all code has to
+       be compiled with -mno-unaligned-access. Upstream Linux kernel
+       releases have automatically and unconditionally supported unaligned
+       accesses as emitted by GCC due to this option being active since
+       version 2.6.28.
+     * Support on ARM for the legacy floating-point accelerator (FPA) and
+       the mixed-endian floating-point format that it used has been
+       obsoleted. The ports that still use this format have been obsoleted
+       as well. Many legacy ARM ports already provide an alternative that
+       uses the VFP floating-point format. The obsolete ports will be
+       deleted in the next release.
+       The obsolete ports with alternatives are:
+          + arm*-*-rtems (use arm*-*-rtemseabi)
+          + arm*-*-linux-gnu (use arm*-*-linux-gnueabi)
+          + arm*-*-elf (use arm*-*-eabi)
+          + arm*-*-uclinux* (use arm*-*-uclinux*eabi)
+       Note, however, that these alternatives are not binary compatible
+       with their legacy counterparts (although some can support running
+       legacy applications).
+       The obsolete ports that currently lack a modern alternative are:
+          + arm*-*-ecos-elf
+          + arm*-*-freebsd
+          + arm*-wince-pe*
+       New ports that support more recent versions of the architecture are
+       welcome.
+     * Support for the Maverick co-processor on ARM has been obsoleted.
+       Code to support it will be deleted in the next release.
+     * Support has been removed for Unix International threads on Solaris
+       2, so the --enable-threads=solaris configure option and the
+       -threads compiler option don't work any longer.
+     * Support has been removed for the Solaris BSD Compatibility Package,
+       which lives in /usr/ucbinclude and /usr/ucblib. It has been removed
+       from Solaris 11, and was only intended as a migration aid from
+       SunOS 4 to SunOS 5. The -compat-bsd compiler option is not
+       recognized any longer.
+     * The AVR port's libgcc has been improved and its multilib structure
+       has been enhanced. As a result, all objects contributing to an
+       application must either be compiled with GCC versions up to 4.6.x
+       or with GCC versions 4.7.1 or later. If the compiler is used with
+       AVR Libc, you need a version that supports the new layout, i.e.
+       implements [2]#35407.
+     * The AVR port's -mshort-calls command-line option has been
+       deprecated. It will be removed in the GCC 4.8 release. See -mrelax
+       for a replacement.
+     * The AVR port only references startup code that clears .bss and the
+       common section resp. initializes the .data and .rodata section
+       provided respective sections (or subsections thereof) are not
+       empty, see [3]PR18145. Applications that put all static storage
+       objects into non-standard sections and / or define all static
+       storage objects in assembler modules, must reference __do_clear_bss
+       resp. __do_copy_data by hand or undefine the symbol(s) by means of
+       -Wl,-u,__do_clear_bss resp. -Wl,-u,__do_copy_data.
+     * The ARM port's -mwords-little-endian option has been deprecated. It
+       will be removed in a future release.
+     * Support has been removed for the NetWare x86 configuration
+       obsoleted in GCC 4.6.
+     * It is no longer possible to use the "l" constraint in MIPS16 asm
+       statements.
+     * GCC versions 4.7.0 and 4.7.1 had changes to the C++ standard
+       library which affected the ABI in C++11 mode: a data member was
+       added to std::list changing its size and altering the definitions
+       of some member functions, and std::pair's move constructor was
+       non-trivial which altered the calling convention for functions with
+       std::pair arguments or return types. The ABI incompatibilities have
+       been fixed for GCC version 4.7.2 but as a result C++11 code
+       compiled with GCC 4.7.0 or 4.7.1 may be incompatible with C++11
+       code compiled with different GCC versions and with C++98/C++03 code
+       compiled with any version.
+     * On ARM, a bug has been fixed in GCC's implementation of the AAPCS
+       rules for the layout of vectors that could lead to wrong code being
+       generated. Vectors larger than 8 bytes in size are now by default
+       aligned to an 8-byte boundary. This is an ABI change: code that
+       makes explicit use of vector types may be incompatible with binary
+       objects built with older versions of GCC. Auto-vectorized code is
+       not affected by this change. (This change affects GCC versions
+       4.7.2 and later.)
+     * More information on porting to GCC 4.7 from previous versions of
+       GCC can be found in the [4]porting guide for this release.
+
+General Optimizer Improvements
+
+     * Support for a new parameter --param case-values-threshold=n was
+       added to allow users to control the cutoff between doing switch
+       statements as a series of if statements and using a jump table.
+     * Link-time optimization (LTO) improvements:
+          + Improved scalability and reduced memory usage. Link time
+            optimization of Firefox now requires 3GB of RAM on a 64-bit
+            system, while over 8GB was needed previously. Linking time has
+            been improved, too. The serial stage of linking Firefox has
+            been sped up by about a factor of 10.
+          + Reduced size of object files and temporary storage used during
+            linking.
+          + Streaming performance (both outbound and inbound) has been
+            improved.
+          + ld -r is now supported with LTO.
+          + Several bug fixes, especially in symbol table handling and
+            merging.
+     * Interprocedural optimization improvements:
+          + Heuristics now take into account that after inlining code will
+            be optimized out because of known values (or properties) of
+            function parameters. For example:
+void foo(int a)
+{
+  if (a > 10)
+    ... huge code ...
+}
+void bar (void)
+{
+  foo (0);
+}
+
+            The call of foo will be inlined into bar even when optimizing
+            for code size. Constructs based on __builtin_constant_p are
+            now understood by the inliner and code size estimates are
+            evaluated a lot more realistically.
+          + The representation of C++ virtual thunks and aliases (both
+            implicit and defined via the alias attribute) has been
+            re-engineered. Aliases no longer pose optimization barriers
+            and calls to an alias can be inlined and otherwise optimized.
+          + The inter-procedural constant propagation pass has been
+            rewritten. It now performs generic function specialization.
+            For example when compiling the following:
+void foo(bool flag)
+{
+  if (flag)
+    ... do something ...
+  else
+    ... do something else ...
+}
+void bar (void)
+{
+  foo (false);
+  foo (true);
+  foo (false);
+  foo (true);
+  foo (false);
+  foo (true);
+}
+
+            GCC will now produce two copies of foo. One with flag being
+            true, while other with flag being false. This leads to
+            performance improvements previously possible only by inlining
+            all calls. Cloning causes a lot less code size growth.
+     * A string length optimization pass has been added. It attempts to
+       track string lengths and optimize various standard C string
+       functions like strlen, strchr, strcpy, strcat, stpcpy and their
+       _FORTIFY_SOURCE counterparts into faster alternatives. This pass is
+       enabled by default at -O2 or above, unless optimizing for size, and
+       can be disabled by the -fno-optimize-strlen option. The pass can
+       e.g. optimize
+char *bar (const char *a)
+{
+  size_t l = strlen (a) + 2;
+  char *p = malloc (l); if (p == NULL) return p;
+  strcpy (p, a); strcat (p, "/"); return p;
+}
+
+       into:
+char *bar (const char *a)
+{
+  size_t tmp = strlen (a);
+  char *p = malloc (tmp + 2); if (p == NULL) return p;
+  memcpy (p, a, tmp); memcpy (p + tmp, "/", 2); return p;
+}
+
+       or for hosted compilations where stpcpy is available in the runtime
+       and headers provide its prototype, e.g.
+void foo (char *a, const char *b, const char *c, const char *d)
+{
+  strcpy (a, b); strcat (a, c); strcat (a, d);
+}
+
+       can be optimized into:
+void foo (char *a, const char *b, const char *c, const char *d)
+{
+  strcpy (stpcpy (stpcpy (a, b), c), d);
+}
+
+New Languages and Language specific improvements
+
+     * Version 3.1 of the [5]OpenMP specification is now supported for the
+       C, C++, and Fortran compilers.
+
+  Ada
+
+     * The command-line option -feliminate-unused-debug-types has been
+       re-enabled by default, as it is for the other languages, leading to
+       a reduction in debug info size of 12.5% and more for relevant
+       cases, as well as to a small compilation speedup.
+
+  C family
+
+     * A new built-in, __builtin_assume_aligned, has been added, through
+       which the compiler can be hinted about pointer alignment and can
+       use it to improve generated code.
+     * A new warning option -Wunused-local-typedefs was added for C, C++,
+       Objective-C and Objective-C++. This warning diagnoses typedefs
+       locally defined in a function, and otherwise not used.
+     * A new experimental command-line option -ftrack-macro-expansion was
+       added for C, C++, Objective-C, Objective-C++ and Fortran. It allows
+       the compiler to emit diagnostic about the current macro expansion
+       stack when a compilation error occurs in a macro expansion.
+     * Experimental support for transactional memory has been added. It
+       includes support in the compiler, as well as a supporting runtime
+       library called libitm. To compile code with transactional memory
+       constructs, use the -fgnu-tm option.
+       Support is currently available for Alpha, ARM, PowerPC, SH, SPARC,
+       and 32-bit/64-bit x86 platforms.
+       For more details on transactional memory see [6]the GCC WiKi.
+     * Support for atomic operations specifying the C++11/C11 memory model
+       has been added. These new __atomic routines replace the existing
+       __sync built-in routines.
+       Atomic support is also available for memory blocks. Lock-free
+       instructions will be used if a memory block is the same size and
+       alignment as a supported integer type. Atomic operations which do
+       not have lock-free support are left as function calls. A set of
+       library functions is available on the GCC atomic wiki in the
+       "External Atomics Library" section.
+       For more details on the memory models and features, see the
+       [7]atomic wiki.
+     * When a binary operation is performed on vector types and one of the
+       operands is a uniform vector, it is possible to replace the vector
+       with the generating element. For example:
+typedef int v4si __attribute__ ((vector_size (16)));
+v4si res, a = {1,2,3,4};
+int x;
+
+res = 2 + a;  /* means {2,2,2,2} + a  */
+res = a - x;  /* means a - {x,x,x,x}  */
+
+  C
+
+     * There is support for some more features from the C11 revision of
+       the ISO C standard. GCC now accepts the options -std=c11 and
+       -std=gnu11, in addition to the previous -std=c1x and -std=gnu1x.
+          + Unicode strings (previously supported only with options such
+            as -std=gnu11, now supported with -std=c11), and the
+            predefined macros __STDC_UTF_16__ and __STDC_UTF_32__.
+          + Nonreturning functions (_Noreturn and <stdnoreturn.h>).
+          + Alignment support (_Alignas, _Alignof, max_align_t,
+            <stdalign.h>).
+          + A built-in function __builtin_complex is provided to support C
+            library implementation of the CMPLX family of macros.
+
+  C++
+
+     * G++ now accepts the -std=c++11, -std=gnu++11, and -Wc++11-compat
+       options, which are equivalent to -std=c++0x, -std=gnu++0x, and
+       -Wc++0x-compat, respectively.
+     * G++ now implements [8]C++11 extended friend syntax:
+
+template<class W>
+class Q
+{
+  static const int I = 2;
+public:
+  friend W;
+};
+
+struct B
+{
+  int ar[Q<B>::I];
+};
+
+     * Thanks to Ville Voutilainen, G++ now implements [9]C++11 explicit
+       override control.
+
+struct B {
+  virtual void f() const final;
+  virtual void f(int);
+};
+
+struct D : B {
+  void f() const;            // error: D::f attempts to override final B::f
+  void f(long) override;     // error: doesn't override anything
+  void f(int) override;      // ok
+};
+
+struct E final { };
+struct F: E { }; // error: deriving from final class
+
+     * G++ now implements [10]C++11 non-static data member initializers.
+
+struct A {
+  int i = 42;
+} a; // initializes a.i to 42
+
+     * Thanks to Ed Smith-Rowland, G++ now implements [11]C++11
+       user-defined literals.
+
+// Not actually a good approximation.  :)
+constexpr long double operator"" _degrees (long double d) { return d * 0.0175; }
+long double pi = 180.0_degrees;
+
+     * G++ now implements [12]C++11 alias-declarations.
+
+template <class T> using Ptr = T*;
+Ptr<int> ip;  // decltype(ip) is int*
+
+     * Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements
+       [13]C++11 delegating constructors.
+
+struct A {
+  A(int);
+  A(): A(42) { } // delegate to the A(int) constructor
+};
+
+     * G++ now fully implements C++11 atomic classes rather than just
+       integer derived classes.
+
+class POD {
+  int a;
+  int b;
+};
+std::atomic<POD> my_atomic_POD;
+
+     * G++ now sets the predefined macro __cplusplus to the correct value,
+       199711L for C++98/03, and 201103L for C++11.
+     * G++ now correctly implements the two-phase lookup rules such that
+       an unqualified name used in a template must have an appropriate
+       declaration found either in scope at the point of definition of the
+       template or by argument-dependent lookup at the point of
+       instantiation. As a result, code that relies on a second
+       unqualified lookup at the point of instantiation to find functions
+       declared after the template or in dependent bases will be rejected.
+       The compiler will suggest ways to fix affected code, and using the
+       -fpermissive compiler flag will allow the code to compile with a
+       warning.
+
+template <class T>
+void f() { g(T()); } // error, g(int) not found by argument-dependent lookup
+void g(int) { } // fix by moving this declaration before the declaration of f
+
+template <class T>
+struct A: T {
+  // error, B::g(B) not found by argument-dependent lookup
+  void f() { g(T()); } // fix by using this->g or A::g
+};
+
+struct B { void g(B); };
+
+int main()
+{
+  f<int>();
+  A<B>().f();
+}
+
+     * G++ now properly re-uses stack space allocated for temporary
+       objects when their lifetime ends, which can significantly lower
+       stack consumption for some C++ functions. As a result of this, some
+       code with undefined behavior will now break:
+
+const int &f(const int &i) { return i; }
+....
+const int &x = f(1);
+const int &y = f(2);
+
+       Here, x refers to the temporary allocated to hold the 1 argument,
+       which only lives until the end of the initialization; it
+       immediately becomes a dangling reference. So the next statement
+       re-uses the stack slot to hold the 2 argument, and users of x get
+       that value instead.
+       Note that this should not cause any change of behavior for
+       temporaries of types with non-trivial destructors, as they are
+       already destroyed at end of full-expression; the change is that now
+       the storage is released as well.
+     * A new command-line option -Wdelete-non-virtual-dtor has been added
+       to warn when delete is used to destroy an instance of a class which
+       has virtual functions and non-virtual destructor. It is unsafe to
+       delete an instance of a derived class through a pointer to a base
+       class if the base class does not have a virtual destructor. This
+       warning is enabled by -Wall.
+     * A new command-line option -Wzero-as-null-pointer-constant has been
+       added to warn when a literal '0' is used as null pointer constant.
+       It can be useful to facilitate the conversion to nullptr in C++11.
+     * As per C++98, access-declarations are now deprecated by G++.
+       Using-declarations are to be used instead. Furthermore, some
+       efforts have been made to improve the support of class scope
+       using-declarations. In particular, using-declarations referring to
+       a dependent type now work as expected ([14]bug c++/14258).
+     * The ELF symbol visibility of a template instantiation is now
+       properly constrained by the visibility of its template arguments
+       ([15]bug c++/35688).
+
+    Runtime Library (libstdc++)
+
+     * [16]Improved experimental support for the new ISO C++ standard,
+       C++11, including:
+          + using noexcept in most of the library;
+          + implementations of pointer_traits, allocator_traits and
+            scoped_allocator_adaptor;
+          + uses-allocator construction for tuple;
+          + vector meets the allocator-aware container requirements;
+          + replacing monotonic_clock with steady_clock;
+          + enabling the thread support library on most POSIX targets;
+          + many small improvements to conform to the FDIS.
+     * Added --enable-clocale=newlib configure option.
+     * Debug Mode iterators for unordered associative containers.
+     * Avoid polluting the global namespace and do not include <unistd.h>.
+
+  Fortran
+
+     * The compile flag [17]-fstack-arrays has been added, which causes
+       all local arrays to be put on stack memory. For some programs this
+       will improve the performance significantly. If your program uses
+       very large local arrays, it is possible that you will have to
+       extend your runtime limits for stack memory.
+     * The [18]-Ofast flag now also implies [19]-fno-protect-parens and
+       [20]-fstack-arrays.
+     * Front-end optimizations can now be selected by the
+       [21]-ffrontend-optimize option and deselected by the
+       -fno-frontend-optimize option.
+     * When front-end optimization removes a function call,
+       [22]-Wfunction-elimination warns about that.
+     * When performing front-end-optimization, the
+       [23]-faggressive-function-elimination option allows the removal of
+       duplicate function calls even for impure functions.
+     * The flag [24]-Wreal-q-constant has been added, which warns if
+       floating-point literals have been specified using q (such as
+       1.0q0); the q marker is now supported as a vendor extension to
+       denote quad precision (REAL(16) or, if not available, REAL(10)).
+       Consider using a kind parameter (such as in 1.0_qp) instead, which
+       can be obtained via [25]SELECTED_REAL_KIND.
+     * The GFORTRAN_USE_STDERR environment variable has been removed. GNU
+       Fortran now always prints error messages to standard error. If you
+       wish to redirect standard error, please consult the manual for your
+       OS, shell, batch environment etc. as appropriate.
+     * The -fdump-core option and GFORTRAN_ERROR_DUMPCORE environment
+       variable have been removed. When encountering a serious error,
+       gfortran will now always abort the program. Whether a core dump is
+       generated depends on the user environment settings; see the ulimit
+       -c setting for POSIX shells, limit coredumpsize for C shells, and
+       the [26]WER user-mode dumps settings on Windows.
+     * The [27]-fbacktrace option is now enabled by default. When
+       encountering a fatal error, gfortran will attempt to print a
+       backtrace to standard error before aborting. It can be disabled
+       with -fno-backtrace. Note: On POSIX targets with the addr2line
+       utility from GNU binutils, GNU Fortran can print a backtrace with
+       function name, file name, line number information in addition to
+       the addresses; otherwise only the addresses are printed.
+     * [28]Fortran 2003:
+          + Generic interface names which have the same name as derived
+            types are now supported, which allows to write constructor
+            functions. Note that Fortran does not support static
+            constructor functions; only default initialization or an
+            explicit structure-constructor initialization are available.
+          + [29]Polymorphic (class) arrays are now supported.
+     * [30]Fortran 2008:
+          + Support for the DO CONCURRENT construct has been added, which
+            allows the user to specify that individual loop iterations
+            have no interdependencies.
+          + [31]Coarrays: Full single-image support except for polymorphic
+            coarrays. Additionally, preliminary support for multiple
+            images via an MPI-based [32]coarray communication library has
+            been added. Note: The library version is not yet usable as
+            remote coarray access is not yet possible.
+     * [33]TS 29113:
+          + New flag [34]-std=f2008ts permits programs that are expected
+            to conform to the Fortran 2008 standard and the draft
+            Technical Specification (TS) 29113 on Further Interoperability
+            of Fortran with C.
+          + The OPTIONAL attribute is now allowed for dummy arguments of
+            BIND(C) procedures.
+          + The RANK intrinsic has been added.
+          + The implementation of the ASYNCHRONOUS attribute in GCC is
+            compatible with the candidate draft of TS 29113 (since GCC
+            4.6).
+
+  Go
+
+     * GCC 4.7 implements the [35]Go 1 language standard. The library
+       support in 4.7.0 is not quite complete, due to release timing.
+       Release 4.7.1 includes complete support for Go 1. The Go library is
+       from the Go 1.0.1 release.
+     * Go has been tested on GNU/Linux and Solaris platforms. It may work
+       on other platforms as well.
+
+New Targets and Target Specific Improvements
+
+  ARM
+
+     * GCC now supports the Cortex-A7 processor implementing the v7-a
+       version of the architecture using the option -mcpu=cortex-a7.
+     * The default vector size in auto-vectorization for NEON is now 128
+       bits. If vectorization fails thusly, the vectorizer tries again
+       with 64-bit vectors.
+     * A new option -mvectorize-with-neon-double was added to allow users
+       to change the vector size to 64 bits.
+
+  AVR
+
+     * GCC now supports the XMEGA architecture. This requires GNU binutils
+       2.22 or later.
+     * Support for the [36]named address spaces __flash, __flash1, …,
+       __flash5 and __memx has been added. These address spaces locate
+       read-only data in flash memory and allow reading from flash memory
+       by means of ordinary C code, i.e. without the need of (inline)
+       assembler code:
+
+const __flash int values[] = { 42, 31 };
+
+int add_values (const __flash int *p, int i)
+{
+    return values[i] + *p;
+}
+
+     * Support has been added for the AVR-specific configure option
+       --with-avrlibc=yes in order to arrange for better integration of
+       [37]AVR-Libc. This configure option is supported in avr-gcc 4.7.2
+       and newer and will only take effect in non-RTEMS configurations. If
+       avr-gcc is configured for RTEMS, the option will be ignored which
+       is the same as specifying --with-avrlibc=no. See [38]PR54461 for
+       more technical details.
+     * Support for AVR-specific [39]built-in functions has been added.
+     * Support has been added for the signed and unsigned 24-bit scalar
+       integer types __int24 and __uint24.
+     * New command-line options -maccumulate-args, -mbranch-cost=cost and
+       -mstrict-X were added to allow better fine-tuning of code
+       optimization.
+     * The command option -fdata-sections now also takes affect on the
+       section names of variables with the progmem attribute.
+     * A new inline assembler print modifier %i to print a RAM address as
+       I/O address has been added:
+
+#include <avr/io.h> /* Port Definitions from AVR-LibC */
+
+void set_portb (uint8_t value)
+{
+    asm volatile ("out %i0, %1" :: "n" (&PORTB), "r" (value) : "memory");
+}
+
+       The offset between an I/O address and the RAM address for that I/O
+       location is device-specific. This offset is taken into account when
+       printing a RAM address with the %i modifier so that the address is
+       suitable to be used as operand in an I/O command. The address must
+       be a constant integer known at compile time.
+     * The inline assembler constraint "R" to represent integers in the
+       range −6 … 5 has been removed without replacement.
+     * Many optimizations to:
+          + 64-bit integer arithmetic
+          + Widening multiplication
+          + Integer division by a constant
+          + Avoid constant reloading in multi-byte instructions.
+          + Micro-optimizations for special instruction sequences.
+          + Generic built-in functions like __builtin_ffs*,
+            __builtin_clz*, etc.
+          + If-else decision trees generated by switch instructions
+          + Merging of data located in flash memory
+          + New libgcc variants for devices with 8-bit wide stack pointer
+          + …
+     * Better documentation:
+          + Handling of EIND and indirect jumps on devices with more than
+            128 KiB of program memory.
+          + Handling of the RAMPD, RAMPX, RAMPY and RAMPZ special function
+            registers.
+          + Function attributes OS_main and OS_task.
+          + AVR-specific built-in macros.
+
+  C6X
+
+     * Support has been added for the Texas Instruments C6X family of
+       processors.
+
+  CR16
+
+     * Support has been added for National Semiconductor's CR16
+       architecture.
+
+  Epiphany
+
+     * Support has been added for Adapteva's Epiphany architecture.
+
+  IA-32/x86-64
+
+     * Support for Intel AVX2 intrinsics, built-in functions and code
+       generation is available via -mavx2.
+     * Support for Intel BMI2 intrinsics, built-in functions and code
+       generation is available via -mbmi2.
+     * Implementation and automatic generation of __builtin_clz* using the
+       lzcnt instruction is available via -mlzcnt.
+     * Support for Intel FMA3 intrinsics and code generation is available
+       via -mfma.
+     * A new -mfsgsbase command-line option is available that makes GCC
+       generate new segment register read/write instructions through
+       dedicated built-ins.
+     * Support for the new Intel rdrnd instruction is available via
+       -mrdrnd.
+     * Two additional AVX vector conversion instructions are available via
+       -mf16c.
+     * Support for new Intel processor codename IvyBridge with RDRND,
+       FSGSBASE and F16C is available through -march=core-avx-i.
+     * Support for the new Intel processor codename Haswell with AVX2,
+       FMA, BMI, BMI2, LZCNT is available through -march=core-avx2.
+     * Support for new AMD family 15h processors (Piledriver core) is now
+       available through -march=bdver2 and -mtune=bdver2 options.
+     * Support for [40]the x32 psABI is now available through the -mx32
+       option.
+     * Windows mingw targets are using the -mms-bitfields option by
+       default.
+     * Windows x86 targets are using the __thiscall calling convention for
+       C++ class-member functions.
+     * Support for the configure option --with-threads=posix for Windows
+       mingw targets.
+
+  MIPS
+
+     * GCC now supports thread-local storage (TLS) for MIPS16. This
+       requires GNU binutils 2.22 or later.
+     * GCC can now generate code specifically for the Cavium Octeon+ and
+       Octeon2 processors. The associated command-line options are
+       -march=octeon+ and -march=octeon2 respectively. Both options
+       require GNU binutils 2.22 or later.
+     * GCC can now work around certain 24k errata, under the control of
+       the command-line option -mfix-24k. These workarounds require GNU
+       binutils 2.20 or later.
+     * 32-bit MIPS GNU/Linux targets such as mips-linux-gnu can now build
+       n32 and n64 multilibs. The result is effectively a 64-bit GNU/Linux
+       toolchain that generates 32-bit code by default. Use the
+       configure-time option --enable-targets=all to select these extra
+       multilibs.
+     * Passing -fno-delayed-branch now also stops the assembler from
+       automatically filling delay slots.
+
+  PowerPC/PowerPC64
+
+     * Vectors of type vector long long or vector long are passed and
+       returned using the same method as other vectors with the VSX
+       instruction set. Previously GCC did not adhere to the ABI for
+       128-bit vectors with 64-bit integer base types (PR 48857). This
+       will also be fixed in the GCC 4.6.1 and 4.5.4 releases.
+     * A new option -mno-pointers-to-nested-functions was added to allow
+       AIX 32-bit/64-bit and GNU/Linux 64-bit PowerPC users to specify
+       that the compiler should not load up the chain register (r11)
+       before calling a function through a pointer. If you use this
+       option, you cannot call nested functions through a pointer, or call
+       other languages that might use the static chain.
+     * A new option msave-toc-indirect was added to allow AIX
+       32-bit/64-bit and GNU/Linux 64-bit PowerPC users control whether we
+       save the TOC in the prologue for indirect calls or generate the
+       save inline. This can speed up some programs that call through a
+       function pointer a lot, but it can slow down other functions that
+       only call through a function pointer in exceptional cases.
+     * The PowerPC port will now enable machine-specific built-in
+       functions when the user switches the target machine using the
+       #pragma GCC target or __attribute__ ((__target__ ("target"))) code
+       sequences. In addition, the target macros are updated. However, due
+       to the way the -save-temps switch is implemented, you won't see the
+       effect of these additional macros being defined in preprocessor
+       output.
+
+  SH
+
+     * A new option -msoft-atomic has been added. When it is specified,
+       GCC will generate GNU/Linux-compatible gUSA atomic sequences for
+       the new __atomic routines.
+     * Since it is neither supported by GAS nor officially documented,
+       code generation for little endian SH2A has been disabled.
+       Specifying -ml with -m2a* will now result in a compiler error.
+     * The defunct -mbranch-cost option has been fixed.
+     * Some improvements to the generated code of:
+          + Utilization of the tst #imm,R0 instruction.
+          + Dynamic shift instructions on SH2A.
+          + Integer absolute value calculations.
+     * The -mdiv= option for targets other than SHmedia has been fixed and
+       documented.
+
+  SPARC
+
+     * The option -mflat has been reinstated. When it is specified, the
+       compiler will generate code for a single register window model.
+       This is essentially a new implementation and the corresponding
+       debugger support has been added to GDB 7.4.
+     * Support for the options -mtune=native and -mcpu=native has been
+       added on selected native platforms (GNU/Linux and Solaris).
+     * Support for the SPARC T3 (Niagara 3) processor has been added.
+     * VIS:
+          + An intrinsics header visintrin.h has been added.
+          + Builtin intrinsics for the VIS 1.0 edge handling and pixel
+            compare instructions have been added.
+          + The little-endian version of alignaddr is now supported.
+          + When possible, VIS builtins are marked const, which should
+            increase the compiler's ability to optimize VIS operations.
+          + The compiler now properly tracks the %gsr register and how it
+            behaves as an input for various VIS instructions.
+          + Akin to fzero, the compiler can now generate fone instructions
+            in order to set all of the bits of a floating-point register
+            to 1.
+          + The documentation for the VIS intrinsics in the GCC manual has
+            been brought up to date and many inaccuracies were fixed.
+          + Intrinsics for the VIS 2.0 bmask, bshuffle, and
+            non-condition-code setting edge instructions have been added.
+            Their availability is controlled by the new -mvis2 and
+            -mno-vis2 options. They are enabled by default on
+            UltraSPARC-III and later CPUs.
+     * Support for UltraSPARC Fused Multiply-Add floating-point extensions
+       has been added. These instructions are enabled by default on SPARC
+       T3 (Niagara 3) and later CPUs.
+
+  TILE-Gx/TILEPro
+
+     * Support has been added for the Tilera TILE-Gx and TILEPro families
+       of processors.
+
+Other significant improvements
+
+     * A new option (-grecord-gcc-switches) was added that appends
+       compiler command-line options that might affect code generation to
+       the DW_AT_producer attribute string in the DWARF debugging
+       information.
+     * GCC now supports various new GNU extensions to the DWARF debugging
+       information format, like [41]entry value and [42]call site
+       information, [43]typed DWARF stack or [44]a more compact macro
+       representation. Support for these extensions has been added to GDB
+       7.4. They can be disabled through the -gstrict-dwarf command-line
+       option.
+
+GCC 4.7.1
+
+   This is the [45]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.7.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   The Go frontend in the 4.7.1 release fully supports the [46]Go 1
+   language standard.
+
+GCC 4.7.2
+
+   This is the [47]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.7.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.7.3
+
+   This is the [48]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.7.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.7.4
+
+   This is the [49]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.7.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [50]GCC manuals. If that fails, the
+    [51]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [52]gcc@gcc.gnu.org. All of [53]our lists have public
+    archives.
+
+   Copyright (C) [54]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [55]maintained by the GCC team. Last modified
+   2014-12-06[56].
+
+References
+
+   1. https://gcc.gnu.org/ml/gcc-patches/2011-03/msg01263.html
+   2. http://savannah.nongnu.org/bugs/?35407
+   3. https://gcc.gnu.org/PR18145
+   4. https://gcc.gnu.org/gcc-4.7/porting_to.html
+   5. http://openmp.org/wp/openmp-specifications/
+   6. https://gcc.gnu.org/wiki/TransactionalMemory
+   7. https://gcc.gnu.org/wiki/Atomic/GCCMM
+   8. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+   9. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+  10. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+  11. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+  12. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+  13. http://gcc.gnu.org/gcc-4.7/cxx0x_status.html
+  14. https://gcc.gnu.org/PR14258
+  15. https://gcc.gnu.org/PR35688
+  16. https://gcc.gnu.org/onlinedocs/gcc-4.7.4/libstdc++/manual/manual/status.html#status.iso.2011
+  17. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfstack-arrays_007d-254
+  18. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Optimize-Options.html#index-Ofast-689
+  19. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfno-protect-parens_007d-270
+  20. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfstack-arrays_007d-254
+  21. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfrontend-optimize_007d-275
+  22. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWfunction-elimination_007d-170
+  23. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfaggressive-function-elimination_007d-270
+  24. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWreal-q-constant_007d-149
+  25. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/SELECTED_005fREAL_005fKIND.html
+  26. http://msdn.microsoft.com/en-us/library/bb787181(v=vs.85).aspx
+  27. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Debugging-Options.html#index-g_t_0040code_007bfno-backtrace_007d-183
+  28. https://gcc.gnu.org/wiki/Fortran2003Status
+  29. https://gcc.gnu.org/wiki/OOP
+  30. https://gcc.gnu.org/wiki/Fortran2008Status
+  31. https://gcc.gnu.org/wiki/Coarray
+  32. https://gcc.gnu.org/wiki/CoarrayLib
+  33. https://gcc.gnu.org/wiki/TS29113Status
+  34. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gfortran/Fortran-Dialect-Options.html#index-g_t_0040code_007bstd_003d_007d_0040var_007bstd_007d-option-53
+  35. http://weekly.golang.org/doc/go1.html
+  36. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/Named-Address-Spaces.html
+  37. http://nongnu.org/avr-libc/
+  38. https://gcc.gnu.org/PR54461
+  39. https://gcc.gnu.org/onlinedocs/gcc-4.7.1/gcc/AVR-Built_002din-Functions.html
+  40. https://sites.google.com/site/x32abi/
+  41. http://www.dwarfstd.org/ShowIssue.php?issue=100909.1
+  42. http://www.dwarfstd.org/ShowIssue.php?issue=100909.2
+  43. http://www.dwarfstd.org/doc/040408.1.html
+  44. http://www.dwarfstd.org/ShowIssue.php?issue=110722.1
+  45. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.1
+  46. http://weekly.golang.org/doc/go1.html
+  47. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.2
+  48. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.3
+  49. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.4
+  50. https://gcc.gnu.org/onlinedocs/
+  51. mailto:gcc-help@gcc.gnu.org
+  52. mailto:gcc@gcc.gnu.org
+  53. https://gcc.gnu.org/lists.html
+  54. http://www.fsf.org/
+  55. https://gcc.gnu.org/about.html
+  56. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.6/index.html
+                             GCC 4.6 Release Series
+
+   April 12, 2013
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.6.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.6.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.6.4
+          April 12, 2013 ([2]changes, [3]documentation)
+
+   GCC 4.6.3
+          March 1, 2012 ([4]changes, [5]documentation)
+
+   GCC 4.6.2
+          October 26, 2011 ([6]changes, [7]documentation)
+
+   GCC 4.6.1
+          June 27, 2011 ([8]changes, [9]documentation)
+
+   GCC 4.6.0
+          March 25, 2011 ([10]changes, [11]documentation)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [12]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [13]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [14]GCC
+   project web site or contact the [15]GCC development mailing list.
+
+   To obtain GCC please use [16]our mirror sites or [17]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [18]GCC manuals. If that fails, the
+    [19]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [20]gcc@gcc.gnu.org. All of [21]our lists have public
+    archives.
+
+   Copyright (C) [22]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [23]maintained by the GCC team. Last modified
+   2014-06-28[24].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.6/changes.html
+   3. https://gcc.gnu.org/onlinedocs/4.6.4/
+   4. http://gcc.gnu.org/gcc-4.6/changes.html
+   5. https://gcc.gnu.org/onlinedocs/4.6.3/
+   6. http://gcc.gnu.org/gcc-4.6/changes.html
+   7. https://gcc.gnu.org/onlinedocs/4.6.2/
+   8. http://gcc.gnu.org/gcc-4.6/changes.html
+   9. https://gcc.gnu.org/onlinedocs/4.6.1/
+  10. http://gcc.gnu.org/gcc-4.6/changes.html
+  11. https://gcc.gnu.org/onlinedocs/4.6.0/
+  12. http://gcc.gnu.org/gcc-4.6/buildstat.html
+  13. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  14. http://gcc.gnu.org/index.html
+  15. mailto:gcc@gcc.gnu.org
+  16. http://gcc.gnu.org/mirrors.html
+  17. http://gcc.gnu.org/svn.html
+  18. https://gcc.gnu.org/onlinedocs/
+  19. mailto:gcc-help@gcc.gnu.org
+  20. mailto:gcc@gcc.gnu.org
+  21. https://gcc.gnu.org/lists.html
+  22. http://www.fsf.org/
+  23. https://gcc.gnu.org/about.html
+  24. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.6/changes.html
+                             GCC 4.6 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * The options -b <machine> and -V <version> have been removed because
+       they were unreliable. Instead, users should directly run
+       <machine>-gcc when cross-compiling, or <machine>-gcc-<version> to
+       run a different version of gcc.
+     * GCC now has stricter checks for invalid command-line options. In
+       particular, when gcc was called to link object files rather than
+       compile source code, it would previously accept and ignore all
+       options starting with --, including linker options such as
+       --as-needed and --export-dynamic, although such options would
+       result in errors if any source code was compiled. Such options, if
+       unknown to the compiler, are now rejected in all cases; if the
+       intent was to pass them to the linker, options such as
+       -Wl,--as-needed should be used.
+     * Versions of the GNU C library up to and including 2.11.1 included
+       an [1]incorrect implementation of the cproj function. GCC optimizes
+       its builtin cproj according to the behavior specified and allowed
+       by the ISO C99 standard. If you want to avoid discrepancies between
+       the C library and GCC's builtin transformations when using cproj in
+       your code, use GLIBC 2.12 or later. If you are using an older GLIBC
+       and actually rely on the incorrect behavior of cproj, then you can
+       disable GCC's transformations using -fno-builtin-cproj.
+     * The C-only intermodule optimization framework (IMA, enabled by
+       -combine) has been removed in favor of the new generic link-time
+       optimization framework (LTO) introduced in [2]GCC 4.5.0.
+     * GCC now ships with the LGPL-licensed libquadmath library, which
+       provides quad-precision mathematical functions for targets with a
+       __float128 datatype. __float128 is available for targets on 32-bit
+       x86, x86-64 and Itanium architectures. The libquadmath library is
+       automatically built on such targets when building the Fortran
+       compiler.
+     * New -Wunused-but-set-variable and -Wunused-but-set-parameter
+       warnings were added for C, C++, Objective-C and Objective-C++.
+       These warnings diagnose variables respective parameters which are
+       only set in the code and never otherwise used. Usually such
+       variables are useless and often even the value assigned to them is
+       computed needlessly, sometimes expensively. The
+       -Wunused-but-set-variable warning is enabled by default by -Wall
+       flag and -Wunused-but-set-parameter by -Wall -Wextra flags.
+     * On ARM, a bug has been fixed in GCC's implementation of the AAPCS
+       rules for the layout of vectors that could lead to wrong code being
+       generated. Vectors larger than 8 bytes in size are now by default
+       aligned to an 8-byte boundary. This is an ABI change: code that
+       makes explicit use of vector types may be incompatible with binary
+       objects built with older versions of GCC. Auto-vectorized code is
+       not affected by this change. (This change affects GCC versions
+       4.6.4 and later, with the exception of versions 4.7.0 and 4.7.1.)
+     * On AVR, variables with the progmem attribute to locate data in
+       flash memory must be qualified as const.
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.6.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       All GCC ports for the following processor architectures have been
+       declared obsolete:
+          + Argonaut ARC (arc-*)
+          + National Semiconductor CRX (crx-*)
+          + Motorola 68HC11 and 68HC12 (m68hc11-*-*, m6811-*-*,
+            m68hc12-*-*, m6812-*-*)
+          + Sunplus S+core (score-*)
+       The following ports for individual systems on particular
+       architectures have been obsoleted:
+          + Interix (i[34567]86-*-interix3*)
+          + NetWare x86 (i[3456x]86-*-netware*)
+          + Generic ARM PE (arm-*-pe* other than arm*-wince-pe*)
+          + MCore PE (mcore-*-pe*)
+          + SH SymbianOS (sh*-*-symbianelf*)
+          + GNU Hurd on Alpha and PowerPC (alpha*-*-gnu*, powerpc*-*-gnu*)
+          + M68K uClinux old ABI (m68k-*-uclinuxoldabi*)
+          + a.out NetBSD (arm*-*-netbsd*, i[34567]86-*-netbsd*,
+            vax-*-netbsd*, but not *-*-netbsdelf*)
+       The i[34567]86-*-pe alias for Cygwin targets has also been
+       obsoleted; users should configure for i[34567]86-*-cygwin* instead.
+       Certain configure options to control the set of libraries built
+       with GCC on some targets have been obsoleted. On ARM targets, the
+       options --disable-fpu, --disable-26bit, --disable-underscore,
+       --disable-interwork, --disable-biendian and --disable-nofmult have
+       been obsoleted. On MIPS targets, the options
+       --disable-single-float, --disable-biendian and --disable-softfloat
+       have been obsoleted.
+     * Support has been removed for all the [3]configurations obsoleted in
+       GCC 4.5.
+     * More information on porting to GCC 4.6 from previous versions of
+       GCC can be found in the [4]porting guide for this release.
+
+General Optimizer Improvements
+
+     * A new general optimization level, -Ofast, has been introduced. It
+       combines the existing optimization level -O3 with options that can
+       affect standards compliance but result in better optimized code.
+       For example, -Ofast enables -ffast-math.
+     * Link-time optimization improvements:
+          + The [5]Scalable Whole Program Optimizer (WHOPR) project has
+            stabilized to the point of being usable. It has become the
+            default mode when using the LTO optimization model. Link time
+            optimization can now split itself into multiple parallel
+            compilations. Parallelism is controlled with -flto=n (where n
+            specifies the number of compilations to execute in parallel).
+            GCC can also cooperate with a GNU make job server by
+            specifying the -flto=jobserver option and adding + to the
+            beginning of the Makefile rule executing the linker.
+            Classical LTO mode can be enforced by -flto-partition=none.
+            This may result in small code quality improvements.
+          + A large number of bugs were fixed. GCC itself, Mozilla Firefox
+            and other large applications can be built with LTO enabled.
+          + The linker plugin support improvements
+               o Linker plugin is now enabled by default when the linker
+                 is detected to have plugin support. This is the case for
+                 GNU ld 2.21.51 or newer (on ELF and Cygwin targets) and
+                 the Gold linker on ELF targets. Plugin support of the
+                 Apple linker on Darwin is not compatible with GCC. The
+                 linker plugin can also be controlled by the
+                 -fuse-linker-plugin command line option.
+               o Resolution information from the linker plugin is used to
+                 drive whole program assumptions. Use of the linker plugin
+                 results in more aggressive optimization on binaries and
+                 on shared libraries that use the hidden visibility
+                 attribute. Consequently the use of -fwhole-program is not
+                 necessary in addition to LTO.
+          + Hidden symbols used from non-LTO objects now have to be
+            explicitly annotated with externally_visible when the linker
+            plugin is not used.
+          + C++ inline functions and virtual tables are now privatized
+            more aggressively, leading to better inter-procedural
+            optimization and faster dynamic linking.
+          + Memory usage and intermediate language streaming performance
+            have been improved.
+          + Static constructors and destructors from individual units are
+            inlined into a single function. This can significantly improve
+            startup times of large C++ applications where static
+            constructors are very common. For example, static constructors
+            are used when including the iostream header.
+          + Support for the Ada language has been added.
+     * Interprocedural optimization improvements
+          + The interprocedural framework was re-tuned for link time
+            optimization. Several scalability issues were resolved.
+          + Improved auto-detection of const and pure functions. Newly,
+            noreturn functions are auto-detected.
+            The [6]-Wsuggest-attribute=[const|pure|noreturn] flag is
+            available that informs users when adding attributes to headers
+            might improve code generation.
+          + A number of inlining heuristic improvements. In particular:
+               o Partial inlining is now supported and enabled by default
+                 at -O2 and greater. The feature can be controlled via
+                 -fpartial-inlining.
+                 Partial inlining splits functions with short hot path to
+                 return. This allows more aggressive inlining of the hot
+                 path leading to better performance and often to code size
+                 reductions (because cold parts of functions are not
+                 duplicated).
+               o Scalability for large compilation units was improved
+                 significantly.
+               o Inlining of callbacks is now more aggressive.
+               o Virtual methods are considered for inlining when the
+                 caller is inlined and devirtualization is then possible.
+               o Inlining when optimizing for size (either in cold regions
+                 of a program or when compiling with -Os) was improved to
+                 better handle C++ programs with larger abstraction
+                 penalty, leading to smaller and faster code.
+          + The IPA reference optimization pass detecting global variables
+            used or modified by functions was strengthened and sped up.
+          + Functions whose address was taken are now optimized out when
+            all references to them are dead.
+          + A new inter-procedural static profile estimation pass detects
+            functions that are executed once or unlikely to be executed.
+            Unlikely executed functions are optimized for size. Functions
+            executed once are optimized for size except for the inner
+            loops.
+          + On most targets with named section support, functions used
+            only at startup (static constructors and main), functions used
+            only at exit and functions detected to be cold are placed into
+            separate text segment subsections. This extends the
+            -freorder-functions feature and is controlled by the same
+            switch. The goal is to improve the startup time of large C++
+            programs.
+            Proper function placement requires linker support. GNU ld
+            2.21.51 on ELF targets was updated to place those functions
+            together within the text section leading to better code
+            locality and faster startup times of large C++ programs. The
+            feature is also supported in the Apple linker. Support in the
+            gold linker is planned.
+     * A new switch -fstack-usage has been added. It makes the compiler
+       output stack usage information for the program, on a per-function
+       basis, in an auxiliary file.
+     * A new switch -fcombine-stack-adjustments has been added. It can be
+       used to enable or disable the compiler's stack-slot combining pass
+       which before was enabled automatically at -O1 and above, but could
+       not be controlled on its own.
+     * A new switch -fstrict-volatile-bitfields has been added. Using it
+       indicates that accesses to volatile bitfields should use a single
+       access of the width of the field's type. This option can be useful
+       for precisely defining and accessing memory-mapped peripheral
+       registers from C or C++.
+
+Compile time and memory usage improvements
+
+     * Datastructures used by the dataflow framework in GCC were
+       reorganized for better memory usage and more cache locality.
+       Compile time is improved especially on units with large functions
+       (possibly resulting from a lot of inlining) not fitting into the
+       processor cache. The compile time of the GCC C compiler binary with
+       link-time optimization went down by over 10% (benchmarked on x86-64
+       target).
+
+New Languages and Language specific improvements
+
+  Ada
+
+     * Stack checking has been improved on selected architectures (Alpha,
+       IA-32/x86-64, RS/6000 and SPARC): it now will detect stack
+       overflows in all cases on these architectures.
+     * Initial support for Ada 2012 has been added.
+
+  C family
+
+     * A new warning, enabled by -Wdouble-promotion, has been added that
+       warns about cases where a value of type float is implicitly
+       promoted to double. This is especially helpful for CPUs that handle
+       the former in hardware, but emulate the latter in software.
+     * A new function attribute leaf was introduced. This attribute allows
+       better inter-procedural optimization across calls to functions that
+       return to the current unit only via returning or exception
+       handling. This is the case for most library functions that have no
+       callbacks.
+     * Support for a new data type __int128 for targets having wide enough
+       machine-mode support.
+     * The new function attribute callee_pop_aggregate allows to specify
+       if the caller or callee is responsible for popping the aggregate
+       return pointer value from the stack.
+     * Support for selectively enabling and disabling warnings via #pragma
+       GCC diagnostic has been added. For instance:
+#pragma GCC diagnostic error "-Wuninitialized"
+  foo(a);                       /* error is given for this one */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wuninitialized"
+  foo(b);                       /* no diagnostic for this one */
+#pragma GCC diagnostic pop
+  foo(c);                       /* error is given for this one */
+#pragma GCC diagnostic pop
+  foo(d);                       /* depends on command line options */
+
+     * The -fmax-errors=N option is now supported. Using this option
+       causes the compiler to exit after N errors have been issued.
+
+  C
+
+     * There is now experimental support for some features from the
+       upcoming C1X revision of the ISO C standard. This support may be
+       selected with -std=c1x, or -std=gnu1x for C1X with GNU extensions.
+       Note that this support is experimental and may change incompatibly
+       in future releases for consistency with changes to the C1X standard
+       draft. The following features are newly supported as described in
+       the N1539 draft of C1X (with changes agreed at the March 2011 WG14
+       meeting); some other features were already supported with no
+       compiler changes being needed, or have some support but not in full
+       accord with N1539 (as amended).
+          + Static assertions (_Static_assert keyword)
+          + Typedef redefinition
+          + New macros in <float.h>
+          + Anonymous structures and unions
+     * The new -fplan9-extensions option directs the compiler to support
+       some extensions for anonymous struct fields which are implemented
+       by the Plan 9 compiler. A pointer to a struct may be automatically
+       converted to a pointer to an anonymous field when calling a
+       function, in order to make the types match. An anonymous struct
+       field whose type is a typedef name may be referred to using the
+       typedef name.
+
+  C++
+
+     * Improved [7]experimental support for the upcoming C++0x ISO C++
+       standard, including support for constexpr (thanks to Gabriel Dos
+       Reis and Jason Merrill), nullptr (thanks to Magnus Fromreide),
+       noexcept, unrestricted unions, range-based for loops (thanks to
+       Rodrigo Rivas Costa), opaque enum declarations (thanks also to
+       Rodrigo), implicitly deleted functions and implicit move
+       constructors.
+     * When an extern declaration within a function does not match a
+       declaration in the enclosing context, G++ now properly declares the
+       name within the namespace of the function rather than the namespace
+       which was open just before the function definition ([8]c++/43145).
+     * GCC now warns by default when casting integers to larger pointer
+       types. These warnings can be disabled with the option
+       -Wno-int-to-pointer-cast, which is now also available in C++.
+     * G++ no longer optimizes using the assumption that a value of
+       enumeration type will fall within the range specified by the
+       standard, since that assumption is easily violated with a
+       conversion from integer type ([9]c++/43680). The old behavior can
+       be restored with -fstrict-enums.
+     * The new -fnothrow-opt flag changes the semantics of a throw()
+       exception specification to match the proposed semantics of the
+       noexcept specification: just call terminate if an exception tries
+       to propagate out of a function with such an exception
+       specification. This dramatically reduces or eliminates the code
+       size overhead from adding the exception specification.
+     * The new -Wnoexcept flag will suggest adding a noexcept qualifier to
+       a function that the compiler can tell doesn't throw if it would
+       change the value of a noexcept expression.
+     * The -Wshadow option now warns if a local variable or type
+       declaration shadows another type in C++. Note that the compiler
+       will not warn if a local variable shadows a struct/class/enum, but
+       will warn if it shadows an explicit typedef.
+     * When an identifier is not found in the current scope, G++ now
+       offers suggestions about which identifier might have been intended.
+     * G++ now issues clearer diagnostics for missing semicolons after
+       class, struct, and union definitions.
+     * G++ now issues clearer diagnostics for missing semicolons after
+       class member declarations.
+     * G++ now issues clearer diagnostics when a colon is used in a place
+       where a double-colon was intended.
+     * G++ no longer accepts mutable on reference members ([10]c++/33558).
+       Use -fpermissive to allow the old, non-conforming behaviour.
+     * A few mangling fixes have been made, to attribute const/volatile on
+       function pointer types, decltype of a plain decl, and use of a
+       function parameter in the declaration of another parameter. By
+       default the compiler still uses the old mangling, but emits aliases
+       with the new mangling on targets that support strong aliases. Users
+       can switch over entirely to the new mangling with -fabi-version=5
+       or -fabi-version=0. -Wabi will now warn about code that uses the
+       old mangling.
+     * In 4.6.0 and 4.6.1 G++ no longer allows objects of const-qualified
+       type to be default initialized unless the type has a user-declared
+       default constructor. In 4.6.2 G++ implements the proposed
+       resolution of [11]DR 253, so default initialization is allowed if
+       it initializes all subobjects. Code that fails to compile can be
+       fixed by providing an initializer e.g.
+    struct A { A(); };
+    struct B : A { int i; };
+    const B b = B();
+       Use -fpermissive to allow the old, non-conforming behaviour.
+
+    Runtime Library (libstdc++)
+
+     * [12]Improved experimental support for the upcoming ISO C++
+       standard, C++0x, including using constexpr and nullptr.
+     * Performance improvements to the [13]Debug Mode, thanks to François
+       Dumont.
+     * Atomic operations used for reference-counting are annotated so that
+       they can be understood by race detectors such as Helgrind, see
+       [14]Data Race Hunting.
+     * Most libstdc++ standard headers have been changed to no longer
+       include the cstddef header as an implementation detail. Code that
+       relied on that header being included as side-effect of including
+       other standard headers will need to include cstddef explicitly.
+
+  Fortran
+
+     * On systems supporting the libquadmath library, GNU Fortran now also
+       supports a quad-precision, kind=16 floating-point data type
+       (REAL(16), COMPLEX(16)). As the data type is not fully supported in
+       hardware, calculations might be one to two orders of magnitude
+       slower than with the 4, 8 or 10 bytes floating-point data types.
+       This change does not affect systems which support REAL(16) in
+       hardware nor those which do not support libquadmath.
+     * Much improved compile time for large array constructors.
+     * In order to reduce execution time and memory consumption, use of
+       temporary arrays in assignment expressions is avoided for many
+       cases. The compiler now reverses loops in order to avoid generating
+       a temporary array where possible.
+     * Improved diagnostics, especially with -fwhole-file.
+     * The -fwhole-file flag is now enabled by default. This improves code
+       generation and diagnostics. It can be disabled using the deprecated
+       -fno-whole-file flag.
+     * Support the generation of Makefile dependencies via the [15]-M...
+       flags of GCC; you may need to specify the -cpp option in addition.
+       The dependencies take modules, Fortran's include, and CPP's
+       #include into account. Note: Using -M for the module path is no
+       longer supported, use -J instead.
+     * The flag -Wconversion has been modified to only issue warnings
+       where a conversion leads to information loss. This drastically
+       reduces the number of warnings; -Wconversion is thus now enabled
+       with -Wall. The flag -Wconversion-extra has been added and also
+       warns about other conversions; -Wconversion-extra typically issues
+       a huge number of warnings, most of which can be ignored.
+     * A new command-line option -Wunused-dummy-argument warns about
+       unused dummy arguments and is included in -Wall. Before,
+       -Wunused-variable also warned about unused dummy arguments.
+     * Fortran 2003 support has been extended:
+          + Improved support for polymorphism between libraries and
+            programs and for complicated inheritance patterns (cf.
+            [16]object-oriented programming).
+          + Experimental support of the ASSOCIATE construct.
+          + In pointer assignments it is now possible to specify the lower
+            bounds of the pointer and, for a rank-1 or a simply contiguous
+            data-target, to remap the bounds.
+          + Automatic (re)allocation: In intrinsic assignments to
+            allocatable variables the left-hand side will be automatically
+            allocated (if unallocated) or reallocated (if the shape or
+            type parameter is different). To avoid the small performance
+            penalty, you can use a(:) = ... instead of a = ... for arrays
+            and character strings – or disable the feature using -std=f95
+            or -fno-realloc-lhs.
+          + Deferred type parameter: For scalar allocatable and pointer
+            variables the character length can be deferred.
+          + Namelist variables with allocatable and pointer attribute and
+            nonconstant length type parameter are supported.
+     * Fortran 2008 support has been extended:
+          + Experimental [17]coarray support (for one image only, i.e.
+            num_images() == 1); use the [18]-fcoarray=single flag to
+            enable it.
+          + The STOP and the new ERROR STOP statements now support all
+            constant expressions.
+          + Support for the CONTIGUOUS attribute.
+          + Support for ALLOCATE with MOLD.
+          + Support for the STORAGE_SIZE intrinsic inquiry function.
+          + Support of the NORM2 and PARITY intrinsic functions.
+          + The following bit intrinsics were added: POPCNT and POPPAR for
+            counting the number of 1 bits and returning the parity; BGE,
+            BGT, BLE, and BLT for bitwise comparisons; DSHIFTL and DSHIFTR
+            for combined left and right shifts, MASKL and MASKR for simple
+            left and right justified masks, MERGE_BITS for a bitwise merge
+            using a mask, SHIFTA, SHIFTL and SHIFTR for shift operations,
+            and the transformational bit intrinsics IALL, IANY and
+            IPARITY.
+          + Support of the EXECUTE_COMMAND_LINE intrinsic subroutine.
+          + Support for the IMPURE attribute for procedures, which allows
+            for ELEMENTAL procedures without the restrictions of PURE.
+          + Null pointers (including NULL()) and not allocated variables
+            can be used as actual argument to optional non-pointer,
+            non-allocatable dummy arguments, denoting an absent argument.
+          + Non-pointer variables with TARGET attribute can be used as
+            actual argument to POINTER dummies with INTENT(IN)
+          + Pointers including procedure pointers and those in a derived
+            type (pointer components) can now be initialized by a target
+            instead of only by NULL.
+          + The EXIT statement (with construct-name) can now be used to
+            leave not only the DO but also the ASSOCIATE, BLOCK, IF,
+            SELECT CASE and SELECT TYPE constructs.
+          + Internal procedures can now be used as actual argument.
+          + The named constants INTEGER_KINDS, LOGICAL_KINDS, REAL_KINDS
+            and CHARACTER_KINDS of the intrinsic module ISO_FORTRAN_ENV
+            have been added; these arrays contain the supported kind
+            values for the respective types.
+          + The module procedures C_SIZEOF of the intrinsic module
+            ISO_C_BINDINGS and COMPILER_VERSION and COMPILER_OPTIONS of
+            ISO_FORTRAN_ENV have been implemented.
+          + Minor changes: obsolescence diagnostics for ENTRY was added
+            for -std=f2008; a line may start with a semicolon; for
+            internal and module procedures END can be used instead of END
+            SUBROUTINE and END FUNCTION; SELECTED_REAL_KIND now also takes
+            a RADIX argument; intrinsic types are supported for
+            TYPE(intrinsic-type-spec); multiple type-bound procedures can
+            be declared in a single PROCEDURE statement; implied-shape
+            arrays are supported for named constants (PARAMETER). The
+            transformational, three argument versions of BESSEL_JN and
+            BESSEL_YN were added – the elemental, two-argument version had
+            been added in GCC 4.4; note that the transformational
+            functions use a recurrence algorithm.
+
+  Go
+
+   Support for the [19]Go programming language has been added to GCC. It
+   is not enabled by default when you build GCC; use the
+   --enable-languages configure option to build it. The driver program for
+   compiling Go code is gccgo.
+
+   Go is currently known to work on GNU/Linux and RTEMS. Solaris support
+   is in progress. It may or may not work on other platforms.
+
+  Objective-C and Objective-C++
+
+     * The -fobjc-exceptions flag is now required to enable Objective-C
+       exception and synchronization syntax (introduced by the keywords
+       @try, @catch, @finally and @synchronized).
+     * A number of Objective-C 2.0 features and extensions are now
+       supported by GCC. These features are enabled by default; you can
+       disable them by using the new -fobjc-std=objc1 command-line option.
+     * The Objective-C 2.0 dot-syntax is now supported. It is an
+       alternative syntax for using getters and setters; object.count is
+       automatically converted into [object count] or [object setCount:
+       ...] depending on context; for example if (object.count > 0) is
+       automatically compiled into the equivalent of if ([object count] >
+       0) while object.count = 0; is automatically compiled into the
+       equivalent ot [object setCount: 0];. The dot-syntax can be used
+       with instance and class objects and with any setters or getters, no
+       matter if they are part of a declared property or not.
+     * Objective-C 2.0 declared properties are now supported. They are
+       declared using the new @property keyword, and are most commonly
+       used in conjunction with the new Objective-C 2.0 dot-syntax. The
+       nonatomic, readonly, readwrite, assign, retain, copy, setter and
+       getter attributes are all supported. Marking declared properties
+       with __attribute__ ((deprecated)) is supported too.
+     * The Objective-C 2.0 @synthesize and @dynamic keywords are
+       supported. @synthesize causes the compiler to automatically
+       synthesize a declared property, while @dynamic is used to disable
+       all warnings for a declared property for which no implementation is
+       provided at compile time. Synthesizing declared properties requires
+       runtime support in most useful cases; to be able to use it with the
+       GNU runtime, appropriate helper functions have been added to the
+       GNU Objective-C runtime ABI, and are implemented by the GNU
+       Objective-C runtime library shipped with GCC.
+     * The Objective-C 2.0 fast enumeration syntax is supported in
+       Objective-C. This is currently not yet available in Objective-C++.
+       Fast enumeration requires support in the runtime, and such support
+       has been added to the GNU Objective-C runtime library (shipped with
+       GCC).
+     * The Objective-C 2.0 @optional keyword is supported. It allows you
+       to mark methods or properties in a protocol as optional as opposed
+       to required.
+     * The Objective-C 2.0 @package keyword is supported. It has currently
+       the same effect as the @public keyword.
+     * Objective-C 2.0 method attributes are supported. Currently the
+       supported attributes are deprecated, sentinel, noreturn and format.
+     * Objective-C 2.0 method argument attributes are supported. The most
+       widely used attribute is unused, to mark an argument as unused in
+       the implementation.
+     * Objective-C 2.0 class and protocol attributes are supported.
+       Currently the only supported attribute is deprecated.
+     * Objective-C 2.0 class extensions are supported. A class extension
+       has the same syntax as a category declaration with no category
+       name, and the methods and properties declared in it are added
+       directly to the main class. It is mostly used as an alternative to
+       a category to add methods to a class without advertising them in
+       the public headers, with the advantage that for class extensions
+       the compiler checks that all the privately declared methods are
+       actually implemented.
+     * As a result of these enhancements, GCC can now be used to build
+       Objective-C and Objective-C++ software that uses Foundation and
+       other important system frameworks with the NeXT runtime on Darwin 9
+       and Darwin 10 (OSX 10.5 and 10.6).
+     * Many bugs in the compiler have been fixed in this release; in
+       particular, LTO can now be used when compiling Objective-C and
+       Objective-C++ and the parser is much more robust in dealing with
+       invalid code.
+
+    Runtime Library (libobjc)
+
+     * The GNU Objective-C runtime library now defines the macro
+       __GNU_LIBOBJC__ (with a value that is increased at every release
+       where there is any change to the API) in objc/objc.h, making it
+       easy to determine if the GNU Objective-C runtime library is being
+       used, and if so, which version. Previous versions of the GNU
+       Objective-C runtime library (and other Objective-C runtime
+       libraries such as the Apple one) do not define this macro.
+     * A new Objective-C 2.0 API, almost identical to the one implemented
+       by the Apple Objective-C runtime, has been implemented in the GNU
+       Objective-C runtime library. The new API hides the internals of
+       most runtime structures but provides a more extensive set of
+       functions to operate on them. It is much easier, for example, to
+       create or modify classes at runtime. The new API also makes it
+       easier to port software from Apple to GNU as almost no changes
+       should be required. The old API is still supported for backwards
+       compatibility; including the old objc/objc-api.h header file
+       automatically selects the old API, while including the new
+       objc/runtime.h header file automatically selects the new API.
+       Support for the old API is being phased out and upgrading the
+       software to use the new API is strongly recommended. To check for
+       the availability of the new API, the __GNU_LIBOBJC__ macro can be
+       used as older versions of the GNU Objective-C runtime library,
+       which do not support the new API, do not define such a macro.
+     * Runtime support for @synchronized has been added.
+     * Runtime support for Objective-C 2.0 synthesized property accessors
+       has been added.
+     * Runtime support for Objective-C 2.0 fast enumeration has been
+       added.
+
+New Targets and Target Specific Improvements
+
+  ARM
+
+     * GCC now supports the Cortex-M4 processor implementing the v7-em
+       version of the architecture using the option -mcpu=cortex-m4.
+     * Scheduling descriptions for the Cortex-M4, the Neon and the
+       floating point units of the Cortex-A9 and a pipeline description
+       for the Cortex-A5 have been added.
+     * Synchronization primitives such as __sync_fetch_and_add and friends
+       are now inlined for supported architectures rather than calling
+       into a kernel helper function.
+     * SSA loop prefetching is enabled by default for the Cortex-A9 at
+       -O3.
+     * Several improvements were committed to improve code generation for
+       the ARM architecture including a rewritten implementation for load
+       and store multiples.
+     * Several enhancements were committed to improve SIMD code generation
+       for NEON by adding support for widening instructions, misaligned
+       loads and stores, vector conditionals and support for 64 bit
+       arithmetic.
+     * Support was added for the Faraday cores fa526, fa606te, fa626te,
+       fmp626te, fmp626 and fa726te and can be used with the respective
+       names as parameters to the -mcpu= option.
+     * Basic support was added for Cortex-A15 and is available through
+       -mcpu=cortex-a15.
+     * GCC for AAPCS configurations now more closely adheres to the AAPCS
+       specification by enabling -fstrict-volatile-bitfields by default.
+
+  IA-32/x86-64
+
+     * The new -fsplit-stack option permits programs to use a
+       discontiguous stack. This is useful for threaded programs, in that
+       it is no longer necessary to specify the maximum stack size when
+       creating a thread. This feature is currently only implemented for
+       32-bit and 64-bit x86 GNU/Linux targets.
+     * Support for emitting profiler counter calls before function
+       prologues. This is enabled via a new command-line option -mfentry.
+     * Optimization for the Intel Core 2 processors is now available
+       through the -march=core2 and -mtune=core2 options.
+     * Support for Intel Core i3/i5/i7 processors is now available through
+       the -march=corei7 and -mtune=corei7 options.
+     * Support for Intel Core i3/i5/i7 processors with AVX is now
+       available through the -march=corei7-avx and -mtune=corei7-avx
+       options.
+     * Support for AMD Bobcat (family 14) processors is now available
+       through the -march=btver1 and -mtune=btver1 options.
+     * Support for AMD Bulldozer (family 15) processors is now available
+       through the -march=bdver1 and -mtune=bdver1 options.
+     * The default setting (when not optimizing for size) for 32-bit
+       GNU/Linux and Darwin x86 targets has been changed to
+       -fomit-frame-pointer. The default can be reverted to
+       -fno-omit-frame-pointer by configuring GCC with the
+       --enable-frame-pointer configure option.
+     * Darwin, FreeBSD, Solaris 2, MinGW and Cygwin now all support
+       __float128 on 32-bit and 64-bit x86 targets.
+     * AVX floating-point arithmetic can now be enabled by default at
+       configure time with the new --with-fpmath=avx option.
+     * The SSA loop prefetching pass is enabled when using -O3 when
+       optimizing for CPUs where prefetching is beneficial (AMD CPUs newer
+       than K6).
+     * Support for TBM (Trailing Bit Manipulation) built-in functions and
+       code generation is available via -mtbm.
+     * Support for AMD's BMI (Bit Manipulation) built-in functions and
+       code generation is available via -mbmi.
+
+  MicroBlaze
+
+     * Support has been added for the Xilinx MicroBlaze softcore processor
+       (microblaze-elf) embedded target. This configurable processor is
+       supported on several Xilinx Spartan and Virtex FPGAs.
+
+  MIPS
+
+     * GCC now supports the Loongson 3A processor. Its canonical -march=
+       and -mtune= name is loongson3a.
+
+  MN10300 / AM33
+
+     * The inline assembly register constraint "A" has been renamed "c".
+       This constraint is used to select a floating-point register that
+       can be used as the destination of a multiply-accumulate
+       instruction.
+     * New inline assembly register constraints "A" and "D" have been
+       added. These constraint letters resolve to all general registers
+       when compiling for AM33, and resolve to address registers only or
+       data registers only when compiling for MN10300.
+     * The MDR register is represented in the compiler. One can access the
+       register via the "z" constraint in inline assembly. It can be
+       marked as clobbered or used as a local register variable via the
+       "mdr" name. The compiler uses the RETF instruction if the function
+       does not modify the MDR register, so it is important that inline
+       assembly properly annotate any usage of the register.
+
+  PowerPC/PowerPC64
+
+     * GCC now supports the Applied Micro Titan processor with
+       -mcpu=titan.
+     * The -mrecip option has been added, which indicates whether the
+       reciprocal and reciprocal square root instructions should be used.
+     * The -mveclibabi=mass option can be used to enable the compiler to
+       autovectorize mathematical functions using the Mathematical
+       Acceleration Subsystem library.
+     * The -msingle-pic-base option has been added, which instructs the
+       compiler to avoid loading the PIC base register in function
+       prologues. The PIC base register must be initialized by the runtime
+       system.
+     * The -mblock-move-inline-limit option has been added, which enables
+       the user to control the maximum size of inlined memcpy calls and
+       similar.
+     * PowerPC64 GNU/Linux support for applications requiring a large TOC
+       section has been improved. A new command-line option,
+       -mcmodel=MODEL, controls this feature; valid values for MODEL are
+       small, medium, or large.
+     * The Altivec builtin functions vec_ld and vec_st have been modified
+       to generate the Altivec memory instructions LVX and STVX, even if
+       the -mvsx option is used. In the initial GCC 4.5 release, these
+       builtin functions were changed to generate VSX memory reference
+       instructions instead of Altivec memory instructions, but there are
+       differences between the two instructions. If the VSX instruction
+       set is available, you can now use the new builtin functions
+       vec_vsx_ld and vec_vsx_st which always generates the VSX memory
+       instructions.
+     * The GCC compiler on AIX now defaults to a process layout with a
+       larger data space allowing larger programs to be compiled.
+     * The GCC long double type on AIX 6.1 and above has reverted to 64
+       bit double precision, matching the AIX XL compiler default, because
+       of missing C99 symbols required by the GCC runtime.
+     * The default processor scheduling model and tuning for PowerPC64
+       GNU/Linux and for AIX 6.1 and above now is POWER7.
+     * Starting with GCC 4.6.1, vectors of type vector long long or vector
+       long are passed and returned in the same method as other vectors
+       with the VSX instruction set. Previously the GCC compiler did not
+       adhere to the ABI for 128-bit vectors with 64-bit integer base
+       types (PR 48857). This is also fixed in the GCC 4.5.4 release.
+
+  S/390, zSeries and System z9/z10, IBM zEnterprise z196
+
+     * Support for the zEnterprise z196 processor has been added. When
+       using the -march=z196 option, the compiler will generate code
+       making use of the following instruction facilities:
+          + Conditional load/store
+          + Distinct-operands
+          + Floating-point-extension
+          + Interlocked-access
+          + Population-count
+       The -mtune=z196 option avoids the compare and branch instructions
+       as well as the load address instruction with an index register as
+       much as possible and performs instruction scheduling appropriate
+       for the new out-of-order pipeline architecture.
+     * When using the -m31 -mzarch options the generated code still
+       conforms to the 32-bit ABI but uses the general purpose registers
+       as 64-bit registers internally. This requires a Linux kernel saving
+       the whole 64-bit registers when doing a context switch. Kernels
+       providing that feature indicate that by the 'highgprs' string in
+       /proc/cpuinfo.
+     * The SSA loop prefetching pass is enabled when using -O3.
+
+  SPARC
+
+     * GCC now supports the LEON series of SPARC V8 processors. The code
+       generated by the compiler can either be tuned to it by means of the
+       --with-tune=leon configure option and -mtune=leon compilation
+       option, or the compiler can be built for the sparc-leon-{elf,linux}
+       and sparc-leon3-{elf,linux} targets directly.
+     * GCC has stopped sign/zero-extending parameter registers in the
+       callee for functions taking parameters with sub-word size in 32-bit
+       mode, since this is redundant with the specification of the ABI.
+       GCC has never done so in 64-bit mode since this is also redundant.
+     * The command line option -mfix-at697f has been added to enable the
+       documented workaround for the single erratum of the Atmel AT697F
+       processor.
+
+Operating Systems
+
+  Android
+
+     * GCC now supports the Bionic C library and provides a convenient way
+       of building native libraries and applications for the Android
+       platform. Refer to the documentation of the -mandroid and -mbionic
+       options for details on building native code. At the moment, Android
+       support is enabled only for ARM.
+
+  Darwin/Mac OS X
+
+     * General
+          + Initial support for CFString types has been added.
+            This allows GCC to build projects including the system Core
+            Foundation frameworks. The GCC Objective-C family supports
+            CFString "toll-free bridged" as per the Mac OS X system tools.
+            CFString is also recognized in the context of format
+            attributes and arguments (see the documentation for format
+            attributes for limitations). At present, 8-bit character types
+            are supported.
+          + Object file size reduction.
+            The Darwin zeroed memory allocators have been re-written to
+            make more use of .zerofill sections. For non-debug code, this
+            can reduce object file size significantly.
+          + Objective-C family 64-bit support (NeXT ABI 2).
+            Initial support has been added to support 64-bit Objective-C
+            code using the Darwin/OS X native (NeXT) runtime. ABI version
+            2 will be selected automatically when 64-bit code is built.
+          + Objective-C family 32-bit ABI 1.
+            For 32-bit code ABI 1 is also now also allowed. At present it
+            must be selected manually using -fobjc-abi-version=1 where
+            applicable - i.e. on Darwin 9/10 (OS X 10.5/10.6).
+     * x86 Architecture
+          + The -mdynamic-no-pic option has been enabled.
+            Code supporting -mdynamic-no-pic optimization has been added
+            and is applicable to -m32 builds. The compiler bootstrap uses
+            the option where appropriate.
+          + The default value for -mtune= has been changed.
+            Since Darwin systems are primarily Xeon, Core-2 or similar the
+            default tuning has been changed to -mtune=core2.
+          + Enable 128-bit long double (__float128) support on Darwin.
+     * PPC Architecture
+          + Darwin64 ABI.
+            Several significant bugs have been fixed, such that GCC now
+            produces code compatible with the Darwin64 PowerPC ABI.
+          + libffi and boehm-gc.
+            The Darwin ports of the libffi and boehm-gc libraries have
+            been upgraded to include a Darwin64 implementation. This means
+            that powerpc*-*-darwin9 platforms may now, for example, build
+            Java applications with -m64 enabled.
+          + Plug-in support has been enabled.
+          + The -fsection-anchors option is now available although,
+            presently, not heavily tested.
+
+  Solaris 2
+
+    New Features
+
+     * Support symbol versioning with the Sun linker.
+     * Allow libstdc++ to leverage full ISO C99 support on Solaris 10+.
+     * Support thread-local storage (TLS) with the Sun assembler on
+       Solaris 2/x86.
+     * Support TLS on Solaris 8/9 if prerequisites are met.
+     * Support COMDAT group with the GNU assembler and recent Sun linker.
+     * Support the Sun assembler visibility syntax.
+     * Default Solaris 2/x86 to -march=pentium4 (Solaris 10+) resp.
+       -march=pentiumpro (Solaris 8/9).
+     * Don't use SSE on Solaris 8/9 x86 by default.
+     * Enable 128-bit long double (__float128) support on Solaris 2/x86.
+
+    ABI Change
+
+     * Change the ABI for returning 8-byte vectors like __m64 in MMX
+       registers on Solaris 10+/x86 to match the Sun Studio 12.1+
+       compilers. This is an incompatible change. If you use such types,
+       you must either recompile all your code with the new compiler or
+       use the new -mvect8-ret-in-mem option to remain compatible with
+       previous versions of GCC and Sun Studio.
+
+  Windows x86/x86_64
+
+     * Initial support for decimal floating point.
+     * Support for the __thiscall calling-convention.
+     * Support for hot-patchable function prologues via the
+       ms_hook_prologue attribute for x86_64 in addition to 32-bit x86.
+     * Improvements of stack-probing and stack-allocation mechanisms.
+     * Support of push/pop-macro pragma as preprocessor command.
+       With #pragma push_macro("macro-name") the current definition of
+       macro-name is saved and can be restored with #pragma
+       pop_macro("macro-name") to its saved definition.
+     * Enable 128-bit long double (__float128) support on MinGW and
+       Cygwin.
+
+Other significant improvements
+
+  Installation changes
+
+     * An install-strip make target is provided that installs stripped
+       executables, and may install libraries with unneeded or debugging
+       sections stripped.
+     * On Power7 systems, there is a potential problem if you build the
+       GCC compiler with a host compiler using options that enable the VSX
+       instruction set generation. If the host compiler has been patched
+       so that the vec_ld and vec_st builtin functions generate Altivec
+       memory instructions instead of VSX memory instructions, then you
+       should be able to build the compiler with VSX instruction
+       generation.
+
+Changes for GCC Developers
+
+   Note: these changes concern developers that develop GCC itself or
+   software that integrates with GCC, such as plugins, and not the general
+   GCC users.
+     * The gengtype utility, which previously was internal to the GCC
+       build process, has been enchanced to provide GC root information
+       for plugins as necessary.
+     * The old GC allocation interface of ggc_alloc and friends was
+       replaced with a type-safe alternative.
+
+GCC 4.6.1
+
+   This is the [20]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.6.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.6.2
+
+   This is the [21]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.6.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.6.3
+
+   This is the [22]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.6.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.6.4
+
+   This is the [23]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.6.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [24]GCC manuals. If that fails, the
+    [25]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [26]gcc@gcc.gnu.org. All of [27]our lists have public
+    archives.
+
+   Copyright (C) [28]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [29]maintained by the GCC team. Last modified
+   2014-12-06[30].
+
+References
+
+   1. http://sourceware.org/bugzilla/show_bug.cgi?id=10401
+   2. http://gcc.gnu.org/gcc-4.5/changes.html
+   3. http://gcc.gnu.org/gcc-4.5/changes.html#obsoleted
+   4. http://gcc.gnu.org/gcc-4.6/porting_to.html
+   5. http://gcc.gnu.org/projects/lto/whopr.pdf
+   6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
+   7. http://gcc.gnu.org/gcc-4.6/cxx0x_status.html
+   8. https://gcc.gnu.org/PR43145
+   9. https://gcc.gnu.org/PR43680
+  10. https://gcc.gnu.org/PR33558
+  11. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#253
+  12. https://gcc.gnu.org/onlinedocs/gcc-4.6.4/libstdc++/manual/manual/status.html#status.iso.200x
+  13. https://gcc.gnu.org/onlinedocs/libstdc++/manual/debug_mode.html
+  14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/debug.html#debug.races
+  15. https://gcc.gnu.org/onlinedocs/gcc/Preprocessor-Options.html
+  16. https://gcc.gnu.org/wiki/OOP
+  17. https://gcc.gnu.org/wiki/Coarray
+  18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcoarray_007d-233
+  19. http://golang.org/
+  20. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.6.1
+  21. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.6.2
+  22. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.6.3
+  23. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.6.4
+  24. https://gcc.gnu.org/onlinedocs/
+  25. mailto:gcc-help@gcc.gnu.org
+  26. mailto:gcc@gcc.gnu.org
+  27. https://gcc.gnu.org/lists.html
+  28. http://www.fsf.org/
+  29. https://gcc.gnu.org/about.html
+  30. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.5/index.html
+                             GCC 4.5 Release Series
+
+   Jul 2, 2012
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.5.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.5.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.5.4
+          Jul 2, 2012 ([2]changes)
+
+   GCC 4.5.3
+          Apr 28, 2011 ([3]changes)
+
+   GCC 4.5.2
+          Dec 16, 2010 ([4]changes)
+
+   GCC 4.5.1
+          Jul 31, 2010 ([5]changes)
+
+   GCC 4.5.0
+          April 14, 2010 ([6]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [7]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [8]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [9]GCC project
+   web site or contact the [10]GCC development mailing list.
+
+   To obtain GCC please use [11]our mirror sites or [12]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [13]GCC manuals. If that fails, the
+    [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
+    archives.
+
+   Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [18]maintained by the GCC team. Last modified
+   2014-06-28[19].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.5/changes.html
+   3. http://gcc.gnu.org/gcc-4.5/changes.html
+   4. http://gcc.gnu.org/gcc-4.5/changes.html
+   5. http://gcc.gnu.org/gcc-4.5/changes.html
+   6. http://gcc.gnu.org/gcc-4.5/changes.html
+   7. http://gcc.gnu.org/gcc-4.5/buildstat.html
+   8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   9. http://gcc.gnu.org/index.html
+  10. mailto:gcc@gcc.gnu.org
+  11. http://gcc.gnu.org/mirrors.html
+  12. http://gcc.gnu.org/svn.html
+  13. https://gcc.gnu.org/onlinedocs/
+  14. mailto:gcc-help@gcc.gnu.org
+  15. mailto:gcc@gcc.gnu.org
+  16. https://gcc.gnu.org/lists.html
+  17. http://www.fsf.org/
+  18. https://gcc.gnu.org/about.html
+  19. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.5/changes.html
+                             GCC 4.5 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * GCC now requires the [1]MPC library in order to build. See the
+       [2]prerequisites page for version requirements.
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.5.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       The following ports for individual systems on particular
+       architectures have been obsoleted:
+          + IRIX releases before 6.5 (mips-sgi-irix5*,
+            mips-sgi-irix6.[0-4])
+          + Solaris 7 (*-*-solaris2.7)
+          + Tru64 UNIX releases before V5.1 (alpha*-dec-osf4*,
+            alpha-dec-osf5.0*)
+          + Details for the IRIX, Solaris 7, and Tru64 UNIX obsoletions
+            can be found in the [3]announcement.
+       Support for the classic POWER architecture implemented in the
+       original RIOS and RIOS2 processors of the old IBM RS/6000 product
+       line has been obsoleted in the rs6000 port. This does not affect
+       the new generation Power and PowerPC architectures.
+     * Support has been removed for all the [4]configurations obsoleted in
+       GCC 4.4.
+     * Support has been removed for the protoize and unprotoize utilities,
+       obsoleted in GCC 4.4.
+     * Support has been removed for tuning for Itanium1 (Merced) variants.
+       Note that code tuned for Itanium2 should also run correctly on
+       Itanium1.
+     * GCC now generates unwind info also for epilogues. DWARF debuginfo
+       generated by GCC now uses more features of DWARF3 than before, and
+       also some DWARF4 features. GDB older than 7.0 is not able to handle
+       either of these, so to debug GCC 4.5 generated binaries or
+       libraries GDB 7.0 or later is needed. You can disable use of DWARF4
+       features with the -gdwarf-3 -gstrict-dwarf options, or use
+       -gdwarf-2 -gstrict-dwarf to restrict GCC to just DWARF2, but
+       epilogue unwind info is emitted unconditionally whenever unwind
+       info is emitted.
+     * On x86 targets, code containing floating-point calculations may run
+       significantly slower when compiled with GCC 4.5 in strict C99
+       conformance mode than they did with earlier GCC versions. This is
+       due to stricter standard conformance of the compiler and can be
+       avoided by using the option -fexcess-precision=fast; also see
+       [5]below.
+     * The function attribute noinline no longer prevents GCC from cloning
+       the function. A new attribute noclone has been introduced for this
+       purpose. Cloning a function means that it is duplicated and the new
+       copy is specialized for certain contexts (for example when a
+       parameter is a known constant).
+
+General Optimizer Improvements
+
+     * The -save-temps now takes an optional argument. The -save-temps and
+       -save-temps=cwd switches write the temporary files in the current
+       working directory based on the original source file. The
+       -save-temps=obj switch will write files into the directory
+       specified with the -o option, and the intermediate filenames are
+       based on the output file. This will allow the user to get the
+       compiler intermediate files when doing parallel builds without two
+       builds of the same filename located in different directories from
+       interfering with each other.
+     * Debugging dumps are now created in the same directory as the object
+       file rather than in the current working directory. This allows the
+       user to get debugging dumps when doing parallel builds without two
+       builds of the same filename interfering with each other.
+     * GCC has been integrated with the [6]MPC library. This allows GCC to
+       evaluate complex arithmetic at compile time [7]more accurately. It
+       also allows GCC to evaluate calls to complex built-in math
+       functions having constant arguments and replace them at compile
+       time with their mathematically equivalent results. In doing so, GCC
+       can generate correct results regardless of the math library
+       implementation or floating point precision of the host platform.
+       This also allows GCC to generate identical results regardless of
+       whether one compiles in native or cross-compile configurations to a
+       particular target. The following built-in functions take advantage
+       of this new capability: cacos, cacosh, casin, casinh, catan,
+       catanh, ccos, ccosh, cexp, clog, cpow, csin, csinh, csqrt, ctan,
+       and ctanh. The float and long double variants of these functions
+       (e.g. csinf and csinl) are also handled.
+     * A new link-time optimizer has been added ([8]-flto). When this
+       option is used, GCC generates a bytecode representation of each
+       input file and writes it to specially-named sections in each object
+       file. When the object files are linked together, all the function
+       bodies are read from these named sections and instantiated as if
+       they had been part of the same translation unit. This enables
+       interprocedural optimizations to work across different files (and
+       even different languages), potentially improving the performance of
+       the generated code. To use the link-timer optimizer, -flto needs to
+       be specified at compile time and during the final link. If the
+       program does not require any symbols to be exported, it is possible
+       to combine -flto and the experimental [9]-fwhopr with
+       [10]-fwhole-program to allow the interprocedural optimizers to use
+       more aggressive assumptions.
+     * The automatic parallelization pass was enhanced to support
+       parallelization of outer loops.
+     * Automatic parallelization can be enabled as part of Graphite. In
+       addition to -ftree-parallelize-loops=, specify
+       -floop-parallelize-all to enable the Graphite-based optimization.
+     * The infrastructure for optimizing based on [11]restrict qualified
+       pointers has been rewritten and should result in code generation
+       improvements. Optimizations based on restrict qualified pointers
+       are now also available when using -fno-strict-aliasing.
+     * There is a new optimization pass that attempts to change prototype
+       of functions to avoid unused parameters, pass only relevant parts
+       of structures and turn arguments passed by reference to arguments
+       passed by value when possible. It is enabled by -O2 and above as
+       well as -Os and can be manually invoked using the new command-line
+       switch -fipa-sra.
+     * GCC now optimize exception handling code. In particular cleanup
+       regions that are proved to not have any effect are optimized out.
+
+New Languages and Language specific improvements
+
+  All languages
+
+     * The -fshow-column option is now on by default. This means error
+       messages now have a column associated with them.
+
+  Ada
+
+     * Compilation of programs heavily using discriminated record types
+       with variant parts has been sped up and generates more compact
+       code.
+     * Stack checking now works reasonably well on most plaforms. In some
+       specific cases, stack overflows may still fail to be detected, but
+       a compile-time warning will be issued for these cases.
+
+  C family
+
+     * If a header named in a #include directive is not found, the
+       compiler exits immediately. This avoids a cascade of errors arising
+       from declarations expected to be found in that header being
+       missing.
+     * A new built-in function __builtin_unreachable() has been added that
+       tells the compiler that control will never reach that point. It may
+       be used after asm statements that terminate by transferring control
+       elsewhere, and in other places that are known to be unreachable.
+     * The -Wlogical-op option now warns for logical expressions such as
+       (c == 1 && c == 2) and (c != 1 || c != 2), which are likely to be
+       mistakes. This option is disabled by default.
+     * An asm goto feature has been added to allow asm statements that
+       jump to C labels.
+     * C++0x raw strings are supported for C++ and for C with -std=gnu99.
+     * The deprecated attribute now takes an optional string argument, for
+       example, __attribute__((deprecated("text string"))), that will be
+       printed together with the deprecation warning.
+
+  C
+
+     * The -Wenum-compare option, which warns when comparing values of
+       different enum types, now works for C. It formerly only worked for
+       C++. This warning is enabled by -Wall. It may be avoided by using a
+       type cast.
+     * The -Wcast-qual option now warns about casts which are unsafe in
+       that they permit const-correctness to be violated without further
+       warnings. Specifically, it warns about cases where a qualifier is
+       added when all the lower types are not const. For example, it warns
+       about a cast from char ** to const char **.
+     * The -Wc++-compat option is significantly improved. It issues new
+       warnings for:
+          + Using C++ reserved operator names as identifiers.
+          + Conversions to enum types without explicit casts.
+          + Using va_arg with an enum type.
+          + Using different enum types in the two branches of ?:.
+          + Using ++ or -- on a variable of enum type.
+          + Using the same name as both a struct, union or enum tag and a
+            typedef, unless the typedef refers to the tagged type itself.
+          + Using a struct, union, or enum which is defined within another
+            struct or union.
+          + A struct field defined using a typedef if there is a field in
+            the struct, or an enclosing struct, whose name is the typedef
+            name.
+          + Duplicate definitions at file scope.
+          + Uninitialized const variables.
+          + A global variable with an anonymous struct, union, or enum
+            type.
+          + Using a string constant to initialize a char array whose size
+            is the length of the string.
+     * The new -Wjump-misses-init option warns about cases where a goto or
+       switch skips the initialization of a variable. This sort of branch
+       is an error in C++ but not in C. This warning is enabled by
+       -Wc++-compat.
+     * GCC now ensures that a C99-conforming <stdint.h> is present on most
+       targets, and uses information about the types in this header to
+       implement the Fortran bindings to those types. GCC does not ensure
+       the presence of such a header, and does not implement the Fortran
+       bindings, on the following targets: NetBSD, VxWorks, VMS,
+       SymbianOS, WinCE, LynxOS, Netware, QNX, Interix, TPF.
+     * GCC now implements C90- and C99-conforming rules for constant
+       expressions. This may cause warnings or errors for some code using
+       expressions that can be folded to a constant but are not constant
+       expressions as defined by ISO C.
+     * All known target-independent C90 and C90 Amendment 1 conformance
+       bugs, and all known target-independent C99 conformance bugs not
+       related to floating point or extended identifiers, have been fixed.
+     * The C decimal floating point support now includes support for the
+       FLOAT_CONST_DECIMAL64 pragma.
+     * The named address space feature from ISO/IEC TR 18037 is now
+       supported. This is currently only implemented for the SPU
+       processor.
+
+  C++
+
+     * Improved [12]experimental support for the upcoming C++0x ISO C++
+       standard, including support for raw strings, lambda expressions and
+       explicit type conversion operators.
+     * When printing the name of a class template specialization, G++ will
+       now omit any template arguments which come from default template
+       arguments. This behavior (and the pretty-printing of function
+       template specializations as template signature and arguments) can
+       be disabled with the -fno-pretty-templates option.
+     * Access control is now applied to typedef names used in a template,
+       which may cause G++ to reject some ill-formed code that was
+       accepted by earlier releases. The -fno-access-control option can be
+       used as a temporary workaround until the code is corrected.
+     * Compilation time for code that uses templates should now scale
+       linearly with the number of instantiations rather than
+       quadratically, as template instantiations are now looked up using
+       hash tables.
+     * Declarations of functions that look like builtin declarations of
+       library functions are only considered to be redeclarations if they
+       are declared with extern "C". This may cause problems with code
+       that omits extern "C" on hand-written declarations of C library
+       functions such as abort or memcpy. Such code is ill-formed, but was
+       accepted by earlier releases.
+     * Diagnostics that used to complain about passing non-POD types to
+       ... or jumping past the declaration of a non-POD variable now check
+       for triviality rather than PODness, as per C++0x.
+     * In C++0x mode local and anonymous classes are now allowed as
+       template arguments, and in declarations of variables and functions
+       with linkage, so long as any such declaration that is used is also
+       defined ([13]DR 757).
+     * Labels may now have attributes, as has been permitted for a while
+       in C. This is only permitted when the label definition and the
+       attribute specifier is followed by a semicolon—i.e., the label
+       applies to an empty statement. The only useful attribute for a
+       label is unused.
+     * G++ now implements [14]DR 176. Previously G++ did not support using
+       the injected-class-name of a template base class as a type name,
+       and lookup of the name found the declaration of the template in the
+       enclosing scope. Now lookup of the name finds the
+       injected-class-name, which can be used either as a type or as a
+       template, depending on whether or not the name is followed by a
+       template argument list. As a result of this change, some code that
+       was previously accepted may be ill-formed because
+         1. The injected-class-name is not accessible because it's from a
+            private base, or
+         2. The injected-class-name cannot be used as an argument for a
+            template template parameter.
+       In either of these cases, the code can be fixed by adding a
+       nested-name-specifier to explicitly name the template. The first
+       can be worked around with -fno-access-control; the second is only
+       rejected with -pedantic.
+     * A new standard mangling for SIMD vector types has been added, to
+       avoid name clashes on systems with vectors of varying length. By
+       default the compiler still uses the old mangling, but emits aliases
+       with the new mangling on targets that support strong aliases. Users
+       can switch over entirely to the new mangling with -fabi-version=4
+       or -fabi-version=0. -Wabi will now warn about code that uses the
+       old mangling.
+     * The command-line option -ftemplate-depth-N is now written as
+       -ftemplate-depth=N and the old form is deprecated.
+     * Conversions between NULL and non-pointer types are now warned by
+       default. The new option -Wno-conversion-null disables these
+       warnings. Previously these warnings were only available when using
+       -Wconversion explicitly.
+
+    Runtime Library (libstdc++)
+
+     * Improved experimental support for the upcoming ISO C++ standard,
+       C++0x, including:
+          + Support for <future>, <functional>, and <random>.
+          + Existing facilities now exploit explicit operators and the
+            newly implemented core C++0x features.
+          + The header <cstdatomic> has been renamed to <atomic>.
+     * An experimental [15]profile mode has been added. This is an
+       implementation of many C++ standard library constructs with an
+       additional analysis layer that gives performance improvement advice
+       based on recognition of suboptimal usage patterns. For example,
+#include <vector>
+int main()
+{
+  std::vector<int> v;
+  for (int k = 0; k < 1024; ++k)
+    v.insert(v.begin(), k);
+}
+
+       When instrumented via the profile mode, can return suggestions
+       about the initial size and choice of the container used as follows:
+vector-to-list: improvement = 5: call stack = 0x804842c ...
+    : advice = change std::vector to std::list
+vector-size: improvement = 3: call stack = 0x804842c ...
+    : advice = change initial container size from 0 to 1024
+
+       These constructs can be substituted for the normal libstdc++
+       constructs on a piecemeal basis, or all existing components can be
+       transformed via the -D_GLIBCXX_PROFILE macro.
+     * [16]Support for decimal floating-point arithmetic (aka ISO C++ TR
+       24733) has been added. This support is in header file
+       <decimal/decimal>, uses namespace std::decimal, and includes
+       classes decimal32, decimal64, and decimal128.
+     * Sources have been audited for application of function attributes
+       nothrow, const, pure, and noreturn.
+     * Python pretty-printers have been added for many standard library
+       components that simplify the internal representation and present a
+       more intuitive view of components when used with
+       appropriately-advanced versions of GDB. For more information,
+       please consult the more [17]detailed description.
+     * The default behavior for comparing typeinfo names has changed, so
+       in <typeinfo>, __GXX_MERGED_TYPEINFO_NAMES now defaults to zero.
+     * The new -static-libstdc++ option directs g++ to link the C++
+       library statically, even if the default would normally be to link
+       it dynamically.
+
+  Fortran
+
+     * The COMMON default padding has been changed – instead of adding the
+       padding before a variable it is now added afterwards, which
+       increases the compatibility with other vendors and helps to obtain
+       the correct output in some cases. Cf. also the -falign-commons
+       option ([18]added in 4.4).
+     * The -finit-real= option now also supports the value snan for
+       signalling not-a-number; to be effective, one additionally needs to
+       enable trapping (e.g. via -ffpe-trap=). Note: Compile-time
+       optimizations can turn a signalling NaN into a quiet one.
+     * The new option -fcheck= has been added with the options bounds,
+       array-temps, do, pointer, and recursive. The bounds and array-temps
+       options are equivalent to -fbounds-check and
+       -fcheck-array-temporaries. The do option checks for invalid
+       modification of loop iteration variables, and the recursive option
+       tests for recursive calls to subroutines/functions which are not
+       marked as recursive. With pointer pointer association checks in
+       calls are performed; however, neither undefined pointers nor
+       pointers in expressions are handled. Using -fcheck=all enables all
+       these run-time checks.
+     * The run-time checking -fcheck=bounds now warns about invalid string
+       lengths of character dummy arguments. Additionally, more
+       compile-time checks have been added.
+     * The new option [19]-fno-protect-parens has been added; if set, the
+       compiler may reorder REAL and COMPLEX expressions without regard to
+       parentheses.
+     * GNU Fortran no longer links against libgfortranbegin. As before,
+       MAIN__ (assembler symbol name) is the actual Fortran main program,
+       which is invoked by the main function. However, main is now
+       generated and put in the same object file as MAIN__. For the time
+       being, libgfortranbegin still exists for backward compatibility.
+       For details see the new [20]Mixed-Language Programming chapter in
+       the manual.
+     * The I/O library was restructured for performance and cleaner code.
+     * Array assignments and WHERE are now run in parallel when OpenMP's
+       WORKSHARE is used.
+     * The experimental option -fwhole-file was added. The option allows
+       whole-file checking of procedure arguments and allows for better
+       optimizations. It can also be used with -fwhole-program, which is
+       now also supported in gfortran.
+     * More Fortran 2003 and Fortran 2008 mathematical functions can now
+       be used as initialization expressions.
+     * Some extended attributes such as STDCALL are now supported via the
+       [21]GCC$ compiler directive.
+     * For Fortran 77 compatibility: If -fno-sign-zero is used, the SIGN
+       intrinsic behaves now as if zero were always positive.
+     * For legacy compatibiliy: On Cygwin and MinGW, the special files
+       CONOUT$ and CONIN$ (and CONERR$ which maps to CONOUT$) are now
+       supported.
+     * Fortran 2003 support has been extended:
+          + Procedure-pointer function results and procedure-pointer
+            components (including PASS),
+          + allocatable scalars (experimental),
+          + DEFERRED type-bound procedures,
+          + the ERRMSG= argument of the ALLOCATE and DEALLOCATE statements
+            have been implemented.
+          + The ALLOCATE statement supports type-specs and the SOURCE=
+            argument.
+          + OPERATOR(*) and ASSIGNMENT(=) are now allowed as GENERIC
+            type-bound procedure (i.e. as type-bound operators).
+          + Rounding (ROUND=, RZ, ...) for output is now supported.
+          + The INT_FAST{8,16,32,64,128}_T kind type parameters of the
+            intrinsic module ISO_C_BINDING are now supported, except for
+            the targets listed above as ones where GCC does not have
+            <stdint.h> type information.
+          + Extensible derived types with type-bound procedure or
+            procedure pointer with PASS attribute now have to use CLASS in
+            line with the Fortran 2003 standard; the workaround to use
+            TYPE is no longer supported.
+          + [22]Experimental, incomplete support for polymorphism,
+            including CLASS, SELECT TYPE and dynamic dispatch of
+            type-bound procedure calls. Some features do not work yet such
+            as unlimited polymorphism (CLASS(*)).
+     * Fortran 2008 support has been extended:
+          + The OPEN statement now supports the NEWUNIT= option, which
+            returns a unique file unit, thus preventing inadvertent use of
+            the same unit in different parts of the program.
+          + Support for unlimited format items has been added.
+          + The INT{8,16,32} and REAL{32,64,128} kind type parameters of
+            the intrinsic module ISO_FORTRAN_ENV are now supported.
+          + Using complex arguments with TAN, SINH, COSH, TANH, ASIN,
+            ACOS, and ATAN is now possible; the functions ASINH, ACOSH,
+            and ATANH have been added (for real and complex arguments) and
+            ATAN(Y,X) is now an alias for ATAN2(Y,X).
+          + The BLOCK construct has been implemented.
+
+New Targets and Target Specific Improvements
+
+  AIX
+
+     * Full cross-toolchain support now available with GNU Binutils
+
+  ARM
+
+     * GCC now supports the Cortex-M0 and Cortex-A5 processors.
+     * GCC now supports the ARM v7E-M architecture.
+     * GCC now supports VFPv4-based FPUs and FPUs with
+       single-precision-only VFP.
+     * GCC has many improvements to optimization for other ARM processors,
+       including scheduling support for the integer pipeline on Cortex-A9.
+     * GCC now supports the IEEE 754-2008 half-precision floating-point
+       type, and a variant ARM-specific half-precision type. This type is
+       specified using __fp16, with the layout determined by
+       -mfp16-format. With appropriate -mfpu options, the Cortex-A9 and
+       VFPv4 half-precision instructions will be used.
+     * GCC now supports the variant of AAPCS that uses VFP registers for
+       parameter passing and return values.
+
+  AVR
+
+     * The -mno-tablejump option has been removed because it has the same
+       effect as the -fno-jump-tables option.
+     * Added support for these new AVR devices:
+          + ATmega8U2
+          + ATmega16U2
+          + ATmega32U2
+
+  IA-32/x86-64
+
+     * GCC now will set the default for -march= based on the configure
+       target.
+     * GCC now supports handling floating-point excess precision arising
+       from use of the x87 floating-point unit in a way that conforms to
+       ISO C99. This is enabled with -fexcess-precision=standard and with
+       standards conformance options such as -std=c99, and may be disabled
+       using -fexcess-precision=fast.
+     * Support for the Intel Atom processor is now available through the
+       -march=atom and -mtune=atom options.
+     * A new -mcrc32 option is now available to enable crc32 intrinsics.
+     * A new -mmovbe option is now available to enable GCC to use the
+       movbe instruction to implement __builtin_bswap32 and
+       __builtin_bswap64.
+     * SSE math now can be enabled by default at configure time with the
+       new --with-fpmath=sse option.
+     * There is a new intrinsic header file, <x86intrin.h>. It should be
+       included before using any IA-32/x86-64 intrinsics.
+     * Support for the XOP, FMA4, and LWP instruction sets for the AMD
+       Orochi processors are now available with the -mxop, -mfma4, and
+       -mlwp options.
+     * The -mabm option enables GCC to use the popcnt and lzcnt
+       instructions on AMD processors.
+     * The -mpopcnt option enables GCC to use the popcnt instructions on
+       both AMD and Intel processors.
+
+  M68K/ColdFire
+
+     * GCC now supports ColdFire 51xx, 5221x, 5225x, 52274, 52277, 5301x
+       and 5441x devices.
+     * GCC now supports thread-local storage (TLS) on M68K and ColdFire
+       processors.
+
+  MeP
+
+   Support has been added for the Toshiba Media embedded Processor (MeP,
+   or mep-elf) embedded target.
+
+  MIPS
+
+     * GCC now supports MIPS 1004K processors.
+     * GCC can now be configured with options --with-arch-32,
+       --with-arch-64, --with-tune-32 and --with-tune-64 to control the
+       default optimization separately for 32-bit and 64-bit modes.
+     * MIPS targets now support an alternative _mcount interface, in which
+       register $12 points to the function's save slot for register $31.
+       This interface is selected by the -mcount-ra-address option; see
+       the documentation for more details.
+     * GNU/Linux targets can now generate read-only .eh_frame sections.
+       This optimization requires GNU binutils 2.20 or above, and is only
+       available if GCC is configured with a suitable version of binutils.
+     * GNU/Linux targets can now attach special relocations to indirect
+       calls, so that the linker can turn them into direct jumps or
+       branches. This optimization requires GNU binutils 2.20 or later,
+       and is automatically selected if GCC is configured with an
+       appropriate version of binutils. It can be explicitly enabled or
+       disabled using the -mrelax-pic-calls command-line option.
+     * GCC now generates more heavily-optimized atomic operations on
+       Octeon processors.
+     * MIPS targets now support the -fstack-protector option.
+     * GCC now supports an -msynci option, which specifies that synci is
+       enough to flush the instruction cache, without help from the
+       operating system. GCC uses this information to optimize
+       automatically-generated cache flush operations, such as those used
+       for nested functions in C. There is also a --with-synci
+       configure-time option, which makes -msynci the default.
+     * GCC supports four new function attributes for interrupt handlers:
+       interrupt, use_shadow_register_set, keep_interrupts_masked and
+       use_debug_exception_return. See the documentation for more details
+       about these attributes.
+
+  RS/6000 (POWER/PowerPC)
+
+     * GCC now supports the Power ISA 2.06, which includes the VSX
+       instructions that add vector 64-bit floating point support, new
+       population count instructions, and conversions between floating
+       point and unsigned types.
+     * Support for the power7 processor is now available through the
+       -mcpu=power7 and -mtune=power7.
+     * GCC will now vectorize loops that contain simple math functions
+       like copysign when generating code for altivec or VSX targets.
+     * Support for the A2 processor is now available through the -mcpu=a2
+       and -mtune=a2 options.
+     * Support for the 476 processor is now available through the
+       -mcpu={476,476fp} and -mtune={476,476fp} options.
+     * Support for the e500mc64 processor is now available through the
+       -mcpu=e500mc64 and -mtune=e500mc64 options.
+     * GCC can now be configured with options --with-cpu-32,
+       --with-cpu-64, --with-tune-32 and --with-tune-64 to control the
+       default optimization separately for 32-bit and 64-bit modes.
+     * Starting with GCC 4.5.4, vectors of type vector long long or vector
+       long are passed and returned in the same method as other vectors
+       with the VSX instruction set. Previously the GCC compiler did not
+       adhere to the ABI for 128-bit vectors with 64-bit integer base
+       types (PR 48857). This is also fixed in the GCC 4.6.1 release.
+
+  RX
+
+   Support has been added for the Renesas RX Processor (rx-elf) target.
+
+Operating Systems
+
+  Windows (Cygwin and MinGW)
+
+     * GCC now installs all the major language runtime libraries as DLLs
+       when configured with the --enable-shared option.
+     * GCC now makes use of the new support for aligned common variables
+       in versions of binutils >= 2.20 to fix bugs in the support for SSE
+       data types.
+     * Improvements to the libffi support library increase the reliability
+       of code generated by GCJ on all Windows platforms. Libgcj is
+       enabled by default for the first time.
+     * Libtool improvements simplify installation by placing the generated
+       DLLs in the correct binaries directory.
+     * Numerous other minor bugfixes and improvements, and substantial
+       enhancements to the Fortran language support library.
+
+   >
+
+Other significant improvements
+
+  Plugins
+
+     * It is now possible to extend the compiler without having to modify
+       its source code. A new option -fplugin=file.so tells GCC to load
+       the shared object file.so and execute it as part of the compiler.
+       The internal documentation describes the details on how plugins can
+       interact with the compiler.
+
+  Installation changes
+
+     * The move to newer autotools changed default installation
+       directories and switches to control them: The --with-datarootdir,
+       --with-docdir, --with-pdfdir, and --with-htmldir switches are not
+       used any more. Instead, you can now use --datarootdir, --docdir,
+       --htmldir, and --pdfdir. The default installation directories have
+       changed as follows according to the GNU Coding Standards:
+
+       datarootdir read-only architecture-independent data root [PREFIX/share]
+       localedir   locale-specific message catalogs [DATAROOTDIR/locale]
+       docdir      documentation root [DATAROOTDIR/doc/PACKAGE]
+       htmldir     html documentation [DOCDIR]
+       dvidir      dvi documentation [DOCDIR]
+       pdfdir      pdf documentation [DOCDIR]
+       psdir       ps documentation [DOCDIR]
+       The following variables have new default values:
+
+       datadir read-only architecture-independent data [DATAROOTDIR]
+       infodir info documentation [DATAROOTDIR/info]
+       mandir  man documentation [DATAROOTDIR/man]
+
+GCC 4.5.1
+
+   This is the [23]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.5.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+  All languages
+
+     * GCC's new link-time optimizer ([24]-flto) now also works on a few
+       non-ELF targets:
+          + Cygwin (*-cygwin*)
+          + MinGW (*-mingw*)
+          + Darwin on x86-64 (x86_64-apple-darwin*)
+       LTO is not enabled by default for these targets. To enable LTO, you
+       should configure with the --enable-lto option.
+
+GCC 4.5.2
+
+   This is the [25]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.5.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.5.3
+
+   This is the [26]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.5.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   On the PowerPC compiler, the Altivec builtin functions vec_ld and
+   vec_st have been modified to generate the Altivec memory instructions
+   LVX and STVX, even if the -mvsx option is used. In the initial GCC 4.5
+   release, these builtin functions were changed to generate VSX memory
+   reference instructions instead of Altivec memory instructions, but
+   there are differences between the two instructions. If the VSX
+   instruction set is available, you can now use the new builtin functions
+   vec_vsx_ld and vec_vsx_st which always generates the VSX memory
+   instructions.
+
+GCC 4.5.4
+
+   This is the [27]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.5.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [28]GCC manuals. If that fails, the
+    [29]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [30]gcc@gcc.gnu.org. All of [31]our lists have public
+    archives.
+
+   Copyright (C) [32]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [33]maintained by the GCC team. Last modified
+   2014-12-06[34].
+
+References
+
+   1. http://www.multiprecision.org/
+   2. https://gcc.gnu.org/install/prerequisites.html
+   3. https://gcc.gnu.org/ml/gcc/2010-01/msg00510.html
+   4. http://gcc.gnu.org/gcc-4.4/changes.html#obsoleted
+   5. http://gcc.gnu.org/gcc-4.5/changes.html#x86
+   6. http://www.multiprecision.org/
+   7. https://gcc.gnu.org/PR30789
+   8. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
+   9. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhopr-802
+  10. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-fwhole-program-800
+  11. https://gcc.gnu.org/onlinedocs/gcc/Restricted-Pointers.html
+  12. http://gcc.gnu.org/gcc-4.5/cxx0x_status.html
+  13. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#757
+  14. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#176
+  15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/profile_mode.html
+  16. https://gcc.gnu.org/onlinedocs/libstdc++/manual/status.html#status.iso.tr24733
+  17. http://sourceware.org/gdb/wiki/STLSupport
+  18. http://gcc.gnu.org/gcc-4.4/changes.html
+  19. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html
+  20. https://gcc.gnu.org/onlinedocs/gfortran/Mixed-Language-Programming.html
+  21. https://gcc.gnu.org/onlinedocs/gfortran/GNU-Fortran-Compiler-Directives.html
+  22. https://gcc.gnu.org/wiki/OOP
+  23. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.5.1
+  24. https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#index-flto-801
+  25. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.5.2
+  26. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.5.3
+  27. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.5.4
+  28. https://gcc.gnu.org/onlinedocs/
+  29. mailto:gcc-help@gcc.gnu.org
+  30. mailto:gcc@gcc.gnu.org
+  31. https://gcc.gnu.org/lists.html
+  32. http://www.fsf.org/
+  33. https://gcc.gnu.org/about.html
+  34. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.4/index.html
+                             GCC 4.4 Release Series
+
+   March 13, 2012
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.4.7.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.4.6 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.4.7
+          March 13, 2012 ([2]changes)
+
+   GCC 4.4.6
+          April 16, 2011 ([3]changes)
+
+   GCC 4.4.5
+          October 1, 2010 ([4]changes)
+
+   GCC 4.4.4
+          April 29, 2010 ([5]changes)
+
+   GCC 4.4.3
+          January 21, 2010 ([6]changes)
+
+   GCC 4.4.2
+          October 15, 2009 ([7]changes)
+
+   GCC 4.4.1
+          July 22, 2009 ([8]changes)
+
+   GCC 4.4.0
+          April 21, 2009 ([9]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [10]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [11]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [12]GCC
+   project web site or contact the [13]GCC development mailing list.
+
+   To obtain GCC please use [14]our mirror sites or [15]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [16]GCC manuals. If that fails, the
+    [17]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [18]gcc@gcc.gnu.org. All of [19]our lists have public
+    archives.
+
+   Copyright (C) [20]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [21]maintained by the GCC team. Last modified
+   2014-06-28[22].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.4/changes.html
+   3. http://gcc.gnu.org/gcc-4.4/changes.html
+   4. http://gcc.gnu.org/gcc-4.4/changes.html
+   5. http://gcc.gnu.org/gcc-4.4/changes.html
+   6. http://gcc.gnu.org/gcc-4.4/changes.html
+   7. http://gcc.gnu.org/gcc-4.4/changes.html
+   8. http://gcc.gnu.org/gcc-4.4/changes.html
+   9. http://gcc.gnu.org/gcc-4.4/changes.html
+  10. http://gcc.gnu.org/gcc-4.4/buildstat.html
+  11. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  12. http://gcc.gnu.org/index.html
+  13. mailto:gcc@gcc.gnu.org
+  14. http://gcc.gnu.org/mirrors.html
+  15. http://gcc.gnu.org/svn.html
+  16. https://gcc.gnu.org/onlinedocs/
+  17. mailto:gcc-help@gcc.gnu.org
+  18. mailto:gcc@gcc.gnu.org
+  19. https://gcc.gnu.org/lists.html
+  20. http://www.fsf.org/
+  21. https://gcc.gnu.org/about.html
+  22. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.4/changes.html
+                             GCC 4.4 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 4.4 release series is [1]GCC 4.4.7.
+
+Caveats
+
+     * __builtin_stdarg_start has been completely removed from GCC.
+       Support for <varargs.h> had been deprecated since GCC 4.0. Use
+       __builtin_va_start as a replacement.
+     * Some of the errors issued by the C++ front end that could be
+       downgraded to warnings in previous releases by using -fpermissive
+       are now warnings by default. They can be converted into errors by
+       using -pedantic-errors.
+     * Use of the cpp assertion extension will now emit a warning when
+       -Wdeprecated or -pedantic is used. This extension has been
+       deprecated for many years, but never warned about.
+     * Packed bit-fields of type char were not properly bit-packed on many
+       targets prior to GCC 4.4. On these targets, the fix in GCC 4.4
+       causes an ABI change. For example there is no longer a 4-bit
+       padding between field a and b in this structure:
+    struct foo
+    {
+      char a:4;
+      char b:8;
+    } __attribute__ ((packed));
+       There is a new warning to help identify fields that are affected:
+    foo.c:5: note: Offset of packed bit-field 'b' has changed in GCC 4.4
+       The warning can be disabled with -Wno-packed-bitfield-compat.
+     * On ARM EABI targets, the C++ mangling of the va_list type has been
+       changed to conform to the current revision of the EABI. This does
+       not affect the libstdc++ library included with GCC.
+     * The SCOUNT and POS bits of the MIPS DSP control register are now
+       treated as global. Previous versions of GCC treated these fields as
+       call-clobbered instead.
+     * The MIPS port no longer recognizes the h asm constraint. It was
+       necessary to remove this constraint in order to avoid generating
+       unpredictable code sequences.
+       One of the main uses of the h constraint was to extract the high
+       part of a multiplication on 64-bit targets. For example:
+    asm ("dmultu\t%1,%2" : "=h" (result) : "r" (x), "r" (y));
+       You can now achieve the same effect using 128-bit types:
+    typedef unsigned int uint128_t __attribute__((mode(TI)));
+    result = ((uint128_t) x * y) >> 64;
+       The second sequence is better in many ways. For example, if x and y
+       are constants, the compiler can perform the multiplication at
+       compile time. If x and y are not constants, the compiler can
+       schedule the runtime multiplication better than it can schedule an
+       asm statement.
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.4.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       The following ports for individual systems on particular
+       architectures have been obsoleted:
+          + Generic a.out on IA32 and m68k (i[34567]86-*-aout*,
+            m68k-*-aout*)
+          + Generic COFF on ARM, H8300, IA32, m68k and SH (arm-*-coff*,
+            armel-*-coff*, h8300-*-*, i[34567]86-*-coff*, m68k-*-coff*,
+            sh-*-*). This does not affect other more specific targets
+            using the COFF object format on those architectures, or the
+            more specific H8300 and SH targets (h8300-*-rtems*,
+            h8300-*-elf*, sh-*-elf*, sh-*-symbianelf*, sh-*-linux*,
+            sh-*-netbsdelf*, sh-*-rtems*, sh-wrs-vxworks).
+          + 2BSD on PDP-11 (pdp11-*-bsd)
+          + AIX 4.1 and 4.2 on PowerPC (rs6000-ibm-aix4.[12]*,
+            powerpc-ibm-aix4.[12]*)
+          + Tuning support for Itanium1 (Merced) variants. Note that code
+            tuned for Itanium2 should also run correctly on Itanium1.
+     * The protoize and unprotoize utilities have been obsoleted and will
+       be removed in GCC 4.5. These utilities have not been installed by
+       default since GCC 3.0.
+     * Support has been removed for all the [2]configurations obsoleted in
+       GCC 4.3.
+     * Unknown -Wno-* options are now silently ignored by GCC if no other
+       diagnostics are issued. If other diagnostics are issued, then GCC
+       warns about the unknown options.
+     * More information on porting to GCC 4.4 from previous versions of
+       GCC can be found in the [3]porting guide for this release.
+
+General Optimizer Improvements
+
+     * A new command-line switch -findirect-inlining has been added. When
+       turned on it allows the inliner to also inline indirect calls that
+       are discovered to have known targets at compile time thanks to
+       previous inlining.
+     * A new command-line switch -ftree-switch-conversion has been added.
+       This new pass turns simple initializations of scalar variables in
+       switch statements into initializations from a static array, given
+       that all the values are known at compile time and the ratio between
+       the new array size and the original switch branches does not exceed
+       the parameter --param switch-conversion-max-branch-ratio (default
+       is eight).
+     * A new command-line switch -ftree-builtin-call-dce has been added.
+       This optimization eliminates unnecessary calls to certain builtin
+       functions when the return value is not used, in cases where the
+       calls can not be eliminated entirely because the function may set
+       errno. This optimization is on by default at -O2 and above.
+     * A new command-line switch -fconserve-stack directs the compiler to
+       minimize stack usage even if it makes the generated code slower.
+       This affects inlining decisions.
+     * When the assembler supports it, the compiler will now emit unwind
+       information using assembler .cfi directives. This makes it possible
+       to use such directives in inline assembler code. The new option
+       -fno-dwarf2-cfi-asm directs the compiler to not use .cfi
+       directives.
+     * The [4]Graphite branch has been merged. This merge has brought in a
+       new framework for loop optimizations based on a polyhedral
+       intermediate representation. These optimizations apply to all the
+       languages supported by GCC. The following new code transformations
+       are available in GCC 4.4:
+          + -floop-interchange performs loop interchange transformations
+            on loops. Interchanging two nested loops switches the inner
+            and outer loops. For example, given a loop like:
+          DO J = 1, M
+            DO I = 1, N
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+
+            loop interchange will transform the loop as if the user had
+            written:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+
+            which can be beneficial when N is larger than the caches,
+            because in Fortran, the elements of an array are stored in
+            memory contiguously by column, and the original loop iterates
+            over rows, potentially creating at each access a cache miss.
+          + -floop-strip-mine performs loop strip mining transformations
+            on loops. Strip mining splits a loop into two nested loops.
+            The outer loop has strides equal to the strip size and the
+            inner loop has strides of the original loop within a strip.
+            For example, given a loop like:
+          DO I = 1, N
+            A(I) = A(I) + C
+          ENDDO
+
+            loop strip mining will transform the loop as if the user had
+            written:
+          DO II = 1, N, 4
+            DO I = II, min (II + 3, N)
+              A(I) = A(I) + C
+            ENDDO
+          ENDDO
+
+          + -floop-block performs loop blocking transformations on loops.
+            Blocking strip mines each loop in the loop nest such that the
+            memory accesses of the element loops fit inside caches. For
+            example, given a loop like:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = B(I) + C(J)
+            ENDDO
+          ENDDO
+
+            loop blocking will transform the loop as if the user had
+            written:
+          DO II = 1, N, 64
+            DO JJ = 1, M, 64
+              DO I = II, min (II + 63, N)
+                DO J = JJ, min (JJ + 63, M)
+                  A(J, I) = B(I) + C(J)
+                ENDDO
+              ENDDO
+            ENDDO
+          ENDDO
+
+            which can be beneficial when M is larger than the caches,
+            because the innermost loop will iterate over a smaller amount
+            of data that can be kept in the caches.
+     * A new register allocator has replaced the old one. It is called
+       integrated register allocator (IRA) because coalescing, register
+       live range splitting, and hard register preferencing are done
+       on-the-fly during coloring. It also has better integration with the
+       reload pass. IRA is a regional register allocator which uses modern
+       Chaitin-Briggs coloring instead of Chow's priority coloring used in
+       the old register allocator. More info about IRA internals and
+       options can be found in the GCC manuals.
+     * A new instruction scheduler and software pipeliner, based on the
+       selective scheduling approach, has been added. The new pass
+       performs instruction unification, register renaming, substitution
+       through register copies, and speculation during scheduling. The
+       software pipeliner is able to pipeline non-countable loops. The new
+       pass is targeted at scheduling-eager in-order platforms. In GCC 4.4
+       it is available for the Intel Itanium platform working by default
+       as the second scheduling pass (after register allocation) at the
+       -O3 optimization level.
+     * When using -fprofile-generate with a multi-threaded program, the
+       profile counts may be slightly wrong due to race conditions. The
+       new -fprofile-correction option directs the compiler to apply
+       heuristics to smooth out the inconsistencies. By default the
+       compiler will give an error message when it finds an inconsistent
+       profile.
+     * The new -fprofile-dir=PATH option permits setting the directory
+       where profile data files are stored when using -fprofile-generate
+       and friends, and the directory used when reading profile data files
+       using -fprofile-use and friends.
+
+New warning options
+
+     * The new -Wframe-larger-than=NUMBER option directs GCC to emit a
+       warning if any stack frame is larger than NUMBER bytes. This may be
+       used to help ensure that code fits within a limited amount of stack
+       space.
+     * The command-line option -Wlarger-than-N is now written as
+       -Wlarger-than=N and the old form is deprecated.
+     * The new -Wno-mudflap option disables warnings about constructs
+       which can not be instrumented when using -fmudflap.
+
+New Languages and Language specific improvements
+
+     * Version 3.0 of the [5]OpenMP specification is now supported for the
+       C, C++, and Fortran compilers.
+     * New character data types, per [6]TR 19769: New character types in
+       C, are now supported for the C compiler in -std=gnu99 mode, as
+       __CHAR16_TYPE__ and __CHAR32_TYPE__, and for the C++ compiler in
+       -std=c++0x and -std=gnu++0x modes, as char16_t and char32_t too.
+
+  C family
+
+     * A new optimize attribute was added to allow programmers to change
+       the optimization level and particular optimization options for an
+       individual function. You can also change the optimization options
+       via the GCC optimize pragma for functions defined after the pragma.
+       The GCC push_options pragma and the GCC pop_options pragma allow
+       you temporarily save and restore the options used. The GCC
+       reset_options pragma restores the options to what was specified on
+       the command line.
+     * Uninitialized warnings do not require enabling optimization
+       anymore, that is, -Wuninitialized can be used together with -O0.
+       Nonetheless, the warnings given by -Wuninitialized will probably be
+       more accurate if optimization is enabled.
+     * -Wparentheses now warns about expressions such as (!x | y) and (!x
+       & y). Using explicit parentheses, such as in ((!x) | y), silences
+       this warning.
+     * -Wsequence-point now warns within if, while,do while and for
+       conditions, and within for begin/end expressions.
+     * A new option -dU is available to dump definitions of preprocessor
+       macros that are tested or expanded.
+
+  C++
+
+     * [7]Improved experimental support for the upcoming ISO C++ standard,
+       C++0x. Including support for auto, inline namespaces, generalized
+       initializer lists, defaulted and deleted functions, new character
+       types, and scoped enums.
+     * Those errors that may be downgraded to warnings to build legacy
+       code now mention -fpermissive when -fdiagnostics-show-option is
+       enabled.
+     * -Wconversion now warns if the result of a static_cast to enumeral
+       type is unspecified because the value is outside the range of the
+       enumeral type.
+     * -Wuninitialized now warns if a non-static reference or non-static
+       const member appears in a class without constructors.
+     * G++ now properly implements value-initialization, so objects with
+       an initializer of () and an implicitly defined default constructor
+       will be zero-initialized before the default constructor is called.
+
+    Runtime Library (libstdc++)
+
+     * Improved experimental support for the upcoming ISO C++ standard,
+       C++0x, including:
+          + Support for <chrono>, <condition_variable>, <cstdatomic>,
+            <forward_list>, <initializer_list>, <mutex>, <ratio>,
+            <system_error>, and <thread>.
+          + unique_ptr, <algorithm> additions, exception propagation, and
+            support for the new character types in <string> and <limits>.
+          + Existing facilities now exploit initializer lists, defaulted
+            and deleted functions, and the newly implemented core C++0x
+            features.
+          + Some standard containers are more efficient together with
+            stateful allocators, i.e., no allocator is constructed on the
+            fly at element construction time.
+     * Experimental support for non-standard pointer types in containers.
+     * The long standing libstdc++/30928 has been fixed for targets
+       running glibc 2.10 or later.
+     * As usual, many small and larger bug fixes, in particular quite a
+       few corner cases in <locale>.
+
+  Fortran
+
+     * GNU Fortran now employs libcpp directly instead of using cc1 as an
+       external preprocessor. The [8]-cpp option was added to allow manual
+       invocation of the preprocessor without relying on filename
+       extensions.
+     * The [9]-Warray-temporaries option warns about array temporaries
+       generated by the compiler, as an aid to optimization.
+     * The [10]-fcheck-array-temporaries option has been added, printing a
+       notification at run time, when an array temporary had to be created
+       for an function argument. Contrary to -Warray-temporaries the
+       warning is only printed if the array is noncontiguous.
+     * Improved generation of DWARF debugging symbols
+     * If using an intrinsic not part of the selected standard (via -std=
+       and -fall-intrinsics) gfortran will now treat it as if this
+       procedure were declared EXTERNAL and try to link to a user-supplied
+       procedure. -Wintrinsics-std will warn whenever this happens. The
+       now-useless option -Wnonstd-intrinsic was removed.
+     * The flag -falign-commons has been added to control the alignment of
+       variables in COMMON blocks, which is enabled by default in line
+       with previous GCC version. Using -fno-align-commons one can force
+       commons to be contiguous in memory as required by the Fortran
+       standard, however, this slows down the memory access. The option
+       -Walign-commons, which is enabled by default, warns when padding
+       bytes were added for alignment. The proper solution is to sort the
+       common objects by decreasing storage size, which avoids the
+       alignment problems.
+     * Fortran 2003 support has been extended:
+          + Wide characters (ISO 10646, UCS-4, kind=4) and UTF-8 I/O is
+            now supported (except internal reads from/writes to wide
+            strings). [11]-fbackslash now supports also \unnnn and
+            \Unnnnnnnn to enter Unicode characters.
+          + Asynchronous I/O (implemented as synchronous I/O) and the
+            decimal=, size=, sign=, pad=, blank=, and delim= specifiers
+            are now supported in I/O statements.
+          + Support for Fortran 2003 structure constructors and for array
+            constructor with typespec has been added.
+          + Procedure Pointers (but not yet as component in derived types
+            and as function results) are now supported.
+          + Abstract types, type extension, and type-bound procedures
+            (both PROCEDURE and GENERIC but not as operators). Note: As
+            CLASS/polymorphyic types are not implemented, type-bound
+            procedures with PASS accept as non-standard extension TYPE
+            arguments.
+     * Fortran 2008 support has been added:
+          + The -std=f2008 option and support for the file extensions
+            .f2008 and .F2008 has been added.
+          + The g0 format descriptor is now supported.
+          + The Fortran 2008 mathematical intrinsics ASINH, ACOSH, ATANH,
+            ERF, ERFC, GAMMA, LOG_GAMMA, BESSEL_*, HYPOT, and ERFC_SCALED
+            are now available (some of them existed as GNU extension
+            before). Note: The hyperbolic functions are not yet supporting
+            complex arguments and the three- argument version of BESSEL_*N
+            is not available.
+          + The bit intrinsics LEADZ and TRAILZ have been added.
+
+  Java (GCJ)
+
+  Ada
+
+     * The Ada runtime now supports multilibs on many platforms including
+       x86_64, SPARC and PowerPC. Their build is enabled by default.
+
+New Targets and Target Specific Improvements
+
+  ARM
+
+     * GCC now supports optimizing for the Cortex-A9, Cortex-R4 and
+       Cortex-R4F processors and has many other improvements to
+       optimization for ARM processors.
+     * GCC now supports the VFPv3 variant with 16 double-precision
+       registers with -mfpu=vfpv3-d16. The option -mfpu=vfp3 has been
+       renamed to -mfpu=vfpv3.
+     * GCC now supports the -mfix-cortex-m3-ldrd option to work around an
+       erratum on Cortex-M3 processors.
+     * GCC now supports the __sync_* atomic operations for ARM EABI
+       GNU/Linux.
+     * The section anchors optimization is now enabled by default when
+       optimizing for ARM.
+     * GCC now uses a new EABI-compatible profiling interface for EABI
+       targets. This requires a function __gnu_mcount_nc, which is
+       provided by GNU libc versions 2.8 and later.
+
+  AVR
+
+     * The -mno-tablejump option has been deprecated because it has the
+       same effect as the -fno-jump-tables option.
+     * Added support for these new AVR devices:
+          + ATA6289
+          + ATtiny13A
+          + ATtiny87
+          + ATtiny167
+          + ATtiny327
+          + ATmega8C1
+          + ATmega16C1
+          + ATmega32C1
+          + ATmega8M1
+          + ATmega16M1
+          + ATmega32M1
+          + ATmega32U4
+          + ATmega16HVB
+          + ATmega4HVD
+          + ATmega8HVD
+          + ATmega64C1
+          + ATmega64M1
+          + ATmega16U4
+          + ATmega32U6
+          + ATmega128RFA1
+          + AT90PWM81
+          + AT90SCR100
+          + M3000F
+          + M3000S
+          + M3001B
+
+  IA-32/x86-64
+
+     * Support for Intel AES built-in functions and code generation is
+       available via -maes.
+     * Support for Intel PCLMUL built-in function and code generation is
+       available via -mpclmul.
+     * Support for Intel AVX built-in functions and code generation is
+       available via -mavx.
+     * Automatically align the stack for local variables with alignment
+       requirement.
+     * GCC can now utilize the SVML library for vectorizing calls to a set
+       of C99 functions if -mveclibabi=svml is specified and you link to
+       an SVML ABI compatible library.
+     * On x86-64, the ABI has been changed in the following cases to
+       conform to the x86-64 ABI:
+          + Passing/returning structures with flexible array member:
+  struct foo
+    {
+      int i;
+      int flex[];
+    };
+          + Passing/returning structures with complex float member:
+  struct foo
+    {
+      int i;
+      __complex__ float f;
+    };
+          + Passing/returning unions with long double member:
+  union foo
+    {
+      int x;
+      long double ld;
+    };
+       Code built with previous versions of GCC that uses any of these is
+       not compatible with code built with GCC 4.4.0 or later.
+     * A new target attribute was added to allow programmers to change the
+       target options like -msse2 or -march=k8 for an individual function.
+       You can also change the target options via the GCC target pragma
+       for functions defined after the pragma.
+     * GCC can now be configured with options --with-arch-32,
+       --with-arch-64, --with-cpu-32, --with-cpu-64, --with-tune-32 and
+       --with-tune-64 to control the default optimization separately for
+       32-bit and 64-bit modes.
+
+  IA-32/IA64
+
+     * Support for __float128 (TFmode) IEEE quad type and corresponding
+       TCmode IEEE complex quad type is available via the soft-fp library
+       on IA-32/IA64 targets. This includes basic arithmetic operations
+       (addition, subtraction, negation, multiplication and division) on
+       __float128 real and TCmode complex values, the full set of IEEE
+       comparisons between __float128 values, conversions to and from
+       float, double and long double floating point types, as well as
+       conversions to and from signed or unsigned integer, signed or
+       unsigned long integer and signed or unsigned quad (TImode, IA64
+       only) integer types. Additionally, all operations generate the full
+       set of IEEE exceptions and support the full set of IEEE rounding
+       modes.
+
+  M68K/ColdFire
+
+     * GCC now supports instruction scheduling for ColdFire V1, V3 and V4
+       processors. (Scheduling support for ColdFire V2 processors was
+       added in GCC 4.3.)
+     * GCC now supports the -mxgot option to support programs requiring
+       many GOT entries on ColdFire.
+     * The m68k-*-linux-gnu target now builds multilibs by default.
+
+  MIPS
+
+     * MIPS Technologies have extended the original MIPS SVR4 ABI to
+       include support for procedure linkage tables (PLTs) and copy
+       relocations. These extensions allow GNU/Linux executables to use a
+       significantly more efficient code model than the one defined by the
+       original ABI.
+       GCC support for this code model is available via a new command-line
+       option, -mplt. There is also a new configure-time option,
+       --with-mips-plt, to make -mplt the default.
+       The new code model requires support from the assembler, the linker,
+       and the runtime C library. This support is available in binutils
+       2.19 and GLIBC 2.9.
+     * GCC can now generate MIPS16 code for 32-bit GNU/Linux executables
+       and 32-bit GNU/Linux shared libraries. This feature requires GNU
+       binutils 2.19 or above.
+     * Support for RMI's XLR processor is now available through the
+       -march=xlr and -mtune=xlr options.
+     * 64-bit targets can now perform 128-bit multiplications inline,
+       instead of relying on a libgcc function.
+     * Native GNU/Linux toolchains now support -march=native and
+       -mtune=native, which select the host processor.
+     * GCC now supports the R10K, R12K, R14K and R16K processors. The
+       canonical -march= and -mtune= names for these processors are
+       r10000, r12000, r14000 and r16000 respectively.
+     * GCC can now work around the side effects of speculative execution
+       on R10K processors. Please see the documentation of the
+       -mr10k-cache-barrier option for details.
+     * Support for the MIPS64 Release 2 instruction set has been added.
+       The option -march=mips64r2 enables generation of these
+       instructions.
+     * GCC now supports Cavium Networks' Octeon processor. This support is
+       available through the -march=octeon and -mtune=octeon options.
+     * GCC now supports STMicroelectronics' Loongson 2E/2F processors. The
+       canonical -march= and -mtune= names for these processors are
+       loongson2e and loongson2f.
+
+  picochip
+
+   Picochip is a 16-bit processor. A typical picoChip contains over 250
+   small cores, each with small amounts of memory. There are three
+   processor variants (STAN, MEM and CTRL) with different instruction sets
+   and memory configurations and they can be chosen using the -mae option.
+
+   This port is intended to be a "C" only port.
+
+  Power Architecture and PowerPC
+
+     * GCC now supports the e300c2, e300c3 and e500mc processors.
+     * GCC now supports Xilinx processors with a single-precision FPU.
+     * Decimal floating point is now supported for e500 processors.
+
+  S/390, zSeries and System z9/z10
+
+     * Support for the IBM System z10 EC/BC processor has been added. When
+       using the -march=z10 option, the compiler will generate code making
+       use of instructions provided by the General-Instruction-Extension
+       Facility and the Execute-Extension Facility.
+
+  VxWorks
+
+     * GCC now supports the thread-local storage mechanism used on
+       VxWorks.
+
+  Xtensa
+
+     * GCC now supports thread-local storage (TLS) for Xtensa processor
+       configurations that include the Thread Pointer option. TLS also
+       requires support from the assembler and linker; this support is
+       provided in the GNU binutils beginning with version 2.19.
+
+Documentation improvements
+
+Other significant improvements
+
+GCC 4.4.1
+
+   This is the [12]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.2
+
+   This is the [13]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.3
+
+   This is the [14]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.4
+
+   This is the [15]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.5
+
+   This is the [16]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.5 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.6
+
+   This is the [17]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.6 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.4.7
+
+   This is the [18]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.4.7 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [19]GCC manuals. If that fails, the
+    [20]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [21]gcc@gcc.gnu.org. All of [22]our lists have public
+    archives.
+
+   Copyright (C) [23]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [24]maintained by the GCC team. Last modified
+   2014-12-06[25].
+
+References
+
+   1. http://gcc.gnu.org/gcc-4.4/changes.html#4.4.7
+   2. http://gcc.gnu.org/gcc-4.3/changes.html#obsoleted
+   3. http://gcc.gnu.org/gcc-4.4/porting_to.html
+   4. https://gcc.gnu.org/wiki/Graphite
+   5. http://openmp.org/wp/openmp-specifications/
+   6. http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1040.pdf
+   7. http://gcc.gnu.org/gcc-4.4/cxx0x_status.html
+   8. https://gcc.gnu.org/onlinedocs/gfortran/Preprocessing-Options.html
+   9. https://gcc.gnu.org/onlinedocs/gfortran/Error-and-Warning-Options.html#index-g_t_0040code_007bWarray-temporaries_007d-125
+  10. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfcheck-array-temporaries_007d-221
+  11. https://gcc.gnu.org/onlinedocs/gfortran/Fortran-Dialect-Options.html#index-g_t_0040code_007bbackslash_007d-34
+  12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.1
+  13. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.2
+  14. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.3
+  15. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.4
+  16. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.5
+  17. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.6
+  18. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.4.7
+  19. https://gcc.gnu.org/onlinedocs/
+  20. mailto:gcc-help@gcc.gnu.org
+  21. mailto:gcc@gcc.gnu.org
+  22. https://gcc.gnu.org/lists.html
+  23. http://www.fsf.org/
+  24. https://gcc.gnu.org/about.html
+  25. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.3/index.html
+                             GCC 4.3 Release Series
+
+   Jun 27, 2011
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.3.6.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.3.5 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.3.6
+          Jun 27, 2011 ([2]changes)
+
+   GCC 4.3.5
+          May 22, 2010 ([3]changes)
+
+   GCC 4.3.4
+          August 4, 2009 ([4]changes)
+
+   GCC 4.3.3
+          January 24, 2009 ([5]changes)
+
+   GCC 4.3.2
+          August 27, 2008 ([6]changes)
+
+   GCC 4.3.1
+          June 6, 2008 ([7]changes)
+
+   GCC 4.3.0
+          March 5, 2008 ([8]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [9]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [10]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [11]GCC
+   project web site or contact the [12]GCC development mailing list.
+
+   To obtain GCC please use [13]our mirror sites or [14]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [15]GCC manuals. If that fails, the
+    [16]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [17]gcc@gcc.gnu.org. All of [18]our lists have public
+    archives.
+
+   Copyright (C) [19]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [20]maintained by the GCC team. Last modified
+   2014-06-28[21].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.3/changes.html
+   3. http://gcc.gnu.org/gcc-4.3/changes.html
+   4. http://gcc.gnu.org/gcc-4.3/changes.html
+   5. http://gcc.gnu.org/gcc-4.3/changes.html
+   6. http://gcc.gnu.org/gcc-4.3/changes.html
+   7. http://gcc.gnu.org/gcc-4.3/changes.html
+   8. http://gcc.gnu.org/gcc-4.3/changes.html
+   9. http://gcc.gnu.org/gcc-4.3/buildstat.html
+  10. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  11. http://gcc.gnu.org/index.html
+  12. mailto:gcc@gcc.gnu.org
+  13. http://gcc.gnu.org/mirrors.html
+  14. http://gcc.gnu.org/svn.html
+  15. https://gcc.gnu.org/onlinedocs/
+  16. mailto:gcc-help@gcc.gnu.org
+  17. mailto:gcc@gcc.gnu.org
+  18. https://gcc.gnu.org/lists.html
+  19. http://www.fsf.org/
+  20. https://gcc.gnu.org/about.html
+  21. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.3/changes.html
+                             GCC 4.3 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 4.3 release series is [1]GCC 4.3.5.
+
+Caveats
+
+     * GCC requires the [2]GMP and [3]MPFR libraries for building all the
+       various front-end languages it supports. See the [4]prerequisites
+       page for version requirements.
+     * ColdFire targets now treat long double as having the same format as
+       double. In earlier versions of GCC, they used the 68881 long double
+       format instead.
+     * The m68k-uclinux target now uses the same calling conventions as
+       m68k-linux-gnu. You can select the original calling conventions by
+       configuring for m68k-uclinuxoldabi instead. Note that
+       m68k-uclinuxoldabi also retains the original 80-bit long double on
+       ColdFire targets.
+     * The -fforce-mem option has been removed because it has had no
+       effect in the last few GCC releases.
+     * The i386 -msvr3-shlib option has been removed since it is no longer
+       used.
+     * Fastcall for i386 has been changed not to pass aggregate arguments
+       in registers, following Microsoft compilers.
+     * Support for the AOF assembler has been removed from the ARM back
+       end; this affects only the targets arm-semi-aof and armel-semi-aof,
+       which are no longer recognized. We removed these targets without a
+       deprecation period because we discovered that they have been
+       unusable since GCC 4.0.0.
+     * Support for the TMS320C3x/C4x processor (targets c4x-* and tic4x-*)
+       has been removed. This support had been deprecated since GCC 4.0.0.
+     * Support for a number of older systems and recently unmaintained or
+       untested target ports of GCC has been declared obsolete in GCC 4.3.
+       Unless there is activity to revive them, the next release of GCC
+       will have their sources permanently removed.
+       All GCC ports for the following processor architectures have been
+       declared obsolete:
+          + Morpho MT (mt-*)
+       The following aliases for processor architectures have been
+       declared obsolete. Users should use the indicated generic target
+       names instead, with compile-time options such as -mcpu or
+       configure-time options such as --with-cpu to control the
+       configuration more precisely.
+          + strongarm*-*-*, ep9312*-*-*, xscale*-*-* (use arm*-*-*
+            instead).
+          + parisc*-*-* (use hppa*-*-* instead).
+          + m680[012]0-*-* (use m68k-*-* instead).
+       All GCC ports for the following operating systems have been
+       declared obsolete:
+          + BeOS (*-*-beos*)
+          + kaOS (*-*-kaos*)
+          + GNU/Linux using the a.out object format (*-*-linux*aout*)
+          + GNU/Linux using version 1 of the GNU C Library
+            (*-*-linux*libc1*)
+          + Solaris versions before Solaris 7 (*-*-solaris2.[0-6],
+            *-*-solaris2.[0-6].*)
+          + Miscellaneous System V (*-*-sysv*)
+          + WindISS (*-*-windiss*)
+       Also, those for some individual systems on particular architectures
+       have been obsoleted:
+          + UNICOS/mk on DEC Alpha (alpha*-*-unicosmk*)
+          + CRIS with a.out object format (cris-*-aout)
+          + BSD 4.3 on PA-RISC (hppa1.1-*-bsd*)
+          + OSF/1 on PA-RISC (hppa1.1-*-osf*)
+          + PRO on PA-RISC (hppa1.1-*-pro*)
+          + Sequent PTX on IA32 (i[34567]86-sequent-ptx4*,
+            i[34567]86-sequent-sysv4*)
+          + SCO Open Server 5 on IA32 (i[34567]86-*-sco3.2v5*)
+          + UWIN on IA32 (i[34567]86-*-uwin*) (support for UWIN as a host
+            was previously [5]removed in 2001, leaving only the support
+            for UWIN as a target now being deprecated)
+          + ChorusOS on PowerPC (powerpc-*-chorusos*)
+          + All VAX configurations apart from NetBSD and OpenBSD
+            (vax-*-bsd*, vax-*-sysv*, vax-*-ultrix*)
+     * The [6]-Wconversion option has been modified. Its purpose now is to
+       warn for implicit conversions that may alter a value. This new
+       behavior is available for both C and C++. Warnings about
+       conversions between signed and unsigned integers can be disabled by
+       using -Wno-sign-conversion. In C++, they are disabled by default
+       unless -Wsign-conversion is explicitly requested. The old behavior
+       of -Wconversion, that is, warn for prototypes causing a type
+       conversion that is different from what would happen to the same
+       argument in the absence of a prototype, has been moved to a new
+       option -Wtraditional-conversion, which is only available for C.
+     * The -m386, -m486, -mpentium and -mpentiumpro tuning options have
+       been removed because they were deprecated for more than 3 GCC major
+       releases. Use -mtune=i386, -mtune=i486, -mtune=pentium or
+       -mtune=pentiumpro as a replacement.
+     * The -funsafe-math-optimizations option now automatically turns on
+       -fno-trapping-math in addition to -fno-signed-zeros, as it enables
+       reassociation and thus may introduce or remove traps.
+     * The -ftree-vectorize option is now on by default under -O3. In
+       order to generate code for a SIMD extension, it has to be enabled
+       as well: use -maltivec for PowerPC platforms and -msse/-msse2 for
+       i?86 and x86_64.
+     * More information on porting to GCC 4.3 from previous versions of
+       GCC can be found in the [7]porting guide for this release.
+
+General Optimizer Improvements
+
+     * The GCC middle-end has been integrated with the [8]MPFR library.
+       This allows GCC to evaluate and replace at compile-time calls to
+       built-in math functions having constant arguments with their
+       mathematically equivalent results. In making use of [9]MPFR, GCC
+       can generate correct results regardless of the math library
+       implementation or floating point precision of the host platform.
+       This also allows GCC to generate identical results regardless of
+       whether one compiles in native or cross-compile configurations to a
+       particular target. The following built-in functions take advantage
+       of this new capability: acos, acosh, asin, asinh, atan2, atan,
+       atanh, cbrt, cos, cosh, drem, erf, erfc, exp10, exp2, exp, expm1,
+       fdim, fma, fmax, fmin, gamma_r, hypot, j0, j1, jn, lgamma_r, log10,
+       log1p, log2, log, pow10, pow, remainder, remquo, sin, sincos, sinh,
+       tan, tanh, tgamma, y0, y1 and yn. The float and long double
+       variants of these functions (e.g. sinf and sinl) are also handled.
+       The sqrt and cabs functions with constant arguments were already
+       optimized in prior GCC releases. Now they also use [10]MPFR.
+     * A new forward propagation pass on RTL was added. The new pass
+       replaces several slower transformations, resulting in compile-time
+       improvements as well as better code generation in some cases.
+     * A new command-line switch -frecord-gcc-switches has been added to
+       GCC, although it is only enabled for some targets. The switch
+       causes the command line that was used to invoke the compiler to be
+       recorded into the object file that is being created. The exact
+       format of this recording is target and binary file format
+       dependent, but it usually takes the form of a note section
+       containing ASCII text. The switch is related to the -fverbose-asm
+       switch, but that one only records the information in the assembler
+       output file as comments, so the information never reaches the
+       object file.
+     * The inliner heuristic is now aware of stack frame consumption. New
+       command-line parameters --param large-stack-frame and --param
+       large-stack-frame-growth can be used to limit stack frame size
+       growth caused by inlining.
+     * During feedback directed optimizations, the expected block size the
+       memcpy, memset and bzero functions operate on is discovered and for
+       cases of commonly used small sizes, specialized inline code is
+       generated.
+     * __builtin_expect no longer requires its argument to be a compile
+       time constant.
+     * Interprocedural optimization was reorganized to work on functions
+       in SSA form. This enables more precise and cheaper dataflow
+       analysis and makes writing interprocedural optimizations easier.
+       The following improvements have been implemented on top of this
+       framework:
+          + Pre-inline optimization: Selected local optimization passes
+            are run before the inliner (and other interprocedural passes)
+            are executed. This significantly improves the accuracy of code
+            growth estimates used by the inliner and reduces the overall
+            memory footprint for large compilation units.
+          + Early inlining (a simple bottom-up inliner pass inlining only
+            functions whose body is smaller than the expected call
+            overhead) is now executed with the early optimization passes,
+            thus inlining already optimized function bodies into an
+            unoptimized function that is subsequently optimized by early
+            optimizers. This enables the compiler to quickly eliminate
+            abstraction penalty in C++ programs.
+          + Interprocedural constant propagation now operate on SSA form
+            increasing accuracy of the analysis.
+     * A new internal representation for GIMPLE statements has been
+       contributed, resulting in compile-time memory savings.
+     * The vectorizer was enhanced to support vectorization of outer
+       loops, intra-iteration parallelism (loop-aware SLP), vectorization
+       of strided accesses and loops with multiple data-types. Run-time
+       dependency testing using loop versioning was added. The cost model,
+       turned on by -fvect-cost-model, was developed.
+
+New Languages and Language specific improvements
+
+     * We have added new command-line options
+       -finstrument-functions-exclude-function-list and
+       -finstrument-functions-exclude-file-list. They provide more control
+       over which functions are annotated by the -finstrument-functions
+       option.
+
+  C family
+
+     * Implicit conversions between generic vector types are now only
+       permitted when the two vectors in question have the same number of
+       elements and compatible element types. (Note that the restriction
+       involves compatible element types, not implicitly-convertible
+       element types: thus, a vector type with element type int may not be
+       implicitly converted to a vector type with element type unsigned
+       int.) This restriction, which is in line with specifications for
+       SIMD architectures such as AltiVec, may be relaxed using the flag
+       -flax-vector-conversions. This flag is intended only as a
+       compatibility measure and should not be used for new code.
+     * -Warray-bounds has been added and is now enabled by default for
+       -Wall . It produces warnings for array subscripts that can be
+       determined at compile time to be always out of bounds.
+       -Wno-array-bounds will disable the warning.
+     * The constructor and destructor function attributes now accept
+       optional priority arguments which control the order in which the
+       constructor and destructor functions are run.
+     * New [11]command-line options -Wtype-limits,
+       -Wold-style-declaration, -Wmissing-parameter-type, -Wempty-body,
+       -Wclobbered and -Wignored-qualifiers have been added for finer
+       control of the diverse warnings enabled by -Wextra.
+     * A new function attribute alloc_size has been added to mark up
+       malloc style functions. For constant sized allocations this can be
+       used to find out the size of the returned pointer using the
+       __builtin_object_size() function for buffer overflow checking and
+       similar. This supplements the already built-in malloc and calloc
+       constant size handling.
+     * Integer constants written in binary are now supported as a GCC
+       extension. They consist of a prefix 0b or 0B, followed by a
+       sequence of 0 and 1 digits.
+     * A new predefined macro __COUNTER__ has been added. It expands to
+       sequential integral values starting from 0. In conjunction with the
+       ## operator, this provides a convenient means to generate unique
+       identifiers.
+     * A new command-line option -fdirectives-only has been added. It
+       enables a special preprocessing mode which improves the performance
+       of applications like distcc and ccache.
+     * Fixed-point data types and operators have been added. They are
+       based on Chapter 4 of the Embedded-C specification (n1169.pdf).
+       Currently, only MIPS targets are supported.
+     * Decimal floating-point arithmetic based on draft ISO/IEC TR 24732,
+       N1241, is now supported as a GCC extension to C for targets
+       i[34567]86-*-linux-gnu, powerpc*-*-linux-gnu, s390*-ibm-linux-gnu,
+       and x86_64-*-linux-gnu. The feature introduces new data types
+       _Decimal32, _Decimal64, and _Decimal128 with constant suffixes DF,
+       DD, and DL.
+
+  C++
+
+     * [12]Experimental support for the upcoming ISO C++ standard, C++0x.
+     * -Wc++0x-compat has been added and is now enabled by default for
+       -Wall. It produces warnings for constructs whose meaning differs
+       between ISO C++ 1998 and C++0x.
+     * The -Wparentheses option now works for C++ as it does for C. It
+       warns if parentheses are omitted when operators with confusing
+       precedence are nested. It also warns about ambiguous else
+       statements. Since -Wparentheses is enabled by -Wall, this may cause
+       additional warnings with existing C++ code which uses -Wall. These
+       new warnings may be disabled by using -Wall -Wno-parentheses.
+     * The -Wmissing-declarations now works for C++ as it does for C.
+     * The -fvisibility-ms-compat flag was added, to make it easier to
+       port larger projects using shared libraries from Microsoft's Visual
+       Studio to ELF and Mach-O systems.
+     * C++ attribute handling has been overhauled for template arguments
+       (ie dependent types). In particular, __attribute__((aligned(T)));
+       works for C++ types.
+
+    Runtime Library (libstdc++)
+
+     * [13]Experimental support for the upcoming ISO C++ standard, C++0x.
+     * Support for TR1 mathematical special functions and regular
+       expressions. ([14]Implementation status of TR1)
+     * Default what implementations give more elaborate exception strings
+       for bad_cast, bad_typeid, bad_exception, and bad_alloc.
+     * Header dependencies have been streamlined, reducing unnecessary
+       includes and pre-processed bloat.
+     * Variadic template implementations of items in <tuple> and
+       <functional>.
+     * An experimental [15]parallel mode has been added. This is a
+       parallel implementation of many C++ Standard library algorithms,
+       like std::accumulate, std::for_each, std::transform, or std::sort,
+       to give but four examples. These algorithms can be substituted for
+       the normal (sequential) libstdc++ algorithms on a piecemeal basis,
+       or all existing algorithms can be transformed via the
+       -D_GLIBCXX_PARALLEL macro.
+     * Debug mode versions of classes in <unordered_set> and
+       <unordered_map>.
+     * Formal deprecation of <ext/hash_set> and <ext/hash_map>, which are
+       now <backward/hash_set> and <backward/hash_map>. This code:
+    #include <ext/hash_set>
+    __gnu_cxx::hash_set<int> s;
+
+       Can be transformed (in order of preference) to:
+    #include <tr1/unordered_set>
+    std::tr1::unordered_set<int> s;
+
+       or
+    #include <backward/hash_set>
+    __gnu_cxx::hash_set<int> s;
+
+       Similar transformations apply to __gnu_cxx::hash_map,
+       __gnu_cxx::hash_multimap, __gnu_cxx::hash_set,
+       __gnu_cxx::hash_multiset.
+
+  Fortran
+
+     * Due to the fact that the [16]GMP and [17]MPFR libraries are
+       required for all languages, Fortran is no longer special in this
+       regard and is available by default.
+     * The [18]-fexternal-blas option has been added, which generates
+       calls to BLAS routines for intrinsic matrix operations such as
+       matmul rather than using the built-in algorithms.
+     * Support to give a backtrace (compiler flag -fbacktrace or
+       environment variable GFORTRAN_ERROR_BACKTRACE; on glibc systems
+       only) or a core dump (-fdump-core, GFORTRAN_ERROR_DUMPCORE) when a
+       run-time error occured.
+     * GNU Fortran now defines __GFORTRAN__ when it runs the C
+       preprocessor (CPP).
+     * The [19]-finit-local-zero, -finit-real, -finit-integer,
+       -finit-character, and -finit-logical options have been added, which
+       can be used to initialize local variables.
+     * The intrinsic procedures [20]GAMMA and [21]LGAMMA have been added,
+       which calculate the Gamma function and its logarithm. Use EXTERNAL
+       gamma if you want to use your own gamma function.
+     * GNU Fortran now regards the backslash character as literal (as
+       required by the Fortran 2003 standard); using [22]-fbackslash GNU
+       Fortran interprets backslashes as C-style escape characters.
+     * The [23]interpretation of binary, octal and hexadecimal (BOZ)
+       literal constants has been changed. Before they were always
+       interpreted as integer; now they are bit-wise transferred as
+       argument of INT, REAL, DBLE and CMPLX as required by the Fortran
+       2003 standard, and for real and complex variables in DATA
+       statements or when directly assigned to real and complex variables.
+       Everywhere else and especially in expressions they are still
+       regarded as integer constants.
+     * Fortran 2003 support has been extended:
+          + Intrinsic statements IMPORT, PROTECTED, VALUE and VOLATILE
+          + Pointer intent
+          + Intrinsic module ISO_ENV_FORTRAN
+          + Interoperability with C (ISO C Bindings)
+          + ABSTRACT INTERFACES and PROCEDURE statements (without POINTER
+            attribute)
+          + Fortran 2003 BOZ
+
+  Java (GCJ)
+
+     * GCJ now uses the Eclipse Java compiler for its Java parsing needs.
+       This enables the use of all 1.5 language features, and fixes most
+       existing front end bugs.
+     * libgcj now supports all 1.5 language features which require runtime
+       support: foreach, enum, annotations, generics, and auto-boxing.
+     * We've made many changes to the tools shipped with gcj.
+          + The old jv-scan tool has been removed. This tool never really
+            worked properly. There is no replacement.
+          + gcjh has been rewritten. Some of its more obscure options no
+            longer work, but are still recognized in an attempt at
+            compatibility. gjavah is a new program with similar
+            functionality but different command-line options.
+          + grmic and grmiregistry have been rewritten. grmid has been
+            added.
+          + gjar replaces the old fastjar.
+          + gjarsigner (used for signing jars), gkeytool (used for key
+            management), gorbd (for CORBA), gserialver (computes
+            serialization UIDs), and gtnameserv (also for CORBA) are now
+            installed.
+     * The ability to dump the contents of the java run time heap to a
+       file for off-line analysis has been added. The heap dumps may be
+       analyzed with the new gc-analyze tool. They may be generated on
+       out-of-memory conditions or on demand and are controlled by the new
+       run time class gnu.gcj.util.GCInfo.
+     * java.util.TimeZone can now read files from /usr/share/zoneinfo to
+       provide correct, updated, timezone information. This means that
+       packagers no longer have to update libgcj when a time zone change
+       is published.
+
+New Targets and Target Specific Improvements
+
+  IA-32/x86-64
+
+     * Tuning for Intel Core 2 processors is available via -mtune=core2
+       and -march=core2.
+     * Tuning for AMD Geode processors is available via -mtune=geode and
+       -march=geode.
+     * Code generation of block move (memcpy) and block set (memset) was
+       rewritten. GCC can now pick the best algorithm (loop, unrolled
+       loop, instruction with rep prefix or a library call) based on the
+       size of the block being copied and the CPU being optimized for. A
+       new option -minline-stringops-dynamically has been added. With this
+       option string operations of unknown size are expanded such that
+       small blocks are copied by in-line code, while for large blocks a
+       library call is used. This results in faster code than
+       -minline-all-stringops when the library implementation is capable
+       of using cache hierarchy hints. The heuristic choosing the
+       particular algorithm can be overwritten via -mstringop-strategy.
+       Newly also memset of values different from 0 is inlined.
+     * GCC no longer places the cld instruction before string operations.
+       Both i386 and x86-64 ABI documents mandate the direction flag to be
+       clear at the entry of a function. It is now invalid to set the flag
+       in asm statement without reseting it afterward.
+     * Support for SSSE3 built-in functions and code generation are
+       available via -mssse3.
+     * Support for SSE4.1 built-in functions and code generation are
+       available via -msse4.1.
+     * Support for SSE4.2 built-in functions and code generation are
+       available via -msse4.2.
+     * Both SSE4.1 and SSE4.2 support can be enabled via -msse4.
+     * A new set of options -mpc32, -mpc64 and -mpc80 have been added to
+       allow explicit control of x87 floating point precision.
+     * Support for __float128 (TFmode) IEEE quad type and corresponding
+       TCmode IEEE complex quad type is available via the soft-fp library
+       on x86_64 targets. This includes basic arithmetic operations
+       (addition, subtraction, negation, multiplication and division) on
+       __float128 real and TCmode complex values, the full set of IEEE
+       comparisons between __float128 values, conversions to and from
+       float, double and long double floating point types, as well as
+       conversions to and from signed or unsigned integer, signed or
+       unsigned long integer and signed or unsigned quad (TImode) integer
+       types. Additionally, all operations generate the full set of IEEE
+       exceptions and support the full set of IEEE rounding modes.
+     * GCC can now utilize the ACML library for vectorizing calls to a set
+       of C99 functions on x86_64 if -mveclibabi=acml is specified and you
+       link to an ACML ABI compatible library.
+
+  ARM
+
+     * Compiler and Library support for Thumb-2 and the ARMv7 architecture
+       has been added.
+
+  CRIS
+
+    New features
+
+     * Compiler and Library support for the CRIS v32 architecture, as
+       found in Axis Communications ETRAX FS and ARTPEC-3 chips, has been
+       added.
+
+    Configuration changes
+
+     * The cris-*-elf target now includes support for CRIS v32, including
+       libraries, through the -march=v32 option.
+     * A new crisv32-*-elf target defaults to generate code for CRIS v32.
+     * A new crisv32-*-linux* target defaults to generate code for CRIS
+       v32.
+     * The cris-*-aout target has been obsoleted.
+
+    Improved support for built-in functions
+
+     * GCC can now use the lz and swapwbr instructions to implement the
+       __builtin_clz, __builtin_ctz and __builtin_ffs family of functions.
+     * __builtin_bswap32 is now implemented using the swapwb instruction,
+       when available.
+
+  m68k and ColdFire
+
+    New features
+
+     * Support for several new ColdFire processors has been added. You can
+       generate code for them using the new -mcpu option.
+     * All targets now support ColdFire processors.
+     * m68k-uclinux targets have improved support for C++ constructors and
+       destructors, and for shared libraries.
+     * It is now possible to set breakpoints on the first or last line of
+       a function, even if there are no statements on that line.
+
+    Optimizations
+
+     * Support for sibling calls has been added.
+     * More use is now made of the ColdFire mov3q instruction.
+     * __builtin_clz is now implemented using the ff1 ColdFire
+       instruction, when available.
+     * GCC now honors the -m68010 option. 68010 code now uses clr rather
+       than move to zero volatile memory.
+     * 68020 targets and above can now use symbol(index.size*scale)
+       addresses for indexed array accesses. Earlier compilers would
+       always load the symbol into a base register first.
+
+    Configuration changes
+
+     * All m68k and ColdFire targets now allow the default processor to be
+       set at configure time using --with-cpu.
+     * A --with-arch configuration option has been added. This option
+       allows you to restrict a target to ColdFire or non-ColdFire
+       processors.
+
+    Preprocessor macros
+
+     * An __mcfv*__ macro is now defined for all ColdFire targets.
+       (Earlier versions of GCC only defined __mcfv4e__.)
+     * __mcf_cpu_*, __mcf_family_* and __mcffpu__ macros have been added.
+     * All targets now define __mc68010 and __mc68010__ when generating
+       68010 code.
+
+    Command-line changes
+
+     * New command-line options -march, -mcpu, -mtune and -mhard-float
+       have been added. These options apply to both m68k and ColdFire
+       targets.
+     * -mno-short, -mno-bitfield and -mno-rtd are now accepted as negative
+       versions of -mshort, etc.
+     * -fforce-addr has been removed. It is now ignored by the compiler.
+
+    Other improvements
+
+     * ColdFire targets now try to maintain a 4-byte-aligned stack where
+       possible.
+     * m68k-uclinux targets now try to avoid situations that lead to the
+       load-time error: BINFMT_FLAT: reloc outside program.
+
+  MIPS
+
+    Changes to existing configurations
+
+     * libffi and libjava now support all three GNU/Linux ABIs: o32, n32
+       and n64. Every GNU/Linux configuration now builds these libraries
+       by default.
+     * GNU/Linux configurations now generate -mno-shared code unless
+       overridden by -fpic, -fPIC, -fpie or -fPIE.
+     * mipsisa32*-linux-gnu configurations now generate hard-float code by
+       default, just like other mipsisa32* and mips*-linux-gnu
+       configurations. You can build a soft-float version of any
+       mips*-linux-gnu configuration by passing --with-float=soft to
+       configure.
+     * mips-wrs-vxworks now supports run-time processes (RTPs).
+
+    Changes to existing command-line options
+
+     * The -march and -mtune options no longer accept 24k as a processor
+       name. Please use 24kc, 24kf2_1 or 24kf1_1 instead.
+     * The -march and -mtune options now accept 24kf2_1, 24kef2_1 and
+       34kf2_1 as synonyms for 24kf, 24kef and 34kf respectively. The
+       options also accept 24kf1_1, 24kef1_1 and 34kf1_1 as synonyms for
+       24kx, 24kex and 34kx.
+
+    New configurations
+
+   GCC now supports the following configurations:
+     * mipsisa32r2*-linux-gnu*, which generates MIPS32 revision 2 code by
+       default. Earlier releases also recognized this configuration, but
+       they treated it in the same way as mipsisa32*-linux-gnu*. Note that
+       you can customize any mips*-linux-gnu* configuration to a
+       particular ISA or processor by passing an appropriate --with-arch
+       option to configure.
+     * mipsisa*-sde-elf*, which provides compatibility with MIPS
+       Technologies' SDE toolchains. The configuration uses the SDE
+       libraries by default, but you can use it like other newlib-based
+       ELF configurations by passing --with-newlib to configure. It is the
+       only configuration besides mips64vr*-elf* to build MIPS16 as well
+       as non-MIPS16 libraries.
+     * mipsisa*-elfoabi*, which is similar to the general mipsisa*-elf*
+       configuration, but uses the o32 and o64 ABIs instead of the 32-bit
+       and 64-bit forms of the EABI.
+
+    New processors and application-specific extensions
+
+     * Support for the SmartMIPS ASE is available through the new
+       -msmartmips option.
+     * Support for revision 2 of the DSP ASE is available through the new
+       -mdspr2 option. A new preprocessor macro called __mips_dsp_rev
+       indicates the revision of the ASE in use.
+     * Support for the 4KS and 74K families of processors is available
+       through the -march and -mtune options.
+
+    Improved support for built-in functions
+
+     * GCC can now use load-linked, store-conditional and sync
+       instructions to implement atomic built-in functions such as
+       __sync_fetch_and_add. The memory reference must be 4 bytes wide for
+       32-bit targets and either 4 or 8 bytes wide for 64-bit targets.
+     * GCC can now use the clz and dclz instructions to implement the
+       __builtin_ctz and __builtin_ffs families of functions.
+     * There is a new __builtin___clear_cache function for flushing the
+       instruction cache. GCC expands this function inline on MIPS32
+       revision 2 targets, otherwise it calls the function specified by
+       -mcache-flush-func.
+
+    MIPS16 improvements
+
+     * GCC can now compile objects that contain a mixture of MIPS16 and
+       non-MIPS16 code. There are two new attributes, mips16 and nomips16,
+       for specifying which mode a function should use.
+     * A new option called -minterlink-mips16 makes non-MIPS16 code
+       link-compatible with MIPS16 code.
+     * After many bug fixes, the long-standing MIPS16 -mhard-float support
+       should now work fairly reliably.
+     * GCC can now use the MIPS16e save and restore instructions.
+     * -fsection-anchors now works in MIPS16 mode. MIPS16 code compiled
+       with -G0 -fsection-anchors is often smaller than code compiled with
+       -G8. However, please note that you must usually compile all objects
+       in your application with the same -G option; see the documentation
+       of -G for details.
+     * A new option called-mcode-readable specifies which instructions are
+       allowed to load from the code segment. -mcode-readable=yes is the
+       default and says that any instruction may load from the code
+       segment. The other alternatives are -mcode-readable=pcrel, which
+       says that only PC-relative MIPS16 instructions may load from the
+       code segment, and -mcode-readable=no, which says that no
+       instruction may do so. Please see the documentation for more
+       details, including example uses.
+
+    Small-data improvements
+
+   There are three new options for controlling small data:
+     * -mno-extern-sdata, which disables small-data accesses for
+       externally-defined variables. Code compiled with -Gn
+       -mno-extern-sdata will be link-compatible with any -G setting
+       between -G0 and -Gn inclusive.
+     * -mno-local-sdata, which disables the use of small-data sections for
+       data that is not externally visible. This option can be a useful
+       way of reducing small-data usage in less performance-critical parts
+       of an application.
+     * -mno-gpopt, which disables the use of the $gp register while still
+       honoring the -G limit when placing externally-visible data. This
+       option implies -mno-extern-sdata and -mno-local-sdata and it can be
+       useful in situations where $gp does not necessarily hold the
+       expected value.
+
+    Miscellaneous improvements
+
+     * There is a new option called -mbranch-cost for tweaking the
+       perceived cost of branches.
+     * If GCC is configured to use a version of GAS that supports the
+       .gnu_attribute directive, it will use that directive to record
+       certain properties of the output code. .gnu_attribute is new to GAS
+       2.18.
+     * There are two new function attributes, near and far, for overriding
+       the command-line setting of -mlong-calls on a function-by-function
+       basis.
+     * -mfp64, which previously required a 64-bit target, now works with
+       MIPS32 revision 2 targets as well. The mipsisa*-elfoabi* and
+       mipsisa*-sde-elf* configurations provide suitable library support.
+     * GCC now recognizes the -mdmx and -mmt options and passes them down
+       to the assembler. It does nothing else with the options at present.
+
+  SPU (Synergistic Processor Unit) of the Cell Broadband Engine Architecture
+  (BEA)
+
+     * Support has been added for this new architecture.
+
+  RS6000 (POWER/PowerPC)
+
+     * Support for the PowerPC 750CL paired-single instructions has been
+       added with a new powerpc-*-linux*paired* target configuration. It
+       is enabled by an associated -mpaired option and can be accessed
+       using new built-in functions.
+     * Support for auto-detecting architecture and system configuration to
+       auto-select processor optimization tuning.
+     * Support for VMX on AIX 5.3 has been added.
+     * Support for AIX Version 6.1 has been added.
+
+  S/390, zSeries and System z9
+
+     * Support for the IBM System z9 EC/BC processor (z9 GA3) has been
+       added. When using the -march=z9-ec option, the compiler will
+       generate code making use of instructions provided by the decimal
+       floating point facility and the floating point conversion facility
+       (pfpo). Besides the instructions used to implement decimal floating
+       point operations these facilities also contain instructions to move
+       between general purpose and floating point registers and to modify
+       and copy the sign-bit of floating point values.
+     * When the -march=z9-ec option is used the new
+       -mhard-dfp/-mno-hard-dfp options can be used to specify whether the
+       decimal floating point hardware instructions will be used or not.
+       If none of them is given the hardware support is enabled by
+       default.
+     * The -mstack-guard option can now be omitted when using stack
+       checking via -mstack-size in order to let GCC choose a sensible
+       stack guard value according to the frame size of each function.
+     * Various changes to improve performance of generated code have been
+       implemented, including:
+          + The condition code set by an add logical with carry
+            instruction is now available for overflow checks like: a + b +
+            carry < b.
+          + The test data class instruction is now used to implement
+            sign-bit and infinity checks of binary and decimal floating
+            point numbers.
+
+  SPARC
+
+     * Support for the Sun UltraSPARC T2 (Niagara 2) processor has been
+       added.
+
+  Xtensa
+
+     * Stack unwinding for exception handling now uses by default a
+       specialized version of DWARF unwinding. This is not
+       binary-compatible with the setjmp/longjmp (sjlj) unwinding used for
+       Xtensa with previous versions of GCC.
+     * For Xtensa processors that include the Conditional Store option,
+       the built-in functions for atomic memory access are now implemented
+       using S32C1I instructions.
+     * If the Xtensa NSA option is available, GCC will use it to implement
+       the __builtin_ctz and __builtin_clz functions.
+
+Documentation improvements
+
+     * Existing libstdc++ documentation has been edited and restructured
+       into a single DocBook XML manual. The results can be viewed online
+       [24]here.
+
+Other significant improvements
+
+     * The compiler's --help command-line option has been extended so that
+       it now takes an optional set of arguments. These arguments restrict
+       the information displayed to specific classes of command-line
+       options, and possibly only a subset of those options. It is also
+       now possible to replace the descriptive text associated with each
+       displayed option with an indication of its current value, or for
+       binary options, whether it has been enabled or disabled.
+       Here are some examples. The following will display all the options
+       controlling warning messages:
+      --help=warnings
+
+       Whereas this will display all the undocumented, target specific
+       options:
+      --help=target,undocumented
+
+       This sequence of commands will display the binary optimizations
+       that are enabled by -O3:
+      gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+      gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+      diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+
+     * The configure options --with-pkgversion and --with-bugurl have been
+       added. These allow distributors of GCC to include a
+       distributor-specific string in manuals and --version output and to
+       specify the URL for reporting bugs in their versions of GCC.
+
+GCC 4.3.1
+
+   This is the [25]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+Target Specific Changes
+
+  IA-32/x86-64
+
+    ABI changes
+
+     * Starting with GCC 4.3.1, decimal floating point variables are
+       aligned to their natural boundaries when they are passed on the
+       stack for i386.
+
+    Command-line changes
+
+     * Starting with GCC 4.3.1, the -mcld option has been added to
+       automatically generate a cld instruction in the prologue of
+       functions that use string instructions. This option is used for
+       backward compatibility on some operating systems and can be enabled
+       by default for 32-bit x86 targets by configuring GCC with the
+       --enable-cld configure option.
+
+GCC 4.3.2
+
+   This is the [26]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.3.3
+
+   This is the [27]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.3.4
+
+   This is the [28]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.3.5
+
+   This is the [29]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.5 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.3.6
+
+   This is the [30]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.3.6 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [31]GCC manuals. If that fails, the
+    [32]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [33]gcc@gcc.gnu.org. All of [34]our lists have public
+    archives.
+
+   Copyright (C) [35]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [36]maintained by the GCC team. Last modified
+   2014-06-28[37].
+
+References
+
+   1. http://gcc.gnu.org/gcc-4.3/changes.html#4.3.5
+   2. http://gmplib.org/
+   3. http://www.mpfr.org/
+   4. https://gcc.gnu.org/install/prerequisites.html
+   5. https://gcc.gnu.org/ml/gcc-announce/2001/msg00000.html
+   6. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#Warning-Options
+   7. http://gcc.gnu.org/gcc-4.3/porting_to.html
+   8. http://www.mpfr.org/
+   9. http://www.mpfr.org/
+  10. http://www.mpfr.org/
+  11. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
+  12. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
+  13. http://gcc.gnu.org/gcc-4.3/cxx0x_status.html
+  14. https://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt01ch01.html#m anual.intro.status.standard.tr1
+  15. https://gcc.gnu.org/onlinedocs/libstdc++/manual/parallel_mode.html
+  16. http://gmplib.org/
+  17. http://www.mpfr.org/
+  18. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#Code-Gen-Options
+  19. https://gcc.gnu.org/onlinedocs/gfortran/Code-Gen-Options.html#index-g_t_0040code_007bfinit-local-zero_007d-167
+  20. https://gcc.gnu.org/onlinedocs/gcc-4.3.0/gfortran/GAMMA.html
+  21. https://gcc.gnu.org/onlinedocs/gcc-4.3.0/gfortran/LGAMMA.html
+  22. https://gcc.gnu.org/onlinedocs/gfortran/Fortran-Dialect-Options.html
+  23. https://gcc.gnu.org/onlinedocs/gfortran/BOZ-literal-constants.html
+  24. https://gcc.gnu.org/onlinedocs/libstdc++/
+  25. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.1
+  26. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.2
+  27. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.3
+  28. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.4
+  29. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.5
+  30. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.3.6
+  31. https://gcc.gnu.org/onlinedocs/
+  32. mailto:gcc-help@gcc.gnu.org
+  33. mailto:gcc@gcc.gnu.org
+  34. https://gcc.gnu.org/lists.html
+  35. http://www.fsf.org/
+  36. https://gcc.gnu.org/about.html
+  37. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.2/index.html
+                             GCC 4.2 Release Series
+
+   May 19, 2008
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.2.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.2.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.2.4
+          May 19, 2008 ([2]changes)
+
+   GCC 4.2.3
+          February 1, 2008 ([3]changes)
+
+   GCC 4.2.2
+          October 7, 2007 ([4]changes)
+
+   GCC 4.2.1
+          July 18, 2007 ([5]changes)
+
+   GCC 4.2.0
+          May 13, 2007 ([6]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [7]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [8]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [9]GCC project
+   web site or contact the [10]GCC development mailing list.
+
+   To obtain GCC please use [11]our mirror sites or [12]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [13]GCC manuals. If that fails, the
+    [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
+    archives.
+
+   Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [18]maintained by the GCC team. Last modified
+   2014-06-28[19].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.2/changes.html
+   3. http://gcc.gnu.org/gcc-4.2/changes.html
+   4. http://gcc.gnu.org/gcc-4.2/changes.html
+   5. http://gcc.gnu.org/gcc-4.2/changes.html
+   6. http://gcc.gnu.org/gcc-4.2/changes.html
+   7. http://gcc.gnu.org/gcc-4.2/buildstat.html
+   8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   9. http://gcc.gnu.org/index.html
+  10. mailto:gcc@gcc.gnu.org
+  11. http://gcc.gnu.org/mirrors.html
+  12. http://gcc.gnu.org/svn.html
+  13. https://gcc.gnu.org/onlinedocs/
+  14. mailto:gcc-help@gcc.gnu.org
+  15. mailto:gcc@gcc.gnu.org
+  16. https://gcc.gnu.org/lists.html
+  17. http://www.fsf.org/
+  18. https://gcc.gnu.org/about.html
+  19. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.2/changes.html
+                             GCC 4.2 Release Series
+                        Changes, New Features, and Fixes
+
+Caveats
+
+     * GCC no longer accepts the -fshared-data option. This option has had
+       no effect in any GCC 4 release; the targets to which the option
+       used to apply had been removed before GCC 4.0.
+
+General Optimizer Improvements
+
+     * New command-line options specify the possible relationships among
+       parameters and between parameters and global data. For example,
+       -fargument-noalias-anything specifies that arguments do not alias
+       any other storage.
+       Each language will automatically use whatever option is required by
+       the language standard. You should not need to use these options
+       yourself.
+
+New Languages and Language specific improvements
+
+     * [1]OpenMP is now supported for the C, C++ and Fortran compilers.
+     * New command-line options -fstrict-overflow and -Wstrict-overflow
+       have been added. -fstrict-overflow tells the compiler that it may
+       assume that the program follows the strict signed overflow
+       semantics permitted for the language: for C and C++ this means that
+       the compiler may assume that signed overflow does not occur. For
+       example, a loop like
+      for (i = 1; i > 0; i *= 2)
+
+       is presumably intended to continue looping until i overflows. With
+       -fstrict-overflow, the compiler may assume that signed overflow
+       will not occur, and transform this into an infinite loop.
+       -fstrict-overflow is turned on by default at -O2, and may be
+       disabled via -fno-strict-overflow. The -Wstrict-overflow option may
+       be used to warn about cases where the compiler assumes that signed
+       overflow will not occur. It takes five different levels:
+       -Wstrict-overflow=1 to 5. See the [2]documentation for details.
+       -Wstrict-overflow=1 is enabled by -Wall.
+     * The new command-line option -fno-toplevel-reorder directs GCC to
+       emit top-level functions, variables, and asm statements in the same
+       order that they appear in the input file. This is intended to
+       support existing code which relies on a particular ordering (for
+       example, code which uses top-level asm statements to switch
+       sections). For new code, it is generally better to use function and
+       variable attributes. The -fno-toplevel-reorder option may be used
+       for most cases which currently use -fno-unit-at-a-time. The
+       -fno-unit-at-a-time option will be removed in some future version
+       of GCC. If you know of a case which requires -fno-unit-at-a-time
+       which is not fixed by -fno-toplevel-reorder, please open a bug
+       report.
+
+  C family
+
+     * The pragma redefine_extname will now macro expand its tokens for
+       compatibility with SunPRO.
+     * In the next release of GCC, 4.3, -std=c99 or -std=gnu99 will direct
+       GCC to handle inline functions as specified in the C99 standard. In
+       preparation for this, GCC 4.2 will warn about any use of non-static
+       inline functions in gnu99 or c99 mode. This new warning may be
+       disabled with the new gnu_inline function attribute or the new
+       -fgnu89-inline command-line option. Also, GCC 4.2 and later will
+       define one of the preprocessor macros __GNUC_GNU_INLINE__ or
+       __GNUC_STDC_INLINE__ to indicate the semantics of inline functions
+       in the current compilation.
+     * A new command-line option -Waddress has been added to warn about
+       suspicious uses of memory addresses as, for example, using the
+       address of a function in a conditional expression, and comparisons
+       against the memory address of a string literal. This warning is
+       enabled by -Wall.
+
+  C++
+
+     * C++ visibility handling has been overhauled.
+       Restricted visiblity is propagated from classes to members, from
+       functions to local statics, and from templates and template
+       arguments to instantiations, unless the latter has explicitly
+       declared visibility.
+       The visibility attribute for a class must come between the
+       class-key and the name, not after the closing brace.
+       Attributes are now allowed for enums and elaborated-type-specifiers
+       that only declare a type.
+       Members of the anonymous namespace are now local to a particular
+       translation unit, along with any other declarations which use them,
+       though they are still treated as having external linkage for
+       language semantics.
+     * The (undocumented) extension which permitted templates with default
+       arguments to be bound to template template parameters with fewer
+       parameters has been removed. For example:
+        template <template <typename> class C>
+        void f(C<double>) {}
+
+        template <typename T, typename U = int>
+        struct S {};
+
+        template void f(S<double>);
+
+       is no longer accepted by G++. The reason this code is not accepted
+       is that S is a template with two parameters; therefore, it cannot
+       be bound to C which has only one parameter.
+     * The <?, >?, <?=, and >?= operators, deprecated in previous GCC
+       releases, have been removed.
+     * The command-line option -fconst-strings, deprecated in previous GCC
+       releases, has been removed.
+     * The configure variable enable-__cxa_atexit is now enabled by
+       default for more targets. Enabling this variable is necessary in
+       order for static destructors to be executed in the correct order,
+       but it depends upon the presence of a non-standard C library in the
+       target library in order to work. The variable is now enabled for
+       more targets which are known to have suitable C libraries.
+     * -Wextra will produce warnings for if statements with a semicolon as
+       the only body, to catch code like:
+         if (a);
+            return 1;
+         return 0;
+
+       To suppress the warning in valid cases, use { } instead.
+     * The C++ frontend now also produces strict aliasing warnings when
+       -fstrict-aliasing -Wstrict-aliasing is in effect.
+
+    Runtime Library (libstdc++)
+
+     * Added support for TR1 <random>, <complex>, and C compatibility
+       headers. In addition, a lock-free version of shared_ptr was
+       contributed as part of Phillip Jordan's Google Summer of Code
+       project on lock-free containers. ([3]Implementation status of TR1)
+     * In association with the Summer of Code work on lock-free
+       containers, the interface for atomic builtins was adjusted,
+       creating simpler alternatives for non-threaded code paths. Also,
+       usage was consolidated and all elements were moved from namespace
+       std to namespace__gnu_cxx. Affected interfaces are the functions
+       __exchange_and_add, __atomic_add, and the objects __mutex,
+       __recursive_mutex, and __scoped_lock.
+     * Support for versioning weak symbol names via namespace association
+       was added. However, as this changes the names of exported symbols,
+       this is turned off by default in the current ABI. Intrepid users
+       can enable this feature by using
+       --enable-symvers=gnu-versioned-namespace during configuration.
+     * Revised, simplified, and expanded policy-based associative
+       containers, including data types for tree and trie forms
+       (basic_tree, tree, trie), lists (list_update), and both
+       collision-chaining and probing hash-based containers
+       (basic_hash_table, cc_hash_table, gp_hash_table). More details per
+       the [4]documentation.
+     * The implementation of the debug mode was modified, whereby the
+       debug namespaces were nested inside of namespace std and namespace
+       __gnu_cxx in order to resolve some long standing corner cases
+       involving name lookup. Debug functionality from the policy-based
+       data structures was consolidated and enabled with the single macro,
+       _GLIBCXX_DEBUG. See PR 26142 for more information.
+     * Added extensions for type traits: __conditional_type,
+       __numeric_traits, __add_unsigned, __removed_unsigned, __enable_if.
+     * Added a typelist implementation for compile-time meta-programming.
+       Elements for typelist construction and operation can be found
+       within namespace __gnu_cxx::typelist.
+     * Added a new allocator, __gnu_cxx::throw_allocator, for testing
+       exception-safety.
+     * Enabled library-wide visibility control, allowing -fvisibility to
+       be used.
+     * Consolidated all nested namespaces and the conversion of
+       __gnu_internal implementation-private details to anonymous
+       namespaces whenever possible.
+     * Implemented LWG resolutions DR 431 and DR 538.
+
+  Fortran
+
+     * Support for allocatable components has been added (TR 15581 and
+       Fortran 2003).
+     * Support for the Fortran 2003 streaming IO extension has been added.
+     * The GNU Fortran compiler now uses 4-byte record markers by default
+       for unformatted files to be compatible with g77 and most other
+       compilers. The implementation allows for records greater than 2 GB
+       and is compatible with several other compilers. Older versions of
+       gfortran used 8-byte record markers by default (on most systems).
+       In order to change the length of the record markers, e.g. to read
+       unformatted files created by older gfortran versions, the
+       [5]-frecord-marker=8 option can be used.
+
+  Java (GCJ)
+
+     * A new command-line option -static-libgcj has been added for targets
+       that use a linker compatible with GNU Binutils. As its name
+       implies, this causes libgcj to be linked statically. In some cases
+       this causes the resulting executable to start faster and use less
+       memory than if the shared version of libgcj were used. However
+       caution should be used as it can also cause essential parts of the
+       library to be omitted. Some of these issues are discussed in:
+       [6]https://gcc.gnu.org/wiki/Statically_linking_libgcj
+     * fastjar is no longer bundled with GCC. To build libgcj, you will
+       need either InfoZIP (both zip and unzip) or an external jar
+       program. In the former case, the GCC build will install a jar shell
+       script that is based on InfoZIP and provides the same functionality
+       as fastjar.
+
+New Targets and Target Specific Improvements
+
+  IA-32/x86-64
+
+     * -mtune=generic can now be used to generate code running well on
+       common x86 chips. This includes AMD Athlon, AMD Opteron, Intel
+       Pentium-M, Intel Pentium 4 and Intel Core 2.
+     * -mtune=native and -march=native will produce code optimized for the
+       host architecture as detected using the cpuid instruction.
+     * Added a new command-line option -fstackrealign and and
+       __attribute__ ((force_align_arg_pointer)) to realign the stack at
+       runtime. This allows functions compiled with a vector-aligned stack
+       to be invoked from legacy objects that keep only word-alignment.
+
+  SPARC
+
+     * The default CPU setting has been changed from V7 to V9 in 32-bit
+       mode on Solaris 7 and above. This is already the case in 64-bit
+       mode. It can be overridden by specifying --with-cpu at configure
+       time.
+     * Back-end support of built-in functions for atomic memory access has
+       been implemented.
+     * Support for the Sun UltraSPARC T1 (Niagara) processor has been
+       added.
+
+  M32C
+
+     * Various bug fixes have made some functions (notably, functions
+       returning structures) incompatible with previous releases.
+       Recompiling all libraries is recommended. Note that code quality
+       has considerably improved since 4.1, making a recompile even more
+       beneficial.
+
+  MIPS
+
+     * Added support for the Broadcom SB-1A core.
+
+  IA-64
+
+     * Added support for IA-64 data and control speculation. By default
+       speculation is enabled only during second scheduler pass. A number
+       of machine flags was introduced to control the usage of speculation
+       for both scheduler passes.
+
+  HPPA
+
+     * Added Java language support (libffi and libjava) for 32-bit HP-UX
+       11 target.
+
+Obsolete Systems
+
+Documentation improvements
+
+  PDF Documentation
+
+     * A make pdf target has been added to the top-level makefile,
+       enabling automated production of PDF documentation files.
+       (Front-ends external to GCC should modify their Make-lang.in file
+       to add a lang.pdf: target.)
+
+Other significant improvements
+
+  Build system improvements
+
+     * All the components of the compiler are now bootstrapped by default.
+       This improves the resilience to bugs in the system compiler or
+       binary compatibility problems, as well as providing better testing
+       of GCC 4.2 itself. In addition, if you build the compiler from a
+       combined tree, the assembler, linker, etc. will also be
+       bootstrapped (i.e. built with themselves).
+       You can disable this behavior, and go back to the pre-GCC 4.2 set
+       up, by configuring GCC with --disable-bootstrap.
+     * The rules that configure follows to find target tools resemble more
+       closely the locations that the built compiler will search. In
+       addition, you can use the new configure option --with-target-tools
+       to specify where to find the target tools used during the build,
+       without affecting what the built compiler will use.
+       This can be especially useful when building packages of GCC. For
+       example, you may want to build GCC with GNU as or ld, even if the
+       resulting compiler to work with the native assembler and linker. To
+       do so, you can use --with-target-tools to point to the native
+       tools.
+
+  Incompatible changes to the build system
+
+     * Front-ends external to GCC should modify their Make-lang.in file to
+       replace double-colon rules (e.g. dvi::) with normal rules (like
+       lang.dvi:). Front-end makefile hooks do not use double-colon rules
+       anymore.
+     * Up to GCC 4.1, a popular way to specify the target tools used
+       during the build was to create directories named gas, binutils,
+       etc. in the build tree, and create links to the tools from there.
+       This does not work any more when the compiler is bootstrapped. The
+       new configure option --with-target-tools provides a better way to
+       achieve the same effect, and works for all native and cross
+       settings.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [7]GCC manuals. If that fails, the
+    [8]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [9]gcc@gcc.gnu.org. All of [10]our lists have public
+    archives.
+
+   Copyright (C) [11]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [12]maintained by the GCC team. Last modified
+   2014-06-28[13].
+
+References
+
+   1. http://gcc.gnu.org/projects/gomp/
+   2. https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
+   3. https://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt01ch01.html#manual.intro.status.standard.tr1
+   4. https://gcc.gnu.org/onlinedocs/libstdc++/ext/pb_ds/index.html
+   5. https://gcc.gnu.org/onlinedocs/gfortran/Runtime-Options.html
+   6. https://gcc.gnu.org/wiki/Statically_linking_libgcj
+   7. https://gcc.gnu.org/onlinedocs/
+   8. mailto:gcc-help@gcc.gnu.org
+   9. mailto:gcc@gcc.gnu.org
+  10. https://gcc.gnu.org/lists.html
+  11. http://www.fsf.org/
+  12. https://gcc.gnu.org/about.html
+  13. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.1/index.html
+                             GCC 4.1 Release Series
+
+   February 13, 2007
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.1.2.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.1.1 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.1.2
+          February 13, 2007 ([2]changes)
+
+   GCC 4.1.1
+          May 24, 2006 ([3]changes)
+
+   GCC 4.1.0
+          February 28, 2006 ([4]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [5]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [6]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [7]GCC project
+   web site or contact the [8]GCC development mailing list.
+
+   To obtain GCC please use [9]our mirror sites or [10]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [11]GCC manuals. If that fails, the
+    [12]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [13]gcc@gcc.gnu.org. All of [14]our lists have public
+    archives.
+
+   Copyright (C) [15]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [16]maintained by the GCC team. Last modified
+   2014-06-28[17].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
+   3. http://gcc.gnu.org/gcc-4.1/changes.html
+   4. http://gcc.gnu.org/gcc-4.1/changes.html
+   5. http://gcc.gnu.org/gcc-4.1/buildstat.html
+   6. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   7. http://gcc.gnu.org/index.html
+   8. mailto:gcc@gcc.gnu.org
+   9. http://gcc.gnu.org/mirrors.html
+  10. http://gcc.gnu.org/svn.html
+  11. https://gcc.gnu.org/onlinedocs/
+  12. mailto:gcc-help@gcc.gnu.org
+  13. mailto:gcc@gcc.gnu.org
+  14. https://gcc.gnu.org/lists.html
+  15. http://www.fsf.org/
+  16. https://gcc.gnu.org/about.html
+  17. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.1/changes.html
+                             GCC 4.1 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 4.1 release series is [1]GCC 4.1.2.
+
+Caveats
+
+General Optimizer Improvements
+
+     * GCC now has infrastructure for inter-procedural optimizations and
+       the following inter-procedural optimizations are implemented:
+          + Profile guided inlining. When doing profile feedback guided
+            optimization, GCC can now use the profile to make better
+            informed decisions on whether inlining of a function is
+            profitable or not. This means that GCC will no longer inline
+            functions at call sites that are not executed very often, and
+            that functions at hot call sites are more likely to be
+            inlined.
+            A new parameter min-inline-recursive-probability is also now
+            available to throttle recursive inlining of functions with
+            small average recursive depths.
+          + Discovery of pure and const functions, a form of side-effects
+            analysis. While older GCC releases could also discover such
+            special functions, the new IPA-based pass runs earlier so that
+            the results are available to more optimizers. The pass is also
+            simply more powerful than the old one.
+          + Analysis of references to static variables and type escape
+            analysis, also forms of side-effects analysis. The results of
+            these passes allow the compiler to be less conservative about
+            call-clobbered variables and references. This results in more
+            redundant loads being eliminated and in making static
+            variables candidates for register promotion.
+          + Improvement of RTL-based alias analysis. The results of type
+            escape analysis are fed to the RTL type-based alias analyzer,
+            allowing it to disambiguate more memory references.
+          + Interprocedural constant propagation and function versioning.
+            This pass looks for functions that are always called with the
+            same constant value for one or more of the function arguments,
+            and propagates those constants into those functions.
+          + GCC will now eliminate static variables whose usage was
+            optimized out.
+          + -fwhole-program --combine can now be used to make all
+            functions in program static allowing whole program
+            optimization. As an exception, the main function and all
+            functions marked with the new externally_visible attribute are
+            kept global so that programs can link with runtime libraries.
+     * GCC can now do a form of partial dead code elimination (PDCE) that
+       allows code motion of expressions to the paths where the result of
+       the expression is actually needed. This is not always a win, so the
+       pass has been limited to only consider profitable cases. Here is an
+       example:
+    int foo (int *, int *);
+    int
+    bar (int d)
+    {
+      int a, b, c;
+      b = d + 1;
+      c = d + 2;
+      a = b + c;
+      if (d)
+        {
+          foo (&b, &c);
+          a = b + c;
+        }
+      printf ("%d\n", a);
+    }
+
+       The a = b + c can be sunk to right before the printf. Normal code
+       sinking will not do this, it will sink the first one above into the
+       else-branch of the conditional jump, which still gives you two
+       copies of the code.
+     * GCC now has a value range propagation pass. This allows the
+       compiler to eliminate bounds checks and branches. The results of
+       the pass can also be used to accurately compute branch
+       probabilities.
+     * The pass to convert PHI nodes to straight-line code (a form of
+       if-conversion for GIMPLE) has been improved significantly. The two
+       most significant improvements are an improved algorithm to
+       determine the order in which the PHI nodes are considered, and an
+       improvement that allow the pass to consider if-conversions of basic
+       blocks with more than two predecessors.
+     * Alias analysis improvements. GCC can now differentiate between
+       different fields of structures in Tree-SSA's virtual operands form.
+       This lets stores/loads from non-overlapping structure fields not
+       conflict. A new algorithm to compute points-to sets was contributed
+       that can allows GCC to see now that p->a and p->b, where p is a
+       pointer to a structure, can never point to the same field.
+     * Various enhancements to auto-vectorization:
+          + Incrementally preserve SSA form when vectorizing.
+          + Incrementally preserve loop-closed form when vectorizing.
+          + Improvements to peeling for alignment: generate better code
+            when the misalignment of an access is known at compile time,
+            or when different accesses are known to have the same
+            misalignment, even if the misalignment amount itself is
+            unknown.
+          + Consider dependence distance in the vectorizer.
+          + Externalize generic parts of data reference analysis to make
+            this analysis available to other passes.
+          + Vectorization of conditional code.
+          + Reduction support.
+     * GCC can now partition functions in sections of hot and cold code.
+       This can significantly improve performance due to better
+       instruction cache locality. This feature works best together with
+       profile feedback driven optimization.
+     * A new pass to avoid saving of unneeded arguments to the stack in
+       vararg functions if the compiler can prove that they will not be
+       needed.
+     * Transition of basic block profiling to tree level implementation
+       has been completed. The new implementation should be considerably
+       more reliable (hopefully avoiding profile mismatch errors when
+       using -fprofile-use or -fbranch-probabilities) and can be used to
+       drive higher level optimizations, such as inlining.
+       The -ftree-based-profiling command-line option was removed and
+       -fprofile-use now implies disabling old RTL level loop optimizer
+       (-fno-loop-optimize). Speculative prefetching optimization
+       (originally enabled by -fspeculative-prefetching) was removed.
+
+New Languages and Language specific improvements
+
+  C and Objective-C
+
+     * The old Bison-based C and Objective-C parser has been replaced by a
+       new, faster hand-written recursive-descent parser.
+
+  Ada
+
+     * The build infrastructure for the Ada runtime library and tools has
+       been changed to be better integrated with the rest of the build
+       infrastructure of GCC. This should make doing cross builds of Ada a
+       bit easier.
+
+  C++
+
+     * ARM-style name-injection of friend declarations is no longer the
+       default. For example:
+          struct S {
+            friend void f();
+          };
+
+          void g() { f(); }
+       will not be accepted; instead a declaration of f will need to be
+       present outside of the scope of S. The new -ffriend-injection
+       option will enable the old behavior.
+     * The (undocumented) extension which permitted templates with default
+       arguments to be bound to template template parameters with fewer
+       parameters has been deprecated, and will be removed in the next
+       major release of G++. For example:
+       template <template <typename> class C>
+       void f(C<double>) {}
+
+       template <typename T, typename U = int>
+       struct S {};
+
+       template void f(S<double>);
+
+       makes use of the deprecated extension. The reason this code is not
+       valid ISO C++ is that S is a template with two parameters;
+       therefore, it cannot be bound to C which has only one parameter.
+
+    Runtime Library (libstdc++)
+
+     * Optimization work:
+          + A new implementation of std::search_n is provided, better
+            performing in case of random access iterators.
+          + Added further efficient specializations of istream functions,
+            i.e., character array and string extractors.
+          + Other smaller improvements throughout.
+     * Policy-based associative containers, designed for high-performance,
+       flexibility and semantic safety are delivered in ext/pb_assoc.
+     * A versatile string class, __gnu_cxx::__versa_string, providing
+       facilities conforming to the standard requirements for
+       basic_string, is delivered in <ext/vstring.h>. In particular:
+          + Two base classes are provided: the default one avoids
+            reference counting and is optimized for short strings; the
+            alternate one, still uses it while improving in a few low
+            level areas (e.g., alignment). See vstring_fwd.h for some
+            useful typedefs.
+          + Various algorithms have been rewritten (e.g., replace), the
+            code streamlined and simple optimizations added.
+          + Option 3 of DR 431 is implemented for both available bases,
+            thus improving the support for stateful allocators.
+     * As usual, many bugs have been fixed (e.g., libstdc++/13583,
+       libstdc++/23953) and LWG resolutions put into effect for the first
+       time (e.g., DR 280, DR 464, N1780 recommendations for DR 233, TR1
+       Issue 6.19). The implementation status of TR1 is now tracked in the
+       docs in tr1.html.
+
+  Objective-C++
+
+     * A new language front end for Objective-C++ has been added. This
+       language allows users to mix the object oriented features of
+       Objective-C with those of C++.
+
+  Java (GCJ)
+
+     * Core library (libgcj) updates based on GNU Classpath 0.15 - 0.19
+       features (plus some 0.20 bug-fixes)
+          + Networking
+               o The java.net.HttpURLConnection implementation no longer
+                 buffers the entire response body in memory. This means
+                 that response bodies larger than available memory can now
+                 be handled.
+          + (N)IO
+               o NIO FileChannel.map implementation, fast bulk put
+                 implementation for DirectByteBuffer (speeds up this
+                 method 10x).
+               o FileChannel.lock() and FileChannel.force() implemented.
+          + XML
+               o gnu.xml fix for nodes created outside a namespace
+                 context.
+               o Add support for output indenting and
+                 cdata-section-elements output instruction in
+                 xml.transform.
+               o xml.xpath corrections for cases where elements/attributes
+                 might have been created in non-namespace-aware mode.
+                 Corrections to handling of XSL variables and minor
+                 conformance updates.
+          + AWT
+               o GNU JAWT implementation, the AWT Native Interface, which
+                 allows direct access to native screen resources from
+                 within a Canvas's paint method. GNU Classpath Examples
+                 comes with a Demo, see libjava/classpath/examples/README.
+               o awt.datatransfer updated to 1.5 with support for
+                 FlavorEvents. The gtk+ awt peers now allow copy/paste of
+                 text, images, URIs/files and serialized objects with
+                 other applications and tracking clipboard change events
+                 with gtk+ 2.6 (for gtk+ 2.4 only text and serialized
+                 objects are supported). A GNU Classpath Examples
+                 datatransfer Demo was added to show the new
+                 functionality.
+               o Split gtk+ awt peers event handling in two threads and
+                 improve gdk lock handling (solves several awt lock ups).
+               o Speed up awt Image loading.
+               o Better gtk+ scrollbar peer implementation when using gtk+
+                 >= 2.6.
+               o Handle image loading errors correctly for gdkpixbuf and
+                 MediaTracker.
+               o Better handle GDK lock. Properly prefix gtkpeer native
+                 functions (cp_gtk).
+               o GdkGraphics2D has been updated to use Cairo 0.5.x or
+                 higher.
+               o BufferedImage and GtkImage rewrites. All image drawing
+                 operations should now work correctly (flipping requires
+                 gtk+ >= 2.6)
+               o Future Graphics2D, image and text work is documented at:
+                 [2]http://developer.classpath.org/mediation/ClasspathGrap
+                 hicsImagesText
+               o When gtk+ 2.6 or higher is installed the default log
+                 handler will produce stack traces whenever a WARNING,
+                 CRITICAL or ERROR message is produced.
+          + Free Swing
+               o The RepaintManager has been reworked for more efficient
+                 painting, especially for large GUIs.
+               o The layout manager OverlayLayout has been implemented,
+                 the BoxLayout has been rewritten to make use of the
+                 SizeRequirements utility class and caching for more
+                 efficient layout.
+               o Improved accessibility support.
+               o Significant progress has been made in the implementation
+                 of the javax.swing.plaf.metal package, with most UI
+                 delegates in a working state now. Please test this with
+                 your own applications and provide feedback that will help
+                 us to improve this package.
+               o The GUI demo (gnu.classpath.examples.swing.Demo) has been
+                 extended to highlight various features in our Free Swing
+                 implementation. And it includes a look and feel switcher
+                 for Metal (default), Ocean and GNU themes.
+               o The javax.swing.plaf.multi package is now implemented.
+               o Editing and several key actions for JTree and JTable were
+                 implemented.
+               o Lots of icons and look and feel improvements for Free
+                 Swing basic and metal themes were added. Try running the
+                 GNU Classpath Swing Demo in examples
+                 (gnu.classpath.examples.swing.Demo) with:
+                 -Dswing.defaultlaf=javax.swing.plaf.basic.BasicLookAndFee
+                 l or
+                 -Dswing.defaultlaf=javax.swing.plaf.metal.MetalLookAndFee
+                 l
+               o Start of styled text capabilites for java.swing.text.
+               o DefaultMutableTreeNode pre-order, post-order, depth-first
+                 and breadth-first traversal enumerations implemented.
+               o JInternalFrame colors and titlebar draw properly.
+               o JTree is working up to par (icons, selection and keyboard
+                 traversal).
+               o JMenus were made more compatible in visual and
+                 programmatic behavior.
+               o JTable changeSelection and multiple selections
+                 implemented.
+               o JButton and JToggleButton change states work properly
+                 now.
+               o JFileChooser fixes.
+               o revalidate() and repaint() fixes which make Free Swing
+                 much more responsive.
+               o MetalIconFactory implemented.
+               o Free Swing Top-Level Compatibility. JFrame, JDialog,
+                 JApplet, JInternalFrame, and JWindow are now 1.5
+                 compatible in the sense that you can call add() and
+                 setLayout() directly on them, which will have the same
+                 effect as calling getContentPane().add() and
+                 getContentPane().setLayout().
+               o The JTree interface has been completed. JTrees now
+                 recognizes mouse clicks and selections work.
+               o BoxLayout works properly now.
+               o Fixed GrayFilter to actually work.
+               o Metal SplitPane implemented.
+               o Lots of Free Swing text and editor stuff work now.
+          + Free RMI and Corba
+               o Andrew Watson, Vice President and Technical Director of
+                 the Object Management Group, has officially assigned us
+                 20 bit Vendor Minor Code Id: 0x47430 ("GC") that will
+                 mark remote classpath-specific system exceptions.
+                 Obtaining the VMCID means that GNU Classpath now is a
+                 recogniseable type of node in a highly interoperable
+                 CORBA world.
+               o GNU Classpath now includes the first working draft to
+                 support the RMI over IIOP protocol. The current
+                 implementation is capable of remote invocations,
+                 transferring various Serializables and Externalizables
+                 via RMI-IIOP protocol. It can flatten graphs and, at
+                 least for the simple cases, is interoperable with 1.5
+                 JDKs.
+               o org.omg.PortableInterceptor and related functionality in
+                 other packages is now implemented:
+                    # The sever and client interceptors work as required
+                      since 1.4.
+                    # The IOR interceptor works as needed for 1.5.
+               o The org.omg.DynamicAny package is completed and passes
+                 the prepared tests.
+               o The Portable Object Adapter should now support the output
+                 of the recent IDL to java compilers. These compilers now
+                 generate servants and not CORBA objects as before, making
+                 the output depend on the existing POA implementation.
+                 Completing POA means that such code can already be tried
+                 to run on Classpath. Our POA is tested for the following
+                 usager scenarios:
+                    # POA converts servant to the CORBA object.
+                    # Servant provides to the CORBA object.
+                    # POA activates new CORBA object with the given Object
+                      Id (byte array) that is later accessible for the
+                      servant.
+                    # During the first call, the ServantActivator provides
+                      servant for this and all subsequent calls on the
+                      current object.
+                    # During each call, the ServantLocator provides
+                      servant for this call only.
+                    # ServantLocator or ServantActivator forwards call to
+                      another server.
+                    # POA has a single servant, responsible for all
+                      objects.
+                    # POA has a default servant, but some objects are
+                      explicitly connected to they specific servants.
+                 The POA is verified using tests from the former
+                 cost.omg.org.
+               o The CORBA implementation is now a working prototype that
+                 should support features up to 1.3 inclusive. We invite
+                 groups writing CORBA dependent applications to try
+                 Classpath implementation, reporting any possible bugs.
+                 The CORBA prototype is interoperable with Sun's
+                 implementation v 1.4, transferring object references,
+                 primitive types, narrow and wide strings, arrays,
+                 structures, trees, abstract interfaces and value types
+                 (feature of CORBA 2.3) between these two platforms.
+                 Remote exceptions are transferred and handled correctly.
+                 The stringified object references (IORs) from various
+                 sources are parsed as required. The transient (for
+                 current session) and permanent (till jre restart)
+                 redirections work. Both Little and Big Endian encoded
+                 messages are accepted. The implementation is verified
+                 using tests from the former cost.omg.org. The current
+                 release includes working examples (see the examples
+                 directory), demonstrating the client-server
+                 communication, using either CORBA Request or IDL-based
+                 stub (usually generated by a IDL to java compiler). These
+                 examples also show how to use the Classpath CORBA naming
+                 service. The IDL to java compiler is not yet written, but
+                 as our library must be compatible, it naturally accepts
+                 the output of other idlj implementations.
+          + Misc
+               o Updated TimeZone data against Olson tzdata2005l.
+               o Make zip and jar packages UTF-8 clean.
+               o "native" code builds and compiles (warning free) on
+                 Darwin and Solaris.
+               o java.util.logging.FileHandler now rotates files.
+               o Start of a generic JDWP framework in gnu/classpath/jdwp.
+                 This is unfinished, but feedback (at classpath@gnu.org)
+                 from runtime hackers is greatly appreciated. Although
+                 most of the work is currently being done around gcj/gij
+                 we want this framework to be as VM neutral as possible.
+                 Early design is described in:
+                 [3]https://gcc.gnu.org/ml/java/2005-05/msg00260.html
+               o QT4 AWT peers, enable by giving configure
+                 --enable-qt-peer. Included, but not ready for production
+                 yet. They are explicitly disabled and not supported. But
+                 if you want to help with the development of these new
+                 features we are interested in feedback. You will have to
+                 explicitly enable them to try them out (and they will
+                 most likely contain bugs).
+               o Documentation fixes all over the place. See
+                 [4]http://developer.classpath.org/doc/
+
+New Targets and Target Specific Improvements
+
+  IA-32/x86-64
+
+     * The x86-64 medium model (that allows building applications whose
+       data segment exceeds 4GB) was redesigned to match latest ABI draft.
+       New implementation split large datastructures into separate segment
+       improving performance of accesses to small datastructures and also
+       allows linking of small model libraries into medium model programs
+       as long as the libraries are not accessing the large datastructures
+       directly. Medium model is also supported in position independent
+       code now.
+       The ABI change results in partial incompatibility among medium
+       model objects. Linking medium model libraries (or objects) compiled
+       with new compiler into medium model program compiled with older
+       will likely result in exceeding ranges of relocations.
+       Binutils 2.16.91 or newer are required for compiling medium model
+       now.
+
+  RS6000 (POWER/PowerPC)
+
+     * The AltiVec vector primitives in <altivec.h> are now implemented in
+       a way that puts a smaller burden on the preprocessor, instead
+       processing the "overloading" in the front ends. This should benefit
+       compilation speed on AltiVec vector code.
+     * AltiVec initializers now are generated more efficiently.
+     * The popcountb instruction available on POWER5 now is generated.
+     * The floating point round to integer instructions available on
+       POWER5+ now is generated.
+     * Floating point divides can be synthesized using the floating point
+       reciprocal estimate instructions.
+     * Double precision floating point constants are initialized as single
+       precision values if they can be represented exactly.
+
+  S/390, zSeries and System z9
+
+     * Support for the IBM System z9 109 processor has been added. When
+       using the -march=z9-109 option, the compiler will generate code
+       making use of instructions provided by the extended immediate
+       facility.
+     * Support for 128-bit IEEE floating point has been added. When using
+       the -mlong-double-128 option, the compiler will map the long double
+       data type to 128-bit IEEE floating point. Using this option
+       constitutes an ABI change, and requires glibc support.
+     * Various changes to improve performance of generated code have been
+       implemented, including:
+          + In functions that do not require a literal pool, register %r13
+            (which is traditionally reserved as literal pool pointer), can
+            now be freely used for other purposes by the compiler.
+          + More precise tracking of register use allows the compiler to
+            generate more efficient function prolog and epilog code in
+            certain cases.
+          + The SEARCH STRING, COMPARE LOGICAL STRING, and MOVE STRING
+            instructions are now used to implement C string functions.
+          + The MOVE CHARACTER instruction with single byte overlap is now
+            used to implement the memset function with non-zero fill byte.
+          + The LOAD ZERO instructions are now used where appropriate.
+          + The INSERT CHARACTERS UNDER MASK, STORE CHARACTERS UNDER MASK,
+            and INSERT IMMEDIATE instructions are now used more frequently
+            to optimize bitfield operations.
+          + The BRANCH ON COUNT instruction is now used more frequently.
+            In particular, the fact that a loop contains a subroutine call
+            no longer prevents the compiler from using this instruction.
+          + The compiler is now aware that all shift and rotate
+            instructions implicitly truncate the shift count to six bits.
+     * Back-end support for the following generic features has been
+       implemented:
+          + The full set of [5]built-in functions for atomic memory
+            access.
+          + The -fstack-protector feature.
+          + The optimization pass avoiding unnecessary stores of incoming
+            argument registers in functions with variable argument list.
+
+  SPARC
+
+     * The default code model in 64-bit mode has been changed from
+       Medium/Anywhere to Medium/Middle on Solaris.
+     * TLS support is disabled by default on Solaris prior to release 10.
+       It can be enabled on TLS-capable Solaris 9 versions (4/04 release
+       and later) by specifying --enable-tls at configure time.
+
+  MorphoSys
+
+     * Support has been added for this new architecture.
+
+Obsolete Systems
+
+Documentation improvements
+
+Other significant improvements
+
+     * GCC can now emit code for protecting applications from
+       stack-smashing attacks. The protection is realized by buffer
+       overflow detection and reordering of stack variables to avoid
+       pointer corruption.
+     * Some built-in functions have been fortified to protect them against
+       various buffer overflow (and format string) vulnerabilities.
+       Compared to the mudflap bounds checking feature, the safe builtins
+       have far smaller overhead. This means that programs built using
+       safe builtins should not experience any measurable slowdown.
+
+GCC 4.1.2
+
+   This is the [6]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.1.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   When generating code for a shared library, GCC now recognizes that
+   global functions may be replaced when the program runs. Therefore, it
+   is now more conservative in deducing information from the bodies of
+   functions. For example, in this example:
+    void f() {}
+    void g() {
+     try { f(); }
+     catch (...) {
+       cout << "Exception";
+     }
+    }
+
+   G++ would previously have optimized away the catch clause, since it
+   would have concluded that f cannot throw exceptions. Because users may
+   replace f with another function in the main body of the program, this
+   optimization is unsafe, and is no longer performed. If you wish G++ to
+   continue to optimize as before, you must add a throw() clause to the
+   declaration of f to make clear that it does not throw exceptions.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [7]GCC manuals. If that fails, the
+    [8]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [9]gcc@gcc.gnu.org. All of [10]our lists have public
+    archives.
+
+   Copyright (C) [11]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [12]maintained by the GCC team. Last modified
+   2014-06-28[13].
+
+References
+
+   1. http://gcc.gnu.org/gcc-4.1/changes.html#4.1.2
+   2. http://developer.classpath.org/mediation/ClasspathGraphicsImagesText
+   3. https://gcc.gnu.org/ml/java/2005-05/msg00260.html
+   4. http://developer.classpath.org/doc/
+   5. https://gcc.gnu.org/onlinedocs/gcc-4.1.0/gcc/Atomic-Builtins.html
+   6. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.1.2
+   7. https://gcc.gnu.org/onlinedocs/
+   8. mailto:gcc-help@gcc.gnu.org
+   9. mailto:gcc@gcc.gnu.org
+  10. https://gcc.gnu.org/lists.html
+  11. http://www.fsf.org/
+  12. https://gcc.gnu.org/about.html
+  13. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.0/index.html
+                             GCC 4.0 Release Series
+
+   January 31, 2007
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 4.0.4.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 4.0.3 relative to previous releases of GCC.
+
+Release History
+
+   GCC 4.0.4
+          January 31, 2007 ([2]changes)
+
+   GCC 4.0.3
+          March 10, 2006 ([3]changes)
+
+   GCC 4.0.2
+          September 28, 2005 ([4]changes)
+
+   GCC 4.0.1
+          July 7, 2005 ([5]changes)
+
+   GCC 4.0.0
+          April 20, 2005 ([6]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [7]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [8]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [9]GCC project
+   web site or contact the [10]GCC development mailing list.
+
+   To obtain GCC please use [11]our mirror sites, or [12]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [13]GCC manuals. If that fails, the
+    [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
+    archives.
+
+   Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [18]maintained by the GCC team. Last modified
+   2014-06-28[19].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
+   3. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.3
+   4. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.2
+   5. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.1
+   6. http://gcc.gnu.org/gcc-4.0/changes.html
+   7. http://gcc.gnu.org/gcc-4.0/buildstat.html
+   8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   9. http://gcc.gnu.org/index.html
+  10. mailto:gcc@gcc.gnu.org
+  11. http://gcc.gnu.org/mirrors.html
+  12. http://gcc.gnu.org/svn.html
+  13. https://gcc.gnu.org/onlinedocs/
+  14. mailto:gcc-help@gcc.gnu.org
+  15. mailto:gcc@gcc.gnu.org
+  16. https://gcc.gnu.org/lists.html
+  17. http://www.fsf.org/
+  18. https://gcc.gnu.org/about.html
+  19. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-4.0/changes.html
+                             GCC 4.0 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 4.0 release series is [1]GCC 4.0.4.
+
+Caveats
+
+     * GCC now generates location lists by default when compiling with
+       debug info and optimization.
+          + GDB 6.0 and older crashes when it sees location lists. GDB 6.1
+            or later is needed to debug binaries containing location
+            lists.
+          + When you are trying to view a value of a variable in a part of
+            a function where it has no location (for example when the
+            variable is no longer used and thus its location was used for
+            something else) GDB will say that it is not available.
+       You can disable generating location lists by -fno-var-tracking.
+     * GCC no longer accepts the -fwritable-strings option. Use named
+       character arrays when you need a writable string.
+     * The options -freduce-all-givs and -fmove-all-movables have been
+       discontinued. They were used to circumvent a shortcoming in the
+       heuristics of the old loop optimization code with respect to common
+       Fortran constructs. The new (tree) loop optimizer works differently
+       and doesn't need those work-arounds.
+     * The graph-coloring register allocator, formerly enabled by the
+       option -fnew-ra, has been discontinued.
+     * -I- has been deprecated. -iquote is meant to replace the need for
+       this option.
+     * The MIPS -membedded-pic and -mrnames options have been removed.
+     * All MIPS targets now require the GNU assembler. In particular, IRIX
+       configurations can no longer use the MIPSpro assemblers, although
+       they do still support the MIPSpro linkers.
+     * The SPARC option -mflat has been removed.
+     * English-language diagnostic messages will now use Unicode quotation
+       marks in UTF-8 locales. (Non-English messages already used the
+       quotes appropriate for the language in previous releases.) If your
+       terminal does not support UTF-8 but you are using a UTF-8 locale
+       (such locales are the default on many GNU/Linux systems) then you
+       should set LC_CTYPE=C in the environment to disable that locale.
+       Programs that parse diagnostics and expect plain ASCII
+       English-language messages should set LC_ALL=C. See [2]Markus Kuhn's
+       explanation of Unicode quotation marks for more information.
+     * The specs file is no longer installed on most platforms. Most users
+       will be totally unaffected. However, if you are accustomed to
+       editing the specs file yourself, you will now have to use the
+       -dumpspecs option to generate the specs file, and then edit the
+       resulting file.
+
+General Optimizer Improvements
+
+     * The [3]tree ssa branch has been merged. This merge has brought in a
+       completely new optimization framework based on a higher level
+       intermediate representation than the existing RTL representation.
+       Numerous new code transformations based on the new framework are
+       available in GCC 4.0, including:
+          + Scalar replacement of aggregates
+          + Constant propagation
+          + Value range propagation
+          + Partial redundancy elimination
+          + Load and store motion
+          + Strength reduction
+          + Dead store elimination
+          + Dead and unreachable code elimination
+          + [4]Autovectorization
+          + Loop interchange
+          + Tail recursion by accumulation
+       Many of these passes outperform their counterparts from previous
+       GCC releases.
+     * [5]Swing Modulo Scheduling (SMS). An RTL level instruction
+       scheduling optimization intended for loops that perform heavy
+       computations.
+
+New Languages and Language specific improvements
+
+  C family
+
+     * The sentinel attribute has been added to GCC. This function
+       attribute allows GCC to warn when variadic functions such as execl
+       are not NULL terminated. See the GCC manual for a complete
+       description of its behavior.
+     * Given __attribute__((alias("target"))) it is now an error if target
+       is not a symbol, defined in the same translation unit. This also
+       applies to aliases created by #pragma weak alias=target. This is
+       because it's meaningless to define an alias to an undefined symbol.
+       On Solaris, the native assembler would have caught this error, but
+       GNU as does not.
+
+  C and Objective-C
+
+     * The -Wstrict-aliasing=2 option has been added. This warning catches
+       all unsafe cases, but it may also give a warning for some cases
+       that are safe.
+     * The cast-as-lvalue, conditional-expression-as-lvalue and
+       compound-expression-as-lvalue extensions, which were deprecated in
+       3.3.4 and 3.4, have been removed.
+     * The -fwritable-strings option, which was deprecated in 3.4, has
+       been removed.
+     * #pragma pack() semantics have been brought closer to those used by
+       other compilers. This also applies to C++.
+     * Taking the address of a variable with register storage is invalid
+       in C. GCC now issues an error instead of a warning.
+     * Arrays of incomplete element type are invalid in C. GCC now issues
+       an error for such arrays. Declarations such as extern struct s x[];
+       (where struct s has not been defined) can be moved after the
+       definition of struct s. Function parameters declared as arrays of
+       incomplete type can instead be declared as pointers.
+
+  C++
+
+     * When compiling without optimizations (-O0), the C++ frontend is
+       much faster than in any previous versions of GCC. Independent
+       testers have measured speed-ups up to 25% in real-world production
+       code, compared to the 3.4 family (which was already the fastest
+       version to date). Upgrading from older versions might show even
+       bigger improvements.
+     * ELF visibility attributes can now be applied to a class type, so
+       that it affects every member function of a class at once, without
+       having to specify each individually:
+class __attribute__ ((visibility("hidden"))) Foo
+{
+   int foo1();
+   void foo2();
+};
+       The syntax is deliberately similar to the __declspec() system used
+       by Microsoft Windows based compilers, allowing cross-platform
+       projects to easily reuse their existing macro system for denoting
+       exports and imports. By explicitly marking internal classes never
+       used outside a binary as hidden, one can completely avoid PLT
+       indirection overheads during their usage by the compiler. You can
+       find out more about the advantages of this at
+       [6]http://www.akkadia.org/drepper/dsohowto.pdf
+     * The -fvisibility-inlines-hidden option has been added which marks
+       all inlineable functions as having hidden ELF visibility, thus
+       removing their symbol and typeinfo from the exported symbol table
+       of the output ELF binary. Using this option can reduce the exported
+       symbol count of template-heavy code by up to 40% with no code
+       change at all, thus notably improving link and load times for the
+       binary as well as a reduction in size of up to 10%. Also, check the
+       new [7]-fvisibility option.
+     * The compiler now uses the library interface specified by the [8]C++
+       ABI for thread-safe initialization of function-scope static
+       variables. Most users should leave this alone, but embedded
+       programmers may want to disable this by specifying
+       -fno-threadsafe-statics for a small savings in code size.
+     * Taking the address of an explicit register variable is no longer
+       supported. Note that C++ allows taking the address of variables
+       with register storage so this will continue to compile with a
+       warning. For example, assuming that r0 is a machine register:
+register int foo asm ("r0");
+register int bar;
+&foo; // error, no longer accepted
+&bar; // OK, with a warning
+     * G++ has an undocumented extension to virtual function covariancy
+       rules that allowed the overrider to return a type that was
+       implicitly convertable to the overridden function's return type.
+       For instance a function returning void * could be overridden by a
+       function returning T *. This is now deprecated and will be removed
+       in a future release.
+     * The G++ minimum and maximum operators (<? and >?) and their
+       compound forms (<?=) and >?=) have been deprecated and will be
+       removed in a future version. Code using these operators should be
+       modified to use std::min and std::max instead.
+     * Declaration of nested classes of class templates as friends are
+       supported:
+template <typename T> struct A {
+  class B {};
+};
+class C {
+  template <typename T> friend class A<T>::B;
+};
+       This complements the feature member functions of class templates as
+       friends introduced in GCC 3.4.0.
+     * When declaring a friend class using an unqualified name, classes
+       outside the innermost non-class scope are not searched:
+class A;
+namespace N {
+  class B {
+    friend class A;   // Refer to N::A which has not been declared yet
+                      // because name outside namespace N are not searched
+    friend class ::A; // Refer to ::A
+  };
+}
+       Hiding the friend name until declaration is still not implemented.
+     * Friends of classes defined outside their namespace are correctly
+       handled:
+namespace N {
+  class A;
+}
+class N::A {
+  friend class B; // Refer to N::B in GCC 4.0.0
+                  // but ::B in earlier versions of GCC
+};
+
+    Runtime Library (libstdc++)
+
+     * Optimization work:
+          + Added efficient specializations of istream functions for char
+            and wchar_t.
+          + Further performance tuning of strings, in particular wrt
+            single-char append and getline.
+          + iter_swap - and therefore most of the mutating algorithms -
+            now makes an unqualified call to swap when the value_type of
+            the two iterators is the same.
+     * A large subset of the features in Technical Report 1 (TR1 for
+       short) is experimentally delivered (i.e., no guarantees about the
+       implementation are provided. In particular it is not promised that
+       the library will remain link-compatible when code using TR1 is
+       used):
+          + General utilities such as reference_wrapper and shared_ptr.
+          + Function objects, i.e., result_of, mem_fn, bind, function.
+          + Support for metaprogramming.
+          + New containers such as tuple, array, unordered_set,
+            unordered_map, unordered_multiset, unordered_multimap.
+     * As usual, many bugs have been fixed and LWG resolutions implemented
+       for the first time (e.g., DR 409).
+
+  Java
+
+     * In order to prevent naming conflicts with other implementations of
+       these tools, some GCJ binaries have been renamed:
+          + rmic is now grmic,
+          + rmiregistry is now grmiregistry, and
+          + jar is now fastjar.
+       In particular, these names were problematic for the jpackage.org
+       packaging conventions which install symlinks in /usr/bin that point
+       to the preferred versions of these tools.
+     * The -findirect-dispatch argument to the compiler now works and
+       generates code following a new "binary compatibility" ABI. Code
+       compiled this way follows the binary compatibility rules of the
+       Java Language Specification.
+     * libgcj now has support for using GCJ as a JIT, using the
+       gnu.gcj.jit family of system properties.
+     * libgcj can now find a shared library corresponding to the bytecode
+       representation of a class. See the documentation for the new
+       gcj-dbtool program, and the new gnu.gcj.precompiled.db.path system
+       property.
+     * There have been many improvements to the class library. Here are
+       some highlights:
+          + Much more of AWT and Swing exist.
+          + Many new packages and classes were added, including
+            java.util.regex, java.net.URI, javax.crypto,
+            javax.crypto.interfaces, javax.crypto.spec, javax.net,
+            javax.net.ssl, javax.security.auth,
+            javax.security.auth.callback, javax.security.auth.login,
+            javax.security.auth.x500, javax.security.sasl, org.ietf.jgss,
+            javax.imageio, javax.imageio.event, javax.imageio.spi,
+            javax.print, javax.print.attribute,
+            javax.print.attribute.standard, javax.print.event, and
+            javax.xml
+          + Updated SAX and DOM, and imported GNU JAXP
+
+  Fortran
+
+     * A new [9]Fortran front end has replaced the aging GNU Fortran 77
+       front end. The new front end supports Fortran 90 and Fortran 95. It
+       may not yet be as stable as the old Fortran front end.
+
+  Ada
+
+     * Ada (with tasking and Zero Cost Exceptions) is now available on
+       many more targets, including but not limited to: alpha-linux,
+       hppa-hpux, hppa-linux, powerpc-darwin, powerpc-linux, s390-linux,
+       s390x-linux, sparc-linux.
+     * Some of the new Ada 2005 features are now implemented like
+       Wide_Wide_Character and Ada.Containers.
+     * Many bugs have been fixed, tools and documentation improved.
+     * To compile Ada from the sources, install an older working Ada
+       compiler and then use --enable-languages=ada at configuration time,
+       since the Ada frontend is not currently activated by default. See
+       the [10]Installing GCC for details.
+
+New Targets and Target Specific Improvements
+
+  H8/300
+
+     * The frame layout has changed. In the new layout, the prologue of a
+       function first saves registers and then allocate space for locals,
+       resulting in an 1% improvement on code size.
+
+  IA-32/x86-64 (AMD64)
+
+     * The acos, asin, drem, exp10, exp2, expm1, fmod, ilogb, log10,
+       log1p, log2, logb and tan mathematical builtins (and their float
+       and long double variants) are now implemented as inline x87
+       intrinsics when using -ffast-math.
+     * The ceil, floor, nearbyint, rint and trunc mathematical builtins
+       (and their float and long double variants) are now implemented as
+       inline x87 intrinsics when using -ffast-math.
+     * The x87's fsincos instruction is now used automatically with
+       -ffast-math when calculating both the sin and cos of the same
+       argument.
+     * Instruction selection for multiplication and division by constants
+       has been improved.
+
+  IA-64
+
+     * Floating point division, integer division and sqrt are now inlined,
+       resulting in significant performance improvements on some codes.
+
+  MIPS
+
+     * Division by zero checks now use conditional traps if the target
+       processor supports them. This decreases code size by one word per
+       division operation. The old behavior (branch and break) can be
+       obtained either at configure time by passing --with-divide=breaks
+       to configure or at runtime by passing -mdivide-breaks to GCC.
+     * Support for MIPS64 paired-single instructions has been added. It is
+       enabled by -mpaired-single and can be accessed using both the
+       target-independent vector extensions and new MIPS-specific built-in
+       functions.
+     * Support for the MIPS-3D ASE has been added. It is enabled by
+       -mips3d and provides new MIPS-3D-specific built-in functions.
+     * The -mexplicit-relocs option now supports static n64 code (as is
+       used, for example, in 64-bit linux kernels). -mexplicit-relocs
+       should now be feature-complete and is enabled by default when GCC
+       is configured to use a compatible assembler.
+     * Support for the NEC VR4130 series has been added. This support
+       includes the use of VR-specific instructions and a new VR4130
+       scheduler. Full VR4130 support can be selected with -march=vr4130
+       while code for any ISA can be tuned for the VR4130 using
+       -mtune=vr4130. There is also a new -mvr4130-align option that
+       produces better schedules at the cost of increased code size.
+     * Support for the Broadcom SB-1 has been extended. There is now an
+       SB-1 scheduler as well as support for the SB-1-specific
+       paired-single instructions. Full SB-1 support can be selected with
+       -march=sb1 while code for any ISA can be optimized for the SB-1
+       using -mtune=sb1.
+     * The compiler can now work around errata in R4000, R4400, VR4120 and
+       VR4130 processors. These workarounds are enabled by -mfix-r4000,
+       -mfix-r4400, -mfix-vr4120 and -mfix-vr4130 respectively. The VR4120
+       and VR4130 workarounds need binutils 2.16 or above.
+     * IRIX shared libraries are now installed into the standard library
+       directories: o32 libraries go into lib/, n32 libraries go into
+       lib32/ and n64 libraries go into lib64/.
+     * The compiler supports a new -msym32 option. It can be used to
+       optimize n64 code in which all symbols are known to have 32-bit
+       values.
+
+  S/390 and zSeries
+
+     * New command-line options help to generate code intended to run in
+       an environment where stack space is restricted, e.g. Linux kernel
+       code:
+          + -mwarn-framesize and -mwarn-dynamicstack trigger compile-time
+            warnings for single functions that require large or dynamic
+            stack frames.
+          + -mstack-size and -mstack-guard generate code that checks for
+            stack overflow at run time.
+          + -mpacked-stack generates code that reduces the stack frame
+            size of many functions by reusing unneeded parts of the stack
+            bias area.
+     * The -msoft-float option now ensures that generated code never
+       accesses floating point registers.
+     * The s390x-ibm-tpf target now fully supports C++, including
+       exceptions and threads.
+     * Various changes to improve performance of the generated code have
+       been implemented, including:
+          + GCC now uses sibling calls where possible.
+          + Condition code handling has been optimized, allowing GCC to
+            omit redundant comparisons in certain cases.
+          + The cost function guiding many optimizations has been refined
+            to more accurately represent the z900 and z990 processors.
+          + The ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL WITH BORROW
+            instructions are now used to avoid conditional branches in
+            certain cases.
+          + The back end now uses the LEGITIMIZE_RELOAD_ADDRESS feature to
+            optimize address arithmetic required to access large stack
+            frames.
+          + GCC now makes more efficient use of memory-to-memory type
+            instructions (MVC, CLC, ...).
+          + More precise tracking of special register use allows better
+            instruction scheduling, in particular of the function prologue
+            and epilogue sequences.
+          + The Java front end now generates inline code to implement
+            integer division, instead of calling library routines.
+
+  SPARC
+
+     * The options -mv8, -msparclite, -mcypress, -msupersparc, -mf930 and
+       -mf934 have been removed. They have been replaced with -mcpu=xxx.
+     * The internal model used to estimate the relative cost of each
+       instruction has been updated. It is expected to give better results
+       on recent UltraSPARC processors.
+     * Code generation for function prologues and epilogues has been
+       improved, resulting in better scheduling and allowing multiple exit
+       points in functions.
+     * Support for Sun's Visual Instruction Set (VIS) has been enhanced.
+       It is enabled by -mvis and provides new built-in functions for VIS
+       instructions on UltraSPARC processors.
+     * The option -mapp-regs has been turned on by default on Solaris too.
+
+  NetWare
+
+     * Novell NetWare (on ix86, no other hardware platform was ever really
+       supported by this OS) has been re-enabled and the ABI supported by
+       GCC has been brought into sync with that of MetroWerks CodeWarrior
+       (the ABI previously supported was that of some Unix systems, which
+       NetWare never tried to support).
+
+Obsolete Systems
+
+   Support for a number of older systems has been declared obsolete in GCC
+   4.0. Unless there is activity to revive them, the next release of GCC
+   will have their sources permanently removed.
+
+   All GCC ports for the following processor architectures have been
+   declared obsolete:
+     * Intel i860
+     * Ubicom IP2022
+     * National Semiconductor NS32K
+     * Texas Instruments TMS320C[34]x
+
+   Also, those for some individual systems have been obsoleted:
+     * SPARC family
+          + SPARClite-based systems (sparclite-*-coff, sparclite-*-elf,
+            sparc86x-*-elf)
+          + OpenBSD 32-bit (sparc-*-openbsd*)
+
+Documentation improvements
+
+Other significant improvements
+
+     * Location lists are now generated by default when compiling with
+       debug info and optimization. Location lists provide more accurate
+       debug info about locations of variables and they allow debugging
+       code compiled with -fomit-frame-pointer.
+     * The -fvisibility option has been added which allows the default ELF
+       visibility of all symbols to be set per compilation and the new
+       #pragma GCC visibility preprocessor command allows the setting of
+       default ELF visibility for a region of code. Using
+       -fvisibility=hidden especially in combination with the new
+       -fvisibility-inlines-hidden can yield substantial improvements in
+       output binary quality including avoiding PLT indirection overheads,
+       reduction of the exported symbol count by up to 60% (with resultant
+       improvements to link and load times), better scope for the
+       optimizer to improve code and up to a 20% reduction in binary size.
+       Using these options correctly yields a binary with a similar symbol
+       count to a Windows DLL.
+       Perhaps more importantly, this new feature finally allows (with
+       careful planning) complete avoidance of symbol clashes when
+       manually loading shared objects with RTLD_GLOBAL, thus finally
+       solving problems many projects such as python were forced to use
+       RTLD_LOCAL for (with its resulting issues for C++ correctness). You
+       can find more information about using these options at
+       [11]https://gcc.gnu.org/wiki/Visibility.
+     __________________________________________________________________
+
+GCC 4.0.1
+
+   This is the [12]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.0.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+GCC 4.0.2
+
+   This is the [13]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.0.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   Unfortunately, due to a release engineering failure, this release has a
+   regression on Solaris that will affect some C++ programs. We suggest
+   that Solaris users apply a [14]patch that corrects the problem. Users
+   who do not wish to apply the patch should explicitly link C++ programs
+   with the -pthreads option, even if they do not use threads. This
+   problem has been corrected in the current 4.0 branch sources and will
+   not be present in GCC 4.0.3.
+
+GCC 4.0.3
+
+   Starting with this release, the function getcontext is recognized by
+   the compiler as having the same semantics as the setjmp function. In
+   particular, the compiler will ensure that all registers are dead before
+   calling such a function and will emit a warning about the variables
+   that may be clobbered after the second return from the function.
+
+GCC 4.0.4
+
+   This is the [15]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 4.0.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+   The 4.0.4 release is provided for those that require a high degree of
+   binary compatibility with previous 4.0.x releases. For most users, the
+   GCC team recommends that version 4.1.1 or later be used instead."
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [16]GCC manuals. If that fails, the
+    [17]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [18]gcc@gcc.gnu.org. All of [19]our lists have public
+    archives.
+
+   Copyright (C) [20]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [21]maintained by the GCC team. Last modified
+   2014-06-28[22].
+
+References
+
+   1. http://gcc.gnu.org/gcc-4.0/changes.html#4.0.4
+   2. http://www.cl.cam.ac.uk/~mgk25/ucs/quotes.html
+   3. http://gcc.gnu.org/projects/tree-ssa/
+   4. http://gcc.gnu.org/projects/tree-ssa/vectorization.html
+   5. http://gcc.gnu.org/news/sms.html
+   6. http://www.akkadia.org/drepper/dsohowto.pdf
+   7. http://gcc.gnu.org/gcc-4.0/changes.html#visibility
+   8. http://mentorembedded.github.com/cxx-abi/
+   9. http://gcc.gnu.org/fortran/
+  10. https://gcc.gnu.org/install/
+  11. https://gcc.gnu.org/wiki/Visibility
+  12. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.1
+  13. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.2
+  14. https://gcc.gnu.org/ml/gcc-cvs/2005-09/msg00984.html
+  15. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.0.4
+  16. https://gcc.gnu.org/onlinedocs/
+  17. mailto:gcc-help@gcc.gnu.org
+  18. mailto:gcc@gcc.gnu.org
+  19. https://gcc.gnu.org/lists.html
+  20. http://www.fsf.org/
+  21. https://gcc.gnu.org/about.html
+  22. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.4/index.html
+                             GCC 3.4 Release Series
+
+   May 26, 2006
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.4.6.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 3.4.4 relative to previous releases of GCC. This is the last of the
+   3.4.x series.
+
+   The GCC 3.4 release series includes numerous [2]new features,
+   improvements, bug fixes, and other changes, thanks to an [3]amazing
+   group of volunteers.
+
+Release History
+
+   GCC 3.4.6
+          March 6, 2006 ([4]changes)
+
+   GCC 3.4.5
+          November 30, 2005 ([5]changes)
+
+   GCC 3.4.4
+          May 18, 2005 ([6]changes)
+
+   GCC 3.4.3
+          November 4, 2004 ([7]changes)
+
+   GCC 3.4.2
+          September 6, 2004 ([8]changes)
+
+   GCC 3.4.1
+          July 1, 2004 ([9]changes)
+
+   GCC 3.4.0
+          April 18, 2004 ([10]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [11]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [12]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [13]GCC
+   project web site or contact the [14]GCC development mailing list.
+
+   To obtain GCC please use [15]our mirror sites, or [16]our SVN server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [17]GCC manuals. If that fails, the
+    [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
+    archives.
+
+   Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [22]maintained by the GCC team. Last modified
+   2014-06-28[23].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-3.4/changes.html
+   3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   4. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
+   5. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.5
+   6. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.4
+   7. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.3
+   8. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.2
+   9. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.1
+  10. http://gcc.gnu.org/gcc-3.4/changes.html
+  11. http://gcc.gnu.org/gcc-3.4/buildstat.html
+  12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  13. http://gcc.gnu.org/index.html
+  14. mailto:gcc@gcc.gnu.org
+  15. http://gcc.gnu.org/mirrors.html
+  16. http://gcc.gnu.org/svn.html
+  17. https://gcc.gnu.org/onlinedocs/
+  18. mailto:gcc-help@gcc.gnu.org
+  19. mailto:gcc@gcc.gnu.org
+  20. https://gcc.gnu.org/lists.html
+  21. http://www.fsf.org/
+  22. https://gcc.gnu.org/about.html
+  23. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.4/changes.html
+                             GCC 3.4 Release Series
+                        Changes, New Features, and Fixes
+
+   The final release in the 3.4 release series is [1]GCC 3.4.6. The series
+   is now closed.
+
+   GCC 3.4 has [2]many improvements in the C++ frontend. Before reporting
+   a bug, please make sure it's really GCC, and not your code, that is
+   broken.
+
+Caveats
+
+     * GNU Make is now required to build GCC.
+     * With -nostdinc the preprocessor used to ignore both standard
+       include paths and include paths contained in environment variables.
+       It was neither documented nor intended that environment variable
+       paths be ignored, so this has been corrected.
+     * GCC no longer accepts the options -fvolatile, -fvolatile-global and
+       -fvolatile-static. It is unlikely that they worked correctly in any
+       3.x release.
+     * GCC no longer ships <varargs.h>. Use <stdarg.h> instead.
+     * Support for all the systems [3]obsoleted in GCC 3.3 has been
+       removed from GCC 3.4. See below for a [4]list of systems which are
+       obsoleted in this release.
+     * GCC now requires an ISO C90 (ANSI C89) C compiler to build. K&R C
+       compilers will not work.
+     * The implementation of the [5]MIPS ABIs has changed. As a result,
+       the code generated for certain MIPS targets will not be binary
+       compatible with earlier releases.
+     * In previous releases, the MIPS port had a fake "hilo" register with
+       the user-visible name accum. This register has been removed.
+     * The implementation of the [6]SPARC ABIs has changed. As a result,
+       the code generated will not be binary compatible with earlier
+       releases in certain cases.
+     * The configure option --enable-threads=pthreads has been removed;
+       use --enable-threads=posix instead, which should have the same
+       effect.
+     * Code size estimates used by inlining heuristics for C, Objective-C,
+       C++ and Java have been redesigned significantly. As a result the
+       parameters of -finline-insns, --param max-inline-insns-single and
+       --param max-inline-insns-auto need to be reconsidered.
+     * --param max-inline-slope and --param min-inline-insns have been
+       removed; they are not needed for the new bottom-up inlining
+       heuristics.
+     * The new unit-at-a-time compilation scheme has several compatibility
+       issues:
+          + The order in which functions, variables, and top-level asm
+            statements are emitted may have changed. Code relying on some
+            particular ordering needs to be updated. The majority of such
+            top-level asm statements can be replaced by section
+            attributes.
+          + Unreferenced static variables and functions are removed. This
+            may result in undefined references when an asm statement
+            refers to the variable/function directly. In that case either
+            the variable/function shall be listed in asm statement operand
+            or in the case of top-level asm statements the attribute used
+            shall be used to force function/variable to be always output
+            and considered as a possibly used by unknown code.
+            For variables the attribute is accepted only by GCC 3.4 and
+            newer, while for earlier versions it is sufficient to use
+            unused to silence warnings about the variables not being
+            referenced. To keep code portable across different GCC
+            versions, you can use appropriate preprocessor conditionals.
+          + Static functions now can use non-standard passing conventions
+            that may break asm statements calling functions directly.
+            Again the attribute used shall be used to prevent this
+            behavior.
+       As a temporary workaround, -fno-unit-at-a-time can be used, but
+       this scheme may not be supported by future releases of GCC.
+     * GCC 3.4 automatically places zero-initialized variables in the .bss
+       section on some operating systems. Versions of GNU Emacs up to (and
+       including) 21.3 will not work correctly when using this
+       optimization; you can use -fno-zero-initialized-in-bss to disable
+       it.
+     * If GCC 3.4 is configured with --enable-threads=posix (the default
+       on most targets that support pthreads) then _REENTRANT will be
+       defined unconditionally by some libstdc++ headers. C++ code which
+       relies on that macro to detect whether multi-threaded code is being
+       compiled might change in meaning, possibly resulting in linker
+       errors for single-threaded programs. Affected users of [7]Boost
+       should compile single-threaded code with -DBOOST_DISABLE_THREADS.
+       See Bugzilla for [8]more information.
+
+General Optimizer Improvements
+
+     * Usability of the profile feedback and coverage testing has been
+       improved.
+          + Performance of profiled programs has been improved by faster
+            profile merging code.
+          + Better use of the profile feedback for optimization (loop
+            unrolling and loop peeling).
+          + File locking support allowing fork() calls and parallel runs
+            of profiled programs.
+          + Coverage file format has been redesigned.
+          + gcov coverage tool has been improved.
+          + make profiledbootstrap available to build a faster compiler.
+            Experiments made on i386 hardware showed an 11% speedup on -O0
+            and a 7.5% speedup on -O2 compilation of a [9]large C++
+            testcase.
+          + New value profiling pass enabled via -fprofile-values
+          + New value profile transformations pass enabled via -fvpt aims
+            to optimize some code sequences by exploiting knowledge about
+            value ranges or other properties of the operands. At the
+            moment a conversion of expensive divisions into cheaper
+            operations has been implemented.
+          + New -fprofile-generate and -fprofile-use command-line options
+            to simplify the use of profile feedback.
+     * A new unit-at-a-time compilation scheme for C, Objective-C, C++ and
+       Java which is enabled via -funit-at-a-time (and implied by -O2). In
+       this scheme a whole file is parsed first and optimized later. The
+       following basic inter-procedural optimizations are implemented:
+          + Removal of unreachable functions and variables
+          + Discovery of local functions (functions with static linkage
+            whose address is never taken)
+          + On i386, these local functions use register parameter passing
+            conventions.
+          + Reordering of functions in topological order of the call graph
+            to enable better propagation of optimizing hints (such as the
+            stack alignments needed by functions) in the back end.
+          + Call graph based out-of-order inlining heuristics which allows
+            to limit overall compilation unit growth (--param
+            inline-unit-growth).
+       Overall, the unit-at-a-time scheme produces a 1.3% improvement for
+       the SPECint2000 benchmark on the i386 architecture (AMD Athlon
+       CPU).
+     * More realistic code size estimates used by inlining for C,
+       Objective-C, C++ and Java. The growth of large functions can now be
+       limited via --param large-function-insns and --param
+       large-function-growth.
+     * A new cfg-level loop optimizer pass replaces the old loop unrolling
+       pass and adds two other loop transformations -- loop peeling and
+       loop unswitching -- and also uses the profile feedback to limit
+       code growth. (The three optimizations are enabled by
+       -funroll-loops, -fpeel-loops and -funswitch-loops flags,
+       respectively).
+       The old loop unroller still can be enabled by -fold-unroll-loops
+       and may produce better code in some cases, especially when the
+       webizer optimization pass is not run.
+     * A new web construction pass enabled via -fweb (and implied by -O3)
+       improves the quality of register allocation, CSE, first scheduling
+       pass and some other optimization passes by avoiding re-use of
+       pseudo registers with non-overlapping live ranges. The pass almost
+       always improves code quality but does make debugging difficult and
+       thus is not enabled by default by -O2
+       The pass is especially effective as cleanup after code duplication
+       passes, such as the loop unroller or the tracer.
+     * Experimental implementations of superblock or trace scheduling in
+       the second scheduling pass can be enabled via
+       -fsched2-use-superblocks and -fsched2-use-traces, respectively.
+
+New Languages and Language specific improvements
+
+  Ada
+
+     * The Ada front end has been updated to include numerous bug fixes
+       and enhancements. These include:
+          + Improved project file support
+          + Additional set of warnings about potential wrong code
+          + Improved error messages
+          + Improved code generation
+          + Improved cross reference information
+          + Improved inlining
+          + Better run-time check elimination
+          + Better error recovery
+          + More efficient implementation of unbounded strings
+          + Added features in GNAT.Sockets, GNAT.OS_Lib, GNAT.Debug_Pools,
+            ...
+          + New GNAT.xxxx packages (e.g. GNAT.Strings,
+            GNAT.Exception_Action)
+          + New pragmas
+          + New -gnatS switch replacing gnatpsta
+          + Implementation of new Ada features (in particular limited
+            with, limited aggregates)
+
+  C/Objective-C/C++
+
+     * Precompiled headers are now supported. Precompiled headers can
+       dramatically speed up compilation of some projects. There are some
+       known defects in the current precompiled header implementation that
+       will result in compiler crashes in relatively rare situations.
+       Therefore, precompiled headers should be considered a "technology
+       preview" in this release. Read the manual for details about how to
+       use precompiled headers.
+     * File handling in the preprocessor has been rewritten. GCC no longer
+       gets confused by symlinks and hardlinks, and now has a correct
+       implementation of #import and #pragma once. These two directives
+       have therefore been un-deprecated.
+     * The undocumented extension that allowed C programs to have a label
+       at the end of a compound statement, which has been deprecated since
+       GCC 3.0, has been removed.
+     * The cast-as-lvalue extension has been removed for C++ and
+       deprecated for C and Objective-C. In particular, code like this:
+        int i;
+        (char) i = 5;
+
+       or this:
+        char *p;
+        ((int *) p)++;
+
+       is no longer accepted for C++ and will not be accepted for C and
+       Objective-C in a future version.
+     * The conditional-expression-as-lvalue extension has been deprecated
+       for C and Objective-C. In particular, code like this:
+        int a, b, c;
+        (a ? b : c) = 2;
+
+       will not be accepted for C and Objective-C in a future version.
+     * The compound-expression-as-lvalue extension has been deprecated for
+       C and Objective-C. In particular, code like this:
+        int a, b;
+        (a, b) = 2;
+
+       will not be accepted for C and Objective-C in a future version. A
+       possible non-intrusive workaround is the following:
+        (*(a, &b)) = 2;
+
+     * Several [10]built-in functions such as __builtin_popcount for
+       counting bits, finding the highest and lowest bit in a word, and
+       parity have been added.
+     * The -fwritable-strings option has been deprecated and will be
+       removed.
+     * Many C math library functions are now recognized as built-ins and
+       optimized.
+     * The C, C++, and Objective-C compilers can now handle source files
+       written in any character encoding supported by the host C library.
+       The default input character set is taken from the current locale,
+       and may be overridden with the -finput-charset command line option.
+       In the future we will add support for inline encoding markers.
+
+  C++
+
+     * G++ is now much closer to full conformance to the ISO/ANSI C++
+       standard. This means, among other things, that a lot of invalid
+       constructs which used to be accepted in previous versions will now
+       be rejected. It is very likely that existing C++ code will need to
+       be fixed. This document lists some of the most common issues.
+     * A hand-written recursive-descent C++ parser has replaced the
+       YACC-derived C++ parser from previous GCC releases. The new parser
+       contains much improved infrastructure needed for better parsing of
+       C++ source codes, handling of extensions, and clean separation
+       (where possible) between proper semantics analysis and parsing. The
+       new parser fixes many bugs that were found in the old parser.
+     * You must now use the typename and template keywords to disambiguate
+       dependent names, as required by the C++ standard.
+        struct K {
+          typedef int mytype_t;
+        };
+
+        template <class T1> struct A {
+          template <class T2> struct B {
+              void callme(void);
+            };
+
+          template <int N> void bar(void)
+          {
+            // Use 'typename' to tell the parser that T1::mytype_t names
+            //  a type. This is needed because the name is dependent (in
+            //  this case, on template parameter T1).
+            typename T1::mytype_t x;
+            x = 0;
+          }
+        };
+
+        template <class T> void template_func(void)
+        {
+          // Use 'template' to prefix member templates within
+          //  dependent types (a has type A<T>, which depends on
+          //  the template parameter T).
+          A<T> a;
+          a.template bar<0>();
+
+          // Use 'template' to tell the parser that B is a nested
+          //  template class (dependent on template parameter T), and
+          //  'typename' because the whole A<T>::B<int> is
+          //  the name of a type (again, dependent).
+          typename A<T>::template B<int> b;
+          b.callme();
+        }
+
+        void non_template_func(void)
+        {
+          // Outside of any template class or function, no names can be
+          //  dependent, so the use of the keyword 'typename' and 'template'
+          //  is not needed (and actually forbidden).
+          A<K> a;
+          a.bar<0>();
+          A<K>::B<float> b;
+          b.callme();
+        }
+     * In a template definition, unqualified names will no longer find
+       members of a dependent base (as specified by [temp.dep]/3 in the
+       C++ standard). For example,
+        template <typename T> struct B {
+          int m;
+          int n;
+          int f ();
+          int g ();
+        };
+        int n;
+        int g ();
+        template <typename T> struct C : B<T> {
+          void h ()
+          {
+            m = 0; // error
+            f ();  // error
+            n = 0; // ::n is modified
+            g ();  // ::g is called
+          }
+        };
+       You must make the names dependent, e.g. by prefixing them with
+       this->. Here is the corrected definition of C<T>::h,
+        template <typename T> void C<T>::h ()
+        {
+          this->m = 0;
+          this->f ();
+          this->n = 0
+          this->g ();
+        }
+       As an alternative solution (unfortunately not backwards compatible
+       with GCC 3.3), you may use using declarations instead of this->:
+        template <typename T> struct C : B<T> {
+          using B<T>::m;
+          using B<T>::f;
+          using B<T>::n;
+          using B<T>::g;
+          void h ()
+          {
+            m = 0;
+            f ();
+            n = 0;
+            g ();
+          }
+        };
+     * In templates, all non-dependent names are now looked up and bound
+       at definition time (while parsing the code), instead of later when
+       the template is instantiated. For instance:
+        void foo(int);
+
+        template <int> struct A {
+          static void bar(void){
+            foo('a');
+          }
+        };
+
+        void foo(char);
+
+        int main()
+        {
+          A<0>::bar();    // Calls foo(int), used to call foo(char).
+        }
+
+     * In an explicit instantiation of a class template, you must use
+       class or struct before the template-id:
+        template <int N>
+        class A {};
+
+        template A<0>;         // error, not accepted anymore
+        template class A<0>;   // OK
+     * The "named return value" and "implicit typename" extensions have
+       been removed.
+     * Default arguments in function types have been deprecated and will
+       be removed.
+     * ARM-style name-injection of friend declarations has been deprecated
+       and will be removed. For example: struct S { friend void f(); };
+       void g() { f(); } will not be accepted by future versions of G++;
+       instead a declaration of "f" will need to be present outside of the
+       scope of "S".
+     * Covariant returns are implemented for all but varadic functions
+       that require an adjustment.
+     * When -pedantic is used, G++ now issues errors about spurious
+       semicolons. For example,
+        namespace N {}; // Invalid semicolon.
+        void f() {}; // Invalid semicolon.
+     * G++ no longer accepts attributes for a declarator after the
+       initializer associated with that declarator. For example,
+        X x(1) __attribute__((...));
+       is no longer accepted. Instead, use:
+        X x __attribute__((...)) (1);
+     * Inside the scope of a template class, the name of the class itself
+       can be treated as either a class or a template. So GCC used to
+       accept the class name as argument of type template, and template
+       template parameter. However this is not C++ standard compliant. Now
+       the name is not treated as a valid template template argument
+       unless you qualify the name by its scope. For example, the code
+       below no longer compiles.
+        template <template <class> class TT> class X {};
+        template <class T> class Y {
+          X<Y> x; // Invalid, Y is always a type template parameter.
+        };
+       The valid code for the above example is
+          X< ::Y> x; // Valid.
+       (Notice the space between < and : to prevent GCC to interpret this
+       as a digraph for [.)
+     * Friend declarations that refer to template specializations are
+       rejected if the template has not already been declared. For
+       example,
+        template <typename T>
+        class C {
+          friend void f<> (C&);
+        };
+       is rejected. You must first declare f as a template,
+        template <typename T>
+        void f(T);
+     * In case of friend declarations, every name used in the friend
+       declaration must be accessible at the point of that declaration.
+       Previous versions of G++ used to be less strict about this and
+       allowed friend declarations for private class members, for example.
+       See the ISO C++ Standard Committee's [11]defect report #209 for
+       details.
+     * Declaration of member functions of class templates as friends are
+       supported. For example,
+        template <typename T> struct A {
+          void f();
+        };
+        class C {
+          template <typename T> friend void A<T>::f();
+        };
+     * You must use template <> to introduce template specializations, as
+       required by the standard. For example,
+        template <typename T>
+        struct S;
+
+        struct S<int> { };
+       is rejected. You must write,
+        template <> struct S<int> {};
+     * G++ used to accept code like this,
+        struct S {
+          int h();
+          void f(int i = g());
+          int g(int i = h());
+        };
+       This behavior is not mandated by the standard. Now G++ issues an
+       error about this code. To avoid the error, you must move the
+       declaration of g before the declaration of f. The default arguments
+       for g must be visible at the point where it is called.
+     * The C++ ABI Section 3.3.3 specifications for the array construction
+       routines __cxa_vec_new2 and __cxa_vec_new3 were changed to return
+       NULL when the allocator argument returns NULL. These changes are
+       incorporated into the libstdc++ runtime library.
+     * Using a name introduced by a typedef in a friend declaration or in
+       an explicit instantiation is now rejected, as specified by the ISO
+       C++ standard.
+        class A;
+        typedef A B;
+        class C {
+          friend class B;      // error, no typedef name here
+          friend B;            // error, friend always needs class/struct/enum
+          friend class A;      // OK
+        };
+
+        template <int> class Q {};
+        typedef Q<0> R;
+        template class R;      // error, no typedef name here
+        template class Q<0>;   // OK
+     * When allocating an array with a new expression, GCC used to allow
+       parentheses around the type name. This is actually ill-formed and
+       it is now rejected:
+        int* a = new (int)[10];    // error, not accepted anymore
+        int* a = new int[10];      // OK
+     * When binding an rvalue of class type to a reference, the copy
+       constructor of the class must be accessible. For instance, consider
+       the following code:
+        class A
+        {
+        public:
+          A();
+
+        private:
+          A(const A&);   // private copy ctor
+        };
+
+        A makeA(void);
+        void foo(const A&);
+
+        void bar(void)
+        {
+          foo(A());       // error, copy ctor is not accessible
+          foo(makeA());   // error, copy ctor is not accessible
+
+          A a1;
+          foo(a1);        // OK, a1 is a lvalue
+        }
+       This might be surprising at first sight, especially since most
+       popular compilers do not correctly implement this rule ([12]further
+       details).
+     * When forming a pointer to member or a pointer to member function,
+       access checks for class visibility (public, protected, private) are
+       now performed using the qualifying scope of the name itself. This
+       is better explained with an example:
+        class A
+        {
+        public:
+          void pub_func();
+        protected:
+          void prot_func();
+        private:
+          void priv_func();
+        };
+
+        class B : public A
+        {
+        public:
+          void foo()
+          {
+            &A::pub_func;   // OK, pub_func is accessible through A
+            &A::prot_func;  // error, cannot access prot_func through A
+            &A::priv_func;  // error, cannot access priv_func through A
+
+            &B::pub_func;   // OK, pub_func is accessible through B
+            &B::prot_func;  // OK, can access prot_func through B (within B)
+            &B::priv_func;  // error, cannot access priv_func through B
+          }
+        };
+
+    Runtime Library (libstdc++)
+
+     * Optimization work:
+          + Streamlined streambuf, filebuf, separate synched with C
+            Standard I/O streambuf.
+          + All formatted I/O now uses cached locale information.
+          + STL optimizations (memory/speed for list, red-black trees as
+            used by sets and maps).
+          + More use of GCC builtins.
+          + String optimizations (avoid contention on
+            increment/decrement-and-test of the reference count in the
+            empty-string object, constructor from input_iterators
+            speedup).
+     * Static linkage size reductions.
+     * Large File Support (files larger than 2 GB on 32-bit systems).
+     * Wide character and variable encoding filebuf work (UTF-8, Unicode).
+     * Generic character traits.
+     * Also support wchar_t specializations on Mac OS 10.3.x, FreeBSD 5.x,
+       Solaris 2.7 and above, AIX 5.x, Irix 6.5.
+     * The allocator class is now standard-conformant, and two additional
+       extension allocators have been added, mt_alloc and
+       bitmap_allocator.
+     * PCH support: -include bits/stdc++.h (2x compile speedup).
+     * Rewrote __cxa_demangle with support for C++ style allocators.
+     * New debug modes for STL containers and iterators.
+     * Testsuite rewrite: five times as many tests, plus increasingly
+       sophisticated tests, including I/O, MT, multi-locale, wide and
+       narrow characters.
+     * Use current versions of GNU "autotools" for build/configuration.
+
+  Objective-C
+
+     * The Objective-C front end has been updated to include the numerous
+       bug fixes and enhancements previously available only in Apple's
+       version of GCC. These include:
+          + Structured exception (@try... @catch... @finally, @throw) and
+            synchronization (@synchronized) support. These are accessible
+            via the -fobjc-exceptions switch; as of this writing, they may
+            only be used in conjunction with -fnext-runtime on Mac OS X
+            10.3 and later. See [13]Options Controlling Objective-C
+            Dialect for more information.
+          + An overhaul of @encode logic. The C99 _Bool and C++ bool type
+            may now be encoded as 'B'. In addition, the back-end/codegen
+            dependencies have been removed.
+          + An overhaul of message dispatch construction, ensuring that
+            the various receiver types (and casts thereof) are handled
+            properly, and that correct diagnostics are issued.
+          + Support for "Zero-Link" (-fzero-link) and "Fix-and-Continue"
+            (-freplace-objc-classes) debugging modes, currently available
+            on Mac OS X 10.3 and later. See [14]Options Controlling
+            Objective-C Dialect for more information.
+          + Access to optimized runtime entry points (-fno-nil-receivers )
+            on the assumption that message receivers are never nil. This
+            is currently available on Mac OS X 10.3 and later. See
+            [15]Options Controlling Objective-C Dialect for more
+            information.
+
+  Java
+
+     * Compiling a .jar file will now cause non-.class entries to be
+       automatically compiled as resources.
+     * libgcj has been ported to Darwin.
+     * Jeff Sturm has adapted Jan Hubicka's call graph optimization code
+       to gcj.
+     * libgcj has a new gcjlib URL type; this lets URLClassLoader load
+       code from shared libraries.
+     * libgcj has been much more completely merged with [16]GNU Classpath.
+     * Class loading is now much more correct; in particular the caller's
+       class loader is now used when that is required.
+     * [17]Eclipse 2.x will run out of the box using gij.
+     * Parts of java.nio have been implemented. Direct and indirect
+       buffers work, as do fundamental file and socket operations.
+     * java.awt has been improved, though it is still not ready for
+       general use.
+     * The HTTP protocol handler now uses HTTP/1.1 and can handle the POST
+       method.
+     * The MinGW port has matured. Enhancements include socket timeout
+       support, thread interruption, improved Runtime.exec() handling and
+       support for accented characters in filenames.
+
+  Fortran
+
+     * Fortran improvements are listed in the [18]Fortran documentation.
+
+New Targets and Target Specific Improvements
+
+  Alpha
+
+     * Several [19]built-in functions have been added such as
+       __builtin_alpha_zap to allow utilizing the more obscure
+       instructions of the CPU.
+     * Parameter passing of complex arguments has changed to match the
+       [20]ABI. This change is incompatible with previous GCC versions,
+       but does fix compatibility with the Tru64 compiler and several
+       corner cases where GCC was incompatible with itself.
+
+  ARM
+
+     * Nicolas Pitre has contributed his hand-coded floating-point support
+       code for ARM. It is both significantly smaller and faster than the
+       existing C-based implementation, even when building applications
+       for Thumb. The arm-elf configuration has been converted to use the
+       new code.
+     * Support for the Intel's iWMMXt architecture, a second generation
+       XScale processor, has been added. Enabled at run time with the
+       -mcpu=iwmmxt command line switch.
+     * A new ARM target has been added: arm-wince-pe. This is similar to
+       the arm-pe target, but it defaults to using the APCS32 ABI.
+     * The existing ARM pipeline description has been converted to the use
+       the [21]DFA processor pipeline model. There is not much change in
+       code performance, but the description is now [22]easier to
+       understand.
+     * Support for the Cirrus EP9312 Maverick floating point co-processor
+       added. Enabled at run time with the -mcpu=ep9312 command line
+       switch. Note however that the multilibs to support this chip are
+       currently disabled in gcc/config/arm/t-arm-elf, so if you want to
+       enable their production you will have to uncomment the entries in
+       that file.
+
+  H8/300
+
+     * Support for long long has been added.
+     * Support for saveall attribute has been added.
+     * Pavel Pisa contributed hand-written 32-bit-by-32-bit division code
+       for H8/300H and H8S, which is much faster than the previous
+       implementation.
+     * A lot of small performance improvements.
+
+  IA-32/AMD64 (x86-64)
+
+     * Tuning for K8 (AMD Opteron/Athlon64) core is available via
+       -march=k8 and -mcpu=k8.
+     * Scalar SSE code generation carefully avoids reformatting penalties,
+       hidden dependencies and minimizes the number of uops generated on
+       both Intel and AMD CPUs.
+     * Vector MMX and SSE operands are now passed in registers to improve
+       performance and match the argument passing convention used by the
+       Intel C++ Compiler. As a result it is not possible to call
+       functions accepting vector arguments compiled by older GCC version.
+     * Conditional jump elimination is now more aggressive on modern CPUs.
+     * The Athlon ports has been converted to use the DFA processor
+       pipeline description.
+     * Optimization of indirect tail calls is now possible in a similar
+       fashion as direct sibcall optimization.
+     * Further small performance improvements.
+     * -m128bit-long-double is now less buggy.
+     * __float128 support in 64-bit compilation.
+     * Support for data structures exceeding 2GB in 64-bit mode.
+     * -mcpu has been renamed to -mtune.
+
+  IA-64
+
+     * Tuning code for the Itanium 2 processor has been added. The
+       generation of code tuned for Itanium 2 (option -mtune=itanium2) is
+       enabled by default now. To generate code tuned for Itanium 1 the
+       option -mtune=itanium1 should be used.
+     * [23]DFA processor pipeline descriptions for the IA-64 processors
+       have been added. This resulted in about 3% improvement on the
+       SPECInt2000 benchmark for Itanium 2.
+     * Instruction bundling for the IA-64 processors has been rewritten
+       using the DFA pipeline hazard recognizer. It resulted in about 60%
+       compiler speedup on the SPECInt2000 C programs.
+
+  M32R
+
+     * Support for the M32R/2 processor has been added by Renesas.
+     * Support for an M32R GNU/Linux target and PIC code generation has
+       been added by Renesas.
+
+  M68000
+
+     * Bernardo Innocenti (Develer S.r.l.) has contributed the
+       m68k-uclinux target, based on former work done by Paul Dale
+       (SnapGear Inc.). Code generation for the ColdFire processors family
+       has been enhanced and extended to support the MCF 53xx and MCF 54xx
+       cores, integrating former work done by Peter Barada (Motorola).
+
+  MIPS
+
+    Processor-specific changes
+
+     * Support for the RM7000 and RM9000 processors has been added. It can
+       be selected using the -march compiler option and should work with
+       any MIPS I (mips-*) or MIPS III (mips64-*) configuration.
+     * Support for revision 2 of the MIPS32 ISA has been added. It can be
+       selected with the command-line option -march=mips32r2.
+     * There is a new option, -mfix-sb1, to work around certain SB-1
+       errata.
+
+    Configuration
+
+     * It is possible to customize GCC using the following configure-time
+       options:
+          + --with-arch, which specifies the default value of the -march
+            option.
+          + --with-tune, which specifies the default value of the -mtune
+            option.
+          + --with-abi, which specifies the default ABI.
+          + --with-float=soft, which tells GCC to use software floating
+            point by default.
+          + --with-float=hard, which tells GCC to use hardware floating
+            point by default.
+     * A 64-bit GNU/Linux port has been added. The associated
+       configurations are mips64-linux-gnu and mips64el-linux-gnu.
+     * The 32-bit GNU/Linux port now supports Java.
+     * The IRIX 6 configuration now supports the o32 ABI and will build
+       o32 multilibs by default. This support is compatible with both
+       binutils and the SGI tools, but note that several features,
+       including debugging information and DWARF2 exception handling, are
+       only available when using the GNU assembler. Use of the GNU
+       assembler and linker (version 2.15 or above) is strongly
+       recommended.
+     * The IRIX 6 configuration now supports 128-bit long doubles.
+     * There are two new RTEMS-specific configurations, mips-rtems and
+       mipsel-rtems.
+     * There are two new *-elf configurations, mipsisa32r2-elf and
+       mipsisa32r2el-elf.
+
+    General
+
+     * Several [24]ABI bugs have been fixed. Unfortunately, these changes
+       will break binary compatibility with earlier releases.
+     * GCC can now use explicit relocation operators when generating
+       -mabicalls code. This behavior is controlled by -mexplicit-relocs
+       and can have several performance benefits. For example:
+          + It allows for more optimization of GOT accesses, including
+            better scheduling and redundancy elimination.
+          + It allows sibling calls to be implemented as jumps.
+          + n32 and n64 leaf functions can use a call-clobbered global
+            pointer instead of $28.
+          + The code to set up $gp can be removed from functions that
+            don't need it.
+     * A new option, -mxgot, allows the GOT to be bigger than 64k. This
+       option is equivalent to the assembler's -xgot option and should be
+       used instead of -Wa,-xgot.
+     * Frame pointer elimination is now supported when generating 64-bit
+       MIPS16 code.
+     * Inline block moves have been optimized to take more account of
+       alignment information.
+     * Many internal changes have been made to the MIPS port, mostly aimed
+       at reducing the reliance on assembler macros.
+
+  PowerPC
+
+     * GCC 3.4 releases have a number of fixes for PowerPC and PowerPC64
+       [25]ABI incompatibilities regarding the way parameters are passed
+       during functions calls. These changes may result in incompatibility
+       between code compiled with GCC 3.3 and GCC 3.4.
+
+    PowerPC Darwin
+
+     * Support for shared/dylib gcc libraries has been added. It is
+       enabled by default on powerpc-apple-darwin7.0.0 and up.
+     * Libgcj is enabled by default. On systems older than
+       powerpc-apple-darwin7.0.0 you need to install dlcompat.
+     * 128-bit IBM extended precision format support added for long
+       double.
+
+    PowerPC64 GNU/Linux
+
+     * By default, PowerPC64 GNU/Linux now uses natural alignment of
+       structure elements. The old four byte alignment for double, with
+       special rules for a struct starting with a double, can be chosen
+       with -malign-power. This change may result in incompatibility
+       between code compiled with GCC 3.3 and GCC 3.4.
+     * -mabi=altivec is now the default rather than -mabi=no-altivec.
+     * 128-bit IBM extended precision format support added for long
+       double.
+
+  S/390 and zSeries
+
+     * New command-line options allow to specify the intended execution
+       environment for generated code:
+          + -mesa/-mzarch allows to specify whether to generate code
+            running in ESA/390 mode or in z/Architecture mode (this is
+            applicable to 31-bit code only).
+          + -march allows to specify a minimum processor architecture
+            level (g5, g6, z900, or z990).
+          + -mtune allows to specify which processor to tune for.
+     * It is possible to customize GCC using the following configure-time
+       options:
+          + --with-mode, which specifies whether to default to assuming
+            ESA/390 or z/Architecture mode.
+          + --with-arch, which specifies the default value of the -march
+            option.
+          + --with-tune, which specifies the default value of the -mtune
+            option.
+     * Support for the z990 processor has been added, and can be selected
+       using -march=z990 or -mtune=z990. This includes instruction
+       scheduling tuned for the superscalar instruction pipeline of the
+       z990 processor as well as support for all new instructions provided
+       by the long-displacement facility.
+     * Support to generate 31-bit code optimized for zSeries processors
+       (running in ESA/390 or in z/Architecture mode) has been added. This
+       can be selected using -march=z900 and -mzarch respectively.
+     * Instruction scheduling for the z900 and z990 processors now uses
+       the DFA pipeline hazard recognizer.
+     * GCC no longer generates code to maintain a stack backchain,
+       previously used to generate stack backtraces for debugging
+       purposes. As replacement that does not incur runtime overhead,
+       DWARF-2 call frame information is provided by GCC; this is
+       supported by GDB 6.1. The old behavior can be restored using the
+       -mbackchain option.
+     * The stack frame size of functions may now exceed 2 GB in 64-bit
+       code.
+     * A port for the 64-bit IBM TPF operating system has been added; the
+       configuration is s390x-ibm-tpf. This configuration is supported as
+       cross-compilation target only.
+     * Various changes to improve the generated code have been
+       implemented, including:
+          + GCC now uses the MULTIPLY AND ADD and MULTIPLY AND SUBTRACT
+            instructions to significantly speed up many floating-point
+            applications.
+          + GCC now uses the ADD LOGICAL WITH CARRY and SUBTRACT LOGICAL
+            WITH BORROW instructions to speed up long long arithmetic.
+          + GCC now uses the SEARCH STRING instruction to implement
+            strlen().
+          + In many cases, function call overhead for 31-bit code has been
+            reduced by placing the literal pool after the function code
+            instead of after the function prolog.
+          + Register 14 is no longer reserved in 64-bit code.
+          + Handling of global register variables has been improved.
+
+  SPARC
+
+     * The option -mflat is deprecated.
+     * Support for large (> 2GB) frames has been added to the 64-bit port.
+     * Several [26]ABI bugs have been fixed. Unfortunately, these changes
+       will break binary compatibility with earlier releases.
+     * The default debugging format has been switched from STABS to
+       DWARF-2 for 32-bit code on Solaris 7 and later. DWARF-2 is already
+       the default debugging format for 64-bit code on Solaris.
+
+  SuperH
+
+     * Support for the SH2E processor has been added. Enabled at run time
+       with the -m2e command line switch, or at configure time by
+       specifying sh2e as the machine part of the target triple.
+
+  V850
+
+     * Support for the Mitsubishi V850E1 processor has been added. This is
+       a variant of the V850E processor with some additional debugging
+       instructions.
+
+  Xtensa
+
+     * Several ABI bugs have been fixed. Unfortunately, these changes
+       break binary compatibility with earlier releases.
+          + For big-endian processors, the padding of aggregate return
+            values larger than a word has changed. If the size of an
+            aggregate return value is not a multiple of 32 bits, previous
+            versions of GCC inserted padding in the most-significant bytes
+            of the first return value register. Aggregates larger than a
+            word are now padded in the least-significant bytes of the last
+            return value register used. Aggregates smaller than a word are
+            still padded in the most-significant bytes. The return value
+            padding has not changed for little-endian processors.
+          + Function arguments with 16-byte alignment are now properly
+            aligned.
+          + The implementation of the va_list type has changed. A va_list
+            value created by va_start from a previous release cannot be
+            used with va_arg from this release, or vice versa.
+     * More processor configuration options for Xtensa processors are
+       supported:
+          + the ABS instruction is now optional;
+          + the ADDX* and SUBX* instructions are now optional;
+          + an experimental CONST16 instruction can be used to synthesize
+            constants instead of loading them from constant pools.
+       These and other Xtensa processor configuration options can no
+       longer be enabled or disabled by command-line options; the
+       processor configuration must be specified by the xtensa-config.h
+       header file when building GCC. Additionally, the
+       -mno-serialize-volatile option is no longer supported.
+
+Obsolete Systems
+
+   Support for a number of older systems has been declared obsolete in GCC
+   3.4. Unless there is activity to revive them, the next release of GCC
+   will have their sources permanently removed.
+
+   All configurations of the following processor architectures have been
+   declared obsolete:
+     * Mitsubishi D30V, d30v-*
+     * AT&T DSP1600 and DSP1610, dsp16xx-*
+     * Intel 80960, i960
+
+   Also, some individual systems have been obsoleted:
+     * ARM Family
+          + Support for generating code for operation in APCS/26 mode
+            (-mapcs-26).
+     * IBM ESA/390
+          + "Bigfoot" port, i370-*. (The other port, s390-*, is actively
+            maintained and supported.)
+     * Intel 386 family
+          + MOSS, i?86-moss-msdos and i?86-*-moss*
+          + NCR 3000 running System V r.4, i?86-ncr-sysv4*
+          + FreeBSD with a.out object format, i?86-*-freebsd*aout* and
+            i?86-*-freebsd2*
+          + GNU/Linux with a.out object format, i?86-linux*aout*
+          + GNU/Linux with libc5, a.k.a. glibc1, i?86-linux*libc1*
+          + Interix versions before Interix 3, i?86-*-interix
+          + Mach microkernel, i?86-mach*
+          + SCO UnixWare with UDK, i?86-*-udk*
+          + Generic System V releases 1, 2, and 3, i?86-*-sysv[123]*
+          + VSTa microkernel, i386-*-vsta
+     * Motorola M68000 family
+          + HPUX, m68k-hp-hpux* and m68000-hp-hpux*
+          + NetBSD with a.out object format (before NetBSD 1.4),
+            m68k-*-*-netbsd* except m68k-*-*-netbsdelf*
+          + Generic System V r.4, m68k-*-sysv4*
+     * VAX
+          + Generic VAX, vax-*-* (This is generic VAX only; we have not
+            obsoleted any VAX triples for specific operating systems.)
+
+Documentation improvements
+
+Other significant improvements
+
+     * The build system has undergone several significant cleanups.
+       Subdirectories will only be configured if they are being built, and
+       all subdirectory configures are run from the make command. The top
+       level has been autoconfiscated.
+     * Building GCC no longer writes to its source directory. This should
+       help those wishing to share a read-only source directory over NFS
+       or build from a CD. The exceptions to this feature are if you
+       configure with either --enable-maintainer-mode or
+       --enable-generated-files-in-srcdir.
+     * The -W warning option has been renamed to -Wextra, which is more
+       easily understood. The older spelling will be retained for
+       backwards compatibility.
+     * Substantial improvements in compile time have been made,
+       particularly for non-optimizing compilations.
+     __________________________________________________________________
+
+GCC 3.4.0
+
+  Bug Fixes
+
+   A vast number of bugs have been fixed in 3.4.0, too many to publish a
+   complete list here. [27]Follow this link to query the Bugzilla database
+   for the list of over 900 bugs fixed in 3.4.0. This is the list of all
+   bugs marked as resolved and fixed in 3.4.0 that are not flagged as 3.4
+   regressions.
+     __________________________________________________________________
+
+GCC 3.4.1
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+    Bootstrap failures
+
+     * [28]10129 Ada bootstrap fails on PPC-Darwin - invalid assembler
+       emitted - PIC related
+     * [29]14576 [ARM] ICE in libiberty when building gcc-3.4 for arm-elf
+     * [30]14760 A bug in configure.in prevents using both
+       --program-suffix and --program-prefix
+     * [31]14671 [hppa64] bootstrap fails: ICE in
+       save_call_clobbered_regs, in caller_save.c
+     * [32]15093 [alpha][Java] make bootstrap fails to configure libffi on
+       Alpha
+     * [33]15178 Solaris 9/x86 fails linking after stage 3
+
+    Multi-platform internal compiler errors (ICEs)
+
+     * [34]12753 (preprocessor) Memory corruption in preprocessor on bad
+       input
+     * [35]13985 ICE in gcc.c-torture/compile/930621-1.c
+     * [36]14810 (c++) tree check failures with invalid code involving
+       templates
+     * [37]14883 (c++) ICE on invalid code, in cp_parser_lookup_name, in
+       cp/parser.c
+     * [38]15044 (c++) ICE on syntax error, template header
+     * [39]15057 (c++) Compiling of conditional value throw constructs
+       cause a segmentation violation
+     * [40]15064 (c++) typeid of template parameter gives ICE
+     * [41]15142 (c++) ICE when passing a string where a char* is expected
+       in a throw statement
+     * [42]15159 ICE in rtl_verify_flow_info_1
+     * [43]15165 (c++) ICE in instantiate_template
+     * [44]15193 Unary minus using pointer to V4SF vector causes
+       -fforce-mem to exhaust all memory
+     * [45]15209 (c++) Runs out of memory with packed structs
+     * [46]15227 (c++) Trouble with invalid function definition
+     * [47]15285 (c++) instantiate_type ICE when forming pointer to
+       template function
+     * [48]15299 (c++) ICE in resolve_overloaded_unification
+     * [49]15329 (c++) ICE on constructor of member template
+     * [50]15550 ICE in extract_insn, in recog.c
+     * [51]15554 (c++) ICE in tsubst_copy, in cp/pt.c
+     * [52]15640 (c++) ICE on invalid code in arg_assoc, in
+       cp/name-lookup.c
+     * [53]15666 [unit-at-a-time] Gcc abort on valid code
+     * [54]15696 (c++) ICE with bad pointer-to-member code
+     * [55]15701 (c++) ICE with friends and template template parameter
+     * [56]15761 ICE in do_SUBST, in combine.c
+     * [57]15829 (c++) ICE on Botan-1.3.13 due to -funroll-loops
+
+    Ada
+
+     * [58]14538 All RTEMS targets broken for gnat
+
+    C front end
+
+     * [59]12391 missing warning about assigning to an incomplete type
+     * [60]14649 atan(1.0) should not be a constant expression
+     * [61]15004 [unit-at-a-time] no warning for unused paramater in
+       static function
+     * [62]15749 --pedantic-errors behaves differently from --pedantic
+       with C-compiler on GNU/Linux
+
+    C++ compiler and library
+
+     * [63]10646 non-const reference is incorrectly matched in a "const T"
+       partial specialization
+     * [64]12077 wcin.rdbuf()->in_avail() return value too high
+     * [65]13598 enc_filebuf doesn't work
+     * [66]14211 const_cast returns lvalue but should be rvalue
+     * [67]14220 num_put::do_put() undesired float/double behavior
+     * [68]14245 problem with user-defined allocators in std::basic_string
+     * [69]14340 libstdc++ Debug mode: failure to convert iterator to
+       const_iterator
+     * [70]14600 __gnu_cxx::stdio_sync_filebuf should expose internal
+       FILE*
+     * [71]14668 no warning anymore for reevaluation of declaration
+     * [72]14775 LFS (large file support) tests missing
+     * [73]14821 Duplicate namespace alias declaration should not conflict
+     * [74]14930 Friend declaration ignored
+     * [75]14932 cannot use offsetof to get offsets of array elements in
+       g++ 3.4.0
+     * [76]14950 [non unit-at-a-time] always_inline does not mix with
+       templates and -O0
+     * [77]14962 g++ ignores #pragma redefine_extname
+     * [78]14975 Segfault on low-level write error during imbue
+     * [79]15002 Linewise stream input is unusably slow (std::string slow)
+     * [80]15025 compiler accepts redeclaration of template as
+       non-template
+     * [81]15046 [arm] Math functions misdetected by cross configuration
+     * [82]15069 a bit test on a variable of enum type is miscompiled
+     * [83]15074 g++ -lsupc++ still links against libstdc++
+     * [84]15083 spurious "statement has no effect" warning
+     * [85]15096 parse error with templates and pointer to const member
+     * [86]15287 combination of operator[] and operator .* fails in
+       templates
+     * [87]15317 __attribute__ unused in first parameter of constructor
+       gives error
+     * [88]15337 sizeof on incomplete type diagnostic
+     * [89]15361 bitset<>::_Find_next fails
+     * [90]15412 _GLIBCXX_ symbols symbols defined and used in different
+       namespaces
+     * [91]15427 valid code results in incomplete type error
+     * [92]15471 Incorrect member pointer offsets in anonymous
+       structs/unions
+     * [93]15503 nested template problem
+     * [94]15507 compiler hangs while laying out union
+     * [95]15542 operator & and template definitions
+     * [96]15565 SLES9: leading + sign for unsigned int with showpos
+     * [97]15625 friend defined inside a template fails to find static
+       function
+     * [98]15629 Function templates, overloads, and friend name injection
+     * [99]15742 'noreturn' attribute ignored in method of template
+       functions.
+     * [100]15775 Allocator::pointer consistently ignored
+     * [101]15821 Duplicate namespace alias within namespace rejected
+     * [102]15862 'enum yn' fails (confict with undeclared builtin)
+     * [103]15875 rejects pointer to member in template
+     * [104]15877 valid code using templates and anonymous enums is
+       rejected
+     * [105]15947 Puzzling error message for wrong destructor declaration
+       in template class
+     * [106]16020 cannot copy __gnu_debug::bitset
+     * [107]16154 input iterator concept too restrictive
+     * [108]16174 deducing top-level consts
+
+    Java
+
+     * [109]14315 Java compiler is not parallel make safe
+
+    Fortran
+
+     * [110]15151 [g77] incorrect logical i/o in 64-bit mode
+
+    Objective-C
+
+     * [111]7993 private variables cannot be shadowed in subclasses
+
+    Optimization bugs
+
+     * [112]15228 useless copies of floating point operands
+     * [113]15345 [non-unit-at-a-time] unreferenced nested inline
+       functions not optimized away
+     * [114]15945 Incorrect floating point optimization
+     * [115]15526 ftrapv aborts on 0 * (-1)
+     * [116]14690 Miscompiled POOMA tests
+     * [117]15112 GCC generates code to write to unchanging memory
+
+    Preprocessor
+
+     * [118]15067 Minor glitch in the source of cpp
+
+    Main driver program bugs
+
+     * [119]1963 collect2 interprets -oldstyle_liblookup as -o
+       ldstyle_liblookup
+
+    x86-specific (Intel/AMD)
+
+     * [120]15717 Error: can't resolve `L0' {*ABS* section} - `xx' {*UND*
+       section}
+
+    HPPA-specific
+
+     * [121]14782 GCC produces an unaligned data access at -O2
+     * [122]14828 FAIL: gcc.c-torture/execute/20030408-1.c execution, -O2
+     * [123]15202 ICE in reload_cse_simplify_operands, in postreload.c
+
+    IA64-specific
+
+     * [124]14610 __float80 constants incorrectly emitted
+     * [125]14813 init_array sections are initialized in the wrong order
+     * [126]14857 GCC segfault on duplicated asm statement
+     * [127]15598 Gcc 3.4 ICE on valid code
+     * [128]15653 Gcc 3.4 ICE on valid code
+
+    MIPS-specific
+
+     * [129]15189 wrong filling of delay slot with -march=mips1 -G0
+       -mno-split-addresses -mno-explicit-relocs
+     * [130]15331 Assembler error building gnatlib on IRIX 6.5 with GNU as
+       2.14.91
+     * [131]16144 Bogus reference to __divdf3 when -O1
+     * [132]16176 Miscompilation of unaligned data in MIPS backend
+
+    PowerPC-specific
+
+     * [133]11591 ICE in gcc.dg/altivec-5.c
+     * [134]12028 powerpc-eabispe produces bad sCOND operation
+     * [135]14478 rs6000 geu/ltu patterns generate incorrect code
+     * [136]14567 long double and va_arg complex args
+     * [137]14715 Altivec stack layout may overlap gpr save with stack
+       temps
+     * [138]14902 (libstdc++) Stream checking functions fail when -pthread
+       option is used.
+     * [139]14924 Compiler ICE on valid code
+     * [140]14960 -maltivec affects vector return with -mabi=no-altivec
+     * [141]15106 vector varargs failure passing from altivec to
+       non-altivec code for -m32
+     * [142]16026 ICE in function.c:4804, assign_parms, when -mpowerpc64 &
+       half-word operation
+     * [143]15191 -maltivec -mabi=no-altivec results in mis-aligned lvx
+       and stvx
+     * [144]15662 Segmentation fault when an exception is thrown - even if
+       try and catch are specified
+
+    s390-specific
+
+     * [145]15054 Bad code due to overlapping stack temporaries
+
+    SPARC-specific
+
+     * [146]15783 ICE with union assignment in 64-bit mode
+     * [147]15626 GCC 3.4 emits "ld: warning: relocation error:
+       R_SPARC_UA32"
+
+    x86-64-specific
+
+     * [148]14326 boehm-gc hardcodes to 3DNow! prefetch for x86_64
+     * [149]14723 Backported -march=nocona from mainline
+     * [150]15290 __float128 failed to pass to function properly
+
+    Cygwin/Mingw32-specific
+
+     * [151]15250 Option -mms-bitfields support on GCC 3.4 is not
+       conformant to MS layout
+     * [152]15551 -mtune=pentium4 -O2 with sjlj EH breaks stack probe
+       worker on windows32 targets
+
+    Bugs specific to embedded processors
+
+     * [153]8309 [m68k] -m5200 produces erroneous SImode set of short
+       varaible on stack
+     * [154]13250 [SH] Gcc code for rotation clobbers the register, but
+       gcc continues to use the register as if it was not clobbered
+     * [155]13803 [coldfire] movqi operand constraints too restrictivefor
+       TARGET_COLDFIRE
+     * [156]14093 [SH] ICE for code when using -mhitachi option in SH
+     * [157]14457 [m6811hc] ICE with simple c++ source
+     * [158]14542 [m6811hc] ICE on simple source
+     * [159]15100 [SH] cc1plus got hang-up on
+       libstdc++-v3/testsuite/abi_check.cc
+     * [160]15296 [CRIS] Delayed branch scheduling causing invalid code on
+       cris-*
+     * [161]15396 [SH] ICE with -O2 -fPIC
+     * [162]15782 [coldfire] m68k_output_mi_thunk emits wrong code for
+       ColdFire
+
+    Testsuite problems (compiler not affected)
+
+     * [163]11610 libstdc++ testcases 27_io/* don't work properly remotely
+     * [164]15488 (libstdc++) possibly insufficient file permissions for
+       executing test suite
+     * [165]15489 (libstdc++) testsuite_files determined incorrectly
+
+    Documentation bugs
+
+     * [166]13928 (libstdc++) no whatis info in some man pages generated
+       by doxygen
+     * [167]14150 Ada documentation out of date
+     * [168]14949 (c++) Need to document method visibility changes
+     * [169]15123 libstdc++-doc: Allocators.3 manpage is empty
+     __________________________________________________________________
+
+GCC 3.4.2
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+    Bootstrap failures and issues
+
+     * [170]16469 [mips-sgi-irix5.3] bootstrap fails in
+       libstdc++-v3/testsuite
+     * [171]16344 [hppa-linux-gnu] libstdc++'s PCH built by
+       profiledbootstrap does not work with the built compiler
+     * [172]16842 [Solaris/x86] mkheaders can not find mkheaders.conf
+
+    Multi-platform internal compiler errors (ICEs)
+
+     * [173]12608 (c++) ICE: expected class 't', have 'x' (error_mark) in
+       cp_parser_class_specifier, in cp/parser.c
+     * [174]14492 ICE in loc_descriptor_from_tree, in dwarf2out.c
+     * [175]15461 (c++) ICE due to NRV and inlining
+     * [176]15890 (c++) ICE in c_expand_expr, in c-common.c
+     * [177]16180 ICE: segmentation fault in RTL optimization
+     * [178]16224 (c++) ICE in write_unscoped_name (template/namespace)
+     * [179]16408 ICE: in delete_insn, in cfgrtl.c
+     * [180]16529 (c++) ICE for: namespace-alias shall not be declared as
+       the name of any other entity
+     * [181]16698 (c++) ICE with exceptions and declaration of __cxa_throw
+     * [182]16706 (c++) ICE in finish_member_declaration, in
+       cp/semantics.c
+     * [183]16810 (c++) Legal C++ program with cast gives ICE in
+       build_ptrmemfunc
+     * [184]16851 (c++) ICE when throwing a comma expression
+     * [185]16870 (c++) Boost.Spirit causes ICE in tsubst, in cp/pt.c
+     * [186]16904 (c++) ICE in finish_class_member_access_expr, in
+       cp/typeck.c
+     * [187]16905 (c++) ICE (segfault) with exceptions
+     * [188]16964 (c++) ICE in cp_parser_class_specifier due to
+       redefinition
+     * [189]17068 (c++) ICE: tree check: expected class 'd', have 'x'
+       (identifier_node) in dependent_template_p, in cp/pt.c
+
+    Preprocessor bugs
+
+     * [190]16366 Preprocessor option -remap causes memory corruption
+
+    Optimization
+
+     * [191]15345 unreferenced nested inline functions not optimized away
+     * [192]16590 Incorrect execution when compiling with -O2
+     * [193]16693 Bitwise AND is lost when used within a cast to an enum
+       of the same precision
+     * [194]17078 Jump into if(0) substatement fails
+
+    Problems in generated debug information
+
+     * [195]13956 incorrect stabs for nested local variables
+
+    C front end bugs
+
+     * [196]16684 GCC should not warn about redundant redeclarations of
+       built-ins
+
+    C++ compiler and library
+
+     * [197]12658 Thread safety problems in locale::global() and
+       locale::locale()
+     * [198]13092 g++ accepts invalid pointer-to-member conversion
+     * [199]15320 Excessive memory consumption
+     * [200]16246 Incorrect template argument deduction
+     * [201]16273 Memory exhausted when using nested classes and virtual
+       functions
+     * [202]16401 ostringstream in gcc 3.4.x very slow for big data
+     * [203]16411 undefined reference to
+       __gnu_cxx::stdio_sync_filebuf<char, std::char_traits<char>
+       >::file()
+     * [204]16489 G++ incorrectly rejects use of a null constant integral
+       expression as a null constant pointer
+     * [205]16618 offsetof fails with constant member
+     * [206]16637 syntax error reported for valid input code
+     * [207]16717 __attribute__((constructor)) broken in C++
+     * [208]16813 compiler error in DEBUG version of range insertion
+       std::map::insert
+     * [209]16853 pointer-to-member initialization from incompatible one
+       accepted
+     * [210]16889 ambiguity is not detected
+     * [211]16959 Segmentation fault in ios_base::sync_with_stdio
+
+    Java compiler and library
+
+     * [212]7587 direct threaded interpreter not thread-safe
+     * [213]16473 ServerSocket accept() leaks file descriptors
+     * [214]16478 Hash synchronization deadlock with finalizers
+
+    Alpha-specific
+
+     * [215]10695 ICE in dwarf2out_frame_debug_expr, in dwarf2out.c
+     * [216]16974 could not split insn (ice in final_scan_insn, in
+       final.c)
+
+    x86-specific
+
+     * [217]16298 ICE in output_operand
+     * [218]17113 ICE with SSE2 intrinsics
+
+    x86-64 specific
+
+     * [219]14697 libstdc++ couldn't find 32bit libgcc_s
+
+    MIPS-specific
+
+     * [220]15869 [mips64] No NOP after LW (with -mips1 -O0)
+     * [221]16325 [mips64] value profiling clobbers gp on mips
+     * [222]16357 [mipsisa64-elf] ICE copying 7 bytes between extern
+       char[]s
+     * [223]16380 [mips64] Use of uninitialised register after dbra
+       conversion
+     * [224]16407 [mips64] Unaligned access to local variables
+     * [225]16643 [mips64] verify_local_live_at_start ICE after
+       crossjumping & cfgcleanup
+
+    ARM-specific
+
+     * [226]15927 THUMB -O2: strength-reduced iteration variable ends up
+       off by 1
+     * [227]15948 THUMB: ICE with non-commutative cbranch
+     * [228]17019 THUMB: bad switch statement in md code for
+       addsi3_cbranch_scratch
+
+    IA64-specific
+
+     * [229]16130 ICE on valid code: in bundling, in config/ia64/ia64.c
+       (-mtune=merced)
+     * [230]16142 ICE on valid code: in bundling, in config/ia64/ia64.c
+       (-mtune=itanium)
+     * [231]16278 Gcc failed to build Linux kernel with -mtune=merced
+     * [232]16414 ICE on valid code: typo in comparison of asm_noperands
+       result
+     * [233]16445 ICE on valid code: don't count ignored insns
+     * [234]16490 ICE (segfault) while compiling with -fprofile-use
+     * [235]16683 ia64 does not honor SUBTARGET_EXTRA_SPECS
+
+    PowerPC-specific
+
+     * [236]16195 (ppc64): Miscompilation of GCC 3.3.x by 3.4.x
+     * [237]16239 ICE on ppc64 (mozilla 1.7 compile, -O1 -fno-exceptions
+       issue)
+
+    SPARC-specific
+
+     * [238]16199 ICE while compiling apache 2.0.49
+     * [239]16416 -m64 doesn't imply -mcpu=v9 anymore
+     * [240]16430 ICE when returning non-C aggregates larger than 16 bytes
+
+    Bugs specific to embedded processors
+
+     * [241]16379 [m32r] can't output large model function call of memcpy
+     * [242]17093 [m32r] ICE with -msdata=use -O0
+     * [243]17119 [m32r] ICE at switch case 0x8000
+
+    DJGPP-specific
+
+     * [244]15928 libstdc++ in 3.4.x doesn't cross-compile for djgpp
+
+    Alpha Tru64-specific
+
+     * [245]16210 libstdc++ gratuitously omits "long long" I/O
+
+    Testsuite, documentation issues (compiler is not affected):
+
+     * [246]15488 (libstdc++) possibly insufficient file permissions for
+       executing test suite
+     * [247]16250 ada/doctools runs makeinfo even in release tarball
+     __________________________________________________________________
+
+GCC 3.4.3
+
+   This is the [248]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+    Bootstrap failures
+
+     * [249]17369 [ia64] Bootstrap failure with binutils-2.15.90.0.1.1
+     * [250]17850 [arm-elf] bootstrap failure - libstdc++ uses strtold
+       when undeclared
+
+    Internal compiler errors (ICEs) affecting multiple platforms
+
+     * [251]13948 (java) GCJ segmentation fault while compiling GL4Java
+       .class files
+     * [252]14492 ICE in loc_descriptor_from_tree, in dwarf2out.c
+     * [253]16301 (c++) ICE when "strong" attribute is attached to a using
+       directive
+     * [254]16566 ICE with flexible arrays
+     * [255]17023 ICE with nested functions in parameter declaration
+     * [256]17027 ICE with noreturn function in loop at -O2
+     * [257]17524 ICE in grokdeclarator, in cp/decl.c
+     * [258]17826 (c++) ICE in cp_tree_equal
+
+    C and optimization bugs
+
+     * [259]15526 -ftrapv aborts on 0 * (-1)
+     * [260]16999 #ident stopped working
+     * [261]17503 quadratic behaviour in invalid_mode_change_p
+     * [262]17581 Long long arithmetic fails inside a switch/case
+       statement when compiled with -O2
+     * [263]18129 -fwritable-strings doesn't work
+
+    C++ compiler and library bugs
+
+     * [264]10975 incorrect initial ostringstream::tellp()
+     * [265]11722 Unbuffered filebuf::sgetn is slow
+     * [266]14534 Unrecognizing static function as a template parameter
+       when its return value is also templated
+     * [267]15172 Copy constructor optimization in aggregate
+       initialization
+     * [268]15786 Bad error message for frequently occuring error.
+     * [269]16162 Rejects valid member-template-definition
+     * [270]16612 empty basic_strings can't live in shared memory
+     * [271]16715 std::basic_iostream is instantiated when used, even
+       though instantiations are already contained in libstdc++
+     * [272]16848 code in /ext/demangle.h appears broken
+     * [273]17132 GCC fails to eliminate function template specialization
+       when argument deduction fails
+     * [274]17259 One more _S_leaf incorrectly qualified with _RopeRep::
+       in ropeimpl.h
+     * [275]17327 use of `enumeral_type' in template type unification
+     * [276]17393 "unused variable '._0'" warning with -Wall
+     * [277]17501 Confusion with member templates
+     * [278]17537 g++ not passing -lstdc++ to linker when all command line
+       arguments are libraries
+     * [279]17585 usage of unqualified name of static member from within
+       class not allowed
+     * [280]17821 Poor diagnostic for using "." instead of "->"
+     * [281]17829 wrong error: call of overloaded function is ambiguous
+     * [282]17851 Misleading diagnostic for invalid function declarations
+       with undeclared types
+     * [283]17976 Destructor is called twice
+     * [284]18020 rejects valid definition of enum value in template
+     * [285]18093 bogus conflict in namespace aliasing
+     * [286]18140 C++ parser bug when using >> in templates
+
+    Fortran
+
+     * [287]17541 data statements with double precision constants fail
+
+    x86-specific
+
+     * [288]17853 -O2 ICE for MMX testcase
+
+    SPARC-specific
+
+     * [289]17245 ICE compiling gsl-1.5 statistics/lag1.c
+
+    Darwin-specific
+
+     * [290]17167 FATAL:Symbol L_foo$stub already defined.
+
+    AIX-specific
+
+     * [291]17277 could not catch an exception when specified -maix64
+
+    Solaris-specific
+
+     * [292]17505 <cmath> calls acosf(), ceilf(), and other functions
+       missing from system libraries
+
+    HP/UX specific:
+
+     * [293]17684 /usr/ccs/bin/ld: Can't create libgcc_s.sl
+
+    ARM-specific
+
+     * [294]17384 ICE with mode attribute on structures
+
+    MIPS-specific
+
+     * [295]17770 No NOP after LWL with -mips1
+
+    Other embedded target specific
+
+     * [296]11476 [arc-elf] gcc ICE on newlib's vfprintf.c
+     * [297]14064 [avr-elf] -fdata-sections triggers ICE
+     * [298]14678 [m68hc11-elf] gcc ICE
+     * [299]15583 [powerpc-rtems] powerpc-rtems lacks __USE_INIT_FINI__
+     * [300]15790 [i686-coff] Alignment error building gcc with i686-coff
+       target
+     * [301]15886 [SH] Miscompilation with -O2 -fPIC
+     * [302]16884 [avr-elf] [fweb related] bug while initializing
+       variables
+
+    Bugs relating to debugger support
+
+     * [303]13841 missing debug info for _Complex function arguments
+     * [304]15860 [big-endian targets] No DW_AT_location debug info is
+       emitted for formal arguments to a function that uses "register"
+       qualifiers
+
+    Testsuite issues (compiler not affected)
+
+     * [305]17465 Testsuite in libffi overrides LD_LIBRARY_PATH
+     * [306]17469 Testsuite in libstdc++ overrides LD_LIBRARY_PATH
+     * [307]18138 [mips-sgi-irix6.5] libgcc_s.so.1 not found by 64-bit
+       testsuite
+
+    Documentation
+
+     * [308]15498 typo in gcc manual: non-existing locale example en_UK,
+       should be en_GB
+     * [309]15747 [mips-sgi-irix5.3] /bin/sh hangs during bootstrap:
+       document broken shell
+     * [310]16406 USE_LD_AS_NEEDED undocumented
+     __________________________________________________________________
+
+GCC 3.4.4
+
+   This is the [311]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+     __________________________________________________________________
+
+GCC 3.4.5
+
+   This is the [312]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.5 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+    Bootstrap issues
+
+     * [313]24688 sco_math fixincl breaks math.h
+
+    C compiler bugs
+
+     * [314]17188 struct Foo { } redefinition
+     * [315]20187 wrong code for ((unsigned char)(unsigned long
+       long)((a?a:1)&(a*b)))?0:1)
+     * [316]21873 infinite warning loop on bad array initializer
+     * [317]21899 enum definition accepts values to be overriden
+     * [318]22061 ICE in find_function_data, in function.c
+     * [319]22308 Failure to diagnose violation of constraint 6.516p2
+     * [320]22458 ICE on missing brace
+     * [321]22589 ICE casting to long long
+     * [322]24101 Segfault with preprocessed source
+
+    C++ compiler and library bugs
+
+     * [323]10611 operations on vector mode not recognized in C++
+     * [324]13377 unexpected behavior of namespace usage directive
+     * [325]16002 Strange error message with new parser
+     * [326]17413 local classes as template argument
+     * [327]17609 spurious error message after using keyword
+     * [328]17618 ICE in cp_convert_to_pointer, in cp/cvt.c
+     * [329]18124 ICE with invalid template template parameter
+     * [330]18155 typedef in template declaration not rejected
+     * [331]18177 ICE with const_cast for undeclared variable
+     * [332]18368 C++ error message regression
+     * [333]16378 ICE when returning a copy of a packed member
+     * [334]18466 int ::i; accepted
+     * [335]18512 ICE on invalid usage of template base class
+     * [336]18454 ICE when returning undefined type
+     * [337]18738 typename not allowed with non-dependent qualified name
+     * [338]18803 rejects access to operator() in template
+     * [339]19004 ICE in uses_template_parms, in cp/pt.c
+     * [340]19208 Spurious error about variably modified type
+     * [341]18253 bad error message / ICE for invalid template parameter
+     * [342]19608 ICE after friend function definition in local class
+     * [343]19884 ICE on explicit instantiation of a non-template
+       constructor
+     * [344]20153 ICE when C++ template function contains anonymous union
+     * [345]20563 Infinite loop in diagnostic (and ice after error
+       message)
+     * [346]20789 ICE with incomplete type in template
+     * [347]21336 Internal compiler error when using custom new operators
+     * [348]21768 ICE in error message due to violation of coding
+       conventions
+     * [349]21853 constness of pointer to data member ignored
+     * [350]21903 Default argument of template function causes a
+       compile-time error
+     * [351]21983 multiple diagnostics
+     * [352]21987 New testsuite failure
+       g++.dg/warn/conversion-function-1.C
+     * [353]22153 ICE on invalid template specialization
+     * [354]22172 Internal compiler error, seg fault.
+     * [355]21286 filebuf::xsgetn vs pipes
+     * [356]22233 ICE with wrong number of template parameters
+     * [357]22508 ICE after invalid operator new
+     * [358]22545 ICE with pointer to class member & user defined
+       conversion operator
+     * [359]23528 Wrong default allocator in ext/hash_map
+     * [360]23550 char_traits requirements/1.cc test bad math
+     * [361]23586 Bad diagnostic for invalid namespace-name
+     * [362]23624 ICE in invert_truthvalue, in fold-const.c
+     * [363]23639 Bad error message: not a member of '<declaration error>'
+     * [364]23797 ICE on typename outside template
+     * [365]23965 Bogus error message: no matching function for call to
+       'foo(<type error>)'
+     * [366]24052 &#`label_decl' not supported by dump_expr#<expression
+       error>
+     * [367]24580 virtual base class cause exception not to be caught
+
+    Problems in generated debug information
+
+     * [368]24267 Bad DWARF for altivec vectors
+
+    Optimizations issues
+
+     * [369]17810 ICE in verify_local_live_at_start
+     * [370]17860 Wrong generated code for loop with varying bound
+     * [371]21709 ICE on compile-time complex NaN
+     * [372]21964 broken tail call at -O2 or more
+     * [373]22167 Strange optimization bug when using -Os
+     * [374]22619 Compilation failure for real_const_1.f and
+       real_const_2.f90
+     * [375]23241 Invalid code generated for comparison of uchar to 255
+     * [376]23478 Miscompilation due to reloading of a var that is also
+       used in EH pad
+     * [377]24470 segmentation fault in cc1plus when compiling with -O
+     * [378]24950 ICE in operand_subword_force
+
+    Precompiled headers problems
+
+     * [379]14400 Cannot compile qt-x11-free-3.3.0
+     * [380]14940 PCH largefile test fails on various platforms
+
+    Preprocessor bugs
+
+     * [381]20239 ICE on empty preprocessed input
+     * [382]15220 "gcc -E -MM -MG" reports missing system headers in
+       source directory
+
+    Testsuite issues
+
+     * [383]19275 gcc.dg/20020919-1.c fails with -fpic/-fPIC on
+       i686-pc-linux-gnu
+
+    Alpha specific
+
+     * [384]21888 bootstrap failure with linker relaxation enabled
+
+    ARM specific
+
+     * [385]15342 [arm-linux]: ICE in verify_local_live_at_start
+     * [386]23985 Memory aliasing information incorrect in inlined memcpy
+
+    ColdFile specific
+
+     * [387]16719 Illegal move of byte into address register causes
+       compiler to ICE
+
+    HPPA specific
+
+     * [388]21723 ICE while building libgfortran
+     * [389]21841 -mhp-ld/-mgnu-ld documentation
+
+    IA-64 specific
+
+     * [390]23644 IA-64 hardware models and configuration options
+       documentation error
+     * [391]24718 Shared libgcc not used for linking by default
+
+    M68000 specific
+
+     * [392]18421 ICE in reload_cse_simplify_operands, in postreload.c
+
+    MIPS specific
+
+     * [393]20621 ICE in change_address_1, in emit-rtl.c
+
+    PowerPC and PowerPC64 specific
+
+     * [394]18583 error on valid code: const
+       __attribute__((altivec(vector__))) doesn't work in arrays
+     * [395]20191 ICE in reload_cse_simplify_operands
+     * [396]22083 AIX: TARGET_C99_FUNCTIONS is wrongly defined
+     * [397]23070 CALL_V4_CLEAR_FP_ARGS flag not properly set
+     * [398]23404 gij trashes args of functions with more than 8 fp args
+     * [399]23539 C & C++ compiler generating misaligned references
+       regardless of compiler flags
+     * [400]24102 floatdisf2_internal2 broken
+     * [401]24465 -mminimal-toc miscompilation of __thread vars
+
+    Solaris specific
+
+     * [402]19933 Problem with define of HUGE_VAL in math_c99
+     * [403]21889 Native Solaris assembler cannot grok DTP-relative debug
+       symbols
+
+    SPARC specific
+
+     * [404]19300 PCH failures on sparc-linux
+     * [405]20301 Assembler labels have a leading "-"
+     * [406]20673 C PCH testsuite assembly comparison failure
+
+    x86 and x86_64 specific
+
+     * [407]18582 ICE with arrays of type V2DF
+     * [408]19340 Compilation SEGFAULTs with -O1 -fschedule-insns2
+       -fsched2-use-traces
+     * [409]21716 ICE in reg-stack.c's swap_rtx_condition
+     * [410]24315 amd64 fails -fpeephole2
+     __________________________________________________________________
+
+GCC 3.4.6
+
+   This is the [411]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.4.6 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [412]GCC manuals. If that fails, the
+    [413]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [414]gcc@gcc.gnu.org. All of [415]our lists have public
+    archives.
+
+   Copyright (C) [416]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [417]maintained by the GCC team. Last modified
+   2014-06-28[418].
+
+References
+
+   1. http://gcc.gnu.org/gcc-3.4/changes.html#3.4.6
+   2. http://gcc.gnu.org/gcc-3.4/changes.html#cplusplus
+   3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
+   4. http://gcc.gnu.org/gcc-3.4/changes.html#obsolete_systems
+   5. http://gcc.gnu.org/gcc-3.4/mips-abi.html
+   6. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
+   7. http://www.boost.org/
+   8. https://gcc.gnu.org/PR11953
+   9. https://gcc.gnu.org/PR8361
+  10. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Other-Builtins.html#Other Builtins
+  11. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_closed.html#209
+  12. http://gcc.gnu.org/bugs/#cxx_rvalbind
+  13. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
+  14. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
+  15. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Objective-C-Dialect-Options.html
+  16. http://www.gnu.org/software/classpath/
+  17. http://www.eclipse.org/
+  18. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/g77/News.html
+  19. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gcc/Alpha-Built-in-Functions.html
+  20. http://h30097.www3.hp.com/docs/base_doc/DOCUMENTATION/V51A_HTML/ARH9MBTE/DTMNPLTN.HTM#normal-argument-list-structure
+  21. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
+  22. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Comparison-of-the-two-descriptions.html
+  23. https://gcc.gnu.org/onlinedocs/gcc-3.4.3/gccint/Processor-pipeline-description.html
+  24. http://gcc.gnu.org/gcc-3.4/mips-abi.html
+  25. http://gcc.gnu.org/gcc-3.4/powerpc-abi.html
+  26. http://gcc.gnu.org/gcc-3.4/sparc-abi.html
+  27. https://gcc.gnu.org/bugzilla/buglist.cgi?short_desc_type=notregexp&short_desc=\[3\.4.*[Rr]egression&target_milestone=3.4.0&bug_status=RESOLVED&resolution=FIXED
+  28. https://gcc.gnu.org/PR10129
+  29. https://gcc.gnu.org/PR14576
+  30. https://gcc.gnu.org/PR14760
+  31. https://gcc.gnu.org/PR14671
+  32. https://gcc.gnu.org/PR15093
+  33. https://gcc.gnu.org/PR15178
+  34. https://gcc.gnu.org/PR12753
+  35. https://gcc.gnu.org/PR13985
+  36. https://gcc.gnu.org/PR14810
+  37. https://gcc.gnu.org/PR14883
+  38. https://gcc.gnu.org/PR15044
+  39. https://gcc.gnu.org/PR15057
+  40. https://gcc.gnu.org/PR15064
+  41. https://gcc.gnu.org/PR15142
+  42. https://gcc.gnu.org/PR15159
+  43. https://gcc.gnu.org/PR15165
+  44. https://gcc.gnu.org/PR15193
+  45. https://gcc.gnu.org/PR15209
+  46. https://gcc.gnu.org/PR15227
+  47. https://gcc.gnu.org/PR15285
+  48. https://gcc.gnu.org/PR15299
+  49. https://gcc.gnu.org/PR15329
+  50. https://gcc.gnu.org/PR15550
+  51. https://gcc.gnu.org/PR15554
+  52. https://gcc.gnu.org/PR15640
+  53. https://gcc.gnu.org/PR15666
+  54. https://gcc.gnu.org/PR15696
+  55. https://gcc.gnu.org/PR15701
+  56. https://gcc.gnu.org/PR15761
+  57. https://gcc.gnu.org/PR15829
+  58. https://gcc.gnu.org/PR14538
+  59. https://gcc.gnu.org/PR12391
+  60. https://gcc.gnu.org/PR14649
+  61. https://gcc.gnu.org/PR15004
+  62. https://gcc.gnu.org/PR15749
+  63. https://gcc.gnu.org/PR10646
+  64. https://gcc.gnu.org/PR12077
+  65. https://gcc.gnu.org/PR13598
+  66. https://gcc.gnu.org/PR14211
+  67. https://gcc.gnu.org/PR14220
+  68. https://gcc.gnu.org/PR14245
+  69. https://gcc.gnu.org/PR14340
+  70. https://gcc.gnu.org/PR14600
+  71. https://gcc.gnu.org/PR14668
+  72. https://gcc.gnu.org/PR14775
+  73. https://gcc.gnu.org/PR14821
+  74. https://gcc.gnu.org/PR14930
+  75. https://gcc.gnu.org/PR14932
+  76. https://gcc.gnu.org/PR14950
+  77. https://gcc.gnu.org/PR14962
+  78. https://gcc.gnu.org/PR14975
+  79. https://gcc.gnu.org/PR15002
+  80. https://gcc.gnu.org/PR15025
+  81. https://gcc.gnu.org/PR15046
+  82. https://gcc.gnu.org/PR15069
+  83. https://gcc.gnu.org/PR15074
+  84. https://gcc.gnu.org/PR15083
+  85. https://gcc.gnu.org/PR15096
+  86. https://gcc.gnu.org/PR15287
+  87. https://gcc.gnu.org/PR15317
+  88. https://gcc.gnu.org/PR15337
+  89. https://gcc.gnu.org/PR15361
+  90. https://gcc.gnu.org/PR15412
+  91. https://gcc.gnu.org/PR15427
+  92. https://gcc.gnu.org/PR15471
+  93. https://gcc.gnu.org/PR15503
+  94. https://gcc.gnu.org/PR15507
+  95. https://gcc.gnu.org/PR15542
+  96. https://gcc.gnu.org/PR15565
+  97. https://gcc.gnu.org/PR15625
+  98. https://gcc.gnu.org/PR15629
+  99. https://gcc.gnu.org/PR15742
+ 100. https://gcc.gnu.org/PR15775
+ 101. https://gcc.gnu.org/PR15821
+ 102. https://gcc.gnu.org/PR15862
+ 103. https://gcc.gnu.org/PR15875
+ 104. https://gcc.gnu.org/PR15877
+ 105. https://gcc.gnu.org/PR15947
+ 106. https://gcc.gnu.org/PR16020
+ 107. https://gcc.gnu.org/PR16154
+ 108. https://gcc.gnu.org/PR16174
+ 109. https://gcc.gnu.org/PR14315
+ 110. https://gcc.gnu.org/PR15151
+ 111. https://gcc.gnu.org/PR7993
+ 112. https://gcc.gnu.org/PR15228
+ 113. https://gcc.gnu.org/PR15345
+ 114. https://gcc.gnu.org/PR15945
+ 115. https://gcc.gnu.org/PR15526
+ 116. https://gcc.gnu.org/PR14690
+ 117. https://gcc.gnu.org/PR15112
+ 118. https://gcc.gnu.org/PR15067
+ 119. https://gcc.gnu.org/PR1963
+ 120. https://gcc.gnu.org/PR15717
+ 121. https://gcc.gnu.org/PR14782
+ 122. https://gcc.gnu.org/PR14828
+ 123. https://gcc.gnu.org/PR15202
+ 124. https://gcc.gnu.org/PR14610
+ 125. https://gcc.gnu.org/PR14813
+ 126. https://gcc.gnu.org/PR14857
+ 127. https://gcc.gnu.org/PR15598
+ 128. https://gcc.gnu.org/PR15653
+ 129. https://gcc.gnu.org/PR15189
+ 130. https://gcc.gnu.org/PR15331
+ 131. https://gcc.gnu.org/PR16144
+ 132. https://gcc.gnu.org/PR16176
+ 133. https://gcc.gnu.org/PR11591
+ 134. https://gcc.gnu.org/PR12028
+ 135. https://gcc.gnu.org/PR14478
+ 136. https://gcc.gnu.org/PR14567
+ 137. https://gcc.gnu.org/PR14715
+ 138. https://gcc.gnu.org/PR14902
+ 139. https://gcc.gnu.org/PR14924
+ 140. https://gcc.gnu.org/PR14960
+ 141. https://gcc.gnu.org/PR15106
+ 142. https://gcc.gnu.org/PR16026
+ 143. https://gcc.gnu.org/PR15191
+ 144. https://gcc.gnu.org/PR15662
+ 145. https://gcc.gnu.org/PR15054
+ 146. https://gcc.gnu.org/PR15783
+ 147. https://gcc.gnu.org/PR15626
+ 148. https://gcc.gnu.org/PR14326
+ 149. https://gcc.gnu.org/PR14723
+ 150. https://gcc.gnu.org/PR15290
+ 151. https://gcc.gnu.org/PR15250
+ 152. https://gcc.gnu.org/PR15551
+ 153. https://gcc.gnu.org/PR8309
+ 154. https://gcc.gnu.org/PR13250
+ 155. https://gcc.gnu.org/PR13803
+ 156. https://gcc.gnu.org/PR14093
+ 157. https://gcc.gnu.org/PR14457
+ 158. https://gcc.gnu.org/PR14542
+ 159. https://gcc.gnu.org/PR15100
+ 160. https://gcc.gnu.org/PR15296
+ 161. https://gcc.gnu.org/PR15396
+ 162. https://gcc.gnu.org/PR15782
+ 163. https://gcc.gnu.org/PR11610
+ 164. https://gcc.gnu.org/PR15488
+ 165. https://gcc.gnu.org/PR15489
+ 166. https://gcc.gnu.org/PR13928
+ 167. https://gcc.gnu.org/PR14150
+ 168. https://gcc.gnu.org/PR14949
+ 169. https://gcc.gnu.org/PR15123
+ 170. https://gcc.gnu.org/PR16469
+ 171. https://gcc.gnu.org/PR16344
+ 172. https://gcc.gnu.org/PR16842
+ 173. https://gcc.gnu.org/PR12608
+ 174. https://gcc.gnu.org/PR14492
+ 175. https://gcc.gnu.org/PR15461
+ 176. https://gcc.gnu.org/PR15890
+ 177. https://gcc.gnu.org/PR16180
+ 178. https://gcc.gnu.org/PR16224
+ 179. https://gcc.gnu.org/PR16408
+ 180. https://gcc.gnu.org/PR16529
+ 181. https://gcc.gnu.org/PR16698
+ 182. https://gcc.gnu.org/PR16706
+ 183. https://gcc.gnu.org/PR16810
+ 184. https://gcc.gnu.org/PR16851
+ 185. https://gcc.gnu.org/PR16870
+ 186. https://gcc.gnu.org/PR16904
+ 187. https://gcc.gnu.org/PR16905
+ 188. https://gcc.gnu.org/PR16964
+ 189. https://gcc.gnu.org/PR17068
+ 190. https://gcc.gnu.org/PR16366
+ 191. https://gcc.gnu.org/PR15345
+ 192. https://gcc.gnu.org/PR16590
+ 193. https://gcc.gnu.org/PR16693
+ 194. https://gcc.gnu.org/PR17078
+ 195. https://gcc.gnu.org/PR13956
+ 196. https://gcc.gnu.org/PR16684
+ 197. https://gcc.gnu.org/PR12658
+ 198. https://gcc.gnu.org/PR13092
+ 199. https://gcc.gnu.org/PR15320
+ 200. https://gcc.gnu.org/PR16246
+ 201. https://gcc.gnu.org/PR16273
+ 202. https://gcc.gnu.org/PR16401
+ 203. https://gcc.gnu.org/PR16411
+ 204. https://gcc.gnu.org/PR16489
+ 205. https://gcc.gnu.org/PR16618
+ 206. https://gcc.gnu.org/PR16637
+ 207. https://gcc.gnu.org/PR16717
+ 208. https://gcc.gnu.org/PR16813
+ 209. https://gcc.gnu.org/PR16853
+ 210. https://gcc.gnu.org/PR16889
+ 211. https://gcc.gnu.org/PR16959
+ 212. https://gcc.gnu.org/PR7587
+ 213. https://gcc.gnu.org/PR16473
+ 214. https://gcc.gnu.org/PR16478
+ 215. https://gcc.gnu.org/PR10695
+ 216. https://gcc.gnu.org/PR16974
+ 217. https://gcc.gnu.org/PR16298
+ 218. https://gcc.gnu.org/PR17113
+ 219. https://gcc.gnu.org/PR14697
+ 220. https://gcc.gnu.org/PR15869
+ 221. https://gcc.gnu.org/PR16325
+ 222. https://gcc.gnu.org/PR16357
+ 223. https://gcc.gnu.org/PR16380
+ 224. https://gcc.gnu.org/PR16407
+ 225. https://gcc.gnu.org/PR16643
+ 226. https://gcc.gnu.org/PR15927
+ 227. https://gcc.gnu.org/PR15948
+ 228. https://gcc.gnu.org/PR17019
+ 229. https://gcc.gnu.org/PR16130
+ 230. https://gcc.gnu.org/PR16142
+ 231. https://gcc.gnu.org/PR16278
+ 232. https://gcc.gnu.org/PR16414
+ 233. https://gcc.gnu.org/PR16445
+ 234. https://gcc.gnu.org/PR16490
+ 235. https://gcc.gnu.org/PR16683
+ 236. https://gcc.gnu.org/PR16195
+ 237. https://gcc.gnu.org/PR16239
+ 238. https://gcc.gnu.org/PR16199
+ 239. https://gcc.gnu.org/PR16416
+ 240. https://gcc.gnu.org/PR16430
+ 241. https://gcc.gnu.org/PR16379
+ 242. https://gcc.gnu.org/PR17093
+ 243. https://gcc.gnu.org/PR17119
+ 244. https://gcc.gnu.org/PR15928
+ 245. https://gcc.gnu.org/PR16210
+ 246. https://gcc.gnu.org/PR15488
+ 247. https://gcc.gnu.org/PR16250
+ 248. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.4.3
+ 249. https://gcc.gnu.org/PR17369
+ 250. https://gcc.gnu.org/PR17850
+ 251. https://gcc.gnu.org/PR13948
+ 252. https://gcc.gnu.org/PR14492
+ 253. https://gcc.gnu.org/PR16301
+ 254. https://gcc.gnu.org/PR16566
+ 255. https://gcc.gnu.org/PR17023
+ 256. https://gcc.gnu.org/PR17027
+ 257. https://gcc.gnu.org/PR17524
+ 258. https://gcc.gnu.org/PR17826
+ 259. https://gcc.gnu.org/PR15526
+ 260. https://gcc.gnu.org/PR16999
+ 261. https://gcc.gnu.org/PR17503
+ 262. https://gcc.gnu.org/PR17581
+ 263. https://gcc.gnu.org/PR18129
+ 264. https://gcc.gnu.org/PR10975
+ 265. https://gcc.gnu.org/PR11722
+ 266. https://gcc.gnu.org/PR14534
+ 267. https://gcc.gnu.org/PR15172
+ 268. https://gcc.gnu.org/PR15786
+ 269. https://gcc.gnu.org/PR16162
+ 270. https://gcc.gnu.org/PR16612
+ 271. https://gcc.gnu.org/PR16715
+ 272. https://gcc.gnu.org/PR16848
+ 273. https://gcc.gnu.org/PR17132
+ 274. https://gcc.gnu.org/PR17259
+ 275. https://gcc.gnu.org/PR17327
+ 276. https://gcc.gnu.org/PR17393
+ 277. https://gcc.gnu.org/PR17501
+ 278. https://gcc.gnu.org/PR17537
+ 279. https://gcc.gnu.org/PR17585
+ 280. https://gcc.gnu.org/PR17821
+ 281. https://gcc.gnu.org/PR17829
+ 282. https://gcc.gnu.org/PR17851
+ 283. https://gcc.gnu.org/PR17976
+ 284. https://gcc.gnu.org/PR18020
+ 285. https://gcc.gnu.org/PR18093
+ 286. https://gcc.gnu.org/PR18140
+ 287. https://gcc.gnu.org/PR17541
+ 288. https://gcc.gnu.org/PR17853
+ 289. https://gcc.gnu.org/PR17245
+ 290. https://gcc.gnu.org/PR17167
+ 291. https://gcc.gnu.org/PR17277
+ 292. https://gcc.gnu.org/PR17505
+ 293. https://gcc.gnu.org/PR17684
+ 294. https://gcc.gnu.org/PR17384
+ 295. https://gcc.gnu.org/PR17770
+ 296. https://gcc.gnu.org/PR11476
+ 297. https://gcc.gnu.org/PR14064
+ 298. https://gcc.gnu.org/PR14678
+ 299. https://gcc.gnu.org/PR15583
+ 300. https://gcc.gnu.org/PR15790
+ 301. https://gcc.gnu.org/PR15886
+ 302. https://gcc.gnu.org/PR16884
+ 303. https://gcc.gnu.org/PR13841
+ 304. https://gcc.gnu.org/PR15860
+ 305. https://gcc.gnu.org/PR17465
+ 306. https://gcc.gnu.org/PR17469
+ 307. https://gcc.gnu.org/PR18138
+ 308. https://gcc.gnu.org/PR15498
+ 309. https://gcc.gnu.org/PR15747
+ 310. https://gcc.gnu.org/PR16406
+ 311. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.4.4
+ 312. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.4.5
+ 313. https://gcc.gnu.org/PR24688
+ 314. https://gcc.gnu.org/PR17188
+ 315. https://gcc.gnu.org/PR20187
+ 316. https://gcc.gnu.org/PR21873
+ 317. https://gcc.gnu.org/PR21899
+ 318. https://gcc.gnu.org/PR22061
+ 319. https://gcc.gnu.org/PR22208
+ 320. https://gcc.gnu.org/PR22458
+ 321. https://gcc.gnu.org/PR22589
+ 322. https://gcc.gnu.org/PR24101
+ 323. https://gcc.gnu.org/PR10611
+ 324. https://gcc.gnu.org/PR13377
+ 325. https://gcc.gnu.org/PR16002
+ 326. https://gcc.gnu.org/PR17413
+ 327. https://gcc.gnu.org/PR17609
+ 328. https://gcc.gnu.org/PR17618
+ 329. https://gcc.gnu.org/PR18124
+ 330. https://gcc.gnu.org/PR18155
+ 331. https://gcc.gnu.org/PR18177
+ 332. https://gcc.gnu.org/PR18368
+ 333. https://gcc.gnu.org/PR18378
+ 334. https://gcc.gnu.org/PR18466
+ 335. https://gcc.gnu.org/PR18512
+ 336. https://gcc.gnu.org/PR18545
+ 337. https://gcc.gnu.org/PR18738
+ 338. https://gcc.gnu.org/PR18803
+ 339. https://gcc.gnu.org/PR19004
+ 340. https://gcc.gnu.org/PR19208
+ 341. https://gcc.gnu.org/PR19253
+ 342. https://gcc.gnu.org/PR19608
+ 343. https://gcc.gnu.org/PR19884
+ 344. https://gcc.gnu.org/PR20153
+ 345. https://gcc.gnu.org/PR20563
+ 346. https://gcc.gnu.org/PR20789
+ 347. https://gcc.gnu.org/PR21336
+ 348. https://gcc.gnu.org/PR21768
+ 349. https://gcc.gnu.org/PR21853
+ 350. https://gcc.gnu.org/PR21903
+ 351. https://gcc.gnu.org/PR21983
+ 352. https://gcc.gnu.org/PR21987
+ 353. https://gcc.gnu.org/PR22153
+ 354. https://gcc.gnu.org/PR22172
+ 355. https://gcc.gnu.org/PR21286
+ 356. https://gcc.gnu.org/PR22233
+ 357. https://gcc.gnu.org/PR22508
+ 358. https://gcc.gnu.org/PR22545
+ 359. https://gcc.gnu.org/PR23528
+ 360. https://gcc.gnu.org/PR23550
+ 361. https://gcc.gnu.org/PR23586
+ 362. https://gcc.gnu.org/PR23624
+ 363. https://gcc.gnu.org/PR23639
+ 364. https://gcc.gnu.org/PR23797
+ 365. https://gcc.gnu.org/PR23965
+ 366. https://gcc.gnu.org/PR24052
+ 367. https://gcc.gnu.org/PR24580
+ 368. https://gcc.gnu.org/PR24267
+ 369. https://gcc.gnu.org/PR17810
+ 370. https://gcc.gnu.org/PR17860
+ 371. https://gcc.gnu.org/PR21709
+ 372. https://gcc.gnu.org/PR21964
+ 373. https://gcc.gnu.org/PR22167
+ 374. https://gcc.gnu.org/PR22619
+ 375. https://gcc.gnu.org/PR23241
+ 376. https://gcc.gnu.org/PR23478
+ 377. https://gcc.gnu.org/PR24470
+ 378. https://gcc.gnu.org/PR24950
+ 379. https://gcc.gnu.org/PR14400
+ 380. https://gcc.gnu.org/PR14940
+ 381. https://gcc.gnu.org/PR20239
+ 382. https://gcc.gnu.org/PR15220
+ 383. https://gcc.gnu.org/PR19275
+ 384. https://gcc.gnu.org/PR21888
+ 385. https://gcc.gnu.org/PR15342
+ 386. https://gcc.gnu.org/PR23985
+ 387. https://gcc.gnu.org/PR16719
+ 388. https://gcc.gnu.org/PR21723
+ 389. https://gcc.gnu.org/PR21841
+ 390. https://gcc.gnu.org/PR23644
+ 391. https://gcc.gnu.org/PR24718
+ 392. https://gcc.gnu.org/PR18421
+ 393. https://gcc.gnu.org/PR20621
+ 394. https://gcc.gnu.org/PR18583
+ 395. https://gcc.gnu.org/PR20191
+ 396. https://gcc.gnu.org/PR22083
+ 397. https://gcc.gnu.org/PR23070
+ 398. https://gcc.gnu.org/PR23404
+ 399. https://gcc.gnu.org/PR23539
+ 400. https://gcc.gnu.org/PR24102
+ 401. https://gcc.gnu.org/PR24465
+ 402. https://gcc.gnu.org/PR19933
+ 403. https://gcc.gnu.org/PR21889
+ 404. https://gcc.gnu.org/PR19300
+ 405. https://gcc.gnu.org/PR20301
+ 406. https://gcc.gnu.org/PR20673
+ 407. https://gcc.gnu.org/PR18582
+ 408. https://gcc.gnu.org/PR19340
+ 409. https://gcc.gnu.org/PR21716
+ 410. https://gcc.gnu.org/PR24315
+ 411. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.4.6
+ 412. https://gcc.gnu.org/onlinedocs/
+ 413. mailto:gcc-help@gcc.gnu.org
+ 414. mailto:gcc@gcc.gnu.org
+ 415. https://gcc.gnu.org/lists.html
+ 416. http://www.fsf.org/
+ 417. https://gcc.gnu.org/about.html
+ 418. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.3/index.html
+                             GCC 3.3 Release Series
+
+   May 03, 2005
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.3.6.
+
+   This release is a bug-fix release, containing fixes for regressions in
+   GCC 3.3.5 relative to previous releases of GCC.
+
+   This release is the last of the series 3.3.x.
+
+   The GCC 3.3 release series includes numerous [2]new features,
+   improvements, bug fixes, and other changes, thanks to an [3]amazing
+   group of volunteers.
+
+Release History
+
+   GCC 3.3.6
+          May 3, 2005 ([4]changes)
+
+   GCC 3.3.5
+          September 30, 2004 ([5]changes)
+
+   GCC 3.3.4
+          May 31, 2004 ([6]changes)
+
+   GCC 3.3.3
+          February 14, 2004 ([7]changes)
+
+   GCC 3.3.2
+          October 16, 2003 ([8]changes)
+
+   GCC 3.3.1
+          August 8, 2003 ([9]changes)
+
+   GCC 3.3
+          May 14, 2003 ([10]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [11]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [12]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [13]GCC
+   project web site or contact the [14]GCC development mailing list.
+
+   To obtain GCC please use [15]our mirror sites, or our CVS server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [16]GCC manuals. If that fails, the
+    [17]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [18]gcc@gcc.gnu.org. All of [19]our lists have public
+    archives.
+
+   Copyright (C) [20]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [21]maintained by the GCC team. Last modified
+   2014-06-28[22].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-3.3/changes.html
+   3. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   4. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
+   5. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.5
+   6. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.4
+   7. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.3
+   8. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.2
+   9. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.1
+  10. http://gcc.gnu.org/gcc-3.3/changes.html
+  11. http://gcc.gnu.org/gcc-3.3/buildstat.html
+  12. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+  13. http://gcc.gnu.org/index.html
+  14. mailto:gcc@gcc.gnu.org
+  15. http://gcc.gnu.org/mirrors.html
+  16. https://gcc.gnu.org/onlinedocs/
+  17. mailto:gcc-help@gcc.gnu.org
+  18. mailto:gcc@gcc.gnu.org
+  19. https://gcc.gnu.org/lists.html
+  20. http://www.fsf.org/
+  21. https://gcc.gnu.org/about.html
+  22. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.3/changes.html
+                             GCC 3.3 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 3.3 release series is [1]GCC 3.3.6.
+
+Caveats
+
+     * The preprocessor no longer accepts multi-line string literals. They
+       were deprecated in 3.0, 3.1, and 3.2.
+     * The preprocessor no longer supports the -A- switch when appearing
+       alone. -A- followed by an assertion is still supported.
+     * Support for all the systems [2]obsoleted in GCC 3.1 has been
+       removed from GCC 3.3. See below for a [3]list of systems which are
+       obsoleted in this release.
+     * Checking for null format arguments has been decoupled from the rest
+       of the format checking mechanism. Programs which use the format
+       attribute may regain this functionality by using the new [4]nonnull
+       function attribute. Note that all functions for which GCC has a
+       built-in format attribute, an appropriate built-in nonnull
+       attribute is also applied.
+     * The DWARF (version 1) debugging format has been deprecated and will
+       be removed in a future version of GCC. Version 2 of the DWARF
+       debugging format will continue to be supported for the foreseeable
+       future.
+     * The C and Objective-C compilers no longer accept the "Naming Types"
+       extension (typedef foo = bar); it was already unavailable in C++.
+       Code which uses it will need to be changed to use the "typeof"
+       extension instead: typedef typeof(bar) foo. (We have removed this
+       extension without a period of deprecation because it has caused the
+       compiler to crash since version 3.0 and no one noticed until very
+       recently. Thus we conclude it is not in widespread use.)
+     * The -traditional C compiler option has been removed. It was
+       deprecated in 3.1 and 3.2. (Traditional preprocessing remains
+       available.) The <varargs.h> header, used for writing variadic
+       functions in traditional C, still exists but will produce an error
+       message if used.
+     * GCC 3.3.1 automatically places zero-initialized variables in the
+       .bss section on some operating systems. Versions of GNU Emacs up to
+       (and including) 21.3 will not work correctly when using this
+       optimization; you can use -fno-zero-initialized-in-bss to disable
+       it.
+
+General Optimizer Improvements
+
+     * A new scheme for accurately describing processor pipelines, the
+       [5]DFA scheduler, has been added.
+     * Pavel Nejedly, Charles University Prague, has contributed new file
+       format used by the edge coverage profiler (-fprofile-arcs).
+       The new format is robust and diagnoses common mistakes where
+       profiles from different versions (or compilations) of the program
+       are combined resulting in nonsensical profiles and slow code to
+       produced with profile feedback. Additionally this format allows
+       extra data to be gathered. Currently, overall statistics are
+       produced helping optimizers to identify hot spots of a program
+       globally replacing the old intra-procedural scheme and resulting in
+       better code. Note that the gcov tool from older GCC versions will
+       not be able to parse the profiles generated by GCC 3.3 and vice
+       versa.
+     * Jan Hubicka, SuSE Labs, has contributed a new superblock formation
+       pass enabled using -ftracer. This pass simplifies the control flow
+       of functions allowing other optimizations to do better job.
+       He also contributed the function reordering pass
+       (-freorder-functions) to optimize function placement using profile
+       feedback.
+
+New Languages and Language specific improvements
+
+  C/ObjC/C++
+
+     * The preprocessor now accepts directives within macro arguments. It
+       processes them just as if they had not been within macro arguments.
+     * The separate ISO and traditional preprocessors have been completely
+       removed. The front end handles either type of preprocessed output
+       if necessary.
+     * In C99 mode preprocessor arithmetic is done in the precision of the
+       target's intmax_t, as required by that standard.
+     * The preprocessor can now copy comments inside macros to the output
+       file when the macro is expanded. This feature, enabled using the
+       -CC option, is intended for use by applications which place
+       metadata or directives inside comments, such as lint.
+     * The method of constructing the list of directories to be searched
+       for header files has been revised. If a directory named by a -I
+       option is a standard system include directory, the option is
+       ignored to ensure that the default search order for system
+       directories and the special treatment of system header files are
+       not defeated.
+     * A few more [6]ISO C99 features now work correctly.
+     * A new function attribute, nonnull, has been added which allows
+       pointer arguments to functions to be specified as requiring a
+       non-null value. The compiler currently uses this information to
+       issue a warning when it detects a null value passed in such an
+       argument slot.
+     * A new type attribute, may_alias, has been added. Accesses to
+       objects with types with this attribute are not subjected to
+       type-based alias analysis, but are instead assumed to be able to
+       alias any other type of objects, just like the char type.
+
+  C++
+
+     * Type based alias analysis has been implemented for C++ aggregate
+       types.
+
+  Objective-C
+
+     * Generate an error if Objective-C objects are passed by value in
+       function and method calls.
+     * When -Wselector is used, check the whole list of selectors at the
+       end of compilation, and emit a warning if a @selector() is not
+       known.
+     * Define __NEXT_RUNTIME__ when compiling for the NeXT runtime.
+     * No longer need to include objc/objc-class.h to compile self calls
+       in class methods (NeXT runtime only).
+     * New -Wundeclared-selector option.
+     * Removed selector bloating which was causing object files to be 10%
+       bigger on average (GNU runtime only).
+     * Using at run time @protocol() objects has been fixed in certain
+       situations (GNU runtime only).
+     * Type checking has been fixed and improved in many situations
+       involving protocols.
+
+  Java
+
+     * The java.sql and javax.sql packages now implement the JDBC 3.0 (JDK
+       1.4) API.
+     * The JDK 1.4 assert facility has been implemented.
+     * The bytecode interpreter is now direct threaded and thus faster.
+
+  Fortran
+
+     * Fortran improvements are listed in [7]the Fortran documentation.
+
+  Ada
+
+     * Ada tasking now works with glibc 2.3.x threading libraries.
+
+New Targets and Target Specific Improvements
+
+     * The following changes have been made to the HP-PA port:
+          + The port now defaults to scheduling for the PA8000 series of
+            processors.
+          + Scheduling support for the PA7300 processor has been added.
+          + The 32-bit port now supports weak symbols under HP-UX 11.
+          + The handling of initializers and finalizers has been improved
+            under HP-UX 11. The 64-bit port no longer uses collect2.
+          + Dwarf2 EH support has been added to the 32-bit GNU/Linux port.
+          + ABI fixes to correct the passing of small structures by value.
+     * The SPARC, HP-PA, SH4, and x86/pentium ports have been converted to
+       use the DFA processor pipeline description.
+     * The following NetBSD configurations for the SuperH processor family
+       have been added:
+          + SH3, big-endian, sh-*-netbsdelf*
+          + SH3, little-endian, shle-*-netbsdelf*
+          + SH5, SHmedia, big-endian, 32-bit default, sh5-*-netbsd*
+          + SH5, SHmedia, little-endian, 32-bit default, sh5le-*-netbsd*
+          + SH5, SHmedia, big-endian, 64-bit default, sh64-*-netbsd*
+          + SH5, SHmedia, little-endian, 64-bit default, sh64le-*-netbsd*
+     * The following changes have been made to the IA-32/x86-64 port:
+          + SSE2 and 3dNOW! intrinsics are now supported.
+          + Support for thread local storage has been added to the IA-32
+            and x86-64 ports.
+          + The x86-64 port has been significantly improved.
+     * The following changes have been made to the MIPS port:
+          + All configurations now accept the -mabi switch. Note that you
+            will need appropriate multilibs for this option to work
+            properly.
+          + ELF configurations will always pass an ABI flag to the
+            assembler, except when the MIPS EABI is selected.
+          + -mabi=64 no longer selects MIPS IV code.
+          + The -mcpu option, which was deprecated in 3.1 and 3.2, has
+            been removed from this release.
+          + -march now changes the core ISA level. In previous releases,
+            it would change the use of processor-specific extensions, but
+            would leave the core ISA unchanged. For example, mips64-elf
+            -march=r8000 will now generate MIPS IV code.
+          + Under most configurations, -mipsN now acts as a synonym for
+            -march.
+          + There are some new preprocessor macros to describe the -march
+            and -mtune settings. See the documentation of those options
+            for details.
+          + Support for the NEC VR-Series processors has been added. This
+            includes the 54xx, 5500, and 41xx series.
+          + Support for the Sandcraft sr71k processor has been added.
+     * The following changes have been made to the S/390 port:
+          + Support to build the Java runtime libraries has been added.
+            Java is now enabled by default on s390-*-linux* and
+            s390x-*-linux* targets.
+          + Multilib support for the s390x-*-linux* target has been added;
+            this allows to build 31-bit binaries using the -m31 option.
+          + Support for thread local storage has been added.
+          + Inline assembler code may now use the 'Q' constraint to
+            specify memory operands without index register.
+          + Various platform-specific performance improvements have been
+            implemented; in particular, the compiler now uses the BRANCH
+            ON COUNT family of instructions and makes more frequent use of
+            the TEST UNDER MASK family of instructions.
+     * The following changes have been made to the PowerPC port:
+          + Support for IBM Power4 processor added.
+          + Support for Motorola e500 SPE added.
+          + Support for AIX 5.2 added.
+          + Function and Data sections now supported on AIX.
+          + Sibcall optimizations added.
+     * The support for H8 Tiny is added to the H8/300 port with -mn.
+
+Obsolete Systems
+
+   Support for a number of older systems has been declared obsolete in GCC
+   3.3. Unless there is activity to revive them, the next release of GCC
+   will have their sources permanently removed.
+
+   All configurations of the following processor architectures have been
+   declared obsolete:
+     * Matsushita MN10200, mn10200-*-*
+     * Motorola 88000, m88k-*-*
+     * IBM ROMP, romp-*-*
+
+   Also, some individual systems have been obsoleted:
+     * Alpha
+          + Interix, alpha*-*-interix*
+          + Linux libc1, alpha*-*-linux*libc1*
+          + Linux ECOFF, alpha*-*-linux*ecoff*
+     * ARM
+          + Generic a.out, arm*-*-aout*
+          + Conix, arm*-*-conix*
+          + "Old ABI," arm*-*-oabi
+          + StrongARM/COFF, strongarm-*-coff*
+     * HPPA (PA-RISC)
+          + Generic OSF, hppa1.0-*-osf*
+          + Generic BSD, hppa1.0-*-bsd*
+          + HP/UX versions 7, 8, and 9, hppa1.[01]-*-hpux[789]*
+          + HiUX, hppa*-*-hiux*
+          + Mach Lites, hppa*-*-lites*
+     * Intel 386 family
+          + Windows NT 3.x, i?86-*-win32
+     * MC68000 family
+          + HP systems, m68000-hp-bsd* and m68k-hp-bsd*
+          + Sun systems, m68000-sun-sunos*, m68k-sun-sunos*, and
+            m68k-sun-mach*
+          + AT&T systems, m68000-att-sysv*
+          + Atari systems, m68k-atari-sysv*
+          + Motorola systems, m68k-motorola-sysv*
+          + NCR systems, m68k-ncr-sysv*
+          + Plexus systems, m68k-plexus-sysv*
+          + Commodore systems, m68k-cbm-sysv*
+          + Citicorp TTI, m68k-tti-*
+          + Unos, m68k-crds-unos*
+          + Concurrent RTU, m68k-ccur-rtu*
+          + Linux a.out, m68k-*-linux*aout*
+          + Linux libc1, m68k-*-linux*libc1*
+          + pSOS, m68k-*-psos*
+     * MIPS
+          + Generic ECOFF, mips*-*-ecoff*
+          + SINIX, mips-sni-sysv4
+          + Orion RTEMS, mips64orion-*-rtems*
+     * National Semiconductor 32000
+          + OpenBSD, ns32k-*-openbsd*
+     * POWER (aka RS/6000) and PowerPC
+          + AIX versions 1, 2, and 3, rs6000-ibm-aix[123]*
+          + Bull BOSX, rs6000-bull-bosx
+          + Generic Mach, rs6000-*-mach*
+          + Generic SysV, powerpc*-*-sysv*
+          + Linux libc1, powerpc*-*-linux*libc1*
+     * Sun SPARC
+          + Generic a.out, sparc-*-aout*, sparclet-*-aout*,
+            sparclite-*-aout*, and sparc86x-*-aout*
+          + NetBSD a.out, sparc-*-netbsd*aout*
+          + Generic BSD, sparc-*-bsd*
+          + ChorusOS, sparc-*-chorusos*
+          + Linux a.out, sparc-*-linux*aout*
+          + Linux libc1, sparc-*-linux*libc1*
+          + LynxOS, sparc-*-lynxos*
+          + Solaris on HAL hardware, sparc-hal-solaris2*
+          + SunOS versions 3 and 4, sparc-*-sunos[34]*
+     * NEC V850
+          + RTEMS, v850-*-rtems*
+     * VAX
+          + VMS, vax-*-vms*
+
+Documentation improvements
+
+Other significant improvements
+
+     * Almost all front-end dependencies in the compiler have been
+       separated out into a set of language hooks. This should make adding
+       a new front end clearer and easier.
+     * One effect of removing the separate preprocessor is a small
+       increase in the robustness of the compiler in general, and the
+       maintainability of target descriptions. Previously target-specific
+       built-in macros and others, such as __FAST_MATH__, had to be
+       handled with so-called specs that were hard to maintain. Often they
+       would fail to behave properly when conflicting options were
+       supplied on the command line, and define macros in the user's
+       namespace even when strict ISO compliance was requested.
+       Integrating the preprocessor has cleanly solved these issues.
+     * The Makefile suite now supports redirection of make install by
+       means of the variable DESTDIR.
+     __________________________________________________________________
+
+GCC 3.3
+
+   Detailed release notes for the GCC 3.3 release follow.
+
+  Bug Fixes
+
+    bootstrap failures
+
+     * [8]10140 cross compiler build failures: missing __mempcpy (DUP:
+       [9]10198,[10]10338)
+
+    Internal compiler errors (multi-platform)
+
+     * [11]3581 large string causes segmentation fault in cc1
+     * [12]4382 __builtin_{set,long}jmp with -O3 can crash the compiler
+     * [13]5533 (c++) ICE when processing std::accumulate(begin, end,
+       init, invalid_op)
+     * [14]6387 -fpic -gdwarf-2 -g1 combination gives ICE in dwarf2out
+     * [15]6412 (c++) ICE in retrieve_specialization
+     * [16]6620 (c++) partial template specialization causes an ICE
+       (segmentation fault)
+     * [17]6663 (c++) ICE with attribute aligned
+     * [18]7068 ICE with incomplete types
+     * [19]7083 (c++) ICE using -gstabs with dodgy class derivation
+     * [20]7647 (c++) ICE when data member has the name of the enclosing
+       class
+     * [21]7675 ICE in fixup_var_refs_1
+     * [22]7718 'complex' template instantiation causes ICE
+     * [23]8116 (c++) ICE in member template function
+     * [24]8358 (ada) Ada compiler accesses freed memory, crashes
+     * [25]8511 (c++) ICE: (hopefully) reproducible cc1plus segmentation
+       fault
+     * [26]8564 (c++) ICE in find_function_data, in function.c
+     * [27]8660 (c++) template overloading ICE in tsubst_expr, in cp/pt.c
+     * [28]8766 (c++) ICE after failed initialization of static template
+       variable
+     * [29]8803 ICE in instantiate_virtual_regs_1, in function.c
+     * [30]8846 (c++) ICE after diagnostic if fr_FR@euro locale is set
+     * [31]8906 (c++) ICE (Segmentation fault) when parsing nested-class
+       definition
+     * [32]9216 (c++) ICE on missing template parameter
+     * [33]9261 (c++) ICE in arg_assoc, in cp/decl2.c
+     * [34]9263 (fortran) ICE caused by invalid PARAMETER in implied DO
+       loop
+     * [35]9429 (c++) ICE in template instantiation with a pointered new
+       operator
+     * [36]9516 Internal error when using a big array
+     * [37]9600 (c++) ICE with typedefs in template class
+     * [38]9629 (c++) virtual inheritance segfault
+     * [39]9672 (c++) ICE: Error reporting routines re-entered
+     * [40]9749 (c++) ICE in write_expression on invalid function
+       prototype
+     * [41]9794 (fortran) ICE: floating point exception during constant
+       folding
+     * [42]9829 (c++) Missing colon in nested namespace usage causes ICE
+     * [43]9916 (c++) ICE with noreturn function in ?: statement
+     * [44]9936 ICE with local function and variable-length 2d array
+     * [45]10262 (c++) cc1plus crashes with large generated code
+     * [46]10278 (c++) ICE in parser for invalid code
+     * [47]10446 (c++) ICE on definition of nonexistent member function of
+       nested class in a class template
+     * [48]10451 (c++) ICE in grokdeclarator on spurious mutable
+       declaration
+     * [49]10506 (c++) ICE in build_new at cp/init.c with
+       -fkeep-inline-functions and multiple inheritance
+     * [50]10549 (c++) ICE in store_bit_field on bitfields that exceed the
+       precision of the declared type
+
+    Optimization bugs
+
+     * [51]2001 Inordinately long compile times in reload CSE regs
+     * [52]2391 Exponential compilation time explosion in combine
+     * [53]2960 Duplicate loop conditions even with -Os
+     * [54]4046 redundant conditional branch
+     * [55]6405 Loop-unrolling related performance regressions
+     * [56]6798 very long compile time with large case-statement
+     * [57]6871 const objects shouldn't be moved to .bss
+     * [58]6909 problem w/ -Os on modified loop-2c.c test case
+     * [59]7189 gcc -O2 -Wall does not print ``control reaches end of
+       non-void function'' warning
+     * [60]7642 optimization problem with signbit()
+     * [61]8634 incorrect code for inlining of memcpy under -O2
+     * [62]8750 Cygwin prolog generation erroneously emitting __alloca as
+       regular function call
+
+    C front end
+
+     * [63]2161 long if-else cascade overflows parser stack
+     * [64]4319 short accepted on typedef'd char
+     * [65]8602 incorrect line numbers in warning messages when using
+       inline functions
+     * [66]9177 -fdump-translation-unit: C front end deletes function_decl
+       AST nodes and breaks debugging dumps
+     * [67]9853 miscompilation of non-constant structure initializer
+
+    c++ compiler and library
+
+     * [68]45 legal template specialization code is rejected (DUP:
+       [69]3784)
+     * [70]764 lookup failure: friend operator and dereferencing a pointer
+       and templates (DUP: [71]5116)
+     * [72]2862 gcc accepts invalid explicit instantiation syntax (DUP:
+       2863)
+     * [73]3663 G++ doesn't check access control during template
+       instantiation
+     * [74]3797 gcc fails to emit explicit specialization of a template
+       member
+     * [75]3948 Two destructors are called when no copy destructor is
+       defined (ABI change)
+     * [76]4137 Conversion operator within template is not accepted
+     * [77]4361 bogus ambiguity taking the address of a member template
+     * [78]4802 g++ accepts illegal template code (access to private
+       member; DUP: [79]5837)
+     * [80]4803 inline function is used but never defined, and g++ does
+       not object
+     * [81]5094 Partial specialization cannot be friend?
+     * [82]5730 complex<double>::norm() -- huge slowdown from egcs-2.91.66
+     * [83]6713 Regression wrt 3.0.4: g++ -O2 leads to seg fault at run
+       time
+     * [84]7015 certain __asm__ constructs rejected
+     * [85]7086 compile time regression (quadratic behavior in
+       fixup_var_refs)
+     * [86]7099 G++ doesn't set the noreturn attribute on std::exit and
+       std::abort
+     * [87]7247 copy constructor missing when inlining enabled (invalid
+       optimization?)
+     * [88]7441 string array initialization compilation time regression
+       from seconds to minutes
+     * [89]7768 __PRETTY_FUNCTION__ for template destructor is wrong
+     * [90]7804 bad printing of floating point constant in warning message
+     * [91]8099 Friend classes and template specializations
+     * [92]8117 member function pointers and multiple inheritance
+     * [93]8205 using declaration and multiple inheritance
+     * [94]8645 unnecessary non-zero checks in stl_tree.h
+     * [95]8724 explicit destructor call for incomplete class allowed
+     * [96]8805 compile time regression with many member variables
+     * [97]8691 -O3 and -fno-implicit-templates are incompatible
+     * [98]8700 unhelpful error message for binding temp to reference
+     * [99]8724 explicit destructor call for incomplete class allowed
+     * [100]8949 numeric_limits<>::denorm_min() and is_iec559 problems
+     * [101]9016 Failure to consistently constant fold "constant" C++
+       objects
+     * [102]9053 g++ confused about ambiguity of overloaded function
+       templates
+     * [103]9152 undefined virtual thunks
+     * [104]9182 basic_filebuf<> does not report errors in codecvt<>::out
+     * [105]9297 data corruption due to codegen bug (when copying.)
+     * [106]9318 i/ostream::operator>>/<<(streambuf*) broken
+     * [107]9320 Incorrect usage of traits_type::int_type in stdio_filebuf
+     * [108]9400 bogus -Wshadow warning: shadowed declaration of this in
+       local classes
+     * [109]9424 i/ostream::operator>>/<<(streambuf*) drops characters
+     * [110]9425 filebuf::pbackfail broken (DUP: [111]9439)
+     * [112]9474 GCC freezes in compiling a weird code mixing <iostream>
+       and <iostream.h>
+     * [113]9548 Incorrect results from setf(ios::fixed) and precision(-1)
+       [114][DR 231]
+     * [115]9555 ostream inserters fail to set badbit on exception
+     * [116]9561 ostream inserters rethrow exception of wrong type
+     * [117]9563 ostream::sentry returns true after a failed preparation
+     * [118]9582 one-definition rule violation in std::allocator
+     * [119]9622 __PRETTY_FUNCTION__ incorrect in template destructors
+     * [120]9683 bug in initialization chains for static const variables
+       from template classes
+     * [121]9791 -Woverloaded-virtual reports hiding of destructor
+     * [122]9817 collate::compare doesn't handle nul characters
+     * [123]9825 filebuf::sputbackc breaks sbumpc
+     * [124]9826 operator>>(basic_istream, basic_string) fails to compile
+       with custom traits
+     * [125]9924 Multiple using statements for builtin functions not
+       allowed
+     * [126]9946 destructor is not called for temporary object
+     * [127]9964 filebuf::close() sometimes fails to close file
+     * [128]9988 filebuf::overflow writes EOF to file
+     * [129]10033 optimization breaks polymorphic references w/ typeid
+       operator
+     * [130]10097 filebuf::underflow drops characters
+     * [131]10132 filebuf destructor can throw exceptions
+     * [132]10180 gcc fails to warn about non-inlined function
+     * [133]10199 method parametrized by template does not work everywhere
+     * [134]10300 use of array-new (nothrow) in segfaults on NULL return
+     * [135]10427 Stack corruption with variable-length automatic arrays
+       and virtual destructors
+     * [136]10503 Compilation never stops in fixed_type_or_null
+
+    Objective-C
+
+     * [137]5956 selectors aren't matched properly when added to the
+       selector table
+
+    Fortran compiler and library
+
+     * [138]1832 list directed i/o overflow hangs, -fbounds-check doesn't
+       detect
+     * [139]3924 g77 generates code that is rejected by GAS if COFF debug
+       info requested
+     * [140]5634 doc: explain that configure --prefix=~/... does not work
+     * [141]6367 multiple repeat counts confuse namelist read into array
+     * [142]6491 Logical operations error on logicals when using
+       -fugly-logint
+     * [143]6742 Generation of C++ Prototype for FORTRAN and extern "C"
+     * [144]7113 Failure of g77.f-torture/execute/f90-intrinsic-bit.f -Os
+       on irix6.5
+     * [145]7236 OPEN(...,RECL=nnn,...) without ACCESS='DIRECT' should
+       assume a direct access file
+     * [146]7278 g77 "bug"; the executable misbehaves (with -O2
+       -fno-automatic)
+     * [147]7384 DATE_AND_TIME milliseconds field inactive on Windows
+     * [148]7388 Incorrect output with 0-based array of characters
+     * [149]8587 Double complex zero ** double precision number -> NaN
+       instead of zero
+     * [150]9038 -ffixed-line-length-none -x f77-cpp-input gives: Warning:
+       unknown register name line-length-none
+     * [151]10197 Direct access files not unformatted by default
+
+    Java compiler and library
+
+     * [152]6005 gcj fails to build rhug on alpha
+     * [153]6389 System.getProperty("") should always throw an
+       IllegalArgumentException
+     * [154]6576 java.util.ResourceBundle.getResource ignores locale
+     * [155]6652 new java.io.File("").getCanonicalFile() throws exception
+     * [156]7060 getMethod() doesn't search super interface
+     * [157]7073 bytecode interpreter gives wrong answer for interface
+       getSuperclass()
+     * [158]7180 possible bug in
+       javax.naming.spi.NamingManager.getPlusPath()
+     * [159]7416 java.security startup refs "GNU libgcj.security"
+     * [160]7570 Runtime.exec with null envp: child doesn't inherit parent
+       env (DUP: [161]7578)
+     * [162]7611 Internal error while compiling libjava with -O
+     * [163]7709 NullPointerException in _Jv_ResolvePoolEntry
+     * [164]7766 ZipInputStream.available returns 0 immediately after
+       construction
+     * [165]7785 Calendar.getTimeInMillis/setTimeInMillis should be public
+     * [166]7786 TimeZone.getDSTSavings() from JDK1.4 not implemented
+     * [167]8142 '$' in class names vs. dlopen 'dynamic string tokens'
+     * [168]8234 ZipInputStream chokes when InputStream.read() returns
+       small chunks
+     * [169]8415 reflection bug: exception info for Method
+     * [170]8481 java.Random.nextInt(int) may return negative
+     * [171]8593 Error reading GZIPped files with BufferedReader
+     * [172]8759 java.beans.Introspector has no flushCaches() or
+       flushFromCaches() methods
+     * [173]8997 spin() calls Thread.sleep
+     * [174]9253 on win32, java.io.File.listFiles("C:\\") returns pwd
+       instead of the root content of C:
+     * [175]9254 java::lang::Object::wait(), threads-win32.cc returns
+       wrong return codes
+     * [176]9271 Severe bias in java.security.SecureRandom
+
+    Ada compiler and library
+
+     * [177]6767 make gnatlib-shared fails on -laddr2line
+     * [178]9911 gnatmake fails to link when GCC configured with
+       --with-sjlj-exceptions=yes
+     * [179]10020 Can't bootstrap gcc on AIX with Ada enabled
+     * [180]10546 Ada tasking not working on Red Hat 9
+
+    preprocessor
+
+     * [181]7029 preprocessor should ignore #warning with -M
+
+    ARM-specific
+
+     * [182]2903 [arm] Optimization bug with long long arithmetic
+     * [183]7873 arm-linux-gcc fails when assigning address to a bit field
+
+    FreeBSD-specific
+
+     * [184]7680 float functions undefined in math.h/cmath with #define
+       _XOPEN_SOURCE
+
+    HP-UX or HP-PA-specific
+
+     * [185]8705 [HP-PA] ICE in emit_move_insn_1, in expr.c
+     * [186]9986 [HP-UX] Incorrect transformation of fputs_unlocked to
+       fputc_unlocked
+     * [187]10056 [HP-PA] ICE at -O2 when building c++ code from doxygen
+
+    m68hc11-specific
+
+     * [188]6744 Bad assembler code generated: reference to pseudo
+       register z
+     * [189]7361 Internal compiler error in reload_cse_simplify_operands,
+       in reload1.c
+
+    MIPS-specific
+
+     * [190]9496 [mips-linux] bug in optimizer?
+
+    PowerPC-specific
+
+     * [191]7067 -Os with -mcpu=powerpc optimizes for speed (?) instead of
+       space
+     * [192]8480 reload ICEs for LAPACK code on powerpc64-linux
+     * [193]8784 [AIX] Internal compiler error in simplify_gen_subreg
+     * [194]10315 [powerpc] ICE: in extract_insn, in recog.c
+
+    SPARC-specific
+
+     * [195]10267 (documentation) Wrong build instructions for
+       *-*-solaris2*
+
+    x86-specific (Intel/AMD)
+
+     * [196]7916 ICE in instantiate_virtual_register_1
+     * [197]7926 (c++) i486 instructions in header files make c++ programs
+       crash on i386
+     * [198]8555 ICE in gen_split_1231
+     * [199]8994 ICE with -O -march=pentium4
+     * [200]9426 ICE with -fssa -funroll-loops -fprofile-arcs
+     * [201]9806 ICE in inline assembly with -fPIC flag
+     * [202]10077 gcc -msse2 generates movd to move dwords between xmm
+       regs
+     * [203]10233 64-bit comparison only comparing bottom 32-bits
+     * [204]10286 type-punning doesn't work with __m64 and -O
+     * [205]10308 [x86] ICE with -O -fgcse or -O2
+     __________________________________________________________________
+
+GCC 3.3.1
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.3.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+    Bootstrap failures
+
+     * [206]11272 [Solaris] make bootstrap fails while building libstdc++
+
+    Internal compiler errors (multi-platform)
+
+     * [207]5754 ICE on invalid nested template class
+     * [208]6597 ICE in set_mem_alias_set compiling Qt with -O2 on ia64
+       and --enable-checking
+     * [209]6949 (c++) ICE in tsubst_decl, in cp/pt.c
+     * [210]7053 (c++) ICE when declaring a function already defined as a
+       friend method of a template class
+     * [211]8164 (c++) ICE when using different const expressions as
+       template parameter
+     * [212]8384 (c++) ICE in is_base_type, in dwarf2out.c
+     * [213]9559 (c++) ICE with invalid initialization of a static const
+     * [214]9649 (c++) ICE in finish_member_declaration, in cp/semantics.c
+       when redeclaring a static member variable
+     * [215]9864 (fortran) ICE in add_abstract_origin_attribute, in
+       dwarfout.c with -g -O -finline-functions
+     * [216]10432 (c++) ICE in poplevel, in cp/decl.c
+     * [217]10475 ICE in subreg_highpart_offset for code with long long
+     * [218]10635 (c++) ICE when dereferencing an incomplete type casted
+       from a void pointer
+     * [219]10661 (c++) ICE in instantiate_decl, in cp/pt.c while
+       instantiating static member variables
+     * [220]10700 ICE in copy_to_mode_reg on 64-bit targets
+     * [221]10712 (c++) ICE in constructor_name_full, in cp/decl2.c
+     * [222]10796 (c++) ICE when defining an enum with two values: -1 and
+       MAX_INT_64BIT
+     * [223]10890 ICE in merge_assigned_reloads building Linux 2.4.2x
+       sched.c
+     * [224]10939 (c++) ICE with template code
+     * [225]10956 (c++) ICE when specializing a template member function
+       of a template class, in tsubst, in cp/pt.c
+     * [226]11041 (c++) ICE: const myclass &x = *x; (when operator*()
+       defined)
+     * [227]11059 (c++) ICE with empty union
+     * [228]11083 (c++) ICE in commit_one_edge_insertion, in cfgrtl.c with
+       -O2 -fnon-call-exceptions
+     * [229]11105 (c++) ICE in mangle_conv_op_name_for_type
+     * [230]11149 (c++) ICE on error when instantiation with call function
+       of a base type
+     * [231]11228 (c++) ICE on new-expression using array operator new and
+       default-initialization
+     * [232]11282 (c++) Infinite memory usage after syntax error
+     * [233]11301 (fortran) ICE with -fno-globals
+     * [234]11308 (c++) ICE when using an enum type name as if it were a
+       class or namespace
+     * [235]11473 (c++) ICE with -gstabs when empty struct inherits from
+       an empty struct
+     * [236]11503 (c++) ICE when instantiating template with ADDR_EXPR
+     * [237]11513 (c++) ICE in push_template_decl_real, in cp/pt.c:
+       template member functions
+
+    Optimization bugs
+
+     * [238]11198 -O2 -frename-registers generates wrong code (aliasing
+       problem)
+     * [239]11304 Wrong code production with -fomit-frame-pointer
+     * [240]11381 volatile memory access optimized away
+     * [241]11536 [strength-reduce] -O2 optimization produces wrong code
+     * [242]11557 constant folding bug generates wrong code
+
+    C front end
+
+     * [243]5897 No warning for statement after return
+     * [244]11279 DWARF-2 output mishandles large enums
+
+    Preprocessor bugs
+
+     * [245]11022 no warning for non-compatible macro redefinition
+
+    C++ compiler and library
+
+     * [246]2330 static_cast<>() to a private base is allowed
+     * [247]5388 Incorrect message "operands to ?: have different types"
+     * [248]5390 Libiberty fails to demangle multi-digit template
+       parameters
+     * [249]7877 Incorrect parameter passing to specializations of member
+       function templates
+     * [250]9393 Anonymous namespaces and compiling the same file twice
+     * [251]10032 -pedantic converts some errors to warnings
+     * [252]10468 const typeof(x) is non-const, but only in templates
+     * [253]10527 confused error message with "new int()" parameter
+       initializer
+     * [254]10679 parameter MIN_INLINE_INSNS is not honored
+     * [255]10682 gcc chokes on a typedef for an enum inside a class
+       template
+     * [256]10689 pow(std::complex(0),1/3) returns (nan, nan) instead of
+       0.
+     * [257]10845 template member function (with nested template as
+       parameter) cannot be called anymore if another unrelated template
+       member function is defined
+     * [258]10849 Cannot define an out-of-class specialization of a
+       private nested template class
+     * [259]10888 Suppress -Winline warnings for system headers
+     * [260]10929 -Winline warns about functions for which no definition
+       is visible
+     * [261]10931 valid conversion static_cast<const unsigned
+       int&>(lvalue-of-type-int) is rejected
+     * [262]10940 Bad code with explicit specialization
+     * [263]10968 If member function implicitly instantiated, explicit
+       instantiation of class fails to instantiate it
+     * [264]10990 Cannot convert with dynamic_cast<> to a private base
+       class from within a member function
+     * [265]11039 Bad interaction between implicit typename deprecation
+       and friendship
+     * [266]11062 (libstdc++) avoid __attribute__ ((unused)); say
+       "__unused__" instead
+     * [267]11095 C++ iostream manipulator causes segfault when called
+       with negative argument
+     * [268]11098 g++ doesn't emit complete debugging information for
+       local variables in destructors
+     * [269]11137 GNU/Linux shared library constructors not called unless
+       there's one global object
+     * [270]11154 spurious ambiguity report for template class
+       specialization
+     * [271]11329 Compiler cannot find user defined implicit typecast
+     * [272]11332 Spurious error with casts in ?: expression
+     * [273]11431 static_cast behavior with subclasses when default
+       constructor available
+     * [274]11528 money_get facet does not accept "$.00" as valid
+     * [275]11546 Type lookup problems in out-of-line definition of a
+       class doubly nested from a template class
+     * [276]11567 C++ code containing templated member function with same
+       name as pure virtual member function results in linking failure
+     * [277]11645 Failure to deal with using and private inheritance
+
+    Java compiler and library
+
+     * [278]5179 Qualified static field access doesn't initialize its
+       class
+     * [279]8204 gcj -O2 to native reorders certain instructions
+       improperly
+     * [280]10838 java.io.ObjectInputStream syntax error
+     * [281]10886 The RMI registry that comes with GCJ does not work
+       correctly
+     * [282]11349 JNDI URL context factories not located correctly
+
+    x86-specific (Intel/AMD)
+
+     * [283]4823 ICE on inline assembly code
+     * [284]8878 miscompilation with -O and SSE
+     * [285]9815 (c++ library) atomicity.h - fails to compile with -O3
+       -masm=intel
+     * [286]10402 (inline assembly) [x86] ICE in merge_assigned_reloads,
+       in reload1.c
+     * [287]10504 ICE with SSE2 code and -O3 -mcpu=pentium4 -msse2
+     * [288]10673 ICE for x86-64 on freebsd libc vfprintf.c source
+     * [289]11044 [x86] out of range loop instructions for FP code on K6
+     * [290]11089 ICE: instantiate_virtual_regs_lossage while using SSE
+       built-ins
+     * [291]11420 [x86_64] gcc generates invalid asm code when "-O -fPIC"
+       is used
+
+    SPARC- or Solaris- specific
+
+     * [292]9362 solaris 'as' dies when fed .s and "-gstabs"
+     * [293]10142 [SPARC64] gcc produces wrong code when passing
+       structures by value
+     * [294]10663 New configure check aborts with Sun tools.
+     * [295]10835 combinatorial explosion in scheduler on HyperSPARC
+     * [296]10876 ICE in calculate_giv_inc when building KDE
+     * [297]10955 wrong code at -O3 for structure argument in context of
+       structure return
+     * [298]11018 -mcpu=ultrasparc busts tar-1.13.25
+     * [299]11556 [sparc64] ICE in gen_reg_rtx() while compiling 2.6.x
+       Linux kernel
+
+    ia64 specific
+
+     * [300]10907 gcc violates the ia64 ABI (GP must be preserved)
+     * [301]11320 scheduler bug (in machine depended reorganization pass)
+     * [302]11599 bug with conditional and __builtin_prefetch
+
+    PowerPC specific
+
+     * [303]9745 [powerpc] gcc mis-compiles libmcrypt (alias problem
+       during loop)
+     * [304]10871 error in rs6000_stack_info save_size computation
+     * [305]11440 gcc mis-compiles c++ code (libkhtml) with -O2, -fno-gcse
+       cures it
+
+    m68k-specific
+
+     * [306]7594 [m68k] ICE on legal code associated with simplify-rtx
+     * [307]10557 [m68k] ICE in subreg_offset_representable_p
+     * [308]11054 [m68k] ICE in reg_overlap_mentioned_p
+
+    ARM-specific
+
+     * [309]10834 [arm] GCC 3.3 still generates incorrect instructions for
+       functions with __attribute__ ((interrupt ("IRQ")))
+     * [310]10842 [arm] Clobbered link register is copied to pc under
+       certain circumstances
+     * [311]11052 [arm] noce_process_if_block() can lose REG_INC notes
+     * [312]11183 [arm] ICE in change_address_1 (3.3) / subreg_hard_regno
+       (3.4)
+
+    MIPS-specific
+
+     * [313]11084 ICE in propagate_one_insn, in flow.c
+
+    SH-specific
+
+     * [314]10331 can't compile c++ part of gcc cross compiler for sh-elf
+     * [315]10413 [SH] ICE in reload_cse_simplify_operands, in reload1.c
+     * [316]11096 i686-linux to sh-linux cross compiler fails to compile
+       C++ files
+
+    GNU/Linux (or Hurd?) specific
+
+     * [317]2873 Bogus fixinclude of stdio.h from glibc 2.2.3
+
+    UnixWare specific
+
+     * [318]3163 configure bug: gcc/aclocal.m4 mmap test fails on UnixWare
+       7.1.1
+
+    Cygwin (or mingw) specific
+
+     * [319]5287 ICE with dllimport attribute
+     * [320]10148 [MingW/CygWin] Compiler dumps core
+
+    DJGPP specific
+
+     * [321]8787 GCC fails to emit .intel_syntax when invoked with
+       -masm=intel on DJGPP
+
+    Darwin (and MacOS X) specific
+
+     * [322]10900 trampolines crash
+
+    Documentation
+
+     * [323]1607 (c++) Format attributes on methods undocumented
+     * [324]4252 Invalid option `-fdump-translation-unit'
+     * [325]4490 Clarify restrictions on -m96bit-long-double,
+       -m128bit-long-double
+     * [326]10355 document an issue with regparm attribute on some systems
+       (e.g. Solaris)
+     * [327]10726 (fortran) Documentation for function "IDate Intrinsic
+       (Unix)" is wrong
+     * [328]10805 document bug in old version of Sun assembler
+     * [329]10815 warn against GNU binutils on AIX
+     * [330]10877 document need for newer binutils on i?86-*-linux-gnu
+     * [331]11280 Manual incorrect with respect to -freorder-blocks
+     * [332]11466 Document -mlittle-endian and its restrictions for the
+       sparc64 port
+
+    Testsuite bugs (compiler itself is not affected)
+
+     * [333]10737 newer bison causes g++.dg/parse/crash2.C to incorrectly
+       report failure
+     * [334]10810 gcc-3.3 fails make check: buffer overrun in
+       test_demangle.c
+     __________________________________________________________________
+
+GCC 3.3.2
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracker
+   that are known to be fixed in the 3.3.2 release. This list might not be
+   complete (that is, it is possible that some PRs that have been fixed
+   are not listed here).
+
+    Bootstrap failures and problems
+
+     * [335]8336 [SCO5] bootstrap config still tries to use COFF options
+     * [336]9330 [alpha-osf] Bootstrap failure on Compaq Tru64 with
+       --enable-threads=posix
+     * [337]9631 [hppa64-linux] gcc-3.3 fails to bootstrap
+     * [338]9877 fixincludes makes a bad sys/byteorder.h on svr5 (UnixWare
+       7.1.1)
+     * [339]11687 xstormy16-elf build fails in libf2c
+     * [340]12263 [SGI IRIX] bootstrap fails during compile of
+       libf2c/libI77/backspace.c
+     * [341]12490 buffer overflow in scan-decls.c (during Solaris 9
+       fix-header processing)
+
+    Internal compiler errors (multi-platform)
+
+     * [342]7277 Casting integers to vector types causes ICE
+     * [343]7939 (c++) ICE on invalid function template specialization
+     * [344]11063 (c++) ICE on parsing initialization list of const array
+       member
+     * [345]11207 ICE with negative index in array element designator
+     * [346]11522 (fortran) g77 dwarf-2 ICE in
+       add_abstract_origin_attribute
+     * [347]11595 (c++) ICE on duplicate label definition
+     * [348]11646 (c++) ICE in commit_one_edge_insertion with
+       -fnon-call-exceptions -fgcse -O
+     * [349]11665 ICE in struct initializer when taking address
+     * [350]11852 (c++) ICE with bad struct initializer.
+     * [351]11878 (c++) ICE in cp_expr_size
+     * [352]11883 ICE with any -O on mercury-generated C code
+     * [353]11991 (c++) ICE in cxx_incomplete_type_diagnostic, in
+       cp/typeck2.c when applying typeid operator to template template
+       parameter
+     * [354]12146 ICE in lookup_template_function, in cp/pt.c
+     * [355]12215 ICE in make_label_edge with -fnon-call-exceptions
+       -fno-gcse -O2
+     * [356]12369 (c++) ICE with templates and friends
+     * [357]12446 ICE in emit_move_insn on complicated array reference
+     * [358]12510 ICE in final_scan_insn
+     * [359]12544 ICE with large parameters used in nested functions
+
+    C and optimization bugs
+
+     * [360]9862 spurious warnings with -W -finline-functions
+     * [361]10962 lookup_field is a linear search on a linked list (can be
+       slow if large struct)
+     * [362]11370 -Wunreachable-code gives false complaints
+     * [363]11637 invalid assembly with -fnon-call-exceptions
+     * [364]11885 Problem with bitfields in packed structs
+     * [365]12082 Inappropriate unreachable code warnings
+     * [366]12180 Inline optimization fails for variadic function
+     * [367]12340 loop unroller + gcse produces wrong code
+
+    C++ compiler and library
+
+     * [368]3907 nested template parameter collides with member name
+     * [369]5293 confusing message when binding a temporary to a reference
+     * [370]5296 [DR115] Pointers to functions and to template functions
+       behave differently in deduction
+     * [371]7939 ICE on function template specialization
+     * [372]8656 Unable to assign function with __attribute__ and pointer
+       return type to an appropriate variable
+     * [373]10147 Confusing error message for invalid template function
+       argument
+     * [374]11400 std::search_n() makes assumptions about Size parameter
+     * [375]11409 issues with using declarations, overloading, and
+       built-in functions
+     * [376]11740 ctype<wchar_t>::do_is(mask, wchar_t) doesn't handle
+       multiple bits in mask
+     * [377]11786 operator() call on variable in other namespace not
+       recognized
+     * [378]11867 static_cast ignores ambiguity
+     * [379]11928 bug with conversion operators that are typedefs
+     * [380]12114 Uninitialized memory accessed in dtor
+     * [381]12163 static_cast + explicit constructor regression
+     * [382]12181 Wrong code with comma operator and c++
+     * [383]12236 regparm and fastcall messes up parameters
+     * [384]12266 incorrect instantiation of unneeded template during
+       overload resolution
+     * [385]12296 istream::peek() doesn't set eofbit
+     * [386]12298 [sjlj exceptions] Stack unwind destroys
+       not-yet-constructed object
+     * [387]12369 ICE with templates and friends
+     * [388]12337 apparently infinite loop in g++
+     * [389]12344 stdcall attribute ignored if function returns a pointer
+     * [390]12451 missing(late) class forward declaration in cxxabi.h
+     * [391]12486 g++ accepts invalid use of a qualified name
+
+    x86 specific (Intel/AMD)
+
+     * [392]8869 [x86 MMX] ICE with const variable optimization and MMX
+       builtins
+     * [393]9786 ICE in fixup_abnormal_edges with -fnon-call-exceptions
+       -O2
+     * [394]11689 g++3.3 emits un-assembleable code for k6 architecture
+     * [395]12116 [k6] Invalid assembly output values with X-MAME code
+     * [396]12070 ICE converting between double and long double with
+       -msoft-float
+
+    ia64-specific
+
+     * [397]11184 [ia64 hpux] ICE on __builtin_apply building libobjc
+     * [398]11535 __builtin_return_address may not work on ia64
+     * [399]11693 [ia64] ICE in gen_nop_type
+     * [400]12224 [ia64] Thread-local storage doesn't work
+
+    PowerPC-specific
+
+     * [401]11087 [powerpc64-linux] GCC miscompiles raid1.c from linux
+       kernel
+     * [402]11319 loop miscompiled on ppc32
+     * [403]11949 ICE Compiler segfault with ffmpeg -maltivec code
+
+    SPARC-specific
+
+     * [404]11662 wrong code for expr. with cast to long long and
+       exclusive or
+     * [405]11965 invalid assembler code for a shift < 32 operation
+     * [406]12301 (c++) stack corruption when a returned expression throws
+       an exception
+
+    Alpha-specific
+
+     * [407]11717 [alpha-linux] unrecognizable insn compiling for.c of
+       kernel 2.4.22-pre8
+
+    HPUX-specific
+
+     * [408]11313 problem with #pragma weak and static inline functions
+     * [409]11712 __STDC_EXT__ not defined for C++ by default anymore?
+
+    Solaris specific
+
+     * [410]12166 Profiled programs crash if PROFDIR is set
+
+    Solaris-x86 specific
+
+     * [411]12101 i386 Solaris no longer works with GNU as?
+
+    Miscellaneous embedded target-specific bugs
+
+     * [412]10988 [m32r-elf] wrong blockmove code with -O3
+     * [413]11805 [h8300-unknown-coff] [H8300] ICE for simple code with
+       -O2
+     * [414]11902 [sh4] spec file improperly inserts rpath even when none
+       needed
+     * [415]11903 [sh4] -pthread fails to link due to error in spec file
+       on sh4
+     __________________________________________________________________
+
+GCC 3.3.3
+
+  Minor features
+
+   In addition to the bug fixes documented below, this release contains
+   few minor features such as:
+     * Support for --with-sysroot
+     * Support for automatic detection of executable stacks
+     * Support for SSE3 instructions
+     * Support for thread local storage debugging under GDB on S390
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracker
+   that are known to be fixed in the 3.3.3 release. This list might not be
+   complete (that is, it is possible that some PRs that have been fixed
+   are not listed here).
+
+    Bootstrap failures and issues
+
+     * [416]11890 Building cross gcc-3.3.1 for sparc-sun-solaris2.6 fails
+     * [417]12399 boehm-gc fails (when building a cross compiler): libtool
+       unable to infer tagged configuration
+     * [418]13068 mklibgcc.in doesn't handle multi-level multilib
+       subdirectories properly
+
+    Internal compiler errors (multi-platform)
+
+     * [419]10060 ICE (stack overflow) on huge file (300k lines) due to
+       recursive behaviour of copy_rtx_if_shared, in emit_rtl.c
+     * [420]10555 (c++) ICE on undefined template argument
+     * [421]10706 (c++) ICE in mangle_class_name_for_template
+     * [422]11496 (fortran) error in flow_loops_find when -funroll-loops
+       active
+     * [423]11741 ICE in pre_insert_copy_insn, in gcse.c
+     * [424]12440 GCC crashes during compilation of quicktime4linux 2.0.0
+     * [425]12632 (fortran) -fbounds-check ICE
+     * [426]12712 (c++) ICE on short legit C++ code fragment with gcc
+       3.3.2
+     * [427]12726 (c++) ICE (segfault) on trivial code
+     * [428]12890 (c++) ICE on compilation of class with throwing method
+     * [429]12900 (c++) ICE in rtl_verify_flow_info_1
+     * [430]13060 (fortran) ICE in fixup_var_refs_1, in function.c on
+       correct code with -O2 -fno-force-mem
+     * [431]13289 (c++) ICE in regenerate_decl_from_template on recursive
+       template
+     * [432]13318 ICE: floating point exception in the loop optimizer
+     * [433]13392 (c++) ICE in convert_from_eh_region_ranges_1, in
+       except.c
+     * [434]13574 (c++) invalid array default initializer in class lets
+       gcc consume all memory and die
+     * [435]13475 ICE on SIMD variables with partial value initialization
+     * [436]13797 (c++) ICE on invalid template parameter
+     * [437]13824 (java) gcj SEGV with simple .java program
+
+    C and optimization bugs
+
+     * [438]8776 loop invariants are not removed (most likely)
+     * [439]10339 [sparc,ppc,ppc64] Invalid optimization: replacing
+       strncmp by memcmp
+     * [440]11350 undefined labels with -Os -fPIC
+     * [441]12826 Optimizer removes reference through volatile pointer
+     * [442]12500 stabs debug info: void no longer a predefined / builtin
+       type
+     * [443]12941 builtin-bitops-1.c miscompilation (latent bug)
+     * [444]12953 tree inliner bug (in inline_forbidden_p) and fix
+     * [445]13041 linux-2.6/sound/core/oss/rate.c miscompiled
+     * [446]13507 spurious printf format warning
+     * [447]13382 Type information for const pointer disappears during
+       optimization.
+     * [448]13394 noreturn attribute ignored on recursive invokation
+     * [449]13400 Compiled code crashes storing to read-only location
+     * [450]13521 Endless loop in calculate_global_regs_live
+
+    C++ compiler and library
+
+   Some of the bug fixes in this list were made to implement decisions
+   that the ISO C++ standards committee has made concerning several defect
+   reports (DRs). Links in the list below point to detailed discussion of
+   the relevant defect report.
+     * [451]2094 unimplemented: use of `ptrmem_cst' in template type
+       unification
+     * [452]2294 using declaration confusion
+     * [453]5050 template instantiation depth exceeds limit: recursion
+       problem?
+     * [454]9371 Bad exception handling in
+       i/ostream::operator>>/<<(streambuf*)
+     * [455]9546 bad exception handling in ostream members
+     * [456]10081 basic_ios::_M_cache_locale leaves NULL members in the
+       face of unknown locales
+     * [457]10093 [458][DR 61] Setting failbit in exceptions doesn't work
+     * [459]10095 istream::operator>>(int&) sets ios::badbit when
+       ios::failbit is set.
+     * [460]11554 Warning about reordering of initializers doesn't mention
+       location of constructor
+     * [461]12297 istream::sentry::sentry() handles eof() incorrectly.
+     * [462]12352 Exception safety problems in src/localename.cc
+     * [463]12438 Memory leak in locale::combine()
+     * [464]12540 Memory leak in locale::locale(const char*)
+     * [465]12594 DRs [466]60 [TC] and [467]63 [TC] not implemented
+     * [468]12657 Resolution of [469]DR 292 (WP) still unimplemented
+     * [470]12696 memory eating infinite loop in diagnostics (error
+       recovery problem)
+     * [471]12815 Code compiled with optimization behaves unexpectedly
+     * [472]12862 Conflicts between typedefs/enums and namespace member
+       declarations
+     * [473]12926 Wrong value after assignment in initialize list using
+       bit-fields
+     * [474]12967 Resolution of [475]DR 300 [WP] still unimplemented
+     * [476]12971 Resolution of [477]DR 328 [WP] still unimplemented
+     * [478]13007 basic_streambuf::pubimbue, imbue wrong
+     * [479]13009 Implicitly-defined assignment operator writes to wrong
+       memory
+     * [480]13057 regparm attribute not applied to destructor
+     * [481]13070 -Wformat option ignored in g++
+     * [482]13081 forward template declarations in <complex> let inlining
+       fail
+     * [483]13239 Assertion does not seem to work correctly anymore
+     * [484]13262 "xxx is private within this context" when initializing a
+       self-contained template class
+     * [485]13290 simple typo in concept checking for std::generate_n
+     * [486]13323 Template code does not compile in presence of typedef
+     * [487]13369 __verify_grouping (and __add_grouping?) not correct
+     * [488]13371 infinite loop with packed struct and inlining
+     * [489]13445 Template argument replacement "dereferences" a typedef
+     * [490]13461 Fails to access protected-ctor from public constant
+     * [491]13462 Non-standard-conforming type set::pointer
+     * [492]13478 gcc uses wrong constructor to initialize a const
+       reference
+     * [493]13544 "conflicting types" for enums in different scopes
+     * [494]13650 string::compare should not (always) use
+       traits_type::length()
+     * [495]13683 bogus warning about passing non-PODs through ellipsis
+     * [496]13688 Derived class is denied access to protected base class
+       member class
+     * [497]13774 Member variable cleared in virtual multiple inheritance
+       class
+     * [498]13884 Protect sstream.tcc from extern template use
+
+    Java compiler and library
+
+     * [499]10746 [win32] garbage collection crash in GCJ
+
+    Objective-C compiler and library
+
+     * [500]11433 Crash due to dereferencing null pointer when querying
+       protocol
+
+    Fortran compiler and library
+
+     * [501]12633 logical expression gives incorrect result with
+       -fugly-logint option
+     * [502]13037 [gcse-lm] g77 generates incorrect code
+     * [503]13213 Hex constant problem when compiling with -fugly-logint
+       and -ftypeless-boz
+
+    x86-specific (Intel/AMD)
+
+     * [504]4490 ICE with -m128bit-long-double
+     * [505]12292 [x86_64] ICE: RTL check: expected code `const_int', have
+       `reg' in make_field_assignment, in combine.c
+     * [506]12441 ICE: can't find a register to spill
+     * [507]12943 array static-init failure under -fpic, -fPIC
+     * [508]13608 Incorrect code with -O3 -ffast-math
+
+    PowerPC-specific
+
+     * [509]11598 testcase gcc.dg/20020118-1.c fails runtime check of
+       __attribute__((aligned(16)))
+     * [510]11793 ICE in extract_insn, in recog.c (const_vector's)
+     * [511]12467 vmsumubm emitted when vmsummbm appropriate (typo in
+       altivec.md)
+     * [512]12537 g++ generates writeable text sections
+
+    SPARC-specific
+
+     * [513]12496 wrong result for __atomic_add(&value, -1) when using -O0
+       -m64
+     * [514]12865 mprotect call to make trampoline executable may fail
+     * [515]13354 ICE in sparc_emit_set_const32
+
+    ARM-specific
+
+     * [516]10467 [arm] ICE in pre_insert_copy_insn,
+
+    ia64-specific
+
+     * [517]11226 ICE passing struct arg with two floats
+     * [518]11227 ICE for _Complex float, _Complex long double args
+     * [519]12644 GCC 3.3.2 fails to compile glibc on ia64
+     * [520]13149 build gcc-3.3.2 1305 error:unrecognizable insn
+     * Various fixes for libunwind
+
+    Alpha-specific
+
+     * [521]12654 Incorrect comparison code generated for Alpha
+     * [522]12965 SEGV+ICE in cc1plus on alpha-linux with -O2
+     * [523]13031 ICE (unrecognizable insn) when building gnome-libs-1.4.2
+
+    HPPA-specific
+
+     * [524]11634 [hppa] ICE in verify_local_live_at_start, in flow.c
+     * [525]12158 [hppa] compilation does not terminate at -O1
+
+    S390-specific
+
+     * [526]11992 Wrong built-in code for memcmp with length 1<<24: only
+       (1<<24)-1 possible for CLCL-Instruction
+
+    SH-specific
+
+     * [527]9365 segfault in gen_far_branch (config/sh/sh.c)
+     * [528]10392 optimizer generates faulty array indexing
+     * [529]11322 SH profiler outputs multiple definitions of symbol
+     * [530]13069 gcc/config/sh/rtems.h broken
+     * [531]13302 Putting a va_list in a struct causes seg fault
+     * [532]13585 Incorrect optimization of call to sfunc
+     * Fix inappropriately exported libgcc functions from the shared
+       library
+
+    Other embedded target specific
+
+     * [533]8916 [mcore] unsigned char assign gets hosed.
+     * [534]11576 [h8300] ICE in change_address_1, in emit-rtl.c
+     * [535]13122 [h8300] local variable gets corrupted by function call
+       when -fomit-frame-pointer is given
+     * [536]13256 [cris] strict_low_part mistreated in delay slots
+     * [537]13373 [mcore] optimization with -frerun-cse-after-loop
+       -fexpensive-optimizations produces wrong code on mcore
+
+    GNU HURD-specific
+
+     * [538]12561 gcc/config/t-gnu needs updating to work with
+       --with-sysroot
+
+    Tru64 Unix specific
+
+     * [539]6243 testsuite fails almost all tests due to no libintl in
+       LD_LIBRARY_PATH during test.
+     * [540]11397 weak aliases broken on Tru64 UNIX
+
+    AIX-specific
+
+     * [541]12505 build failure due to defines of uchar in cpphash.h and
+       sys/types.h
+     * [542]13150 WEAK symbols not exported by collect2
+
+    IRIX-specific
+
+     * [543]12666 fixincludes problem on IRIX 6.5.19m
+
+    Solaris-specific
+
+     * [544]12969 Including sys/byteorder.h breaks configure checks
+
+    Testsuite problems (compiler is not affected)
+
+     * [545]10819 testsuite creates CR+LF on compiler version lines in
+       test summary files
+     * [546]11612 abi_check not finding correct libgcc_s.so.1
+
+    Miscellaneous
+
+     * [547]13211 using -###, incorrect warnings about unused linker file
+       are produced
+     __________________________________________________________________
+
+GCC 3.3.4
+
+   This is the [548]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.3.4 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+     __________________________________________________________________
+
+GCC 3.3.5
+
+   This is the [549]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.3.5 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+     __________________________________________________________________
+
+GCC 3.3.6
+
+   This is the [550]list of problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.3.6 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here).
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [551]GCC manuals. If that fails, the
+    [552]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [553]gcc@gcc.gnu.org. All of [554]our lists have public
+    archives.
+
+   Copyright (C) [555]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [556]maintained by the GCC team. Last modified
+   2014-06-28[557].
+
+References
+
+   1. http://gcc.gnu.org/gcc-3.3/changes.html#3.3.6
+   2. http://gcc.gnu.org/gcc-3.1/changes.html#obsolete_systems
+   3. http://gcc.gnu.org/gcc-3.3/changes.html#obsolete_systems
+   4. http://gcc.gnu.org/gcc-3.3/changes.html#nonnull_attribute
+   5. http://gcc.gnu.org/news/dfa.html
+   6. http://gcc.gnu.org/c99status.html
+   7. https://gcc.gnu.org/onlinedocs/gcc-3.3.6/g77/News.html
+   8. https://gcc.gnu.org/PR10140
+   9. https://gcc.gnu.org/PR10198
+  10. https://gcc.gnu.org/PR10338
+  11. https://gcc.gnu.org/PR3581
+  12. https://gcc.gnu.org/PR4382
+  13. https://gcc.gnu.org/PR5533
+  14. https://gcc.gnu.org/PR6387
+  15. https://gcc.gnu.org/PR6412
+  16. https://gcc.gnu.org/PR6620
+  17. https://gcc.gnu.org/PR6663
+  18. https://gcc.gnu.org/PR7068
+  19. https://gcc.gnu.org/PR7083
+  20. https://gcc.gnu.org/PR7647
+  21. https://gcc.gnu.org/PR7675
+  22. https://gcc.gnu.org/PR7718
+  23. https://gcc.gnu.org/PR8116
+  24. https://gcc.gnu.org/PR8358
+  25. https://gcc.gnu.org/PR8511
+  26. https://gcc.gnu.org/PR8564
+  27. https://gcc.gnu.org/PR8660
+  28. https://gcc.gnu.org/PR8766
+  29. https://gcc.gnu.org/PR8803
+  30. https://gcc.gnu.org/PR8846
+  31. https://gcc.gnu.org/PR8906
+  32. https://gcc.gnu.org/PR9216
+  33. https://gcc.gnu.org/PR9261
+  34. https://gcc.gnu.org/PR9263
+  35. https://gcc.gnu.org/PR9429
+  36. https://gcc.gnu.org/PR9516
+  37. https://gcc.gnu.org/PR9600
+  38. https://gcc.gnu.org/PR9629
+  39. https://gcc.gnu.org/PR9672
+  40. https://gcc.gnu.org/PR9749
+  41. https://gcc.gnu.org/PR9794
+  42. https://gcc.gnu.org/PR9829
+  43. https://gcc.gnu.org/PR9916
+  44. https://gcc.gnu.org/PR9936
+  45. https://gcc.gnu.org/PR10262
+  46. https://gcc.gnu.org/PR10278
+  47. https://gcc.gnu.org/PR10446
+  48. https://gcc.gnu.org/PR10451
+  49. https://gcc.gnu.org/PR10506
+  50. https://gcc.gnu.org/PR10549
+  51. https://gcc.gnu.org/PR2001
+  52. https://gcc.gnu.org/PR2391
+  53. https://gcc.gnu.org/PR2960
+  54. https://gcc.gnu.org/PR4046
+  55. https://gcc.gnu.org/PR6405
+  56. https://gcc.gnu.org/PR6798
+  57. https://gcc.gnu.org/PR6871
+  58. https://gcc.gnu.org/PR6909
+  59. https://gcc.gnu.org/PR7189
+  60. https://gcc.gnu.org/PR7642
+  61. https://gcc.gnu.org/PR8634
+  62. https://gcc.gnu.org/PR8750
+  63. https://gcc.gnu.org/PR2161
+  64. https://gcc.gnu.org/PR4319
+  65. https://gcc.gnu.org/PR8602
+  66. https://gcc.gnu.org/PR9177
+  67. https://gcc.gnu.org/PR9853
+  68. https://gcc.gnu.org/PR45
+  69. https://gcc.gnu.org/PR3784
+  70. https://gcc.gnu.org/PR764
+  71. https://gcc.gnu.org/PR5116
+  72. https://gcc.gnu.org/PR2862
+  73. https://gcc.gnu.org/PR3663
+  74. https://gcc.gnu.org/PR3797
+  75. https://gcc.gnu.org/PR3948
+  76. https://gcc.gnu.org/PR4137
+  77. https://gcc.gnu.org/PR4361
+  78. https://gcc.gnu.org/PR4802
+  79. https://gcc.gnu.org/PR5837
+  80. https://gcc.gnu.org/PR4803
+  81. https://gcc.gnu.org/PR5094
+  82. https://gcc.gnu.org/PR5730
+  83. https://gcc.gnu.org/PR6713
+  84. https://gcc.gnu.org/PR7015
+  85. https://gcc.gnu.org/PR7086
+  86. https://gcc.gnu.org/PR7099
+  87. https://gcc.gnu.org/PR7247
+  88. https://gcc.gnu.org/PR7441
+  89. https://gcc.gnu.org/PR7768
+  90. https://gcc.gnu.org/PR7804
+  91. https://gcc.gnu.org/PR8099
+  92. https://gcc.gnu.org/PR8117
+  93. https://gcc.gnu.org/PR8205
+  94. https://gcc.gnu.org/PR8645
+  95. https://gcc.gnu.org/PR8724
+  96. https://gcc.gnu.org/PR8805
+  97. https://gcc.gnu.org/PR8691
+  98. https://gcc.gnu.org/PR8700
+  99. https://gcc.gnu.org/PR8724
+ 100. https://gcc.gnu.org/PR8949
+ 101. https://gcc.gnu.org/PR9016
+ 102. https://gcc.gnu.org/PR9053
+ 103. https://gcc.gnu.org/PR9152
+ 104. https://gcc.gnu.org/PR9182
+ 105. https://gcc.gnu.org/PR9297
+ 106. https://gcc.gnu.org/PR9318
+ 107. https://gcc.gnu.org/PR9320
+ 108. https://gcc.gnu.org/PR9400
+ 109. https://gcc.gnu.org/PR9424
+ 110. https://gcc.gnu.org/PR9425
+ 111. https://gcc.gnu.org/PR9439
+ 112. https://gcc.gnu.org/PR9474
+ 113. https://gcc.gnu.org/PR9548
+ 114. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#231
+ 115. https://gcc.gnu.org/PR9555
+ 116. https://gcc.gnu.org/PR9561
+ 117. https://gcc.gnu.org/PR9563
+ 118. https://gcc.gnu.org/PR9582
+ 119. https://gcc.gnu.org/PR9622
+ 120. https://gcc.gnu.org/PR9683
+ 121. https://gcc.gnu.org/PR9791
+ 122. https://gcc.gnu.org/PR9817
+ 123. https://gcc.gnu.org/PR9825
+ 124. https://gcc.gnu.org/PR9826
+ 125. https://gcc.gnu.org/PR9924
+ 126. https://gcc.gnu.org/PR9946
+ 127. https://gcc.gnu.org/PR9964
+ 128. https://gcc.gnu.org/PR9988
+ 129. https://gcc.gnu.org/PR10033
+ 130. https://gcc.gnu.org/PR10097
+ 131. https://gcc.gnu.org/PR10132
+ 132. https://gcc.gnu.org/PR10180
+ 133. https://gcc.gnu.org/PR10199
+ 134. https://gcc.gnu.org/PR10300
+ 135. https://gcc.gnu.org/PR10427
+ 136. https://gcc.gnu.org/PR10503
+ 137. https://gcc.gnu.org/PR5956
+ 138. https://gcc.gnu.org/PR1832
+ 139. https://gcc.gnu.org/PR3924
+ 140. https://gcc.gnu.org/PR5634
+ 141. https://gcc.gnu.org/PR6367
+ 142. https://gcc.gnu.org/PR6491
+ 143. https://gcc.gnu.org/PR6742
+ 144. https://gcc.gnu.org/PR7113
+ 145. https://gcc.gnu.org/PR7236
+ 146. https://gcc.gnu.org/PR7278
+ 147. https://gcc.gnu.org/PR7384
+ 148. https://gcc.gnu.org/PR7388
+ 149. https://gcc.gnu.org/PR8587
+ 150. https://gcc.gnu.org/PR9038
+ 151. https://gcc.gnu.org/PR10197
+ 152. https://gcc.gnu.org/PR6005
+ 153. https://gcc.gnu.org/PR6389
+ 154. https://gcc.gnu.org/PR6576
+ 155. https://gcc.gnu.org/PR6652
+ 156. https://gcc.gnu.org/PR7060
+ 157. https://gcc.gnu.org/PR7073
+ 158. https://gcc.gnu.org/PR7180
+ 159. https://gcc.gnu.org/PR7416
+ 160. https://gcc.gnu.org/PR7570
+ 161. https://gcc.gnu.org/PR7578
+ 162. https://gcc.gnu.org/PR7611
+ 163. https://gcc.gnu.org/PR7709
+ 164. https://gcc.gnu.org/PR7766
+ 165. https://gcc.gnu.org/PR7785
+ 166. https://gcc.gnu.org/PR7786
+ 167. https://gcc.gnu.org/PR8142
+ 168. https://gcc.gnu.org/PR8234
+ 169. https://gcc.gnu.org/PR8415
+ 170. https://gcc.gnu.org/PR8481
+ 171. https://gcc.gnu.org/PR8593
+ 172. https://gcc.gnu.org/PR8759
+ 173. https://gcc.gnu.org/PR8997
+ 174. https://gcc.gnu.org/PR9253
+ 175. https://gcc.gnu.org/PR9254
+ 176. https://gcc.gnu.org/PR9271
+ 177. https://gcc.gnu.org/PR6767
+ 178. https://gcc.gnu.org/PR9911
+ 179. https://gcc.gnu.org/PR10020
+ 180. https://gcc.gnu.org/PR10546
+ 181. https://gcc.gnu.org/PR7029
+ 182. https://gcc.gnu.org/PR2903
+ 183. https://gcc.gnu.org/PR7873
+ 184. https://gcc.gnu.org/PR7680
+ 185. https://gcc.gnu.org/PR8705
+ 186. https://gcc.gnu.org/PR9986
+ 187. https://gcc.gnu.org/PR10056
+ 188. https://gcc.gnu.org/PR6744
+ 189. https://gcc.gnu.org/PR7361
+ 190. https://gcc.gnu.org/PR9496
+ 191. https://gcc.gnu.org/PR7067
+ 192. https://gcc.gnu.org/PR8480
+ 193. https://gcc.gnu.org/PR8784
+ 194. https://gcc.gnu.org/PR10315
+ 195. https://gcc.gnu.org/PR10267
+ 196. https://gcc.gnu.org/PR7916
+ 197. https://gcc.gnu.org/PR7926
+ 198. https://gcc.gnu.org/PR8555
+ 199. https://gcc.gnu.org/PR8994
+ 200. https://gcc.gnu.org/PR9426
+ 201. https://gcc.gnu.org/PR9806
+ 202. https://gcc.gnu.org/PR10077
+ 203. https://gcc.gnu.org/PR10233
+ 204. https://gcc.gnu.org/PR10286
+ 205. https://gcc.gnu.org/PR10308
+ 206. https://gcc.gnu.org/PR11272
+ 207. https://gcc.gnu.org/PR5754
+ 208. https://gcc.gnu.org/PR6597
+ 209. https://gcc.gnu.org/PR6949
+ 210. https://gcc.gnu.org/PR7053
+ 211. https://gcc.gnu.org/PR8164
+ 212. https://gcc.gnu.org/PR8384
+ 213. https://gcc.gnu.org/PR9559
+ 214. https://gcc.gnu.org/PR9649
+ 215. https://gcc.gnu.org/PR9864
+ 216. https://gcc.gnu.org/PR10432
+ 217. https://gcc.gnu.org/PR10475
+ 218. https://gcc.gnu.org/PR10635
+ 219. https://gcc.gnu.org/PR10661
+ 220. https://gcc.gnu.org/PR10700
+ 221. https://gcc.gnu.org/PR10712
+ 222. https://gcc.gnu.org/PR10796
+ 223. https://gcc.gnu.org/PR10890
+ 224. https://gcc.gnu.org/PR10939
+ 225. https://gcc.gnu.org/PR10956
+ 226. https://gcc.gnu.org/PR11041
+ 227. https://gcc.gnu.org/PR11059
+ 228. https://gcc.gnu.org/PR11083
+ 229. https://gcc.gnu.org/PR11105
+ 230. https://gcc.gnu.org/PR11149
+ 231. https://gcc.gnu.org/PR11228
+ 232. https://gcc.gnu.org/PR11282
+ 233. https://gcc.gnu.org/PR11301
+ 234. https://gcc.gnu.org/PR11308
+ 235. https://gcc.gnu.org/PR11473
+ 236. https://gcc.gnu.org/PR11503
+ 237. https://gcc.gnu.org/PR11513
+ 238. https://gcc.gnu.org/PR11198
+ 239. https://gcc.gnu.org/PR11304
+ 240. https://gcc.gnu.org/PR11381
+ 241. https://gcc.gnu.org/PR11536
+ 242. https://gcc.gnu.org/PR11557
+ 243. https://gcc.gnu.org/PR5897
+ 244. https://gcc.gnu.org/PR11279
+ 245. https://gcc.gnu.org/PR11022
+ 246. https://gcc.gnu.org/PR2330
+ 247. https://gcc.gnu.org/PR5388
+ 248. https://gcc.gnu.org/PR5390
+ 249. https://gcc.gnu.org/PR7877
+ 250. https://gcc.gnu.org/PR9393
+ 251. https://gcc.gnu.org/PR10032
+ 252. https://gcc.gnu.org/PR10468
+ 253. https://gcc.gnu.org/PR10527
+ 254. https://gcc.gnu.org/PR10679
+ 255. https://gcc.gnu.org/PR10682
+ 256. https://gcc.gnu.org/PR10689
+ 257. https://gcc.gnu.org/PR10845
+ 258. https://gcc.gnu.org/PR10849
+ 259. https://gcc.gnu.org/PR10888
+ 260. https://gcc.gnu.org/PR10929
+ 261. https://gcc.gnu.org/PR10931
+ 262. https://gcc.gnu.org/PR10940
+ 263. https://gcc.gnu.org/PR10968
+ 264. https://gcc.gnu.org/PR10990
+ 265. https://gcc.gnu.org/PR11039
+ 266. https://gcc.gnu.org/PR11062
+ 267. https://gcc.gnu.org/PR11095
+ 268. https://gcc.gnu.org/PR11098
+ 269. https://gcc.gnu.org/PR11137
+ 270. https://gcc.gnu.org/PR11154
+ 271. https://gcc.gnu.org/PR11329
+ 272. https://gcc.gnu.org/PR11332
+ 273. https://gcc.gnu.org/PR11431
+ 274. https://gcc.gnu.org/PR11528
+ 275. https://gcc.gnu.org/PR11546
+ 276. https://gcc.gnu.org/PR11567
+ 277. https://gcc.gnu.org/PR11645
+ 278. https://gcc.gnu.org/PR5179
+ 279. https://gcc.gnu.org/PR8204
+ 280. https://gcc.gnu.org/PR10838
+ 281. https://gcc.gnu.org/PR10886
+ 282. https://gcc.gnu.org/PR11349
+ 283. https://gcc.gnu.org/PR4823
+ 284. https://gcc.gnu.org/PR8878
+ 285. https://gcc.gnu.org/PR9815
+ 286. https://gcc.gnu.org/PR10402
+ 287. https://gcc.gnu.org/PR10504
+ 288. https://gcc.gnu.org/PR10673
+ 289. https://gcc.gnu.org/PR11044
+ 290. https://gcc.gnu.org/PR11089
+ 291. https://gcc.gnu.org/PR11420
+ 292. https://gcc.gnu.org/PR9362
+ 293. https://gcc.gnu.org/PR10142
+ 294. https://gcc.gnu.org/PR10663
+ 295. https://gcc.gnu.org/PR10835
+ 296. https://gcc.gnu.org/PR10876
+ 297. https://gcc.gnu.org/PR10955
+ 298. https://gcc.gnu.org/PR11018
+ 299. https://gcc.gnu.org/PR11556
+ 300. https://gcc.gnu.org/PR10907
+ 301. https://gcc.gnu.org/PR11320
+ 302. https://gcc.gnu.org/PR11599
+ 303. https://gcc.gnu.org/PR9745
+ 304. https://gcc.gnu.org/PR10871
+ 305. https://gcc.gnu.org/PR11440
+ 306. https://gcc.gnu.org/PR7594
+ 307. https://gcc.gnu.org/PR10557
+ 308. https://gcc.gnu.org/PR11054
+ 309. https://gcc.gnu.org/PR10834
+ 310. https://gcc.gnu.org/PR10842
+ 311. https://gcc.gnu.org/PR11052
+ 312. https://gcc.gnu.org/PR11183
+ 313. https://gcc.gnu.org/PR11084
+ 314. https://gcc.gnu.org/PR10331
+ 315. https://gcc.gnu.org/PR10413
+ 316. https://gcc.gnu.org/PR11096
+ 317. https://gcc.gnu.org/PR2873
+ 318. https://gcc.gnu.org/PR3163
+ 319. https://gcc.gnu.org/PR5287
+ 320. https://gcc.gnu.org/PR10148
+ 321. https://gcc.gnu.org/PR8787
+ 322. https://gcc.gnu.org/PR10900
+ 323. https://gcc.gnu.org/PR1607
+ 324. https://gcc.gnu.org/PR4252
+ 325. https://gcc.gnu.org/PR4490
+ 326. https://gcc.gnu.org/PR10355
+ 327. https://gcc.gnu.org/PR10726
+ 328. https://gcc.gnu.org/PR10805
+ 329. https://gcc.gnu.org/PR10815
+ 330. https://gcc.gnu.org/PR10877
+ 331. https://gcc.gnu.org/PR11280
+ 332. https://gcc.gnu.org/PR11466
+ 333. https://gcc.gnu.org/PR10737
+ 334. https://gcc.gnu.org/PR10810
+ 335. https://gcc.gnu.org/PR8336
+ 336. https://gcc.gnu.org/PR9330
+ 337. https://gcc.gnu.org/PR9631
+ 338. https://gcc.gnu.org/PR9877
+ 339. https://gcc.gnu.org/PR11687
+ 340. https://gcc.gnu.org/PR12263
+ 341. https://gcc.gnu.org/PR12490
+ 342. https://gcc.gnu.org/PR7277
+ 343. https://gcc.gnu.org/PR7939
+ 344. https://gcc.gnu.org/PR11063
+ 345. https://gcc.gnu.org/PR11207
+ 346. https://gcc.gnu.org/PR11522
+ 347. https://gcc.gnu.org/PR11595
+ 348. https://gcc.gnu.org/PR11646
+ 349. https://gcc.gnu.org/PR11665
+ 350. https://gcc.gnu.org/PR11852
+ 351. https://gcc.gnu.org/PR11878
+ 352. https://gcc.gnu.org/PR11883
+ 353. https://gcc.gnu.org/PR11991
+ 354. https://gcc.gnu.org/PR12146
+ 355. https://gcc.gnu.org/PR12215
+ 356. https://gcc.gnu.org/PR12369
+ 357. https://gcc.gnu.org/PR12446
+ 358. https://gcc.gnu.org/PR12510
+ 359. https://gcc.gnu.org/PR12544
+ 360. https://gcc.gnu.org/PR9862
+ 361. https://gcc.gnu.org/PR10962
+ 362. https://gcc.gnu.org/PR11370
+ 363. https://gcc.gnu.org/PR11637
+ 364. https://gcc.gnu.org/PR11885
+ 365. https://gcc.gnu.org/PR12082
+ 366. https://gcc.gnu.org/PR12180
+ 367. https://gcc.gnu.org/PR12340
+ 368. https://gcc.gnu.org/PR3907
+ 369. https://gcc.gnu.org/PR5293
+ 370. https://gcc.gnu.org/PR5296
+ 371. https://gcc.gnu.org/PR7939
+ 372. https://gcc.gnu.org/PR8656
+ 373. https://gcc.gnu.org/PR10147
+ 374. https://gcc.gnu.org/PR11400
+ 375. https://gcc.gnu.org/PR11409
+ 376. https://gcc.gnu.org/PR11740
+ 377. https://gcc.gnu.org/PR11786
+ 378. https://gcc.gnu.org/PR11867
+ 379. https://gcc.gnu.org/PR11928
+ 380. https://gcc.gnu.org/PR12114
+ 381. https://gcc.gnu.org/PR12163
+ 382. https://gcc.gnu.org/PR12181
+ 383. https://gcc.gnu.org/PR12236
+ 384. https://gcc.gnu.org/PR12266
+ 385. https://gcc.gnu.org/PR12296
+ 386. https://gcc.gnu.org/PR12298
+ 387. https://gcc.gnu.org/PR12369
+ 388. https://gcc.gnu.org/PR12337
+ 389. https://gcc.gnu.org/PR12344
+ 390. https://gcc.gnu.org/PR12451
+ 391. https://gcc.gnu.org/PR12486
+ 392. https://gcc.gnu.org/PR8869
+ 393. https://gcc.gnu.org/PR9786
+ 394. https://gcc.gnu.org/PR11689
+ 395. https://gcc.gnu.org/PR12116
+ 396. https://gcc.gnu.org/PR12070
+ 397. https://gcc.gnu.org/PR11184
+ 398. https://gcc.gnu.org/PR11535
+ 399. https://gcc.gnu.org/PR11693
+ 400. https://gcc.gnu.org/PR12224
+ 401. https://gcc.gnu.org/PR11087
+ 402. https://gcc.gnu.org/PR11319
+ 403. https://gcc.gnu.org/PR11949
+ 404. https://gcc.gnu.org/PR11662
+ 405. https://gcc.gnu.org/PR11965
+ 406. https://gcc.gnu.org/PR12301
+ 407. https://gcc.gnu.org/PR11717
+ 408. https://gcc.gnu.org/PR11313
+ 409. https://gcc.gnu.org/PR11712
+ 410. https://gcc.gnu.org/PR12166
+ 411. https://gcc.gnu.org/PR12101
+ 412. https://gcc.gnu.org/PR10988
+ 413. https://gcc.gnu.org/PR11805
+ 414. https://gcc.gnu.org/PR11902
+ 415. https://gcc.gnu.org/PR11903
+ 416. https://gcc.gnu.org/PR11890
+ 417. https://gcc.gnu.org/PR12399
+ 418. https://gcc.gnu.org/PR13068
+ 419. https://gcc.gnu.org/PR10060
+ 420. https://gcc.gnu.org/PR10555
+ 421. https://gcc.gnu.org/PR10706
+ 422. https://gcc.gnu.org/PR11496
+ 423. https://gcc.gnu.org/PR11741
+ 424. https://gcc.gnu.org/PR12440
+ 425. https://gcc.gnu.org/PR12632
+ 426. https://gcc.gnu.org/PR12712
+ 427. https://gcc.gnu.org/PR12726
+ 428. https://gcc.gnu.org/PR12890
+ 429. https://gcc.gnu.org/PR12900
+ 430. https://gcc.gnu.org/PR13060
+ 431. https://gcc.gnu.org/PR13289
+ 432. https://gcc.gnu.org/PR13318
+ 433. https://gcc.gnu.org/PR13392
+ 434. https://gcc.gnu.org/PR13574
+ 435. https://gcc.gnu.org/PR13475
+ 436. https://gcc.gnu.org/PR13797
+ 437. https://gcc.gnu.org/PR13824
+ 438. https://gcc.gnu.org/PR8776
+ 439. https://gcc.gnu.org/PR10339
+ 440. https://gcc.gnu.org/PR11350
+ 441. https://gcc.gnu.org/PR12826
+ 442. https://gcc.gnu.org/PR12500
+ 443. https://gcc.gnu.org/PR12941
+ 444. https://gcc.gnu.org/PR12953
+ 445. https://gcc.gnu.org/PR13041
+ 446. https://gcc.gnu.org/PR13507
+ 447. https://gcc.gnu.org/PR13382
+ 448. https://gcc.gnu.org/PR13394
+ 449. https://gcc.gnu.org/PR13400
+ 450. https://gcc.gnu.org/PR13521
+ 451. https://gcc.gnu.org/PR2094
+ 452. https://gcc.gnu.org/PR2294
+ 453. https://gcc.gnu.org/PR5050
+ 454. https://gcc.gnu.org/PR9371
+ 455. https://gcc.gnu.org/PR9546
+ 456. https://gcc.gnu.org/PR10081
+ 457. https://gcc.gnu.org/PR10093
+ 458. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#61
+ 459. https://gcc.gnu.org/PR10095
+ 460. https://gcc.gnu.org/PR11554
+ 461. https://gcc.gnu.org/PR12297
+ 462. https://gcc.gnu.org/PR12352
+ 463. https://gcc.gnu.org/PR12438
+ 464. https://gcc.gnu.org/PR12540
+ 465. https://gcc.gnu.org/PR12594
+ 466. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#60
+ 467. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#63
+ 468. https://gcc.gnu.org/PR12657
+ 469. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#292
+ 470. https://gcc.gnu.org/PR12696
+ 471. https://gcc.gnu.org/PR12815
+ 472. https://gcc.gnu.org/PR12862
+ 473. https://gcc.gnu.org/PR12926
+ 474. https://gcc.gnu.org/PR12967
+ 475. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html
+ 476. https://gcc.gnu.org/PR12971
+ 477. http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#328
+ 478. https://gcc.gnu.org/PR13007
+ 479. https://gcc.gnu.org/PR13009
+ 480. https://gcc.gnu.org/PR13057
+ 481. https://gcc.gnu.org/PR13070
+ 482. https://gcc.gnu.org/PR13081
+ 483. https://gcc.gnu.org/PR13239
+ 484. https://gcc.gnu.org/PR13262
+ 485. https://gcc.gnu.org/PR13290
+ 486. https://gcc.gnu.org/PR13323
+ 487. https://gcc.gnu.org/PR13369
+ 488. https://gcc.gnu.org/PR13371
+ 489. https://gcc.gnu.org/PR13445
+ 490. https://gcc.gnu.org/PR13461
+ 491. https://gcc.gnu.org/PR13462
+ 492. https://gcc.gnu.org/PR13478
+ 493. https://gcc.gnu.org/PR13544
+ 494. https://gcc.gnu.org/PR13650
+ 495. https://gcc.gnu.org/PR13683
+ 496. https://gcc.gnu.org/PR13688
+ 497. https://gcc.gnu.org/PR13774
+ 498. https://gcc.gnu.org/PR13884
+ 499. https://gcc.gnu.org/PR10746
+ 500. https://gcc.gnu.org/PR11433
+ 501. https://gcc.gnu.org/PR12633
+ 502. https://gcc.gnu.org/PR13037
+ 503. https://gcc.gnu.org/PR13213
+ 504. https://gcc.gnu.org/PR4490
+ 505. https://gcc.gnu.org/PR12292
+ 506. https://gcc.gnu.org/PR12441
+ 507. https://gcc.gnu.org/PR12943
+ 508. https://gcc.gnu.org/PR13608
+ 509. https://gcc.gnu.org/PR11598
+ 510. https://gcc.gnu.org/PR11793
+ 511. https://gcc.gnu.org/PR12467
+ 512. https://gcc.gnu.org/PR12537
+ 513. https://gcc.gnu.org/PR12496
+ 514. https://gcc.gnu.org/PR12865
+ 515. https://gcc.gnu.org/PR13354
+ 516. https://gcc.gnu.org/PR10467
+ 517. https://gcc.gnu.org/PR11226
+ 518. https://gcc.gnu.org/PR11227
+ 519. https://gcc.gnu.org/PR12644
+ 520. https://gcc.gnu.org/PR13149
+ 521. https://gcc.gnu.org/PR12654
+ 522. https://gcc.gnu.org/PR12965
+ 523. https://gcc.gnu.org/PR13031
+ 524. https://gcc.gnu.org/PR11634
+ 525. https://gcc.gnu.org/PR12158
+ 526. https://gcc.gnu.org/PR11992
+ 527. https://gcc.gnu.org/PR9365
+ 528. https://gcc.gnu.org/PR10392
+ 529. https://gcc.gnu.org/PR11322
+ 530. https://gcc.gnu.org/PR13069
+ 531. https://gcc.gnu.org/PR13302
+ 532. https://gcc.gnu.org/PR13585
+ 533. https://gcc.gnu.org/PR8916
+ 534. https://gcc.gnu.org/PR11576
+ 535. https://gcc.gnu.org/PR13122
+ 536. https://gcc.gnu.org/PR13256
+ 537. https://gcc.gnu.org/PR13373
+ 538. https://gcc.gnu.org/PR12561
+ 539. https://gcc.gnu.org/PR6243
+ 540. https://gcc.gnu.org/PR11397
+ 541. https://gcc.gnu.org/PR12505
+ 542. https://gcc.gnu.org/PR13150
+ 543. https://gcc.gnu.org/PR12666
+ 544. https://gcc.gnu.org/PR12969
+ 545. https://gcc.gnu.org/PR10819
+ 546. https://gcc.gnu.org/PR11612
+ 547. https://gcc.gnu.org/PR13211
+ 548. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.3.4
+ 549. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.3.5
+ 550. https://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=3.3.6
+ 551. https://gcc.gnu.org/onlinedocs/
+ 552. mailto:gcc-help@gcc.gnu.org
+ 553. mailto:gcc@gcc.gnu.org
+ 554. https://gcc.gnu.org/lists.html
+ 555. http://www.fsf.org/
+ 556. https://gcc.gnu.org/about.html
+ 557. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.2/index.html
+                             GCC 3.2 Release Series
+
+   April 25, 2003
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.2.3.
+
+   The purpose of the GCC 3.2 release series is to provide a stable
+   platform for OS distributors to use building their next releases. A
+   primary objective was to stabilize the C++ ABI; we believe that the
+   interface to the compiler and the C++ standard library are now
+   relatively stable.
+
+   Be aware that C++ code compiled by GCC 3.2.x will (in general) not
+   interoperate with code compiled by GCC 3.1.1 or earlier.
+
+   Please refer to our [2]detailed list of news, caveats, and bug-fixes
+   for further information.
+
+Release History
+
+   GCC 3.2.3
+          April 25, 2003 ([3]changes)
+
+   GCC 3.2.2
+          February 5, 2003 ([4]changes)
+
+   GCC 3.2.1
+          November 19, 2002 ([5]changes)
+
+   GCC 3.2
+          August 14, 2002 ([6]changes)
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [7]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, improvements, bug fixes, and other changes as
+   well as test results to GCC. This [8]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [9]GCC project
+   web site or contact the [10]GCC development mailing list.
+
+   To obtain GCC please use [11]our mirror sites, or our CVS server.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [12]GCC manuals. If that fails, the
+    [13]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [14]gcc@gcc.gnu.org. All of [15]our lists have public
+    archives.
+
+   Copyright (C) [16]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [17]maintained by the GCC team. Last modified
+   2014-06-28[18].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-3.2/changes.html
+   3. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
+   4. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.2
+   5. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.1
+   6. http://gcc.gnu.org/gcc-3.2/changes.html#3.2
+   7. http://gcc.gnu.org/gcc-3.2/buildstat.html
+   8. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   9. http://gcc.gnu.org/index.html
+  10. mailto:gcc@gcc.gnu.org
+  11. http://gcc.gnu.org/mirrors.html
+  12. https://gcc.gnu.org/onlinedocs/
+  13. mailto:gcc-help@gcc.gnu.org
+  14. mailto:gcc@gcc.gnu.org
+  15. https://gcc.gnu.org/lists.html
+  16. http://www.fsf.org/
+  17. https://gcc.gnu.org/about.html
+  18. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.2/changes.html
+                             GCC 3.2 Release Series
+                        Changes, New Features, and Fixes
+
+   The latest release in the 3.2 release series is [1]GCC 3.2.3.
+
+Caveats and New Features
+
+  Caveats
+
+     * The C++ compiler does not correctly zero-initialize
+       pointers-to-data members. You must explicitly initialize them. For
+       example: int S::*m(0); will work, but depending on
+       default-initialization to zero will not work. This bug cannot be
+       fixed in GCC 3.2 without inducing unacceptable risks. It will be
+       fixed in GCC 3.3.
+     * This GCC release is based on the GCC 3.1 sourcebase, and thus has
+       all the [2]changes in the GCC 3.1 series. In addition, GCC 3.2 has
+       a number of C++ ABI fixes which make its C++ compiler generate
+       binary code which is incompatible with the C++ compilers found in
+       earlier GCC releases, including GCC 3.1 and GCC 3.1.1.
+
+  Frontend Enhancements
+
+    C/C++/Objective-C
+
+     * The method of constructing the list of directories to be searched
+       for header files has been revised. If a directory named by a -I
+       option is a standard system include directory, the option is
+       ignored to ensure that the default search order for system
+       directories and the special treatment of system header files are
+       not defeated.
+     * The C and Objective-C compilers no longer accept the "Naming Types"
+       extension (typedef foo = bar); it was already unavailable in C++.
+       Code which uses it will need to be changed to use the "typeof"
+       extension instead: typedef typeof(bar) foo. (We have removed this
+       extension without a period of deprecation because it has caused the
+       compiler to crash since version 3.0 and no one noticed until very
+       recently. Thus we conclude it is not in widespread use.)
+
+    C++
+
+     * GCC 3.2 fixed serveral differences between the C++ ABI implemented
+       in GCC and the multi-vendor standard, but more have been found
+       since the release. 3.2.1 adds a new warning, -Wabi, to warn about
+       code which is affected by these bugs. We will fix these bugs in
+       some future release, once we are confident that all have been
+       found; until then, it is our intention to make changes to the ABI
+       only if they are necessary for correct compilation of C++, as
+       opposed to conformance to the ABI documents.
+     * For details on how to build an ABI compliant compiler for GNU/Linux
+       systems, check the [3]common C++ ABI page.
+
+  New Targets and Target Specific Improvements
+
+    IA-32
+
+     * Fixed a number of bugs in SSE and MMX intrinsics.
+     * Fixed common compiler crashes with SSE instruction set enabled
+       (implied by -march=pentium3, pentium4, athlon-xp)
+     * __m128 and __m128i is not 128bit aligned when used in structures.
+
+    x86-64
+
+     * A bug whereby the compiler could generate bad code for bzero has
+       been fixed.
+     * ABI fixes (implying ABI incompatibilities with previous version in
+       some corner cases)
+     * Fixed prefetch code generation
+     __________________________________________________________________
+
+GCC 3.2.3
+
+   3.2.3 is a bug fix release only; there are no new features that were
+   not present in GCC 3.2.2.
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.2.3 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here), and some of the titles have been changed to
+   make them more clear.
+
+    Internal Compiler Errors (multi-platform)
+
+     * [4]3782: (c++) -quiet -fstats produces a segmentation fault in
+       cc1plus
+     * [5]6440: (c++) template specializations cause ICE
+     * [6]7050: (c++) ICE on: (i ? get_string() : throw)
+     * [7]7741: ICE on conflicting types (make_decl_rtl in varasm.c)
+     * [8]7982: (c++) ICE due to infinite recursion (using STL set)
+     * [9]8068: exceedingly high (infinite) memory usage
+     * [10]8178: ICE with __builtin_ffs
+     * [11]8396: ICE in copy_to_mode_reg, in explow.c
+     * [12]8674: (c++) ICE in cp_expr_size, in cp/cp-lang.c
+     * [13]9768: ICE when optimizing inline code at -O2
+     * [14]9798: (c++) Infinite recursion (segfault) in
+       cp/decl.c:push_using_directive with recursive using directives
+     * [15]9799: mismatching structure initializer with nested flexible
+       array member: ICE
+     * [16]9928: ICE on duplicate enum declaration
+     * [17]10114: ICE in mem_loc_descriptor, in dwarf2out.c (affects
+       sparc, alpha)
+     * [18]10352: ICE in find_reloads_toplev
+     * [19]10336: ICE with -Wunreachable-code
+
+    C/optimizer bugs:
+
+     * [20]8224: Incorrect joining of signed and unsigned division
+     * [21]8613: -O2 produces wrong code with builtin strlen and
+       postincrements
+     * [22]8828: gcc reports some code is unreachable when it is not
+     * [23]9226: GCSE breaking argument passing
+     * [24]9853: miscompilation of non-constant structure initializer
+     * [25]9797: C99-style struct initializers are miscompiled
+     * [26]9967: Some standard C function calls should not be replaced
+       when optimizing for size
+     * [27]10116: ce2: invalid merge of join_bb in the context of switch
+       statements
+     * [28]10171: wrong code for inlined function
+     * [29]10175: -Wunreachable-code doesn't work for single lines
+
+    C++ compiler and library:
+
+     * [30]8316: Confusing diagnostic for code that misuses conversion
+       operators
+     * [31]9169: filebuf output fails if codecvt<>::out returns noconv
+     * [32]9420: incomplete type incorrectly reported
+     * [33]9459: typeof in return type specification of template not
+       supported
+     * [34]9507: filebuf::open handles ios_base::ate incorrectly
+     * [35]9538: Out-of-bounds memory access in streambuf::sputbackc
+     * [36]9602: Total confusion about template/friend/virtual/abstract
+     * [37]9993: destructor not called for local object created within and
+       returned from infinite loop
+     * [38]10167: ieee_1003.1-2001 locale specialisations on a glibc-2.3.2
+       system
+
+    Java compiler and library:
+
+     * [39]9652: libgcj build fails on irix6.5.1[78]
+     * [40]10144: gas on solaris complains about bad .stabs lines for
+       java, native as unaffected
+
+    x86-specific (Intel/AMD):
+
+     * [41]8746: gcc miscompiles Linux kernel ppa driver on x86
+     * [42]9888: -mcpu=k6 -Os produces out of range loop instructions
+     * [43]9638: Cross-build for target i386-elf and i586-pc-linux-gnu
+       failed
+     * [44]9954: Cross-build for target i586-pc-linux-gnu (--with-newlib)
+       failed
+
+    SPARC-specific:
+
+     * [45]7784: [Sparc] ICE in extract_insn, in recog.c
+     * [46]7796: sparc extra failure with -m64 on execute/930921-1.c in
+       unroll.c
+     * [47]8281: ICE when compiling with -O2 -fPIC for Ultrasparc
+     * [48]8366: [Sparc] C testsuite failure with -m64 -fpic -O in
+       execute/loop-2d.c
+     * [49]8726: gcc -O2 miscompiles Samba 2.2.7 on 32-bit sparc
+     * [50]9414: Scheduling bug on Ultrasparc
+     * [51]10067: GCC-3.2.2 outputs invalid asm on sparc64
+
+    m68k-specific:
+
+     * [52]7248: broken "inclusive or" code
+     * [53]8343: m68k-elf/rtems ICE at instantiate_virtual_regs_1
+
+    PowerPC-specific:
+
+     * [54]9732: Wrong code with -O2 -fPIC
+     * [55]10073: ICE: powerpc cannot split insn
+
+    Alpha-specific:
+
+     * [56]7702: optimization problem on a DEC alpha under OSF1
+     * [57]9671: gcc.3.2.2 does not build on a HP Tru64 Unix v5.1B system
+
+    HP-specific:
+
+     * [58]8694: <string> breaks <ctype.h> on HP-UX 10.20 (DUP: 9275)
+     * [59]9953: (ada) gcc 3.2.x can't build 3.3-branch ada on HP-UX 10
+       (missing symbol)
+     * [60]10271: Floating point args don't get reloaded across function
+       calls with -O2
+
+    MIPS specific:
+
+     * [61]6362: mips-irix6 gcc-3.1 C testsuite failure with -mips4 in
+       compile/920501-4.c
+
+    CRIS specific:
+
+     * [62]10377: gcc-3.2.2 creates bad assembler code for cris
+
+    Miscellaneous and minor bugs:
+
+     * [63]6955: collect2 says "core dumped" when there is no core
+     __________________________________________________________________
+
+GCC 3.2.2
+
+   Beginning with 3.2.2, GCC's Makefile suite supports redirection of make
+   install by means of the DESTDIR variable. Parts of the GCC tree have
+   featured that support long before, but now it is available even from
+   the top level.
+
+   Other than that, GCC 3.2.2 is a bug fix release only; there are no new
+   features that were not present in GCC 3.2.1.
+
+  Bug Fixes
+
+   On the following i386-based systems GCC 3.2.1 broke the C ABI wrt.
+   functions returning structures: Cygwin, FreeBSD (GCC 3.2.1 as shipped
+   with FreeBSD 5.0 does not have this problem), Interix, a.out-based
+   GNU/Linux and NetBSD, OpenBSD, and Darwin. GCC 3.2.2 reverts this ABI
+   change, and thus restores ABI-compatibility with previous releases
+   (except GCC 3.2.1) on these platforms.
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.2.2 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here) and some of the titles have been changed to
+   make them more clear.
+
+    Internal Compiler Errors (multi-platform)
+
+     * [64]5919: (c++) ICE when passing variable array to template
+       function
+     * [65]7129: (c++) ICE with min/max assignment operators (<?= and >?=)
+     * [66]7507: ICE with -O2 when address of called function is a
+       complicated expression
+     * [67]7622: ICE with nested inline functions if function's address is
+       taken
+     * [68]7681: (fortran) ICE in compensate_edge, in reg-stack.c (also PR
+       [69]9258)
+     * [70]8031: (c++) ICE in code comparing typeids and casting from
+       virtual base
+     * [71]8275: ICE in simplify_subreg
+     * [72]8332: (c++) builtin strlen/template interaction causes ICE
+     * [73]8372: (c++) ICE on explicit call of destructor
+     * [74]8439: (c, not c++) empty struct causes ICE
+     * [75]8442: (c++) ICE with nested template classes
+     * [76]8518: ICE when compiling mplayer ("extern inline" issue)
+     * [77]8615: (c++) ICE with out-of-range character constant template
+       argument
+     * [78]8663: (c++) ICE in cp_expr_size, at cp-lang.c:307
+     * [79]8799: (c++) ICE: error reporting routines re-entered
+     * [80]9328: (c++) ICE with typeof(X) for overloaded X
+     * [81]9465: (preprocessor) cpp -traditional ICE on null bytes
+
+    C++ (compiler and library) bugs
+
+     * [82]47: scoping in nested classes is broken
+     * [83]6745: problems with iostream rdbuf() member function
+     * [84]8214: conversion from const char* const to char* sometimes
+       accepted illegally
+     * [85]8493: builtin strlen and overload resolution (same bug as
+       [86]8332)
+     * [87]8503: strange behaviour of function types
+     * [88]8727: compiler confused by inheritance from an anonymous struct
+     * [89]7445: poor performance of std::locale::classic() in
+       multi-threaded applications
+     * [90]8230: mishandling of overflow in vector<T>::resize
+     * [91]8399: sync_with_stdio(false) breaks unformatted input
+     * [92]8662: illegal access of private member of unnamed class is
+       accepted
+     * [93]8707: "make distclean" fails in libstdc++-v3 directory
+     * [94]8708: __USE_MALLOC doesn't work
+     * [95]8790: Use of non-thread-safe strtok in src/localename.cc
+     * [96]8887: Bug in date formats with --enable-clocale=generic
+     * [97]9076: Call Frame Instructions are not handled correctly during
+       unwind operation
+     * [98]9151: std::setprecision limited to 16 digits when outputting a
+       double to a stream
+     * [99]9168: codecvt<char, char, mbstate_t> overwrites output buffers
+     * [100]9269: libstdc++ headers: explicit specialization of function
+       must precede its first use
+     * [101]9322: return value of basic_streambuf<>::getloc affected by
+       locale::global
+     * [102]9433: segfault in runtime support for dynamic_cast
+
+    C and optimizer bugs
+
+     * [103]8032: GCC incorrectly initializes static structs that have
+       flexible arrays
+     * [104]8639: simple arithmetic expression broken
+     * [105]8794: optimization improperly eliminates certain expressions
+     * [106]8832: traditional "asm volatile" code is illegally optimized
+     * [107]8988: loop optimizer bug: with -O2, code is generated that
+       segfaults (found on i386, bug present for all platforms)
+     * [108]9492: structure copy clobbers subsequent stores to structure
+
+    Objective-C bugs
+
+     * [109]9267: Objective-C parser won't build with newer bison versions
+       (e.g. 1.875)
+
+    Ada bugs
+
+     * [110]8344: Ada build problem due to conflict between gcc/final.o,
+       gcc/ada/final.o
+
+    Preprocessor bugs
+
+     * [111]8524: _Pragma within macros is improperly expanded
+     * [112]8880: __WCHAR_TYPE__ macro incorrectly set to "long int" with
+       -fshort-wchar
+
+    ARM-specific
+
+     * [113]9090: arm ICE with >= -O2; regression from gcc-2.95
+
+    x86-specific (Intel/AMD)
+
+     * [114]8588: ICE in extract_insn, at recog.c:NNNN (shift instruction)
+     * [115]8599: loop unroll bug with -march=k6-3
+     * [116]9506: ABI breakage in structure return (affects BSD and
+       Cygwin, but not GNU/Linux)
+
+    FreeBSD 5.0 specific
+
+     * [117]9484: GCC 3.2.1 Bootstrap failure on FreeBSD 5.0
+
+    RTEMS-specific
+
+     * [118]9292: hppa1.1-rtems configurery problems
+     * [119]9293: [m68k-elf/rtems] config/m68k/t-crtstuff bug
+     * [120]9295: [mips-rtems] config/mips/rtems.h init/fini issue
+     * [121]9296: gthr-rtems regression
+     * [122]9316: powerpc-rtems: extending multilibs
+
+    HP-PA specific
+
+     * [123]9493: ICE with -O2 when building a simple function
+
+    Documentation
+
+     * [124]7341: hyperlink to gcov in GCC documentation doesn't work
+     * [125]8947: Please add a warning about "-malign-double" in docs
+     * [126]7448, [127]8882: typo cleanups
+     __________________________________________________________________
+
+GCC 3.2.1
+
+   3.2.1 adds a new warning, -Wabi. This option warns when GNU C++
+   generates code that is known not to be binary-compatible with the
+   vendor-neutral ia32/ia64 ABI. Please consult the GCC manual, included
+   in the distribution, for details.
+
+   This release also removes an old GCC extension, "naming types", and the
+   documentation now directs users to use a different GCC extension,
+   __typeof__, instead. The feature had evidently been broken for a while.
+
+   Otherwise, 3.2.1 is a bug fix release only; other than bug fixes and
+   the new warning there are no new features that were not present in GCC
+   3.2.
+
+   In addition, the previous fix for [128]PR 7445 (poor performance of
+   std::locale::classic() in multi-threaded applications) was reverted
+   ("unfixed"), because the "fix" was not thread-safe.
+
+  Bug Fixes
+
+   This section lists the problem reports (PRs) from GCC's bug tracking
+   system that are known to be fixed in the 3.2.1 release. This list might
+   not be complete (that is, it is possible that some PRs that have been
+   fixed are not listed here). As you can see, the number of bug fixes is
+   quite large, so it is strongly recommended that users of earlier GCC
+   3.x releases upgrade to GCC 3.2.1.
+
+    Internal Compiler Errors (multi-platform)
+
+     * [129]2521: (c++) ICE in build_ptrmemfunc, in cp/typeck.c
+     * [130]5661: (c++) ICE instantiating template on array of unknown
+       size (bad code)
+     * [131]6419: (c++) ICE in make_decl_rtl for "longest" attribute on
+       64-bit platforms
+     * [132]6994: (c++) ICE in find_function_data
+     * [133]7150: preprocessor: GCC -dM -E gives an ICE
+     * [134]7160: ICE when optimizing branches without a return value
+     * [135]7228: (c++) ICE when using member template and template
+       function
+     * [136]7266: (c++) ICE with -pedantic on missing typename
+     * [137]7353: ICE from use of "Naming Types" extension, see above
+     * [138]7411: ICE in instantiate_virtual_regs_1, in function.c
+     * [139]7478: (c++) ICE on static_cast inside template
+     * [140]7526: preprocessor core dump when _Pragma implies #pragma
+       dependency
+     * [141]7721: (c++) ICE on simple (but incorrect) template ([142]7803
+       is a duplicate)
+     * [143]7754: (c++) ICE on union with template parameter
+     * [144]7788: (c++) redeclaring a definition as an incomplete class
+       causes ICE
+     * [145]8031: (c++) ICE in comptypes, in cp/typeck.c
+     * [146]8055: preprocessor dies with SIG11 when building FreeBSD
+       kernel
+     * [147]8067: (c++) ICE due to mishandling of __FUNCTION__ and related
+       variables
+     * [148]8134: (c++) ICE in force_store_init_value on legal code
+     * [149]8149: (c++) ICE on incomplete type
+     * [150]8160: (c++) ICE in build_modify_expr, in cp/typeck.c: array
+       initialization
+
+    C++ (compiler and library) bugs
+
+     * [151]5607: No pointer adjustment in covariant return types
+     * [152]6579: Infinite loop with statement expressions in member
+       initialization
+     * [153]6803: Default copy constructor bug in GCC 3.1
+     * [154]7176: g++ confused by friend and static member with same name
+     * [155]7188: Segfault with template class and recursive (incorrect)
+       initializer list
+     * [156]7306: Regression: GCC 3.x fails to compile code with virtual
+       inheritance if a method has a variable number of arguments
+     * [157]7461: ctype<char>::classic_table() returns offset array on
+       Cygwin
+     * [158]7524: f(const float arg[3]) fails
+     * [159]7584: Erroneous ambiguous base error on using declaration
+     * [160]7676: Member template overloading problem
+     * [161]7679: infinite loop when a right parenthesis is missing
+     * [162]7811: default locale not taken from environment
+     * [163]7961: compare( char *) implemented incorrectly in
+       basic_string<>
+     * [164]8071: basic_ostream::operator<<(streambuf*) loops forever if
+       streambuf::underflow() leaves gptr() NULL (dups: [165]8127,
+       [166]6745)
+     * [167]8096: deque::at() throws std::range_error instead of
+       std::out_of_range
+     * [168]8127: cout << cin.rdbuf() infinite loop
+     * [169]8218: Excessively large memory consumed for classes with large
+       array members
+     * [170]8287: GCC 3.2: Destructor called for non-constructed local
+       object
+     * [171]8347: empty vector range used in string construction causes
+       core dump
+     * [172]8348: fail() flag is set in istringstream when eof() flag is
+       set
+     * [173]8391: regression: infinite loop in cp/decl2.c(finish_file)
+
+    C and optimizer bugs
+
+     * [174]6627: -fno-align-functions doesn't seem to disable function
+       alignment
+     * [175]6631: life_analysis misoptimizes code to initialize fields of
+       a structure
+     * [176]7102: unsigned char division results in floating exception
+     * [177]7120: Run once loop should *always* be unrolled
+       (pessimization)
+     * [178]7209: Bug involving array referencing and ?: operator
+     * [179]7515: invalid inlining of global function with -O3
+     * [180]7814: incorrect scheduling for glibc-2.2.92 strcpy test
+     * [181]8467: bug in sibling call optimization
+
+    Preprocessor bugs
+
+     * [182]4890: incorrect line markers from the traditional preprocessor
+     * [183]7357: -M option omits system headers files (making it the same
+       as -MM)
+     * [184]7358: Changes to Sun's make Dependencies
+     * [185]7602: C++ header files found in CPLUS_INCLUDE_PATH treated as
+       C headers
+     * [186]7862: Interrupting GCC -MD removes .d file but not .o
+     * [187]8190: Failed compilation deletes -MD dependency file
+     * [188]8524: _Pragma within macro is improperly expanded
+
+    x86 specific (Intel/AMD)
+
+     * [189]5351: (i686-only) function pass-by-value structure copy
+       corrupts stack ([190]7591 is a duplicate)
+     * [191]6845, [192]7034, [193]7124, [194]7174: ICE's with
+       -march=pentium3/pentium2/athlon (these are all the same underlying
+       bug, in MMX register use)
+     * [195]7134, [196]7375, [197]7390: ICE with -march=athlon (maybe same
+       as above?)
+     * [198]6890: xmmintrin.h, _MM_TRANSPOSE4_PS is broken
+     * [199]6981: wrong code in 64-bit manipulation on x86
+     * [200]7242: GCC -mcpu=pentium[23] doesn't define __tune_pentiumpro__
+       macro
+     * [201]7396: ix86: cmpgt_ss, cmpge_ss, cmpngt_ss, and cmpnge_ss SSE
+       intrinsics are broken
+     * [202]7630: GCC 3.2 breaks on Mozilla 1.0's JS sources with
+       -march=pentium4
+     * [203]7693: Typo in i386 mmintrin.h header
+     * [204]7723: ICE - Pentium3 sse - GCC 3.2
+     * [205]7951: ICE on -march=pentium4 -O2 -mfpmath=sse
+     * [206]8146: (i686 only) gcc 3.2 miscompiles gcc 2.95.3
+
+    PowerPC specific
+
+     * [207]5967: GCC bug when profiling nested functions on powerpc
+     * [208]6984: wrong code generated with -O2, -O3, -Os for do-while
+       loop on PowerPC
+     * [209]7114: PowerPC: ICE building strcoll.op from glibc-2.2.5
+     * [210]7130: miscompiled code for GCC-3.1 on
+       powerpc-unknown-linux-gnu with -funroll-all-loops
+     * [211]7133: PowerPC ICE: unrecognizable insn
+     * [212]7380: ICE in extract_insn, at recog.c:2148
+     * [213]8252: ICE on Altivec code with optimization turned on
+     * [214]8451: Altivec ICE in GCC 3.2
+
+    HP/PA specific
+
+     * [215]7250: __ashrdi3 returns wrong value on 32 bit hppa
+
+    SPARC specific
+
+     * [216]6668: when using --disable-multilib, libgcc_s.so is installed
+       in the wrong place on sparc-solaris
+     * [217]7151: ICE when compiling for UltraSPARC
+     * [218]7335: SPARC: ICE in verify_wide_reg (flow.c:557) with long
+       double and -O1
+     * [219]7842: [REGRESSION] SPARC code gen bug
+
+    ARM specific
+
+     * [220]7856: [arm] invalid offset in constant pool reference
+     * [221]7967: optimization produces wrong code (ARM)
+
+    Alpha specific
+
+     * [222]7374: __builtin_fabsl broken on alpha
+
+    IBM s390 specific
+
+     * [223]7370: ICE in fixup_var_refs_1 on s390x
+     * [224]7409: loop optimization bug on s390x-linux-gnu
+     * [225]8232: s390x: ICE when using bcmp with int length argument
+
+    SCO specific
+
+     * [226]7623: SCO OpenServer build fails with machmode.def: undefined
+       symbol: BITS_PER_UNIT
+
+    m68k/Coldfire specific
+
+     * [227]8314: crtbegin, crtend need to be multilib'ed for this
+       platform
+
+    Documentation
+
+     * [228]761: Document some undocumented options
+     * [229]5610: Fix documentation about invoking SSE instructions
+       (-mfpmath=sse)
+     * [230]7484: List -Wmissing-declarations as C-only option
+     * [231]7531: -mcmodel not documented for x86-64
+     * [232]8120: Update documentation of bad use of ##
+     __________________________________________________________________
+
+GCC 3.2
+
+   3.2 is a small bug fix release, but there is a change to the
+   application binary interface (ABI), hence the change to the second part
+   of the version number.
+
+   The main purpose of the 3.2 release is to correct a couple of problems
+   in the C++ ABI, with the intention of providing a stable interface
+   going forward.  Accordingly, 3.2 is only a small change to 3.1.1.
+
+  Bug Fixes
+
+    C++
+
+     * [233]7320: g++ 3.2 relocation problem
+     * [234]7470: vtable: virtual function pointers not in declaration
+       order
+
+    libstdc++
+
+     * [235]6410: Trouble with non-ASCII monetary symbols and wchar_t
+     * [236]6503, [237]6642, [238]7186: Problems with comparing or
+       subtracting various types of const and non-const iterators
+     * [239]7216: ambiguity with basic_iostream::traits_type
+     * [240]7220: problem with basic_istream::ignore(0,delimiter)
+     * [241]7222: locale::operator==() doesn't work on std::locale("")
+     * [242]7286: placement operator delete issue
+     * [243]7442: cxxabi.h does not match the C++ ABI
+     * [244]7445: poor performance of std::locale::classic() in
+       multi-threaded applications
+
+    x86-64 specific
+
+     * [245]7291: off-by-one in generated inline bzero code for x86-64
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [246]GCC manuals. If that fails, the
+    [247]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [248]gcc@gcc.gnu.org. All of [249]our lists have public
+    archives.
+
+   Copyright (C) [250]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [251]maintained by the GCC team. Last modified
+   2014-06-27[252].
+
+References
+
+   1. http://gcc.gnu.org/gcc-3.2/changes.html#3.2.3
+   2. http://gcc.gnu.org/gcc-3.1/changes.html
+   3. http://gcc.gnu.org/gcc-3.2/c++-abi.html
+   4. https://gcc.gnu.org/PR3782
+   5. https://gcc.gnu.org/PR6440
+   6. https://gcc.gnu.org/PR7050
+   7. https://gcc.gnu.org/PR7741
+   8. https://gcc.gnu.org/PR7982
+   9. https://gcc.gnu.org/PR8068
+  10. https://gcc.gnu.org/PR8178
+  11. https://gcc.gnu.org/PR8396
+  12. https://gcc.gnu.org/PR8674
+  13. https://gcc.gnu.org/PR9768
+  14. https://gcc.gnu.org/PR9798
+  15. https://gcc.gnu.org/PR9799
+  16. https://gcc.gnu.org/PR9928
+  17. https://gcc.gnu.org/PR10114
+  18. https://gcc.gnu.org/PR10352
+  19. https://gcc.gnu.org/PR10336
+  20. https://gcc.gnu.org/PR8224
+  21. https://gcc.gnu.org/PR8613
+  22. https://gcc.gnu.org/PR8828
+  23. https://gcc.gnu.org/PR9226
+  24. https://gcc.gnu.org/PR9853
+  25. https://gcc.gnu.org/PR9797
+  26. https://gcc.gnu.org/PR9967
+  27. https://gcc.gnu.org/PR10116
+  28. https://gcc.gnu.org/PR10171
+  29. https://gcc.gnu.org/PR10175
+  30. https://gcc.gnu.org/PR8316
+  31. https://gcc.gnu.org/PR9169
+  32. https://gcc.gnu.org/PR9420
+  33. https://gcc.gnu.org/PR9459
+  34. https://gcc.gnu.org/PR9507
+  35. https://gcc.gnu.org/PR9538
+  36. https://gcc.gnu.org/PR9602
+  37. https://gcc.gnu.org/PR9993
+  38. https://gcc.gnu.org/PR10167
+  39. https://gcc.gnu.org/PR9652
+  40. https://gcc.gnu.org/PR10144
+  41. https://gcc.gnu.org/PR8746
+  42. https://gcc.gnu.org/PR9888
+  43. https://gcc.gnu.org/PR9638
+  44. https://gcc.gnu.org/PR9954
+  45. https://gcc.gnu.org/PR7784
+  46. https://gcc.gnu.org/PR7796
+  47. https://gcc.gnu.org/PR8281
+  48. https://gcc.gnu.org/PR8366
+  49. https://gcc.gnu.org/PR8726
+  50. https://gcc.gnu.org/PR9414
+  51. https://gcc.gnu.org/PR10067
+  52. https://gcc.gnu.org/PR7248
+  53. https://gcc.gnu.org/PR8343
+  54. https://gcc.gnu.org/PR9732
+  55. https://gcc.gnu.org/PR10073
+  56. https://gcc.gnu.org/PR7702
+  57. https://gcc.gnu.org/PR9671
+  58. https://gcc.gnu.org/PR8694
+  59. https://gcc.gnu.org/PR9953
+  60. https://gcc.gnu.org/PR10271
+  61. https://gcc.gnu.org/PR6362
+  62. https://gcc.gnu.org/PR10377
+  63. https://gcc.gnu.org/PR6955
+  64. https://gcc.gnu.org/PR5919
+  65. https://gcc.gnu.org/PR7129
+  66. https://gcc.gnu.org/PR7507
+  67. https://gcc.gnu.org/PR7622
+  68. https://gcc.gnu.org/PR7681
+  69. https://gcc.gnu.org/PR9528
+  70. https://gcc.gnu.org/PR8031
+  71. https://gcc.gnu.org/PR8275
+  72. https://gcc.gnu.org/PR8332
+  73. https://gcc.gnu.org/PR8372
+  74. https://gcc.gnu.org/PR8439
+  75. https://gcc.gnu.org/PR8442
+  76. https://gcc.gnu.org/PR8518
+  77. https://gcc.gnu.org/PR8615
+  78. https://gcc.gnu.org/PR8663
+  79. https://gcc.gnu.org/PR8799
+  80. https://gcc.gnu.org/PR9328
+  81. https://gcc.gnu.org/PR9465
+  82. https://gcc.gnu.org/PR47
+  83. https://gcc.gnu.org/PR6745
+  84. https://gcc.gnu.org/PR8214
+  85. https://gcc.gnu.org/PR8493
+  86. https://gcc.gnu.org/PR8332
+  87. https://gcc.gnu.org/PR8503
+  88. https://gcc.gnu.org/PR8727
+  89. https://gcc.gnu.org/PR7445
+  90. https://gcc.gnu.org/PR8230
+  91. https://gcc.gnu.org/PR8399
+  92. https://gcc.gnu.org/PR8662
+  93. https://gcc.gnu.org/PR8707
+  94. https://gcc.gnu.org/PR8708
+  95. https://gcc.gnu.org/PR8790
+  96. https://gcc.gnu.org/PR8887
+  97. https://gcc.gnu.org/PR9076
+  98. https://gcc.gnu.org/PR9151
+  99. https://gcc.gnu.org/PR9168
+ 100. https://gcc.gnu.org/PR9269
+ 101. https://gcc.gnu.org/PR9322
+ 102. https://gcc.gnu.org/PR9433
+ 103. https://gcc.gnu.org/PR8032
+ 104. https://gcc.gnu.org/PR8639
+ 105. https://gcc.gnu.org/PR8794
+ 106. https://gcc.gnu.org/PR8832
+ 107. https://gcc.gnu.org/PR8988
+ 108. https://gcc.gnu.org/PR9492
+ 109. https://gcc.gnu.org/PR9267
+ 110. https://gcc.gnu.org/PR8344
+ 111. https://gcc.gnu.org/PR8524
+ 112. https://gcc.gnu.org/PR8880
+ 113. https://gcc.gnu.org/PR9090
+ 114. https://gcc.gnu.org/PR8588
+ 115. https://gcc.gnu.org/PR8599
+ 116. https://gcc.gnu.org/PR9506
+ 117. https://gcc.gnu.org/PR9484
+ 118. https://gcc.gnu.org/PR9292
+ 119. https://gcc.gnu.org/PR9293
+ 120. https://gcc.gnu.org/PR9295
+ 121. https://gcc.gnu.org/PR9296
+ 122. https://gcc.gnu.org/PR9316
+ 123. https://gcc.gnu.org/PR9493
+ 124. https://gcc.gnu.org/PR7341
+ 125. https://gcc.gnu.org/PR8947
+ 126. https://gcc.gnu.org/PR7448
+ 127. https://gcc.gnu.org/PR8882
+ 128. https://gcc.gnu.org/PR7445
+ 129. https://gcc.gnu.org/PR2521
+ 130. https://gcc.gnu.org/PR5661
+ 131. https://gcc.gnu.org/PR6419
+ 132. https://gcc.gnu.org/PR6994
+ 133. https://gcc.gnu.org/PR7150
+ 134. https://gcc.gnu.org/PR7160
+ 135. https://gcc.gnu.org/PR7228
+ 136. https://gcc.gnu.org/PR7266
+ 137. https://gcc.gnu.org/PR7353
+ 138. https://gcc.gnu.org/PR7411
+ 139. https://gcc.gnu.org/PR7478
+ 140. https://gcc.gnu.org/PR7526
+ 141. https://gcc.gnu.org/PR7721
+ 142. https://gcc.gnu.org/PR7803
+ 143. https://gcc.gnu.org/PR7754
+ 144. https://gcc.gnu.org/PR7788
+ 145. https://gcc.gnu.org/PR8031
+ 146. https://gcc.gnu.org/PR8055
+ 147. https://gcc.gnu.org/PR8067
+ 148. https://gcc.gnu.org/PR8134
+ 149. https://gcc.gnu.org/PR8149
+ 150. https://gcc.gnu.org/PR8160
+ 151. https://gcc.gnu.org/PR5607
+ 152. https://gcc.gnu.org/PR6579
+ 153. https://gcc.gnu.org/PR6803
+ 154. https://gcc.gnu.org/PR7176
+ 155. https://gcc.gnu.org/PR7188
+ 156. https://gcc.gnu.org/PR7306
+ 157. https://gcc.gnu.org/PR7461
+ 158. https://gcc.gnu.org/PR7524
+ 159. https://gcc.gnu.org/PR7584
+ 160. https://gcc.gnu.org/PR7676
+ 161. https://gcc.gnu.org/PR7679
+ 162. https://gcc.gnu.org/PR7811
+ 163. https://gcc.gnu.org/PR7961
+ 164. https://gcc.gnu.org/PR8071
+ 165. https://gcc.gnu.org/PR8127
+ 166. https://gcc.gnu.org/PR6745
+ 167. https://gcc.gnu.org/PR8096
+ 168. https://gcc.gnu.org/PR8127
+ 169. https://gcc.gnu.org/PR8218
+ 170. https://gcc.gnu.org/PR8287
+ 171. https://gcc.gnu.org/PR8347
+ 172. https://gcc.gnu.org/PR8348
+ 173. https://gcc.gnu.org/PR8391
+ 174. https://gcc.gnu.org/PR6627
+ 175. https://gcc.gnu.org/PR6631
+ 176. https://gcc.gnu.org/PR7102
+ 177. https://gcc.gnu.org/PR7120
+ 178. https://gcc.gnu.org/PR7209
+ 179. https://gcc.gnu.org/PR7515
+ 180. https://gcc.gnu.org/PR7814
+ 181. https://gcc.gnu.org/PR8467
+ 182. https://gcc.gnu.org/PR4890
+ 183. https://gcc.gnu.org/PR7357
+ 184. https://gcc.gnu.org/PR7358
+ 185. https://gcc.gnu.org/PR7602
+ 186. https://gcc.gnu.org/PR7862
+ 187. https://gcc.gnu.org/PR8190
+ 188. https://gcc.gnu.org/PR8524
+ 189. https://gcc.gnu.org/PR5351
+ 190. https://gcc.gnu.org/PR7591
+ 191. https://gcc.gnu.org/PR6845
+ 192. https://gcc.gnu.org/PR7034
+ 193. https://gcc.gnu.org/PR7124
+ 194. https://gcc.gnu.org/PR7174
+ 195. https://gcc.gnu.org/PR7134
+ 196. https://gcc.gnu.org/PR7375
+ 197. https://gcc.gnu.org/PR7390
+ 198. https://gcc.gnu.org/PR6890
+ 199. https://gcc.gnu.org/PR6981
+ 200. https://gcc.gnu.org/PR7242
+ 201. https://gcc.gnu.org/PR7396
+ 202. https://gcc.gnu.org/PR7630
+ 203. https://gcc.gnu.org/PR7693
+ 204. https://gcc.gnu.org/PR7723
+ 205. https://gcc.gnu.org/PR7951
+ 206. https://gcc.gnu.org/PR8146
+ 207. https://gcc.gnu.org/PR5967
+ 208. https://gcc.gnu.org/PR6984
+ 209. https://gcc.gnu.org/PR7114
+ 210. https://gcc.gnu.org/PR7130
+ 211. https://gcc.gnu.org/PR7133
+ 212. https://gcc.gnu.org/PR7380
+ 213. https://gcc.gnu.org/PR8252
+ 214. https://gcc.gnu.org/PR8451
+ 215. https://gcc.gnu.org/PR7250
+ 216. https://gcc.gnu.org/PR6668
+ 217. https://gcc.gnu.org/PR7151
+ 218. https://gcc.gnu.org/PR7335
+ 219. https://gcc.gnu.org/PR7842
+ 220. https://gcc.gnu.org/PR7856
+ 221. https://gcc.gnu.org/PR7967
+ 222. https://gcc.gnu.org/PR7374
+ 223. https://gcc.gnu.org/PR7370
+ 224. https://gcc.gnu.org/PR7409
+ 225. https://gcc.gnu.org/PR8232
+ 226. https://gcc.gnu.org/PR7623
+ 227. https://gcc.gnu.org/PR8314
+ 228. https://gcc.gnu.org/PR761
+ 229. https://gcc.gnu.org/PR5610
+ 230. https://gcc.gnu.org/PR7484
+ 231. https://gcc.gnu.org/PR7531
+ 232. https://gcc.gnu.org/PR8120
+ 233. https://gcc.gnu.org/PR7320
+ 234. https://gcc.gnu.org/PR7470
+ 235. https://gcc.gnu.org/PR6410
+ 236. https://gcc.gnu.org/PR6503
+ 237. https://gcc.gnu.org/PR6642
+ 238. https://gcc.gnu.org/PR7186
+ 239. https://gcc.gnu.org/PR7216
+ 240. https://gcc.gnu.org/PR7220
+ 241. https://gcc.gnu.org/PR7222
+ 242. https://gcc.gnu.org/PR7286
+ 243. https://gcc.gnu.org/PR7442
+ 244. https://gcc.gnu.org/PR7445
+ 245. https://gcc.gnu.org/PR7291
+ 246. https://gcc.gnu.org/onlinedocs/
+ 247. mailto:gcc-help@gcc.gnu.org
+ 248. mailto:gcc@gcc.gnu.org
+ 249. https://gcc.gnu.org/lists.html
+ 250. http://www.fsf.org/
+ 251. https://gcc.gnu.org/about.html
+ 252. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.1/index.html
+                                    GCC 3.1
+
+   July 27, 2002
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.1.1.
+
+   The links below still apply to GCC 3.1.1.
+
+   May 15, 2002
+
+   The [2]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.1.
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   A list of [3]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed [4]new features, improvements, bug fixes, and other changes
+   as well as test results to GCC. This [5]amazing group of volunteers is
+   what makes GCC successful.
+
+   For additional information about GCC please refer to the [6]GCC project
+   web site or contact the [7]GCC development mailing list.
+
+   To obtain GCC please use [8]our mirror sites, or our CVS server.
+     __________________________________________________________________
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [9]GCC manuals. If that fails, the
+    [10]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [11]gcc@gcc.gnu.org. All of [12]our lists have public
+    archives.
+
+   Copyright (C) [13]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [14]maintained by the GCC team. Last modified
+   2014-06-28[15].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://www.gnu.org/
+   3. http://gcc.gnu.org/gcc-3.1/buildstat.html
+   4. http://gcc.gnu.org/gcc-3.1/changes.html
+   5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   6. http://gcc.gnu.org/index.html
+   7. mailto:gcc@gcc.gnu.org
+   8. http://gcc.gnu.org/mirrors.html
+   9. https://gcc.gnu.org/onlinedocs/
+  10. mailto:gcc-help@gcc.gnu.org
+  11. mailto:gcc@gcc.gnu.org
+  12. https://gcc.gnu.org/lists.html
+  13. http://www.fsf.org/
+  14. https://gcc.gnu.org/about.html
+  15. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.1/changes.html
+                             GCC 3.1 Release Series
+                        Changes, New Features, and Fixes
+
+Additional changes in GCC 3.1.1
+
+     * A bug related to how structures and unions are returned has been
+       fixed for powerpc-*-netbsd*.
+     * An important bug in the implementation of -fprefetch-loop-arrays
+       has been fixed. Previously the optimization prefetched random
+       blocks of memory for most targets except for i386.
+     * The Java compiler now compiles Java programs much faster and also
+       works with parallel make.
+     * Nested functions have been fixed for mips*-*-netbsd*.
+     * Some missing floating point support routines have beed added for
+       mips*-*-netbsd*.
+     * This [1]message gives additional information about the bugs fixed
+       in this release.
+
+Caveats
+
+     * The -traditional C compiler option has been deprecated and will be
+       removed in GCC 3.3. (It remains possible to preprocess non-C code
+       with the traditional preprocessor.)
+     * The default debugging format for most ELF platforms (including
+       GNU/Linux and FreeBSD; notable exception is Solaris) has changed
+       from stabs to DWARF2. This requires GDB 5.1.1 or later.
+
+General Optimizer Improvements
+
+     * Jan Hubicka, SuSE Labs, together with Richard Henderson, Red Hat,
+       and Andreas Jaeger, SuSE Labs, has contributed [2]infrastructure
+       for profile driven optimizations.
+       Options -fprofile-arcs and -fbranch-probabilities can now be used
+       to improve speed of the generated code by profiling the actual
+       program behaviour on typical runs. In the absence of profile info
+       the compiler attempts to guess the profile statically.
+     * [3]SPEC2000 and SPEC95 benchmark suites are now used daily to
+       monitor performance of the generated code.
+       According to the SPECInt2000 results on an AMD Athlon CPU, the code
+       generated by GCC 3.1 is 6% faster on the average (8.2% faster with
+       profile feedback) compared to GCC 3.0. The code produced by GCC 3.0
+       is about 2.1% faster compared to 2.95.3. Tests were done using the
+       -O2 -march=athlon command-line options.
+     * Alexandre Oliva, of Red Hat, has generalized the tree inlining
+       infrastructure developed by CodeSourcery, LLC for the C++ front
+       end, so that it is now used in the C front end too. Inlining
+       functions as trees exposes them earlier to the compiler, giving it
+       more opportunities for optimization.
+     * Support for data prefetching instructions has been added to the GCC
+       back end and several targets. A new __builtin_prefetch intrinsic is
+       available to explicitly insert prefetch instructions and
+       experimental support for loop array prefetching has been added (see
+       -fprefetch-loop-array documentation).
+     * Support for emitting debugging information for macros has been
+       added for DWARF2. It is activated using -g3.
+
+New Languages and Language specific improvements
+
+  C/C++
+
+     * A few more [4]ISO C99 features.
+     * The preprocessor is 10-50% faster than the preprocessor in GCC 3.0.
+     * The preprocessor's symbol table has been merged with the symbol
+       table of the C, C++ and Objective-C front ends.
+     * The preprocessor consumes less memory than the preprocessor in GCC
+       3.0, often significantly so. On normal input files, it typically
+       consumes less memory than pre-3.0 cccp-based GCC, too.
+
+  C++
+
+     * -fhonor-std and -fno-honor-std have been removed. -fno-honor-std
+       was a workaround to allow std compliant code to work with the
+       non-std compliant libstdc++-v2. libstdc++-v3 is std compliant.
+     * The C++ ABI has been fixed so that void (A::*)() const is mangled
+       as "M1AKFvvE", rather than "MK1AFvvE" as before. This change only
+       affects pointer to cv-qualified member function types.
+     * The C++ ABI has been changed to correctly handle this code:
+    struct A {
+      void operator delete[] (void *, size_t);
+    };
+
+    struct B : public A {
+    };
+
+    new B[10];
+
+       The amount of storage allocated for the array will be greater than
+       it was in 3.0, in order to store the number of elements in the
+       array, so that the correct size can be passed to operator delete[]
+       when the array is deleted. Previously, the value passed to operator
+       delete[] was unpredictable.
+       This change will only affect code that declares a two-argument
+       operator delete[] with a second parameter of type size_t in a base
+       class, and does not override that definition in a derived class.
+     * The C++ ABI has been changed so that:
+    struct A {
+      void operator delete[] (void *, size_t);
+      void operator delete[] (void *);
+    };
+
+       does not cause unnecessary storage to be allocated when an array of
+       A objects is allocated.
+       This change will only affect code that declares both of these forms
+       of operator delete[], and declared the two-argument form before the
+       one-argument form.
+     * The C++ ABI has been changed so that when a parameter is passed by
+       value, any cleanup for that parameter is performed in the caller,
+       as specified by the ia64 C++ ABI, rather than the called function
+       as before. As a result, classes with a non-trivial destructor but a
+       trivial copy constructor will be passed and returned by invisible
+       reference, rather than by bitwise copy as before.
+     * G++ now supports the "named return value optimization": for code
+       like
+    A f () {
+      A a;
+      ...
+      return a;
+    }
+
+       G++ will allocate a in the return value slot, so that the return
+       becomes a no-op. For this to work, all return statements in the
+       function must return the same variable.
+     * Improvements to the C++ library are listed in [5]the libstdc++-v3
+       FAQ.
+
+  Objective-C
+
+     * Annoying linker warnings (due to incorrect code being generated)
+       have been fixed.
+     * If a class method cannot be found, the compiler no longer issues a
+       warning if a corresponding instance method exists in the root
+       class.
+     * Forward @protocol declarations have been fixed.
+     * Loading of categories has been fixed in certain situations (GNU run
+       time only).
+     * The class lookup in the run-time library has been rewritten so that
+       class method dispatch is more than twice as fast as it used to be
+       (GNU run time only).
+
+  Java
+
+     * libgcj now includes RMI, java.lang.ref.*, javax.naming, and
+       javax.transaction.
+     * Property files and other system resources can be compiled into
+       executables which use libgcj using the new gcj --resource feature.
+     * libgcj has been ported to more platforms. In particular there is
+       now a mostly-functional mingw32 (Windows) target port.
+     * JNI and CNI invocation interfaces were implemented, so gcj-compiled
+       Java code can now be called from a C/C++ application.
+     * gcj can now use builtin functions for certain known methods, for
+       instance Math.cos.
+     * gcj can now automatically remove redundant array-store checks in
+       some common cases.
+     * The --no-store-checks optimization option was added. This can be
+       used to omit runtime store checks for code which is known not to
+       throw ArrayStoreException
+     * The following third party interface standards were added to libgcj:
+       org.w3c.dom and org.xml.sax.
+     * java.security has been merged with GNU Classpath. The new package
+       is now JDK 1.2 compliant, and much more complete.
+     * A bytecode verifier was added to the libgcj interpreter.
+     * java.lang.Character was rewritten to comply with the Unicode 3.0
+       standard, and improve performance.
+     * Partial support for many more locales was added to libgcj.
+     * Socket timeouts have been implemented.
+     * libgcj has been merged into a single shared library. There are no
+       longer separate shared libraries for the garbage collector and
+       zlib.
+     * Several performance improvements were made to gcj and libgcj:
+          + Hash synchronization (thin locks)
+          + A special allocation path for finalizer-free objects
+          + Thread-local allocation
+          + Parallel GC, and other GC tweaks
+
+  Fortran
+
+   Fortran improvements are listed in [6]the Fortran documentation.
+
+  Ada
+
+   [7]Ada Core Technologies, Inc, has contributed its GNAT Ada 95 front
+   end and associated tools. The GNAT compiler fully implements the Ada
+   language as defined by the ISO/IEC 8652 standard.
+
+   Please note that the integration of the Ada front end is still work in
+   progress.
+
+New Targets and Target Specific Improvements
+
+     * Hans-Peter Nilsson has contributed a port to [8]MMIX, the CPU
+       architecture used in new editions of Donald E. Knuth's The Art of
+       Computer Programming.
+     * [9]Axis Communications has contributed its port to the CRIS CPU
+       architecture, used in the ETRAX system-on-a-chip series. See
+       [10]Axis' developer site for technical information.
+     * Alexandre Oliva, of Red Hat, has contributed a port to the
+       [11]SuperH SH5 64-bit RISC microprocessor architecture, extending
+       the existing SH port.
+     * UltraSPARC is fully supported in 64-bit mode. The option -m64
+       enables it.
+     * For compatibility with the Sun compiler #pragma redefine_extname
+       has been implemented on Solaris.
+     * The x86 back end has had some noticeable work done to it.
+          + SuSE Labs developers Jan Hubicka, Bo Thorsen and Andreas
+            Jaeger have contributed a port to the AMD x86-64 architecture.
+            For more information on x86-64 see [12]http://www.x86-64.org.
+          + The compiler now supports MMX, 3DNow!, SSE, and SSE2
+            instructions. Options -mmmx, -m3dnow, -msse, and -msse2 will
+            enable the respective instruction sets. Intel C++ compatible
+            MMX/3DNow!/SSE intrinsics are implemented. SSE2 intrinsics
+            will be added in next major release.
+          + Following those improvements, targets for Pentium MMX, K6-2,
+            K6-3, Pentium III, Pentium 4, and Athlon 4 Mobile/XP/MP were
+            added. Refer to the documentation on -march= and -mcpu=
+            options for details.
+          + For those targets that support it, -mfpmath=sse will cause the
+            compiler to generate SSE/SSE2 instructions for floating point
+            math instead of x87 instructions. Usually, this will lead to
+            quicker code — especially on the Pentium 4. Note that only
+            scalar floating point instructions are used and GCC does not
+            exploit SIMD features yet.
+          + Prefetch support has been added to the Pentium III, Pentium 4,
+            K6-2, K6-3, and Athlon series.
+          + Code generated for floating point to integer conversions has
+            been improved leading to better performance of many 3D
+            applications.
+     * The PowerPC back end has added 64-bit PowerPC GNU/Linux support.
+     * C++ support for AIX has been improved.
+     * Aldy Hernandez, of Red Hat, Inc, has contributed extensions to the
+       PowerPC port supporting the AltiVec programming model (SIMD). The
+       support, though presently useful, is experimental and is expected
+       to stabilize for 3.2. The support is written to conform to
+       Motorola's AltiVec specs. See -maltivec.
+
+Obsolete Systems
+
+   Support for a number of older systems has been declared obsolete in GCC
+   3.1. Unless there is activity to revive them, the next release of GCC
+   will have their sources permanently removed.
+
+   All configurations of the following processor architectures have been
+   declared obsolete:
+     * MIL-STD-1750A, 1750a-*-*
+     * AMD A29k, a29k-*-*
+     * Convex, c*-convex-*
+     * Clipper, clipper-*-*
+     * Elxsi, elxsi-*-*
+     * Intel i860, i860-*-*
+     * Sun picoJava, pj-*-* and pjl-*-*
+     * Western Electric 32000, we32k-*-*
+
+   Most configurations of the following processor architectures have been
+   declared obsolete, but we are preserving a few systems which may have
+   active developers. It is unlikely that the remaining systems will
+   survive much longer unless we see definite signs of port activity.
+     * Motorola 88000 except
+          + Generic a.out, m88k-*-aout*
+          + Generic SVR4, m88k-*-sysv4
+          + OpenBSD, m88k-*-openbsd*
+     * NS32k except
+          + NetBSD, ns32k-*-netbsd*
+          + OpenBSD, ns32k-*-openbsd*.
+     * ROMP except
+          + OpenBSD, romp-*-openbsd*.
+
+   Finally, only some configurations of these processor architectures are
+   being obsoleted.
+     * Alpha:
+          + OSF/1, alpha*-*-osf[123]*. (Digital Unix and Tru64 Unix, aka
+            alpha*-*-osf[45], are still supported.)
+     * ARM:
+          + RISCiX, arm-*-riscix*.
+     * i386:
+          + 386BSD, i?86-*-bsd*
+          + Chorus, i?86-*-chorusos*
+          + DG/UX, i?86-*-dgux*
+          + FreeBSD 1.x, i?86-*-freebsd1.*
+          + IBM AIX, i?86-*-aix*
+          + ISC UNIX, i?86-*-isc*
+          + GNU/Linux with pre-BFD linker, i?86-*-linux*oldld*
+          + NEXTstep, i?86-next-*
+          + OSF UNIX, i?86-*-osf1* and i?86-*-osfrose*
+          + RTEMS/coff, i?86-*-rtemscoff*
+          + RTEMS/go32, i?86-go32-rtems*
+          + Sequent/BSD, i?86-sequent-bsd*
+          + Sequent/ptx before version 3, i?86-sequent-ptx[12]* and
+            i?86-sequent-sysv3*
+          + SunOS, i?86-*-sunos*
+     * Motorola 68000:
+          + Altos, m68[k0]*-altos-*
+          + Apollo, m68[k0]*-apollo-*
+          + Apple A/UX, m68[k0]*-apple-*
+          + Bull, m68[k0]*-bull-*
+          + Convergent, m68[k0]*-convergent-*
+          + Generic SVR3, m68[k0]*-*-sysv3*
+          + ISI, m68[k0]*-isi-*
+          + LynxOS, m68[k0]*-*-lynxos*
+          + NEXT, m68[k0]*-next-*
+          + RTEMS/coff, m68[k0]*-*-rtemscoff*
+          + Sony, m68[k0]*-sony-*
+     * MIPS:
+          + DEC Ultrix, mips-*-ultrix* and mips-dec-*
+          + Generic BSD, mips-*-bsd*
+          + Generic System V, mips-*-sysv*
+          + IRIX before version 5, mips-sgi-irix[1234]*
+          + RiscOS, mips-*-riscos*
+          + Sony, mips-sony-*
+          + Tandem, mips-tandem-*
+     * SPARC:
+          + RTEMS/a.out, sparc-*-rtemsaout*.
+
+Documentation improvements
+
+     * The old manual ("Using and Porting the GNU Compiler Collection")
+       has been replaced by a users manual ("Using the GNU Compiler
+       Collection") and a separate internals reference manual ("GNU
+       Compiler Collection Internals").
+     * More complete and much improved documentation about GCC's internal
+       representation used by the C and C++ front ends.
+     * Many cleanups and improvements in general.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [13]GCC manuals. If that fails, the
+    [14]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [15]gcc@gcc.gnu.org. All of [16]our lists have public
+    archives.
+
+   Copyright (C) [17]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [18]maintained by the GCC team. Last modified
+   2014-06-28[19].
+
+References
+
+   1. https://gcc.gnu.org/ml/gcc/2002-07/msg01208.html
+   2. http://gcc.gnu.org/news/profiledriven.html
+   3. http://gcc.gnu.org/benchmarks/
+   4. http://gcc.gnu.org/c99status.html
+   5. https://gcc.gnu.org/onlinedocs/libstdc++/faq.html
+   6. https://gcc.gnu.org/onlinedocs/gcc-3.1.1/g77/News.html
+   7. http://www.adacore.com/
+   8. http://www-cs-faculty.stanford.edu/~knuth/mmix.html
+   9. http://www.axis.com/
+  10. http://developer.axis.com/
+  11. http://www.superh.com/
+  12. http://www.x86-64.org/
+  13. https://gcc.gnu.org/onlinedocs/
+  14. mailto:gcc-help@gcc.gnu.org
+  15. mailto:gcc@gcc.gnu.org
+  16. https://gcc.gnu.org/lists.html
+  17. http://www.fsf.org/
+  18. https://gcc.gnu.org/about.html
+  19. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.0/index.html
+                                   GCC 3.0.4
+
+   February 20, 2002
+
+   The [1]GNU project and the GCC developers are pleased to announce the
+   release of GCC 3.0.4, which is a bug-fix release for the GCC 3.0
+   series.
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   GCC 3.0.x has several new optimizations, new targets, new languages and
+   many other new features, relative to GCC 2.95.x. See the [2]new
+   features page for a more complete list.
+
+   A list of [3]successful builds is updated as new information becomes
+   available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, test results, bug fixes, etc to GCC. This
+   [4]amazing group of volunteers is what makes GCC successful.
+
+   And finally, we can't in good conscience fail to mention some
+   [5]caveats to using GCC 3.0.x.
+
+   For additional information about GCC please refer to the [6]GCC project
+   web site or contact the [7]GCC development mailing list.
+
+   To obtain GCC please use [8]our mirror sites, or our CVS server.
+     __________________________________________________________________
+
+Previous 3.0.x Releases
+
+   December 20, 2001: GCC 3.0.3 has been released.
+   October 25, 2001: GCC 3.0.2 has been released.
+   August 20, 2001: GCC 3.0.1 has been released.
+   June 18, 2001: GCC 3.0 has been released.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [9]GCC manuals. If that fails, the
+    [10]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [11]gcc@gcc.gnu.org. All of [12]our lists have public
+    archives.
+
+   Copyright (C) [13]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [14]maintained by the GCC team. Last modified
+   2014-06-28[15].
+
+References
+
+   1. http://www.gnu.org/
+   2. http://gcc.gnu.org/gcc-3.0/features.html
+   3. http://gcc.gnu.org/gcc-3.0/buildstat.html
+   4. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   5. http://gcc.gnu.org/gcc-3.0/caveats.html
+   6. http://gcc.gnu.org/index.html
+   7. mailto:gcc@gcc.gnu.org
+   8. http://gcc.gnu.org/mirrors.html
+   9. https://gcc.gnu.org/onlinedocs/
+  10. mailto:gcc-help@gcc.gnu.org
+  11. mailto:gcc@gcc.gnu.org
+  12. https://gcc.gnu.org/lists.html
+  13. http://www.fsf.org/
+  14. https://gcc.gnu.org/about.html
+  15. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.0/features.html
+                              GCC 3.0 New Features
+
+Additional changes in GCC 3.0.4
+
+     * GCC 3.0 now supports newer versions of the [1]NetBSD operating
+       system, which use the ELF object file format, on x86 processors.
+     * Correct debugging information is generated from functions that have
+       lines from multiple files (e.g. yacc output).
+     * A fix for whitespace handling in the -traditional preprocessor,
+       which can affect Fortran.
+     * Fixes to the exception handling runtime.
+     * More fixes for bad code generation in C++.
+     * A fix for shared library generation under AIX 4.3.
+     * Documentation updates.
+     * Port of GCC to Tensilica's Xtensa processor contributed.
+     * A fix for compiling the PPC Linux kernel (FAT fs wouldn't link).
+
+Additional changes in GCC 3.0.3
+
+     * A fix to correct an accidental change to the PowerPC ABI.
+     * Fixes for bad code generation on a variety of architectures.
+     * Improvements to the debugging information generated for C++
+       classes.
+     * Fixes for bad code generation in C++.
+     * A fix to avoid crashes in the C++ demangler.
+     * A fix to the C++ standard library to avoid buffer overflows.
+     * Miscellaneous improvements for a variety of architectures.
+
+Additional changes in GCC 3.0.2
+
+     * Fixes for bad code generation during loop unrolling.
+     * Fixes for bad code generation by the sibling call optimization.
+     * Minor improvements to x86 code generation.
+     * Implementation of function descriptors in C++ vtables for IA64.
+     * Numerous minor bug-fixes.
+
+Additional changes in GCC 3.0.1
+
+     * C++ fixes for incorrect code-generation.
+     * Improved cross-compiling support for the C++ standard library.
+     * Fixes for some embedded targets that worked in GCC 2.95.3, but not
+       in GCC 3.0.
+     * Fixes for various exception-handling bugs.
+     * A port to the S/390 architecture.
+
+General Optimizer Improvements
+
+     * [2]Basic block reordering pass.
+     * New if-conversion pass with support for conditional (predicated)
+       execution.
+     * New tail call and sibling call elimination optimizations.
+     * New register renaming pass.
+     * New (experimental) [3]static single assignment (SSA) representation
+       support.
+     * New dead-code elimination pass implemented using the SSA
+       representation.
+     * [4]Global null pointer test elimination.
+     * [5]Global code hoisting/unification.
+     * More builtins and optimizations for stdio.h, string.h and old BSD
+       functions, as well as for ISO C99 functions.
+     * New builtin __builtin_expect for giving hints to the branch
+       predictor.
+
+New Languages and Language specific improvements
+
+     * The GNU Compiler for the Java(TM) language (GCJ) is now integrated
+       and supported, including the run-time library containing most
+       common non-GUI Java classes, a bytecode interpreter, and the Boehm
+       conservative garbage collector. Many bugs have been fixed. GCJ can
+       compile Java source or Java bytecodes to either native code or Java
+       class files, and supports native methods written in either the
+       standard JNI or the more efficient and convenient CNI.
+     * Here is a [6]partial list of C++ improvements, both new features
+       and those no longer supported.
+     * New C++ ABI. On the IA-64 platform GCC is capable of
+       inter-operating with other IA-64 compilers.
+     * The new ABI also significantly reduces the size of symbol and debug
+       information.
+     * New [7]C++ support library and many C++ bug fixes, vastly improving
+       our conformance to the ISO C++ standard.
+     * New [8]inliner for C++.
+     * Rewritten C preprocessor, integrated into the C, C++ and Objective
+       C compilers, with very many improvements including ISO C99 support
+       and [9]improvements to dependency generation.
+     * Support for more [10]ISO C99 features.
+     * Many improvements to support for checking calls to format functions
+       such as printf and scanf, including support for ISO C99 format
+       features, extensions from the Single Unix Specification and GNU
+       libc 2.2, checking of strfmon formats and features to assist in
+       auditing for format string security bugs.
+     * New warnings for C code that may have undefined semantics because
+       of violations of sequence point rules in the C standard (such as a
+       = a++;, a[n] = b[n++]; and a[i++] = i;), included in -Wall.
+     * Additional warning option -Wfloat-equal.
+     * Improvements to -Wtraditional.
+     * Fortran improvements are listed in [11]the Fortran documentation.
+
+New Targets and Target Specific Improvements
+
+     * New x86 back end, generating much improved code.
+     * Support for a generic i386-elf target contributed.
+     * New option to emit x86 assembly code using Intel style syntax
+       (-mintel-syntax).
+     * HPUX 11 support contributed.
+     * Improved PowerPC code generation, including scheduled prologue and
+       epilogue.
+     * Port of GCC to Intel's IA-64 processor contributed.
+     * Port of GCC to Motorola's MCore 210 and 340 contributed.
+     * New unified back-end for Arm, Thumb and StrongArm contributed.
+     * Port of GCC to Intel's XScale processor contributed.
+     * Port of GCC to Atmel's AVR microcontrollers contributed.
+     * Port of GCC to Mitsubishi's D30V processor contributed.
+     * Port of GCC to Matsushita's AM33 processor (a member of the MN10300
+       processor family) contributed.
+     * Port of GCC to Fujitsu's FR30 processor contributed.
+     * Port of GCC to Motorola's 68HC11 and 68HC12 processors contributed.
+     * Port of GCC to Sun's picoJava processor core contributed.
+
+Documentation improvements
+
+     * Substantially rewritten and improved C preprocessor manual.
+     * Many improvements to other documentation.
+     * Manpages for gcc, cpp and gcov are now generated automatically from
+       the master Texinfo manual, eliminating the problem of manpages
+       being out of date. (The generated manpages are only extracts from
+       the full manual, which is provided in Texinfo form, from which
+       info, HTML, other formats and a printed manual can be generated.)
+     * Generated info files are included in the release tarballs alongside
+       their Texinfo sources, avoiding problems on some platforms with
+       building makeinfo as part of the GCC distribution.
+
+Other significant improvements
+
+     * Garbage collection used internally by the compiler for most memory
+       allocation instead of obstacks.
+     * Lengauer and Tarjan algorithm used for computing dominators in the
+       CFG. This algorithm can be significantly faster and more space
+       efficient than our older algorithm.
+     * gccbug script provided to assist in submitting bug reports to our
+       bug tracking system. (Bug reports previously submitted directly to
+       our mailing lists, for which you received no bug tracking number,
+       should be submitted again using gccbug if you can reproduce the
+       problem with GCC 3.0.)
+     * The internal libgcc library is [12]built as a shared library on
+       systems that support it.
+     * Extensive testsuite included with GCC, with many new tests. In
+       addition to tests for GCC bugs that have been fixed, many tests
+       have been added for language features, compiler warnings and
+       builtin functions.
+     * Additional language-independent warning options -Wpacked, -Wpadded,
+       -Wunreachable-code and -Wdisabled-optimization.
+     * Target-independent options -falign-functions, -falign-loops and
+       -falign-jumps.
+
+   Plus a great many bug fixes and almost all the [13]features found in
+   GCC 2.95.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [14]GCC manuals. If that fails, the
+    [15]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [16]gcc@gcc.gnu.org. All of [17]our lists have public
+    archives.
+
+   Copyright (C) [18]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [19]maintained by the GCC team. Last modified
+   2014-06-28[20].
+
+References
+
+   1. http://www.netbsd.org/
+   2. http://gcc.gnu.org/news/reorder.html
+   3. http://gcc.gnu.org/news/ssa.html
+   4. http://gcc.gnu.org/news/null.html
+   5. http://gcc.gnu.org/news/unify.html
+   6. http://gcc.gnu.org/gcc-3.0/c++features.html
+   7. http://gcc.gnu.org/libstdc++/
+   8. http://gcc.gnu.org/news/inlining.html
+   9. http://gcc.gnu.org/news/dependencies.html
+  10. http://gcc.gnu.org/c99status.html
+  11. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
+  12. http://gcc.gnu.org/gcc-3.0/libgcc.html
+  13. http://gcc.gnu.org/gcc-2.95/features.html
+  14. https://gcc.gnu.org/onlinedocs/
+  15. mailto:gcc-help@gcc.gnu.org
+  16. mailto:gcc@gcc.gnu.org
+  17. https://gcc.gnu.org/lists.html
+  18. http://www.fsf.org/
+  19. https://gcc.gnu.org/about.html
+  20. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-3.0/caveats.html
+                                GCC 3.0 Caveats
+
+     * -fstrict-aliasing is now part of -O2 and higher optimization
+       levels. This allows the compiler to assume the strictest aliasing
+       rules applicable to the language being compiled. For C and C++,
+       this activates optimizations based on the type of expressions. This
+       optimization may thus break old, non-compliant code.
+     * Enumerations are now properly promoted to int in function
+       parameters and function returns. Normally this change is not
+       visible, but when using -fshort-enums this is an ABI change.
+     * The undocumented extension that allowed C programs to have a label
+       at the end of a compound statement has been deprecated and may be
+       removed in a future version. Programs that now generate a warning
+       about this may be fixed by adding a null statement (a single
+       semicolon) after the label.
+     * The poorly documented extension that allowed string constants in C,
+       C++ and Objective C to contain unescaped newlines has been
+       deprecated and may be removed in a future version. Programs using
+       this extension may be fixed in several ways: the bare newline may
+       be replaced by \n, or preceded by \n\, or string concatenation may
+       be used with the bare newline preceded by \n" and " placed at the
+       start of the next line.
+     * The Chill compiler is not included in GCC 3.0, because of the lack
+       of a volunteer to convert it to use garbage collection.
+     * Certain non-standard iostream methods from earlier versions of
+       libstdc++ are not included in libstdc++ v3, i.e. filebuf::attach,
+       ostream::form, and istream::gets.
+     * The new C++ ABI is not yet fully supported by current (as of
+       2001-07-01) releases and development versions of GDB, or any
+       earlier versions. There is a problem setting breakpoints by line
+       number, and other related issues that have been fixed in GCC 3.0
+       but not yet handled in GDB:
+       [1]https://gcc.gnu.org/ml/gcc-bugs/2001-06/msg00421.html
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [2]GCC manuals. If that fails, the
+    [3]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [4]gcc@gcc.gnu.org. All of [5]our lists have public archives.
+
+   Copyright (C) [6]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [7]maintained by the GCC team. Last modified
+   2014-06-27[8].
+
+References
+
+   1. https://gcc.gnu.org/ml/gcc-bugs/2001-06/msg00421.html
+   2. https://gcc.gnu.org/onlinedocs/
+   3. mailto:gcc-help@gcc.gnu.org
+   4. mailto:gcc@gcc.gnu.org
+   5. https://gcc.gnu.org/lists.html
+   6. http://www.fsf.org/
+   7. https://gcc.gnu.org/about.html
+   8. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-2.95/index.html
+                                    GCC 2.95
+
+   March 16, 2001: The GNU project and the GCC developers are pleased to
+   announce the release of GCC version 2.95.3.
+
+Release History
+
+   GCC 2.95.3
+          March 16, 2001
+
+   GCC 2.95.2
+          October 27, 1999
+
+   GCC 2.95.1
+          August 19, 1999
+
+   GCC 2.95
+          July 31, 1999. This is the first release of GCC since the April
+          1999 GCC/EGCS reunification and includes nearly a year's worth
+          of new development and bugfixes.
+
+References and Acknowledgements
+
+   GCC used to stand for the GNU C Compiler, but since the compiler
+   supports several other languages aside from C, it now stands for the
+   GNU Compiler Collection.
+
+   The whole suite has been extensively [1]regression tested and
+   [2]package tested. It should be reliable and suitable for widespread
+   use.
+
+   The compiler has several new optimizations, new targets, new languages
+   and other new features. See the [3]new features page for a more
+   complete list of new features found in the GCC 2.95 releases.
+
+   The sources include installation instructions in both HTML and
+   plaintext forms in the install directory in the distribution. However,
+   the most up to date installation instructions and [4]build/test status
+   are on the web pages. We will update those pages as new information
+   becomes available.
+
+   The GCC developers would like to thank the numerous people that have
+   contributed new features, test results, bugfixes, etc to GCC. This
+   [5]amazing group of volunteers is what makes GCC successful.
+
+   And finally, we can't in good conscience fail to mention some
+   [6]caveats to using GCC 2.95.
+
+   Download GCC 2.95 from one of our many [7]mirror sites.
+
+   For additional information about GCC please see the [8]GCC project web
+   server or contact the [9]GCC development mailing list.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [10]GCC manuals. If that fails, the
+    [11]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [12]gcc@gcc.gnu.org. All of [13]our lists have public
+    archives.
+
+   Copyright (C) [14]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [15]maintained by the GCC team. Last modified
+   2014-06-28[16].
+
+References
+
+   1. http://gcc.gnu.org/gcc-2.95/regress.html
+   2. http://gcc.gnu.org/gcc-2.95/othertest.html
+   3. http://gcc.gnu.org/gcc-2.95/features.html
+   4. http://gcc.gnu.org/gcc-2.95/buildstat.html
+   5. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   6. http://gcc.gnu.org/gcc-2.95/caveats.html
+   7. http://gcc.gnu.org/mirrors.html
+   8. http://gcc.gnu.org/index.html
+   9. mailto:gcc@gcc.gnu.org
+  10. https://gcc.gnu.org/onlinedocs/
+  11. mailto:gcc-help@gcc.gnu.org
+  12. mailto:gcc@gcc.gnu.org
+  13. https://gcc.gnu.org/lists.html
+  14. http://www.fsf.org/
+  15. https://gcc.gnu.org/about.html
+  16. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-2.95/features.html
+                             GCC 2.95 New Features
+
+     * General Optimizer Improvements:
+          + [1]Localized register spilling to improve speed and code
+            density especially on small register class machines.
+          + [2]Global CSE using lazy code motion algorithms.
+          + [3]Improved global constant/copy propagation.
+          + [4]Improved control flow graph analysis and manipulation.
+          + [5]Local dead store elimination.
+          + [6]Memory Load hoisting/store sinking in loops.
+          + [7]Type based alias analysis is enabled by default. Note this
+            feature will expose bugs in the Linux kernel. Please refer to
+            the FAQ (as shipped with GCC 2.95) for additional information
+            on this issue.
+          + Major revamp of GIV detection, combination and simplification
+            to improve loop performance.
+          + Major improvements to register allocation and reloading.
+     * New Languages and Language specific improvements
+          + [8]Many C++ improvements.
+          + [9]Many Fortran improvements.
+          + [10]Java front-end has been integrated. [11]runtime library is
+            available separately.
+          + [12]ISO C99 support
+          + [13]Chill front-end and runtime has been integrated.
+          + Boehm garbage collector support in libobjc.
+          + More support for various pragmas which appear in vendor
+            include files
+     * New Targets and Target Specific Improvements
+          + [14]SPARC backend rewrite.
+          + -mschedule=8000 will optimize code for PA8000 class
+            processors; -mpa-risc-2-0 will generate code for PA2.0
+            processors
+          + Various micro-optimizations for the ia32 port. K6
+            optimizations
+          + Compiler will attempt to align doubles in the stack on the
+            ia32 port
+          + Alpha EV6 support
+          + PowerPC 750
+          + RS6000/PowerPC: -mcpu=401 was added as an alias for -mcpu=403.
+            -mcpu=e603e was added to do -mcpu=603e and -msoft-float.
+          + c3x, c4x
+          + HyperSPARC
+          + SparcLite86x
+          + sh4
+          + Support for new systems (OpenBSD, FreeBSD, UWIN, Interix,
+            arm-linux)
+          + vxWorks targets include support for vxWorks threads
+          + StrongARM 110 and ARM9 support added. ARM Scheduling
+            parameters rewritten.
+          + Various changes to the MIPS port to avoid assembler macros,
+            which in turn improves performance
+          + Various performance improvements to the i960 port.
+          + Major rewrite of ns32k port
+     * Other significant improvements
+          + [15]Ability to dump cfg information and display it using vcg.
+          + The new faster scheme for fixing vendor header files is
+            enabled by default.
+          + Experimental internationalization support.
+          + multibyte character support
+          + Some compile-time speedups for pathological problems
+          + Better support for complex types
+     * Plus the usual mountain of bugfixes
+     * Core compiler is based on the gcc2 development tree from Sept 30,
+       1998, so we have all of the [16]features found in GCC 2.8.
+
+Additional Changes in GCC 2.95.1
+
+     * Generic bugfixes and improvements
+          + Various documentation fixes related to the GCC/EGCS merger.
+          + Fix memory management bug which could lead to spurious aborts,
+            core dumps or random parsing errors in the compiler.
+          + Fix a couple bugs in the dwarf1 and dwarf2 debug record
+            support.
+          + Fix infinite loop in the CSE optimizer.
+          + Avoid undefined behavior in compiler FP emulation code
+          + Fix install problem when prefix is overridden on the make
+            install command.
+          + Fix problem with unwanted installation of assert.h on some
+            systems.
+          + Fix problem with finding the wrong assembler in a single tree
+            build.
+          + Avoid increasing the known alignment of a register that is
+            already known to be a pointer.
+     * Platform specific bugfixes and improvements
+          + Codegen bugfix for prologue/epilogue for cpu32 target.
+          + Fix long long code generation bug for the Coldfire target.
+          + Fix various aborts in the SH compiler.
+          + Fix bugs in libgcc support library for the SH.
+          + Fix alpha ev6 code generation bug.
+          + Fix problems with EXIT_SUCCESS/EXIT_FAILURE redefinitions on
+            AIX platforms.
+          + Fix -fpic code generation bug for rs6000/ppc svr4 targets.
+          + Fix varargs/stdarg code generation bug for rs6000/ppc svr4
+            targets.
+          + Fix weak symbol handling for rs6000/ppc svr4 targets.
+          + Fix various problems with 64bit code generation for the
+            rs6000/ppc port.
+          + Fix codegen bug which caused tetex to be mis-compiled on the
+            x86.
+          + Fix compiler abort in new cfg code exposed by x86 port.
+          + Fix out of range array reference in code convert flat
+            registers to the x87 stacked FP register file.
+          + Fix minor vxworks configuration bug.
+          + Fix return type of bsearch for SunOS 4.x.
+     * Language & Runtime specific fixes.
+          + The G++ signature extension has been deprecated. It will be
+            removed in the next major release of G++. Use of signatures
+            will result in a warning from the compiler.
+          + Several bugs relating to templates and namespaces were fixed.
+          + A bug that caused crashes when combining templates with -g on
+            DWARF1 platforms was fixed.
+          + Pointers-to-members, virtual functions, and multiple
+            inheritance should now work together correctly.
+          + Some code-generation bugs relating to function try blocks were
+            fixed.
+          + G++ is a little bit more lenient with certain archaic
+            constructs than in GCC 2.95.
+          + Fix to prevent shared library version #s from bring truncated
+            to 1 digit
+          + Fix missing std:: in the libstdc++ library.
+          + Fix stream locking problems in libio.
+          + Fix problem in java compiler driver.
+
+Additional Changes in GCC 2.95.2
+
+   The -fstrict-aliasing is not enabled by default for GCC 2.95.2. While
+   the optimizations performed by -fstrict-aliasing are valid according to
+   the C and C++ standards, the optimization have caused some problems,
+   particularly with old non-conforming code.
+
+   The GCC developers are experimenting with ways to warn users about code
+   which violates the C/C++ standards, but those warnings are not ready
+   for widespread use at this time. Rather than wait for those warnings
+   the GCC developers have chosen to disable -fstrict-aliasing by default
+   for the GCC 2.95.2 release.
+
+   We strongly encourage developers to find and fix code which violates
+   the C/C++ standards as -fstrict-aliasing may be enabled by default in
+   future releases. Use the option -fstrict-aliasing to re-enable these
+   optimizations.
+     * Generic bugfixes and improvements
+          + Fix incorrectly optimized memory reference in global common
+            subexpression elimination (GCSE) optimization pass.
+          + Fix code generation bug in regmove.c in which it could
+            incorrectly change a "const" value.
+          + Fix bug in optimization of conditionals involving volatile
+            memory references.
+          + Avoid over-allocation of stack space for some procedures.
+          + Fixed bug in the compiler which caused incorrect optimization
+            of an obscure series of bit manipulations, shifts and
+            arithmetic.
+          + Fixed register allocator bug which caused teTeX to be
+            mis-compiled on SPARC targets.
+          + Avoid incorrect optimization of degenerate case statements for
+            certain targets such as the ARM.
+          + Fix out of range memory reference in the jump optimizer.
+          + Avoid dereferencing null pointer in fix-header.
+          + Fix test for GCC specific features so that it is possible to
+            bootstrap with gcc-2.6.2 and older versions of GCC.
+          + Fix typo in scheduler which could potentially cause out of
+            range memory accesses.
+          + Avoid incorrect loop reversal which caused incorrect code for
+            certain loops on PowerPC targets.
+          + Avoid incorrect optimization of switch statements on certain
+            targets (for example the ARM).
+     * Platform specific bugfixes and improvements
+          + Work around bug in Sun V5.0 compilers which caused bootstrap
+            comparison failures on SPARC targets.
+          + Fix SPARC backend bug which caused aborts in final.c.
+          + Fix sparc-hal-solaris2* configuration fragments.
+          + Fix bug in sparc block profiling.
+          + Fix obscure code generation bug for the PARISC targets.
+          + Define __STDC_EXT__ for HPUX configurations.
+          + Various POWERPC64 code generation bugfixes.
+          + Fix abort for PPC targets using ELF (ex GNU/Linux).
+          + Fix collect2 problems for AIX targets.
+          + Correct handling of .file directive for PPC targets.
+          + Fix bug in fix_trunc x86 patterns.
+          + Fix x86 port to correctly pop the FP stack for functions that
+            return structures in memory.
+          + Fix minor bug in strlen x86 pattern.
+          + Use stabs debugging instead of dwarf1 for x86-solaris targets.
+          + Fix template repository code to handle leading underscore in
+            mangled names.
+          + Fix weak/weak alias support for OpenBSD.
+          + GNU/Linux for the ARM has C++ compatible include files.
+     * Language & Runtime specific fixes.
+          + Fix handling of constructor attribute in the C front-end which
+            caused problems building the Chill runtime library on some
+            targets.
+          + Fix minor problem merging type qualifiers in the C front-end.
+          + Fix aliasing bug for pointers and references (C/C++).
+          + Fix incorrect "non-constant initializer bug" when -traditional
+            or -fwritable-strings is enabled.
+          + Fix build error for Chill front-end on SunOS.
+          + Do not complain about duplicate instantiations when using
+            -frepo (C++).
+          + Fix array bounds handling in C++ front-end which caused
+            problems with dwarf debugging information in some
+            circumstances.
+          + Fix minor namespace problem.
+          + Fix problem linking java programs.
+
+Additional Changes in GCC 2.95.3
+
+     * Generic bugfixes and improvements
+          + Fix numerous problems that caused incorrect optimization in
+            the register reloading code.
+          + Fix numerous problems that caused incorrect optimization in
+            the loop optimizer.
+          + Fix aborts in the functions build_insn_chain and scan_loops
+            under some circumstances.
+          + Fix an alias analysis bug.
+          + Fix an infinite compilation bug in the combiner.
+          + A few problems with complex number support have been fixed.
+          + It is no longer possible for gcc to act as a fork bomb when
+            installed incorrectly.
+          + The -fpack-struct option should be recognized now.
+          + Fixed a bug that caused incorrect code to be generated due to
+            a lost stack adjustment.
+     * Platform specific bugfixes and improvements
+          + Support building ARM toolchains hosted on Windows.
+          + Fix attribute calculations in ARM toolchains.
+          + arm-linux support has been improved.
+          + Fix a PIC failure on sparc targets.
+          + On ix86 targets, the regparm attribute should now work
+            reliably.
+          + Several updates for the h8300 port.
+          + Fix problem building libio with glibc 2.2.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [17]GCC manuals. If that fails, the
+    [18]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [19]gcc@gcc.gnu.org. All of [20]our lists have public
+    archives.
+
+   Copyright (C) [21]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [22]maintained by the GCC team. Last modified
+   2014-06-28[23].
+
+References
+
+   1. http://gcc.gnu.org/news/spill.html
+   2. http://gcc.gnu.org/news/lcm.html
+   3. http://gcc.gnu.org/news/cprop.html
+   4. http://gcc.gnu.org/news/cfg.html
+   5. http://gcc.gnu.org/news/dse.html
+   6. http://gcc.gnu.org/news/hoist.html
+   7. http://gcc.gnu.org/news/alias.html
+   8. http://gcc.gnu.org/gcc-2.95/c++features.html
+   9. https://gcc.gnu.org/onlinedocs/gcc-3.4.6/g77/News.html
+  10. http://gcc.gnu.org/java/gcj-announce.txt
+  11. http://gcc.gnu.org/news/javaannounce.html
+  12. http://gcc.gnu.org/c99status.html
+  13. http://gcc.gnu.org/news/chill.html
+  14. http://gcc.gnu.org/news/sparc.html
+  15. http://gcc.gnu.org/news/egcs-vcg.html
+  16. http://gcc.gnu.org/egcs-1.0/features-2.8.html
+  17. https://gcc.gnu.org/onlinedocs/
+  18. mailto:gcc-help@gcc.gnu.org
+  19. mailto:gcc@gcc.gnu.org
+  20. https://gcc.gnu.org/lists.html
+  21. http://www.fsf.org/
+  22. https://gcc.gnu.org/about.html
+  23. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/gcc-2.95/caveats.html
+                                GCC 2.95 Caveats
+
+     * GCC 2.95 will issue an error for invalid asm statements that had
+       been silently accepted by earlier versions of the compiler. This is
+       particularly noticeable when compiling older versions of the Linux
+       kernel (2.0.xx). Please refer to the FAQ (as shipped with GCC 2.95)
+       for more information on this issue.
+     * GCC 2.95 implements type based alias analysis to disambiguate
+       memory references. Some programs, particularly the Linux kernel
+       violate ANSI/ISO aliasing rules and therefore may not operate
+       correctly when compiled with GCC 2.95. Please refer to the FAQ (as
+       shipped with GCC 2.95) for more information on this issue.
+     * GCC 2.95 has a known bug in its handling of complex variables for
+       64bit targets. Instead of silently generating incorrect code, GCC
+       2.95 will issue a fatal error for situations it can not handle.
+       This primarily affects the Fortran community as Fortran makes more
+       use of complex variables than C or C++.
+     * GCC 2.95 has an integrated libstdc++, but does not have an
+       integrated libg++. Furthermore old libg++ releases will not work
+       with GCC 2.95. You can retrieve a recent copy of libg++ from the
+       [1]GCC ftp server.
+       Note most C++ programs only need libstdc++.
+     * Exception handling may not work with shared libraries, particularly
+       on alphas, hppas, rs6000/powerpc and mips based platforms.
+       Exception handling is known to work on x86 GNU/Linux platforms with
+       shared libraries.
+     * In general, GCC 2.95 is more rigorous about rejecting invalid C++
+       code or deprecated C++ constructs than G++ 2.7, G++ 2.8, EGCS 1.0,
+       or EGCS 1.1. As a result it may be necessary to fix C++ code before
+       it will compile with GCC 2.95.
+     * G++ is also converting toward the ISO C++ standard; as a result
+       code which was previously valid (and thus accepted by other
+       compilers and older versions of g++) may no longer be accepted. The
+       flag -fpermissive may allow some non-conforming code to compile
+       with GCC 2.95.
+     * GCC 2.95 compiled C++ code is not binary compatible with EGCS
+       1.1.x, EGCS 1.0.x or GCC 2.8.x.
+     * GCC 2.95 does not have changes from the GCC 2.8 tree that were made
+       between Sept 30, 1998 and April 30, 1999 (the official end of the
+       GCC 2.8 project). Future GCC releases will include all the changes
+       from the defunct GCC 2.8 sources.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [2]GCC manuals. If that fails, the
+    [3]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [4]gcc@gcc.gnu.org. All of [5]our lists have public archives.
+
+   Copyright (C) [6]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [7]maintained by the GCC team. Last modified
+   2014-06-12[8].
+
+References
+
+   1. ftp://gcc.gnu.org/pub/gcc/infrastructure/libg++-2.8.1.3.tar.gz
+   2. https://gcc.gnu.org/onlinedocs/
+   3. mailto:gcc-help@gcc.gnu.org
+   4. mailto:gcc@gcc.gnu.org
+   5. https://gcc.gnu.org/lists.html
+   6. http://www.fsf.org/
+   7. https://gcc.gnu.org/about.html
+   8. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.1/index.html
+                                    EGCS 1.1
+
+   September 3, 1998: We are pleased to announce the release of EGCS 1.1.
+   December 1, 1998: We are pleased to announce the release of EGCS 1.1.1.
+   March 15, 1999: We are pleased to announce the release of EGCS 1.1.2.
+
+   EGCS is a free software project to further the development of the GNU
+   compilers using an open development environment.
+
+   EGCS 1.1 is a major new release of the EGCS compiler system. It has
+   been [1]extensively tested and is believed to be stable and suitable
+   for widespread use.
+
+   EGCS 1.1 is based on an June 6, 1998 snapshot of the GCC 2.8
+   development sources; it contains all of the new features found in GCC
+   2.8.1 as well as all new development from GCC up to June 6, 1998.
+
+   EGCS 1.1 also contains many improvements and features not found in GCC
+   or in older versions of EGCS:
+     * Global common subexpression elimination and global constant/copy
+       propagation (aka [2]gcse)
+     * Ongoing improvements to the [3]alias analysis support to allow for
+       better optimizations throughout the compiler.
+     * Vastly improved [4]C++ compiler and integrated C++ runtime
+       libraries.
+     * Fixes for the /tmp symlink race security problems.
+     * New targets including mips16, arm-thumb and 64 bit PowerPC.
+     * Improvements to GNU Fortran (g77) compiler and runtime library made
+       since g77 version 0.5.23.
+
+   See the [5]new features page for a more complete list of new features
+   found in EGCS 1.1 releases.
+
+   EGCS 1.1.1 is a minor update to fix several serious problems in EGCS
+   1.1:
+     * General improvements and fixes
+          + Avoid some stack overflows when compiling large functions.
+          + Avoid incorrect loop invariant code motions.
+          + Fix some core dumps on Linux kernel code.
+          + Bring back the imake -Di386 and friends fix from EGCS 1.0.2.
+          + Fix code generation problem in gcse.
+          + Various documentation related fixes.
+     * g++/libstdc++ improvements and fixes
+          + MT safe EH fix for setjmp/longjmp based exception handling.
+          + Fix a few bad interactions between optimization and exception
+            handling.
+          + Fixes for demangling of template names starting with "__".
+          + Fix a bug that would fail to run destructors in some cases
+            with -O2.
+          + Fix 'new' of classes with virtual bases.
+          + Fix crash building Qt on the Alpha.
+          + Fix failure compiling WIFEXITED macro on GNU/Linux.
+          + Fix some -frepo failures.
+     * g77 and libf2c improvements and fixes
+          + Various documentation fixes.
+          + Avoid compiler crash on RAND intrinsic.
+          + Fix minor bugs in makefiles exposed by BSD make programs.
+          + Define _XOPEN_SOURCE for libI77 build to avoid potential
+            problems on some 64-bit systems.
+          + Fix problem with implicit endfile on rewind.
+          + Fix spurious recursive I/O errors.
+     * platform specific improvements and fixes
+          + Match all versions of UnixWare7.
+          + Do not assume x86 SVR4 or UnixWare targets can handle stabs.
+          + Fix PPC/RS6000 LEGITIMIZE_ADDRESS macro and bug in conversion
+            from unsigned ints to double precision floats.
+          + Fix ARM ABI issue with NetBSD.
+          + Fix a few arm code generation bugs.
+          + Fixincludes will fix additional broken SCO OpenServer header
+            files.
+          + Fix a m68k backend bug which caused invalid offsets in reg+d
+            addresses.
+          + Fix problems with 64bit AIX 4.3 support.
+          + Fix handling of long longs for varargs/stdarg functions on the
+            ppc.
+          + Minor fixes to CPP predefines for Windows.
+          + Fix code generation problems with gpr<->fpr copies for 64bit
+            ppc.
+          + Fix a few coldfire code generation bugs.
+          + Fix some more header file problems on SunOS 4.x.
+          + Fix assert.h handling for RTEMS.
+          + Fix Windows handling of TREE_SYMBOL_REFERENCED.
+          + Fix x86 compiler abort in reg-stack pass.
+          + Fix cygwin/windows problem with section attributes.
+          + Fix Alpha code generation problem exposed by SMP Linux
+            kernels.
+          + Fix typo in m68k 32->64bit integer conversion.
+          + Make sure target libraries build with -fPIC for PPC & Alpha
+            targets.
+
+   EGCS 1.1.2 is a minor update to fix several serious problems in EGCS
+   1.1.1:
+     * General improvements and fixes
+          + Fix bug in loop optimizer which caused the SPARC (and
+            potentially other) ports to segfault.
+          + Fix infinite recursion in alias analysis and combiner code.
+          + Fix bug in regclass preferencing.
+          + Fix incorrect loop reversal which caused incorrect code to be
+            generated for several targets.
+          + Fix return value for builtin memcpy.
+          + Reduce compile time for certain loops which exposed quadratic
+            behavior in the loop optimizer.
+          + Fix bug which caused volatile memory to be written multiple
+            times when only one write was needed/desired.
+          + Fix compiler abort in caller-save.c
+          + Fix combiner bug which caused incorrect code generation for
+            certain division by constant operations.
+          + Fix incorrect code generation due to a bug in range check
+            optimizations.
+          + Fix incorrect code generation due to mis-handling of clobbered
+            values in CSE.
+          + Fix compiler abort/segfault due to incorrect register
+            splitting when unrolling loops.
+          + Fix code generation involving autoincremented addresses with
+            ternary operators.
+          + Work around bug in the scheduler which caused qt to be
+            mis-compiled on some platforms.
+          + Fix code generation problems with -fshort-enums.
+          + Tighten security for temporary files.
+          + Improve compile time for codes which make heavy use of
+            overloaded functions.
+          + Fix multiply defined constructor/destructor symbol problems.
+          + Avoid setting bogus RPATH environment variable during
+            bootstrap.
+          + Avoid GNU-make dependencies in the texinfo subdir.
+          + Install CPP wrapper script in $(prefix)/bin if --enable-cpp.
+            --enable-cpp=<dirname> can be used to specify an additional
+            install directory for the cpp wrapper script.
+          + Fix CSE bug which caused incorrect label-label refs to appear
+            on some platforms.
+          + Avoid linking in EH routines from libgcc if they are not
+            needed.
+          + Avoid obscure bug in aliasing code.
+          + Fix bug in weak symbol handling.
+     * Platform-specific improvements and fixes
+          + Fix detection of PPro/PII on Unixware 7.
+          + Fix compiler segfault when building spec99 and other programs
+            for SPARC targets.
+          + Fix code-generation bugs for integer and floating point
+            conditional move instructions on the PPro/PII.
+          + Use fixincludes to fix byteorder problems on i?86-*-sysv.
+          + Fix build failure for the arc port.
+          + Fix floating point format configuration for i?86-gnu port.
+          + Fix problems with hppa1.0-hp-hpux10.20 configuration when
+            threads are enabled.
+          + Fix coldfire code generation bugs.
+          + Fix "unrecognized insn" problems for Alpha and PPC ports.
+          + Fix h8/300 code generation problem with floating point values
+            in memory.
+          + Fix unrecognized insn problems for the m68k port.
+          + Fix namespace-pollution problem for the x86 port.
+          + Fix problems with old assembler on x86 NeXT systems.
+          + Fix PIC code-generation problems for the SPARC port.
+          + Fix minor bug with LONG_CALLS in PowerPC SVR4 support.
+          + Fix minor ISO namespace violation in Alpha varargs/stdarg
+            support.
+          + Fix incorrect "braf" instruction usage for the SH port.
+          + Fix minor bug in va-sh which prevented its use with -ansi.
+          + Fix problems recognizing and supporting FreeBSD.
+          + Handle OpenBSD systems correctly.
+          + Minor fixincludes fix for Digital UNIX 4.0B.
+          + Fix problems with ctors/dtors in SCO shared libraries.
+          + Abort instead of generating incorrect code for PPro/PII
+            floating point conditional moves.
+          + Avoid multiply defined symbols on GNU/Linux systems using
+            libc-5.4.xx.
+          + Fix abort in alpha compiler.
+     * Fortran-specific fixes
+          + Fix the IDate intrinsic (VXT) (in libg2c) so the returned year
+            is in the documented, non-Y2K-compliant range of 0-99, instead
+            of being returned as 100 in the year 2000.
+          + Fix the `Date_and_Time' intrinsic (in libg2c) to return the
+            milliseconds value properly in Values(8).
+          + Fix the `LStat' intrinsic (in libg2c) to return device-ID
+            information properly in SArray(7).
+
+   Each release includes installation instructions in both HTML and
+   plaintext forms (see the INSTALL directory in the toplevel directory of
+   the distribution). However, we also keep the most up to date
+   installation instructions and [6]build/test status on our web page. We
+   will update those pages as new information becomes available.
+
+   The EGCS project would like to thank the numerous people that have
+   contributed new features, test results, bugfixes, etc. This [7]amazing
+   group of volunteers is what makes EGCS successful.
+
+   And finally, we can't in good conscience fail to mention some
+   [8]caveats to using EGCS 1.1.
+
+   Download EGCS from egcs.cygnus.com (USA California).
+
+   The EGCS 1.1 release is also available on many mirror sites.
+   [9]Goto mirror list to find a closer site.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [10]GCC manuals. If that fails, the
+    [11]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [12]gcc@gcc.gnu.org. All of [13]our lists have public
+    archives.
+
+   Copyright (C) [14]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [15]maintained by the GCC team. Last modified
+   2014-06-28[16].
+
+References
+
+   1. http://gcc.gnu.org/egcs-1.1/egcs-1.1-test.html
+   2. http://gcc.gnu.org/news/gcse.html
+   3. http://gcc.gnu.org/news/alias.html
+   4. http://gcc.gnu.org/egcs-1.1/c++features.html
+   5. http://gcc.gnu.org/egcs-1.1/features.html
+   6. http://gcc.gnu.org/egcs-1.1/buildstat.html
+   7. https://gcc.gnu.org/onlinedocs/gcc/Contributors.html
+   8. http://gcc.gnu.org/egcs-1.1/caveats.html
+   9. http://gcc.gnu.org/mirrors.html
+  10. https://gcc.gnu.org/onlinedocs/
+  11. mailto:gcc-help@gcc.gnu.org
+  12. mailto:gcc@gcc.gnu.org
+  13. https://gcc.gnu.org/lists.html
+  14. http://www.fsf.org/
+  15. https://gcc.gnu.org/about.html
+  16. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.1/features.html
+                             EGCS 1.1 new features
+
+     * Integrated GNU Fortran (g77) compiler and runtime library with
+       improvements, based on g77 version 0.5.23.
+     * Vast improvements in the C++ compiler; so many they have [1]page of
+       their own!
+     * Compiler implements [2]global common subexpression elimination and
+       global copy/constant propagation.
+     * More major improvements in the [3]alias analysis code.
+     * More major improvements in the exception handling code to improve
+       performance, lower static overhead and provide the infrastructure
+       for future improvements.
+     * The infamous /tmp symlink race security problems have been fixed.
+     * The regmove optimization pass has been nearly completely rewritten
+       to improve performance of generated code.
+     * The compiler now recomputes register usage information before local
+       register allocation. By providing more accurate information to the
+       priority based allocator, we get better register allocation.
+     * The register reloading phase of the compiler optimizes spill code
+       much better than in previous releases.
+     * Some bad interactions between the register allocator and
+       instruction scheduler have been fixed, resulting in much better
+       code for certain programs. Additionally, we have tuned the
+       scheduler in various ways to improve performance of generated code
+       for some architectures.
+     * The compiler's branch shortening algorithms have been significantly
+       improved to work better on targets which align jump targets.
+     * The compiler now supports -Os to prefer optimizing for code space
+       over optimizing for code speed.
+     * The compiler will now totally eliminate library calls which compute
+       constant values. This primarily helps targets with no integer
+       div/mul support and targets without floating point support.
+     * The compiler now supports an extensive "--help" option.
+     * cpplib has been greatly improved and may be suitable for limited
+       use.
+     * Memory footprint for the compiler has been significantly reduced
+       for some pathological cases.
+     * The time to build EGCS has been improved for certain targets
+       (particularly the alpha and mips platforms).
+     * Many infrastructure improvements throughout the compiler, plus the
+       usual mountain of bugfixes and minor improvements.
+     * Target dependent improvements:
+          + SPARC port now includes V8 plus and V9 support as well as
+            performance tuning for Ultra class machines. The SPARC port
+            now uses the Haifa scheduler.
+          + Alpha port has been tuned for the EV6 processor and has an
+            optimized expansion of memcpy/bzero. The Alpha port now uses
+            the Haifa scheduler.
+          + RS6000/PowerPC: support for the Power64 architecture and AIX
+            4.3. The RS6000/PowerPC port now uses the Haifa scheduler.
+          + x86: Alignment of static store data and jump targets is per
+            Intel recommendations now. Various improvements throughout the
+            x86 port to improve performance on Pentium processors
+            (including improved epilogue sequences for Pentium chips and
+            backend improvements which should help register allocation on
+            all x86 variants. Conditional move support has been fixed and
+            enabled for PPro processors. The x86 port also better supports
+            64bit operations now. Unixware 7, a System V Release 5 target,
+            is now supported and SCO OpenServer targets can support GAS.
+          + MIPS has improved multiply/multiply-add support and now
+            includes mips16 ISA support.
+          + M68k has many micro-optimizations and Coldfire fixes.
+     * Core compiler is based on the GCC development tree from June 9,
+       1998, so we have all of the [4]features found in GCC 2.8.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [5]GCC manuals. If that fails, the
+    [6]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [7]gcc@gcc.gnu.org. All of [8]our lists have public archives.
+
+   Copyright (C) [9]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [10]maintained by the GCC team. Last modified
+   2014-06-12[11].
+
+References
+
+   1. http://gcc.gnu.org/egcs-1.1/c++features.html
+   2. http://gcc.gnu.org/news/gcse.html
+   3. http://gcc.gnu.org/news/alias.html
+   4. http://gcc.gnu.org/egcs-1.0/features-2.8.html
+   5. https://gcc.gnu.org/onlinedocs/
+   6. mailto:gcc-help@gcc.gnu.org
+   7. mailto:gcc@gcc.gnu.org
+   8. https://gcc.gnu.org/lists.html
+   9. http://www.fsf.org/
+  10. https://gcc.gnu.org/about.html
+  11. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.1/caveats.html
+                                EGCS 1.1 Caveats
+
+     * EGCS has an integrated libstdc++, but does not have an integrated
+       libg++. Furthermore old libg++ releases will not work with EGCS; HJ
+       Lu has made a libg++-2.8.1.2 snapshot available which may work with
+       EGCS.
+       Note most C++ programs only need libstdc++.
+     * Exception handling may not work with shared libraries, particularly
+       on alphas, hppas, rs6000/powerpc and mips based platforms.
+       Exception handling is known to work on x86-linux platforms with
+       shared libraries.
+     * Some versions of the Linux kernel have bugs which prevent them from
+       being compiled or from running when compiled by EGCS. See the FAQ
+       (as shipped with EGCS 1.1) for additional information.
+     * In general, EGCS is more rigorous about rejecting invalid C++ code
+       or deprecated C++ constructs than g++-2.7, g++-2.8 or EGCS 1.0. As
+       a result it may be necessary to fix C++ code before it will compile
+       with EGCS.
+     * G++ is also converting toward the ISO C++ standard; as a result
+       code which was previously valid (and thus accepted by other
+       compilers and older versions of g++) may no longer be accepted.
+     * EGCS 1.1 compiled C++ code is not binary compatible with EGCS 1.0.x
+       or GCC 2.8.x due to changes necessary to support thread safe
+       exception handling.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [1]GCC manuals. If that fails, the
+    [2]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [3]gcc@gcc.gnu.org. All of [4]our lists have public archives.
+
+   Copyright (C) [5]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [6]maintained by the GCC team. Last modified
+   2014-06-12[7].
+
+References
+
+   1. https://gcc.gnu.org/onlinedocs/
+   2. mailto:gcc-help@gcc.gnu.org
+   3. mailto:gcc@gcc.gnu.org
+   4. https://gcc.gnu.org/lists.html
+   5. http://www.fsf.org/
+   6. https://gcc.gnu.org/about.html
+   7. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.0/index.html
+                                    EGCS 1.0
+
+   December 3, 1997: We are pleased to announce the release of EGCS 1.0.
+   January 6, 1998: We are pleased to announce the release of EGCS 1.0.1.
+   March 16, 1998: We are pleased to announce the release of EGCS 1.0.2.
+   May 15, 1998 We are pleased to announce the release of EGCS 1.0.3.
+
+   EGCS is a collaborative effort involving several groups of hackers
+   using an open development model to accelerate development and testing
+   of GNU compilers and runtime libraries.
+
+   An important goal of EGCS is to allow wide scale testing of
+   experimental features and optimizations; therefore, EGCS contains some
+   features and optimizations which are still under development. However,
+   EGCS has been carefully tested and should be comparable in quality to
+   most GCC releases.
+
+   EGCS 1.0 is based on an August 2, 1997 snapshot of the GCC 2.8
+   development sources; it contains nearly all of the new features found
+   in GCC 2.8.
+
+   EGCS 1.0 also contains many improvements and features not found in GCC
+   2.7 and even the GCC 2.8 series (which was released after the original
+   EGCS 1.0 release).
+     * Integrated C++ runtime libraries, including support for most major
+       GNU/Linux systems!
+     * The integrated libstdc++ library includes a verbatim copy of SGI's
+       STL release.
+     * Integrated GNU Fortran compiler.
+     * New instruction scheduler.
+     * New alias analysis code.
+
+   See the [1]new features page for a more complete list of new features.
+
+   EGCS 1.0.1 is a minor update to the EGCS 1.0 compiler to fix a few
+   critical bugs and add support for Red Hat 5.0 Linux. Changes since the
+   EGCS 1.0 release:
+     * Add support for Red Hat 5.0 Linux and better support for Linux
+       systems using glibc2.
+       Many programs failed to link when compiled with EGCS 1.0 on Red Hat
+       5.0 or on systems with newer versions of glibc2. EGCS 1.0.1 should
+       fix these problems.
+     * Compatibility with both EGCS 1.0 and GCC 2.8 libgcc exception
+       handling interfaces.
+       To avoid future compatibility problems, we strongly urge anyone who
+       is planning on distributing shared libraries that contain C++ code
+       to upgrade to EGCS 1.0.1 first.
+       Soon after EGCS 1.0 was released, the GCC developers made some
+       incompatible changes in libgcc's exception handling interfaces.
+       These changes were needed to solve problems on some platforms. This
+       means that GCC 2.8.0, when released, will not be seamlessly
+       compatible with shared libraries built by EGCS 1.0. The reason is
+       that the libgcc.a in GCC 2.8.0 will not contain a function needed
+       by the old interface.
+       The result of this is that there may be compatibility problems with
+       shared libraries built by EGCS 1.0 when used with GCC 2.8.0.
+       With EGCS 1.0.1, generated code uses the new (GCC 2.8.0) interface,
+       and libgcc.a has the support routines for both the old and the new
+       interfaces (so EGCS 1.0.1 and EGCS 1.0 code can be freely mixed,
+       and EGCS 1.0.1 and GCC 2.8.0 code can be freely mixed).
+       The maintainers of GCC 2.x have decided against including seamless
+       support for the old interface in 2.8.0, since it was never
+       "official", so to avoid future compatibility problems we recommend
+       against distributing any shared libraries built by EGCS 1.0 that
+       contain C++ code (upgrade to 1.0.1 and use that).
+     * Various bugfixes in the x86, hppa, mips, and rs6000/ppc back ends.
+       The x86 changes fix code generation errors exposed when building
+       glibc2 and the usual GNU/Linux dynamic linker (ld.so).
+       The hppa change fixes a compiler abort when configured for use with
+       RTEMS.
+       The MIPS changes fix problems with the definition of LONG_MAX on
+       newer systems, allow for command line selection of the target ABI,
+       and fix one code generation problem.
+       The rs6000/ppc change fixes some problems with passing structures
+       to varargs/stdarg functions.
+     * A few machine independent bugfixes, mostly to fix code generation
+       errors when building Linux kernels or glibc.
+     * Fix a few critical exception handling and template bugs in the C++
+       compiler.
+     * Fix Fortran namelist bug on alphas.
+     * Fix build problems on x86-solaris systems.
+
+   EGCS 1.0.2 is a minor update to the EGCS 1.0.1 compiler to fix several
+   serious problems in EGCS 1.0.1.
+     * General improvements and fixes
+          + Memory consumption significantly reduced, especially for
+            templates and inline functions.
+          + Fix various problems with glibc2.1.
+          + Fix loop optimization bug exposed by rs6000/ppc port.
+          + Fix to avoid potential code generation problems in jump.c.
+          + Fix some undefined symbol problems in dwarf1 debug support.
+     * g++/libstdc++ improvements and fixes
+          + libstdc++ in the EGCS release has been updated and should be
+            link compatible with libstdc++-2.8.
+          + Various fixes in libio/libstdc++ to work better on GNU/Linux
+            systems.
+          + Fix problems with duplicate symbols on systems that do not
+            support weak symbols.
+          + Memory corruption bug and undefined symbols in bastring have
+            been fixed.
+          + Various exception handling fixes.
+          + Fix compiler abort for very long thunk names.
+     * g77 improvements and fixes
+          + Fix compiler crash for omitted bound in Fortran CASE
+            statement.
+          + Add missing entries to g77 lang-options.
+          + Fix problem with -fpedantic in the g77 compiler.
+          + Fix "backspace" problem with g77 on alphas.
+          + Fix x86 backend problem with Fortran literals and -fpic.
+          + Fix some of the problems with negative subscripts for g77 on
+            alphas.
+          + Fixes for Fortran builds on cygwin32/mingw32.
+     * platform specific improvements and fixes
+          + Fix long double problems on x86 (exposed by glibc).
+          + x86 ports define i386 again to keep imake happy.
+          + Fix exception handling support on NetBSD ports.
+          + Several changes to collect2 to fix many problems with AIX.
+          + Define __ELF__ for GNU/Linux on rs6000.
+          + Fix -mcall-linux problem on GNU/Linux on rs6000.
+          + Fix stdarg/vararg problem for GNU/Linux on rs6000.
+          + Allow autoconf to select a proper install problem on AIX 3.1.
+          + m68k port support includes -mcpu32 option as well as cpu32
+            multilibs.
+          + Fix stdarg bug for irix6.
+          + Allow EGCS to build on irix5 without the gnu assembler.
+          + Fix problem with static linking on sco5.
+          + Fix bootstrap on sco5 with native compiler.
+          + Fix for abort building newlib on H8 target.
+          + Fix fixincludes handling of math.h on SunOS.
+          + Minor fix for Motorola 3300 m68k systems.
+
+   EGCS 1.0.3 is a minor update to the EGCS 1.0.2 compiler to fix a few
+   problems reported by Red Hat for builds of Red Hat 5.1.
+     * Generic bugfixes:
+          + Fix a typo in the libio library which resulted in incorrect
+            behavior of istream::get.
+          + Fix the Fortran negative array index problem.
+          + Fix a major problem with the ObjC runtime thread support
+            exposed by glibc2.
+          + Reduce memory consumption of the Haifa scheduler.
+     * Target specific bugfixes:
+          + Fix one x86 floating point code generation bug exposed by
+            glibc2 builds.
+          + Fix one x86 internal compiler error exposed by glibc2 builds.
+          + Fix profiling bugs on the Alpha.
+          + Fix ImageMagick & emacs 20.2 build problems on the Alpha.
+          + Fix rs6000/ppc bug when converting values from integer types
+            to floating point types.
+
+   The EGCS 1.0 releases include installation instructions in both HTML
+   and plaintext forms (see the INSTALL directory in the toplevel
+   directory of the distribution). However, we also keep the most up to
+   date installation instructions and [2]build/test status on our web
+   page. We will update those pages as new information becomes available.
+
+   And, we can't in good conscience fail to mention some [3]caveats to
+   using EGCS.
+
+   Update: Big thanks to Stanford for providing a high speed link for
+   downloading EGCS (go.cygnus.com)!
+
+   Download EGCS from ftp.cygnus.com (USA California) or go.cygnus.com
+   (USA California -- High speed link provided by Stanford).
+
+   The EGCS 1.0 release is also available many mirror sites.
+   [4]Goto mirror list to find a closer site
+
+   We'd like to thank the numerous people that have contributed new
+   features, test results, bugfixes, etc. Unfortunately, they're far too
+   numerous to mention by name.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [5]GCC manuals. If that fails, the
+    [6]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [7]gcc@gcc.gnu.org. All of [8]our lists have public archives.
+
+   Copyright (C) [9]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [10]maintained by the GCC team. Last modified
+   2014-06-28[11].
+
+References
+
+   1. http://gcc.gnu.org/egcs-1.0/features.html
+   2. http://gcc.gnu.org/egcs-1.0/buildstat.html
+   3. http://gcc.gnu.org/egcs-1.0/caveats.html
+   4. http://gcc.gnu.org/mirrors.html
+   5. https://gcc.gnu.org/onlinedocs/
+   6. mailto:gcc-help@gcc.gnu.org
+   7. mailto:gcc@gcc.gnu.org
+   8. https://gcc.gnu.org/lists.html
+   9. http://www.fsf.org/
+  10. https://gcc.gnu.org/about.html
+  11. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.0/features.html
+                               EGCS 1.0 features
+
+     * Core compiler is based on the gcc2 development tree from Aug 2,
+       1997, so we have most of the [1]features found in GCC 2.8.
+     * Integrated GNU Fortran compiler based on g77-0.5.22-19970929.
+     * Vast improvements in the C++ compiler; so many they have [2]page of
+       their own!
+     * Integrated C++ runtime libraries, including support for most major
+       GNU/Linux systems!
+     * New instruction scheduler from IBM Haifa which includes support for
+       function wide instruction scheduling as well as superscalar
+       scheduling.
+     * Significantly improved alias analysis code.
+     * Improved register allocation for two address machines.
+     * Significant code generation improvements for Fortran code on
+       Alphas.
+     * Various optimizations from the g77 project as well as improved loop
+       optimizations.
+     * Dwarf2 debug format support for some targets.
+     * egcs libstdc++ includes the SGI STL implementation without changes.
+     * As a result of these and other changes, egcs libstc++ is not binary
+       compatible with previous releases of libstdc++.
+     * Various new ports -- UltraSPARC, Irix6.2 & Irix6.3 support, The SCO
+       Openserver 5 family (5.0.{0,2,4} and Internet FastStart 1.0 and
+       1.1), Support for RTEMS on several embedded targets, Support for
+       arm-linux, Mitsubishi M32R, Hitachi H8/S, Matsushita MN102 and
+       MN103, NEC V850, Sparclet, Solaris & GNU/Linux on PowerPCs, etc.
+     * Integrated testsuites for gcc, g++, g77, libstdc++ and libio.
+     * RS6000/PowerPC ports generate code which can run on all
+       RS6000/PowerPC variants by default.
+     * -mcpu= and -march= switches for the x86 port to allow better
+       control over how the x86 port generates code.
+     * Includes the template repository patch (aka repo patch); note the
+       new template code makes repo obsolete for ELF systems using gnu-ld
+       such as GNU/Linux.
+     * Plus the usual assortment of bugfixes and improvements.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [3]GCC manuals. If that fails, the
+    [4]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [5]gcc@gcc.gnu.org. All of [6]our lists have public archives.
+
+   Copyright (C) [7]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [8]maintained by the GCC team. Last modified
+   2014-06-12[9].
+
+References
+
+   1. http://gcc.gnu.org/egcs-1.0/features-2.8.html
+   2. http://gcc.gnu.org/egcs-1.0/c++features.html
+   3. https://gcc.gnu.org/onlinedocs/
+   4. mailto:gcc-help@gcc.gnu.org
+   5. mailto:gcc@gcc.gnu.org
+   6. https://gcc.gnu.org/lists.html
+   7. http://www.fsf.org/
+   8. https://gcc.gnu.org/about.html
+   9. http://validator.w3.org/check/referer
+======================================================================
+http://gcc.gnu.org/egcs-1.0/caveats.html
+                                EGCS 1.0 Caveats
+
+     * EGCS has an integrated libstdc++, but does not have an integrated
+       libg++. Furthermore old libg++ releases will not work with egc; HJ
+       Lu has made a libg++-2.8.1.2 available which may work with EGCS.
+       Note most C++ programs only need libstdc++.
+     * Note that using -pedantic or -Wreturn-type can cause an explosion
+       in the amount of memory needed for template-heavy C++ code, such as
+       code that uses STL. Also note that -Wall includes -Wreturn-type, so
+       if you use -Wall you will need to specify -Wno-return-type to turn
+       it off.
+     * Exception handling may not work with shared libraries, particularly
+       on alphas, hppas, and mips based platforms. Exception handling is
+       known to work on x86-linux platforms with shared libraries.
+     * Some versions of the Linux kernel have bugs which prevent them from
+       being compiled or from running when compiled by EGCS. See the FAQ
+       (as shipped with EGCS 1.0) for additional information.
+     * In general, EGCS is more rigorous about rejecting invalid C++ code
+       or deprecated C++ constructs than G++ 2.7. As a result it may be
+       necessary to fix C++ code before it will compile with EGCS.
+     * G++ is also aggressively tracking the C++ standard; as a result
+       code which was previously valid (and thus accepted by other
+       compilers and older versions of G++) may no longer be accepted.
+     * EGCS 1.0 may not work with Red Hat Linux 5.0 on all targets. EGCS
+       1.0.x and later releases should work with Red Hat Linux 5.0.
+
+
+    For questions related to the use of GCC, please consult these web
+    pages and the [1]GCC manuals. If that fails, the
+    [2]gcc-help@gcc.gnu.org mailing list might help. Comments on these
+    web pages and the development of GCC are welcome on our developer
+    list at [3]gcc@gcc.gnu.org. All of [4]our lists have public archives.
+
+   Copyright (C) [5]Free Software Foundation, Inc. Verbatim copying and
+   distribution of this entire article is permitted in any medium,
+   provided this notice is preserved.
+
+   These pages are [6]maintained by the GCC team. Last modified
+   2014-06-12[7].
+
+References
+
+   1. https://gcc.gnu.org/onlinedocs/
+   2. mailto:gcc-help@gcc.gnu.org
+   3. mailto:gcc@gcc.gnu.org
+   4. https://gcc.gnu.org/lists.html
+   5. http://www.fsf.org/
+   6. https://gcc.gnu.org/about.html
+   7. http://validator.w3.org/check/referer
+======================================================================
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+   <head>
+ 
+    <meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+    <link rev="made" href="mailto:gcc@gcc.gnu.org" />
+    <link rel="stylesheet" type="text/css" href="https://gcc.gnu.org/gcc.css" />
+  
+ <title>
+GCC 5 Release Series &mdash; Changes, New Features, and Fixes
+- GNU Project - Free Software Foundation (FSF)</title>
+   </head>
+ 
+
+<!-- GCC maintainers, please do not hesitate to update/contribute entries
+     concerning those part of GCC you maintain!  2002-03-23, Gerald.
+-->
+
+<body>
+
+
+
+<h1>GCC 5 Release Series<br />Changes, New Features, and Fixes</h1>
+
+
+<h2>Caveats</h2>
+  <ul>
+    <li>The default mode for C is now <code>-std=gnu11</code> instead of
+        <code>-std=gnu89</code>.</li>
+    <li>The C++ runtime library (libstdc++) uses a new ABI by default
+        (see <a href="#libstdcxx">below</a>).</li>
+    <li>The Graphite framework for loop optimizations no longer requires the
+	CLooG library, only ISL version 0.14 (recommended) or 0.12.2.  The
+        installation manual contains more information about requirements to
+        build GCC.</li>
+    <li>The non-standard C++0x type traits
+        <code>has_trivial_default_constructor</code>,
+        <code>has_trivial_copy_constructor</code> and
+        <code>has_trivial_copy_assign</code> have been deprecated and will
+        be removed in a future version. The standard C++11 traits
+        <code>is_trivially_default_constructible</code>,
+        <code>is_trivially_copy_constructible</code> and
+        <code>is_trivially_copy_assignable</code> should be used instead.</li>
+  </ul>
+
+<h2 id="general">General Optimizer Improvements</h2>
+
+  <ul>
+    <li>Inter-procedural optimization improvements:
+    <ul>
+     <li>An Identical Code Folding (ICF) pass (controlled via
+	 <code>-fipa-icf</code>) has been added.  Compared to the identical
+	 code folding performed by the Gold linker this
+	 pass does not require function sections.  It also performs merging
+	 before inlining, so inter-procedural optimizations are aware of the
+	 code re-use. On the other hand not all unifications performed
+	 by a linker are doable by GCC which must honor
+	 aliasing information. During link-time optimization of Firefox,
+	 this pass unifies about 31000 functions, that is 14% overall.</li>
+     <li>The devirtualization pass was significantly improved by adding
+	 better support for speculative devirtualization and dynamic type
+	 detection. About 50% of virtual calls in Firefox are now
+	 speculatively devirtualized during link-time optimization.</li>
+     <li>A new comdat localization pass allows the linker to eliminate more
+         dead code in presence of C++ inline functions.</li>
+     <li>Virtual tables are now optimized. Local aliases are used to reduce
+	 dynamic linking time of C++ virtual tables on ELF targets and
+	 data alignment has been reduced to limit data segment bloat.</li>
+     <li>A new <code>-fno-semantic-interposition</code> option can be used
+	 to improve code quality of shared libraries where interposition of
+	 exported symbols is not allowed.</li>
+     <li>Write-only variables are now detected and optimized out.</li>
+     <li>With profile feedback the function inliner can now bypass
+	 <code>--param inline-insns-auto</code> and <code>--param
+	 inline-insns-single</code> limits for hot calls.</li>
+     <li>The IPA reference pass was significantly sped up making it feasible
+	 to enable <code>-fipa-reference</code> with
+	 <code>-fprofile-generate</code>. This also solves a bottleneck
+	 seen when building Chromium with link-time optimization.</li>
+     <li>The symbol table and call-graph API was reworked to C++ and
+	 simplified.</li>
+     <li>The interprocedural propagation of constants now also propagates
+         alignments of pointer parameters.  This for example means that the
+         vectorizer often does not need to generate loop prologues and epilogues
+         to make up for potential misalignments.</li>
+    </ul></li>
+    <li>Link-time optimization improvements:
+    <ul>
+      <li>One Definition Rule based merging of C++ types has been implemented.
+	  Type merging enables better devirtualization and alias analysis.
+	  Streaming extra information needed to merge types adds about 2-6% of
+	  memory size and object size increase. This can be controlled by
+	  <code>-flto-odr-type-merging</code>.</li>
+       <li><p>Command-line optimization and target options are now streamed on
+	  a per-function basis and honored by the link-time optimizer.
+	  This change makes link-time optimization a more transparent
+	  replacement of per-file optimizations.
+	  It is now possible to build projects that require
+	  different optimization
+	  settings for different translation units (such as
+	  <code>-ffast-math</code>, <code>-mavx</code>, or
+	  <code>-finline</code>).
+	  Contrary to earlier GCC releases, the optimization and target
+	  options passed on the link command line are ignored.</p>
+	  <p>Note that this applies only to those command-line options
+	  that can be passed to <code>optimize</code> and
+	  <code>target</code> attributes.
+	  Command-line options affecting global code generation
+	  (such as <code>-fpic</code>), warnings
+	  (such as <code>-Wodr</code>),
+	  optimizations affecting the way static variables
+	  are optimized (such as <code>-fcommon</code>), debug output (such as
+	  <code>-g</code>),
+	  and <code>--param</code> parameters can be applied only
+	  to the whole link-time optimization unit. 
+	  In these cases, it is recommended to consistently use the same
+	  options at both compile time and link time.</p></li>
+      <li>GCC bootstrap now uses slim LTO object files.</li>
+      <li>Memory usage and link times were improved.  Tree merging was sped up,
+	  memory usage of GIMPLE declarations and types was reduced, and,
+	  support for on-demand streaming of variable constructors was added.</li>
+    </ul></li>
+    <li>Feedback directed optimization improvements:
+    <ul>
+      <li>A new auto-FDO mode uses profiles collected by low overhead
+	  profiling tools (perf) instead of more expensive program
+	  instrumentation (via <code>-fprofile-generate</code>). SPEC2006
+	  benchmarks on x86-64 improve by 4.7% with auto-FDO and by 7.3% with
+	  traditional feedback directed optimization.</li>
+      <li>Profile precision was improved in presence of C++ inline and extern
+	  inline functions.</li>
+      <li>The new <code>gcov-tool</code> utility allows manipulating
+          profiles.</li>
+      <li>Profiles are now more tolerant to source file changes (this can be
+	  controlled by <code>--param profile-func-internal-id</code>).</li>
+    </ul></li>
+    <li>Register allocation improvements:
+    <ul>
+      <li>A new local register allocator (LRA) sub-pass, controlled by
+          <code>-flra-remat</code>, implements control-flow sensitive
+          global register rematerialization.  Instead of spilling and
+          restoring a register value, it is recalculated if it is
+          profitable.  The sub-pass improved SPEC2000 generated code
+          by 1% and 0.5% correspondingly on ARM and x86-64.</li>
+      <li>Reuse of the PIC hard register, instead of using a fixed
+          register, was implemented on x86/x86-64 targets.  This
+          improves generated PIC code performance as more hard
+          registers can be used.  Shared libraries can significantly
+          benefit from this optimization.  Currently it is switched on
+          only for x86/x86-64 targets.  As RA infrastructure is
+          already implemented for PIC register reuse, other targets
+          might follow this in the future.</li>
+      <li>A simple form of inter-procedural RA was implemented.  When
+          it is known that a called function does not use caller-saved
+          registers, save/restore code is not generated around the
+          call for such registers. This optimization can be controlled
+          by <code>-fipa-ra</code></li>
+      <li>LRA is now much more effective at generating spills of
+          general registers into vector registers instead of memory on
+          architectures (e.g., modern Intel processors) where this is
+          profitable.</li>
+    </ul></li>
+    <li>UndefinedBehaviorSanitizer gained a few new sanitization options:
+    <ul>
+      <li><code>-fsanitize=float-divide-by-zero</code>: detect floating-point
+	   division by zero;</li>
+      <li><code>-fsanitize=float-cast-overflow</code>: check that the result
+	   of floating-point type to integer conversions do not overflow;</li>
+      <li><code>-fsanitize=bounds</code>: enable instrumentation of array
+	  bounds and detect out-of-bounds accesses;</li>
+      <li><code>-fsanitize=alignment</code>: enable alignment checking, detect
+	  various misaligned objects;</li>
+      <li><code>-fsanitize=object-size</code>: enable object size checking, detect
+	  various out-of-bounds accesses.</li>
+      <li><code>-fsanitize=vptr</code>: enable checking of C++ member function
+	  calls, member accesses and some conversions between pointers to base
+	  and derived classes, detect if the referenced object does not have
+	  the correct dynamic type.</li>
+    </ul>
+    </li>
+    <li>Pointer Bounds Checker, a bounds violation detector, has been added and
+      can be enabled via <code>-fcheck-pointer-bounds</code>.  Memory accesses are
+      instrumented with run-time checks of used pointers against their bounds to
+      detect pointer bounds violations (overflows).  The Pointer Bounds Checker
+      is available on x86/x86-64 GNU/Linux targets with a new ISA extension
+      Intel MPX support.  See the Pointer Bounds Checker
+      <a href="https://gcc.gnu.org/wiki/Intel%20MPX%20support%20in%20the%20GCC%20compiler">
+	Wiki page</a> for more details.
+    </li>
+  </ul>
+
+<h2 id="languages">New Languages and Language specific improvements</h2>
+  <ul>
+    <li id="offload"><a href="http://www.openmp.org/mp-documents/OpenMP4.0.0.pdf">
+      OpenMP 4.0 specification</a> offloading features are now supported by the C, C++,
+	and Fortran compilers. Generic changes:
+	<ul>
+	  <li>Infrastructure (suitable for any vendor).</li>
+	  <li>Testsuite which covers offloading from the
+	  <a href="http://openmp.org/mp-documents/OpenMP4.0.0.Examples.pdf">
+	  OpenMP 4.0 Examples</a> document.</li>
+	</ul>
+	Specific for upcoming Intel Xeon Phi products:
+	<ul>
+	  <li>Run-time library.</li>
+	  <li>Card emulator.</li>
+	</ul>
+    </li>
+    <li id="openacc">
+      GCC 5 includes a preliminary implementation of the OpenACC 2.0a
+      specification.  OpenACC is intended for programming accelerator devices
+      such as GPUs.  See <a href="https://gcc.gnu.org/wiki/OpenACC">the OpenACC
+      wiki page</a> for more information.
+    </li>
+  </ul>
+
+
+<!-- h3 id="ada">Ada</h3 -->
+
+<h3 id="c-family">C family</h3>
+  <ul>
+    <li>The default setting of the <code>-fdiagnostics-color=</code>
+        command-line option is now
+        <a href="https://gcc.gnu.org/install/configure.html">configurable
+        when building GCC</a> using configuration option
+        <code>--with-diagnostics-color=</code>. The possible values
+        are: <code>never</code>, <code>always</code>, <code>auto</code>
+        and <code>auto-if-env</code>.  The new
+        default <code>auto</code> uses color only when the
+        standard error is a terminal.  The default in GCC 4.9
+        was <code>auto-if-env</code>, which is equivalent to
+        <code>auto</code> if there is a
+        non-empty <code>GCC_COLORS</code> environment variable,
+        and <code>never</code> otherwise.  As in GCC 4.9, an empty
+        <code>GCC_COLORS</code> variable in the environment will
+        always disable colors, no matter what the default is or what
+        command-line options are used.</li>
+    <li>A new command-line option <code>-Wswitch-bool</code> has been added for
+	the C and C++ compilers, which warns whenever a <code>switch</code>
+	statement has an index of boolean type.</li>
+    <li>A new command-line option <code>-Wlogical-not-parentheses</code> has
+	been added for the C and C++ compilers, which warns about "logical not"
+	used on the left hand side operand of a comparison.</li>
+    <li>A new command-line option <code>-Wsizeof-array-argument</code> has been
+	added for the C and C++ compilers, which warns when the
+	<code>sizeof</code> operator is applied to a parameter that has been
+	declared as an array in a function definition.</li>
+    <li>A new command-line option <code>-Wbool-compare</code> has been added
+	for the C and C++ compilers, which warns about boolean expressions
+	compared with an integer value different from
+	<code>true</code>/<code>false</code>.</li>
+    <li>Full support for <a href="https://www.cilkplus.org/">Cilk Plus</a>
+	has been added to the GCC compiler. Cilk Plus is an extension to
+	the C and C++ languages to support data and task parallelism.</li>
+    <li>A new attribute <code>no_reorder</code> prevents reordering of
+        selected symbols against other such symbols or inline assembler.
+        This enables to link-time optimize the Linux kernel without having
+        to resort to <code>-fno-toplevel-reorder</code> that disables
+        several optimizations.</li>
+    <li>New preprocessor constructs, <code>__has_include</code>
+        and <code>__has_include_next</code>, to test the availability of headers
+        have been added.<br/>
+        This demonstrates a way to include the header <code>&lt;optional&gt;</code>
+        only if it is available:<br/>
+<blockquote><pre>
+#ifdef __has_include
+#  if __has_include(&lt;optional&gt;)
+#    include &lt;optional&gt;
+#    define have_optional 1
+#  elif __has_include(&lt;experimental/optional&gt;)
+#    include &lt;experimental/optional&gt;
+#    define have_optional 1
+#    define experimental_optional
+#  else
+#    define have_optional 0
+#  endif
+#endif
+</pre></blockquote>
+        The header search paths for <code>__has_include</code>
+        and <code>__has_include_next</code> are equivalent to those
+        of the standard directive <code>#include</code>
+        and the extension <code>#include_next</code> respectively.
+    </li>
+    <li>A new built-in function-like macro to determine the existence of an
+	attribute, <code>__has_attribute</code>, has been added.
+	The equivalent built-in macro <code>__has_cpp_attribute</code> was
+	added to C++ to support
+	<a href="http://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations">
+	Feature-testing recommendations for C++</a>.
+	The macro <code>__has_attribute</code> is added to all C-like
+	languages as an extension:
+<blockquote><pre>
+int
+#ifdef __has_attribute
+#  if __has_attribute(__noinline__)
+  __attribute__((__noinline__))
+#  endif
+#endif
+foo(int x);
+</pre></blockquote>
+	If an attribute exists, a nonzero constant integer is returned.
+	For standardized C++ attributes a date is returned, otherwise the
+	constant returned is 1.
+	Both <code>__has_attribute</code> and
+	<code>__has_cpp_attribute</code> will add underscores to an
+	attribute name if necessary to resolve the name.
+	For C++11 and onwards the attribute may be scoped.
+    </li>
+    <li>A new set of built-in functions for arithmetics with overflow checking
+	has been added: <code>__builtin_add_overflow</code>,
+	<code>__builtin_sub_overflow</code> and <code>__builtin_mul_overflow</code>
+	and for compatibility with clang also other variants.
+	These builtins have two integral arguments (which don't need to have
+	the same type), the arguments are extended to infinite precision
+	signed type, <code>+</code>, <code>-</code> or <code>*</code>
+	is performed on those, and the result is stored in an integer
+	variable pointed to by the last argument.  If the stored value is
+	equal to the infinite precision result, the built-in functions return
+	<code>false</code>, otherwise <code>true</code>.  The type of
+	the integer variable that will hold the result can be different from
+	the types of the first two arguments.  The following snippet
+	demonstrates how this can be used in computing the size for the
+	<code>calloc</code> function:
+<blockquote><pre>
+void *
+calloc (size_t x, size_t y)
+{
+  size_t sz;
+  if (__builtin_mul_overflow (x, y, &amp;sz))
+    return NULL;
+  void *ret = malloc (sz);
+  if (ret) memset (res, 0, sz);
+  return ret;
+}
+</pre></blockquote>
+	On e.g. i?86 or x86-64 the above will result in a <code>mul</code>
+	instruction followed by a jump on overflow.
+    </li>
+    <li>The option <code>-fextended-identifiers</code> is now enabled
+	by default for C++, and for C99 and later C versions.  Various
+	bugs in the implementation of extended identifiers have been
+	fixed.</li>
+  </ul>
+
+<h3 id="c">C</h3>
+  <ul>
+    <li>The default mode has been changed to <code>-std=gnu11</code>.</li>
+    <li>A new command-line option <code>-Wc90-c99-compat</code> has been added
+	to warn about features not present in ISO C90, but present in ISO
+	C99.</li>
+    <li>A new command-line option <code>-Wc99-c11-compat</code> has been added
+	to warn about features not present in ISO C99, but present in ISO
+	C11.</li>
+    <li>It is possible to disable warnings about conversions between pointers
+	that have incompatible types via a new warning option
+	<code>-Wno-incompatible-pointer-types</code>; warnings about implicit
+	incompatible integer to pointer and pointer to integer conversions via
+	a new warning option <code>-Wno-int-conversion</code>; and warnings
+	about qualifiers on pointers being discarded via a new warning option
+	<code>-Wno-discarded-qualifiers</code>.</li>
+    <li>To allow proper use of const qualifiers with multidimensional arrays,
+	GCC will not warn about incompatible pointer types anymore for
+	conversions between pointers to arrays with and without const qualifier
+	(except when using <code>-pedantic</code>). Instead, a new warning is
+	emitted only if the const qualifier is lost. This can be controlled with
+	a new warning option <code>-Wno-discarded-array-qualifiers</code>.</li> 
+    <li>The C front end now generates more precise caret diagnostics.</li>
+    <li>The <code>-pg</code> command-line option now only affects the current
+        file in an LTO build.</li>
+  </ul>
+
+<h3 id="cxx">C++</h3>
+<ul>
+  <li>G++ now supports <a href="../projects/cxx1y.html">C++14</a> variable
+  templates.</li>
+  <li><code>-Wnon-virtual-dtor</code> doesn't warn anymore
+  for <code>final</code> classes.</li>
+  <li>Excessive template instantiation depth is now a fatal error. This
+  prevents excessive diagnostics that usually do not help to identify the
+  problem.</li>
+  <li>G++ and libstdc++ now implement the feature-testing macros from
+    <a href="http://isocpp.org/std/standing-documents/sd-6-sg10-feature-test-recommendations">Feature-testing
+    recommendations for C++</a>.</li>
+  <li>G++ now allows <code>typename</code> in a template template parameter.
+    <blockquote><pre>
+template&lt;template&lt;typename&gt; <b>typename</b> X&gt; struct D; // OK</pre></blockquote>
+  </li>
+  <li>G++ now supports <a href="../projects/cxx1y.html">C++14</a> aggregates with non-static data member initializers.
+    <blockquote><pre>
+struct A { int i, j = i; };
+A a = { 42 }; // a.j is also 42</pre></blockquote>
+  </li>
+  <li>G++ now supports <a href="../projects/cxx1y.html">C++14</a> extended <code>constexpr</code>.
+    <blockquote><pre>
+constexpr int f (int i)
+{
+  int j = 0;
+  for (; i > 0; --i)
+    ++j;
+  return j;
+}
+
+constexpr int i = f(42); // i is 42</pre></blockquote>
+  </li>
+  <li>G++ now supports the <a href="../projects/cxx1y.html">C++14</a> sized
+  deallocation functions.
+    <blockquote><pre>
+void operator delete (void *, std::size_t) noexcept;
+void operator delete[] (void *, std::size_t) noexcept;</pre></blockquote>
+  </li>
+  <li>A new One Definition Rule violation warning (controlled by <code>-Wodr</code>)
+      detects mismatches in type definitions and virtual table contents
+      during link-time optimization.</li>
+  <li>New warnings <code>-Wsuggest-final-types</code> and
+      <code>-Wsuggest-final-methods</code> help developers
+      to annotate programs with  <code>final</code> specifiers (or anonymous
+      namespaces) to improve code generation.
+      These warnings can be used at compile time, but they are more
+      useful in combination with link-time optimization.</li>
+<li>G++ no longer supports
+  <a href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3639.html">N3639</a>
+  variable length arrays, as they were removed from the C++14 working paper
+  prior to ratification.  GNU VLAs are still supported, so VLA support is
+  now the same in C++14 mode as in C++98 and C++11 modes.</li>
+<li>G++ now allows passing a non-trivially-copyable class via C varargs,
+  which is conditionally-supported with implementation-defined semantics in
+  the standard.  This uses the same calling convention as a normal value
+  parameter.</li>
+<li>G++ now defaults to <code>-fabi-version=0</code>
+and <code>-fabi-compat-version=2</code>.  So various mangling bugs are
+fixed, but G++ will still emit aliases with the old, wrong mangling where
+feasible.  <code>-Wabi</code> continues to warn about differences.</li>
+</ul>
+
+  <h4 id="libstdcxx">Runtime Library (libstdc++)</h4>
+  <ul>
+    <li>A <a href="/onlinedocs/gcc-5.1.0/libstdc++/manual/using_dual_abi.html">Dual
+        ABI</a> is provided by the library. A new ABI is enabled by default.
+        The old ABI is still supported and can be used by defining the macro
+        <code>_GLIBCXX_USE_CXX11_ABI</code> to <code>0</code> before
+        including any C++ standard library headers. </li>
+    <li>A new implementation of <code>std::string</code> is enabled by default,
+        using the <em>small string optimization</em> instead of
+        <em>copy-on-write</em> reference counting.</li>
+    <li> A new implementation of <code>std::list</code> is enabled by default,
+        with an O(1) <code>size()</code> function; </li>
+    <li><a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/status.html#status.iso.2011">
+      Full support for C++11</a>, including the following new features:
+      <ul>
+        <li> <code>std::deque</code> and <code>std::vector&lt;bool&gt;</code>
+             meet the allocator-aware container requirements;</li>
+        <li> movable and swappable iostream classes;</li>
+        <li> support for <code>std::align</code> and
+             <code>std::aligned_union</code>;</li>
+        <li> type traits <code>std::is_trivially_copyable</code>,
+             <code>std::is_trivially_constructible</code>,
+             <code>std::is_trivially_assignable</code> etc.;
+        </li>
+        <li> I/O manipulators <code>std::put_time</code>, <code>std::get_time</code>,
+             <code>std::hexfloat</code> and <code>std::defaultfloat</code>;
+        </li>
+        <li> generic locale-aware <code>std::isblank</code>; </li>
+        <li> locale facets for Unicode conversion; </li>
+        <li> atomic operations for <code>std::shared_ptr</code>; </li>
+        <li> <code>std::notify_all_at_thread_exit()</code> and functions
+          for making futures ready at thread exit.</li>
+      </ul>
+    </li>
+    <li> Support for the C++11 <code>hexfloat</code> manipulator changes how
+      the <code>num_put</code> facet formats floating point types when
+      <code>ios_base::fixed|ios_base::scientific</code> is set in a stream's
+      <code>fmtflags</code>. This change affects all language modes, even
+      though the C++98 standard gave no special meaning to that combination
+      of flags. To prevent the use of hexadecimal notation for floating point
+      types use <code>str.unsetf(std::ios_base::floatfield)</code> to clear
+      the relevant bits in <code>str.flags()</code>.
+    </li>
+    <li><a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/status.html#status.iso.2014">
+      Full experimental support for C++14</a>, including the following
+      new features:
+      <ul>
+        <li> <code>std::is_final</code> type trait; </li>
+        <li> heterogeneous comparison lookup in associative containers. </li>
+        <li> global functions <code>cbegin</code>, <code>cend</code>, <code>rbegin</code>,
+        <code>rend</code>, <code>crbegin</code>, and <code>crend</code> for
+        range access to containers, arrays and initializer lists. </li>
+      </ul>
+    </li>
+    <li><a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/libstdc++/manual/status.html#status.iso.2014">
+      Improved experimental support for the Library Fundamentals TS</a>, including:
+      <ul>
+        <li> class <code>std::experimental::any</code>; </li>
+        <li> function template <code>std::experimental::apply</code>; </li>
+        <li> function template <code>std::experimental::sample</code>; </li>
+        <li> function template <code>std::experimental::search</code> and
+          related searcher types; </li>
+        <li> variable templates for type traits; </li>
+        <li> function template <code>std::experimental::not_fn</code>.</li>
+      </ul>
+    </li>
+    <li>New random number distributions <code>logistic_distribution</code> and
+      <code>uniform_on_sphere_distribution</code> as extensions.</li>
+    <li><a href="https://sourceware.org/gdb/current/onlinedocs/gcc-5.1.0/gdb/Xmethods-In-Python.html">GDB
+      Xmethods</a> for containers and <code>std::unique_ptr</code>.</li>
+  </ul>
+
+<h3 id="fortran">Fortran</h3>
+  <ul>
+    <li>Compatibility notice:<ul>
+      <li>The version of the module files (.mod) has been incremented.</li>
+      <li>For free-form source files,
+        <a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/gfortran/Error-and-Warning-Options.html"><code>-Werror=line-truncation</code></a>
+        is now enabled by default; note that comments exceeding the line length
+        are not diagnosed.  (For fixed-form source code, the same warning is
+        available but turned off by default, such that excess characters are
+        ignored. <code>-ffree-line-length-<em>n</em></code> and
+        <code>-ffixed-line-length-<em>n</em></code> can be used to modify the
+        default line lengths of 132 and 72 columns, respectively.)</li>
+      <li>The <code>-Wtabs</code> option is now more sensible: with
+        <code>-Wtabs</code> the compiler warns if it encounters tabs and with
+        <code>-Wno-tabs</code> this warning is turned off.  Before,
+        <code>-Wno-tabs</code> warned and <code>-Wtabs</code> turned the warning
+        off.  As before, the warning is also enabled by <code>-Wall</code>,
+        <code>-pedantic</code> and the <code>f95</code>, <code>f2003</code>,
+        <code>f2008</code> and <code>f2008ts</code> options of <code>-std=</code>.</li>
+      </ul></li>
+    <li>Incomplete support for colorizing diagnostics emitted by
+      gfortran has been added. The
+      option <code><a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/gcc/Language-Independent-Options.html"
+      >-fdiagnostics-color</a></code> controls when color is used in
+      diagnostics. The default value of this option can
+      be <a href="https://gcc.gnu.org/install/configure.html">configured
+      when building GCC</a>. The <code>GCC_COLORS</code> environment
+      variable can be used to customize the colors or disable coloring
+      completely. Sample diagnostics output:<br/>
+      <pre>
+      $ gfortran -fdiagnostics-color=always -Wuse-without-only test.f90
+      <b>test.f90:6:1:</b>
+
+       0 continue
+       <b style='color:lime'>1</b>
+      <b style='color:red'>Error:</b> Zero is not a valid statement label at (1)    
+      <b>test.f90:9:6:</b>
+
+         USE foo
+            <b style='color:lime'>1</b>
+      <b style='color:magenta'>Warning:</b> USE statement at (1) has no ONLY qualifier [-Wuse-without-only]
+    </pre></li>
+
+    <li>The <code>-Wuse-without-only</code> option has been added to warn when a
+      <code>USE</code> statement has no <code>ONLY</code> qualifier and, thus,
+      implicitly imports all public entities of the used module.</li>
+    <li>Formatted READ and WRITE statements now work correctly in locale-aware
+      programs.  For more information and potential caveats, see
+      <a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/gfortran/Thread-safety-of-the-runtime-library.html">Section
+      5.3 Thread-safety of the runtime library in the manual</a>.</li>
+    <li><a href="https://gcc.gnu.org/wiki/Fortran2003Status">Fortran 2003</a>:
+    <ul>
+      <li>The intrinsic IEEE modules (<code>IEEE_FEATURES</code>,
+	<code>IEEE_EXCEPTIONS</code> and <code>IEEE_ARITHMETIC</code>) are
+	now supported.</li>
+    </ul></li>
+    <li><a href="https://gcc.gnu.org/wiki/Fortran2008Status">Fortran 2008</a>:
+    <ul>
+      <li><a href="https://gcc.gnu.org/wiki/Coarray">Coarrays</a>: Full
+	experimental support of Fortran 2008's coarrays with
+	<code>-fcoarray=lib</code> except for allocatable/pointer
+	components of derived-type coarrays.  GCC currently only ships with a
+	single-image library (<code>libcaf_single</code>), but
+	multi-image support based on MPI and GASNet is provided by the libraries
+	of the <a href="http://www.opencoarrays.org/">OpenCoarrays project</a>. 
+	</li>
+    </ul></li>
+    <li>TS18508 Additional Parallel Features in Fortran:
+    <ul>
+      <li>Support for the collective intrinsic subroutines <code>CO_MAX</code>,
+	<code>CO_MIN</code>, <code>CO_SUM</code>, <code>CO_BROADCAST</code> and
+	<code>CO_REDUCE</code> has been added, including
+	<code>-fcoarray=lib</code> support.</li>
+      <li>Support for the new atomic intrinsics has been added, including
+	<code>-fcoarray=lib</code> support.</li>
+    </ul></li>
+    <li>Fortran 2015:
+    <ul>
+      <li>Support for <code>IMPLICIT NONE (external, type)</code>.</li>
+      <li><code>ERROR STOP</code> is now permitted in pure procedures.</li>
+    </ul></li>
+  </ul>
+
+<h3 id="go">Go</h3>
+  <ul>
+    <li>GCC 5 provides a complete implementation of the Go 1.4.2
+    release.</li>
+    <li>Building GCC 5 with Go enabled will install two new
+      programs: <a href="http://golang.org/cmd/go">go</a>
+      and <a href="http://golang.org/cmd/gofmt">gofmt</a>.</li>
+  </ul>
+
+<!--h3 id="java">Java (GCJ)</h3-->
+
+<h2 id="jit">libgccjit</h2>
+<p>New in GCC 5 is the ability to build GCC as a shared library for embedding
+in other processes (such as interpreters), suitable for Just-In-Time
+compilation to machine code.</p>
+
+<p>The shared library has a <a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/jit/intro/index.html">C API</a>
+and a
+<a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/jit/cp/index.html">C++ wrapper API</a>
+providing some "syntactic sugar".
+There are also bindings available from 3rd parties for
+<a href="https://github.com/davidmalcolm/pygccjit">Python</a> and for
+<a href="https://github.com/ibuclaw/gccjitd">D</a>.</p>
+
+<p>For example, this library can be used by interpreters for
+<a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/jit/intro/tutorial04.html">compiling
+functions from bytecode to machine code</a>.</p>
+
+<p>The library can also be used for ahead-of-time compilation, enabling
+GCC to be plugged into a pre-existing frontend.  An example of using
+this to build a compiler for an esoteric language we'll refer to as "brainf"
+can be seen <a href="https://gcc.gnu.org/onlinedocs/gcc-5.1.0/jit/intro/tutorial05.html">
+here</a>.</p>
+
+<p>libgccjit is licensed under the GPLv3 (or at your option, any later version)</p>
+
+<p>It should be regarded as experimental at this time.</p>
+
+<h2 id="targets">New Targets and Target Specific Improvements</h2>
+
+<h3 id="aarch64">AArch64</h3>
+   <ul>
+     <li>Code generation for the ARM Cortex-A57 processor has been improved.
+       A more accurate instruction scheduling model for the processor is
+       now used, and a number of compiler tuning parameters have been set
+       to offer increased performance when compiling with
+       <code>-mcpu=cortex-a57</code> or <code>-mtune=cortex-a57</code>.
+     </li>
+     <li> A workaround for the ARM Cortex-A53 erratum 835769 has been
+       added and can be enabled by giving the
+       <code>-mfix-cortex-a53-835769</code> option.
+       Alternatively it can be enabled by default by configuring GCC with the
+       <code>--enable-fix-cortex-a53-835769</code> option.
+     </li>
+     <li> The optional cryptographic extensions to the ARMv8-A architecture
+       are no longer enabled by default when specifying the
+       <code>-mcpu=cortex-a53</code>, <code>-mcpu=cortex-a57</code> or
+       <code>-mcpu=cortex-a57.cortex-a53</code> options.  To enable these
+       extensions add <code>+crypto</code> to the value of
+       <code>-mcpu</code> or <code>-march</code> e.g.
+       <code>-mcpu=cortex-a53+crypto</code>.
+     </li>
+     <li> Support has been added for the following processors
+      (GCC identifiers in parentheses): ARM Cortex-A72
+      (<code>cortex-a72</code>) and initial support for its big.LITTLE
+      combination with the ARM Cortex-A53 (<code>cortex-a72.cortex-a53</code>),
+      Cavium ThunderX (<code>thunderx</code>), Applied Micro X-Gene 1
+      (<code>xgene1</code>), and Samsung Exynos M1 (<code>exynos-m1</code>).
+      The GCC identifiers can be used
+      as arguments to the <code>-mcpu</code> or <code>-mtune</code> options,
+      for example: <code>-mcpu=xgene1</code> or
+      <code>-mtune=cortex-a72.cortex-a53</code>.
+      Using <code>-mcpu=cortex-a72</code> requires a version of GNU binutils
+      that has support for the Cortex-A72.
+     </li>
+     <li>The transitional options <code>-mlra</code> and <code>-mno-lra</code>
+       have been removed. The AArch64 backend now uses the local register
+       allocator (LRA) only.
+     </li>
+   </ul>
+
+<h3 id="arm">ARM</h3>
+     <ul>
+      <li>Thumb-1 assembly code is now generated in unified syntax. The new option
+        <code>-masm-syntax-unified</code> specifies whether inline assembly
+        code is using unified syntax. By default the option is off which means
+        non-unified syntax is used. However this is subject to change in future releases.
+        Eventually the non-unified syntax will be deprecated.
+      </li>
+      <li> It is now a configure-time error to use the <code>--with-cpu</code>
+      configure option with either of <code>--with-tune</code> or
+      <code>--with-arch</code>.
+      </li>
+      <li>Code generation for the ARM Cortex-A57 processor has been improved.
+       A more accurate instruction scheduling model for the processor is
+       now used, and a number of compiler tuning parameters have been set
+       to offer increased performance when compiling with
+       <code>-mcpu=cortex-a57</code> or <code>-mtune=cortex-a57</code>.
+      </li>
+      <li> Support has been added for the following processors
+       (GCC identifiers in parentheses): ARM Cortex-A17 (<code>cortex-a17</code>) and
+       initial support for its big.LITTLE combination with the ARM Cortex-A7
+       (<code>cortex-a17.cortex-a7</code>), ARM Cortex-A72
+       (<code>cortex-a72</code>) and initial support for its big.LITTLE
+       combination with the ARM Cortex-A53 (<code>cortex-a72.cortex-a53</code>),
+       ARM Cortex-M7 (<code>cortex-m7</code>), Applied Micro X-Gene 1
+       (<code>xgene1</code>), and Samsung Exynos M1 (<code>exynos-m1</code>).
+       The GCC identifiers can be used
+       as arguments to the <code>-mcpu</code> or <code>-mtune</code> options,
+       for example: <code>-mcpu=xgene1</code> or
+       <code>-mtune=cortex-a72.cortex-a53</code>.
+       Using <code>-mcpu=cortex-a72</code> requires a version of GNU binutils
+       that has support for the Cortex-A72.
+      </li>
+      <li> The deprecated option <code>-mwords-little-endian</code>
+       has been removed.
+      </li>
+      <li> The options <code>-mapcs</code>, <code>-mapcs-frame</code>,
+      <code>-mtpcs-frame</code> and <code>-mtpcs-leaf-frame</code>
+      which are only applicable to the old ABI have been deprecated.
+      </li>
+      <li>The transitional options <code>-mlra</code> and <code>-mno-lra</code>
+       have been removed. The ARM backend now uses the local register allocator
+       (LRA) only.
+     </li>
+     </ul>
+
+<h3 id="x86">IA-32/x86-64</h3>
+  <ul>
+    <li>New ISA extensions support
+	<a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf">
+	AVX-512{BW,DQ,VL,IFMA,VBMI}</a> of Intel's CPU
+	codenamed Skylake Server was added to GCC.  That includes inline
+	assembly support, new intrinsics, and basic autovectorization.  These
+	new AVX-512 extensions are available via
+	the following GCC switches: AVX-512 Vector Length EVEX feature:
+	<code>-mavx512vl</code>, AVX-512 Byte and Word instructions:
+	<code>-mavx512bw</code>, AVX-512 Dword and Qword instructions:
+	<code>-mavx512dq</code>, AVX-512 FMA-52 instructions:
+	<code>-mavx512ifma</code> and for AVX-512 Vector Bit Manipulation
+	Instructions: <code>-mavx512vbmi</code>.</li>
+	<li>New ISA extensions support
+	<a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf">
+	Intel MPX</a> was added to GCC.  This new extension is available via the
+	<code>-mmpx</code> compiler switch.  Intel MPX is a set of processor features which,
+	with compiler, run-time library and OS support, brings increased robustness to
+	software by run-time checking pointer references against their bounds.
+	In GCC Intel MPX is supported by Pointer Bounds Checker and libmpx run-time
+	libraries.</li>
+	<li>The new <code>-mrecord-mcount</code> option for <code>-pg</code>
+	generates a Linux kernel style table of pointers to
+	<code>mcount</code> or <code>__fentry__</code> calls at the beginning
+	of functions. The new <code>-mnop-mcount</code> option in addition
+	also generates nops in place of the <code>__fentry__</code> or
+	<code>mcount</code> call, so that a call per function can be later
+	patched in. This can be used for low overhead tracing or hot code
+	patching.</li>
+	<li>The new <code>-malign-data</code> option controls how
+	GCC aligns variables.  <code>-malign-data=compat</code> uses
+	increased alignment compatible with GCC 4.8 and earlier,
+	<code>-malign-data=abi</code> uses alignment as specified by
+	the psABI, and <code>-malign-data=cacheline</code> uses increased
+	alignment to match the cache line size.
+	<code>-malign-data=compat</code> is the default.</li>
+	<li>The new <code>-mskip-rax-setup</code> option skips setting
+	up the RAX register when SSE is disabled and there are no variable
+	arguments passed in vector registers.  This can be used to
+	optimize the Linux kernel.</li>
+  </ul>
+
+<h3 id="mips">MIPS</h3>
+  <ul>
+    <li>MIPS Releases 3 and 5 are now directly supported.  Use the
+      command-line options <code>-mips32r3</code>, <code>-mips64r3</code>,
+      <code>-mips32r5</code> and <code>-mips64r5</code> to enable
+      code-generation for these processors.</li>
+    <li>The Imagination P5600 processor is now supported using the
+      <code>-march=p5600</code> command-line option.</li>
+    <li>The Cavium Octeon3 processor is now supported using the
+      <code>-march=octeon3</code> command-line option.</li>
+    <li>MIPS Release 6 is now supported using the <code>-mips32r6</code>
+       and <code>-mips64r6</code> command-line options.</li>
+    <li>The o32 ABI has been modified and extended.  The o32 64-bit
+      floating-point register support is now obsolete and has been removed.
+      It has been replaced by three ABI extensions FPXX, FP64A, and FP64.
+      The meaning of the <code>-mfp64</code> command-line option has
+      changed.  It is now used to enable the FP64A and FP64 ABI extensions.
+      <ul>
+	<li>The FPXX extension requires that code generated to access
+	    double-precision values use even-numbered registers.  Code that
+	    adheres to this extension is link-compatible with all other o32
+	    double-precision ABI variants and will execute correctly in all
+	    hardware FPU modes.  The command-line options <code>-mabi=32 
+	    -mfpxx</code> can be used to enable this extension.  MIPS II is
+	    the minimum processor required.</li>
+	<li>The o32 FP64A extension requires that floating-point registers be
+	    64-bit and odd-numbered single-precision registers are not
+	    allowed.  Code that adheres to the o32 FP64A variant is
+	    link-compatible with all other o32 double-precision ABI variants.
+	    The command-line options <code>-mabi=32 -mfp64 -mno-odd-spreg
+	    </code> can be used to enable this extension.  MIPS32R2 is the
+	    minimum processor required.</li>
+	<li>The o32 FP64 extension also requires that floating-point registers
+	    be 64-bit, but permits the use of single-precision registers.
+	    Code that adheres to the o32 FP64 variant is link-compatible with
+	    o32 FPXX and o32 FP64A variants only, i.e. it is not compatible
+	    with the original o32 double-precision ABI. The command-line
+	    options <code>-mabi=32 -mfp64 -modd-spreg</code> can be used to
+	    enable this extension.  MIPS32R2 is the minimum processor required.
+	    </li>
+      </ul>
+      The new ABI variants can be enabled by default using the configure time
+      options <code>--with-fp-32=[32|xx|64]</code> and
+      <code>--with(out)-odd-sp-reg-32</code>.  It is strongly recommended that
+      all vendors begin to set o32 FPXX as the default ABI.  This will be
+      required to run the generated code on MIPSR5 cores in conjunction with
+      future MIPS SIMD (MSA) code and MIPSR6 cores.</li>
+    <li>GCC will now pass all floating-point options to the assembler if GNU
+      binutils 2.25 is used.  As a result, any inline assembly code that
+      uses hard-float instructions should be amended to include a
+      <code>.set</code> directive to override the global assembler options
+      when compiling for soft-float targets.</li>
+  </ul>
+
+<h3 id="nds32">NDS32</h3>
+  <ul>
+    <li>The variadic function ABI implementation is now compatible with
+    past Andes toolchains where the caller uses registers to pass arguments
+    and the callee is in charge of pushing them on stack.</li>
+    <li>The options <code>-mforce-fp-as-gp</code>, <code>-mforbid-fp-as-gp</code>,
+    and <code>-mex9</code> have been removed since they are not yet available
+    in the nds32 port of GNU binutils.</li>
+    <li>A new option <code>-mcmodel=[small|medium|large]</code> supports
+    varied code models on code generation.  The <code>-mgp-direct</code>
+    option became meaningless and can be discarded.</li>
+  </ul>
+
+<h3 id="rx">RX</h3>
+  <ul>
+    <li>A new command line option <code>-mno-allow-string-insns</code> can be
+    used to disable the generation of the <code>SCMPU</code>, <code>SMOVU</code>,
+    <code>SMOVB</code>, <code>SMOVF</code>, <code>SUNTIL</code>, <code>SWHILE</code>
+    and <code>RMPA</code> instructions.  An erratum released by Renesas shows
+    that it is unsafe to use these instructions on addresses within the I/O
+    space of the processor.  The new option can be used when the programmer is
+    concerned that the I/O space might be accessed.  The default is still to
+    enable these instructions.</li>
+  </ul>
+
+<h3 id="sh">SH</h3>
+  <ul>
+    <li>The compiler will now pass the appropriate <code>--isa=</code> option
+    to the assembler.</li>
+
+    <li>The default handling for the <code>GBR</code> has been changed from
+    call clobbered to call preserved.  The old behavior can be reinstated by
+    specifying the option <code>-fcall-used-gbr</code>.</li>
+
+    <li>Support for the SH4A <code>fpchg</code> instruction has been added which
+    will be utilized when switching between single and double precision FPU
+    modes.</li>
+
+    <li>The compiler no longer uses the <code>__fpscr_values</code> array for
+    switching between single and double FPU precision modes on non-SH4A targets.
+    Instead mode switching will now be performed by storing, modifying and
+    reloading the <code>FPSCR</code>, so that other <code>FPSCR</code> bits are
+    preserved across mode switches.   The <code>__fpscr_values</code> array that
+    is defined in libgcc is still present for backwards compatibility, but it
+    will not be referenced by compiler generated code anymore.</li>
+
+    <li>New builtin functions <code>__builtin_sh_get_fpscr</code> and
+    <code>__builtin_sh_set_fpscr</code> have been added.  The
+    <code>__builtin_sh_set_fpscr</code> function will mask the specified bits
+    in such a way that the <code>SZ</code>, <code>PR</code> and <code>FR</code>
+    mode bits will be preserved, while changing the other bits.  These new
+    functions do not reference the <code>__fpscr_values</code> array.  The old
+    functions <code>__set_fpscr</code> and <code>__get_fpscr</code> in libgcc
+    which access the <code>__fpscr_values</code> array are still present for
+    backwards compatibility, but their usage is highly discouraged.</li>
+
+    <li>Some improvements to code generated for <code>__atomic</code> built-in
+    functions.</li>
+
+    <li>When compiling for SH2E the compiler will no longer force the usage of
+    delay slots for conditional branch instructions <code>bt</code> and
+    <code>bf</code>.  The old behavior can be reinstated (e.g. to work around a
+    hardware bug in the original SH7055) by specifying the new option
+    <code>-mcbranch-force-delay-slot</code>.</li>
+  </ul>
+
+<h2 id="os">Operating Systems</h2>
+
+  <h3 id="dragonfly">DragonFly BSD</h3>
+
+  <ul>
+    <li>GCC now supports the DragonFly BSD operating system.</li>
+  </ul>
+
+  <h3 id="freebsd">FreeBSD</h3>
+
+  <ul>
+    <li>GCC now supports the FreeBSD operating system for the arm port
+    through the <code>arm*-*-freebsd*</code> target triplets.</li>
+  </ul>
+
+  <h3 id="vxmils">VxWorks MILS</h3>
+
+  <ul>
+    <li>GCC now supports the MILS (Multiple Independent Levels
+    of Security) variant of WindRiver's VxWorks operating system
+    for PowerPC targets.</li>
+  </ul>
+
+<!-- h2>Documentation improvements</h2-->
+<h2>Other significant improvements</h2>
+  <h3 id="gcc-ar"></h3>
+  <ul>
+    <li>The <code>gcc-ar</code>, <code>gcc-nm</code>, <code>gcc-ranlib</code>
+      wrappers now understand a <code>-B</code> option to set the compiler
+      to use.</li>
+  </ul>
+  <h3 id="driver"></h3>
+  <ul>
+    <li>When the new command-line option <code>-freport-bug</code> is
+      used, GCC automatically generates a developer-friendly reproducer
+      whenever an internal compiler error is encountered.</li>
+  </ul>
+
+
+
+<!-- ==================================================================== -->
+
+<div class="copyright">
+
+<address style="margin-top:0;">For questions related to the use of GCC,
+please consult these web pages and the
+<a href="https://gcc.gnu.org/onlinedocs/">GCC manuals</a>. If that fails,
+the <a href="mailto:gcc-help@gcc.gnu.org">gcc-help@gcc.gnu.org</a>
+mailing list might help.
+Comments on these web pages and the development of GCC are welcome on our
+developer list at <a href="mailto:gcc@gcc.gnu.org">gcc@gcc.gnu.org</a>.
+All of <a href="https://gcc.gnu.org/lists.html">our lists</a>
+have public archives.
+</address>
+
+<p>Copyright (C)
+<a href="http://www.fsf.org">Free Software Foundation, Inc.</a>
+Verbatim copying and distribution of this entire article is
+permitted in any medium, provided this notice is preserved.</p>
+
+<p style="margin-bottom:0;">These pages are
+<a href="https://gcc.gnu.org/about.html">maintained by the GCC team</a>.
+Last modified 2015-04-22<!-- IGNORE DIFF
+--><a href="http://validator.w3.org/check/referer">.</a></p>
+
+</div>
+
+<!-- ==================================================================== -->
+
+</body>
+     </html>
+  
+ 
--- gcc-5-5.4.0.orig/debian/README.Bugs.m4
+++ gcc-5-5.4.0/debian/README.Bugs.m4
@@ -0,0 +1,333 @@
+Reporting Bugs in the GNU Compiler Collection for DIST
+========================================================
+
+Before reporting a bug, please
+------------------------------
+
+- Check that the behaviour really is a bug. Have a look into some
+  ANSI standards document.
+
+- Check the list of well known bugs: http://gcc.gnu.org/bugs.html#known
+
+- Try to reproduce the bug with a current GCC development snapshot. You
+  usually can get a recent development snapshot from the gcc-snapshot
+ifelse(DIST,`Debian',`dnl
+  package in the unstable (or experimental) distribution.
+
+  See: http://packages.debian.org/gcc-snapshot
+', DIST, `Ubuntu',`dnl
+  package in the current development distribution.
+
+  See: http://archive.ubuntu.com/ubuntu/pool/universe/g/gcc-snapshot/
+')dnl
+
+- Try to find out if the bug is a regression (an older GCC version does
+  not show the bug).
+
+- Check if the bug is already reported in the bug tracking systems.
+
+ifelse(DIST,`Debian',`dnl
+    Debian:   http://bugs.debian.org/debian-gcc@lists.debian.org
+', DIST, `Ubuntu',`dnl
+    Ubuntu:   https://bugs.launchpad.net/~ubuntu-toolchain/+packagebugs
+    Debian:   http://bugs.debian.org/debian-gcc@lists.debian.org
+')dnl
+    Upstream: http://gcc.gnu.org/bugzilla/
+
+
+Where to report a bug
+---------------------
+
+ifelse(DIST,`Debian',`dnl
+Please report bugs found in the packaging of GCC to the Debian bug tracking
+system. See http://www.debian.org/Bugs/ for instructions (or use the
+reportbug script).
+', DIST, `Ubuntu',`dnl
+Please report bugs found in the packaging of GCC to Launchpad. See below
+how issues should be reported.
+')dnl
+
+DIST's current policy is to closely follow the upstream development and
+only apply a minimal set of patches (which are summarized in the README.Debian
+document).
+
+ifelse(DIST,`Debian',`dnl
+If you think you have found an upstream bug, you did check the section
+above ("Before reporting a bug") and are able to provide a complete bug
+report (see below "How to report a bug"), then you may help the Debian
+GCC package maintainers, if you report the bug upstream and then submit
+a bug report to the Debian BTS and tell us the upstream report number.
+This way you are able to follow the upstream bug handling as well. If in
+doubt, report the bug to the Debian BTS (but read "How to report a bug"
+below).
+', DIST, `Ubuntu',`dnl
+If you think you have found an upstream bug, you did check the section
+above ("Before reporting a bug") and are able to provide a complete bug
+report (see below "How to report a bug"), then you may help the Ubuntu
+GCC package maintainers, if you report the bug upstream and then submit
+a bug report to Launchpad and tell us the upstream report number.
+This way you are able to follow the upstream bug handling as well. If in
+doubt, report the bug to Launchpad (but read "How to report a bug" below).
+
+Report the issue to https://bugs.launchpad.net/ubuntu/+source/SRCNAME.
+')dnl
+
+
+How to report a bug
+-------------------
+
+There are complete instructions in the gcc info manual (found in the
+gcc-doc package), section Bugs.
+
+The manual can be read using `M-x info' in Emacs, or if the GNU info
+program is installed on your system by `info --node "(gcc)Bugs"'. Or see
+the file BUGS included with the gcc source code.
+
+Online bug reporting instructions can be found at
+
+	http://gcc.gnu.org/bugs.html
+
+[Some paragraphs taken from the above URL]
+
+The main purpose of a bug report is to enable us to fix the bug. The
+most important prerequisite for this is that the report must be
+complete and self-contained, which we explain in detail below.
+
+Before you report a bug, please check the list of well-known bugs and,
+if possible in any way, try a current development snapshot.
+
+Summarized bug reporting instructions
+-------------------------------------
+
+What we need
+
+Please include in your bug report all of the following items, the
+first three of which can be obtained from the output of gcc -v:
+
+    * the exact version of GCC;
+    * the system type;
+    * the options given when GCC was configured/built;
+    * the complete command line that triggers the bug;
+    * the compiler output (error messages, warnings, etc.); and
+    * the preprocessed file (*.i*) that triggers the bug, generated by
+      adding -save-temps to the complete compilation command, or, in
+      the case of a bug report for the GNAT front end, a complete set
+      of source files (see below).
+
+What we do not want
+
+    * A source file that #includes header files that are left out
+      of the bug report (see above)
+    * That source file and a collection of header files.
+    * An attached archive (tar, zip, shar, whatever) containing all
+      (or some :-) of the above.
+    * A code snippet that won't cause the compiler to produce the
+      exact output mentioned in the bug report (e.g., a snippet with
+      just a few lines around the one that apparently triggers the
+      bug, with some pieces replaced with ellipses or comments for
+      extra obfuscation :-)
+    * The location (URL) of the package that failed to build (we won't
+      download it, anyway, since you've already given us what we need
+      to duplicate the bug, haven't you? :-)
+    * An error that occurs only some of the times a certain file is
+      compiled, such that retrying a sufficient number of times
+      results in a successful compilation; this is a symptom of a
+      hardware problem, not of a compiler bug (sorry)
+    * E-mail messages that complement previous, incomplete bug
+      reports. Post a new, self-contained, full bug report instead, if
+      possible as a follow-up to the original bug report
+    * Assembly files (*.s) produced by the compiler, or any binary files,
+      such as object files, executables, core files, or precompiled
+      header files
+    * Duplicate bug reports, or reports of bugs already fixed in the
+      development tree, especially those that have already been
+      reported as fixed last week :-)
+    * Bugs in the assembler, the linker or the C library. These are
+      separate projects, with separate mailing lists and different bug
+      reporting procedures
+    * Bugs in releases or snapshots of GCC not issued by the GNU
+      Project. Report them to whoever provided you with the release
+    * Questions about the correctness or the expected behavior of
+      certain constructs that are not GCC extensions. Ask them in
+      forums dedicated to the discussion of the programming language
+
+
+Known Bugs and Non-Bugs
+-----------------------
+
+[Please see /usr/share/doc/gcc/FAQ or http://gcc.gnu.org/faq.html first]
+
+
+C++ exceptions don't work with C libraries
+------------------------------------------
+
+[Taken from the closed bug report #22769] C++ exceptions don't work
+with C libraries, if the C code wasn't designed to be thrown through.
+A solution could be to translate all C libraries with -fexceptions.
+Mostly trying to throw an exception in a callback function (qsort,
+Tcl command callbacks, etc ...). Example:
+
+    #include <stdio.h>
+    #include <tcl.h>
+
+    class A {};
+
+    static
+    int SortCondition(void const*, void const*)
+    {
+        printf("throwing 'sortcondition' exception\n");
+        throw A();
+    }
+
+    int main(int argc, char *argv[])
+    {
+        int list[2];
+
+        try {
+            SortCondition(NULL,NULL);
+        } catch (A) {
+            printf("caught test-sortcondition exception\n");
+        }
+        try {
+            qsort(&list, sizeof(list)/sizeof(list[0]),sizeof(list[0]),
+                 &SortCondition);
+        } catch (A) {
+            printf("caught real-sortcondition exception\n");
+        }
+        return 0;
+}
+
+Andrew Macleod <amacleod@cygnus.com> responded:
+
+When compiled with the table driven exception handling, exception can only
+be thrown through functions which have been compiled with the table driven EH.
+If a function isn't compiled that way, then we do not have the frame
+unwinding information required to restore the registers when unwinding.
+
+I believe the setjmp/longjmp mechanism will throw through things like this, 
+but its produces much messier code.  (-fsjlj-exceptions)
+
+The C compiler does support exceptions, you just have to turn them on
+with -fexceptions.
+
+Your main options are to:
+  a) Don't use callbacks, or at least don't throw through them.
+  b) Get the source and compile the library with -fexceptions (You have to
+     explicitly turn on exceptions in the C compiler)
+  c) always use -fsjlj-exceptions (boo, bad choice :-)
+
+
+g++: "undefined reference" to static const array in class
+---------------------------------------------------------
+
+The following code compiles under GNU C++ 2.7.2 with correct results,
+but produces the same linker error with GNU C++ 2.95.2.
+Alexandre Oliva <oliva@lsd.ic.unicamp.br> responded:
+
+All of them are correct.  A static data member *must* be defined
+outside the class body even if it is initialized within the class
+body, but no diagnostic is required if the definition is missing.  It
+turns out that some releases do emit references to the missing symbol,
+while others optimize it away.
+
+#include <iostream>
+
+class Test
+{
+  public:
+    Test(const char *q);
+  protected:
+    static const unsigned char  Jam_signature[4]   = "JAM";
+};
+
+Test::Test(const char *q)
+{
+  if (memcmp(q, Jam_signature, sizeof(Jam_signature)) != 0)
+  cerr << "Hello world!\n";
+}
+
+int main(void)
+{
+  Test::Test("JAM");
+  return 0;
+}
+
+g++: g++ causes passing non const ptr to ptr to a func with const arg
+     to cause an error (not a bug)
+---------------------------------------------------------------------
+
+Example:
+
+#include <stdio.h>
+void test(const char **b){
+        printf ("%s\n",*b);
+}
+int main(void){
+        char *test1="aoeu";
+        test(&test1);
+}
+
+make const
+g++     const.cc   -o const
+const.cc: In function `int main()':
+const.cc:7: passing `char **' as argument 1 of `test(const char **)' adds cv-quals without intervening `const'
+make: *** [const] Error 1
+
+Answer from "Martin v. Loewis" <martin@loewis.home.cs.tu-berlin.de>:
+
+> ok... maybe I missed something.. I haven't really kept up with the latest in
+> C++ news.  But I've never heard anything even remotly close to passing a non
+> const var into a const arg being an error before.
+
+Thanks for your bug report. This is a not a bug in the compiler, but
+in your code. The standard, in 4.4/4, puts it that way
+
+# A conversion can add cv-qualifiers at levels other than the first in
+# multi-level pointers, subject to the following rules:
+# Two pointer types T1 and T2 are similar if there exists a type T and
+# integer n > 0 such that:
+#   T1 is cv(1,0) pointer to cv(1,1) pointer to ... cv(1,n-1)
+#   pointer to cv(1,n) T
+# and
+#   T2 is cv(2,0) pointer to cv(2,1) pointer to ... cv(2,n-1)
+#   pointer to cv(2,n) T
+# where each cv(i,j) is const, volatile, const volatile, or
+# nothing. The n-tuple of cv-qualifiers after the first in a pointer
+# type, e.g., cv(1,1) , cv(1,2) , ... , cv(1,n) in the pointer type
+# T1, is called the cv-qualification signature of the pointer type. An
+# expression of type T1 can be converted to type T2 if and only if the
+# following conditions are satisfied:
+#  - the pointer types are similar.
+#  - for every j > 0, if const is in cv(1,j) then const is in cv(2,j) ,
+#    and similarly for volatile.
+#  - if the cv(1,j) and cv(2,j) are different, then const is in every
+#    cv(2,k) for 0 < k < j.
+
+It is the last rule that your code violates. The standard gives then
+the following example as a rationale:
+
+# [Note: if a program could assign a pointer of type T** to a pointer
+# of type const T** (that is, if line //1 below was allowed), a
+# program could inadvertently modify a const object (as it is done on
+# line //2). For example,
+# int main() { 
+#   const char c = 'c'; 
+#   char* pc; 
+#   const char** pcc = &pc; //1: not allowed 
+#   *pcc = &c; 
+#   *pc = 'C'; //2: modifies a const object 
+# }
+# - end note]
+
+If you question this line of reasoning, please discuss it in one of
+the public C++ fora first, eg. comp.lang.c++.moderated, or
+comp.std.c++.
+
+
+cpp removes blank lines
+-----------------------
+
+With the new cpp, you need to add -traditional to the "cpp -P" args, else 
+blank lines get removed.
+
+[EDIT ME: scan Debian bug reports and write some nice summaries ...]
--- gcc-5-5.4.0.orig/debian/README.C++
+++ gcc-5-5.4.0/debian/README.C++
@@ -0,0 +1,35 @@
+libstdc++ is an implementation of the Standard C++ Library, including the
+Standard Template Library (i.e. as specified by ANSI and ISO).
+
+Some notes on porting applications from libstdc++-2.90 (or earlier versions)    
+to libstdc++-v3 can be found in the libstdc++6-4.3-doc package. After the
+installation of the package, look at:
+
+  file:///usr/share/doc/gcc-4.3-base/libstdc++/html/17_intro/porting-howto.html
+
+On Debian GNU/Linux you find additional documentation in the
+libstdc++6-4.3-doc package. After installing these packages,
+point your browser to
+
+  file:///usr/share/doc/libstdc++6-4.3-doc/libstdc++/html/index.html
+
+Other documentation can be found:
+
+    http://www.sgi.com/tech/stl/
+
+with a good, recent, book on C++.
+
+A great deal of useful C++ documentation can be found in the C++ FAQ-Lite,
+maintained by Marshall Cline <cline@parashift.com>.  It can be found at the
+mirror sites linked from the following URL (this was last updated on
+2010/09/11):
+
+     http://www.parashift.com/c++-faq/
+
+or use some search engin site to find it, e.g.:
+
+     http://www.google.com/search?q=c%2B%2B+faq+lite
+
+Be careful not to use outdated mirors.
+
+Please send updates to this list as bug report for the g++ package.
--- gcc-5-5.4.0.orig/debian/README.Debian
+++ gcc-5-5.4.0/debian/README.Debian
@@ -0,0 +1,45 @@
+               The Debian GNU Compiler Collection setup
+               ========================================
+
+Please see the README.Debian in /usr/share/doc/gcc, contained in the
+gcc package for a description of the setup of the different compiler
+versions.
+
+For general discussion about the Debian toolchain (GCC, glibc, binutils)
+please use the mailing list debian-toolchain@lists.debian.org; for GCC
+specific things, please use debian-gcc@lists.debian.org.  When in doubt
+use the debian-toolchain ML.
+
+
+Maintainers of these packages
+-----------------------------
+
+Matthias Klose <doko@debian.org>
+Ludovic Brenta <ludovic@ludovic-brenta.org>	(gnat)
+Iain Buclaw <ibuclaw@ubuntu.com>		(gdc)
+Aurelien Jarno <aurel32@debian.org>		(mips*-linux)
+Aurelien Jarno <aurel32@debian.org>		(s390X*-linux)
+
+The following ports lack maintenance in Debian: powerpc, ppc64,
+sparc, sparc64 (unmentioned ports are usually handled by the Debian
+porters).
+
+Former and/or inactive maintainers of these packages
+----------------------------------------------------
+
+Falk Hueffner <falk@debian.org>			(alpha-linux)
+Ray Dassen <jdassen@debian.org>
+Jeff Bailey <jbailey@nisa.net>			(hurd-i386)
+Joel Baker <fenton@debian.org>			(netbsd-i386)
+Randolph Chung <tausq@debian.org>		(ia64-linux)
+Philip Blundell <pb@debian.org>			(arm-linux)
+Ben Collins <bcollins@debian.org>		(sparc-linux)
+Dan Jacobowitz <dan@debian.org>			(powerpc-linux)
+Thiemo Seufer <ths@networkno.de>		(mips*-linux)
+Matt Taggart <taggart@carmen.fc.hp.com>		(hppa-linux)
+Gerhard Tonn <GerhardTonn@swol.de>		(s390-linux)
+Roman Zippel <zippel@linux-m68k.org>		(m68k-linux)
+Arthur Loiret <arthur.loiret@gmail.com>		(gdc)
+
+===============================================================================
+
--- gcc-5-5.4.0.orig/debian/README.cross
+++ gcc-5-5.4.0/debian/README.cross
@@ -0,0 +1,144 @@
+Building cross-compiler Debian packages
+---------------------------------------
+
+It is possible to build C and C++ cross compilers and support libraries
+from gcc-4.0 source package. This document describes how to do so.
+Cross-compiler build support is not perfect yet, please send fixes
+and improvements to debian-gcc@lists.debian.org and 
+debian-embedded@lists.debian.org
+
+Before you start, you should probably check available pre-built
+cross-toolchain debs. Available at http://www.emdebian.org
+
+Old patches could be reached at
+  http://zigzag.lvk.cs.msu.su/~nikita/debian/
+  
+If they are no longer there, you may check EmDebian web site at
+  http://www.emdebian.org/
+or ask debian-embedded@lists.debian.org for newer location.
+
+Please check http://bugs.debian.org/391445 if you are about building
+gcc-4.3 or above.
+
+Most of them has been merged with gcc debian sources.
+
+0. What's wrong with toolchain-source approach
+
+Package toolchain-source contains sources for binutils and gcc, as well as
+some support scripts to build cross-compiler packages. They seem to work.
+
+However, there is one fundamental problem with this approach.
+Gcc package is actively maintained and frequently updated. These updates
+do contain bug fixes and improvements, especially for non-x86 architectures.
+Cross-compilers built using toolchain-source will not get those fixes unless
+toolchain-source package is updated after each binutils and gcc update.
+The later is not hapenning in real life. For example, toolchain-source
+was upgraded from gcc-3.2 to gcc-3.3 half a year later than gcc-3.3 became
+Debian default compiler.
+
+Keeping toolchain-source package up-to-date requires lots of work, and seems
+to be a waste of time. It is much better to build cross-compilers directly
+from gcc source package.
+
+
+1. What is needed to build a cross-compiler from gcc-4.3 source
+
+1.1. dpkg-cross package
+
+Dpkg-cross package contains several tools to manage cross-compile environment.
+
+It can convert native debian library and lib-dev packages for the target
+architecture to binary-all packages that keep libraries and headers under
+/usr/$(TARGET)/.
+
+Also it contains helper tools for cross-compiling debian packages. Some of
+these tools are used while building libgcc1 and libstdc++ library packages.
+The resulting library packages follow the same convensions as library packages
+converted by dpkg-cross.
+
+Currently, at least version 1.18 of dpkg-cross is needed for cross-gcc
+package build. Version 1.32 of dpkg-cross is needed in order to build gcc-4.3.
+
+1.2. cross-binutils for the target
+
+You need cross-binutils for your target to build cross-compiler.
+Binutils-multiarch package will not work because it does not provide cross-
+assemblers.
+
+If you don't want to use pre-built cross-binutils packages, you may build
+your own from binutils debian source package, using patches posted to
+bug #231707. Please use the latest of patch versions available there.
+
+Alternatively, you may use toolchain-source package to build cross-binutils
+(but in this case you will probably also want to use toolchain-source
+to build cross-compiler itself). However, multilib'ed cross-compilers may
+not build or work with these binutils.
+
+1.3. libc for target
+
+You also need libc library and development packages for the target
+architecture installed.
+
+To get those, download linux-kernel-headers, libc6, and libc6-dev binary
+debs for your target, convert those using dpkg-cross -b, and install
+resulting -arch-cross debs. Consult dpkg-cross manual page for more
+information.
+
+Building with/for alternative libc's is not supported yet (but this is in
+TODO).
+
+Note that if you plan to use your cross-toolchain to develop kernel drivers
+or similar low-level things, you will probably also need kernel headers
+for the exact kernel version that your target hardware uses.
+
+
+2. Building cross-compiler packages
+
+Get gcc-4.3 source package.
+
+Unpack it using dpkg-source -x, and cd to the package directory.
+
+Set GCC_TARGET environment variable to the target architectire name. Note
+that currently you should use debian architecture name (i.e 'powerpc' or 'arm'),
+not GNU system type (i.e. 'powerpc-linux' or 'arm-linux'). Setting GCC_TARGET
+to GNU system type will cause cross-compiler build to fail.
+
+Instead of setting GCC_TARGET, target architecture name may be put into
+debian/target file. If both GCC_TARGET is defined and debian/target file
+exists, GCC_TARGET is used.
+
+Run debian/rules control. This will change debian/control file,
+adjusting build-depends.  By default, the packages will not depend on the
+system -base package. A variable DEB_CROSS_INDEPENDENT has been merged with DEB_CROSS variable.
+
+You can then build with either
+
+$ GCC_TARGET=[arch] dpkg-buildpackage -rfakeroot
+
+3. Using crosshurd
+
+Jeff Bailey <jbailey@raspberryginger.com> suggests alternate way to setup
+environment to build cross-compiler, using 'crosshurd' package. 
+Crosshurd is like debootstrap but cross-arch, and works on the Hurd,
+Linux and FreeBSD.  (The name is historical).
+
+If you setup your environment with crosshurd, you will need to fix symlinks
+in lib and usr/lib to be relative instead of absolute. For example:
+
+lrwxrwxrwx    1 root     root           20 2004-05-06 23:02 libcom_err.so -> /lib/libcom_err.so.2
+
+Needs to be changed to:
+
+lrwxrwxrwx    1 root     root           20 2004-05-06 23:02 libcom_err.so -> ../../lib/libcom_err.so.2
+
+Also, if you choose this method, set the environment variable 'with_sysroot'
+to point to the ABSOLUTE PATH where the crosshurd was done.
+
+Note however that build-depends of cross-gcc and dependencies in generated
+libgcc1 and libstdc++ packages assume that you use dpkg-cross to set up
+your environment, and may be wrong or incomplete if you use alternate methods.
+But probably you don't care.
+
+--
+Nikita V. Youshchenko <yoush@debian.org> - Jun 2004
+Hector Oron Martinez  <hector.oron@gmail.com> - Oct 2006
--- gcc-5-5.4.0.orig/debian/README.gnat
+++ gcc-5-5.4.0/debian/README.gnat
@@ -0,0 +1,35 @@
+If you want to develop Ada programs and libraries on Debian, please
+read the Debian Policy for Ada:
+
+http://people.debian.org/~lbrenta/debian-ada-policy.html
+
+The default Ada compiler is and always will be the package `gnat'.
+Debian contains many programs and libraries compiled with it, which
+are all ABI-compatible.
+
+Starting with gnat-4.2, Debian provides both zero-cost and
+setjump/longjump versions of the run-time library.  The zero-cost
+exception handling mechanism is the default as it provides the best
+performance.  The setjump/longjump exception handling mechanism is new
+and only provided as a static library.  It is necessary to use this
+exception handling mechanism in distributed (annex E) programs.  If
+you wish to use the new sjlj library:
+
+1) call gnatmake with --RTS=sjlj
+2) call gnatbind with -static
+
+Do NOT link your programs with libgnat-4.2.so, because it uses the ZCX
+mechanism.
+
+
+This package also includes small tools covering specific needs.
+
+* When linking objects compiled from both Ada and C sources, you need
+  to use compatible versions of the Ada and C compilers. The
+  /usr/bin/gnatgcc symbolic link targets a version of the C compiler
+  compatible with the default Ada compiler, and may differ from the
+  default C compiler /usr/bin/gcc.
+
+* When packaging Ada sources for Debian, you may want to read the
+  /usr/share/ada/debian_packaging.mk Makefile snippet and/or include
+  it from debian/rules in order to set sensible defaults.
--- gcc-5-5.4.0.orig/debian/README.libstdc++-baseline.in
+++ gcc-5-5.4.0/debian/README.libstdc++-baseline.in
@@ -0,0 +1,2 @@
+The libstdc++ baseline file is a list of symbols exported by the
+libstdc++ library.
--- gcc-5-5.4.0.orig/debian/README.maintainers
+++ gcc-5-5.4.0/debian/README.maintainers
@@ -0,0 +1,196 @@
+-*- Outline -*-
+
+Read this file if you are a Debian Developer or would like to become
+one, or if you would like to create your own binary packages of GCC.
+
+* Overview
+
+From the GCC sources, Debian currently builds 3 source packages and
+almost 100 binary packages, using a single set of build scripts.  The
+3 source packages are:
+
+gcc-x.y: C, C++, Fortran, Objective-C and Objective-C++, plus many
+         common libraries like libssp and libgcc.
+gcj-x.y: Java.
+gnat-x.y: Ada.
+
+The way we do this is quite peculiar, so listen up :)
+
+When we build from the gcc-x.y source package, we produce, among many
+others, a gcc-x.y-source binary package that contains the pristine
+upstream tarball and some Debian-specific patches.  Any user can then
+install this package on their Debian system, and will have the full
+souces in /usr/src/gcc-x.y/gcc-<timestamp>.tar.bz2, along with the
+Makefile snippets that unpack and patch them.
+
+The intended use for this package is twofold: (a) allow users to build
+their own cross-compilers, and (b) build the other two packages,
+gcj-x.y and gnat-x.y.
+
+- gcc-x.y requires only a C compiler to build and produces C, C++,
+  Fortran, Go and Objective-C compilers and libraries. It also
+  produces the binary package gcc-x.y-source containing all the
+  sources and patches in a tarball.
+
+- gcj-x.y build-depends on gcc-x.y-source and C++ and Java compilers.
+  Its .orig.tar.bz2 file only contains an empty directory; the real
+  sources from which it builds the binary packages are in
+  gcc-x.y-source.
+
+- gnat-x.y build-depends on gcc-x.y-source and an Ada compiler.  It
+  does not even have an .orig.tar.bz2 package; it is a Debian native
+  package.
+
+The benefits of this split are many:
+
+- bootstrapping a subset of languages is much faster than
+  bootstrapping all languages and libraries (which can take a full
+  week on slow architectures like mips or arm)
+
+- the language maintainers don't have to wait for each other
+
+- for new ports, the absence of a port of, say, gnat-x.y does not
+  block the porting of gcc-x.y.
+
+gcc-x.y-source is also intended for interested users to build
+cross-compiler packages.  Debian cannot provide all possible
+cross-compiler packages (i.e. all possible host, target, language and
+library combinations), so instead tries to facilitate building them.
+
+* The build sequence
+
+As for all other Debian packages, you build GCC by calling
+debian/rules.
+
+The first thing debian/rules does it to look at the top-most entry in
+debian/changelog: this tells it which source package it is building.
+For example, if the first entry in debian/changelog reads:
+
+gcj-4.3 (4.3-20070609-1) unstable; urgency=low
+
+  * Upload as gcj-4.3.
+
+ -- Ludovic Brenta <lbrenta@debian.org>  Tue, 26 Jun 2007 00:26:42 +0200
+
+then, debian/rules will build only the Java binary packages.
+
+The second step is to build debian/control from debian/control.m4 and
+a complex set of rules specified in debian/rules.conf.  The resulting
+control file contains only the binary packages to be built.
+
+The third step is to select which patches to apply (this is done in
+debian/rules.defs), and then to apply the selected patches (see
+debian/rules.patch).  The result of this step is a generated
+debian/patches/series file for use by quilt.
+
+The fourth step is to unpack the GCC source tarball.  This tarball is
+either in the build directory (when building gcc-x.y), or in
+/usr/src/gcc-x.y/gcc-x.y.z.tar.xz (when building the other source
+packages).
+
+The fifth step is to apply all patches to the unpacked sources with
+quilt.
+
+The sixth step is to create a "build" directory, cd into it, call
+../src/configure, and bootstrap the compiler and libraries selected.
+This is in debian/rules2.
+
+The seventh step is to call "make install" in the build directory:
+this installs the compiler and libraries into debian/tmp
+(i.e. debian/tmp/usr/bin/gcc, etc.)
+
+The eighth step is to run the GCC test suite.  This actually takes at
+least as much time as bootstrapping, and you can disable it by setting
+WITHOUT_CHECK to "yes" in the environment.
+
+The ninth step is to build the binary packages, i.e. the .debs.  This
+is done by a set of language- and architecture-dependent Makefile
+snippets in the debian/rules.d/ directory, which move files from the
+debian/tmp tree to the debian/<package> trees.
+
+* Making your own packages
+
+In this example, we will build our own gnat-x.y package.
+
+1) Install gcc-x.y-source, which contains the real sources:
+
+# aptitude install gcc-x.y-source
+
+2) Create a build directory:
+
+$ mkdir gnat-x.y-x.y.z; cd gnat-x.y-x.y.z
+
+3) Checkout from Subversion:
+
+$ svn checkout svn://svn.debian.org/gcccvs/branches/sid/gcc-x.y/debian
+
+4) Edit the debian/changelog file, adding a new entry at the top that
+   starts with "gnat-x.y".
+
+5) Generate the debian/control file, adjusted for gnat:
+
+$ debian/rules control
+
+8) Build:
+
+$ dpkg-buildpackage
+
+* Hints
+
+You need a powerful machine to build GCC.  The larger, the better.
+The build scripts take advantage of as many CPU threads as are
+available in your box (for example: 2 threads on a dual-core amd64; 4
+threads on a dual-core POWER5; 32 threads on an 8-core UltraSPARC T1,
+etc.).
+
+If you have 2 GB or more of physical RAM, you can achieve maximum
+performance by building in a tmpfs, like this:
+
+1) as root, create the new tmpfs:
+
+# mount -t tmpfs -o size=1280m none /home/lbrenta/src/debian/ram
+
+By default, the tmpfs will be limited to half your physical RAM.  The
+beauty of it is that it only consumes as much physical RAM as
+necessary to hold the files in it; deleting files frees up RAM.
+
+2) As your regular user, create the working directory in the tmpfs
+
+$ cp --archive ~/src/debian/gcc-x.y-x.y.z ~/src/debian/ram
+
+3) Build in there.  On my dual-core, 2 GHz amd64, it takes 34 minutes
+   to build gnat, and the tmpfs takes 992 MiB of physical RAM but
+   exceeds 1 GiB during the build.
+
+Note that the build process uses a lot of temporary files.  Your $TEMP
+directory should therefore also be in a ram disk.  You can achieve
+that either by mounting it as tmpfs, or by setting TEMP to point to
+~/src/debian/ram.
+
+Also note that each thread in your processor(s) will run a compiler in
+it and use up RAM.  Therefore your physical memory should be:
+
+Physical_RAM >= 1.2 + 0.4 * Threads (in GiB)
+
+(this is an estimate; your mileage may vary).  If you have less
+physical RAM than recommended, reduce the number of threads allocated
+to the build process, or do not use a tmpfs to build.
+
+* Patching GCC
+
+Debian applies a large number of patches to GCC as part of the build
+process.  It uses quilt but the necessary debian/patches/series is not
+part of the packaging scripts; instead, "debian/rules patch" generates
+this file by looking at debian/control (which is itself generated!),
+debian/changelog and other files.  Then it applies all the patches.
+At this point, you can use quilt as usual:
+
+$ cd ~/src/debian/gcc-x.y
+$ export QUILT_PATCHES=$PWD/debian/patches
+$ quilt series
+
+If you add new patches, remember to add them to the version control
+system too.
+
+-- 
+Ludovic Brenta, 2012-04-02.
--- gcc-5-5.4.0.orig/debian/README.snapshot
+++ gcc-5-5.4.0/debian/README.snapshot
@@ -0,0 +1,36 @@
+Debian gcc-snapshot package
+===========================
+
+This package contains  a recent development SNAPSHOT of all files
+contained in the GNU Compiler Collection (GCC).
+
+DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES!
+
+This package will NEVER hit the testing distribution. It's used for
+tracking gcc bugs submitted to the Debian BTS in recent development
+versions of gcc.
+
+To use this snapshot, you should set the following environment variables:
+
+	LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH
+	PATH=/usr/lib/gcc-snapshot/bin:$PATH
+
+You might also like to use a shell script to wrap up this 
+funcationality, e.g. 
+ 
+place in /usr/local/bin/gcc-snapshot and chmod +x it 
+ 
+----------- snip ----------
+#! /bin/sh
+LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH
+PATH=/usr/lib/gcc-snapshot/bin:$PATH
+gcc "$@"
+----------- snip ----------
+
+Make the same for g++, g77, gij, gcj, cpp, ...
+ 
+Don't forget the quotes around the $@ or gcc will not parse it's 
+command line correctly! 
+
+Unset these variables before building Debian packages destined for an
+upload to ftp-master.debian.org.
--- gcc-5-5.4.0.orig/debian/README.source
+++ gcc-5-5.4.0/debian/README.source
@@ -0,0 +1,16 @@
+Patches applied to the Debian version of GCC
+--------------------------------------------
+
+Debian specific patches can be found in the debian/patches directory.
+Quilt is used as the patch system.  See /usr/share/doc/quilt/README.source
+for details about quilt.
+
+Patches are applied by calling `debian/rules patch'.  The `series'
+file is constructed on the fly based on the files found in the to
+debian/rules.patch "debian_patches" variable, configure scripts are
+regenerated in the `patch' target. The gcc source is unpacked under
+src/ this needs to be reflected in the patch header.
+
+The source packages gcj-x.y and gnat-x.y do not contain copies of the
+source code but build-depend on the appropriate gcc-x.y-source package
+instead.
--- gcc-5-5.4.0.orig/debian/README.ssp
+++ gcc-5-5.4.0/debian/README.ssp
@@ -0,0 +1,28 @@
+Stack smashing protection is a feature of GCC that enables a program to
+detect buffer overflows and immediately terminate execution, rather than
+continuing execution with corrupt internal data structures. It uses
+"canaries" and local variable reordering to reduce the likelihood of
+stack corruption through buffer overflows.
+
+Options that affect stack smashing protection:
+
+-fstack-protector
+    Enables protection for functions that are vulnerable to stack
+    smashing, such as those that call alloca() or use pointers.
+
+-fstack-protector-all
+    Enables protection for all functions.
+
+-Wstack-protector
+    Warns about functions that will not be protected. Only active when
+    -fstack-protector has been used.
+
+Applications built with stack smashing protection should link with the
+ssp library by using the option "-lssp" for systems with glibc-2.3.x or
+older; glibc-2.4 and newer versions provide this functionality in libc.
+
+The Debian architectures alpha, hppa, ia64, m68k, mips, mipsel do not
+have support for stack smashing protection.
+
+More documentation can be found at the project's website:
+http://researchweb.watson.ibm.com/trl/projects/security/ssp/
--- gcc-5-5.4.0.orig/debian/TODO
+++ gcc-5-5.4.0/debian/TODO
@@ -0,0 +1,50 @@
+(It is recommended to edit this file with emacs' todoo mode)
+Last updated: 2008-05-02
+
+* General
+
+- Clean up the sprawl of debian/rules.  I'm sure there are neater
+  ways to do some of it; perhaps split it up into some more files?
+  Partly done.
+
+- Make debian/rules control build the control file without unpacking
+  the sources or applying patches.  Currently, it unpacks the sources,
+  patches them, creates the control file, and a subsequent
+  dpkg-buildpackage deletes the sources, re-unpacks them, and
+  re-patches them.
+
+- Reorganise debian/rules.defs to decide which packages to build in a
+  more straightforward and less error-prone fashion: (1) start with
+  all languages; override the list of languages depending on the name
+  of the source package (gcc-4.3, gnat-4.3, gdc-4.3, gcj-4.3).  (2)
+  filter the list of languages depending on the target platform; (3)
+  depending on the languages to build, decide on which libraries to
+  build.
+
+o [Ludovic Brenta] Ada
+
+- Done: Link the gnat tools with libgnat.so, instead of statically.
+
+- Done: Build libgnatvsn containing parts of the compiler (version
+  string, etc.) under GNAT-Modified GPL.  Link the gnat tools with it.
+
+- Done: Build libgnatprj containing parts of the compiler (the project
+  manager) under pure GPL.  Link the gnat tools with it.
+
+- Done: Build both the zero-cost and setjump/longjump exceptions
+  versions of libgnat.  In particular, gnat-glade (distributed systems)
+  works best with SJLJ.
+
+- Done: Re-enable running the test suite.
+
+- Add support for building cross-compilers.
+
+- Add support for multilib (not yet supported upstream).
+
+* Fortran
+
+- gfortran man page generation
+
+* Java
+
+- build java-gcj-compat from the gcc source?
--- gcc-5-5.4.0.orig/debian/acats-killer.sh
+++ gcc-5-5.4.0/debian/acats-killer.sh
@@ -0,0 +1,62 @@
+#! /bin/sh
+
+# on ia64 systems, the acats hangs in unaligned memory accesses.
+# kill these testcases.
+
+pidfile=acats-killer.pid
+
+usage()
+{
+    echo >&2 "usage: `basename $0` [-p <pidfile>] <ada logfile> <next logfile>"
+    exit 1
+}
+
+while [ $# -gt 0 ]; do
+    case $1 in
+    -p)
+	pidfile=$2
+	shift
+	shift
+	;;
+    -*)
+	usage
+	;;
+    *)
+	break
+    esac
+done
+
+[ $# -eq 2 ] || usage
+
+logfile=$1
+stopfile=$2
+interval=30
+
+echo $$ > $pidfile
+
+while true; do
+    if [ -f "$stopfile" ]; then
+	echo "`basename $0`: finished."
+	rm -f $pidfile
+	exit 0
+    fi
+    sleep $interval
+    if [ ! -f "$logfile" ]; then
+	continue
+    fi
+    pids=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }')
+    if [ -n "$pids" ]; then
+	sleep $interval
+        pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }')
+	if [ "$pids" = "$pids2" ]; then
+	    #echo kill: $pids
+	    kill $pids
+	    sleep 1
+            pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }')
+	    if [ "$pids" = "$pids2" ]; then
+	        #echo kill -9: $pids
+	        kill -9 $pids
+	    fi
+	fi
+    fi
+done
--- gcc-5-5.4.0.orig/debian/ada/confirm_debian_bugs.py
+++ gcc-5-5.4.0/debian/ada/confirm_debian_bugs.py
@@ -0,0 +1,1016 @@
+#!/usr/bin/env python
+
+# Helper when migrating bugs from a gnat version to another.
+
+from __future__ import print_function
+import os.path
+import re
+import shutil
+import subprocess
+import tempfile
+
+os.environ ['LC_ALL'] = 'C'
+
+# If == new_version, "reassign" -> "found" and "retitle" -> "fixed".
+# Once the bug tracking system is informed,
+# please update this number.
+old_version = "4.8"
+
+# The current version.
+new_version = "4.9"
+deb_version = \
+    subprocess.check_output (("dpkg", "--status", "gnat-" + new_version)) \
+    .split ("\n") [7] [len ("Version: "):]
+
+# Each bug has its own subdirectory in WORKSPACE.
+# Every bug subdir is removed if the bug is confirmed,
+# and WORKSPACE is removed if empty.
+workspace = tempfile.mkdtemp (suffix = "-gnat-" + deb_version + "-bugs")
+
+def attempt_to_reproduce (bug, make, sources):
+    tmp_dir = os.path.join (workspace, "bug{}".format (bug))
+    os.mkdir (tmp_dir)
+
+    for (name, contents) in sources:
+        with open (os.path.join (tmp_dir, name), "w") as f:
+            f.write (contents)
+
+    path = os.path.join (tmp_dir, "stderr.log")
+    with open (path, "w") as e:
+        status = subprocess.call (make, stderr=e, cwd=tmp_dir)
+    with open (path, "r") as e:
+        stderr = e.read ()
+    return tmp_dir, status, stderr
+
+def reassign_and_remove_dir (bug, tmp_dir):
+    if old_version == new_version:
+        print ("found {} {}".format (bug, deb_version))
+    else:
+        print ("reassign {} {} {}".format (bug, "gnat-" + new_version, deb_version))
+    shutil.rmtree (tmp_dir)
+
+def report (bug, message, output):
+    print ("# {}: {}.".format (bug, message))
+    for line in output.split ("\n"):
+        print ("# " + line)
+
+def report_and_retitle (bug, message, output):
+    report (bug, message, output)
+    if old_version == new_version:
+        print ("fixed {} {}".format (bug, deb_version))
+    else:
+        print ("retitle {} [Fixed in {}] <current title>".format (bug, new_version))
+
+def check_compiles_but_should_not (bug, make, sources):
+    tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources)
+    if status == 0:
+        reassign_and_remove_dir (bug, tmp_dir)
+    else:
+        report_and_retitle (bug, "now fails to compile (bug is fixed?)", stderr)
+
+def check_reports_an_error_but_should_not (bug, make, sources, regex):
+    tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources)
+    if status == 0:
+        report_and_retitle (bug, "now compiles (bug is fixed?)", stderr)
+    elif re.search (regex, stderr):
+        reassign_and_remove_dir (bug, tmp_dir)
+    else:
+        report (bug, "still fails to compile, but with a new stderr", stderr)
+
+def check_reports_error_but_forgets_one (bug, make, sources, regex):
+    tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources)
+    if status == 0:
+        report (bug, "now compiles (?)", stderr);
+    elif re.search (regex, stderr):
+        report_and_retitle (bug, "now reports the error (bug is fixed ?)", stderr)
+    else:
+        reassign_and_remove_dir (bug, tmp_dir)
+
+def check_produces_a_faulty_executable (bug, make, sources, regex, trigger):
+    tmp_dir, status, stderr = attempt_to_reproduce (bug, make, sources)
+    if status != 0:
+        report (bug, "cannot compile the trigger anymore", stderr)
+    else:
+        output = subprocess.check_output ((os.path.join (tmp_dir, trigger),), cwd=tmp_dir)
+        if re.search (regex, output):
+            reassign_and_remove_dir (bug, tmp_dir)
+        else:
+            report_and_retitle (bug, "output of the trigger changed (bug fixed?)", output)
+
+def print_skipped (bug, message):
+    print ("# {} skipped: {}".format (bug, message))
+
+######################################################################
+
+print_skipped (182360, "cannot be reproduced automatically.")
+
+check_reports_an_error_but_should_not (
+    bug = 244936,
+    make = ("gnatmake", "p"),
+    regex = 'p\.ads:3:25: "foo" is hidden within declaration of instance',
+    sources = (
+        ("foo.ads", """generic
+procedure foo;
+"""),
+        ("foo.adb", """procedure foo is
+begin
+   null;
+end foo;
+"""), ("p.ads", """with foo;
+package p is
+   procedure FOO is new foo;        -- OK
+end p;
+""")))
+
+check_compiles_but_should_not (
+    bug = 244970,
+    make = ("gnatmake", "pak5"),
+    sources = (
+        ("pak1.ads", """generic
+package pak1 is
+end pak1;
+"""),
+        ("pak1-pak2.ads", """generic
+package pak1.pak2 is
+end pak1.pak2;
+"""),
+        ("pak5.ads", """with pak1.pak2;
+generic
+   with package new_pak2 is new pak1.pak2;  -- ERROR: illegal use of pak1
+package pak5 is
+end pak5;
+""")))
+
+check_reports_an_error_but_should_not (
+    bug = 246187,
+    make = ("gnatmake", "test_43"),
+    regex = "Error detected at system.ads:152:5",
+    sources = (
+        ("test_43.ads", """package Test_43 is
+  type T1 is private;
+
+private
+
+   type T2 is record
+      a: T1;
+   end record;
+   type T2_Ptr is access T2;
+
+   type T1 is record
+      n: T2_Ptr := new T2;
+   end record;
+
+end Test_43;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 247013,
+    make = ("gnatmake", "test_53"),
+    sources = (
+        ("test_53.ads", """generic
+   type T1 is private;
+package Test_53 is
+   type T2 (x: integer) is new T1;  -- ERROR: x not used
+end Test_53;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 247017,
+    make = ("gnatmake", "test_59"),
+    sources = (
+        ("test_59.adb", """procedure Test_59 is
+
+    generic
+       type T1 (<>) is private;
+    procedure p1(x: out T1);
+
+    procedure p1 (x: out T1) is
+    b: boolean := x'constrained;   --ERROR: not a discriminated type
+    begin
+       null;
+    end p1;
+
+begin
+   null;
+end Test_59;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 247018,
+    make = ("gnatmake", "test_60"),
+    sources = (
+        ("pak1.ads", """package pak1 is
+   generic
+   package pak2 is
+   end pak2;
+end pak1;
+"""),
+        ("test_60.ads", """with pak1;
+package Test_60 is
+   package PAK1 is new pak1.pak2;   --ERROR: illegal reference to pak1
+end Test_60;
+""")))
+
+check_compiles_but_should_not (
+    bug =  247019,
+    make = ("gnatmake", "test_61"),
+    sources = (
+        ("test_61.adb", """procedure Test_61 is
+   procedure p1;
+
+   generic
+   package pak1 is
+      procedure p2 renames p1;
+   end pak1;
+
+   package new_pak1 is new pak1;
+   procedure p1 renames new_pak1.p2;   --ERROR: circular renames
+begin
+   p1;
+end Test_61;
+"""),))
+
+check_reports_an_error_but_should_not (
+    bug = 247564,
+    make = ("gnatmake", "test_70"),
+    regex = "in gnat_to_gnu_entity, at ada/gcc-interface/decl\.c:568",
+    sources = (
+        ("test_70.adb", """procedure Test_70 is
+
+   package pak2 is
+      type t2(b2: boolean) is private;
+   private
+      type t2(b2: boolean) is null record;
+   end pak2;
+
+   package pak1 is
+      type T1(b1 : boolean) is private;
+   private
+      type T1(b1 : boolean) is new pak2.t2(b1);
+   end pak1;
+
+   x: pak1.t1(false);
+   b: boolean;
+begin
+   b := x.b1;
+end Test_70;
+"""),))
+
+check_produces_a_faulty_executable (
+    bug = 247569,
+    make = ("gnatmake", "test_75"),
+    trigger = "test_75",
+    regex = "failed: wrong p1 called",
+    sources = (
+        ("test_75.adb", """with text_io;
+procedure Test_75 is
+   generic
+   package pak1 is
+      type T1 is null record;
+   end pak1;
+
+   generic
+      with package A is new pak1(<>);
+      with package B is new pak1(<>);
+   package pak2 is
+      procedure p1(x: B.T1);
+      procedure p1(x: A.T1);
+   end pak2;
+
+   package body pak2 is
+
+      procedure p1(x: B.T1) is
+      begin
+         text_io.put_line("failed: wrong p1 called");
+      end p1;
+
+      procedure p1(x: A.T1) is
+      begin
+         text_io.put_line("passed");
+      end p1;
+
+      x: A.T1;
+   begin
+      p1(x);
+   end pak2;
+
+   package new_pak1 is new pak1;
+   package new_pak2 is new pak2(new_pak1, new_pak1); -- (1)
+
+begin
+   null;
+end Test_75;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 247570,
+    make = ("gnatmake", "test_76"),
+    sources = (
+        ("test_76.adb", """procedure Test_76 is
+
+   generic
+   procedure p1;
+
+   pragma Convention (Ada, p1);
+
+   procedure p1 is
+   begin
+      null;
+   end p1;
+
+   procedure new_p1 is new p1;
+   pragma Convention (Ada, new_p1);    --ERROR: new_p1 already frozen
+
+begin
+   null;
+end Test_76;
+"""),))
+
+check_produces_a_faulty_executable (
+    bug =  247571,
+    make = ("gnatmake", "test_77"),
+    trigger = "test_77",
+    regex = "failed: wrong p1 called",
+    sources = (
+        ("pak.ads", """package pak is
+   procedure p1;
+   procedure p1(x: integer);
+   pragma export(ada, p1);
+end pak;
+"""),
+        ("pak.adb", """with text_io; use text_io;
+package body pak is
+   procedure p1 is
+   begin
+      put_line("passed");
+   end;
+
+   procedure p1(x: integer) is
+   begin
+      put_line("failed: wrong p1 called");
+   end;
+end pak;
+"""),
+        ("test_77.adb", """with pak;
+procedure Test_77 is
+   procedure p1;
+   pragma import(ada, p1);
+begin
+   p1;
+end Test_77;
+""")))
+
+check_compiles_but_should_not (
+    bug = 248166,
+    make = ("gnatmake", "test_82"),
+    sources = (
+        ("test_82.adb", """procedure Test_82 is
+   package pak1 is
+      type T1 is tagged null record;
+   end pak1;
+
+   package body pak1 is
+      -- type T1 is tagged null record;  -- line 7
+
+      function "=" (x, y : T1'class) return boolean is -- line 9
+      begin
+         return true;
+      end "=";
+
+      procedure proc (x, y : T1'class) is
+         b : boolean;
+      begin
+         b := x = y;     --ERROR: ambiguous "="
+      end proc;
+
+   end pak1;
+
+begin
+   null;
+end Test_82;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 248168,
+    make = ("gnatmake", "test_84"),
+    sources = (
+        ("test_84.adb", """procedure Test_84 is
+   package pak1 is
+      type T1 is abstract tagged null record;
+      procedure p1(x: in out T1) is abstract;
+   end pak1;
+
+   type T2 is new pak1.T1 with null record;
+
+   protected type T3 is
+   end T3;
+
+   protected body T3 is
+   end T3;
+
+   procedure p1(x: in out T2) is    --ERROR: declared after body of T3
+   begin
+      null;
+   end p1;
+
+begin
+   null;
+end Test_84;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 248678,
+    make = ("gnatmake", "test_80"),
+    sources = (
+        ("test_80.ads", """package Test_80 is
+   generic
+      type T1(<>) is private;
+      with function "=" (Left, Right : T1) return Boolean is <>;
+   package pak1 is
+   end pak1;
+
+   package pak2 is
+      type T2 is abstract tagged null record;
+      package new_pak1 is new pak1 (T2'Class);  --ERROR: no matching "="
+   end pak2;
+end Test_80;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 248680,
+    make = ("gnatmake", "test_90"),
+    sources = (
+        ("test_90.adb", """procedure Test_90 is
+   type T1 is tagged null record;
+
+   procedure p1 (x : access T1) is
+      b: boolean;
+      y: aliased T1;
+   begin
+      B := Y'Access = X;     -- ERROR: no matching "="
+--    B := X = Y'Access;     -- line 11: error detected
+   end p1;
+
+begin
+   null;
+end Test_90;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 248681,
+    make = ("gnatmake", "test_91"),
+    sources = (
+        ("test_91.adb", """--  RM 8.5.4(5)
+--  ...the convention of the renamed subprogram shall not be
+--  Intrinsic.
+with unchecked_deallocation;
+procedure Test_91 is
+   generic -- when non generic, we get the expected error
+   package pak1 is
+      type int_ptr is access integer;
+      procedure free(x: in out int_ptr);
+   end pak1;
+
+   package body pak1 is
+      procedure deallocate is new
+        unchecked_deallocation(integer, int_ptr);
+      procedure free(x: in out int_ptr) renames
+        deallocate;  --ERROR: renaming as body can't rename intrinsic
+   end pak1;
+begin
+   null;
+end Test_91;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 248682,
+    make = ("gnatmake", "main"),
+    sources = (
+        ("main.adb", """--  RM 6.3.1(9)
+--  The default calling convention is Intrinsic for ...  an attribute
+--  that is a subprogram;
+
+--  RM 8.5.4(5)
+--  ...the convention of the renamed subprogram shall not be
+--  Intrinsic.
+procedure main is
+   package pak1 is
+      function f1(x: integer'base) return integer'base;
+   end pak1;
+
+   package body pak1 is
+      function f1(x: integer'base) return integer'base renames
+        integer'succ;  --ERROR: renaming as body can't rename intrinsic
+   end pak1;
+begin
+   null;
+end;
+"""),))
+
+check_reports_an_error_but_should_not (
+    bug = 251265,
+    make = ("gnatmake", "test_106"),
+    regex = "in Case_Statement_to_gnu, at ada/gcc-interface/trans.c:2366",
+    sources = (
+        ("test_106.adb", """pragma Ada_83;
+procedure Test_106(x: integer) is
+begin
+   case x is
+      when integer'last +1 => null;
+      when 0               => null; -- line 5
+      when others          => null;
+   end case;
+end Test_106;
+"""),))
+
+check_reports_an_error_but_should_not (
+    bug = 253737,
+    make = ("gnatmake", "test_4"),
+    regex = 'test_4.ads:.:01: "pak2" not declared in "pak1"',
+    sources = (
+        ("parent.ads", """generic
+package parent is
+end parent;
+"""),
+        ("parent-pak2.ads", """generic
+package parent.pak2 is
+end parent.pak2;
+"""),
+        ("parent-pak2-pak3.ads", """generic
+package parent.pak2.pak3 is
+end parent.pak2.pak3;
+"""),
+        ("parent-pak2-pak4.ads", """with parent.pak2.pak3;
+generic
+package parent.pak2.pak4 is
+   package pak3 is new parent.pak2.pak3;
+end parent.pak2.pak4;
+"""),
+        ("pak1.ads", """with parent;
+package pak1 is new parent;
+"""),
+        ("pak6.ads", """with parent.pak2;
+with pak1;
+package pak6 is new pak1.pak2;
+"""),
+        ("test_4.ads", """with parent.pak2.pak4;
+with pak6;
+package Test_4 is new pak6.pak4;
+""")))
+
+check_compiles_but_should_not (
+    bug = 269948,
+    make = ("gnatmake", "test_119"),
+    sources = (
+        ("test_119.ads", """--  RM 3.9.3/11 A generic actual subprogram shall not be an abstract
+--  subprogram.  works OK if unrelated line (A) is commented out.
+package Test_119 is
+   generic
+      with function "=" (X, Y : integer) return Boolean is <>;   -- Removing this allows GCC to detect the problem.
+   package pak1 is
+      function "=" (X, Y: float) return Boolean is abstract;
+      generic
+         with function Equal (X, Y : float) return Boolean is "=";  --ERROR:
+      package pak2 is
+      end pak2;
+   end pak1;
+
+   package new_pak1 is new pak1;
+   package new_pak2 is new new_pak1.pak2;
+end Test_119;
+"""),))
+
+check_compiles_but_should_not (
+    bug = 269951,
+    make = ("gnatmake", "test_118"),
+    sources = (
+        ("pak1.ads", """generic
+package pak1 is
+end pak1;
+"""),
+        ("pak1-foo.ads", """generic
+package pak1.foo is
+end pak1.foo;
+"""),
+        ("test_118.ads", """with pak1.foo;
+package Test_118 is
+   package pak3 is
+      foo: integer;
+   end pak3;
+   use pak3;
+
+   package new_pak1 is new pak1;
+   use new_pak1;
+
+   x: integer := foo;       -- ERROR: foo hidden by use clauses
+end Test_118;
+"""),))
+
+# As long as 24:14 is detected, it inhibits detection of 25:21.
+check_reports_error_but_forgets_one (
+    bug = 276224,
+    make = ("gnatmake", "test_121"),
+    regex = "test_121\.adb:25:21: dynamically tagged expression not allowed",
+    sources = (
+        ("test_121.adb", """--  If the expected type for an expression or name is some specific
+--  tagged type, then the expression or name shall not be dynamically
+--  tagged unless it is a controlling operand in a call on a
+--  dispatching operation.
+procedure Test_121 is
+   package pak1 is
+      type T1 is tagged null record;
+      function f1 (x1: T1) return T1;
+   end pak1;
+
+   package body pak1 is
+      function f1 (x1: T1) return T1 is
+      begin
+         return x1;
+      end;
+   end pak1;
+   use pak1;
+
+   type T2 is record
+      a1: T1;
+   end record;
+
+   z0: T1'class := T1'(null record);
+   z1: T1 := f1(z0);           -- ERROR: gnat correctly rejects
+   z2: T2 := (a1 => f1(z0));   -- ERROR: gnat mistakenly allows
+begin
+   null;
+end Test_121;
+"""),))
+
+check_reports_an_error_but_should_not (
+    bug = 276227,
+    make = ("gnatmake", "test_124"),
+    regex = 'test_124\.ads:6:35: size for "T_arr_constrained" too small, minimum allowed is 256',
+    sources = (
+        ("test_124.ads", """package Test_124 is
+   type T is range 1 .. 32;
+   type T_arr_unconstrained is array (T range <>) of boolean;
+   type T_arr_constrained is new T_arr_unconstrained (T);
+   pragma pack (T_arr_unconstrained);
+   for T_arr_constrained'size use 32;
+end Test_124;
+"""),))
+
+check_reports_an_error_but_should_not (
+    bug = 278687,
+    make = ("gnatmake", "test_127"),
+    regex = 'test_127\.adb:1.:21: expected type "T2" defined at line .',
+    sources = (
+        ("test_127.ads", """-- The second parameter of T2'Class'Read is of type T2'Class,
+-- which should match an object of type T3, which is derived
+-- from T2.
+package test_127 is
+   pragma elaborate_body;
+end test_127;
+"""),
+        ("test_127.adb", """with ada.streams;
+package body test_127 is
+   type T1 is access all ada.streams.root_stream_type'class;
+   type T2 is tagged null record;
+   type T3 is new T2 with null record;
+
+   x: T1;
+   y: T3;
+begin
+   T2'class'read(x, y);
+end test_127;
+""")))
+
+check_compiles_but_should_not (
+    bug = 278831,
+    make = ("gnatmake", "test_128"),
+    sources = (
+        ("test_128.ads", """package Test_128 is
+   package inner is
+   private
+      type T1;
+   end inner;
+   type T1_ptr is access inner.T1; -- line  9 ERROR: gnat mistakenly accepts
+end Test_128;
+"""),
+        ("test_128.adb", """package body test_128 is
+   package body inner is
+      type T1 is new Integer;
+   end inner;
+end Test_128;
+""")))
+
+# Note that we also check the absence of the next inhibited message.
+check_reports_an_error_but_should_not (
+    bug = 279893,
+    make = ("gnatmake", "test_129"),
+    regex = """^gcc-[0-9.]+ -c test_129\.ads
+test_129\.ads:1.:49: designated type of actual does not match that of formal "T2"
+test_129\.ads:1.:49: instantiation abandoned
+gnatmake: "test_129\.ads" compilation error$""",
+    sources = (
+        ("pak1.ads", """-- legal instantiation rejected; illegal instantiation accepted
+-- adapted from John Woodruff c.l.a. post
+
+generic
+   type T1 is private;
+package pak1 is
+   subtype T3 is T1;
+end pak1;
+"""),
+        ("pak2.ads", """with pak1;
+generic
+   type T2 is private;
+package pak2 is
+   package the_pak1 is new pak1 (T1 => T2);
+end pak2;
+"""),
+        ("pak2-pak3.ads", """generic
+   type T2 is access the_pak1.T3;
+package pak2.pak3 is
+end pak2.pak3;
+"""),
+        ("test_129.ads", """with pak1;
+with pak2.pak3;
+package Test_129 is
+
+   type T4 is null record;
+   type T5 is null record;
+   subtype T3 is T5; -- line 9: triggers the bug at line 16
+
+   type T4_ptr is access T4;
+   type T5_ptr is access T5;
+
+   package new_pak2 is new pak2 (T2 => T4);
+   package new_pak3a is new new_pak2.pak3(T2 => T4_ptr);  -- line 15: Legal
+   package new_pak3b is new new_pak2.pak3(T2 => T5_ptr);  -- line 16: Illegal
+end Test_129;
+""")))
+
+print ("# Please ignore the gnatlink message.")
+check_reports_an_error_but_should_not (
+    bug = 280939,
+    make = ("gnatmake", "test_130"),
+    regex = "test_130\.adb:\(\.text\+0x5\): undefined reference to \`p2\'",
+    sources = (
+        ("pak1.ads", """--  RM 10.1.5(4) "the pragma shall have an argument that is a name
+--  denoting that declaration."
+--  RM 8.1(16) "The children of a parent library unit are inside the
+--  parent's declarative region."
+
+package pak1 is
+   pragma Pure;
+end pak1;
+"""),
+        ("pak1-p2.ads", """procedure pak1.p2;
+pragma Pure (p2);          -- ERROR: need expanded name
+pragma Import (ada, p2);   -- ERROR: need expanded name
+pragma Inline (p2);        -- ERROR: need expanded name
+"""),
+        ("test_130.adb", """with Pak1.P2;
+procedure Test_130 is
+begin
+   Pak1.P2;
+end Test_130;
+""")))
+
+check_compiles_but_should_not (
+    bug = 283833,
+    make = ("gnatmake", "test_132"),
+    sources = (
+        ("pak1.ads", """-- RM 8.5.4(5)  the convention of the renamed subprogram shall not
+-- be Intrinsic, if the renaming-as-body completes that declaration
+-- after the subprogram it declares is frozen.
+
+-- RM 13.14(3)  the end of the declaration of a library package
+-- causes freezing of each entity declared within it.
+
+-- RM 6.3.1(7)  the default calling convention is Intrinsic for
+-- any other implicitly declared subprogram unless it is a
+-- dispatching operation of a tagged type.
+
+package pak1 is
+   type T1 is null record;
+   procedure p1 (x1: T1);
+   type T2 is new T1;
+end pak1;
+"""),
+        ("pak1.adb", """package body Pak1 is
+   procedure P1 (X1 : T1) is begin null; end P1;
+end Pak1;
+"""),
+        ("test_132.ads", """with pak1;
+package Test_132 is
+   procedure p2 (x2: pak1.T2);
+end Test_132;
+"""),
+        ("test_132.adb", """package body Test_132 is
+   procedure p2 (x2: pak1.T2) renames pak1.p1; --ERROR: can't rename intrinsic
+end Test_132;
+""")))
+
+check_compiles_but_should_not (
+    bug = 283835,
+    make = ("gnatmake", "test_133"),
+    sources = (
+        ("test_133.ads", """package Test_133 is
+   package pak1 is
+      type T1 is null record;
+   end pak1;
+
+   package pak2 is
+      subtype boolean is standard.boolean;
+      function "=" (x, y: pak1.T1) return boolean;
+   end pak2;
+
+   use pak1, pak2;
+
+   x1: pak1.T1;
+   b1: boolean := x1 /= x1;  -- ERROR: ambigous  (gnat misses)
+   --  b2: boolean := x1 = x1;   -- ERROR: ambigous
+end Test_133;
+"""),
+        ("test_133.adb", """package body test_133 is
+   package body pak2 is
+      function "=" (x, y: pak1.T1) return boolean is
+      begin
+         return true;
+      end "=";
+   end pak2;
+end test_133;
+""")))
+
+check_compiles_but_should_not (
+    bug = 416979,
+    make = ("gnatmake", "pak1"),
+    sources = (
+        ("pak1.ads", """package pak1 is
+   -- RM 7.3(13), 4.9.1(1)
+   -- check that discriminants statically match
+   type T1(x1: integer) is tagged null record;
+   x2: integer := 2;
+   x3: constant integer := x2;
+   type T2 is new T1 (x2) with private;
+   type T3 is new T1 (x3) with private;
+private
+   type T2 is new T1 (x2) with null record;  --ERROR: nonstatic discriminant
+   type T3 is new T1 (x3) with null record;  --ERROR: nonstatic discriminant
+end pak1;
+"""),))
+
+# Once the bug box disappears, check the executable.
+# check_produces_a_faulty_executable (
+check_reports_an_error_but_should_not (
+    bug = 427108,
+    make = ("gnatmake", "test1"),
+#     regex = "FAILED",
+    regex = "Program_Error exp_disp.adb:8462 explicit raise",
+    sources = (
+        ("test1.adb", """-- "For the execution of a call on an inherited subprogram,
+-- a call on the corresponding primitive subprogram of the
+-- parent or progenitor type is performed; the normal conversion
+-- of each actual parameter to the subtype of the corresponding
+-- formal parameter (see 6.4.1) performs any necessary type
+-- conversion as well."
+
+with Text_IO; use Text_IO;
+procedure Test1 is
+   package Pak1 is
+      type T1 is tagged null record;
+      function Eq(X, Y: T1) return Boolean renames "=";
+   end Pak1;
+
+   package Pak2 is
+      type T2 is new Pak1.T1 with record
+         F1: Integer;
+      end record;
+   end Pak2;
+
+   Z1: Pak2.T2 := (F1 => 1);
+   Z2: Pak2.T2 := (F1 => 2);
+begin
+   if Pak2.Eq(Z1, Z2) = Pak1.Eq(Pak1.T1(Z1), Pak1.T1(Z2))
+      then Put_Line("PASSED");
+      else Put_Line("FAILED");
+   end if;
+end Test1;
+"""),))
+
+print_skipped (559447, "not handled by this script")
+
+print_skipped (569343, "not handled by this script")
+
+check_reports_an_error_but_should_not (
+    bug = 660698,
+    make = ("gnatmake", "proc.adb"),
+    regex = 'proc\.adb:17:28: there is no applicable operator "And" for type "Standard\.Integer"',
+    sources = (
+        ("proc.adb", """procedure Proc is
+   package P1 is
+      type T is new Integer;
+      function "and" (L, R : in Integer) return T;
+   end P1;
+   package body P1 is
+      function "and" (L, R : in Integer) return T is
+         pragma Unreferenced (L, R);
+      begin
+         return 0;
+      end "and";
+   end P1;
+   use type P1.T;
+   package P2 is
+      use P1;
+   end P2;
+   G : P1.T := Integer'(1) and Integer'(2);
+begin
+   null;
+end Proc;
+"""), ))
+
+check_produces_a_faulty_executable (
+    bug = 737225,
+    make = ("gnatmake", "round_decimal"),
+    trigger = "round_decimal",
+    regex = "Bug reproduced.",
+    sources = (
+        ("round_decimal.adb", """with Ada.Text_IO;
+
+procedure Round_Decimal is
+
+   --  OJBECTIVE:
+   --    Check that 'Round of a decimal fixed point type does round
+   --    away from zero if the operand is of a decimal fixed point
+   --    type with a smaller delta.
+
+   Unexpected_Compiler_Bug : exception;
+
+   type Milli is delta 0.001 digits 9;
+   type Centi is delta 0.01 digits 9;
+
+   function Rounded (Value : Milli) return Centi;
+   --  Value, rounded using Centi'Round
+
+   function Rounded (Value : Milli) return Centi is
+   begin
+      return Centi'Round (Value);
+   end Rounded;
+
+begin
+   --  Operands used directly:
+   if not (Milli'Round (0.999) = Milli'(0.999)
+             and
+           Centi'Round (0.999) = Centi'(1.0)
+             and
+           Centi'Round (Milli'(0.999)) = Centi'(1.0))
+   then
+      raise Unexpected_Compiler_Bug;
+   end if;
+   if Rounded (Milli'(0.999)) /= Centi'(1.0) then
+      Ada.Text_IO.Put_Line ("Bug reproduced.");
+   end if;
+end Round_Decimal;
+"""),))
+
+# Even if an error is reported, the problem with the atomic variable
+# should be checked.
+check_reports_an_error_but_should_not (
+    bug = 643663,
+    make = ("gnatmake", "test"),
+    regex = 'test\.adb:4:25: no value supplied for component "Reserved"',
+    sources = (
+        ("pkg.ads", """package Pkg is
+   type Byte is mod 2**8;
+   type Reserved_24 is mod 2**24;
+
+   type Data_Record is
+      record
+         Data : Byte;
+         Reserved : Reserved_24;
+      end record;
+
+   for Data_Record use
+      record
+         Data at 0 range 0 .. 7;
+         Reserved at 0 range 8 .. 31;
+      end record;
+
+   for Data_Record'Size use 32;
+   for Data_Record'Alignment use 4;
+
+   Data_Register : Data_Record;
+   pragma Atomic (Data_Register);
+end Pkg;
+"""), ("test.adb", """with Pkg;
+procedure Test is
+begin
+   Pkg.Data_Register := (
+      Data => 255,
+      others => <> -- expected error: no value supplied for component "Reserved"
+   );
+end Test;
+""")))
+
+try:
+    os.rmdir (workspace)
+except:
+    print ("Some unconfirmed, not removing directory {}.".format (workspace))
--- gcc-5-5.4.0.orig/debian/ada/debian_packaging.mk
+++ gcc-5-5.4.0/debian/ada/debian_packaging.mk
@@ -0,0 +1,91 @@
+# Common settings for Ada Debian packaging.
+#
+#  Copyright (C) 2012-2014 Nicolas Boulenguez <nicolas@debian.org>
+#
+#  This program is free software: you can redistribute it and/or
+#  modify it under the terms of the GNU General Public License as
+#  published by the Free Software Foundation, either version 3 of the
+#  License, or (at your option) any later version.
+#  This program is distributed in the hope that it will be useful, but
+#  WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+#  General Public License for more details.
+#  You should have received a copy of the GNU General Public License
+#  along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# dpkg-dev (>= 1.16.1) provides /usr/share/dpkg/default.mk (or the
+# more specific buildflags.mk) to set standard variables like
+# DEB_HOST_MULTIARCH, CFLAGS, LDFLAGS...) according to the build
+# environment (DEB_BUILD_OPTIONS...) and the policy (hardening
+# flags...).
+# You must include it before this file.
+ifeq (,$(findstring /usr/share/dpkg/buildflags.mk,$(MAKEFILE_LIST)))
+  $(error Please include /usr/share/dpkg/default.mk (or the more specific \
+          buildflags.mk) before $(lastword $(MAKEFILE_LIST)))
+endif
+
+# Ada is not in dpkg-dev flag list. We add a sensible default here.
+
+# Format checking is meaningless for Ada sources.
+ADAFLAGS := $(filter-out -Wformat -Werror=format-security, $(CFLAGS))
+
+ifdef DPKG_EXPORT_BUILDFLAGS
+  export ADAFLAGS
+endif
+
+# Avoid dpkg-shlibdeps warning about depending on a library from which
+# no symbol is used, see http://wiki.debian.org/ToolChain/DSOLinking.
+# Gnatmake users must upgrade to >= 4.6.4-1 to circumvent #680292.
+LDFLAGS += -Wl,--as-needed
+
+# Warn during build time if undefined symbols.
+LDFLAGS += -Wl,-z,defs
+
+ifdef DPKG_EXPORT_BUILDFLAGS
+  export LDFLAGS
+endif
+
+######################################################################
+# C compiler version
+
+# GCC binaries must be compatible with GNAT at the binary level, use
+# the same version. This setting is mandatory for every upstream C
+# compilation ("export CC" is enough for dh_auto_configure with a
+# normal ./configure).
+
+CC := gnatgcc
+
+######################################################################
+# Options for gprbuild/gnatmake.
+
+# Let Make delegate parallelism to gnatmake/gprbuild.
+.NOTPARALLEL:
+
+# Use all processors unless parallel=n is set in DEB_BUILD_OPTIONS.
+# http://www.debian.org/doc/debian-policy/ch-source.html#s-debianrules-options
+BUILDER_JOBS := $(filter parallel=%,$(DEB_BUILD_OPTIONS))
+ifneq (,$(BUILDER_JOBS))
+  BUILDER_JOBS := $(subst parallel=,,$(BUILDER_JOBS))
+else
+  BUILDER_JOBS := $(shell getconf _NPROCESSORS_ONLN)
+endif
+BUILDER_OPTIONS += -j$(BUILDER_JOBS)
+
+BUILDER_OPTIONS += -R
+# Avoid lintian warning about setting an explicit library runpath.
+# http://wiki.debian.org/RpathIssue
+
+BUILDER_OPTIONS += -v
+# Make exact command lines available for automatic log checkers.
+
+BUILDER_OPTIONS += -eS
+# Tell gnatmake to echo commands to stdout instead of stderr, avoiding
+# buildds thinking it is inactive and killing it.
+# -eS is the default on gprbuild.
+
+# You may be interested in
+# -s  recompile if compilation switches have changed
+#     (bad default because of interactions between -amxs and standard library)
+# -we handle warnings as errors
+# -vP2 verbose when parsing projects.
--- gcc-5-5.4.0.orig/debian/bin-wrapper.in
+++ gcc-5-5.4.0/debian/bin-wrapper.in
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+# some build tools are linked with a new libstdc++ and fail to run
+# when building libstdc++.
+
+if [ -n "$LD_LIBRARY_PATH" ]; then
+  ma=$(dpkg-architecture -qDEB_BUILD_MULTIARCH)
+  export LD_LIBRARY_PATH="/lib/$ma:/usr/lib/$ma:/lib:/usr/lib:$LD_LIBRARY_PATH"
+fi
+
+exec /usr/bin/$(basename $0) "$@"
--- gcc-5-5.4.0.orig/debian/changelog
+++ gcc-5-5.4.0/debian/changelog
@@ -0,0 +1,1807 @@
+gcc-5 (5.4.0-6ubuntu1~16.04.4) xenial-security; urgency=medium
+
+  * SRU
+    - Fix PR target/72863, redundant swaps when using vec_vsx_ld/st,
+      taken from the gcc-5 branch. LP: #1638055.
+    - Fix PR rtl-optimization/71709, taken from the gcc-5 branch. LP: #1628207.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 02 Nov 2016 19:23:52 +0100
+
+gcc-5 (5.4.0-6ubuntu1~16.04.2) xenial-security; urgency=medium
+
+  * No change rebuild for the security pocket.
+
+ -- Marc Deslauriers <marc.deslauriers@ubuntu.com>  Thu, 04 Aug 2016 11:26:47 -0400
+
+gcc-5 (5.4.0-6ubuntu1~16.04.1) xenial-proposed; urgency=medium
+
+  * SRU: LP: #1586673. Backport GCC 5.4 to 16.04 LTS.
+  * Revert a libstdc++ header reorg done after the 5.3.0 release.
+  * Add AArch64 Vulcan cpu support, backport from trunk. LP: #1594452.
+  * Revert a libstdc++ header reorg done after the 5.3.0 release (only for
+    OS releases including a GCC 5 at release time).
+  * Fixes C++ ICE. LP: #1593608.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 04 Jul 2016 15:14:45 +0200
+
+gcc-5 (5.4.0-6ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 01 Jul 2016 11:33:21 +0200
+
+gcc-5 (5.4.0-6) unstable; urgency=medium
+
+  * Fix gdc cross build.
+  * Disable the AArch64 Vulcan cpu support for FSF builds, needs a proper
+    back port.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 01 Jul 2016 10:15:02 +0200
+
+gcc-5 (5.4.0-5ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 30 Jun 2016 12:43:34 +0200
+
+gcc-5 (5.4.0-5) unstable; urgency=medium
+
+  [ Matthias Klose ]
+  * Add AArch64 Vulcan cpu support, backport from trunk. LP: #1594452.
+  * Revert a libstdc++ header reorg done after the 5.3.0 release (only for
+    OS releases including a GCC 5 at release time).
+  * Enforce build using binutils 2.26.1 for unstable/development series.
+  * Mark cross compilers as M-A: foreign. Addresses: #827136.
+  * Remove the MIPS r6 support again, dak doesn't like unknown architectures.
+
+  [ Aurelien Jarno ]
+  * Drop support for loongson 2f (YunQiang Su). Closes: #827554.
+  * Apply proposed patch from Matthew Fortune to fix libjava on mips64el.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 30 Jun 2016 18:17:53 +0200
+
+gcc-5 (5.4.0-4ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 10 Jun 2016 17:13:32 +0200
+
+gcc-5 (5.4.0-4) unstable; urgency=medium
+
+  * gdc: Fix linking the runtime library. Closes: #826645.
+  * gdc: Fix updates from 5.3.x. Closes: #826583.
+  * Update the Linaro support to the 5-2016.06 snapshot.
+  * Add MIPS r6 support and bump mipsn32(el) ISA to r2 (YunQiang Su).
+    Closes: #824986.
+  * Avoid storing -fdebug-prefix-map in DW_AT_producer (for better
+    reproducibility). Taken from the trunk (Daniel Kahn Gillmor).
+    Closes: #819176.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 10 Jun 2016 17:03:20 +0200
+
+gcc-5 (5.4.0-3ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 04 Jun 2016 22:41:09 +0200
+
+gcc-5 (5.4.0-3) unstable; urgency=medium
+
+  * Update Ada patch for KFreeBSD (Steven Chamberlain). Closes: #826332.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 04 Jun 2016 18:55:13 +0200
+
+gcc-5 (5.4.0-2) unstable; urgency=medium
+
+  * Fix gdc packaging for architectures without libphobos support.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 03 Jun 2016 22:46:28 +0200
+
+gcc-5 (5.4.0-1) unstable; urgency=medium
+
+  * GCC 5.4.0 release.
+    - Fix PR target/68696 (AArch64), PR fortran/70350.
+  * Update embedded timestamp setting patch, backported from the trunk.
+  * Update the Linaro support to the 5-2016.05 snapshot.
+  * Update gdc to the gcc-5 branch 20160603.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 03 Jun 2016 17:00:13 +0200
+
+gcc-5 (5.3.1-21ubuntu11) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 28 May 2016 16:09:22 +0200
+
+gcc-5 (5.3.1-21) unstable; urgency=medium
+
+  * GCC 5.4.0 release candidate 1.
+  * Update to SVN 20160528 (r236840, 5.3.1) from the gcc-5-branch.
+    - Fix PR libstdc++/69703, PR libstdc++/71038, PR libstdc++/71036,
+      PR libstdc++/71037, PR libstdc++/71005, PR libstdc++/71004,
+      PR libstdc++/70609, PR target/69634, PR middle-end/68142,
+      PR middle-end/69845, PR rtl-optimization/68814, PR lto/69003,
+      PR ipa/66487, PR target/69252, PR target/67973 (x86),
+      PR middle-end/67278, PR target/67278 (x86), PR tree-optimization/69720,
+      PR tree-optimization/67921, PR middle-end/70941, PR middle-end/70931,
+      PR tree-optimization/70623, PR tree-optimization/70780, PR c++/70347,
+      PR c++/70466, PR fortran/71204, PR fortran/69603, PR libffi/65567,
+      PR libstdc++/70762.
+  * Update the ibm branch to 20160526.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 28 May 2016 16:03:38 +0200
+
+gcc-5 (5.3.1-20ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 20 May 2016 12:14:09 +0200
+
+gcc-5 (5.3.1-20) unstable; urgency=medium
+
+  * Update to SVN 20160519 (r236482, 5.3.1) from the gcc-5-branch.
+    - Fix PR sanitizer/71160, PR other/61321, PR other/61233, PR c++/70498,
+      PR c++/69687, PR c++/70492, PR c++/67394, PR c++/70481, PR target/71161,
+      PR ipa/70646, PR tree-optimization/69400, PR target/71145 (alpha),
+      PR c++/70353, PR target/70809 (AArch64), PR c++/70613,
+      PR target/70963 (PPC), PR c++/70505, PR c++/70494, PR c++/70648,
+      PR c++/70353, PR c++/70095, PR c++/70135, PR fortran/69603.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 20 May 2016 09:13:30 +0200
+
+gcc-5 (5.3.1-19ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 10 May 2016 09:19:02 +0200
+
+gcc-5 (5.3.1-19) unstable; urgency=medium
+
+  * Fix dependency resolution for libraries not built anymore from
+    this source package.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 09 May 2016 23:15:30 +0200
+
+gcc-5 (5.3.1-18) unstable; urgency=medium
+
+  * Update to SVN 20160509 (r236033, 5.3.1) from the gcc-5-branch.
+    - Fix PR tree-optimization/70526, PR c++/70635, PR ada/70969,
+      PR libgfortran/70684, PR target/60290 (Solaris).
+  * Call dh_makeshlibs with the --noscripts option when building a
+    cross compiler.
+  * Fix building cross gnat libs when not building the common libs.
+  * Fix building cross mips* multilibs when not building the common libs.
+  * Remove old go escape analysis code, removed upstream.
+  * Avoid empty architecture lists in build dependencies. Addresses: #823280.
+  * Tighten debhelper build dependency for cross build dependencies.
+  * Silence some lintian warnings for libstdc++-doc.
+  * Allow build dependencies for musl configurations (Helmut Grohne).
+    Addresses: #823769.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 09 May 2016 16:15:30 +0200
+
+gcc-5 (5.3.1-17) unstable; urgency=medium
+
+  * Update to SVN 20160429 (r235638, 5.3.1) from the gcc-5-branch.
+    - Fix PR java/70839, PR target/70858 (x86), PR driver/70132,
+      PR target/70098 (PPC), PR ada/70786.
+
+  * Always configure with --enable-targets=powerpcle-linux on ppc64el.
+  * Allow embedded timestamps by C/C++ macros to be set externally (Eduard
+    Sanou).
+  * Default the 32bit x86 architectures to i686, keep i585 symlinks.
+    See https://lists.debian.org/debian-devel/2015/09/msg00589.html
+  * Build-depend on debhelper (>= 9) and dpkg-dev (>= 1.17.14).
+  * Fix PR driver/70192, taken from the trunk.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 29 Apr 2016 15:46:49 +0200
+
+gcc-5 (5.3.1-16ubuntu3) yakkety; urgency=medium
+
+  * Update to SVN 20160429 (r235638, 5.3.1) from the gcc-5-branch.
+    - Fix PR java/70839, PR target/70858 (x86), PR driver/70132,
+      PR target/70098 (PPC), PR ada/70786.
+
+  * Always configure with --enable-targets=powerpcle-linux on ppc64el.
+  * Allow embedded timestamps by C/C++ macros to be set externally (Eduard
+    Sanou).
+  * Build-depend on debhelper (>= 9) and dpkg-dev (>= 1.17.14).
+  * Fix PR driver/70192, taken from the trunk.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 29 Apr 2016 15:49:07 +0200
+
+gcc-5 (5.3.1-16ubuntu1) yakkety; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 25 Apr 2016 13:14:54 +0200
+
+gcc-5 (5.3.1-16) unstable; urgency=medium
+
+  * Update to SVN 20160424 (r235395, 5.3.1) from the gcc-5-branch.
+  * Stop building libcc1 and libgccjit0, when not building common libs.
+  * Stop building libraries built by GCC 6.
+  * Explicitly build-depend on libgraphite2-dev to work-around #822432.
+  * Bump standards version to 3.9.8.
+
+ -- Matthias Klose <doko@debian.org>  Sun, 24 Apr 2016 22:51:15 +0200
+
+gcc-5 (5.3.1-15ubuntu1) yakkety; urgency=medium
+
+  * Turn on -fPIE and -z now by default on amd64 and ppc64el.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 21 Apr 2016 19:25:25 +0200
+
+gcc-5 (5.3.1-15) unstable; urgency=medium
+
+  * Update to SVN 20160421 (r235347, 5.3.1) from the gcc-5-branch.
+    - Fix PR target/70566 (ARM, wrong-code), PR target/70117 (PPC, wrong-code),
+      PR target/70630 (sparc), PR target/70107 (PPC, wrong-code),
+      PR c++/70096 (wrong code), PR libstdc++/69478, PR libstdc++/70503,
+      PR libstdc++/69464, PR c/70297, PR target/70674 (390x, LP: #1572613),
+      PR target/70662 (x86), PR target/70044 (AArch64), PR c++/67164.
+
+  [ Matthias Klose ]
+  * Fix ice on ARM32. Revert r234641 for gcc-linaro, which removed support
+    for %( and %) output modifiers.
+  * Update the Linaro support to the 5-2016.04 snapshot.
+  * Fix PR target/69148 (s390x), taken from the trunk.
+  * Strip the lto1 binary again to save some disk space. Addresses: #783876.
+
+  [ Aurelien Jarno ]
+  * Apply proposed patch for PR target/68273 (Wrong code on mips/mipsel due to
+    (invalid?) peeking at alignments in function_arg) on mips and mipsel.
+
+  [ Samuel Thibault ]
+  * patches/hurd-gprof.diff: Cherry-pick trunk fix for gprof.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 22 Apr 2016 12:34:43 +0200
+
+gcc-5 (5.3.1-14ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160413 (r234931, 5.3.1) from the gcc-5-branch.
+    - PR target/70630 (sparc), PR target/70107 (PPC, wrong-code),
+      PR c++/70096 (wrong code).
+  * Fix ICE on ARM32. Revert r234641 for gcc-linaro, which removed support
+    for %( and %) output modifiers.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 13 Apr 2016 11:50:01 +0200
+
+gcc-5 (5.3.1-14ubuntu1) xenial; urgency=medium
+
+  * Update to SVN 20160412 (r234893, 5.3.1) from the gcc-5-branch.
+    - Fix PR target/70566 (ARM, wrong-code), PR target/70117 (PPC, wrong-code).
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 12 Apr 2016 16:31:57 +0200
+
+gcc-5 (5.3.1-14) unstable; urgency=medium
+
+  * Update to SVN 20160409 (r234858, 5.3.1) from the gcc-5-branch.
+    - Fix PR c++/69826, PR c++/69797, PR target/70421, PR target/70329,
+      PR rtl-optimization/70429, PR target/70296, PR rtl-optimization/70222,
+      PR tree-optimization/70169, PR tree-optimization/70152, PR target/70062,
+      PR target/69888, PR target/70028, PR target/69969, PR debug/69705,
+      PR rtl-optimization/69891, PR middle-end/69838, PR target/69875,
+      PR tree-optimization/69802, PR rtl-optimization/69764, PR ipa/68672,
+      PR rtl-optimization/69771, PR rtl-optimization/69764, PR target/70052,
+      PR rtl-optimization/69771, PR target/70406, PR target/70319,
+      PR c++/70272, PR c++/67767, PR fortran/70397, PR target/70296,
+      PR target/69614, PR c++/70393, PR target/70453, PR rtl-optimization/69307,
+      PR rtl-optimization/69102, PR rtl-optimization/69032, PR target/66660,
+      PR target/64411, PR rtl-optimization/70460, PR target/68973,
+      PR middle-end/70457 (LP: #1563134), PR rtl-optimization/68236,
+      PR target/67896 (AArch64), PR fortran/66911, PR fortran/65795,
+      PR target/67172 (MingW), PR target/70525 (x86), PR libgfortran/70235,
+      PR tree-optimization/70177, PR middle-end/69760, PR middle-end/68963,
+      PR tree-optimization/69983, PR middle-end/70022, PR middle-end/70424,
+      PR tree-optimization/70115, PR middle-end/70450, PR middle-end/70333,
+      PR rtl-optimization/70484, PR target/70510 (x86), PR c++/70430.
+  * Fix PR target/70496 (ARM32), taken from the trunk.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 09 Apr 2016 18:40:05 +0200
+
+gcc-5 (5.3.1-13ubuntu6) xenial; urgency=medium
+
+  * Fix applying the gcc-linaro patches.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 07 Apr 2016 14:19:05 +0200
+
+gcc-5 (5.3.1-13ubuntu5) xenial; urgency=medium
+
+  * Update to SVN 20160407 (r234805, 5.3.1) from the gcc-5-branch.
+    - Fix PR tree-optimization/70177, PR middle-end/69760, PR middle-end/68963,
+      PR tree-optimization/69983, PR middle-end/70022, PR middle-end/70424,
+      PR tree-optimization/70115, PR middle-end/70450, PR middle-end/70333,
+      PR rtl-optimization/70484, PR target/70510 (x86), PR c++/70430.
+  * Fix PR target/70496 (ARM32), taken from the trunk.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 07 Apr 2016 13:50:05 +0200
+
+gcc-5 (5.3.1-13ubuntu4) xenial; urgency=medium
+
+  * Update to SVN 20160404 (r234723, 5.3.1) from the gcc-5-branch.
+    - Fix PR c++/70393, PR target/70453, PR rtl-optimization/69307,
+      PR rtl-optimization/69102, PR rtl-optimization/69032, PR target/66660,
+      PR target/64411, PR rtl-optimization/70460, PR target/68973,
+      PR middle-end/70457 (LP: #1563134), PR rtl-optimization/68236,
+      PR target/67896 (AArch64), PR fortran/66911, PR fortran/65795,
+      PR target/67172 (MingW), PR target/70525 (x86), PR libgfortran/70235.
+  * Update the ibm branch to 20160324.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 05 Apr 2016 13:43:35 +0200
+
+gcc-5 (5.3.1-13ubuntu3) xenial; urgency=medium
+
+  * Fix the build from the Linaro branch on armhf.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 31 Mar 2016 00:00:45 +0200
+
+gcc-5 (5.3.1-13ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160330 (r234599, 5.3.1) from the gcc-5-branch.
+    - Fix PR c++/69826, PR c++/69797, PR target/70421, PR target/70329,
+      PR rtl-optimization/70429, PR target/70296, PR rtl-optimization/70222,
+      PR tree-optimization/70169, PR tree-optimization/70152, PR target/70062,
+      PR target/69888, PR target/70028, PR target/69969, PR debug/69705,
+      PR rtl-optimization/69891, PR middle-end/69838, PR target/69875,
+      PR tree-optimization/69802, PR rtl-optimization/69764, PR ipa/68672,
+      PR rtl-optimization/69771, PR rtl-optimization/69764, PR target/70052,
+      PR rtl-optimization/69771, PR target/70406, PR target/70319,
+      PR c++/70272, PR c++/67767, PR fortran/70397, PR target/70296,
+      PR target/69614.
+  * Strip the compiler binaries in preparation for the release. LP: #1553943.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 30 Mar 2016 22:35:43 +0200
+
+gcc-5 (5.3.1-13ubuntu1) xenial; urgency=medium
+
+  * Update the ibm branch to 20160324.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 24 Mar 2016 22:22:16 +0100
+
+gcc-5 (5.3.1-13) unstable; urgency=medium
+
+  * Update to SVN 20160323 (r234424, 5.3.1) from the gcc-5-branch.
+    - Fix PR target/70188 (parisc), PR ipa/70306, PR target/70325 (x86),
+      PR target/70327 (x86), PR ipa/70269, PR ipa/70161, PR target/70293 (x86),
+      PR c++/70209.
+  * Update the Linaro support to the 5-2016.03 snapshot.
+    - Fix PR target/70113 (AArch64), PR target/69894, PR target/69895,
+      PR target/62254, PR target/69610, PR target/69161, PR target/67896.
+  * Fix building from the ibm branch with glibc 2.23.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 24 Mar 2016 14:43:10 +0100
+
+gcc-5 (5.3.1-12ubuntu4) xenial; urgency=medium
+
+  * Update to SVN 20160318 (r234355, 5.3.1) from the gcc-5-branch.
+  * Build using glibc-2.23.
+  * Fix applying the gcc-linaro patch.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 20 Mar 2016 11:11:02 +0100
+
+gcc-5 (5.3.1-12ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160318 (r234324, 5.3.1) from the gcc-5-branch.
+    - Fix PR target/70188 (parisc).
+  * Update the Linaro support to the 5-2016.03 snapshot.
+    - Fix PR target/70113 (AArch64), PR target/69894, PR target/69895,
+      PR target/62254, PR target/69610, PR target/69161, PR target/67896.
+  * Fix building from the ibm branch with glibc 2.23.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 18 Mar 2016 17:30:26 +0100
+
+gcc-5 (5.3.1-12ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 17 Mar 2016 09:40:59 +0100
+
+gcc-5 (5.3.1-12) unstable; urgency=medium
+
+  * Update to SVN 20160315 (r234249, 5.3.1) from the gcc-5-branch.
+    - Fix PR tree-optimization/69666, PR middle-end/69920, PR c++/67364,
+      PR rtl-optimization/69195, PR rtl-optimization/47992,
+      PR rtl-optimization/69941, PR target/70131 (rs6000).
+  * When configured to link with --as-needed by default, always link the
+    sanitizer libraries with --no-as-needed.
+  * Fix PR c++/70209, taken from the trunk. LP: #1556217.
+  * Stop providing alternative for /usr/bin/go. (Michael Hudson-Doyle).
+    LP: #1555856.
+  * Disable gnat on powerpcspe. Closes: #816051.
+  * Apply proposed patch for PR c++/70218 (illegal access to private field
+    succeeds). Closes: #70218.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 16 Mar 2016 10:19:20 +0100
+
+gcc-5 (5.3.1-11ubuntu1) xenial; urgency=medium
+
+  * Update to SVN 20160311 (r234142, 5.3.1) from the gcc-5-branch.
+    - Fix PR tree-optimization/69666, PR middle-end/69920, PR c++/67364.
+  * Update the ibm branch to 20160310. LP: #1554644.
+  * When configured to link with --as-needed by default, always link the
+    sanitizer libraries with --no-as-needed. LP: #1413474
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 11 Mar 2016 16:56:02 +0100
+
+gcc-5 (5.3.1-11) unstable; urgency=medium
+
+  [ Matthias Klose ]
+  * Update to SVN 20160307 (r234017, 5.3.1) from the gcc-5-branch.
+    - s390x backend backports.
+    - Fix PR target/69625 (s390x), PR other/69006, PR tree-optimization/69776,
+      PR c++/67364, PR c++/68049, PR target/65932 (ARM32),
+      PR target/67714 (ARM32), PR target/70059 (x86), PR rtl-optimization/70007,
+      PR tree-optimization/69740, PR tree-optimization/69740, PR c++/67364,
+      PR c++/51406, PR c++/67364, PR c++/69261, PR c++/68087, PR c++/67104,
+      PR c++/51489, PR c++/69995, PR c++/69995, PR c++/65985.
+  * Fix m68k packaging typo. Closes: #815895.
+  * Remove powerpcspe specific patch, integrated upstream. Closes: #816048.
+
+  [ Svante Signell ]
+  * patches/ada-hurd.diff: Update. Closes: #815967.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 07 Mar 2016 10:37:00 +0100
+
+gcc-5 (5.3.1-10ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160225 (r233723, 5.3.1) from the gcc-5-branch.
+    - s390x backend backports.
+    - Fix PR target/69625 (s390x), PR other/69006, PR tree-optimization/69776,
+      PR c++/67364, PR c++/68049.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 25 Feb 2016 20:55:11 +0100
+
+gcc-5 (5.3.1-10ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 25 Feb 2016 01:18:45 +0100
+
+gcc-5 (5.3.1-10) unstable; urgency=medium
+
+  * Update to SVN 20160225 (r233687, 5.3.1) from the gcc-5-branch.
+    - Fix PR fortran/57365, PR fortran/52531, PR libstdc++/69939,
+      PR rtl-optimization/69609, PR tree-optimization/69719,
+      PR tree-optimization/69783, PR c++/69323.
+  * Install missing architecture specific plugin header files.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 25 Feb 2016 01:08:03 +0100
+
+gcc-5 (5.3.1-9ubuntu3) xenial; urgency=medium
+
+  * Update to SVN 20160222 (r233600, 5.3.1) from the gcc-5-branch.
+    - Fix PR fortran/57365, PR fortran/52531.
+  * Install missing architecture specific plugin header files on arm64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 22 Feb 2016 14:44:49 +0100
+
+gcc-5 (5.3.1-9ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160220 (r233588, 5.3.1) from the gcc-5-branch.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 20 Feb 2016 23:06:05 +0100
+
+gcc-5 (5.3.1-9ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 17 Feb 2016 01:39:54 +0100
+
+gcc-5 (5.3.1-9) unstable; urgency=medium
+
+  * Update to SVN 20160217 (r233477, 5.3.1) from the gcc-5-branch.
+    - Fix PR tree-optimization/69714. Closes: #813858.
+
+  [ Aurelien Jarno ]
+  * Backport fix for PR target/68273. Closes: #804536.
+
+  [ Matthias Klose ]
+  * Update the Linaro support to the 5-2016.02 snapshot.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 17 Feb 2016 01:24:40 +0100
+
+gcc-5 (5.3.1-8ubuntu3) xenial; urgency=medium
+
+  * Update to SVN 20160211 (r233340, 5.3.1) from the gcc-5-branch.
+  * Update the Linaro support to the 5-2016.02 snapshot.
+  * Stop building libgcc packages from this source package.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 11 Feb 2016 14:19:23 +0100
+
+gcc-5 (5.3.1-8ubuntu2) xenial; urgency=medium
+
+  * Fix building from the ibm-branch.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 05 Feb 2016 20:16:03 +0100
+
+gcc-5 (5.3.1-8ubuntu1) xenial; urgency=medium
+
+  * Update the ibm/gcc-5-branch (20160125).
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 05 Feb 2016 19:37:21 +0100
+
+gcc-5 (5.3.1-8) unstable; urgency=medium
+
+  * Update to SVN 20160205 (r233179, 5.3.1) from the gcc-5-branch.
+  * Apply proposed patch for PR go/66904, pass linker flags from
+    "#cgo pkg-config:" directives (Michael Hudson).
+  * Fix dependency generation for armel/armhf multilib cross targets.
+  * Fix libc dependency generation for multilib cross targets.
+  * Build libitm on alpha, s390x, sh4, sparc64.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 05 Feb 2016 16:29:13 +0100
+
+gcc-5 (5.3.1-7ubuntu1) xenial; urgency=medium
+
+  * Update the ibm/gcc-5-branch (20160121).
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 21 Jan 2016 14:01:35 +0100
+
+gcc-5 (5.3.1-7) unstable; urgency=medium
+
+  * Update to SVN 20160121 (r232666, 5.3.1) from the gcc-5-branch.
+  * Fix dependencies on target libraries which are not built anymore
+    from this source.
+  * Backport fix for PR jit/69144: Ensure that libgccjit's tempdir is fully
+    cleaned-up.
+  * Backport PR target/69176 (AArch64).
+  * Configure with --enable-fix-cortex-a53-843419 on AArch64.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 21 Jan 2016 10:18:01 +0100
+
+gcc-5 (5.3.1-6ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160119 (r232387, 5.3.1) from the gcc-5-branch.
+  * Fix dependencies on target libraries which are not built anymore
+    from this source.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 19 Jan 2016 02:41:08 +0100
+
+gcc-5 (5.3.1-6ubuntu1) xenial; urgency=medium
+
+  * Add POWER9 support, taken from the ibm/gcc-5-branch. LP: #1522410.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 14 Jan 2016 22:01:58 +0100
+
+gcc-5 (5.3.1-6) unstable; urgency=medium
+
+  * Update to SVN 20160114 (r232387, 5.3.1) from the gcc-5-branch.
+  * Build native gnat on sh4. Closes: #809498.
+  * Relax libgcjjit-5-dev dependency on libgccjit0.
+  * Apply proposed patch for PR target/69187 (armhf). LP: #1533101.
+  * Update libgnatvsn/libgnatprj conflicts.
+  * Update the Linaro support to the 5-2016.01 snapshot.
+  * GCC Linaro: Revert commits causing regressions PR1980 and PR1982.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 14 Jan 2016 21:50:22 +0100
+
+gcc-5 (5.3.1-5ubuntu3) xenial; urgency=medium
+
+  * Update to SVN 20160112 (r232261, 5.3.1) from the gcc-5-branch.
+  * Apply proposed patch for PR target/69187 (armhf). LP: #1533101.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 12 Jan 2016 12:04:46 +0100
+
+gcc-5 (5.3.1-5ubuntu2) xenial; urgency=medium
+
+  * Update to SVN 20160108 (r232175, 5.3.1) from the gcc-5-branch.
+  * Build native gnat on sh4. Closes: #809498.
+  * Relax libgcjjit-5-dev dependency on libgccjit0.
+  * Update libgnatvsn/libgnatprj conflicts.
+  * Update the Linaro support to the 5-2016.01 snapshot.
+  * GCC Linaro: Revert commits causing regressions PR1980 and PR1982.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 08 Jan 2016 19:44:59 +0100
+
+gcc-5 (5.3.1-5ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 01 Jan 2016 15:50:46 +0100
+
+gcc-5 (5.3.1-5) unstable; urgency=medium
+
+  * Update to SVN 20160101 (r232025, 5.3.1) from the gcc-5-branch.
+    - Fix PR c/69037. Closes: #809512, #809165.
+  * Relax gcj-5-{jre,jre-headless,jdk} dependencies on libgcj16.
+  * Build native gnat on sh4. Closes: #809498.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 01 Jan 2016 13:52:24 +0100
+
+gcc-5 (5.3.1-4ubuntu1) xenial; urgency=medium
+
+  * Revert the Linaro backport for PR target/63870 (ARM32). LP: #1527741.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 19 Dec 2015 05:25:28 +0100
+
+gcc-5 (5.3.1-4) unstable; urgency=medium
+
+  * Update to SVN 20151219 (r231847, 5.3.1) from the gcc-5-branch.
+  * Fix cross-building without having the common cross libraries installed.
+  * Update ada-m68k patch.
+  * Allow unstripped, non-optimized debug builds with setting DEB_BUILD_OPTIONS
+    including gccdebug.
+  * Remove obsolete libgccmath packaging support.
+  * Define SONAME macros whether the libraries are built or not.
+  * Update the Linaro support to the 5-2015.12 snapshot (revert the backport
+    for PR target/63870 (ARM32) causing regressions).
+  * Set target tools and build dependencies for cross builds.
+  * Build gdc on sh4.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 19 Dec 2015 04:54:41 +0100
+
+gcc-5 (5.3.1-3ubuntu3) xenial; urgency=medium
+
+  * Update to SVN 20151216 (r231675, 5.3.1) from the gcc-5-branch.
+  * Update the Linaro support to the 5-2015.12 snapshot.
+  * Allow unstripped, non-optimized debug builds with setting DEB_BUILD_OPTIONS
+    including gccdebug.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 16 Dec 2015 12:28:19 +0100
+
+gcc-5 (5.3.1-3ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+    - Build using GCC Linaro on armhf and arm64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 08 Dec 2015 02:21:55 +0100
+
+gcc-5 (5.3.1-3)  unstable; urgency=medium
+
+  * Update to SVN 20151207 (r231361, 5.3.1) from the gcc-5-branch.
+  * Remove upstreamed chunks from the ada-kfreebsd patch.
+
+ -- Matthias Klose <doko@debian.org>  Tue, 08 Dec 2015 02:10:51 +0100
+
+gcc-5 (5.3.1-2ubuntu2) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+    - Build using GCC Linaro on armhf and arm64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 07 Dec 2015 00:00:19 +0100
+
+gcc-5 (5.3.1-2) unstable; urgency=medium
+
+  * Update to SVN 20151206 (r231339, 5.3.1) from the gcc-5-branch.
+  * Re-enable building gdc/libphobos, fixing the profiled build.
+  * Fix PR sanitizer/67899, build failure on sparc/sparc64.
+
+ -- Matthias Klose <doko@debian.org>  Sun, 06 Dec 2015 19:15:46 +0100
+
+gcc-5 (5.3.1-1ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+    - Build using GCC Linaro on armhf and arm64.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 05 Dec 2015 11:40:27 +0100
+
+gcc-5 (5.3.1-1) unstable; urgency=medium
+
+  * Update to SVN 20151205 (r231314, 5.3.1) from the gcc-5-branch.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 05 Dec 2015 11:36:26 +0100
+
+gcc-5 (5.3.1-0ubuntu2) xenial; urgency=medium
+
+  * Update libgcc symbols file.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 04 Dec 2015 18:52:20 +0100
+
+gcc-5 (5.3.1-0ubuntu1) xenial; urgency=medium
+
+  * Update to SVN 20151204 (r231267, 5.3.1) from the gcc-5-branch.
+  * Build using GCC Linaro on armhf and arm64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 04 Dec 2015 15:04:01 +0100
+
+gcc-5 (5.3.0-3) unstable; urgency=medium
+
+  * Update libgcc symbols file.
+  * Restore libgcc.symbols.aebi.
+  * Disabled profiled bootstraps for backports.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 05 Dec 2015 07:50:48 +0100
+
+gcc-5 (5.3.0-1) experimental; urgency=medium
+
+  * GCC 5.3 release.
+    - Fix PR libstdc++/65142 (CVE-2015-5276).
+  * Update gdc to the gcc-5 branch 20151130.
+  * Enable the profiled bootstrap on amd64, arm64, armel armhf, i386, powerpc,
+    ppc64, ppc64el, s390x, x32 (excluding builds from the Linaro branch).
+  * Move test summary into the gcc-test-results package.
+  * Simplify libatomic, libcilkrts, libgcc, libgfortran, libgomp, libitm,
+    libmpx, libquadmath symbols files using versioned symbol references.
+    Closes: #806784.
+  * Only build the hppa64 cross compiler when either building the native compiler,
+    or when cross building the native compiler. Closes: #806479.
+  * Configure staged build with --enable-linker-build-id.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 04 Dec 2015 12:01:04 +0100
+
+gcc-5 (5.2.1-27ubuntu1) xenial; urgency=medium
+
+  * Configure with --enable-default-pie on s390x.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 30 Nov 2015 00:49:40 +0100
+
+gcc-5 (5.2.1-27) unstable; urgency=medium
+
+  * Update to SVN 20151129 (r231053, 5.2.1) from the gcc-5-branch.
+  * Don't strip cc1plus when shipping with unstripped frontends.
+  * Relax libgnatvsn5-dev-*-cross and libgnatprj5-dev-*-cross dependencies
+    on gnat-5-*-linux-gnu.
+  * Fix setting the explicit libc dependency for cross builds.
+  * Don't build m4-nofpu multilibs on sh4, install the default multilib
+    into the standard location.
+  * Stop building gnat on mips64, see https://gcc.gnu.org/PR65337 (#806370).
+  * Update the patch for PR go/67508 and re-enable Go on sparc and sparc64.
+  * Fix gnat sparc/sparc64 architecture detection.
+  * Update libgcc and libstdc++ symbols files.
+  * Don't ship the gcov tools in the gcc-hppa64-linux-gnu package.
+  * Run the autoconf generation in parallel.
+  * Add --enable-default-pie option to GCC configure, taken from the trunk.
+  * Enable gnat for m68k cross builds.
+  * Link gnat tools, gnat libs and libgccjit with the defaults LDFLAGS.
+  * Skip non-default multilib and libstdc++-v3 debug builds in bootstrap builds.
+  * Ship an empty debian/rules.parameters in the gcc-5-source package.
+
+ -- Matthias Klose <doko@debian.org>  Sun, 29 Nov 2015 23:48:58 +0100
+
+gcc-5 (5.2.1-26ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 25 Nov 2015 17:29:15 +0100
+
+gcc-5 (5.2.1-26) unstable; urgency=medium
+
+  * Update to SVN 20151125 (r230897, 5.2.1) from the gcc-5-branch.
+  * Fix the rtlibs stage build. Closes: #806186.
+  * Fix packaging the cross libphobos package.
+  * Build the hppa64 cross compiler on x86 architectures.
+  * gcc-5-hppa64-linux-gnu: Stop providing unversioned tools using
+    alternatives. Build a gcc-hppa64-linux-gnu package instead.
+  * Split out a gcc-5-test-results package from g++-5, allowing a post
+    build analysis, and reducing the size of the g++-5 package.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 25 Nov 2015 20:33:08 +0100
+
+gcc-5 (5.2.1-25ubuntu1) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 23 Nov 2015 06:06:11 +0100
+
+gcc-5 (5.2.1-25) unstable; urgency=medium
+
+  * Update to SVN 20151123 (r230734, 5.2.1) from the gcc-5-branch.
+  * Fix libgcc4-dbg dependency on libgcc4. Closes: #805839.
+  * Fix building epoch prefixed cross packages.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 23 Nov 2015 05:48:00 +0100
+
+gcc-5 (5.2.1-24ubuntu3) xenial; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 21 Nov 2015 12:21:06 +0100
+
+gcc-5 (5.2.1-24) unstable; urgency=medium
+
+  * Update to SVN 20151121 (r230703, 5.2.1) from the gcc-5-branch.
+  * Fix PR libstdc++/56158, taken from the trunk. Closes: #804521. LP: #1514309.
+  * Don't try to build a gnat cross compiler when there is no gnat compiler
+    for the build architecture.
+  * Update gnat build dependencies for backports.
+  * Parallelize building documentation and parallelize the packaging step.
+  * Update the Linaro support to the 5-2015.11 snapshot.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 21 Nov 2015 11:22:16 +0100
+
+gcc-5 (5.2.1-23ubuntu1) xenial; urgency=medium
+
+  * Again, configure with --enable-targets=powerpcle-linux on ppc64el.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 28 Oct 2015 12:18:49 +0100
+
+gcc-5 (5.2.1-23) unstable; urgency=medium
+
+  * Update to SVN 20151028 (r229478, 5.2.1) from the gcc-5-branch.
+
+  [ Matthias Klose ]
+  * Update the Linaro support to the 5-2015.10 snapshot.
+  * gcj: On ppc64el, use the same jvm archdir name as for openjdk (ppc64le).
+  * gcj: Fix priority of java alternatives. Closes: #803055.
+  * gnat-5: Reintroduce the unversioned gnatgcc name. Closes: #802838.
+
+  [ Aurelien Jarno ]
+  * Replace proposed patch for PR rtl-optimization/67736 by the one
+    committed on trunk.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 28 Oct 2015 10:36:54 +0100
+
+gcc-5 (5.2.1-22ubuntu5) xenial; urgency=medium
+
+  * Revert the fix for PR ipa/67056, causing an ICE.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 23 Oct 2015 19:13:51 +0200
+
+gcc-5 (5.2.1-22ubuntu4) xenial; urgency=medium
+
+  * Update to SVN 20151022 (r229176, 5.2.1) from the gcc-5-branch.
+  * Fix PR ipa/67056, taken from the trunk. Closes: #788299.
+  * Target POWER8 on ppc64el.
+  * Again, don't strip the compiler binaries for more verbose ICEs.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 22 Oct 2015 17:32:47 +0200
+
+gcc-5 (5.2.1-22ubuntu2) wily; urgency=medium
+
+  * Strip the compiler binaries for the release.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 16 Oct 2015 12:17:17 +0200
+
+gcc-5 (5.2.1-22ubuntu1) wily; urgency=medium
+
+  * gcj: On ppc64el, use the same jvm archdir name as for openjdk (ppc64le).
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 11 Oct 2015 10:13:52 +0200
+
+gcc-5 (5.2.1-22) unstable; urgency=medium
+
+  * Update to SVN 20151010 (r228681, 5.2.1) from the gcc-5-branch.
+    - Fix PR libstdc++/65913, PR libstdc++/67173, PR libstdc++/67747,
+      PR c/67730, PR middle-end/67563, PR lto/67699, PR tree-optimization/67821,
+      PR debug/58315.
+
+  [ Matthias Klose ]
+  * Restore the work around for PR libstdc++/65913, still needed at least
+    for powerpc.
+  * Rename gcc-5-hppa64 to gcc-5-hppa64-linux-gnu, update (build) dependency
+    on binutils. Closes: #800563.
+  * Adjust setting DH_COMPAT for dh_movefiles with updated debhelper supporting
+    globbing of arguments. Closes: #800250.
+  * Build-depend on gnat-5 instead of gnat-4.9.
+
+  [ Aurelien Jarno ]
+  * Do not Use --with-mips-plt on mips and mipsel. Closes: #799811.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 10 Oct 2015 22:17:09 +0200
+
+gcc-5 (5.2.1-21ubuntu2) wily; urgency=medium
+
+  * Restore the work around for PR libstdc++/65913, still needed at least
+    for powerpc.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 04 Oct 2015 02:21:30 +0200
+
+gcc-5 (5.2.1-21ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 03 Oct 2015 21:30:44 +0200
+
+gcc-5 (5.2.1-21) unstable; urgency=medium
+
+  * Update to SVN 20151003 (r228449, 5.2.1) from the gcc-5-branch.
+  * Fix building gnat. Closes: #800781.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 03 Oct 2015 17:28:45 +0200
+
+gcc-5 (5.2.1-20ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 02 Oct 2015 11:35:22 +0200
+
+gcc-5 (5.2.1-20) unstable; urgency=medium
+
+  * Update to SVN 20151002 (r228373, 5.2.1) from the gcc-5-branch.
+  * Fix packaging the ada cross library packages.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 02 Oct 2015 10:24:38 +0200
+
+gcc-5 (5.2.1-19ubuntu1) wily; urgency=medium
+
+  * Configure --with-arch=zEC12 on s390x Ubuntu.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 30 Sep 2015 22:55:14 +0200
+
+gcc-5 (5.2.1-19) unstable; urgency=medium
+
+  * Update to SVN 20150930 (r228302, 5.2.1) from the gcc-5-branch.
+    - Fix PR ipa/66424. Closes: #800318.
+
+  [ Matthias Klose ]
+  * Update the Linaro support to the 5-2015.09 snapshot.
+  * Fix PR libstdc++/67707, taken from the trunk. LP: #1499564.
+  * Ship libgcj.spec in gcj-5 instead of gcj-5-jdk. Closes: #800010.
+  * gcj-5: Suggest gcj-5-jdk.
+  * Fix base dependency for ada cross library packages.
+  * Add ${shlibs:Depends} for libgnatvsn and libgnatprj.
+  * Link lrealpath.o into libgnatprj. Closes: #800045.
+  * libgnat{svn,prj}-dev: For cross builds, move adainclude and adalib files
+    into the gcc libdir.
+  * Default to POWER8 on ppc64el.
+  * armv8: Fix slt lda missing conditional code (taken from the trunk).
+  * Fix lintian pre-depends-directly-on-multiarch-support warnings.
+
+  [ Aurelien Jarno ]
+  * Apply proposed patch for PR rtl-optimization/67736 when building for
+    mips64 or mips64el. Closes: #800321.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 30 Sep 2015 20:36:50 +0200
+
+gcc-5 (5.2.1-18ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 23 Sep 2015 03:10:37 +0200
+
+gcc-5 (5.2.1-18) unstable; urgency=medium
+
+  * Update to SVN 20150922 (r228023, 5.2.1) from the gcc-5-branch.
+
+  [ Matthias Klose ]
+  * gcc-5-plugin-dev: Depend on libmpc-dev. Closes: #798997.
+  * Fix PR libstdc++/65913, taken from the trunk. Closes: #797577.
+
+  [ YunQiang Su ]
+  * Build again the gnat-5-sjlj package. Closes: #798782.
+  * Fix gnat cross builds, and cross building gnat.
+
+ -- Matthias Klose <doko@debian.org>  Tue, 22 Sep 2015 23:15:17 +0200
+
+gcc-5 (5.2.1-17ubuntu5) wily; urgency=medium
+
+  * Don't assume --push-state/--pop-state being available for every linker.
+    LP: #1496743.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 22 Sep 2015 20:54:29 +0200
+
+gcc-5 (5.2.1-17ubuntu4) wily; urgency=medium
+
+  * gcc-5-plugin-dev: Depend on libmpc-dev. Closes: #798997.
+  * Work around PR c++/65913, link with -latomic when linking with -lstdc++.
+    Closes: #797577.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 15 Sep 2015 17:57:31 +0200
+
+gcc-5 (5.2.1-17ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 11 Sep 2015 03:24:48 +0200
+
+gcc-5 (5.2.1-17) unstable; urgency=medium
+
+  * Update to SVN 20150911 (r227671, 5.2.1) from the gcc-5-branch.
+    - Fix PR c++/67369, ICE on valid code. LP: #1489173.
+
+  [ Matthias Klose ]
+  * Build-depend on linux-libc-dev [m68k] for gcc and gcc-snapshot builds.
+    Closes: #796906.
+  * Don't ignore anymore bootstrap comparison failures on sh4. Closes: #796939.
+  * Fix stage1 cross build for KFreeBSD. Closes: #796901.
+  * libgo: Fix PR go/67508, rewrite lfstack packing/unpacking to look more
+    like that in Go (Michael Hudson). LP: #1472650.
+  * Fix PR target/67143 (AArch64), ICE on valid code. LP: #1481333.
+
+  [ Aurelien Jarno ]
+  * Use --with-mips-plt on mips*.
+  * Build for R2 ISA on mips, mips64 and mips64el.
+  * Optimize for R2 ISA on mipsel.
+  * Only apply mips-fix-loongson2f-nop on mipsel.
+
+  [ YunQiang Su ]
+  * Fix running the acats tests. Closes: #798531.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 11 Sep 2015 03:17:20 +0200
+
+gcc-5 (5.2.1-16ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 03 Sep 2015 16:00:26 +0200
+
+gcc-5 (5.2.1-16) unstable; urgency=medium
+
+  * Update to SVN 20150903 (r227431, 5.2.1) from the gcc-5-branch.
+    - Backport the filesystem TS library.
+  * libstdc++-dev: Install libstdc++fs.a.
+  * Again, configure with --enable-targets=powerpcle-linux on ppc64el.
+  * Apply proposed patch for PR target/67211 (ppc64el).
+  * libgo-dev: Install libgolibbegin.a.
+  * Apply proposed patch for PR target/67280 (ARM). LP: #1482320.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 03 Sep 2015 12:16:15 +0200
+
+gcc-5 (5.2.1-15ubuntu5) wily; urgency=medium
+
+  * Fix libstdc++-breaks (add version for the clustalx breaks).
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 25 Aug 2015 17:56:26 +0200
+
+gcc-5 (5.2.1-15ubuntu3) wily; urgency=medium
+
+  * Update to SVN 20150825 (r227166, 5.2.1) from the gcc-5-branch.
+    - Backport the filesystem TS library.
+  * libstdc++-dev: Install libstdc++fs.a.
+  * Again, configure with --enable-targets=powerpcle-linux on ppc64el.
+  * Apply proposed patch for PR target/67211 (ppc64el).
+  * libgo-dev: Install libgolibbegin.a.
+  * Add the PR libstdc++/66145 breaks for wily.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 25 Aug 2015 15:56:11 +0200
+
+gcc-5 (5.2.1-15ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 09 Aug 2015 13:20:15 +0200
+
+gcc-5 (5.2.1-15) unstable; urgency=medium
+
+  * Update to SVN 20150808 (r226731, 5.2.1) from the gcc-5-branch.
+  * Adjust libstdc++-breaks: Break libantlr-dev instead of antlr;
+    adjust libreoffice version (closes: #794203), drop xxsd break (see
+    #793289), remove cython breaks (closes: #794511), add breaks for
+    packages built using cython (chemps2, fiona, guiqwt, htseq, imposm,
+    pysph, pytaglib, python-scipy, python-sfml, rasterio).
+  * Ignore missing libstdc++ symbols on sparc64 (work around #792204).
+
+ -- Matthias Klose <doko@debian.org>  Sat, 08 Aug 2015 11:18:24 +0200
+
+gcc-5 (5.2.1-14) unstable; urgency=high
+
+  * Fix libstdc++6 breaks.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 31 Jul 2015 04:12:08 +0200
+
+gcc-5 (5.2.1-13) unstable; urgency=high
+
+  * Upload to unstable (https://wiki.debian.org/GCC5). See also
+    https://lists.debian.org/debian-devel-announce/2015/07/msg00000.html
+  * Update to SVN 20150730 (r226411, 5.2.1) from the gcc-5-branch.
+    - Fix PR libstdc++/67015. Closes: #793784.
+  * Fix version macros in the plugin-header.h header. Closes: #793478.
+  * libstdc++6: Add breaks for issues tagged with gcc-pr66145.
+  * Add libcpprest2.4 to libstdc++6 breaks. Closes: #784655.
+  * Fix PR c++/66857, taken from the trunk.
+  * Ignore differences in gcc/real.o in the bootstrap build for
+    sh*-*linux-gnu targets.  According to PR 67002, "A rare indeterminacy
+    of the register choice.  Both codes are valid.  It seems very hard to
+    find where has this indeterminacy come from". Suggested by Adrian
+    Glaubitz.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 30 Jul 2015 21:51:25 +0200
+
+gcc-5 (5.2.1-12ubuntu2) wily; urgency=medium
+
+  * Update to SVN 20150729 (r226354, 5.2.1) from the gcc-5-branch.
+    - Fix PR libstdc++/67015. Closes: #793784.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 29 Jul 2015 17:59:18 +0200
+
+gcc-5 (5.2.1-12ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 22 Jul 2015 21:17:54 +0200
+
+gcc-5 (5.2.1-12) experimental; urgency=medium
+
+  * Update to SVN 20150723 (r226105, 5.2.1) from the gcc-5-branch.
+  * Fix PR libstdc++/66145, std::ios_base::failure objects thrown from
+    libstdc++.so using the gcc4-compatible ABI.
+    Just build src/c++11/functexcept.cc using the new ABI. It will break
+    code, which will be handled in the archive by adding Breaks for the
+    affected packages.  Third party code using such code will need a rebuild.
+  * Remove the work around to build with -O1 on sh4.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 23 Jul 2015 14:18:44 +0200
+
+gcc-5 (5.2.1-11ubuntu1) wily; urgency=medium
+
+  * Configure without --disable-libstdcxx-dual-abi.
+  * Configure with --with-default-libstdcxx-abi=new.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 17 Jul 2015 08:14:56 +0200
+
+gcc-5 (5.2.1-1ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 16 Jul 2015 16:58:50 +0200
+
+gcc-5 (5.2.1-1) experimental; urgency=medium
+
+  * GCC 5.2 release.
+  * Update to SVN 20150716 (r225880, 5.2.1) from the gcc-5-branch.
+  * Require version 5.2 for the libstdc++6 cxx symbols.
+  * Ignore missing libstdc++ symbols on sparc64 (work around #792204).
+  * Go escape analysis: analyze multiple result type assertions (taken
+    from the trunk).
+
+ -- Matthias Klose <doko@debian.org>  Thu, 16 Jul 2015 15:35:44 +0200
+
+gcc-5 (5.1.1-14ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 11 Jul 2015 13:00:26 +0200
+
+gcc-5 (5.1.1-14) unstable; urgency=medium
+
+  * Update to SVN 20150711 (r225710, 5.1.1) from the gcc-5-branch.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 11 Jul 2015 11:57:19 +0200
+
+gcc-5 (5.1.1-13ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 07 Jul 2015 14:29:11 +0200
+
+gcc-5 (5.1.1-13) unstable; urgency=medium
+
+  * Update to SVN 20150706 (r225471, 5.1.1) from the gcc-5-branch.
+  * Update libasan symbol files.
+  * Configure --with-fp-32=xx on all mips targets, setting MIPS O32 default
+    to FPXX (YunQiang Su). Closes: #789612.
+  * Update libgccjit symbol file.
+  * Add x32 symbols files for libgcc1 and libstdc++6.
+  * libgccjit0: Add breaks for python-gccjit and python3-gccjit.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 06 Jul 2015 19:55:08 +0200
+
+gcc-5 (5.1.1-12ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 23 Jun 2015 12:53:45 +0200
+
+gcc-5 (5.1.1-12) unstable; urgency=medium
+
+  * Update to SVN 20150622 (r224724, 5.1.1) from the gcc-5-branch.
+  * Update symbols files for mips64 libatomic and libstdc++ (YunQiang Su).
+    Closes: #788990.
+  * Fix "empty-binary-package" lintian warnings.
+
+ -- Matthias Klose <doko@debian.org>  Mon, 22 Jun 2015 14:37:49 +0200
+
+gcc-5 (5.1.1-11ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 17 Jun 2015 14:38:38 +0200
+
+gcc-5 (5.1.1-11) unstable; urgency=medium
+
+  * Update to SVN 20150616 (r224519, 5.1.1) from the gcc-5-branch.
+  * gccgo: escape: Analyze binary expressions (taken from the trunk).
+  * Explicitly build with -Wl,--no-relax on alpha again.
+  * Build with -O1 on sh4 (try to work around PR target/66358).
+
+ -- Matthias Klose <doko@debian.org>  Tue, 16 Jun 2015 16:11:59 +0200
+
+gcc-5 (5.1.1-10) unstable; urgency=medium
+
+  * Update to SVN 20150613 (r224454, 5.1.1) from the gcc-5-branch.
+  * Make removal of byte-compiled libstdc++ pretty printer files more
+    robust. Closes: #787630.
+  * Fix mips 32bit (o32) multilib builds (YunQiang Su).
+  * Build target libraries with -Wl,-z,relro.
+  * Build libstdc++6 when building the common libraries.
+  * Fix a bunch of lintian warnings.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 13 Jun 2015 12:59:17 +0200
+
+gcc-5 (5.1.1-9ubuntu2) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 03 Jun 2015 01:02:23 +0200
+
+gcc-5 (5.1.1-9) unstable; urgency=medium
+
+  * Update to SVN 20150602 (r224029, 5.1.1) from the gcc-5-branch.
+  * Remove byte-compiled libstdc++ pretty printer files on upgrade.
+    Closes: #785939.
+  * Fix dangling libgccjit.so symlink.
+  * Fix base dependency for rtlibs stage builds.
+  * Fix build failure of the hppa64 cross compiler, introduced by the
+    gnat cross patches. Closes: #786692.
+  * Update README.source (Michael Vogt).
+  * libgo: syscall.Sendfile(): Apply proposed patch for PR go/66378.
+    (Michael Vogt). LP: #1460530.
+  * Set CC and CXX matching the same GCC version for the stage1 build.
+  * Work around PR go/66368, build libgo with -fno-stack-protector.
+    LP: #1454183.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 03 Jun 2015 00:49:41 +0200
+
+gcc-5 (5.1.1-8ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 28 May 2015 12:51:48 +0200
+
+gcc-5 (5.1.1-8) unstable; urgency=medium
+
+  * Update to SVN 20150528 (r223816, 5.1.1) from the gcc-5-branch.
+  * Set the priorities of the *-dev-*-cross packages to extra.
+  * Prepare to change the base dependency for *-cross packages.
+  * Fix dependencies for stage1 and stage2 builds.
+  * Relax dependencies on binary indep *-dev-*-cross packages.
+  * Disable building gdc on sh4 (bootstrap comparison failure).
+
+ -- Matthias Klose <doko@debian.org>  Thu, 28 May 2015 15:51:00 +0200
+
+gcc-5 (5.1.1-7) unstable; urgency=medium
+
+  * Update to SVN 20150522 (r223579, 5.1.1) from the gcc-5-branch.
+  * Add description for the ada-gnattools-cross patch (YunQiang Su).
+  * Provide a rtlibs stage to build a subset of target library packages.
+  * Make symbols file symlinking for cross builds more robust.
+  * Prefer gnatgcc-5 over gnatgcc when building native packages.
+  * Various fixes to build a gnat cross compiler:
+    - Fix dependencies of packages.
+    - Fix building libgnatprj and libgnatvsn (still needed to figure
+      out if these are target or host libraries).
+  * Fix building cross compilers with dpkg 1.18.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 22 May 2015 18:20:01 +0200
+
+gcc-5 (5.1.1-6ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+  * Fix dependencies for stage1 and stage2 builds.
+  * Disable building gdc on sh4.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 19 May 2015 18:29:02 +0200
+
+gcc-5 (5.1.1-6) unstable; urgency=medium
+
+  * Update to SVN 20150519 (r223346, 5.1.1) from the gcc-5-branch.
+  * Don't build gdc-multilib on armel.
+  * Remove old CFLAGS/LDFLAGS settings to build gdc.
+  * Remove reference to .ico file in NEWS.html.
+  * Fix gcc's dependency on libcc1-0 for native builds.
+  * Fix stripping the rpath when cross-building cross compilers.
+  * Remove work arounds to build 64bit multilibs on 32bit targets,
+    now properly fixed upstream.
+  * Partially apply patches to build a gnat cross compiler (submitted
+    by YunQiang Su).
+    - gnatmake: Call the versioned gnatbind and gnatlink commands.
+      Closes: #782257.
+    - Allow libgnatprj and libgnatvsn to cross build. Addresses: #783372.
+    - New patch ada-gnattools-cross.diff (no documentation).
+  * Backport patch for gccgo:
+    - gccgo: If unary & does not escape, the var does not escape.
+  * Apply the backported patches for the go escape analysis. Need to
+    be enabled with -fgo-optimize-alloc (this option may go away again).
+  * Re-enable running the tests.
+
+ -- Matthias Klose <doko@debian.org>  Tue, 19 May 2015 10:33:40 +0200
+
+gcc-5 (5.1.1-5ubuntu4) wily; urgency=medium
+
+  * Update to SVN 20150513 (r223155, 5.1.1) from the gcc-5-branch.
+  * Don't build gdc-multilib on armel.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 13 May 2015 14:36:20 +0200
+
+gcc-5 (5.1.1-5ubuntu3) wily; urgency=medium
+
+  * Fix gnat build dependencies.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 10 May 2015 02:46:32 +0200
+
+gcc-5 (5.1.1-5ubuntu2) wily; urgency=medium
+
+  * Update to SVN 20150509 (r222970, 5.1.1) from the gcc-5-branch.
+  * Fix gotools configury.
+  * Configure with
+      --disable-libstdcxx-dual-abi --with-default-libstdcxx-abi=c++98
+    While libstdc++ provides a dual ABI to support both the c++98 and c++11
+    ABI, there is no committment on compatibility of the old experimental
+    c++11 ABI from GCC 4.9 and the stable c++11 ABI in GCC 5.
+    Closes: #784655.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 09 May 2015 19:24:57 +0200
+
+gcc-5 (5.1.1-5ubuntu1) wily; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 05 May 2015 17:52:14 +0200
+
+gcc-5 (5.1.1-5) unstable; urgency=medium
+
+  * Update to SVN 20150507 (r222873, 5.1.1) from the gcc-5-branch.
+  * Fix 32bit libstdc++ symbols files for kfreebsd-amd64.
+  * libx32phobos-dev: Don't depend on libx32z-dev, when not available.
+  * Fix gotools configury.
+  * Configure with
+      --disable-libstdcxx-dual-abi --with-default-libstdcxx-abi=c++98
+    While libstdc++ provides a dual ABI to support both the c++98 and c++11
+    ABI, there is no committment on compatibility of the old experimental
+    c++11 ABI from GCC 4.9 and the stable c++11 ABI in GCC 5.
+    Closes: #784655.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 08 May 2015 18:48:49 +0200
+
+gcc-5 (5.1.1-4) unstable; urgency=medium
+
+  * Update to SVN 20150503 (r222751, 5.1.1) from the gcc-5-branch.
+    - Fix build failure on alpha.
+  * Fix applying the cross-biarch patch for stage1 builds.
+  * Fix libstdc++ symbols files for kfreebsd-amd64.
+  * Remove libn32phobos-5-dev from the control file.
+  * Really disable gnat on x32.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 02 May 2015 19:18:57 +0200
+
+gcc-5 (5.1.1-3) unstable; urgency=high
+
+  * Update to SVN 20150430 (r222660, 5.1.1) from the gcc-5-branch.
+  * Fix libstdc++ symbols files for kfreebsd-i386.
+  * PR libstdc++/62258, fix for std::uncaught_exception, taken from the trunk.
+    LP: #1439451.
+  * Backport patches for gccgo (not yet applied):
+    - Consider multi-result calls in escape analysis.
+    - Propagate escape info from closures to enclosed variables.
+    - Analyze function values and conversions.
+    - Use backend interface for stack allocation.
+  * More libstdc++ symbols updates for the Hurd and KFreeBSD.
+  * config-ml.in: Add D support.
+  * Update cross-biarch.diff to support D and Go.
+  * Apply the cross-biarch patch for every cross build.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 30 Apr 2015 15:42:05 +0200
+
+gcc-5 (5.1.1-2) unstable; urgency=medium
+
+  * Update to SVN 20150428 (r222550, 5.1.1) from the gcc-5-branch.
+  * Fix the gnat build dependency.
+  * Don't build go and gofmt for cross compilers.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 28 Apr 2015 23:57:14 +0200
+
+gcc-5 (5.1.1-1) unstable; urgency=medium
+
+  * GCC 5.1.0 release.
+  * Update to SVN 20150424 (r222416, 5.1.1) from the gcc-5-branch.
+  * Update NEWS files.
+  * Apply the ada-bootstrap-compare patch for snapshot builds as well.
+  * Update libasan, libgomp and libstdc++ symbols files.
+  * Don't ignore errors in dh_makeshlibs and dh_shlibdeps anymore, symbols
+    files should be uptodate now.
+  * Split out the sjlj build related things from the ada-acats patch into
+    a new ada-acats-sjlj patch.
+  * Don't build libx32phobos-5-dev when not building x32 multilibs.
+  * Fix standard C++ include directory for cross builds. Closes: #783241.
+  * Ignore bootstrap comparison failure on ia64. Filed upstream as
+    PR middle-end/65874.
+  * gccgo: Add (don't yet apply) a patch to implement escape analysis (taken
+    from the trunk). Turned off by default, enable with -fgo-optimize-alloc.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 24 Apr 2015 18:42:39 +0200
+
+gcc-5 (5.1.0-0ubuntu11) vivid; urgency=medium
+
+  * GCC 5.1.0 release.
+  * Update NEWS files.
+  * gccgo: Implement escape analysis (taken from the trunk). Turned off
+    by default, enable with -fgo-optimize-alloc.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 22 Apr 2015 14:54:11 +0200
+
+gcc-5 (5.1~rc2-0ubuntu12) vivid; urgency=medium
+
+  * Fix libasan symbols.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 22 Apr 2015 00:12:03 +0200
+
+gcc-5 (5.1~rc2-0ubuntu11) vivid; urgency=medium
+
+  * GCC 5.1 release candidate 2.
+  * Update to SVN 20150421 (r222253) from the gcc-5-branch.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 21 Apr 2015 18:53:06 +0200
+
+gcc-5 (5.1~rc1-0ubuntu12) vivid; urgency=medium
+
+  * Update to SVN 20150419 (r222218) from the gcc-5-branch.
+  * Apply the ada-bootstrap-compare patch for snapshot builds as well.
+  * Update libasan, libgomp and libstdc++ symbols files.
+  * Don't ignore errors in dh_makeshlibs and dh_shlibdeps anymore, symbols
+    files should be uptodate now.
+  * Split out the sjlj build related things from the ada-acats patch into
+    a new ada-acats-sjlj patch.
+  * Ignore bootstrap comparison failure on ia64. Filed upstream as
+    PR middle-end/65874.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 19 Apr 2015 15:57:49 +0200
+
+gcc-5 (5.1~rc1-0ubuntu11) vivid; urgency=medium
+
+  * GCC 5.1 release candidate 1.
+  * Update to SVN 20150414 (r222066) from the gcc-5-branch.
+  * Update GDC to the gcc-5 branch, 20140414.
+  * Don't build libobjc, when not building the common libraries.
+  * Don't run the gccjit tests on KFreeBSD. Works around #782444:.
+  * Fix not building libs built by the next GCC version.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 14 Apr 2015 03:01:02 +0200
+
+gcc-5 (5-20150410-0ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150410.
+  * Fix /usr/include/c++/5.0.0 symlink.
+  * Re-enable building the D frontend. Closes: #782254.
+  * gccgo: Install libnetgo.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 11 Apr 2015 02:21:24 +0200
+
+gcc-5 (5-20150404-0ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150404.
+  * Don't explicitly configure --with-gxx-include-dir and an absolute path,
+    so the toolchain remains relocatible. Instead, canonicalize the include
+    path names at runtime.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 04 Apr 2015 23:34:58 +0200
+
+gcc-5 (5-20150401-0ubuntu12) vivid; urgency=medium
+
+  * Update to SVN 20150401.
+  * Don't link libgnatprj using --no-allow-shlib-undefined on older releases.
+  * Don't build libmpx on older releases.
+  * Remove the work around to build libgccjit on arm64.
+  * Fix the libgccjit build using the just built compiler.
+  * Don't break other gcc, gcj, gnat -base packages for backports, only
+    needed for dist-upgrades.
+  * Don't add -gtoggle to STAGE3_CFLAGS (disabling the bootstrap comparison).
+    Instead, ignore the one differing file (gcc/ada/a-except.o) for now.
+    See #781457, PR ada/65618.
+  * Update libasan, libtsan, libgfortran and libstdc++ symbols files.
+  * Add symbols files for libmpx, libgccjit and libcc1.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 01 Apr 2015 11:27:39 +0200
+
+gcc-5 (5-20150329-1ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150329.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sun, 29 Mar 2015 19:13:54 +0200
+
+gcc-5 (5-20150329-1) experimental; urgency=medium
+
+  * Update to SVN 20150329.
+  * Fix building the gnat-5-doc package.
+  * Fix gnat build dependencies.
+  * Fix installation of the gnat upstream ChangeLog. Closes: #781451.
+  * Restore the bootstrap-debug.mk patch to the ada-mips patch
+    for debugging purposes. See #781457.
+
+ -- Matthias Klose <doko@debian.org>  Sun, 29 Mar 2015 18:53:29 +0200
+
+gcc-5 (5-20150328-0ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150328.
+  * Fix building the gnat-5-doc package.
+  * Fix installation of the gnat upstream ChangeLog. Closes: #781451.
+  * Restore the bootstrap-debug.mk patch to the ada-mips patch
+    for debugging purposes. See #781457.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 28 Mar 2015 15:08:55 +0100
+
+gcc-5 (5-20150327-1) experimental; urgency=medium
+
+  * Update to SVN 20150327.
+  * Update libcc1 build support.
+  * Fix syntax in libstdc++ symbols file. Closes: #780991.
+  * Fix PR go/65417: Add support for PPC32 relocs to debug/elf. LP: #1431388.
+  * Fix PR go/65462: Fix go get dependencies. LP: #1432497.
+  * Limit the omp.h multilib fix to Linux. Closes: #778440.
+  * For ICEs, dump the preprocessed source file to stderr when in a
+    distro build environment.
+  * Remove the bootstrap-debug.mk patch from the ada-mips patch.
+  * gnat related work (partly based on #780640):
+    - Update patches for GCC 5.
+    - Build the gnat packages from the gcc-5 source package.
+    - Don't build a gnat-base package from the gcc-5 source.
+    - Stop building the gnat-5-sjlj package for now, patch needs an update.
+    - Fix the packaging when not building the gnat-5-sjlj package.
+    - Don't apply the ada-symbolic-tracebacks, patch needs an update.
+    - Fix the libgnatprj build, build with -DIN_GCC.
+  * Replace cloog/ppl build bits with isl build bits.
+
+ -- Matthias Klose <doko@debian.org>  Fri, 27 Mar 2015 21:05:16 +0100
+
+gcc-5 (5-20150321-1ubuntu12) vivid; urgency=medium
+
+  * Update to SVN 20150321.
+  * Move the libcc1plugin from the gcc-5-plugin-dev package into the
+    gcc-5 package.
+  * Configure with --enable-checking=yes (instead of =release).
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 21 Mar 2015 15:28:30 +0100
+
+gcc-5 (5-20150316-1ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150316.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 16 Mar 2015 11:56:03 +0100
+
+gcc-5 (5-20150314-1ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150314.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 14 Mar 2015 14:29:28 +0100
+
+gcc-5 (5-20150312-1ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150312.
+    - PR go/65404, enable cgo on arm64 and powerpc. LP: #1431032.
+  * Fix libmpx multilib builds.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 12 Mar 2015 23:11:21 +0100
+
+gcc-5 (5-20150311-1ubuntu12) vivid; urgency=medium
+
+  * Update to SVN 20150311.
+    - libgo: Add arm64 to the pointer size map (Michael Hudson).
+    - libgo: Add ppc to the pointer size map.
+  * Enable libmpx builds on amd64 and i386.
+  * Update the gcc-multiarch patch for mips64 (YunQiang Su).
+    Closes: #776402, #780271.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 11 Mar 2015 19:56:38 +0100
+
+gcc-5 (5-20150307-1ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150307.
+    - Update gccgo to Go 1.4.2.
+  * Enable libsanitizer for AArch64 and POWERPC LE (asan, ubsan).
+  * Remove the support to build empty libsanitizer packages on powerpc
+    and ppc64; libsanitizer should be stable on these architectures.
+  * Fix libcc1.so symlink. Closes: #779341.
+  * Revert the fix for PR65150 on armel and armhf to restore bootstrap.
+  * Don't strip the libgo library, or some things won't work as documented,
+    like runtime.Callers. Still keep the -dbg packages and check if some
+    debug information can be stripped.
+  * gccgo-5: Install alternatives for go and gofmt.
+
+ -- Matthias Klose <doko@ubuntu.com>  Sat, 07 Mar 2015 12:36:40 +0100
+
+gcc-5 (5-20150226-1) experimental; urgency=medium
+
+  * Update to SVN 20150226.
+    - Fix PR c/65040 (closes: #778514), PR tree-optimization/65053
+      (closes: #778070, #778071), PR c++/64898 (closes: #778472).
+  * Allow not to strip the compiler executables to be able to print backtraces
+    for ICEs.
+  * Fix gnat build on mips64el (James Cowgill). Addresses: #779191.
+  * Fix the hppa64 cross build (John David Anglin). Closes: #778658.
+  * Fix libstdc++ pretty printers for Python3. Closes: #778436.
+
+ -- Matthias Klose <doko@debian.org>  Thu, 26 Feb 2015 08:18:23 +0100
+
+gcc-5 (5-20150205-0ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150205.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 05 Feb 2015 01:57:43 +0100
+
+gcc-5 (5-20150203-0ubuntu12) vivid; urgency=medium
+
+  * Don't disable bootstrap mode for the jit build on arm64, gets
+    miscompiled.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 03 Feb 2015 13:39:02 +0100
+
+gcc-5 (5-20150203-0ubuntu11) vivid; urgency=medium
+
+  * Update to SVN 20150203.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 03 Feb 2015 13:39:02 +0100
+
+gcc-5 (5-20150129-0ubuntu2) vivid; urgency=medium
+
+  * Fix the libstdc++ build.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 29 Jan 2015 19:09:16 +0100
+
+gcc-5 (5-20150129-0ubuntu1) vivid; urgency=medium
+
+  * Update to SVN 20150129.
+  * Configure --with-default-libstdcxx-abi=c++11 for development,
+    --with-default-libstdcxx-abi=c++98 for backports.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 29 Jan 2015 17:47:03 +0100
+
+gcc-5 (5-20150128-0ubuntu1) vivid; urgency=medium
+
+  * Update to SVN 20150128.
+  * Update GDC for GCC 5.
+  * Build GDC multilib packages.
+  * Update cross-install-location.diff for gcc-5. Closes: #776100.
+  * Re-enable libgccjit on AArch64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 28 Jan 2015 23:30:09 +0100
+
+gcc-5 (5-20150127-0ubuntu2) vivid; urgency=medium
+
+  * Disable libgccjit on AArch64, compiler issue
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 27 Jan 2015 18:05:12 +0100
+
+gcc-5 (5-20150127-0ubuntu1) vivid; urgency=medium
+
+  * Update to SVN 20150127.
+  * Disable libgccjit on AArch64.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 27 Jan 2015 14:39:03 +0100
+
+gcc-5 (5-20150126-0ubuntu3) vivid; urgency=medium
+
+  * Update to SVN 20150126.
+  * More symbol file updates.
+  * Fix libbacktrace and libsanitizer multilib builds.
+  * Fix libssp builds on 64bit architectures.
+
+ -- Matthias Klose <doko@ubuntu.com>  Mon, 26 Jan 2015 18:22:53 +0100
+
+gcc-5 (5-20150121-0ubuntu2) vivid; urgency=medium
+
+  * GCC 5.
+  * Build new binary packages libcc1-0, libgccjit0, libgccjit-5-dev,
+    libgccjit-5-dbg, libgccjit-5-doc.
+  * Update symbols files (still incomplete).
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 20 Jan 2015 12:45:13 +0100
+
+gcc-4.9 (4.9.2-10ubuntu2) vivid; urgency=medium
+
+  * Update to SVN 20150116 (r219730) from the gcc-4_9-branch.
+    - Fix PR libstdc++/64476, PR libstdc++/60966, PR libstdc++/64239,
+      PR middle-end/63704 (ice on valid), PR target/64513 (x86),
+      PR rtl-optimization/64286 (wrong code), PR tree-optimization/64563 (ice),
+      PR middle-end/64391 (ice on valid), PR c++/54442 (ice on valid),
+      PR target/64358 (rs6000, wrong code), PR target/63424 (AArch64, ice on
+      valid), PR target/64479 (SH), PR rtl-optimization/64536, PR target/64505
+      (rs6000), PR target/61413 (ARM, wrong code), PR target/64507 (SH),
+      PR target/64409 (x32, ice on valid), PR c++/64487 (ice on valid),
+      PR c++/64352, PR c++/64251 (rejects valid), PR c++/64297 (ice on valid),
+      PR c++/64029 (ice on valid), PR c++/63657 (diagnostic), PR c++/38958
+      (diagnostic), PR c++/63658 (rejects valid), PR ada/64492 (build),
+      PR fortran/64528 (ice on valid), PR fortran/63733 (wrong code),
+      PR fortran/56867 (wrong code), PR fortran/64244 (ice on valid).
+  * Update the Linaro support to the 4.9-2015.01 release.
+
+ -- Matthias Klose <doko@ubuntu.com>  Fri, 16 Jan 2015 14:28:09 +0100
+
+gcc-4.9 (4.9.2-10ubuntu1) vivid; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 31 Dec 2014 04:54:06 +0100
+
+gcc-4.9 (4.9.2-10) unstable; urgency=medium
+
+  * Really add x32 multilib packages for i386 cross builds to the control file.
+    Closes: #773265.
+  * Use the final binutils 2.25 release.
+  * Tighten the gcc-4.9 dependency on libgcc-4.9-dev (YunQiang Su).
+
+ -- Matthias Klose <doko@debian.org>  Thu, 25 Dec 2014 18:10:51 +0100
+
+gcc-4.9 (4.9.2-9) unstable; urgency=medium
+
+  * Update to SVN 20141220 (r218987) from the gcc-4_9-branch.
+    - Fix PR libstdc++/64302, PR libstdc++/64303, PR c++/60955,
+      PR rtl-optimization/64010 (wrong code), PR sanitizer/64265 (wrong code).
+  * Add x32 multilib packages for i386 cross builds to the control file.
+    Closes: #773265.
+  * Fix mips64el multilib cross builds. Closes: #772665.
+  * libphobos-4.x-dev: Stop providing libphobos-dev, now a real package.
+
+ -- Matthias Klose <doko@debian.org>  Sat, 20 Dec 2014 07:47:15 +0100
+
+gcc-4.9 (4.9.2-8) unstable; urgency=medium
+
+  * Update to SVN 20141214 (r218721) from the gcc-4_9-branch.
+    - Fix PR tree-optimization/62021 (ice), PR middle-end/64225 (missed
+      optimization), PR libstdc++/64239, PR rtl-optimization/64037 (wrong
+      code), PR target/64200 (x86, ice), PR tree-optimization/64269 (ice).
+  * Don't build libphobos multilibs, there is no gdc-multilib build.
+  * Really disable the sanitizer libs on powerpc, ppc64 and ppc64el.
+  * Paste config.log files to stdout in case of build errors.
+
+ -- Matthias Klose <doko@debian.org>  Sun, 14 Dec 2014 18:43:49 +0100
+
+gcc-4.9 (4.9.2-7ubuntu3) vivid; urgency=medium
+
+  * Fix the powerpc build.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 11 Dec 2014 15:52:15 +0100
+
+gcc-4.9 (4.9.2-7ubuntu2) vivid; urgency=medium
+
+  * Update to SVN 20141211 (r218620) from the gcc-4_9-branch.
+    - Fix PR tree-optimization/62021 (ice), PR middle-end/64225 (missed
+      optimization).
+  * Don't build libphobos multilibs, there is no gdc-multilib built.
+  * Really disable the sanitizer libs on powerpc, ppc64 and ppc64el.
+  * Paste config.log files to stdout in case of build errors.
+
+ -- Matthias Klose <doko@ubuntu.com>  Thu, 11 Dec 2014 12:04:13 +0100
+
+gcc-4.9 (4.9.2-7ubuntu1) vivid; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Wed, 10 Dec 2014 15:27:33 +0100
+
+gcc-4.9 (4.9.2-7) unstable; urgency=medium
+
+  * Update to SVN 20141210 (r218575) from the gcc-4_9-branch.
+    - Fix PR libstdc++/64203, PR target/55351 (SH), PR tree-optimization/61686,
+      PR bootstrap/64213.
+    - libgcc hppa backports.
+  * Fix cross builds with dpkg-architecture unconditionally exporting
+    target variables. For now specify the target architecture
+    in debian/target. This still needs to work with older dpkg versions,
+    so don't "simplify" the packaging. Closes: #768167.
+
+ -- Matthias Klose <doko@debian.org>  Wed, 10 Dec 2014 13:32:42 +0100
+
+gcc-4.9 (4.9.2-6ubuntu1) vivid; urgency=medium
+
+  * Merge with Debian; remaining changes:
+    - Build from upstream sources.
+
+ -- Matthias Klose <doko@ubuntu.com>  Tue, 09 Dec 2014 13:47:24 +0100
+
+# For older changelog entries, run 'apt-get changelog gcc-4.9-base'
--- gcc-5-5.4.0.orig/debian/compat
+++ gcc-5-5.4.0/debian/compat
@@ -0,0 +1 @@
+5
--- gcc-5-5.4.0.orig/debian/control
+++ gcc-5-5.4.0/debian/control
@@ -0,0 +1,2905 @@
+Source: gcc-5
+Section: devel
+Priority: optional
+Maintainer: Ubuntu Core developers <ubuntu-devel-discuss@lists.ubuntu.com>
+XSBC-Original-Maintainer: Debian GCC Maintainers <debian-gcc@lists.debian.org>
+Uploaders: Matthias Klose <doko@debian.org>
+Standards-Version: 3.9.8
+Build-Depends: debhelper (>= 9.20141010), dpkg-dev (>= 1.17.14), 
+  g++-multilib [amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32] <!cross>, g++-5 [arm64] <!cross>, 
+  libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6), libc6-dev (>= 2.13-31) [armel armhf], libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 mipsn32 mipsn32el mips64 mips64el s390x sparc64 x32], libn32gcc1 [mips mipsel mips64 mips64el], lib64gcc1 [i386 mips mipsel mipsn32 mipsn32el powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel mipsn32 mipsn32el], libc6-dev-mipsn32 [mips mipsel mips64 mips64el], libc6-dev-mips32 [mipsn32 mipsn32el mips64 mips64el], libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], libc6-dev-armhf [armel], libhfgcc1 [armel], libc6-dev-armel [armhf], libsfgcc1 [armhf], libc6.1-dbg [alpha ia64] | libc0.3-dbg [hurd-i386] | libc0.1-dbg [kfreebsd-i386 kfreebsd-amd64] | libc6-dbg, 
+  kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k], 
+  m4, libtool, autoconf2.64, 
+  libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], 
+  autogen, gawk, lzma, xz-utils, patchutils, 
+  zlib1g-dev, systemtap-sdt-dev [linux-any kfreebsd-any hurd-any], 
+  binutils:native (>= 2.26.1) | binutils-multiarch:native (>= 2.26.1), binutils-hppa64-linux-gnu:native (>= 2.26.1) [hppa amd64 i386 x32], 
+  gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, 
+  gdb:native, 
+  texinfo (>= 4.3), locales, sharutils, 
+  procps, zlib1g-dev, libantlr-java, python:native, libffi-dev, fastjar, libmagic-dev, libecj-java (>= 3.3.0-2), zip, libasound2-dev [ !hurd-any !kfreebsd-any], libxtst-dev, libxt-dev, libgtk2.0-dev (>= 2.4.4-2), libart-2.0-dev, libcairo2-dev, libgraphite2-dev, gnat-5:native [!m32r !sh3 !sh3eb !sh4eb !powerpcspe !mips64 !x32], g++-5:native, netbase, 
+  libisl-dev, libmpc-dev (>= 1.0), libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), 
+  dejagnu [!m68k], realpath (>= 1.9.12), chrpath, lsb-release, quilt, 
+   g++-5-alpha-linux-gnu [alpha] <cross>, gobjc-5-alpha-linux-gnu [alpha] <cross>, gfortran-5-alpha-linux-gnu [alpha] <cross>, gcj-5-alpha-linux-gnu [alpha] <cross>, gdc-5-alpha-linux-gnu [alpha] <cross>, gccgo-5-alpha-linux-gnu [alpha] <cross>, gnat-5-alpha-linux-gnu [alpha] <cross>, g++-5-x86-64-linux-gnu [amd64] <cross>, gobjc-5-x86-64-linux-gnu [amd64] <cross>, gfortran-5-x86-64-linux-gnu [amd64] <cross>, gcj-5-x86-64-linux-gnu [amd64] <cross>, gdc-5-x86-64-linux-gnu [amd64] <cross>, gccgo-5-x86-64-linux-gnu [amd64] <cross>, gnat-5-x86-64-linux-gnu [amd64] <cross>, g++-5-arm-linux-gnueabi [armel] <cross>, gobjc-5-arm-linux-gnueabi [armel] <cross>, gfortran-5-arm-linux-gnueabi [armel] <cross>, gcj-5-arm-linux-gnueabi [armel] <cross>, gdc-5-arm-linux-gnueabi [armel] <cross>, gccgo-5-arm-linux-gnueabi [armel] <cross>, gnat-5-arm-linux-gnueabi [armel] <cross>, g++-5-arm-linux-gnueabihf [armhf] <cross>, gobjc-5-arm-linux-gnueabihf [armhf] <cross>, gfortran-5-arm-linux-gnueabihf [armhf] <cross>, gcj-5-arm-linux-gnueabihf [armhf] <cross>, gdc-5-arm-linux-gnueabihf [armhf] <cross>, gccgo-5-arm-linux-gnueabihf [armhf] <cross>, gnat-5-arm-linux-gnueabihf [armhf] <cross>, g++-5-aarch64-linux-gnu [arm64] <cross>, gobjc-5-aarch64-linux-gnu [arm64] <cross>, gfortran-5-aarch64-linux-gnu [arm64] <cross>, gcj-5-aarch64-linux-gnu [arm64] <cross>, gdc-5-aarch64-linux-gnu [arm64] <cross>, gccgo-5-aarch64-linux-gnu [arm64] <cross>, gnat-5-aarch64-linux-gnu [arm64] <cross>, g++-5-i686-linux-gnu [i386] <cross>, gobjc-5-i686-linux-gnu [i386] <cross>, gfortran-5-i686-linux-gnu [i386] <cross>, gcj-5-i686-linux-gnu [i386] <cross>, gdc-5-i686-linux-gnu [i386] <cross>, gccgo-5-i686-linux-gnu [i386] <cross>, gnat-5-i686-linux-gnu [i386] <cross>, g++-5-mips-linux-gnu [mips] <cross>, gobjc-5-mips-linux-gnu [mips] <cross>, gfortran-5-mips-linux-gnu [mips] <cross>, gcj-5-mips-linux-gnu [mips] <cross>, gdc-5-mips-linux-gnu [mips] <cross>, gccgo-5-mips-linux-gnu [mips] <cross>, gnat-5-mips-linux-gnu [mips] <cross>, g++-5-mipsel-linux-gnu [mipsel] <cross>, gobjc-5-mipsel-linux-gnu [mipsel] <cross>, gfortran-5-mipsel-linux-gnu [mipsel] <cross>, gcj-5-mipsel-linux-gnu [mipsel] <cross>, gdc-5-mipsel-linux-gnu [mipsel] <cross>, gccgo-5-mipsel-linux-gnu [mipsel] <cross>, gnat-5-mipsel-linux-gnu [mipsel] <cross>, g++-5-mips64-linux-gnuabi64 [mips64] <cross>, gobjc-5-mips64-linux-gnuabi64 [mips64] <cross>, gfortran-5-mips64-linux-gnuabi64 [mips64] <cross>, gcj-5-mips64-linux-gnuabi64 [mips64] <cross>, gdc-5-mips64-linux-gnuabi64 [mips64] <cross>, gccgo-5-mips64-linux-gnuabi64 [mips64] <cross>, g++-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gobjc-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gfortran-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gcj-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gdc-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gccgo-5-mips64el-linux-gnuabi64 [mips64el] <cross>, gnat-5-mips64el-linux-gnuabi64 [mips64el] <cross>, g++-5-powerpc-linux-gnu [powerpc] <cross>, gobjc-5-powerpc-linux-gnu [powerpc] <cross>, gfortran-5-powerpc-linux-gnu [powerpc] <cross>, gcj-5-powerpc-linux-gnu [powerpc] <cross>, gdc-5-powerpc-linux-gnu [powerpc] <cross>, gccgo-5-powerpc-linux-gnu [powerpc] <cross>, gnat-5-powerpc-linux-gnu [powerpc] <cross>, g++-5-powerpc64-linux-gnu [ppc64] <cross>, gobjc-5-powerpc64-linux-gnu [ppc64] <cross>, gfortran-5-powerpc64-linux-gnu [ppc64] <cross>, gcj-5-powerpc64-linux-gnu [ppc64] <cross>, gdc-5-powerpc64-linux-gnu [ppc64] <cross>, gccgo-5-powerpc64-linux-gnu [ppc64] <cross>, gnat-5-powerpc64-linux-gnu [ppc64] <cross>, g++-5-powerpc64le-linux-gnu [ppc64el] <cross>, gobjc-5-powerpc64le-linux-gnu [ppc64el] <cross>, gfortran-5-powerpc64le-linux-gnu [ppc64el] <cross>, gcj-5-powerpc64le-linux-gnu [ppc64el] <cross>, gdc-5-powerpc64le-linux-gnu [ppc64el] <cross>, gccgo-5-powerpc64le-linux-gnu [ppc64el] <cross>, gnat-5-powerpc64le-linux-gnu [ppc64el] <cross>, g++-5-m68k-linux-gnu [m68k] <cross>, gobjc-5-m68k-linux-gnu [m68k] <cross>, gfortran-5-m68k-linux-gnu [m68k] <cross>, gcj-5-m68k-linux-gnu [m68k] <cross>, gdc-5-m68k-linux-gnu [m68k] <cross>, g++-5-sh4-linux-gnu [sh4] <cross>, gobjc-5-sh4-linux-gnu [sh4] <cross>, gfortran-5-sh4-linux-gnu [sh4] <cross>, gcj-5-sh4-linux-gnu [sh4] <cross>, g++-5-sparc64-linux-gnu [sparc64] <cross>, gobjc-5-sparc64-linux-gnu [sparc64] <cross>, gfortran-5-sparc64-linux-gnu [sparc64] <cross>, gcj-5-sparc64-linux-gnu [sparc64] <cross>, gdc-5-sparc64-linux-gnu [sparc64] <cross>, gccgo-5-sparc64-linux-gnu [sparc64] <cross>, g++-5-s390x-linux-gnu [s390x] <cross>, gobjc-5-s390x-linux-gnu [s390x] <cross>, gfortran-5-s390x-linux-gnu [s390x] <cross>, gcj-5-s390x-linux-gnu [s390x] <cross>, gdc-5-s390x-linux-gnu [s390x] <cross>, gccgo-5-s390x-linux-gnu [s390x] <cross>, gnat-5-s390x-linux-gnu [s390x] <cross>, g++-5-x86-64-linux-gnux32 [x32] <cross>, gobjc-5-x86-64-linux-gnux32 [x32] <cross>, gfortran-5-x86-64-linux-gnux32 [x32] <cross>, gcj-5-x86-64-linux-gnux32 [x32] <cross>, gdc-5-x86-64-linux-gnux32 [x32] <cross>, gccgo-5-x86-64-linux-gnux32 [x32] <cross>, 
+Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base, xsltproc, libxml2-utils, docbook-xsl-ns, 
+Homepage: http://gcc.gnu.org/
+Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-5/
+Vcs-Svn: svn://anonscm.debian.org/gcccvs/branches/sid/gcc-5
+
+Package: gcc-5-base
+Architecture: any
+Multi-Arch: same
+Section: libs
+Priority: required
+Depends: ${misc:Depends}
+Replaces: ${base:Replaces}
+Breaks: ${base:Breaks}
+Description: GCC, the GNU Compiler Collection (base package)
+ This package contains files common to all languages and libraries
+ contained in the GNU Compiler Collection (GCC).
+
+Package: libgcc-5-dev
+Architecture: any
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm},
+ ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:liblsan},
+ ${dep:libtsan}, ${dep:libubsan}, ${dep:libcilkrts}, ${dep:libvtv},
+ ${dep:libmpx},
+ ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends}
+Multi-Arch: same
+Replaces: gccgo-5 (<< ${gcc:Version})
+Description: GCC support library (development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: libgcc4
+Architecture: hppa
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+Section: libs
+Priority: required
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GCC support library
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+
+Package: libgcc4-dbg
+Architecture: hppa
+Multi-Arch: same
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgcc4 (= ${gcc:EpochVersion}), ${misc:Depends}
+Description: GCC support library (debug symbols)
+ Debug symbols for the GCC support library.
+
+Package: lib64gcc-5-dev
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (64bit development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: lib32gcc-5-dev
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (32 bit development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: libhfgcc-5-dev
+Architecture: armel
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (hard float ABI development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: libsfgcc-5-dev
+Architecture: armhf
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (soft float ABI development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: libn32gcc-5-dev
+Architecture: mips mipsel mips64 mips64el
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (n32 development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: libx32gcc-5-dev
+Architecture: amd64 i386
+Section: libdevel
+Priority: optional
+Recommends: ${dep:libcdev}
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+Description: GCC support library (x32 development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+
+Package: gcc-5
+Architecture: any
+Section: devel
+Priority: optional
+Depends: cpp-5 (= ${gcc:Version}), gcc-5-base (= ${gcc:Version}),
+    ${dep:libcc1}, 
+  binutils (>= ${binutils:Version}), 
+  ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends}
+Recommends: ${dep:libcdev}
+Replaces: gccgo-5 (<< ${gcc:Version}), gcc-5-plugin-dev (<< 5-20150321-1),
+  gcc-5-base (<< 5-20150329-1)
+Suggests: ${gcc:multilib}, gcc-5-doc (>= ${gcc:SoftVersion}),
+ gcc-5-locales (>= ${gcc:SoftVersion}),
+ libgcc1-dbg (>= ${libgcc:Version}),
+ libgomp1-dbg (>= ${gcc:Version}),
+ libitm1-dbg (>= ${gcc:Version}),
+ libatomic1-dbg (>= ${gcc:Version}),
+ libasan2-dbg (>= ${gcc:Version}),
+ liblsan0-dbg (>= ${gcc:Version}),
+ libtsan0-dbg (>= ${gcc:Version}),
+ libubsan0-dbg (>= ${gcc:Version}),
+ libcilkrts5-dbg (>= ${gcc:Version}),
+ libmpx0-dbg (>= ${gcc:Version}),
+ libquadmath0-dbg (>= ${gcc:Version})
+Provides: c-compiler
+Description: GNU C compiler
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+
+Package: gcc-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU C compiler (multilib support)
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: gcc-5-test-results
+Architecture: any
+Section: devel
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), ${misc:Depends}
+Replaces: g++-5 (<< 5.2.1-28)
+Description: Test results for the GCC test suite
+ This package contains the test results for running the GCC test suite
+ for a post build analysis.
+
+Package: gcc-5-plugin-dev
+Architecture: any
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), libmpc-dev (>= 1.0), ${shlibs:Depends}, ${misc:Depends}
+Description: Files for GNU GCC plugin development.
+ This package contains (header) files for GNU GCC plugin development. It
+ is only used for the development of GCC plugins, but not needed to run
+ plugins.
+
+Package: gcc-5-hppa64-linux-gnu
+Architecture: hppa amd64 i386 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}, binutils-hppa64-linux-gnu | binutils-hppa64
+Replaces: gcc-5-hppa64 (<< 5.2.1-22)
+Provides: gcc-5-hppa64
+Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3), gcc-4.7-hppa64 (<< 4.7.3-13), gcc-4.8-hppa64 (<< 4.8.2-22), gcc-4.9-hppa64 (<< 4.9.3-1)
+Description: GNU C compiler (cross compiler for hppa64)
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+
+Package: cpp-5
+Architecture: any
+Section: interpreters
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Suggests: gcc-5-locales (>= ${gcc:SoftVersion})
+Replaces: gccgo-5 (<< ${gcc:Version})
+Description: GNU C preprocessor
+ A macro processor that is used automatically by the GNU C compiler
+ to transform programs before actual compilation.
+ .
+ This package has been separated from gcc for the benefit of those who
+ require the preprocessor but not the compiler.
+
+Package: cpp-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Description: Documentation for the GNU C preprocessor (cpp)
+ Documentation for the GNU C preprocessor in info format.
+
+Package: gcc-5-locales
+Architecture: all
+Section: devel
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), cpp-5 (>= ${gcc:SoftVersion}), ${misc:Depends}
+Recommends: gcc-5 (>= ${gcc:SoftVersion})
+Description: GCC, the GNU compiler collection (native language support files)
+ Native language support for GCC. Lets GCC speak your language,
+ if translations are available.
+ .
+ Please do NOT submit bug reports in other languages than "C".
+ Always reset your language settings to use the "C" locales.
+
+Package: g++-5
+Architecture: any
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Provides: c++-compiler, c++abi2-dev
+Suggests: ${gxx:multilib}, gcc-5-doc (>= ${gcc:SoftVersion}), libstdc++6-5-dbg (>= ${gcc:Version})
+Description: GNU C++ compiler
+ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++.
+
+Package: g++-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), g++-5 (= ${gcc:Version}), gcc-5-multilib (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${dep:libcxxbiarchdbg}
+Description: GNU C++ compiler (multilib support)
+ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: libgomp1
+Section: libs
+Architecture: any
+Provides: libgomp1-armel [armel], libgomp1-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libgomp1-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgomp1 (= ${gcc:Version}), ${misc:Depends}
+Provides: libgomp1-dbg-armel [armel], libgomp1-dbg-armhf [armhf]
+Multi-Arch: same
+Description: GCC OpenMP (GOMP) support library (debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib32gomp1
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: GCC OpenMP (GOMP) support library (32bit)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib32gomp1-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32gomp1 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (32 bit debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib64gomp1
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (64bit)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib64gomp1-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64gomp1 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (64bit debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libn32gomp1
+Section: libs
+Architecture: mips mipsel mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (n32)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libn32gomp1-dbg
+Architecture: mips mipsel mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32gomp1 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (n32 debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+
+Package: libx32gomp1
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (x32)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libx32gomp1-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32gomp1 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC OpenMP (GOMP) support library (x32 debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+
+Package: libhfgomp1
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libgomp1-armhf [armel]
+Description: GCC OpenMP (GOMP) support library (hard float ABI)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libhfgomp1-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfgomp1 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libgomp1-dbg-armhf [armel]
+Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+
+Package: libsfgomp1
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libgomp1-armel [armhf]
+Description: GCC OpenMP (GOMP) support library (soft float ABI)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libsfgomp1-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfgomp1 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libgomp1-dbg-armel [armhf]
+Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+
+Package: libitm1
+Section: libs
+Architecture: any
+Provides: libitm1-armel [armel], libitm1-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Transactional Memory Library
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libitm1-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libitm1 (= ${gcc:Version}), ${misc:Depends}
+Provides: libitm1-dbg-armel [armel], libitm1-dbg-armhf [armhf]
+Multi-Arch: same
+Description: GNU Transactional Memory Library (debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib32itm1
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: GNU Transactional Memory Library (32bit)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib32itm1-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32itm1 (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Transactional Memory Library (32 bit debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib64itm1
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Transactional Memory Library (64bit)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib64itm1-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64itm1 (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Transactional Memory Library (64bit debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+#Package: libn32itm`'ITM_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GNU Transactional Memory Library (n32)
+# GNU Transactional Memory Library (libitm) provides transaction support for
+# accesses to the memory of a process, enabling easy-to-use synchronization of
+# accesses to shared memory by several threads.
+
+#Package: libn32itm`'ITM_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(itm`'ITM_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GNU Transactional Memory Library (n32 debug symbols)
+# GNU Transactional Memory Library (libitm) provides transaction support for
+# accesses to the memory of a process, enabling easy-to-use synchronization of
+# accesses to shared memory by several threads.
+
+Package: libx32itm1
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Transactional Memory Library (x32)
+ This manual documents the usage and internals of libitm. It provides
+ transaction support for accesses to the memory of a process, enabling
+ easy-to-use synchronization of accesses to shared memory by several threads.
+
+Package: libx32itm1-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32itm1 (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Transactional Memory Library (x32 debug symbols)
+ This manual documents the usage and internals of libitm. It provides
+ transaction support for accesses to the memory of a process, enabling
+ easy-to-use synchronization of accesses to shared memory by several threads.
+
+Package: libhfitm1
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libitm1-armhf [armel]
+Description: GNU Transactional Memory Library (hard float ABI)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libhfitm1-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfitm1 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libitm1-armel [armhf]
+Description: GNU Transactional Memory Library (hard float ABI debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libsfitm1
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Transactional Memory Library (soft float ABI)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libsfitm1-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfitm1 (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Transactional Memory Library (soft float ABI debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libatomic1
+Section: libs
+Architecture: any
+Provides: libatomic1-armel [armel], libatomic1-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: support library providing __atomic built-in functions
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libatomic1-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libatomic1 (= ${gcc:Version}), ${misc:Depends}
+Provides: libatomic1-dbg-armel [armel], libatomic1-dbg-armhf [armhf]
+Multi-Arch: same
+Description: support library providing __atomic built-in functions (debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib32atomic1
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: support library providing __atomic built-in functions (32bit)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib32atomic1-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32atomic1 (= ${gcc:Version}), ${misc:Depends}
+Description: support library providing __atomic built-in functions (32 bit debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib64atomic1
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: support library providing __atomic built-in functions (64bit)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib64atomic1-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64atomic1 (= ${gcc:Version}), ${misc:Depends}
+Description: support library providing __atomic built-in functions (64bit debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libn32atomic1
+Section: libs
+Architecture: mips mipsel mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: support library providing __atomic built-in functions (n32)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libn32atomic1-dbg
+Architecture: mips mipsel mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32atomic1 (= ${gcc:Version}), ${misc:Depends}
+Description: support library providing __atomic built-in functions (n32 debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libx32atomic1
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: support library providing __atomic built-in functions (x32)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libx32atomic1-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32atomic1 (= ${gcc:Version}), ${misc:Depends}
+Description: support library providing __atomic built-in functions (x32 debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libhfatomic1
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libatomic1-armhf [armel]
+Description: support library providing __atomic built-in functions (hard float ABI)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libhfatomic1-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfatomic1 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libatomic1-armel [armhf]
+Description: support library providing __atomic built-in functions (hard float ABI debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libsfatomic1
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: support library providing __atomic built-in functions (soft float ABI)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libsfatomic1-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfatomic1 (= ${gcc:Version}), ${misc:Depends}
+Description: support library providing __atomic built-in functions (soft float ABI debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libasan2
+Section: libs
+Architecture: any
+Provides: libasan2-armel [armel], libasan2-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libasan2-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libasan2 (= ${gcc:Version}), ${misc:Depends}
+Provides: libasan2-dbg-armel [armel], libasan2-dbg-armhf [armhf]
+Multi-Arch: same
+Description: AddressSanitizer -- a fast memory error detector (debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib32asan2
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: AddressSanitizer -- a fast memory error detector (32bit)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib32asan2-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32asan2 (= ${gcc:Version}), ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (32 bit debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib64asan2
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (64bit)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib64asan2-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64asan2 (= ${gcc:Version}), ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (64bit debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+#Package: libn32asan`'ASAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(extra)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: AddressSanitizer -- a fast memory error detector (n32)
+# AddressSanitizer (ASan) is a fast memory error detector.  It finds
+# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+#Package: libn32asan`'ASAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(asan`'ASAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: AddressSanitizer -- a fast memory error detector (n32 debug symbols)
+# AddressSanitizer (ASan) is a fast memory error detector.  It finds
+# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libx32asan2
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (x32)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libx32asan2-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32asan2 (= ${gcc:Version}), ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (x32 debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libhfasan2
+Section: libs
+Architecture: armel
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libasan2-armhf [armel]
+Description: AddressSanitizer -- a fast memory error detector (hard float ABI)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libhfasan2-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfasan2 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libasan2-armel [armhf]
+Description: AddressSanitizer -- a fast memory error detector (hard float ABI debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libsfasan2
+Section: libs
+Architecture: armhf
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (soft float ABI)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libsfasan2-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfasan2 (= ${gcc:Version}), ${misc:Depends}
+Description: AddressSanitizer -- a fast memory error detector (soft float ABI debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: liblsan0
+Section: libs
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: LeakSanitizer -- a memory leak detector (runtime)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+Package: liblsan0-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), liblsan0 (= ${gcc:Version}), ${misc:Depends}
+Multi-Arch: same
+Description: LeakSanitizer -- a memory leak detector (debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+Package: lib32lsan0
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: LeakSanitizer -- a memory leak detector (32bit)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+Package: lib32lsan0-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32lsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: LeakSanitizer -- a memory leak detector (32 bit debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+#Package: lib64lsan`'LSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (64bit)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+#Package: lib64lsan`'LSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(lsan`'LSAN_SO,64,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (64bit debug symbols)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+#Package: libn32lsan`'LSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (n32)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+#Package: libn32lsan`'LSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(lsan`'LSAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (n32 debug symbols)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+Package: libx32lsan0
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: LeakSanitizer -- a memory leak detector (x32)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+Package: libx32lsan0-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32lsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: LeakSanitizer -- a memory leak detector (x32 debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+Package: libtsan0
+Section: libs
+Architecture: any
+Provides: libtsan0-armel [armel], libtsan0-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (runtime)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libtsan0-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libtsan0 (= ${gcc:Version}), ${misc:Depends}
+Provides: libtsan0-dbg-armel [armel], libtsan0-dbg-armhf [armhf]
+Multi-Arch: same
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libubsan0
+Section: libs
+Architecture: any
+Provides: libubsan0-armel [armel], libubsan0-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (runtime)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libubsan0-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libubsan0 (= ${gcc:Version}), ${misc:Depends}
+Provides: libubsan0-dbg-armel [armel], libubsan0-dbg-armhf [armhf]
+Multi-Arch: same
+Description: UBSan -- undefined behaviour sanitizer (debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib32ubsan0
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: UBSan -- undefined behaviour sanitizer (32bit)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib32ubsan0-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32ubsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (32 bit debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib64ubsan0
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (64bit)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib64ubsan0-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64ubsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (64bit debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+#Package: libn32ubsan`'UBSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: UBSan -- undefined behaviour sanitizer (n32)
+# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+# Various computations will be instrumented to detect undefined behavior
+# at runtime. Available for C and C++.
+
+#Package: libn32ubsan`'UBSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: UBSan -- undefined behaviour sanitizer (n32 debug symbols)
+# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+# Various computations will be instrumented to detect undefined behavior
+# at runtime. Available for C and C++.
+
+Package: libx32ubsan0
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (x32)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libx32ubsan0-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32ubsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (x32 debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libhfubsan0
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libubsan0-armhf [armel]
+Description: UBSan -- undefined behaviour sanitizer (hard float ABI)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libhfubsan0-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfubsan0 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libubsan0-armel [armhf]
+Description: UBSan -- undefined behaviour sanitizer (hard float ABI debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libsfubsan0
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (soft float ABI)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libsfubsan0-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfubsan0 (= ${gcc:Version}), ${misc:Depends}
+Description: UBSan -- undefined behaviour sanitizer (soft float ABI debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libcilkrts5
+Section: libs
+Architecture: any
+Provides: libcilkrts5-armel [armel], libcilkrts5-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Intel Cilk Plus language extensions (runtime)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libcilkrts5-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libcilkrts5 (= ${gcc:Version}), ${misc:Depends}
+Provides: libcilkrts5-dbg-armel [armel], libcilkrts5-dbg-armhf [armhf]
+Multi-Arch: same
+Description: Intel Cilk Plus language extensions (debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib32cilkrts5
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: Intel Cilk Plus language extensions (32bit)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib32cilkrts5-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32cilkrts5 (= ${gcc:Version}), ${misc:Depends}
+Description: Intel Cilk Plus language extensions (32 bit debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib64cilkrts5
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Intel Cilk Plus language extensions (64bit)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib64cilkrts5-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64cilkrts5 (= ${gcc:Version}), ${misc:Depends}
+Description: Intel Cilk Plus language extensions (64bit debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libx32cilkrts5
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Intel Cilk Plus language extensions (x32)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libx32cilkrts5-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32cilkrts5 (= ${gcc:Version}), ${misc:Depends}
+Description: Intel Cilk Plus language extensions (x32 debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libmpx0
+Section: libs
+Architecture: any
+Provides: libmpx0-armel [armel], libmpx0-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Intel memory protection extensions (runtime)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libmpx0-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libmpx0 (= ${gcc:Version}), ${misc:Depends}
+Provides: libmpx0-dbg-armel [armel], libmpx0-dbg-armhf [armhf]
+Multi-Arch: same
+Description: Intel memory protection extensions (debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib32mpx0
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: Intel memory protection extensions (32bit)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib32mpx0-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32mpx0 (= ${gcc:Version}), ${misc:Depends}
+Description: Intel memory protection extensions (32 bit debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib64mpx0
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Intel memory protection extensions (64bit)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib64mpx0-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64mpx0 (= ${gcc:Version}), ${misc:Depends}
+Description: Intel memory protection extensions (64bit debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libquadmath0
+Section: libs
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GCC Quad-Precision Math Library
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libquadmath0-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libquadmath0 (= ${gcc:Version}), ${misc:Depends}
+Multi-Arch: same
+Description: GCC Quad-Precision Math Library (debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: lib32quadmath0
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: GCC Quad-Precision Math Library (32bit)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: lib32quadmath0-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32quadmath0 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC Quad-Precision Math Library (32 bit debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: lib64quadmath0
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC Quad-Precision Math Library  (64bit)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: lib64quadmath0-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64quadmath0 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC Quad-Precision Math Library  (64bit debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+#Package: libn32quadmath`'QMATH_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GCC Quad-Precision Math Library (n32)
+# A library, which provides quad-precision mathematical functions on targets
+# supporting the __float128 datatype. The library is used to provide on such
+# targets the REAL(16) type in the GNU Fortran compiler.
+
+#Package: libn32quadmath`'QMATH_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(quadmath`'QMATH_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GCC Quad-Precision Math Library (n32 debug symbols)
+# A library, which provides quad-precision mathematical functions on targets
+# supporting the __float128 datatype.
+
+Package: libx32quadmath0
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC Quad-Precision Math Library (x32)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libx32quadmath0-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32quadmath0 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC Quad-Precision Math Library (x32 debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: libhfquadmath0
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC Quad-Precision Math Library (hard float ABI)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libhfquadmath0-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfquadmath0 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC Quad-Precision Math Library (hard float ABI debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: libsfquadmath0
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: GCC Quad-Precision Math Library (soft float ABI)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libsfquadmath0-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfquadmath0 (= ${gcc:Version}), ${misc:Depends}
+Description: GCC Quad-Precision Math Library (hard float ABI debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: libcc1-0
+Section: libs
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GCC cc1 plugin for GDB
+ libcc1 is a plugin for GDB.
+
+Package: libgccjit0
+Section: libs
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Breaks: python-gccjit (<< 0.4-4), python3-gccjit (<< 0.4-4)
+Description: GCC just-in-time compilation (shared library)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: libgccjit-5-dbg
+Section: debug
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgccjit0 (= ${gcc:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+Description: GCC just-in-time compilation (debug information)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: libgccjit-5-doc
+Section: doc
+Architecture: all
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), ${misc:Depends}
+Description: GCC just-in-time compilation (documentation)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: libgccjit-5-dev
+Section: libdevel
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libgccjit0 (>= ${gcc:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+Suggests: libgccjit-5-dbg
+Description: GCC just-in-time compilation (development files)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: gobjc++-5
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gobjc-5 (= ${gcc:Version}), g++-5 (= ${gcc:Version}), ${shlibs:Depends}, libobjc-5-dev (= ${gcc:Version}), ${misc:Depends}
+Suggests: ${gobjcxx:multilib}, gcc-5-doc (>= ${gcc:SoftVersion})
+Provides: objc++-compiler
+Description: GNU Objective-C++ compiler
+ This is the GNU Objective-C++ compiler, which compiles
+ Objective-C++ on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+
+Package: gobjc++-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gobjc++-5 (= ${gcc:Version}), g++-5-multilib (= ${gcc:Version}), gobjc-5-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Objective-C++ compiler (multilib support)
+ This is the GNU Objective-C++ compiler, which compiles Objective-C++ on
+ platforms supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: gobjc-5
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc-5-dev (= ${gcc:Version}), ${misc:Depends}
+Suggests: ${gobjc:multilib}, gcc-5-doc (>= ${gcc:SoftVersion}), libobjc4-dbg (>= ${gcc:Version})
+Provides: objc-compiler
+Description: GNU Objective-C compiler
+ This is the GNU Objective-C compiler, which compiles
+ Objective-C on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+
+Package: gobjc-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gobjc-5 (= ${gcc:Version}), gcc-5-multilib (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Objective-C compiler (multilib support)
+ This is the GNU Objective-C compiler, which compiles Objective-C on platforms
+ supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: libobjc-5-dev
+Architecture: any
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libgcc-5-dev (= ${gcc:Version}), libobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Multi-Arch: same
+Description: Runtime library for GNU Objective-C applications (development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: lib64objc-5-dev
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib64gcc-5-dev (= ${gcc:Version}), lib64objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (64bit development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: lib32objc-5-dev
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib32gcc-5-dev (= ${gcc:Version}), lib32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (32bit development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libn32objc-5-dev
+Architecture: mips mipsel mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libn32gcc-5-dev (= ${gcc:Version}), libn32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (n32 development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libx32objc-5-dev
+Architecture: amd64 i386
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libx32gcc-5-dev (= ${gcc:Version}), libx32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (x32 development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libhfobjc-5-dev
+Architecture: armel
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libhfgcc-5-dev (= ${gcc:Version}), libhfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (hard float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libsfobjc-5-dev
+Architecture: armhf
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libsfgcc-5-dev (= ${gcc:Version}), libsfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (soft float development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libobjc4
+Section: libs
+Architecture: any
+Provides: libobjc4-armel [armel], libobjc4-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libobjc4-dbg
+Section: debug
+Architecture: any
+Provides: libobjc4-dbg-armel [armel], libobjc4-dbg-armhf [armhf]
+Multi-Arch: same
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libobjc4 (= ${gcc:Version}), libgcc1-dbg (>= ${libgcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib64objc4
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (64bit)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib64objc4-dbg
+Section: debug
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64objc4 (= ${gcc:Version}), lib64gcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (64 bit debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib32objc4
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: Runtime library for GNU Objective-C applications (32bit)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib32objc4-dbg
+Section: debug
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32objc4 (= ${gcc:Version}), lib32gcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (32 bit debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libn32objc4
+Section: libs
+Architecture: mips mipsel mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (n32)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libn32objc4-dbg
+Section: debug
+Architecture: mips mipsel mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32objc4 (= ${gcc:Version}), libn32gcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (n32 debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libx32objc4
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (x32)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libx32objc4-dbg
+Section: debug
+Architecture: amd64 i386
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32objc4 (= ${gcc:Version}), libx32gcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Description: Runtime library for GNU Objective-C applications (x32 debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libhfobjc4
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libobjc4-armhf [armel]
+Description: Runtime library for GNU Objective-C applications (hard float ABI)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libhfobjc4-dbg
+Section: debug
+Architecture: armel
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfobjc4 (= ${gcc:Version}), libhfgcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Conflicts: libobjc4-dbg-armhf [armel]
+Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libsfobjc4
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libobjc4-armel [armhf]
+Description: Runtime library for GNU Objective-C applications (soft float ABI)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libsfobjc4-dbg
+Section: debug
+Architecture: armhf
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfobjc4 (= ${gcc:Version}), libsfgcc1-dbg (>= ${gcc:EpochVersion}), ${misc:Depends}
+Conflicts: libobjc4-dbg-armel [armhf]
+Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: gfortran-5
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), libgfortran-5-dev (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: fortran95-compiler, ${fortran:mod-version}
+Suggests: ${gfortran:multilib}, gfortran-5-doc, libgfortran3-dbg (>= ${gcc:Version})
+Description: GNU Fortran compiler
+ This is the GNU Fortran compiler, which compiles
+ Fortran on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+
+Package: gfortran-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gfortran-5 (= ${gcc:Version}), gcc-5-multilib (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Fortran compiler (multilib support)
+ This is the GNU Fortran compiler, which compiles Fortran on platforms
+ supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: gfortran-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Description: Documentation for the GNU Fortran compiler (gfortran)
+ Documentation for the GNU Fortran compiler in info format.
+
+Package: libgfortran-5-dev
+Architecture: any
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libgcc-5-dev (= ${gcc:Version}), libgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Multi-Arch: same
+Description: Runtime library for GNU Fortran applications (development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: lib64gfortran-5-dev
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib64gcc-5-dev (= ${gcc:Version}), lib64gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (64bit development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: lib32gfortran-5-dev
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib32gcc-5-dev (= ${gcc:Version}), lib32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (32bit development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libn32gfortran-5-dev
+Architecture: mips mipsel mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libn32gcc-5-dev (= ${gcc:Version}), libn32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (n32 development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libx32gfortran-5-dev
+Architecture: amd64 i386
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libx32gcc-5-dev (= ${gcc:Version}), libx32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (x32 development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libhfgfortran-5-dev
+Architecture: armel
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libhfgcc-5-dev (= ${gcc:Version}), libhfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (hard float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libsfgfortran-5-dev
+Architecture: armhf
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libsfgcc-5-dev (= ${gcc:Version}), libsfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (soft float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libgfortran3
+Section: libs
+Architecture: any
+Provides: libgfortran3-armel [armel], libgfortran3-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libgfortran3-dbg
+Section: debug
+Architecture: any
+Provides: libgfortran3-dbg-armel [armel], libgfortran3-dbg-armhf [armhf]
+Multi-Arch: same
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgfortran3 (= ${gcc:Version}), libgcc1-dbg (>= ${libgcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib64gfortran3
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (64bit)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib64gfortran3-dbg
+Section: debug
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64gfortran3 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (64bit debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib32gfortran3
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: Runtime library for GNU Fortran applications (32bit)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib32gfortran3-dbg
+Section: debug
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32gfortran3 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (32 bit debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libn32gfortran3
+Section: libs
+Architecture: mips mipsel mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (n32)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libn32gfortran3-dbg
+Section: debug
+Architecture: mips mipsel mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32gfortran3 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (n32 debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libx32gfortran3
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (x32)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libx32gfortran3-dbg
+Section: debug
+Architecture: amd64 i386
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32gfortran3 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Fortran applications (x32 debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libhfgfortran3
+Section: libs
+Architecture: armel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libgfortran3-armhf [armel]
+Description: Runtime library for GNU Fortran applications (hard float ABI)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libhfgfortran3-dbg
+Section: debug
+Architecture: armel
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfgfortran3 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libgfortran3-dbg-armhf [armel]
+Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libsfgfortran3
+Section: libs
+Architecture: armhf
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libgfortran3-armel [armhf]
+Description: Runtime library for GNU Fortran applications (soft float ABI)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libsfgfortran3-dbg
+Section: debug
+Architecture: armhf
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfgfortran3 (= ${gcc:Version}), ${misc:Depends}
+Conflicts: libgfortran3-dbg-armel [armhf]
+Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: gccgo-5
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), libgo7 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: go-compiler
+Suggests: ${go:multilib}, gccgo-5-doc, libgo7-dbg (>= ${gcc:Version})
+Conflicts: ${golang:Conflicts}
+Description: GNU Go compiler
+ This is the GNU Go compiler, which compiles Go on platforms supported
+ by the gcc compiler. It uses the gcc backend to generate optimized code.
+
+Package: gccgo-5-multilib
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mips64 mips64el mipsel mipsn32 mipsn32el powerpc ppc64 s390 s390x sparc sparc64 x32
+Section: devel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gccgo-5 (= ${gcc:Version}), gcc-5-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${dep:libgobiarchdbg}
+Description: GNU Go compiler (multilib support)
+ This is the GNU Go compiler, which compiles Go on platforms supported
+ by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: gccgo-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Description: Documentation for the GNU Go compiler (gccgo)
+ Documentation for the GNU Go compiler in info format.
+
+Package: libgo7
+Section: libs
+Architecture: any
+Provides: libgo7-armel [armel], libgo7-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Replaces: libgo3
+Description: Runtime library for GNU Go applications
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libgo7-dbg
+Section: debug
+Architecture: any
+Provides: libgo7-dbg-armel [armel], libgo7-dbg-armhf [armhf]
+Multi-Arch: same
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgo7 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Go applications (debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+
+Package: lib64go7
+Section: libs
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: lib64go3
+Description: Runtime library for GNU Go applications (64bit)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: lib64go7-dbg
+Section: debug
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64go7 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Go applications (64bit debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+
+Package: lib32go7
+Section: libs
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Replaces: lib32go3
+Description: Runtime library for GNU Go applications (32bit)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: lib32go7-dbg
+Section: debug
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32go7 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Go applications (32 bit debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+
+Package: libn32go7
+Section: libs
+Architecture: mips mipsel mips64 mips64el
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libn32go3
+Description: Runtime library for GNU Go applications (n32)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libn32go7-dbg
+Section: debug
+Architecture: mips mipsel mips64 mips64el
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32go7 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Go applications (n32 debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+
+Package: libx32go7
+Section: libs
+Architecture: amd64 i386
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libx32go3
+Description: Runtime library for GNU Go applications (x32)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libx32go7-dbg
+Section: debug
+Architecture: amd64 i386
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32go7 (= ${gcc:Version}), ${misc:Depends}
+Description: Runtime library for GNU Go applications (x32 debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+
+Package: gcj-5
+Section: java
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:gcj}, ${dep:gcjcross}, ${dep:libcdev}, ${dep:ecj}, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Recommends: libecj-java-gcj
+Replaces: gcj-5-jdk (<< 5.2.1-19)
+Suggests: gcj-5-jdk
+Description: GCJ byte code and native compiler for Java(TM)
+ GCJ is a front end to the GCC compiler which can natively compile both
+ Java(tm) source and bytecode files. The compiler can also generate class
+ files.
+ .
+ Install the gcj-5-jdk package for a more complete SDK environment.
+
+Package: gcj-5-jdk
+Section: java
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:gcj}, ${dep:libcdev}, gcj-5 (= ${gcj:Version}), gcj-5-jre (= ${gcj:Version}), libgcj16-dev (>= ${gcj:Version}), fastjar, libgcj-bc, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Recommends: libecj-java-gcj
+Suggests: gcj-5-source (>= ${gcj:SoftVersion}), libgcj16-dbg (>= ${gcc:Version})
+Provides: java-compiler, java-sdk, java2-sdk, java5-sdk
+Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1)
+Replaces: libgcj11 (<< 4.5-20100101-1)
+Description: GCJ and Classpath development tools for Java(TM)
+ GCJ is a front end to the GCC compiler which can natively compile both
+ Java(tm) source and bytecode files. The compiler can also generate class
+ files. Other java development tools from classpath are included in this
+ package.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-SDK-like interface to the GCJ tool set.
+
+Package: gcj-5-jre-headless
+Priority: optional
+Section: java
+Architecture: any
+Depends: gcc-5-base (= ${gcc:Version}), gcj-5-jre-lib (>= ${gcj:SoftVersion}), libgcj16 (>= ${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: fastjar, gcj-5-jdk (= ${gcj:Version}), libgcj16-awt (>= ${gcj:Version})
+Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless
+Description: Java runtime environment using GIJ/Classpath (headless version)
+ GIJ is a Java bytecode interpreter, not limited to interpreting bytecode.
+ It includes a class loader which can dynamically load shared objects, so
+ it is possible to give it the name of a class which has been compiled and
+ put into a shared library on the class path.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set,
+ limited to the headless tools and libraries.
+
+Package: gcj-5-jre
+Section: java
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcj-5-jre-headless (= ${gcj:Version}), libgcj16-awt (>= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime
+Description: Java runtime environment using GIJ/Classpath
+ GIJ is a Java bytecode interpreter, not limited to interpreting bytecode.
+ It includes a class loader which can dynamically load shared objects, so
+ it is possible to give it the name of a class which has been compiled and
+ put into a shared library on the class path.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set.
+
+Package: libgcj16
+Section: libs
+Architecture: any
+Priority: optional
+Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends}
+Recommends: gcj-5-jre-lib (>= ${gcj:SoftVersion})
+Suggests: libgcj16-dbg (>= ${gcc:Version}), libgcj16-awt (= ${gcj:Version})
+Description: Java runtime library for use with gcj
+ This is the runtime that goes along with the gcj front end to
+ gcc. libgcj includes parts of the Java Class Libraries, plus glue to
+ connect the libraries to the compiler and the underlying OS.
+ .
+ To show file names and line numbers in stack traces, the packages
+ libgcj16-dbg and binutils are required.
+
+Package: gcj-5-jre-lib
+Section: java
+Architecture: all
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), libgcj16 (>= ${gcj:SoftVersion}), ${misc:Depends}
+Description: Java runtime library for use with gcj (jar files)
+ This is the jar file that goes along with the gcj front end to gcc.
+
+Package: libgcj16-awt
+Section: libs
+Architecture: any
+Priority: optional
+Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), libgcj16 (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${pkg:gcjqt}
+Description: AWT peer runtime libraries for use with gcj
+ These are runtime libraries holding the AWT peer implementations
+ for libgcj (currently the GTK+ based peer library is required, the
+ QT bases library is not built).
+
+Package: libgcj16-dev
+Section: libdevel
+Architecture: any
+Multi-Arch: same
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libgcj16-awt (= ${gcj:Version}), libgcj-bc, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends}
+Suggests: libgcj-doc
+Description: Java development headers for use with gcj
+ These are the development headers that go along with the gcj front end
+ to gcc. libgcj includes parts of the Java Class Libraries, plus glue
+ to connect the libraries to the compiler and the underlying OS.
+
+Package: libgcj16-dbg
+Section: debug
+Architecture: any
+Priority: extra
+Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+Depends: gcc-5-base (= ${gcc:Version}), libgcj16 (= ${gcj:Version}), ${misc:Depends}
+Recommends: binutils, libc6-dbg | libc-dbg
+Description: Debugging symbols for libraries provided in libgcj16-dev
+ The package provides debugging symbols for the libraries provided
+ in libgcj16-dev.
+ .
+ binutils is required to show file names and line numbers in stack traces.
+
+Package: gcj-5-source
+Section: java
+Architecture: all
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), gcj-5-jdk (>= ${gcj:SoftVersion}), ${misc:Depends}
+Description: GCJ java sources for use in IDEs like eclipse and netbeans
+ These are the java source files packaged as a zip file for use in development
+ environments like eclipse and netbeans.
+
+Package: libgcj-doc
+Section: doc
+Architecture: all
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), ${misc:Depends}
+Enhances: libgcj16-dev
+Provides: classpath-doc
+Description: libgcj API documentation and example programs
+ Autogenerated documentation describing the API of the libgcj library.
+ Sources and precompiled example programs from the Classpath library.
+
+Package: libstdc++6
+Architecture: any
+Section: libs
+Priority: important
+Depends: gcc-5-base (= ${gcc:Version}), ${dep:libc}, ${shlibs:Depends}, ${misc:Depends}
+Provides: libstdc++6-armel [armel], libstdc++6-armhf [armhf]
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}, libantlr-dev (<= 2.7.7+dfsg-6), libaqsis1 (<= 1.8.2-1), libassimp3 (<= 3.0~dfsg-4), blockattack (<= 1.4.1+ds1-2.1build2), boo (<= 0.9.5~git20110729.r1.202a430-2), libboost-date-time1.55.0, libcpprest2.2 (<= 2.2.0-1), printer-driver-brlaser (<= 3-3), c++-annotations (<= 10.2.0-1), chromium-browser (<= 43.0.2357.130-0ubuntu2), clustalx (<= 2.1+lgpl-2), libdavix0 (<= 0.4.0-1build1), libdballe6 (<= 6.8-1), dff (<= 1.3.0+dfsg.1-4.1build2), libdiet-sed2.8 (<= 2.8.0-1build3), libdiet-client2.8 (<= 2.8.0-1build3), libdiet-admin2.8 (<= 2.8.0-1build3), libkgeomap2 (<= 4:15.04.2-0ubuntu1), libmediawiki1 (<= 1.0~digikam4.10.0-0ubuntu2), libkvkontakte1 (<= 1.0~digikam4.10.0-0ubuntu2), emscripten (<= 1.22.1-1), ergo (<= 3.4.0-1), fceux (<= 2.2.2+dfsg0-1), flush (<= 0.9.12-3.1ubuntu1), libfreefem++ (<= 3.37.1-1), freeorion (<= 0.4.4+git20150327-2), fslview (<= 4.0.1-4), fwbuilder (<= 5.1.0-4), libgazebo5 (<= 5.0.1+dfsg-2.1), libgetfem4++ (<= 4.2.1~beta1~svn4482~dfsg-3ubuntu3), libgmsh2 (<= 2.8.5+dfsg-1.1ubuntu1), gnote (<= 3.16.2-1), gnudatalanguage (<= 0.9.5-2build1), python-healpy (<= 1.8.1-1), innoextract (<= 1.4-1build1), libinsighttoolkit4.6 (<= 4.6.0-3ubuntu3), libdap17 (<= 3.14.0-2), libdapclient6 (<= 3.14.0-2), libdapserver7 (<= 3.14.0-2), libkolabxml1 (<= 1.1.0-3), libpqxx-4.0 (<= 4.0.1+dfsg-3ubuntu1), libreoffice-core (<= 1:4.4.4~rc3-0ubuntu1), librime1 (<= 1.2+dfsg-2), libwibble-dev (<= 1.1-1), lightspark (<= 0.7.2+git20150512-2), libmarisa0 (<= 0.2.4-8build1), mira-assembler (<= 4.9.5-1), mongodb (<= 1:2.6.3-0ubuntu7), mongodb-server (<= 1:2.6.3-0ubuntu7), ncbi-blast+ (<= 2.2.30-4), libogre-1.8.0 (<= 1.8.1+dfsg-0ubuntu5), libogre-1.9.0 (<= 1.9.0+dfsg1-4), openscad (<= 2014.03+dfsg-1build1), libopenwalnut1 (<= 1.4.0~rc1+hg3a3147463ee2-1ubuntu2), passepartout (<= 0.7.1-1.1), pdf2djvu (<= 0.7.19-1ubuntu2), photoprint (<= 0.4.2~pre2-2.3), plastimatch (<= 1.6.2+dfsg-1), plee-the-bear (<= 0.6.0-3.1), povray (<= 1:3.7.0.0-8), powertop (<= 2.6.1-1), psi4 (<= 4.0~beta5+dfsg-2build1), python3-taglib (<= 0.3.6+dfsg-2build2), realtimebattle (<= 1.0.8-14), ruby-passenger (<= 4.0.53-1), libapache2-mod-passenger (<= 4.0.53-1), sqlitebrowser (<= 3.5.1-3), tecnoballz (<= 0.93.1-6), wesnoth-1.12-core (<= 1:1.12.4-1), widelands (<= 1:18-3build1), libwreport2 (<= 2.14-1), xflr5 (<= 6.09.06-2), libxmltooling6 (<= 1.5.3-2.1), 
+Conflicts: scim (<< 1.4.2-1)
+Replaces: libstdc++6-5-dbg (<< 4.9.0-3)
+Description: GNU Standard C++ Library v3
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: lib32stdc++6
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib32gcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Description: GNU Standard C++ Library v3 (32 bit Version)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+
+Package: lib64stdc++6
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib64gcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Standard C++ Library v3 (64bit)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libn32stdc++6
+Architecture: mips mipsel mips64 mips64el
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libn32gcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Standard C++ Library v3 (n32)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libx32stdc++6
+Architecture: amd64 i386
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libx32gcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Standard C++ Library v3 (x32)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libhfstdc++6
+Architecture: armel
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libhfgcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libstdc++6-armhf [armel]
+Description: GNU Standard C++ Library v3 (hard float ABI)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libsfstdc++6
+Architecture: armhf
+Section: libs
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libsfgcc1 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libstdc++6-armel [armhf]
+Description: GNU Standard C++ Library v3 (soft float ABI)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libstdc++-5-dev
+Architecture: any
+Multi-Arch: same
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libgcc-5-dev (= ${gcc:Version}),
+ libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends}
+Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev,
+ libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev,
+ libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev
+Suggests: libstdc++-5-doc
+Provides: libstdc++-dev
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libstdc++-5-pic
+Architecture: any
+Multi-Arch: same
+Section: libdevel
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (shared library subset kit)
+ This is used to develop subsets of the libstdc++ shared libraries for
+ use on custom installation floppies and in embedded systems.
+ .
+ Unless you are making one of those, you will not need this package.
+
+Package: libstdc++6-5-dbg
+Architecture: any
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}),
+ libgcc1-dbg (>= ${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Provides: libstdc++6-5-dbg-armel [armel], libstdc++6-5-dbg-armhf [armhf]
+Multi-Arch: same
+Recommends: libstdc++-5-dev (= ${gcc:Version})
+Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg,
+ libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg,
+ libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg,
+ libstdc++6-4.6-dbg, libstdc++6-4.7-dbg, libstdc++6-4.8-dbg,
+ libstdc++6-4.9-dbg
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: lib32stdc++-5-dev
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib32gcc-5-dev (= ${gcc:Version}),
+ lib32stdc++6 (>= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: lib32stdc++6-5-dbg
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), lib32gcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg,
+ lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg,
+ lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg,
+ lib32stdc++6-4.7-dbg, lib32stdc++6-4.8-dbg, lib32stdc++6-4.9-dbg
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: lib64stdc++-5-dev
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib64gcc-5-dev (= ${gcc:Version}),
+ lib64stdc++6 (>= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: lib64stdc++6-5-dbg
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), lib64gcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg,
+ lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg,
+ lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg,
+ lib64stdc++6-4.7-dbg, lib64stdc++6-4.8-dbg, lib64stdc++6-4.9-dbg
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: libn32stdc++-5-dev
+Architecture: mips mipsel mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libn32gcc-5-dev (= ${gcc:Version}),
+ libn32stdc++6 (>= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libn32stdc++6-5-dbg
+Architecture: mips mipsel mips64 mips64el
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), libn32gcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg,
+ libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg,
+ libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg,
+ libn32stdc++6-4.7-dbg, libn32stdc++6-4.8-dbg, libn32stdc++6-4.9-dbg
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: libx32stdc++-5-dev
+Architecture: amd64 i386
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libx32gcc-5-dev (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libx32stdc++6-5-dbg
+Architecture: amd64 i386
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), libx32gcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libx32stdc++6-dbg, libx32stdc++6-4.6-dbg,
+ libx32stdc++6-4.7-dbg, libx32stdc++6-4.8-dbg, libx32stdc++6-4.9-dbg
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: libhfstdc++-5-dev
+Architecture: armel
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libhfgcc-5-dev (= ${gcc:Version}),
+ libhfstdc++6 (>= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libhfstdc++6-5-dbg
+Architecture: armel
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libhfstdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), libhfgcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libhfstdc++6-dbg, libhfstdc++6-4.3-dbg, libhfstdc++6-4.4-dbg, libhfstdc++6-4.5-dbg, libhfstdc++6-4.6-dbg, libhfstdc++6-4.7-dbg, libhfstdc++6-4.8-dbg, libhfstdc++6-4.9-dbg, libstdc++6-armhf [armel]
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: libsfstdc++-5-dev
+Architecture: armhf
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libsfgcc-5-dev (= ${gcc:Version}),
+ libsfstdc++6 (>= ${gcc:Version}), libstdc++-5-dev (= ${gcc:Version}), ${misc:Depends}
+Description: GNU Standard C++ Library v3 (development files)
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+
+Package: libsfstdc++6-5-dbg
+Architecture: armhf
+Section: debug
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}),
+ libstdc++-5-dev (= ${gcc:Version}), libsfgcc1-dbg (>= ${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+Conflicts: libsfstdc++6-dbg, libsfstdc++6-4.3-dbg, libsfstdc++6-4.4-dbg, libsfstdc++6-4.5-dbg, libsfstdc++6-4.6-dbg, libsfstdc++6-4.7-dbg, libsfstdc++6-4.8-dbg, libsfstdc++6-4.9-dbg, libstdc++6-armel [armhf]
+Description: GNU Standard C++ Library v3 (debugging files)
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+
+Package: libstdc++-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), ${misc:Depends}
+Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc,
+ libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc,
+ libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc,
+ libstdc++-4.8-doc, libstdc++-4.9-doc
+Description: GNU Standard C++ Library v3 (documentation files)
+ This package contains documentation files for the GNU stdc++ library.
+ .
+ One set is the distribution documentation, the other set is the
+ source documentation including a namespace list, class hierarchy,
+ alphabetical list, compound list, file list, namespace members,
+ compound members and file members.
+
+Package: gnat-5
+Architecture: any
+Priority: optional
+Pre-Depends: ${misc:Pre-Depends}
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: gnat-5-doc, ada-reference-manual-2012, gnat-5-sjlj
+Breaks:   gnat (<< 4.6.1), dh-ada-library (<< 6.0), gnat-4.6-base (= 4.6.4-2),
+ gnat-4.9-base (= 4.9-20140330-1)
+Replaces: gnat (<< 4.6.1), dh-ada-library (<< 6.0), gnat-4.6-base (= 4.6.4-2),
+ gnat-4.9-base (= 4.9-20140330-1)
+# Takes over symlink from gnat (<< 4.6.1): /usr/bin/gnatgcc.
+# Takes over file from dh-ada-library (<< 6.0): debian_packaging.mk.
+# g-base 4.6.4-2, 4.9-20140330-1 contain debian_packaging.mk by mistake.
+# Newer versions of gnat and dh-ada-library will not provide these files.
+Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5,
+ gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6, gnat-4.7, gnat-4.8,
+ gnat-4.9
+# These other packages will continue to provide /usr/bin/gnatmake and
+# other files.
+Description: GNU Ada compiler
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ This package provides the compiler, tools and runtime library that handles
+ exceptions using the default zero-cost mechanism.
+
+Package: gnat-5-sjlj
+Architecture: any
+Priority: extra
+Pre-Depends: ${misc:Pre-Depends}
+Depends: gcc-5-base (= ${gcc:Version}), gnat-5 (= ${gnat:Version}), ${misc:Depends}
+Description: GNU Ada compiler (setjump/longjump runtime library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ This package provides an alternative runtime library that handles
+ exceptions using the setjump/longjump mechanism (as a static library
+ only).  You can install it to supplement the normal compiler.
+
+Package: libgnat-5
+Section: libs
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: runtime for applications compiled with GNAT (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnat-5-dbg
+Section: debug
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), libgnat-5 (= ${gnat:Version}), ${misc:Depends}
+Description: runtime for applications compiled with GNAT (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the debugging symbols.
+
+Package: libgnatvsn5-dev
+Section: libdevel
+Architecture: any
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), gnat-5 (= ${gnat:Version}),
+ libgnatvsn5 (= ${gnat:Version}), ${misc:Depends}
+Conflicts: libgnatvsn-dev (<< 5),
+ libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev,
+ libgnatvsn4.5-dev, libgnatvsn4.6-dev, libgnatvsn4.9-dev,
+Description: GNU Ada compiler selected components (development files)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the development files and static library.
+
+Package: libgnatvsn5
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Section: libs
+Depends: gcc-5-base (= ${gcc:Version}), libgnat-5 (= ${gnat:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Ada compiler selected components (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnatvsn5-dbg
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: extra
+Section: debug
+Depends: gcc-5-base (= ${gcc:Version}), libgnatvsn5 (= ${gnat:Version}), ${misc:Depends}
+Suggests: gnat
+Description: GNU Ada compiler selected components (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the debugging symbols.
+
+Package: libgnatprj5-dev
+Section: libdevel
+Architecture: any
+Priority: extra
+Depends: gcc-5-base (= ${gcc:Version}), gnat-5 (= ${gnat:Version}),
+ libgnatprj5 (= ${gnat:Version}),
+ libgnatvsn5-dev (= ${gnat:Version}), ${misc:Depends}
+Conflicts: libgnatprj-dev (<< 5),
+ libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev,
+ libgnatprj4.5-dev, libgnatprj4.6-dev, libgnatprj4.9-dev,
+Description: GNU Ada compiler Project Manager (development files)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the development files and static library.
+
+Package: libgnatprj5
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: optional
+Section: libs
+Depends: gcc-5-base (= ${gcc:Version}), libgnat-5 (= ${gnat:Version}),
+ libgnatvsn5 (= ${gnat:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+Description: GNU Ada compiler Project Manager (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnatprj5-dbg
+Architecture: any
+Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Priority: extra
+Section: debug
+Depends: gcc-5-base (= ${gcc:Version}), libgnatprj5 (= ${gnat:Version}), ${misc:Depends}
+Suggests: gnat
+Description: GNU Ada compiler Project Manager (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the debugging symbols.
+
+Package: gnat-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Suggests: gnat-5
+Conflicts: gnat-4.1-doc, gnat-4.2-doc,
+  gnat-4.3-doc, gnat-4.4-doc, 
+  gnat-4.6-doc, gnat-4.9-doc
+Description: GNU Ada compiler (documentation)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the documentation in info format.
+
+Package: gdc-5
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), g++-5 (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: gdc, d-compiler, d-v2-compiler
+Replaces: gdc (<< 4.4.6-5),
+  libphobos-5-dev (<< 5.4.0-1~)
+Description: GNU D compiler (version 2)
+ This is the GNU D compiler, which compiles D on platforms supported by gcc.
+ It uses the gcc backend to generate optimised code.
+ .
+ This compiler supports D language version 2.
+
+Package: gdc-5-multilib
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), gdc-5 (= ${gcc:Version}), gcc-5-multilib (= ${gcc:Version}), ${dep:libphobosbiarchdev}${shlibs:Depends}, ${misc:Depends}
+Replaces: lib32phobos-5-dev (<< 5.4.0-1~),
+  lib64phobos-5-dev (<< 5.4.0-1~), 
+  libx32phobos-5-dev (<< 5.4.0-1~), 
+  libhfphobos-5-dev (<< 5.4.0-1~), 
+  libsfphobos-5-dev (<< 5.4.0-1~), 
+  libn32phobos-5-dev (<< 5.4.0-1~), 
+Description: GNU D compiler (version 2, multilib support)
+ This is the GNU D compiler, which compiles D on platforms supported by gcc.
+ It uses the gcc backend to generate optimised code.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+
+Package: libphobos-5-dev
+Architecture: amd64 armel armhf i386 x32 kfreebsd-amd64 kfreebsd-i386
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), zlib1g-dev, ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+#Package: libphobos`'PHOBOS_V`'PV`'TS-dbg
+#Section: debug
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs')
+#Priority: extra
+#Depends: BASELDEP, libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends}
+#Provides: libphobos`'PHOBOS_V`'TS-dbg
+#BUILT_USING`'dnl
+#Description: The Phobos D standard library (debug symbols)
+# This is the Phobos standard library that comes with the D2 compiler.
+# .
+# For more information check http://www.dlang.org/phobos/
+
+Package: lib64phobos-5-dev
+Architecture: i386 powerpc sparc s390 mips mipsel mipsn32 mipsn32el x32
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib64gcc-5-dev (= ${gcc:Version}), lib64z1-dev, ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library (64bit development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: lib32phobos-5-dev
+Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 mipsn32 mipsn32el mips64 mips64el
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), lib32gcc-5-dev (= ${gcc:Version}), lib32z1-dev, ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library (64bit development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: libx32phobos-5-dev
+Architecture: amd64 i386
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libx32gcc-5-dev (= ${gcc:Version}), ${dep:libx32z}, ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library (x32 development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: libhfphobos-5-dev
+Architecture: armel
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libhfgcc-5-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library (hard float ABI development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: libsfphobos-5-dev
+Architecture: armhf
+Section: libdevel
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), libsfgcc-5-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Phobos D standard library (soft float ABI development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+#Package: gcc`'PV-soft-float
+#Architecture: arm armel armhf
+#Priority: PRI(optional)
+#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends}
+#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float
+#BUILT_USING`'dnl
+#Description: GCC soft-floating-point gcc libraries (ARM)
+# These are versions of basic static libraries such as libgcc.a compiled
+# with the -msoft-float option, for CPUs without a floating-point unit.
+
+Package: fixincludes
+Architecture: any
+Priority: optional
+Depends: gcc-5-base (= ${gcc:Version}), gcc-5 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Description: Fix non-ANSI header files
+ FixIncludes was created to fix non-ANSI system header files. Many
+ system manufacturers supply proprietary headers that are not ANSI compliant.
+ The GNU compilers cannot compile non-ANSI headers. Consequently, the
+ FixIncludes shell script was written to fix the header files.
+ .
+ Not all packages with header files are installed on the system, when the
+ package is built, so we make fixincludes available at build time of other
+ packages, such that checking tools like lintian can make use of it.
+
+Package: gcc-5-doc
+Architecture: all
+Section: doc
+Priority: optional
+Depends: gcc-5-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Conflicts: gcc-docs (<< 2.95.2)
+Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2)
+Description: Documentation for the GNU compilers (gcc, gobjc, g++)
+ Documentation for the GNU compilers in info format.
+
+Package: gcc-5-source
+Architecture: all
+Priority: optional
+Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
+Description: Source of the GNU Compiler Collection
+ This package contains the sources and patches which are needed to
+ build the GNU Compiler Collection (GCC).
--- gcc-5-5.4.0.orig/debian/control.m4
+++ gcc-5-5.4.0/debian/control.m4
@@ -0,0 +1,5303 @@
+divert(-1)
+
+define(`checkdef',`ifdef($1, , `errprint(`error: undefined macro $1
+')m4exit(1)')')
+define(`errexit',`errprint(`error: undefined macro `$1'
+')m4exit(1)')
+
+dnl The following macros must be defined, when called:
+dnl ifdef(`SRCNAME',	, errexit(`SRCNAME'))
+dnl ifdef(`PV',		, errexit(`PV'))
+dnl ifdef(`ARCH',		, errexit(`ARCH'))
+
+dnl The architecture will also be defined (-D__i386__, -D__powerpc__, etc.)
+
+define(`PN', `$1')
+ifdef(`PRI', `', `
+    define(`PRI', `$1')
+')
+define(`MAINTAINER', `Debian GCC Maintainers <debian-gcc@lists.debian.org>')
+
+define(`depifenabled', `ifelse(index(enabled_languages, `$1'), -1, `', `$2')')
+define(`ifenabled', `ifelse(index(enabled_languages, `$1'), -1, `dnl', `$2')')
+
+ifdef(`TARGET',`ifdef(`CROSS_ARCH',`',`undefine(`MULTIARCH')')')
+define(`CROSS_ARCH', ifdef(`CROSS_ARCH', CROSS_ARCH, `all'))
+define(`libdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))')
+define(`libdevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))')
+define(`libidevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))')
+ifdef(`TARGET',`ifelse(CROSS_ARCH,`all',`
+define(`libidevdep', `lib$2$1`'LS`'AQ (>= ifelse(`$4',`',`${gcc:SoftVersion}',`$4'))')
+')')
+define(`libdbgdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))')
+
+define(`BUILT_USING', ifelse(add_built_using,yes,`Built-Using: ${Built-Using}
+'))
+
+divert`'dnl
+dnl --------------------------------------------------------------------------
+Source: SRCNAME
+Section: devel
+Priority: PRI(optional)
+ifelse(DIST,`Ubuntu',`dnl
+ifelse(regexp(SRCNAME, `gnat\|gdc-'),0,`dnl
+Maintainer: Ubuntu MOTU Developers <ubuntu-motu@lists.ubuntu.com>
+', `dnl
+Maintainer: Ubuntu Core developers <ubuntu-devel-discuss@lists.ubuntu.com>
+')dnl SRCNAME
+XSBC-Original-Maintainer: MAINTAINER
+', `dnl
+Maintainer: MAINTAINER
+')dnl DIST
+ifelse(regexp(SRCNAME, `gnat'),0,`dnl
+Uploaders: Ludovic Brenta <lbrenta@debian.org>
+', regexp(SRCNAME, `gdc'),0,`dnl
+Uploaders: Iain Buclaw <ibuclaw@ubuntu.com>, Matthias Klose <doko@debian.org>
+', `dnl
+Uploaders: Matthias Klose <doko@debian.org>
+')dnl SRCNAME
+Standards-Version: 3.9.8
+ifdef(`TARGET',`dnl cross
+Build-Depends: DEBHELPER_BUILD_DEP DPKG_BUILD_DEP
+  LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP
+  kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k],
+  LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTO_BUILD_DEP
+  SOURCE_BUILD_DEP CROSS_BUILD_DEP
+  ISL_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP,
+  autogen, zlib1g-dev, gawk, lzma, xz-utils, patchutils,
+  zlib1g-dev, SDT_BUILD_DEP
+  bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, quilt
+',`dnl native
+Build-Depends: DEBHELPER_BUILD_DEP DPKG_BUILD_DEP
+  GCC_MULTILIB_BUILD_DEP
+  LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP LIBC_DBG_DEP
+  kfreebsd-kernel-headers (>= 0.84) [kfreebsd-any], linux-libc-dev [m68k],
+  AUTO_BUILD_DEP BASE_BUILD_DEP
+  libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64],
+  autogen, gawk, lzma, xz-utils, patchutils,
+  zlib1g-dev, SDT_BUILD_DEP
+  BINUTILS_BUILD_DEP,
+  gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext,
+  gdb`'NT,
+  texinfo (>= 4.3), locales, sharutils,
+  procps, FORTRAN_BUILD_DEP JAVA_BUILD_DEP GNAT_BUILD_DEP GO_BUILD_DEP GDC_BUILD_DEP
+  ISL_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP
+  CHECK_BUILD_DEP realpath (>= 1.9.12), chrpath, lsb-release, quilt,
+  TARGET_TOOL_BUILD_DEP
+Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP JAVA_BUILD_INDEP
+')dnl
+ifelse(regexp(SRCNAME, `gnat'),0,`dnl
+Homepage: http://gcc.gnu.org/
+', regexp(SRCNAME, `gdc'),0,`dnl
+Homepage: http://gdcproject.org/
+', `dnl
+Homepage: http://gcc.gnu.org/
+')dnl SRCNAME
+Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc`'PV/
+Vcs-Svn: svn://anonscm.debian.org/gcccvs/branches/sid/gcc`'PV
+
+ifelse(regexp(SRCNAME, `gcc-snapshot'),0,`dnl
+Package: gcc-snapshot`'TS
+Architecture: any
+Section: devel
+Priority: extra
+Depends: binutils`'TS (>= ${binutils:Version}), ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, ${snap:depends}, ${shlibs:Depends}, ${dep:ecj}, python, ${misc:Depends}
+Recommends: ${snap:recommends}
+Suggests: ${dep:gold}
+Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev')
+BUILT_USING`'dnl
+Description: A SNAPSHOT of the GNU Compiler Collection
+ This package contains a recent development SNAPSHOT of all files
+ contained in the GNU Compiler Collection (GCC).
+ .
+ The source code for this package has been exported from SVN trunk.
+ .
+ DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES!
+ .
+ This package will NEVER hit the testing distribution. It is used for
+ tracking gcc bugs submitted to the Debian BTS in recent development
+ versions of gcc.
+',`dnl gcc-X.Y
+
+dnl default base package dependencies
+define(`BASEDEP', `gcc`'PV`'TS-base (= ${gcc:Version})')
+define(`SOFTBASEDEP', `gcc`'PV`'TS-base (>= ${gcc:SoftVersion})')
+
+ifdef(`TARGET',`
+define(`BASELDEP', `gcc`'PV-cross-base`'GCC_PORTS_BUILD (= ${gcc:Version})')
+define(`SOFTBASELDEP', `gcc`'PV-cross-base`'GCC_PORTS_BUILD (>= ${gcc:SoftVersion})')
+',`dnl
+define(`BASELDEP', `BASEDEP')
+define(`SOFTBASELDEP', `SOFTBASEDEP')
+')
+
+dnl base, when building libgcc out of the gcj source; needed if new symbols
+dnl in libgcc are used in libgcj.
+ifelse(index(SRCNAME, `gcj'), 0, `
+define(`BASEDEP', `gcj`'PV-base (= ${gcj:Version})')
+define(`SOFTBASEDEP', `gcj`'PV-base (>= ${gcj:SoftVersion})')
+')
+
+ifelse(index(SRCNAME, `gnat'), 0, `
+define(`BASEDEP', `gnat`'PV-base (= ${gnat:Version})')
+define(`SOFTBASEDEP', `gnat`'PV-base (>= ${gnat:SoftVersion})')
+')
+
+ifenabled(`gccbase',`
+Package: gcc`'PV`'TS-base
+Architecture: any
+Multi-Arch: same
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',`PRI(required)')
+Depends: ${misc:Depends}
+Replaces: ${base:Replaces}
+Breaks: ${base:Breaks}
+BUILT_USING`'dnl
+Description: GCC, the GNU Compiler Collection (base package)
+ This package contains files common to all languages and libraries
+ contained in the GNU Compiler Collection (GCC).
+ifdef(`BASE_ONLY', `dnl
+ .
+ This version of GCC is not yet available for this architecture.
+ Please use the compilers from the gcc-snapshot package for testing.
+')`'dnl
+')`'dnl gccbase
+
+ifenabled(`gcclbase',`
+Package: gcc`'PV-cross-base`'GCC_PORTS_BUILD
+Architecture: all
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',`PRI(required)')
+Depends: ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC, the GNU Compiler Collection (library base package)
+ This empty package contains changelog and copyright files common to
+ all libraries contained in the GNU Compiler Collection (GCC).
+ifdef(`BASE_ONLY', `dnl
+ .
+ This version of GCC is not yet available for this architecture.
+ Please use the compilers from the gcc-snapshot package for testing.
+')`'dnl
+')`'dnl gcclbase
+
+ifenabled(`java',`
+ifdef(`TARGET', `', `
+ifenabled(`gcjbase',`
+Package: gcj`'PV-base
+Architecture: any
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Section: libs
+Priority: PRI(optional)
+Depends: ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC, the GNU Compiler Collection (gcj base package)
+ This package contains files common to all java related packages
+ built from the GNU Compiler Collection (GCC).
+')`'dnl gccbase
+')`'dnl native
+
+ifenabled(`gcjxbase',`
+dnl override default base package dependencies to cross version
+dnl This creates a toolchain that doesnt depend on the system -base packages
+define(`BASEDEP', `gcj`'`PV`'TS'-base (= ${gcc:Version})')
+define(`SOFTBASEDEP', `gcj`'`PV`'TS'-base (>= ${gcc:SoftVersion})')
+
+Package: gcj`'`PV`'TS'-base
+Architecture: any
+Section: devel
+Priority: PRI(extra)
+Depends: ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC, the GNU Compiler Collection (gcj base package)
+ This package contains files common to all java related packages
+ built from the GNU Compiler Collection (GCC).
+')`'dnl
+')`'dnl java
+
+ifenabled(`gnatbase',`
+Package: gnat`'PV-base`'TS
+Architecture: any
+# "all" causes build instabilities for "any" dependencies (see #748388).
+Section: libs
+Priority: PRI(optional)
+Depends: ${misc:Depends}
+Breaks: gcc-4.6 (<< 4.6.1-8~)
+BUILT_USING`'dnl
+Description: GNU Ada compiler (common files)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ This package contains files common to all GNAT related packages.
+')`'dnl gnatbase
+
+ifenabled(`libgcc',`
+Package: libgcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',required)
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+Provides: ifdef(`TARGET',`libgcc1-TARGET-dcv1',`libgcc1-armel [armel], libgcc1-armhf [armhf]')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `')
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libgcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,,=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf]
+')dnl
+ifdef(`MULTIARCH',`Multi-Arch: same
+')dnl
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libgcc2`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',required)
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libgcc2-TARGET-dcv1
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `')
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libgcc2-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc2,,=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libgcc
+
+ifenabled(`cdev',`
+Package: libgcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm},
+ ${dep:libatomic}, ${dep:libbtrace}, ${dep:libasan}, ${dep:liblsan},
+ ${dep:libtsan}, ${dep:libubsan}, ${dep:libcilkrts}, ${dep:libvtv},
+ ${dep:libmpx},
+ ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Replaces: gccgo-5 (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl libgcc
+
+Package: libgcc4`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',required)
+Depends: ifdef(`STANDALONEJAVA',`gcj`'PV-base (>= ${gcj:Version})',`BASELDEP'), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `')
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libgcc4-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa')
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc4,,=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+ifenabled(`lib64gcc',`
+Package: lib64gcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+ifdef(`TARGET',`Provides: lib64gcc1-TARGET-dcv1
+',`')`'dnl
+Conflicts: libdep(gcc`'GCC_SO,,<=,1:3.3-0pre9)
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (64bit)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib64gcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,64,=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl lib64gcc
+
+ifenabled(`cdev',`
+Package: lib64gcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (64bit development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl cdev
+
+ifenabled(`lib32gcc',`
+Package: lib32gcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+ifdef(`TARGET',`Provides: lib32gcc1-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library (32 bit Version)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib32gcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,32,=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl lib32gcc1
+
+ifenabled(`cdev',`
+Package: lib32gcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (32 bit development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl cdev
+
+ifenabled(`libneongcc',`
+Package: libgcc1-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library [neon optimized]
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneongcc1
+
+ifenabled(`libhfgcc',`
+Package: libhfgcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libhfgcc1-TARGET-dcv1
+',`Conflicts: libgcc1-armhf [biarchhf_archs]
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libhfgcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,hf,=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libhfgcc
+
+ifenabled(`cdev',`
+ifenabled(`armml',`
+Package: libhfgcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (hard float ABI development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl armml
+')`'dnl cdev
+
+ifenabled(`libsfgcc',`
+Package: libsfgcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libsfgcc1-TARGET-dcv1
+',`Conflicts: libgcc1-armel [biarchsf_archs]
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libsfgcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,sf,=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libsfgcc
+
+ifenabled(`cdev',`
+ifenabled(`armml',`
+Package: libsfgcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (soft float ABI development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl armml
+')`'dnl cdev
+
+ifenabled(`libn32gcc',`
+Package: libn32gcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+Conflicts: libdep(gcc`'GCC_SO,,<=,1:3.3-0pre9)
+ifdef(`TARGET',`Provides: libn32gcc1-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (n32)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libn32gcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,n32,=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libn32gcc
+
+ifenabled(`cdev',`
+Package: libn32gcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (n32 development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl cdev
+
+ifenabled(`libx32gcc',`
+Package: libx32gcc1`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libx32gcc1-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (x32)
+ Shared version of the support library, a library of internal subroutines
+ that GCC uses to overcome shortcomings of particular machines, or
+ special needs for some languages.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libx32gcc1-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gcc1,x32,=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `')
+ Debug symbols for the GCC support library.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libx32gcc
+
+ifenabled(`cdev',`
+ifenabled(`x32dev',`
+Package: libx32gcc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Recommends: ${dep:libcdev}
+Depends: BASELDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch},
+ ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libatomicbiarch},
+ ${dep:libbtracebiarch}, ${dep:libasanbiarch}, ${dep:liblsanbiarch},
+ ${dep:libtsanbiarch}, ${dep:libubsanbiarch},
+ ${dep:libvtvbiarch}, ${dep:libcilkrtsbiarch}, ${dep:libmpxbiarch},
+ ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: gccgo-5-multilib (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GCC support library (x32 development files)
+ This package contains the headers and static library files necessary for
+ building C programs which use libgcc, libgomp, libquadmath, libssp or libitm.
+')`'dnl x32dev
+')`'dnl cdev
+
+ifenabled(`cdev',`
+Package: gcc`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: cpp`'PV`'TS (= ${gcc:Version}),ifenabled(`gccbase',` BASEDEP,')
+  ifenabled(`gccxbase',` BASEDEP,')
+  ${dep:libcc1},
+  binutils`'TS (>= ${binutils:Version}),
+  ${dep:libgccdev}, ${shlibs:Depends}, ${misc:Depends}
+Recommends: ${dep:libcdev}
+Replaces: gccgo-5 (<< ${gcc:Version}), gcc`'PV-plugin-dev`'TS (<< 5-20150321-1),
+  gcc-5-base (<< 5-20150329-1)
+Suggests: ${gcc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}),
+ gcc`'PV-locales (>= ${gcc:SoftVersion}),
+ libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}),
+ libdbgdep(gomp`'GOMP_SO-dbg,),
+ libdbgdep(itm`'ITM_SO-dbg,),
+ libdbgdep(atomic`'ATOMIC_SO-dbg,),
+ libdbgdep(asan`'ASAN_SO-dbg,),
+ libdbgdep(lsan`'LSAN_SO-dbg,),
+ libdbgdep(tsan`'TSAN_SO-dbg,),
+ libdbgdep(ubsan`'UBSAN_SO-dbg,),
+ifenabled(`libvtv',`',`
+ libdbgdep(vtv`'VTV_SO-dbg,),
+')`'dnl
+ libdbgdep(cilkrts`'CILKRTS_SO-dbg,),
+ libdbgdep(mpx`'MPX_SO-dbg,),
+ libdbgdep(quadmath`'QMATH_SO-dbg,)
+Provides: c-compiler`'TS
+ifdef(`TARGET',`Conflicts: gcc-multilib
+')`'dnl
+BUILT_USING`'dnl
+Description: GNU C compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+ifdef(`TARGET', `dnl
+ .
+ This package contains C cross-compiler for TARGET architecture.
+')`'dnl
+
+ifenabled(`multilib',`
+Package: gcc`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU C compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+
+ifenabled(`testresults',`
+Package: gcc`'PV-test-results
+Architecture: any
+Section: devel
+Priority: extra
+Depends: BASEDEP, ${misc:Depends}
+Replaces: g++-5 (<< 5.2.1-28)
+BUILT_USING`'dnl
+Description: Test results for the GCC test suite
+ This package contains the test results for running the GCC test suite
+ for a post build analysis.
+')`'dnl testresults
+
+ifenabled(`plugindev',`
+Package: gcc`'PV-plugin-dev`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), GMP_BUILD_DEP MPC_BUILD_DEP ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Files for GNU GCC plugin development.
+ This package contains (header) files for GNU GCC plugin development. It
+ is only used for the development of GCC plugins, but not needed to run
+ plugins.
+')`'dnl plugindev
+')`'dnl cdev
+
+ifenabled(`cdev',`
+Package: gcc`'PV-hppa64-linux-gnu
+Architecture: ifdef(`TARGET',`any',hppa amd64 i386 x32)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: PRI(optional)
+Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends}, binutils-hppa64-linux-gnu | binutils-hppa64
+Replaces: gcc-5-hppa64 (<< 5.2.1-22)
+Provides: gcc-5-hppa64
+Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3), gcc-4.7-hppa64 (<< 4.7.3-13), gcc-4.8-hppa64 (<< 4.8.2-22), gcc-4.9-hppa64 (<< 4.9.3-1)
+BUILT_USING`'dnl
+Description: GNU C compiler (cross compiler for hppa64)
+ This is the GNU C compiler, a fairly portable optimizing compiler for C.
+')`'dnl cdev
+
+ifenabled(`cdev',`
+Package: cpp`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: ifdef(`TARGET',`devel',`interpreters')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends}
+Suggests: gcc`'PV-locales (>= ${gcc:SoftVersion})
+Replaces: gccgo-5 (<< ${gcc:Version})
+BUILT_USING`'dnl
+Description: GNU C preprocessor
+ A macro processor that is used automatically by the GNU C compiler
+ to transform programs before actual compilation.
+ .
+ This package has been separated from gcc for the benefit of those who
+ require the preprocessor but not the compiler.
+ifdef(`TARGET', `dnl
+ .
+ This package contains preprocessor configured for TARGET architecture.
+')`'dnl
+
+ifdef(`TARGET', `', `
+ifenabled(`gfdldoc',`
+Package: cpp`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Description: Documentation for the GNU C preprocessor (cpp)
+ Documentation for the GNU C preprocessor in info `format'.
+')`'dnl gfdldoc
+')`'dnl native
+
+ifdef(`TARGET', `', `
+Package: gcc`'PV-locales
+Architecture: all
+Section: devel
+Priority: PRI(optional)
+Depends: SOFTBASEDEP, cpp`'PV (>= ${gcc:SoftVersion}), ${misc:Depends}
+Recommends: gcc`'PV (>= ${gcc:SoftVersion})
+Description: GCC, the GNU compiler collection (native language support files)
+ Native language support for GCC. Lets GCC speak your language,
+ if translations are available.
+ .
+ Please do NOT submit bug reports in other languages than "C".
+ Always reset your language settings to use the "C" locales.
+')`'dnl native
+')`'dnl cdev
+
+ifenabled(`c++',`
+ifenabled(`c++dev',`
+Package: g++`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libidevdep(stdc++`'PV-dev,,=), ${shlibs:Depends}, ${misc:Depends}
+Provides: c++-compiler`'TS`'ifdef(`TARGET)',`',`, c++abi2-dev')
+Suggests: ${gxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(stdc++CXX_SO`'PV-dbg,)
+BUILT_USING`'dnl
+Description: GNU C++ compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++.
+ifdef(`TARGET', `dnl
+ .
+ This package contains C++ cross-compiler for TARGET architecture.
+')`'dnl
+
+ifenabled(`multilib',`
+Package: g++`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, g++`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${dep:libcxxbiarchdbg}
+BUILT_USING`'dnl
+Description: GNU C++ compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU C++ compiler, a fairly portable optimizing compiler for C++.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+')`'dnl c++dev
+')`'dnl c++
+
+ifdef(`TARGET', `', `
+ifenabled(`ssp',`
+Package: libssp`'SSP_SO`'LS
+Architecture: any
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: lib32ssp`'SSP_SO`'LS
+Architecture: biarch32_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libssp0 (<< 4.1)
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (32bit)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: lib64ssp`'SSP_SO`'LS
+Architecture: biarch64_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libssp0 (<< 4.1)
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (64bit)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: libn32ssp`'SSP_SO`'LS
+Architecture: biarchn32_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libssp0 (<< 4.1)
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (n32)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: libx32ssp`'SSP_SO`'LS
+Architecture: biarchx32_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libssp0 (<< 4.1)
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (x32)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: libhfssp`'SSP_SO`'LS
+Architecture: biarchhf_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (hard float ABI)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+
+Package: libsfssp`'SSP_SO`'LS
+Architecture: biarchsf_archs
+Section: libs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC stack smashing protection library (soft float ABI)
+ GCC can now emit code for protecting applications from stack-smashing attacks.
+ The protection is realized by buffer overflow detection and reordering of
+ stack variables to avoid pointer corruption.
+')`'dnl
+')`'dnl native
+
+ifenabled(`libgomp',`
+Package: libgomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libgomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib32gomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (32bit)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib32gomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (32 bit debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib64gomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (64bit)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: lib64gomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (64bit debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libn32gomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (n32)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libn32gomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (n32 debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+
+ifenabled(`libx32gomp',`
+Package: libx32gomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (x32)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libx32gomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (x32 debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+')`'dnl libx32gomp
+
+ifenabled(`libhfgomp',`
+Package: libhfgomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (hard float ABI)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libhfgomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+')`'dnl libhfgomp
+
+ifenabled(`libsfgomp',`
+Package: libsfgomp`'GOMP_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (soft float ABI)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+
+Package: libsfgomp`'GOMP_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(gomp`'GOMP_SO,sf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols)
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+')`'dnl libsfgomp
+
+ifenabled(`libneongomp',`
+Package: libgomp`'GOMP_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC OpenMP (GOMP) support library [neon optimized]
+ GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers
+ in the GNU Compiler Collection.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneongomp
+')`'dnl libgomp
+
+ifenabled(`libitm',`
+Package: libitm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-armel [armel], libitm'ITM_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libitm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libitm'ITM_SO`-dbg-armel [armel], libitm'ITM_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib32itm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (32bit)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib32itm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (32 bit debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib64itm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (64bit)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: lib64itm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (64bit debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+#Package: libn32itm`'ITM_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GNU Transactional Memory Library (n32)
+# GNU Transactional Memory Library (libitm) provides transaction support for
+# accesses to the memory of a process, enabling easy-to-use synchronization of
+# accesses to shared memory by several threads.
+
+#Package: libn32itm`'ITM_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(itm`'ITM_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GNU Transactional Memory Library (n32 debug symbols)
+# GNU Transactional Memory Library (libitm) provides transaction support for
+# accesses to the memory of a process, enabling easy-to-use synchronization of
+# accesses to shared memory by several threads.
+
+ifenabled(`libx32itm',`
+Package: libx32itm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (x32)
+ This manual documents the usage and internals of libitm. It provides
+ transaction support for accesses to the memory of a process, enabling
+ easy-to-use synchronization of accesses to shared memory by several threads.
+
+Package: libx32itm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (x32 debug symbols)
+ This manual documents the usage and internals of libitm. It provides
+ transaction support for accesses to the memory of a process, enabling
+ easy-to-use synchronization of accesses to shared memory by several threads.
+')`'dnl libx32itm
+
+ifenabled(`libhfitm',`
+Package: libhfitm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (hard float ABI)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libhfitm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (hard float ABI debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+')`'dnl libhfitm
+
+ifenabled(`libsfitm',`
+Package: libsfitm`'ITM_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (soft float ABI)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+
+Package: libsfitm`'ITM_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(itm`'ITM_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library (soft float ABI debug symbols)
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+')`'dnl libsfitm
+
+ifenabled(`libneonitm',`
+Package: libitm`'ITM_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Transactional Memory Library [neon optimized]
+ GNU Transactional Memory Library (libitm) provides transaction support for
+ accesses to the memory of a process, enabling easy-to-use synchronization of
+ accesses to shared memory by several threads.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonitm
+')`'dnl libitm
+
+ifenabled(`libatomic',`
+Package: libatomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-armel [armel], libatomic'ATOMIC_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libatomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libatomic'ATOMIC_SO`-dbg-armel [armel], libatomic'ATOMIC_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib32atomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (32bit)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib32atomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (32 bit debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib64atomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (64bit)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: lib64atomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (64bit debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libn32atomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (n32)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libn32atomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (n32 debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+ifenabled(`libx32atomic',`
+Package: libx32atomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (x32)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libx32atomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (x32 debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+')`'dnl libx32atomic
+
+ifenabled(`libhfatomic',`
+Package: libhfatomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (hard float ABI)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libhfatomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libatomic'ATOMIC_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (hard float ABI debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+')`'dnl libhfatomic
+
+ifenabled(`libsfatomic',`
+Package: libsfatomic`'ATOMIC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (soft float ABI)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+
+Package: libsfatomic`'ATOMIC_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(atomic`'ATOMIC_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions (soft float ABI debug symbols)
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+')`'dnl libsfatomic
+
+ifenabled(`libneonatomic',`
+Package: libatomic`'ATOMIC_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: support library providing __atomic built-in functions [neon optimized]
+ library providing __atomic built-in functions. When an atomic call cannot
+ be turned into lock-free instructions, GCC will make calls into this library.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonatomic
+')`'dnl libatomic
+
+ifenabled(`libasan',`
+Package: libasan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-armel [armel], libasan'ASAN_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libasan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libasan'ASAN_SO`-dbg-armel [armel], libasan'ASAN_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib32asan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (32bit)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib32asan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (32 bit debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib64asan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (64bit)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: lib64asan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (64bit debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+#Package: libn32asan`'ASAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(extra)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: AddressSanitizer -- a fast memory error detector (n32)
+# AddressSanitizer (ASan) is a fast memory error detector.  It finds
+# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+#Package: libn32asan`'ASAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(asan`'ASAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: AddressSanitizer -- a fast memory error detector (n32 debug symbols)
+# AddressSanitizer (ASan) is a fast memory error detector.  It finds
+# use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+ifenabled(`libx32asan',`
+Package: libx32asan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (x32)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libx32asan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (x32 debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+')`'dnl libx32asan
+
+ifenabled(`libhfasan',`
+Package: libhfasan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(extra)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (hard float ABI)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libhfasan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libasan'ASAN_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (hard float ABI debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+')`'dnl libhfasan
+
+ifenabled(`libsfasan',`
+Package: libsfasan`'ASAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(extra)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (soft float ABI)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+
+Package: libsfasan`'ASAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(asan`'ASAN_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector (soft float ABI debug symbols)
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+')`'dnl libsfasan
+
+ifenabled(`libneonasan',`
+Package: libasan`'ASAN_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AddressSanitizer -- a fast memory error detector [neon optimized]
+ AddressSanitizer (ASan) is a fast memory error detector.  It finds
+ use-after-free and {heap,stack,global}-buffer overflow bugs in C/C++ programs.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonasan
+')`'dnl libasan
+
+ifenabled(`liblsan',`
+Package: liblsan`'LSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (runtime)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+Package: liblsan`'LSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(lsan`'LSAN_SO,,=), ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+ifenabled(`lib32lsan',`
+Package: lib32lsan`'LSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (32bit)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+Package: lib32lsan`'LSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(lsan`'LSAN_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (32 bit debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+')`'dnl lib32lsan
+
+ifenabled(`lib64lsan',`
+#Package: lib64lsan`'LSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (64bit)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+#Package: lib64lsan`'LSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(lsan`'LSAN_SO,64,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (64bit debug symbols)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+')`'dnl lib64lsan
+
+ifenabled(`libn32lsan',`
+#Package: libn32lsan`'LSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (n32)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+
+#Package: libn32lsan`'LSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(lsan`'LSAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: LeakSanitizer -- a memory leak detector (n32 debug symbols)
+# LeakSanitizer (Lsan) is a memory leak detector which is integrated
+# into AddressSanitizer.
+')`'dnl libn32lsan
+
+ifenabled(`libx32lsan',`
+Package: libx32lsan`'LSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (x32)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+
+Package: libx32lsan`'LSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(lsan`'LSAN_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (x32 debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer (empty package).
+')`'dnl libx32lsan
+
+ifenabled(`libhflsan',`
+Package: libhflsan`'LSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: liblsan'LSAN_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (hard float ABI)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+Package: libhflsan`'LSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(lsan`'LSAN_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: liblsan'LSAN_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (hard float ABI debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+')`'dnl libhflsan
+
+ifenabled(`libsflsan',`
+Package: libsflsan`'LSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (soft float ABI)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+
+Package: libsflsan`'LSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(lsan`'LSAN_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector (soft float ABI debug symbols)
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+')`'dnl libsflsan
+
+ifenabled(`libneonlsan',`
+Package: liblsan`'LSAN_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: LeakSanitizer -- a memory leak detector [neon optimized]
+ LeakSanitizer (Lsan) is a memory leak detector which is integrated
+ into AddressSanitizer.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonlsan
+')`'dnl liblsan
+
+ifenabled(`libtsan',`
+Package: libtsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-armel [armel], libtsan'TSAN_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (runtime)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libtsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libtsan'TSAN_SO`-dbg-armel [armel], libtsan'TSAN_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+ifenabled(`lib32tsan',`
+Package: lib32tsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (32bit)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: lib32tsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (32 bit debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+')`'dnl lib32tsan
+
+ifenabled(`lib64tsan',`
+Package: lib64tsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: lib64tsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (64bit debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+')`'dnl lib64tsan
+
+ifenabled(`libn32tsan',`
+Package: libn32tsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libn32tsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (n32 debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+')`'dnl libn32tsan
+
+ifenabled(`libx32tsan',`
+Package: libx32tsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libx32tsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (x32 debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+')`'dnl libx32tsan
+
+ifenabled(`libhftsan',`
+Package: libhftsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libhftsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libtsan'TSAN_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (hard float ABI debug symbols)
+')`'dnl libhftsan
+
+ifenabled(`libsftsan',`
+Package: libsftsan`'TSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+
+Package: libsftsan`'TSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(tsan`'TSAN_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races (soft float ABI debug symbols)
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+')`'dnl libsftsan
+
+ifenabled(`libneontsan',`
+Package: libtsan`'TSAN_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: ThreadSanitizer -- a Valgrind-based detector of data races [neon optimized]
+ ThreadSanitizer (Tsan) is a data race detector for C/C++ programs. 
+ The Linux and Mac versions are based on Valgrind. 
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneontsan
+')`'dnl libtsan
+
+ifenabled(`libubsan',`
+Package: libubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libubsan'UBSAN_SO`-armel [armel], libubsan'UBSAN_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (runtime)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libubsan'UBSAN_SO`-dbg-armel [armel], libubsan'UBSAN_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+ifenabled(`lib32ubsan',`
+Package: lib32ubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (32bit)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib32ubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (32 bit debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+')`'dnl lib32ubsan
+
+ifenabled(`lib64ubsan',`
+Package: lib64ubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (64bit)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: lib64ubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (64bit debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+')`'dnl lib64ubsan
+
+ifenabled(`libn32ubsan',`
+#Package: libn32ubsan`'UBSAN_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: UBSan -- undefined behaviour sanitizer (n32)
+# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+# Various computations will be instrumented to detect undefined behavior
+# at runtime. Available for C and C++.
+
+#Package: libn32ubsan`'UBSAN_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: UBSan -- undefined behaviour sanitizer (n32 debug symbols)
+# UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+# Various computations will be instrumented to detect undefined behavior
+# at runtime. Available for C and C++.
+')`'dnl libn32ubsan
+
+ifenabled(`libx32ubsan',`
+Package: libx32ubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (x32)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libx32ubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (x32 debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+')`'dnl libx32ubsan
+
+ifenabled(`libhfubsan',`
+Package: libhfubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libubsan'UBSAN_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (hard float ABI)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libhfubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libubsan'UBSAN_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (hard float ABI debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+')`'dnl libhfubsan
+
+ifenabled(`libsfubsan',`
+Package: libsfubsan`'UBSAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (soft float ABI)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+
+Package: libsfubsan`'UBSAN_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(ubsan`'UBSAN_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer (soft float ABI debug symbols)
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+')`'dnl libsfubsan
+
+ifenabled(`libneonubsan',`
+Package: libubsan`'UBSAN_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: UBSan -- undefined behaviour sanitizer [neon optimized]
+ UndefinedBehaviorSanitizer can be enabled via -fsanitize=undefined.
+ Various computations will be instrumented to detect undefined behavior
+ at runtime. Available for C and C++.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonubsan
+')`'dnl libubsan
+
+ifenabled(`libvtv',`
+Package: libvtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (runtime)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: libvtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,,=), ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: GNU vtable verification library (debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+ifenabled(`lib32vtv',`
+Package: lib32vtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (32bit)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: lib32vtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (32 bit debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl lib32vtv
+
+ifenabled(`lib64vtv',`
+Package: lib64vtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (64bit)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: lib64vtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (64bit debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl lib64vtv
+
+ifenabled(`libn32vtv',`
+Package: libn32vtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (n32)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: libn32vtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (n32 debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl libn32vtv
+
+ifenabled(`libx32vtv',`
+Package: libx32vtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (x32)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: libx32vtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (x32 debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl libx32vtv
+
+ifenabled(`libhfvtv',`
+Package: libhfvtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libvtv'VTV_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GNU vtable verification library (hard float ABI)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: libhfvtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libvtv'VTV_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GNU vtable verification library (hard float ABI debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl libhfvtv
+
+ifenabled(`libsfvtv',`
+Package: libsfvtv`'VTV_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (soft float ABI)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+
+Package: libsfvtv`'VTV_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(vtv`'VTV_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library (soft float ABI debug symbols)
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+')`'dnl libsfvtv
+
+ifenabled(`libneonvtv',`
+Package: libvtv`'VTV_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU vtable verification library [neon optimized]
+ Vtable verification is a new security hardening feature for GCC that
+ is designed to detect and handle (during program execution) when a
+ vtable pointer that is about to be used for a virtual function call is
+ not a valid vtable pointer for that call.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonvtv
+')`'dnl libvtv
+
+ifenabled(`libcilkrts',`
+Package: libcilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libcilkrts'CILKRTS_SO`-armel [armel], libcilkrts'CILKRTS_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (runtime)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libcilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libcilkrts'CILKRTS_SO`-dbg-armel [armel], libcilkrts'CILKRTS_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+ifenabled(`lib32cilkrts',`
+Package: lib32cilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (32bit)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib32cilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (32 bit debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl lib32cilkrts
+
+ifenabled(`lib64cilkrts',`
+Package: lib64cilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (64bit)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: lib64cilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (64bit debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl lib64cilkrts
+
+ifenabled(`libn32cilkrts',`
+Package: libn32cilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (n32)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libn32cilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (n32 debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl libn32cilkrts
+
+ifenabled(`libx32cilkrts',`
+Package: libx32cilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (x32)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libx32cilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (x32 debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl libx32cilkrts
+
+ifenabled(`libhfcilkrts',`
+Package: libhfcilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libcilkrts'CILKRTS_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (hard float ABI)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libhfcilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libcilkrts'CILKRTS_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (hard float ABI debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl libhfcilkrts
+
+ifenabled(`libsfcilkrts',`
+Package: libsfcilkrts`'CILKRTS_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (soft float ABI)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+
+Package: libsfcilkrts`'CILKRTS_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(cilkrts`'CILKRTS_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions (soft float ABI debug symbols)
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+')`'dnl libsfcilkrts
+
+ifenabled(`libneoncilkrts',`
+Package: libcilkrts`'CILKRTS_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel Cilk Plus language extensions [neon optimized]
+ Intel Cilk Plus is an extension to the C and C++ languages to support
+ data and task parallelism.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneoncilkrts
+')`'dnl libcilkrts
+
+ifenabled(`libmpx',`
+Package: libmpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libmpx'MPX_SO`-armel [armel], libmpx'MPX_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (runtime)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libmpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libmpx'MPX_SO`-dbg-armel [armel], libmpx'MPX_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+ifenabled(`lib32mpx',`
+Package: lib32mpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (32bit)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib32mpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (32 bit debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl lib32mpx
+
+ifenabled(`lib64mpx',`
+Package: lib64mpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (64bit)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: lib64mpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (64bit debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl lib64mpx
+
+ifenabled(`libn32mpx',`
+Package: libn32mpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (n32)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libn32mpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (n32 debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl libn32mpx
+
+ifenabled(`libx32mpx',`
+Package: libx32mpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (x32)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libx32mpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (x32 debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl libx32mpx
+
+ifenabled(`libhfmpx',`
+Package: libhfmpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libmpx'MPX_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (hard float ABI)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libhfmpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libmpx'MPX_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (hard float ABI debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl libhfmpx
+
+ifenabled(`libsfmpx',`
+Package: libsfmpx`'MPX_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (soft float ABI)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+
+Package: libsfmpx`'MPX_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(mpx`'MPX_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Intel memory protection extensions (soft float ABI debug symbols)
+ Intel MPX is a set of processor features which, with compiler,
+ runtime library and OS support, brings increased robustness to
+ software by checking pointer references whose compile time normal
+ intentions are usurped at runtime due to buffer overflow.
+')`'dnl libsfmpx
+')`'dnl libmpx
+
+ifenabled(`libbacktrace',`
+Package: libbacktrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-armel [armel], libbacktrace'BTRACE_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libbacktrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,,=), ${misc:Depends}
+ifdef(`TARGET',`',`Provides: libbacktrace'BTRACE_SO`-dbg-armel [armel], libbacktrace'BTRACE_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: stack backtrace library (debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: lib32backtrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: stack backtrace library (32bit)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: lib32backtrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (32 bit debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: lib64backtrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (64bit)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: lib64backtrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (64bit debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libn32backtrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (n32)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libn32backtrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (n32 debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+ifenabled(`libx32backtrace',`
+Package: libx32backtrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (x32)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libx32backtrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (x32 debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+')`'dnl libx32backtrace
+
+ifenabled(`libhfbacktrace',`
+Package: libhfbacktrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: stack backtrace library (hard float ABI)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libhfbacktrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,hf,=), ${misc:Depends}
+wifdef(`TARGET',`dnl',`Conflicts: libbacktrace'BTRACE_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: stack backtrace library (hard float ABI debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+')`'dnl libhfbacktrace
+
+ifenabled(`libsfbacktrace',`
+Package: libsfbacktrace`'BTRACE_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (soft float ABI)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+
+Package: libsfbacktrace`'BTRACE_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(backtrace`'BTRACE_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library (soft float ABI debug symbols)
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+')`'dnl libsfbacktrace
+
+ifenabled(`libneonbacktrace',`
+Package: libbacktrace`'BTRACE_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: stack backtrace library [neon optimized]
+ libbacktrace uses the GCC unwind interface to collect a stack trace,
+ and parses DWARF debug info to get file/line/function information.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonbacktrace
+')`'dnl libbacktrace
+
+
+ifenabled(`libqmath',`
+Package: libquadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libquadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,,=), ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: lib32quadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (32bit)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: lib32quadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (32 bit debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+Package: lib64quadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library  (64bit)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: lib64quadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library  (64bit debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+
+#Package: libn32quadmath`'QMATH_SO`'LS
+#Section: ifdef(`TARGET',`devel',`libs')
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+#Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GCC Quad-Precision Math Library (n32)
+# A library, which provides quad-precision mathematical functions on targets
+# supporting the __float128 datatype. The library is used to provide on such
+# targets the REAL(16) type in the GNU Fortran compiler.
+
+#Package: libn32quadmath`'QMATH_SO-dbg`'LS
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+#Section: debug
+#Priority: extra
+#Depends: BASELDEP, libdep(quadmath`'QMATH_SO,n32,=), ${misc:Depends}
+#BUILT_USING`'dnl
+#Description: GCC Quad-Precision Math Library (n32 debug symbols)
+# A library, which provides quad-precision mathematical functions on targets
+# supporting the __float128 datatype.
+
+ifenabled(`libx32qmath',`
+Package: libx32quadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (x32)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libx32quadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (x32 debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+')`'dnl libx32qmath
+
+ifenabled(`libhfqmath',`
+Package: libhfquadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (hard float ABI)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libhfquadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,hf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (hard float ABI debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+')`'dnl libhfqmath
+
+ifenabled(`libsfqmath',`
+Package: libsfquadmath`'QMATH_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (soft float ABI)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype. The library is used to provide on such
+ targets the REAL(16) type in the GNU Fortran compiler.
+
+Package: libsfquadmath`'QMATH_SO-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(quadmath`'QMATH_SO,sf,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC Quad-Precision Math Library (hard float ABI debug symbols)
+ A library, which provides quad-precision mathematical functions on targets
+ supporting the __float128 datatype.
+')`'dnl libsfqmath
+')`'dnl libqmath
+
+ifenabled(`libcc1',`
+Package: libcc1-`'CC1_SO
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC cc1 plugin for GDB
+ libcc1 is a plugin for GDB.
+')`'dnl libcc1
+
+ifenabled(`libjit',`
+Package: libgccjit`'GCCJIT_SO
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends}
+Breaks: python-gccjit (<< 0.4-4), python3-gccjit (<< 0.4-4)
+BUILT_USING`'dnl
+Description: GCC just-in-time compilation (shared library)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: libgccjit`'PV-dbg
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: extra
+Depends: BASEDEP, libgccjit`'GCCJIT_SO (= ${gcc:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCC just-in-time compilation (debug information)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+')`'dnl libjit
+
+ifenabled(`jit',`
+Package: libgccjit`'PV-doc
+Section: doc
+Architecture: all
+Priority: extra
+Depends: BASEDEP, ${misc:Depends}
+Description: GCC just-in-time compilation (documentation)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+
+Package: libgccjit`'PV-dev
+Section: ifdef(`TARGET',`devel',`libdevel')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, libgccjit`'GCCJIT_SO (>= ${gcc:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Suggests: libgccjit`'PV-dbg
+Description: GCC just-in-time compilation (development files)
+ libgccjit provides an embeddable shared library with an API for adding
+ compilation to existing programs using GCC.
+')`'dnl jit
+
+ifenabled(`objpp',`
+ifenabled(`objppdev',`
+Package: gobjc++`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), g++`'PV`'TS (= ${gcc:Version}), ${shlibs:Depends}, libidevdep(objc`'PV-dev,,=), ${misc:Depends}
+Suggests: ${gobjcxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion})
+Provides: objc++-compiler`'TS
+BUILT_USING`'dnl
+Description: GNU Objective-C++ compiler
+ This is the GNU Objective-C++ compiler, which compiles
+ Objective-C++ on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+')`'dnl obcppdev
+
+ifenabled(`multilib',`
+Package: gobjc++`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gobjc++`'PV`'TS (= ${gcc:Version}), g++`'PV-multilib`'TS (= ${gcc:Version}), gobjc`'PV-multilib`'TS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Objective-C++ compiler (multilib support)
+ This is the GNU Objective-C++ compiler, which compiles Objective-C++ on
+ platforms supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+')`'dnl obcpp
+
+ifenabled(`objc',`
+ifenabled(`objcdev',`
+Package: gobjc`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libidevdep(objc`'PV-dev,,=), ${misc:Depends}
+Suggests: ${gobjc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(objc`'OBJC_SO-dbg,)
+Provides: objc-compiler`'TS
+ifdef(`__sparc__',`Conflicts: gcc`'PV-sparc64', `dnl')
+BUILT_USING`'dnl
+Description: GNU Objective-C compiler
+ This is the GNU Objective-C compiler, which compiles
+ Objective-C on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+
+ifenabled(`multilib',`
+Package: gobjc`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Objective-C compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU Objective-C compiler, which compiles Objective-C on platforms
+ supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+
+Package: libobjc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,), libdep(objc`'OBJC_SO,), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: lib64objc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,64), libdep(objc`'OBJC_SO,64), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (64bit development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: lib32objc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,32), libdep(objc`'OBJC_SO,32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (32bit development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+Package: libn32objc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32), libdep(objc`'OBJC_SO,n32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (n32 development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+
+ifenabled(`x32dev',`
+Package: libx32objc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), libdep(objc`'OBJC_SO,x32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (x32 development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+')`'dnl libx32objc
+
+ifenabled(`armml',`
+Package: libhfobjc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf), libdep(objc`'OBJC_SO,hf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (hard float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+')`'dnl armml
+
+ifenabled(`armml',`
+Package: libsfobjc`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf), libdep(objc`'OBJC_SO,sf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (soft float development files)
+ This package contains the headers and static library files needed to build
+ GNU ObjC applications.
+')`'dnl armml
+')`'dnl objcdev
+
+ifenabled(`libobjc',`
+Package: libobjc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+ifelse(OBJC_SO,`2',`Breaks: ${multiarch:breaks}
+',`')')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libobjc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl libobjc
+
+ifenabled(`lib64objc',`
+Package: lib64objc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (64bit)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib64objc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,64,=), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (64 bit debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl lib64objc
+
+ifenabled(`lib32objc',`
+Package: lib32objc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (32bit)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: lib32objc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,32,=), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (32 bit debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl lib32objc
+
+ifenabled(`libn32objc',`
+Package: libn32objc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (n32)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libn32objc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,n32,=), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (n32 debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl libn32objc
+
+ifenabled(`libx32objc',`
+Package: libx32objc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (x32)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libx32objc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,x32,=), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (x32 debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl libx32objc
+
+ifenabled(`libhfobjc',`
+Package: libhfobjc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (hard float ABI)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libhfobjc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,hf,=), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl libhfobjc
+
+ifenabled(`libsfobjc',`
+Package: libsfobjc`'OBJC_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (soft float ABI)
+ Library needed for GNU ObjC applications linked against the shared library.
+
+Package: libsfobjc`'OBJC_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: extra
+Depends: BASELDEP, libdep(objc`'OBJC_SO,sf,=), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols)
+ Library needed for GNU ObjC applications linked against the shared library.
+')`'dnl libsfobjc
+
+ifenabled(`libneonobjc',`
+Package: libobjc`'OBJC_SO-neon`'LS
+Section: libs
+Architecture: NEON_ARCHS
+Priority: PRI(optional)
+Depends: BASELDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Objective-C applications  [NEON version]
+ Library needed for GNU ObjC applications linked against the shared library.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneonobjc
+')`'dnl objc
+
+ifenabled(`fortran',`
+ifenabled(`fdev',`
+Package: gfortran`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libidevdep(gfortran`'PV-dev,,=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: fortran95-compiler, ${fortran:mod-version}
+Suggests: ${gfortran:multilib}, gfortran`'PV-doc, libdbgdep(gfortran`'FORTRAN_SO-dbg,)
+BUILT_USING`'dnl
+Description: GNU Fortran compiler
+ This is the GNU Fortran compiler, which compiles
+ Fortran on platforms supported by the gcc compiler. It uses the
+ gcc backend to generate optimized code.
+
+ifenabled(`multilib',`
+Package: gfortran`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gfortran`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Fortran compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU Fortran compiler, which compiles Fortran on platforms
+ supported by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+
+ifenabled(`gfdldoc',`
+Package: gfortran`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Description: Documentation for the GNU Fortran compiler (gfortran)
+ Documentation for the GNU Fortran compiler in info `format'.
+')`'dnl gfdldoc
+
+Package: libgfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',), libdep(gfortran`'FORTRAN_SO,), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: lib64gfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',64), libdep(gfortran`'FORTRAN_SO,64), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (64bit development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: lib32gfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',32), libdep(gfortran`'FORTRAN_SO,32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (32bit development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+Package: libn32gfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',n32), libdep(gfortran`'FORTRAN_SO,n32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (n32 development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+
+ifenabled(`x32dev',`
+Package: libx32gfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',x32), libdep(gfortran`'FORTRAN_SO,x32), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (x32 development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+')`'dnl libx32gfortran
+
+ifenabled(`armml',`
+Package: libhfgfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',hf), libdep(gfortran`'FORTRAN_SO,hf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (hard float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+')`'dnl armml
+
+ifenabled(`armml',`
+Package: libsfgfortran`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev`',sf), libdep(gfortran`'FORTRAN_SO,sf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (soft float ABI development files)
+ This package contains the headers and static library files needed to build
+ GNU Fortran applications.
+')`'dnl armml
+')`'dnl fdev
+
+ifenabled(`libgfortran',`
+Package: libgfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libgfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl libgfortran
+
+ifenabled(`lib64gfortran',`
+Package: lib64gfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (64bit)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib64gfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (64bit debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl lib64gfortran
+
+ifenabled(`lib32gfortran',`
+Package: lib32gfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (32bit)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: lib32gfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (32 bit debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl lib32gfortran
+
+ifenabled(`libn32gfortran',`
+Package: libn32gfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (n32)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libn32gfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (n32 debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl libn32gfortran
+
+ifenabled(`libx32gfortran',`
+Package: libx32gfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (x32)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libx32gfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (x32 debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl libx32gfortran
+
+ifenabled(`libhfgfortran',`
+Package: libhfgfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (hard float ABI)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libhfgfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,hf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl libhfgfortran
+
+ifenabled(`libsfgfortran',`
+Package: libsfgfortran`'FORTRAN_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (soft float ABI)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+
+Package: libsfgfortran`'FORTRAN_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Priority: extra
+Depends: BASELDEP, libdep(gfortran`'FORTRAN_SO,sf,=), ${misc:Depends}
+ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols)
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+')`'dnl libsfgfortran
+
+ifenabled(`libneongfortran',`
+Package: libgfortran`'FORTRAN_SO-neon`'LS
+Section: libs
+Architecture: NEON_ARCHS
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}
+')`'dnl
+Priority: extra
+Depends: BASELDEP, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Fortran applications [NEON version]
+ Library needed for GNU Fortran applications linked against the
+ shared library.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl libneongfortran
+')`'dnl fortran
+
+ifenabled(`ggo',`
+ifenabled(`godev',`
+Package: gccgo`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ifdef(`STANDALONEGO',`${dep:libcc1}, ',`gcc`'PV`'TS (= ${gcc:Version}), ')libidevdep(go`'GO_SO,,>=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: go-compiler
+Suggests: ${go:multilib}, gccgo`'PV-doc, libdbgdep(go`'GO_SO-dbg,)
+Conflicts: ${golang:Conflicts}
+BUILT_USING`'dnl
+Description: GNU Go compiler
+ This is the GNU Go compiler, which compiles Go on platforms supported
+ by the gcc compiler. It uses the gcc backend to generate optimized code.
+
+ifenabled(`multilib',`
+Package: gccgo`'PV-multilib`'TS
+Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS)
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Section: devel
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gccgo`'PV`'TS (= ${gcc:Version}), ifdef(`STANDALONEGO',,`gcc`'PV-multilib`'TS (= ${gcc:Version}), ')${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${dep:libgobiarchdbg}
+BUILT_USING`'dnl
+Description: GNU Go compiler (multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU Go compiler, which compiles Go on platforms supported
+ by the gcc compiler.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+
+ifenabled(`gfdldoc',`
+Package: gccgo`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Documentation for the GNU Go compiler (gccgo)
+ Documentation for the GNU Go compiler in info `format'.
+')`'dnl gfdldoc
+')`'dnl fdev
+
+ifenabled(`libggo',`
+Package: libgo`'GO_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libgo3`'LS
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libgo`'GO_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`TARGET',`',`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf]
+')`'dnl
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Priority: extra
+Depends: BASELDEP, libdep(go`'GO_SO,,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+')`'dnl libgo
+
+ifenabled(`lib64ggo',`
+Package: lib64go`'GO_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: lib64go3`'LS
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (64bit)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: lib64go`'GO_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Priority: extra
+Depends: BASELDEP, libdep(go`'GO_SO,64,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (64bit debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+')`'dnl lib64go
+
+ifenabled(`lib32ggo',`
+Package: lib32go`'GO_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+Replaces: lib32go3`'LS
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (32bit)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: lib32go`'GO_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(go`'GO_SO,32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (32 bit debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+')`'dnl lib32go
+
+ifenabled(`libn32ggo',`
+Package: libn32go`'GO_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libn32go3`'LS
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (n32)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libn32go`'GO_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(go`'GO_SO,n32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (n32 debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+')`'dnl libn32go
+
+ifenabled(`libx32ggo',`
+Package: libx32go`'GO_SO`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+Replaces: libx32go3`'LS
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (x32)
+ Library needed for GNU Go applications linked against the
+ shared library.
+
+Package: libx32go`'GO_SO-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Priority: extra
+Depends: BASELDEP, libdep(go`'GO_SO,x32,=), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Runtime library for GNU Go applications (x32 debug symbols)
+ Library needed for GNU Go applications linked against the
+ shared library. This currently is an empty package, because the
+ library is completely unstripped.
+')`'dnl libx32go
+')`'dnl ggo
+
+ifenabled(`java',`
+ifenabled(`gcj',`
+Package: gcj`'PV`'TS
+Section: java
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ${dep:gcj}, ${dep:gcjcross}, ${dep:libcdev}, ${dep:ecj}, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Recommends: libecj-java-gcj
+Replaces: gcj-5-jdk (<< 5.2.1-19)
+Suggests: gcj`'PV-jdk
+BUILT_USING`'dnl
+Description: GCJ byte code and native compiler for Java(TM)
+ GCJ is a front end to the GCC compiler which can natively compile both
+ Java(tm) source and bytecode files. The compiler can also generate class
+ files.
+ .
+ifdef(`TARGET',`'dnl
+,` Install the gcj`'PV`'TS-jdk package for a more complete SDK environment.
+')`'dnl
+')`'dnl gcj
+
+ifenabled(`libgcj',`
+ifenabled(`libgcjcommon',`
+Package: libgcj-common
+Section: java
+Architecture: all
+Priority: PRI(optional)
+Depends: BASEDEP, ${misc:Depends}
+Conflicts: classpath (<= 0.04-4)
+Replaces: java-gcj-compat (<< 1.0.65-3), java-gcj-compat-dev (<< 1.0.65-3)
+BUILT_USING`'dnl
+Description: Java runtime library (common files)
+ This package contains files shared by Classpath and libgcj libraries.
+')`'dnl libgcjcommon
+
+
+Package: gcj`'PV-jdk`'TS
+Section: java
+Architecture: any
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, ${dep:gcj}, ${dep:libcdev}, gcj`'PV`'TS (= ${gcj:Version}), gcj`'PV-jre`'TS (= ${gcj:Version}), libidevdep(gcj`'GCJ_SO-dev,,>=,${gcj:Version}), fastjar, libgcj-bc`'LS, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Recommends: libecj-java-gcj
+Suggests: gcj`'PV-source (>= ${gcj:SoftVersion}), libdbgdep(gcj`'GCJ_SO-dbg,)
+Provides: java-compiler, java-sdk, java2-sdk, java5-sdk
+Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1)
+Replaces: libgcj11 (<< 4.5-20100101-1)
+BUILT_USING`'dnl
+Description: GCJ and Classpath development tools for Java(TM)
+ GCJ is a front end to the GCC compiler which can natively compile both
+ Java(tm) source and bytecode files. The compiler can also generate class
+ files. Other java development tools from classpath are included in this
+ package.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-SDK-like interface to the GCJ tool set.
+
+Package: gcj`'PV-jre-headless`'TS
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Section: java
+Architecture: any
+Depends: BASEDEP, gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}), libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: fastjar, gcj`'PV-jdk`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,>=,${gcj:Version})
+Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless
+BUILT_USING`'dnl
+Description: Java runtime environment using GIJ/Classpath (headless version)
+ GIJ is a Java bytecode interpreter, not limited to interpreting bytecode.
+ It includes a class loader which can dynamically load shared objects, so
+ it is possible to give it the name of a class which has been compiled and
+ put into a shared library on the class path.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set,
+ limited to the headless tools and libraries.
+
+Package: gcj`'PV-jre`'TS
+Section: java
+Architecture: any
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASEDEP, gcj`'PV-jre-headless`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,>=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime
+BUILT_USING`'dnl
+Description: Java runtime environment using GIJ/Classpath
+ GIJ is a Java bytecode interpreter, not limited to interpreting bytecode.
+ It includes a class loader which can dynamically load shared objects, so
+ it is possible to give it the name of a class which has been compiled and
+ put into a shared library on the class path.
+ .
+ The package contains as well a collection of wrapper scripts and symlinks.
+ It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set.
+
+Package: libgcj`'LIBGCJ_EXT`'LS
+Section: libs
+Architecture: any
+Priority: PRI(optional)
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: SOFTBASEDEP, libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends}
+Recommends: gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion})
+Suggests: libdbgdep(gcj`'GCJ_SO-dbg,), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version})
+BUILT_USING`'dnl
+Description: Java runtime library for use with gcj
+ This is the runtime that goes along with the gcj front end to
+ gcc. libgcj includes parts of the Java Class Libraries, plus glue to
+ connect the libraries to the compiler and the underlying OS.
+ .
+ To show file names and line numbers in stack traces, the packages
+ libgcj`'GCJ_SO-dbg and binutils are required.
+
+Package: gcj`'PV-jre-lib`'TS
+Section: java
+Architecture: all
+Priority: PRI(optional)
+Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:SoftVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Java runtime library for use with gcj (jar files)
+ This is the jar file that goes along with the gcj front end to gcc.
+
+ifenabled(`gcjbc',`
+Package: libgcj-bc
+Section: java
+Architecture: any
+Priority: PRI(optional)
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:Version}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: Link time only library for use with gcj
+ A fake library that is used at link time only.  It ensures that
+ binaries built with the BC-ABI link against a constant SONAME.
+ This way, BC-ABI binaries continue to work if the SONAME underlying
+ libgcj.so changes.
+')`'dnl gcjbc
+
+Package: libgcj`'LIBGCJ_EXT-awt`'LS
+Section: libs
+Architecture: any
+Priority: PRI(optional)
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+Suggests: ${pkg:gcjqt}
+BUILT_USING`'dnl
+Description: AWT peer runtime libraries for use with gcj
+ These are runtime libraries holding the AWT peer implementations
+ for libgcj (currently the GTK+ based peer library is required, the
+ QT bases library is not built).
+
+ifenabled(`gtkpeer',`
+Package: libgcj`'GCJ_SO-awt-gtk`'LS
+Section: libs
+Architecture: any
+Priority: PRI(optional)
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: SOFTBASEDEP, libgcj`'LIBGCJ_EXT-awt`'LS (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AWT GTK+ peer runtime library for use with libgcj
+ This is the runtime library holding the GTK+ based AWT peer
+ implementation for libgcj.
+')`'dnl gtkpeer
+
+ifenabled(`qtpeer',`
+Package: libgcj`'GCJ_SO-awt-qt`'LS
+Section: libs
+Architecture: any
+Priority: PRI(optional)
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: AWT QT peer runtime library for use with libgcj
+ This is the runtime library holding the QT based AWT peer
+ implementation for libgcj.
+')`'dnl qtpeer
+')`'dnl libgcj
+
+ifenabled(`libgcjdev',`
+Package: libgcj`'GCJ_SO-dev`'LS
+Section: libdevel
+Architecture: any
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Priority: PRI(optional)
+Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), libgcj-bc`'LS, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends}
+Suggests: libgcj-doc
+BUILT_USING`'dnl
+Description: Java development headers for use with gcj
+ These are the development headers that go along with the gcj front end
+ to gcc. libgcj includes parts of the Java Class Libraries, plus glue
+ to connect the libraries to the compiler and the underlying OS.
+
+Package: libgcj`'GCJ_SO-dbg`'LS
+Section: debug
+Architecture: any
+Priority: extra
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+')`'dnl
+Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${misc:Depends}
+Recommends: binutils, libc6-dbg | libc-dbg
+BUILT_USING`'dnl
+Description: Debugging symbols for libraries provided in libgcj`'GCJ_SO-dev
+ The package provides debugging symbols for the libraries provided
+ in libgcj`'GCJ_SO-dev.
+ .
+ binutils is required to show file names and line numbers in stack traces.
+
+ifenabled(`gcjsrc',`
+Package: gcj`'PV-source
+Section: java
+Architecture: all
+Priority: PRI(optional)
+Depends: SOFTBASEDEP, gcj`'PV-jdk (>= ${gcj:SoftVersion}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GCJ java sources for use in IDEs like eclipse and netbeans
+ These are the java source files packaged as a zip file for use in development
+ environments like eclipse and netbeans.
+')`'dnl
+
+ifenabled(`gcjdoc',`
+Package: libgcj-doc
+Section: doc
+Architecture: all
+Priority: PRI(optional)
+Depends: SOFTBASEDEP, ${misc:Depends}
+Enhances: libgcj`'GCJ_SO-dev
+Provides: classpath-doc
+BUILT_USING`'dnl
+Description: libgcj API documentation and example programs
+ Autogenerated documentation describing the API of the libgcj library.
+ Sources and precompiled example programs from the Classpath library.
+')`'dnl gcjdoc
+')`'dnl libgcjdev
+')`'dnl java
+
+ifenabled(`c++',`
+ifenabled(`libcxx',`
+Package: libstdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(important))
+Depends: BASELDEP, ${dep:libc}, ${shlibs:Depends}, ${misc:Depends}
+Provides: ifdef(`TARGET',`libstdc++CXX_SO-TARGET-dcv1',`libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+Breaks: ${multiarch:breaks}, PR66145BREAKS
+')`'dnl
+Conflicts: scim (<< 1.4.2-1)
+Replaces: libstdc++CXX_SO`'PV-dbg`'LS (<< 4.9.0-3)
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libcxx
+
+ifenabled(`lib32cxx',`
+Package: lib32stdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,32), ${shlibs:Depends}, ${misc:Depends}
+Conflicts: ${confl:lib32}
+ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (32 bit Version)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl lib32cxx
+
+ifenabled(`lib64cxx',`
+Package: lib64stdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,64), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (64bit)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl lib64cxx
+
+ifenabled(`libn32cxx',`
+Package: libn32stdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,n32), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (n32)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libn32cxx
+
+ifenabled(`libx32cxx',`
+Package: libx32stdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,x32), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (x32)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libx32cxx
+
+ifenabled(`libhfcxx',`
+Package: libhfstdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,hf), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libhfcxx
+
+ifenabled(`libsfcxx',`
+Package: libsfstdc++CXX_SO`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: ifdef(`TARGET',`devel',`libs')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdep(gcc1,sf), ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-TARGET-dcv1
+',`')`'dnl
+ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI)
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libsfcxx
+
+ifenabled(`libneoncxx',`
+Package: libstdc++CXX_SO-neon`'LS
+Architecture: NEON_ARCHS
+Section: libs
+Priority: extra
+Depends: BASELDEP, libc6-neon`'LS, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 [NEON version]
+ This package contains an additional runtime library for C++ programs
+ built with the GNU compiler.
+ .
+ This set of libraries is optimized to use a NEON coprocessor, and will
+ be selected instead when running under systems which have one.
+')`'dnl
+
+ifenabled(`c++dev',`
+Package: libstdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,,=),
+ libdep(stdc++CXX_SO,,>=), ${dep:libcdev}, ${misc:Depends}
+ifdef(`TARGET',`',`dnl native
+Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev,
+ libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev,
+ libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev
+Suggests: libstdc++`'PV-doc
+')`'dnl native
+Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1')
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libstdc++`'PV-pic`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,),
+ libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+ifdef(`TARGET',`Provides: libstdc++-pic-TARGET-dcv1
+',`')`'dnl
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (shared library subset kit)`'ifdef(`TARGET)',` (TARGET)', `')
+ This is used to develop subsets of the libstdc++ shared libraries for
+ use on custom installation floppies and in embedded systems.
+ .
+ Unless you are making one of those, you will not need this package.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libstdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,),
+ libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+Provides: ifdef(`TARGET',`libstdc++CXX_SO-dbg-TARGET-dcv1',`libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]')
+ifdef(`MULTIARCH', `Multi-Arch: same
+')`'dnl
+Recommends: libdevdep(stdc++`'PV-dev,)
+Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS,
+ libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS,
+ libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS,
+ libstdc++6-4.6-dbg`'LS, libstdc++6-4.7-dbg`'LS, libstdc++6-4.8-dbg`'LS,
+ libstdc++6-4.9-dbg`'LS
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib32stdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,32),
+ libdep(stdc++CXX_SO,32), libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib32stdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,32),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS,
+ lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS,
+ lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS,
+ lib32stdc++6-4.7-dbg`'LS, lib32stdc++6-4.8-dbg`'LS, lib32stdc++6-4.9-dbg`'LS
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib64stdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,64),
+ libdep(stdc++CXX_SO,64), libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: lib64stdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,64),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS,
+ lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS,
+ lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS,
+ lib64stdc++6-4.7-dbg`'LS, lib64stdc++6-4.8-dbg`'LS, lib64stdc++6-4.9-dbg`'LS
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libn32stdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32),
+ libdep(stdc++CXX_SO,n32), libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libn32stdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,n32),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS,
+ libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS,
+ libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS,
+ libn32stdc++6-4.7-dbg`'LS, libn32stdc++6-4.8-dbg`'LS, libn32stdc++6-4.9-dbg`'LS
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+ifenabled(`x32dev',`
+Package: libx32stdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), libdep(stdc++CXX_SO,x32),
+ libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl x32dev
+
+ifenabled(`libx32dbgcxx',`
+Package: libx32stdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,x32),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+Conflicts: libx32stdc++6-dbg`'LS, libx32stdc++6-4.6-dbg`'LS,
+ libx32stdc++6-4.7-dbg`'LS, libx32stdc++6-4.8-dbg`'LS, libx32stdc++6-4.9-dbg`'LS
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libx32dbgcxx
+
+ifenabled(`libhfdbgcxx',`
+Package: libhfstdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf),
+ libdep(stdc++CXX_SO,hf), libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libhfstdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,hf),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+ifdef(`TARGET',`dnl',`Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS, libhfstdc++6-4.7-dbg`'LS, libhfstdc++6-4.8-dbg`'LS, libhfstdc++6-4.9-dbg`'LS, libstdc++'CXX_SO`-armhf [biarchhf_archs]')
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libhfdbgcxx
+
+ifenabled(`libsfdbgcxx',`
+Package: libsfstdc++`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: ifdef(`TARGET',`devel',`libdevel')
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf),
+ libdep(stdc++CXX_SO,sf), libdevdep(stdc++`'PV-dev,), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `')
+ This package contains the headers and static library files necessary for
+ building C++ programs which use libstdc++.
+ .
+ libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which
+ was included up to g++-2.95. The first version of libstdc++-v3 appeared
+ in g++-3.0.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+
+Package: libsfstdc++CXX_SO`'PV-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: debug
+Priority: extra
+Depends: BASELDEP, libdep(stdc++CXX_SO,sf),
+ libdevdep(stdc++`'PV-dev,), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}),
+ ${shlibs:Depends}, ${misc:Depends}
+ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1
+',`')`'dnl
+ifdef(`TARGET',`dnl',`Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS, libsfstdc++6-4.7-dbg`'LS, libsfstdc++6-4.8-dbg`'LS, libsfstdc++6-4.9-dbg`'LS, libstdc++'CXX_SO`-armel [biarchsf_archs]')
+BUILT_USING`'dnl
+Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `')
+ This package contains the shared library of libstdc++ compiled with
+ debugging symbols.
+ifdef(`TARGET', `dnl
+ .
+ This package contains files for TARGET architecture, for use in cross-compile
+ environment.
+')`'dnl
+')`'dnl libsfdbgcxx
+
+ifdef(`TARGET', `', `
+Package: libstdc++`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends}
+Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc,
+ libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc,
+ libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc, libstdc++6-4.7-doc,
+ libstdc++-4.8-doc, libstdc++-4.9-doc
+Description: GNU Standard C++ Library v3 (documentation files)
+ This package contains documentation files for the GNU stdc++ library.
+ .
+ One set is the distribution documentation, the other set is the
+ source documentation including a namespace list, class hierarchy,
+ alphabetical list, compound list, file list, namespace members,
+ compound members and file members.
+')`'dnl native
+')`'dnl c++dev
+')`'dnl c++
+
+ifenabled(`ada',`
+Package: gnat`'-GNAT_V`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Depends: BASEDEP, gcc`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends}
+Suggests: gnat`'PV-doc, ada-reference-manual-2012, gnat`'-GNAT_V-sjlj
+Breaks:   gnat (<< 4.6.1), dh-ada-library (<< 6.0), gnat-4.6-base (= 4.6.4-2),
+ gnat-4.9-base (= 4.9-20140330-1)
+Replaces: gnat (<< 4.6.1), dh-ada-library (<< 6.0), gnat-4.6-base (= 4.6.4-2),
+ gnat-4.9-base (= 4.9-20140330-1)
+# Takes over symlink from gnat (<< 4.6.1): /usr/bin/gnatgcc.
+# Takes over file from dh-ada-library (<< 6.0): debian_packaging.mk.
+# g-base 4.6.4-2, 4.9-20140330-1 contain debian_packaging.mk by mistake.
+# Newer versions of gnat and dh-ada-library will not provide these files.
+Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5,
+ gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6, gnat-4.7, gnat-4.8,
+ gnat-4.9
+# These other packages will continue to provide /usr/bin/gnatmake and
+# other files.
+BUILT_USING`'dnl
+Description: GNU Ada compiler
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ This package provides the compiler, tools and runtime library that handles
+ exceptions using the default zero-cost mechanism.
+
+ifenabled(`adasjlj',`
+Package: gnat`'-GNAT_V-sjlj`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: extra
+ifdef(`MULTIARCH', `Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Depends: BASEDEP, gnat`'-GNAT_V`'TS (= ${gnat:Version}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Ada compiler (setjump/longjump runtime library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ This package provides an alternative runtime library that handles
+ exceptions using the setjump/longjump mechanism (as a static library
+ only).  You can install it to supplement the normal compiler.
+')`'dnl adasjlj
+
+ifenabled(`libgnat',`
+Package: libgnat`'-GNAT_V`'LS
+Section: ifdef(`TARGET',`devel',`libs')
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: BASELDEP, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: runtime for applications compiled with GNAT (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnat`'-GNAT_V-dbg`'LS
+Section: debug
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: extra
+Depends: BASELDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends}
+BUILT_USING`'dnl
+Description: runtime for applications compiled with GNAT (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the debugging symbols.
+
+Package: libgnatvsn`'GNAT_V-dev`'LS
+Section: libdevel
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Priority: extra
+Depends: BASELDEP, gnat`'PV`'TS (ifdef(`TARGET',`>= ${gnat:SoftVersion}',`= ${gnat:Version}')),
+ libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends}
+Conflicts: libgnatvsn-dev (<< `'GNAT_V),
+ libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev,
+ libgnatvsn4.5-dev, libgnatvsn4.6-dev, libgnatvsn4.9-dev,
+BUILT_USING`'dnl
+Description: GNU Ada compiler selected components (development files)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the development files and static library.
+
+Package: libgnatvsn`'GNAT_V`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Section: ifdef(`TARGET',`devel',`libs')
+Depends: BASELDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Ada compiler selected components (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnatvsn`'GNAT_V-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: extra
+Section: debug
+Depends: BASELDEP, libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends}
+Suggests: gnat
+BUILT_USING`'dnl
+Description: GNU Ada compiler selected components (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnatvsn library exports selected GNAT components for use in other
+ packages, most notably ASIS tools. It is licensed under the GNAT-Modified
+ GPL, allowing to link proprietary programs with it.
+ .
+ This package contains the debugging symbols.
+
+Package: libgnatprj`'GNAT_V-dev`'LS
+Section: libdevel
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+Priority: extra
+Depends: BASELDEP, gnat`'PV`'TS (ifdef(`TARGET',`>= ${gnat:SoftVersion}',`= ${gnat:Version}')),
+ libgnatprj`'GNAT_V`'LS (= ${gnat:Version}),
+ libgnatvsn`'GNAT_V-dev`'LS (= ${gnat:Version}), ${misc:Depends}
+Conflicts: libgnatprj-dev (<< `'GNAT_V),
+ libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev,
+ libgnatprj4.5-dev, libgnatprj4.6-dev, libgnatprj4.9-dev,
+BUILT_USING`'dnl
+Description: GNU Ada compiler Project Manager (development files)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the development files and static library.
+
+Package: libgnatprj`'GNAT_V`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Section: ifdef(`TARGET',`devel',`libs')
+Depends: BASELDEP, libgnat`'-GNAT_V`'LS (= ${gnat:Version}),
+ libgnatvsn`'GNAT_V`'LS (= ${gnat:Version}),
+ ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: GNU Ada compiler Project Manager (shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the runtime shared library.
+
+Package: libgnatprj`'GNAT_V-dbg`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`any')
+ifdef(`MULTIARCH', `Multi-Arch: same
+Pre-Depends: ${misc:Pre-Depends}
+')`'dnl
+Priority: extra
+Section: debug
+Depends: BASELDEP, libgnatprj`'GNAT_V`'LS (= ${gnat:Version}), ${misc:Depends}
+Suggests: gnat
+BUILT_USING`'dnl
+Description: GNU Ada compiler Project Manager (debugging symbols)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ GNAT uses project files to organise source and object files in large-scale
+ development efforts. The libgnatprj library exports GNAT project files
+ management for use in other packages, most notably ASIS tools (package
+ asis-programs) and GNAT Programming Studio (package gnat-gps). It is
+ licensed under the pure GPL; all programs that use it must also be
+ distributed under the GPL, or not distributed at all.
+ .
+ This package contains the debugging symbols.
+')`'dnl libgnat
+
+ifenabled(`lib64gnat',`
+Package: lib64gnat`'-GNAT_V
+Section: libs
+Architecture: biarch64_archs
+Priority: PRI(optional)
+Depends: BASELDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: runtime for applications compiled with GNAT (64 bits shared library)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the runtime shared library for 64 bits architectures.
+')`'dnl libgnat
+
+ifenabled(`gfdldoc',`
+Package: gnat`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Suggests: gnat`'PV
+Conflicts: gnat-4.1-doc, gnat-4.2-doc,
+  gnat-4.3-doc, gnat-4.4-doc,
+  gnat-4.6-doc, gnat-4.9-doc
+BUILT_USING`'dnl
+Description: GNU Ada compiler (documentation)
+ GNAT is a compiler for the Ada programming language. It produces optimized
+ code on platforms supported by the GNU Compiler Collection (GCC).
+ .
+ The libgnat library provides runtime components needed by most
+ applications produced with GNAT.
+ .
+ This package contains the documentation in info `format'.
+')`'dnl gfdldoc
+')`'dnl ada
+
+ifenabled(`d ',`
+Package: gdc`'PV`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: SOFTBASEDEP, g++`'PV`'TS (>= ${gcc:SoftVersion}), ${dep:gdccross}, ${dep:phobosdev}, ${shlibs:Depends}, ${misc:Depends}
+Provides: gdc, d-compiler, d-v2-compiler
+Replaces: gdc (<< 4.4.6-5),
+  libphobos`'PV-dev`'LS (<< 5.4.0-1~)
+BUILT_USING`'dnl
+Description: GNU D compiler (version 2)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU D compiler, which compiles D on platforms supported by gcc.
+ It uses the gcc backend to generate optimised code.
+ .
+ This compiler supports D language version 2.
+
+ifenabled(`multilib',`
+Package: gdc`'PV-multilib`'TS
+Architecture: any
+ifdef(`TARGET',`Multi-Arch: foreign
+')dnl
+Priority: ifdef(`TARGET',`extra',`PRI(optional)')
+Depends: SOFTBASEDEP, gdc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libphobosbiarchdev}${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Replaces: lib32phobos`'PV-dev`'LS (<< 5.4.0-1~),
+  lib64phobos`'PV-dev`'LS (<< 5.4.0-1~),
+  libx32phobos`'PV-dev`'LS (<< 5.4.0-1~),
+  libhfphobos`'PV-dev`'LS (<< 5.4.0-1~),
+  libsfphobos`'PV-dev`'LS (<< 5.4.0-1~),
+  libn32phobos`'PV-dev`'LS (<< 5.4.0-1~),
+Description: GNU D compiler (version 2, multilib support)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `')
+ This is the GNU D compiler, which compiles D on platforms supported by gcc.
+ It uses the gcc backend to generate optimised code.
+ .
+ This is a dependency package, depending on development packages
+ for the non-default multilib architecture(s).
+')`'dnl multilib
+
+ifenabled(`libphobos',`
+Package: libphobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+#Package: libphobos`'PHOBOS_V`'PV`'TS-dbg
+#Section: debug
+#Architecture: ifdef(`TARGET',`CROSS_ARCH',`libphobos_archs')
+#Priority: extra
+#Depends: BASELDEP, libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends}
+#Provides: libphobos`'PHOBOS_V`'TS-dbg
+#BUILT_USING`'dnl
+#Description: The Phobos D standard library (debug symbols)
+# This is the Phobos standard library that comes with the D2 compiler.
+# .
+# For more information check http://www.dlang.org/phobos/
+
+Package: lib64phobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,64), lib64z1-dev, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (64bit development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: lib32phobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,32), lib32z1-dev, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (64bit development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+ifenabled(`libn32phobos',`
+Package: libn32phobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,n32), libn32z1-dev, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (n32 development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+')`'dnl libn32phobos
+
+ifenabled(`libx32phobos',`
+Package: libx32phobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,x32), ${dep:libx32z}, ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (x32 development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+')`'dnl libx32phobos
+
+ifenabled(`armml',`
+Package: libhfphobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,hf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (hard float ABI development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+
+Package: libsfphobos`'PV-dev`'LS
+Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs')
+Section: libdevel
+Priority: ifdef(`TARGET',`extra',PRI(optional))
+Depends: BASELDEP, libdevdep(gcc`'PV-dev,sf), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Phobos D standard library (soft float ABI development files)
+ This is the Phobos standard library that comes with the D2 compiler.
+ .
+ For more information check http://www.dlang.org/phobos/
+')`'dnl armml
+')`'dnl libphobos
+')`'dnl d
+
+ifdef(`TARGET',`',`dnl
+ifenabled(`libs',`
+#Package: gcc`'PV-soft-float
+#Architecture: arm armel armhf
+#Priority: PRI(optional)
+#Depends: BASEDEP, depifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends}
+#Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float
+#BUILT_USING`'dnl
+#Description: GCC soft-floating-point gcc libraries (ARM)
+# These are versions of basic static libraries such as libgcc.a compiled
+# with the -msoft-float option, for CPUs without a floating-point unit.
+')`'dnl commonlibs
+')`'dnl
+
+ifenabled(`fixincl',`
+Package: fixincludes
+Architecture: any
+Priority: PRI(optional)
+Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends}
+BUILT_USING`'dnl
+Description: Fix non-ANSI header files
+ FixIncludes was created to fix non-ANSI system header files. Many
+ system manufacturers supply proprietary headers that are not ANSI compliant.
+ The GNU compilers cannot compile non-ANSI headers. Consequently, the
+ FixIncludes shell script was written to fix the header files.
+ .
+ Not all packages with header files are installed on the system, when the
+ package is built, so we make fixincludes available at build time of other
+ packages, such that checking tools like lintian can make use of it.
+')`'dnl fixincl
+
+ifenabled(`cdev',`
+ifdef(`TARGET', `', `
+ifenabled(`gfdldoc',`
+Package: gcc`'PV-doc
+Architecture: all
+Section: doc
+Priority: PRI(optional)
+Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends}
+Conflicts: gcc-docs (<< 2.95.2)
+Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2)
+Description: Documentation for the GNU compilers (gcc, gobjc, g++)
+ Documentation for the GNU compilers in info `format'.
+')`'dnl gfdldoc
+')`'dnl native
+')`'dnl cdev
+
+ifdef(`TARGET',`',`dnl
+ifenabled(`libnof',`
+#Package: gcc`'PV-nof
+#Architecture: powerpc
+#Priority: PRI(optional)
+#Depends: BASEDEP, ${shlibs:Depends}ifenabled(`cdev',`, gcc`'PV (= ${gcc:Version})'), ${misc:Depends}
+#Conflicts: gcc-3.2-nof
+#BUILT_USING`'dnl
+#Description: GCC no-floating-point gcc libraries (powerpc)
+# These are versions of basic static libraries such as libgcc.a compiled
+# with the -msoft-float option, for CPUs without a floating-point unit.
+')`'dnl libnof
+')`'dnl
+
+ifenabled(`source',`
+Package: gcc`'PV-source
+Architecture: all
+Priority: PRI(optional)
+Depends: make, autoconf2.64, quilt, patchutils, gawk, ${misc:Depends}
+Description: Source of the GNU Compiler Collection
+ This package contains the sources and patches which are needed to
+ build the GNU Compiler Collection (GCC).
+')`'dnl source
+dnl
+')`'dnl gcc-X.Y
+dnl last line in file
--- gcc-5-5.4.0.orig/debian/copyright
+++ gcc-5-5.4.0/debian/copyright
@@ -0,0 +1,692 @@
+This is the Debian GNU/Linux prepackaged version of the GNU compiler
+collection, containing Ada, C, C++, Fortran 95, Java, Objective-C,
+Objective-C++, and Treelang compilers, documentation, and support
+libraries.  In addition, Debian provides the gdc compiler, either in
+the same source package, or built from a separate same source package.
+Packaging is done by the Debian GCC Maintainers
+<debian-gcc@lists.debian.org>, with sources obtained from:
+
+  ftp://gcc.gnu.org/pub/gcc/releases/  (for full releases)
+  svn://gcc.gnu.org/svn/gcc/           (for prereleases)
+  http://bitbucket.org/goshawk/gdc     (for D)
+
+The current gcc-5 source package is taken from the SVN gcc-5-branch.
+
+Changes: See changelog.Debian.gz
+
+Debian splits the GNU Compiler Collection into packages for each language,
+library, and documentation as follows:
+
+Language       Compiler package  Library package    Documentation
+---------------------------------------------------------------------------
+Ada            gnat-5          libgnat-5        gnat-5-doc
+C              gcc-5                              gcc-5-doc
+C++            g++-5           libstdc++6         libstdc++6-5-doc
+D              gdc-5
+Fortran 95     gfortran-5      libgfortran3       gfortran-5-doc
+Go             gccgo-5         libgo0
+Java           gcj-5           libgcj10           libgcj-doc
+Objective C    gobjc-5         libobjc2
+Objective C++  gobjc++-5
+
+For some language run-time libraries, Debian provides source files,
+development files, debugging symbols and libraries containing position-
+independent code in separate packages:
+
+Language  Sources      Development   Debugging            Position-Independent
+------------------------------------------------------------------------------
+C++                                  libstdc++6-5-dbg  libstdc++6-5-pic
+D         libphobos-5-dev
+Java      libgcj10-src libgcj10-dev  libgcj10-dbg
+
+Additional packages include:
+
+All languages:
+libgcc1, libgcc2, libgcc4       GCC intrinsics (platform-dependent)
+gcc-5-base                    Base files common to all compilers
+gcc-5-soft-float              Software floating point (ARM only)
+gcc-5-source                  The sources with patches
+
+Ada:
+libgnatvsn-dev, libgnatvsn5   GNAT version library
+libgnatprj-dev, libgnatprj5   GNAT Project Manager library
+
+C:
+cpp-5, cpp-5-doc            GNU C Preprocessor
+libssp0-dev, libssp0            GCC stack smashing protection library
+libquadmath0                    Math routines for the __float128 type
+fixincludes                     Fix non-ANSI header files
+
+Java:
+gij                             The Java bytecode interpreter and VM
+libgcj-common                   Common files for the Java run-time
+libgcj10-awt                    The Abstract Windowing Toolkit
+libgcj10-jar                    Java ARchive for the Java run-time
+
+C, C++ and Fortran 95:
+libgomp1-dev, libgomp1		GCC OpenMP (GOMP) support library
+libitm1-dev, libitm1		GNU Transactional Memory Library
+
+Biarch support: On some 64-bit platforms which can also run 32-bit code,
+Debian provides additional packages containing 32-bit versions of some
+libraries.  These packages have names beginning with 'lib32' instead of
+'lib', for example lib32stdc++6.  Similarly, on some 32-bit platforms which
+can also run 64-bit code, Debian provides additional packages with names
+beginning with 'lib64' instead of 'lib'.  These packages contain 64-bit
+versions of the libraries.  (At this time, not all platforms and not all
+libraries support biarch.)  The license terms for these lib32 or lib64
+packages are identical to the ones for the lib packages.
+
+
+COPYRIGHT STATEMENTS AND LICENSING TERMS
+
+
+GCC is Copyright (C) 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994,
+1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2009, 2010, 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Files that have exception clauses are licensed under the terms of the
+GNU General Public License; either version 3, or (at your option) any
+later version.
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', version 3 of this
+license in `/usr/share/common-licenses/GPL-3'.
+
+The following runtime libraries are licensed under the terms of the
+GNU General Public License (v3 or later) with version 3.1 of the GCC
+Runtime Library Exception (included in this file):
+
+ - libgcc (libgcc/, gcc/libgcc2.[ch], gcc/unwind*, gcc/gthr*,
+   gcc/coretypes.h, gcc/crtstuff.c, gcc/defaults.h, gcc/dwarf2.h,
+   gcc/emults.c, gcc/gbl-ctors.h, gcc/gcov-io.h, gcc/libgcov.c,
+   gcc/tsystem.h, gcc/typeclass.h).
+ - libatomic
+ - libdecnumber
+ - libgomp
+ - libitm
+ - libssp
+ - libstdc++-v3
+ - libobjc
+ - libgfortran
+ - The libgnat-5 Ada support library and libgnatvsn library.
+ - Various config files in gcc/config/ used in runtime libraries.
+ - libvtv
+
+In contrast, libgnatprj is licensed under the terms of the pure GNU
+General Public License.
+
+The libbacktrace library is licensed under the following terms:
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+    (1) Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer. 
+
+    (2) Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.  
+    
+    (3) The name of the author may not be used to
+    endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+
+The libsanitizer libraries (libasan, liblsan, libtsan, libubsan) are
+licensed under the following terms:
+
+Copyright (c) 2009-2014 by the LLVM contributors.
+
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
+
+
+The libgcj library is licensed under the terms of the GNU General
+Public License, with a special exception:
+
+    Linking this library statically or dynamically with other modules
+    is making a combined work based on this library.  Thus, the terms
+    and conditions of the GNU General Public License cover the whole
+    combination.
+
+    As a special exception, the copyright holders of this library give
+    you permission to link this library with independent modules to
+    produce an executable, regardless of the license terms of these
+    independent modules, and to copy and distribute the resulting
+    executable under terms of your choice, provided that you also
+    meet, for each linked independent module, the terms and conditions
+    of the license of that module.  An independent module is a module
+    which is not derived from or based on this library.  If you modify
+    this library, you may extend this exception to your version of the
+    library, but you are not obligated to do so.  If you do not wish
+    to do so, delete this exception statement from your version.
+
+The libffi library is licensed under the following terms:
+
+    libffi - Copyright (c) 1996-2003  Red Hat, Inc.
+
+    Permission is hereby granted, free of charge, to any person obtaining
+    a copy of this software and associated documentation files (the
+    ``Software''), to deal in the Software without restriction, including
+    without limitation the rights to use, copy, modify, merge, publish,
+    distribute, sublicense, and/or sell copies of the Software, and to
+    permit persons to whom the Software is furnished to do so, subject to
+    the following conditions:
+
+    The above copyright notice and this permission notice shall be included
+    in all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
+    OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+    IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+    OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+    ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+    OTHER DEALINGS IN THE SOFTWARE.
+
+
+The documentation is licensed under the GNU Free Documentation License (v1.2).
+On Debian GNU/Linux systems, the complete text of this license is in
+`/usr/share/common-licenses/GFDL-1.2'.
+
+
+GCC RUNTIME LIBRARY EXCEPTION
+
+Version 3.1, 31 March 2009
+
+Copyright (C) 2009 Free Software Foundation, Inc. <http://fsf.org/>
+
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
+
+This GCC Runtime Library Exception ("Exception") is an additional
+permission under section 7 of the GNU General Public License, version
+3 ("GPLv3"). It applies to a given file (the "Runtime Library") that
+bears a notice placed by the copyright holder of the file stating that
+the file is governed by GPLv3 along with this Exception.
+
+When you use GCC to compile a program, GCC may combine portions of
+certain GCC header files and runtime libraries with the compiled
+program. The purpose of this Exception is to allow compilation of
+non-GPL (including proprietary) programs to use, in this way, the
+header files and runtime libraries covered by this Exception.
+
+0. Definitions.
+
+A file is an "Independent Module" if it either requires the Runtime
+Library for execution after a Compilation Process, or makes use of an
+interface provided by the Runtime Library, but is not otherwise based
+on the Runtime Library.
+
+"GCC" means a version of the GNU Compiler Collection, with or without
+modifications, governed by version 3 (or a specified later version) of
+the GNU General Public License (GPL) with the option of using any
+subsequent versions published by the FSF.
+
+"GPL-compatible Software" is software whose conditions of propagation,
+modification and use would permit combination with GCC in accord with
+the license of GCC.
+
+"Target Code" refers to output from any compiler for a real or virtual
+target processor architecture, in executable form or suitable for
+input to an assembler, loader, linker and/or execution
+phase. Notwithstanding that, Target Code does not include data in any
+format that is used as a compiler intermediate representation, or used
+for producing a compiler intermediate representation.
+
+The "Compilation Process" transforms code entirely represented in
+non-intermediate languages designed for human-written code, and/or in
+Java Virtual Machine byte code, into Target Code. Thus, for example,
+use of source code generators and preprocessors need not be considered
+part of the Compilation Process, since the Compilation Process can be
+understood as starting with the output of the generators or
+preprocessors.
+
+A Compilation Process is "Eligible" if it is done using GCC, alone or
+with other GPL-compatible software, or if it is done without using any
+work based on GCC. For example, using non-GPL-compatible Software to
+optimize any GCC intermediate representations would not qualify as an
+Eligible Compilation Process.
+
+1. Grant of Additional Permission.
+
+You have permission to propagate a work of Target Code formed by
+combining the Runtime Library with Independent Modules, even if such
+propagation would otherwise violate the terms of GPLv3, provided that
+all Target Code was generated by Eligible Compilation Processes. You
+may then convey such a combination under terms of your choice,
+consistent with the licensing of the Independent Modules.
+
+2. No Weakening of GCC Copyleft.
+
+The availability of this Exception does not imply any general
+presumption that third-party software is unaffected by the copyleft
+requirements of the license of GCC.
+
+
+libquadmath/*.[hc]:
+
+   Copyright (C) 2010 Free Software Foundation, Inc.
+   Written by Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+   Written by Tobias Burnus  <burnus@net-b.de>
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+libquadmath/gdtoa:
+
+The author of this software is David M. Gay.
+
+Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies
+All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and
+its documentation for any purpose and without fee is hereby
+granted, provided that the above copyright notice appear in all
+copies and that both that the copyright notice and this
+permission notice and warranty disclaimer appear in supporting
+documentation, and that the name of Lucent or any of its entities
+not be used in advertising or publicity pertaining to
+distribution of the software without specific, written prior
+permission.
+
+LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.
+IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY
+SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
+IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
+THIS SOFTWARE.
+
+libquadmath/math:
+
+atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c:
+    Copyright 2001 by Stephen L. Moshier <moshier@na-net.ornl.gov> 
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c:
+   Changes for 128-bit __float128 are
+   Copyright (C) 2001 Stephen L. Moshier <moshier@na-net.ornl.gov>
+   and are incorporated herein by permission of the author.  The author 
+   reserves the right to distribute this material elsewhere under different
+   copying permissions.  These modifications are distributed here under 
+   the following terms:
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+ldexpq.c:
+   * Conversion to long double by Ulrich Drepper,
+   * Cygnus Support, drepper@cygnus.com.
+
+cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c,
+sinq_kernel.c, truncq.c:
+   Copyright (C) 1997, 1999 Free Software Foundation, Inc.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+isinfq.c:
+ * Written by J.T. Conklin <jtc@netbsd.org>.
+ * Change for long double by Jakub Jelinek <jj@ultra.linux.cz>
+ * Public domain.
+
+llroundq.c, lroundq.c, tgammaq.c:
+   Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997 and
+                  Jakub Jelinek <jj@ultra.linux.cz>, 1999.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+log10q.c:
+   Cephes Math Library Release 2.2:  January, 1991
+   Copyright 1984, 1991 by Stephen L. Moshier
+   Adapted for glibc November, 2001
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+remaining files:
+
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+
+
+libjava/classpath/resource/gnu/java/locale/*
+
+They are copyrighted and covered by the terms of use:
+http://www.unicode.org/copyright.html
+
+EXHIBIT 1
+UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE
+
+ Unicode Data Files include all data files under the directories 
+http://www.unicode.org/Public/ and http://www.unicode.org/reports/. 
+Unicode Software includes any source code published in the Unicode Standard or 
+under the directories http://www.unicode.org/Public/ and 
+http://www.unicode.org/reports/.
+
+NOTICE TO USER: Carefully read the following legal agreement. BY DOWNLOADING, 
+INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S DATA FILES ("DATA FILES"), 
+AND/OR SOFTWARE ("SOFTWARE"), YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, 
+ALL OF THE TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, 
+DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE.
+
+	    COPYRIGHT AND PERMISSION NOTICE
+
+Copyrigh (c) 1991-2011 Unicode, Inc. All rights reserved. 
+Distributed under the Terms of Use in http://www.unicode.org/copyright.html.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy 
+of the Unicode data files and any associated documentation (the "Data Files") 
+or Unicode software and any associated documentation (the "Software") to deal 
+in the Data Files or Software without restriction, including without limitation 
+the rights to use, copy, modify, merge, publish, distribute, and/or sell copies
+ of the Data Files or Software, and to permit persons to whom the Data Files 
+or Software are furnished to do so, provided that (a) the above copyright notice(s) 
+and this permission notice appear with all copies of the Data Files or Software, 
+(b) both the above copyright notice(s) and this permission notice appear 
+in associated documentation, and (c) there is clear notice in each modified 
+Data File or in the Software as well as in the documentation associated with 
+the Data File(s) or Software that the data or software has been modified.
+
+THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE BE LIABLE
+ FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES 
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF 
+CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 
+WITH THE USE OR PERFORMANCE OF THE DATA FILES OR SOFTWARE.
+
+Except as contained in this notice, the name of a copyright holder shall not be used
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+Data Files or Software without prior written authorization of the copyright holder.
+
+Unicode and the Unicode logo are trademarks of Unicode, Inc., and may be registered
+ in some jurisdictions. All other trademarks and registered trademarks mentioned 
+herein are the property of their respective owners.
+
+
+gcc/go/gofrontend, libgo:
+
+Copyright (c) 2009 The Go Authors. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+   * Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+   * Redistributions in binary form must reproduce the above
+copyright notice, this list of conditions and the following disclaimer
+in the documentation and/or other materials provided with the
+distribution.
+   * Neither the name of Google Inc. nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+libcilkrts, libmpx:
+ Copyright (C) 2009-2014, Intel Corporation
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+   * Neither the name of Intel Corporation nor the names of its
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+
+
+D:
+gdc-5                         GNU D Compiler
+libphobos-5-dev               D standard runtime library
+
+The D source package is made up of the following components.
+
+The D front-end for GCC:
+ - d/*
+
+Copyright (C) 2004-2007 David Friedman
+Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', version 2 of this
+license in `/usr/share/common-licenses/GPL-2'.
+
+
+The DMD Compiler implementation of the D programming language:
+ - d/dmd/*
+
+Copyright (c) 1999-2010 by Digital Mars
+All Rights Reserved
+written by Walter Bright
+http://www.digitalmars.com
+License for redistribution is by either the Artistic License or
+the GNU General Public License (v1).
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', the Artistic
+license in `/usr/share/common-licenses/Artistic'.
+
+
+The Zlib data compression library:
+ - d/phobos/etc/c/zlib/*
+
+ (C) 1995-2004 Jean-loup Gailly and Mark Adler
+
+  This software is provided 'as-is', without any express or implied
+  warranty.  In no event will the authors be held liable for any damages
+  arising from the use of this software.
+
+  Permission is granted to anyone to use this software for any purpose,
+  including commercial applications, and to alter it and redistribute it
+  freely, subject to the following restrictions:
+
+  1. The origin of this software must not be misrepresented; you must not
+     claim that you wrote the original software. If you use this software
+     in a product, an acknowledgment in the product documentation would be
+     appreciated but is not required.
+  2. Altered source versions must be plainly marked as such, and must not be
+     misrepresented as being the original software.
+  3. This notice may not be removed or altered from any source distribution.
+
+
+The Phobos standard runtime library:
+ - d/phobos/*
+
+Unless otherwise marked within the file, each file in the source
+is under the following licenses:
+
+Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com
+Written by Walter Bright
+
+This software is provided 'as-is', without any express or implied
+warranty. In no event will the authors be held liable for any damages
+arising from the use of this software.
+
+Permission is granted to anyone to use this software for any purpose,
+including commercial applications, and to alter it and redistribute it
+freely, in both source and binary form, subject to the following
+restrictions:
+
+ o  The origin of this software must not be misrepresented; you must not
+    claim that you wrote the original software. If you use this software
+    in a product, an acknowledgment in the product documentation would be
+    appreciated but is not required.
+ o  Altered source versions must be plainly marked as such, and must not
+    be misrepresented as being the original software.
+ o  This notice may not be removed or altered from any source
+    distribution.
+
+By plainly marking modifications, something along the lines of adding to each
+file that has been changed a "Modified by Foo Bar" line
+underneath the "Written by" line would be adequate.
+
--- gcc-5-5.4.0.orig/debian/copyright.in
+++ gcc-5-5.4.0/debian/copyright.in
@@ -0,0 +1,692 @@
+This is the Debian GNU/Linux prepackaged version of the GNU compiler
+collection, containing Ada, C, C++, Fortran 95, Java, Objective-C,
+Objective-C++, and Treelang compilers, documentation, and support
+libraries.  In addition, Debian provides the gdc compiler, either in
+the same source package, or built from a separate same source package.
+Packaging is done by the Debian GCC Maintainers
+<debian-gcc@lists.debian.org>, with sources obtained from:
+
+  ftp://gcc.gnu.org/pub/gcc/releases/  (for full releases)
+  svn://gcc.gnu.org/svn/gcc/           (for prereleases)
+  http://bitbucket.org/goshawk/gdc     (for D)
+
+The current gcc-@BV@ source package is taken from the SVN @SVN_BRANCH@.
+
+Changes: See changelog.Debian.gz
+
+Debian splits the GNU Compiler Collection into packages for each language,
+library, and documentation as follows:
+
+Language       Compiler package  Library package    Documentation
+---------------------------------------------------------------------------
+Ada            gnat-@BV@          libgnat-@BV@        gnat-@BV@-doc
+C              gcc-@BV@                              gcc-@BV@-doc
+C++            g++-@BV@           libstdc++6         libstdc++6-@BV@-doc
+D              gdc-@BV@
+Fortran 95     gfortran-@BV@      libgfortran3       gfortran-@BV@-doc
+Go             gccgo-@BV@         libgo0
+Java           gcj-@BV@           libgcj10           libgcj-doc
+Objective C    gobjc-@BV@         libobjc2
+Objective C++  gobjc++-@BV@
+
+For some language run-time libraries, Debian provides source files,
+development files, debugging symbols and libraries containing position-
+independent code in separate packages:
+
+Language  Sources      Development   Debugging            Position-Independent
+------------------------------------------------------------------------------
+C++                                  libstdc++6-@BV@-dbg  libstdc++6-@BV@-pic
+D         libphobos-@BV@-dev
+Java      libgcj10-src libgcj10-dev  libgcj10-dbg
+
+Additional packages include:
+
+All languages:
+libgcc1, libgcc2, libgcc4       GCC intrinsics (platform-dependent)
+gcc-@BV@-base                    Base files common to all compilers
+gcc-@BV@-soft-float              Software floating point (ARM only)
+gcc-@BV@-source                  The sources with patches
+
+Ada:
+libgnatvsn-dev, libgnatvsn@BV@   GNAT version library
+libgnatprj-dev, libgnatprj@BV@   GNAT Project Manager library
+
+C:
+cpp-@BV@, cpp-@BV@-doc            GNU C Preprocessor
+libssp0-dev, libssp0            GCC stack smashing protection library
+libquadmath0                    Math routines for the __float128 type
+fixincludes                     Fix non-ANSI header files
+
+Java:
+gij                             The Java bytecode interpreter and VM
+libgcj-common                   Common files for the Java run-time
+libgcj10-awt                    The Abstract Windowing Toolkit
+libgcj10-jar                    Java ARchive for the Java run-time
+
+C, C++ and Fortran 95:
+libgomp1-dev, libgomp1		GCC OpenMP (GOMP) support library
+libitm1-dev, libitm1		GNU Transactional Memory Library
+
+Biarch support: On some 64-bit platforms which can also run 32-bit code,
+Debian provides additional packages containing 32-bit versions of some
+libraries.  These packages have names beginning with 'lib32' instead of
+'lib', for example lib32stdc++6.  Similarly, on some 32-bit platforms which
+can also run 64-bit code, Debian provides additional packages with names
+beginning with 'lib64' instead of 'lib'.  These packages contain 64-bit
+versions of the libraries.  (At this time, not all platforms and not all
+libraries support biarch.)  The license terms for these lib32 or lib64
+packages are identical to the ones for the lib packages.
+
+
+COPYRIGHT STATEMENTS AND LICENSING TERMS
+
+
+GCC is Copyright (C) 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994,
+1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2009, 2010, 2011, 2012, 2013, 2014 Free Software Foundation, Inc.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Files that have exception clauses are licensed under the terms of the
+GNU General Public License; either version 3, or (at your option) any
+later version.
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', version 3 of this
+license in `/usr/share/common-licenses/GPL-3'.
+
+The following runtime libraries are licensed under the terms of the
+GNU General Public License (v3 or later) with version 3.1 of the GCC
+Runtime Library Exception (included in this file):
+
+ - libgcc (libgcc/, gcc/libgcc2.[ch], gcc/unwind*, gcc/gthr*,
+   gcc/coretypes.h, gcc/crtstuff.c, gcc/defaults.h, gcc/dwarf2.h,
+   gcc/emults.c, gcc/gbl-ctors.h, gcc/gcov-io.h, gcc/libgcov.c,
+   gcc/tsystem.h, gcc/typeclass.h).
+ - libatomic
+ - libdecnumber
+ - libgomp
+ - libitm
+ - libssp
+ - libstdc++-v3
+ - libobjc
+ - libgfortran
+ - The libgnat-@BV@ Ada support library and libgnatvsn library.
+ - Various config files in gcc/config/ used in runtime libraries.
+ - libvtv
+
+In contrast, libgnatprj is licensed under the terms of the pure GNU
+General Public License.
+
+The libbacktrace library is licensed under the following terms:
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+    (1) Redistributions of source code must retain the above copyright
+    notice, this list of conditions and the following disclaimer. 
+
+    (2) Redistributions in binary form must reproduce the above copyright
+    notice, this list of conditions and the following disclaimer in
+    the documentation and/or other materials provided with the
+    distribution.  
+    
+    (3) The name of the author may not be used to
+    endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+
+The libsanitizer libraries (libasan, liblsan, libtsan, libubsan) are
+licensed under the following terms:
+
+Copyright (c) 2009-2014 by the LLVM contributors.
+
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
+
+
+The libgcj library is licensed under the terms of the GNU General
+Public License, with a special exception:
+
+    Linking this library statically or dynamically with other modules
+    is making a combined work based on this library.  Thus, the terms
+    and conditions of the GNU General Public License cover the whole
+    combination.
+
+    As a special exception, the copyright holders of this library give
+    you permission to link this library with independent modules to
+    produce an executable, regardless of the license terms of these
+    independent modules, and to copy and distribute the resulting
+    executable under terms of your choice, provided that you also
+    meet, for each linked independent module, the terms and conditions
+    of the license of that module.  An independent module is a module
+    which is not derived from or based on this library.  If you modify
+    this library, you may extend this exception to your version of the
+    library, but you are not obligated to do so.  If you do not wish
+    to do so, delete this exception statement from your version.
+
+The libffi library is licensed under the following terms:
+
+    libffi - Copyright (c) 1996-2003  Red Hat, Inc.
+
+    Permission is hereby granted, free of charge, to any person obtaining
+    a copy of this software and associated documentation files (the
+    ``Software''), to deal in the Software without restriction, including
+    without limitation the rights to use, copy, modify, merge, publish,
+    distribute, sublicense, and/or sell copies of the Software, and to
+    permit persons to whom the Software is furnished to do so, subject to
+    the following conditions:
+
+    The above copyright notice and this permission notice shall be included
+    in all copies or substantial portions of the Software.
+
+    THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
+    OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+    IN NO EVENT SHALL CYGNUS SOLUTIONS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+    OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+    ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+    OTHER DEALINGS IN THE SOFTWARE.
+
+
+The documentation is licensed under the GNU Free Documentation License (v1.2).
+On Debian GNU/Linux systems, the complete text of this license is in
+`/usr/share/common-licenses/GFDL-1.2'.
+
+
+GCC RUNTIME LIBRARY EXCEPTION
+
+Version 3.1, 31 March 2009
+
+Copyright (C) 2009 Free Software Foundation, Inc. <http://fsf.org/>
+
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
+
+This GCC Runtime Library Exception ("Exception") is an additional
+permission under section 7 of the GNU General Public License, version
+3 ("GPLv3"). It applies to a given file (the "Runtime Library") that
+bears a notice placed by the copyright holder of the file stating that
+the file is governed by GPLv3 along with this Exception.
+
+When you use GCC to compile a program, GCC may combine portions of
+certain GCC header files and runtime libraries with the compiled
+program. The purpose of this Exception is to allow compilation of
+non-GPL (including proprietary) programs to use, in this way, the
+header files and runtime libraries covered by this Exception.
+
+0. Definitions.
+
+A file is an "Independent Module" if it either requires the Runtime
+Library for execution after a Compilation Process, or makes use of an
+interface provided by the Runtime Library, but is not otherwise based
+on the Runtime Library.
+
+"GCC" means a version of the GNU Compiler Collection, with or without
+modifications, governed by version 3 (or a specified later version) of
+the GNU General Public License (GPL) with the option of using any
+subsequent versions published by the FSF.
+
+"GPL-compatible Software" is software whose conditions of propagation,
+modification and use would permit combination with GCC in accord with
+the license of GCC.
+
+"Target Code" refers to output from any compiler for a real or virtual
+target processor architecture, in executable form or suitable for
+input to an assembler, loader, linker and/or execution
+phase. Notwithstanding that, Target Code does not include data in any
+format that is used as a compiler intermediate representation, or used
+for producing a compiler intermediate representation.
+
+The "Compilation Process" transforms code entirely represented in
+non-intermediate languages designed for human-written code, and/or in
+Java Virtual Machine byte code, into Target Code. Thus, for example,
+use of source code generators and preprocessors need not be considered
+part of the Compilation Process, since the Compilation Process can be
+understood as starting with the output of the generators or
+preprocessors.
+
+A Compilation Process is "Eligible" if it is done using GCC, alone or
+with other GPL-compatible software, or if it is done without using any
+work based on GCC. For example, using non-GPL-compatible Software to
+optimize any GCC intermediate representations would not qualify as an
+Eligible Compilation Process.
+
+1. Grant of Additional Permission.
+
+You have permission to propagate a work of Target Code formed by
+combining the Runtime Library with Independent Modules, even if such
+propagation would otherwise violate the terms of GPLv3, provided that
+all Target Code was generated by Eligible Compilation Processes. You
+may then convey such a combination under terms of your choice,
+consistent with the licensing of the Independent Modules.
+
+2. No Weakening of GCC Copyleft.
+
+The availability of this Exception does not imply any general
+presumption that third-party software is unaffected by the copyleft
+requirements of the license of GCC.
+
+
+libquadmath/*.[hc]:
+
+   Copyright (C) 2010 Free Software Foundation, Inc.
+   Written by Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
+   Written by Tobias Burnus  <burnus@net-b.de>
+
+This file is part of the libiberty library.
+Libiberty is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+Libiberty is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+libquadmath/gdtoa:
+
+The author of this software is David M. Gay.
+
+Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies
+All Rights Reserved
+
+Permission to use, copy, modify, and distribute this software and
+its documentation for any purpose and without fee is hereby
+granted, provided that the above copyright notice appear in all
+copies and that both that the copyright notice and this
+permission notice and warranty disclaimer appear in supporting
+documentation, and that the name of Lucent or any of its entities
+not be used in advertising or publicity pertaining to
+distribution of the software without specific, written prior
+permission.
+
+LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS.
+IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY
+SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER
+IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
+ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
+THIS SOFTWARE.
+
+libquadmath/math:
+
+atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c:
+    Copyright 2001 by Stephen L. Moshier <moshier@na-net.ornl.gov> 
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c:
+   Changes for 128-bit __float128 are
+   Copyright (C) 2001 Stephen L. Moshier <moshier@na-net.ornl.gov>
+   and are incorporated herein by permission of the author.  The author 
+   reserves the right to distribute this material elsewhere under different
+   copying permissions.  These modifications are distributed here under 
+   the following terms:
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+ldexpq.c:
+   * Conversion to long double by Ulrich Drepper,
+   * Cygnus Support, drepper@cygnus.com.
+
+cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c,
+sinq_kernel.c, truncq.c:
+   Copyright (C) 1997, 1999 Free Software Foundation, Inc.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+isinfq.c:
+ * Written by J.T. Conklin <jtc@netbsd.org>.
+ * Change for long double by Jakub Jelinek <jj@ultra.linux.cz>
+ * Public domain.
+
+llroundq.c, lroundq.c, tgammaq.c:
+   Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc.
+   This file is part of the GNU C Library.
+   Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997 and
+                  Jakub Jelinek <jj@ultra.linux.cz>, 1999.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+log10q.c:
+   Cephes Math Library Release 2.2:  January, 1991
+   Copyright 1984, 1991 by Stephen L. Moshier
+   Adapted for glibc November, 2001
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+remaining files:
+
+ * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
+ *
+ * Developed at SunPro, a Sun Microsystems, Inc. business.
+ * Permission to use, copy, modify, and distribute this
+ * software is freely granted, provided that this notice
+ * is preserved.
+
+
+libjava/classpath/resource/gnu/java/locale/*
+
+They are copyrighted and covered by the terms of use:
+http://www.unicode.org/copyright.html
+
+EXHIBIT 1
+UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE
+
+ Unicode Data Files include all data files under the directories 
+http://www.unicode.org/Public/ and http://www.unicode.org/reports/. 
+Unicode Software includes any source code published in the Unicode Standard or 
+under the directories http://www.unicode.org/Public/ and 
+http://www.unicode.org/reports/.
+
+NOTICE TO USER: Carefully read the following legal agreement. BY DOWNLOADING, 
+INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S DATA FILES ("DATA FILES"), 
+AND/OR SOFTWARE ("SOFTWARE"), YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, 
+ALL OF THE TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, 
+DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE.
+
+	    COPYRIGHT AND PERMISSION NOTICE
+
+Copyrigh (c) 1991-2011 Unicode, Inc. All rights reserved. 
+Distributed under the Terms of Use in http://www.unicode.org/copyright.html.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy 
+of the Unicode data files and any associated documentation (the "Data Files") 
+or Unicode software and any associated documentation (the "Software") to deal 
+in the Data Files or Software without restriction, including without limitation 
+the rights to use, copy, modify, merge, publish, distribute, and/or sell copies
+ of the Data Files or Software, and to permit persons to whom the Data Files 
+or Software are furnished to do so, provided that (a) the above copyright notice(s) 
+and this permission notice appear with all copies of the Data Files or Software, 
+(b) both the above copyright notice(s) and this permission notice appear 
+in associated documentation, and (c) there is clear notice in each modified 
+Data File or in the Software as well as in the documentation associated with 
+the Data File(s) or Software that the data or software has been modified.
+
+THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
+EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS NOTICE BE LIABLE
+ FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES 
+WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF 
+CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 
+WITH THE USE OR PERFORMANCE OF THE DATA FILES OR SOFTWARE.
+
+Except as contained in this notice, the name of a copyright holder shall not be used
+ in advertising or otherwise to promote the sale, use or other dealings in these 
+Data Files or Software without prior written authorization of the copyright holder.
+
+Unicode and the Unicode logo are trademarks of Unicode, Inc., and may be registered
+ in some jurisdictions. All other trademarks and registered trademarks mentioned 
+herein are the property of their respective owners.
+
+
+gcc/go/gofrontend, libgo:
+
+Copyright (c) 2009 The Go Authors. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+
+   * Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+   * Redistributions in binary form must reproduce the above
+copyright notice, this list of conditions and the following disclaimer
+in the documentation and/or other materials provided with the
+distribution.
+   * Neither the name of Google Inc. nor the names of its
+contributors may be used to endorse or promote products derived from
+this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+
+libcilkrts, libmpx:
+ Copyright (C) 2009-2014, Intel Corporation
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+   * Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   * Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in
+     the documentation and/or other materials provided with the
+     distribution.
+   * Neither the name of Intel Corporation nor the names of its
+     contributors may be used to endorse or promote products derived
+     from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY
+ WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ POSSIBILITY OF SUCH DAMAGE.
+
+
+D:
+gdc-@BV@                         GNU D Compiler
+libphobos-@BV@-dev               D standard runtime library
+
+The D source package is made up of the following components.
+
+The D front-end for GCC:
+ - d/*
+
+Copyright (C) 2004-2007 David Friedman
+Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', version 2 of this
+license in `/usr/share/common-licenses/GPL-2'.
+
+
+The DMD Compiler implementation of the D programming language:
+ - d/dmd/*
+
+Copyright (c) 1999-2010 by Digital Mars
+All Rights Reserved
+written by Walter Bright
+http://www.digitalmars.com
+License for redistribution is by either the Artistic License or
+the GNU General Public License (v1).
+
+On Debian GNU/Linux systems, the complete text of the GNU General
+Public License is in `/usr/share/common-licenses/GPL', the Artistic
+license in `/usr/share/common-licenses/Artistic'.
+
+
+The Zlib data compression library:
+ - d/phobos/etc/c/zlib/*
+
+ (C) 1995-2004 Jean-loup Gailly and Mark Adler
+
+  This software is provided 'as-is', without any express or implied
+  warranty.  In no event will the authors be held liable for any damages
+  arising from the use of this software.
+
+  Permission is granted to anyone to use this software for any purpose,
+  including commercial applications, and to alter it and redistribute it
+  freely, subject to the following restrictions:
+
+  1. The origin of this software must not be misrepresented; you must not
+     claim that you wrote the original software. If you use this software
+     in a product, an acknowledgment in the product documentation would be
+     appreciated but is not required.
+  2. Altered source versions must be plainly marked as such, and must not be
+     misrepresented as being the original software.
+  3. This notice may not be removed or altered from any source distribution.
+
+
+The Phobos standard runtime library:
+ - d/phobos/*
+
+Unless otherwise marked within the file, each file in the source
+is under the following licenses:
+
+Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com
+Written by Walter Bright
+
+This software is provided 'as-is', without any express or implied
+warranty. In no event will the authors be held liable for any damages
+arising from the use of this software.
+
+Permission is granted to anyone to use this software for any purpose,
+including commercial applications, and to alter it and redistribute it
+freely, in both source and binary form, subject to the following
+restrictions:
+
+ o  The origin of this software must not be misrepresented; you must not
+    claim that you wrote the original software. If you use this software
+    in a product, an acknowledgment in the product documentation would be
+    appreciated but is not required.
+ o  Altered source versions must be plainly marked as such, and must not
+    be misrepresented as being the original software.
+ o  This notice may not be removed or altered from any source
+    distribution.
+
+By plainly marking modifications, something along the lines of adding to each
+file that has been changed a "Modified by Foo Bar" line
+underneath the "Written by" line would be adequate.
+
--- gcc-5-5.4.0.orig/debian/cpp-5-i586-linux-gnu.preinst
+++ gcc-5-5.4.0/debian/cpp-5-i586-linux-gnu.preinst
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove i586-linux-gnu-cpp /usr/bin/i586-linux-gnu-cpp-5
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/cpp-BV-CRB.preinst.in
+++ gcc-5-5.4.0/debian/cpp-BV-CRB.preinst.in
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove @TARGET@-cpp /usr/bin/@TARGET@-cpp-@BV@
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/cpp-BV-doc.doc-base.cpp
+++ gcc-5-5.4.0/debian/cpp-BV-doc.doc-base.cpp
@@ -0,0 +1,16 @@
+Document: cpp-@BV@
+Title: The GNU C preprocessor
+Author: Various
+Abstract: The C preprocessor is a "macro processor" that is used automatically
+ by the C compiler to transform your program before actual compilation.
+ It is called a macro processor because it allows you to define "macros",
+ which are brief abbreviations for longer constructs.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/cpp.html
+Files: /usr/share/doc/gcc-@BV@-base/cpp.html
+
+Format: info
+Index: /usr/share/info/cpp-@BV@.info.gz
+Files: /usr/share/info/cpp-@BV@*
--- gcc-5-5.4.0.orig/debian/cpp-BV-doc.doc-base.cppint
+++ gcc-5-5.4.0/debian/cpp-BV-doc.doc-base.cppint
@@ -0,0 +1,17 @@
+Document: cppinternals-@BV@
+Title: The GNU C preprocessor (internals)
+Author: Various
+Abstract: This brief manual documents the internals of cpplib, and
+ explains some of the tricky issues.  It is intended that, along with
+ the comments in the source code, a reasonably competent C programmer
+ should be able to figure out what the code is doing, and why things
+ have been implemented the way they have.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/cppinternals.html
+Files: /usr/share/doc/gcc-@BV@-base/cppinternals.html
+
+Format: info
+Index: /usr/share/info/cppinternals-@BV@.info.gz
+Files: /usr/share/info/cppinternals-@BV@*
--- gcc-5-5.4.0.orig/debian/dh_doclink
+++ gcc-5-5.4.0/debian/dh_doclink
@@ -0,0 +1,12 @@
+#! /bin/sh
+
+pkg=`echo $1 | sed 's/^-p//'`
+target=$2
+
+[ -d debian/$pkg/usr/share/doc ] || mkdir -p debian/$pkg/usr/share/doc
+if [ -d debian/$pkg/usr/share/doc/$p -a ! -h debian/$pkg/usr/share/doc/$p ]
+then
+    echo "WARNING: removing doc directory  $pkg"
+    rm -rf debian/$pkg/usr/share/doc/$pkg
+fi
+ln -sf $target debian/$pkg/usr/share/doc/$pkg
--- gcc-5-5.4.0.orig/debian/dh_rmemptydirs
+++ gcc-5-5.4.0/debian/dh_rmemptydirs
@@ -0,0 +1,10 @@
+#! /bin/sh -e
+
+pkg=`echo $1 | sed 's/^-p//'`
+
+: # remove empty directories, when all components are in place
+for d in `find debian/$pkg -depth -type d -empty 2> /dev/null`; do \
+    while rmdir $d 2> /dev/null; do d=`dirname $d`; done; \
+done
+
+exit 0
--- gcc-5-5.4.0.orig/debian/dummy-man.1
+++ gcc-5-5.4.0/debian/dummy-man.1
@@ -0,0 +1,29 @@
+.TH @NAME@ 1 "May 24, 2003" @name@ "Debian Free Documentation"
+.SH NAME
+@name@ \- A program with a man page covered by the GFDL with invariant sections
+.SH SYNOPSIS
+@name@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...]
+
+.SH DESCRIPTION
+
+\fB@name@\fR is documented by a man page, which is covered by the "GNU
+Free Documentation License" (GFDL) containing invariant sections.
+.P
+In November 2002, version 1.2 of the GNU Free Documentation License (GNU
+FDL) was released by the Free Software Foundation after a long period
+of consultation. Unfortunately, some concerns raised by members of the
+Debian Project were not addressed, and as such the GNU FDL can apply
+to works that do not pass the Debian Free Software Guidelines (DFSG),
+and may thus only be included in the non-free component of the Debian
+archive, not the Debian distribution itself.
+
+.SH "SEE ALSO"
+.BR http://gcc.gnu.org/onlinedocs/
+for the complete documentation,
+.BR http://lists.debian.org/debian-legal/2003/debian-legal-200304/msg00307.html
+for a proposed statement of Debian with respect to the GFDL,
+.BR gfdl(7)
+
+.SH AUTHOR
+This manual page was written by the Debian GCC maintainers,
+for the Debian GNU/Linux system.
--- gcc-5-5.4.0.orig/debian/dummy.texi
+++ gcc-5-5.4.0/debian/dummy.texi
@@ -0,0 +1 @@
+@c This file is empty because the original one has a non DFSG free license (GFDL)
--- gcc-5-5.4.0.orig/debian/fixincludes.in
+++ gcc-5-5.4.0/debian/fixincludes.in
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+PATH="/@LIBEXECDIR@/install-tools:$PATH"
+
+TARGET_MACHINE=`dpkg-architecture -qDEB_HOST_GNU_TYPE`
+export TARGET_MACHINE
+
+exec fixinc.sh "$@"
--- gcc-5-5.4.0.orig/debian/g++-5-i586-linux-gnu.preinst
+++ gcc-5-5.4.0/debian/g++-5-i586-linux-gnu.preinst
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove i586-linux-gnu-g++ /usr/bin/i586-linux-gnu-g++-5
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/g++-BV-CRB.preinst.in
+++ gcc-5-5.4.0/debian/g++-BV-CRB.preinst.in
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove @TARGET@-g++ /usr/bin/@TARGET@-g++-@BV@
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcc-5-i586-linux-gnu.preinst
+++ gcc-5-5.4.0/debian/gcc-5-i586-linux-gnu.preinst
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove i586-linux-gnu-gcc /usr/bin/i586-linux-gnu-gcc-5
+    update-alternatives --quiet --remove i586-linux-gnu-gcov /usr/bin/i586-linux-gnu-gcov-5
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcc-BV-CRB.preinst.in
+++ gcc-5-5.4.0/debian/gcc-BV-CRB.preinst.in
@@ -0,0 +1,12 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove @TARGET@-gcc /usr/bin/@TARGET@-gcc-@BV@
+    update-alternatives --quiet --remove @TARGET@-gcov /usr/bin/@TARGET@-gcov-@BV@
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcc-BV-doc.doc-base.gcc
+++ gcc-5-5.4.0/debian/gcc-BV-doc.doc-base.gcc
@@ -0,0 +1,14 @@
+Document: gcc-@BV@
+Title: The GNU C and C++ compiler
+Author: Various
+Abstract: This manual documents how to run, install and port the GNU compiler,
+ as well as its new features and incompatibilities, and how to report bugs.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/gcc.html
+Files: /usr/share/doc/gcc-@BV@-base/gcc.html
+
+Format: info
+Index: /usr/share/info/gcc-@BV@.info.gz
+Files: /usr/share/info/gcc-@BV@*
--- gcc-5-5.4.0.orig/debian/gcc-BV-doc.doc-base.gccint
+++ gcc-5-5.4.0/debian/gcc-BV-doc.doc-base.gccint
@@ -0,0 +1,17 @@
+Document: gccint-@BV@
+Title: Internals of the GNU C and C++ compiler
+Author: Various
+Abstract: This manual documents the internals of the GNU compilers,
+ including how to port them to new targets and some information about
+ how to write front ends for new languages.  It corresponds to GCC
+ version @BV@.x.  The use of the GNU compilers is documented in a
+ separate manual.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/gccint.html
+Files: /usr/share/doc/gcc-@BV@-base/gccint.html
+
+Format: info
+Index: /usr/share/info/gccint-@BV@.info.gz
+Files: /usr/share/info/gccint-@BV@*
--- gcc-5-5.4.0.orig/debian/gcc-BV-doc.doc-base.gomp
+++ gcc-5-5.4.0/debian/gcc-BV-doc.doc-base.gomp
@@ -0,0 +1,15 @@
+Document: gcc-@BV@-gomp
+Title: The GNU OpenMP Implementation (for GCC @BV@)
+Author: Various
+Abstract: This manual documents the usage of libgomp, the GNU implementation
+ of the OpenMP Application Programming Interface (API) for multi-platform
+ shared-memory parallel programming in C/C++ and Fortran.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/libgomp.html
+Files: /usr/share/doc/gcc-@BV@-base/libgomp.html
+
+Format: info
+Index: /usr/share/info/libgomp-@BV@.info.gz
+Files: /usr/share/info/libgomp-@BV@*
--- gcc-5-5.4.0.orig/debian/gcc-BV-doc.doc-base.itm
+++ gcc-5-5.4.0/debian/gcc-BV-doc.doc-base.itm
@@ -0,0 +1,16 @@
+Document: gcc-@BV@-itm
+Title: The GNU Transactional Memory Library (for GCC @BV@)
+Author: Various
+Abstract: This manual documents the usage and internals of libitm,
+ the GNU Transactional Memory Library. It provides transaction support
+ for accesses to a process' memory, enabling easy-to-use synchronization
+ of accesses to shared memory by several threads.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/libitm.html
+Files: /usr/share/doc/gcc-@BV@-base/libitm.html
+
+Format: info
+Index: /usr/share/info/libitm-@BV@.info.gz
+Files: /usr/share/info/libitm-@BV@*
--- gcc-5-5.4.0.orig/debian/gcc-BV-doc.doc-base.qmath
+++ gcc-5-5.4.0/debian/gcc-BV-doc.doc-base.qmath
@@ -0,0 +1,14 @@
+Document: gcc-@BV@-qmath
+Title: The GCC Quad-Precision Math Library (for GCC @BV@)
+Author: Various
+Abstract: This manual documents the usage of libquadmath, the GCC
+ Quad-Precision Math Library Application Programming Interface (API).
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/libquadmath.html
+Files: /usr/share/doc/gcc-@BV@-base/libquadmath.html
+
+Format: info
+Index: /usr/share/info/libquadmath-@BV@.info.gz
+Files: /usr/share/info/libquadmath-@BV@*
--- gcc-5-5.4.0.orig/debian/gcc-BV-hppa64-linux-gnu.overrides
+++ gcc-5-5.4.0/debian/gcc-BV-hppa64-linux-gnu.overrides
@@ -0,0 +1,2 @@
+gcc-@BV@-hppa64-linux-gnu binary: binary-from-other-architecture
+gcc-@BV@-hppa64-linux-gnu binary: binary-without-manpage
--- gcc-5-5.4.0.orig/debian/gcc-BV-multilib.overrides
+++ gcc-5-5.4.0/debian/gcc-BV-multilib.overrides
@@ -0,0 +1 @@
+gcc-@BV@-multilib binary: binary-from-other-architecture
--- gcc-5-5.4.0.orig/debian/gcc-BV-source.overrides
+++ gcc-5-5.4.0/debian/gcc-BV-source.overrides
@@ -0,0 +1,5 @@
+gcc-@BV@-source: changelog-file-not-compressed
+
+# these are patches taken over unmodified from 4.3
+gcc-@BV@-source: script-not-executable
+gcc-@BV@-source: shell-script-fails-syntax-check
--- gcc-5-5.4.0.orig/debian/gcc-XX-BV.1
+++ gcc-5-5.4.0/debian/gcc-XX-BV.1
@@ -0,0 +1,17 @@
+.TH GCC-@TOOL@-@BV@ 1 "May 8, 2012" gcc-@TOOL@-@BV@ ""
+.SH NAME
+gcc-@TOOL@ \- a wrapper around @TOOL@ adding the --plugin option
+
+.SH SYNOPSIS
+gcc-@TOOL@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...]
+
+.SH DESCRIPTION
+
+\fBgcc-@TOOL@\fR is a wrapper around @TOOL@(1) adding the appropriate
+\fB\-\-plugin\fR option for the GCC @BV@ compiler.
+
+.SH OPTIONS
+See @TOOL@(1) for a list of options that @TOOL@ understands.
+
+.SH "SEE ALSO"
+.BR @TOOL@(1)
--- gcc-5-5.4.0.orig/debian/gcc-dummy.texi
+++ gcc-5-5.4.0/debian/gcc-dummy.texi
@@ -0,0 +1,41 @@
+\input texinfo  @c -*-texinfo-*-
+@c %**start of header
+
+@settitle The GNU Compiler Collection (GCC)
+
+@c Create a separate index for command line options.
+@defcodeindex op
+@c Merge the standard indexes into a single one.
+@syncodeindex fn cp
+@syncodeindex vr cp
+@syncodeindex ky cp
+@syncodeindex pg cp
+@syncodeindex tp cp
+
+@paragraphindent 1
+
+@c %**end of header
+
+@copying
+The current documentation is licensed under the same terms as the Debian packaging.
+@end copying
+@ifnottex
+@dircategory Programming
+@direntry
+* @name@: (@name@).                  The GNU Compiler Collection (@name@).
+@end direntry
+@sp 1
+@end ifnottex
+
+@summarycontents
+@contents
+@page
+
+@node Top
+@top Introduction
+@cindex introduction
+The official GNU compilers' documentation is released under the terms
+of the GNU Free Documentation License with cover texts. This has been
+considered non free by the Debian Project. Thus you will find it in the
+non-free section of the Debian archive.
+@bye
--- gcc-5-5.4.0.orig/debian/gcc-snapshot.overrides
+++ gcc-5-5.4.0/debian/gcc-snapshot.overrides
@@ -0,0 +1,4 @@
+gcc-snapshot binary: bad-permissions-for-ali-file
+
+# keep patched ltdl copy
+gcc-snapshot binary: embedded-library
--- gcc-5-5.4.0.orig/debian/gcc-snapshot.prerm
+++ gcc-5-5.4.0/debian/gcc-snapshot.prerm
@@ -0,0 +1,5 @@
+#! /bin/sh -e
+
+rm -f /usr/lib/gcc-snapshot/share/python/*.py[co]
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/gccgo-BV-doc.doc-base
+++ gcc-5-5.4.0/debian/gccgo-BV-doc.doc-base
@@ -0,0 +1,17 @@
+Document: gccgo-@BV@
+Title: The GNU Go compiler (version @BV@)
+Author: Various
+Abstract: This manual describes how to use gccgo, the GNU compiler for
+ the Go programming language.  This manual is specifically about
+ gccgo.  For more information about the Go programming
+ language in general, including language specifications and standard
+ package documentation, see http://golang.org/.
+Section: Programming
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/gccgo.html
+Files: /usr/share/doc/gcc-@BV@-base/gccgo.html
+
+Format: info
+Index: /usr/share/info/gccgo-@BV@.info.gz
+Files: /usr/share/info/gccgo-@BV@*
--- gcc-5-5.4.0.orig/debian/gcj-BV-jdk.doc-base
+++ gcc-5-5.4.0/debian/gcj-BV-jdk.doc-base
@@ -0,0 +1,15 @@
+Document: gcj-@BV@
+Title: The GNU Ahead-of-time Compiler for the Java Language
+Author: Various
+Abstract: This manual describes how to use gcj, the GNU compiler for
+ the Java programming language.  gcj can generate both .class files and
+ object files, and it can read both Java source code and .class files.
+Section: Programming/Java
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/java/gcj.html
+Files: /usr/share/doc/gcc-@BV@-base/java/gcj.html
+
+Format: info
+Index: /usr/share/info/gcj-@BV@.info.gz
+Files: /usr/share/info/gcj-@BV@*
--- gcc-5-5.4.0.orig/debian/gcj-BV-jdk.overrides
+++ gcc-5-5.4.0/debian/gcj-BV-jdk.overrides
@@ -0,0 +1 @@
+gcj-@BV@-jdk binary: wrong-name-for-upstream-changelog
--- gcc-5-5.4.0.orig/debian/gcj-BV-jdk.postinst
+++ gcc-5-5.4.0/debian/gcj-BV-jdk.postinst
@@ -0,0 +1,45 @@
+#! /bin/sh -e
+
+if [ -d /usr/share/doc/gcc-@BV@-base/java ] && [ ! -h /usr/share/doc/gcc-@BV@-base/java ]; then
+    rm -rf /usr/share/doc/gcc-@BV@-base/java
+    ln -s ../gcj-@BV@-base /usr/share/doc/gcc-@BV@-base/java
+fi
+
+prio=@java_priority@
+update-alternatives --quiet \
+    --install /usr/bin/javac javac /usr/bin/gcj-wrapper-@BV@ $prio \
+    @GFDL@--slave /usr/share/man/man1/javac.1.gz javac.1.gz /usr/share/man/man1/gcj-wrapper-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/jar jar /usr/bin/gjar-@BV@ $prio \
+    --slave /usr/share/man/man1/jar.1.gz jar.1.gz /usr/share/man/man1/gjar-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/jarsigner jarsigner /usr/bin/gjarsigner-@BV@ $prio \
+    --slave /usr/share/man/man1/jarsigner.1.gz jarsigner.1.gz /usr/share/man/man1/gjarsigner-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/javah javah /usr/bin/gjavah-@BV@ $prio \
+    --slave /usr/share/man/man1/javah.1.gz javah.1.gz /usr/share/man/man1/gjavah-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/javadoc javadoc /usr/bin/gjdoc-@BV@ $prio \
+    --slave /usr/share/man/man1/javadoc.1.gz javadoc.1.gz /usr/share/man/man1/gjdoc-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/native2ascii native2ascii /usr/bin/gnative2ascii-@BV@ $prio \
+    --slave /usr/share/man/man1/native2ascii.1.gz native2ascii.1.gz /usr/share/man/man1/gnative2ascii-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/rmic rmic /usr/bin/grmic-@BV@ $prio \
+    @GFDL@--slave /usr/share/man/man1/rmic.1.gz rmic.1.gz /usr/share/man/man1/grmic-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/serialver serialver /usr/bin/gserialver-@BV@ $prio \
+    --slave /usr/share/man/man1/serialver.1.gz serialver.1.gz /usr/share/man/man1/gserialver-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/tnameserv tnameserv /usr/bin/gtnameserv-@BV@ $prio \
+    --slave /usr/share/man/man1/tnameserv.1.gz tnameserv.1.gz /usr/share/man/man1/gtnameserv-@BV@.1.gz
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/gcj-BV-jdk.prerm
+++ gcc-5-5.4.0/debian/gcj-BV-jdk.prerm
@@ -0,0 +1,15 @@
+#! /bin/sh -e
+
+if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then
+    update-alternatives --quiet --remove javac /usr/bin/gcj-wrapper-@BV@
+    update-alternatives --quiet --remove jar /usr/bin/gjar-@BV@
+    update-alternatives --quiet --remove jarsigner /usr/bin/gjarsigner-@BV@
+    update-alternatives --quiet --remove javah /usr/bin/gjavah-@BV@
+    update-alternatives --quiet --remove javadoc /usr/bin/gjdoc-@BV@
+    update-alternatives --quiet --remove native2ascii /usr/bin/gnative2ascii-@BV@
+    update-alternatives --quiet --remove rmic /usr/bin/grmic-@BV@
+    update-alternatives --quiet --remove serialver /usr/bin/gserialver-@BV@
+    update-alternatives --quiet --remove tnameserv /usr/bin/gtnameserv-@BV@
+fi
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/gcj-BV-jre-headless.overrides
+++ gcc-5-5.4.0/debian/gcj-BV-jre-headless.overrides
@@ -0,0 +1,5 @@
+# pick up the exact version, in case another gcj version is installed
+gcj-@BV@-jre-headless binary: binary-or-shlib-defines-rpath
+
+# don't strip the binaries, keep the libgcj13-dbg package Multi-Arch: same
+gcj-@BV@-jre-headless binary: unstripped-binary-or-object
--- gcc-5-5.4.0.orig/debian/gcj-BV-jre-headless.postinst
+++ gcc-5-5.4.0/debian/gcj-BV-jre-headless.postinst
@@ -0,0 +1,48 @@
+#! /bin/sh -e
+
+prio=@java_priority@
+
+update-alternatives --quiet \
+    --install /usr/bin/java java /usr/bin/gij-@BV@ $prio \
+    @GFDL@--slave /usr/share/man/man1/java.1.gz java.1.gz /usr/share/man/man1/gij-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/rmiregistry rmiregistry /usr/bin/grmiregistry-@BV@ $prio \
+    --slave /usr/share/man/man1/rmiregistry.1.gz rmiregistry.1.gz /usr/share/man/man1/grmiregistry-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/keytool keytool /usr/bin/gkeytool-@BV@ $prio \
+    --slave /usr/share/man/man1/keytool.1.gz keytool.1.gz /usr/share/man/man1/gkeytool-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/orbd orbd /usr/bin/gorbd-@BV@ $prio \
+    --slave /usr/share/man/man1/orbd.1.gz orbd.1.gz /usr/share/man/man1/gorbd-@BV@.1.gz
+
+update-alternatives --quiet \
+    --install /usr/bin/rmid rmid /usr/bin/grmid-@BV@ $prio \
+    --slave /usr/share/man/man1/rmid.1.gz rmid.1.gz /usr/share/man/man1/grmid-@BV@.1.gz
+
+case "$1" in
+configure)
+    if [ ! -f /var/lib/gcj-@BV@/classmap.db ]; then
+	uname=$(uname -m)
+	mkdir -p /var/lib/gcj-@BV@
+	if gcj-dbtool-@BV@ -n /var/lib/gcj-@BV@/classmap.db; then
+	    case "$uname" in arm*|m68k|parisc*)
+	        echo >&2 "gcj-dbtool succeeded unexpectedly"
+	    esac
+	else
+	    case "$uname" in
+	    arm*|m68k|parisc*)
+	        echo >&2 "ERROR: gcj-dbtool did fail; known problem on $uname";;
+	    *)
+		exit 2
+	    esac
+	    touch /var/lib/gcj-@BV@/classmap.db
+	fi
+    fi
+esac
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcj-BV-jre-headless.postrm
+++ gcc-5-5.4.0/debian/gcj-BV-jre-headless.postrm
@@ -0,0 +1,10 @@
+#! /bin/sh -e
+
+case "$1" in
+    purge)
+	rm -f /var/lib/gcj-@BV@/classmap.db
+esac
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcj-BV-jre-headless.prerm
+++ gcc-5-5.4.0/debian/gcj-BV-jre-headless.prerm
@@ -0,0 +1,13 @@
+#! /bin/sh -e
+
+if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then
+    update-alternatives --quiet --remove java /usr/bin/gij-@BV@
+    update-alternatives --quiet --remove rmiregistry /usr/bin/grmiregistry-@BV@
+    update-alternatives --quiet --remove keytool /usr/bin/gkeytool-@BV@
+    update-alternatives --quiet --remove orbd /usr/bin/gorbd-@BV@
+    update-alternatives --quiet --remove rmid /usr/bin/grmid-@BV@
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gcj-wrapper-BV
+++ gcc-5-5.4.0/debian/gcj-wrapper-BV
@@ -0,0 +1,91 @@
+#!/usr/bin/perl -w
+#
+# Starts the GNU Java compiler.
+#
+# Command-line arguments should be in the style of Sun's Java compiler;
+# these will be converted to gcj arguments before being passed to the
+# gcj itself.
+#
+# Copyright (C) 2002-2003 by Ben Burton <bab@debian.org>
+# Based on the original gcj-wrapper-3.2 shell script.
+
+use strict;
+
+# The real Java compiler:
+my $javaCompiler = '/usr/bin/gcj-@BV@';
+
+# The command-line arguments to pass to the real Java compiler:
+my @commandLine;
+
+# The warning flags to pass to the GNU Java compiler:
+my $warnings = '-Wall';
+
+# Build the command-line from the arguments given.
+my $parsingOptions = 1;
+my $copyNextArg = 0;
+my $ignoreNextArg = 0;
+my $appendNextArg = '';
+foreach my $arg (@ARGV) {
+    # See if we already know what to do with this argument.
+    if ($ignoreNextArg) {
+        # Throw it away.
+        $ignoreNextArg = 0;
+        next;
+    } elsif ($copyNextArg or not $parsingOptions) {
+        # Copy it directly.
+        push @commandLine, $arg;
+        $copyNextArg = 0;
+        next;
+    } elsif ($appendNextArg) {
+        # Append it to $appendNextArg and then copy directly.
+        push @commandLine, ($appendNextArg . $arg);
+        $appendNextArg = '';
+        next;
+    }
+
+    # Try to interpret Sun-style options.
+    if ($arg eq '-version') {
+        push @commandLine, '--version';
+    } elsif ($arg eq '-h' or $arg eq '-help') {
+        push @commandLine, '--help';
+    } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') {
+        $appendNextArg = '--classpath=';
+    } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or
+             $arg eq '-extdirs') {
+        $appendNextArg = '-' . $arg . '=';
+    } elsif ($arg eq '-d') {
+        push @commandLine, '-d';
+        $copyNextArg = 1;
+    } elsif ($arg eq '-nowarn') {
+        $warnings = '';
+    } elsif ($arg =~ /^-g/) {
+        # Some kind of debugging option - just switch debugging on.
+        push @commandLine, '-g' if ($arg ne '-g:none');
+    } elsif ($arg eq '-O') {
+        push @commandLine, '-O2';
+    } elsif ($arg eq '-Xss') {
+        push @commandLine, $arg;
+    } elsif ($arg =~ /^-X/) {
+        # An extended Sun option (which we don't support).
+        push @commandLine, '--help' if ($arg eq '-X');
+    } elsif ($arg eq '-source' or $arg eq '-sourcepath' or $arg eq '-target') {
+        # An unsupported option with a following argument.
+        $ignoreNextArg = 1;
+    } elsif ($arg =~ /^-/) {
+        # An unsupported standalone option.
+    } else {
+        # Some non-option argument has been given.
+        # Stop parsing options at this point.
+        push @commandLine, $arg;
+        $parsingOptions = 0;
+    }
+}
+
+# Was there a partial argument that was never completed?
+push @commandLine, $appendNextArg if ($appendNextArg);
+
+# Call the real Java compiler.
+my @fullCommandLine = ( $javaCompiler, '-C' );
+push @fullCommandLine, $warnings if ($warnings);
+push @fullCommandLine, @commandLine;
+exec @fullCommandLine or exit(1);
--- gcc-5-5.4.0.orig/debian/gcj-wrapper-BV.1
+++ gcc-5-5.4.0/debian/gcj-wrapper-BV.1
@@ -0,0 +1,20 @@
+.TH GCJ-WRAPPER 1 "June 6, 2002" gcj-wrapper "Java User's Manual"
+.SH NAME
+gcj-wrapper \- a wrapper around gcj
+
+.SH SYNOPSIS
+gcj-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...]
+
+.SH DESCRIPTION
+
+\fBgcj-wrapper\fR is a wrapper around gcj(1) to be called as the java
+compiler. Options different for javac(1) and gcj(1) are translated,
+options unknown to gcj(1) are silently ignored.
+
+.SH OPTIONS
+See gcj-@BV@(1) for a list of options that gcj understands.
+
+.SH "SEE ALSO"
+.BR gcj-@BV@(1)
+,
+.BR javac(1)
--- gcc-5-5.4.0.orig/debian/gcjh-wrapper-BV
+++ gcc-5-5.4.0/debian/gcjh-wrapper-BV
@@ -0,0 +1,86 @@
+#!/usr/bin/perl -w
+#
+# Starts the GNU Java header generator.
+#
+# Command-line arguments should be in the style of Sun's javah command;
+# these will be converted to gcjh arguments before being passed to the
+# gcjh itself.
+#
+# Copyright (C) 2003 by Peter Hawkins <peterh@debian.org>
+# Haphazardly hacked up based on the gcj-wrapper perl script.
+# Copyright (C) 2002-2003 by Ben Burton <bab@debian.org>
+# Based on the original gcj-wrapper-3.2 shell script.
+
+use strict;
+
+# The real Java header generator:
+my $javaHeaderGen = '/usr/bin/gcjh-@BV@';
+
+# The command-line arguments to pass to the real Java compiler:
+my @commandLine;
+
+# Build the command-line from the arguments given.
+my $parsingOptions = 1;
+my $copyNextArg = 0;
+my $ignoreNextArg = 0;
+my $appendNextArg = '';
+foreach my $arg (@ARGV) {
+    # See if we already know what to do with this argument.
+    if ($ignoreNextArg) {
+        # Throw it away.
+        $ignoreNextArg = 0;
+        next;
+    } elsif ($copyNextArg or not $parsingOptions) {
+        # Copy it directly.
+        push @commandLine, $arg;
+        $copyNextArg = 0;
+        next;
+    } elsif ($appendNextArg) {
+        # Append it to $appendNextArg and then copy directly.
+        push @commandLine, ($appendNextArg . $arg);
+        $appendNextArg = '';
+        next;
+    }
+
+    # Try to interpret Sun-style options.
+    if ($arg eq '-version') {
+        push @commandLine, '--version';
+    } elsif ($arg eq '-h' or $arg eq '-help') {
+        push @commandLine, '--help';
+    } elsif ($arg eq '-verbose') {
+        push @commandLine, '--verbose';
+    } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') {
+        $appendNextArg = '--classpath=';
+    } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or
+             $arg eq '-extdirs') {
+        $appendNextArg = "-".$arg . '=';
+    } elsif ($arg eq '-d') {
+        push @commandLine, '-d';
+        $copyNextArg = 1;
+    } elsif ($arg eq '-o') {
+        push @commandLine, '-o';
+        $copyNextArg = 1;
+    } elsif ($arg eq '-stubs') {
+        push @commandLine, '-stubs';
+    } elsif ($arg eq '-jni') {
+        push @commandLine, '-jni';
+    } elsif ($arg =~ /^-old/) {
+        # An extended Sun option (which we don't support).
+        push @commandLine, '--help' if ($arg eq '-old');
+    } elsif ($arg =~ /^-/) {
+        # An unsupported standalone option.
+    } else {
+        # Some non-option argument has been given.
+        # Stop parsing options at this point.
+        push @commandLine, $arg;
+        $parsingOptions = 0;
+    }
+}
+
+# Was there a partial argument that was never completed?
+push @commandLine, $appendNextArg if ($appendNextArg);
+
+# Call the real Java header generator.
+my @fullCommandLine = ( $javaHeaderGen );
+push @fullCommandLine, @commandLine;
+exec @fullCommandLine or exit(1);
--- gcc-5-5.4.0.orig/debian/gcjh-wrapper-BV.1
+++ gcc-5-5.4.0/debian/gcjh-wrapper-BV.1
@@ -0,0 +1,20 @@
+.TH GCJH-WRAPPER 1 "June 6, 2002" gcjh-wrapper "Java User's Manual"
+.SH NAME
+gcjh-wrapper \- a wrapper around gcjh
+
+.SH SYNOPSIS
+gcjh-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...]
+
+.SH DESCRIPTION
+
+\fBgcjh-wrapper\fR is a wrapper around gcjh(1) to be called as the java header
+compiler. Options different for javah(1) and gcjh(1) are translated,
+options unknown to gcjh(1) are silently ignored.
+
+.SH OPTIONS
+See gcjh-@BV@(1) for a list of options that gcj understands.
+
+.SH "SEE ALSO"
+.BR gcjh-@BV@(1)
+,
+.BR javah(1)
--- gcc-5-5.4.0.orig/debian/gen-libstdc-breaks.sh
+++ gcc-5-5.4.0/debian/gen-libstdc-breaks.sh
@@ -0,0 +1,178 @@
+#! /bin/sh
+
+# https://bugs.debian.org/cgi-bin/pkgreport.cgi?tag=gcc-pr66145;users=debian-gcc@lists.debian.org
+
+vendor=Debian
+if dpkg-vendor --derives-from Ubuntu; then
+    vendor=Ubuntu
+fi
+
+if [ "$vendor" = Debian ]; then
+    :
+    pkgs=$(echo '
+antlr
+libaqsis1
+libassimp3
+blockattack
+boo
+libboost-date-time1.54.0
+libboost-date-time1.55.0
+libcpprest2.4
+printer-driver-brlaser
+c++-annotations
+clustalx
+libdavix0
+libdballe6
+dff
+libdiet-sed2.8
+libdiet-client2.8
+libdiet-admin2.8
+digikam-private-libs
+emscripten
+ergo
+fceux
+flush
+libfreefem++
+freeorion
+fslview
+fwbuilder
+libgazebo5
+libgetfem4++
+libgmsh2
+gnote
+gnudatalanguage
+python-healpy
+innoextract
+libinsighttoolkit4.7
+libdap17
+libdapclient6
+libdapserver7
+libkolabxml1
+libpqxx-4.0
+libreoffice-core
+librime1
+libwibble-dev
+lightspark
+libmarisa0
+mira-assembler
+mongodb
+mongodb-server
+ncbi-blast+
+libogre-1.8.0
+libogre-1.9.0
+openscad
+libopenwalnut1
+passepartout
+pdf2djvu
+photoprint
+plastimatch
+plee-the-bear
+povray
+powertop
+psi4
+python3-taglib
+realtimebattle
+ruby-passenger
+libapache2-mod-passenger
+schroot
+sqlitebrowser
+tecnoballz
+wesnoth-1.12-core
+widelands
+libwreport2
+xflr5
+libxmltooling6')
+else
+    pkgs=$(echo '
+antlr
+libaqsis1
+libassimp3
+blockattack
+boo
+libboost-date-time1.55.0
+libcpprest2.2
+printer-driver-brlaser
+c++-annotations
+chromium-browser
+clustalx
+libdavix0
+libdballe6
+dff
+libdiet-sed2.8
+libdiet-client2.8
+libdiet-admin2.8
+libkgeomap2
+libmediawiki1
+libkvkontakte1
+emscripten
+ergo
+fceux
+flush
+libfreefem++
+freeorion
+fslview
+fwbuilder
+libgazebo5
+libgetfem4++
+libgmsh2
+gnote
+gnudatalanguage
+python-healpy
+innoextract
+libinsighttoolkit4.6
+libdap17
+libdapclient6
+libdapserver7
+libkolabxml1
+libpqxx-4.0
+libreoffice-core
+librime1
+libwibble-dev
+lightspark
+libmarisa0
+mira-assembler
+mongodb
+mongodb-server
+ncbi-blast+
+libogre-1.8.0
+libogre-1.9.0
+openscad
+libopenwalnut1
+passepartout
+pdf2djvu
+photoprint
+plastimatch
+plee-the-bear
+povray
+powertop
+psi4
+python3-taglib
+realtimebattle
+ruby-passenger
+libapache2-mod-passenger
+sqlitebrowser
+tecnoballz
+wesnoth-1.12-core
+widelands
+libwreport2
+xflr5
+libxmltooling6')
+fi
+
+fn=debian/libstdc++-breaks.$vendor
+rm -f $fn
+echo $pkgs
+for p in $pkgs; do
+    #echo $p
+    if ! apt-cache show --no-all-versions $p >/dev/null; then
+	echo "not found: $p"
+    fi
+    v=$(apt-cache show --no-all-versions $p | awk '/^Version/ {print $2}')
+    case "$p" in
+    libboost-date-time*)
+      echo "$p," >> $fn
+      ;;
+    *)
+      echo "$p (<= $v)," >> $fn
+    esac
+done
--- gcc-5-5.4.0.orig/debian/gfortran-5-i586-linux-gnu.preinst
+++ gcc-5-5.4.0/debian/gfortran-5-i586-linux-gnu.preinst
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove i586-linux-gnu-gfortran /usr/bin/i586-linux-gnu-gfortran-5
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gfortran-BV-CRB.preinst.in
+++ gcc-5-5.4.0/debian/gfortran-BV-CRB.preinst.in
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+set -e
+
+if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then
+    update-alternatives --quiet --remove @TARGET@-gfortran /usr/bin/@TARGET@-gfortran-@BV@
+fi
+
+#DEBHELPER#
+
+exit 0
--- gcc-5-5.4.0.orig/debian/gfortran-BV-doc.doc-base
+++ gcc-5-5.4.0/debian/gfortran-BV-doc.doc-base
@@ -0,0 +1,14 @@
+Document: gfortran-@BV@
+Title: The GNU Fortran Compiler 
+Author: Various
+Abstract: This manual documents how to run, install and port `gfortran',
+ as well as its new features and incompatibilities, and how to report bugs.
+Section: Programming/Fortran
+
+Format: html
+Index: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html
+Files: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html
+
+Format: info
+Index: /usr/share/info/gfortran-@BV@.info.gz
+Files: /usr/share/info/gfortran-@BV@*
--- gcc-5-5.4.0.orig/debian/gij-hppa
+++ gcc-5-5.4.0/debian/gij-hppa
@@ -0,0 +1,10 @@
+#! /bin/sh
+
+prctl=
+
+case "$(prctl --unaligned=)" in *signal)
+    echo >&2 "$(basename $0): ignore unaligned memory accesses"
+    prctl="prctl --unaligned=default"
+esac
+
+exec $prctl /usr/bin/gij-5.bin "$@"
--- gcc-5-5.4.0.orig/debian/gij-wrapper-BV
+++ gcc-5-5.4.0/debian/gij-wrapper-BV
@@ -0,0 +1,98 @@
+#!/usr/bin/perl -w
+#
+# Starts the GNU Java interpreter.
+#
+# Command-line arguments should be in the style of Sun's Java runtime;
+# these will be converted to gij arguments before being passed to the
+# gij itself.
+#
+# The Debian JNI module directory and any other specified JNI
+# directories will be included on the JNI search path.
+#
+# Copyright (C) 2002-2003 by Ben Burton <bab@debian.org>
+# Based on the original gij-wrapper-3.2 shell script.
+
+use strict;
+
+# The real Java runtime:
+my $javaRuntime = '/usr/bin/gij-@BV@';
+
+# The debian JNI module directory:
+my $debianJNIDir = '/usr/lib/jni';
+
+# The command-line arguments to pass to the real Java runtime:
+my @commandLine;
+
+# The full JNI search path to use:
+my $JNIPath = '';
+
+# Build the command-line from the arguments given.
+my $parsingOptions = 1;
+
+# Flag used to copy argument to -classpath or -cp.
+my $copyNext = 0;
+foreach my $arg (@ARGV) {
+  if (not $parsingOptions) {
+    # We're done parsing options; just copy all remaining arguments directly.
+    push @commandLine, $arg;
+    next;
+  }
+  if ($copyNext) {
+    push @commandLine, $arg;
+    $copyNext = 0;
+    next;
+  }
+
+  # Try to interpret Sun-style options.
+  if ($arg eq '-version') {
+    push @commandLine, '--version';
+  } elsif ($arg eq '-h' or $arg eq '-help') {
+    push @commandLine, '--help';
+  } elsif ($arg eq '-cp' or $arg eq '--cp') {
+    push @commandLine, '-cp';
+    $copyNext = 1;
+  } elsif ($arg eq '-classpath' or $arg eq '--classpath') {
+    push @commandLine, '-classpath';
+    $copyNext = 1;
+  } elsif ($arg =~ /^-Djava.library.path=(.+)$/) {
+    # A component of the JNI search path has been given.
+    if ($JNIPath) {
+      $JNIPath = $JNIPath . ':' . $1;
+    } else {
+      $JNIPath = $1;
+    }
+  } elsif ($arg eq '-jar' or $arg =~ /^-D/) {
+    # Copy the argument directly.
+    push @commandLine, $arg;
+  } elsif ($arg =~ /^-/) {
+    # An unrecognised option has been passed - just drop it.
+  } else {
+    # Some non-option argument has been given.
+    # Stop parsing options at this point.
+    push @commandLine, $arg;
+    $parsingOptions = 0;
+  }
+}
+
+# Add the debian JNI module directory to the JNI search path if it's not
+# already there.
+if ($JNIPath !~ /(^|:)$debianJNIDir($|:)/) {
+  if ($JNIPath) {
+    $JNIPath = $JNIPath . ':' . $debianJNIDir;
+  } else {
+    $JNIPath = $debianJNIDir;
+  }
+}
+
+# Use environment variable $LTDL_LIBRARY_PATH to store the JNI path,
+# since gij uses libltdl to dlopen JNI modules.
+if ($ENV{LTDL_LIBRARY_PATH}) {
+    $ENV{LTDL_LIBRARY_PATH} = $ENV{LTDL_LIBRARY_PATH} . ':' . $JNIPath;
+} else {
+    $ENV{LTDL_LIBRARY_PATH} = $JNIPath;
+}
+
+# Call the real Java runtime.
+my @fullCommandLine = ( $javaRuntime );
+push @fullCommandLine, @commandLine;
+exec @fullCommandLine or exit(1);
--- gcc-5-5.4.0.orig/debian/gij-wrapper-BV.1
+++ gcc-5-5.4.0/debian/gij-wrapper-BV.1
@@ -0,0 +1,22 @@
+.TH GIJ-WRAPPER 1 "August 11, 2001" gij-wrapper "Java User's Manual"
+.SH NAME
+gij-wrapper \- a wrapper around gij
+
+.SH SYNOPSIS
+gij-wrapper [\fB\s-1OPTION\s0\fR] ... \fI\s-1JARFILE\s0\fR [\fI\s-1ARGS\s0\fR...]
+.PP
+gij-wrapper [\fB\-jar\fR] [\fB\s-1OPTION\s0\fR] ... \fI\s-1CLASS\s0\fR [\fI\s-1ARGS\s0\fR...]
+
+.SH DESCRIPTION
+
+\fBgij-wrapper\fR is a wrapper around gij(1) to be called as the java
+interpreter. Options different for java(1) and gij(1) are translated,
+options unknown to gij(1) are silently ignored.
+
+.SH OPTIONS
+See gij-@BV@(1) for a list of options that gij understands.
+
+.SH "SEE ALSO"
+.BR gij-@BV@(1)
+,
+.BR java(1)
--- gcc-5-5.4.0.orig/debian/gnat-BV-doc.doc-base.rm
+++ gcc-5-5.4.0/debian/gnat-BV-doc.doc-base.rm
@@ -0,0 +1,16 @@
+Document: gnat-rm-@BV@
+Title: GNAT (GNU Ada) Reference Manual
+Author: Various
+Abstract: This manual contains useful information in writing programs
+ using the GNAT compiler.  It includes information on implementation
+ dependent characteristics of GNAT, including all the information
+ required by Annex M of the standard.
+Section: Programming/Ada
+
+Format: html
+Index: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html
+Files: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html
+
+Format: info
+Index: /usr/share/info/gnat_rm-@BV@.info.gz
+Files: /usr/share/info/gnat_rm-@BV@*
--- gcc-5-5.4.0.orig/debian/gnat-BV-doc.doc-base.style
+++ gcc-5-5.4.0/debian/gnat-BV-doc.doc-base.style
@@ -0,0 +1,16 @@
+Document: gnat-style-@BV@
+Title: GNAT Coding Style
+Author: Various
+Abstract: Most of GNAT is written in Ada using a consistent style to
+ ensure readability of the code.  This document has been written to
+ help maintain this consistent style, while having a large group of
+ developers work on the compiler.
+Section: Programming/Ada
+
+Format: html
+Index: /usr/share/doc/gnat-@BV@-doc/gnat-style.html
+Files: /usr/share/doc/gnat-@BV@-doc/gnat-style.html
+
+Format: info
+Index: /usr/share/info/gnat-style-@BV@.info.gz
+Files: /usr/share/info/gnat-style-@BV@*
--- gcc-5-5.4.0.orig/debian/gnat-BV-doc.doc-base.ug
+++ gcc-5-5.4.0/debian/gnat-BV-doc.doc-base.ug
@@ -0,0 +1,16 @@
+Document: gnat-ugn-@BV@
+Title: GNAT User's Guide for Unix Platforms
+Author: Various
+Abstract: This guide describes the use of GNAT, a compiler and
+ software development toolset for the full Ada 95 programming language.
+ It describes the features of the compiler and tools, and details how
+ to use them to build Ada 95 applications.
+Section: Programming/Ada
+
+Format: html
+Index: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html
+Files: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html
+
+Format: info
+Index: /usr/share/info/gnat_ugn-@BV@.info.gz
+Files: /usr/share/info/gnat_ugn-@BV@*
--- gcc-5-5.4.0.orig/debian/gnat-BV.overrides
+++ gcc-5-5.4.0/debian/gnat-BV.overrides
@@ -0,0 +1 @@
+gnat-@BV@ binary: quilt-build-dep-but-no-series-file
--- gcc-5-5.4.0.orig/debian/gnat.1
+++ gcc-5-5.4.0/debian/gnat.1
@@ -0,0 +1,43 @@
+.\" Hey, Emacs!  This is an -*- nroff -*- source file.
+.\"
+.\" Copyright (C) 1996 Erick Branderhorst <branderh@debian.org>
+.\" Copyright (C) 2011 Nicolas Boulenguez <nicolas.boulenguez@free.fr>
+.\"
+.\" This is free software; you can redistribute it and/or modify it under
+.\" the terms of the GNU General Public License as published by the Free
+.\" Software Foundation; either version 2, or (at your option) any later
+.\" version.
+.\"
+.\" This is distributed in the hope that it will be useful, but WITHOUT
+.\" ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+.\" FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+.\" for more details.
+.\"
+.\" You should have received a copy of the GNU General Public License with
+.\" your Debian GNU/Linux system, in /usr/doc/copyright/GPL, or with the
+.\" dpkg source package as the file COPYING.  If not, write to the Free
+.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+.\"
+.\"
+.TH "GNAT TOOLBOX" 1 "Jun 2002" "Debian Project" "Debian Linux"
+.SH NAME
+gnat, gnatbind, gnatbl, gnatchop, gnatfind, gnathtml, gnatkr, gnatlink,
+gnatls, gnatmake, gnatprep, gnatpsta, gnatpsys, gnatxref \-
+GNAT toolbox
+.SH DESCRIPTION
+Those programs are part of GNU GNAT, a freely available Ada 95 compiler.
+.PP
+For accessing the full GNAT manuals, use
+.B info gnat-ug-4.8
+and
+.B info gnat-rm-4.8
+for the sections related to the reference manual.
+If those sections cannot be found, you will have to install the
+gnat-4.4-doc package as well (since these manuals contain invariant parts,
+the package is located in the non-free part of the Debian archive).
+You may also browse
+.B http://gcc.gnu.org/onlinedocs
+which provides the GCC online documentation.
+.SH AUTHOR
+This manpage has been written by Samuel Tardieu <sam@debian.org>, for the
+Debian GNU/Linux project.
--- gcc-5-5.4.0.orig/debian/gnatprj.gpr
+++ gcc-5-5.4.0/debian/gnatprj.gpr
@@ -0,0 +1,32 @@
+--  Project file for use with GNAT
+--  Copyright (c) 2005, 2008 Ludovic Brenta <ludovic@ludovic-brenta.org>
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  This project file is designed to help build applications that use
+--  GNAT project files.  Here is an example of how to use this project file:
+--
+--  with "gnatprj";
+--  project Example is
+--     for Object_Dir use "obj";
+--     for Exec_Dir use ".";
+--     for Main use ("example");
+--  end Example;
+
+with "gnatvsn.gpr";
+project Gnatprj is
+   for Library_Name use "gnatprj";
+   for Library_Dir use "/usr/lib";
+   for Library_Kind use "dynamic";
+   for Source_Dirs use ("/usr/share/ada/adainclude/gnatprj");
+   for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatprj";
+   for Externally_Built use "true";
+end Gnatprj;
--- gcc-5-5.4.0.orig/debian/gnatvsn.gpr
+++ gcc-5-5.4.0/debian/gnatvsn.gpr
@@ -0,0 +1,31 @@
+--  Project file for use with GNAT
+--  Copyright (c) 2005, 2008 Ludovic Brenta <ludovic@ludovic-brenta.org>
+--
+--  This program is free software; you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation; either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  This project file is designed to help build applications that use
+--  GNAT project files.  Here is an example of how to use this project file:
+--
+--  with "gnatvsn";
+--  project Example is
+--     for Object_Dir use "obj";
+--     for Exec_Dir use ".";
+--     for Main use ("example");
+--  end Example;
+
+project Gnatvsn is
+   for Library_Name use "gnatvsn";
+   for Library_Dir use "/usr/lib";
+   for Library_Kind use "dynamic";
+   for Source_Dirs use ("/usr/share/ada/adainclude/gnatvsn");
+   for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatvsn";
+   for Externally_Built use "true";
+end Gnatvsn;
--- gcc-5-5.4.0.orig/debian/jdb.sh
+++ gcc-5-5.4.0/debian/jdb.sh
@@ -0,0 +1,9 @@
+#!/bin/sh
+
+# Placeholder script to fake a
+# JDK compatible JAVA_HOME directory.
+
+echo >&2 "This script is only a placeholder."
+echo >&2 "Some programs need a JDK rather than only a JRE to work."
+echo >&2 "They test for this tool to detect a JDK installation, but"
+echo >&2 "don't really need its functionality to work correctly."
--- gcc-5-5.4.0.orig/debian/lib32asan0.overrides
+++ gcc-5-5.4.0/debian/lib32asan0.overrides
@@ -0,0 +1,2 @@
+# automake gets it wrong for the multilib build
+lib32asan0 binary: binary-or-shlib-defines-rpath
--- gcc-5-5.4.0.orig/debian/lib32asan0.symbols
+++ gcc-5-5.4.0/debian/lib32asan0.symbols
@@ -0,0 +1,3 @@
+libasan.so.0 lib32asan0 #MINVER#
+#include "libasan0.symbols.common"
+#include "libasan0.symbols.32"
--- gcc-5-5.4.0.orig/debian/lib32gccLC.postinst
+++ gcc-5-5.4.0/debian/lib32gccLC.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/lib32gcc@LC@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/lib32objc4.symbols
+++ gcc-5-5.4.0/debian/lib32objc4.symbols
@@ -0,0 +1,3 @@
+libobjc.so.4 lib32objc4 #MINVER#
+#include "libobjc4.symbols.common"
+ __gnu_objc_personality_v0@Base 4.2.1
--- gcc-5-5.4.0.orig/debian/lib32stdc++6.symbols.amd64
+++ gcc-5-5.4.0/debian/lib32stdc++6.symbols.amd64
@@ -0,0 +1,14 @@
+libstdc++.so.6 lib32stdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvjS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
--- gcc-5-5.4.0.orig/debian/lib32stdc++6.symbols.kfreebsd-amd64
+++ gcc-5-5.4.0/debian/lib32stdc++6.symbols.kfreebsd-amd64
@@ -0,0 +1,7 @@
+libstdc++.so.6 lib32stdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/lib32stdc++6.symbols.ppc64
+++ gcc-5-5.4.0/debian/lib32stdc++6.symbols.ppc64
@@ -0,0 +1,9 @@
+libstdc++.so.6 lib32stdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/lib32stdc++6.symbols.s390x
+++ gcc-5-5.4.0/debian/lib32stdc++6.symbols.s390x
@@ -0,0 +1,558 @@
+libstdc++.so.6 lib32stdc++6 #MINVER#
+#include "libstdc++6.symbols.common"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.f128"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0
+ _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7
+ _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0
+ _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_mw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi4readEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6ignoreEii@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi8readsomeEPci@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSo5writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSo8_M_writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSs10_S_compareEmm@GLIBCXX_3.4.16 4.7
+ _ZNSs12_S_constructEmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs14_M_replace_auxEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs15_M_replace_safeEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs18_S_construct_aux_2EmcRKSaIcE@GLIBCXX_3.4.14 4.5.0
+ _ZNSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs4_Rep8_M_cloneERKSaIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep9_S_createEmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_mc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4.5 4.1.1
+ _ZNSs9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE7seekoffExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8xsputn_2EPKciS2_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_allocEm@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_setupEPcS0_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEij@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS4_x@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS4_x@GLIBCXX_3.4.16 4.7
+ _ZNSt15messages_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC1EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC2EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEm@GLIBCXX_3.4.7 4.1.1
+ _ZNSt6locale5_ImplC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZSt11_Hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt15_Fnv_hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__verify_groupingPKcmRKSs@GLIBCXX_3.4.10 4.3
+ _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _Znam@GLIBCXX_3.4 4.1.1
+ _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _Znwm@GLIBCXX_3.4 4.1.1
+ _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit.s390"
+ _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/lib32stdc++6.symbols.sparc64
+++ gcc-5-5.4.0/debian/lib32stdc++6.symbols.sparc64
@@ -0,0 +1,9 @@
+libstdc++.so.6 lib32stdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/lib32stdc++CXX.postinst
+++ gcc-5-5.4.0/debian/lib32stdc++CXX.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/lib32stdc++@CXX@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/lib64asan0.overrides
+++ gcc-5-5.4.0/debian/lib64asan0.overrides
@@ -0,0 +1,2 @@
+# automake gets it wrong for the multilib build
+lib64asan0 binary: binary-or-shlib-defines-rpath
--- gcc-5-5.4.0.orig/debian/lib64asan0.symbols
+++ gcc-5-5.4.0/debian/lib64asan0.symbols
@@ -0,0 +1,3 @@
+libasan.so.0 lib64asan0 #MINVER#
+#include "libasan0.symbols.common"
+#include "libasan0.symbols.64"
--- gcc-5-5.4.0.orig/debian/lib64gccLC.postinst
+++ gcc-5-5.4.0/debian/lib64gccLC.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/lib64gcc@LC@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/lib64objc4.symbols
+++ gcc-5-5.4.0/debian/lib64objc4.symbols
@@ -0,0 +1,3 @@
+libobjc.so.4 lib64objc4 #MINVER#
+#include "libobjc4.symbols.common"
+ __gnu_objc_personality_v0@Base 4.2.1
--- gcc-5-5.4.0.orig/debian/lib64stdc++6.symbols.i386
+++ gcc-5-5.4.0/debian/lib64stdc++6.symbols.i386
@@ -0,0 +1,40 @@
+libstdc++.so.6 lib64stdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# acosl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# asinl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# atan2l@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# atanl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# ceill@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# coshl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# cosl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# expl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# floorl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# fmodl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# frexpl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# hypotl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# ldexpl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# log10l@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# logl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# modfl@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# powl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# sinhl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# sinl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# sqrtl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# tanhl@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# tanl@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvmmS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvmS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvmmS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvmS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
--- gcc-5-5.4.0.orig/debian/lib64stdc++6.symbols.powerpc
+++ gcc-5-5.4.0/debian/lib64stdc++6.symbols.powerpc
@@ -0,0 +1,11 @@
+libstdc++.so.6 lib64stdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.f128"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/lib64stdc++6.symbols.s390
+++ gcc-5-5.4.0/debian/lib64stdc++6.symbols.s390
@@ -0,0 +1,12 @@
+libstdc++.so.6 lib64stdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/lib64stdc++6.symbols.sparc
+++ gcc-5-5.4.0/debian/lib64stdc++6.symbols.sparc
@@ -0,0 +1,11 @@
+libstdc++.so.6 lib64stdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1
+# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc.
+# #include "libstdc++6.symbols.ldbl.64bit"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/lib64stdc++CXX.postinst
+++ gcc-5-5.4.0/debian/lib64stdc++CXX.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/lib64stdc++@CXX@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libasan.symbols.16
+++ gcc-5-5.4.0/debian/libasan.symbols.16
@@ -0,0 +1,38 @@
+ __sanitizer_syscall_post_impl_chown16@Base 5
+ __sanitizer_syscall_post_impl_fchown16@Base 5
+ __sanitizer_syscall_post_impl_getegid16@Base 5
+ __sanitizer_syscall_post_impl_geteuid16@Base 5
+ __sanitizer_syscall_post_impl_getgid16@Base 5
+ __sanitizer_syscall_post_impl_getgroups16@Base 5
+ __sanitizer_syscall_post_impl_getresgid16@Base 5
+ __sanitizer_syscall_post_impl_getresuid16@Base 5
+ __sanitizer_syscall_post_impl_getuid16@Base 5
+ __sanitizer_syscall_post_impl_lchown16@Base 5
+ __sanitizer_syscall_post_impl_setfsgid16@Base 5
+ __sanitizer_syscall_post_impl_setfsuid16@Base 5
+ __sanitizer_syscall_post_impl_setgid16@Base 5
+ __sanitizer_syscall_post_impl_setgroups16@Base 5
+ __sanitizer_syscall_post_impl_setregid16@Base 5
+ __sanitizer_syscall_post_impl_setresgid16@Base 5
+ __sanitizer_syscall_post_impl_setresuid16@Base 5
+ __sanitizer_syscall_post_impl_setreuid16@Base 5
+ __sanitizer_syscall_post_impl_setuid16@Base 5
+ __sanitizer_syscall_pre_impl_chown16@Base 5
+ __sanitizer_syscall_pre_impl_fchown16@Base 5
+ __sanitizer_syscall_pre_impl_getegid16@Base 5
+ __sanitizer_syscall_pre_impl_geteuid16@Base 5
+ __sanitizer_syscall_pre_impl_getgid16@Base 5
+ __sanitizer_syscall_pre_impl_getgroups16@Base 5
+ __sanitizer_syscall_pre_impl_getresgid16@Base 5
+ __sanitizer_syscall_pre_impl_getresuid16@Base 5
+ __sanitizer_syscall_pre_impl_getuid16@Base 5
+ __sanitizer_syscall_pre_impl_lchown16@Base 5
+ __sanitizer_syscall_pre_impl_setfsgid16@Base 5
+ __sanitizer_syscall_pre_impl_setfsuid16@Base 5
+ __sanitizer_syscall_pre_impl_setgid16@Base 5
+ __sanitizer_syscall_pre_impl_setgroups16@Base 5
+ __sanitizer_syscall_pre_impl_setregid16@Base 5
+ __sanitizer_syscall_pre_impl_setresgid16@Base 5
+ __sanitizer_syscall_pre_impl_setresuid16@Base 5
+ __sanitizer_syscall_pre_impl_setreuid16@Base 5
+ __sanitizer_syscall_pre_impl_setuid16@Base 5
--- gcc-5-5.4.0.orig/debian/libasan.symbols.32
+++ gcc-5-5.4.0/debian/libasan.symbols.32
@@ -0,0 +1,8 @@
+ _ZdaPvj@Base 5
+ _ZdaPvm@Base 5
+ _ZdlPvj@Base 5
+ _ZdlPvm@Base 5
+ _Znaj@Base 4.8
+ _ZnajRKSt9nothrow_t@Base 4.8
+ _Znwj@Base 4.8
+ _ZnwjRKSt9nothrow_t@Base 4.8
--- gcc-5-5.4.0.orig/debian/libasan.symbols.64
+++ gcc-5-5.4.0/debian/libasan.symbols.64
@@ -0,0 +1,8 @@
+ __interceptor_shmctl@Base 4.9
+ _ZdaPvm@Base 5
+ _ZdlPvm@Base 5
+ _Znam@Base 4.8
+ _ZnamRKSt9nothrow_t@Base 4.8
+ _Znwm@Base 4.8
+ _ZnwmRKSt9nothrow_t@Base 4.8
+ shmctl@Base 4.9
--- gcc-5-5.4.0.orig/debian/libasan.symbols.common
+++ gcc-5-5.4.0/debian/libasan.symbols.common
@@ -0,0 +1,1492 @@
+ _ZN11__sanitizer11CheckFailedEPKciS1_yy@Base 4.8
+ _ZN11__sanitizer7OnPrintEPKc@Base 4.9
+ _ZdaPv@Base 4.8
+ _ZdaPvRKSt9nothrow_t@Base 4.8
+ _ZdlPv@Base 4.8
+ _ZdlPvRKSt9nothrow_t@Base 4.8
+ __asan_addr_is_in_fake_stack@Base 5
+ __asan_address_is_poisoned@Base 4.8
+ __asan_after_dynamic_init@Base 4.8
+ __asan_backtrace_alloc@Base 4.9
+ __asan_backtrace_close@Base 4.9
+ __asan_backtrace_create_state@Base 4.9
+ __asan_backtrace_dwarf_add@Base 4.9
+ __asan_backtrace_free@Base 4.9
+ __asan_backtrace_get_view@Base 4.9
+ __asan_backtrace_initialize@Base 4.9
+ __asan_backtrace_open@Base 4.9
+ __asan_backtrace_pcinfo@Base 4.9
+ __asan_backtrace_qsort@Base 4.9
+ __asan_backtrace_release_view@Base 4.9
+ __asan_backtrace_syminfo@Base 4.9
+ __asan_backtrace_vector_finish@Base 4.9
+ __asan_backtrace_vector_grow@Base 4.9
+ __asan_backtrace_vector_release@Base 4.9
+ __asan_before_dynamic_init@Base 4.8
+ __asan_cplus_demangle_builtin_types@Base 4.9
+ __asan_cplus_demangle_fill_ctor@Base 4.9
+ __asan_cplus_demangle_fill_dtor@Base 4.9
+ __asan_cplus_demangle_fill_extended_operator@Base 4.9
+ __asan_cplus_demangle_fill_name@Base 4.9
+ __asan_cplus_demangle_init_info@Base 4.9
+ __asan_cplus_demangle_mangled_name@Base 4.9
+ __asan_cplus_demangle_operators@Base 4.9
+ __asan_cplus_demangle_print@Base 4.9
+ __asan_cplus_demangle_print_callback@Base 4.9
+ __asan_cplus_demangle_type@Base 4.9
+ __asan_cplus_demangle_v3@Base 4.9
+ __asan_cplus_demangle_v3_callback@Base 4.9
+ __asan_describe_address@Base 4.8
+ __asan_get_alloc_stack@Base 5
+ __asan_get_current_fake_stack@Base 5
+ __asan_get_free_stack@Base 5
+ __asan_get_report_access_size@Base 5
+ __asan_get_report_access_type@Base 5
+ __asan_get_report_address@Base 5
+ __asan_get_report_bp@Base 5
+ __asan_get_report_description@Base 5
+ __asan_get_report_pc@Base 5
+ __asan_get_report_sp@Base 5
+ __asan_get_shadow_mapping@Base 5
+ __asan_handle_no_return@Base 4.8
+ __asan_init_v4@Base 5
+ __asan_internal_memcmp@Base 4.9
+ __asan_internal_memcpy@Base 4.9
+ __asan_internal_memset@Base 4.9
+ __asan_internal_strcmp@Base 4.9
+ __asan_internal_strlen@Base 4.9
+ __asan_internal_strncmp@Base 4.9
+ __asan_internal_strnlen@Base 4.9
+ __asan_is_gnu_v3_mangled_ctor@Base 4.9
+ __asan_is_gnu_v3_mangled_dtor@Base 4.9
+ __asan_java_demangle_v3@Base 4.9
+ __asan_java_demangle_v3_callback@Base 4.9
+ __asan_load16@Base 5
+ __asan_load1@Base 5
+ __asan_load2@Base 5
+ __asan_load4@Base 5
+ __asan_load8@Base 5
+ __asan_loadN@Base 5
+ __asan_load_cxx_array_cookie@Base 5
+ __asan_locate_address@Base 5
+ __asan_memcpy@Base 5
+ __asan_memmove@Base 5
+ __asan_memset@Base 5
+ __asan_option_detect_stack_use_after_return@Base 4.9
+ __asan_poison_cxx_array_cookie@Base 5
+ __asan_poison_intra_object_redzone@Base 5
+ __asan_poison_memory_region@Base 4.8
+ __asan_poison_stack_memory@Base 4.8
+ __asan_print_accumulated_stats@Base 4.8
+ __asan_region_is_poisoned@Base 4.8
+ __asan_register_globals@Base 4.8
+ __asan_report_error@Base 4.8
+ __asan_report_load16@Base 4.8
+ __asan_report_load1@Base 4.8
+ __asan_report_load2@Base 4.8
+ __asan_report_load4@Base 4.8
+ __asan_report_load8@Base 4.8
+ __asan_report_load_n@Base 4.8
+ __asan_report_present@Base 5
+ __asan_report_store16@Base 4.8
+ __asan_report_store1@Base 4.8
+ __asan_report_store2@Base 4.8
+ __asan_report_store4@Base 4.8
+ __asan_report_store8@Base 4.8
+ __asan_report_store_n@Base 4.8
+ __asan_rt_version@Base 5
+ __asan_set_death_callback@Base 4.8
+ __asan_set_error_exit_code@Base 4.8
+ __asan_set_error_report_callback@Base 4.8
+ __asan_stack_free_0@Base 4.9
+ __asan_stack_free_10@Base 4.9
+ __asan_stack_free_1@Base 4.9
+ __asan_stack_free_2@Base 4.9
+ __asan_stack_free_3@Base 4.9
+ __asan_stack_free_4@Base 4.9
+ __asan_stack_free_5@Base 4.9
+ __asan_stack_free_6@Base 4.9
+ __asan_stack_free_7@Base 4.9
+ __asan_stack_free_8@Base 4.9
+ __asan_stack_free_9@Base 4.9
+ __asan_stack_malloc_0@Base 4.9
+ __asan_stack_malloc_10@Base 4.9
+ __asan_stack_malloc_1@Base 4.9
+ __asan_stack_malloc_2@Base 4.9
+ __asan_stack_malloc_3@Base 4.9
+ __asan_stack_malloc_4@Base 4.9
+ __asan_stack_malloc_5@Base 4.9
+ __asan_stack_malloc_6@Base 4.9
+ __asan_stack_malloc_7@Base 4.9
+ __asan_stack_malloc_8@Base 4.9
+ __asan_stack_malloc_9@Base 4.9
+ __asan_store16@Base 5
+ __asan_store1@Base 5
+ __asan_store2@Base 5
+ __asan_store4@Base 5
+ __asan_store8@Base 5
+ __asan_storeN@Base 5
+ __asan_test_only_reported_buggy_pointer@Base 5
+ __asan_unpoison_intra_object_redzone@Base 5
+ __asan_unpoison_memory_region@Base 4.8
+ __asan_unpoison_stack_memory@Base 4.8
+ __asan_unregister_globals@Base 4.8
+ __cxa_atexit@Base 4.9
+ __cxa_throw@Base 4.8
+ __getdelim@Base 5
+ __interceptor___cxa_atexit@Base 4.9
+ __interceptor___cxa_throw@Base 4.8
+ __interceptor___getdelim@Base 5
+ __interceptor___isoc99_fprintf@Base 5
+ __interceptor___isoc99_fscanf@Base 4.8
+ __interceptor___isoc99_printf@Base 5
+ __interceptor___isoc99_scanf@Base 4.8
+ __interceptor___isoc99_snprintf@Base 5
+ __interceptor___isoc99_sprintf@Base 5
+ __interceptor___isoc99_sscanf@Base 4.8
+ __interceptor___isoc99_vfprintf@Base 5
+ __interceptor___isoc99_vfscanf@Base 4.8
+ __interceptor___isoc99_vprintf@Base 5
+ __interceptor___isoc99_vscanf@Base 4.8
+ __interceptor___isoc99_vsnprintf@Base 5
+ __interceptor___isoc99_vsprintf@Base 5
+ __interceptor___isoc99_vsscanf@Base 4.8
+ __interceptor___libc_memalign@Base 4.8
+ __interceptor___overflow@Base 5
+ __interceptor___tls_get_addr@Base 5
+ __interceptor___uflow@Base 5
+ __interceptor___underflow@Base 5
+ __interceptor___woverflow@Base 5
+ __interceptor___wuflow@Base 5
+ __interceptor___wunderflow@Base 5
+ __interceptor___xpg_strerror_r@Base 4.9
+ __interceptor__exit@Base 4.9
+ __interceptor__longjmp@Base 4.8
+ __interceptor__obstack_begin@Base 5
+ __interceptor__obstack_begin_1@Base 5
+ __interceptor__obstack_newchunk@Base 5
+ __interceptor_accept4@Base 4.9
+ __interceptor_accept@Base 4.9
+ __interceptor_aligned_alloc@Base 5
+ __interceptor_asctime@Base 4.8
+ __interceptor_asctime_r@Base 4.8
+ __interceptor_asprintf@Base 5
+ __interceptor_atoi@Base 4.8
+ __interceptor_atol@Base 4.8
+ __interceptor_atoll@Base 4.8
+ __interceptor_backtrace@Base 4.9
+ __interceptor_backtrace_symbols@Base 4.9
+ __interceptor_calloc@Base 4.8
+ __interceptor_canonicalize_file_name@Base 4.9
+ __interceptor_capget@Base 5
+ __interceptor_capset@Base 5
+ __interceptor_cfree@Base 4.8
+ __interceptor_clock_getres@Base 4.9
+ __interceptor_clock_gettime@Base 4.9
+ __interceptor_clock_settime@Base 4.9
+ __interceptor_confstr@Base 4.9
+ __interceptor_ctime@Base 4.8
+ __interceptor_ctime_r@Base 4.8
+ __interceptor_dlclose@Base 5
+ __interceptor_dlopen@Base 5
+ __interceptor_drand48_r@Base 4.9
+ __interceptor_endgrent@Base 5
+ __interceptor_endpwent@Base 5
+ __interceptor_ether_aton@Base 4.9
+ __interceptor_ether_aton_r@Base 4.9
+ __interceptor_ether_hostton@Base 4.9
+ __interceptor_ether_line@Base 4.9
+ __interceptor_ether_ntoa@Base 4.9
+ __interceptor_ether_ntoa_r@Base 4.9
+ __interceptor_ether_ntohost@Base 4.9
+ __interceptor_fclose@Base 5
+ __interceptor_fdopen@Base 5
+ __interceptor_fflush@Base 5
+ __interceptor_fgetgrent@Base 5
+ __interceptor_fgetgrent_r@Base 5
+ __interceptor_fgetpwent@Base 5
+ __interceptor_fgetpwent_r@Base 5
+ __interceptor_fgetxattr@Base 5
+ __interceptor_flistxattr@Base 5
+ __interceptor_fmemopen@Base 5
+ __interceptor_fopen64@Base 5
+ __interceptor_fopen@Base 5
+ __interceptor_fork@Base 5
+ __interceptor_fprintf@Base 5
+ __interceptor_free@Base 4.8
+ __interceptor_freopen64@Base 5
+ __interceptor_freopen@Base 5
+ __interceptor_frexp@Base 4.9
+ __interceptor_frexpf@Base 4.9
+ __interceptor_frexpl@Base 4.9
+ __interceptor_fscanf@Base 4.8
+ __interceptor_fstatfs64@Base 4.9
+ __interceptor_fstatfs@Base 4.9
+ __interceptor_fstatvfs64@Base 4.9
+ __interceptor_fstatvfs@Base 4.9
+ __interceptor_ftime@Base 5
+ __interceptor_get_current_dir_name@Base 4.9
+ __interceptor_getaddrinfo@Base 4.9
+ __interceptor_getcwd@Base 4.9
+ __interceptor_getdelim@Base 4.9
+ __interceptor_getgrent@Base 5
+ __interceptor_getgrent_r@Base 5
+ __interceptor_getgrgid@Base 4.9
+ __interceptor_getgrgid_r@Base 4.9
+ __interceptor_getgrnam@Base 4.9
+ __interceptor_getgrnam_r@Base 4.9
+ __interceptor_getgroups@Base 4.9
+ __interceptor_gethostbyaddr@Base 4.9
+ __interceptor_gethostbyaddr_r@Base 4.9
+ __interceptor_gethostbyname2@Base 4.9
+ __interceptor_gethostbyname2_r@Base 4.9
+ __interceptor_gethostbyname@Base 4.9
+ __interceptor_gethostbyname_r@Base 4.9
+ __interceptor_gethostent@Base 4.9
+ __interceptor_gethostent_r@Base 4.9
+ __interceptor_getifaddrs@Base 5
+ __interceptor_getitimer@Base 4.9
+ __interceptor_getline@Base 4.9
+ __interceptor_getmntent@Base 4.9
+ __interceptor_getmntent_r@Base 4.9
+ __interceptor_getnameinfo@Base 4.9
+ __interceptor_getpass@Base 5
+ __interceptor_getpeername@Base 4.9
+ __interceptor_getpwent@Base 5
+ __interceptor_getpwent_r@Base 5
+ __interceptor_getpwnam@Base 4.9
+ __interceptor_getpwnam_r@Base 4.9
+ __interceptor_getpwuid@Base 4.9
+ __interceptor_getpwuid_r@Base 4.9
+ __interceptor_getresgid@Base 5
+ __interceptor_getresuid@Base 5
+ __interceptor_getsockname@Base 4.9
+ __interceptor_getsockopt@Base 4.9
+ __interceptor_getxattr@Base 5
+ __interceptor_glob64@Base 4.9
+ __interceptor_glob@Base 4.9
+ __interceptor_gmtime@Base 4.8
+ __interceptor_gmtime_r@Base 4.8
+ __interceptor_iconv@Base 4.9
+ __interceptor_if_indextoname@Base 5
+ __interceptor_if_nametoindex@Base 5
+ __interceptor_index@Base 4.8
+ __interceptor_inet_aton@Base 4.9
+ __interceptor_inet_ntop@Base 4.9
+ __interceptor_inet_pton@Base 4.9
+ __interceptor_initgroups@Base 4.9
+ __interceptor_ioctl@Base 4.9
+ __interceptor_lgamma@Base 4.9
+ __interceptor_lgamma_r@Base 4.9
+ __interceptor_lgammaf@Base 4.9
+ __interceptor_lgammaf_r@Base 4.9
+ __interceptor_lgammal@Base 4.9
+ __interceptor_lgammal_r@Base 4.9
+ __interceptor_lgetxattr@Base 5
+ __interceptor_listxattr@Base 5
+ __interceptor_llistxattr@Base 5
+ __interceptor_localtime@Base 4.8
+ __interceptor_localtime_r@Base 4.8
+ __interceptor_longjmp@Base 4.8
+ __interceptor_lrand48_r@Base 4.9
+ __interceptor_mallinfo@Base 4.8
+ __interceptor_malloc@Base 4.8
+ __interceptor_malloc_stats@Base 4.8
+ __interceptor_malloc_usable_size@Base 4.8
+ __interceptor_mallopt@Base 4.8
+ __interceptor_mbsnrtowcs@Base 4.9
+ __interceptor_mbsrtowcs@Base 4.9
+ __interceptor_mbstowcs@Base 4.9
+ __interceptor_memalign@Base 4.8
+ __interceptor_memchr@Base 5
+ __interceptor_memcmp@Base 4.8
+ __interceptor_memcpy@Base 4.8
+ __interceptor_memmove@Base 4.8
+ __interceptor_memrchr@Base 5
+ __interceptor_memset@Base 4.8
+ __interceptor_mktime@Base 5
+ __interceptor_mlock@Base 4.8
+ __interceptor_mlockall@Base 4.8
+ __interceptor_modf@Base 4.9
+ __interceptor_modff@Base 4.9
+ __interceptor_modfl@Base 4.9
+ __interceptor_munlock@Base 4.8
+ __interceptor_munlockall@Base 4.8
+ __interceptor_open_memstream@Base 5
+ __interceptor_open_wmemstream@Base 5
+ __interceptor_poll@Base 4.9
+ __interceptor_posix_memalign@Base 4.8
+ __interceptor_ppoll@Base 4.9
+ __interceptor_prctl@Base 4.8
+ __interceptor_pread64@Base 4.8
+ __interceptor_pread@Base 4.8
+ __interceptor_preadv64@Base 4.9
+ __interceptor_preadv@Base 4.9
+ __interceptor_printf@Base 5
+ __interceptor_pthread_attr_getaffinity_np@Base 4.9
+ __interceptor_pthread_attr_getdetachstate@Base 4.9
+ __interceptor_pthread_attr_getguardsize@Base 4.9
+ __interceptor_pthread_attr_getinheritsched@Base 4.9
+ __interceptor_pthread_attr_getschedparam@Base 4.9
+ __interceptor_pthread_attr_getschedpolicy@Base 4.9
+ __interceptor_pthread_attr_getscope@Base 4.9
+ __interceptor_pthread_attr_getstack@Base 4.9
+ __interceptor_pthread_attr_getstacksize@Base 4.9
+ __interceptor_pthread_barrierattr_getpshared@Base 5
+ __interceptor_pthread_condattr_getclock@Base 5
+ __interceptor_pthread_condattr_getpshared@Base 5
+ __interceptor_pthread_create@Base 4.8
+ __interceptor_pthread_getschedparam@Base 4.9
+ __interceptor_pthread_mutex_lock@Base 4.9
+ __interceptor_pthread_mutex_unlock@Base 4.9
+ __interceptor_pthread_mutexattr_getprioceiling@Base 5
+ __interceptor_pthread_mutexattr_getprotocol@Base 5
+ __interceptor_pthread_mutexattr_getpshared@Base 5
+ __interceptor_pthread_mutexattr_getrobust@Base 5
+ __interceptor_pthread_mutexattr_getrobust_np@Base 5
+ __interceptor_pthread_mutexattr_gettype@Base 5
+ __interceptor_pthread_rwlockattr_getkind_np@Base 5
+ __interceptor_pthread_rwlockattr_getpshared@Base 5
+ __interceptor_pthread_setname_np@Base 4.9
+ __interceptor_pvalloc@Base 4.8
+ __interceptor_pwrite64@Base 4.8
+ __interceptor_pwrite@Base 4.8
+ __interceptor_pwritev64@Base 4.9
+ __interceptor_pwritev@Base 4.9
+ __interceptor_rand_r@Base 5
+ __interceptor_random_r@Base 4.9
+ __interceptor_read@Base 4.8
+ __interceptor_readdir64@Base 4.9
+ __interceptor_readdir64_r@Base 4.9
+ __interceptor_readdir@Base 4.9
+ __interceptor_readdir_r@Base 4.9
+ __interceptor_readv@Base 4.9
+ __interceptor_realloc@Base 4.8
+ __interceptor_realpath@Base 4.9
+ __interceptor_recvmsg@Base 4.9
+ __interceptor_remquo@Base 4.9
+ __interceptor_remquof@Base 4.9
+ __interceptor_remquol@Base 4.9
+ __interceptor_scandir64@Base 4.9
+ __interceptor_scandir@Base 4.9
+ __interceptor_scanf@Base 4.8
+ __interceptor_sched_getaffinity@Base 4.9
+ __interceptor_setgrent@Base 5
+ __interceptor_setitimer@Base 4.9
+ __interceptor_setlocale@Base 4.9
+ __interceptor_setpwent@Base 5
+ __interceptor_sigaction@Base 4.8
+ __interceptor_sigemptyset@Base 4.9
+ __interceptor_sigfillset@Base 4.9
+ __interceptor_siglongjmp@Base 4.8
+ __interceptor_signal@Base 4.8
+ __interceptor_sigpending@Base 4.9
+ __interceptor_sigprocmask@Base 4.9
+ __interceptor_sigtimedwait@Base 4.9
+ __interceptor_sigwait@Base 4.9
+ __interceptor_sigwaitinfo@Base 4.9
+ __interceptor_sincos@Base 4.9
+ __interceptor_sincosf@Base 4.9
+ __interceptor_sincosl@Base 4.9
+ __interceptor_snprintf@Base 5
+ __interceptor_sprintf@Base 5
+ __interceptor_sscanf@Base 4.8
+ __interceptor_statfs64@Base 4.9
+ __interceptor_statfs@Base 4.9
+ __interceptor_statvfs64@Base 4.9
+ __interceptor_statvfs@Base 4.9
+ __interceptor_strcasecmp@Base 4.8
+ __interceptor_strcat@Base 4.8
+ __interceptor_strchr@Base 4.8
+ __interceptor_strcmp@Base 4.8
+ __interceptor_strcpy@Base 4.8
+ __interceptor_strdup@Base 4.8
+ __interceptor_strerror@Base 4.9
+ __interceptor_strerror_r@Base 4.9
+ __interceptor_strlen@Base 4.8
+ __interceptor_strncasecmp@Base 4.8
+ __interceptor_strncat@Base 4.8
+ __interceptor_strncmp@Base 4.8
+ __interceptor_strncpy@Base 4.8
+ __interceptor_strnlen@Base 4.8
+ __interceptor_strptime@Base 4.9
+ __interceptor_strtoimax@Base 4.9
+ __interceptor_strtol@Base 4.8
+ __interceptor_strtoll@Base 4.8
+ __interceptor_strtoumax@Base 4.9
+ __interceptor_swapcontext@Base 4.8
+ __interceptor_sysinfo@Base 4.9
+ __interceptor_tcgetattr@Base 4.9
+ __interceptor_tempnam@Base 4.9
+ __interceptor_textdomain@Base 4.9
+ __interceptor_time@Base 4.9
+ __interceptor_timerfd_gettime@Base 5
+ __interceptor_timerfd_settime@Base 5
+ __interceptor_times@Base 4.9
+ __interceptor_tmpnam@Base 4.9
+ __interceptor_tmpnam_r@Base 4.9
+ __interceptor_tsearch@Base 5
+ __interceptor_valloc@Base 4.8
+ __interceptor_vasprintf@Base 5
+ __interceptor_vfprintf@Base 5
+ __interceptor_vfscanf@Base 4.8
+ __interceptor_vprintf@Base 5
+ __interceptor_vscanf@Base 4.8
+ __interceptor_vsnprintf@Base 5
+ __interceptor_vsprintf@Base 5
+ __interceptor_vsscanf@Base 4.8
+ __interceptor_wait3@Base 4.9
+ __interceptor_wait4@Base 4.9
+ __interceptor_wait@Base 4.9
+ __interceptor_waitid@Base 4.9
+ __interceptor_waitpid@Base 4.9
+ __interceptor_wcslen@Base 4.9
+ __interceptor_wcsnrtombs@Base 4.9
+ __interceptor_wcsrtombs@Base 4.9
+ __interceptor_wcstombs@Base 4.9
+ __interceptor_wordexp@Base 4.9
+ __interceptor_write@Base 4.8
+ __interceptor_writev@Base 4.9
+ __interceptor_xdr_bool@Base 5
+ __interceptor_xdr_bytes@Base 5
+ __interceptor_xdr_char@Base 5
+ __interceptor_xdr_double@Base 5
+ __interceptor_xdr_enum@Base 5
+ __interceptor_xdr_float@Base 5
+ __interceptor_xdr_hyper@Base 5
+ __interceptor_xdr_int16_t@Base 5
+ __interceptor_xdr_int32_t@Base 5
+ __interceptor_xdr_int64_t@Base 5
+ __interceptor_xdr_int8_t@Base 5
+ __interceptor_xdr_int@Base 5
+ __interceptor_xdr_long@Base 5
+ __interceptor_xdr_longlong_t@Base 5
+ __interceptor_xdr_quad_t@Base 5
+ __interceptor_xdr_short@Base 5
+ __interceptor_xdr_string@Base 5
+ __interceptor_xdr_u_char@Base 5
+ __interceptor_xdr_u_hyper@Base 5
+ __interceptor_xdr_u_int@Base 5
+ __interceptor_xdr_u_long@Base 5
+ __interceptor_xdr_u_longlong_t@Base 5
+ __interceptor_xdr_u_quad_t@Base 5
+ __interceptor_xdr_u_short@Base 5
+ __interceptor_xdr_uint16_t@Base 5
+ __interceptor_xdr_uint32_t@Base 5
+ __interceptor_xdr_uint64_t@Base 5
+ __interceptor_xdr_uint8_t@Base 5
+ __interceptor_xdrmem_create@Base 5
+ __interceptor_xdrstdio_create@Base 5
+ __isoc99_fprintf@Base 5
+ __isoc99_fscanf@Base 4.8
+ __isoc99_printf@Base 5
+ __isoc99_scanf@Base 4.8
+ __isoc99_snprintf@Base 5
+ __isoc99_sprintf@Base 5
+ __isoc99_sscanf@Base 4.8
+ __isoc99_vfprintf@Base 5
+ __isoc99_vfscanf@Base 4.8
+ __isoc99_vprintf@Base 5
+ __isoc99_vscanf@Base 4.8
+ __isoc99_vsnprintf@Base 5
+ __isoc99_vsprintf@Base 5
+ __isoc99_vsscanf@Base 4.8
+ __libc_memalign@Base 4.8
+ __lsan_disable@Base 4.9
+ __lsan_do_leak_check@Base 4.9
+ __lsan_enable@Base 4.9
+ __lsan_ignore_object@Base 4.9
+ __lsan_register_root_region@Base 5
+ __lsan_unregister_root_region@Base 5
+ __overflow@Base 5
+ __sanitizer_annotate_contiguous_container@Base 4.9
+ __sanitizer_cov@Base 4.9
+ __sanitizer_cov_dump@Base 4.9
+ __sanitizer_cov_indir_call16@Base 5
+ __sanitizer_cov_init@Base 5
+ __sanitizer_cov_module_init@Base 5
+ __sanitizer_get_allocated_size@Base 5
+ __sanitizer_get_current_allocated_bytes@Base 5
+ __sanitizer_get_estimated_allocated_size@Base 5
+ __sanitizer_get_free_bytes@Base 5
+ __sanitizer_get_heap_size@Base 5
+ __sanitizer_get_ownership@Base 5
+ __sanitizer_get_unmapped_bytes@Base 5
+ __sanitizer_maybe_open_cov_file@Base 5
+ __sanitizer_print_stack_trace@Base 4.9
+ __sanitizer_ptr_cmp@Base 5
+ __sanitizer_ptr_sub@Base 5
+ __sanitizer_report_error_summary@Base 4.8
+ __sanitizer_sandbox_on_notify@Base 4.8
+ __sanitizer_set_report_path@Base 4.8
+ __sanitizer_syscall_post_impl_accept4@Base 4.9
+ __sanitizer_syscall_post_impl_accept@Base 4.9
+ __sanitizer_syscall_post_impl_access@Base 4.9
+ __sanitizer_syscall_post_impl_acct@Base 4.9
+ __sanitizer_syscall_post_impl_add_key@Base 4.9
+ __sanitizer_syscall_post_impl_adjtimex@Base 4.9
+ __sanitizer_syscall_post_impl_alarm@Base 4.9
+ __sanitizer_syscall_post_impl_bdflush@Base 4.9
+ __sanitizer_syscall_post_impl_bind@Base 4.9
+ __sanitizer_syscall_post_impl_brk@Base 4.9
+ __sanitizer_syscall_post_impl_capget@Base 4.9
+ __sanitizer_syscall_post_impl_capset@Base 4.9
+ __sanitizer_syscall_post_impl_chdir@Base 4.9
+ __sanitizer_syscall_post_impl_chmod@Base 4.9
+ __sanitizer_syscall_post_impl_chown@Base 4.9
+ __sanitizer_syscall_post_impl_chroot@Base 4.9
+ __sanitizer_syscall_post_impl_clock_adjtime@Base 4.9
+ __sanitizer_syscall_post_impl_clock_getres@Base 4.9
+ __sanitizer_syscall_post_impl_clock_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_clock_nanosleep@Base 4.9
+ __sanitizer_syscall_post_impl_clock_settime@Base 4.9
+ __sanitizer_syscall_post_impl_close@Base 4.9
+ __sanitizer_syscall_post_impl_connect@Base 4.9
+ __sanitizer_syscall_post_impl_creat@Base 4.9
+ __sanitizer_syscall_post_impl_delete_module@Base 4.9
+ __sanitizer_syscall_post_impl_dup2@Base 4.9
+ __sanitizer_syscall_post_impl_dup3@Base 4.9
+ __sanitizer_syscall_post_impl_dup@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_create1@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_create@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_ctl@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_pwait@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_wait@Base 4.9
+ __sanitizer_syscall_post_impl_eventfd2@Base 4.9
+ __sanitizer_syscall_post_impl_eventfd@Base 4.9
+ __sanitizer_syscall_post_impl_exit@Base 4.9
+ __sanitizer_syscall_post_impl_exit_group@Base 4.9
+ __sanitizer_syscall_post_impl_faccessat@Base 4.9
+ __sanitizer_syscall_post_impl_fchdir@Base 4.9
+ __sanitizer_syscall_post_impl_fchmod@Base 4.9
+ __sanitizer_syscall_post_impl_fchmodat@Base 4.9
+ __sanitizer_syscall_post_impl_fchown@Base 4.9
+ __sanitizer_syscall_post_impl_fchownat@Base 4.9
+ __sanitizer_syscall_post_impl_fcntl64@Base 4.9
+ __sanitizer_syscall_post_impl_fcntl@Base 4.9
+ __sanitizer_syscall_post_impl_fdatasync@Base 4.9
+ __sanitizer_syscall_post_impl_fgetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_flistxattr@Base 4.9
+ __sanitizer_syscall_post_impl_flock@Base 4.9
+ __sanitizer_syscall_post_impl_fork@Base 4.9
+ __sanitizer_syscall_post_impl_fremovexattr@Base 4.9
+ __sanitizer_syscall_post_impl_fsetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_fstat64@Base 4.9
+ __sanitizer_syscall_post_impl_fstat@Base 4.9
+ __sanitizer_syscall_post_impl_fstatat64@Base 4.9
+ __sanitizer_syscall_post_impl_fstatfs64@Base 4.9
+ __sanitizer_syscall_post_impl_fstatfs@Base 4.9
+ __sanitizer_syscall_post_impl_fsync@Base 4.9
+ __sanitizer_syscall_post_impl_ftruncate@Base 4.9
+ __sanitizer_syscall_post_impl_futimesat@Base 4.9
+ __sanitizer_syscall_post_impl_get_mempolicy@Base 4.9
+ __sanitizer_syscall_post_impl_get_robust_list@Base 4.9
+ __sanitizer_syscall_post_impl_getcpu@Base 4.9
+ __sanitizer_syscall_post_impl_getcwd@Base 4.9
+ __sanitizer_syscall_post_impl_getdents64@Base 4.9
+ __sanitizer_syscall_post_impl_getdents@Base 4.9
+ __sanitizer_syscall_post_impl_getegid@Base 4.9
+ __sanitizer_syscall_post_impl_geteuid@Base 4.9
+ __sanitizer_syscall_post_impl_getgid@Base 4.9
+ __sanitizer_syscall_post_impl_getgroups@Base 4.9
+ __sanitizer_syscall_post_impl_gethostname@Base 4.9
+ __sanitizer_syscall_post_impl_getitimer@Base 4.9
+ __sanitizer_syscall_post_impl_getpeername@Base 4.9
+ __sanitizer_syscall_post_impl_getpgid@Base 4.9
+ __sanitizer_syscall_post_impl_getpgrp@Base 4.9
+ __sanitizer_syscall_post_impl_getpid@Base 4.9
+ __sanitizer_syscall_post_impl_getppid@Base 4.9
+ __sanitizer_syscall_post_impl_getpriority@Base 4.9
+ __sanitizer_syscall_post_impl_getresgid@Base 4.9
+ __sanitizer_syscall_post_impl_getresuid@Base 4.9
+ __sanitizer_syscall_post_impl_getrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_getrusage@Base 4.9
+ __sanitizer_syscall_post_impl_getsid@Base 4.9
+ __sanitizer_syscall_post_impl_getsockname@Base 4.9
+ __sanitizer_syscall_post_impl_getsockopt@Base 4.9
+ __sanitizer_syscall_post_impl_gettid@Base 4.9
+ __sanitizer_syscall_post_impl_gettimeofday@Base 4.9
+ __sanitizer_syscall_post_impl_getuid@Base 4.9
+ __sanitizer_syscall_post_impl_getxattr@Base 4.9
+ __sanitizer_syscall_post_impl_init_module@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_add_watch@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_init1@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_init@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_rm_watch@Base 4.9
+ __sanitizer_syscall_post_impl_io_cancel@Base 4.9
+ __sanitizer_syscall_post_impl_io_destroy@Base 4.9
+ __sanitizer_syscall_post_impl_io_getevents@Base 4.9
+ __sanitizer_syscall_post_impl_io_setup@Base 4.9
+ __sanitizer_syscall_post_impl_io_submit@Base 4.9
+ __sanitizer_syscall_post_impl_ioctl@Base 4.9
+ __sanitizer_syscall_post_impl_ioperm@Base 4.9
+ __sanitizer_syscall_post_impl_ioprio_get@Base 4.9
+ __sanitizer_syscall_post_impl_ioprio_set@Base 4.9
+ __sanitizer_syscall_post_impl_ipc@Base 4.9
+ __sanitizer_syscall_post_impl_kexec_load@Base 4.9
+ __sanitizer_syscall_post_impl_keyctl@Base 4.9
+ __sanitizer_syscall_post_impl_kill@Base 4.9
+ __sanitizer_syscall_post_impl_lchown@Base 4.9
+ __sanitizer_syscall_post_impl_lgetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_link@Base 4.9
+ __sanitizer_syscall_post_impl_linkat@Base 4.9
+ __sanitizer_syscall_post_impl_listen@Base 4.9
+ __sanitizer_syscall_post_impl_listxattr@Base 4.9
+ __sanitizer_syscall_post_impl_llistxattr@Base 4.9
+ __sanitizer_syscall_post_impl_llseek@Base 4.9
+ __sanitizer_syscall_post_impl_lookup_dcookie@Base 4.9
+ __sanitizer_syscall_post_impl_lremovexattr@Base 4.9
+ __sanitizer_syscall_post_impl_lseek@Base 4.9
+ __sanitizer_syscall_post_impl_lsetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_lstat64@Base 4.9
+ __sanitizer_syscall_post_impl_lstat@Base 4.9
+ __sanitizer_syscall_post_impl_madvise@Base 4.9
+ __sanitizer_syscall_post_impl_mbind@Base 4.9
+ __sanitizer_syscall_post_impl_migrate_pages@Base 4.9
+ __sanitizer_syscall_post_impl_mincore@Base 4.9
+ __sanitizer_syscall_post_impl_mkdir@Base 4.9
+ __sanitizer_syscall_post_impl_mkdirat@Base 4.9
+ __sanitizer_syscall_post_impl_mknod@Base 4.9
+ __sanitizer_syscall_post_impl_mknodat@Base 4.9
+ __sanitizer_syscall_post_impl_mlock@Base 4.9
+ __sanitizer_syscall_post_impl_mlockall@Base 4.9
+ __sanitizer_syscall_post_impl_mmap_pgoff@Base 4.9
+ __sanitizer_syscall_post_impl_mount@Base 4.9
+ __sanitizer_syscall_post_impl_move_pages@Base 4.9
+ __sanitizer_syscall_post_impl_mprotect@Base 4.9
+ __sanitizer_syscall_post_impl_mq_getsetattr@Base 4.9
+ __sanitizer_syscall_post_impl_mq_notify@Base 4.9
+ __sanitizer_syscall_post_impl_mq_open@Base 4.9
+ __sanitizer_syscall_post_impl_mq_timedreceive@Base 4.9
+ __sanitizer_syscall_post_impl_mq_timedsend@Base 4.9
+ __sanitizer_syscall_post_impl_mq_unlink@Base 4.9
+ __sanitizer_syscall_post_impl_mremap@Base 4.9
+ __sanitizer_syscall_post_impl_msgctl@Base 4.9
+ __sanitizer_syscall_post_impl_msgget@Base 4.9
+ __sanitizer_syscall_post_impl_msgrcv@Base 4.9
+ __sanitizer_syscall_post_impl_msgsnd@Base 4.9
+ __sanitizer_syscall_post_impl_msync@Base 4.9
+ __sanitizer_syscall_post_impl_munlock@Base 4.9
+ __sanitizer_syscall_post_impl_munlockall@Base 4.9
+ __sanitizer_syscall_post_impl_munmap@Base 4.9
+ __sanitizer_syscall_post_impl_name_to_handle_at@Base 4.9
+ __sanitizer_syscall_post_impl_nanosleep@Base 4.9
+ __sanitizer_syscall_post_impl_newfstat@Base 4.9
+ __sanitizer_syscall_post_impl_newfstatat@Base 4.9
+ __sanitizer_syscall_post_impl_newlstat@Base 4.9
+ __sanitizer_syscall_post_impl_newstat@Base 4.9
+ __sanitizer_syscall_post_impl_newuname@Base 4.9
+ __sanitizer_syscall_post_impl_ni_syscall@Base 4.9
+ __sanitizer_syscall_post_impl_nice@Base 4.9
+ __sanitizer_syscall_post_impl_old_getrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_old_mmap@Base 4.9
+ __sanitizer_syscall_post_impl_old_readdir@Base 4.9
+ __sanitizer_syscall_post_impl_old_select@Base 4.9
+ __sanitizer_syscall_post_impl_oldumount@Base 4.9
+ __sanitizer_syscall_post_impl_olduname@Base 4.9
+ __sanitizer_syscall_post_impl_open@Base 4.9
+ __sanitizer_syscall_post_impl_open_by_handle_at@Base 4.9
+ __sanitizer_syscall_post_impl_openat@Base 4.9
+ __sanitizer_syscall_post_impl_pause@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_iobase@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_read@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_write@Base 4.9
+ __sanitizer_syscall_post_impl_perf_event_open@Base 4.9
+ __sanitizer_syscall_post_impl_personality@Base 4.9
+ __sanitizer_syscall_post_impl_pipe2@Base 4.9
+ __sanitizer_syscall_post_impl_pipe@Base 4.9
+ __sanitizer_syscall_post_impl_pivot_root@Base 4.9
+ __sanitizer_syscall_post_impl_poll@Base 4.9
+ __sanitizer_syscall_post_impl_ppoll@Base 4.9
+ __sanitizer_syscall_post_impl_pread64@Base 4.9
+ __sanitizer_syscall_post_impl_preadv@Base 4.9
+ __sanitizer_syscall_post_impl_prlimit64@Base 4.9
+ __sanitizer_syscall_post_impl_process_vm_readv@Base 4.9
+ __sanitizer_syscall_post_impl_process_vm_writev@Base 4.9
+ __sanitizer_syscall_post_impl_pselect6@Base 4.9
+ __sanitizer_syscall_post_impl_ptrace@Base 4.9
+ __sanitizer_syscall_post_impl_pwrite64@Base 4.9
+ __sanitizer_syscall_post_impl_pwritev@Base 4.9
+ __sanitizer_syscall_post_impl_quotactl@Base 4.9
+ __sanitizer_syscall_post_impl_read@Base 4.9
+ __sanitizer_syscall_post_impl_readlink@Base 4.9
+ __sanitizer_syscall_post_impl_readlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_readv@Base 4.9
+ __sanitizer_syscall_post_impl_reboot@Base 4.9
+ __sanitizer_syscall_post_impl_recv@Base 4.9
+ __sanitizer_syscall_post_impl_recvfrom@Base 4.9
+ __sanitizer_syscall_post_impl_recvmmsg@Base 4.9
+ __sanitizer_syscall_post_impl_recvmsg@Base 4.9
+ __sanitizer_syscall_post_impl_remap_file_pages@Base 4.9
+ __sanitizer_syscall_post_impl_removexattr@Base 4.9
+ __sanitizer_syscall_post_impl_rename@Base 4.9
+ __sanitizer_syscall_post_impl_renameat@Base 4.9
+ __sanitizer_syscall_post_impl_request_key@Base 4.9
+ __sanitizer_syscall_post_impl_restart_syscall@Base 4.9
+ __sanitizer_syscall_post_impl_rmdir@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigpending@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigprocmask@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigqueueinfo@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigtimedwait@Base 4.9
+ __sanitizer_syscall_post_impl_rt_tgsigqueueinfo@Base 4.9
+ __sanitizer_syscall_post_impl_sched_get_priority_max@Base 4.9
+ __sanitizer_syscall_post_impl_sched_get_priority_min@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getaffinity@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getparam@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getscheduler@Base 4.9
+ __sanitizer_syscall_post_impl_sched_rr_get_interval@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setaffinity@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setparam@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setscheduler@Base 4.9
+ __sanitizer_syscall_post_impl_sched_yield@Base 4.9
+ __sanitizer_syscall_post_impl_select@Base 4.9
+ __sanitizer_syscall_post_impl_semctl@Base 4.9
+ __sanitizer_syscall_post_impl_semget@Base 4.9
+ __sanitizer_syscall_post_impl_semop@Base 4.9
+ __sanitizer_syscall_post_impl_semtimedop@Base 4.9
+ __sanitizer_syscall_post_impl_send@Base 4.9
+ __sanitizer_syscall_post_impl_sendfile64@Base 4.9
+ __sanitizer_syscall_post_impl_sendfile@Base 4.9
+ __sanitizer_syscall_post_impl_sendmmsg@Base 4.9
+ __sanitizer_syscall_post_impl_sendmsg@Base 4.9
+ __sanitizer_syscall_post_impl_sendto@Base 4.9
+ __sanitizer_syscall_post_impl_set_mempolicy@Base 4.9
+ __sanitizer_syscall_post_impl_set_robust_list@Base 4.9
+ __sanitizer_syscall_post_impl_set_tid_address@Base 4.9
+ __sanitizer_syscall_post_impl_setdomainname@Base 4.9
+ __sanitizer_syscall_post_impl_setfsgid@Base 4.9
+ __sanitizer_syscall_post_impl_setfsuid@Base 4.9
+ __sanitizer_syscall_post_impl_setgid@Base 4.9
+ __sanitizer_syscall_post_impl_setgroups@Base 4.9
+ __sanitizer_syscall_post_impl_sethostname@Base 4.9
+ __sanitizer_syscall_post_impl_setitimer@Base 4.9
+ __sanitizer_syscall_post_impl_setns@Base 4.9
+ __sanitizer_syscall_post_impl_setpgid@Base 4.9
+ __sanitizer_syscall_post_impl_setpriority@Base 4.9
+ __sanitizer_syscall_post_impl_setregid@Base 4.9
+ __sanitizer_syscall_post_impl_setresgid@Base 4.9
+ __sanitizer_syscall_post_impl_setresuid@Base 4.9
+ __sanitizer_syscall_post_impl_setreuid@Base 4.9
+ __sanitizer_syscall_post_impl_setrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_setsid@Base 4.9
+ __sanitizer_syscall_post_impl_setsockopt@Base 4.9
+ __sanitizer_syscall_post_impl_settimeofday@Base 4.9
+ __sanitizer_syscall_post_impl_setuid@Base 4.9
+ __sanitizer_syscall_post_impl_setxattr@Base 4.9
+ __sanitizer_syscall_post_impl_sgetmask@Base 4.9
+ __sanitizer_syscall_post_impl_shmat@Base 4.9
+ __sanitizer_syscall_post_impl_shmctl@Base 4.9
+ __sanitizer_syscall_post_impl_shmdt@Base 4.9
+ __sanitizer_syscall_post_impl_shmget@Base 4.9
+ __sanitizer_syscall_post_impl_shutdown@Base 4.9
+ __sanitizer_syscall_post_impl_signal@Base 4.9
+ __sanitizer_syscall_post_impl_signalfd4@Base 4.9
+ __sanitizer_syscall_post_impl_signalfd@Base 4.9
+ __sanitizer_syscall_post_impl_sigpending@Base 4.9
+ __sanitizer_syscall_post_impl_sigprocmask@Base 4.9
+ __sanitizer_syscall_post_impl_socket@Base 4.9
+ __sanitizer_syscall_post_impl_socketcall@Base 4.9
+ __sanitizer_syscall_post_impl_socketpair@Base 4.9
+ __sanitizer_syscall_post_impl_splice@Base 4.9
+ __sanitizer_syscall_post_impl_spu_create@Base 4.9
+ __sanitizer_syscall_post_impl_spu_run@Base 4.9
+ __sanitizer_syscall_post_impl_ssetmask@Base 4.9
+ __sanitizer_syscall_post_impl_stat64@Base 4.9
+ __sanitizer_syscall_post_impl_stat@Base 4.9
+ __sanitizer_syscall_post_impl_statfs64@Base 4.9
+ __sanitizer_syscall_post_impl_statfs@Base 4.9
+ __sanitizer_syscall_post_impl_stime@Base 4.9
+ __sanitizer_syscall_post_impl_swapoff@Base 4.9
+ __sanitizer_syscall_post_impl_swapon@Base 4.9
+ __sanitizer_syscall_post_impl_symlink@Base 4.9
+ __sanitizer_syscall_post_impl_symlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_sync@Base 4.9
+ __sanitizer_syscall_post_impl_syncfs@Base 4.9
+ __sanitizer_syscall_post_impl_sysctl@Base 4.9
+ __sanitizer_syscall_post_impl_sysfs@Base 4.9
+ __sanitizer_syscall_post_impl_sysinfo@Base 4.9
+ __sanitizer_syscall_post_impl_syslog@Base 4.9
+ __sanitizer_syscall_post_impl_tee@Base 4.9
+ __sanitizer_syscall_post_impl_tgkill@Base 4.9
+ __sanitizer_syscall_post_impl_time@Base 4.9
+ __sanitizer_syscall_post_impl_timer_create@Base 4.9
+ __sanitizer_syscall_post_impl_timer_delete@Base 4.9
+ __sanitizer_syscall_post_impl_timer_getoverrun@Base 4.9
+ __sanitizer_syscall_post_impl_timer_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_timer_settime@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_create@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_settime@Base 4.9
+ __sanitizer_syscall_post_impl_times@Base 4.9
+ __sanitizer_syscall_post_impl_tkill@Base 4.9
+ __sanitizer_syscall_post_impl_truncate@Base 4.9
+ __sanitizer_syscall_post_impl_umask@Base 4.9
+ __sanitizer_syscall_post_impl_umount@Base 4.9
+ __sanitizer_syscall_post_impl_uname@Base 4.9
+ __sanitizer_syscall_post_impl_unlink@Base 4.9
+ __sanitizer_syscall_post_impl_unlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_unshare@Base 4.9
+ __sanitizer_syscall_post_impl_uselib@Base 4.9
+ __sanitizer_syscall_post_impl_ustat@Base 4.9
+ __sanitizer_syscall_post_impl_utime@Base 4.9
+ __sanitizer_syscall_post_impl_utimensat@Base 4.9
+ __sanitizer_syscall_post_impl_utimes@Base 4.9
+ __sanitizer_syscall_post_impl_vfork@Base 4.9
+ __sanitizer_syscall_post_impl_vhangup@Base 4.9
+ __sanitizer_syscall_post_impl_vmsplice@Base 4.9
+ __sanitizer_syscall_post_impl_wait4@Base 4.9
+ __sanitizer_syscall_post_impl_waitid@Base 4.9
+ __sanitizer_syscall_post_impl_waitpid@Base 4.9
+ __sanitizer_syscall_post_impl_write@Base 4.9
+ __sanitizer_syscall_post_impl_writev@Base 4.9
+ __sanitizer_syscall_pre_impl_accept4@Base 4.9
+ __sanitizer_syscall_pre_impl_accept@Base 4.9
+ __sanitizer_syscall_pre_impl_access@Base 4.9
+ __sanitizer_syscall_pre_impl_acct@Base 4.9
+ __sanitizer_syscall_pre_impl_add_key@Base 4.9
+ __sanitizer_syscall_pre_impl_adjtimex@Base 4.9
+ __sanitizer_syscall_pre_impl_alarm@Base 4.9
+ __sanitizer_syscall_pre_impl_bdflush@Base 4.9
+ __sanitizer_syscall_pre_impl_bind@Base 4.9
+ __sanitizer_syscall_pre_impl_brk@Base 4.9
+ __sanitizer_syscall_pre_impl_capget@Base 4.9
+ __sanitizer_syscall_pre_impl_capset@Base 4.9
+ __sanitizer_syscall_pre_impl_chdir@Base 4.9
+ __sanitizer_syscall_pre_impl_chmod@Base 4.9
+ __sanitizer_syscall_pre_impl_chown@Base 4.9
+ __sanitizer_syscall_pre_impl_chroot@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_adjtime@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_getres@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_nanosleep@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_close@Base 4.9
+ __sanitizer_syscall_pre_impl_connect@Base 4.9
+ __sanitizer_syscall_pre_impl_creat@Base 4.9
+ __sanitizer_syscall_pre_impl_delete_module@Base 4.9
+ __sanitizer_syscall_pre_impl_dup2@Base 4.9
+ __sanitizer_syscall_pre_impl_dup3@Base 4.9
+ __sanitizer_syscall_pre_impl_dup@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_create1@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_create@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_ctl@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_pwait@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_wait@Base 4.9
+ __sanitizer_syscall_pre_impl_eventfd2@Base 4.9
+ __sanitizer_syscall_pre_impl_eventfd@Base 4.9
+ __sanitizer_syscall_pre_impl_exit@Base 4.9
+ __sanitizer_syscall_pre_impl_exit_group@Base 4.9
+ __sanitizer_syscall_pre_impl_faccessat@Base 4.9
+ __sanitizer_syscall_pre_impl_fchdir@Base 4.9
+ __sanitizer_syscall_pre_impl_fchmod@Base 4.9
+ __sanitizer_syscall_pre_impl_fchmodat@Base 4.9
+ __sanitizer_syscall_pre_impl_fchown@Base 4.9
+ __sanitizer_syscall_pre_impl_fchownat@Base 4.9
+ __sanitizer_syscall_pre_impl_fcntl64@Base 4.9
+ __sanitizer_syscall_pre_impl_fcntl@Base 4.9
+ __sanitizer_syscall_pre_impl_fdatasync@Base 4.9
+ __sanitizer_syscall_pre_impl_fgetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_flistxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_flock@Base 4.9
+ __sanitizer_syscall_pre_impl_fork@Base 4.9
+ __sanitizer_syscall_pre_impl_fremovexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_fsetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_fstat64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstat@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatat64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatfs64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatfs@Base 4.9
+ __sanitizer_syscall_pre_impl_fsync@Base 4.9
+ __sanitizer_syscall_pre_impl_ftruncate@Base 4.9
+ __sanitizer_syscall_pre_impl_futimesat@Base 4.9
+ __sanitizer_syscall_pre_impl_get_mempolicy@Base 4.9
+ __sanitizer_syscall_pre_impl_get_robust_list@Base 4.9
+ __sanitizer_syscall_pre_impl_getcpu@Base 4.9
+ __sanitizer_syscall_pre_impl_getcwd@Base 4.9
+ __sanitizer_syscall_pre_impl_getdents64@Base 4.9
+ __sanitizer_syscall_pre_impl_getdents@Base 4.9
+ __sanitizer_syscall_pre_impl_getegid@Base 4.9
+ __sanitizer_syscall_pre_impl_geteuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getgroups@Base 4.9
+ __sanitizer_syscall_pre_impl_gethostname@Base 4.9
+ __sanitizer_syscall_pre_impl_getitimer@Base 4.9
+ __sanitizer_syscall_pre_impl_getpeername@Base 4.9
+ __sanitizer_syscall_pre_impl_getpgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getpgrp@Base 4.9
+ __sanitizer_syscall_pre_impl_getpid@Base 4.9
+ __sanitizer_syscall_pre_impl_getppid@Base 4.9
+ __sanitizer_syscall_pre_impl_getpriority@Base 4.9
+ __sanitizer_syscall_pre_impl_getresgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getresuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_getrusage@Base 4.9
+ __sanitizer_syscall_pre_impl_getsid@Base 4.9
+ __sanitizer_syscall_pre_impl_getsockname@Base 4.9
+ __sanitizer_syscall_pre_impl_getsockopt@Base 4.9
+ __sanitizer_syscall_pre_impl_gettid@Base 4.9
+ __sanitizer_syscall_pre_impl_gettimeofday@Base 4.9
+ __sanitizer_syscall_pre_impl_getuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_init_module@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_add_watch@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_init1@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_init@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_rm_watch@Base 4.9
+ __sanitizer_syscall_pre_impl_io_cancel@Base 4.9
+ __sanitizer_syscall_pre_impl_io_destroy@Base 4.9
+ __sanitizer_syscall_pre_impl_io_getevents@Base 4.9
+ __sanitizer_syscall_pre_impl_io_setup@Base 4.9
+ __sanitizer_syscall_pre_impl_io_submit@Base 4.9
+ __sanitizer_syscall_pre_impl_ioctl@Base 4.9
+ __sanitizer_syscall_pre_impl_ioperm@Base 4.9
+ __sanitizer_syscall_pre_impl_ioprio_get@Base 4.9
+ __sanitizer_syscall_pre_impl_ioprio_set@Base 4.9
+ __sanitizer_syscall_pre_impl_ipc@Base 4.9
+ __sanitizer_syscall_pre_impl_kexec_load@Base 4.9
+ __sanitizer_syscall_pre_impl_keyctl@Base 4.9
+ __sanitizer_syscall_pre_impl_kill@Base 4.9
+ __sanitizer_syscall_pre_impl_lchown@Base 4.9
+ __sanitizer_syscall_pre_impl_lgetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_link@Base 4.9
+ __sanitizer_syscall_pre_impl_linkat@Base 4.9
+ __sanitizer_syscall_pre_impl_listen@Base 4.9
+ __sanitizer_syscall_pre_impl_listxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_llistxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_llseek@Base 4.9
+ __sanitizer_syscall_pre_impl_lookup_dcookie@Base 4.9
+ __sanitizer_syscall_pre_impl_lremovexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_lseek@Base 4.9
+ __sanitizer_syscall_pre_impl_lsetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_lstat64@Base 4.9
+ __sanitizer_syscall_pre_impl_lstat@Base 4.9
+ __sanitizer_syscall_pre_impl_madvise@Base 4.9
+ __sanitizer_syscall_pre_impl_mbind@Base 4.9
+ __sanitizer_syscall_pre_impl_migrate_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_mincore@Base 4.9
+ __sanitizer_syscall_pre_impl_mkdir@Base 4.9
+ __sanitizer_syscall_pre_impl_mkdirat@Base 4.9
+ __sanitizer_syscall_pre_impl_mknod@Base 4.9
+ __sanitizer_syscall_pre_impl_mknodat@Base 4.9
+ __sanitizer_syscall_pre_impl_mlock@Base 4.9
+ __sanitizer_syscall_pre_impl_mlockall@Base 4.9
+ __sanitizer_syscall_pre_impl_mmap_pgoff@Base 4.9
+ __sanitizer_syscall_pre_impl_mount@Base 4.9
+ __sanitizer_syscall_pre_impl_move_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_mprotect@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_getsetattr@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_notify@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_open@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_timedreceive@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_timedsend@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_unlink@Base 4.9
+ __sanitizer_syscall_pre_impl_mremap@Base 4.9
+ __sanitizer_syscall_pre_impl_msgctl@Base 4.9
+ __sanitizer_syscall_pre_impl_msgget@Base 4.9
+ __sanitizer_syscall_pre_impl_msgrcv@Base 4.9
+ __sanitizer_syscall_pre_impl_msgsnd@Base 4.9
+ __sanitizer_syscall_pre_impl_msync@Base 4.9
+ __sanitizer_syscall_pre_impl_munlock@Base 4.9
+ __sanitizer_syscall_pre_impl_munlockall@Base 4.9
+ __sanitizer_syscall_pre_impl_munmap@Base 4.9
+ __sanitizer_syscall_pre_impl_name_to_handle_at@Base 4.9
+ __sanitizer_syscall_pre_impl_nanosleep@Base 4.9
+ __sanitizer_syscall_pre_impl_newfstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newfstatat@Base 4.9
+ __sanitizer_syscall_pre_impl_newlstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newuname@Base 4.9
+ __sanitizer_syscall_pre_impl_ni_syscall@Base 4.9
+ __sanitizer_syscall_pre_impl_nice@Base 4.9
+ __sanitizer_syscall_pre_impl_old_getrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_old_mmap@Base 4.9
+ __sanitizer_syscall_pre_impl_old_readdir@Base 4.9
+ __sanitizer_syscall_pre_impl_old_select@Base 4.9
+ __sanitizer_syscall_pre_impl_oldumount@Base 4.9
+ __sanitizer_syscall_pre_impl_olduname@Base 4.9
+ __sanitizer_syscall_pre_impl_open@Base 4.9
+ __sanitizer_syscall_pre_impl_open_by_handle_at@Base 4.9
+ __sanitizer_syscall_pre_impl_openat@Base 4.9
+ __sanitizer_syscall_pre_impl_pause@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_iobase@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_read@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_write@Base 4.9
+ __sanitizer_syscall_pre_impl_perf_event_open@Base 4.9
+ __sanitizer_syscall_pre_impl_personality@Base 4.9
+ __sanitizer_syscall_pre_impl_pipe2@Base 4.9
+ __sanitizer_syscall_pre_impl_pipe@Base 4.9
+ __sanitizer_syscall_pre_impl_pivot_root@Base 4.9
+ __sanitizer_syscall_pre_impl_poll@Base 4.9
+ __sanitizer_syscall_pre_impl_ppoll@Base 4.9
+ __sanitizer_syscall_pre_impl_pread64@Base 4.9
+ __sanitizer_syscall_pre_impl_preadv@Base 4.9
+ __sanitizer_syscall_pre_impl_prlimit64@Base 4.9
+ __sanitizer_syscall_pre_impl_process_vm_readv@Base 4.9
+ __sanitizer_syscall_pre_impl_process_vm_writev@Base 4.9
+ __sanitizer_syscall_pre_impl_pselect6@Base 4.9
+ __sanitizer_syscall_pre_impl_ptrace@Base 4.9
+ __sanitizer_syscall_pre_impl_pwrite64@Base 4.9
+ __sanitizer_syscall_pre_impl_pwritev@Base 4.9
+ __sanitizer_syscall_pre_impl_quotactl@Base 4.9
+ __sanitizer_syscall_pre_impl_read@Base 4.9
+ __sanitizer_syscall_pre_impl_readlink@Base 4.9
+ __sanitizer_syscall_pre_impl_readlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_readv@Base 4.9
+ __sanitizer_syscall_pre_impl_reboot@Base 4.9
+ __sanitizer_syscall_pre_impl_recv@Base 4.9
+ __sanitizer_syscall_pre_impl_recvfrom@Base 4.9
+ __sanitizer_syscall_pre_impl_recvmmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_recvmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_remap_file_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_removexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_rename@Base 4.9
+ __sanitizer_syscall_pre_impl_renameat@Base 4.9
+ __sanitizer_syscall_pre_impl_request_key@Base 4.9
+ __sanitizer_syscall_pre_impl_restart_syscall@Base 4.9
+ __sanitizer_syscall_pre_impl_rmdir@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigpending@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigprocmask@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigqueueinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigtimedwait@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_get_priority_max@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_get_priority_min@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getaffinity@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getparam@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getscheduler@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_rr_get_interval@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setaffinity@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setparam@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setscheduler@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_yield@Base 4.9
+ __sanitizer_syscall_pre_impl_select@Base 4.9
+ __sanitizer_syscall_pre_impl_semctl@Base 4.9
+ __sanitizer_syscall_pre_impl_semget@Base 4.9
+ __sanitizer_syscall_pre_impl_semop@Base 4.9
+ __sanitizer_syscall_pre_impl_semtimedop@Base 4.9
+ __sanitizer_syscall_pre_impl_send@Base 4.9
+ __sanitizer_syscall_pre_impl_sendfile64@Base 4.9
+ __sanitizer_syscall_pre_impl_sendfile@Base 4.9
+ __sanitizer_syscall_pre_impl_sendmmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_sendmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_sendto@Base 4.9
+ __sanitizer_syscall_pre_impl_set_mempolicy@Base 4.9
+ __sanitizer_syscall_pre_impl_set_robust_list@Base 4.9
+ __sanitizer_syscall_pre_impl_set_tid_address@Base 4.9
+ __sanitizer_syscall_pre_impl_setdomainname@Base 4.9
+ __sanitizer_syscall_pre_impl_setfsgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setfsuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setgroups@Base 4.9
+ __sanitizer_syscall_pre_impl_sethostname@Base 4.9
+ __sanitizer_syscall_pre_impl_setitimer@Base 4.9
+ __sanitizer_syscall_pre_impl_setns@Base 4.9
+ __sanitizer_syscall_pre_impl_setpgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setpriority@Base 4.9
+ __sanitizer_syscall_pre_impl_setregid@Base 4.9
+ __sanitizer_syscall_pre_impl_setresgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setresuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setreuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_setsid@Base 4.9
+ __sanitizer_syscall_pre_impl_setsockopt@Base 4.9
+ __sanitizer_syscall_pre_impl_settimeofday@Base 4.9
+ __sanitizer_syscall_pre_impl_setuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_sgetmask@Base 4.9
+ __sanitizer_syscall_pre_impl_shmat@Base 4.9
+ __sanitizer_syscall_pre_impl_shmctl@Base 4.9
+ __sanitizer_syscall_pre_impl_shmdt@Base 4.9
+ __sanitizer_syscall_pre_impl_shmget@Base 4.9
+ __sanitizer_syscall_pre_impl_shutdown@Base 4.9
+ __sanitizer_syscall_pre_impl_signal@Base 4.9
+ __sanitizer_syscall_pre_impl_signalfd4@Base 4.9
+ __sanitizer_syscall_pre_impl_signalfd@Base 4.9
+ __sanitizer_syscall_pre_impl_sigpending@Base 4.9
+ __sanitizer_syscall_pre_impl_sigprocmask@Base 4.9
+ __sanitizer_syscall_pre_impl_socket@Base 4.9
+ __sanitizer_syscall_pre_impl_socketcall@Base 4.9
+ __sanitizer_syscall_pre_impl_socketpair@Base 4.9
+ __sanitizer_syscall_pre_impl_splice@Base 4.9
+ __sanitizer_syscall_pre_impl_spu_create@Base 4.9
+ __sanitizer_syscall_pre_impl_spu_run@Base 4.9
+ __sanitizer_syscall_pre_impl_ssetmask@Base 4.9
+ __sanitizer_syscall_pre_impl_stat64@Base 4.9
+ __sanitizer_syscall_pre_impl_stat@Base 4.9
+ __sanitizer_syscall_pre_impl_statfs64@Base 4.9
+ __sanitizer_syscall_pre_impl_statfs@Base 4.9
+ __sanitizer_syscall_pre_impl_stime@Base 4.9
+ __sanitizer_syscall_pre_impl_swapoff@Base 4.9
+ __sanitizer_syscall_pre_impl_swapon@Base 4.9
+ __sanitizer_syscall_pre_impl_symlink@Base 4.9
+ __sanitizer_syscall_pre_impl_symlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_sync@Base 4.9
+ __sanitizer_syscall_pre_impl_syncfs@Base 4.9
+ __sanitizer_syscall_pre_impl_sysctl@Base 4.9
+ __sanitizer_syscall_pre_impl_sysfs@Base 4.9
+ __sanitizer_syscall_pre_impl_sysinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_syslog@Base 4.9
+ __sanitizer_syscall_pre_impl_tee@Base 4.9
+ __sanitizer_syscall_pre_impl_tgkill@Base 4.9
+ __sanitizer_syscall_pre_impl_time@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_create@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_delete@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_getoverrun@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_create@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_times@Base 4.9
+ __sanitizer_syscall_pre_impl_tkill@Base 4.9
+ __sanitizer_syscall_pre_impl_truncate@Base 4.9
+ __sanitizer_syscall_pre_impl_umask@Base 4.9
+ __sanitizer_syscall_pre_impl_umount@Base 4.9
+ __sanitizer_syscall_pre_impl_uname@Base 4.9
+ __sanitizer_syscall_pre_impl_unlink@Base 4.9
+ __sanitizer_syscall_pre_impl_unlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_unshare@Base 4.9
+ __sanitizer_syscall_pre_impl_uselib@Base 4.9
+ __sanitizer_syscall_pre_impl_ustat@Base 4.9
+ __sanitizer_syscall_pre_impl_utime@Base 4.9
+ __sanitizer_syscall_pre_impl_utimensat@Base 4.9
+ __sanitizer_syscall_pre_impl_utimes@Base 4.9
+ __sanitizer_syscall_pre_impl_vfork@Base 4.9
+ __sanitizer_syscall_pre_impl_vhangup@Base 4.9
+ __sanitizer_syscall_pre_impl_vmsplice@Base 4.9
+ __sanitizer_syscall_pre_impl_wait4@Base 4.9
+ __sanitizer_syscall_pre_impl_waitid@Base 4.9
+ __sanitizer_syscall_pre_impl_waitpid@Base 4.9
+ __sanitizer_syscall_pre_impl_write@Base 4.9
+ __sanitizer_syscall_pre_impl_writev@Base 4.9
+ __sanitizer_unaligned_load16@Base 4.9
+ __sanitizer_unaligned_load32@Base 4.9
+ __sanitizer_unaligned_load64@Base 4.9
+ __sanitizer_unaligned_store16@Base 4.9
+ __sanitizer_unaligned_store32@Base 4.9
+ __sanitizer_unaligned_store64@Base 4.9
+ __sanitizer_verify_contiguous_container@Base 5
+ __tls_get_addr@Base 5
+ __uflow@Base 5
+ __underflow@Base 5
+ __woverflow@Base 5
+ __wuflow@Base 5
+ __wunderflow@Base 5
+ __xpg_strerror_r@Base 4.9
+ _exit@Base 4.9
+ _longjmp@Base 4.8
+ _obstack_begin@Base 5
+ _obstack_begin_1@Base 5
+ _obstack_newchunk@Base 5
+ accept4@Base 4.9
+ accept@Base 4.9
+ aligned_alloc@Base 5
+ asctime@Base 4.8
+ asctime_r@Base 4.8
+ asprintf@Base 5
+ atoi@Base 4.8
+ atol@Base 4.8
+ atoll@Base 4.8
+ backtrace@Base 4.9
+ backtrace_symbols@Base 4.9
+ calloc@Base 4.8
+ canonicalize_file_name@Base 4.9
+ capget@Base 5
+ capset@Base 5
+ cfree@Base 4.8
+ clock_getres@Base 4.9
+ clock_gettime@Base 4.9
+ clock_settime@Base 4.9
+ confstr@Base 4.9
+ ctime@Base 4.8
+ ctime_r@Base 4.8
+ dlclose@Base 5
+ dlopen@Base 5
+ drand48_r@Base 4.9
+ endgrent@Base 5
+ endpwent@Base 5
+ ether_aton@Base 4.9
+ ether_aton_r@Base 4.9
+ ether_hostton@Base 4.9
+ ether_line@Base 4.9
+ ether_ntoa@Base 4.9
+ ether_ntoa_r@Base 4.9
+ ether_ntohost@Base 4.9
+ fclose@Base 5
+ fdopen@Base 5
+ fflush@Base 5
+ fgetgrent@Base 5
+ fgetgrent_r@Base 5
+ fgetpwent@Base 5
+ fgetpwent_r@Base 5
+ fgetxattr@Base 5
+ flistxattr@Base 5
+ fmemopen@Base 5
+ fopen64@Base 5
+ fopen@Base 5
+ fork@Base 5
+ fprintf@Base 5
+ free@Base 4.8
+ freopen64@Base 5
+ freopen@Base 5
+ frexp@Base 4.9
+ frexpf@Base 4.9
+ frexpl@Base 4.9
+ fscanf@Base 4.8
+ fstatfs64@Base 4.9
+ fstatfs@Base 4.9
+ fstatvfs64@Base 4.9
+ fstatvfs@Base 4.9
+ ftime@Base 5
+ get_current_dir_name@Base 4.9
+ getaddrinfo@Base 4.9
+ getcwd@Base 4.9
+ getdelim@Base 4.9
+ getgrent@Base 5
+ getgrent_r@Base 5
+ getgrgid@Base 4.9
+ getgrgid_r@Base 4.9
+ getgrnam@Base 4.9
+ getgrnam_r@Base 4.9
+ getgroups@Base 4.9
+ gethostbyaddr@Base 4.9
+ gethostbyaddr_r@Base 4.9
+ gethostbyname2@Base 4.9
+ gethostbyname2_r@Base 4.9
+ gethostbyname@Base 4.9
+ gethostbyname_r@Base 4.9
+ gethostent@Base 4.9
+ gethostent_r@Base 4.9
+ getifaddrs@Base 5
+ getitimer@Base 4.9
+ getline@Base 4.9
+ getmntent@Base 4.9
+ getmntent_r@Base 4.9
+ getnameinfo@Base 4.9
+ getpass@Base 5
+ getpeername@Base 4.9
+ getpwent@Base 5
+ getpwent_r@Base 5
+ getpwnam@Base 4.9
+ getpwnam_r@Base 4.9
+ getpwuid@Base 4.9
+ getpwuid_r@Base 4.9
+ getresgid@Base 5
+ getresuid@Base 5
+ getsockname@Base 4.9
+ getsockopt@Base 4.9
+ getxattr@Base 5
+ glob64@Base 4.9
+ glob@Base 4.9
+ gmtime@Base 4.8
+ gmtime_r@Base 4.8
+ iconv@Base 4.9
+ if_indextoname@Base 5
+ if_nametoindex@Base 5
+ index@Base 4.8
+ inet_aton@Base 4.9
+ inet_ntop@Base 4.9
+ inet_pton@Base 4.9
+ initgroups@Base 4.9
+ ioctl@Base 4.9
+ lgamma@Base 4.9
+ lgamma_r@Base 4.9
+ lgammaf@Base 4.9
+ lgammaf_r@Base 4.9
+ lgammal@Base 4.9
+ lgammal_r@Base 4.9
+ lgetxattr@Base 5
+ listxattr@Base 5
+ llistxattr@Base 5
+ localtime@Base 4.8
+ localtime_r@Base 4.8
+ longjmp@Base 4.8
+ lrand48_r@Base 4.9
+ mallinfo@Base 4.8
+ malloc@Base 4.8
+ malloc_stats@Base 4.8
+ malloc_usable_size@Base 4.8
+ mallopt@Base 4.8
+ mbsnrtowcs@Base 4.9
+ mbsrtowcs@Base 4.9
+ mbstowcs@Base 4.9
+ memalign@Base 4.8
+ memchr@Base 5
+ memcmp@Base 4.8
+ memcpy@Base 4.8
+ memmove@Base 4.8
+ memrchr@Base 5
+ memset@Base 4.8
+ mktime@Base 5
+ mlock@Base 4.8
+ mlockall@Base 4.8
+ modf@Base 4.9
+ modff@Base 4.9
+ modfl@Base 4.9
+ munlock@Base 4.8
+ munlockall@Base 4.8
+ open_memstream@Base 5
+ open_wmemstream@Base 5
+ poll@Base 4.9
+ posix_memalign@Base 4.8
+ ppoll@Base 4.9
+ prctl@Base 4.8
+ pread64@Base 4.8
+ pread@Base 4.8
+ preadv64@Base 4.9
+ preadv@Base 4.9
+ printf@Base 5
+ pthread_attr_getaffinity_np@Base 4.9
+ pthread_attr_getdetachstate@Base 4.9
+ pthread_attr_getguardsize@Base 4.9
+ pthread_attr_getinheritsched@Base 4.9
+ pthread_attr_getschedparam@Base 4.9
+ pthread_attr_getschedpolicy@Base 4.9
+ pthread_attr_getscope@Base 4.9
+ pthread_attr_getstack@Base 4.9
+ pthread_attr_getstacksize@Base 4.9
+ pthread_barrierattr_getpshared@Base 5
+ pthread_condattr_getclock@Base 5
+ pthread_condattr_getpshared@Base 5
+ pthread_create@Base 4.8
+ pthread_getschedparam@Base 4.9
+ pthread_mutex_lock@Base 4.9
+ pthread_mutex_unlock@Base 4.9
+ pthread_mutexattr_getprioceiling@Base 5
+ pthread_mutexattr_getprotocol@Base 5
+ pthread_mutexattr_getpshared@Base 5
+ pthread_mutexattr_getrobust@Base 5
+ pthread_mutexattr_getrobust_np@Base 5
+ pthread_mutexattr_gettype@Base 5
+ pthread_rwlockattr_getkind_np@Base 5
+ pthread_rwlockattr_getpshared@Base 5
+ pthread_setname_np@Base 4.9
+ pvalloc@Base 4.8
+ pwrite64@Base 4.8
+ pwrite@Base 4.8
+ pwritev64@Base 4.9
+ pwritev@Base 4.9
+ rand_r@Base 5
+ random_r@Base 4.9
+ read@Base 4.8
+ readdir64@Base 4.9
+ readdir64_r@Base 4.9
+ readdir@Base 4.9
+ readdir_r@Base 4.9
+ readv@Base 4.9
+ realloc@Base 4.8
+ realpath@Base 4.9
+ recvmsg@Base 4.9
+ remquo@Base 4.9
+ remquof@Base 4.9
+ remquol@Base 4.9
+ scandir64@Base 4.9
+ scandir@Base 4.9
+ scanf@Base 4.8
+ sched_getaffinity@Base 4.9
+ setgrent@Base 5
+ setitimer@Base 4.9
+ setlocale@Base 4.9
+ setpwent@Base 5
+ sigaction@Base 4.8
+ sigemptyset@Base 4.9
+ sigfillset@Base 4.9
+ siglongjmp@Base 4.8
+ signal@Base 4.8
+ sigpending@Base 4.9
+ sigprocmask@Base 4.9
+ sigtimedwait@Base 4.9
+ sigwait@Base 4.9
+ sigwaitinfo@Base 4.9
+ sincos@Base 4.9
+ sincosf@Base 4.9
+ sincosl@Base 4.9
+ snprintf@Base 5
+ sprintf@Base 5
+ sscanf@Base 4.8
+ statfs64@Base 4.9
+ statfs@Base 4.9
+ statvfs64@Base 4.9
+ statvfs@Base 4.9
+ strcasecmp@Base 4.8
+ strcat@Base 4.8
+ strchr@Base 4.8
+ strcmp@Base 4.8
+ strcpy@Base 4.8
+ strdup@Base 4.8
+ strerror@Base 4.9
+ strerror_r@Base 4.9
+ strlen@Base 4.8
+ strncasecmp@Base 4.8
+ strncat@Base 4.8
+ strncmp@Base 4.8
+ strncpy@Base 4.8
+ strnlen@Base 4.8
+ strptime@Base 4.9
+ strtoimax@Base 4.9
+ strtol@Base 4.8
+ strtoll@Base 4.8
+ strtoumax@Base 4.9
+ swapcontext@Base 4.8
+ sysinfo@Base 4.9
+ tcgetattr@Base 4.9
+ tempnam@Base 4.9
+ textdomain@Base 4.9
+ time@Base 4.9
+ timerfd_gettime@Base 5
+ timerfd_settime@Base 5
+ times@Base 4.9
+ tmpnam@Base 4.9
+ tmpnam_r@Base 4.9
+ tsearch@Base 5
+ valloc@Base 4.8
+ vasprintf@Base 5
+ vfprintf@Base 5
+ vfscanf@Base 4.8
+ vprintf@Base 5
+ vscanf@Base 4.8
+ vsnprintf@Base 5
+ vsprintf@Base 5
+ vsscanf@Base 4.8
+ wait3@Base 4.9
+ wait4@Base 4.9
+ wait@Base 4.9
+ waitid@Base 4.9
+ waitpid@Base 4.9
+ wcslen@Base 4.9
+ wcsnrtombs@Base 4.9
+ wcsrtombs@Base 4.9
+ wcstombs@Base 4.9
+ wordexp@Base 4.9
+ write@Base 4.8
+ writev@Base 4.9
+ xdr_bool@Base 5
+ xdr_bytes@Base 5
+ xdr_char@Base 5
+ xdr_double@Base 5
+ xdr_enum@Base 5
+ xdr_float@Base 5
+ xdr_hyper@Base 5
+ xdr_int16_t@Base 5
+ xdr_int32_t@Base 5
+ xdr_int64_t@Base 5
+ xdr_int8_t@Base 5
+ xdr_int@Base 5
+ xdr_long@Base 5
+ xdr_longlong_t@Base 5
+ xdr_quad_t@Base 5
+ xdr_short@Base 5
+ xdr_string@Base 5
+ xdr_u_char@Base 5
+ xdr_u_hyper@Base 5
+ xdr_u_int@Base 5
+ xdr_u_long@Base 5
+ xdr_u_longlong_t@Base 5
+ xdr_u_quad_t@Base 5
+ xdr_u_short@Base 5
+ xdr_uint16_t@Base 5
+ xdr_uint32_t@Base 5
+ xdr_uint64_t@Base 5
+ xdr_uint8_t@Base 5
+ xdrmem_create@Base 5
+ xdrstdio_create@Base 5
--- gcc-5-5.4.0.orig/debian/libasan2.symbols
+++ gcc-5-5.4.0/debian/libasan2.symbols
@@ -0,0 +1,20 @@
+libasan.so.2 libasan2 #MINVER#
+#include "libasan.symbols.common"
+(arch=!arm64 !alpha !amd64 !ia64 !ppc64 !ppc64el !s390x !sparc64 !kfreebsd-amd64)#include "libasan.symbols.32"
+(arch=arm64 alpha amd64 ia64 ppc64 ppc64el s390x sparc64 kfreebsd-amd64)#include "libasan.symbols.64"
+(arch=armel armhf sparc64 x32)#include "libasan.symbols.16"
+# these are missing on some archs ...
+ (arch=!arm64 !armel !armhf !powerpc !ppc64 !ppc64el !sparc !sparc64)__interceptor_ptrace@Base 4.9
+ (arch=!arm64 !armel !armhf !powerpc !ppc64 !ppc64el !sparc !sparc64)ptrace@Base 4.9
+ (arch=armel armhf)__interceptor___aeabi_memclr4@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memclr8@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memclr@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memcpy4@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memcpy8@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memcpy@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memmove4@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memmove8@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memmove@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memset4@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memset8@Base 5
+ (arch=armel armhf)__interceptor___aeabi_memset@Base 5
--- gcc-5-5.4.0.orig/debian/libatomic.symbols
+++ gcc-5-5.4.0/debian/libatomic.symbols
@@ -0,0 +1,3 @@
+libatomic.so.1 #PACKAGE# #MINVER#
+ (symver)LIBATOMIC_1.0 4.8
+ (symver)LIBATOMIC_1.1 4.9
--- gcc-5-5.4.0.orig/debian/libcc1-0.symbols
+++ gcc-5-5.4.0/debian/libcc1-0.symbols
@@ -0,0 +1,58 @@
+libcc1.so.0 libcc1-0 #MINVER#
+ (optional=abi_c++98)_ZNSs12_S_constructIPcEES0_T_S1_RKSaIcESt20forward_iterator_tag@Base 5
+ (optional=abi_c++98)_ZNSt6vectorISsSaISsEE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPSsS1_EERKSs@Base 5
+ (optional=abi_c++11)_ZNSt6vectorINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESaIS5_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS5_S7_EERKS5_@Base 5
+ _xexit_cleanup@Base 5
+ concat@Base 5
+ concat_copy2@Base 5
+ concat_copy@Base 5
+ concat_length@Base 5
+ gcc_c_fe_context@Base 5
+ htab_clear_slot@Base 5
+ htab_collisions@Base 5
+ htab_create@Base 5
+ htab_create_alloc@Base 5
+ htab_create_alloc_ex@Base 5
+ htab_create_typed_alloc@Base 5
+ htab_delete@Base 5
+ htab_elements@Base 5
+ htab_empty@Base 5
+ htab_eq_pointer@Base 5
+ htab_find@Base 5
+ htab_find_slot@Base 5
+ htab_find_slot_with_hash@Base 5
+ htab_find_with_hash@Base 5
+ htab_hash_pointer@Base 5
+ htab_hash_string@Base 5
+ htab_remove_elt@Base 5
+ htab_remove_elt_with_hash@Base 5
+ htab_set_functions_ex@Base 5
+ htab_size@Base 5
+ htab_traverse@Base 5
+ htab_traverse_noresize@Base 5
+ htab_try_create@Base 5
+ iterative_hash@Base 5
+ libiberty_concat_ptr@Base 5
+ reconcat@Base 5
+ xcalloc@Base 5
+ xexit@Base 5
+ xmalloc@Base 5
+ xmalloc_failed@Base 5
+ xmalloc_set_program_name@Base 5
+ xre_comp@Base 5
+ xre_compile_fastmap@Base 5
+ xre_compile_pattern@Base 5
+ xre_exec@Base 5
+ xre_match@Base 5
+ xre_match_2@Base 5
+ xre_max_failures@Base 5
+ xre_search@Base 5
+ xre_search_2@Base 5
+ xre_set_registers@Base 5
+ xre_set_syntax@Base 5
+ xre_syntax_options@Base 5
+ xrealloc@Base 5
+ xregcomp@Base 5
+ xregerror@Base 5
+ xregexec@Base 5
+ xregfree@Base 5
--- gcc-5-5.4.0.orig/debian/libcilkrts.symbols
+++ gcc-5-5.4.0/debian/libcilkrts.symbols
@@ -0,0 +1,4 @@
+libcilkrts.so.5 #PACKAGE# #MINVER#
+ (symver)CILKABI0 4.9
+ (symver)CILKABI1 4.9
+ (symver)CILKLIB1.02 4.9
--- gcc-5-5.4.0.orig/debian/libgcc.symbols
+++ gcc-5-5.4.0/debian/libgcc.symbols
@@ -0,0 +1,20 @@
+libgcc_s.so.1 #PACKAGE# #MINVER#
+ (symver)GCC_3.0 1:3.0
+ (symver)GCC_3.3 1:3.3
+ (symver)GCC_3.3.1 1:3.3.1
+ (symver|optional)GCC_3.3.2 1:3.3.2
+ (symver|optional)GCC_3.3.4 1:3.3.4
+ (symver)GCC_3.4 1:3.4
+ (symver)GCC_3.4.2 1:3.4.2
+ (symver|optional)GCC_3.4.4 1:3.4.4
+ (symver|arch=armel armhf|ignore-blacklist)GCC_3.5 1:3.5
+ (symver)GCC_4.0.0 1:4.0
+ (symver|optional)GCC_4.1.0 1:4.1
+ (symver)GCC_4.2.0 1:4.2
+ (symver)GCC_4.3.0 1:4.3
+ (symver|optional)GCC_4.4.0 1:4.4
+ (symver|optional)GCC_4.5.0 1:4.5
+ (symver|optional)GCC_4.6.0 1:4.6
+ (symver|optional)GCC_4.7.0 1:4.7
+ (symver|optional)GCC_4.8.0 1:4.8
+ (symver|optional)GLIBC_2.0 1:4.2
--- gcc-5-5.4.0.orig/debian/libgcc.symbols.aeabi
+++ gcc-5-5.4.0/debian/libgcc.symbols.aeabi
@@ -0,0 +1,69 @@
+ __aeabi_cdcmpeq@GCC_3.5 1:3.5
+ __aeabi_cdcmple@GCC_3.5 1:3.5
+ __aeabi_cdrcmple@GCC_3.5 1:3.5
+ __aeabi_cfcmpeq@GCC_3.5 1:3.5
+ __aeabi_cfcmple@GCC_3.5 1:3.5
+ __aeabi_cfrcmple@GCC_3.5 1:3.5
+ __aeabi_d2f@GCC_3.5 1:3.5
+ __aeabi_d2iz@GCC_3.5 1:3.5
+ __aeabi_d2lz@GCC_3.5 1:3.5
+ __aeabi_d2uiz@GCC_3.5 1:3.5
+ __aeabi_d2ulz@GCC_3.5 1:3.5
+ __aeabi_dadd@GCC_3.5 1:3.5
+ __aeabi_dcmpeq@GCC_3.5 1:3.5
+ __aeabi_dcmpge@GCC_3.5 1:3.5
+ __aeabi_dcmpgt@GCC_3.5 1:3.5
+ __aeabi_dcmple@GCC_3.5 1:3.5
+ __aeabi_dcmplt@GCC_3.5 1:3.5
+ __aeabi_dcmpun@GCC_3.5 1:3.5
+ __aeabi_ddiv@GCC_3.5 1:3.5
+ __aeabi_dmul@GCC_3.5 1:3.5
+ __aeabi_dneg@GCC_3.5 1:3.5
+ __aeabi_drsub@GCC_3.5 1:3.5
+ __aeabi_dsub@GCC_3.5 1:3.5
+ __aeabi_f2d@GCC_3.5 1:3.5
+ __aeabi_f2iz@GCC_3.5 1:3.5
+ __aeabi_f2lz@GCC_3.5 1:3.5
+ __aeabi_f2uiz@GCC_3.5 1:3.5
+ __aeabi_f2ulz@GCC_3.5 1:3.5
+ __aeabi_fadd@GCC_3.5 1:3.5
+ __aeabi_fcmpeq@GCC_3.5 1:3.5
+ __aeabi_fcmpge@GCC_3.5 1:3.5
+ __aeabi_fcmpgt@GCC_3.5 1:3.5
+ __aeabi_fcmple@GCC_3.5 1:3.5
+ __aeabi_fcmplt@GCC_3.5 1:3.5
+ __aeabi_fcmpun@GCC_3.5 1:3.5
+ __aeabi_fdiv@GCC_3.5 1:3.5
+ __aeabi_fmul@GCC_3.5 1:3.5
+ __aeabi_fneg@GCC_3.5 1:3.5
+ __aeabi_frsub@GCC_3.5 1:3.5
+ __aeabi_fsub@GCC_3.5 1:3.5
+ __aeabi_i2d@GCC_3.5 1:3.5
+ __aeabi_i2f@GCC_3.5 1:3.5
+ __aeabi_idiv@GCC_3.5 1:3.5
+ __aeabi_idiv0@GCC_3.5 1:4.5.0
+ __aeabi_idivmod@GCC_3.5 1:3.5
+ __aeabi_l2d@GCC_3.5 1:3.5
+ __aeabi_l2f@GCC_3.5 1:3.5
+ __aeabi_lasr@GCC_3.5 1:3.5
+ __aeabi_lcmp@GCC_3.5 1:3.5
+ __aeabi_ldivmod@GCC_3.5 1:3.5
+ __aeabi_ldiv0@GCC_3.5 1:4.5.0
+ __aeabi_llsl@GCC_3.5 1:3.5
+ __aeabi_llsr@GCC_3.5 1:3.5
+ __aeabi_lmul@GCC_3.5 1:3.5
+ __aeabi_ui2d@GCC_3.5 1:3.5
+ __aeabi_ui2f@GCC_3.5 1:3.5
+ __aeabi_uidiv@GCC_3.5 1:3.5
+ __aeabi_uidivmod@GCC_3.5 1:3.5
+ __aeabi_ul2d@GCC_3.5 1:3.5
+ __aeabi_ul2f@GCC_3.5 1:3.5
+ __aeabi_ulcmp@GCC_3.5 1:3.5
+ __aeabi_uldivmod@GCC_3.5 1:3.5
+ __aeabi_unwind_cpp_pr0@GCC_3.5 1:3.5
+ __aeabi_unwind_cpp_pr1@GCC_3.5 1:3.5
+ __aeabi_unwind_cpp_pr2@GCC_3.5 1:3.5
+ __aeabi_uread4@GCC_3.5 1:3.5
+ __aeabi_uread8@GCC_3.5 1:3.5
+ __aeabi_uwrite4@GCC_3.5 1:3.5
+ __aeabi_uwrite8@GCC_3.5 1:3.5
--- gcc-5-5.4.0.orig/debian/libgcc2.symbols.m68k
+++ gcc-5-5.4.0/debian/libgcc2.symbols.m68k
@@ -0,0 +1,162 @@
+libgcc_s.so.2 libgcc2 #MINVER#
+ GCC_3.0@GCC_3.0 4.2.1
+ GCC_3.3.1@GCC_3.3.1 4.2.1
+ GCC_3.3.4@GCC_3.3.4 4.4.5
+ GCC_3.3@GCC_3.3 4.2.1
+ GCC_3.4.2@GCC_3.4.2 4.2.1
+ GCC_3.4@GCC_3.4 4.2.1
+ GCC_4.0.0@GCC_4.0.0 4.2.1
+ GCC_4.2.0@GCC_4.2.0 4.2.1
+ GCC_4.3.0@GCC_4.3.0 4.3.0
+ GCC_4.5.0@GCC_4.5.0 4.5
+ GCC_4.7.0@GCC_4.7.0 4.7
+ GLIBC_2.0@GLIBC_2.0 4.2.1
+ _Unwind_Backtrace@GCC_3.3 4.2.1
+ _Unwind_DeleteException@GCC_3.0 4.2.1
+ _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1
+ _Unwind_Find_FDE@GCC_3.0 4.2.1
+ _Unwind_ForcedUnwind@GCC_3.0 4.2.1
+ _Unwind_GetCFA@GCC_3.3 4.2.1
+ _Unwind_GetDataRelBase@GCC_3.0 4.2.1
+ _Unwind_GetGR@GCC_3.0 4.2.1
+ _Unwind_GetIP@GCC_3.0 4.2.1
+ _Unwind_GetIPInfo@GCC_4.2.0 4.2.1
+ _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1
+ _Unwind_GetRegionStart@GCC_3.0 4.2.1
+ _Unwind_GetTextRelBase@GCC_3.0 4.2.1
+ _Unwind_RaiseException@GCC_3.0 4.2.1
+ _Unwind_Resume@GCC_3.0 4.2.1
+ _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1
+ _Unwind_SetGR@GCC_3.0 4.2.1
+ _Unwind_SetIP@GCC_3.0 4.2.1
+ __absvdi2@GCC_3.0 4.2.1
+ __absvsi2@GCC_3.0 4.2.1
+ __adddf3@GCC_3.0 4.4.5
+ __addsf3@GCC_3.0 4.4.5
+ __addvdi3@GCC_3.0 4.2.1
+ __addvsi3@GCC_3.0 4.2.1
+ __addxf3@GCC_3.0 4.4.5
+ __ashldi3@GCC_3.0 4.2.1
+ __ashrdi3@GCC_3.0 4.2.1
+ __bswapdi2@GCC_4.3.0 4.3.0
+ __bswapsi2@GCC_4.3.0 4.3.0
+ __clear_cache@GCC_3.0 4.2.1
+  __clrsbdi2@GCC_4.7.0 4.7
+  __clrsbsi2@GCC_4.7.0 4.7
+ __clzdi2@GCC_3.4 4.2.1
+ __clzsi2@GCC_3.4 4.2.1
+ __cmpdi2@GCC_3.0 4.2.1
+ __ctzdi2@GCC_3.4 4.2.1
+ __ctzsi2@GCC_3.4 4.2.1
+ __deregister_frame@GLIBC_2.0 4.2.1
+ __deregister_frame_info@GLIBC_2.0 4.2.1
+ __deregister_frame_info_bases@GCC_3.0 4.2.1
+ __divdc3@GCC_4.0.0 4.2.1
+ __divdf3@GCC_3.0 4.4.5
+ __divdi3@GLIBC_2.0 4.2.1
+ __divsc3@GCC_4.0.0 4.2.1
+ __divsf3@GCC_3.0 4.4.5
+ __divsi3@GCC_3.0 4.4.5
+ __divxc3@GCC_4.0.0 4.2.1
+ __divxf3@GCC_3.0 4.4.5
+ __emutls_get_address@GCC_4.3.0 4.3.0
+ __emutls_register_common@GCC_4.3.0 4.3.0
+ __enable_execute_stack@GCC_3.4.2 4.2.1
+ __eqdf2@GCC_3.0 4.4.5
+ __eqsf2@GCC_3.0 4.4.5
+ __eqxf2@GCC_3.0 4.4.5
+ __extenddfxf2@GCC_3.0 4.4.5
+ __extendsfdf2@GCC_3.0 4.4.5
+ __extendsfxf2@GCC_3.0 4.4.5
+ __ffsdi2@GCC_3.0 4.2.1
+ __ffssi2@GCC_4.3.0 4.3.0
+ __fixdfdi@GCC_3.0 4.2.1
+ __fixdfsi@GCC_3.0 4.4.5
+ __fixsfdi@GCC_3.0 4.2.1
+ __fixsfsi@GCC_3.0 4.4.5
+ __fixunsdfdi@GCC_3.0 4.2.1
+ __fixunsdfsi@GCC_3.0 4.2.1
+ __fixunssfdi@GCC_3.0 4.2.1
+ __fixunssfsi@GCC_3.0 4.2.1
+ __fixunsxfdi@GCC_3.0 4.2.1
+ __fixunsxfsi@GCC_3.0 4.2.1
+ __fixxfdi@GCC_3.0 4.2.1
+ __fixxfsi@GCC_3.0 4.4.5
+ __floatdidf@GCC_3.0 4.2.1
+ __floatdisf@GCC_3.0 4.2.1
+ __floatdixf@GCC_3.0 4.2.1
+ __floatsidf@GCC_3.0 4.4.5
+ __floatsisf@GCC_3.0 4.4.5
+ __floatsixf@GCC_3.0 4.4.5
+ __floatundidf@GCC_4.2.0 4.2.1
+ __floatundisf@GCC_4.2.0 4.2.1
+ __floatundixf@GCC_4.2.0 4.2.1
+ __floatunsidf@GCC_4.2.0 4.4.5
+ __floatunsisf@GCC_4.2.0 4.4.5
+ __floatunsixf@GCC_4.2.0 4.4.5
+ __frame_state_for@GLIBC_2.0 4.2.1
+ __gcc_personality_v0@GCC_3.3.1 4.2.1
+ __gedf2@GCC_3.0 4.4.5
+ __gesf2@GCC_3.0 4.4.5
+ __gexf2@GCC_3.0 4.4.5
+ __gtdf2@GCC_3.0 4.4.5
+ __gtsf2@GCC_3.0 4.4.5
+ __gtxf2@GCC_3.0 4.4.5
+ __ledf2@GCC_3.0 4.4.5
+ __lesf2@GCC_3.0 4.4.5
+ __lexf2@GCC_3.0 4.4.5
+ __lshrdi3@GCC_3.0 4.2.1
+ __ltdf2@GCC_3.0 4.4.5
+ __ltsf2@GCC_3.0 4.4.5
+ __ltxf2@GCC_3.0 4.4.5
+ __moddi3@GLIBC_2.0 4.2.1
+ __modsi3@GCC_3.0 4.4.5
+ __muldc3@GCC_4.0.0 4.2.1
+ __muldf3@GCC_3.0 4.4.5
+ __muldi3@GCC_3.0 4.2.1
+ __mulsc3@GCC_4.0.0 4.2.1
+ __mulsf3@GCC_3.0 4.4.5
+ __mulsi3@GCC_3.0 4.4.5
+ __mulvdi3@GCC_3.0 4.2.1
+ __mulvsi3@GCC_3.0 4.2.1
+ __mulxc3@GCC_4.0.0 4.2.1
+ __mulxf3@GCC_3.0 4.4.5
+ __nedf2@GCC_3.0 4.4.5
+ __negdf2@GCC_3.0 4.4.5
+ __negdi2@GCC_3.0 4.2.1
+ __negsf2@GCC_3.0 4.4.5
+ __negvdi2@GCC_3.0 4.2.1
+ __negvsi2@GCC_3.0 4.2.1
+ __negxf2@GCC_3.0 4.4.5
+ __nesf2@GCC_3.0 4.4.5
+ __nexf2@GCC_3.0 4.4.5
+ __paritydi2@GCC_3.4 4.2.1
+ __paritysi2@GCC_3.4 4.2.1
+ __popcountdi2@GCC_3.4 4.2.1
+ __popcountsi2@GCC_3.4 4.2.1
+ __powidf2@GCC_4.0.0 4.2.1
+ __powisf2@GCC_4.0.0 4.2.1
+ __powixf2@GCC_4.0.0 4.2.1
+ __register_frame@GLIBC_2.0 4.2.1
+ __register_frame_info@GLIBC_2.0 4.2.1
+ __register_frame_info_bases@GCC_3.0 4.2.1
+ __register_frame_info_table@GLIBC_2.0 4.2.1
+ __register_frame_info_table_bases@GCC_3.0 4.2.1
+ __register_frame_table@GLIBC_2.0 4.2.1
+ __subdf3@GCC_3.0 4.4.5
+ __subsf3@GCC_3.0 4.4.5
+ __subvdi3@GCC_3.0 4.2.1
+ __subvsi3@GCC_3.0 4.2.1
+ __subxf3@GCC_3.0 4.4.5
+ __truncdfsf2@GCC_3.0 4.4.5
+ __truncxfdf2@GCC_3.0 4.4.5
+ __truncxfsf2@GCC_3.0 4.4.5
+ __ucmpdi2@GCC_3.0 4.2.1
+ __udivdi3@GLIBC_2.0 4.2.1
+ __udivmoddi4@GCC_3.0 4.2.1
+ __udivsi3@GCC_3.0 4.4.5
+ __umoddi3@GLIBC_2.0 4.2.1
+ __umodsi3@GCC_3.0 4.4.5
+ __unorddf2@GCC_3.3.4 4.4.5
+ __unordsf2@GCC_3.3.4 4.4.5
+ __unordxf2@GCC_4.5.0 4.7
--- gcc-5-5.4.0.orig/debian/libgcc4.symbols.hppa
+++ gcc-5-5.4.0/debian/libgcc4.symbols.hppa
@@ -0,0 +1,96 @@
+libgcc_s.so.4 libgcc4 #MINVER#
+ GCC_3.0@GCC_3.0 4.1.1
+ GCC_3.3.1@GCC_3.3.1 4.1.1
+ GCC_3.3@GCC_3.3 4.1.1
+ GCC_3.4.2@GCC_3.4.2 4.1.1
+ GCC_3.4@GCC_3.4 4.1.1
+ GCC_4.0.0@GCC_4.0.0 4.1.1
+ GCC_4.2.0@GCC_4.2.0 4.1.1
+ GCC_4.3.0@GCC_4.3.0 4.3
+ GCC_4.7.0@GCC_4.7.0 1:4.7
+ GLIBC_2.0@GLIBC_2.0 4.1.1
+ _Unwind_Backtrace@GCC_3.3 4.1.1
+ _Unwind_DeleteException@GCC_3.0 4.1.1
+ _Unwind_FindEnclosingFunction@GCC_3.3 4.1.1
+ _Unwind_Find_FDE@GCC_3.0 4.1.1
+ _Unwind_ForcedUnwind@GCC_3.0 4.1.1
+ _Unwind_GetCFA@GCC_3.3 4.1.1
+ _Unwind_GetDataRelBase@GCC_3.0 4.1.1
+ _Unwind_GetGR@GCC_3.0 4.1.1
+ _Unwind_GetIP@GCC_3.0 4.1.1
+ _Unwind_GetIPInfo@GCC_4.2.0 4.1.1
+ _Unwind_GetLanguageSpecificData@GCC_3.0 4.1.1
+ _Unwind_GetRegionStart@GCC_3.0 4.1.1
+ _Unwind_GetTextRelBase@GCC_3.0 4.1.1
+ _Unwind_RaiseException@GCC_3.0 4.1.1
+ _Unwind_Resume@GCC_3.0 4.1.1
+ _Unwind_Resume_or_Rethrow@GCC_3.3 4.1.1
+ _Unwind_SetGR@GCC_3.0 4.1.1
+ _Unwind_SetIP@GCC_3.0 4.1.1
+ __absvdi2@GCC_3.0 4.1.1
+ __absvsi2@GCC_3.0 4.1.1
+ __addvdi3@GCC_3.0 4.1.1
+ __addvsi3@GCC_3.0 4.1.1
+ __ashldi3@GCC_3.0 4.1.1
+ __ashrdi3@GCC_3.0 4.1.1
+ __bswapdi2@GCC_4.3.0 4.3
+ __bswapsi2@GCC_4.3.0 4.3
+ __clear_cache@GCC_3.0 4.1.1
+ __clrsbdi2@GCC_4.7.0 4.7
+ __clrsbsi2@GCC_4.7.0 4.7
+ __clzdi2@GCC_3.4 4.1.1
+ __clzsi2@GCC_3.4 4.1.1
+ __cmpdi2@GCC_3.0 4.1.1
+ __ctzdi2@GCC_3.4 4.1.1
+ __ctzsi2@GCC_3.4 4.1.1
+ __deregister_frame@GLIBC_2.0 4.1.1
+ __deregister_frame_info@GLIBC_2.0 4.1.1
+ __deregister_frame_info_bases@GCC_3.0 4.1.1
+ __divdc3@GCC_4.0.0 4.1.1
+ __divdi3@GLIBC_2.0 4.1.1
+ __divsc3@GCC_4.0.0 4.1.1
+ __emutls_get_address@GCC_4.3.0 4.3
+ __emutls_register_common@GCC_4.3.0 4.3
+ __enable_execute_stack@GCC_3.4.2 4.1.1
+ __ffsdi2@GCC_3.0 4.1.1
+ __ffssi2@GCC_4.3.0 4.3
+ __fixdfdi@GCC_3.0 4.1.1
+ __fixsfdi@GCC_3.0 4.1.1
+ __fixunsdfdi@GCC_3.0 4.1.1
+ __fixunsdfsi@GCC_3.0 4.1.1
+ __fixunssfdi@GCC_3.0 4.1.1
+ __fixunssfsi@GCC_3.0 4.1.1
+ __floatdidf@GCC_3.0 4.1.1
+ __floatdisf@GCC_3.0 4.1.1
+ __floatundidf@GCC_4.2.0 4.2.1
+ __floatundisf@GCC_4.2.0 4.2.1
+ __frame_state_for@GLIBC_2.0 4.1.1
+ __gcc_personality_v0@GCC_3.3.1 4.1.1
+ __lshrdi3@GCC_3.0 4.1.1
+ __moddi3@GLIBC_2.0 4.1.1
+ __muldc3@GCC_4.0.0 4.1.1
+ __muldi3@GCC_3.0 4.1.1
+ __mulsc3@GCC_4.0.0 4.1.1
+ __mulvdi3@GCC_3.0 4.1.1
+ __mulvsi3@GCC_3.0 4.1.1
+ __negdi2@GCC_3.0 4.1.1
+ __negvdi2@GCC_3.0 4.1.1
+ __negvsi2@GCC_3.0 4.1.1
+ __paritydi2@GCC_3.4 4.1.1
+ __paritysi2@GCC_3.4 4.1.1
+ __popcountdi2@GCC_3.4 4.1.1
+ __popcountsi2@GCC_3.4 4.1.1
+ __powidf2@GCC_4.0.0 4.1.1
+ __powisf2@GCC_4.0.0 4.1.1
+ __register_frame@GLIBC_2.0 4.1.1
+ __register_frame_info@GLIBC_2.0 4.1.1
+ __register_frame_info_bases@GCC_3.0 4.1.1
+ __register_frame_info_table@GLIBC_2.0 4.1.1
+ __register_frame_info_table_bases@GCC_3.0 4.1.1
+ __register_frame_table@GLIBC_2.0 4.1.1
+ __subvdi3@GCC_3.0 4.1.1
+ __subvsi3@GCC_3.0 4.1.1
+ __ucmpdi2@GCC_3.0 4.1.1
+ __udivdi3@GLIBC_2.0 4.1.1
+ __udivmoddi4@GCC_3.0 4.1.1
+ __umoddi3@GLIBC_2.0 4.1.1
--- gcc-5-5.4.0.orig/debian/libgccLC.postinst
+++ gcc-5-5.4.0/debian/libgccLC.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/libgcc@LC@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libgccjit0.symbols
+++ gcc-5-5.4.0/debian/libgccjit0.symbols
@@ -0,0 +1,5 @@
+libgccjit.so.0 #PACKAGE# #MINVER#
+ (symver)LIBGCCJIT_ABI_0 5.1
+ (symver)LIBGCCJIT_ABI_1 5.1
+ (symver)LIBGCCJIT_ABI_2 5.1
+ (symver)LIBGCCJIT_ABI_3 5.1
--- gcc-5-5.4.0.orig/debian/libgcj-common.postinst
+++ gcc-5-5.4.0/debian/libgcj-common.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/libgcj-common
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcj-@BV@-base $docdir
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libgcj-common.preinst
+++ gcc-5-5.4.0/debian/libgcj-common.preinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    upgrade|install)
+	if [ -n "$2" ] && [ -h /usr/share/doc/libgcj-common ] \
+	   && dpkg --compare-versions "$2" lt 1:4.0.2-10
+	then
+	    rm -f /usr/share/doc/libgcj-common
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libgcj-doc.doc-base
+++ gcc-5-5.4.0/debian/libgcj-doc.doc-base
@@ -0,0 +1,10 @@
+Document: libgcj-doc
+Title: The GNU LibGCJ Classpath library
+Author: Various
+Abstract: Autogenerated documentation describing the libgcj
+ library (GCC 5), based on the classpath library.
+Section: Programming/Java
+
+Format: html
+Index: /usr/share/doc/gcc-5-base/api/index.html
+Files: /usr/share/doc/gcc-5-base/api/*.html
--- gcc-5-5.4.0.orig/debian/libgcjGCJ-awt.overrides
+++ gcc-5-5.4.0/debian/libgcjGCJ-awt.overrides
@@ -0,0 +1,2 @@
+# pick up the exact version, in case another gcj version is installed
+libgcj@GCJ@-awt binary: binary-or-shlib-defines-rpath
--- gcc-5-5.4.0.orig/debian/libgcjGCJ-dev.overrides
+++ gcc-5-5.4.0/debian/libgcjGCJ-dev.overrides
@@ -0,0 +1 @@
+libgcj@GCJ@-dev binary: library-not-linked-against-libc
--- gcc-5-5.4.0.orig/debian/libgcjGCJ.overrides
+++ gcc-5-5.4.0/debian/libgcjGCJ.overrides
@@ -0,0 +1,9 @@
+# pick up the exact version, in case another gcj version is installed
+libgcj@GCJ@ binary: binary-or-shlib-defines-rpath
+
+# intended
+libgcj@GCJ@ binary: unused-shlib-entry-in-control-file
+libgcj@GCJ@ binary: shlibs-declares-dependency-on-other-package
+
+# keep patched ltdl copy
+libgcj@GCJ@ binary: embedded-library
--- gcc-5-5.4.0.orig/debian/libgcjLGCJ.postinst
+++ gcc-5-5.4.0/debian/libgcjLGCJ.postinst
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/libgcj@GCJ@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	  rm -rf /usr/share/doc/libgcj@GCJ@
+	  ln -s gcj-@BV@-base /usr/share/doc/libgcj@GCJ@
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libgcjLGCJ.postrm
+++ gcc-5-5.4.0/debian/libgcjLGCJ.postrm
@@ -0,0 +1,12 @@
+#! /bin/sh -e
+
+case "$1" in
+    remove|purge)
+        # only purge if no other library is installed.
+        if [ -z "$(ls /usr/lib/libgcj.so.@GCJ@* 2>/dev/null)" ]; then
+	    rm -f /var/lib/gcj-@BV@/classmap.db
+	    rmdir --ignore-fail-on-non-empty /var/lib/gcj-@BV@ 2>/dev/null || true
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libgfortran.symbols
+++ gcc-5-5.4.0/debian/libgfortran.symbols
@@ -0,0 +1,11 @@
+libgfortran.so.3 #PACKAGE# #MINVER#
+ (symver)F2C_1.0 4.3
+ (symver)GFORTRAN_C99_1.0 4.3
+ (symver)GFORTRAN_C99_1.1 4.5
+ (symver)GFORTRAN_1.0 4.3
+ (symver)GFORTRAN_1.1 4.4
+ (symver)GFORTRAN_1.2 4.5
+ (symver)GFORTRAN_1.3 4.6
+ (symver)GFORTRAN_1.4 4.6
+ (symver)GFORTRAN_1.5 4.8
+ (symver)GFORTRAN_1.6 5
--- gcc-5-5.4.0.orig/debian/libgnat-BV.overrides
+++ gcc-5-5.4.0/debian/libgnat-BV.overrides
@@ -0,0 +1 @@
+libgnat-@BV@ binary: package-name-doesnt-match-sonames
--- gcc-5-5.4.0.orig/debian/libgnatprjBV.overrides
+++ gcc-5-5.4.0/debian/libgnatprjBV.overrides
@@ -0,0 +1 @@
+libgnatprj@BV@ binary: missing-dependency-on-libc
--- gcc-5-5.4.0.orig/debian/libgnatvsnBV.overrides
+++ gcc-5-5.4.0/debian/libgnatvsnBV.overrides
@@ -0,0 +1 @@
+libgnatvsn@BV@ binary: missing-dependency-on-libc
--- gcc-5-5.4.0.orig/debian/libgomp.symbols
+++ gcc-5-5.4.0/debian/libgomp.symbols
@@ -0,0 +1,14 @@
+libgomp.so.1 #PACKAGE# #MINVER#
+ (symver)GOACC_2.0 5
+ (symver)GOMP_1.0 4.2.1
+ (symver)GOMP_2.0 4.4
+ (symver)GOMP_3.0 4.7
+ (symver)GOMP_4.0 4.9
+ (symver)GOMP_4.0.1 5
+ (symver)GOMP_PLUGIN_1.0 5
+ (symver)OACC_2.0 5
+ (symver)OMP_1.0 4.2.1
+ (symver)OMP_2.0 4.2.1
+ (symver)OMP_3.0 4.4
+ (symver)OMP_3.1 4.7
+ (symver)OMP_4.0 4.9
--- gcc-5-5.4.0.orig/debian/libitm.symbols
+++ gcc-5-5.4.0/debian/libitm.symbols
@@ -0,0 +1,2 @@
+libitm.so.1 #PACKAGE# #MINVER#
+ (symver)LIBITM_1.0 4.7
--- gcc-5-5.4.0.orig/debian/liblsan0.symbols
+++ gcc-5-5.4.0/debian/liblsan0.symbols
@@ -0,0 +1,105 @@
+liblsan.so.0 liblsan0 #MINVER#
+ _ZN11__sanitizer11CheckFailedEPKciS1_yy@Base 4.9
+ _ZN11__sanitizer7OnPrintEPKc@Base 4.9
+ _ZdaPv@Base 4.9
+ _ZdaPvRKSt9nothrow_t@Base 4.9
+ _ZdlPv@Base 4.9
+ _ZdlPvRKSt9nothrow_t@Base 4.9
+ _Znam@Base 4.9
+ _ZnamRKSt9nothrow_t@Base 4.9
+ _Znwm@Base 4.9
+ _ZnwmRKSt9nothrow_t@Base 4.9
+ __asan_backtrace_alloc@Base 4.9
+ __asan_backtrace_close@Base 4.9
+ __asan_backtrace_create_state@Base 4.9
+ __asan_backtrace_dwarf_add@Base 4.9
+ __asan_backtrace_free@Base 4.9
+ __asan_backtrace_get_view@Base 4.9
+ __asan_backtrace_initialize@Base 4.9
+ __asan_backtrace_open@Base 4.9
+ __asan_backtrace_pcinfo@Base 4.9
+ __asan_backtrace_qsort@Base 4.9
+ __asan_backtrace_release_view@Base 4.9
+ __asan_backtrace_syminfo@Base 4.9
+ __asan_backtrace_vector_finish@Base 4.9
+ __asan_backtrace_vector_grow@Base 4.9
+ __asan_backtrace_vector_release@Base 4.9
+ __asan_cplus_demangle_builtin_types@Base 4.9
+ __asan_cplus_demangle_fill_ctor@Base 4.9
+ __asan_cplus_demangle_fill_dtor@Base 4.9
+ __asan_cplus_demangle_fill_extended_operator@Base 4.9
+ __asan_cplus_demangle_fill_name@Base 4.9
+ __asan_cplus_demangle_init_info@Base 4.9
+ __asan_cplus_demangle_mangled_name@Base 4.9
+ __asan_cplus_demangle_operators@Base 4.9
+ __asan_cplus_demangle_print@Base 4.9
+ __asan_cplus_demangle_print_callback@Base 4.9
+ __asan_cplus_demangle_type@Base 4.9
+ __asan_cplus_demangle_v3@Base 4.9
+ __asan_cplus_demangle_v3_callback@Base 4.9
+ __asan_internal_memcmp@Base 4.9
+ __asan_internal_memcpy@Base 4.9
+ __asan_internal_memset@Base 4.9
+ __asan_internal_strcmp@Base 4.9
+ __asan_internal_strlen@Base 4.9
+ __asan_internal_strncmp@Base 4.9
+ __asan_internal_strnlen@Base 4.9
+ __asan_is_gnu_v3_mangled_ctor@Base 4.9
+ __asan_is_gnu_v3_mangled_dtor@Base 4.9
+ __asan_java_demangle_v3@Base 4.9
+ __asan_java_demangle_v3_callback@Base 4.9
+ __interceptor___libc_memalign@Base 4.9
+ __interceptor_aligned_alloc@Base 5
+ __interceptor_calloc@Base 4.9
+ __interceptor_cfree@Base 4.9
+ __interceptor_free@Base 4.9
+ __interceptor_mallinfo@Base 4.9
+ __interceptor_malloc@Base 4.9
+ __interceptor_malloc_usable_size@Base 4.9
+ __interceptor_mallopt@Base 4.9
+ __interceptor_memalign@Base 4.9
+ __interceptor_posix_memalign@Base 4.9
+ __interceptor_pthread_create@Base 4.9
+ __interceptor_pthread_join@Base 4.9
+ __interceptor_pvalloc@Base 4.9
+ __interceptor_realloc@Base 4.9
+ __interceptor_valloc@Base 4.9
+ __libc_memalign@Base 4.9
+ __lsan_disable@Base 4.9
+ __lsan_do_leak_check@Base 4.9
+ __lsan_enable@Base 4.9
+ __lsan_ignore_object@Base 4.9
+ __lsan_register_root_region@Base 5
+ __lsan_unregister_root_region@Base 5
+ __sanitizer_cov@Base 4.9
+ __sanitizer_cov_dump@Base 4.9
+ __sanitizer_cov_indir_call16@Base 5
+ __sanitizer_cov_init@Base 5
+ __sanitizer_cov_module_init@Base 5
+ __sanitizer_get_allocated_size@Base 5
+ __sanitizer_get_current_allocated_bytes@Base 5
+ __sanitizer_get_estimated_allocated_size@Base 5
+ __sanitizer_get_free_bytes@Base 5
+ __sanitizer_get_heap_size@Base 5
+ __sanitizer_get_ownership@Base 5
+ __sanitizer_get_unmapped_bytes@Base 5
+ __sanitizer_maybe_open_cov_file@Base 5
+ __sanitizer_print_stack_trace@Base 5
+ __sanitizer_report_error_summary@Base 4.9
+ __sanitizer_sandbox_on_notify@Base 4.9
+ __sanitizer_set_report_path@Base 4.9
+ aligned_alloc@Base 5
+ calloc@Base 4.9
+ cfree@Base 4.9
+ free@Base 4.9
+ mallinfo@Base 4.9
+ malloc@Base 4.9
+ malloc_usable_size@Base 4.9
+ mallopt@Base 4.9
+ memalign@Base 4.9
+ posix_memalign@Base 4.9
+ pthread_create@Base 4.9
+ pthread_join@Base 4.9
+ pvalloc@Base 4.9
+ realloc@Base 4.9
+ valloc@Base 4.9
--- gcc-5-5.4.0.orig/debian/libmpx.symbols
+++ gcc-5-5.4.0/debian/libmpx.symbols
@@ -0,0 +1,4 @@
+libmpx.so.0 #PACKAGE# #MINVER#
+ (symver)LIBMPX_1.0 5
+libmpxwrappers.so.0 #PACKAGE# #MINVER#
+ (symver)LIBMPXWRAPPERS_1.0 5
--- gcc-5-5.4.0.orig/debian/libobjc4.symbols
+++ gcc-5-5.4.0/debian/libobjc4.symbols
@@ -0,0 +1,3 @@
+libobjc.so.4 libobjc4 #MINVER#
+#include "libobjc4.symbols.common"
+ __gnu_objc_personality_v0@Base 4.2.1
--- gcc-5-5.4.0.orig/debian/libobjc4.symbols.armel
+++ gcc-5-5.4.0/debian/libobjc4.symbols.armel
@@ -0,0 +1,4 @@
+libobjc.so.4 libobjc4 #MINVER#
+#include "libobjc4.symbols.common"
+ __gnu_objc_personality_v0@Base 4.2.1
+ __objc_exception_class@Base 4.3.0
--- gcc-5-5.4.0.orig/debian/libobjc4.symbols.armhf
+++ gcc-5-5.4.0/debian/libobjc4.symbols.armhf
@@ -0,0 +1,4 @@
+libobjc.so.4 libobjc4 #MINVER#
+#include "libobjc4.symbols.common"
+ __gnu_objc_personality_v0@Base 4.2.1
+ __objc_exception_class@Base 4.3.0
--- gcc-5-5.4.0.orig/debian/libobjc4.symbols.common
+++ gcc-5-5.4.0/debian/libobjc4.symbols.common
@@ -0,0 +1,205 @@
+ __objc_accessors_init@Base 4.6
+ __objc_add_class_to_hash@Base 4.2.1
+ __objc_class_links_resolved@Base 4.2.1
+ __objc_class_name_NXConstantString@Base 4.2.1
+ __objc_class_name_Object@Base 4.2.1
+ __objc_class_name_Protocol@Base 4.2.1
+ __objc_dangling_categories@Base 4.2.1
+ __objc_exec_class@Base 4.2.1
+ __objc_force_linking@Base 4.2.1
+ __objc_generate_gc_type_description@Base 4.2.1
+ __objc_get_forward_imp@Base 4.2.1
+ __objc_init_class@Base 4.6
+ __objc_init_class_tables@Base 4.2.1
+ __objc_init_dispatch_tables@Base 4.2.1
+ __objc_init_selector_tables@Base 4.2.1
+ __objc_init_thread_system@Base 4.2.1
+ __objc_install_premature_dtable@Base 4.2.1
+ __objc_is_multi_threaded@Base 4.2.1
+ __objc_linking@Base 4.2.1
+ __objc_msg_forward@Base 4.2.1
+ __objc_msg_forward2@Base 4.3
+ __objc_print_dtable_stats@Base 4.2.1
+ __objc_protocols_add_protocol@Base 4.6
+ __objc_protocols_init@Base 4.6
+ __objc_register_instance_methods_to_class@Base 4.2.1
+ __objc_register_selectors_from_class@Base 4.2.1
+ __objc_register_selectors_from_description_list@Base 4.6
+ __objc_register_selectors_from_list@Base 4.2.1
+ __objc_register_selectors_from_module@Base 4.6
+ __objc_resolve_class_links@Base 4.2.1
+ __objc_responds_to@Base 4.2.1
+ __objc_runtime_mutex@Base 4.2.1
+ __objc_runtime_threads_alive@Base 4.2.1
+ __objc_selector_max_index@Base 4.2.1
+ __objc_sparse2_id@Base 4.2.1
+ __objc_sync_init@Base 4.6
+ __objc_thread_exit_status@Base 4.2.1
+ __objc_uninstalled_dtable@Base 4.2.1
+ __objc_update_classes_with_methods@Base 4.6
+ __objc_update_dispatch_table_for_class@Base 4.2.1
+ _objc_abort@Base 4.6
+ _objc_became_multi_threaded@Base 4.2.1
+ _objc_load_callback@Base 4.2.1
+ _objc_lookup_class@Base 4.6
+ class_addIvar@Base 4.6
+ class_addMethod@Base 4.6
+ class_addProtocol@Base 4.6
+ class_add_method_list@Base 4.2.1
+ class_conformsToProtocol@Base 4.6
+ class_copyIvarList@Base 4.6
+ class_copyMethodList@Base 4.6
+ class_copyPropertyList@Base 4.6
+ class_copyProtocolList@Base 4.6
+ class_createInstance@Base 4.6
+ class_getClassMethod@Base 4.6
+ class_getClassVariable@Base 4.6
+ class_getInstanceMethod@Base 4.6
+ class_getInstanceSize@Base 4.6
+ class_getInstanceVariable@Base 4.6
+ class_getIvarLayout@Base 4.6
+ class_getMethodImplementation@Base 4.6
+ class_getName@Base 4.6
+ class_getProperty@Base 4.6
+ class_getSuperclass@Base 4.6
+ class_getVersion@Base 4.6
+ class_getWeakIvarLayout@Base 4.6
+ class_isMetaClass@Base 4.6
+ class_ivar_set_gcinvisible@Base 4.2.1
+ class_replaceMethod@Base 4.6
+ class_respondsToSelector@Base 4.6
+ class_setIvarLayout@Base 4.6
+ class_setVersion@Base 4.6
+ class_setWeakIvarLayout@Base 4.6
+ get_imp@Base 4.2.1
+ idxsize@Base 4.2.1
+ ivar_getName@Base 4.6
+ ivar_getOffset@Base 4.6
+ ivar_getTypeEncoding@Base 4.6
+ method_copyArgumentType@Base 4.6
+ method_copyReturnType@Base 4.6
+ method_exchangeImplementations@Base 4.6
+ method_getArgumentType@Base 4.6
+ method_getDescription@Base 4.6
+ method_getImplementation@Base 4.6
+ method_getName@Base 4.6
+ method_getNumberOfArguments@Base 4.6
+ method_getReturnType@Base 4.6
+ method_getTypeEncoding@Base 4.6
+ method_get_imp@Base 4.6
+ method_setImplementation@Base 4.6
+ narrays@Base 4.2.1
+ nbuckets@Base 4.2.1
+ nil_method@Base 4.2.1
+ nindices@Base 4.2.1
+ objc_aligned_size@Base 4.2.1
+ objc_alignof_type@Base 4.2.1
+ objc_allocateClassPair@Base 4.6
+ objc_atomic_malloc@Base 4.2.1
+ objc_calloc@Base 4.2.1
+ objc_condition_allocate@Base 4.2.1
+ objc_condition_broadcast@Base 4.2.1
+ objc_condition_deallocate@Base 4.2.1
+ objc_condition_signal@Base 4.2.1
+ objc_condition_wait@Base 4.2.1
+ objc_copyProtocolList@Base 4.6
+ objc_copyStruct@Base 4.6
+ objc_disposeClassPair@Base 4.6
+ objc_enumerationMutation@Base 4.6
+ objc_exception_throw@Base 4.2.1
+ objc_free@Base 4.2.1
+ objc_getClass@Base 4.6
+ objc_getClassList@Base 4.6
+ objc_getMetaClass@Base 4.6
+ objc_getProperty@Base 4.6
+ objc_getPropertyStruct@Base 4.6
+ objc_getProtocol@Base 4.6
+ objc_getRequiredClass@Base 4.6
+ objc_get_class@Base 4.2.1
+ objc_get_meta_class@Base 4.2.1
+ objc_get_type_qualifiers@Base 4.2.1
+ objc_hash_add@Base 4.2.1
+ objc_hash_delete@Base 4.2.1
+ objc_hash_is_key_in_hash@Base 4.2.1
+ objc_hash_new@Base 4.2.1
+ objc_hash_next@Base 4.2.1
+ objc_hash_remove@Base 4.2.1
+ objc_hash_value_for_key@Base 4.2.1
+ objc_layout_finish_structure@Base 4.2.1
+ objc_layout_structure@Base 4.2.1
+ objc_layout_structure_get_info@Base 4.2.1
+ objc_layout_structure_next_member@Base 4.2.1
+ objc_lookUpClass@Base 4.6
+ objc_lookup_class@Base 4.2.1
+ objc_malloc@Base 4.2.1
+ objc_msg_lookup@Base 4.2.1
+ objc_msg_lookup_super@Base 4.2.1
+ objc_mutex_allocate@Base 4.2.1
+ objc_mutex_deallocate@Base 4.2.1
+ objc_mutex_lock@Base 4.2.1
+ objc_mutex_trylock@Base 4.2.1
+ objc_mutex_unlock@Base 4.2.1
+ objc_promoted_size@Base 4.2.1
+ objc_realloc@Base 4.2.1
+ objc_registerClassPair@Base 4.6
+ objc_setEnumerationMutationHandler@Base 4.6
+ objc_setExceptionMatcher@Base 4.6
+ objc_setGetUnknownClassHandler@Base 4.6
+ objc_setProperty@Base 4.6
+ objc_setPropertyStruct@Base 4.6
+ objc_setUncaughtExceptionHandler@Base 4.6
+ objc_set_thread_callback@Base 4.2.1
+ objc_sizeof_type@Base 4.2.1
+ objc_skip_argspec@Base 4.2.1
+ objc_skip_offset@Base 4.2.1
+ objc_skip_type_qualifiers@Base 4.2.1
+ objc_skip_typespec@Base 4.2.1
+ objc_sync_enter@Base 4.6
+ objc_sync_exit@Base 4.6
+ objc_thread_add@Base 4.2.1
+ objc_thread_detach@Base 4.2.1
+ objc_thread_exit@Base 4.2.1
+ objc_thread_get_data@Base 4.2.1
+ objc_thread_get_priority@Base 4.2.1
+ objc_thread_id@Base 4.2.1
+ objc_thread_remove@Base 4.2.1
+ objc_thread_set_data@Base 4.2.1
+ objc_thread_set_priority@Base 4.2.1
+ objc_thread_yield@Base 4.2.1
+ object_copy@Base 4.2.1
+ object_dispose@Base 4.2.1
+ object_getClassName@Base 4.6
+ object_getIndexedIvars@Base 4.6
+ object_getInstanceVariable@Base 4.6
+ object_getIvar@Base 4.6
+ object_setClass@Base 4.6
+ object_setInstanceVariable@Base 4.6
+ object_setIvar@Base 4.6
+ property_getAttributes@Base 4.6
+ property_getName@Base 4.6
+ protocol_conformsToProtocol@Base 4.6
+ protocol_copyMethodDescriptionList@Base 4.6
+ protocol_copyPropertyList@Base 4.6
+ protocol_copyProtocolList@Base 4.6
+ protocol_getMethodDescription@Base 4.6
+ protocol_getName@Base 4.6
+ protocol_getProperty@Base 4.6
+ protocol_isEqual@Base 4.6
+ sarray_at_put@Base 4.2.1
+ sarray_at_put_safe@Base 4.2.1
+ sarray_free@Base 4.2.1
+ sarray_lazy_copy@Base 4.2.1
+ sarray_new@Base 4.2.1
+ sarray_realloc@Base 4.2.1
+ sarray_remove_garbage@Base 4.2.1
+ search_for_method_in_list@Base 4.2.1
+ sel_copyTypedSelectorList@Base 4.6
+ sel_getName@Base 4.6
+ sel_getTypeEncoding@Base 4.6
+ sel_getTypedSelector@Base 4.6
+ sel_getUid@Base 4.6 
+ sel_get_any_uid@Base 4.2.1
+ sel_isEqual@Base 4.6
+ sel_is_mapped@Base 4.2.1
+ sel_registerName@Base 4.6
+ sel_registerTypedName@Base 4.6
--- gcc-5-5.4.0.orig/debian/libquadmath.symbols
+++ gcc-5-5.4.0/debian/libquadmath.symbols
@@ -0,0 +1,2 @@
+libquadmath.so.0 #PACKAGE# #MINVER#
+ (symver)QUADMATH_1.0 4.6
--- gcc-5-5.4.0.orig/debian/libstdc++-BV-doc.doc-base
+++ gcc-5-5.4.0/debian/libstdc++-BV-doc.doc-base
@@ -0,0 +1,13 @@
+Document: libstdc++-@BV@-doc
+Title: The GNU Standard C++ Library v3 (gcc-@BV@)
+Author: Various
+Abstract: This package contains documentation files for the GNU stdc++ library.
+ One set is the distribution documentation, the other set is the
+ source documentation including a namespace list, class hierarchy,
+ alphabetical list, compound list, file list, namespace members,
+ compound members and file members.
+Section: Programming/C++
+
+Format: html
+Index: /usr/share/doc/libstdc++-@BV@-doc/libstdc++/index.html
+Files: /usr/share/doc/libstdc++-@BV@-doc/libstdc++/*
--- gcc-5-5.4.0.orig/debian/libstdc++-BV-doc.overrides
+++ gcc-5-5.4.0/debian/libstdc++-BV-doc.overrides
@@ -0,0 +1,11 @@
+libstdc++-@BV@-doc binary: hyphen-used-as-minus-sign
+libstdc++-@BV@-doc binary: manpage-has-bad-whatis-entry
+
+# 3xx used by intent to avoid conficts
+libstdc++-@BV@-doc binary: manpage-section-mismatch
+
+# some very long identifiers
+libstdc++-@BV@-doc binary: manpage-has-errors-from-man .*can't break line
+
+# doxygen accepts formulas in man pages ...
+libstdc++-@BV@-doc binary: manpage-has-errors-from-man .*a space character is not allowed in an escape name
--- gcc-5-5.4.0.orig/debian/libstdc++-breaks.Debian
+++ gcc-5-5.4.0/debian/libstdc++-breaks.Debian
@@ -0,0 +1,86 @@
+libantlr-dev (<= 2.7.7+dfsg-6),
+libaqsis1 (<= 1.8.2-1),
+libassimp3 (<= 3.0~dfsg-4),
+blockattack (<= 1.4.1+ds1-2.1+b2),
+boo (<= 0.9.5~git20110729.r1.202a430-2),
+libboost-date-time1.54.0,
+libboost-date-time1.55.0,
+libcpprest2.4 (<= 2.4.0-2),
+printer-driver-brlaser (<= 3-3),
+c++-annotations (<= 10.2.0-1),
+clustalx (<= 2.1+lgpl-3),
+libdavix0 (<= 0.4.0-1+b1),
+libdballe6 (<= 6.8-1),
+dff (<= 1.3.0+dfsg.1-4.1+b3),
+libdiet-sed2.8 (<= 2.8.0-1+b3),
+libdiet-client2.8 (<= 2.8.0-1+b3),
+libdiet-admin2.8 (<= 2.8.0-1+b3),
+digikam-private-libs (<= 4:4.4.0-1.1+b2),
+emscripten (<= 1.22.1-1),
+ergo (<= 3.4.0-1),
+fceux (<= 2.2.2+dfsg0-1),
+flush (<= 0.9.12-3.1),
+libfreefem++ (<= 3.37.1-1),
+freeorion (<= 0.4.4+git20150327-2),
+fslview (<= 4.0.1-4),
+fwbuilder (<= 5.1.0-4),
+libgazebo5 (<= 5.0.1+dfsg-2.1),
+libgetfem4++ (<= 4.2.1~beta1~svn4635~dfsg-3+b1),
+libgmsh2 (<= 2.9.3+dfsg1-1),
+gnote (<= 3.16.2-1),
+gnudatalanguage (<= 0.9.5-2+b2),
+python-healpy (<= 1.8.1-1+b1),
+innoextract (<= 1.4-1+b1),
+libinsighttoolkit4.7 (<= 4.7.2-2),
+libdap17 (<= 3.14.0-2),
+libdapclient6 (<= 3.14.0-2),
+libdapserver7 (<= 3.14.0-2),
+libkolabxml1 (<= 1.1.0-3),
+libpqxx-4.0 (<= 4.0.1+dfsg-3),
+libreoffice-core (<= 1:4.4.5-2),
+librime1 (<= 1.2+dfsg-2),
+libwibble-dev (<= 1.1-1),
+lightspark (<= 0.7.2+git20150512-2+b1),
+libmarisa0 (<= 0.2.4-8),
+mira-assembler (<= 4.9.5-1),
+mongodb (<= 1:2.4.14-2),
+mongodb-server (<= 1:2.4.14-2),
+ncbi-blast+ (<= 2.2.30-4),
+libogre-1.8.0 (<= 1.8.0+dfsg1-7+b1),
+libogre-1.9.0 (<= 1.9.0+dfsg1-4),
+openscad (<= 2014.03+dfsg-1+b1),
+libopenwalnut1 (<= 1.4.0~rc1+hg3a3147463ee2-1+b1),
+passepartout (<= 0.7.1-1.1),
+pdf2djvu (<= 0.7.21-2),
+photoprint (<= 0.4.2~pre2-2.3+b2),
+plastimatch (<= 1.6.2+dfsg-1),
+plee-the-bear (<= 0.6.0-3.1),
+povray (<= 1:3.7.0.0-8),
+powertop (<= 2.6.1-1),
+psi4 (<= 4.0~beta5+dfsg-2+b1),
+python3-taglib (<= 0.3.6+dfsg-2+b2),
+realtimebattle (<= 1.0.8-14),
+ruby-passenger (<= 5.0.7-1),
+libapache2-mod-passenger (<= 5.0.7-1),
+schroot (<= 1.6.10-1+b1),
+sqlitebrowser (<= 3.5.1-3),
+tecnoballz (<= 0.93.1-6),
+wesnoth-1.12-core (<= 1:1.12.4-1),
+widelands (<= 1:18-3+b1),
+libwreport2 (<= 2.14-1),
+xflr5 (<= 6.09.06-2),
+libxmltooling6 (<= 1.5.3-2.1),
+libchemps2-1 (<= 1.5-1),
+python-fiona (<= 1.5.1-2),
+python3-fiona (<= 1.5.1-2),
+fiona (<= 1.5.1-2),
+python-guiqwt (<= 2.3.1-1),
+python-htseq (<= 0.5.4p3-2),
+python-imposm (<= 2.5.0-3+b2),
+python-pysph (<= 0~20150606.gitfa26de9-5),
+python3-taglib (<= 0.3.6+dfsg-2+b2),
+python-scipy (<= 0.14.1-1),
+python3-scipy (<= 0.14.1-1),
+python-sfml (<= 2.2~git20150611.196c88+dfsg-1+b1),
+python3-sfml (<= 2.2~git20150611.196c88+dfsg-1+b1),
+python-rasterio (<= 0.24.0-1),
--- gcc-5-5.4.0.orig/debian/libstdc++-breaks.Ubuntu
+++ gcc-5-5.4.0/debian/libstdc++-breaks.Ubuntu
@@ -0,0 +1,73 @@
+libantlr-dev (<= 2.7.7+dfsg-6),
+libaqsis1 (<= 1.8.2-1),
+libassimp3 (<= 3.0~dfsg-4),
+blockattack (<= 1.4.1+ds1-2.1build2),
+boo (<= 0.9.5~git20110729.r1.202a430-2),
+libboost-date-time1.55.0,
+libcpprest2.2 (<= 2.2.0-1),
+printer-driver-brlaser (<= 3-3),
+c++-annotations (<= 10.2.0-1),
+chromium-browser (<= 43.0.2357.130-0ubuntu2),
+clustalx (<= 2.1+lgpl-2),
+libdavix0 (<= 0.4.0-1build1),
+libdballe6 (<= 6.8-1),
+dff (<= 1.3.0+dfsg.1-4.1build2),
+libdiet-sed2.8 (<= 2.8.0-1build3),
+libdiet-client2.8 (<= 2.8.0-1build3),
+libdiet-admin2.8 (<= 2.8.0-1build3),
+libkgeomap2 (<= 4:15.04.2-0ubuntu1),
+libmediawiki1 (<= 1.0~digikam4.10.0-0ubuntu2),
+libkvkontakte1 (<= 1.0~digikam4.10.0-0ubuntu2),
+emscripten (<= 1.22.1-1),
+ergo (<= 3.4.0-1),
+fceux (<= 2.2.2+dfsg0-1),
+flush (<= 0.9.12-3.1ubuntu1),
+libfreefem++ (<= 3.37.1-1),
+freeorion (<= 0.4.4+git20150327-2),
+fslview (<= 4.0.1-4),
+fwbuilder (<= 5.1.0-4),
+libgazebo5 (<= 5.0.1+dfsg-2.1),
+libgetfem4++ (<= 4.2.1~beta1~svn4482~dfsg-3ubuntu3),
+libgmsh2 (<= 2.8.5+dfsg-1.1ubuntu1),
+gnote (<= 3.16.2-1),
+gnudatalanguage (<= 0.9.5-2build1),
+python-healpy (<= 1.8.1-1),
+innoextract (<= 1.4-1build1),
+libinsighttoolkit4.6 (<= 4.6.0-3ubuntu3),
+libdap17 (<= 3.14.0-2),
+libdapclient6 (<= 3.14.0-2),
+libdapserver7 (<= 3.14.0-2),
+libkolabxml1 (<= 1.1.0-3),
+libpqxx-4.0 (<= 4.0.1+dfsg-3ubuntu1),
+libreoffice-core (<= 1:4.4.4~rc3-0ubuntu1),
+librime1 (<= 1.2+dfsg-2),
+libwibble-dev (<= 1.1-1),
+lightspark (<= 0.7.2+git20150512-2),
+libmarisa0 (<= 0.2.4-8build1),
+mira-assembler (<= 4.9.5-1),
+mongodb (<= 1:2.6.3-0ubuntu7),
+mongodb-server (<= 1:2.6.3-0ubuntu7),
+ncbi-blast+ (<= 2.2.30-4),
+libogre-1.8.0 (<= 1.8.1+dfsg-0ubuntu5),
+libogre-1.9.0 (<= 1.9.0+dfsg1-4),
+openscad (<= 2014.03+dfsg-1build1),
+libopenwalnut1 (<= 1.4.0~rc1+hg3a3147463ee2-1ubuntu2),
+passepartout (<= 0.7.1-1.1),
+pdf2djvu (<= 0.7.19-1ubuntu2),
+photoprint (<= 0.4.2~pre2-2.3),
+plastimatch (<= 1.6.2+dfsg-1),
+plee-the-bear (<= 0.6.0-3.1),
+povray (<= 1:3.7.0.0-8),
+powertop (<= 2.6.1-1),
+psi4 (<= 4.0~beta5+dfsg-2build1),
+python3-taglib (<= 0.3.6+dfsg-2build2),
+realtimebattle (<= 1.0.8-14),
+ruby-passenger (<= 4.0.53-1),
+libapache2-mod-passenger (<= 4.0.53-1),
+sqlitebrowser (<= 3.5.1-3),
+tecnoballz (<= 0.93.1-6),
+wesnoth-1.12-core (<= 1:1.12.4-1),
+widelands (<= 1:18-3build1),
+libwreport2 (<= 2.14-1),
+xflr5 (<= 6.09.06-2),
+libxmltooling6 (<= 1.5.3-2.1),
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.128bit
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.128bit
@@ -0,0 +1,46 @@
+ _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.7
+ _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.7
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.32bit
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.32bit
@@ -0,0 +1,601 @@
+#include "libstdc++6.symbols.common"
+#include "libstdc++6.symbols.32bit.cxx11"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1
+ _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs16find_last_not_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs2atEj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4copyEPcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs6substrEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_checkEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_limitEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSsixEj@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE6_M_putEPcjPKcPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE6_M_putEPwjPKwPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt19__codecvt_utf8_baseIDiE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE9do_lengthER11__mbstate_tPKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12_M_transformEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12_M_transformEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcjcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcjcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcjwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcjwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEj@GLIBCXX_3.4.18 4.8
+ _ZNKSt8__detail20_Prime_rehash_policy14_M_need_rehashEjjj@GLIBCXX_3.4.18 4.8
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5
+ _ZNKSt8valarrayIjE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEjj@GLIBCXX_3.4.16 4.6.0
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEjjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EjwRKS1_@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_j@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEjjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEjj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_jw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7reserveEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEjjj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi4readEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6ignoreEii@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi8readsomeEPci@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSo5writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSo8_M_writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSs10_S_compareEjj@GLIBCXX_3.4.16 4.6.0
+ _ZNSs12_S_constructEjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs14_M_replace_auxEjjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs15_M_replace_safeEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs18_S_construct_aux_2EjcRKSaIcE@GLIBCXX_3.4.14 4.5
+ _ZNSs2atEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs4_Rep8_M_cloneERKSaIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep9_S_createEjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEj@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7_M_moveEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_moveEPcPKcj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_jc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs7reserveEj@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcjc@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcjc@GLIBCXX_3.4.5 4.1.1
+ _ZNSs9_M_mutateEjjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EPKcjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EPKcjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsixEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11this_thread11__sleep_forENSt6chrono8durationIxSt5ratioILx1ELx1EEEENS1_IxS2_ILx1ELx1000000000EEEE@GLIBCXX_3.4.18 4.8
+ _ZNSt11__timepunctIcEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE7seekoffExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8xsputn_2EPKciS2_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt12strstreambuf6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_allocEj@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_setupEPcS0_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPFPvjEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPFPvjEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEij@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt14collate_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ (arch=!powerpc !powerpcspe !ppc64 !sparc)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcjj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS4_x@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwjj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS4_x@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15messages_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt16__numpunct_cacheIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb0EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb1EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb1EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb0EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb0EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb1EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC1ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb1EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC2ERKSsj@GLIBCXX_3.4.21 5
+ _ZNSt18__moneypunct_cacheIcLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ (arch=!armel !kfreebsd-amd64 !kfreebsd-i386)_ZNSt28__atomic_futex_unsigned_base19_M_futex_wait_untilEPjjbNSt6chrono8durationIxSt5ratioILx1ELx1EEEENS2_IxS3_ILx1ELx1000000000EEEE@GLIBCXX_3.4.21 5
+ _ZNSt5ctypeIcEC1EP15__locale_structPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EP15__locale_structPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC1EjRKSt8valarrayIjES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC2EjRKSt8valarrayIjES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEj@GLIBCXX_3.4.7 4.1.1
+ _ZNSt6locale5_ImplC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1ERKS0_j@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2ERKS0_j@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC1ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC2ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEixEj@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZSt11_Hash_bytesPKvjj@CXXABI_1.3.5 4.6
+ _ZSt15_Fnv_hash_bytesPKvjj@CXXABI_1.3.5 4.6
+ _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__verify_groupingPKcjRKSs@GLIBCXX_3.4.10 4.3
+ _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZdaPvj@CXXABI_1.3.9 5
+ _ZdlPvj@CXXABI_1.3.9 5
+ _Znaj@GLIBCXX_3.4 4.1.1
+ _ZnajRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _Znwj@GLIBCXX_3.4 4.1.1
+ _ZnwjRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.32bit.cxx11
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.32bit.cxx11
@@ -0,0 +1,329 @@
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE2atEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4copyEPcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEPKcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEjjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEjjPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEjjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEjjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_checkEjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_limitEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindERKS4_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEjjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEjjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE12_M_transformEPcPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE12_M_transformEPwPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES4_S4_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES4_S4_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES4_S4_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES4_S4_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES4_S4_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES4_S4_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIcEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIcEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIwEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIwEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIcc11__mbstate_tEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIcc11__mbstate_tEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIwc11__mbstate_tEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIwc11__mbstate_tEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1ERKNSt7__cxx1112basic_stringIcS2_SaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2ERKNSt7__cxx1112basic_stringIcS2_SaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_destroyEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEjjPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_set_lengthEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE14_M_replace_auxEjjjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE18_M_construct_aux_2Ejc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE2atEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPKcS4_EEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPcS4_EEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEjPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEjjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_moveEPcPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S8_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_jc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_PKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_jc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEjjPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEjjPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEjjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEjjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEjjjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_eraseEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_lengthEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_mutateEjjPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_S_assignEPcjc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EPKcjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_jjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EjcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EPKcjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_jjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EjcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_destroyEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_replaceEjjPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_S_compareEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_capacityEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_M_set_lengthEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE14_M_replace_auxEjjjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE18_M_construct_aux_2Ejw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPKwS4_EEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS4_EEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEjPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEjPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEjjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6resizeEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6resizeEjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_S_copyEPwPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_S_moveEPwPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_S8_j@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_jw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_PKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_jw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEjjPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEjjPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEjjRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEjjRKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEjjjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7reserveEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_eraseEjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_appendEPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_createERjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_lengthEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_mutateEjjPKwj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_S_assignEPwjw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EPKwjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_jjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EjwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EPKwjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_jj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_jjRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EjwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS5_x@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwjj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS5_x@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1ERKNS_12basic_stringIcS3_SaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2ERKNS_12basic_stringIcS3_SaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1ERKNS_12basic_stringIcS2_IcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2ERKNS_12basic_stringIcS2_IcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC1EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC2EPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC1EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC2EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC1EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC2EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC1EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC2EP15__locale_structPKcj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2EP15__locale_structj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt17__verify_groupingPKcjRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn8_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn8_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn8_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn8_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n12_NSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.32bit.hurd
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.32bit.hurd
@@ -0,0 +1,536 @@
+#include "libstdc++6.symbols.common"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1
+ _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs16find_last_not_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs2atEj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4copyEPcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindERKSsj@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs6substrEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEjjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_checkEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_limitEjj@GLIBCXX_3.4 4.1.1
+ _ZNKSsixEj@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE6_M_putEPcjPKcPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE6_M_putEPwjPKwPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_j@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12_M_transformEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12_M_transformEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcjcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcjcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcjwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcjwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiijRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwjRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8valarrayIjE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEjjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_j@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEjjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEjj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwj@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_jw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjPKwj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7reserveEj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEjjj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_jjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jj@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_jjRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EjwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi4readEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6ignoreEii@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi8readsomeEPci@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSo5writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSo8_M_writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSs12_S_constructEjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs14_M_replace_auxEjjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs15_M_replace_safeEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs2atEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs4_Rep8_M_cloneERKSaIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep9_S_createEjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEj@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEjc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7_M_moveEPcPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_moveEPcPKcj@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_jc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjRKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEjjjc@GLIBCXX_3.4 4.1.1
+ _ZNSs7reserveEj@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcjc@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcjc@GLIBCXX_3.4.5 4.1.1
+ _ZNSs9_M_mutateEjjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EPKcjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EPKcjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsjj@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsjjRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EjcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsixEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEj@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE7seekoffExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8xsputn_2EPKciS2_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_allocEj@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_setupEPcS0_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPFPvjEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPFPvjEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEij@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcjj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwjj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EP15__locale_structPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EP15__locale_structPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EPKtbj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC1EjRKSt8valarrayIjES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC2EjRKSt8valarrayIjES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEj@GLIBCXX_3.4.7 4.1.1
+ _ZNSt6locale5_ImplC1EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1ERKS0_j@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2EPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2ERKS0_j@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2EP15__locale_structPKcj@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EP15__locale_structj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEj@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC1ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC2ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayIjEixEj@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_3.4 4.1.1
+ _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__verify_groupingPKcjRKSs@GLIBCXX_3.4.10 4.3
+ _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _Znaj@GLIBCXX_3.4 4.1.1
+ _ZnajRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _Znwj@GLIBCXX_3.4 4.1.1
+ _ZnwjRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC1EP15__pthread_mutex@GLIBCXX_3.4 4.3.0
+ _ZNSt12__basic_fileIcEC2EP15__pthread_mutex@GLIBCXX_3.4 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.64bit
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.64bit
@@ -0,0 +1,614 @@
+#include "libstdc++6.symbols.common"
+#include "libstdc++6.symbols.64bit.cxx11"
+ _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1
+ _ZNK10__cxxabiv117__class_type_info12__do_dyncastElNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcElPKvPKS0_S2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt19__codecvt_utf8_baseIDiE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE9do_lengthER11__mbstate_tPKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEclRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwlRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8__detail20_Prime_rehash_policy11_M_next_bktEm@GLIBCXX_3.4.18 4.8
+ _ZNKSt8__detail20_Prime_rehash_policy14_M_need_rehashEmmm@GLIBCXX_3.4.18 4.8
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5
+ _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.6.0
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_mw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPclc@GLIBCXX_3.4 4.1.1
+ _ZNSi4readEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgElSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEl@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEl@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6ignoreEli@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPclc@GLIBCXX_3.4 4.1.1
+ _ZNSi8readsomeEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpElSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSo5writeEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSo8_M_writeEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSs10_S_compareEmm@GLIBCXX_3.4.16 4.6.0
+ _ZNSs12_S_constructEmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs14_M_replace_auxEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs15_M_replace_safeEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs18_S_construct_aux_2EmcRKSaIcE@GLIBCXX_3.4.14 4.5
+ _ZNSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs4_Rep8_M_cloneERKSaIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep9_S_createEmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_mc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4.5 4.1.1
+ _ZNSs9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11this_thread11__sleep_forENSt6chrono8durationIlSt5ratioILl1ELl1EEEENS1_IlS2_ILl1ELl1000000000EEEE@GLIBCXX_3.4.18 4.8
+ _ZNSt11__timepunctIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsgetnEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsputnEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE7seekoffElSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8xsputn_2EPKclS2_l@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt12ctype_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt12strstreambuf6setbufEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_allocEm@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_setupEPcS0_l@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKal@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKhl@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPalS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPclS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPhlS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1El@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKal@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKhl@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPalS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPclS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPhlS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2El@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekElSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekElSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwlw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgElSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEl@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreElj@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwlw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpElSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwl@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt14collate_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ (arch=!alpha !powerpc !ppc64 !ppc64el !s390 !s390x)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEl@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEl@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPcl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS4_l@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEl@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEl@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwl@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS4_l@GLIBCXX_3.4.16 4.6.0
+ _ZNSt15messages_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15messages_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15numpunct_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC2ERKSsm@GLIBCXX_3.4.21 5
+
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt16__numpunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIcLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC1ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt17moneypunct_bynameIwLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC2ERKSsm@GLIBCXX_3.4.21 5
+ _ZNSt18__moneypunct_cacheIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ (arch=!kfreebsd-amd64)_ZNSt28__atomic_futex_unsigned_base19_M_futex_wait_untilEPjjbNSt6chrono8durationIlSt5ratioILl1ELl1EEEENS2_IlS3_ILl1ELl1000000000EEEE@GLIBCXX_3.4.21 5
+ _ZNSt5ctypeIcEC1EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC1EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC2EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEm@GLIBCXX_3.4.7 4.1.1
+ _ZNSt6locale5_ImplC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2Em@GLIBCXX_3.4 4.1.1
+
+ _ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZSt11_Hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt15_Fnv_hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@GLIBCXX_3.4.9 4.2.1
+ _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_l@GLIBCXX_3.4.9 4.2.1
+ _ZSt17__copy_streambufsIcSt11char_traitsIcEElPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.8 4.1.1
+ _ZSt17__copy_streambufsIwSt11char_traitsIwEElPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.8 4.1.1
+ _ZSt17__verify_groupingPKcmRKSs@GLIBCXX_3.4.10 4.3
+ _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEElPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEElPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZTIPKn@CXXABI_1.3.5 4.6
+ _ZTIPKo@CXXABI_1.3.5 4.6
+ _ZTIPn@CXXABI_1.3.5 4.6
+ _ZTIPo@CXXABI_1.3.5 4.6
+ _ZTIn@CXXABI_1.3.5 4.6
+ _ZTIo@CXXABI_1.3.5 4.6
+ _ZTSPKn@CXXABI_1.3.9 5
+ _ZTSPKo@CXXABI_1.3.9 5
+ _ZTSPn@CXXABI_1.3.9 5
+ _ZTSPo@CXXABI_1.3.9 5
+ _ZTSn@CXXABI_1.3.9 5
+ _ZTSo@CXXABI_1.3.9 5
+ _ZThn16_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn16_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n24_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZdaPvm@CXXABI_1.3.9 5
+ _ZdlPvm@CXXABI_1.3.9 5
+ _Znam@GLIBCXX_3.4 4.1.1
+ _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _Znwm@GLIBCXX_3.4 4.1.1
+ _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.64bit.cxx11
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.64bit.cxx11
@@ -0,0 +1,329 @@
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12find_last_ofEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13find_first_ofEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16find_last_not_ofEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE17find_first_not_ofEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE2atEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4copyEPcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4findEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEPKcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5rfindEcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6substrEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEmmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_checkEmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_limitEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindERKS4_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEmmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEmmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES4_S4_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES4_S4_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES4_S4_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES4_S4_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES4_S4_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES4_S4_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIcEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIcEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIwEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12ctype_bynameIwEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIcc11__mbstate_tEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIcc11__mbstate_tEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIwc11__mbstate_tEC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14codecvt_bynameIwc11__mbstate_tEC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1ERKNSt7__cxx1112basic_stringIcS2_SaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2ERKNSt7__cxx1112basic_stringIcS2_SaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_destroyEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_S_compareEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_capacityEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_set_lengthEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE14_M_replace_auxEmmmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE18_M_construct_aux_2Emc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE2atEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPKcS4_EEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPcS4_EEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEmmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_moveEPcPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S8_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_mc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_PKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_mc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEmmmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7reserveEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8_M_eraseEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_appendEPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_lengthEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_mutateEmmPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_S_assignEPcmc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EPKcmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_mmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EmcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EPKcmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_mmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EmcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEixEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_destroyEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_replaceEmmPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_capacityEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_M_set_lengthEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE18_M_construct_aux_2Emw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPKwS4_EEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS4_EEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_S_copyEPwPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_S_moveEPwPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_S8_m@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_mw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_PKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_mw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEmmRKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEmmRKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8_M_eraseEmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_appendEPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_createERmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_lengthEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_mutateEmmPKwm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_S_assignEPwmw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EPKwmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_mmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EmwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EPKwmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_mm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_mmRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EmwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPcl@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS5_l@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwl@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwmm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS5_l@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1ERKNS_12basic_stringIcS3_SaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2ERKNS_12basic_stringIcS3_SaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1ERKNS_12basic_stringIcS2_IcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2ERKNS_12basic_stringIcS2_IcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC1EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC1ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC2EPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EEC2ERKNS_12basic_stringIcSt11char_traitsIcESaIcEEEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC1EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC2EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC1EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC2EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC1EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC2EP15__locale_structPKcm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2EP15__locale_structm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt17__verify_groupingPKcmRKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn16_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn16_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn16_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZThn16_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTv0_n24_NSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.alpha
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.alpha
@@ -0,0 +1,56 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.8
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.amd64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.amd64
@@ -0,0 +1,16 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvmmS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvmS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvmmS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvmS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.arm
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.arm
@@ -0,0 +1,6 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+ __gxx_personality_sj0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.arm64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.arm64
@@ -0,0 +1,10 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.armel
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.armel
@@ -0,0 +1,13 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+ CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0
+ _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0
+ _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ __cxa_begin_cleanup@CXXABI_1.3 4.3.0
+ __cxa_end_cleanup@CXXABI_1.3 4.3.0
+ __cxa_type_match@CXXABI_1.3 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.armhf
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.armhf
@@ -0,0 +1,13 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+ CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0
+ _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0
+ _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ __cxa_begin_cleanup@CXXABI_1.3 4.3.0
+ __cxa_end_cleanup@CXXABI_1.3 4.3.0
+ __cxa_type_match@CXXABI_1.3 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.common
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.common
@@ -0,0 +1,3382 @@
+ CXXABI_1.3.1@CXXABI_1.3.1 4.1.1
+ CXXABI_1.3.2@CXXABI_1.3.2 4.3
+ CXXABI_1.3.3@CXXABI_1.3.3 4.4.0
+ CXXABI_1.3.4@CXXABI_1.3.4 4.5
+ CXXABI_1.3.5@CXXABI_1.3.5 4.6
+ CXXABI_1.3.6@CXXABI_1.3.6 4.7
+ CXXABI_1.3.7@CXXABI_1.3.7 4.8
+ CXXABI_1.3.8@CXXABI_1.3.8 4.9
+ CXXABI_1.3.9@CXXABI_1.3.9 5
+ CXXABI_1.3@CXXABI_1.3 4.1.1
+ CXXABI_TM_1@CXXABI_TM_1 4.7
+ GLIBCXX_3.4.10@GLIBCXX_3.4.10 4.3
+ GLIBCXX_3.4.11@GLIBCXX_3.4.11 4.4.0
+ GLIBCXX_3.4.12@GLIBCXX_3.4.12 4.4.0
+ GLIBCXX_3.4.13@GLIBCXX_3.4.13 4.4.2
+ GLIBCXX_3.4.14@GLIBCXX_3.4.14 4.5
+ GLIBCXX_3.4.15@GLIBCXX_3.4.15 4.6
+ GLIBCXX_3.4.16@GLIBCXX_3.4.16 4.6.0
+ GLIBCXX_3.4.17@GLIBCXX_3.4.17 4.7
+ GLIBCXX_3.4.18@GLIBCXX_3.4.18 4.8
+ GLIBCXX_3.4.19@GLIBCXX_3.4.19 4.8
+ GLIBCXX_3.4.1@GLIBCXX_3.4.1 4.1.1
+ GLIBCXX_3.4.20@GLIBCXX_3.4.20 4.9
+ GLIBCXX_3.4.21@GLIBCXX_3.4.21 5
+ GLIBCXX_3.4.2@GLIBCXX_3.4.2 4.1.1
+ GLIBCXX_3.4.3@GLIBCXX_3.4.3 4.1.1
+ GLIBCXX_3.4.4@GLIBCXX_3.4.4 4.1.1
+ GLIBCXX_3.4.5@GLIBCXX_3.4.5 4.1.1
+ GLIBCXX_3.4.6@GLIBCXX_3.4.6 4.1.1
+ GLIBCXX_3.4.7@GLIBCXX_3.4.7 4.1.1
+ GLIBCXX_3.4.8@GLIBCXX_3.4.8 4.1.1
+ GLIBCXX_3.4.9@GLIBCXX_3.4.9 4.2.1
+ GLIBCXX_3.4@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.common.cxx11"
+(arch=amd64 i386 x32 kfreebsd-amd64 kfreebsd-i386)#include "libstdc++6.symbols.float128"
+(arch=!armel)#include "libstdc++6.symbols.not-armel"
+ (arch=!armel !hurd-i386 !kfreebsd-amd64 !kfreebsd-i386)_ZNSt28__atomic_futex_unsigned_base19_M_futex_notify_allEPj@GLIBCXX_3.4.21 5
+ _ZGVNSt10moneypunctIcLb0EE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt10moneypunctIcLb1EE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt10moneypunctIwLb0EE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt10moneypunctIwLb1EE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt11__timepunctIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt11__timepunctIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7collateIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7collateIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8messagesIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8messagesIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8numpunctIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8numpunctIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZGVNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZN10__cxxabiv116__enum_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv116__enum_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv116__enum_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__array_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__array_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__array_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__class_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__class_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__class_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__pbase_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__pbase_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv117__pbase_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv119__pointer_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv119__pointer_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv119__pointer_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__function_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__function_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__function_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__si_class_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__si_class_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv120__si_class_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv121__vmi_class_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv121__vmi_class_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv121__vmi_class_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv123__fundamental_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv123__fundamental_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv123__fundamental_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv129__pointer_to_member_type_infoD0Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv129__pointer_to_member_type_infoD1Ev@CXXABI_1.3 4.1.1
+ _ZN10__cxxabiv129__pointer_to_member_type_infoD2Ev@CXXABI_1.3 4.1.1
+ _ZN10__gnu_norm15_List_node_base4hookEPS0_@GLIBCXX_3.4 4.1.1
+ _ZN10__gnu_norm15_List_node_base4swapERS0_S1_@GLIBCXX_3.4 4.1.1
+ _ZN10__gnu_norm15_List_node_base6unhookEv@GLIBCXX_3.4 4.1.1
+ _ZN10__gnu_norm15_List_node_base7reverseEv@GLIBCXX_3.4 4.1.1
+ _ZN10__gnu_norm15_List_node_base8transferEPS0_S1_@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_iterator_base12_M_get_mutexEv@GLIBCXX_3.4.9 4.2.1
+ _ZN11__gnu_debug19_Safe_iterator_base16_M_attach_singleEPNS_19_Safe_sequence_baseEb@GLIBCXX_3.4.9 4.2.1
+ _ZN11__gnu_debug19_Safe_iterator_base16_M_detach_singleEv@GLIBCXX_3.4.9 4.2.1
+ _ZN11__gnu_debug19_Safe_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_iterator_base9_M_detachEv@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_sequence_base12_M_get_mutexEv@GLIBCXX_3.4.9 4.2.1
+ _ZN11__gnu_debug19_Safe_sequence_base13_M_detach_allEv@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@GLIBCXX_3.4 4.1.1
+ _ZN11__gnu_debug25_Safe_local_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@GLIBCXX_3.4.17 4.7
+ _ZN11__gnu_debug25_Safe_local_iterator_base9_M_detachEv@GLIBCXX_3.4.17 4.7
+ _ZN11__gnu_debug30_Safe_unordered_container_base13_M_detach_allEv@GLIBCXX_3.4.17 4.7
+ _ZN11__gnu_debug30_Safe_unordered_container_base7_M_swapERS0_@GLIBCXX_3.4.17 4.7
+ _ZN14__gnu_parallel9_Settings3getEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN14__gnu_parallel9_Settings3setERS0_@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx17__pool_alloc_base12_M_get_mutexEv@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE4fileEv@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE4syncEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE4syncEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE5uflowEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE5uflowEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE8overflowEi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE9pbackfailEi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE9underflowEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC1EP8_IO_FILE@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEC2EP8_IO_FILE@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE4fileEv@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE4syncEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE5uflowEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE8overflowEj@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE9pbackfailEj@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE9underflowEv@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC1EP8_IO_FILE@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEC2EP8_IO_FILE@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZN9__gnu_cxx27__verbose_terminate_handlerEv@CXXABI_1.3 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE10_M_destroyEv@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE13_M_initializeEv@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE10_M_destroyEv@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE13_M_initializeEPFvPvE@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE13_M_initializeEv@GLIBCXX_3.4.6 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_get_thread_idEv@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE21_M_destroy_thread_keyEPv@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list8_M_clearEv@GLIBCXX_3.4.4 4.1.1
+ _ZNK10__cxxabiv117__class_type_info10__do_catchEPKSt9type_infoPPvj@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PKvRNS0_15__upcast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info11__do_upcastEPKS0_PPv@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__pbase_type_info10__do_catchEPKSt9type_infoPPvj@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__pbase_type_info15__pointer_catchEPKS0_PPvj@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv119__pointer_type_info14__is_pointer_pEv@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv119__pointer_type_info15__pointer_catchEPKNS_17__pbase_type_infoEPPvj@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__function_type_info15__is_function_pEv@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info11__do_upcastEPKNS_17__class_type_infoEPKvRNS1_15__upcast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv129__pointer_to_member_type_info15__pointer_catchEPKNS_17__pbase_type_infoEPPvj@CXXABI_1.3 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter10_M_messageENS_13_Debug_msg_idE@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter10_Parameter14_M_print_fieldEPKS0_PKc@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter10_Parameter20_M_print_descriptionEPKS0_@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter13_M_print_wordEPKc@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter15_M_print_stringEPKc@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug16_Error_formatter17_M_get_max_lengthEv@GLIBCXX_3.4.10 4.3
+ _ZNK11__gnu_debug16_Error_formatter8_M_errorEv@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug19_Safe_iterator_base11_M_singularEv@GLIBCXX_3.4 4.1.1
+ _ZNK11__gnu_debug19_Safe_iterator_base14_M_can_compareERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE11_M_disjunctEPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE11_M_disjunctEPKw@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13get_allocatorEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE3endEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4_Rep12_M_is_leakedEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4_Rep12_M_is_sharedEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4backEv@GLIBCXX_3.4.15 4.6
+ _ZNKSbIwSt11char_traitsIwESaIwEE4cendEv@GLIBCXX_3.4.14 4.5
+ _ZNKSbIwSt11char_traitsIwESaIwEE4dataEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4rendEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5beginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5crendEv@GLIBCXX_3.4.14 4.5
+ _ZNKSbIwSt11char_traitsIwESaIwEE5c_strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5emptyEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5frontEv@GLIBCXX_3.4.15 4.6
+ _ZNKSbIwSt11char_traitsIwESaIwEE6_M_repEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6cbeginEv@GLIBCXX_3.4.14 4.5
+ _ZNKSbIwSt11char_traitsIwESaIwEE6lengthEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6rbeginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7_M_dataEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7_M_iendEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7crbeginEv@GLIBCXX_3.4.14 4.5
+ _ZNKSbIwSt11char_traitsIwESaIwEE8capacityEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8max_sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE9_M_ibeginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSi6gcountEv@GLIBCXX_3.4 4.1.1
+ _ZNKSi6sentrycvbEv@GLIBCXX_3.4 4.1.1
+ _ZNKSo6sentrycvbEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs11_M_disjunctEPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs11_M_disjunctEPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs13get_allocatorEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs3endEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs4_Rep12_M_is_leakedEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs4_Rep12_M_is_sharedEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs4backEv@GLIBCXX_3.4.15 4.6
+ _ZNKSs4cendEv@GLIBCXX_3.4.14 4.5
+ _ZNKSs4dataEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs4rendEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs5beginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs5c_strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs5crendEv@GLIBCXX_3.4.14 4.5
+ _ZNKSs5emptyEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs5frontEv@GLIBCXX_3.4.15 4.6
+ _ZNKSs6_M_repEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs6cbeginEv@GLIBCXX_3.4.14 4.5
+ _ZNKSs6lengthEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs6rbeginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs7_M_dataEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs7_M_iendEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareERKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7crbeginEv@GLIBCXX_3.4.14 4.5
+ _ZNKSs8capacityEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs8max_sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNKSs9_M_ibeginEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10bad_typeid4whatEv@GLIBCXX_3.4.9 4.2.1
+ _ZNKSt10error_code23default_error_conditionEv@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt10istrstream5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10lock_error4whatEv@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt10moneypunctIcLb0EE10neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE10pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE11curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE11frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13do_neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13do_pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE14do_curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE14do_frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE16do_negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE16do_positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb0EE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE10neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE10pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE11curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE11frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13do_neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13do_pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE14do_curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE14do_frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE16do_negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE16do_positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIcLb1EE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE10neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE10pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE11curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE11frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13do_neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13do_pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE14do_curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE14do_frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE16do_negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE16do_positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb0EE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE10neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE10pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE11curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE11frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13do_neg_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13do_pos_formatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE14do_curr_symbolEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE14do_frac_digitsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE16do_negative_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE16do_positive_signEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10moneypunctIwLb1EE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10ostrstream5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt10ostrstream6pcountEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE15_M_am_pm_formatEPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE15_M_date_formatsEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE15_M_time_formatsEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE19_M_days_abbreviatedEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE20_M_date_time_formatsEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE21_M_months_abbreviatedEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE7_M_daysEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE8_M_am_pmEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE9_M_monthsEPPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE15_M_am_pm_formatEPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE15_M_date_formatsEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE15_M_time_formatsEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE19_M_days_abbreviatedEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE20_M_date_time_formatsEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE21_M_months_abbreviatedEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE7_M_daysEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE8_M_am_pmEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE9_M_monthsEPPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt11logic_error4whatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt12__basic_fileIcE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt12bad_weak_ptr4whatEv@GLIBCXX_3.4.15 4.6
+ _ZNKSt12future_error4whatEv@GLIBCXX_3.4.14 4.5
+ _ZNKSt12strstreambuf6pcountEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13bad_exception4whatEv@GLIBCXX_3.4.9 4.2.1
+ _ZNKSt13basic_filebufIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_filebufIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_fstreamIcSt11char_traitsIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt13basic_fstreamIwSt11char_traitsIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt13basic_istreamIwSt11char_traitsIwEE6gcountEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_istreamIwSt11char_traitsIwEE6sentrycvbEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13basic_ostreamIwSt11char_traitsIwEE6sentrycvbEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt13runtime_error4whatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ifstreamIcSt11char_traitsIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt14basic_ifstreamIwSt11char_traitsIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt14basic_ofstreamIcSt11char_traitsIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt14basic_ofstreamIwSt11char_traitsIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4.5 4.1.1
+ _ZNKSt14error_category10equivalentERKSt10error_codei@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt14error_category10equivalentEiRKSt15error_condition@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt14error_category23default_error_conditionEi@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE4gptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE4pptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE5ebackEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE5egptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE5epptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE5pbaseEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIcSt11char_traitsIcEE6getlocEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE4gptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE4pptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE5ebackEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE5egptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE5epptrEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE5pbaseEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_streambufIwSt11char_traitsIwEE6getlocEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt16bad_array_length4whatEv@CXXABI_1.3.8 4.9
+ _ZNKSt17bad_function_call4whatEv@GLIBCXX_3.4.18 4.8
+ _ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt18basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt18basic_stringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19__codecvt_utf8_baseIDiE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDiE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDiE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDiE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDiE5do_inER11__mbstate_tPKcS4_RS4_PDiS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDiE6do_outER11__mbstate_tPKDiS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE5do_inER11__mbstate_tPKcS4_RS4_PDsS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIDsE6do_outER11__mbstate_tPKDsS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE5do_inER11__mbstate_tPKcS4_RS4_PwS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19__codecvt_utf8_baseIwE6do_outER11__mbstate_tPKwS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt19basic_istringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_istringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_istringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_istringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt20__codecvt_utf16_baseIDiE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE5do_inER11__mbstate_tPKcS4_RS4_PDiS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDiE6do_outER11__mbstate_tPKDiS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE5do_inER11__mbstate_tPKcS4_RS4_PDsS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIDsE6do_outER11__mbstate_tPKDsS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE5do_inER11__mbstate_tPKcS4_RS4_PwS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20__codecvt_utf16_baseIwE6do_outER11__mbstate_tPKwS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt20bad_array_new_length4whatEv@CXXABI_1.3.8 4.9
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE5do_inER11__mbstate_tPKcS4_RS4_PDiS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDiE6do_outER11__mbstate_tPKDiS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE5do_inER11__mbstate_tPKcS4_RS4_PDsS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIDsE6do_outER11__mbstate_tPKDsS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE10do_unshiftER11__mbstate_tPcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE5do_inER11__mbstate_tPKcS4_RS4_PwS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt25__codecvt_utf8_utf16_baseIwE6do_outER11__mbstate_tPKwS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt3_V214error_category10_M_messageEi@GLIBCXX_3.4.21 5
+ _ZNKSt3_V214error_category10equivalentERKSt10error_codei@GLIBCXX_3.4.21 5
+ _ZNKSt3_V214error_category10equivalentEiRKSt15error_condition@GLIBCXX_3.4.21 5
+ _ZNKSt3_V214error_category23default_error_conditionEi@GLIBCXX_3.4.21 5
+ _ZNKSt3tr14hashIRKSbIwSt11char_traitsIwESaIwEEEclES6_@GLIBCXX_3.4.10 4.3
+ _ZNKSt3tr14hashIRKSsEclES2_@GLIBCXX_3.4.10 4.3
+ _ZNKSt3tr14hashISbIwSt11char_traitsIwESaIwEEEclES4_@GLIBCXX_3.4.10 4.3
+ _ZNKSt3tr14hashISsEclESs@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIRKSbIwSt11char_traitsIwESaIwEEEclES5_@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIRKSsEclES1_@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashISbIwSt11char_traitsIwESaIwEEEclES3_@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashISsEclESs@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashISt10error_codeEclES0_@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt5ctypeIcE10do_tolowerEPcPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE10do_tolowerEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE10do_toupperEPcPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE10do_toupperEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE13_M_widen_initEv@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt5ctypeIcE14_M_narrow_initEv@GLIBCXX_3.4.11 4.4.0
+ _ZNKSt5ctypeIcE8do_widenEPKcS2_Pc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE8do_widenEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE9do_narrowEPKcS2_cPc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIcE9do_narrowEcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE10do_scan_isEtPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE10do_tolowerEPwPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE10do_tolowerEw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE10do_toupperEPwPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE10do_toupperEw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE11do_scan_notEtPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE19_M_convert_to_wmaskEt@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE5do_isEPKwS2_Pt@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE5do_isEtw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE8do_widenEPKcS2_Pw@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE8do_widenEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE9do_narrowEPKwS2_cPc@GLIBCXX_3.4 4.1.1
+ _ZNKSt5ctypeIwE9do_narrowEwc@GLIBCXX_3.4 4.1.1
+ _ZNKSt6locale2id5_M_idEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt6locale4nameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt6localeeqERKS_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIDic11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE5do_inERS0_PKcS4_RS4_PDiS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDic11__mbstate_tE6do_outERS0_PKDiS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE11do_encodingEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE13do_max_lengthEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE16do_always_noconvEv@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE5do_inERS0_PKcS4_RS4_PDsS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIDsc11__mbstate_tE6do_outERS0_PKDsS4_RS4_PcS6_RS6_@GLIBCXX_3.4.21 5
+ _ZNKSt7codecvtIcc11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE11do_encodingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE13do_max_lengthEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE16do_always_noconvEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE5do_inERS0_PKcS4_RS4_PcS6_RS6_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIcc11__mbstate_tE6do_outERS0_PKcS4_RS4_PcS6_RS6_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE10do_unshiftERS0_PcS3_RS3_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE11do_encodingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE13do_max_lengthEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE16do_always_noconvEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE5do_inERS0_PKcS4_RS4_PwS6_RS6_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE6do_outERS0_PKwS4_RS4_PcS6_RS6_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE10_M_compareEPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE10do_compareEPKcS2_S2_S2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12do_transformEPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE4hashEPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE7compareEPKcS2_S2_S2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE7do_hashEPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE9transformEPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE10_M_compareEPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE10do_compareEPKwS2_S2_S2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12do_transformEPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE4hashEPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE7compareEPKwS2_S2_S2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE7do_hashEPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE9transformEPKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIjEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIlEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intImEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intItEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIxEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIyEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIlEES3_S3_RSt8ios_basecT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intImEES3_S3_RSt8ios_basecT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIxEES3_S3_RSt8ios_basecT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIyEES3_S3_RSt8ios_basecT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES3_S3_RSt8ios_baseccT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIeEES3_S3_RSt8ios_baseccT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPKv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basece@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecPKv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basece@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES3_S3_RSt8ios_basewT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intImEES3_S3_RSt8ios_basewT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIxEES3_S3_RSt8ios_basewT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIyEES3_S3_RSt8ios_basewT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIdEES3_S3_RSt8ios_basewcT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIeEES3_S3_RSt8ios_basewcT_@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPKv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewy@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewPKv@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewb@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewd@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewe@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewl@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewx@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewy@GLIBCXX_3.4 4.1.1
+ _ZNKSt8bad_cast4whatEv@GLIBCXX_3.4.9 4.2.1
+ _ZNKSt8ios_base7failure4whatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE18_M_convert_to_charERKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE20_M_convert_from_charEPc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE3getEiiiRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE4openERKSsRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE4openERKSsRKSt6localePKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE5closeEi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE6do_getEiiiRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE7do_openERKSsRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIcE8do_closeEi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE18_M_convert_to_charERKSbIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE20_M_convert_from_charEPc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE3getEiiiRKSbIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE4openERKSsRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE4openERKSsRKSt6localePKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE5closeEi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE6do_getEiiiRKSbIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE7do_openERKSsRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNKSt8messagesIwE8do_closeEi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE11do_truenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE12do_falsenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE8truenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIcE9falsenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE11do_groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE11do_truenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE12do_falsenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE13decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE13thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE16do_decimal_pointEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE16do_thousands_sepEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE8groupingEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE8truenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8numpunctIwE9falsenameEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10date_orderEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13do_date_orderEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14do_get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKcSC_@GLIBCXX_3.4.21 5
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10date_orderEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13do_date_orderEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14do_get_weekdayES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16do_get_monthnameES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmPKwSC_@GLIBCXX_3.4.21 5
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_dateES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_timeES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_yearES3_S3_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPK2tmPKcSB_@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_RSt8ios_basecPK2tmcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_RSt8ios_basecPK2tmcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPK2tmPKwSB_@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_RSt8ios_basewPK2tmcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_RSt8ios_basewPK2tmcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt9bad_alloc4whatEv@GLIBCXX_3.4.9 4.2.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE10exceptionsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE3badEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE3eofEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE3tieEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE4failEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE4fillEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE4goodEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE6narrowEcc@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEE7rdstateEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEEcvPvEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIcSt11char_traitsIcEEcvbEv@GLIBCXX_3.4.21 5
+ _ZNKSt9basic_iosIcSt11char_traitsIcEEntEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE10exceptionsEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE3badEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE3eofEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE3tieEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE4failEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE4fillEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE4goodEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE5widenEc@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE6narrowEwc@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEE7rdstateEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEEcvPvEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9basic_iosIwSt11char_traitsIwEEcvbEv@GLIBCXX_3.4.21 5
+ _ZNKSt9basic_iosIwSt11char_traitsIwEEntEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9exception4whatEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES3_S3_S3_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES3_S3_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_bRSt8ios_basecRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES3_bRSt8ios_basece@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_bRSt8ios_basecRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES3_bRSt8ios_basece@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES3_S3_RSt8ios_basecRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES3_S3_RSt8ios_basecRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_bRSt8ios_basewRKSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES3_bRSt8ios_basewe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_bRSt8ios_basewRKSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES3_bRSt8ios_basewe@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES3_S3_RSt8ios_basewRKSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES3_S3_RSt8ios_basewRKSbIwS2_SaIwEE@GLIBCXX_3.4 4.1.1
+ _ZNKSt9strstream5rdbufEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9strstream6pcountEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9type_info10__do_catchEPKS_PPvj@GLIBCXX_3.4 4.1.1
+ _ZNKSt9type_info11__do_upcastEPKN10__cxxabiv117__class_type_infoEPPv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9type_info14__is_pointer_pEv@GLIBCXX_3.4 4.1.1
+ _ZNKSt9type_info15__is_function_pEv@GLIBCXX_3.4 4.1.1
+ _ZNSaIcEC1ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSaIcEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIcEC2ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSaIcEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIwEC1ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSaIwEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIwEC2ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSaIwEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSaIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_M_leak_hardEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIN9__gnu_cxx17__normal_iteratorIPwS2_EEEES6_T_S8_RKS1_St20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIPKwEEPwT_S7_RKS1_St20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructIPwEES4_T_S5_RKS1_St20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_empty_repEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIPKwS2_EES8_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIS3_S2_EES6_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwPKwS5_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwS3_S3_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE13shrink_to_fitEv@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE3endEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_destroyERKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_disposeERKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_refcopyEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep10_M_refdataEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep11_S_max_sizeE@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep11_S_terminalE@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep12_S_empty_repEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep13_M_set_leakedEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep15_M_set_sharableEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep20_S_empty_rep_storageE@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep7_M_grabERKS1_S5_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4backEv@GLIBCXX_3.4.15 4.6
+ _ZNSbIwSt11char_traitsIwESaIwEE4nposE@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4rendEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4swapERS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5beginEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5clearEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS2_EE@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5frontEv@GLIBCXX_3.4.15 4.6
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendESt16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEOS2_@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignESt16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EESt16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6rbeginEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_dataEPw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_leakEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_NS4_IPKwS2_EES9_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwS8_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_RKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S5_S5_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_S6_S6_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_St16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEE8pop_backEv@GLIBCXX_3.4.17 4.7
+ _ZNSbIwSt11char_traitsIwESaIwEE9push_backEw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EOS2_@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1IN9__gnu_cxx17__normal_iteratorIPwS2_EEEET_S8_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1IPKwEET_S6_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1IPwEET_S5_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EOS2_@GLIBCXX_3.4.15 4.6
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ESt16initializer_listIwERKS1_@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ESt16initializer_listIwERKS1_@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2IN9__gnu_cxx17__normal_iteratorIPwS2_EEEET_S8_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2IPKwEET_S6_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2IPwEET_S5_RKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEaSEOS2_@GLIBCXX_3.4.14 4.5
+ _ZNSbIwSt11char_traitsIwESaIwEEaSEPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEaSERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEaSESt16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEEaSEw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEpLEPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEpLERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEpLESt16initializer_listIwE@GLIBCXX_3.4.11 4.4.0
+ _ZNSbIwSt11char_traitsIwESaIwEEpLEw@GLIBCXX_3.4 4.1.1
+ _ZNSd4swapERSd@GLIBCXX_3.4.21 5
+ _ZNSdC1EOSd@GLIBCXX_3.4.21 5
+ _ZNSdC1EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSdC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSdC2EOSd@GLIBCXX_3.4.21 5
+ _ZNSdC2EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSdC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSdD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSdaSEOSd@GLIBCXX_3.4.21 5
+ _ZNSi10_M_extractIPvEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIbEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIdEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIeEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIfEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIjEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIlEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractImEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractItEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIxEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi10_M_extractIyEERSiRT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSi3getERSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSi3getERSt15basic_streambufIcSt11char_traitsIcEEc@GLIBCXX_3.4 4.1.1
+ _ZNSi3getERc@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEv@GLIBCXX_3.4 4.1.1
+ _ZNSi4peekEv@GLIBCXX_3.4 4.1.1
+ _ZNSi4swapERSi@GLIBCXX_3.4.21 5
+ _ZNSi4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgESt4fposI11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZNSi5tellgEv@GLIBCXX_3.4 4.1.1
+ _ZNSi5ungetEv@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEv@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEv@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6sentryC1ERSib@GLIBCXX_3.4 4.1.1
+ _ZNSi6sentryC2ERSib@GLIBCXX_3.4 4.1.1
+ _ZNSi7putbackEc@GLIBCXX_3.4 4.1.1
+ _ZNSiC1EOSi@GLIBCXX_3.4.21 5
+ _ZNSiC1EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSiC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSiC2EOSi@GLIBCXX_3.4.21 5
+ _ZNSiC2EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSiC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSiD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSiaSEOSi@GLIBCXX_3.4.21 5
+ _ZNSirsEPFRSiS_E@GLIBCXX_3.4 4.1.1
+ _ZNSirsEPFRSt8ios_baseS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSirsEPFRSt9basic_iosIcSt11char_traitsIcEES3_E@GLIBCXX_3.4 4.1.1
+ _ZNSirsEPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSirsERPv@GLIBCXX_3.4 4.1.1
+ _ZNSirsERb@GLIBCXX_3.4 4.1.1
+ _ZNSirsERd@GLIBCXX_3.4 4.1.1
+ _ZNSirsERe@GLIBCXX_3.4 4.1.1
+ _ZNSirsERf@GLIBCXX_3.4 4.1.1
+ _ZNSirsERi@GLIBCXX_3.4 4.1.1
+ _ZNSirsERj@GLIBCXX_3.4 4.1.1
+ _ZNSirsERl@GLIBCXX_3.4 4.1.1
+ _ZNSirsERm@GLIBCXX_3.4 4.1.1
+ _ZNSirsERs@GLIBCXX_3.4 4.1.1
+ _ZNSirsERt@GLIBCXX_3.4 4.1.1
+ _ZNSirsERx@GLIBCXX_3.4 4.1.1
+ _ZNSirsERy@GLIBCXX_3.4 4.1.1
+ _ZNSo3putEc@GLIBCXX_3.4 4.1.1
+ _ZNSo4swapERSo@GLIBCXX_3.4.21 5
+ _ZNSo5flushEv@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpESt4fposI11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZNSo5tellpEv@GLIBCXX_3.4 4.1.1
+ _ZNSo6sentryC1ERSo@GLIBCXX_3.4 4.1.1
+ _ZNSo6sentryC2ERSo@GLIBCXX_3.4 4.1.1
+ _ZNSo6sentryD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSo6sentryD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSo9_M_insertIPKvEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIbEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIdEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIeEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIlEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertImEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIxEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSo9_M_insertIyEERSoT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSoC1EOSo@GLIBCXX_3.4.21 5
+ _ZNSoC1EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSoC1ERSd@GLIBCXX_3.4.21 5
+ _ZNSoC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSoC2EOSo@GLIBCXX_3.4.21 5
+ _ZNSoC2EPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSoC2ERSd@GLIBCXX_3.4.21 5
+ _ZNSoC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSoD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSoaSEOSo@GLIBCXX_3.4.21 5
+ _ZNSolsEPFRSoS_E@GLIBCXX_3.4 4.1.1
+ _ZNSolsEPFRSt8ios_baseS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSolsEPFRSt9basic_iosIcSt11char_traitsIcEES3_E@GLIBCXX_3.4 4.1.1
+ _ZNSolsEPKv@GLIBCXX_3.4 4.1.1
+ _ZNSolsEPSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZNSolsEb@GLIBCXX_3.4 4.1.1
+ _ZNSolsEd@GLIBCXX_3.4 4.1.1
+ _ZNSolsEe@GLIBCXX_3.4 4.1.1
+ _ZNSolsEf@GLIBCXX_3.4 4.1.1
+ _ZNSolsEi@GLIBCXX_3.4 4.1.1
+ _ZNSolsEj@GLIBCXX_3.4 4.1.1
+ _ZNSolsEl@GLIBCXX_3.4 4.1.1
+ _ZNSolsEm@GLIBCXX_3.4 4.1.1
+ _ZNSolsEs@GLIBCXX_3.4 4.1.1
+ _ZNSolsEt@GLIBCXX_3.4 4.1.1
+ _ZNSolsEx@GLIBCXX_3.4 4.1.1
+ _ZNSolsEy@GLIBCXX_3.4 4.1.1
+ _ZNSs12_Alloc_hiderC1EPcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs12_Alloc_hiderC2EPcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs12_M_leak_hardEv@GLIBCXX_3.4 4.1.1
+ _ZNSs12_S_constructIN9__gnu_cxx17__normal_iteratorIPcSsEEEES2_T_S4_RKSaIcESt20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSs12_S_constructIPKcEEPcT_S3_RKSaIcESt20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSs12_S_constructIPcEES0_T_S1_RKSaIcESt20forward_iterator_tag@GLIBCXX_3.4.14 4.5
+ _ZNSs12_S_empty_repEv@GLIBCXX_3.4 4.1.1
+ _ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIPKcSsEES4_@GLIBCXX_3.4 4.1.1
+ _ZNSs13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIS_SsEES2_@GLIBCXX_3.4 4.1.1
+ _ZNSs13_S_copy_charsEPcPKcS1_@GLIBCXX_3.4 4.1.1
+ _ZNSs13_S_copy_charsEPcS_S_@GLIBCXX_3.4 4.1.1
+ _ZNSs13shrink_to_fitEv@GLIBCXX_3.4.14 4.5
+ _ZNSs3endEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep10_M_destroyERKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep10_M_disposeERKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep10_M_refcopyEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep10_M_refdataEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep11_S_max_sizeE@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep11_S_terminalE@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep12_S_empty_repEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep13_M_set_leakedEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep15_M_set_sharableEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep20_S_empty_rep_storageE@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep7_M_grabERKSaIcES2_@GLIBCXX_3.4 4.1.1
+ _ZNSs4backEv@GLIBCXX_3.4.15 4.6
+ _ZNSs4nposE@GLIBCXX_3.4 4.1.1
+ _ZNSs4rendEv@GLIBCXX_3.4 4.1.1
+ _ZNSs4swapERSs@GLIBCXX_3.4 4.1.1
+ _ZNSs5beginEv@GLIBCXX_3.4 4.1.1
+ _ZNSs5clearEv@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEN9__gnu_cxx17__normal_iteratorIPcSsEES2_@GLIBCXX_3.4 4.1.1
+ _ZNSs5frontEv@GLIBCXX_3.4.15 4.6
+ _ZNSs6appendEPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendESt16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSs6assignEOSs@GLIBCXX_3.4.14 4.5
+ _ZNSs6assignEPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignESt16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEESt16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEc@GLIBCXX_3.4 4.1.1
+ _ZNSs6rbeginEv@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_dataEPc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_leakEv@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_NS0_IPKcSsEES5_@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcS4_@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_RKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S1_S1_@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_S2_S2_@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_St16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSs8pop_backEv@GLIBCXX_3.4.17 4.7
+ _ZNSs9push_backEc@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EOSs@GLIBCXX_3.4.14 4.5
+ _ZNSsC1EPKcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ESt16initializer_listIcERKSaIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSsC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSsC1IN9__gnu_cxx17__normal_iteratorIPcSsEEEET_S4_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1IPKcEET_S2_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1IPcEET_S1_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EOSs@GLIBCXX_3.4.15 4.6
+ _ZNSsC2EPKcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ESt16initializer_listIcERKSaIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSsC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSsC2IN9__gnu_cxx17__normal_iteratorIPcSsEEEET_S4_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2IPKcEET_S2_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2IPcEET_S1_RKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSsD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSsaSEOSs@GLIBCXX_3.4.14 4.5
+ _ZNSsaSEPKc@GLIBCXX_3.4 4.1.1
+ _ZNSsaSERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSsaSESt16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSsaSEc@GLIBCXX_3.4 4.1.1
+ _ZNSspLEPKc@GLIBCXX_3.4 4.1.1
+ _ZNSspLERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSspLESt16initializer_listIcE@GLIBCXX_3.4.11 4.4.0
+ _ZNSspLEc@GLIBCXX_3.4 4.1.1
+ _ZNSt10_Sp_lockerC1EPKv@GLIBCXX_3.4.21 5
+ _ZNSt10_Sp_lockerC1EPKvS1_@GLIBCXX_3.4.21 5
+ _ZNSt10_Sp_lockerC2EPKv@GLIBCXX_3.4.21 5
+ _ZNSt10_Sp_lockerC2EPKvS1_@GLIBCXX_3.4.21 5
+ _ZNSt10_Sp_lockerD1Ev@GLIBCXX_3.4.21 5
+ _ZNSt10_Sp_lockerD2Ev@GLIBCXX_3.4.21 5
+ _ZNSt10__num_base11_S_atoms_inE@GLIBCXX_3.4 4.1.1
+ _ZNSt10__num_base12_S_atoms_outE@GLIBCXX_3.4 4.1.1
+ _ZNSt10__num_base15_S_format_floatERKSt8ios_basePcc@GLIBCXX_3.4 4.1.1
+ _ZNSt10bad_typeidD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10bad_typeidD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10bad_typeidD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5alnumE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5alphaE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5blankE@GLIBCXX_3.4.21 5
+ _ZNSt10ctype_base5cntrlE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5digitE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5graphE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5lowerE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5printE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5punctE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5spaceE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base5upperE@GLIBCXX_3.4 4.1.1
+ _ZNSt10ctype_base6xdigitE@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstream3strEv@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPc@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPc@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10money_base18_S_default_patternE@GLIBCXX_3.4 4.1.1
+ _ZNSt10money_base20_S_construct_patternEccc@GLIBCXX_3.4 4.1.1
+ _ZNSt10money_base8_S_atomsE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstream3strEv@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstream6freezeEb@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamC1EPciSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamC2EPciSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt10ostrstreamD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcE23_M_initialize_timepunctEP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwE23_M_initialize_timepunctEP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11char_traitsIcE2eqERKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt11char_traitsIcE2eqERKcS2_@GLIBCXX_3.4.5 4.1.1
+ _ZNSt11char_traitsIwE2eqERKwS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt11char_traitsIwE2eqERKwS2_@GLIBCXX_3.4.5 4.1.1
+ _ZNSt11logic_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt11logic_errorC1ERKS_@GLIBCXX_3.4.21 5
+ _ZNSt11logic_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt11logic_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt11logic_errorC2ERKS_@GLIBCXX_3.4.21 5
+ _ZNSt11logic_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt11logic_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11logic_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11logic_errorD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11logic_erroraSERKS_@GLIBCXX_3.4.21 5
+ _ZNSt11range_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt11range_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt11range_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt11range_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt11range_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11range_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt11range_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt11regex_errorC1ENSt15regex_constants10error_typeE@GLIBCXX_3.4.20 4.9
+ _ZNSt11regex_errorC2ENSt15regex_constants10error_typeE@GLIBCXX_3.4.21 5
+ _ZNSt11regex_errorD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt11regex_errorD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt11regex_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12__basic_fileIcE2fdEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE4fileEv@GLIBCXX_3.4.1 4.1.1
+ _ZNSt12__basic_fileIcE4openEPKcSt13_Ios_Openmodei@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8sys_openEP8_IO_FILESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8sys_openEiSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE9showmanycEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12bad_weak_ptrD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12bad_weak_ptrD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12bad_weak_ptrD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12ctype_bynameIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12domain_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12domain_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12domain_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12domain_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12domain_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12domain_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12domain_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12future_errorD0Ev@GLIBCXX_3.4.14 4.5
+ _ZNSt12future_errorD1Ev@GLIBCXX_3.4.14 4.5
+ _ZNSt12future_errorD2Ev@GLIBCXX_3.4.14 4.5
+ _ZNSt12length_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12length_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12length_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12length_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12length_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12length_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12length_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12out_of_rangeC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12out_of_rangeC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12out_of_rangeC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt12out_of_rangeC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt12out_of_rangeD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12out_of_rangeD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12out_of_rangeD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_1E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_2E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_3E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_4E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_5E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_6E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_7E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_8E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders2_9E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_10E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_11E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_12E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_13E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_14E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_15E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_16E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_17E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_18E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_19E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_20E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_21E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_22E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_23E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_24E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_25E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_26E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_27E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_28E@GLIBCXX_3.4.15 4.6
+ _ZNSt12placeholders3_29E@GLIBCXX_3.4.15 4.6
+ _ZNSt12strstreambuf3strEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf6freezeEb@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7_M_freeEPc@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8overflowEi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf9pbackfailEi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt12system_errorD0Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt12system_errorD1Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt12system_errorD2Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt13bad_exceptionD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13bad_exceptionD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13bad_exceptionD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE14_M_get_ext_posER11__mbstate_t@GLIBCXX_3.4.15 4.6
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE15_M_create_pbackEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE16_M_destroy_pbackEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE19_M_terminate_outputEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE26_M_destroy_internal_bufferEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE27_M_allocate_internal_bufferEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE8overflowEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE9pbackfailEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE9showmanycEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE14_M_get_ext_posER11__mbstate_t@GLIBCXX_3.4.15 4.6
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE15_M_create_pbackEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE16_M_destroy_pbackEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE19_M_terminate_outputEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE26_M_destroy_internal_bufferEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE27_M_allocate_internal_bufferEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE8overflowEj@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE9pbackfailEj@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE9showmanycEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_filebufIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIcSt11char_traitsIcEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_fstreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIPvEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIbEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIdEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIeEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIfEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIjEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIlEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractImEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractItEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIxEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIyEERS2_RT_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getERSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getERSt15basic_streambufIwS1_Ew@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getERw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4peekEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgESt4fposI11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5tellgEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5ungetEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEv@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6sentryC1ERS2_b@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6sentryC2ERS2_b@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7putbackEw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRS2_S3_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRSt8ios_baseS4_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsEPFRSt9basic_iosIwS1_ES5_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsEPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERPv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERb@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERd@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERe@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERf@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERj@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERm@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERs@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERt@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERx@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERy@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE3putEw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5flushEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpESt4fposI11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5tellpEv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryC1ERS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryC2ERS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE6sentryD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIPKvEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIbEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIdEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIeEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIlEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertImEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIxEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIyEERS2_T_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC1ERSt14basic_iostreamIwS1_E@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC2ERSt14basic_iostreamIwS1_E@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRS2_S3_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRSt8ios_baseS4_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPFRSt9basic_iosIwS1_ES5_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPKv@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEb@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEd@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEe@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEf@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEj@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEl@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEm@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEs@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEt@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEx@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEy@GLIBCXX_3.4 4.1.1
+ _ZNSt13random_device14_M_init_pretr1ERKSs@GLIBCXX_3.4.18 4.8
+ _ZNSt13random_device16_M_getval_pretr1Ev@GLIBCXX_3.4.18 4.8
+ _ZNSt13random_device7_M_finiEv@GLIBCXX_3.4.18 4.8
+ _ZNSt13random_device7_M_initERKSs@GLIBCXX_3.4.18 4.8
+ _ZNSt13random_device9_M_getvalEv@GLIBCXX_3.4.18 4.8
+ _ZNSt13runtime_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt13runtime_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt13runtime_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13runtime_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt13runtime_errorD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openEPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEE5closeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEE7is_openEv@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2EPKcSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4.13 4.4.2
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14error_categoryC1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt14error_categoryC2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt14error_categoryD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt14error_categoryD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt14error_categoryD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt14numeric_limitsIDiE10has_denormE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE10is_boundedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE10is_integerE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE11round_styleE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE12has_infinityE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIDiE12max_exponentE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE12min_exponentE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE13has_quiet_NaNE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE14is_specializedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE14max_exponent10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE14min_exponent10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE15has_denorm_lossE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE15tinyness_beforeE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE17has_signaling_NaNE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE5radixE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE5trapsE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE6digitsE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE8digits10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE8is_exactE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE9is_iec559E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE9is_moduloE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDiE9is_signedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE10has_denormE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE10is_boundedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE10is_integerE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE11round_styleE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE12has_infinityE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIDsE12max_exponentE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE12min_exponentE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE13has_quiet_NaNE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE14is_specializedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE14max_exponent10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE14min_exponent10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE15has_denorm_lossE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE15tinyness_beforeE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE17has_signaling_NaNE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE5radixE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE5trapsE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE6digitsE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE8digits10E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE8is_exactE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE9is_iec559E@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE9is_moduloE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIDsE9is_signedE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt14numeric_limitsIaE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIaE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIaE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIbE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIbE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIcE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIcE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIdE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIdE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIeE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIfE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIfE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIhE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIhE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIiE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIiE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIjE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIjE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIlE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIlE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsImE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsImE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIsE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIsE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsItE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsItE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIwE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIwE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIxE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIxE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt14numeric_limitsIyE12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt14numeric_limitsIyE9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt14overflow_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt14overflow_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt14overflow_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt14overflow_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt14overflow_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14overflow_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt14overflow_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt15_List_node_base10_M_reverseEv@GLIBCXX_3.4.14 4.5
+ _ZNSt15_List_node_base11_M_transferEPS_S0_@GLIBCXX_3.4.14 4.5
+ _ZNSt15_List_node_base4hookEPS_@GLIBCXX_3.4 4.1.1
+ _ZNSt15_List_node_base4swapERS_S0_@GLIBCXX_3.4 4.1.1
+ _ZNSt15_List_node_base6unhookEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15_List_node_base7_M_hookEPS_@GLIBCXX_3.4.14 4.5
+ _ZNSt15_List_node_base7reverseEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15_List_node_base8transferEPS_S0_@GLIBCXX_3.4 4.1.1
+ _ZNSt15_List_node_base9_M_unhookEv@GLIBCXX_3.4.14 4.5
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE4setgEPcS3_S3_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE4setpEPcS3_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5gbumpEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5pbumpEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputcEc@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5uflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6snextcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6stosscEv@GLIBCXX_3.4.10 4.3
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7pubsyncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7sungetcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE8in_availEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE8overflowEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE8pubimbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pbackfailEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9showmanycEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9sputbackcEc@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEEC1ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEEC2ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEEaSERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE4setgEPwS3_S3_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE4setpEPwS3_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE4syncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5gbumpEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5pbumpEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputcEw@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5uflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6sbumpcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6snextcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6stosscEv@GLIBCXX_3.4.10 4.3
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7pubsyncEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7sungetcEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE8in_availEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE8overflowEj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE8pubimbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pbackfailEj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9showmanycEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9sputbackcEw@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEEC1ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEEC2ERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEEaSERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE15_M_update_egptrEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE17_M_stringbuf_initESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE3strERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8overflowEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9pbackfailEi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9showmanycEv@GLIBCXX_3.4.6 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE15_M_update_egptrEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE17_M_stringbuf_initESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8overflowEj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9pbackfailEj@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9showmanycEv@GLIBCXX_3.4.6 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9underflowEv@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15underflow_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt15underflow_errorC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt15underflow_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt15underflow_errorC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt15underflow_errorD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15underflow_errorD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt15underflow_errorD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt16__numpunct_cacheIcE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16bad_array_lengthD0Ev@CXXABI_1.3.8 4.9
+ _ZNSt16bad_array_lengthD1Ev@CXXABI_1.3.8 4.9
+ _ZNSt16bad_array_lengthD2Ev@CXXABI_1.3.8 4.9
+ _ZNSt16invalid_argumentC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt16invalid_argumentC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt16invalid_argumentC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt16invalid_argumentC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt16invalid_argumentD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16invalid_argumentD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt16invalid_argumentD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt17__timepunct_cacheIcE12_S_timezonesE@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwE12_S_timezonesE@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17bad_function_callD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt17bad_function_callD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt17bad_function_callD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt17moneypunct_bynameIcLb0EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EE4intlE@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EE8_M_cacheERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEE3strERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIcSt11char_traitsIcESaIcEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt18basic_stringstreamIwSt11char_traitsIwESaIwEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt18condition_variable10notify_allEv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variable10notify_oneEv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variable4waitERSt11unique_lockISt5mutexE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variableC1Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variableC2Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variableD1Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt18condition_variableD2Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt19__codecvt_utf8_baseIDiED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIDiED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIDiED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIDsED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIDsED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIDsED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIwED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIwED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt19__codecvt_utf8_baseIwED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEE3strERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIcSt11char_traitsIcESaIcEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_istringstreamIwSt11char_traitsIwESaIwEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE3strERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ERKSsSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIcSt11char_traitsIcESaIcEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE3strERKSbIwS1_S2_E@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ERKSbIwS1_S2_ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt19basic_ostringstreamIwSt11char_traitsIwESaIwEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv@GLIBCXX_3.4 4.1.1
+ _ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv@GLIBCXX_3.4.5 4.1.1
+ _ZNSt19istreambuf_iteratorIwSt11char_traitsIwEEppEv@GLIBCXX_3.4 4.1.1
+ _ZNSt19istreambuf_iteratorIwSt11char_traitsIwEEppEv@GLIBCXX_3.4.5 4.1.1
+ _ZNSt20__codecvt_utf16_baseIDiED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIDiED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIDiED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIDsED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIDsED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIDsED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIwED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIwED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt20__codecvt_utf16_baseIwED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt20bad_array_new_lengthD0Ev@CXXABI_1.3.8 4.9
+ _ZNSt20bad_array_new_lengthD1Ev@CXXABI_1.3.8 4.9
+ _ZNSt20bad_array_new_lengthD2Ev@CXXABI_1.3.8 4.9
+ _ZNSt21__numeric_limits_base10has_denormE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base10is_boundedE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base10is_integerE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base11round_styleE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base12has_infinityE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base12max_digits10E@GLIBCXX_3.4.14 4.5.0
+ _ZNSt21__numeric_limits_base12max_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base12min_exponentE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base13has_quiet_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base14is_specializedE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base14max_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base14min_exponent10E@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base15has_denorm_lossE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base15tinyness_beforeE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base17has_signaling_NaNE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base5radixE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base5trapsE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base6digitsE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base8digits10E@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base8is_exactE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base9is_iec559E@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base9is_moduloE@GLIBCXX_3.4 4.1.1
+ _ZNSt21__numeric_limits_base9is_signedE@GLIBCXX_3.4 4.1.1
+ _ZNSt22condition_variable_anyC1Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt22condition_variable_anyC2Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt22condition_variable_anyD1Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt22condition_variable_anyD2Ev@GLIBCXX_3.4.11 4.4.0
+ _ZNSt25__codecvt_utf8_utf16_baseIDiED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIDiED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIDiED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIDsED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIDsED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIDsED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIwED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIwED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt25__codecvt_utf8_utf16_baseIwED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt3_V214error_categoryD0Ev@GLIBCXX_3.4.21 5
+ _ZNSt3_V214error_categoryD1Ev@GLIBCXX_3.4.21 5
+ _ZNSt3_V214error_categoryD2Ev@GLIBCXX_3.4.21 5
+ _ZNSt3_V215system_categoryEv@GLIBCXX_3.4.21 5
+ _ZNSt3_V216generic_categoryEv@GLIBCXX_3.4.21 5
+ _ZNSt3tr18__detail12__prime_listE@GLIBCXX_3.4.10 4.3
+ _ZNSt5ctypeIcE10table_sizeE@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcE13classic_tableEv@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwE19_M_initialize_ctypeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6__norm15_List_node_base10_M_reverseEv@GLIBCXX_3.4.14 4.5
+ _ZNSt6__norm15_List_node_base11_M_transferEPS0_S1_@GLIBCXX_3.4.14 4.5
+ _ZNSt6__norm15_List_node_base4hookEPS0_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt6__norm15_List_node_base4swapERS0_S1_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt6__norm15_List_node_base6unhookEv@GLIBCXX_3.4.9 4.2.1
+ _ZNSt6__norm15_List_node_base7_M_hookEPS0_@GLIBCXX_3.4.14 4.5
+ _ZNSt6__norm15_List_node_base7reverseEv@GLIBCXX_3.4.9 4.2.1
+ _ZNSt6__norm15_List_node_base8transferEPS0_S1_@GLIBCXX_3.4.9 4.2.1
+ _ZNSt6__norm15_List_node_base9_M_unhookEv@GLIBCXX_3.4.14 4.5
+ _ZNSt6chrono3_V212steady_clock3nowEv@GLIBCXX_3.4.19 4.8.1
+ _ZNSt6chrono3_V212steady_clock9is_steadyE@GLIBCXX_3.4.19 4.8.1
+ _ZNSt6chrono3_V212system_clock3nowEv@GLIBCXX_3.4.19 4.8.1
+ _ZNSt6chrono3_V212system_clock9is_steadyE@GLIBCXX_3.4.19 4.8.1
+ _ZNSt6chrono12system_clock12is_monotonicE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt6chrono12system_clock3nowEv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt6locale11_M_coalesceERKS_S1_i@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale21_S_normalize_categoryEi@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale3allE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale4noneE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale4timeE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_facetEPKNS_2idEPKNS_5facetE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_replace_facetEPKS0_PKNS_2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl19_M_replace_categoryEPKS0_PKPKNS_2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl21_M_replace_categoriesEPKS0_i@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5ctypeE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facet13_S_get_c_nameEv@GLIBCXX_3.4.6 4.1.1
+ _ZNSt6locale5facet15_S_get_c_localeEv@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facet17_S_clone_c_localeERP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facet18_S_create_c_localeERP15__locale_structPKcS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facet19_S_destroy_c_localeERP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facetD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facetD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5facetD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale6globalERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale7classicEv@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale7collateE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale7numericE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale8messagesE@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale8monetaryE@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1EPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1EPNS_5_ImplE@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1ERKS_PKci@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1ERKS_S1_i@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2EPKc@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2EPNS_5_ImplE@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2ERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2ERKS_PKci@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2ERKS_S1_i@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt6localeaSERKS_@GLIBCXX_3.4 4.1.1
+ _ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEE@GLIBCXX_3.4.11 4.4.0
+ _ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEEPFvvE@GLIBCXX_3.4.21 5
+ _ZNSt6thread20hardware_concurrencyEv@GLIBCXX_3.4.17 4.7
+ _ZNSt6thread4joinEv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt6thread6detachEv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt7codecvtIDic11__mbstate_tE2idE@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDic11__mbstate_tED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDic11__mbstate_tED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDic11__mbstate_tED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDsc11__mbstate_tE2idE@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDsc11__mbstate_tED0Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDsc11__mbstate_tED1Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIDsc11__mbstate_tED2Ev@GLIBCXX_3.4.21 5
+ _ZNSt7codecvtIcc11__mbstate_tE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8__detail12__prime_listE@GLIBCXX_3.4.10 4.3
+ _ZNSt8__detail15_List_node_base10_M_reverseEv@GLIBCXX_3.4.15 4.6
+ _ZNSt8__detail15_List_node_base11_M_transferEPS0_S1_@GLIBCXX_3.4.15 4.6
+ _ZNSt8__detail15_List_node_base4swapERS0_S1_@GLIBCXX_3.4.15 4.6
+ _ZNSt8__detail15_List_node_base7_M_hookEPS0_@GLIBCXX_3.4.15 4.6
+ _ZNSt8__detail15_List_node_base9_M_unhookEv@GLIBCXX_3.4.15 4.6
+ _ZNSt8bad_castD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8bad_castD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8bad_castD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base10floatfieldE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base10scientificE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base11adjustfieldE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base13_M_grow_wordsEib@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base15sync_with_stdioEb@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base17_M_call_callbacksENS_5eventE@GLIBCXX_3.4.6 4.1.1
+ _ZNSt8ios_base17register_callbackEPFvNS_5eventERS_iEi@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base20_M_dispose_callbacksEv@GLIBCXX_3.4.6 4.1.1
+ _ZNSt8ios_base2inE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3appE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3ateE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3begE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3curE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3decE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3endE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3hexE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3octE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base3outE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base4InitC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base4InitC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base4InitD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base4InitD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base4leftE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base5fixedE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base5rightE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base5truncE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base6badbitE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base6binaryE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base6eofbitE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base6skipwsE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base6xallocEv@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7_M_initEv@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7_M_moveERS_@GLIBCXX_3.4.21 5
+ _ZNSt8ios_base7_M_swapERS_@GLIBCXX_3.4.21 5
+ _ZNSt8ios_base7failbitE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7failureC1ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7failureC2ERKSs@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7failureD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7failureD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7failureD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7goodbitE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7showposE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base7unitbufE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base8internalE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base8showbaseE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base9basefieldE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base9boolalphaE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base9showpointE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_base9uppercaseE@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_baseC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_baseC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_baseD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_baseD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8ios_baseD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcE22_M_initialize_numpunctEP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwE22_M_initialize_numpunctEP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9__atomic011atomic_flag12test_and_setESt12memory_order@GLIBCXX_3.4.14 4.5
+ _ZNSt9__atomic011atomic_flag5clearESt12memory_order@GLIBCXX_3.4.14 4.5
+ _ZNSt9__cxx199815_List_node_base10_M_reverseEv@GLIBCXX_3.4.14 4.5
+ _ZNSt9__cxx199815_List_node_base11_M_transferEPS0_S1_@GLIBCXX_3.4.14 4.5
+ _ZNSt9__cxx199815_List_node_base4hookEPS0_@GLIBCXX_3.4.10 4.3
+ _ZNSt9__cxx199815_List_node_base4swapERS0_S1_@GLIBCXX_3.4.10 4.3
+ _ZNSt9__cxx199815_List_node_base7_M_hookEPS0_@GLIBCXX_3.4.14 4.5
+ _ZNSt9__cxx199815_List_node_base6unhookEv@GLIBCXX_3.4.10 4.3
+ _ZNSt9__cxx199815_List_node_base7reverseEv@GLIBCXX_3.4.10 4.3
+ _ZNSt9__cxx199815_List_node_base8transferEPS0_S1_@GLIBCXX_3.4.10 4.3
+ _ZNSt9__cxx199815_List_node_base9_M_unhookEv@GLIBCXX_3.4.14 4.5
+ _ZNSt9bad_allocD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9bad_allocD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9bad_allocD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE10exceptionsESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE11_M_setstateESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE15_M_cache_localeERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE3tieEPSo@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE4fillEc@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE4initEPSt15basic_streambufIcS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE4moveEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIcSt11char_traitsIcEE4moveERS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE5rdbufEPSt15basic_streambufIcS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE7copyfmtERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEE9set_rdbufEPSt15basic_streambufIcS1_E@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIcSt11char_traitsIcEEC1EPSt15basic_streambufIcS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEEC2EPSt15basic_streambufIcS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIcSt11char_traitsIcEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE10exceptionsESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE11_M_setstateESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE15_M_cache_localeERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE3tieEPSt13basic_ostreamIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE4fillEw@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE4initEPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE4moveEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIwSt11char_traitsIwEE4moveERS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIwSt11char_traitsIwEE5clearESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE5imbueERKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE5rdbufEPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE7copyfmtERKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE8setstateESt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEE9set_rdbufEPSt15basic_streambufIwS1_E@GLIBCXX_3.4.21 5
+ _ZNSt9basic_iosIwSt11char_traitsIwEEC1EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEEC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEEC2EPSt15basic_streambufIwS1_E@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEEC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9basic_iosIwSt11char_traitsIwEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9exceptionD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9exceptionD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9exceptionD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstream3strEv@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstream6freezeEb@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamC1EPciSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamC1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamC2EPciSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamC2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9strstreamD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9type_infoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9type_infoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt9type_infoD2Ev@GLIBCXX_3.4 4.1.1
+ _ZNVSt9__atomic011atomic_flag12test_and_setESt12memory_order@GLIBCXX_3.4.11 4.4.0
+ _ZNVSt9__atomic011atomic_flag5clearESt12memory_order@GLIBCXX_3.4.11 4.4.0
+ _ZSt10adopt_lock@GLIBCXX_3.4.11 4.4.0
+ _ZSt10defer_lock@GLIBCXX_3.4.11 4.4.0
+ _ZSt10unexpectedv@GLIBCXX_3.4 4.1.1
+ _ZSt11__once_call@GLIBCXX_3.4.11 4.4.0
+ _ZSt11try_to_lock@GLIBCXX_3.4.11 4.4.0
+ _ZSt13get_terminatev@GLIBCXX_3.4.20 4.9
+ _ZSt13set_terminatePFvvE@GLIBCXX_3.4 4.1.1
+ _ZSt14__convert_to_vIdEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZSt14__convert_to_vIeEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZSt14__convert_to_vIfEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_3.4 4.1.1
+ _ZSt14get_unexpectedv@GLIBCXX_3.4.20 4.9
+ _ZSt14set_unexpectedPFvvE@GLIBCXX_3.4 4.1.1
+ _ZSt15__once_callable@GLIBCXX_3.4.11 4.4.0
+ _ZSt15future_category@GLIBCXX_3.4.14 4.5
+ _ZSt15future_categoryv@GLIBCXX_3.4.15 4.6
+ _ZSt15get_new_handlerv@GLIBCXX_3.4.20 4.9
+ _ZSt15set_new_handlerPFvvE@GLIBCXX_3.4 4.1.1
+ _ZSt15system_categoryv@GLIBCXX_3.4.11 4.4.0
+ _ZNSt13runtime_errorC1EPKc@GLIBCXX_3.4.21 5
+ _ZNSt13runtime_errorC1ERKS_@GLIBCXX_3.4.21 5
+ _ZNSt13runtime_errorC2EPKc@GLIBCXX_3.4.21 5
+ _ZNSt13runtime_errorC2ERKS_@GLIBCXX_3.4.21 5
+ _ZNSt13runtime_erroraSERKS_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIcSt11char_traitsIcEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ifstreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_iostreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIcSt11char_traitsIcEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEE4swapERS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2EOS2_@GLIBCXX_3.4.21 5
+ _ZNSt14basic_ofstreamIwSt11char_traitsIwEEaSEOS2_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE4swapERS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC1EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEC2EOS3_@GLIBCXX_3.4.21 5
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEEaSEOS3_@GLIBCXX_3.4.21 5
+ _ZSt16__throw_bad_castv@GLIBCXX_3.4 4.1.1
+ _ZSt16generic_categoryv@GLIBCXX_3.4.11 4.4.0
+ _ZSt17__throw_bad_allocv@GLIBCXX_3.4 4.1.1
+ _ZSt18_Rb_tree_decrementPKSt18_Rb_tree_node_base@GLIBCXX_3.4 4.1.1
+ _ZSt18_Rb_tree_decrementPSt18_Rb_tree_node_base@GLIBCXX_3.4 4.1.1
+ _ZSt18_Rb_tree_incrementPKSt18_Rb_tree_node_base@GLIBCXX_3.4 4.1.1
+ _ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base@GLIBCXX_3.4 4.1.1
+ _ZSt18__throw_bad_typeidv@GLIBCXX_3.4 4.1.1
+ _ZSt18uncaught_exceptionv@GLIBCXX_3.4 4.1.1
+ _ZSt19__throw_ios_failurePKc@GLIBCXX_3.4 4.1.1
+ _ZSt19__throw_logic_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt19__throw_range_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt19__throw_regex_errorNSt15regex_constants10error_typeE@GLIBCXX_3.4.15 4.6
+ _ZSt20_Rb_tree_black_countPKSt18_Rb_tree_node_baseS1_@GLIBCXX_3.4 4.1.1
+ _ZSt20_Rb_tree_rotate_leftPSt18_Rb_tree_node_baseRS0_@GLIBCXX_3.4 4.1.1
+ _ZSt20__throw_domain_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt20__throw_future_errori@GLIBCXX_3.4.14 4.5
+ _ZSt20__throw_length_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt20__throw_out_of_rangePKc@GLIBCXX_3.4 4.1.1
+ _ZSt20__throw_system_errori@GLIBCXX_3.4.11 4.4.0
+ _ZSt21_Rb_tree_rotate_rightPSt18_Rb_tree_node_baseRS0_@GLIBCXX_3.4 4.1.1
+ _ZSt21__throw_bad_exceptionv@GLIBCXX_3.4 4.1.1
+ _ZSt21__throw_runtime_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt22__throw_overflow_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt23__throw_underflow_errorPKc@GLIBCXX_3.4 4.1.1
+ _ZSt24__throw_invalid_argumentPKc@GLIBCXX_3.4 4.1.1
+ _ZSt24__throw_out_of_range_fmtPKcz@GLIBCXX_3.4.20 4.9
+ _ZSt25__throw_bad_function_callv@GLIBCXX_3.4.14 4.5
+ _ZSt25notify_all_at_thread_exitRSt18condition_variableSt11unique_lockISt5mutexE@GLIBCXX_3.4.21 5
+ _ZSt28_Rb_tree_rebalance_for_erasePSt18_Rb_tree_node_baseRS_@GLIBCXX_3.4 4.1.1
+ _ZSt29_Rb_tree_insert_and_rebalancebPSt18_Rb_tree_node_baseS0_RS_@GLIBCXX_3.4 4.1.1
+ _ZSt2wsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt2wsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt3cin@GLIBCXX_3.4 4.1.1
+ _ZSt4cerr@GLIBCXX_3.4 4.1.1
+ _ZSt4clog@GLIBCXX_3.4 4.1.1
+ _ZSt4cout@GLIBCXX_3.4 4.1.1
+ _ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt4endlIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt4endsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt4endsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt4wcin@GLIBCXX_3.4 4.1.1
+ _ZSt5flushIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt5flushIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_@GLIBCXX_3.4 4.1.1
+ _ZSt5wcerr@GLIBCXX_3.4 4.1.1
+ _ZSt5wclog@GLIBCXX_3.4 4.1.1
+ _ZSt5wcout@GLIBCXX_3.4 4.1.1
+ _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_ES4_@GLIBCXX_3.4 4.1.1
+ _ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_ES4_@GLIBCXX_3.4 4.1.1
+ _ZSt7nothrow@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt10moneypunctIcLb0EEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt10moneypunctIwLb0EEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt11__timepunctIcEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt11__timepunctIwEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt5ctypeIcEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt5ctypeIwEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7codecvtIcc11__mbstate_tEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7codecvtIwc11__mbstate_tEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7collateIcEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7collateIwEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8messagesIcEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8messagesIwEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8numpunctIcEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8numpunctIwEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9has_facetISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEbRKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9terminatev@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt10moneypunctIcLb0EEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt10moneypunctIcLb1EEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt10moneypunctIwLb0EEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt10moneypunctIwLb1EEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt11__timepunctIcEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt11__timepunctIwEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt5ctypeIcEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt5ctypeIwEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7codecvtIcc11__mbstate_tEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7codecvtIwc11__mbstate_tEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7collateIcEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7collateIwEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8messagesIcEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8messagesIwEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8numpunctIcEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8numpunctIwEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZSt9use_facetISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEERKT_RKSt6locale@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKa@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKh@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_a@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_c@GLIBCXX_3.4 4.1.1
+ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_h@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St12_Setiosflags@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St13_Setprecision@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St14_Resetiosflags@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St5_Setw@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St8_Setbase@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_St8_SetfillIS3_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIdcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIdwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIecSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIewSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIfcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIfwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKc@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_S3_@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St12_Setiosflags@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St13_Setprecision@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St14_Resetiosflags@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St5_Setw@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St8_Setbase@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_St8_SetfillIS3_E@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_c@GLIBCXX_3.4 4.1.1
+ _ZStlsIwSt11char_traitsIwESaIwEERSt13basic_ostreamIT_T0_ES7_RKSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_EPKS3_RKS6_@GLIBCXX_3.4 4.1.1
+ _ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_ERKS6_S8_@GLIBCXX_3.4 4.1.1
+ _ZStplIcSt11char_traitsIcESaIcEESbIT_T0_T1_ES3_RKS6_@GLIBCXX_3.4 4.1.1
+ _ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_EPKS3_RKS6_@GLIBCXX_3.4 4.1.1
+ _ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_ERKS6_S8_@GLIBCXX_3.4 4.1.1
+ _ZStplIwSt11char_traitsIwESaIwEESbIT_T0_T1_ES3_RKS6_@GLIBCXX_3.4 4.1.1
+ _ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Pa@GLIBCXX_3.4 4.1.1
+ _ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Ph@GLIBCXX_3.4 4.1.1
+ _ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Ra@GLIBCXX_3.4 4.1.1
+ _ZStrsISt11char_traitsIcEERSt13basic_istreamIcT_ES5_Rh@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_PS3_@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_RS3_@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St12_Setiosflags@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St13_Setprecision@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St14_Resetiosflags@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St5_Setw@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St8_Setbase@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcEERSt13basic_istreamIT_T0_ES6_St8_SetfillIS3_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIdcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIdwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIecSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIewSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIfcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIfwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_PS3_@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_RS3_@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St12_Setiosflags@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St13_Setprecision@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St14_Resetiosflags@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St5_Setw@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St8_Setbase@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwEERSt13basic_istreamIT_T0_ES6_St8_SetfillIS3_E@GLIBCXX_3.4 4.1.1
+ _ZStrsIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RSbIS4_S5_T1_E@GLIBCXX_3.4 4.1.1
+ _ZTIDd@CXXABI_1.3.4 4.5
+ _ZTIDe@CXXABI_1.3.4 4.5
+ _ZTIDf@CXXABI_1.3.4 4.5
+ _ZTIDi@CXXABI_1.3.3 4.4.0
+ _ZTIDn@CXXABI_1.3.5 4.6
+ _ZTIDs@CXXABI_1.3.3 4.4.0
+ _ZTIN10__cxxabiv115__forced_unwindE@CXXABI_1.3.2 4.3
+ _ZTIN10__cxxabiv116__enum_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv117__array_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv117__class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv117__pbase_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv119__foreign_exceptionE@CXXABI_1.3.2 4.3
+ _ZTIN10__cxxabiv119__pointer_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv120__function_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv120__si_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv121__vmi_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv123__fundamental_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN10__cxxabiv129__pointer_to_member_type_infoE@CXXABI_1.3 4.1.1
+ _ZTIN9__gnu_cxx13stdio_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTIN9__gnu_cxx13stdio_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTIN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTIN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTINSt3_V214error_categoryE@GLIBCXX_3.4.21 5
+ _ZTINSt6locale5facetE@GLIBCXX_3.4 4.1.1
+ _ZTINSt8ios_base7failureE@GLIBCXX_3.4 4.1.1
+ _ZTIPDd@CXXABI_1.3.4 4.5
+ _ZTIPDe@CXXABI_1.3.4 4.5
+ _ZTIPDf@CXXABI_1.3.4 4.5
+ _ZTIPDi@CXXABI_1.3.3 4.4.0
+ _ZTIPDn@CXXABI_1.3.5 4.6
+ _ZTIPDs@CXXABI_1.3.3 4.4.0
+ _ZTIPKDd@CXXABI_1.3.4 4.5
+ _ZTIPKDe@CXXABI_1.3.4 4.5
+ _ZTIPKDf@CXXABI_1.3.4 4.5
+ _ZTIPKDi@CXXABI_1.3.3 4.4.0
+ _ZTIPKDn@CXXABI_1.3.5 4.6
+ _ZTIPKDs@CXXABI_1.3.3 4.4.0
+ _ZTIPKa@CXXABI_1.3 4.1.1
+ _ZTIPKb@CXXABI_1.3 4.1.1
+ _ZTIPKc@CXXABI_1.3 4.1.1
+ _ZTIPKd@CXXABI_1.3 4.1.1
+ _ZTIPKe@CXXABI_1.3 4.1.1
+ _ZTIPKf@CXXABI_1.3 4.1.1
+ _ZTIPKh@CXXABI_1.3 4.1.1
+ _ZTIPKi@CXXABI_1.3 4.1.1
+ _ZTIPKj@CXXABI_1.3 4.1.1
+ _ZTIPKl@CXXABI_1.3 4.1.1
+ _ZTIPKm@CXXABI_1.3 4.1.1
+ _ZTIPKs@CXXABI_1.3 4.1.1
+ _ZTIPKt@CXXABI_1.3 4.1.1
+ _ZTIPKv@CXXABI_1.3 4.1.1
+ _ZTIPKw@CXXABI_1.3 4.1.1
+ _ZTIPKx@CXXABI_1.3 4.1.1
+ _ZTIPKy@CXXABI_1.3 4.1.1
+ _ZTIPa@CXXABI_1.3 4.1.1
+ _ZTIPb@CXXABI_1.3 4.1.1
+ _ZTIPc@CXXABI_1.3 4.1.1
+ _ZTIPd@CXXABI_1.3 4.1.1
+ _ZTIPe@CXXABI_1.3 4.1.1
+ _ZTIPf@CXXABI_1.3 4.1.1
+ _ZTIPh@CXXABI_1.3 4.1.1
+ _ZTIPi@CXXABI_1.3 4.1.1
+ _ZTIPj@CXXABI_1.3 4.1.1
+ _ZTIPl@CXXABI_1.3 4.1.1
+ _ZTIPm@CXXABI_1.3 4.1.1
+ _ZTIPs@CXXABI_1.3 4.1.1
+ _ZTIPt@CXXABI_1.3 4.1.1
+ _ZTIPv@CXXABI_1.3 4.1.1
+ _ZTIPw@CXXABI_1.3 4.1.1
+ _ZTIPx@CXXABI_1.3 4.1.1
+ _ZTIPy@CXXABI_1.3 4.1.1
+ _ZTISd@GLIBCXX_3.4 4.1.1
+ _ZTISi@GLIBCXX_3.4 4.1.1
+ _ZTISo@GLIBCXX_3.4 4.1.1
+ _ZTISt10bad_typeid@GLIBCXX_3.4 4.1.1
+ _ZTISt10ctype_base@GLIBCXX_3.4 4.1.1
+ _ZTISt10istrstream@GLIBCXX_3.4 4.1.1
+ _ZTISt10lock_error@GLIBCXX_3.4.11 4.4.0
+ _ZTISt10money_base@GLIBCXX_3.4 4.1.1
+ _ZTISt10moneypunctIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTISt10moneypunctIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTISt10moneypunctIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTISt10moneypunctIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTISt10ostrstream@GLIBCXX_3.4 4.1.1
+ _ZTISt11__timepunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt11__timepunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt11logic_error@GLIBCXX_3.4 4.1.1
+ _ZTISt11range_error@GLIBCXX_3.4 4.1.1
+ _ZTISt11regex_error@GLIBCXX_3.4.15 4.6
+ _ZTISt12bad_weak_ptr@GLIBCXX_3.4.15 4.6
+ _ZTISt12codecvt_base@GLIBCXX_3.4 4.1.1
+ _ZTISt12ctype_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt12ctype_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt12domain_error@GLIBCXX_3.4 4.1.1
+ _ZTISt12future_error@GLIBCXX_3.4.14 4.5
+ _ZTISt12length_error@GLIBCXX_3.4 4.1.1
+ _ZTISt12out_of_range@GLIBCXX_3.4 4.1.1
+ _ZTISt12strstreambuf@GLIBCXX_3.4 4.1.1
+ _ZTISt12system_error@GLIBCXX_3.4.11 4.4.0
+ _ZTISt13bad_exception@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_filebufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_filebufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt13messages_base@GLIBCXX_3.4 4.1.1
+ _ZTISt13runtime_error@GLIBCXX_3.4 4.1.1
+ _ZTISt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt14codecvt_bynameIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt14codecvt_bynameIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt14collate_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt14collate_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt14error_category@GLIBCXX_3.4.11 4.4.0
+ _ZTISt14overflow_error@GLIBCXX_3.4 4.1.1
+ _ZTISt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15messages_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt15messages_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt15underflow_error@GLIBCXX_3.4 4.1.1
+ _ZTISt16bad_array_length@CXXABI_1.3.8 4.9
+ _ZTISt16invalid_argument@GLIBCXX_3.4 4.1.1
+ _ZTISt17bad_function_call@GLIBCXX_3.4.15 4.6
+ _ZTISt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTISt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTISt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTISt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTISt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt19__codecvt_utf8_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTISt19__codecvt_utf8_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTISt19__codecvt_utf8_baseIwE@GLIBCXX_3.4.21 5
+ _ZTISt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt20__codecvt_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTISt20__codecvt_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTISt20__codecvt_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTISt20bad_array_new_length@CXXABI_1.3.8 4.9
+ _ZTISt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt25__codecvt_utf8_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTISt25__codecvt_utf8_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTISt25__codecvt_utf8_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTISt5ctypeIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt5ctypeIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt7codecvtIDic11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTISt7codecvtIDsc11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTISt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTISt7collateIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt7collateIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt8bad_cast@GLIBCXX_3.4 4.1.1
+ _ZTISt8ios_base@GLIBCXX_3.4 4.1.1
+ _ZTISt8messagesIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt8messagesIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt8numpunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTISt8numpunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTISt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9bad_alloc@GLIBCXX_3.4 4.1.1
+ _ZTISt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9exception@GLIBCXX_3.4 4.1.1
+ _ZTISt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTISt9strstream@GLIBCXX_3.4 4.1.1
+ _ZTISt9time_base@GLIBCXX_3.4 4.1.1
+ _ZTISt9type_info@GLIBCXX_3.4 4.1.1
+ _ZTIa@CXXABI_1.3 4.1.1
+ _ZTIb@CXXABI_1.3 4.1.1
+ _ZTIc@CXXABI_1.3 4.1.1
+ _ZTId@CXXABI_1.3 4.1.1
+ _ZTIe@CXXABI_1.3 4.1.1
+ _ZTIf@CXXABI_1.3 4.1.1
+ _ZTIh@CXXABI_1.3 4.1.1
+ _ZTIi@CXXABI_1.3 4.1.1
+ _ZTIj@CXXABI_1.3 4.1.1
+ _ZTIl@CXXABI_1.3 4.1.1
+ _ZTIm@CXXABI_1.3 4.1.1
+ _ZTIs@CXXABI_1.3 4.1.1
+ _ZTIt@CXXABI_1.3 4.1.1
+ _ZTIv@CXXABI_1.3 4.1.1
+ _ZTIw@CXXABI_1.3 4.1.1
+ _ZTIx@CXXABI_1.3 4.1.1
+ _ZTIy@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv116__enum_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv117__array_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv117__class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv117__pbase_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv119__pointer_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv120__function_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv120__si_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv121__vmi_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv123__fundamental_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN10__cxxabiv129__pointer_to_member_type_infoE@CXXABI_1.3 4.1.1
+ _ZTSN9__gnu_cxx13stdio_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSN9__gnu_cxx13stdio_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSNSt6locale5facetE@GLIBCXX_3.4 4.1.1
+ _ZTSNSt8ios_base7failureE@GLIBCXX_3.4 4.1.1
+ _ZTSPKa@CXXABI_1.3 4.1.1
+ _ZTSPKb@CXXABI_1.3 4.1.1
+ _ZTSPKc@CXXABI_1.3 4.1.1
+ _ZTSPKd@CXXABI_1.3 4.1.1
+ _ZTSPKe@CXXABI_1.3 4.1.1
+ _ZTSPKf@CXXABI_1.3 4.1.1
+ _ZTSPKh@CXXABI_1.3 4.1.1
+ _ZTSPKi@CXXABI_1.3 4.1.1
+ _ZTSPKj@CXXABI_1.3 4.1.1
+ _ZTSPKl@CXXABI_1.3 4.1.1
+ _ZTSPKm@CXXABI_1.3 4.1.1
+ _ZTSPKs@CXXABI_1.3 4.1.1
+ _ZTSPKt@CXXABI_1.3 4.1.1
+ _ZTSPKv@CXXABI_1.3 4.1.1
+ _ZTSPKw@CXXABI_1.3 4.1.1
+ _ZTSPKx@CXXABI_1.3 4.1.1
+ _ZTSPKy@CXXABI_1.3 4.1.1
+ _ZTSPa@CXXABI_1.3 4.1.1
+ _ZTSPb@CXXABI_1.3 4.1.1
+ _ZTSPc@CXXABI_1.3 4.1.1
+ _ZTSPd@CXXABI_1.3 4.1.1
+ _ZTSPe@CXXABI_1.3 4.1.1
+ _ZTSPf@CXXABI_1.3 4.1.1
+ _ZTSPh@CXXABI_1.3 4.1.1
+ _ZTSPi@CXXABI_1.3 4.1.1
+ _ZTSPj@CXXABI_1.3 4.1.1
+ _ZTSPl@CXXABI_1.3 4.1.1
+ _ZTSPm@CXXABI_1.3 4.1.1
+ _ZTSPs@CXXABI_1.3 4.1.1
+ _ZTSPt@CXXABI_1.3 4.1.1
+ _ZTSPv@CXXABI_1.3 4.1.1
+ _ZTSPw@CXXABI_1.3 4.1.1
+ _ZTSPx@CXXABI_1.3 4.1.1
+ _ZTSPy@CXXABI_1.3 4.1.1
+ _ZTSSd@GLIBCXX_3.4 4.1.1
+ _ZTSSi@GLIBCXX_3.4 4.1.1
+ _ZTSSo@GLIBCXX_3.4 4.1.1
+ _ZTSSt10bad_typeid@GLIBCXX_3.4 4.1.1
+ _ZTSSt10ctype_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt10istrstream@GLIBCXX_3.4 4.1.1
+ _ZTSSt10lock_error@GLIBCXX_3.4.11 4.4.0
+ _ZTSSt10money_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt10moneypunctIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt10moneypunctIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt10moneypunctIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt10moneypunctIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt10ostrstream@GLIBCXX_3.4 4.1.1
+ _ZTSSt11__timepunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt11__timepunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt11logic_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt11range_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt12codecvt_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt12ctype_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt12ctype_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt12domain_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt12future_error@GLIBCXX_3.4.14 4.5
+ _ZTSSt12length_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt12out_of_range@GLIBCXX_3.4 4.1.1
+ _ZTSSt12strstreambuf@GLIBCXX_3.4 4.1.1
+ _ZTSSt12system_error@GLIBCXX_3.4.11 4.4.0
+ _ZTSSt13bad_exception@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_filebufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_filebufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt13messages_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt13runtime_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14codecvt_bynameIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14codecvt_bynameIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14collate_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14collate_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt14error_category@GLIBCXX_3.4.11 4.4.0
+ _ZTSSt14overflow_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15messages_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15messages_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt15underflow_error@GLIBCXX_3.4 4.1.1
+ _ZTSSt16bad_array_length@CXXABI_1.3.8 4.9
+ _ZTSSt16invalid_argument@GLIBCXX_3.4 4.1.1
+ _ZTSSt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTSSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt19__codecvt_utf8_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTSSt19__codecvt_utf8_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTSSt19__codecvt_utf8_baseIwE@GLIBCXX_3.4.21 5
+ _ZTSSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt20__codecvt_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTSSt20__codecvt_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTSSt20__codecvt_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTSSt20bad_array_new_length@CXXABI_1.3.8 4.9
+ _ZTSSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt25__codecvt_utf8_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTSSt25__codecvt_utf8_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTSSt25__codecvt_utf8_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTSSt5ctypeIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt5ctypeIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7codecvtIDic11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTSSt7codecvtIDsc11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTSSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7collateIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7collateIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8bad_cast@GLIBCXX_3.4 4.1.1
+ _ZTSSt8ios_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt8messagesIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8messagesIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8numpunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8numpunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9bad_alloc@GLIBCXX_3.4 4.1.1
+ _ZTSSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9exception@GLIBCXX_3.4 4.1.1
+ _ZTSSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTSSt9strstream@GLIBCXX_3.4 4.1.1
+ _ZTSSt9time_base@GLIBCXX_3.4 4.1.1
+ _ZTSSt9type_info@GLIBCXX_3.4 4.1.1
+ _ZTSa@CXXABI_1.3 4.1.1
+ _ZTSb@CXXABI_1.3 4.1.1
+ _ZTSc@CXXABI_1.3 4.1.1
+ _ZTSd@CXXABI_1.3 4.1.1
+ _ZTSe@CXXABI_1.3 4.1.1
+ _ZTSf@CXXABI_1.3 4.1.1
+ _ZTSh@CXXABI_1.3 4.1.1
+ _ZTSi@CXXABI_1.3 4.1.1
+ _ZTSj@CXXABI_1.3 4.1.1
+ _ZTSl@CXXABI_1.3 4.1.1
+ _ZTSm@CXXABI_1.3 4.1.1
+ _ZTSs@CXXABI_1.3 4.1.1
+ _ZTSt@CXXABI_1.3 4.1.1
+ _ZTSv@CXXABI_1.3 4.1.1
+ _ZTSw@CXXABI_1.3 4.1.1
+ _ZTSx@CXXABI_1.3 4.1.1
+ _ZTSy@CXXABI_1.3 4.1.1
+ _ZTTSd@GLIBCXX_3.4 4.1.1
+ _ZTTSi@GLIBCXX_3.4 4.1.1
+ _ZTTSo@GLIBCXX_3.4 4.1.1
+ _ZTTSt10istrstream@GLIBCXX_3.4 4.1.1
+ _ZTTSt10ostrstream@GLIBCXX_3.4 4.1.1
+ _ZTTSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTTSt9strstream@GLIBCXX_3.4 4.1.1
+ _ZTVN10__cxxabiv116__enum_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv117__array_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv117__class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv117__pbase_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv119__pointer_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv120__function_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv120__si_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv121__vmi_class_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv123__fundamental_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN10__cxxabiv129__pointer_to_member_type_infoE@CXXABI_1.3 4.1.1
+ _ZTVN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVNSt3_V214error_categoryE@GLIBCXX_3.4.21 5
+ _ZTVNSt6locale5facetE@GLIBCXX_3.4 4.1.1
+ _ZTVNSt8ios_base7failureE@GLIBCXX_3.4 4.1.1
+ _ZTVSd@GLIBCXX_3.4 4.1.1
+ _ZTVSi@GLIBCXX_3.4 4.1.1
+ _ZTVSo@GLIBCXX_3.4 4.1.1
+ _ZTVSt10bad_typeid@GLIBCXX_3.4 4.1.1
+ _ZTVSt10istrstream@GLIBCXX_3.4 4.1.1
+ _ZTVSt10lock_error@GLIBCXX_3.4.11 4.4.0
+ _ZTVSt10moneypunctIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt10moneypunctIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt10moneypunctIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt10moneypunctIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt10ostrstream@GLIBCXX_3.4 4.1.1
+ _ZTVSt11__timepunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt11__timepunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt11logic_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt11range_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt11regex_error@GLIBCXX_3.4.15 4.6
+ _ZTVSt12bad_weak_ptr@GLIBCXX_3.4.15 4.6
+ _ZTVSt12ctype_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt12ctype_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt12domain_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt12future_error@GLIBCXX_3.4.14 4.5
+ _ZTVSt12length_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt12out_of_range@GLIBCXX_3.4 4.1.1
+ _ZTVSt12strstreambuf@GLIBCXX_3.4 4.1.1
+ _ZTVSt12system_error@GLIBCXX_3.4.11 4.4.0
+ _ZTVSt13bad_exception@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_filebufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_filebufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt13runtime_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14codecvt_bynameIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14codecvt_bynameIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14collate_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14collate_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt14error_category@GLIBCXX_3.4.11 4.4.0
+ _ZTVSt14overflow_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15messages_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15messages_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt15underflow_error@GLIBCXX_3.4 4.1.1
+ _ZTVSt16bad_array_length@CXXABI_1.3.8 4.9
+ _ZTVSt16invalid_argument@GLIBCXX_3.4 4.1.1
+ _ZTVSt17bad_function_call@GLIBCXX_3.4.15 4.6
+ _ZTVSt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1
+ _ZTVSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt19__codecvt_utf8_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTVSt19__codecvt_utf8_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTVSt19__codecvt_utf8_baseIwE@GLIBCXX_3.4.21 5
+ _ZTVSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt20__codecvt_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTVSt20__codecvt_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTVSt20__codecvt_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTVSt20bad_array_new_length@CXXABI_1.3.8 4.9
+ _ZTVSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt25__codecvt_utf8_utf16_baseIDiE@GLIBCXX_3.4.21 5
+ _ZTVSt25__codecvt_utf8_utf16_baseIDsE@GLIBCXX_3.4.21 5
+ _ZTVSt25__codecvt_utf8_utf16_baseIwE@GLIBCXX_3.4.21 5
+ _ZTVSt5ctypeIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt5ctypeIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7codecvtIDic11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTVSt7codecvtIDsc11__mbstate_tE@GLIBCXX_3.4.21 5
+ _ZTVSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7collateIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7collateIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8bad_cast@GLIBCXX_3.4 4.1.1
+ _ZTVSt8ios_base@GLIBCXX_3.4 4.1.1
+ _ZTVSt8messagesIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8messagesIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8numpunctIcE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8numpunctIwE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9bad_alloc@GLIBCXX_3.4 4.1.1
+ _ZTVSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9exception@GLIBCXX_3.4 4.1.1
+ _ZTVSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1
+ _ZTVSt9strstream@GLIBCXX_3.4 4.1.1
+ _ZTVSt9type_info@GLIBCXX_3.4 4.1.1
+ _ZdaPv@GLIBCXX_3.4 4.1.1
+ _ZdaPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _ZdlPv@GLIBCXX_3.4 4.1.1
+ _ZdlPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ __atomic_flag_for_address@GLIBCXX_3.4.11 4.4.0
+ __atomic_flag_wait_explicit@GLIBCXX_3.4.11 4.4.0
+ __cxa_allocate_dependent_exception@CXXABI_1.3.6 4.7
+ __cxa_allocate_exception@CXXABI_1.3 4.1.1
+ __cxa_bad_cast@CXXABI_1.3 4.1.1
+ __cxa_bad_typeid@CXXABI_1.3 4.1.1
+ __cxa_begin_catch@CXXABI_1.3 4.1.1
+ __cxa_call_unexpected@CXXABI_1.3 4.1.1
+ __cxa_current_exception_type@CXXABI_1.3 4.1.1
+ __cxa_deleted_virtual@CXXABI_1.3.6 4.7
+ __cxa_demangle@CXXABI_1.3 4.1.1
+ __cxa_end_catch@CXXABI_1.3 4.1.1
+ __cxa_free_dependent_exception@CXXABI_1.3.6 4.7
+ __cxa_free_exception@CXXABI_1.3 4.1.1
+ __cxa_get_exception_ptr@CXXABI_1.3.1 4.1.1
+ __cxa_get_globals@CXXABI_1.3 4.1.1
+ __cxa_get_globals_fast@CXXABI_1.3 4.1.1
+ __cxa_guard_abort@CXXABI_1.3 4.1.1
+ __cxa_guard_acquire@CXXABI_1.3 4.1.1
+ __cxa_guard_release@CXXABI_1.3 4.1.1
+ __cxa_pure_virtual@CXXABI_1.3 4.1.1
+ __cxa_rethrow@CXXABI_1.3 4.1.1
+ __cxa_thread_atexit@CXXABI_1.3.7 4.8
+ __cxa_throw@CXXABI_1.3 4.1.1
+ __cxa_throw_bad_array_length@CXXABI_1.3.8 4.9
+ __cxa_throw_bad_array_new_length@CXXABI_1.3.8 4.9
+ __cxa_tm_cleanup@CXXABI_TM_1 4.7
+ __cxa_vec_cctor@CXXABI_1.3 4.1.1
+ __cxa_vec_cleanup@CXXABI_1.3 4.1.1
+ __cxa_vec_ctor@CXXABI_1.3 4.1.1
+ __cxa_vec_delete2@CXXABI_1.3 4.1.1
+ __cxa_vec_delete3@CXXABI_1.3 4.1.1
+ __cxa_vec_delete@CXXABI_1.3 4.1.1
+ __cxa_vec_dtor@CXXABI_1.3 4.1.1
+ __cxa_vec_new2@CXXABI_1.3 4.1.1
+ __cxa_vec_new3@CXXABI_1.3 4.1.1
+ __cxa_vec_new@CXXABI_1.3 4.1.1
+ __dynamic_cast@CXXABI_1.3 4.1.1
+ __once_proxy@GLIBCXX_3.4.11 4.4.0
+ atomic_flag_clear_explicit@GLIBCXX_3.4.11 4.4.0
+ atomic_flag_test_and_set_explicit@GLIBCXX_3.4.11 4.4.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.common.cxx11
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.common.cxx11
@@ -0,0 +1,880 @@
+ (optional=abi_c++11)_ZGVNSt7__cxx1110moneypunctIcLb0EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx1110moneypunctIcLb1EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx1110moneypunctIwLb0EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx1110moneypunctIwLb1EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx117collateIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx117collateIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118messagesIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118messagesIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118numpunctIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118numpunctIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZGVNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt3_V214error_category10_M_messageB5cxx11Ei@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt3tr14hashINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEEclES6_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt3tr14hashINSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEEEclES6_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt6locale4nameB5cxx11Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE10neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE10pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE11curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE11frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13do_neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13do_pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE14do_curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE14do_frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE16do_negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE16do_positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb0EE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE10neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE10pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE11curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE11frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13do_neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13do_pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE14do_curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE14do_frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE16do_negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE16do_positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIcLb1EE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE10neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE10pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE11curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE11frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13do_neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13do_pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE14do_curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE14do_frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE16do_negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE16do_positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb0EE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE10neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE10pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE11curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE11frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13do_neg_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13do_pos_formatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE14do_curr_symbolEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE14do_frac_digitsEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE16do_negative_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE16do_positive_signEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1110moneypunctIwLb1EE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_disjunctEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_local_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16_M_get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE3endEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4cendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4rendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4sizeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5beginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5c_strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5crendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5emptyEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5frontEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6cbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6lengthEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6rbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_M_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7compareERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7crbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8capacityEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8max_sizeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_disjunctEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE11_M_is_localEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_M_local_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16_M_get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE3endEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4cendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4rendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4sizeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5beginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5c_strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5crendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5emptyEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5frontEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6cbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6lengthEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6rbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_M_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7compareERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7crbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8capacityEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8max_sizeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEE3strEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEE5rdbufEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE10_M_compareEPKcS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE10do_compareEPKcS3_S3_S3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE12do_transformEPKcS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE4hashEPKcS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE7compareEPKcS3_S3_S3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE7do_hashEPKcS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIcE9transformEPKcS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE10_M_compareEPKwS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE10do_compareEPKwS3_S3_S3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE12do_transformEPKwS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE4hashEPKwS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE7compareEPKwS3_S3_S3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE7do_hashEPKwS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx117collateIwE9transformEPKwS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE18_M_convert_to_charERKNS_12basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE20_M_convert_from_charEPc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE3getEiiiRKNS_12basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE4openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE4openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6localePKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE5closeEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE6do_getEiiiRKNS_12basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE7do_openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIcE8do_closeEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE18_M_convert_to_charERKNS_12basic_stringIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE20_M_convert_from_charEPc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE3getEiiiRKNS_12basic_stringIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE4openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE4openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6localePKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE5closeEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE6do_getEiiiRKNS_12basic_stringIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE7do_openERKNS_12basic_stringIcSt11char_traitsIcESaIcEEERKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118messagesIwE8do_closeEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE11do_truenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE12do_falsenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE8truenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIcE9falsenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE11do_groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE11do_truenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE12do_falsenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE13decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE13thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE16do_decimal_pointEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE16do_thousands_sepEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE8groupingEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE8truenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118numpunctIwE9falsenameEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10date_orderEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_dateES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_timeES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11do_get_yearES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE11get_weekdayES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13do_date_orderEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE13get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14do_get_weekdayES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16do_get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKcSD_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_dateES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_timeES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8get_yearES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10date_orderEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_dateES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_timeES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11do_get_yearES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE11get_weekdayES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13do_date_orderEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE13get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14do_get_weekdayES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16do_get_monthnameES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE21_M_extract_via_formatES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmPKwSD_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tmcc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_dateES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_timeES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8get_yearES4_S4_RSt8ios_baseRSt12_Ios_IostateP2tm@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS2_IcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIcS2_IcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecRKNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecRKNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES4_S4_RSt8ios_basecRKNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES4_S4_RSt8ios_basecRKNS_12basic_stringIcS3_SaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewRKNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewRKNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES4_S4_RSt8ios_basewRKNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES4_S4_RSt8ios_basewRKNS_12basic_stringIwS3_SaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt8ios_base7failureB5cxx114whatEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt11logic_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt11logic_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt11range_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt11range_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12domain_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12domain_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12length_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12length_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12out_of_rangeC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt12out_of_rangeC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_filebufIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_filebufIwSt11char_traitsIwEE4openERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIcSt11char_traitsIcEEC1ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIcSt11char_traitsIcEEC2ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIwSt11char_traitsIwEE4openERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIwSt11char_traitsIwEEC1ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13basic_fstreamIwSt11char_traitsIwEEC2ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC2ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC2ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC2ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC2ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14overflow_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14overflow_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15underflow_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt15underflow_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt16invalid_argumentC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt16invalid_argumentC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb0EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIcLb1EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb0EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EE24_M_initialize_moneypunctEP15__locale_structPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1110moneypunctIwLb1EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC1EPcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_Alloc_hiderC2EPcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPKcS4_EEEEvT_SB_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPcS4_EEEEvT_SA_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_M_local_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIPKcS4_EESA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcN9__gnu_cxx17__normal_iteratorIS5_S4_EES8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcS5_S5_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13shrink_to_fitEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE16_M_get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE3endEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4nposE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4rendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5beginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5clearEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEN9__gnu_cxx17__normal_iteratorIPKcS4_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEN9__gnu_cxx17__normal_iteratorIPcS4_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5eraseEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5frontEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6appendESt16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignESt16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPKcS4_EEc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPcS4_EESt16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertEN9__gnu_cxx17__normal_iteratorIPcS4_EEc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6insertIN9__gnu_cxx17__normal_iteratorIPcS4_EEEEvS9_T_SA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6rbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_M_dataEPc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_NS6_IPcS4_EESB_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_PcSA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_RKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S8_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_S9_S9_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPKcS4_EES9_St16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_NS6_IPKcS4_EESB_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_PKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_PKcSA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_RKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_S7_S7_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7replaceEN9__gnu_cxx17__normal_iteratorIPcS4_EES8_S8_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE8pop_backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_assignERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9push_backEc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EOS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1EPKcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ESt16initializer_listIcERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IN9__gnu_cxx17__normal_iteratorIPcS4_EEvEET_SA_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IPKcvEET_S8_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IPcvEET_S7_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EOS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2EPKcRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ESt16initializer_listIcERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IN9__gnu_cxx17__normal_iteratorIPcS4_EEvEET_SA_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IPKcvEET_S8_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IPcvEET_S7_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSESt16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEaSEc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEPKc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLESt16initializer_listIcE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEpLEc@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE10_M_disposeEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPKwS4_EEEEvT_SB_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIN9__gnu_cxx17__normal_iteratorIPwS4_EEEEvT_SA_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIPKwEEvT_S8_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE12_M_constructIPwEEvT_S7_St20forward_iterator_tag@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_M_local_dataEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIPKwS4_EESA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwN9__gnu_cxx17__normal_iteratorIS5_S4_EES8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwPKwS7_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13_S_copy_charsEPwS5_S5_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE13shrink_to_fitEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE16_M_get_allocatorEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE3endEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4nposE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4rendEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5beginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5clearEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPKwS4_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS4_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5eraseEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE5frontEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6appendESt16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6assignESt16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPKwS4_EEw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS4_EESt16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS4_EEw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6insertIN9__gnu_cxx17__normal_iteratorIPwS4_EEEEvS9_T_SA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE6rbeginEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7_M_dataEPw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_NS6_IPwS4_EESB_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_PwSA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_RKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_S8_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_S9_S9_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPKwS4_EES9_St16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_NS6_IPKwS4_EESB_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_PKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_PKwSA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_RKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_S7_S7_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS4_EES8_S8_S8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE8pop_backEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9_M_assignERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEE9push_backEw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EOS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1EPKwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ERKS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1ESt16initializer_listIwERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1IN9__gnu_cxx17__normal_iteratorIPwS4_EEvEET_SA_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1IPKwvEET_S8_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC1IPwvEET_S7_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EOS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2EPKwRKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ERKS4_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2ESt16initializer_listIwERKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2IN9__gnu_cxx17__normal_iteratorIPwS4_EEvEET_SA_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2IPKwvEET_S8_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEC2IPwvEET_S7_RKS3_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEaSEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEaSERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEaSESt16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEaSEw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEpLEPKw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEpLERKS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEpLESt16initializer_listIwE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1112basic_stringIwSt11char_traitsIwESaIwEEpLEw@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1114collate_bynameIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE14__xfer_bufptrsC1ERKS4_PS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE14__xfer_bufptrsC2ERKS4_PS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE14__xfer_bufptrsD1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE14__xfer_bufptrsD2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE15_M_update_egptrEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE17_M_stringbuf_initESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE3strERKNS_12basic_stringIcS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE8overflowEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE9pbackfailEi@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE9showmanycEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEE9underflowEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC1EOS4_ONS4_14__xfer_bufptrsE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC2EOS4_ONS4_14__xfer_bufptrsE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC2ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE14__xfer_bufptrsC1ERKS4_PS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE14__xfer_bufptrsC2ERKS4_PS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE14__xfer_bufptrsD1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE14__xfer_bufptrsD2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE15_M_update_egptrEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE17_M_stringbuf_initESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE3strERKNS_12basic_stringIwS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE8overflowEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE9pbackfailEj@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE9showmanycEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEE9underflowEv@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC1EOS4_ONS4_14__xfer_bufptrsE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC1ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC2EOS4_ONS4_14__xfer_bufptrsE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC2ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115messages_bynameIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115numpunct_bynameIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb0EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIcLb1EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb0EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EE4intlE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1117moneypunct_bynameIwLb1EED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE3strERKNS_12basic_stringIcS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC2ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEE3strERKNS_12basic_stringIwS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC1ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC2ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEE3strERKNS_12basic_stringIcS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC2ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEE3strERKNS_12basic_stringIwS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC1ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC2ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE3strERKNS_12basic_stringIcS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEE3strERKNS_12basic_stringIwS2_S3_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEE4swapERS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC1EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC1ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC2EOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ERKNS_12basic_stringIwS2_S3_EESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEC2ESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEaSEOS4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx117collateIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118messagesIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcE22_M_initialize_numpunctEP15__locale_struct@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIcED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwE22_M_initialize_numpunctEP15__locale_struct@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118numpunctIwED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C1EPKcRKSt10error_code@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKSt10error_code@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C2EPKcRKSt10error_code@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11C2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEERKSt10error_code@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11D0Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11D1Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt8ios_base7failureB5cxx11D2Ev@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13random_device14_M_init_pretr1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13runtime_errorC1ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt13runtime_errorC2ERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIwSt11char_traitsIwEE4openERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ifstreamIwSt11char_traitsIwEEC1ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1ERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIwSt11char_traitsIwEE4openERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNSt14basic_ofstreamIwSt11char_traitsIwEEC1ERKNSt7__cxx1112basic_stringIcS0_IcESaIcEEESt13_Ios_Openmode@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt17iostream_categoryv@GLIBCXX_3.4.21 5.1.1
+ (optional=abi_c++11)_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt7getlineIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx1110moneypunctIcLb0EEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx1110moneypunctIwLb0EEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx117collateIcEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx117collateIwEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118messagesIcEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118messagesIwEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118numpunctIcEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118numpunctIwEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9has_facetINSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx1110moneypunctIcLb0EEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx1110moneypunctIcLb1EEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx1110moneypunctIwLb0EEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx1110moneypunctIwLb1EEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx117collateIcEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx117collateIwEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118messagesIcEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118messagesIwEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118numpunctIcEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118numpunctIwEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZSt9use_facetINSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStlsIcSt11char_traitsIcESaIcEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStlsIwSt11char_traitsIwESaIwEERSt13basic_ostreamIT_T0_ES7_RKNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_RKS8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIcSt11char_traitsIcESaIcEENSt7__cxx1112basic_stringIT_T0_T1_EES5_RKS8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIwSt11char_traitsIwESaIwEENSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_RKS8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIwSt11char_traitsIwESaIwEENSt7__cxx1112basic_stringIT_T0_T1_EERKS8_SA_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStplIwSt11char_traitsIwESaIwEENSt7__cxx1112basic_stringIT_T0_T1_EES5_RKS8_@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStrsIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZStrsIwSt11char_traitsIwESaIwEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1110moneypunctIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1110moneypunctIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1110moneypunctIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1110moneypunctIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1114collate_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1114collate_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115messages_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115messages_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115numpunct_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115numpunct_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1117moneypunct_bynameIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1117moneypunct_bynameIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1117moneypunct_bynameIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1117moneypunct_bynameIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx117collateIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx117collateIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118messagesIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118messagesIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118numpunctIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118numpunctIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTINSt8ios_base7failureB5cxx11E@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1110moneypunctIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1110moneypunctIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1110moneypunctIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1110moneypunctIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1114collate_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1114collate_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115messages_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115messages_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115numpunct_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115numpunct_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1117moneypunct_bynameIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1117moneypunct_bynameIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1117moneypunct_bynameIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1117moneypunct_bynameIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx117collateIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx117collateIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118messagesIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118messagesIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118numpunctIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118numpunctIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTSNSt8ios_base7failureB5cxx11E@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTTNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1110moneypunctIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1110moneypunctIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1110moneypunctIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1110moneypunctIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1114collate_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1114collate_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115basic_stringbufIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115messages_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115messages_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115numpunct_bynameIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115numpunct_bynameIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1115time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1117moneypunct_bynameIcLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1117moneypunct_bynameIcLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1117moneypunct_bynameIwLb0EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1117moneypunct_bynameIwLb1EEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1118basic_stringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1118basic_stringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1119basic_istringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1119basic_ostringstreamIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx1119basic_ostringstreamIwSt11char_traitsIwESaIwEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx117collateIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx117collateIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118messagesIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118messagesIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118numpunctIcEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118numpunctIwEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx118time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZTVNSt8ios_base7failureB5cxx11E@GLIBCXX_3.4.21 5.2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.excprop
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.excprop
@@ -0,0 +1,17 @@
+ _ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv@CXXABI_1.3.3 4.4.0
+ _ZNKSt15__exception_ptr13exception_ptrcvMS0_FvvEEv@CXXABI_1.3.3 4.4.0
+ _ZNKSt15__exception_ptr13exception_ptrntEv@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptr4swapERS0_@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC1ERKS0_@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC1Ev@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC2EMS0_FvvE@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC2ERKS0_@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrC2Ev@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrD1Ev@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptrD2Ev@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptr13exception_ptraSERKS0_@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0
+ _ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0
+ _ZSt17current_exceptionv@CXXABI_1.3.3 4.4.0
+ _ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE@CXXABI_1.3.3 4.4.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.float128
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.float128
@@ -0,0 +1,7 @@
+ CXXABI_FLOAT128@CXXABI_FLOAT128 5
+ _ZTIPKg@CXXABI_FLOAT128 5
+ _ZTIPg@CXXABI_FLOAT128 5
+ _ZTIg@CXXABI_FLOAT128 5
+ _ZTSPKg@CXXABI_FLOAT128 5
+ _ZTSPg@CXXABI_FLOAT128 5
+ _ZTSg@CXXABI_FLOAT128 5
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.glibcxxmath
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.glibcxxmath
@@ -0,0 +1,22 @@
+ acosl@GLIBCXX_3.4.3 4.1.1
+ asinl@GLIBCXX_3.4.3 4.1.1
+ atan2l@GLIBCXX_3.4 4.1.1
+ atanl@GLIBCXX_3.4.3 4.1.1
+ ceill@GLIBCXX_3.4.3 4.1.1
+ coshl@GLIBCXX_3.4 4.1.1
+ cosl@GLIBCXX_3.4 4.1.1
+ expl@GLIBCXX_3.4 4.1.1
+ floorl@GLIBCXX_3.4.3 4.1.1
+ fmodl@GLIBCXX_3.4.3 4.1.1
+ frexpl@GLIBCXX_3.4.3 4.1.1
+ hypotl@GLIBCXX_3.4 4.1.1
+ ldexpl@GLIBCXX_3.4.3 4.1.1
+ log10l@GLIBCXX_3.4 4.1.1
+ logl@GLIBCXX_3.4 4.1.1
+ modfl@GLIBCXX_3.4.3 4.1.1
+ powl@GLIBCXX_3.4 4.1.1
+ sinhl@GLIBCXX_3.4 4.1.1
+ sinl@GLIBCXX_3.4 4.1.1
+ sqrtl@GLIBCXX_3.4 4.1.1
+ tanhl@GLIBCXX_3.4 4.1.1
+ tanl@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.hppa
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.hppa
@@ -0,0 +1,9 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.excprop"
+# removed, see PR libstdc++/39491 __signbitl@GLIBCXX_3.4 4.2.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.hurd-i386
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.hurd-i386
@@ -0,0 +1,6 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit.hurd"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.i386
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.i386
@@ -0,0 +1,14 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvjS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ia64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ia64
@@ -0,0 +1,53 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.8
+ _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.8
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.kfreebsd-amd64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.kfreebsd-amd64
@@ -0,0 +1,9 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.kfreebsd-i386
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.kfreebsd-i386
@@ -0,0 +1,7 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ldbl.32bit
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ldbl.32bit
@@ -0,0 +1,284 @@
+ CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1
+ GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1
+ GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcjcRSt8ios_basePcSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIlEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intImEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIxEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIyEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcjcS7_PcS8_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIgEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcjwRSt8ios_basePwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intImEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIxEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIyEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcjwPKwPwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIdEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIgEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_bRSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_bRSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSi10_M_extractIgEERSiRT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSirsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSo9_M_insertIgEERSoT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSolsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIgEERS2_RT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIgEERS2_T_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10has_denormE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_boundedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_integerE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE11round_styleE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12has_infinityE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12max_digits10E@GLIBCXX_LDBL_3.4 4.5.0
+ _ZNSt14numeric_limitsIgE12max_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12min_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE13has_quiet_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14is_specializedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14max_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14min_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15has_denorm_lossE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15tinyness_beforeE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE17has_signaling_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5radixE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5trapsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE6digitsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8digits10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8is_exactE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_iec559E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_moduloE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_signedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Ej@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt14__convert_to_vIgEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTIPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSg@CXXABI_LDBL_1.3 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ldbl.32bit.s390
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ldbl.32bit.s390
@@ -0,0 +1,284 @@
+ CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1
+ GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1
+ GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIlEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intImEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIxEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIyEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS7_PcS8_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIgEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intImEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIxEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIyEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIdEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIgEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_bRSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_bRSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSi10_M_extractIgEERSiRT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSirsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSo9_M_insertIgEERSoT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSolsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIgEERS2_RT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIgEERS2_T_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10has_denormE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_boundedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_integerE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE11round_styleE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12has_infinityE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12max_digits10E@GLIBCXX_LDBL_3.4 4.5.0
+ _ZNSt14numeric_limitsIgE12max_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12min_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE13has_quiet_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14is_specializedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14max_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14min_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15has_denorm_lossE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15tinyness_beforeE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE17has_signaling_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5radixE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5trapsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE6digitsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8digits10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8is_exactE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_iec559E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_moduloE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_signedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt14__convert_to_vIgEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTIPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSg@CXXABI_LDBL_1.3 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ldbl.64bit
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ldbl.64bit
@@ -0,0 +1,284 @@
+ CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1
+ GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1
+ GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIlEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intImEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIxEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE13_M_insert_intIyEES4_S4_RSt8ios_basecT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS7_PcS8_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIdEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE15_M_insert_floatIgEES4_S4_RSt8ios_baseccT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEclRSt8ios_basePcPKcRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_RSt8ios_basecy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_RSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIlEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intImEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIxEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE13_M_insert_intIyEES4_S4_RSt8ios_basewT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwSA_Ri@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIdEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE15_M_insert_floatIgEES4_S4_RSt8ios_basewcT_@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwlRSt8ios_basePwPKwRi@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewPKv@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewb@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewl@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewm@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewx@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_RSt8ios_basewy@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_RSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb0EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE10_M_extractILb1EEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE8__do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE8__do_putES4_bRSt8ios_basecd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb0EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE9_M_insertILb1EEES4_S4_RSt8ios_basecRKSs@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE8__do_putES4_bRSt8ios_basewd@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb0EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNKSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE9_M_insertILb1EEES4_S4_RSt8ios_basewRKSbIwS3_SaIwEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSi10_M_extractIgEERSiRT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSirsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSo9_M_insertIgEERSoT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSolsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE10_M_extractIgEERS2_RT_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEErsERg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE9_M_insertIgEERS2_T_@GLIBCXX_LDBL_3.4.7 4.2.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEElsEg@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10has_denormE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_boundedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE10is_integerE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE11round_styleE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12has_infinityE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12max_digits10E@GLIBCXX_LDBL_3.4 4.5.0
+ _ZNSt14numeric_limitsIgE12max_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE12min_exponentE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE13has_quiet_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14is_specializedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14max_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE14min_exponent10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15has_denorm_lossE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE15tinyness_beforeE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE17has_signaling_NaNE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5radixE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE5trapsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE6digitsE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8digits10E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE8is_exactE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_iec559E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_moduloE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt14numeric_limitsIgE9is_signedE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED0Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED1Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEED2Ev@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt14__convert_to_vIgEvPKcRT_RSt12_Ios_IostateRKP15__locale_struct@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9has_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEEbRKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZSt9use_facetINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEEERKT_RKSt6locale@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgcSt11char_traitsIcEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStlsIgwSt11char_traitsIwEERSt13basic_ostreamIT0_T1_ES6_RKSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgcSt11char_traitsIcEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZStrsIgwSt11char_traitsIwEERSt13basic_istreamIT0_T1_ES6_RSt7complexIT_E@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTINSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTIPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTIg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTSPKg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSPg@CXXABI_LDBL_1.3 4.2.1
+ _ZTSg@CXXABI_LDBL_1.3 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1
+ _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.m68k
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.m68k
@@ -0,0 +1,6 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.mips
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.mips
@@ -0,0 +1,7 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.glibcxxmath"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.mips64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.mips64
@@ -0,0 +1,7 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.mips64el
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.mips64el
@@ -0,0 +1,10 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.9.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.9.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.mipsel
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.mipsel
@@ -0,0 +1,8 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.money.f128
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.money.f128
@@ -0,0 +1,10 @@
+  GLIBCXX_LDBL_3.4.21@GLIBCXX_LDBL_3.4.21 5
+# cxx11 symbols only
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basecg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basecg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewg@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewg@GLIBCXX_3.4.21 5.2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.money.ldbl
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.money.ldbl
@@ -0,0 +1,9 @@
+# cxx11 symbols only
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE3getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE6do_getES4_S4_bRSt8ios_baseRSt12_Ios_IostateRe@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE3putES4_bRSt8ios_basece@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6do_putES4_bRSt8ios_basece@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE3putES4_bRSt8ios_basewe@GLIBCXX_3.4.21 5.2
+ (optional=abi_c++11)_ZNKSt7__cxx119money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6do_putES4_bRSt8ios_basewe@GLIBCXX_3.4.21 5.2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.not-armel
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.not-armel
@@ -0,0 +1,24 @@
+ _ZNSt13__future_base11_State_baseD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base11_State_baseD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base11_State_baseD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base12_Result_baseC1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base12_Result_baseC2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base12_Result_baseD0Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base12_Result_baseD1Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base12_Result_baseD2Ev@GLIBCXX_3.4.15 4.6
+ _ZNSt13__future_base13_State_baseV211_Make_ready6_M_setEv@GLIBCXX_3.4.21 5
+ _ZNSt13__future_base19_Async_state_commonD0Ev@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZNSt13__future_base19_Async_state_commonD1Ev@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZNSt13__future_base19_Async_state_commonD2Ev@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZNSt16nested_exceptionD0Ev@CXXABI_1.3.5 4.6
+ _ZNSt16nested_exceptionD1Ev@CXXABI_1.3.5 4.6
+ _ZNSt16nested_exceptionD2Ev@CXXABI_1.3.5 4.6
+ _ZTINSt13__future_base11_State_baseE@GLIBCXX_3.4.15 4.6
+ _ZTINSt13__future_base12_Result_baseE@GLIBCXX_3.4.15 4.6
+ _ZTINSt13__future_base19_Async_state_commonE@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZTISt16nested_exception@CXXABI_1.3.5 4.6
+ _ZTSNSt13__future_base19_Async_state_commonE@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZTVNSt13__future_base11_State_baseE@GLIBCXX_3.4.15 4.6
+ _ZTVNSt13__future_base12_Result_baseE@GLIBCXX_3.4.15 4.6
+ _ZTVNSt13__future_base19_Async_state_commonE@GLIBCXX_3.4.17 4.7.0~rc1
+ _ZTVSt16nested_exception@CXXABI_1.3.5 4.6
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.powerpc
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.powerpc
@@ -0,0 +1,9 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.powerpcspe
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.powerpcspe
@@ -0,0 +1,8 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ppc64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ppc64
@@ -0,0 +1,11 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.ppc64el
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.ppc64el
@@ -0,0 +1,11 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.s390
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.s390
@@ -0,0 +1,558 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.common"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1
+ _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1
+ _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1
+ _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1
+ _ZNKSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1
+ _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1
+ _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0
+ _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7
+ _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0
+ _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_mw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4.5 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC1EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EPKwmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mm@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEC2EmwRKS1_@GLIBCXX_3.4 4.1.1
+ _ZNSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi3getEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi4readEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSi6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSi6ignoreEii@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPci@GLIBCXX_3.4 4.1.1
+ _ZNSi7getlineEPcic@GLIBCXX_3.4 4.1.1
+ _ZNSi8readsomeEPci@GLIBCXX_3.4 4.1.1
+ _ZNSo5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSo5writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSo8_M_writeEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSs10_S_compareEmm@GLIBCXX_3.4.16 4.7
+ _ZNSs12_S_constructEmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs14_M_replace_auxEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs15_M_replace_safeEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs18_S_construct_aux_2EmcRKSaIcE@GLIBCXX_3.4.14 4.5.0
+ _ZNSs2atEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs4_Rep8_M_cloneERKSaIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSs4_Rep9_S_createEmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSs5eraseEmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6appendEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6assignEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEN9__gnu_cxx17__normal_iteratorIPcSsEEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs6insertEmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEm@GLIBCXX_3.4 4.1.1
+ _ZNSs6resizeEmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_copyEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7_M_moveEPcPKcm@GLIBCXX_3.4.5 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_PKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEN9__gnu_cxx17__normal_iteratorIPcSsEES2_mc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKc@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSs@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmRKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSs7replaceEmmmc@GLIBCXX_3.4 4.1.1
+ _ZNSs7reserveEm@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4 4.1.1
+ _ZNSs9_M_assignEPcmc@GLIBCXX_3.4.5 4.1.1
+ _ZNSs9_M_mutateEmmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC1ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC1EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EPKcmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmm@GLIBCXX_3.4 4.1.1
+ _ZNSsC2ERKSsmmRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsC2EmcRKSaIcE@GLIBCXX_3.4 4.1.1
+ _ZNSsixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC1EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt10istrstreamC2EPci@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2EPSt18__moneypunct_cacheIcLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2EPSt18__moneypunct_cacheIcLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2EPSt18__moneypunct_cacheIwLb0EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2EPSt18__moneypunct_cacheIwLb1EEm@GLIBCXX_3.4 4.1.1
+ _ZNSt10moneypunctIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2EPSt17__timepunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2EPSt17__timepunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt11__timepunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt11this_thread11__sleep_forENSt6chrono8durationIxSt5ratioILx1ELx1EEEENS1_IxS2_ILx1ELx1000000000EEEE@GLIBCXX_3.4.18 4.8
+ _ZNSt12__basic_fileIcE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE7seekoffExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcE8xsputn_2EPKciS2_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12ctype_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_allocEm@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambuf8_M_setupEPcS0_i@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC1Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPFPvmEPFvS0_E@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKai@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPKhi@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPaiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPciS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2EPhiS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt12strstreambufC2Ei@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE22_M_convert_to_externalEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE13_M_set_bufferEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE22_M_convert_to_externalEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7_M_seekExSt12_Ios_Seekdir11__mbstate_t@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE3getEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE4readEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE5seekgExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEi@GLIBCXX_3.4.5 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE6ignoreEij@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE7getlineEPwiw@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_istreamIwSt11char_traitsIwEE8readsomeEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5seekpExSt12_Ios_Seekdir@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE5writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt13basic_ostreamIwSt11char_traitsIwEE8_M_writeEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIcc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14codecvt_bynameIwc11__mbstate_tEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt14collate_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE5sputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIcSt11char_traitsIcEE9pubsetbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE5sputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_streambufIwSt11char_traitsIwEE9pubsetbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE6setbufEPci@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS4_x@GLIBCXX_3.4.16 4.7
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE6setbufEPwi@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwmm@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1
+ _ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS4_x@GLIBCXX_3.4.16 4.7
+ _ZNSt15messages_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15messages_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15numpunct_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt16__numpunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17__timepunct_cacheIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIcLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb0EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt17moneypunct_bynameIwLb1EEC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIcLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb0EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt18__moneypunct_cacheIwLb1EEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC1EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EP15__locale_structPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIcEC2EPKtbm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt5ctypeIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC1EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6gslice8_IndexerC2EmRKSt8valarrayImES4_@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_Impl16_M_install_cacheEPKNS_5facetEm@GLIBCXX_3.4.7 4.1.1
+ _ZNSt6locale5_ImplC1EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2EPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2ERKS0_m@GLIBCXX_3.4 4.1.1
+ _ZNSt6locale5_ImplC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIcc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7codecvtIwc11__mbstate_tEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt7collateIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2EP15__locale_structPKcm@GLIBCXX_3.4 4.1.1
+ _ZNSt8messagesIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2EPSt16__numpunct_cacheIcEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIcEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EP15__locale_structm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2EPSt16__numpunct_cacheIwEm@GLIBCXX_3.4 4.1.1
+ _ZNSt8numpunctIwEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2ERKS0_@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED1Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImED2Ev@GLIBCXX_3.4 4.1.1
+ _ZNSt8valarrayImEixEm@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1
+ _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1
+ _ZSt11_Hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt15_Fnv_hash_bytesPKvmm@CXXABI_1.3.5 4.6
+ _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_i@GLIBCXX_3.4.9 4.2.1
+ _ZSt17__copy_streambufsIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__copy_streambufsIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.6 4.1.1
+ _ZSt17__verify_groupingPKcmRKSs@GLIBCXX_3.4.10 4.3
+ _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1
+ _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1
+ _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1
+ _Znam@GLIBCXX_3.4 4.1.1
+ _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ _Znwm@GLIBCXX_3.4 4.1.1
+ _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit.s390"
+ _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
+ _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.s390x
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.s390x
@@ -0,0 +1,13 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+ _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1
+#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1
+#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.64bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.sh4
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.sh4
@@ -0,0 +1,8 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.sparc
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.sparc
@@ -0,0 +1,9 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.excprop"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+#include "libstdc++6.symbols.glibcxxmath"
+#include "libstdc++6.symbols.ldbl.32bit"
+#include "libstdc++6.symbols.money.f128"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.sparc64
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.sparc64
@@ -0,0 +1,11 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.64bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.money.ldbl"
+ _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1
+ _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1
+# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc.
+# #include "libstdc++6.symbols.ldbl.64bit"
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
--- gcc-5-5.4.0.orig/debian/libstdc++6.symbols.x32
+++ gcc-5-5.4.0/debian/libstdc++6.symbols.x32
@@ -0,0 +1,27 @@
+libstdc++.so.6 libstdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvjS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
+ _ZTIPKn@CXXABI_1.3.5 4.9.0
+ _ZTIPKo@CXXABI_1.3.5 4.9.0
+ _ZTIPn@CXXABI_1.3.5 4.9.0
+ _ZTIPo@CXXABI_1.3.5 4.9.0
+ _ZTIn@CXXABI_1.3.5 4.9.0
+ _ZTIo@CXXABI_1.3.5 4.9.0
+ _ZTSPKn@CXXABI_1.3.9 4.9.0
+ _ZTSPKo@CXXABI_1.3.9 4.9.0
+ _ZTSPn@CXXABI_1.3.9 4.9.0
+ _ZTSPo@CXXABI_1.3.9 4.9.0
+ _ZTSn@CXXABI_1.3.9 4.9.0
+ _ZTSo@CXXABI_1.3.9 4.9.0
--- gcc-5-5.4.0.orig/debian/libstdc++CXX.postinst
+++ gcc-5-5.4.0/debian/libstdc++CXX.postinst
@@ -0,0 +1,18 @@
+#! /bin/sh -e
+
+case "$1" in
+    configure)
+	docdir=/usr/share/doc/libstdc++@CXX@
+	if [ -d $docdir ] && [ ! -h $docdir ]; then
+	    rm -rf $docdir
+	    ln -s gcc-@BV@-base $docdir
+	fi
+
+	if [ -n "$2" ] && [ -d /usr/share/gcc-4.9 ] && dpkg --compare-versions "$2" lt 5.1.1-10; then
+	    find /usr/share/gcc-4.9/python -name __pycache__ -type d -print0 | xargs -r0 rm -rf
+	    find /usr/share/gcc-4.9/python -name '*.py[co]' -type f -print0 | xargs -r0 rm -f
+	    find /usr/share/gcc-4.9 -empty -delete 2>/dev/null || true
+	fi
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libstdc++CXX.prerm
+++ gcc-5-5.4.0/debian/libstdc++CXX.prerm
@@ -0,0 +1,13 @@
+#! /bin/sh
+
+set -e
+
+case "$1" in
+    remove|upgrade)
+	files=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {$NF=sprintf("__pycache__/%s.*.py[co]", substr($NF,1,length($NF)-3)); print}')
+	rm -f $files
+	dirs=$(dpkg -L libstdc++@CXX@@TARGET_QUAL@ | awk -F/ 'BEGIN {OFS="/"} /\.py$/ {NF--; print}' | sort -u)
+	find $dirs -mindepth 1 -maxdepth 1 -name __pycache__ -type d -empty | xargs -r rmdir
+esac
+
+#DEBHELPER#
--- gcc-5-5.4.0.orig/debian/libtsan0.symbols
+++ gcc-5-5.4.0/debian/libtsan0.symbols
@@ -0,0 +1,1703 @@
+libtsan.so.0 libtsan0 #MINVER#
+ AnnotateBenignRace@Base 4.9
+ AnnotateBenignRaceSized@Base 4.9
+ AnnotateCondVarSignal@Base 4.9
+ AnnotateCondVarSignalAll@Base 4.9
+ AnnotateCondVarWait@Base 4.9
+ AnnotateEnableRaceDetection@Base 4.9
+ AnnotateExpectRace@Base 4.9
+ AnnotateFlushExpectedRaces@Base 4.9
+ AnnotateFlushState@Base 4.9
+ AnnotateHappensAfter@Base 4.9
+ AnnotateHappensBefore@Base 4.9
+ AnnotateIgnoreReadsBegin@Base 4.9
+ AnnotateIgnoreReadsEnd@Base 4.9
+ AnnotateIgnoreSyncBegin@Base 4.9
+ AnnotateIgnoreSyncEnd@Base 4.9
+ AnnotateIgnoreWritesBegin@Base 4.9
+ AnnotateIgnoreWritesEnd@Base 4.9
+ AnnotateMemoryIsInitialized@Base 4.9
+ AnnotateMemoryIsUninitialized@Base 5
+ AnnotateMutexIsNotPHB@Base 4.9
+ AnnotateMutexIsUsedAsCondVar@Base 4.9
+ AnnotateNewMemory@Base 4.9
+ AnnotateNoOp@Base 4.9
+ AnnotatePCQCreate@Base 4.9
+ AnnotatePCQDestroy@Base 4.9
+ AnnotatePCQGet@Base 4.9
+ AnnotatePCQPut@Base 4.9
+ AnnotatePublishMemoryRange@Base 4.9
+ AnnotateRWLockAcquired@Base 4.9
+ AnnotateRWLockCreate@Base 4.9
+ AnnotateRWLockCreateStatic@Base 4.9
+ AnnotateRWLockDestroy@Base 4.9
+ AnnotateRWLockReleased@Base 4.9
+ AnnotateThreadName@Base 4.9
+ AnnotateTraceMemory@Base 4.9
+ AnnotateUnpublishMemoryRange@Base 4.9
+ RunningOnValgrind@Base 4.9
+ ThreadSanitizerQuery@Base 4.9
+ ValgrindSlowdown@Base 4.9
+ WTFAnnotateBenignRaceSized@Base 4.9
+ WTFAnnotateHappensAfter@Base 4.9
+ WTFAnnotateHappensBefore@Base 4.9
+ _ZN11__sanitizer11CheckFailedEPKciS1_yy@Base 4.9
+ _ZN11__sanitizer7OnPrintEPKc@Base 4.9
+ _ZN6__tsan10OnFinalizeEb@Base 4.9
+ _ZN6__tsan12OnInitializeEv@Base 5
+ _ZN6__tsan8OnReportEPKNS_10ReportDescEb@Base 4.9
+ _ZdaPv@Base 4.9
+ _ZdaPvRKSt9nothrow_t@Base 4.9
+ _ZdlPv@Base 4.9
+ _ZdlPvRKSt9nothrow_t@Base 4.9
+ _Znam@Base 4.9
+ _ZnamRKSt9nothrow_t@Base 4.9
+ _Znwm@Base 4.9
+ _ZnwmRKSt9nothrow_t@Base 4.9
+ __asan_backtrace_alloc@Base 4.9
+ __asan_backtrace_close@Base 4.9
+ __asan_backtrace_create_state@Base 4.9
+ __asan_backtrace_dwarf_add@Base 4.9
+ __asan_backtrace_free@Base 4.9
+ __asan_backtrace_get_view@Base 4.9
+ __asan_backtrace_initialize@Base 4.9
+ __asan_backtrace_open@Base 4.9
+ __asan_backtrace_pcinfo@Base 4.9
+ __asan_backtrace_qsort@Base 4.9
+ __asan_backtrace_release_view@Base 4.9
+ __asan_backtrace_syminfo@Base 4.9
+ __asan_backtrace_vector_finish@Base 4.9
+ __asan_backtrace_vector_grow@Base 4.9
+ __asan_backtrace_vector_release@Base 4.9
+ __asan_cplus_demangle_builtin_types@Base 4.9
+ __asan_cplus_demangle_fill_ctor@Base 4.9
+ __asan_cplus_demangle_fill_dtor@Base 4.9
+ __asan_cplus_demangle_fill_extended_operator@Base 4.9
+ __asan_cplus_demangle_fill_name@Base 4.9
+ __asan_cplus_demangle_init_info@Base 4.9
+ __asan_cplus_demangle_mangled_name@Base 4.9
+ __asan_cplus_demangle_operators@Base 4.9
+ __asan_cplus_demangle_print@Base 4.9
+ __asan_cplus_demangle_print_callback@Base 4.9
+ __asan_cplus_demangle_type@Base 4.9
+ __asan_cplus_demangle_v3@Base 4.9
+ __asan_cplus_demangle_v3_callback@Base 4.9
+ __asan_internal_memcmp@Base 4.9
+ __asan_internal_memcpy@Base 4.9
+ __asan_internal_memset@Base 4.9
+ __asan_internal_strcmp@Base 4.9
+ __asan_internal_strlen@Base 4.9
+ __asan_internal_strncmp@Base 4.9
+ __asan_internal_strnlen@Base 4.9
+ __asan_is_gnu_v3_mangled_ctor@Base 4.9
+ __asan_is_gnu_v3_mangled_dtor@Base 4.9
+ __asan_java_demangle_v3@Base 4.9
+ __asan_java_demangle_v3_callback@Base 4.9
+ __close@Base 4.9
+ __cxa_atexit@Base 4.9
+ __cxa_guard_abort@Base 4.9
+ __cxa_guard_acquire@Base 4.9
+ __cxa_guard_release@Base 4.9
+ __fxstat64@Base 4.9
+ __fxstat@Base 4.9
+ __getdelim@Base 5
+ __interceptor___close@Base 4.9
+ __interceptor___cxa_atexit@Base 4.9
+ __interceptor___fxstat64@Base 4.9
+ __interceptor___fxstat@Base 4.9
+ __interceptor___getdelim@Base 5
+ __interceptor___isoc99_fprintf@Base 5
+ __interceptor___isoc99_fscanf@Base 4.9
+ __interceptor___isoc99_printf@Base 5
+ __interceptor___isoc99_scanf@Base 4.9
+ __interceptor___isoc99_snprintf@Base 5
+ __interceptor___isoc99_sprintf@Base 5
+ __interceptor___isoc99_sscanf@Base 4.9
+ __interceptor___isoc99_vfprintf@Base 5
+ __interceptor___isoc99_vfscanf@Base 4.9
+ __interceptor___isoc99_vprintf@Base 5
+ __interceptor___isoc99_vscanf@Base 4.9
+ __interceptor___isoc99_vsnprintf@Base 5
+ __interceptor___isoc99_vsprintf@Base 5
+ __interceptor___isoc99_vsscanf@Base 4.9
+ __interceptor___libc_memalign@Base 4.9
+ __interceptor___lxstat64@Base 4.9
+ __interceptor___lxstat@Base 4.9
+ __interceptor___overflow@Base 5
+ __interceptor___res_iclose@Base 4.9
+ __interceptor___sigsetjmp@Base 4.9
+ __interceptor___tls_get_addr@Base 5
+ __interceptor___uflow@Base 5
+ __interceptor___underflow@Base 5
+ __interceptor___woverflow@Base 5
+ __interceptor___wuflow@Base 5
+ __interceptor___wunderflow@Base 5
+ __interceptor___xpg_strerror_r@Base 4.9
+ __interceptor___xstat64@Base 4.9
+ __interceptor___xstat@Base 4.9
+ __interceptor__exit@Base 4.9
+ __interceptor__obstack_begin@Base 5
+ __interceptor__obstack_begin_1@Base 5
+ __interceptor__obstack_newchunk@Base 5
+ __interceptor__setjmp@Base 4.9
+ __interceptor_abort@Base 4.9
+ __interceptor_accept4@Base 4.9
+ __interceptor_accept@Base 4.9
+ __interceptor_aligned_alloc@Base 5
+ __interceptor_asctime@Base 4.9
+ __interceptor_asctime_r@Base 4.9
+ __interceptor_asprintf@Base 5
+ __interceptor_atexit@Base 4.9
+ __interceptor_backtrace@Base 4.9
+ __interceptor_backtrace_symbols@Base 4.9
+ __interceptor_bind@Base 4.9
+ __interceptor_calloc@Base 4.9
+ __interceptor_canonicalize_file_name@Base 4.9
+ __interceptor_capget@Base 5
+ __interceptor_capset@Base 5
+ __interceptor_cfree@Base 4.9
+ __interceptor_clock_getres@Base 4.9
+ __interceptor_clock_gettime@Base 4.9
+ __interceptor_clock_settime@Base 4.9
+ __interceptor_close@Base 4.9
+ __interceptor_confstr@Base 4.9
+ __interceptor_connect@Base 4.9
+ __interceptor_creat64@Base 4.9
+ __interceptor_creat@Base 4.9
+ __interceptor_ctime@Base 4.9
+ __interceptor_ctime_r@Base 4.9
+ __interceptor_dlclose@Base 4.9
+ __interceptor_dlopen@Base 4.9
+ __interceptor_drand48_r@Base 4.9
+ __interceptor_dup2@Base 4.9
+ __interceptor_dup3@Base 4.9
+ __interceptor_dup@Base 4.9
+ __interceptor_endgrent@Base 5
+ __interceptor_endpwent@Base 5
+ __interceptor_epoll_create1@Base 4.9
+ __interceptor_epoll_create@Base 4.9
+ __interceptor_epoll_ctl@Base 4.9
+ __interceptor_epoll_wait@Base 4.9
+ __interceptor_ether_aton@Base 4.9
+ __interceptor_ether_aton_r@Base 4.9
+ __interceptor_ether_hostton@Base 4.9
+ __interceptor_ether_line@Base 4.9
+ __interceptor_ether_ntoa@Base 4.9
+ __interceptor_ether_ntoa_r@Base 4.9
+ __interceptor_ether_ntohost@Base 4.9
+ __interceptor_eventfd@Base 4.9
+ __interceptor_fclose@Base 4.9
+ __interceptor_fdopen@Base 5
+ __interceptor_fflush@Base 4.9
+ __interceptor_fgetxattr@Base 5
+ __interceptor_flistxattr@Base 5
+ __interceptor_fmemopen@Base 5
+ __interceptor_fopen64@Base 5
+ __interceptor_fopen@Base 4.9
+ __interceptor_fork@Base 4.9
+ __interceptor_fprintf@Base 5
+ __interceptor_fread@Base 4.9
+ __interceptor_free@Base 4.9
+ __interceptor_freopen64@Base 5
+ __interceptor_freopen@Base 4.9
+ __interceptor_frexp@Base 4.9
+ __interceptor_frexpf@Base 4.9
+ __interceptor_frexpl@Base 4.9
+ __interceptor_fscanf@Base 4.9
+ __interceptor_fstat64@Base 4.9
+ __interceptor_fstat@Base 4.9
+ __interceptor_fstatfs64@Base 4.9
+ __interceptor_fstatfs@Base 4.9
+ __interceptor_fstatvfs64@Base 4.9
+ __interceptor_fstatvfs@Base 4.9
+ __interceptor_ftime@Base 5
+ __interceptor_fwrite@Base 4.9
+ __interceptor_get_current_dir_name@Base 4.9
+ __interceptor_getaddrinfo@Base 4.9
+ __interceptor_getcwd@Base 4.9
+ __interceptor_getdelim@Base 4.9
+ __interceptor_getgroups@Base 4.9
+ __interceptor_gethostbyaddr@Base 4.9
+ __interceptor_gethostbyaddr_r@Base 4.9
+ __interceptor_gethostbyname2@Base 4.9
+ __interceptor_gethostbyname2_r@Base 4.9
+ __interceptor_gethostbyname@Base 4.9
+ __interceptor_gethostbyname_r@Base 4.9
+ __interceptor_gethostent@Base 4.9
+ __interceptor_gethostent_r@Base 4.9
+ __interceptor_getifaddrs@Base 5
+ __interceptor_getitimer@Base 4.9
+ __interceptor_getline@Base 4.9
+ __interceptor_getmntent@Base 4.9
+ __interceptor_getmntent_r@Base 4.9
+ __interceptor_getnameinfo@Base 5
+ __interceptor_getpass@Base 5
+ __interceptor_getpeername@Base 4.9
+ __interceptor_getresgid@Base 5
+ __interceptor_getresuid@Base 5
+ __interceptor_getsockname@Base 4.9
+ __interceptor_getsockopt@Base 4.9
+ __interceptor_gettimeofday@Base 4.9
+ __interceptor_getxattr@Base 5
+ __interceptor_glob64@Base 5
+ __interceptor_glob@Base 5
+ __interceptor_gmtime@Base 4.9
+ __interceptor_gmtime_r@Base 4.9
+ __interceptor_iconv@Base 4.9
+ __interceptor_if_indextoname@Base 5
+ __interceptor_if_nametoindex@Base 5
+ __interceptor_inet_aton@Base 4.9
+ __interceptor_inet_ntop@Base 4.9
+ __interceptor_inet_pton@Base 4.9
+ __interceptor_initgroups@Base 4.9
+ __interceptor_inotify_init1@Base 4.9
+ __interceptor_inotify_init@Base 4.9
+ __interceptor_ioctl@Base 4.9
+ __interceptor_kill@Base 4.9
+ __interceptor_lgamma@Base 4.9
+ __interceptor_lgamma_r@Base 4.9
+ __interceptor_lgammaf@Base 4.9
+ __interceptor_lgammaf_r@Base 4.9
+ __interceptor_lgammal@Base 4.9
+ __interceptor_lgammal_r@Base 4.9
+ __interceptor_lgetxattr@Base 5
+ __interceptor_listen@Base 4.9
+ __interceptor_listxattr@Base 5
+ __interceptor_llistxattr@Base 5
+ __interceptor_localtime@Base 4.9
+ __interceptor_localtime_r@Base 4.9
+ __interceptor_longjmp@Base 4.9
+ __interceptor_lrand48_r@Base 4.9
+ __interceptor_lstat64@Base 4.9
+ __interceptor_lstat@Base 4.9
+ __interceptor_malloc@Base 4.9
+ __interceptor_malloc_usable_size@Base 4.9
+ __interceptor_mbsnrtowcs@Base 4.9
+ __interceptor_mbsrtowcs@Base 4.9
+ __interceptor_mbstowcs@Base 4.9
+ __interceptor_memalign@Base 4.9
+ __interceptor_memchr@Base 4.9
+ __interceptor_memcmp@Base 4.9
+ __interceptor_memcpy@Base 4.9
+ __interceptor_memmove@Base 4.9
+ __interceptor_memrchr@Base 4.9
+ __interceptor_memset@Base 4.9
+ __interceptor_mktime@Base 5
+ __interceptor_mlock@Base 4.9
+ __interceptor_mlockall@Base 4.9
+ __interceptor_mmap64@Base 4.9
+ __interceptor_mmap@Base 4.9
+ __interceptor_modf@Base 4.9
+ __interceptor_modff@Base 4.9
+ __interceptor_modfl@Base 4.9
+ __interceptor_munlock@Base 4.9
+ __interceptor_munlockall@Base 4.9
+ __interceptor_munmap@Base 4.9
+ __interceptor_nanosleep@Base 4.9
+ __interceptor_on_exit@Base 4.9
+ __interceptor_open64@Base 4.9
+ __interceptor_open@Base 4.9
+ __interceptor_open_memstream@Base 5
+ __interceptor_open_wmemstream@Base 5
+ __interceptor_opendir@Base 4.9
+ __interceptor_pipe2@Base 4.9
+ __interceptor_pipe@Base 4.9
+ __interceptor_poll@Base 4.9
+ __interceptor_posix_memalign@Base 4.9
+ __interceptor_ppoll@Base 4.9
+ __interceptor_prctl@Base 4.9
+ __interceptor_pread64@Base 4.9
+ __interceptor_pread@Base 4.9
+ __interceptor_preadv64@Base 4.9
+ __interceptor_preadv@Base 4.9
+ __interceptor_printf@Base 5
+ __interceptor_pthread_attr_getaffinity_np@Base 4.9
+ __interceptor_pthread_attr_getdetachstate@Base 4.9
+ __interceptor_pthread_attr_getguardsize@Base 4.9
+ __interceptor_pthread_attr_getinheritsched@Base 4.9
+ __interceptor_pthread_attr_getschedparam@Base 4.9
+ __interceptor_pthread_attr_getschedpolicy@Base 4.9
+ __interceptor_pthread_attr_getscope@Base 4.9
+ __interceptor_pthread_attr_getstack@Base 4.9
+ __interceptor_pthread_attr_getstacksize@Base 4.9
+ __interceptor_pthread_barrier_destroy@Base 4.9
+ __interceptor_pthread_barrier_init@Base 4.9
+ __interceptor_pthread_barrier_wait@Base 4.9
+ __interceptor_pthread_barrierattr_getpshared@Base 5
+ __interceptor_pthread_cond_broadcast@Base 4.9
+ __interceptor_pthread_cond_destroy@Base 4.9
+ __interceptor_pthread_cond_init@Base 4.9
+ __interceptor_pthread_cond_signal@Base 4.9
+ __interceptor_pthread_cond_timedwait@Base 4.9
+ __interceptor_pthread_cond_wait@Base 4.9
+ __interceptor_pthread_condattr_getclock@Base 5
+ __interceptor_pthread_condattr_getpshared@Base 5
+ __interceptor_pthread_create@Base 4.9
+ __interceptor_pthread_detach@Base 4.9
+ __interceptor_pthread_getschedparam@Base 4.9
+ __interceptor_pthread_join@Base 4.9
+ __interceptor_pthread_kill@Base 4.9
+ __interceptor_pthread_mutex_destroy@Base 4.9
+ __interceptor_pthread_mutex_init@Base 4.9
+ __interceptor_pthread_mutex_lock@Base 4.9
+ __interceptor_pthread_mutex_timedlock@Base 4.9
+ __interceptor_pthread_mutex_trylock@Base 4.9
+ __interceptor_pthread_mutex_unlock@Base 4.9
+ __interceptor_pthread_mutexattr_getprioceiling@Base 5
+ __interceptor_pthread_mutexattr_getprotocol@Base 5
+ __interceptor_pthread_mutexattr_getpshared@Base 5
+ __interceptor_pthread_mutexattr_getrobust@Base 5
+ __interceptor_pthread_mutexattr_getrobust_np@Base 5
+ __interceptor_pthread_mutexattr_gettype@Base 5
+ __interceptor_pthread_once@Base 4.9
+ __interceptor_pthread_rwlock_destroy@Base 4.9
+ __interceptor_pthread_rwlock_init@Base 4.9
+ __interceptor_pthread_rwlock_rdlock@Base 4.9
+ __interceptor_pthread_rwlock_timedrdlock@Base 4.9
+ __interceptor_pthread_rwlock_timedwrlock@Base 4.9
+ __interceptor_pthread_rwlock_tryrdlock@Base 4.9
+ __interceptor_pthread_rwlock_trywrlock@Base 4.9
+ __interceptor_pthread_rwlock_unlock@Base 4.9
+ __interceptor_pthread_rwlock_wrlock@Base 4.9
+ __interceptor_pthread_rwlockattr_getkind_np@Base 5
+ __interceptor_pthread_rwlockattr_getpshared@Base 5
+ __interceptor_pthread_setname_np@Base 4.9
+ __interceptor_pthread_spin_destroy@Base 4.9
+ __interceptor_pthread_spin_init@Base 4.9
+ __interceptor_pthread_spin_lock@Base 4.9
+ __interceptor_pthread_spin_trylock@Base 4.9
+ __interceptor_pthread_spin_unlock@Base 4.9
+ __interceptor_ptrace@Base 4.9
+ __interceptor_puts@Base 4.9
+ __interceptor_pvalloc@Base 4.9
+ __interceptor_pwrite64@Base 4.9
+ __interceptor_pwrite@Base 4.9
+ __interceptor_pwritev64@Base 4.9
+ __interceptor_pwritev@Base 4.9
+ __interceptor_raise@Base 4.9
+ __interceptor_rand_r@Base 5
+ __interceptor_random_r@Base 4.9
+ __interceptor_read@Base 4.9
+ __interceptor_readdir64@Base 4.9
+ __interceptor_readdir64_r@Base 4.9
+ __interceptor_readdir@Base 4.9
+ __interceptor_readdir_r@Base 4.9
+ __interceptor_readv@Base 4.9
+ __interceptor_realloc@Base 4.9
+ __interceptor_realpath@Base 4.9
+ __interceptor_recv@Base 4.9
+ __interceptor_recvmsg@Base 4.9
+ __interceptor_remquo@Base 4.9
+ __interceptor_remquof@Base 4.9
+ __interceptor_remquol@Base 4.9
+ __interceptor_rmdir@Base 4.9
+ __interceptor_scandir64@Base 4.9
+ __interceptor_scandir@Base 4.9
+ __interceptor_scanf@Base 4.9
+ __interceptor_sched_getaffinity@Base 4.9
+ __interceptor_sem_destroy@Base 4.9
+ __interceptor_sem_getvalue@Base 4.9
+ __interceptor_sem_init@Base 4.9
+ __interceptor_sem_post@Base 4.9
+ __interceptor_sem_timedwait@Base 4.9
+ __interceptor_sem_trywait@Base 4.9
+ __interceptor_sem_wait@Base 4.9
+ __interceptor_send@Base 4.9
+ __interceptor_sendmsg@Base 4.9
+ __interceptor_setgrent@Base 5
+ __interceptor_setitimer@Base 4.9
+ __interceptor_setjmp@Base 4.9
+ __interceptor_setlocale@Base 4.9
+ __interceptor_setpwent@Base 5
+ __interceptor_shmctl@Base 4.9
+ __interceptor_sigaction@Base 4.9
+ __interceptor_sigemptyset@Base 4.9
+ __interceptor_sigfillset@Base 4.9
+ __interceptor_siglongjmp@Base 4.9
+ __interceptor_signal@Base 4.9
+ __interceptor_signalfd@Base 4.9
+ __interceptor_sigpending@Base 4.9
+ __interceptor_sigprocmask@Base 4.9
+ __interceptor_sigsetjmp@Base 4.9
+ __interceptor_sigsuspend@Base 4.9
+ __interceptor_sigtimedwait@Base 4.9
+ __interceptor_sigwait@Base 4.9
+ __interceptor_sigwaitinfo@Base 4.9
+ __interceptor_sincos@Base 4.9
+ __interceptor_sincosf@Base 4.9
+ __interceptor_sincosl@Base 4.9
+ __interceptor_sleep@Base 4.9
+ __interceptor_snprintf@Base 5
+ __interceptor_socket@Base 4.9
+ __interceptor_socketpair@Base 4.9
+ __interceptor_sprintf@Base 5
+ __interceptor_sscanf@Base 4.9
+ __interceptor_stat64@Base 4.9
+ __interceptor_stat@Base 4.9
+ __interceptor_statfs64@Base 4.9
+ __interceptor_statfs@Base 4.9
+ __interceptor_statvfs64@Base 4.9
+ __interceptor_statvfs@Base 4.9
+ __interceptor_strcasecmp@Base 4.9
+ __interceptor_strchr@Base 4.9
+ __interceptor_strchrnul@Base 4.9
+ __interceptor_strcmp@Base 4.9
+ __interceptor_strcpy@Base 4.9
+ __interceptor_strdup@Base 4.9
+ __interceptor_strerror@Base 4.9
+ __interceptor_strerror_r@Base 4.9
+ __interceptor_strlen@Base 4.9
+ __interceptor_strncasecmp@Base 4.9
+ __interceptor_strncmp@Base 4.9
+ __interceptor_strncpy@Base 4.9
+ __interceptor_strptime@Base 4.9
+ __interceptor_strrchr@Base 4.9
+ __interceptor_strstr@Base 4.9
+ __interceptor_strtoimax@Base 4.9
+ __interceptor_strtoumax@Base 4.9
+ __interceptor_sysinfo@Base 4.9
+ __interceptor_tcgetattr@Base 4.9
+ __interceptor_tempnam@Base 4.9
+ __interceptor_textdomain@Base 4.9
+ __interceptor_time@Base 4.9
+ __interceptor_timerfd_gettime@Base 5
+ __interceptor_timerfd_settime@Base 5
+ __interceptor_times@Base 4.9
+ __interceptor_tmpfile64@Base 5
+ __interceptor_tmpfile@Base 5
+ __interceptor_tmpnam@Base 4.9
+ __interceptor_tmpnam_r@Base 4.9
+ __interceptor_tsearch@Base 5
+ __interceptor_unlink@Base 4.9
+ __interceptor_usleep@Base 4.9
+ __interceptor_valloc@Base 4.9
+ __interceptor_vasprintf@Base 5
+ __interceptor_vfork@Base 5
+ __interceptor_vfprintf@Base 5
+ __interceptor_vfscanf@Base 4.9
+ __interceptor_vprintf@Base 5
+ __interceptor_vscanf@Base 4.9
+ __interceptor_vsnprintf@Base 5
+ __interceptor_vsprintf@Base 5
+ __interceptor_vsscanf@Base 4.9
+ __interceptor_wait3@Base 4.9
+ __interceptor_wait4@Base 4.9
+ __interceptor_wait@Base 4.9
+ __interceptor_waitid@Base 4.9
+ __interceptor_waitpid@Base 4.9
+ __interceptor_wcsnrtombs@Base 4.9
+ __interceptor_wcsrtombs@Base 4.9
+ __interceptor_wcstombs@Base 4.9
+ __interceptor_wordexp@Base 4.9
+ __interceptor_write@Base 4.9
+ __interceptor_writev@Base 4.9
+ __interceptor_xdr_bool@Base 5
+ __interceptor_xdr_bytes@Base 5
+ __interceptor_xdr_char@Base 5
+ __interceptor_xdr_double@Base 5
+ __interceptor_xdr_enum@Base 5
+ __interceptor_xdr_float@Base 5
+ __interceptor_xdr_hyper@Base 5
+ __interceptor_xdr_int16_t@Base 5
+ __interceptor_xdr_int32_t@Base 5
+ __interceptor_xdr_int64_t@Base 5
+ __interceptor_xdr_int8_t@Base 5
+ __interceptor_xdr_int@Base 5
+ __interceptor_xdr_long@Base 5
+ __interceptor_xdr_longlong_t@Base 5
+ __interceptor_xdr_quad_t@Base 5
+ __interceptor_xdr_short@Base 5
+ __interceptor_xdr_string@Base 5
+ __interceptor_xdr_u_char@Base 5
+ __interceptor_xdr_u_hyper@Base 5
+ __interceptor_xdr_u_int@Base 5
+ __interceptor_xdr_u_long@Base 5
+ __interceptor_xdr_u_longlong_t@Base 5
+ __interceptor_xdr_u_quad_t@Base 5
+ __interceptor_xdr_u_short@Base 5
+ __interceptor_xdr_uint16_t@Base 5
+ __interceptor_xdr_uint32_t@Base 5
+ __interceptor_xdr_uint64_t@Base 5
+ __interceptor_xdr_uint8_t@Base 5
+ __interceptor_xdrmem_create@Base 5
+ __interceptor_xdrstdio_create@Base 5
+ __isoc99_fprintf@Base 5
+ __isoc99_fscanf@Base 4.9
+ __isoc99_printf@Base 5
+ __isoc99_scanf@Base 4.9
+ __isoc99_snprintf@Base 5
+ __isoc99_sprintf@Base 5
+ __isoc99_sscanf@Base 4.9
+ __isoc99_vfprintf@Base 5
+ __isoc99_vfscanf@Base 4.9
+ __isoc99_vprintf@Base 5
+ __isoc99_vscanf@Base 4.9
+ __isoc99_vsnprintf@Base 5
+ __isoc99_vsprintf@Base 5
+ __isoc99_vsscanf@Base 4.9
+ __libc_memalign@Base 4.9
+ __lxstat64@Base 4.9
+ __lxstat@Base 4.9
+ __overflow@Base 5
+ __res_iclose@Base 4.9
+ __sanitizer_cov@Base 4.9
+ __sanitizer_cov_dump@Base 4.9
+ __sanitizer_cov_indir_call16@Base 5
+ __sanitizer_cov_init@Base 5
+ __sanitizer_cov_module_init@Base 5
+ __sanitizer_free_hook@Base 5
+ __sanitizer_get_allocated_size@Base 5
+ __sanitizer_get_current_allocated_bytes@Base 5
+ __sanitizer_get_estimated_allocated_size@Base 5
+ __sanitizer_get_free_bytes@Base 5
+ __sanitizer_get_heap_size@Base 5
+ __sanitizer_get_ownership@Base 5
+ __sanitizer_get_unmapped_bytes@Base 5
+ __sanitizer_malloc_hook@Base 5
+ __sanitizer_maybe_open_cov_file@Base 5
+ __sanitizer_print_stack_trace@Base 5
+ __sanitizer_report_error_summary@Base 4.9
+ __sanitizer_sandbox_on_notify@Base 4.9
+ __sanitizer_set_report_path@Base 4.9
+ __sanitizer_syscall_post_impl_accept4@Base 4.9
+ __sanitizer_syscall_post_impl_accept@Base 4.9
+ __sanitizer_syscall_post_impl_access@Base 4.9
+ __sanitizer_syscall_post_impl_acct@Base 4.9
+ __sanitizer_syscall_post_impl_add_key@Base 4.9
+ __sanitizer_syscall_post_impl_adjtimex@Base 4.9
+ __sanitizer_syscall_post_impl_alarm@Base 4.9
+ __sanitizer_syscall_post_impl_bdflush@Base 4.9
+ __sanitizer_syscall_post_impl_bind@Base 4.9
+ __sanitizer_syscall_post_impl_brk@Base 4.9
+ __sanitizer_syscall_post_impl_capget@Base 4.9
+ __sanitizer_syscall_post_impl_capset@Base 4.9
+ __sanitizer_syscall_post_impl_chdir@Base 4.9
+ __sanitizer_syscall_post_impl_chmod@Base 4.9
+ __sanitizer_syscall_post_impl_chown@Base 4.9
+ __sanitizer_syscall_post_impl_chroot@Base 4.9
+ __sanitizer_syscall_post_impl_clock_adjtime@Base 4.9
+ __sanitizer_syscall_post_impl_clock_getres@Base 4.9
+ __sanitizer_syscall_post_impl_clock_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_clock_nanosleep@Base 4.9
+ __sanitizer_syscall_post_impl_clock_settime@Base 4.9
+ __sanitizer_syscall_post_impl_close@Base 4.9
+ __sanitizer_syscall_post_impl_connect@Base 4.9
+ __sanitizer_syscall_post_impl_creat@Base 4.9
+ __sanitizer_syscall_post_impl_delete_module@Base 4.9
+ __sanitizer_syscall_post_impl_dup2@Base 4.9
+ __sanitizer_syscall_post_impl_dup3@Base 4.9
+ __sanitizer_syscall_post_impl_dup@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_create1@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_create@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_ctl@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_pwait@Base 4.9
+ __sanitizer_syscall_post_impl_epoll_wait@Base 4.9
+ __sanitizer_syscall_post_impl_eventfd2@Base 4.9
+ __sanitizer_syscall_post_impl_eventfd@Base 4.9
+ __sanitizer_syscall_post_impl_exit@Base 4.9
+ __sanitizer_syscall_post_impl_exit_group@Base 4.9
+ __sanitizer_syscall_post_impl_faccessat@Base 4.9
+ __sanitizer_syscall_post_impl_fchdir@Base 4.9
+ __sanitizer_syscall_post_impl_fchmod@Base 4.9
+ __sanitizer_syscall_post_impl_fchmodat@Base 4.9
+ __sanitizer_syscall_post_impl_fchown@Base 4.9
+ __sanitizer_syscall_post_impl_fchownat@Base 4.9
+ __sanitizer_syscall_post_impl_fcntl64@Base 4.9
+ __sanitizer_syscall_post_impl_fcntl@Base 4.9
+ __sanitizer_syscall_post_impl_fdatasync@Base 4.9
+ __sanitizer_syscall_post_impl_fgetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_flistxattr@Base 4.9
+ __sanitizer_syscall_post_impl_flock@Base 4.9
+ __sanitizer_syscall_post_impl_fork@Base 4.9
+ __sanitizer_syscall_post_impl_fremovexattr@Base 4.9
+ __sanitizer_syscall_post_impl_fsetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_fstat64@Base 4.9
+ __sanitizer_syscall_post_impl_fstat@Base 4.9
+ __sanitizer_syscall_post_impl_fstatat64@Base 4.9
+ __sanitizer_syscall_post_impl_fstatfs64@Base 4.9
+ __sanitizer_syscall_post_impl_fstatfs@Base 4.9
+ __sanitizer_syscall_post_impl_fsync@Base 4.9
+ __sanitizer_syscall_post_impl_ftruncate@Base 4.9
+ __sanitizer_syscall_post_impl_futimesat@Base 4.9
+ __sanitizer_syscall_post_impl_get_mempolicy@Base 4.9
+ __sanitizer_syscall_post_impl_get_robust_list@Base 4.9
+ __sanitizer_syscall_post_impl_getcpu@Base 4.9
+ __sanitizer_syscall_post_impl_getcwd@Base 4.9
+ __sanitizer_syscall_post_impl_getdents64@Base 4.9
+ __sanitizer_syscall_post_impl_getdents@Base 4.9
+ __sanitizer_syscall_post_impl_getegid@Base 4.9
+ __sanitizer_syscall_post_impl_geteuid@Base 4.9
+ __sanitizer_syscall_post_impl_getgid@Base 4.9
+ __sanitizer_syscall_post_impl_getgroups@Base 4.9
+ __sanitizer_syscall_post_impl_gethostname@Base 4.9
+ __sanitizer_syscall_post_impl_getitimer@Base 4.9
+ __sanitizer_syscall_post_impl_getpeername@Base 4.9
+ __sanitizer_syscall_post_impl_getpgid@Base 4.9
+ __sanitizer_syscall_post_impl_getpgrp@Base 4.9
+ __sanitizer_syscall_post_impl_getpid@Base 4.9
+ __sanitizer_syscall_post_impl_getppid@Base 4.9
+ __sanitizer_syscall_post_impl_getpriority@Base 4.9
+ __sanitizer_syscall_post_impl_getresgid@Base 4.9
+ __sanitizer_syscall_post_impl_getresuid@Base 4.9
+ __sanitizer_syscall_post_impl_getrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_getrusage@Base 4.9
+ __sanitizer_syscall_post_impl_getsid@Base 4.9
+ __sanitizer_syscall_post_impl_getsockname@Base 4.9
+ __sanitizer_syscall_post_impl_getsockopt@Base 4.9
+ __sanitizer_syscall_post_impl_gettid@Base 4.9
+ __sanitizer_syscall_post_impl_gettimeofday@Base 4.9
+ __sanitizer_syscall_post_impl_getuid@Base 4.9
+ __sanitizer_syscall_post_impl_getxattr@Base 4.9
+ __sanitizer_syscall_post_impl_init_module@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_add_watch@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_init1@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_init@Base 4.9
+ __sanitizer_syscall_post_impl_inotify_rm_watch@Base 4.9
+ __sanitizer_syscall_post_impl_io_cancel@Base 4.9
+ __sanitizer_syscall_post_impl_io_destroy@Base 4.9
+ __sanitizer_syscall_post_impl_io_getevents@Base 4.9
+ __sanitizer_syscall_post_impl_io_setup@Base 4.9
+ __sanitizer_syscall_post_impl_io_submit@Base 4.9
+ __sanitizer_syscall_post_impl_ioctl@Base 4.9
+ __sanitizer_syscall_post_impl_ioperm@Base 4.9
+ __sanitizer_syscall_post_impl_ioprio_get@Base 4.9
+ __sanitizer_syscall_post_impl_ioprio_set@Base 4.9
+ __sanitizer_syscall_post_impl_ipc@Base 4.9
+ __sanitizer_syscall_post_impl_kexec_load@Base 4.9
+ __sanitizer_syscall_post_impl_keyctl@Base 4.9
+ __sanitizer_syscall_post_impl_kill@Base 4.9
+ __sanitizer_syscall_post_impl_lchown@Base 4.9
+ __sanitizer_syscall_post_impl_lgetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_link@Base 4.9
+ __sanitizer_syscall_post_impl_linkat@Base 4.9
+ __sanitizer_syscall_post_impl_listen@Base 4.9
+ __sanitizer_syscall_post_impl_listxattr@Base 4.9
+ __sanitizer_syscall_post_impl_llistxattr@Base 4.9
+ __sanitizer_syscall_post_impl_llseek@Base 4.9
+ __sanitizer_syscall_post_impl_lookup_dcookie@Base 4.9
+ __sanitizer_syscall_post_impl_lremovexattr@Base 4.9
+ __sanitizer_syscall_post_impl_lseek@Base 4.9
+ __sanitizer_syscall_post_impl_lsetxattr@Base 4.9
+ __sanitizer_syscall_post_impl_lstat64@Base 4.9
+ __sanitizer_syscall_post_impl_lstat@Base 4.9
+ __sanitizer_syscall_post_impl_madvise@Base 4.9
+ __sanitizer_syscall_post_impl_mbind@Base 4.9
+ __sanitizer_syscall_post_impl_migrate_pages@Base 4.9
+ __sanitizer_syscall_post_impl_mincore@Base 4.9
+ __sanitizer_syscall_post_impl_mkdir@Base 4.9
+ __sanitizer_syscall_post_impl_mkdirat@Base 4.9
+ __sanitizer_syscall_post_impl_mknod@Base 4.9
+ __sanitizer_syscall_post_impl_mknodat@Base 4.9
+ __sanitizer_syscall_post_impl_mlock@Base 4.9
+ __sanitizer_syscall_post_impl_mlockall@Base 4.9
+ __sanitizer_syscall_post_impl_mmap_pgoff@Base 4.9
+ __sanitizer_syscall_post_impl_mount@Base 4.9
+ __sanitizer_syscall_post_impl_move_pages@Base 4.9
+ __sanitizer_syscall_post_impl_mprotect@Base 4.9
+ __sanitizer_syscall_post_impl_mq_getsetattr@Base 4.9
+ __sanitizer_syscall_post_impl_mq_notify@Base 4.9
+ __sanitizer_syscall_post_impl_mq_open@Base 4.9
+ __sanitizer_syscall_post_impl_mq_timedreceive@Base 4.9
+ __sanitizer_syscall_post_impl_mq_timedsend@Base 4.9
+ __sanitizer_syscall_post_impl_mq_unlink@Base 4.9
+ __sanitizer_syscall_post_impl_mremap@Base 4.9
+ __sanitizer_syscall_post_impl_msgctl@Base 4.9
+ __sanitizer_syscall_post_impl_msgget@Base 4.9
+ __sanitizer_syscall_post_impl_msgrcv@Base 4.9
+ __sanitizer_syscall_post_impl_msgsnd@Base 4.9
+ __sanitizer_syscall_post_impl_msync@Base 4.9
+ __sanitizer_syscall_post_impl_munlock@Base 4.9
+ __sanitizer_syscall_post_impl_munlockall@Base 4.9
+ __sanitizer_syscall_post_impl_munmap@Base 4.9
+ __sanitizer_syscall_post_impl_name_to_handle_at@Base 4.9
+ __sanitizer_syscall_post_impl_nanosleep@Base 4.9
+ __sanitizer_syscall_post_impl_newfstat@Base 4.9
+ __sanitizer_syscall_post_impl_newfstatat@Base 4.9
+ __sanitizer_syscall_post_impl_newlstat@Base 4.9
+ __sanitizer_syscall_post_impl_newstat@Base 4.9
+ __sanitizer_syscall_post_impl_newuname@Base 4.9
+ __sanitizer_syscall_post_impl_ni_syscall@Base 4.9
+ __sanitizer_syscall_post_impl_nice@Base 4.9
+ __sanitizer_syscall_post_impl_old_getrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_old_mmap@Base 4.9
+ __sanitizer_syscall_post_impl_old_readdir@Base 4.9
+ __sanitizer_syscall_post_impl_old_select@Base 4.9
+ __sanitizer_syscall_post_impl_oldumount@Base 4.9
+ __sanitizer_syscall_post_impl_olduname@Base 4.9
+ __sanitizer_syscall_post_impl_open@Base 4.9
+ __sanitizer_syscall_post_impl_open_by_handle_at@Base 4.9
+ __sanitizer_syscall_post_impl_openat@Base 4.9
+ __sanitizer_syscall_post_impl_pause@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_iobase@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_read@Base 4.9
+ __sanitizer_syscall_post_impl_pciconfig_write@Base 4.9
+ __sanitizer_syscall_post_impl_perf_event_open@Base 4.9
+ __sanitizer_syscall_post_impl_personality@Base 4.9
+ __sanitizer_syscall_post_impl_pipe2@Base 4.9
+ __sanitizer_syscall_post_impl_pipe@Base 4.9
+ __sanitizer_syscall_post_impl_pivot_root@Base 4.9
+ __sanitizer_syscall_post_impl_poll@Base 4.9
+ __sanitizer_syscall_post_impl_ppoll@Base 4.9
+ __sanitizer_syscall_post_impl_pread64@Base 4.9
+ __sanitizer_syscall_post_impl_preadv@Base 4.9
+ __sanitizer_syscall_post_impl_prlimit64@Base 4.9
+ __sanitizer_syscall_post_impl_process_vm_readv@Base 4.9
+ __sanitizer_syscall_post_impl_process_vm_writev@Base 4.9
+ __sanitizer_syscall_post_impl_pselect6@Base 4.9
+ __sanitizer_syscall_post_impl_ptrace@Base 4.9
+ __sanitizer_syscall_post_impl_pwrite64@Base 4.9
+ __sanitizer_syscall_post_impl_pwritev@Base 4.9
+ __sanitizer_syscall_post_impl_quotactl@Base 4.9
+ __sanitizer_syscall_post_impl_read@Base 4.9
+ __sanitizer_syscall_post_impl_readlink@Base 4.9
+ __sanitizer_syscall_post_impl_readlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_readv@Base 4.9
+ __sanitizer_syscall_post_impl_reboot@Base 4.9
+ __sanitizer_syscall_post_impl_recv@Base 4.9
+ __sanitizer_syscall_post_impl_recvfrom@Base 4.9
+ __sanitizer_syscall_post_impl_recvmmsg@Base 4.9
+ __sanitizer_syscall_post_impl_recvmsg@Base 4.9
+ __sanitizer_syscall_post_impl_remap_file_pages@Base 4.9
+ __sanitizer_syscall_post_impl_removexattr@Base 4.9
+ __sanitizer_syscall_post_impl_rename@Base 4.9
+ __sanitizer_syscall_post_impl_renameat@Base 4.9
+ __sanitizer_syscall_post_impl_request_key@Base 4.9
+ __sanitizer_syscall_post_impl_restart_syscall@Base 4.9
+ __sanitizer_syscall_post_impl_rmdir@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigpending@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigprocmask@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigqueueinfo@Base 4.9
+ __sanitizer_syscall_post_impl_rt_sigtimedwait@Base 4.9
+ __sanitizer_syscall_post_impl_rt_tgsigqueueinfo@Base 4.9
+ __sanitizer_syscall_post_impl_sched_get_priority_max@Base 4.9
+ __sanitizer_syscall_post_impl_sched_get_priority_min@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getaffinity@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getparam@Base 4.9
+ __sanitizer_syscall_post_impl_sched_getscheduler@Base 4.9
+ __sanitizer_syscall_post_impl_sched_rr_get_interval@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setaffinity@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setparam@Base 4.9
+ __sanitizer_syscall_post_impl_sched_setscheduler@Base 4.9
+ __sanitizer_syscall_post_impl_sched_yield@Base 4.9
+ __sanitizer_syscall_post_impl_select@Base 4.9
+ __sanitizer_syscall_post_impl_semctl@Base 4.9
+ __sanitizer_syscall_post_impl_semget@Base 4.9
+ __sanitizer_syscall_post_impl_semop@Base 4.9
+ __sanitizer_syscall_post_impl_semtimedop@Base 4.9
+ __sanitizer_syscall_post_impl_send@Base 4.9
+ __sanitizer_syscall_post_impl_sendfile64@Base 4.9
+ __sanitizer_syscall_post_impl_sendfile@Base 4.9
+ __sanitizer_syscall_post_impl_sendmmsg@Base 4.9
+ __sanitizer_syscall_post_impl_sendmsg@Base 4.9
+ __sanitizer_syscall_post_impl_sendto@Base 4.9
+ __sanitizer_syscall_post_impl_set_mempolicy@Base 4.9
+ __sanitizer_syscall_post_impl_set_robust_list@Base 4.9
+ __sanitizer_syscall_post_impl_set_tid_address@Base 4.9
+ __sanitizer_syscall_post_impl_setdomainname@Base 4.9
+ __sanitizer_syscall_post_impl_setfsgid@Base 4.9
+ __sanitizer_syscall_post_impl_setfsuid@Base 4.9
+ __sanitizer_syscall_post_impl_setgid@Base 4.9
+ __sanitizer_syscall_post_impl_setgroups@Base 4.9
+ __sanitizer_syscall_post_impl_sethostname@Base 4.9
+ __sanitizer_syscall_post_impl_setitimer@Base 4.9
+ __sanitizer_syscall_post_impl_setns@Base 4.9
+ __sanitizer_syscall_post_impl_setpgid@Base 4.9
+ __sanitizer_syscall_post_impl_setpriority@Base 4.9
+ __sanitizer_syscall_post_impl_setregid@Base 4.9
+ __sanitizer_syscall_post_impl_setresgid@Base 4.9
+ __sanitizer_syscall_post_impl_setresuid@Base 4.9
+ __sanitizer_syscall_post_impl_setreuid@Base 4.9
+ __sanitizer_syscall_post_impl_setrlimit@Base 4.9
+ __sanitizer_syscall_post_impl_setsid@Base 4.9
+ __sanitizer_syscall_post_impl_setsockopt@Base 4.9
+ __sanitizer_syscall_post_impl_settimeofday@Base 4.9
+ __sanitizer_syscall_post_impl_setuid@Base 4.9
+ __sanitizer_syscall_post_impl_setxattr@Base 4.9
+ __sanitizer_syscall_post_impl_sgetmask@Base 4.9
+ __sanitizer_syscall_post_impl_shmat@Base 4.9
+ __sanitizer_syscall_post_impl_shmctl@Base 4.9
+ __sanitizer_syscall_post_impl_shmdt@Base 4.9
+ __sanitizer_syscall_post_impl_shmget@Base 4.9
+ __sanitizer_syscall_post_impl_shutdown@Base 4.9
+ __sanitizer_syscall_post_impl_signal@Base 4.9
+ __sanitizer_syscall_post_impl_signalfd4@Base 4.9
+ __sanitizer_syscall_post_impl_signalfd@Base 4.9
+ __sanitizer_syscall_post_impl_sigpending@Base 4.9
+ __sanitizer_syscall_post_impl_sigprocmask@Base 4.9
+ __sanitizer_syscall_post_impl_socket@Base 4.9
+ __sanitizer_syscall_post_impl_socketcall@Base 4.9
+ __sanitizer_syscall_post_impl_socketpair@Base 4.9
+ __sanitizer_syscall_post_impl_splice@Base 4.9
+ __sanitizer_syscall_post_impl_spu_create@Base 4.9
+ __sanitizer_syscall_post_impl_spu_run@Base 4.9
+ __sanitizer_syscall_post_impl_ssetmask@Base 4.9
+ __sanitizer_syscall_post_impl_stat64@Base 4.9
+ __sanitizer_syscall_post_impl_stat@Base 4.9
+ __sanitizer_syscall_post_impl_statfs64@Base 4.9
+ __sanitizer_syscall_post_impl_statfs@Base 4.9
+ __sanitizer_syscall_post_impl_stime@Base 4.9
+ __sanitizer_syscall_post_impl_swapoff@Base 4.9
+ __sanitizer_syscall_post_impl_swapon@Base 4.9
+ __sanitizer_syscall_post_impl_symlink@Base 4.9
+ __sanitizer_syscall_post_impl_symlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_sync@Base 4.9
+ __sanitizer_syscall_post_impl_syncfs@Base 4.9
+ __sanitizer_syscall_post_impl_sysctl@Base 4.9
+ __sanitizer_syscall_post_impl_sysfs@Base 4.9
+ __sanitizer_syscall_post_impl_sysinfo@Base 4.9
+ __sanitizer_syscall_post_impl_syslog@Base 4.9
+ __sanitizer_syscall_post_impl_tee@Base 4.9
+ __sanitizer_syscall_post_impl_tgkill@Base 4.9
+ __sanitizer_syscall_post_impl_time@Base 4.9
+ __sanitizer_syscall_post_impl_timer_create@Base 4.9
+ __sanitizer_syscall_post_impl_timer_delete@Base 4.9
+ __sanitizer_syscall_post_impl_timer_getoverrun@Base 4.9
+ __sanitizer_syscall_post_impl_timer_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_timer_settime@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_create@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_gettime@Base 4.9
+ __sanitizer_syscall_post_impl_timerfd_settime@Base 4.9
+ __sanitizer_syscall_post_impl_times@Base 4.9
+ __sanitizer_syscall_post_impl_tkill@Base 4.9
+ __sanitizer_syscall_post_impl_truncate@Base 4.9
+ __sanitizer_syscall_post_impl_umask@Base 4.9
+ __sanitizer_syscall_post_impl_umount@Base 4.9
+ __sanitizer_syscall_post_impl_uname@Base 4.9
+ __sanitizer_syscall_post_impl_unlink@Base 4.9
+ __sanitizer_syscall_post_impl_unlinkat@Base 4.9
+ __sanitizer_syscall_post_impl_unshare@Base 4.9
+ __sanitizer_syscall_post_impl_uselib@Base 4.9
+ __sanitizer_syscall_post_impl_ustat@Base 4.9
+ __sanitizer_syscall_post_impl_utime@Base 4.9
+ __sanitizer_syscall_post_impl_utimensat@Base 4.9
+ __sanitizer_syscall_post_impl_utimes@Base 4.9
+ __sanitizer_syscall_post_impl_vfork@Base 4.9
+ __sanitizer_syscall_post_impl_vhangup@Base 4.9
+ __sanitizer_syscall_post_impl_vmsplice@Base 4.9
+ __sanitizer_syscall_post_impl_wait4@Base 4.9
+ __sanitizer_syscall_post_impl_waitid@Base 4.9
+ __sanitizer_syscall_post_impl_waitpid@Base 4.9
+ __sanitizer_syscall_post_impl_write@Base 4.9
+ __sanitizer_syscall_post_impl_writev@Base 4.9
+ __sanitizer_syscall_pre_impl_accept4@Base 4.9
+ __sanitizer_syscall_pre_impl_accept@Base 4.9
+ __sanitizer_syscall_pre_impl_access@Base 4.9
+ __sanitizer_syscall_pre_impl_acct@Base 4.9
+ __sanitizer_syscall_pre_impl_add_key@Base 4.9
+ __sanitizer_syscall_pre_impl_adjtimex@Base 4.9
+ __sanitizer_syscall_pre_impl_alarm@Base 4.9
+ __sanitizer_syscall_pre_impl_bdflush@Base 4.9
+ __sanitizer_syscall_pre_impl_bind@Base 4.9
+ __sanitizer_syscall_pre_impl_brk@Base 4.9
+ __sanitizer_syscall_pre_impl_capget@Base 4.9
+ __sanitizer_syscall_pre_impl_capset@Base 4.9
+ __sanitizer_syscall_pre_impl_chdir@Base 4.9
+ __sanitizer_syscall_pre_impl_chmod@Base 4.9
+ __sanitizer_syscall_pre_impl_chown@Base 4.9
+ __sanitizer_syscall_pre_impl_chroot@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_adjtime@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_getres@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_nanosleep@Base 4.9
+ __sanitizer_syscall_pre_impl_clock_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_close@Base 4.9
+ __sanitizer_syscall_pre_impl_connect@Base 4.9
+ __sanitizer_syscall_pre_impl_creat@Base 4.9
+ __sanitizer_syscall_pre_impl_delete_module@Base 4.9
+ __sanitizer_syscall_pre_impl_dup2@Base 4.9
+ __sanitizer_syscall_pre_impl_dup3@Base 4.9
+ __sanitizer_syscall_pre_impl_dup@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_create1@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_create@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_ctl@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_pwait@Base 4.9
+ __sanitizer_syscall_pre_impl_epoll_wait@Base 4.9
+ __sanitizer_syscall_pre_impl_eventfd2@Base 4.9
+ __sanitizer_syscall_pre_impl_eventfd@Base 4.9
+ __sanitizer_syscall_pre_impl_exit@Base 4.9
+ __sanitizer_syscall_pre_impl_exit_group@Base 4.9
+ __sanitizer_syscall_pre_impl_faccessat@Base 4.9
+ __sanitizer_syscall_pre_impl_fchdir@Base 4.9
+ __sanitizer_syscall_pre_impl_fchmod@Base 4.9
+ __sanitizer_syscall_pre_impl_fchmodat@Base 4.9
+ __sanitizer_syscall_pre_impl_fchown@Base 4.9
+ __sanitizer_syscall_pre_impl_fchownat@Base 4.9
+ __sanitizer_syscall_pre_impl_fcntl64@Base 4.9
+ __sanitizer_syscall_pre_impl_fcntl@Base 4.9
+ __sanitizer_syscall_pre_impl_fdatasync@Base 4.9
+ __sanitizer_syscall_pre_impl_fgetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_flistxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_flock@Base 4.9
+ __sanitizer_syscall_pre_impl_fork@Base 4.9
+ __sanitizer_syscall_pre_impl_fremovexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_fsetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_fstat64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstat@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatat64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatfs64@Base 4.9
+ __sanitizer_syscall_pre_impl_fstatfs@Base 4.9
+ __sanitizer_syscall_pre_impl_fsync@Base 4.9
+ __sanitizer_syscall_pre_impl_ftruncate@Base 4.9
+ __sanitizer_syscall_pre_impl_futimesat@Base 4.9
+ __sanitizer_syscall_pre_impl_get_mempolicy@Base 4.9
+ __sanitizer_syscall_pre_impl_get_robust_list@Base 4.9
+ __sanitizer_syscall_pre_impl_getcpu@Base 4.9
+ __sanitizer_syscall_pre_impl_getcwd@Base 4.9
+ __sanitizer_syscall_pre_impl_getdents64@Base 4.9
+ __sanitizer_syscall_pre_impl_getdents@Base 4.9
+ __sanitizer_syscall_pre_impl_getegid@Base 4.9
+ __sanitizer_syscall_pre_impl_geteuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getgroups@Base 4.9
+ __sanitizer_syscall_pre_impl_gethostname@Base 4.9
+ __sanitizer_syscall_pre_impl_getitimer@Base 4.9
+ __sanitizer_syscall_pre_impl_getpeername@Base 4.9
+ __sanitizer_syscall_pre_impl_getpgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getpgrp@Base 4.9
+ __sanitizer_syscall_pre_impl_getpid@Base 4.9
+ __sanitizer_syscall_pre_impl_getppid@Base 4.9
+ __sanitizer_syscall_pre_impl_getpriority@Base 4.9
+ __sanitizer_syscall_pre_impl_getresgid@Base 4.9
+ __sanitizer_syscall_pre_impl_getresuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_getrusage@Base 4.9
+ __sanitizer_syscall_pre_impl_getsid@Base 4.9
+ __sanitizer_syscall_pre_impl_getsockname@Base 4.9
+ __sanitizer_syscall_pre_impl_getsockopt@Base 4.9
+ __sanitizer_syscall_pre_impl_gettid@Base 4.9
+ __sanitizer_syscall_pre_impl_gettimeofday@Base 4.9
+ __sanitizer_syscall_pre_impl_getuid@Base 4.9
+ __sanitizer_syscall_pre_impl_getxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_init_module@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_add_watch@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_init1@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_init@Base 4.9
+ __sanitizer_syscall_pre_impl_inotify_rm_watch@Base 4.9
+ __sanitizer_syscall_pre_impl_io_cancel@Base 4.9
+ __sanitizer_syscall_pre_impl_io_destroy@Base 4.9
+ __sanitizer_syscall_pre_impl_io_getevents@Base 4.9
+ __sanitizer_syscall_pre_impl_io_setup@Base 4.9
+ __sanitizer_syscall_pre_impl_io_submit@Base 4.9
+ __sanitizer_syscall_pre_impl_ioctl@Base 4.9
+ __sanitizer_syscall_pre_impl_ioperm@Base 4.9
+ __sanitizer_syscall_pre_impl_ioprio_get@Base 4.9
+ __sanitizer_syscall_pre_impl_ioprio_set@Base 4.9
+ __sanitizer_syscall_pre_impl_ipc@Base 4.9
+ __sanitizer_syscall_pre_impl_kexec_load@Base 4.9
+ __sanitizer_syscall_pre_impl_keyctl@Base 4.9
+ __sanitizer_syscall_pre_impl_kill@Base 4.9
+ __sanitizer_syscall_pre_impl_lchown@Base 4.9
+ __sanitizer_syscall_pre_impl_lgetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_link@Base 4.9
+ __sanitizer_syscall_pre_impl_linkat@Base 4.9
+ __sanitizer_syscall_pre_impl_listen@Base 4.9
+ __sanitizer_syscall_pre_impl_listxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_llistxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_llseek@Base 4.9
+ __sanitizer_syscall_pre_impl_lookup_dcookie@Base 4.9
+ __sanitizer_syscall_pre_impl_lremovexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_lseek@Base 4.9
+ __sanitizer_syscall_pre_impl_lsetxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_lstat64@Base 4.9
+ __sanitizer_syscall_pre_impl_lstat@Base 4.9
+ __sanitizer_syscall_pre_impl_madvise@Base 4.9
+ __sanitizer_syscall_pre_impl_mbind@Base 4.9
+ __sanitizer_syscall_pre_impl_migrate_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_mincore@Base 4.9
+ __sanitizer_syscall_pre_impl_mkdir@Base 4.9
+ __sanitizer_syscall_pre_impl_mkdirat@Base 4.9
+ __sanitizer_syscall_pre_impl_mknod@Base 4.9
+ __sanitizer_syscall_pre_impl_mknodat@Base 4.9
+ __sanitizer_syscall_pre_impl_mlock@Base 4.9
+ __sanitizer_syscall_pre_impl_mlockall@Base 4.9
+ __sanitizer_syscall_pre_impl_mmap_pgoff@Base 4.9
+ __sanitizer_syscall_pre_impl_mount@Base 4.9
+ __sanitizer_syscall_pre_impl_move_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_mprotect@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_getsetattr@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_notify@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_open@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_timedreceive@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_timedsend@Base 4.9
+ __sanitizer_syscall_pre_impl_mq_unlink@Base 4.9
+ __sanitizer_syscall_pre_impl_mremap@Base 4.9
+ __sanitizer_syscall_pre_impl_msgctl@Base 4.9
+ __sanitizer_syscall_pre_impl_msgget@Base 4.9
+ __sanitizer_syscall_pre_impl_msgrcv@Base 4.9
+ __sanitizer_syscall_pre_impl_msgsnd@Base 4.9
+ __sanitizer_syscall_pre_impl_msync@Base 4.9
+ __sanitizer_syscall_pre_impl_munlock@Base 4.9
+ __sanitizer_syscall_pre_impl_munlockall@Base 4.9
+ __sanitizer_syscall_pre_impl_munmap@Base 4.9
+ __sanitizer_syscall_pre_impl_name_to_handle_at@Base 4.9
+ __sanitizer_syscall_pre_impl_nanosleep@Base 4.9
+ __sanitizer_syscall_pre_impl_newfstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newfstatat@Base 4.9
+ __sanitizer_syscall_pre_impl_newlstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newstat@Base 4.9
+ __sanitizer_syscall_pre_impl_newuname@Base 4.9
+ __sanitizer_syscall_pre_impl_ni_syscall@Base 4.9
+ __sanitizer_syscall_pre_impl_nice@Base 4.9
+ __sanitizer_syscall_pre_impl_old_getrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_old_mmap@Base 4.9
+ __sanitizer_syscall_pre_impl_old_readdir@Base 4.9
+ __sanitizer_syscall_pre_impl_old_select@Base 4.9
+ __sanitizer_syscall_pre_impl_oldumount@Base 4.9
+ __sanitizer_syscall_pre_impl_olduname@Base 4.9
+ __sanitizer_syscall_pre_impl_open@Base 4.9
+ __sanitizer_syscall_pre_impl_open_by_handle_at@Base 4.9
+ __sanitizer_syscall_pre_impl_openat@Base 4.9
+ __sanitizer_syscall_pre_impl_pause@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_iobase@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_read@Base 4.9
+ __sanitizer_syscall_pre_impl_pciconfig_write@Base 4.9
+ __sanitizer_syscall_pre_impl_perf_event_open@Base 4.9
+ __sanitizer_syscall_pre_impl_personality@Base 4.9
+ __sanitizer_syscall_pre_impl_pipe2@Base 4.9
+ __sanitizer_syscall_pre_impl_pipe@Base 4.9
+ __sanitizer_syscall_pre_impl_pivot_root@Base 4.9
+ __sanitizer_syscall_pre_impl_poll@Base 4.9
+ __sanitizer_syscall_pre_impl_ppoll@Base 4.9
+ __sanitizer_syscall_pre_impl_pread64@Base 4.9
+ __sanitizer_syscall_pre_impl_preadv@Base 4.9
+ __sanitizer_syscall_pre_impl_prlimit64@Base 4.9
+ __sanitizer_syscall_pre_impl_process_vm_readv@Base 4.9
+ __sanitizer_syscall_pre_impl_process_vm_writev@Base 4.9
+ __sanitizer_syscall_pre_impl_pselect6@Base 4.9
+ __sanitizer_syscall_pre_impl_ptrace@Base 4.9
+ __sanitizer_syscall_pre_impl_pwrite64@Base 4.9
+ __sanitizer_syscall_pre_impl_pwritev@Base 4.9
+ __sanitizer_syscall_pre_impl_quotactl@Base 4.9
+ __sanitizer_syscall_pre_impl_read@Base 4.9
+ __sanitizer_syscall_pre_impl_readlink@Base 4.9
+ __sanitizer_syscall_pre_impl_readlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_readv@Base 4.9
+ __sanitizer_syscall_pre_impl_reboot@Base 4.9
+ __sanitizer_syscall_pre_impl_recv@Base 4.9
+ __sanitizer_syscall_pre_impl_recvfrom@Base 4.9
+ __sanitizer_syscall_pre_impl_recvmmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_recvmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_remap_file_pages@Base 4.9
+ __sanitizer_syscall_pre_impl_removexattr@Base 4.9
+ __sanitizer_syscall_pre_impl_rename@Base 4.9
+ __sanitizer_syscall_pre_impl_renameat@Base 4.9
+ __sanitizer_syscall_pre_impl_request_key@Base 4.9
+ __sanitizer_syscall_pre_impl_restart_syscall@Base 4.9
+ __sanitizer_syscall_pre_impl_rmdir@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigpending@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigprocmask@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigqueueinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_sigtimedwait@Base 4.9
+ __sanitizer_syscall_pre_impl_rt_tgsigqueueinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_get_priority_max@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_get_priority_min@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getaffinity@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getparam@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_getscheduler@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_rr_get_interval@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setaffinity@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setparam@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_setscheduler@Base 4.9
+ __sanitizer_syscall_pre_impl_sched_yield@Base 4.9
+ __sanitizer_syscall_pre_impl_select@Base 4.9
+ __sanitizer_syscall_pre_impl_semctl@Base 4.9
+ __sanitizer_syscall_pre_impl_semget@Base 4.9
+ __sanitizer_syscall_pre_impl_semop@Base 4.9
+ __sanitizer_syscall_pre_impl_semtimedop@Base 4.9
+ __sanitizer_syscall_pre_impl_send@Base 4.9
+ __sanitizer_syscall_pre_impl_sendfile64@Base 4.9
+ __sanitizer_syscall_pre_impl_sendfile@Base 4.9
+ __sanitizer_syscall_pre_impl_sendmmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_sendmsg@Base 4.9
+ __sanitizer_syscall_pre_impl_sendto@Base 4.9
+ __sanitizer_syscall_pre_impl_set_mempolicy@Base 4.9
+ __sanitizer_syscall_pre_impl_set_robust_list@Base 4.9
+ __sanitizer_syscall_pre_impl_set_tid_address@Base 4.9
+ __sanitizer_syscall_pre_impl_setdomainname@Base 4.9
+ __sanitizer_syscall_pre_impl_setfsgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setfsuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setgroups@Base 4.9
+ __sanitizer_syscall_pre_impl_sethostname@Base 4.9
+ __sanitizer_syscall_pre_impl_setitimer@Base 4.9
+ __sanitizer_syscall_pre_impl_setns@Base 4.9
+ __sanitizer_syscall_pre_impl_setpgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setpriority@Base 4.9
+ __sanitizer_syscall_pre_impl_setregid@Base 4.9
+ __sanitizer_syscall_pre_impl_setresgid@Base 4.9
+ __sanitizer_syscall_pre_impl_setresuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setreuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setrlimit@Base 4.9
+ __sanitizer_syscall_pre_impl_setsid@Base 4.9
+ __sanitizer_syscall_pre_impl_setsockopt@Base 4.9
+ __sanitizer_syscall_pre_impl_settimeofday@Base 4.9
+ __sanitizer_syscall_pre_impl_setuid@Base 4.9
+ __sanitizer_syscall_pre_impl_setxattr@Base 4.9
+ __sanitizer_syscall_pre_impl_sgetmask@Base 4.9
+ __sanitizer_syscall_pre_impl_shmat@Base 4.9
+ __sanitizer_syscall_pre_impl_shmctl@Base 4.9
+ __sanitizer_syscall_pre_impl_shmdt@Base 4.9
+ __sanitizer_syscall_pre_impl_shmget@Base 4.9
+ __sanitizer_syscall_pre_impl_shutdown@Base 4.9
+ __sanitizer_syscall_pre_impl_signal@Base 4.9
+ __sanitizer_syscall_pre_impl_signalfd4@Base 4.9
+ __sanitizer_syscall_pre_impl_signalfd@Base 4.9
+ __sanitizer_syscall_pre_impl_sigpending@Base 4.9
+ __sanitizer_syscall_pre_impl_sigprocmask@Base 4.9
+ __sanitizer_syscall_pre_impl_socket@Base 4.9
+ __sanitizer_syscall_pre_impl_socketcall@Base 4.9
+ __sanitizer_syscall_pre_impl_socketpair@Base 4.9
+ __sanitizer_syscall_pre_impl_splice@Base 4.9
+ __sanitizer_syscall_pre_impl_spu_create@Base 4.9
+ __sanitizer_syscall_pre_impl_spu_run@Base 4.9
+ __sanitizer_syscall_pre_impl_ssetmask@Base 4.9
+ __sanitizer_syscall_pre_impl_stat64@Base 4.9
+ __sanitizer_syscall_pre_impl_stat@Base 4.9
+ __sanitizer_syscall_pre_impl_statfs64@Base 4.9
+ __sanitizer_syscall_pre_impl_statfs@Base 4.9
+ __sanitizer_syscall_pre_impl_stime@Base 4.9
+ __sanitizer_syscall_pre_impl_swapoff@Base 4.9
+ __sanitizer_syscall_pre_impl_swapon@Base 4.9
+ __sanitizer_syscall_pre_impl_symlink@Base 4.9
+ __sanitizer_syscall_pre_impl_symlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_sync@Base 4.9
+ __sanitizer_syscall_pre_impl_syncfs@Base 4.9
+ __sanitizer_syscall_pre_impl_sysctl@Base 4.9
+ __sanitizer_syscall_pre_impl_sysfs@Base 4.9
+ __sanitizer_syscall_pre_impl_sysinfo@Base 4.9
+ __sanitizer_syscall_pre_impl_syslog@Base 4.9
+ __sanitizer_syscall_pre_impl_tee@Base 4.9
+ __sanitizer_syscall_pre_impl_tgkill@Base 4.9
+ __sanitizer_syscall_pre_impl_time@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_create@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_delete@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_getoverrun@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_timer_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_create@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_gettime@Base 4.9
+ __sanitizer_syscall_pre_impl_timerfd_settime@Base 4.9
+ __sanitizer_syscall_pre_impl_times@Base 4.9
+ __sanitizer_syscall_pre_impl_tkill@Base 4.9
+ __sanitizer_syscall_pre_impl_truncate@Base 4.9
+ __sanitizer_syscall_pre_impl_umask@Base 4.9
+ __sanitizer_syscall_pre_impl_umount@Base 4.9
+ __sanitizer_syscall_pre_impl_uname@Base 4.9
+ __sanitizer_syscall_pre_impl_unlink@Base 4.9
+ __sanitizer_syscall_pre_impl_unlinkat@Base 4.9
+ __sanitizer_syscall_pre_impl_unshare@Base 4.9
+ __sanitizer_syscall_pre_impl_uselib@Base 4.9
+ __sanitizer_syscall_pre_impl_ustat@Base 4.9
+ __sanitizer_syscall_pre_impl_utime@Base 4.9
+ __sanitizer_syscall_pre_impl_utimensat@Base 4.9
+ __sanitizer_syscall_pre_impl_utimes@Base 4.9
+ __sanitizer_syscall_pre_impl_vfork@Base 4.9
+ __sanitizer_syscall_pre_impl_vhangup@Base 4.9
+ __sanitizer_syscall_pre_impl_vmsplice@Base 4.9
+ __sanitizer_syscall_pre_impl_wait4@Base 4.9
+ __sanitizer_syscall_pre_impl_waitid@Base 4.9
+ __sanitizer_syscall_pre_impl_waitpid@Base 4.9
+ __sanitizer_syscall_pre_impl_write@Base 4.9
+ __sanitizer_syscall_pre_impl_writev@Base 4.9
+ __sanitizer_unaligned_load16@Base 4.9
+ __sanitizer_unaligned_load32@Base 4.9
+ __sanitizer_unaligned_load64@Base 4.9
+ __sanitizer_unaligned_store16@Base 4.9
+ __sanitizer_unaligned_store32@Base 4.9
+ __sanitizer_unaligned_store64@Base 4.9
+ __sigsetjmp@Base 4.9
+ __tls_get_addr@Base 5
+ __tsan_acquire@Base 4.9
+ __tsan_atomic128_compare_exchange_strong@Base 4.9
+ __tsan_atomic128_compare_exchange_val@Base 4.9
+ __tsan_atomic128_compare_exchange_weak@Base 4.9
+ __tsan_atomic128_exchange@Base 4.9
+ __tsan_atomic128_fetch_add@Base 4.9
+ __tsan_atomic128_fetch_and@Base 4.9
+ __tsan_atomic128_fetch_nand@Base 4.9
+ __tsan_atomic128_fetch_or@Base 4.9
+ __tsan_atomic128_fetch_sub@Base 4.9
+ __tsan_atomic128_fetch_xor@Base 4.9
+ __tsan_atomic128_load@Base 4.9
+ __tsan_atomic128_store@Base 4.9
+ __tsan_atomic16_compare_exchange_strong@Base 4.9
+ __tsan_atomic16_compare_exchange_val@Base 4.9
+ __tsan_atomic16_compare_exchange_weak@Base 4.9
+ __tsan_atomic16_exchange@Base 4.9
+ __tsan_atomic16_fetch_add@Base 4.9
+ __tsan_atomic16_fetch_and@Base 4.9
+ __tsan_atomic16_fetch_nand@Base 4.9
+ __tsan_atomic16_fetch_or@Base 4.9
+ __tsan_atomic16_fetch_sub@Base 4.9
+ __tsan_atomic16_fetch_xor@Base 4.9
+ __tsan_atomic16_load@Base 4.9
+ __tsan_atomic16_store@Base 4.9
+ __tsan_atomic32_compare_exchange_strong@Base 4.9
+ __tsan_atomic32_compare_exchange_val@Base 4.9
+ __tsan_atomic32_compare_exchange_weak@Base 4.9
+ __tsan_atomic32_exchange@Base 4.9
+ __tsan_atomic32_fetch_add@Base 4.9
+ __tsan_atomic32_fetch_and@Base 4.9
+ __tsan_atomic32_fetch_nand@Base 4.9
+ __tsan_atomic32_fetch_or@Base 4.9
+ __tsan_atomic32_fetch_sub@Base 4.9
+ __tsan_atomic32_fetch_xor@Base 4.9
+ __tsan_atomic32_load@Base 4.9
+ __tsan_atomic32_store@Base 4.9
+ __tsan_atomic64_compare_exchange_strong@Base 4.9
+ __tsan_atomic64_compare_exchange_val@Base 4.9
+ __tsan_atomic64_compare_exchange_weak@Base 4.9
+ __tsan_atomic64_exchange@Base 4.9
+ __tsan_atomic64_fetch_add@Base 4.9
+ __tsan_atomic64_fetch_and@Base 4.9
+ __tsan_atomic64_fetch_nand@Base 4.9
+ __tsan_atomic64_fetch_or@Base 4.9
+ __tsan_atomic64_fetch_sub@Base 4.9
+ __tsan_atomic64_fetch_xor@Base 4.9
+ __tsan_atomic64_load@Base 4.9
+ __tsan_atomic64_store@Base 4.9
+ __tsan_atomic8_compare_exchange_strong@Base 4.9
+ __tsan_atomic8_compare_exchange_val@Base 4.9
+ __tsan_atomic8_compare_exchange_weak@Base 4.9
+ __tsan_atomic8_exchange@Base 4.9
+ __tsan_atomic8_fetch_add@Base 4.9
+ __tsan_atomic8_fetch_and@Base 4.9
+ __tsan_atomic8_fetch_nand@Base 4.9
+ __tsan_atomic8_fetch_or@Base 4.9
+ __tsan_atomic8_fetch_sub@Base 4.9
+ __tsan_atomic8_fetch_xor@Base 4.9
+ __tsan_atomic8_load@Base 4.9
+ __tsan_atomic8_store@Base 4.9
+ __tsan_atomic_signal_fence@Base 4.9
+ __tsan_atomic_thread_fence@Base 4.9
+ __tsan_default_options@Base 4.9
+ __tsan_func_entry@Base 4.9
+ __tsan_func_exit@Base 4.9
+ __tsan_init@Base 4.9
+ __tsan_java_alloc@Base 4.9
+ __tsan_java_finalize@Base 5
+ __tsan_java_fini@Base 4.9
+ __tsan_java_free@Base 4.9
+ __tsan_java_init@Base 4.9
+ __tsan_java_move@Base 4.9
+ __tsan_java_mutex_lock@Base 4.9
+ __tsan_java_mutex_lock_rec@Base 4.9
+ __tsan_java_mutex_read_lock@Base 4.9
+ __tsan_java_mutex_read_unlock@Base 4.9
+ __tsan_java_mutex_unlock@Base 4.9
+ __tsan_java_mutex_unlock_rec@Base 4.9
+ __tsan_read16@Base 4.9
+ __tsan_read1@Base 4.9
+ __tsan_read2@Base 4.9
+ __tsan_read4@Base 4.9
+ __tsan_read8@Base 4.9
+ __tsan_read_range@Base 4.9
+ __tsan_release@Base 4.9
+ __tsan_unaligned_read2@Base 4.9
+ __tsan_unaligned_read4@Base 4.9
+ __tsan_unaligned_read8@Base 4.9
+ __tsan_unaligned_write2@Base 4.9
+ __tsan_unaligned_write4@Base 4.9
+ __tsan_unaligned_write8@Base 4.9
+ __tsan_vptr_read@Base 4.9
+ __tsan_vptr_update@Base 4.9
+ __tsan_write16@Base 4.9
+ __tsan_write1@Base 4.9
+ __tsan_write2@Base 4.9
+ __tsan_write4@Base 4.9
+ __tsan_write8@Base 4.9
+ __tsan_write_range@Base 4.9
+ __uflow@Base 5
+ __underflow@Base 5
+ __woverflow@Base 5
+ __wuflow@Base 5
+ __wunderflow@Base 5
+ __xpg_strerror_r@Base 4.9
+ __xstat64@Base 4.9
+ __xstat@Base 4.9
+ _exit@Base 4.9
+ _obstack_begin@Base 5
+ _obstack_begin_1@Base 5
+ _obstack_newchunk@Base 5
+ _setjmp@Base 4.9
+ abort@Base 4.9
+ accept4@Base 4.9
+ accept@Base 4.9
+ aligned_alloc@Base 5
+ asctime@Base 4.9
+ asctime_r@Base 4.9
+ asprintf@Base 5
+ atexit@Base 4.9
+ backtrace@Base 4.9
+ backtrace_symbols@Base 4.9
+ bind@Base 4.9
+ calloc@Base 4.9
+ canonicalize_file_name@Base 4.9
+ capget@Base 5
+ capset@Base 5
+ cfree@Base 4.9
+ clock_getres@Base 4.9
+ clock_gettime@Base 4.9
+ clock_settime@Base 4.9
+ close@Base 4.9
+ confstr@Base 4.9
+ connect@Base 4.9
+ creat64@Base 4.9
+ creat@Base 4.9
+ ctime@Base 4.9
+ ctime_r@Base 4.9
+ dlclose@Base 4.9
+ dlopen@Base 4.9
+ drand48_r@Base 4.9
+ dup2@Base 4.9
+ dup3@Base 4.9
+ dup@Base 4.9
+ endgrent@Base 5
+ endpwent@Base 5
+ epoll_create1@Base 4.9
+ epoll_create@Base 4.9
+ epoll_ctl@Base 4.9
+ epoll_wait@Base 4.9
+ ether_aton@Base 4.9
+ ether_aton_r@Base 4.9
+ ether_hostton@Base 4.9
+ ether_line@Base 4.9
+ ether_ntoa@Base 4.9
+ ether_ntoa_r@Base 4.9
+ ether_ntohost@Base 4.9
+ eventfd@Base 4.9
+ fclose@Base 4.9
+ fdopen@Base 5
+ fflush@Base 4.9
+ fgetxattr@Base 5
+ flistxattr@Base 5
+ fmemopen@Base 5
+ fopen64@Base 5
+ fopen@Base 4.9
+ fork@Base 4.9
+ fprintf@Base 5
+ fread@Base 4.9
+ free@Base 4.9
+ freopen64@Base 5
+ freopen@Base 4.9
+ frexp@Base 4.9
+ frexpf@Base 4.9
+ frexpl@Base 4.9
+ fscanf@Base 4.9
+ fstat64@Base 4.9
+ fstat@Base 4.9
+ fstatfs64@Base 4.9
+ fstatfs@Base 4.9
+ fstatvfs64@Base 4.9
+ fstatvfs@Base 4.9
+ ftime@Base 5
+ fwrite@Base 4.9
+ get_current_dir_name@Base 4.9
+ getaddrinfo@Base 4.9
+ getcwd@Base 4.9
+ getdelim@Base 4.9
+ getgroups@Base 4.9
+ gethostbyaddr@Base 4.9
+ gethostbyaddr_r@Base 4.9
+ gethostbyname2@Base 4.9
+ gethostbyname2_r@Base 4.9
+ gethostbyname@Base 4.9
+ gethostbyname_r@Base 4.9
+ gethostent@Base 4.9
+ gethostent_r@Base 4.9
+ getifaddrs@Base 5
+ getitimer@Base 4.9
+ getline@Base 4.9
+ getmntent@Base 4.9
+ getmntent_r@Base 4.9
+ getnameinfo@Base 5
+ getpass@Base 5
+ getpeername@Base 4.9
+ getresgid@Base 5
+ getresuid@Base 5
+ getsockname@Base 4.9
+ getsockopt@Base 4.9
+ gettimeofday@Base 4.9
+ getxattr@Base 5
+ glob64@Base 5
+ glob@Base 5
+ gmtime@Base 4.9
+ gmtime_r@Base 4.9
+ iconv@Base 4.9
+ if_indextoname@Base 5
+ if_nametoindex@Base 5
+ inet_aton@Base 4.9
+ inet_ntop@Base 4.9
+ inet_pton@Base 4.9
+ initgroups@Base 4.9
+ inotify_init1@Base 4.9
+ inotify_init@Base 4.9
+ ioctl@Base 4.9
+ kill@Base 4.9
+ lgamma@Base 4.9
+ lgamma_r@Base 4.9
+ lgammaf@Base 4.9
+ lgammaf_r@Base 4.9
+ lgammal@Base 4.9
+ lgammal_r@Base 4.9
+ lgetxattr@Base 5
+ listen@Base 4.9
+ listxattr@Base 5
+ llistxattr@Base 5
+ localtime@Base 4.9
+ localtime_r@Base 4.9
+ longjmp@Base 4.9
+ lrand48_r@Base 4.9
+ lstat64@Base 4.9
+ lstat@Base 4.9
+ malloc@Base 4.9
+ malloc_usable_size@Base 4.9
+ mbsnrtowcs@Base 4.9
+ mbsrtowcs@Base 4.9
+ mbstowcs@Base 4.9
+ memalign@Base 4.9
+ memchr@Base 4.9
+ memcmp@Base 4.9
+ memcpy@Base 4.9
+ memmove@Base 4.9
+ memrchr@Base 4.9
+ memset@Base 4.9
+ mktime@Base 5
+ mlock@Base 4.9
+ mlockall@Base 4.9
+ mmap64@Base 4.9
+ mmap@Base 4.9
+ modf@Base 4.9
+ modff@Base 4.9
+ modfl@Base 4.9
+ munlock@Base 4.9
+ munlockall@Base 4.9
+ munmap@Base 4.9
+ nanosleep@Base 4.9
+ on_exit@Base 4.9
+ open64@Base 4.9
+ open@Base 4.9
+ open_memstream@Base 5
+ open_wmemstream@Base 5
+ opendir@Base 4.9
+ pipe2@Base 4.9
+ pipe@Base 4.9
+ poll@Base 4.9
+ posix_memalign@Base 4.9
+ ppoll@Base 4.9
+ prctl@Base 4.9
+ pread64@Base 4.9
+ pread@Base 4.9
+ preadv64@Base 4.9
+ preadv@Base 4.9
+ printf@Base 5
+ pthread_attr_getaffinity_np@Base 4.9
+ pthread_attr_getdetachstate@Base 4.9
+ pthread_attr_getguardsize@Base 4.9
+ pthread_attr_getinheritsched@Base 4.9
+ pthread_attr_getschedparam@Base 4.9
+ pthread_attr_getschedpolicy@Base 4.9
+ pthread_attr_getscope@Base 4.9
+ pthread_attr_getstack@Base 4.9
+ pthread_attr_getstacksize@Base 4.9
+ pthread_barrier_destroy@Base 4.9
+ pthread_barrier_init@Base 4.9
+ pthread_barrier_wait@Base 4.9
+ pthread_barrierattr_getpshared@Base 5
+ pthread_cond_broadcast@Base 4.9
+ pthread_cond_destroy@Base 4.9
+ pthread_cond_init@Base 4.9
+ pthread_cond_signal@Base 4.9
+ pthread_cond_timedwait@Base 4.9
+ pthread_cond_wait@Base 4.9
+ pthread_condattr_getclock@Base 5
+ pthread_condattr_getpshared@Base 5
+ pthread_create@Base 4.9
+ pthread_detach@Base 4.9
+ pthread_getschedparam@Base 4.9
+ pthread_join@Base 4.9
+ pthread_kill@Base 4.9
+ pthread_mutex_destroy@Base 4.9
+ pthread_mutex_init@Base 4.9
+ pthread_mutex_lock@Base 4.9
+ pthread_mutex_timedlock@Base 4.9
+ pthread_mutex_trylock@Base 4.9
+ pthread_mutex_unlock@Base 4.9
+ pthread_mutexattr_getprioceiling@Base 5
+ pthread_mutexattr_getprotocol@Base 5
+ pthread_mutexattr_getpshared@Base 5
+ pthread_mutexattr_getrobust@Base 5
+ pthread_mutexattr_getrobust_np@Base 5
+ pthread_mutexattr_gettype@Base 5
+ pthread_once@Base 4.9
+ pthread_rwlock_destroy@Base 4.9
+ pthread_rwlock_init@Base 4.9
+ pthread_rwlock_rdlock@Base 4.9
+ pthread_rwlock_timedrdlock@Base 4.9
+ pthread_rwlock_timedwrlock@Base 4.9
+ pthread_rwlock_tryrdlock@Base 4.9
+ pthread_rwlock_trywrlock@Base 4.9
+ pthread_rwlock_unlock@Base 4.9
+ pthread_rwlock_wrlock@Base 4.9
+ pthread_rwlockattr_getkind_np@Base 5
+ pthread_rwlockattr_getpshared@Base 5
+ pthread_setname_np@Base 4.9
+ pthread_spin_destroy@Base 4.9
+ pthread_spin_init@Base 4.9
+ pthread_spin_lock@Base 4.9
+ pthread_spin_trylock@Base 4.9
+ pthread_spin_unlock@Base 4.9
+ ptrace@Base 4.9
+ puts@Base 4.9
+ pvalloc@Base 4.9
+ pwrite64@Base 4.9
+ pwrite@Base 4.9
+ pwritev64@Base 4.9
+ pwritev@Base 4.9
+ raise@Base 4.9
+ rand_r@Base 5
+ random_r@Base 4.9
+ read@Base 4.9
+ readdir64@Base 4.9
+ readdir64_r@Base 4.9
+ readdir@Base 4.9
+ readdir_r@Base 4.9
+ readv@Base 4.9
+ realloc@Base 4.9
+ realpath@Base 4.9
+ recv@Base 4.9
+ recvmsg@Base 4.9
+ remquo@Base 4.9
+ remquof@Base 4.9
+ remquol@Base 4.9
+ rmdir@Base 4.9
+ scandir64@Base 4.9
+ scandir@Base 4.9
+ scanf@Base 4.9
+ sched_getaffinity@Base 4.9
+ sem_destroy@Base 4.9
+ sem_getvalue@Base 4.9
+ sem_init@Base 4.9
+ sem_post@Base 4.9
+ sem_timedwait@Base 4.9
+ sem_trywait@Base 4.9
+ sem_wait@Base 4.9
+ send@Base 4.9
+ sendmsg@Base 4.9
+ setgrent@Base 5
+ setitimer@Base 4.9
+ setjmp@Base 4.9
+ setlocale@Base 4.9
+ setpwent@Base 5
+ shmctl@Base 4.9
+ sigaction@Base 4.9
+ sigemptyset@Base 4.9
+ sigfillset@Base 4.9
+ siglongjmp@Base 4.9
+ signal@Base 4.9
+ signalfd@Base 4.9
+ sigpending@Base 4.9
+ sigprocmask@Base 4.9
+ sigsetjmp@Base 4.9
+ sigsuspend@Base 4.9
+ sigtimedwait@Base 4.9
+ sigwait@Base 4.9
+ sigwaitinfo@Base 4.9
+ sincos@Base 4.9
+ sincosf@Base 4.9
+ sincosl@Base 4.9
+ sleep@Base 4.9
+ snprintf@Base 5
+ socket@Base 4.9
+ socketpair@Base 4.9
+ sprintf@Base 5
+ sscanf@Base 4.9
+ stat64@Base 4.9
+ stat@Base 4.9
+ statfs64@Base 4.9
+ statfs@Base 4.9
+ statvfs64@Base 4.9
+ statvfs@Base 4.9
+ strcasecmp@Base 4.9
+ strchr@Base 4.9
+ strchrnul@Base 4.9
+ strcmp@Base 4.9
+ strcpy@Base 4.9
+ strdup@Base 4.9
+ strerror@Base 4.9
+ strerror_r@Base 4.9
+ strlen@Base 4.9
+ strncasecmp@Base 4.9
+ strncmp@Base 4.9
+ strncpy@Base 4.9
+ strptime@Base 4.9
+ strrchr@Base 4.9
+ strstr@Base 4.9
+ strtoimax@Base 4.9
+ strtoumax@Base 4.9
+ sysinfo@Base 4.9
+ tcgetattr@Base 4.9
+ tempnam@Base 4.9
+ textdomain@Base 4.9
+ time@Base 4.9
+ timerfd_gettime@Base 5
+ timerfd_settime@Base 5
+ times@Base 4.9
+ tmpfile64@Base 5
+ tmpfile@Base 5
+ tmpnam@Base 4.9
+ tmpnam_r@Base 4.9
+ tsearch@Base 5
+ unlink@Base 4.9
+ usleep@Base 4.9
+ valloc@Base 4.9
+ vasprintf@Base 5
+ vfork@Base 5
+ vfprintf@Base 5
+ vfscanf@Base 4.9
+ vprintf@Base 5
+ vscanf@Base 4.9
+ vsnprintf@Base 5
+ vsprintf@Base 5
+ vsscanf@Base 4.9
+ wait3@Base 4.9
+ wait4@Base 4.9
+ wait@Base 4.9
+ waitid@Base 4.9
+ waitpid@Base 4.9
+ wcsnrtombs@Base 4.9
+ wcsrtombs@Base 4.9
+ wcstombs@Base 4.9
+ wordexp@Base 4.9
+ write@Base 4.9
+ writev@Base 4.9
+ xdr_bool@Base 5
+ xdr_bytes@Base 5
+ xdr_char@Base 5
+ xdr_double@Base 5
+ xdr_enum@Base 5
+ xdr_float@Base 5
+ xdr_hyper@Base 5
+ xdr_int16_t@Base 5
+ xdr_int32_t@Base 5
+ xdr_int64_t@Base 5
+ xdr_int8_t@Base 5
+ xdr_int@Base 5
+ xdr_long@Base 5
+ xdr_longlong_t@Base 5
+ xdr_quad_t@Base 5
+ xdr_short@Base 5
+ xdr_string@Base 5
+ xdr_u_char@Base 5
+ xdr_u_hyper@Base 5
+ xdr_u_int@Base 5
+ xdr_u_long@Base 5
+ xdr_u_longlong_t@Base 5
+ xdr_u_quad_t@Base 5
+ xdr_u_short@Base 5
+ xdr_uint16_t@Base 5
+ xdr_uint32_t@Base 5
+ xdr_uint64_t@Base 5
+ xdr_uint8_t@Base 5
+ xdrmem_create@Base 5
+ xdrstdio_create@Base 5
--- gcc-5-5.4.0.orig/debian/libubsan0.symbols
+++ gcc-5-5.4.0/debian/libubsan0.symbols
@@ -0,0 +1,84 @@
+libubsan.so.0 libubsan0 #MINVER#
+ _ZN11__sanitizer11CheckFailedEPKciS1_yy@Base 4.9
+ _ZN11__sanitizer7OnPrintEPKc@Base 4.9
+ __asan_backtrace_alloc@Base 4.9
+ __asan_backtrace_close@Base 4.9
+ __asan_backtrace_create_state@Base 4.9
+ __asan_backtrace_dwarf_add@Base 4.9
+ __asan_backtrace_free@Base 4.9
+ __asan_backtrace_get_view@Base 4.9
+ __asan_backtrace_initialize@Base 4.9
+ __asan_backtrace_open@Base 4.9
+ __asan_backtrace_pcinfo@Base 4.9
+ __asan_backtrace_qsort@Base 4.9
+ __asan_backtrace_release_view@Base 4.9
+ __asan_backtrace_syminfo@Base 4.9
+ __asan_backtrace_vector_finish@Base 4.9
+ __asan_backtrace_vector_grow@Base 4.9
+ __asan_backtrace_vector_release@Base 4.9
+ __asan_cplus_demangle_builtin_types@Base 4.9
+ __asan_cplus_demangle_fill_ctor@Base 4.9
+ __asan_cplus_demangle_fill_dtor@Base 4.9
+ __asan_cplus_demangle_fill_extended_operator@Base 4.9
+ __asan_cplus_demangle_fill_name@Base 4.9
+ __asan_cplus_demangle_init_info@Base 4.9
+ __asan_cplus_demangle_mangled_name@Base 4.9
+ __asan_cplus_demangle_operators@Base 4.9
+ __asan_cplus_demangle_print@Base 4.9
+ __asan_cplus_demangle_print_callback@Base 4.9
+ __asan_cplus_demangle_type@Base 4.9
+ __asan_cplus_demangle_v3@Base 4.9
+ __asan_cplus_demangle_v3_callback@Base 4.9
+ __asan_internal_memcmp@Base 4.9
+ __asan_internal_memcpy@Base 4.9
+ __asan_internal_memset@Base 4.9
+ __asan_internal_strcmp@Base 4.9
+ __asan_internal_strlen@Base 4.9
+ __asan_internal_strncmp@Base 4.9
+ __asan_internal_strnlen@Base 4.9
+ __asan_is_gnu_v3_mangled_ctor@Base 4.9
+ __asan_is_gnu_v3_mangled_dtor@Base 4.9
+ __asan_java_demangle_v3@Base 4.9
+ __asan_java_demangle_v3_callback@Base 4.9
+ __sanitizer_cov@Base 4.9
+ __sanitizer_cov_dump@Base 4.9
+ __sanitizer_cov_indir_call16@Base 5
+ __sanitizer_cov_init@Base 5
+ __sanitizer_cov_module_init@Base 5
+ __sanitizer_maybe_open_cov_file@Base 5
+ __sanitizer_report_error_summary@Base 4.9
+ __sanitizer_sandbox_on_notify@Base 4.9
+ __sanitizer_set_report_path@Base 4.9
+ __ubsan_handle_add_overflow@Base 4.9
+ __ubsan_handle_add_overflow_abort@Base 4.9
+ __ubsan_handle_builtin_unreachable@Base 4.9
+ __ubsan_handle_divrem_overflow@Base 4.9
+ __ubsan_handle_divrem_overflow_abort@Base 4.9
+ __ubsan_handle_dynamic_type_cache_miss@Base 4.9
+ __ubsan_handle_dynamic_type_cache_miss_abort@Base 4.9
+ __ubsan_handle_float_cast_overflow@Base 4.9
+ __ubsan_handle_float_cast_overflow_abort@Base 4.9
+ __ubsan_handle_function_type_mismatch@Base 4.9
+ __ubsan_handle_function_type_mismatch_abort@Base 4.9
+ __ubsan_handle_load_invalid_value@Base 4.9
+ __ubsan_handle_load_invalid_value_abort@Base 4.9
+ __ubsan_handle_missing_return@Base 4.9
+ __ubsan_handle_mul_overflow@Base 4.9
+ __ubsan_handle_mul_overflow_abort@Base 4.9
+ __ubsan_handle_negate_overflow@Base 4.9
+ __ubsan_handle_negate_overflow_abort@Base 4.9
+ __ubsan_handle_nonnull_arg@Base 5
+ __ubsan_handle_nonnull_arg_abort@Base 5
+ __ubsan_handle_nonnull_return@Base 5
+ __ubsan_handle_nonnull_return_abort@Base 5
+ __ubsan_handle_out_of_bounds@Base 4.9
+ __ubsan_handle_out_of_bounds_abort@Base 4.9
+ __ubsan_handle_shift_out_of_bounds@Base 4.9
+ __ubsan_handle_shift_out_of_bounds_abort@Base 4.9
+ __ubsan_handle_sub_overflow@Base 4.9
+ __ubsan_handle_sub_overflow_abort@Base 4.9
+ __ubsan_handle_type_mismatch@Base 4.9
+ __ubsan_handle_type_mismatch_abort@Base 4.9
+ __ubsan_handle_vla_bound_not_positive@Base 4.9
+ __ubsan_handle_vla_bound_not_positive_abort@Base 4.9
+ __ubsan_vptr_type_cache@Base 4.9
--- gcc-5-5.4.0.orig/debian/libvtv0.symbols
+++ gcc-5-5.4.0/debian/libvtv0.symbols
@@ -0,0 +1,68 @@
+libvtv.so.0 libvtv0 #MINVER#
+ _Z10__vtv_freePv@Base 4.9.0
+ (arch=amd64)_Z12__vtv_mallocm@Base 4.9.0
+ (arch=i386)_Z12__vtv_mallocj@Base 4.9.0
+ _Z14__VLTDumpStatsv@Base 4.9.0
+ _Z14__vtv_open_logPKc@Base 4.9.0
+ (arch=amd64)_Z16__VLTRegisterSetPPvPKvmmS0_@Base 4.9.0
+ (arch=i386)_Z16__VLTRegisterSetPPvPKvjjS0_@Base 4.9.0
+ _Z16__vtv_add_to_logiPKcz@Base 4.9.0
+ (arch=amd64)_Z17__VLTRegisterPairPPvPKvmS2_@Base 4.9.0
+ (arch=i386)_Z17__VLTRegisterPairPPvPKvjS2_@Base 4.9.0
+ _Z17__vtv_malloc_initv@Base 4.9.0
+ _Z17__vtv_really_failPKc@Base 4.9.0
+ _Z17__vtv_verify_failPPvPKv@Base 4.9.0
+ _Z18__vtv_malloc_statsv@Base 4.9.0
+ _Z20__vtv_malloc_protectv@Base 4.9.0
+ (arch=amd64)_Z21__VLTRegisterSetDebugPPvPKvmmS0_@Base 4.9.0
+ (arch=i386)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@Base 4.9.0
+ (arch=amd64)_Z22__VLTRegisterPairDebugPPvPKvmS2_PKcS4_@Base 4.9.0
+ (arch=i386)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@Base 4.9.0
+ _Z22__vtv_malloc_unprotectv@Base 4.9.0
+ _Z23__vtv_malloc_dump_statsv@Base 4.9.0
+ _Z23__vtv_verify_fail_debugPPvPKvPKc@Base 4.9.0
+ (arch=amd64)_Z23search_cached_file_datam@Base 4.9.0
+ (arch=i386)_Z23search_cached_file_dataj@Base 4.9.0
+ _Z24__VLTVerifyVtablePointerPPvPKv@Base 4.9.0
+ _Z25__vtv_count_mmapped_pagesv@Base 4.9.0
+ _Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@Base 4.9.0
+ _Z30__vtv_log_verification_failurePKcb@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12put_internalEPKNS8_8key_typeERKS6_b@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE15find_or_add_keyEPKNS8_8key_typeEPPS6_@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE16destructive_copyEv@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3putEPKNS8_8key_typeERKS6_@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE6createEm@Base 4.9.0
+ (arch=amd64)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE7destroyEPS8_@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE11is_too_fullEm@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12bucket_countEv@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3getEPKNS8_8key_typeE@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE4sizeEv@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE5emptyEv@Base 4.9.0
+ (arch=amd64)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIm9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE8key_type6equalsEPKS9_@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12put_internalEPKNS8_8key_typeERKS6_b@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE15find_or_add_keyEPKNS8_8key_typeEPPS6_@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE16destructive_copyEv@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3putEPKNS8_8key_typeERKS6_@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE6createEj@Base 4.9.0
+ (arch=i386)_ZN20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE7destroyEPS8_@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE11is_too_fullEj@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE12bucket_countEv@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE3getEPKNS8_8key_typeE@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE4sizeEv@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE5emptyEv@Base 4.9.0
+ (arch=i386)_ZNK20insert_only_hash_mapIPPN21insert_only_hash_setsIj9vptr_hash14vptr_set_allocE20insert_only_hash_setE30insert_only_hash_map_allocatorE8key_type6equalsEPKS9_@Base 4.9.0
+ __VLTChangePermission@Base 4.9.0
+ __VLTprotect@Base 4.9.0
+ __VLTunprotect@Base 4.9.0
+ _vtable_map_vars_end@Base 4.9.0
+ _vtable_map_vars_start@Base 4.9.0
+ mprotect_cycles@Base 4.9.0
+ num_cache_entries@Base 4.9.0
+ num_calls_to_mprotect@Base 4.9.0
+ num_calls_to_regpair@Base 4.9.0
+ num_calls_to_regset@Base 4.9.0
+ num_calls_to_verify_vtable@Base 4.9.0
+ num_pages_protected@Base 4.9.0
+ regpair_cycles@Base 4.9.0
+ regset_cycles@Base 4.9.0
+ verify_vtable_cycles@Base 4.9.0
--- gcc-5-5.4.0.orig/debian/libx32asan0.overrides
+++ gcc-5-5.4.0/debian/libx32asan0.overrides
@@ -0,0 +1,2 @@
+# automake gets it wrong for the multilib build
+libx32asan0 binary: binary-or-shlib-defines-rpath
--- gcc-5-5.4.0.orig/debian/libx32asan0.symbols
+++ gcc-5-5.4.0/debian/libx32asan0.symbols
@@ -0,0 +1,3 @@
+libasan.so.0 libx32asan0 #MINVER#
+#include "libasan0.symbols.common"
+#include "libasan0.symbols.32"
--- gcc-5-5.4.0.orig/debian/libx32stdc++6.symbols
+++ gcc-5-5.4.0/debian/libx32stdc++6.symbols
@@ -0,0 +1,27 @@
+libstdc++.so.6 libx32stdc++6 #MINVER#
+#include "libstdc++6.symbols.32bit"
+#include "libstdc++6.symbols.128bit"
+#include "libstdc++6.symbols.excprop"
+#include "libstdc++6.symbols.money.ldbl"
+ __gxx_personality_v0@CXXABI_1.3 4.1.1
+ _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3
+ _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3
+ (optional)_Z16__VLTRegisterSetPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z17__VLTRegisterPairPPvPKvjS2_@CXXABI_1.3.8 4.9.0
+ (optional)_Z21__VLTRegisterSetDebugPPvPKvjjS0_@CXXABI_1.3.8 4.9.0
+ (optional)_Z22__VLTRegisterPairDebugPPvPKvjS2_PKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)_Z24__VLTVerifyVtablePointerPPvPKv@CXXABI_1.3.8 4.9.0
+ (optional)_Z29__VLTVerifyVtablePointerDebugPPvPKvPKcS4_@CXXABI_1.3.8 4.9.0
+ (optional)__VLTChangePermission@CXXABI_1.3.8 4.9.0
+ _ZTIPKn@CXXABI_1.3.5 4.9.0
+ _ZTIPKo@CXXABI_1.3.5 4.9.0
+ _ZTIPn@CXXABI_1.3.5 4.9.0
+ _ZTIPo@CXXABI_1.3.5 4.9.0
+ _ZTIn@CXXABI_1.3.5 4.9.0
+ _ZTIo@CXXABI_1.3.5 4.9.0
+ _ZTSPKn@CXXABI_1.3.9 4.9.0
+ _ZTSPKo@CXXABI_1.3.9 4.9.0
+ _ZTSPn@CXXABI_1.3.9 4.9.0
+ _ZTSPo@CXXABI_1.3.9 4.9.0
+ _ZTSn@CXXABI_1.3.9 4.9.0
+ _ZTSo@CXXABI_1.3.9 4.9.0
--- gcc-5-5.4.0.orig/debian/locale-gen
+++ gcc-5-5.4.0/debian/locale-gen
@@ -0,0 +1,50 @@
+#!/bin/sh
+
+# generate locales that the libstdc++ testsuite depends on
+
+LOCPATH=`pwd`/locales
+export LOCPATH
+
+[ -d $LOCPATH ] || mkdir -p $LOCPATH
+
+[ -n "$USE_CPUS" ] || USE_CPUS=1
+
+umask 022
+
+echo "Generating locales..."
+xargs -L 1 -P $USE_CPUS -I{} \
+    sh -c '
+	set {}; locale=$1; charset=$2
+	case $locale in \#*) exit;; esac
+	[ -n "$locale" -a -n "$charset" ] || exit
+	echo "  `echo $locale | sed \"s/\([^.\@]*\).*/\1/\"`.$charset`echo $locale | sed \"s/\([^\@]*\)\(\@.*\)*/\2/\"`..."
+        if [ -f $LOCPATH/$locale ]; then
+	    input=$locale
+	else
+            input=`echo $locale | sed "s/\([^.]*\)[^@]*\(.*\)/\1\2/"`
+	fi
+	localedef -i $input -c -f $charset $LOCPATH/$locale #-A /etc/locale.alias
+    ' <<EOF
+de_DE			ISO-8859-1
+de_DE@euro		ISO-8859-15
+en_HK			ISO-8859-1
+en_PH			ISO-8859-1
+en_US			ISO-8859-1
+en_US.ISO-8859-1	ISO-8859-1
+en_US.ISO-8859-15	ISO-8859-15
+en_US.UTF-8		UTF-8
+es_ES			ISO-8859-1
+es_MX			ISO-8859-1
+fr_FR			ISO-8859-1
+fr_FR@euro		ISO-8859-15
+is_IS			ISO-8859-1
+is_IS.UTF-8		UTF-8
+it_IT			ISO-8859-1
+ja_JP.eucjp		EUC-JP
+se_NO.UTF-8		UTF-8
+ta_IN			UTF-8
+zh_TW			BIG5
+zh_TW			UTF-8
+EOF
+
+echo "Generation complete."
--- gcc-5-5.4.0.orig/debian/logwatch.sh
+++ gcc-5-5.4.0/debian/logwatch.sh
@@ -0,0 +1,104 @@
+#! /bin/sh
+
+# script to trick the build daemons and output something, if there is
+# still test/build activity
+
+# $1: primary file to watch. if there is activity on this file, we do nothing
+# $2+: files to watch to look for activity despite no output in $1
+#      if the files are modified or are newly created, then the message
+#      is printed on stdout.
+#      if nothing is modified, don't output anything (so the buildd timeout
+#      hits).
+
+pidfile=logwatch.pid
+timeout=3600
+message='\nlogwatch still running\n'
+
+usage()
+{
+    echo >&2 "usage: `basename $0` [-p <pidfile>] [-t <timeout>] [-m <message>]"
+    echo >&2 "           <logfile> [<logfile> ...]"
+    exit 1
+}
+
+while [ $# -gt 0 ]; do
+    case $1 in
+    -p)
+	pidfile=$2
+	shift
+	shift
+	;;
+    -t)
+	timeout=$2
+	shift
+	shift
+	;;
+    -m)
+	message="$2"
+	shift
+	shift
+	;;
+    -*)
+	usage
+	;;
+    *)
+	break
+    esac
+done
+
+[ $# -gt 0 ] || usage
+
+logfile="$1"
+shift
+otherlogs="$@"
+
+cleanup()
+{
+    rm -f $pidfile
+    exit 0
+}
+
+#trap cleanup 0 1 3 15
+
+echo $$ > $pidfile
+
+update()
+{
+    _logvar=$1
+    _othervar=$2
+
+    # logfile may not exist yet
+    if [ -r $logfile ]; then
+	_logtail="`tail -10 $logfile | md5sum` $f"
+    else
+	_logtail="does not exist: $logfile"
+    fi
+    eval $_logvar="'$_logtail'"
+
+    _othertails=''
+    for f in $otherlogs; do
+	if [ -r $f ]; then
+	    _othertails="$_othertails `tail -10 $f | md5sum` $f"
+	else
+	    _othertails="$_othertails does not exist: $f"
+	fi
+    done
+    eval $_othervar="'$_othertails'"
+}
+
+update logtail othertails
+while true; do
+    sleep $timeout
+    update newlogtail newothertails
+    if [ "$logtail" != "$newlogtail" ]; then
+	# there is still action in the primary logfile. do nothing.
+	logtail="$newlogtail"
+    elif [ "$othertails" != "$newothertails" ]; then
+	# there is still action in the other log files, so print the message
+	/bin/echo -e $message
+	othertails="$newothertails"
+    else
+	# nothing changed in the other log files. maybe a timeout ...
+	:
+    fi
+done
--- gcc-5-5.4.0.orig/debian/patches/ada-749574.diff
+++ gcc-5-5.4.0/debian/patches/ada-749574.diff
@@ -0,0 +1,34 @@
+From: Ludovic Brenta <lbrenta@debian.org>
+Forwarded: no
+Bug-Debian: http://bugs.debian.org/749574
+Description: Constraint_Error, range check failed at gnatlink.adb:2195, when called from gnatmake with -D option
+ The procedure gnatlink assumes that the Linker_Options.Table contains access
+ values to strings whose 'First index is always 1.  This assumption is wrong
+ for the string returned by function Base_Name.
+.
+ Instead of fixing the assumption in many places, this patch changes the
+ function Base_Name always to return a string with 'First=1.
+.
+ This looks like an upstream bug but strangely the reporter of this bug
+ says it does not happen on GCC built from upstream sources.  Further
+ investigation is required to determine whether or not to forward this
+ bug and patch upstream.
+
+Index: b/src/gcc/ada/gnatlink.adb
+===================================================================
+--- a/src/gcc/ada/gnatlink.adb
++++ b/src/gcc/ada/gnatlink.adb
+@@ -266,7 +266,12 @@ procedure Gnatlink is
+          Findex2 := File_Name'Last + 1;
+       end if;
+ 
+-      return File_Name (Findex1 .. Findex2 - 1);
++      declare
++         Result : String (1 .. Findex2 - Findex1);
++      begin
++         Result (1 .. Findex2 - Findex1) := File_Name (Findex1 .. Findex2 - 1);
++         return Result;
++      end;
+    end Base_Name;
+ 
+    -------------------------------
--- gcc-5-5.4.0.orig/debian/patches/ada-acats.diff
+++ gcc-5-5.4.0/debian/patches/ada-acats.diff
@@ -0,0 +1,200 @@
+# DP: - When running the ACATS, look for the gnat tools in their new
+# DP:   directory (build/gnattools), and for the shared libraries in
+# DP:   build/gcc/ada/rts, build/libgnatvsn and build/libgnatprj.
+
+Index: b/src/gcc/testsuite/ada/acats/run_acats
+===================================================================
+--- a/src/gcc/testsuite/ada/acats/run_acats
++++ b/src/gcc/testsuite/ada/acats/run_acats
+@@ -20,52 +20,30 @@ which () {
+     return 1
+ }
+ 
++echo '#!/bin/sh' > host_gnatchop
++echo exec /usr/bin/gnatchop '$*' >> host_gnatchop
++
++chmod +x host_gnatchop
++
++echo '#!/bin/sh' > host_gnatmake
++echo echo '$PATH' '$*' >> host_gnatmake
++echo exec /usr/bin/gnatmake '$*' >> host_gnatmake
++
++chmod +x host_gnatmake
++
+ # Set up environment to use the Ada compiler from the object tree
+ 
+-host_gnatchop=`which gnatchop`
+-host_gnatmake=`which gnatmake`
+ ROOT=`${PWDCMD-pwd}`
+ BASE=`cd $ROOT/../../..; ${PWDCMD-pwd}`
+-
+ PATH=$BASE:$ROOT:$PATH
+-ADA_INCLUDE_PATH=$BASE/ada/rts
+-LD_LIBRARY_PATH=$ADA_INCLUDE_PATH:$BASE:$LD_LIBRARY_PATH
+-ADA_OBJECTS_PATH=$ADA_INCLUDE_PATH
+-
+-if [ ! -d $ADA_INCLUDE_PATH ]; then
+-   echo gnatlib missing, exiting.
+-   exit 1
+-fi
+-
+-if [ ! -f $BASE/gnatchop ]; then
+-   echo gnattools missing, exiting.
+-   exit 1
+-fi
+-
+-if [ ! -f $BASE/gnatmake ]; then
+-   echo gnattools missing, exiting.
+-   exit 1
+-fi
+-
+ GCC_DRIVER="$BASE/xgcc"
++TARGET=`${GCC_DRIVER} -v  2>&1 |grep '^Target:' | cut -d' ' -f2`
++GNATTOOLS=`cd $BASE/../gnattools; ${PWDCMD-pwd}`
++LIBGNATVSN=`cd $BASE/../${TARGET}/libgnatvsn; ${PWDCMD-pwd}`
++LIBGNATPRJ=`cd $BASE/../${TARGET}/libgnatprj; ${PWDCMD-pwd}`
+ GCC="$BASE/xgcc -B$BASE/"
+ export PATH ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_DRIVER GCC LD_LIBRARY_PATH
+-
+-echo '#!/bin/sh' > host_gnatchop
+-echo PATH=`dirname $host_gnatchop`:'$PATH' >> host_gnatchop
+-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatchop
+-echo export PATH >> host_gnatchop
+-echo exec gnatchop '"$@"' >> host_gnatchop
+-
+-chmod +x host_gnatchop
+-
+-echo '#!/bin/sh' > host_gnatmake
+-echo PATH=`dirname $host_gnatmake`:'$PATH' >> host_gnatmake
+-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatmake
+-echo export PATH >> host_gnatmake
+-echo exec gnatmake '"$@"' >> host_gnatmake
+-
+-chmod +x host_gnatmake
++export GNATTOOLS LIBGNATVSN LIBGNATPRJ
+ 
+ # Limit the stack to 16MB for stack checking
+ ulimit -s 16384
+Index: b/src/gcc/testsuite/ada/acats/run_all.sh
+===================================================================
+--- a/src/gcc/testsuite/ada/acats/run_all.sh
++++ b/src/gcc/testsuite/ada/acats/run_all.sh
+@@ -12,6 +12,10 @@
+ gccflags="-O2"
+ gnatflags="-gnatws"
+ 
++RTS=`cd $GNATTOOLS/../gcc/ada/rts; ${PWDCMD-pwd}`
++LD_LIBRARY_PATH=$RTS:$LIBGNATVSN:$LIBGNATPRJ
++export LD_LIBRARY_PATH
++
+ target_run () {
+   eval $EXPECT -f $testdir/run_test.exp $*
+ }
+@@ -63,12 +67,15 @@ if [ "$dir" = "$testdir" ]; then
+ fi
+ 
+ target_gnatchop () {
+-  gnatchop --GCC="$GCC_DRIVER" $*
++  ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $*
+ }
+ 
+ target_gnatmake () {
+-  echo gnatmake --GCC=\"$GCC\" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC=\"$GCC\"
+-  gnatmake --GCC="$GCC" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC="$GCC"
++  EXTERNAL_OBJECTS="$EXTERNAL_OBJECTS $RTS/adaint.o $RTS/sysdep.o $RTS/init.o $RTS/raise-gcc.o"
++  $GNATTOOLS/gnatmake -I- -I$RTS -I. \
++      --GCC="$GCC" --GNATBIND="$GNATTOOLS/gnatbind" \
++      --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \
++      -bargs -static -largs $EXTERNAL_OBJECTS --GCC="$GCC -I- -I$RTS -I."
+ }
+ 
+ target_gcc () {
+@@ -101,8 +108,8 @@ display target gcc is $GCC
+ display `$GCC -v 2>&1`
+ display host=`gcc -dumpmachine`
+ display target=$target
+-display `type gnatmake`
+-gnatls -v >> $dir/acats.log
++display `type $GNATTOOLS/gnatmake`
++$GNATTOOLS/gnatls -I- -I$RTS -v >> $dir/acats.log
+ display ""
+ 
+ if [ -n "$GCC_RUNTEST_PARALLELIZE_DIR" ]; then
+@@ -129,7 +136,7 @@ cp $testdir/support/*.ada $testdir/suppo
+ # Find out the size in bit of an address on the target
+ target_gnatmake $testdir/support/impbit.adb >> $dir/acats.log 2>&1
+ target_run $dir/support/impbit > $dir/support/impbit.out 2>&1
+-target_bit=`cat $dir/support/impbit.out`
++target_bit=`cat $dir/support/impbit.out` | sed -e 's/\r//g'
+ echo target_bit="$target_bit" >> $dir/acats.log
+ 
+ # Find out a suitable asm statement
+Index: b/src/gcc/testsuite/lib/gnat.exp
+===================================================================
+--- a/src/gcc/testsuite/lib/gnat.exp
++++ b/src/gcc/testsuite/lib/gnat.exp
+@@ -88,18 +88,25 @@ proc gnat_init { args } {
+     global GNAT_UNDER_TEST
+     global TOOL_EXECUTABLE
+     global gnat_target_current
++    global ld_library_path
+ 
+     set gnat_target_current ""
+ 
+     if { $gnat_initialized == 1 } { return }
+ 
+-    if ![info exists GNAT_UNDER_TEST] then {
+-	if [info exists TOOL_EXECUTABLE] {
+-	    set GNAT_UNDER_TEST "$TOOL_EXECUTABLE"
+-	} else {
+-	    set GNAT_UNDER_TEST "[local_find_gnatmake]"
+-	}
+-    }
++    set target [target_info name]
++    set GNAT_UNDER_TEST "$rootme/../gnattools/gnatmake -I$rootme/ada/rts --GCC=$rootme/xgcc --GNATBIND=$rootme/../gnattools/gnatbind --GNATLINK=$rootme/../gnattools/gnatlink -cargs -B$rootme -largs --GCC=$rootme/xgcc -B$rootme -margs"
++    append ld_library_path ":$rootme/ada/rts"
++    append ld_library_path ":$rootme/../$target/libgnatvsn"
++    append ld_library_path ":$rootme/../$target/libgnatprj"
++    set_ld_library_path_env_vars
++
++    # gnatlink looks for system.ads itself and has no --RTS option, so
++    # specify via environment
++    verbose -log "ADA_INCLUDE_PATH=$rootme/ada/rts"
++    verbose -log "ADA_OBJECTS_PATH=$rootme/ada/rts"
++    setenv ADA_INCLUDE_PATH "$rootme/ada/rts"
++    setenv ADA_OBJECTS_PATH "$rootme/ada/rts"
+ 
+     if ![info exists tmpdir] then {
+ 	set tmpdir /tmp
+@@ -121,31 +128,6 @@ proc gnat_target_compile { source dest t
+ 	return [gcc_target_compile $source $dest $type $options]
+     }
+ 
+-    # If we detect a change of target, we need to recompute both
+-    # GNAT_UNDER_TEST and the appropriate RTS.
+-    if { $gnat_target_current!="[current_target_name]" } {
+-	set gnat_target_current "[current_target_name]"
+-	if [info exists TOOL_OPTIONS] {
+-	    set rtsdir "[get_multilibs ${TOOL_OPTIONS}]/libada"
+-	} else {
+-	    set rtsdir "[get_multilibs]/libada"
+-	}
+-	if [info exists TOOL_EXECUTABLE] {
+-	    set GNAT_UNDER_TEST "$TOOL_EXECUTABLE"
+-	} else {
+-	    set GNAT_UNDER_TEST "[local_find_gnatmake]"
+-	}
+-        set GNAT_UNDER_TEST "$GNAT_UNDER_TEST --RTS=$rtsdir"
+-
+-	# gnatlink looks for system.ads itself and has no --RTS option, so
+-	# specify via environment
+-	setenv ADA_INCLUDE_PATH "$rtsdir/adainclude"
+-	setenv ADA_OBJECTS_PATH "$rtsdir/adainclude"
+-	# Always log so compilations can be repeated manually.
+-	verbose -log "ADA_INCLUDE_PATH=$rtsdir/adainclude"
+-	verbose -log "ADA_OBJECTS_PATH=$rtsdir/adainclude"
+-    }
+-
+     lappend options "compiler=$GNAT_UNDER_TEST -q -f"
+     lappend options "timeout=[timeout_value]"
+ 
--- gcc-5-5.4.0.orig/debian/patches/ada-arm.diff
+++ gcc-5-5.4.0/debian/patches/ada-arm.diff
@@ -0,0 +1,18 @@
+DP: Improve support for ZCX on arm.
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -1887,7 +1887,10 @@ ifeq ($(strip $(filter-out arm% linux-gn
+     LIBGNAT_TARGET_PAIRS += \
+     system.ads<system-linux-armeb.ads
+   else
+-    EH_MECHANISM=-arm
++    # Special case; the GCC exception mechanism is supported under
++    # another name and with different files than for other
++    # target_cpus.
++    override EH_MECHANISM=-arm
+     LIBGNAT_TARGET_PAIRS += \
+     system.ads<system-linux-armel.ads \
+     a-exexpr.adb<a-exexpr-gcc.adb \
--- gcc-5-5.4.0.orig/debian/patches/ada-bootstrap-compare.diff
+++ gcc-5-5.4.0/debian/patches/ada-bootstrap-compare.diff
@@ -0,0 +1,17 @@
+# DP: For the bootstrap comparison, ignore gcc/ada/a-except.o on
+# DP: mips and mipsel. See PR ada/65618.
+
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -3565,6 +3565,9 @@ fi
+ 
+ compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
+ case "$target" in
++  mips-*linux-gnu|mipsel-*linux-gnu)
++    compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | gcc/ada/a-except.o"
++    ;;
+   ia64-*linux-gnu)
+     compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | gcc/ira.o"
+     ;;
--- gcc-5-5.4.0.orig/debian/patches/ada-default-project-path.diff
+++ gcc-5-5.4.0/debian/patches/ada-default-project-path.diff
@@ -0,0 +1,134 @@
+# DP: - Change the default search path for project files to the one specified
+# DP:   by the Debian Policy for Ada: /usr/share/ada/adainclude.
+
+Index: b/src/gcc/ada/Make-generated.in
+===================================================================
+--- a/src/gcc/ada/Make-generated.in
++++ b/src/gcc/ada/Make-generated.in
+@@ -76,6 +76,7 @@ $(ADA_GEN_SUBDIR)/stamp-sdefault : $(src
+ 	$(ECHO) "   S2 : constant String := \"$(ADA_RTL_OBJ_DIR)/\";" >>tmp-sdefault.adb
+ 	$(ECHO) "   S3 : constant String := \"$(target_noncanonical)/\";" >>tmp-sdefault.adb
+ 	$(ECHO) "   S4 : constant String := \"$(libsubdir)/\";" >>tmp-sdefault.adb
++	$(ECHO) "   S5 : constant String := \"/usr/share/ada/adainclude/\";" >>tmp-sdefault.adb
+ 	$(ECHO) "   function Include_Dir_Default_Name return String_Ptr is" >>tmp-sdefault.adb
+ 	$(ECHO) "   begin" >>tmp-sdefault.adb
+ 	$(ECHO) "      return Relocate_Path (S0, S1);" >>tmp-sdefault.adb
+@@ -92,6 +93,10 @@ $(ADA_GEN_SUBDIR)/stamp-sdefault : $(src
+ 	$(ECHO) "   begin" >>tmp-sdefault.adb
+ 	$(ECHO) "      return Relocate_Path (S0, S4);" >>tmp-sdefault.adb
+ 	$(ECHO) "   end Search_Dir_Prefix;" >>tmp-sdefault.adb
++	$(ECHO) "   function Project_Dir_Prefix return String_Ptr is" >>tmp-sdefault.adb
++	$(ECHO) "   begin" >>tmp-sdefault.adb
++	$(ECHO) "      return Relocate_Path (S0, S5);" >>tmp-sdefault.adb
++	$(ECHO) "   end Project_Dir_Prefix;" >>tmp-sdefault.adb
+ 	$(ECHO) "end Sdefault;" >> tmp-sdefault.adb
+ 	$(MOVE_IF_CHANGE) tmp-sdefault.adb $(ADA_GEN_SUBDIR)/sdefault.adb
+ 	touch $(ADA_GEN_SUBDIR)/stamp-sdefault
+Index: b/src/gcc/ada/prj-env.adb
+===================================================================
+--- a/src/gcc/ada/prj-env.adb
++++ b/src/gcc/ada/prj-env.adb
+@@ -1877,6 +1877,7 @@ package body Prj.Env is
+       Target_Name  : String;
+       Runtime_Name : String := "")
+    is
++      pragma Unreferenced (Target_Name);
+       Add_Default_Dir : Boolean := Target_Name /= "-";
+       First           : Positive;
+       Last            : Positive;
+@@ -2075,82 +2076,9 @@ package body Prj.Env is
+ 
+       --  Set the initial value of Current_Project_Path
+ 
+-      if Add_Default_Dir then
+-         if Sdefault.Search_Dir_Prefix = null then
+-
+-            --  gprbuild case
+-
+-            Prefix := new String'(Executable_Prefix_Path);
+-
+-         else
+-            Prefix := new String'(Sdefault.Search_Dir_Prefix.all
+-                                  & ".." & Dir_Separator
+-                                  & ".." & Dir_Separator
+-                                  & ".." & Dir_Separator
+-                                  & ".." & Dir_Separator);
+-         end if;
+-
+-         if Prefix.all /= "" then
+-            if Target_Name /= "" then
+-
+-               if Runtime_Name /= "" then
+-                  if Base_Name (Runtime_Name) = Runtime_Name then
+-
+-                     --  $prefix/$target/$runtime/lib/gnat
+-                     Add_Target;
+-                     Add_Str_To_Name_Buffer
+-                       (Runtime_Name & Directory_Separator &
+-                          "lib" & Directory_Separator & "gnat");
+-
+-                     --  $prefix/$target/$runtime/share/gpr
+-                     Add_Target;
+-                     Add_Str_To_Name_Buffer
+-                       (Runtime_Name & Directory_Separator &
+-                          "share" & Directory_Separator & "gpr");
+-
+-                  else
+-                     Runtime :=
+-                       new String'(Normalize_Pathname (Runtime_Name));
+-
+-                     --  $runtime_dir/lib/gnat
+-                     Add_Str_To_Name_Buffer
+-                       (Path_Separator & Runtime.all & Directory_Separator &
+-                        "lib" & Directory_Separator & "gnat");
+-
+-                     --  $runtime_dir/share/gpr
+-                     Add_Str_To_Name_Buffer
+-                       (Path_Separator & Runtime.all & Directory_Separator &
+-                        "share" & Directory_Separator & "gpr");
+-                  end if;
+-               end if;
+-
+-               --  $prefix/$target/lib/gnat
+-
+-               Add_Target;
+-               Add_Str_To_Name_Buffer
+-                 ("lib" & Directory_Separator & "gnat");
+-
+-               --  $prefix/$target/share/gpr
+-
+-               Add_Target;
+-               Add_Str_To_Name_Buffer
+-                 ("share" & Directory_Separator & "gpr");
+-            end if;
+-
+-            --  $prefix/share/gpr
+-
+-            Add_Str_To_Name_Buffer
+-              (Path_Separator & Prefix.all & "share"
+-               & Directory_Separator & "gpr");
+-
+-            --  $prefix/lib/gnat
+-
+-            Add_Str_To_Name_Buffer
+-              (Path_Separator & Prefix.all & "lib"
+-               & Directory_Separator & "gnat");
+-         end if;
+-
+-         Free (Prefix);
++      if Add_Default_Dir and Sdefault.Project_Dir_Prefix /= null then
++         Add_Str_To_Name_Buffer (Path_Separator
++                                 & Sdefault.Project_Dir_Prefix.all);
+       end if;
+ 
+       Self.Path := new String'(Name_Buffer (1 .. Name_Len));
+Index: b/src/gcc/ada/sdefault.ads
+===================================================================
+--- a/src/gcc/ada/sdefault.ads
++++ b/src/gcc/ada/sdefault.ads
+@@ -35,4 +35,5 @@ package Sdefault is
+    function Object_Dir_Default_Name  return String_Ptr;
+    function Target_Name              return String_Ptr;
+    function Search_Dir_Prefix        return String_Ptr;
++   function Project_Dir_Prefix       return String_Ptr;
+ end Sdefault;
--- gcc-5-5.4.0.orig/debian/patches/ada-driver-check.diff
+++ gcc-5-5.4.0/debian/patches/ada-driver-check.diff
@@ -0,0 +1,29 @@
+# DP: Simplify Ada driver check (we always build using the required
+# DP: Ada version. Needed for warnings on alpha.
+
+Index: b/src/config/acx.m4
+===================================================================
+--- a/src/config/acx.m4
++++ b/src/config/acx.m4
+@@ -381,7 +381,7 @@ acx_cv_cc_gcc_supports_ada=no
+ # Other compilers, like HP Tru64 UNIX cc, exit successfully when
+ # given a .adb file, but produce no object file.  So we must check
+ # if an object file was really produced to guard against this.
+-errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>&1 || echo failure`
++errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>/dev/null || echo failure`
+ if test x"$errors" = x && test -f conftest.$ac_objext; then
+   acx_cv_cc_gcc_supports_ada=yes
+ fi
+Index: b/src/configure
+===================================================================
+--- a/src/configure
++++ b/src/configure
+@@ -5311,7 +5311,7 @@ acx_cv_cc_gcc_supports_ada=no
+ # Other compilers, like HP Tru64 UNIX cc, exit successfully when
+ # given a .adb file, but produce no object file.  So we must check
+ # if an object file was really produced to guard against this.
+-errors=`(${CC} -c conftest.adb) 2>&1 || echo failure`
++errors=`(${CC} -c conftest.adb) 2>/dev/null || echo failure`
+ if test x"$errors" = x && test -f conftest.$ac_objext; then
+   acx_cv_cc_gcc_supports_ada=yes
+ fi
--- gcc-5-5.4.0.orig/debian/patches/ada-gcc-name.diff
+++ gcc-5-5.4.0/debian/patches/ada-gcc-name.diff
@@ -0,0 +1,108 @@
+# DP: use gcc-5 instead of gcc as the command name.
+
+Index: b/src/gcc/ada/gnatlink.adb
+===================================================================
+--- a/src/gcc/ada/gnatlink.adb
++++ b/src/gcc/ada/gnatlink.adb
+@@ -136,7 +136,7 @@ procedure Gnatlink is
+    --  This table collects the arguments to be passed to compile the binder
+    --  generated file.
+ 
+-   Gcc : String_Access := Program_Name ("gcc", "gnatlink");
++   Gcc : String_Access := Program_Name ("gcc-5", "gnatlink");
+ 
+    Read_Mode : constant String := "r" & ASCII.NUL;
+ 
+@@ -1412,7 +1412,8 @@ procedure Gnatlink is
+       end if;
+ 
+       Write_Line ("  --GCC=comp Use comp as the compiler");
+-      Write_Line ("  --LINK=nam Use 'nam' for the linking rather than 'gcc'");
++      Write_Line ("  --LINK=nam Use 'nam' for the linking rather " &
++                  "than 'gcc-5'");
+       Write_Eol;
+       Write_Line ("  [non-Ada-objects]  list of non Ada object files");
+       Write_Line ("  [linker-options]   other options for the linker");
+Index: b/src/gcc/ada/make.adb
+===================================================================
+--- a/src/gcc/ada/make.adb
++++ b/src/gcc/ada/make.adb
+@@ -671,14 +671,14 @@ package body Make is
+    -- Compiler, Binder & Linker Data and Subprograms --
+    ----------------------------------------------------
+ 
+-   Gcc          : String_Access := Program_Name ("gcc", "gnatmake");
++   Gcc          : String_Access := Program_Name ("gcc-5", "gnatmake");
+    Original_Gcc : constant String_Access := Gcc;
+    --  Original_Gcc is used to check if Gcc has been modified by a switch
+    --  --GCC=, so that for VM platforms, it is not modified again, as it can
+    --  result in incorrect error messages if the compiler cannot be found.
+ 
+-   Gnatbind : String_Access := Program_Name ("gnatbind", "gnatmake");
+-   Gnatlink : String_Access := Program_Name ("gnatlink", "gnatmake");
++   Gnatbind : String_Access := Program_Name ("gnatbind-5", "gnatmake");
++   Gnatlink : String_Access := Program_Name ("gnatlink-5", "gnatmake");
+    --  Default compiler, binder, linker programs
+ 
+    Globalizer : constant String := "codepeer_globalizer";
+Index: b/src/gcc/ada/gnatchop.adb
+===================================================================
+--- a/src/gcc/ada/gnatchop.adb
++++ b/src/gcc/ada/gnatchop.adb
+@@ -44,7 +44,7 @@ procedure Gnatchop is
+    Config_File_Name : constant String_Access := new String'("gnat.adc");
+    --  The name of the file holding the GNAT configuration pragmas
+ 
+-   Gcc : String_Access := new String'("gcc");
++   Gcc : String_Access := new String'("gcc-5");
+    --  May be modified by switch --GCC=
+ 
+    Gcc_Set : Boolean := False;
+Index: b/src/gcc/ada/mdll-utl.adb
+===================================================================
+--- a/src/gcc/ada/mdll-utl.adb
++++ b/src/gcc/ada/mdll-utl.adb
+@@ -39,7 +39,7 @@ package body MDLL.Utl is
+    Dlltool_Name  : constant String := "dlltool";
+    Dlltool_Exec  : OS_Lib.String_Access;
+ 
+-   Gcc_Name      : constant String := "gcc";
++   Gcc_Name      : constant String := "gcc-5";
+    Gcc_Exec      : OS_Lib.String_Access;
+ 
+    Gnatbind_Name : constant String := "gnatbind";
+@@ -212,7 +212,7 @@ package body MDLL.Utl is
+          end;
+       end if;
+ 
+-      Print_Command ("gcc", Arguments (1 .. A));
++      Print_Command ("gcc-5", Arguments (1 .. A));
+ 
+       OS_Lib.Spawn (Gcc_Exec.all, Arguments (1 .. A), Success);
+ 
+Index: b/src/gcc/ada/mlib-utl.adb
+===================================================================
+--- a/src/gcc/ada/mlib-utl.adb
++++ b/src/gcc/ada/mlib-utl.adb
+@@ -446,7 +446,7 @@ package body MLib.Utl is
+       if Driver_Name = No_Name then
+          if Gcc_Exec = null then
+             if Gcc_Name = null then
+-               Gcc_Name := Osint.Program_Name ("gcc", "gnatmake");
++               Gcc_Name := Osint.Program_Name ("gcc-5", "gnatmake");
+             end if;
+ 
+             Gcc_Exec := Locate_Exec_On_Path (Gcc_Name.all);
+Index: b/src/gcc/ada/prj-makr.adb
+===================================================================
+--- a/src/gcc/ada/prj-makr.adb
++++ b/src/gcc/ada/prj-makr.adb
+@@ -115,7 +115,7 @@ package body Prj.Makr is
+ 
+    procedure Dup2 (Old_Fd, New_Fd : File_Descriptor);
+ 
+-   Gcc      : constant String := "gcc";
++   Gcc      : constant String := "gcc-5";
+    Gcc_Path : String_Access := null;
+ 
+    Non_Empty_Node : constant Project_Node_Id := 1;
--- gcc-5-5.4.0.orig/debian/patches/ada-gnattools-cross.diff
+++ gcc-5-5.4.0/debian/patches/ada-gnattools-cross.diff
@@ -0,0 +1,748 @@
+# DP: - When building the native gnat, link the gnat tools against
+# DP:   the build tree (build/$(host_alias)/{libgnatvsn,libgnatprj}.)
+# DP: - When building a cross gnat, link against the libgnatvsn-5-dev
+# DP:   and libgnatprj-5-dev packages.
+# DP:   This link will be done by /usr/bin/$(host_alias)-gnat*, thus
+# DP:   the native gnat with the same major version will be required.
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -102,7 +102,7 @@ INSTALL_DATA_DATE = cp -p
+ MAKEINFO = makeinfo
+ TEXI2DVI = texi2dvi
+ TEXI2PDF = texi2pdf
+-GNATBIND_FLAGS = -static -x
++GNATBIND_FLAGS = -shared -x
+ ADA_CFLAGS =
+ ADAFLAGS = -W -Wall -gnatpg -gnata
+ FORCE_DEBUG_ADAFLAGS = -g
+@@ -158,6 +158,8 @@ target=@target@
+ target_cpu=@target_cpu@
+ target_vendor=@target_vendor@
+ target_os=@target_os@
++host_alias=@host_alias@
++host=@host@
+ host_cpu=@host_cpu@
+ host_vendor=@host_vendor@
+ host_os=@host_os@
+@@ -252,7 +254,7 @@ ALL_CPPFLAGS = $(CPPFLAGS)
+ ALL_COMPILERFLAGS = $(ALL_CFLAGS)
+ 
+ # This is where we get libiberty.a from.
+-LIBIBERTY = ../../libiberty/libiberty.a
++LIBIBERTY = ../../libiberty/pic/libiberty.a
+ 
+ # We need to link against libbacktrace because diagnostic.c in
+ # libcommon.a uses it.
+@@ -264,9 +266,15 @@ LIBS = $(LIBINTL) $(LIBICONV) $(LIBBACKT
+ LIBDEPS = $(LIBINTL_DEP) $(LIBICONV_DEP) $(LIBBACKTRACE) $(LIBIBERTY)
+ # Default is no TGT_LIB; one might be passed down or something
+ TGT_LIB =
+-TOOLS_LIBS = ../link.o ../targext.o ../../ggc-none.o ../../libcommon-target.a \
+-  ../../libcommon.a ../../../libcpp/libcpp.a $(LIBGNAT) $(LIBINTL) $(LIBICONV) \
+-  ../$(LIBBACKTRACE) ../$(LIBIBERTY) $(SYSLIBS) $(TGT_LIB)
++
++TOOLS_LIBS = ../link.o ../targext.o ../../ggc-none.o ../../version.o ../../../libiberty/pic/lrealpath.o \
++      ../../libbackend.a ../../libcommon-target.a ../../libcommon.a ../../../libcpp/libcpp.a ../$(LIBBACKTRACE) ../$(LIBIBERTY) -lstdc++
++
++ifeq ($(host),$(target))
++  TOOLS_LIBS +=  -L../$(RTSDIR) -lgnat-5 \
++		-L../../../$(target_alias)/libgnatvsn -lgnatvsn \
++                -L../../../$(target_alias)/libgnatprj -lgnatprj
++endif
+ 
+ # Add -no-pie to TOOLS_LIBS since some of them are compiled with -fno-PIE.
+ TOOLS_LIBS += @NO_PIE_FLAG@
+@@ -277,7 +285,12 @@ TOOLS_LIBS += @NO_PIE_FLAG@
+ # subdirectory rather than in the source directory.
+ INCLUDES = -I- -I. -I.. -I$(srcdir)/ada -I$(srcdir) -I$(ftop_srcdir)/include $(GMPINC)
+ 
+-ADA_INCLUDES = -I- -I. -I$(srcdir)/ada
++ifeq ($(host),$(target))
++  ADA_INCLUDES = -I../rts \
++		-I../../../$(target_alias)/libgnatvsn \
++		-I../../../$(target_alias)/libgnatprj
++endif
++ADA_INCLUDES += -I- -I. -I$(srcdir)/ada
+ 
+ # Likewise, but valid for subdirectories of the current dir.
+ # FIXME: for VxWorks, we cannot add $(fsrcdir) because the regs.h file in
+@@ -325,30 +338,50 @@ Makefile: ../config.status $(srcdir)/ada
+ # defined in this file into the environment.
+ .NOEXPORT:
+ 
+-# Lists of files for various purposes.
+ 
+-GNATLINK_OBJS = gnatlink.o \
+- a-except.o ali.o alloc.o butil.o casing.o csets.o debug.o fmap.o fname.o \
+- gnatvsn.o hostparm.o indepsw.o interfac.o i-c.o i-cstrin.o namet.o opt.o \
+- osint.o output.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \
+- sdefault.o snames.o stylesw.o switch.o system.o table.o targparm.o tree_io.o \
+- types.o validsw.o widechar.o
+-
+-GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \
+- atree.o binderr.o butil.o casing.o csets.o debug.o elists.o einfo.o errout.o \
+- erroutc.o errutil.o err_vars.o fmap.o fname.o fname-uf.o fname-sf.o \
+- gnatmake.o gnatvsn.o hostparm.o interfac.o i-c.o i-cstrin.o krunch.o lib.o \
+- make.o makeusg.o makeutl.o mlib.o mlib-fil.o mlib-prj.o mlib-tgt.o \
+- mlib-tgt-specific.o mlib-utl.o namet.o nlists.o opt.o osint.o osint-m.o \
+- output.o prj.o prj-attr.o prj-attr-pm.o prj-com.o prj-dect.o prj-env.o \
+- prj-conf.o prj-pp.o prj-err.o prj-ext.o prj-nmsc.o prj-pars.o prj-part.o \
+- prj-proc.o prj-strt.o prj-tree.o prj-util.o restrict.o rident.o s-exctab.o \
+- s-secsta.o s-stalib.o s-stoele.o scans.o scng.o sdefault.o sfn_scan.o \
+- s-purexc.o s-htable.o scil_ll.o sem_aux.o sinfo.o sinput.o sinput-c.o \
+- sinput-p.o snames.o stand.o stringt.o styleg.o stylesw.o system.o validsw.o \
+- switch.o switch-m.o table.o targparm.o tempdir.o tree_io.o types.o uintp.o \
+- uname.o urealp.o usage.o widechar.o \
+- $(EXTRA_GNATMAKE_OBJS)
++# Since we don't have gnatmake, we must specify the full list of
++# object files necessary to build gnatmake and gnatlink.
++GNATLINK_OBJS = \
++gnatlink.o \
++indepsw.o \
++validsw.o
++
++GNATMAKE_OBJS = \
++aspects.o \
++errout.o \
++fname-sf.o \
++gnatmake.o \
++make.o \
++makeusg.o \
++mlib-prj.o \
++osint-m.o \
++restrict.o \
++sem_aux.o \
++usage.o \
++validsw.o \
++$(EXTRA_GNATMAKE_OBJS)
++
++EXTRA_TOOLS_OBJS = \
++bcheck.o \
++binde.o \
++bindgen.o \
++bindusg.o \
++clean.o \
++gprep.o \
++makegpr.o \
++osint-b.o \
++osint-l.o \
++prep.o \
++prj-makr.o \
++prj-pp.o \
++switch-b.o \
++vms_cmds.o \
++vms_conv.o \
++vms_data.o \
++xr_tabls.o \
++xref_lib.o
++
++OBJECTS = $(GNATLINK_OBJS) $(GNATMAKE_OBJS) $(EXTRA_TOOLS_OBJS)
+ 
+ # Make arch match the current multilib so that the RTS selection code
+ # picks up the right files. For a given target this must be coherent
+@@ -1549,6 +1582,11 @@ ifeq ($(strip $(filter-out s390% linux%,
+   LIBRARY_VERSION := $(LIB_VERSION)
+ endif
+ 
++ifeq ($(strip $(filter-out hppa% unknown linux gnu,$(targ))),)
++  GNATLIB_SHARED = gnatlib-shared-dual
++  LIBRARY_VERSION := $(LIB_VERSION)
++endif
++
+ # HP/PA HP-UX 10
+ ifeq ($(strip $(filter-out hppa% hp hpux10%,$(target_cpu) $(target_vendor) $(target_os))),)
+   LIBGNAT_TARGET_PAIRS = \
+@@ -2430,153 +2468,6 @@ ADA_EXCLUDE_FILES=$(filter-out \
+   $(patsubst %$(objext),%.adb,$(GNATRTL_OBJS)), \
+   $(ADA_EXCLUDE_SRCS))
+ 
+-LIBGNAT=../$(RTSDIR)/libgnat.a
+-
+-TOOLS_FLAGS_TO_PASS=		\
+-	"CC=$(CC)" 		\
+-	"CFLAGS=$(CFLAGS)"	\
+-	"LDFLAGS=$(LDFLAGS)"	\
+-	"ADAFLAGS=$(ADAFLAGS)"	\
+-	"INCLUDES=$(INCLUDES_FOR_SUBDIR)"\
+-	"ADA_INCLUDES=$(ADA_INCLUDES) $(ADA_INCLUDES_FOR_SUBDIR)"\
+-	"libsubdir=$(libsubdir)"	\
+-	"exeext=$(exeext)"	\
+-	"fsrcdir=$(fsrcdir)"	\
+-	"srcdir=$(fsrcdir)"	\
+-	"TOOLS_LIBS=$(TOOLS_LIBS) $(TGT_LIB)"	\
+-	"GNATMAKE=$(GNATMAKE)"	\
+-	"GNATLINK=$(GNATLINK)"	\
+-	"GNATBIND=$(GNATBIND)"
+-
+-GCC_LINK=$(CXX) $(GCC_LINK_FLAGS) $(ADA_INCLUDES) $(LDFLAGS)
+-
+-# Build directory for the tools. Let's copy the target-dependent
+-# sources using the same mechanism as for gnatlib. The other sources are
+-# accessed using the vpath directive below
+-
+-../stamp-tools:
+-	-$(RM) tools/*
+-	-$(RMDIR) tools
+-	-$(MKDIR) tools
+-	-(cd tools; $(LN_S) ../sdefault.adb ../snames.ads ../snames.adb .)
+-	-$(foreach PAIR,$(TOOLS_TARGET_PAIRS), \
+-	          $(RM) tools/$(word 1,$(subst <, ,$(PAIR)));\
+-	          $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \
+-	                tools/$(word 1,$(subst <, ,$(PAIR)));)
+-	touch ../stamp-tools
+-
+-# when compiling the tools, the runtime has to be first on the path so that
+-# it hides the runtime files lying with the rest of the sources
+-ifeq ($(TOOLSCASE),native)
+-  vpath %.ads ../$(RTSDIR) ../
+-  vpath %.adb ../$(RTSDIR) ../
+-  vpath %.c   ../$(RTSDIR) ../
+-  vpath %.h   ../$(RTSDIR) ../
+-endif
+-
+-# in the cross tools case, everything is compiled with the native
+-# gnatmake/link. Therefore only -I needs to be modified in ADA_INCLUDES
+-ifeq ($(TOOLSCASE),cross)
+-  vpath %.ads ../
+-  vpath %.adb ../
+-  vpath %.c   ../
+-  vpath %.h   ../
+-endif
+-
+-# gnatmake/link tools cannot always be built with gnatmake/link for bootstrap
+-# reasons: gnatmake should be built with a recent compiler, a recent compiler
+-# may not generate ALI files compatible with an old gnatmake so it is important
+-# to be able to build gnatmake without a version of gnatmake around. Once
+-# everything has been compiled once, gnatmake can be recompiled with itself
+-# (see target gnattools1-re)
+-gnattools1: ../stamp-tools ../stamp-gnatlib-$(RTSDIR)
+-	$(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \
+-	  TOOLSCASE=native \
+-	  ../../gnatmake$(exeext) ../../gnatlink$(exeext)
+-
+-# gnatmake/link can be built with recent gnatmake/link if they are available.
+-# This is especially convenient for building cross tools or for rebuilding
+-# the tools when the original bootstrap has already be done.
+-gnattools1-re: ../stamp-tools
+-	$(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \
+-	  TOOLSCASE=cross INCLUDES="" gnatmake-re gnatlink-re
+-
+-# these tools are built with gnatmake & are common to native and cross
+-gnattools2: ../stamp-tools
+-	$(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \
+-	  TOOLSCASE=native common-tools $(EXTRA_GNATTOOLS)
+-
+-# those tools are only built for the cross version
+-gnattools4: ../stamp-tools
+-ifeq ($(ENABLE_VXADDR2LINE),true)
+-	$(MAKE) -C tools -f ../Makefile $(TOOLS_FLAGS_TO_PASS) \
+-	  TOOLSCASE=cross top_buildir=../../.. \
+-	  ../../vxaddr2line$(exeext)
+-endif
+-
+-common-tools: ../stamp-tools
+-	$(GNATMAKE) -j0 -c -b $(ADA_INCLUDES) \
+-	  --GNATBIND="$(GNATBIND)" --GCC="$(CC) $(ALL_ADAFLAGS)" \
+-	  gnatchop gnatcmd gnatkr gnatls gnatprep gnatxref gnatfind gnatname \
+-	  gnatclean -bargs $(ADA_INCLUDES) $(GNATBIND_FLAGS)
+-	$(GNATLINK) -v gnatcmd -o ../../gnat$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatchop -o ../../gnatchop$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatkr -o ../../gnatkr$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatls -o ../../gnatls$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatprep -o ../../gnatprep$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatxref -o ../../gnatxref$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatfind -o ../../gnatfind$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatname -o ../../gnatname$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-	$(GNATLINK) -v gnatclean -o ../../gnatclean$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+-
+-../../gnatdll$(exeext): ../stamp-tools
+-	$(GNATMAKE) -c $(ADA_INCLUDES) gnatdll --GCC="$(CC) $(ALL_ADAFLAGS)"
+-	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatdll
+-	$(GNATLINK) -v gnatdll -o $@ --GCC="$(GCC_LINK)" $(TOOLS_LIBS)
+-
+-../../vxaddr2line$(exeext): ../stamp-tools
+-	$(GNATMAKE) -c  $(ADA_INCLUDES) vxaddr2line --GCC="$(CC) $(ALL_ADAFLAGS)"
+-	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) vxaddr2line
+-	$(GNATLINK) -v vxaddr2line -o $@ --GCC="$(GCC_LINK)" ../targext.o $(CLIB)
+-
+-gnatmake-re: ../stamp-tools
+-	$(GNATMAKE) -j0 $(ADA_INCLUDES) -u sdefault --GCC="$(CC) $(MOST_ADA_FLAGS)"
+-	$(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatmake --GCC="$(CC) $(ALL_ADAFLAGS)"
+-	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatmake
+-	$(GNATLINK) -v gnatmake -o ../../gnatmake$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
+-
+-# Note the use of the "mv" command in order to allow gnatlink to be linked with
+-# with the former version of gnatlink itself which cannot override itself.
+-# gnatlink-re cannot be run at the same time as gnatmake-re, hence the
+-# dependency
+-gnatlink-re: ../stamp-tools gnatmake-re
+-	$(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatlink --GCC="$(CC) $(ALL_ADAFLAGS)"
+-	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatlink
+-	$(GNATLINK) -v gnatlink -o ../../gnatlinknew$(exeext) \
+-		    --GCC="$(GCC_LINK)" $(TOOLS_LIBS)
+-	$(MV)  ../../gnatlinknew$(exeext)  ../../gnatlink$(exeext)
+-
+-# Needs to be built with CC=gcc
+-# Since the RTL should be built with the latest compiler, remove the
+-#  stamp target in the parent directory whenever gnat1 is rebuilt
+-
+-# Likewise for the tools
+-../../gnatmake$(exeext): $(P) b_gnatm.o $(GNATMAKE_OBJS)
+-	+$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) $(TOOLS_LIBS)
+-
+-../../gnatlink$(exeext): $(P) b_gnatl.o $(GNATLINK_OBJS)
+-	+$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) $(TOOLS_LIBS)
+-
+ ../stamp-gnatlib-$(RTSDIR):
+ 	@if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \
+ 	then \
+@@ -2620,14 +2511,10 @@ install-gnatlib: ../stamp-gnatlib-$(RTSD
+ #     Also install the .dSYM directories if they exist (these directories
+ #     contain the debug information for the shared libraries on darwin)
+ 	for file in gnat gnarl; do \
+-	   if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \
+-	      $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
++	   if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \
++	      $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \
+ 			 $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
+ 	   fi; \
+-	   if [ -f $(RTSDIR)/lib$${file}$(soext) ]; then \
+-	      $(LN_S) lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) \
+-	      $(DESTDIR)$(ADA_RTL_OBJ_DIR)/lib$${file}$(soext); \
+-	   fi; \
+ 	   if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \
+ 	      $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \
+ 	        $(DESTDIR)$(ADA_RTL_OBJ_DIR); \
+@@ -2640,19 +2527,7 @@ install-gnatlib: ../stamp-gnatlib-$(RTSD
+ 	cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb
+ 	cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads
+ 
+-../stamp-gnatlib2-$(RTSDIR):
+-	$(RM) $(RTSDIR)/s-*.ali
+-	$(RM) $(RTSDIR)/s-*$(objext)
+-	$(RM) $(RTSDIR)/a-*.ali
+-	$(RM) $(RTSDIR)/a-*$(objext)
+-	$(RM) $(RTSDIR)/*.ali
+-	$(RM) $(RTSDIR)/*$(objext)
+-	$(RM) $(RTSDIR)/*$(arext)
+-	$(RM) $(RTSDIR)/*$(soext)
+-	touch ../stamp-gnatlib2-$(RTSDIR)
+-	$(RM) ../stamp-gnatlib-$(RTSDIR)
+-
+-../stamp-gnatlib1-$(RTSDIR): Makefile ../stamp-gnatlib2-$(RTSDIR)
++../stamp-gnatlib1-$(RTSDIR): Makefile
+ 	$(RMDIR) $(RTSDIR)
+ 	$(MKDIR) $(RTSDIR)
+ 	$(CHMOD) u+w $(RTSDIR)
+@@ -2717,7 +2592,7 @@ $(RTSDIR)/s-oscons.ads: ../stamp-gnatlib
+ 	    $(OSCONS_EXTRACT) ; \
+ 	    ../bldtools/oscons/xoscons s-oscons)
+ 
+-gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../stamp-gnatlib2-$(RTSDIR) $(RTSDIR)/s-oscons.ads
++gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads
+ 	test -f $(RTSDIR)/s-oscons.ads || exit 1
+ # C files
+ 	$(MAKE) -C $(RTSDIR) \
+@@ -2755,32 +2630,44 @@ gnatlib: ../stamp-gnatlib1-$(RTSDIR) ../
+ 
+ # Warning: this target assumes that LIBRARY_VERSION has been set correctly.
+ gnatlib-shared-default:
+-	$(MAKE) $(FLAGS_TO_PASS) \
+-             GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+-	     GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \
+-	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \
+-	     MULTISUBDIR="$(MULTISUBDIR)" \
+-	     THREAD_KIND="$(THREAD_KIND)" \
+-             gnatlib
+-	$(RM) $(RTSDIR)/libgna*$(soext)
++	$(MAKE) -C $(RTSDIR) \
++		CC="`echo \"$(GCC_FOR_TARGET)\" \
++		| sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \
++	        INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \
++                CFLAGS="$(GNATLIBCFLAGS_FOR_C) $(PICFLAG_FOR_TARGET)" \
++	        FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
++		srcdir=$(fsrcdir) \
++	        -f ../Makefile $(LIBGNAT_OBJS)
++	$(MAKE) -C $(RTSDIR) \
++		CC="`echo \"$(GCC_FOR_TARGET)\" \
++		| sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \
++	        ADA_INCLUDES="" \
++                CFLAGS="$(GNATLIBCFLAGS) $(PICFLAG_FOR_TARGET)" \
++	        ADAFLAGS="$(GNATLIBFLAGS) $(PICFLAG_FOR_TARGET)" \
++	        FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
++		srcdir=$(fsrcdir) \
++	        -f ../Makefile \
++	        $(GNATRTL_OBJS)
++	$(RM) $(RTSDIR)/libgna*$(soext) $(RTSDIR)/libgna*$(soext).1
+ 	cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \
+                 | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \
+ 		$(PICFLAG_FOR_TARGET) \
+-		-o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
++		-o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \
+ 		$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \
+-		$(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
++		$(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \
+ 		$(MISCLIB) -lm $(GNATLIBLDFLAGS)
+ 	cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \
+                 | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \
+ 		$(PICFLAG_FOR_TARGET) \
+-		-o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
++		-o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \
+ 		$(GNATRTL_TASKING_OBJS) \
+-		$(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
++		$(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \
+ 		$(THREADSLIB) $(GNATLIBLDFLAGS)
+-	cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
+-		libgnat$(soext)
+-	cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
+-		libgnarl$(soext)
++	cd $(RTSDIR); for lib in gnat gnarl; do \
++		l=lib$${lib}$(hyphen)$(LIBRARY_VERSION)$(soext); \
++		$(LN_S) $$l.1 $$l; \
++	done
++	$(CHMOD) a-wx $(RTSDIR)/*.ali
+ 
+ gnatlib-shared-dual:
+ 	$(MAKE) $(FLAGS_TO_PASS) \
+@@ -2790,9 +2677,8 @@ gnatlib-shared-dual:
+              GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+-             gnatlib-shared-default
+-	$(MV) $(RTSDIR)/libgna*$(soext) .
+-	$(RM) ../stamp-gnatlib2-$(RTSDIR)
++	     gnatlib
++	$(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali
+ 	$(MAKE) $(FLAGS_TO_PASS) \
+              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+@@ -2800,8 +2686,7 @@ gnatlib-shared-dual:
+              GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+-             gnatlib
+-	$(MV) libgna*$(soext) $(RTSDIR)
++	     gnatlib-shared-default
+ 
+ gnatlib-shared-dual-win32:
+ 	$(MAKE) $(FLAGS_TO_PASS) \
+@@ -2811,17 +2696,15 @@ gnatlib-shared-dual-win32:
+ 	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+-             gnatlib-shared-win32
+-	$(MV) $(RTSDIR)/libgna*$(soext) .
+-	$(RM) ../stamp-gnatlib2-$(RTSDIR)
++             gnatlib
++	$(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali
+ 	$(MAKE) $(FLAGS_TO_PASS) \
+              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+ 	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+-             gnatlib
+-	$(MV) libgna*$(soext) $(RTSDIR)
++             gnatlib-shared-win32
+ 
+ # ??? we need to add the option to support auto-import of arrays/records to
+ # the GNATLIBFLAGS when this will be supported by GNAT. At this point we will
+@@ -3061,6 +2944,68 @@ targext.o : targext.c
+ 		$(ALL_CPPFLAGS) $(INCLUDES_FOR_SUBDIR) \
+ 		$< $(OUTPUT_OPTION)
+ 
++GCC_LINK=$(CXX) $(GCC_LINK_FLAGS) $(ADA_INCLUDES) $(LDFLAGS)
++
++../stamp-tools:
++	-$(RM) tools/*
++	-$(RMDIR) tools
++	-$(MKDIR) tools
++	-(cd tools; $(LN_S) ../sdefault.adb ../snames.ads ../snames.adb .)
++	-$(foreach PAIR,$(TOOLS_TARGET_PAIRS), \
++	          $(RM) tools/$(word 1,$(subst <, ,$(PAIR)));\
++	          $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \
++	                tools/$(word 1,$(subst <, ,$(PAIR)));)
++	touch ../stamp-tools
++
++gnatmake-re: ../stamp-tools
++	$(GNATMAKE) -j0 $(ADA_INCLUDES) -u sdefault --GCC="$(CC) $(MOST_ADA_FLAGS)"
++	$(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatmake --GCC="$(CC) $(ALL_ADAFLAGS)"
++	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatmake
++	$(GNATLINK) -v gnatmake -o ../../gnatmake$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++
++# Note the use of the "mv" command in order to allow gnatlink to be linked with
++# with the former version of gnatlink itself which cannot override itself.
++# gnatlink-re cannot be run at the same time as gnatmake-re, hence the
++# dependency
++gnatlink-re: ../stamp-tools gnatmake-re
++	$(GNATMAKE) -j0 -c $(ADA_INCLUDES) gnatlink --GCC="$(CC) $(ALL_ADAFLAGS)"
++	$(GNATBIND) $(ADA_INCLUDES) $(GNATBIND_FLAGS) gnatlink
++	$(GNATLINK) -v gnatlink -o ../../gnatlinknew$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(MV)  ../../gnatlinknew$(exeext)  ../../gnatlink$(exeext)
++
++# Likewise for the tools
++../../gnatmake$(exeext): $(P) b_gnatm.o $(GNATMAKE_OBJS)
++	+$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatm.o $(GNATMAKE_OBJS) $(TOOLS_LIBS)
++
++../../gnatlink$(exeext): $(P) b_gnatl.o $(GNATLINK_OBJS)
++	+$(GCC_LINK) $(ALL_CFLAGS) -o $@ b_gnatl.o $(GNATLINK_OBJS) $(TOOLS_LIBS)
++
++common-tools: ../stamp-tools
++	$(GNATMAKE) -j0 -c -b $(ADA_INCLUDES) \
++	  --GNATBIND="$(GNATBIND)" --GCC="$(CC) $(ALL_ADAFLAGS)" \
++	  gnatchop gnatcmd gnatkr gnatls gnatprep gnatxref gnatfind gnatname \
++	  gnatclean -bargs $(ADA_INCLUDES) $(GNATBIND_FLAGS)
++	$(GNATLINK) -v gnatcmd -o ../../gnat$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatchop -o ../../gnatchop$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatkr -o ../../gnatkr$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatls -o ../../gnatls$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatprep -o ../../gnatprep$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatxref -o ../../gnatxref$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatfind -o ../../gnatfind$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatname -o ../../gnatname$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++	$(GNATLINK) -v gnatclean -o ../../gnatclean$(exeext) \
++		$(TOOLS_LIBS) $(LDFLAGS)
++
+ # In GNU Make, ignore whether `stage*' exists.
+ .PHONY: stage1 stage2 stage3 stage4 clean realclean TAGS bootstrap
+ .PHONY: risky-stage1 risky-stage2 risky-stage3 risky-stage4
+Index: b/src/gnattools/Makefile.in
+===================================================================
+--- a/src/gnattools/Makefile.in
++++ b/src/gnattools/Makefile.in
+@@ -52,7 +52,7 @@ WARN_CFLAGS = @warn_cflags@
+ ADA_CFLAGS=@ADA_CFLAGS@
+ 
+ # Variables for gnattools.
+-ADAFLAGS= -gnatpg -gnata
++ADAFLAGS= -gnatn
+ 
+ # For finding the GCC build dir, which is used far too much
+ GCC_DIR=../gcc
+@@ -71,23 +71,159 @@ CXX_LFLAGS = \
+  -L../../../$(target_noncanonical)/libstdc++-v3/src/.libs \
+  -L../../../$(target_noncanonical)/libstdc++-v3/libsupc++/.libs
+ 
+-# Variables for gnattools, native
+-TOOLS_FLAGS_TO_PASS_NATIVE= \
+-	"CC=../../xgcc -B../../" \
+-	"CXX=../../xg++ -B../../ $(CXX_LFLAGS)" \
+-	"CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" \
+-	"LDFLAGS=$(LDFLAGS)" \
+-	"ADAFLAGS=$(ADAFLAGS)" \
+-	"ADA_CFLAGS=$(ADA_CFLAGS)" \
+-	"INCLUDES=$(INCLUDES_FOR_SUBDIR)" \
+-	"ADA_INCLUDES=-I- -I../rts $(ADA_INCLUDES_FOR_SUBDIR)"\
+-	"exeext=$(exeext)" \
+-	"fsrcdir=$(fsrcdir)" \
+-	"srcdir=$(fsrcdir)" \
+-	"GNATMAKE=../../gnatmake" \
+-	"GNATLINK=../../gnatlink" \
+-	"GNATBIND=../../gnatbind" \
+-	"TOOLSCASE=native"
++CFLAGS=-O2 -Wall
++ADA_CFLAGS=-O2 -gnatn
++ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts \
++     -I../$(target_noncanonical)/libgnatvsn -I../$(target_noncanonical)/libgnatprj
++LIB_VERSION=$(strip $(shell grep ' Library_Version :' \
++              ../$(target_noncanonical)/libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/'))
++SHARED_ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION)
++SHARED_ADA_LIBS += -L../$(target_noncanonical)/libgnatvsn -lgnatvsn
++SHARED_ADA_LIBS += -L../$(target_noncanonical)/libgnatprj -lgnatprj
++STATIC_ADA_LIBS := ../gcc/ada/rts/libgnat.a
++STATIC_GCC_LIBS := ../gcc/libcommon-target.a ../gcc/libcommon.a ../libcpp/libcpp.a \
++../libbacktrace/.libs/libbacktrace.a ../libiberty/libiberty.a
++
++# We will use the just-built compiler to compile and link everything.
++GCC=../gcc/xgcc -B../gcc/
++
++# File lists
++# ----------
++
++# File associations set by configure
++EXTRA_GNATTOOLS = @EXTRA_GNATTOOLS@
++TOOLS_TARGET_PAIRS = @TOOLS_TARGET_PAIRS@
++
++# Stage 1 builds xgcc and gnatbind; we can use them to build
++# gnatmake-static and gnatlink-static, then use gnatmake-static and
++# gnatlink-static to build the other tools.  The reason we first build
++# statically-linked versions of gnatmake and gnatlink is so we can run
++# them with confidence on all build platforms, without LD_LIBRARY_PATH
++# or some such variable.
++
++# The tools we will build using gnatmake-static and gnatlink-static.
++TOOLS := gnat gnatbind gnatchop gnatclean gnatfind gnatkr gnatls gnatlink
++TOOLS += gnatmake gnatname gnatprep gnatxref
++
++# Since we don't have gnatmake, we must specify the full list of
++# object files necessary to build gnatmake and gnatlink.
++GNATLINK_OBJS = \
++gnatlink.o \
++indepsw.o \
++validsw.o
++
++GNATMAKE_OBJS = \
++aspects.o \
++errout.o \
++fname-sf.o \
++gnatmake.o \
++make.o \
++makeusg.o \
++mlib-prj.o \
++osint-m.o \
++restrict.o \
++sem_aux.o \
++usage.o \
++validsw.o \
++$(EXTRA_GNATMAKE_OBJS)
++
++EXTRA_TOOLS_OBJS = \
++bcheck.o \
++binde.o \
++bindgen.o \
++bindusg.o \
++clean.o \
++gprep.o \
++makegpr.o \
++osint-b.o \
++osint-l.o \
++prep.o \
++prj-makr.o \
++prj-pp.o \
++switch-b.o \
++vms_cmds.o \
++vms_conv.o \
++vms_data.o \
++xr_tabls.o \
++xref_lib.o
++
++OBJECTS = $(GNATLINK_OBJS) $(GNATMAKE_OBJS) $(EXTRA_TOOLS_OBJS)
++
++# Makefile targets
++# ----------------
++
++.PHONY: gnattools gnattools-native gnattools-cross regnattools
++gnattools: @default_gnattools_target@
++
++BODIES := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.adb,$(f))))
++SPECS  := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.ads,$(f))))
++
++$(notdir $(SPECS) $(BODIES)): stamp-gnattools-sources
++
++stamp-gnattools-sources:
++	for file in $(BODIES) $(SPECS); do \
++	   $(LN_S) -f $$file .; \
++	done
++	rm -f sdefault.adb; $(LN_S) ../gcc/ada/sdefault.adb .
++	$(foreach PAIR,$(TOOLS_TARGET_PAIRS), \
++	          rm -f $(word 1,$(subst <, ,$(PAIR)));\
++	          $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \
++	                  $(word 1,$(subst <, ,$(PAIR)));)
++	touch $@
++
++gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so
++gnattools-native: ../$(target_noncanonical)/libgnatvsn/libgnatvsn.so
++gnattools-native: stamp-gnattools-sources
++gnattools-native: $(TOOLS)
++	cp -lpf $(TOOLS) ../gcc
++
++$(TOOLS) gnatcmd: | gnatmake-static gnatlink-static
++
++vpath %.c @srcdir@/../gcc/ada:@srcdir@/../gcc
++vpath %.h @srcdir@/../gcc/ada
++
++# gnatlink
++
++gnatlink-static: $(GNATLINK_OBJS) b_gnatl.o
++	$(GCC) -o $@ $^ \
++	  ../$(target_noncanonical)/libgnatprj/libgnatprj.a \
++	  ../$(target_noncanonical)/libgnatvsn/libgnatvsn.a \
++	  ../gcc/ada/rts/libgnat.a $(STATIC_GCC_LIBS) $(LDFLAGS)
++
++gnatlink: $(GNATLINK_OBJS) b_gnatl.o
++	$(GCC) -o $@ $^ $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) $(LDFLAGS)
++
++b_gnatl.adb: $(GNATLINK_OBJS)
++	../gcc/gnatbind -o $@ $(ADA_INCLUDES) gnatlink.ali
++
++# gnatmake
++
++gnatmake-static: $(GNATMAKE_OBJS) b_gnatm.o
++	$(GCC) -o $@ $(ADA_CFLAGS) $^ \
++	  ../$(target_noncanonical)/libgnatprj/libgnatprj.a \
++	  ../$(target_noncanonical)/libgnatvsn/libgnatvsn.a \
++	  $(STATIC_ADA_LIBS) $(STATIC_GCC_LIBS) $(LDFLAGS)
++
++gnatmake: $(GNATMAKE_OBJS) b_gnatm.o
++	$(GCC) -o $@ $(ADA_CFLAGS) $^ $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) $(LDFLAGS)
++
++b_gnatm.adb: $(GNATMAKE_OBJS)
++	../gcc/gnatbind -o $@ $(ADA_INCLUDES) gnatmake.ali
++
++# Other tools
++gnat: gnatcmd
++	cp -lp $< $@
++
++gnatbind gnatchop gnatclean gnatcmd gnatfind gnatkr gnatls gnatname gnatprep \
++gnatxref:
++	if [ ! -f $@.adb ] ; then $(LN_S) ../../src/gcc/ada/$@.ad[bs] .; fi
++	./gnatmake-static -c -b $@ $(ADA_CFLAGS) $(ADA_INCLUDES) \
++	   --GCC="$(GCC)" \
++	   --GNATBIND=../gcc/gnatbind
++	./gnatlink-static -o $@ $@.ali $^ \
++	   $(ADA_INCLUDES) $(SHARED_ADA_LIBS) $(STATIC_GCC_LIBS) $(LDFLAGS) \
++	   --GCC="$(GCC) $(ADA_INCLUDES)"
++
+ 
+ # Variables for regnattools
+ TOOLS_FLAGS_TO_PASS_RE= \
+@@ -180,20 +316,12 @@ $(GCC_DIR)/stamp-tools:
+ 	                $(GCC_DIR)/ada/tools/$(word 1,$(subst <, ,$(PAIR)));)
+ 	touch $(GCC_DIR)/stamp-tools
+ 
+-# gnatmake/link tools cannot always be built with gnatmake/link for bootstrap 
+-# reasons: gnatmake should be built with a recent compiler, a recent compiler
+-# may not generate ALI files compatible with an old gnatmake so it is important
+-# to be able to build gnatmake without a version of gnatmake around. Once 
+-# everything has been compiled once, gnatmake can be recompiled with itself 
+-# (see target regnattools) 
+-gnattools-native: $(GCC_DIR)/stamp-tools $(GCC_DIR)/stamp-gnatlib-rts
+-	# gnattools1
+-	$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \
+-	  $(TOOLS_FLAGS_TO_PASS_NATIVE) \
+-	  ../../gnatmake$(exeext) ../../gnatlink$(exeext)
+-	# gnattools2
+-	$(MAKE) -C $(GCC_DIR)/ada/tools -f ../Makefile \
+-	  $(TOOLS_FLAGS_TO_PASS_NATIVE) common-tools
++%.o: %.adb
++	$(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES)
++
++%.o: %.ads
++	$(GCC) -c -o $@ $< $(ADA_CFLAGS) $(ADA_INCLUDES)
++
+ 
+ # gnatmake/link can be built with recent gnatmake/link if they are available.
+ # This is especially convenient for building cross tools or for rebuilding
--- gcc-5-5.4.0.orig/debian/patches/ada-gnattools-ldflags.diff
+++ gcc-5-5.4.0/debian/patches/ada-gnattools-ldflags.diff
@@ -0,0 +1,96 @@
+# DP: Link gnat tools with the defaults LDFLAGS
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -111,6 +111,7 @@ NO_SIBLING_ADAFLAGS = -fno-optimize-sibl
+ NO_REORDER_ADAFLAGS = -fno-toplevel-reorder
+ GNATLIBFLAGS = -W -Wall -gnatpg -nostdinc
+ GNATLIBCFLAGS = -g -O2
++GNATLIBLDFLAGS = $(LDFLAGS)
+ PICFLAG_FOR_TARGET = @PICFLAG_FOR_TARGET@
+ 
+ # Pretend that _Unwind_GetIPInfo is available for the target by default.  This
+@@ -2487,23 +2488,23 @@ common-tools: ../stamp-tools
+ 	  gnatchop gnatcmd gnatkr gnatls gnatprep gnatxref gnatfind gnatname \
+ 	  gnatclean -bargs $(ADA_INCLUDES) $(GNATBIND_FLAGS)
+ 	$(GNATLINK) -v gnatcmd -o ../../gnat$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatchop -o ../../gnatchop$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatkr -o ../../gnatkr$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatls -o ../../gnatls$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatprep -o ../../gnatprep$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatxref -o ../../gnatxref$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatfind -o ../../gnatfind$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatname -o ../../gnatname$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 	$(GNATLINK) -v gnatclean -o ../../gnatclean$(exeext) \
+-		--GCC="$(GCC_LINK)" $(TOOLS_LIBS)
++		--GCC="$(GCC_LINK)" $(TOOLS_LIBS) $(LDFLAGS)
+ 
+ ../../gnatdll$(exeext): ../stamp-tools
+ 	$(GNATMAKE) -c $(ADA_INCLUDES) gnatdll --GCC="$(CC) $(ALL_ADAFLAGS)"
+@@ -2736,14 +2737,14 @@ gnatlib-shared-default:
+ 		-o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
+ 		$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \
+ 		$(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
+-		$(MISCLIB) -lm
++		$(MISCLIB) -lm $(GNATLIBLDFLAGS)
+ 	cd $(RTSDIR); `echo "$(GCC_FOR_TARGET)" \
+                 | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'` -shared $(GNATLIBCFLAGS) \
+ 		$(PICFLAG_FOR_TARGET) \
+ 		-o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
+ 		$(GNATRTL_TASKING_OBJS) \
+ 		$(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
+-		$(THREADSLIB)
++		$(THREADSLIB) $(GNATLIBLDFLAGS)
+ 	cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \
+ 		libgnat$(soext)
+ 	cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \
+@@ -2754,6 +2755,7 @@ gnatlib-shared-dual:
+              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+ 	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
++             GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+              gnatlib-shared-default
+@@ -2763,6 +2765,7 @@ gnatlib-shared-dual:
+              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+ 	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
++             GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+              gnatlib
+@@ -2850,6 +2853,7 @@ gnatlib-shared:
+              GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+ 	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
++             GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
+ 	     PICFLAG_FOR_TARGET="$(PICFLAG_FOR_TARGET)" \
+@@ -2890,6 +2894,7 @@ gnatlib-zcx:
+ 	     GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+ 	     GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \
++             GNATLIBLDFLAGS="$(GNATLIBLDFLAGS)" \
+ 	     FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \
+ 	     MULTISUBDIR="$(MULTISUBDIR)" \
+ 	     THREAD_KIND="$(THREAD_KIND)" \
--- gcc-5-5.4.0.orig/debian/patches/ada-hurd.diff
+++ gcc-5-5.4.0/debian/patches/ada-hurd.diff
@@ -0,0 +1,998 @@
+Index: b/src/gcc/ada/s-osinte-gnu.adb
+===================================================================
+--- /dev/null
++++ b/src/gcc/ada/s-osinte-gnu.adb
+@@ -0,0 +1,147 @@
++------------------------------------------------------------------------------
++--                                                                          --
++--                 GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS                 --
++--                                                                          --
++--                   S Y S T E M . O S _ I N T E R F A C E                  --
++--                                                                          --
++--                                   B o d y                                --
++--                                                                          --
++--             Copyright (C) 1991-1994, Florida State University            --
++--                     Copyright (C) 1995-2006, AdaCore                     --
++--                                                                          --
++-- GNARL is free software; you can  redistribute it  and/or modify it under --
++-- terms of the  GNU General Public License as published  by the Free Soft- --
++-- ware  Foundation;  either version 2,  or (at your option) any later ver- --
++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- --
++-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
++-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
++-- for  more details.  You should have  received  a copy of the GNU General --
++-- Public License  distributed with GNARL; see file COPYING.  If not, write --
++-- to  the  Free Software Foundation,  51  Franklin  Street,  Fifth  Floor, --
++-- Boston, MA 02110-1301, USA.                                              --
++--                                                                          --
++-- As a special exception,  if other files  instantiate  generics from this --
++-- unit, or you link  this unit with other files  to produce an executable, --
++-- this  unit  does not  by itself cause  the resulting  executable  to  be --
++-- covered  by the  GNU  General  Public  License.  This exception does not --
++-- however invalidate  any other reasons why  the executable file  might be --
++-- covered by the  GNU Public License.                                      --
++--                                                                          --
++-- GNARL was developed by the GNARL team at Florida State University.       --
++-- Extensive contributions were provided by Ada Core Technologies, Inc.     --
++--                                                                          --
++------------------------------------------------------------------------------
++
++--  This is the GNU/Hurd version of this package.
++
++pragma Polling (Off);
++--  Turn off polling, we do not want ATC polling to take place during
++--  tasking operations. It causes infinite loops and other problems.
++
++--  This package encapsulates all direct interfaces to OS services
++--  that are needed by children of System.
++
++package body System.OS_Interface is
++
++   --------------------
++   -- Get_Stack_Base --
++   --------------------
++
++   function Get_Stack_Base (thread : pthread_t) return Address is
++      pragma Warnings (Off, thread);
++
++   begin
++      return Null_Address;
++   end Get_Stack_Base;
++
++   ------------------
++   -- pthread_init --
++   ------------------
++
++   procedure pthread_init is
++   begin
++      null;
++   end pthread_init;
++
++   --------------------------------------
++   -- pthread_mutexattr_setprioceiling --
++   --------------------------------------
++
++   function pthread_mutexattr_setprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : int) return int is
++      pragma Unreferenced (attr, prioceiling);
++   begin
++      return 0;
++   end pthread_mutexattr_setprioceiling;
++
++   --------------------------------------
++   -- pthread_mutexattr_getprioceiling --
++   --------------------------------------
++
++   function pthread_mutexattr_getprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : access int) return int is
++      pragma Unreferenced (attr, prioceiling);
++   begin
++      return 0;
++   end pthread_mutexattr_getprioceiling;
++
++   ---------------------------
++   -- pthread_setschedparam --
++   ---------------------------
++
++   function pthread_setschedparam
++     (thread : pthread_t;
++      policy : int;
++      param : access struct_sched_param) return int is
++      pragma Unreferenced (thread, policy, param);
++   begin
++      return 0;
++   end pthread_setschedparam;
++
++   -----------------
++   -- To_Duration --
++   -----------------
++
++   function To_Duration (TS : timespec) return Duration is
++   begin
++      return Duration (TS.tv_sec) + Duration (TS.tv_nsec) / 10#1#E9;
++   end To_Duration;
++
++   ------------------------
++   -- To_Target_Priority --
++   ------------------------
++
++   function To_Target_Priority
++     (Prio : System.Any_Priority) return Interfaces.C.int
++   is
++   begin
++      return Interfaces.C.int (Prio);
++   end To_Target_Priority;
++
++   -----------------
++   -- To_Timespec --
++   -----------------
++
++   function To_Timespec (D : Duration) return timespec is
++      S : time_t;
++      F : Duration;
++
++   begin
++      S := time_t (Long_Long_Integer (D));
++      F := D - Duration (S);
++
++      --  If F has negative value due to a round-up, adjust for positive F
++      --  value.
++
++      if F < 0.0 then
++         S := S - 1;
++         F := F + 1.0;
++      end if;
++
++      return timespec'(tv_sec => S,
++                       tv_nsec => long (Long_Long_Integer (F * 10#1#E9)));
++   end To_Timespec;
++
++end System.OS_Interface;
+Index: b/src/gcc/ada/s-osinte-gnu.ads
+===================================================================
+--- /dev/null
++++ b/src/gcc/ada/s-osinte-gnu.ads
+@@ -0,0 +1,801 @@
++------------------------------------------------------------------------------
++--                                                                          --
++--                GNU ADA RUN-TIME LIBRARY (GNARL) COMPONENTS               --
++--                                                                          --
++--                   S Y S T E M . O S _ I N T E R F A C E                  --
++--                                                                          --
++--                                  S p e c                                 --
++--                                                                          --
++--             Copyright (C) 1991-1994, Florida State University            --
++--          Copyright (C) 1995-2014, Free Software Foundation, Inc.         --
++--                                                                          --
++-- GNAT is free software;  you can  redistribute it  and/or modify it under --
++-- terms of the  GNU General Public License as published  by the Free Soft- --
++-- ware  Foundation;  either version 3,  or (at your option) any later ver- --
++-- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
++-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
++-- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
++--                                                                          --
++-- As a special exception under Section 7 of GPL version 3, you are granted --
++-- additional permissions described in the GCC Runtime Library Exception,   --
++-- version 3.1, as published by the Free Software Foundation.               --
++--                                                                          --
++-- You should have received a copy of the GNU General Public License and    --
++-- a copy of the GCC Runtime Library Exception along with this program;     --
++-- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
++-- <http://www.gnu.org/licenses/>.                                          --
++--                                                                          --
++-- GNARL was developed by the GNARL team at Florida State University.       --
++-- Extensive contributions were provided by Ada Core Technologies, Inc.     --
++--                                                                          --
++------------------------------------------------------------------------------
++
++--  This is the GNU/Hurd (POSIX Threads) version of this package
++
++--  This package encapsulates all direct interfaces to OS services
++--  that are needed by children of System.
++
++--  PLEASE DO NOT add any with-clauses to this package or remove the pragma
++--  Preelaborate. This package is designed to be a bottom-level (leaf) package
++
++with Interfaces.C;
++with Unchecked_Conversion;
++
++package System.OS_Interface is
++   pragma Preelaborate;
++
++   pragma Linker_Options ("-lpthread");
++   pragma Linker_Options ("-lrt");
++
++   subtype int            is Interfaces.C.int;
++   subtype char           is Interfaces.C.char;
++   subtype short          is Interfaces.C.short;
++   subtype long           is Interfaces.C.long;
++   subtype unsigned       is Interfaces.C.unsigned;
++   subtype unsigned_short is Interfaces.C.unsigned_short;
++   subtype unsigned_long  is Interfaces.C.unsigned_long;
++   subtype unsigned_char  is Interfaces.C.unsigned_char;
++   subtype plain_char     is Interfaces.C.plain_char;
++   subtype size_t         is Interfaces.C.size_t;
++
++   -----------
++   -- Errno --
++   -----------
++   --  From /usr/include/i386-gnu/bits/errno.h
++
++   function errno return int;
++   pragma Import (C, errno, "__get_errno");
++
++   EAGAIN   : constant := 1073741859;
++   EINTR    : constant := 1073741828;
++   EINVAL   : constant := 1073741846;
++   ENOMEM   : constant := 1073741836;
++   EPERM    : constant := 1073741825;
++   ETIMEDOUT    : constant := 1073741884;
++
++   -------------
++   -- Signals --
++   -------------
++   --  From /usr/include/i386-gnu/bits/signum.h
++
++   Max_Interrupt : constant := 32;
++   type Signal is new int range 0 .. Max_Interrupt;
++   for Signal'Size use int'Size;
++
++   SIGHUP     : constant := 1; --  hangup
++   SIGINT     : constant := 2; --  interrupt (rubout)
++   SIGQUIT    : constant := 3; --  quit (ASCD FS)
++   SIGILL     : constant := 4; --  illegal instruction (not reset)
++   SIGTRAP    : constant := 5; --  trace trap (not reset)
++   SIGIOT     : constant := 6; --  IOT instruction
++   SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
++   SIGEMT     : constant := 7; --  EMT instruction
++   SIGFPE     : constant := 8; --  floating point exception
++   SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
++   SIGBUS     : constant := 10; --  bus error
++   SIGSEGV    : constant := 11; --  segmentation violation
++   SIGSYS     : constant := 12; --  bad argument to system call
++   SIGPIPE    : constant := 13; --  write on a pipe with no one to read it
++   SIGALRM    : constant := 14; --  alarm clock
++   SIGTERM    : constant := 15; --  software termination signal from kill
++   SIGURG     : constant := 16; --  urgent condition on IO channel
++   SIGSTOP    : constant := 17; --  stop (cannot be caught or ignored)
++   SIGTSTP    : constant := 18; --  user stop requested from tty
++   SIGCONT    : constant := 19; --  stopped process has been continued
++   SIGCLD     : constant := 20; --  alias for SIGCHLD
++   SIGCHLD    : constant := 20; --  child status change
++   SIGTTIN    : constant := 21; --  background tty read attempted
++   SIGTTOU    : constant := 22; --  background tty write attempted
++   SIGIO      : constant := 23; --  I/O possible (Solaris SIGPOLL alias)
++   SIGPOLL    : constant := 23; --  I/O possible (same as SIGIO?)
++   SIGXCPU    : constant := 24; --  CPU time limit exceeded
++   SIGXFSZ    : constant := 25; --  filesize limit exceeded
++   SIGVTALRM  : constant := 26; --  virtual timer expired
++   SIGPROF    : constant := 27; --  profiling timer expired
++   SIGWINCH   : constant := 28; --  window size change
++   SIGINFO    : constant := 29; --  information request (NetBSD/FreeBSD)
++   SIGUSR1    : constant := 30; --  user defined signal 1
++   SIGUSR2    : constant := 31; --  user defined signal 2
++   SIGLOST    : constant := 32; --  Resource lost (Sun); server died (GNU)
++
++   SIGADAABORT : constant := SIGABRT;
++   --  Change this if you want to use another signal for task abort.
++   --  SIGTERM might be a good one.
++
++   type Signal_Set is array (Natural range <>) of Signal;
++
++   Unmasked    : constant Signal_Set := (
++      SIGTRAP,
++      --  To enable debugging on multithreaded applications, mark SIGTRAP to
++      --  be kept unmasked.
++
++      SIGBUS,
++
++      SIGTTIN, SIGTTOU, SIGTSTP,
++      --  Keep these three signals unmasked so that background processes
++      --  and IO behaves as normal "C" applications
++
++      SIGPROF,
++      --  To avoid confusing the profiler
++
++      SIGKILL, SIGSTOP);
++      --  These two signals actually cannot be masked;
++      --  POSIX simply won't allow it.
++
++   Reserved    : constant Signal_Set :=
++   --  I am not sure why the following signal is reserved.
++   --  I guess they are not supported by this version of GNU/Hurd.
++     (0 .. 0 => SIGVTALRM);
++
++   type sigset_t is private;
++
++   --  From /usr/include/signal.h /usr/include/i386-gnu/bits/sigset.h
++   function sigaddset (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigaddset, "sigaddset");
++
++   function sigdelset (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigdelset, "sigdelset");
++
++   function sigfillset (set : access sigset_t) return int;
++   pragma Import (C, sigfillset, "sigfillset");
++
++   function sigismember (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigismember, "sigismember");
++
++   function sigemptyset (set : access sigset_t) return int;
++   pragma Import (C, sigemptyset, "sigemptyset");
++
++   --  sigcontext is architecture dependent, so define it private
++   type struct_sigcontext is private;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h: Note: arg. order differs
++   type struct_sigaction is record
++      sa_handler : System.Address;
++      sa_mask    : sigset_t;
++      sa_flags   : int;
++   end record;
++   pragma Convention (C, struct_sigaction);
++
++   type struct_sigaction_ptr is access all struct_sigaction;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h
++   SIG_BLOCK   : constant := 1;
++   SIG_UNBLOCK : constant := 2;
++   SIG_SETMASK : constant := 3;
++
++   --  From /usr/include/i386-gnu/bits/signum.h
++   SIG_ERR  : constant := 1;
++   SIG_DFL  : constant := 0;
++   SIG_IGN  : constant := 1;
++   SIG_HOLD : constant := 2;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h
++   SA_SIGINFO : constant := 16#0040#;
++   SA_ONSTACK : constant := 16#0001#;
++
++   function sigaction
++     (sig  : Signal;
++      act  : struct_sigaction_ptr;
++      oact : struct_sigaction_ptr) return int;
++   pragma Import (C, sigaction, "sigaction");
++
++   ----------
++   -- Time --
++   ----------
++
++   Time_Slice_Supported : constant Boolean := True;
++   --  Indicates whether time slicing is supported (i.e SCHED_RR is supported)
++
++   type timespec is private;
++
++   function nanosleep (rqtp, rmtp : access timespec) return int;
++   pragma Import (C, nanosleep, "nanosleep");
++
++   type clockid_t is new int;
++   CLOCK_REALTIME : constant clockid_t := 0;
++
++   --  From: /usr/include/time.h
++   function clock_gettime
++     (clock_id : clockid_t;
++      tp       : access timespec)
++      return int;
++   pragma Import (C, clock_gettime, "clock_gettime");
++
++   function clock_getres
++     (clock_id : clockid_t;
++      res      : access timespec) return int;
++   pragma Import (C, clock_getres, "clock_getres");
++
++   function To_Duration (TS : timespec) return Duration;
++   pragma Inline (To_Duration);
++
++   function To_Timespec (D : Duration) return timespec;
++   pragma Inline (To_Timespec);
++
++   --  From: /usr/include/unistd.h
++   function sysconf (name : int) return long;
++   pragma Import (C, sysconf);
++
++   --  From /usr/include/i386-gnu/bits/confname.h
++   SC_CLK_TCK          : constant := 2;
++   SC_NPROCESSORS_ONLN : constant := 84;
++
++   -------------------------
++   -- Priority Scheduling --
++   -------------------------
++   --  From /usr/include/i386-gnu/bits/sched.h
++
++   SCHED_OTHER : constant := 0;
++   SCHED_FIFO  : constant := 1;
++   SCHED_RR    : constant := 2;
++
++   function To_Target_Priority
++     (Prio : System.Any_Priority) return Interfaces.C.int;
++   --  Maps System.Any_Priority to a POSIX priority.
++
++   -------------
++   -- Process --
++   -------------
++
++   type pid_t is private;
++
++   --  From: /usr/include/signal.h
++   function kill (pid : pid_t; sig : Signal) return int;
++   pragma Import (C, kill, "kill");
++
++   --  From: /usr/include/unistd.h
++   function getpid return pid_t;
++   pragma Import (C, getpid, "getpid");
++
++   ---------
++   -- LWP --
++   ---------
++
++   --  From: /usr/include/pthread/pthread.h
++   function lwp_self return System.Address;
++   --  lwp_self does not exist on this thread library, revert to pthread_self
++   --  which is the closest approximation (with getpid). This function is
++   --  needed to share 7staprop.adb across POSIX-like targets.
++   pragma Import (C, lwp_self, "pthread_self");
++
++   -------------
++   -- Threads --
++   -------------
++
++   type Thread_Body is access
++     function (arg : System.Address) return System.Address;
++   pragma Convention (C, Thread_Body);
++
++   function Thread_Body_Access is new
++     Unchecked_Conversion (System.Address, Thread_Body);
++
++   --  From: /usr/include/bits/pthread.h:typedef int __pthread_t;
++   --  /usr/include/pthread/pthreadtypes.h:typedef __pthread_t pthread_t;
++   type pthread_t is new unsigned_long;
++   subtype Thread_Id        is pthread_t;
++
++   function To_pthread_t is new Unchecked_Conversion
++     (unsigned_long, pthread_t);
++
++   type pthread_mutex_t     is limited private;
++   type pthread_rwlock_t     is limited private;
++   type pthread_cond_t      is limited private;
++   type pthread_attr_t      is limited private;
++   type pthread_mutexattr_t is limited private;
++   type pthread_rwlockattr_t is limited private;
++   type pthread_condattr_t  is limited private;
++   type pthread_key_t       is private;
++
++   --  From /usr/include/pthread/pthreadtypes.h
++   PTHREAD_CREATE_DETACHED : constant := 1;
++   PTHREAD_CREATE_JOINABLE : constant := 0;
++
++   PTHREAD_SCOPE_PROCESS : constant := 1;
++   PTHREAD_SCOPE_SYSTEM  : constant := 0;
++
++   -----------
++   -- Stack --
++   -----------
++
++   --  From: /usr/include/i386-gnu/bits/sigstack.h
++   type stack_t is record
++      ss_sp    : System.Address;
++      ss_size  : size_t;
++      ss_flags : int;
++   end record;
++   pragma Convention (C, stack_t);
++
++   function sigaltstack
++     (ss  : not null access stack_t;
++      oss : access stack_t) return int;
++   pragma Import (C, sigaltstack, "sigaltstack");
++
++   Alternate_Stack : aliased System.Address;
++   --  This is a dummy definition, never used (Alternate_Stack_Size is null)
++
++   Alternate_Stack_Size : constant := 0;
++   --  No alternate signal stack is used on this platform
++
++   Stack_Base_Available : constant Boolean := False;
++   --  Indicates whether the stack base is available on this target
++
++   function Get_Stack_Base (thread : pthread_t) return Address;
++   pragma Inline (Get_Stack_Base);
++   --  returns the stack base of the specified thread. Only call this function
++   --  when Stack_Base_Available is True.
++
++   --  From: /usr/include/i386-gnu/bits/shm.h __getpagesize or getpagesize??
++   function Get_Page_Size return size_t;
++   function Get_Page_Size return Address;
++   pragma Import (C, Get_Page_Size, "__getpagesize");
++   --  Returns the size of a page
++
++   --  From /usr/include/i386-gnu/bits/mman.h
++   PROT_NONE  : constant := 0;
++   PROT_READ  : constant := 4;
++   PROT_WRITE : constant := 2;
++   PROT_EXEC  : constant := 1;
++   PROT_ALL   : constant := PROT_READ + PROT_WRITE + PROT_EXEC;
++   PROT_ON    : constant := PROT_NONE;
++   PROT_OFF   : constant := PROT_ALL;
++
++   --  From /usr/include/i386-gnu/bits/mman.h
++   function mprotect (addr : Address; len : size_t; prot : int) return int;
++   pragma Import (C, mprotect);
++
++   ---------------------------------------
++   -- Nonstandard Thread Initialization --
++   ---------------------------------------
++
++   procedure pthread_init;
++   pragma Inline (pthread_init);
++   --  This is a dummy procedure to share some GNULLI files
++
++   -------------------------
++   -- POSIX.1c  Section 3 --
++   -------------------------
++
++   --  From: /usr/include/signal.h:
++   --  sigwait (__const sigset_t *__restrict __set, int *__restrict __sig)
++   function sigwait (set : access sigset_t; sig : access Signal) return int;
++   pragma Import (C, sigwait, "sigwait");
++
++   --  From: /usr/include/pthread/pthread.h:
++   --  extern int pthread_kill (pthread_t thread, int signo);
++   function pthread_kill (thread : pthread_t; sig : Signal) return int;
++   pragma Import (C, pthread_kill, "pthread_kill");
++
++   --  From: /usr/include/i386-gnu/bits/sigthread.h
++   --  extern int pthread_sigmask (int __how, __const __sigset_t *__newmask,
++   --  __sigset_t *__oldmask) __THROW;
++   function pthread_sigmask
++     (how  : int;
++      set  : access sigset_t;
++      oset : access sigset_t) return int;
++   pragma Import (C, pthread_sigmask, "pthread_sigmask");
++
++   --------------------------
++   -- POSIX.1c  Section 11 --
++   --------------------------
++
++   --  From: /usr/include/pthread/pthread.h and
++   --  /usr/include/pthread/pthreadtypes.h
++   function pthread_mutexattr_init
++     (attr : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutexattr_init, "pthread_mutexattr_init");
++
++   function pthread_mutexattr_destroy
++     (attr : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutexattr_destroy, "pthread_mutexattr_destroy");
++
++   function pthread_mutex_init
++     (mutex : access pthread_mutex_t;
++      attr  : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutex_init, "pthread_mutex_init");
++
++   function pthread_mutex_destroy (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_destroy, "pthread_mutex_destroy");
++
++   function pthread_mutex_lock (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_lock, "pthread_mutex_lock");
++
++   function pthread_mutex_unlock (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_unlock, "pthread_mutex_unlock");
++
++   function pthread_rwlockattr_init
++     (attr : access pthread_rwlockattr_t) return int;
++   pragma Import (C, pthread_rwlockattr_init, "pthread_rwlockattr_init");
++
++   function pthread_rwlockattr_destroy
++     (attr : access pthread_rwlockattr_t) return int;
++   pragma Import (C, pthread_rwlockattr_destroy, "pthread_rwlockattr_destroy");
++   PTHREAD_RWLOCK_PREFER_READER_NP              : constant := 0;
++   PTHREAD_RWLOCK_PREFER_WRITER_NP              : constant := 1;
++   PTHREAD_RWLOCK_PREFER_WRITER_NONRECURSIVE_NP : constant := 2;
++
++   function pthread_rwlockattr_setkind_np
++     (attr : access pthread_rwlockattr_t;
++      pref : int) return int;
++   pragma Import
++     (C, pthread_rwlockattr_setkind_np, "pthread_rwlockattr_setkind_np");
++
++   function pthread_rwlock_init
++     (mutex : access pthread_rwlock_t;
++      attr  : access pthread_rwlockattr_t) return int;
++   pragma Import (C, pthread_rwlock_init, "pthread_rwlock_init");
++
++   function pthread_rwlock_destroy
++     (mutex : access pthread_rwlock_t) return int;
++   pragma Import (C, pthread_rwlock_destroy, "pthread_rwlock_destroy");
++
++   function pthread_rwlock_rdlock (mutex : access pthread_rwlock_t) return int;
++   pragma Import (C, pthread_rwlock_rdlock, "pthread_rwlock_rdlock");
++
++   function pthread_rwlock_wrlock (mutex : access pthread_rwlock_t) return int;
++   pragma Import (C, pthread_rwlock_wrlock, "pthread_rwlock_wrlock");
++
++   function pthread_rwlock_unlock (mutex : access pthread_rwlock_t) return int;
++   pragma Import (C, pthread_rwlock_unlock, "pthread_rwlock_unlock");
++
++   function pthread_condattr_init
++     (attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_condattr_init, "pthread_condattr_init");
++
++   function pthread_condattr_destroy
++     (attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_condattr_destroy, "pthread_condattr_destroy");
++
++   function pthread_cond_init
++     (cond : access pthread_cond_t;
++      attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_cond_init, "pthread_cond_init");
++
++   function pthread_cond_destroy (cond : access pthread_cond_t) return int;
++   pragma Import (C, pthread_cond_destroy, "pthread_cond_destroy");
++
++   function pthread_cond_signal (cond : access pthread_cond_t) return int;
++   pragma Import (C, pthread_cond_signal, "pthread_cond_signal");
++
++   function pthread_cond_wait
++     (cond  : access pthread_cond_t;
++      mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_cond_wait, "pthread_cond_wait");
++
++   function pthread_cond_timedwait
++     (cond    : access pthread_cond_t;
++      mutex   : access pthread_mutex_t;
++      abstime : access timespec) return int;
++   pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
++
++   Relative_Timed_Wait : constant Boolean := False;
++   --  pthread_cond_timedwait requires an absolute delay time
++
++   --------------------------
++   -- POSIX.1c  Section 13 --
++   --------------------------
++   --  From /usr/include/pthread/pthreadtypes.h
++
++   PTHREAD_PRIO_NONE    : constant := 0;
++   PTHREAD_PRIO_PROTECT : constant := 2;
++   PTHREAD_PRIO_INHERIT : constant := 1;
++
++   --  GNU/Hurd does not support Thread Priority Protection or Thread
++   --  Priority Inheritance and lacks some pthread_mutexattr_* functions.
++   --  Replace them with dummy versions.
++   --  From: /usr/include/pthread/pthread.h
++
++   function pthread_mutexattr_setprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : int) return int;
++   pragma Import (C, pthread_mutexattr_setprotocol,
++     "pthread_mutexattr_setprotocol");
++
++   function pthread_mutexattr_getprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : access int) return int;
++   pragma Import (C, pthread_mutexattr_getprotocol,
++     "pthread_mutexattr_getprotocol");
++
++   function pthread_mutexattr_setprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : int) return int;
++
++   function pthread_mutexattr_getprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : access int) return int;
++
++   type struct_sched_param is record
++      sched_priority : int;  --  scheduling priority
++   end record;
++   pragma Convention (C, struct_sched_param);
++
++   function pthread_setschedparam
++     (thread : pthread_t;
++      policy : int;
++      param  : access struct_sched_param) return int;
++
++   function pthread_attr_setscope
++     (attr            : access pthread_attr_t;
++      contentionscope : int) return int;
++   pragma Import (C, pthread_attr_setscope, "pthread_attr_setscope");
++
++   function pthread_attr_getscope
++     (attr            : access pthread_attr_t;
++      contentionscope : access int) return int;
++   pragma Import (C, pthread_attr_getscope, "pthread_attr_getscope");
++
++   function pthread_attr_setinheritsched
++     (attr            : access pthread_attr_t;
++      inheritsched : int) return int;
++   pragma Import (C, pthread_attr_setinheritsched,
++     "pthread_attr_setinheritsched");
++
++   function pthread_attr_getinheritsched
++     (attr         : access pthread_attr_t;
++      inheritsched : access int) return int;
++   pragma Import (C, pthread_attr_getinheritsched,
++     "pthread_attr_getinheritsched");
++
++   function pthread_attr_setschedpolicy
++     (attr   : access pthread_attr_t;
++      policy : int) return int;
++   pragma Import (C, pthread_attr_setschedpolicy, "pthread_setschedpolicy");
++
++   function sched_yield return int;
++   pragma Import (C, sched_yield, "sched_yield");
++
++   ---------------------------
++   -- P1003.1c - Section 16 --
++   ---------------------------
++
++   function pthread_attr_init
++     (attributes : access pthread_attr_t) return int;
++   pragma Import (C, pthread_attr_init, "pthread_attr_init");
++
++   function pthread_attr_destroy
++     (attributes : access pthread_attr_t) return int;
++   pragma Import (C, pthread_attr_destroy, "pthread_attr_destroy");
++
++   function pthread_attr_setdetachstate
++     (attr        : access pthread_attr_t;
++      detachstate : int) return int;
++   pragma Import
++     (C, pthread_attr_setdetachstate, "pthread_attr_setdetachstate");
++
++   function pthread_attr_setstacksize
++     (attr      : access pthread_attr_t;
++      stacksize : size_t) return int;
++   pragma Import (C, pthread_attr_setstacksize, "pthread_attr_setstacksize");
++
++   --  From: /usr/include/pthread/pthread.h
++   function pthread_create
++     (thread        : access pthread_t;
++      attributes    : access pthread_attr_t;
++      start_routine : Thread_Body;
++      arg           : System.Address) return int;
++   pragma Import (C, pthread_create, "pthread_create");
++
++   procedure pthread_exit (status : System.Address);
++   pragma Import (C, pthread_exit, "pthread_exit");
++
++   function pthread_self return pthread_t;
++   pragma Import (C, pthread_self, "pthread_self");
++
++   --------------------------
++   -- POSIX.1c  Section 17 --
++   --------------------------
++
++   function pthread_setspecific
++     (key   : pthread_key_t;
++      value : System.Address) return int;
++   pragma Import (C, pthread_setspecific, "pthread_setspecific");
++
++   function pthread_getspecific (key : pthread_key_t) return System.Address;
++   pragma Import (C, pthread_getspecific, "pthread_getspecific");
++
++   type destructor_pointer is access procedure (arg : System.Address);
++   pragma Convention (C, destructor_pointer);
++
++   function pthread_key_create
++     (key        : access pthread_key_t;
++      destructor : destructor_pointer) return int;
++   pragma Import (C, pthread_key_create, "pthread_key_create");
++
++   --  From /usr/include/i386-gnu/bits/sched.h
++   CPU_SETSIZE : constant := 1_024;
++
++   type bit_field is array (1 .. CPU_SETSIZE) of Boolean;
++   for bit_field'Size use CPU_SETSIZE;
++   pragma Pack (bit_field);
++   pragma Convention (C, bit_field);
++
++   type cpu_set_t is record
++      bits : bit_field;
++   end record;
++   pragma Convention (C, cpu_set_t);
++
++private
++
++   type sigset_t is array (1 .. 4) of unsigned;
++
++   --  In GNU/Hurd the component sa_handler turns out to
++   --  be one a union type, and the selector is a macro:
++   --  #define sa_handler __sigaction_handler.sa_handler
++   --  #define sa_sigaction __sigaction_handler.sa_sigaction
++
++   --  Should we add a signal_context type here ?
++   --  How could it be done independent of the CPU architecture ?
++   --  sigcontext type is opaque, so it is architecturally neutral.
++   --  It is always passed as an access type, so define it as an empty record
++   --  since the contents are not used anywhere.
++   type struct_sigcontext is null record;
++   pragma Convention (C, struct_sigcontext);
++
++   type pid_t is new int;
++
++   type time_t is new long;
++
++   type timespec is record
++      tv_sec  : time_t;
++      tv_nsec : long;
++   end record;
++   pragma Convention (C, timespec);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_attr pthread_attr_t;
++   --  /usr/include/i386-gnu/bits/thread-attr.h: struct __pthread_attr...
++   --  /usr/include/pthread/pthreadtypes.h: enum __pthread_contentionscope
++   --   enum __pthread_detachstate detachstate;
++   --   enum __pthread_inheritsched inheritsched;
++   --   enum __pthread_contentionscope contentionscope;
++   --   Not used: schedpolicy   : int;
++   type pthread_attr_t is record
++      schedparam    : struct_sched_param;
++      stackaddr     : System.Address;
++      stacksize     : size_t;
++      guardsize     : size_t;
++      detachstate   : int;
++      inheritsched  : int;
++      contentionscope : int;
++      schedpolicy   : int;
++   end record;
++   pragma Convention (C, pthread_attr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_condattr pthread_condattr_t;
++   --  From: /usr/include/i386-gnu/bits/condition-attr.h:
++   --  struct __pthread_condattr {
++   --    enum __pthread_process_shared pshared;
++   --    __Clockid_T Clock;}
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  enum __pthread_process_shared
++   type pthread_condattr_t is record
++      pshared : int;
++      clock   : clockid_t;
++   end record;
++   pragma Convention (C, pthread_condattr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_mutexattr pthread_mutexattr_t; and
++   --  /usr/include/i386-gnu/bits/mutex-attr.h
++   --  struct __pthread_mutexattr {
++   --  int prioceiling;
++   --  enum __pthread_mutex_protocol protocol;
++   --  enum __pthread_process_shared pshared;
++   --  enum __pthread_mutex_type mutex_type;};
++   type pthread_mutexattr_t is record
++      prioceiling : int;
++      protocol    : int;
++      pshared     : int;
++      mutex_type  : int;
++   end record;
++   pragma Convention (C, pthread_mutexattr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h
++   --  typedef struct __pthread_mutex pthread_mutex_t; and
++   --  /usr/include/i386-gnu/bits/mutex.h:
++   --  struct __pthread_mutex {
++   --  __pthread_spinlock_t __held;
++   --  __pthread_spinlock_t __lock;
++   --  /* in cthreads, mutex_init does not initialized the third
++   --    pointer, as such, we cannot rely on its value for anything.  */
++   --    char *cthreadscompat1;
++   --  struct __pthread *__queue;
++   --  struct __pthread_mutexattr *attr;
++   --  void *data;
++   --  /*  up to this point, we are completely compatible with cthreads
++   --    and what libc expects.  */
++   --    void *owner;
++   --  unsigned locks;
++   --  /* if null then the default attributes apply.  */
++   --    };
++
++   type pthread_mutex_t is record
++      held          : int;
++      lock          : int;
++      cthreadcompat : System.Address;
++      queue         : System.Address;
++      attr          : System.Address;
++      data          : System.Address;
++      owner         : System.Address;
++      locks         : unsigned;
++   end record;
++   pragma Convention (C, pthread_mutex_t);
++   --  pointer needed?
++   --  type pthread_mutex_t_ptr is access pthread_mutex_t;
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_cond pthread_cond_t;
++   --  typedef struct __pthread_condattr pthread_condattr_t;
++   --  /usr/include/i386-gnu/bits/condition.h:struct __pthread_cond{}
++   --  pthread_condattr_t: see above!
++   --  /usr/include/i386-gnu/bits/condition.h:
++   --  struct __pthread_condimpl *__impl;
++
++   type pthread_cond_t is record
++      lock       : int;
++      queue      : System.Address;
++      condattr   : System.Address;
++      impl       : System.Address;
++      data       : System.Address;
++   end record;
++   pragma Convention (C, pthread_cond_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef __pthread_key pthread_key_t; and
++   --  /usr/include/i386-gnu/bits/thread-specific.h:
++   --  typedef int __pthread_key;
++
++   type pthread_key_t is new int;
++
++   --  From: /usr/include/i386-gnu/bits/rwlock-attr.h:
++   --  struct __pthread_rwlockattr {
++   --  enum __pthread_process_shared pshared; };
++
++   type pthread_rwlockattr_t is record
++      pshared : int;
++   end record;
++   pragma Convention (C, pthread_rwlockattr_t);
++
++   --  From: /usr/include/i386-gnu/bits/rwlock.h:
++   --  struct __pthread_rwlock {
++   --  __pthread_spinlock_t __held;
++   --  __pthread_spinlock_t __lock;
++   --  int readers;
++   --  struct __pthread *readerqueue;
++   --  struct __pthread *writerqueue;
++   --  struct __pthread_rwlockattr *__attr;
++   --  void *__data; };
++
++   type pthread_rwlock_t is record
++      held        : int;
++      lock        : int;
++      readers     : int;
++      readerqueue : System.Address;
++      writerqueue : System.Address;
++      attr        : pthread_rwlockattr_t;
++      data        : int;
++   end record;
++   pragma Convention (C, pthread_rwlock_t);
++
++end System.OS_Interface;
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -1390,6 +1390,35 @@ ifeq ($(strip $(filter-out %86 kfreebsd%
+   MISCLIB = -lutil
+ endif
+ 
++# i[3456]86-pc-gnu i.e. GNU Hurd
++ifeq ($(strip $(filter-out %86 pc gnu,$(target_cpu) $(target_vendor) $(target_os))),)
++  LIBGNAT_TARGET_PAIRS = \
++  a-intnam.ads<a-intnam-freebsd.ads \
++  s-inmaop.adb<s-inmaop-posix.adb \
++  s-intman.adb<s-intman-posix.adb \
++  s-osinte.adb<s-osinte-gnu.adb \
++  s-osinte.ads<s-osinte-gnu.ads \
++  s-osprim.adb<s-osprim-posix.adb \
++  s-taprop.adb<s-taprop-posix.adb \
++  s-taspri.ads<s-taspri-posix.ads \
++  s-tpopsp.adb<s-tpopsp-posix-foreign.adb \
++  $(ATOMICS_TARGET_PAIRS) \
++  $(X86_TARGET_PAIRS) \
++  system.ads<system-freebsd-x86.ads
++
++  TOOLS_TARGET_PAIRS =  \
++    mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \
++    indepsw.adb<indepsw-gnu.adb
++
++  EXTRA_GNATRTL_NONTASKING_OBJS=g-sse.o g-ssvety.o
++
++  EH_MECHANISM=-gcc
++  THREADSLIB = -lpthread
++  GNATLIB_SHARED = gnatlib-shared-dual
++  GMEM_LIB = gmemlib
++  LIBRARY_VERSION := $(LIB_VERSION)
++endif
++
+ ifeq ($(strip $(filter-out x86_64 kfreebsd%,$(target_cpu) $(target_os))),)
+   LIBGNAT_TARGET_PAIRS = \
+   a-intnam.ads<a-intnam-freebsd.ads \
--- gcc-5-5.4.0.orig/debian/patches/ada-kfreebsd.diff
+++ gcc-5-5.4.0/debian/patches/ada-kfreebsd.diff
@@ -0,0 +1,305 @@
+# DP: add support for GNU/kFreeBSD.
+
+Index: b/src/gcc/ada/terminals.c
+===================================================================
+--- a/src/gcc/ada/terminals.c
++++ b/src/gcc/ada/terminals.c
+@@ -1071,6 +1071,7 @@ __gnat_setup_winsize (void *desc, int ro
+ /* On some system termio is either absent or including it will disable termios
+    (HP-UX) */
+ #if ! defined (__hpux__) && ! defined (FREEBSD) && \
++    ! defined (__FreeBSD_kernel__) && ! defined (__GNU__) && \
+     ! defined (__APPLE__) && ! defined(__rtems__)
+ #   include <termio.h>
+ #endif
+Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb
+===================================================================
+--- /dev/null
++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb
+@@ -0,0 +1,158 @@
++------------------------------------------------------------------------------
++--                                                                          --
++--                 GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS                 --
++--                                                                          --
++--                   S Y S T E M . O S _ I N T E R F A C E                  --
++--                                                                          --
++--                                   B o d y                                --
++--                                                                          --
++--             Copyright (C) 1991-1994, Florida State University            --
++--                     Copyright (C) 1995-2006, AdaCore                     --
++--                                                                          --
++-- GNARL is free software; you can  redistribute it  and/or modify it under --
++-- terms of the  GNU General Public License as published  by the Free Soft- --
++-- ware  Foundation;  either version 2,  or (at your option) any later ver- --
++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- --
++-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
++-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
++-- for  more details.  You should have  received  a copy of the GNU General --
++-- Public License  distributed with GNARL; see file COPYING.  If not, write --
++-- to  the  Free Software Foundation,  51  Franklin  Street,  Fifth  Floor, --
++-- Boston, MA 02110-1301, USA.                                              --
++--                                                                          --
++-- As a special exception,  if other files  instantiate  generics from this --
++-- unit, or you link  this unit with other files  to produce an executable, --
++-- this  unit  does not  by itself cause  the resulting  executable  to  be --
++-- covered  by the  GNU  General  Public  License.  This exception does not --
++-- however invalidate  any other reasons why  the executable file  might be --
++-- covered by the  GNU Public License.                                      --
++--                                                                          --
++-- GNARL was developed by the GNARL team at Florida State University.       --
++-- Extensive contributions were provided by Ada Core Technologies, Inc.     --
++--                                                                          --
++------------------------------------------------------------------------------
++
++--  This is the GNU/kFreeBSD version of this package.
++
++pragma Polling (Off);
++--  Turn off polling, we do not want ATC polling to take place during
++--  tasking operations. It causes infinite loops and other problems.
++
++--  This package encapsulates all direct interfaces to OS services
++--  that are needed by children of System.
++
++package body System.OS_Interface is
++
++   --------------------
++   -- Get_Stack_Base --
++   --------------------
++
++   function Get_Stack_Base (thread : pthread_t) return Address is
++      pragma Warnings (Off, thread);
++
++   begin
++      return Null_Address;
++   end Get_Stack_Base;
++
++   ------------------
++   -- pthread_init --
++   ------------------
++
++   procedure pthread_init is
++   begin
++      null;
++   end pthread_init;
++
++   -----------------------------------
++   -- pthread_mutexattr_setprotocol --
++   -----------------------------------
++
++   function pthread_mutexattr_setprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : int) return int is
++      pragma Unreferenced (attr, protocol);
++   begin
++      return 0;
++   end pthread_mutexattr_setprotocol;
++
++   -----------------------------------
++   -- pthread_mutexattr_getprotocol --
++   -----------------------------------
++
++   function pthread_mutexattr_getprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : access int) return int is
++      pragma Unreferenced (attr, protocol);
++   begin
++      return 0;
++   end pthread_mutexattr_getprotocol;
++
++   --------------------------------------
++   -- pthread_mutexattr_setprioceiling --
++   --------------------------------------
++
++   function pthread_mutexattr_setprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : int) return int is
++      pragma Unreferenced (attr, prioceiling);
++   begin
++      return 0;
++   end pthread_mutexattr_setprioceiling;
++
++   --------------------------------------
++   -- pthread_mutexattr_getprioceiling --
++   --------------------------------------
++
++   function pthread_mutexattr_getprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : access int) return int is
++      pragma Unreferenced (attr, prioceiling);
++   begin
++      return 0;
++   end pthread_mutexattr_getprioceiling;
++
++   -----------------
++   -- To_Duration --
++   -----------------
++
++   function To_Duration (TS : timespec) return Duration is
++   begin
++      return Duration (TS.tv_sec) + Duration (TS.tv_nsec) / 10#1#E9;
++   end To_Duration;
++
++   ------------------------
++   -- To_Target_Priority --
++   ------------------------
++
++   function To_Target_Priority
++     (Prio : System.Any_Priority) return Interfaces.C.int
++   is
++   begin
++      return Interfaces.C.int (Prio);
++   end To_Target_Priority;
++
++   -----------------
++   -- To_Timespec --
++   -----------------
++
++   function To_Timespec (D : Duration) return timespec is
++      S : time_t;
++      F : Duration;
++
++   begin
++      S := time_t (Long_Long_Integer (D));
++      F := D - Duration (S);
++
++      --  If F has negative value due to a round-up, adjust for positive F
++      --  value.
++
++      if F < 0.0 then
++         S := S - 1;
++         F := F + 1.0;
++      end if;
++
++      return timespec'(tv_sec => S,
++                       tv_nsec => long (Long_Long_Integer (F * 10#1#E9)));
++   end To_Timespec;
++
++end System.OS_Interface;
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -1366,7 +1366,7 @@ ifeq ($(strip $(filter-out %86 kfreebsd%
+   a-intnam.ads<a-intnam-freebsd.ads \
+   s-inmaop.adb<s-inmaop-posix.adb \
+   s-intman.adb<s-intman-posix.adb \
+-  s-osinte.adb<s-osinte-posix.adb \
++  s-osinte.adb<s-osinte-kfreebsd-gnu.adb \
+   s-osinte.ads<s-osinte-kfreebsd-gnu.ads \
+   s-osprim.adb<s-osprim-posix.adb \
+   s-taprop.adb<s-taprop-posix.adb \
+@@ -1426,7 +1426,7 @@ ifeq ($(strip $(filter-out x86_64 kfreeb
+   a-numaux.ads<a-numaux-x86.ads \
+   s-inmaop.adb<s-inmaop-posix.adb \
+   s-intman.adb<s-intman-posix.adb \
+-  s-osinte.adb<s-osinte-posix.adb \
++  s-osinte.adb<s-osinte-kfreebsd-gnu.adb \
+   s-osinte.ads<s-osinte-kfreebsd-gnu.ads \
+   s-osprim.adb<s-osprim-posix.adb \
+   s-taprop.adb<s-taprop-posix.adb \
+Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads
+===================================================================
+--- a/src/gcc/ada/s-osinte-kfreebsd-gnu.ads
++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.ads
+@@ -45,6 +45,7 @@ package System.OS_Interface is
+    pragma Preelaborate;
+ 
+    pragma Linker_Options ("-lpthread");
++   pragma Linker_Options ("-lrt");
+ 
+    subtype int            is Interfaces.C.int;
+    subtype char           is Interfaces.C.char;
+@@ -206,9 +207,7 @@ package System.OS_Interface is
+    function nanosleep (rqtp, rmtp : access timespec) return int;
+    pragma Import (C, nanosleep, "nanosleep");
+ 
+-   type clockid_t is private;
+-
+-   CLOCK_REALTIME : constant clockid_t;
++   type clockid_t is new int;
+ 
+    function clock_gettime
+      (clock_id : clockid_t;
+@@ -442,31 +446,25 @@ package System.OS_Interface is
+    PTHREAD_PRIO_PROTECT : constant := 2;
+    PTHREAD_PRIO_INHERIT : constant := 1;
+ 
++   --  GNU/kFreeBSD does not support Thread Priority Protection or Thread
++   --  Priority Inheritance and lacks some pthread_mutexattr_* functions.
++   --  Replace them with dummy versions.
++
+    function pthread_mutexattr_setprotocol
+      (attr     : access pthread_mutexattr_t;
+       protocol : int) return int;
+-   pragma Import
+-      (C, pthread_mutexattr_setprotocol, "pthread_mutexattr_setprotocol");
+ 
+    function pthread_mutexattr_getprotocol
+      (attr     : access pthread_mutexattr_t;
+       protocol : access int) return int;
+-   pragma Import
+-     (C, pthread_mutexattr_getprotocol, "pthread_mutexattr_getprotocol");
+ 
+    function pthread_mutexattr_setprioceiling
+      (attr     : access pthread_mutexattr_t;
+       prioceiling : int) return int;
+-   pragma Import
+-     (C, pthread_mutexattr_setprioceiling,
+-      "pthread_mutexattr_setprioceiling");
+ 
+    function pthread_mutexattr_getprioceiling
+      (attr     : access pthread_mutexattr_t;
+       prioceiling : access int) return int;
+-   pragma Import
+-     (C, pthread_mutexattr_getprioceiling,
+-      "pthread_mutexattr_getprioceiling");
+ 
+    type struct_sched_param is record
+       sched_priority : int;  --  scheduling priority
+@@ -593,8 +591,8 @@ private
+    --  #define sa_handler __sigaction_u._handler
+    --  #define sa_sigaction __sigaction_u._sigaction
+ 
+-   --  Should we add a signal_context type here ?
+-   --  How could it be done independent of the CPU architecture ?
++   --  Should we add a signal_context type here ???
++   --  How could it be done independent of the CPU architecture ???
+    --  sigcontext type is opaque, so it is architecturally neutral.
+    --  It is always passed as an access type, so define it as an empty record
+    --  since the contents are not used anywhere.
+@@ -611,9 +609,6 @@ private
+    end record;
+    pragma Convention (C, timespec);
+ 
+-   type clockid_t is new int;
+-   CLOCK_REALTIME : constant clockid_t := 0;
+-
+    type pthread_attr_t is record
+       detachstate   : int;
+       schedpolicy   : int;
+Index: b/src/gcc/ada/gsocket.h
+===================================================================
+--- a/src/gcc/ada/gsocket.h
++++ b/src/gcc/ada/gsocket.h
+@@ -241,7 +241,7 @@
+ # endif
+ #endif
+ 
+-#if defined (__FreeBSD__) || defined (__vxworks) || defined(__rtems__)
++#if defined (__FreeBSD__) || defined (__FreeBSD_kernel__) || defined (__vxworks) || defined(__rtems__) || defined(__GNU__)
+ # define Has_Sockaddr_Len 1
+ #else
+ # define Has_Sockaddr_Len 0
+Index: b/src/gcc/ada/s-oscons-tmplt.c
+===================================================================
+--- a/src/gcc/ada/s-oscons-tmplt.c
++++ b/src/gcc/ada/s-oscons-tmplt.c
+@@ -1435,7 +1435,7 @@ CND(CLOCK_FASTEST, "Fastest clock")
+ #endif
+ CND(CLOCK_THREAD_CPUTIME_ID, "Thread CPU clock")
+ 
+-#if defined(__FreeBSD__) || (defined(_AIX) && defined(_AIXVERSION_530))
++#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || (defined(_AIX) && defined(_AIXVERSION_530))
+ /** On these platforms use system provided monotonic clock instead of
+  ** the default CLOCK_REALTIME. We then need to set up cond var attributes
+  ** appropriately (see thread.c).
--- gcc-5-5.4.0.orig/debian/patches/ada-libgnatprj.diff
+++ gcc-5-5.4.0/debian/patches/ada-libgnatprj.diff
@@ -0,0 +1,982 @@
+# DP: - Introduce a new shared library named libgnatprj, containing
+# DP:   the GNAT project file manager licensed under the pure GPL, for
+# DP:   use in GNAT tools, GLADE and GPS.  Link the GNAT tools against
+# DP:   this new library.
+
+# This patch seems large, but the hunks in Makefile.in are actually
+# generated from Makefile.def using autogen.
+
+# !!! Must be applied after ada-libgnatvsn.dpatch
+
+Index: b/src/gcc/ada/gcc-interface/config-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/config-lang.in
++++ b/src/gcc/ada/gcc-interface/config-lang.in
+@@ -34,8 +34,8 @@ gtfiles="\$(srcdir)/ada/gcc-interface/ad
+ 
+ outputs="ada/gcc-interface/Makefile ada/Makefile"
+ 
+-target_libs="target-libada target-libgnatvsn"
+-lang_dirs="libada libgnatvsn gnattools"
++target_libs="target-libada target-libgnatvsn target-libgnatprj"
++lang_dirs="libada libgnatvsn libgnatprj gnattools"
+ 
+ # Ada is not enabled by default for the time being.
+ build_by_default=no
+Index: b/src/libgnatprj/Makefile.in
+===================================================================
+--- /dev/null
++++ b/src/libgnatprj/Makefile.in
+@@ -0,0 +1,180 @@
++# Makefile for libgnatprj.
++#   Copyright (c) 2006 Ludovic Brenta <ludovic@ludovic-brenta.org>
++#
++# This file is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 2 of the License, or
++# (at your option) any later version.
++# 
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++# 
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++
++# Default target; must be first.
++all: libgnatprj
++
++.SUFFIXES:
++
++CPUS := $(shell getconf _NPROCESSORS_ONLN)
++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \
++                 @srcdir@/../gcc/ada/gnatvsn.ads | \
++	         sed -e 's/.*"\(.*\)".*/\1/'))
++GCC=$(CC)
++GPP=$(CXX)
++LIBGNAT_JUST_BUILT := -nostdinc -I../../gcc/ada/rts
++LIBGNATVSN := -I../libgnatvsn
++CFLAGS := -g -O2
++ADAFLAGS := -g -O2 -gnatn
++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER)
++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE)
++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP)
++TOOLS_TARGET_PAIRS := @TOOLS_TARGET_PAIRS@
++LN_S := @LN_S@
++
++ifneq (@build@,@host@)
++   CFLAGS += -b @host@
++endif
++
++.PHONY: libgnatprj install
++libgnatprj: libgnatprj.so.$(LIB_VERSION) libgnatprj.a
++
++# Here we list one file per Ada unit: the body file if the unit has a
++# body, the spec file otherwise.
++PRJ_SOURCES := ali.adb ali-util.adb butil.adb binderr.adb errout.adb \
++erroutc.adb errutil.adb err_vars.ads fname-uf.adb fmap.adb impunit.adb \
++lib-util.adb makeutl.adb mlib.adb mlib-fil.adb mlib-tgt.adb \
++mlib-tgt-specific.adb mlib-utl.adb osint.adb osint-c.adb prj.adb prj-attr.adb \
++prj-attr-pm.adb prj-com.ads prj-conf.adb prj-dect.adb prj-env.adb prj-err.adb \
++prj-ext.adb prj-makr.adb prj-nmsc.adb prj-pars.adb prj-part.adb prj-pp.adb \
++prj-proc.adb prj-strt.adb prj-tree.adb prj-util.adb restrict.adb rident.ads \
++scng.adb sfn_scan.adb sinfo-cn.adb sinput-c.adb sinput-p.adb style.adb \
++styleg.adb stylesw.adb switch.adb switch-m.adb targparm.adb tempdir.adb
++
++# Source files generated in build/gcc/ada, not src/gcc/ada.
++GENERATED_SOURCES := sdefault.adb
++
++SOURCES := $(PRJ_SOURCES) $(GENERATED_SOURCES)
++
++OBJECTS := $(patsubst %.ads,%.o,$(SOURCES:.adb=.o))
++
++# Add some object files compiled from C sources.  prefix.o requires
++# some objects from libiberty and from gcc.
++OBJECTS += common-targhooks.o errors.o hooks.o link.o prefix.o targetm.o
++
++# These object files have already been built, both PIC and non-PIC.
++# prefix.o depends on them.
++LIBIBERTY_OBJECTS := concat.o filename_cmp.o lrealpath.o safe-ctype.o xexit.o xmalloc.o xstrdup.o
++
++vpath %.c @srcdir@ @srcdir@/../gcc @srcdir@/../gcc/common @srcdir@/../gcc/ada
++
++libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS))
++	: # Make libgnatprj.so
++	$(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ -Wl,--no-allow-shlib-undefined \
++	   $^ $(addprefix ../libiberty/pic/,$(LIBIBERTY_OBJECTS)) \
++	   -L../../gcc/ada/rts -lgnat-$(LIB_VERSION) \
++	   -L../libgnatvsn -lgnatvsn $(LDFLAGS)
++	$(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so
++	chmod a=r obj-shared/*.ali
++# Make the .ali files, but not the .o files, visible to the gnat tools.
++	cp -lp obj-shared/*.ali .
++
++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatprj-sources obj-shared
++
++obj-shared/%.o: %.adb
++	$(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@
++
++obj-shared/%.o: %.ads
++	$(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@
++
++obj-shared/%.o: %.c
++	$(GPP) -c -fPIC $(CFLAGS) -DHAVE_CONFIG_H -DIN_GCC -pedantic \
++	   -I@srcdir@/../gcc -I@srcdir@/../include -I@srcdir@/../libcpp/include -I../../gcc \
++	   $< -o $@
++
++obj-shared/prefix.o: @srcdir@/../gcc/prefix.c
++	$(GPP) -c -fPIC $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \
++	   -I@srcdir@/../gcc -I@srcdir@/../include -I../../gcc -I@srcdir@/../libcpp/include \
++	   $< -o $@
++
++obj-shared:
++	-mkdir $@
++
++libgnatprj.a: $(addprefix obj-static/,$(OBJECTS))
++	: # Make libgnatprj.a
++	ar rc $@ $^ $(addprefix ../libiberty/,$(LIBIBERTY_OBJECTS))
++	ranlib $@
++
++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatprj-sources obj-static
++
++obj-static/%.o: %.adb
++	$(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@
++
++obj-static/%.o: %.ads
++	$(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@
++
++obj-static/%.o: %.c
++	$(GPP) -c $(CFLAGS) -DHAVE_CONFIG_H -DIN_GCC -pedantic \
++	   -I@srcdir@/../gcc -I@srcdir@/../include -I@srcdir@/../libcpp/include -I../../gcc \
++	   $< -o $@
++
++obj-static/prefix.o: @srcdir@/../gcc/prefix.c
++	$(GPP) -c $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \
++	   -I@srcdir@/../gcc -I@srcdir@/../include -I../../gcc -I@srcdir@/../libcpp/include \
++	   $< -o $@
++
++obj-static:
++	-mkdir $@
++
++$(SOURCES): stamp-libgnatprj-sources
++
++stamp-libgnatprj-sources:
++	for file in $(PRJ_SOURCES); do \
++	   ads=$$(echo $$file | sed 's/\.adb/.ads/'); \
++	   if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) @srcdir@/../gcc/ada/$$file .; fi; \
++	   if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \
++	done
++	for file in $(GENERATED_SOURCES); do \
++	   ads=$$(echo $$file | sed 's/\.adb/.ads/'); \
++	   if [ -f ../../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) ../../gcc/ada/$$file .; fi; \
++	   if [ -f ../../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) ../../gcc/ada/$$ads .; \
++	   else \
++	      if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \
++	   fi; \
++	done
++	$(foreach PAIR,$(TOOLS_TARGET_PAIRS), \
++	          rm -f $(word 1,$(subst <, ,$(PAIR)));\
++	          $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \
++	                  $(word 1,$(subst <, ,$(PAIR)));)
++	touch $@
++
++# Generate a list of source files (.ads and .adb) to install.  Almost
++# all of them are in src/gcc/ada, but some are generated during build
++# and are in build/gcc/ada.
++BODIES := $(filter %.adb,$(PRJ_SOURCES))
++SPECS := $(filter %.ads,$(PRJ_SOURCES)) $(patsubst %.adb,%.ads,$(BODIES) $(GENERATED_SOURCES))
++SOURCES_TO_INSTALL := \
++$(addprefix  @srcdir@/../gcc/ada/,$(SPECS) $(BODIES)) \
++$(addprefix ../../gcc/ada/,$(GENERATED_SOURCES))
++
++libdir = @libdir@
++
++install: libgnatprj
++	$(INSTALL_DATA) libgnatprj.a $(DESTDIR)$(libdir)
++	$(INSTALL_DATA) libgnatprj.so.$(LIB_VERSION) $(DESTDIR)$(libdir)
++	cd $(DESTDIR)$(libdir); ln -sf libgnatprj.so.$(LIB_VERSION) libgnatprj.so
++	mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj
++	$(INSTALL_DATA) $(SOURCES_TO_INSTALL) \
++	   $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj
++	mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj
++	$(INSTALL) -m 0444 obj-shared/*.ali \
++	   $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj
++	chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj/*.ali
++
++.PHONY: clean
++clean:
++	rm -rf *.ali obj-static obj-shared libgnatprj* *.adb *.ads stamp*
+Index: b/src/libgnatprj/targetm.c
+===================================================================
+--- /dev/null
++++ b/src/libgnatprj/targetm.c
+@@ -0,0 +1,7 @@
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "common/common-target.h"
++#include "common/common-target-def.h"
++
++struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -184,6 +184,13 @@ target_modules = { module= libgnatvsn; n
+ 		   missing= TAGS;
+ 		   missing= install-info;
+ 		   missing= installcheck; };
++target_modules = { module= libgnatprj; no_check=true;
++		   missing= info;
++		   missing= dvi;
++		   missing= html;
++		   missing= TAGS;
++		   missing= install-info;
++		   missing= installcheck; };
+ target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; };
+ target_modules = { module= libitm; lib_path=.libs; };
+ target_modules = { module= libatomic; lib_path=.libs; };
+@@ -379,8 +386,12 @@ dependencies = { module=all-fixincludes;
+ dependencies = { module=all-target-libada; on=all-gcc; };
+ dependencies = { module=all-gnattools; on=all-target-libada; };
+ dependencies = { module=all-gnattools; on=all-target-libgnatvsn; };
++dependencies = { module=all-gnattools; on=all-target-libgnatprj; };
+ dependencies = { module=all-target-libgnatvsn; on=all-target-libada; };
++dependencies = { module=all-target-libgnatprj; on=all-target-libgnatvsn; };
++dependencies = { module=all-target-libgnatprj; on=all-target-libiberty; };
+ dependencies = { module=all-gnattools; on=all-target-libstdc++-v3; };
++dependencies = { module=all-target-libgnatvsn; on=all-target-libstdc++-v3; };
+ 
+ // Depending on the specific configuration, the LTO plugin will either use the
+ // generic libiberty build or the specific build for linker plugins.
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -177,6 +177,7 @@ target_libraries="target-libgcc \
+ 		target-libada \
+ 		${target_libiberty} \
+ 		target-libgnatvsn \
++		target-libgnatprj \
+ 		target-libgo"
+ 
+ # these tools are built using the target libraries, and are intended to
+@@ -446,7 +447,7 @@ AC_ARG_ENABLE(libada,
+ ENABLE_LIBADA=$enableval,
+ ENABLE_LIBADA=yes)
+ if test "${ENABLE_LIBADA}" != "yes" ; then
+-  noconfigdirs="$noconfigdirs target-libgnatvsn gnattools"
++  noconfigdirs="$noconfigdirs target-libgnatvsn target-libgnatprj gnattools"
+ fi
+ 
+ AC_ARG_ENABLE(libssp,
+Index: b/src/libgnatprj/configure.ac
+===================================================================
+--- /dev/null
++++ b/src/libgnatprj/configure.ac
+@@ -0,0 +1,146 @@
++# Configure script for libada.
++#   Copyright 2003, 2004 Free Software Foundation, Inc.
++#
++# This file is free software; you can redistribute it and/or modify it
++# under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 2 of the License, or
++# (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful, but
++# WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++# General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
++
++AC_INIT
++AC_PREREQ([2.63])
++
++AC_CONFIG_SRCDIR([Makefile.in])
++
++# Start of actual configure tests
++
++AC_PROG_INSTALL
++
++AC_CANONICAL_BUILD
++AC_CANONICAL_HOST
++AC_CANONICAL_TARGET
++
++sinclude(../config/acx.m4)
++ACX_NONCANONICAL_TARGET
++
++# Need to pass this down for now :-P
++AC_PROG_LN_S
++
++# Determine x_ada_cflags
++case $host in
++  hppa*) x_ada_cflags=-mdisable-indexing ;;
++  *) x_ada_cflags= ;;
++esac
++AC_SUBST([x_ada_cflags])
++
++# Determine what to build for 'gnattools'
++if test $build = $target ; then
++  # Note that build=target is almost certainly the wrong test; FIXME
++  default_gnattools_target="gnattools-native"
++else
++  default_gnattools_target="gnattools-cross"
++fi
++AC_SUBST([default_gnattools_target])
++
++# Target-specific stuff (defaults)
++TOOLS_TARGET_PAIRS=
++AC_SUBST(TOOLS_TARGET_PAIRS)
++
++# Per-target case statement
++# ---/----------------------
++case "${target}" in
++  alpha*-dec-vx*) # Unlike all other Vxworks
++    ;;
++  m68k*-wrs-vx* \
++  | powerpc*-wrs-vxworks \
++  | sparc*-wrs-vx* \
++  | *86-wrs-vxworks \
++  | xscale*-wrs-vx* \
++  | xscale*-wrs-coff \
++  | mips*-wrs-vx*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-vxworks.adb"
++    ;;
++  sparc-sun-solaris*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"
++    ;;
++  *86-*-solaris2*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-solaris.adb"
++    ;;
++  *86-*-linux* \
++  | aarch64*-*-linux* \
++  | arm*-*-linux* \
++  | powerpc*-*-linux* \
++  | *ia64-*-linux* \
++  | alpha*-*-linux* \
++  | sparc*-*-linux* \
++  | hppa*-*-linux* \
++  | mips*-*-linux* \
++  | m68k-*-linux \
++  | *x86_64-*-linux* \
++  | *86-*-kfreebsd*-gnu \
++  | *86-*-gnu \
++  | *x86_64-*-kfreebsd*-gnu )
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"
++    ;;
++  s390*-*-linux*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"
++    ;;
++  *86-*-freebsd*)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb"
++    ;;
++  mips-sgi-irix*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-irix.adb"
++    ;;
++  hppa*-hp-hpux10*) # Unlike hpux11
++    ;;
++  hppa*-hp-hpux11*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-hpux.adb"
++    ;;
++  *-ibm-aix*)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-aix.adb"
++    ;;
++  alpha*-dec-osf*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-tru64.adb"
++    ;;
++  alpha*-dec-vms* | alpha*-dec-openvms* | alpha*-dec-vms* \
++  | alpha*-hp-vms* | alpha*-hp-openvms* | alpha*-hp-vms*)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-vms-alpha.adb \
++    symbols.adb<symbols-vms.adb \
++    symbols-processing.adb<symbols-processing-vms-alpha.adb"
++    ;;
++  ia64*-dec-vms* | ia64*-dec-openvms* | ia64*-dec-vms* \
++  | ia64*-hp-vms* | ia64*-hp-openvms* | ia64*-hp-vms*)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-vms-ia64.adb \
++    symbols.adb<symbols-vms.adb \
++    symbols-processing.adb<symbols-processing-vms-ia64.adb"
++    ;;
++  *-*-cygwin32* | *-*-mingw32* | *-*-pe)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-mingw.adb"
++    ;;
++  powerpc-*-darwin*)
++    TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb<mlib-tgt-specific-darwin.adb"
++    ;;
++  *-*-lynxos)
++    TOOLS_TARGET_PAIRS="\
++    mlib-tgt-specific.adb<mlib-tgt-specific-lynxos.adb"
++    ;;
++esac
++
++# Output: create a Makefile.
++AC_CONFIG_FILES([Makefile])
++
++AC_OUTPUT
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -965,6 +965,7 @@ configure-target:  \
+     maybe-configure-target-rda \
+     maybe-configure-target-libada \
+     maybe-configure-target-libgnatvsn \
++    maybe-configure-target-libgnatprj \
+     maybe-configure-target-libgomp \
+     maybe-configure-target-libitm \
+     maybe-configure-target-libatomic
+@@ -1132,6 +1133,7 @@ all-target: maybe-all-target-boehm-gc
+ all-target: maybe-all-target-rda
+ all-target: maybe-all-target-libada
+ all-target: maybe-all-target-libgnatvsn
++all-target: maybe-all-target-libgnatprj
+ @if target-libgomp-no-bootstrap
+ all-target: maybe-all-target-libgomp
+ @endif target-libgomp-no-bootstrap
+@@ -1228,6 +1230,7 @@ info-target: maybe-info-target-boehm-gc
+ info-target: maybe-info-target-rda
+ info-target: maybe-info-target-libada
+ info-target: maybe-info-target-libgnatvsn
++info-target: maybe-info-target-libgnatprj
+ info-target: maybe-info-target-libgomp
+ info-target: maybe-info-target-libitm
+ info-target: maybe-info-target-libatomic
+@@ -1317,6 +1320,7 @@ dvi-target: maybe-dvi-target-boehm-gc
+ dvi-target: maybe-dvi-target-rda
+ dvi-target: maybe-dvi-target-libada
+ dvi-target: maybe-dvi-target-libgnatvsn
++dvi-target: maybe-dvi-target-libgnatprj
+ dvi-target: maybe-dvi-target-libgomp
+ dvi-target: maybe-dvi-target-libitm
+ dvi-target: maybe-dvi-target-libatomic
+@@ -1406,6 +1410,7 @@ pdf-target: maybe-pdf-target-boehm-gc
+ pdf-target: maybe-pdf-target-rda
+ pdf-target: maybe-pdf-target-libada
+ pdf-target: maybe-pdf-target-libgnatvsn
++pdf-target: maybe-pdf-target-libgnatprj
+ pdf-target: maybe-pdf-target-libgomp
+ pdf-target: maybe-pdf-target-libitm
+ pdf-target: maybe-pdf-target-libatomic
+@@ -1495,6 +1500,7 @@ html-target: maybe-html-target-boehm-gc
+ html-target: maybe-html-target-rda
+ html-target: maybe-html-target-libada
+ html-target: maybe-html-target-libgnatvsn
++html-target: maybe-html-target-libgnatprj
+ html-target: maybe-html-target-libgomp
+ html-target: maybe-html-target-libitm
+ html-target: maybe-html-target-libatomic
+@@ -1584,6 +1590,7 @@ TAGS-target: maybe-TAGS-target-boehm-gc
+ TAGS-target: maybe-TAGS-target-rda
+ TAGS-target: maybe-TAGS-target-libada
+ TAGS-target: maybe-TAGS-target-libgnatvsn
++TAGS-target: maybe-TAGS-target-libgnatprj
+ TAGS-target: maybe-TAGS-target-libgomp
+ TAGS-target: maybe-TAGS-target-libitm
+ TAGS-target: maybe-TAGS-target-libatomic
+@@ -1673,6 +1680,7 @@ install-info-target: maybe-install-info-
+ install-info-target: maybe-install-info-target-rda
+ install-info-target: maybe-install-info-target-libada
+ install-info-target: maybe-install-info-target-libgnatvsn
++install-info-target: maybe-install-info-target-libgnatprj
+ install-info-target: maybe-install-info-target-libgomp
+ install-info-target: maybe-install-info-target-libitm
+ install-info-target: maybe-install-info-target-libatomic
+@@ -1762,6 +1770,7 @@ install-pdf-target: maybe-install-pdf-ta
+ install-pdf-target: maybe-install-pdf-target-rda
+ install-pdf-target: maybe-install-pdf-target-libada
+ install-pdf-target: maybe-install-pdf-target-libgnatvsn
++install-pdf-target: maybe-install-pdf-target-libgnatprj
+ install-pdf-target: maybe-install-pdf-target-libgomp
+ install-pdf-target: maybe-install-pdf-target-libitm
+ install-pdf-target: maybe-install-pdf-target-libatomic
+@@ -1851,6 +1860,7 @@ install-html-target: maybe-install-html-
+ install-html-target: maybe-install-html-target-rda
+ install-html-target: maybe-install-html-target-libada
+ install-html-target: maybe-install-html-target-libgnatvsn
++install-html-target: maybe-install-html-target-libgnatprj
+ install-html-target: maybe-install-html-target-libgomp
+ install-html-target: maybe-install-html-target-libitm
+ install-html-target: maybe-install-html-target-libatomic
+@@ -1940,6 +1950,7 @@ installcheck-target: maybe-installcheck-
+ installcheck-target: maybe-installcheck-target-rda
+ installcheck-target: maybe-installcheck-target-libada
+ installcheck-target: maybe-installcheck-target-libgnatvsn
++installcheck-target: maybe-installcheck-target-libgnatprj
+ installcheck-target: maybe-installcheck-target-libgomp
+ installcheck-target: maybe-installcheck-target-libitm
+ installcheck-target: maybe-installcheck-target-libatomic
+@@ -2029,6 +2040,7 @@ mostlyclean-target: maybe-mostlyclean-ta
+ mostlyclean-target: maybe-mostlyclean-target-rda
+ mostlyclean-target: maybe-mostlyclean-target-libada
+ mostlyclean-target: maybe-mostlyclean-target-libgnatvsn
++mostlyclean-target: maybe-mostlyclean-target-libgnatprj
+ mostlyclean-target: maybe-mostlyclean-target-libgomp
+ mostlyclean-target: maybe-mostlyclean-target-libitm
+ mostlyclean-target: maybe-mostlyclean-target-libatomic
+@@ -2118,6 +2130,7 @@ clean-target: maybe-clean-target-boehm-g
+ clean-target: maybe-clean-target-rda
+ clean-target: maybe-clean-target-libada
+ clean-target: maybe-clean-target-libgnatvsn
++clean-target: maybe-clean-target-libgnatprj
+ clean-target: maybe-clean-target-libgomp
+ clean-target: maybe-clean-target-libitm
+ clean-target: maybe-clean-target-libatomic
+@@ -2207,6 +2220,7 @@ distclean-target: maybe-distclean-target
+ distclean-target: maybe-distclean-target-rda
+ distclean-target: maybe-distclean-target-libada
+ distclean-target: maybe-distclean-target-libgnatvsn
++distclean-target: maybe-distclean-target-libgnatprj
+ distclean-target: maybe-distclean-target-libgomp
+ distclean-target: maybe-distclean-target-libitm
+ distclean-target: maybe-distclean-target-libatomic
+@@ -2296,6 +2310,7 @@ maintainer-clean-target: maybe-maintaine
+ maintainer-clean-target: maybe-maintainer-clean-target-rda
+ maintainer-clean-target: maybe-maintainer-clean-target-libada
+ maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn
++maintainer-clean-target: maybe-maintainer-clean-target-libgnatprj
+ maintainer-clean-target: maybe-maintainer-clean-target-libgomp
+ maintainer-clean-target: maybe-maintainer-clean-target-libitm
+ maintainer-clean-target: maybe-maintainer-clean-target-libatomic
+@@ -2440,6 +2455,7 @@ check-target:  \
+     maybe-check-target-rda \
+     maybe-check-target-libada \
+     maybe-check-target-libgnatvsn \
++    maybe-check-target-libgnatprj \
+     maybe-check-target-libgomp \
+     maybe-check-target-libitm \
+     maybe-check-target-libatomic
+@@ -2616,6 +2632,7 @@ install-target:  \
+     maybe-install-target-rda \
+     maybe-install-target-libada \
+     maybe-install-target-libgnatvsn \
++    maybe-install-target-libgnatprj \
+     maybe-install-target-libgomp \
+     maybe-install-target-libitm \
+     maybe-install-target-libatomic
+@@ -2725,6 +2742,7 @@ install-strip-target:  \
+     maybe-install-strip-target-rda \
+     maybe-install-strip-target-libada \
+     maybe-install-strip-target-libgnatvsn \
++    maybe-install-strip-target-libgnatprj \
+     maybe-install-strip-target-libgomp \
+     maybe-install-strip-target-libitm \
+     maybe-install-strip-target-libatomic
+@@ -45988,6 +46006,362 @@ maintainer-clean-target-libgnatvsn:
+ 
+ 
+ 
++.PHONY: configure-target-libgnatprj maybe-configure-target-libgnatprj
++maybe-configure-target-libgnatprj:
++@if gcc-bootstrap
++configure-target-libgnatprj: stage_current
++@endif gcc-bootstrap
++@if target-libgnatprj
++maybe-configure-target-libgnatprj: configure-target-libgnatprj
++configure-target-libgnatprj: 
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	echo "Checking multilib configuration for libgnatprj..."; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatprj/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libgnatprj/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libgnatprj/Makefile; \
++	    mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libgnatprj/Makefile || exit 0; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	echo Configuring in $(TARGET_SUBDIR)/libgnatprj; \
++	cd "$(TARGET_SUBDIR)/libgnatprj" || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libgnatprj/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libgnatprj; \
++	rm -f no-such-file || : ; \
++	CONFIG_SITE=no-such-file $(SHELL) \
++	  $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias}  \
++	  || exit 1
++@endif target-libgnatprj
++
++
++
++
++
++.PHONY: all-target-libgnatprj maybe-all-target-libgnatprj
++maybe-all-target-libgnatprj:
++@if gcc-bootstrap
++all-target-libgnatprj: stage_current
++@endif gcc-bootstrap
++@if target-libgnatprj
++TARGET-target-libgnatprj=all
++maybe-all-target-libgnatprj: all-target-libgnatprj
++all-target-libgnatprj: configure-target-libgnatprj
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS)   \
++		$(TARGET-target-libgnatprj))
++@endif target-libgnatprj
++
++
++
++
++
++.PHONY: check-target-libgnatprj maybe-check-target-libgnatprj
++maybe-check-target-libgnatprj:
++@if target-libgnatprj
++maybe-check-target-libgnatprj: check-target-libgnatprj
++
++# Dummy target for uncheckable module.
++check-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: install-target-libgnatprj maybe-install-target-libgnatprj
++maybe-install-target-libgnatprj:
++@if target-libgnatprj
++maybe-install-target-libgnatprj: install-target-libgnatprj
++
++install-target-libgnatprj: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install)
++
++@endif target-libgnatprj
++
++.PHONY: install-strip-target-libgnatprj maybe-install-strip-target-libgnatprj
++maybe-install-strip-target-libgnatprj:
++@if target-libgnatprj
++maybe-install-strip-target-libgnatprj: install-strip-target-libgnatprj
++
++install-strip-target-libgnatprj: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install-strip)
++
++@endif target-libgnatprj
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-target-libgnatprj info-target-libgnatprj
++maybe-info-target-libgnatprj:
++@if target-libgnatprj
++maybe-info-target-libgnatprj: info-target-libgnatprj
++
++# libgnatprj doesn't support info.
++info-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-dvi-target-libgnatprj dvi-target-libgnatprj
++maybe-dvi-target-libgnatprj:
++@if target-libgnatprj
++maybe-dvi-target-libgnatprj: dvi-target-libgnatprj
++
++# libgnatprj doesn't support dvi.
++dvi-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-pdf-target-libgnatprj pdf-target-libgnatprj
++maybe-pdf-target-libgnatprj:
++@if target-libgnatprj
++maybe-pdf-target-libgnatprj: pdf-target-libgnatprj
++
++pdf-target-libgnatprj: \
++    configure-target-libgnatprj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing pdf in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           pdf) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-html-target-libgnatprj html-target-libgnatprj
++maybe-html-target-libgnatprj:
++@if target-libgnatprj
++maybe-html-target-libgnatprj: html-target-libgnatprj
++
++# libgnatprj doesn't support html.
++html-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-TAGS-target-libgnatprj TAGS-target-libgnatprj
++maybe-TAGS-target-libgnatprj:
++@if target-libgnatprj
++maybe-TAGS-target-libgnatprj: TAGS-target-libgnatprj
++
++# libgnatprj doesn't support TAGS.
++TAGS-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-install-info-target-libgnatprj install-info-target-libgnatprj
++maybe-install-info-target-libgnatprj:
++@if target-libgnatprj
++maybe-install-info-target-libgnatprj: install-info-target-libgnatprj
++
++# libgnatprj doesn't support install-info.
++install-info-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-install-pdf-target-libgnatprj install-pdf-target-libgnatprj
++maybe-install-pdf-target-libgnatprj:
++@if target-libgnatprj
++maybe-install-pdf-target-libgnatprj: install-pdf-target-libgnatprj
++
++install-pdf-target-libgnatprj: \
++    configure-target-libgnatprj \
++    pdf-target-libgnatprj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-pdf) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-install-html-target-libgnatprj install-html-target-libgnatprj
++maybe-install-html-target-libgnatprj:
++@if target-libgnatprj
++maybe-install-html-target-libgnatprj: install-html-target-libgnatprj
++
++install-html-target-libgnatprj: \
++    configure-target-libgnatprj \
++    html-target-libgnatprj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-html in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-html) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-installcheck-target-libgnatprj installcheck-target-libgnatprj
++maybe-installcheck-target-libgnatprj:
++@if target-libgnatprj
++maybe-installcheck-target-libgnatprj: installcheck-target-libgnatprj
++
++# libgnatprj doesn't support installcheck.
++installcheck-target-libgnatprj:
++
++@endif target-libgnatprj
++
++.PHONY: maybe-mostlyclean-target-libgnatprj mostlyclean-target-libgnatprj
++maybe-mostlyclean-target-libgnatprj:
++@if target-libgnatprj
++maybe-mostlyclean-target-libgnatprj: mostlyclean-target-libgnatprj
++
++mostlyclean-target-libgnatprj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           mostlyclean) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-clean-target-libgnatprj clean-target-libgnatprj
++maybe-clean-target-libgnatprj:
++@if target-libgnatprj
++maybe-clean-target-libgnatprj: clean-target-libgnatprj
++
++clean-target-libgnatprj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing clean in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           clean) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-distclean-target-libgnatprj distclean-target-libgnatprj
++maybe-distclean-target-libgnatprj:
++@if target-libgnatprj
++maybe-distclean-target-libgnatprj: distclean-target-libgnatprj
++
++distclean-target-libgnatprj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing distclean in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           distclean) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++.PHONY: maybe-maintainer-clean-target-libgnatprj maintainer-clean-target-libgnatprj
++maybe-maintainer-clean-target-libgnatprj:
++@if target-libgnatprj
++maybe-maintainer-clean-target-libgnatprj: maintainer-clean-target-libgnatprj
++
++maintainer-clean-target-libgnatprj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatprj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatprj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           maintainer-clean) \
++	  || exit 1
++
++@endif target-libgnatprj
++
++
++
++
++
+ .PHONY: configure-target-libgomp maybe-configure-target-libgomp
+ maybe-configure-target-libgomp:
+ @if gcc-bootstrap
+@@ -50123,6 +50497,7 @@ configure-target-boehm-gc: stage_last
+ configure-target-rda: stage_last
+ configure-target-libada: stage_last
+ configure-target-libgnatvsn: stage_last
++configure-target-libgnatprj: stage_last
+ configure-stage1-target-libgomp: maybe-all-stage1-gcc
+ configure-stage2-target-libgomp: maybe-all-stage2-gcc
+ configure-stage3-target-libgomp: maybe-all-stage3-gcc
+@@ -50159,6 +50534,7 @@ configure-target-boehm-gc: maybe-all-gcc
+ configure-target-rda: maybe-all-gcc
+ configure-target-libada: maybe-all-gcc
+ configure-target-libgnatvsn: maybe-all-gcc
++configure-target-libgnatprj: maybe-all-gcc
+ configure-target-libgomp: maybe-all-gcc
+ configure-target-libitm: maybe-all-gcc
+ configure-target-libatomic: maybe-all-gcc
+@@ -50501,8 +50877,12 @@ all-stagefeedback-fixincludes: maybe-all
+ all-target-libada: maybe-all-gcc
+ all-gnattools: maybe-all-target-libada
+ all-gnattools: maybe-all-target-libgnatvsn
++all-gnattools: maybe-all-target-libgnatprj
+ all-target-libgnatvsn: maybe-all-target-libada
++all-target-libgnatprj: maybe-all-target-libgnatvsn
++all-target-libgnatprj: maybe-all-target-libiberty
+ all-gnattools: maybe-all-target-libstdc++-v3
++all-target-libgnatvsn: maybe-all-target-libstdc++-v3
+ all-lto-plugin: maybe-all-libiberty
+ 
+ all-stage1-lto-plugin: maybe-all-stage1-libiberty
+@@ -51074,6 +51454,7 @@ configure-target-boehm-gc: maybe-all-tar
+ configure-target-rda: maybe-all-target-libgcc
+ configure-target-libada: maybe-all-target-libgcc
+ configure-target-libgnatvsn: maybe-all-target-libgcc
++configure-target-libgnatprj: maybe-all-target-libgcc
+ configure-target-libgomp: maybe-all-target-libgcc
+ configure-target-libitm: maybe-all-target-libgcc
+ configure-target-libatomic: maybe-all-target-libgcc
+@@ -51130,6 +51511,8 @@ configure-target-libada: maybe-all-targe
+ 
+ configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss
+ 
++configure-target-libgnatprj: maybe-all-target-newlib maybe-all-target-libgloss
++
+ configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss
+ 
+ configure-target-libitm: maybe-all-target-newlib maybe-all-target-libgloss
--- gcc-5-5.4.0.orig/debian/patches/ada-libgnatvsn.diff
+++ gcc-5-5.4.0/debian/patches/ada-libgnatvsn.diff
@@ -0,0 +1,836 @@
+# DP: - Introduce a new shared library named libgnatvsn, containing
+# DP:   common components of GNAT under the GNAT-Modified GPL, for
+# DP:   use in GNAT tools, ASIS, GLADE and GPS.   Link the gnat tools
+# DP:   against this new library.
+
+# This patch seems large, but the hunks in Makefile.in are actually
+# generated from Makefile.def using autogen.
+
+# !!! Must be applied after ada-link-lib.dpatch
+
+Index: b/src/libgnatvsn/configure
+===================================================================
+--- /dev/null
++++ b/src/libgnatvsn/configure
+@@ -0,0 +1,47 @@
++#!/bin/sh
++
++# Minimal configure script for libgnatvsn.  We're only interested in
++# a few parameters.
++
++for arg in $*; do
++    case ${arg} in
++	--build=*)
++	    build=`expr ${arg} : '--build=\(.\+\)'`;;
++	--host=*)
++	    host=`expr ${arg} : '--host=\(.\+\)'`;;
++	--target=*)
++	    target=`expr ${arg} : '--target=\(.\+\)'`;;
++	--prefix=*)
++	    prefix=`expr ${arg} : '--prefix=\(.\+\)'`;;
++	--srcdir=*)
++	    srcdir=`expr ${arg} : '--srcdir=\(.\+\)'`;;
++	--libdir=*)
++	    libdir=`expr ${arg} : '--libdir=\(.\+\)'`;;
++	--with-pkgversion=*)
++	    pkgversion=`expr ${arg} : '--with-pkgversion=\(.\+\)'`;;
++	--with-bugurl=*)
++	    bugurl=`expr ${arg} : '--with-bugurl=\(.\+\)'`;;
++	*)
++	    echo "Warning: ignoring option: ${arg}"
++    esac
++done
++
++echo "build: ${build}" | tee config.log
++echo "host: ${host}" | tee -a config.log
++echo "target: ${target}" | tee -a config.log
++echo "prefix: ${prefix}" | tee -a config.log
++echo "srcdir: ${srcdir}" | tee -a config.log
++echo "libdir: ${libdir}" | tee -a config.log
++echo "pkgversion: ${pkgversion}" | tee -a config.log
++echo "bugurl: ${bugurl}" | tee -a config.log
++
++echo "Creating Makefile..." | tee -a config.log
++sed -e "s,@build@,${build},g" \
++    -e "s,@host@,${host},g" \
++    -e "s,@target@,${target},g" \
++    -e "s,@prefix@,${prefix},g" \
++    -e "s,@srcdir@,${srcdir},g" \
++    -e "s,@libdir@,${libdir},g" \
++    -e "s,@PKGVERSION@,${pkgversion},g" \
++    -e "s,@REPORT_BUGS_TO@,${bugurl},g" \
++    < ${srcdir}/Makefile.in > Makefile
+Index: b/src/libgnatvsn/Makefile.in
+===================================================================
+--- /dev/null
++++ b/src/libgnatvsn/Makefile.in
+@@ -0,0 +1,153 @@
++# Makefile for libgnatvsn.
++#   Copyright (c) 2006 Ludovic Brenta <ludovic@ludovic-brenta.org>
++#
++# This file is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 2 of the License, or
++# (at your option) any later version.
++# 
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++# 
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
++
++# Default target; must be first.
++all: libgnatvsn
++
++.SUFFIXES:
++
++CPUS := $(shell getconf _NPROCESSORS_ONLN)
++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \
++                 @srcdir@/../gcc/ada/gnatvsn.ads | \
++	         sed -e 's/.*"\(.*\)".*/\1/'))
++GCC:=$(CC)
++LIBGNAT_JUST_BUILT := -nostdinc -I../../gcc/ada/rts
++CFLAGS := -g -O2 -gnatn
++FULLVER := $(shell cat @srcdir@/../gcc/FULL-VER)
++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE)
++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP)
++
++# For use in version.c - double quoted strings, with appropriate
++# surrounding punctuation and spaces, and with the datestamp and
++# development phase collapsed to the empty string in release mode
++# (i.e. if DEVPHASE_c is empty).  The space immediately after the
++# comma in the $(if ...) constructs is significant - do not remove it.
++FULLVER_s   := "\"$(FULLVER)\""
++DEVPHASE_s  := "\"$(if $(DEVPHASE), ($(DEVPHASE)))\""
++DATESTAMP_s := "\"$(if $(DEVPHASE), $(DATESTAMP))\""
++PKGVERSION_s:= "\"@PKGVERSION@\""
++BUGURL_s    := "\"@REPORT_BUGS_TO@\""
++
++.PHONY: libgnatvsn install
++libgnatvsn: libgnatvsn.so.$(LIB_VERSION) libgnatvsn.a
++
++VSN_SOURCES := alloc.ads aspects.adb atree.adb casing.adb csets.adb debug.adb einfo.adb \
++elists.adb fname.adb gnatvsn.adb hostparm.ads krunch.adb lib.adb namet.adb \
++nlists.adb opt.adb output.adb repinfo.adb scans.adb sinfo.adb sem_aux.adb \
++sinput.adb stand.adb stringt.adb table.adb tree_in.adb tree_io.adb types.adb \
++uintp.adb uname.adb urealp.adb widechar.adb
++
++VSN_SEPARATES := lib-list.adb lib-sort.adb
++
++VSN_GENERATED_SOURCES := snames.adb
++
++OBJECTS=$(patsubst %.ads,%.o,$(VSN_SOURCES:.adb=.o) $(VSN_GENERATED_SOURCES:.adb=.o)) version.o
++
++vpath %.c @srcdir@/../gcc
++
++libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS))
++	: # Make libgnatvsn.so
++	$(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \
++	   -L../../gcc/ada/rts -lgnat-$(LIB_VERSION) $(LDFLAGS)
++	ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so
++	chmod a=r obj-shared/*.ali
++# Make the .ali files, but not the .o files, visible to the gnat tools.
++	cp -lp obj-shared/*.ali .
++
++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-shared
++
++obj-shared/%.o: %.adb
++	$(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@
++
++obj-shared/%.o: %.ads
++	$(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@
++
++obj-shared/version.o: version.c
++	$(GCC) -c -fPIC -g -O2 \
++	   -DBASEVER=$(FULLVER_s) \
++	   -DDATESTAMP=$(DATESTAMP_s) \
++	   -DDEVPHASE=$(DEVPHASE_s) \
++	   -DPKGVERSION=$(PKGVERSION_s) \
++	   -DBUGURL=$(BUGURL_s) \
++	   -DREVISION= \
++	   $(realpath $<) -o $@
++
++obj-shared:
++	-mkdir $@
++
++libgnatvsn.a: $(addprefix obj-static/,$(OBJECTS))
++	: # Make libgnatvsn.a
++	ar rc $@ $^
++	ranlib $@
++
++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-static
++
++obj-static/%.o: %.adb
++	$(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@
++
++obj-static/%.o: %.ads
++	$(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@
++
++obj-static/version.o: version.c
++	$(GCC) -c -g -O2 \
++	   -DBASEVER=$(FULLVER_s) \
++	   -DDATESTAMP=$(DATESTAMP_s) \
++	   -DDEVPHASE=$(DEVPHASE_s) \
++	   -DPKGVERSION=$(PKGVERSION_s) \
++	   -DBUGURL=$(BUGURL_s) \
++	   -DREVISION= \
++	   $< -o $@
++
++obj-static:
++	-mkdir $@
++
++$(VSN_SOURCES) $(VSN_SEPARATES) $(VSN_GENERATED_SOURCES): stamp-libgnatvsn-sources
++
++stamp-libgnatvsn-sources:
++	for file in $(VSN_SOURCES) $(VSN_SEPARATES); do \
++	   ads=$$(echo $$file | sed 's/\.adb/.ads/'); \
++	   if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then ln -s @srcdir@/../gcc/ada/$$file .; fi; \
++	   if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s @srcdir@/../gcc/ada/$$ads .; fi; \
++	done
++	for file in $(VSN_GENERATED_SOURCES); do \
++	   ads=$$(echo $$file | sed 's/\.adb/.ads/'); \
++	   if [ -f ../../gcc/ada/$$file -a ! -L $$file ] ; then ln -s ../../gcc/ada/$$file .; fi; \
++	   if [ -f ../../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s ../../gcc/ada/$$ads .; fi; \
++	done
++	touch $@
++
++libdir = @libdir@
++
++install: libgnatvsn
++	$(INSTALL_DATA) libgnatvsn.a $(DESTDIR)$(libdir)
++	$(INSTALL_DATA) libgnatvsn.so.$(LIB_VERSION) $(DESTDIR)$(libdir)
++	cd $(DESTDIR)$(libdir); ln -sf libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so
++	mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn
++	$(INSTALL_DATA) \
++	   $(addprefix @srcdir@/../gcc/ada/,$(VSN_SOURCES) $(VSN_SEPARATES)) \
++	   $(addprefix @srcdir@/../gcc/ada/,$(patsubst %.adb,%.ads,$(filter %.adb,$(VSN_SOURCES)))) \
++	   $(addprefix ../../gcc/ada/,$(VSN_GENERATED_SOURCES)) \
++	   $(addprefix ../../gcc/ada/,$(patsubst %.adb,%.ads,$(VSN_GENERATED_SOURCES))) \
++	   $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn
++	mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn
++	$(INSTALL) -m 0444 obj-shared/*.ali \
++	   $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn
++	chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn/*.ali
++
++.PHONY: clean
++clean:
++	rm -rf *.ali obj-static obj-shared libgnatvsn* *.adb *.ads stamp*
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -177,6 +177,13 @@ target_modules = { module= libada; no_in
+ 		   missing= TAGS;
+ 		   missing= install-info;
+ 		   missing= installcheck; };
++target_modules = { module= libgnatvsn; no_check=true;
++		   missing= info;
++		   missing= dvi;
++		   missing= html;
++		   missing= TAGS;
++		   missing= install-info;
++		   missing= installcheck; };
+ target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; };
+ target_modules = { module= libitm; lib_path=.libs; };
+ target_modules = { module= libatomic; lib_path=.libs; };
+@@ -371,6 +378,8 @@ dependencies = { module=all-fixincludes;
+ 
+ dependencies = { module=all-target-libada; on=all-gcc; };
+ dependencies = { module=all-gnattools; on=all-target-libada; };
++dependencies = { module=all-gnattools; on=all-target-libgnatvsn; };
++dependencies = { module=all-target-libgnatvsn; on=all-target-libada; };
+ dependencies = { module=all-gnattools; on=all-target-libstdc++-v3; };
+ 
+ // Depending on the specific configuration, the LTO plugin will either use the
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -176,6 +176,7 @@ target_libraries="target-libgcc \
+ 		target-libobjc \
+ 		target-libada \
+ 		${target_libiberty} \
++		target-libgnatvsn \
+ 		target-libgo"
+ 
+ # these tools are built using the target libraries, and are intended to
+@@ -445,7 +446,7 @@ AC_ARG_ENABLE(libada,
+ ENABLE_LIBADA=$enableval,
+ ENABLE_LIBADA=yes)
+ if test "${ENABLE_LIBADA}" != "yes" ; then
+-  noconfigdirs="$noconfigdirs gnattools"
++  noconfigdirs="$noconfigdirs target-libgnatvsn gnattools"
+ fi
+ 
+ AC_ARG_ENABLE(libssp,
+Index: b/src/gcc/ada/gcc-interface/config-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/config-lang.in
++++ b/src/gcc/ada/gcc-interface/config-lang.in
+@@ -34,8 +34,8 @@ gtfiles="\$(srcdir)/ada/gcc-interface/ad
+ 
+ outputs="ada/gcc-interface/Makefile ada/Makefile"
+ 
+-target_libs="target-libada"
+-lang_dirs="libada gnattools"
++target_libs="target-libada target-libgnatvsn"
++lang_dirs="libada libgnatvsn gnattools"
+ 
+ # Ada is not enabled by default for the time being.
+ build_by_default=no
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -964,6 +964,7 @@ configure-target:  \
+     maybe-configure-target-boehm-gc \
+     maybe-configure-target-rda \
+     maybe-configure-target-libada \
++    maybe-configure-target-libgnatvsn \
+     maybe-configure-target-libgomp \
+     maybe-configure-target-libitm \
+     maybe-configure-target-libatomic
+@@ -1130,6 +1131,7 @@ all-target: maybe-all-target-zlib
+ all-target: maybe-all-target-boehm-gc
+ all-target: maybe-all-target-rda
+ all-target: maybe-all-target-libada
++all-target: maybe-all-target-libgnatvsn
+ @if target-libgomp-no-bootstrap
+ all-target: maybe-all-target-libgomp
+ @endif target-libgomp-no-bootstrap
+@@ -1225,6 +1227,7 @@ info-target: maybe-info-target-zlib
+ info-target: maybe-info-target-boehm-gc
+ info-target: maybe-info-target-rda
+ info-target: maybe-info-target-libada
++info-target: maybe-info-target-libgnatvsn
+ info-target: maybe-info-target-libgomp
+ info-target: maybe-info-target-libitm
+ info-target: maybe-info-target-libatomic
+@@ -1313,6 +1316,7 @@ dvi-target: maybe-dvi-target-zlib
+ dvi-target: maybe-dvi-target-boehm-gc
+ dvi-target: maybe-dvi-target-rda
+ dvi-target: maybe-dvi-target-libada
++dvi-target: maybe-dvi-target-libgnatvsn
+ dvi-target: maybe-dvi-target-libgomp
+ dvi-target: maybe-dvi-target-libitm
+ dvi-target: maybe-dvi-target-libatomic
+@@ -1401,6 +1405,7 @@ pdf-target: maybe-pdf-target-zlib
+ pdf-target: maybe-pdf-target-boehm-gc
+ pdf-target: maybe-pdf-target-rda
+ pdf-target: maybe-pdf-target-libada
++pdf-target: maybe-pdf-target-libgnatvsn
+ pdf-target: maybe-pdf-target-libgomp
+ pdf-target: maybe-pdf-target-libitm
+ pdf-target: maybe-pdf-target-libatomic
+@@ -1489,6 +1494,7 @@ html-target: maybe-html-target-zlib
+ html-target: maybe-html-target-boehm-gc
+ html-target: maybe-html-target-rda
+ html-target: maybe-html-target-libada
++html-target: maybe-html-target-libgnatvsn
+ html-target: maybe-html-target-libgomp
+ html-target: maybe-html-target-libitm
+ html-target: maybe-html-target-libatomic
+@@ -1577,6 +1583,7 @@ TAGS-target: maybe-TAGS-target-zlib
+ TAGS-target: maybe-TAGS-target-boehm-gc
+ TAGS-target: maybe-TAGS-target-rda
+ TAGS-target: maybe-TAGS-target-libada
++TAGS-target: maybe-TAGS-target-libgnatvsn
+ TAGS-target: maybe-TAGS-target-libgomp
+ TAGS-target: maybe-TAGS-target-libitm
+ TAGS-target: maybe-TAGS-target-libatomic
+@@ -1665,6 +1672,7 @@ install-info-target: maybe-install-info-
+ install-info-target: maybe-install-info-target-boehm-gc
+ install-info-target: maybe-install-info-target-rda
+ install-info-target: maybe-install-info-target-libada
++install-info-target: maybe-install-info-target-libgnatvsn
+ install-info-target: maybe-install-info-target-libgomp
+ install-info-target: maybe-install-info-target-libitm
+ install-info-target: maybe-install-info-target-libatomic
+@@ -1753,6 +1761,7 @@ install-pdf-target: maybe-install-pdf-ta
+ install-pdf-target: maybe-install-pdf-target-boehm-gc
+ install-pdf-target: maybe-install-pdf-target-rda
+ install-pdf-target: maybe-install-pdf-target-libada
++install-pdf-target: maybe-install-pdf-target-libgnatvsn
+ install-pdf-target: maybe-install-pdf-target-libgomp
+ install-pdf-target: maybe-install-pdf-target-libitm
+ install-pdf-target: maybe-install-pdf-target-libatomic
+@@ -1841,6 +1850,7 @@ install-html-target: maybe-install-html-
+ install-html-target: maybe-install-html-target-boehm-gc
+ install-html-target: maybe-install-html-target-rda
+ install-html-target: maybe-install-html-target-libada
++install-html-target: maybe-install-html-target-libgnatvsn
+ install-html-target: maybe-install-html-target-libgomp
+ install-html-target: maybe-install-html-target-libitm
+ install-html-target: maybe-install-html-target-libatomic
+@@ -1929,6 +1939,7 @@ installcheck-target: maybe-installcheck-
+ installcheck-target: maybe-installcheck-target-boehm-gc
+ installcheck-target: maybe-installcheck-target-rda
+ installcheck-target: maybe-installcheck-target-libada
++installcheck-target: maybe-installcheck-target-libgnatvsn
+ installcheck-target: maybe-installcheck-target-libgomp
+ installcheck-target: maybe-installcheck-target-libitm
+ installcheck-target: maybe-installcheck-target-libatomic
+@@ -2017,6 +2028,7 @@ mostlyclean-target: maybe-mostlyclean-ta
+ mostlyclean-target: maybe-mostlyclean-target-boehm-gc
+ mostlyclean-target: maybe-mostlyclean-target-rda
+ mostlyclean-target: maybe-mostlyclean-target-libada
++mostlyclean-target: maybe-mostlyclean-target-libgnatvsn
+ mostlyclean-target: maybe-mostlyclean-target-libgomp
+ mostlyclean-target: maybe-mostlyclean-target-libitm
+ mostlyclean-target: maybe-mostlyclean-target-libatomic
+@@ -2105,6 +2117,7 @@ clean-target: maybe-clean-target-zlib
+ clean-target: maybe-clean-target-boehm-gc
+ clean-target: maybe-clean-target-rda
+ clean-target: maybe-clean-target-libada
++clean-target: maybe-clean-target-libgnatvsn
+ clean-target: maybe-clean-target-libgomp
+ clean-target: maybe-clean-target-libitm
+ clean-target: maybe-clean-target-libatomic
+@@ -2193,6 +2206,7 @@ distclean-target: maybe-distclean-target
+ distclean-target: maybe-distclean-target-boehm-gc
+ distclean-target: maybe-distclean-target-rda
+ distclean-target: maybe-distclean-target-libada
++distclean-target: maybe-distclean-target-libgnatvsn
+ distclean-target: maybe-distclean-target-libgomp
+ distclean-target: maybe-distclean-target-libitm
+ distclean-target: maybe-distclean-target-libatomic
+@@ -2281,6 +2295,7 @@ maintainer-clean-target: maybe-maintaine
+ maintainer-clean-target: maybe-maintainer-clean-target-boehm-gc
+ maintainer-clean-target: maybe-maintainer-clean-target-rda
+ maintainer-clean-target: maybe-maintainer-clean-target-libada
++maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn
+ maintainer-clean-target: maybe-maintainer-clean-target-libgomp
+ maintainer-clean-target: maybe-maintainer-clean-target-libitm
+ maintainer-clean-target: maybe-maintainer-clean-target-libatomic
+@@ -2424,6 +2439,7 @@ check-target:  \
+     maybe-check-target-boehm-gc \
+     maybe-check-target-rda \
+     maybe-check-target-libada \
++    maybe-check-target-libgnatvsn \
+     maybe-check-target-libgomp \
+     maybe-check-target-libitm \
+     maybe-check-target-libatomic
+@@ -2599,6 +2615,7 @@ install-target:  \
+     maybe-install-target-boehm-gc \
+     maybe-install-target-rda \
+     maybe-install-target-libada \
++    maybe-install-target-libgnatvsn \
+     maybe-install-target-libgomp \
+     maybe-install-target-libitm \
+     maybe-install-target-libatomic
+@@ -2707,6 +2724,7 @@ install-strip-target:  \
+     maybe-install-strip-target-boehm-gc \
+     maybe-install-strip-target-rda \
+     maybe-install-strip-target-libada \
++    maybe-install-strip-target-libgnatvsn \
+     maybe-install-strip-target-libgomp \
+     maybe-install-strip-target-libitm \
+     maybe-install-strip-target-libatomic
+@@ -45614,6 +45632,362 @@ maintainer-clean-target-libada:
+ 
+ 
+ 
++.PHONY: configure-target-libgnatvsn maybe-configure-target-libgnatvsn
++maybe-configure-target-libgnatvsn:
++@if gcc-bootstrap
++configure-target-libgnatvsn: stage_current
++@endif gcc-bootstrap
++@if target-libgnatvsn
++maybe-configure-target-libgnatvsn: configure-target-libgnatvsn
++configure-target-libgnatvsn: 
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	echo "Checking multilib configuration for libgnatvsn..."; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libgnatvsn/Makefile; \
++	    mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libgnatvsn/Makefile || exit 0; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	echo Configuring in $(TARGET_SUBDIR)/libgnatvsn; \
++	cd "$(TARGET_SUBDIR)/libgnatvsn" || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libgnatvsn/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libgnatvsn; \
++	rm -f no-such-file || : ; \
++	CONFIG_SITE=no-such-file $(SHELL) \
++	  $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias}  \
++	  || exit 1
++@endif target-libgnatvsn
++
++
++
++
++
++.PHONY: all-target-libgnatvsn maybe-all-target-libgnatvsn
++maybe-all-target-libgnatvsn:
++@if gcc-bootstrap
++all-target-libgnatvsn: stage_current
++@endif gcc-bootstrap
++@if target-libgnatvsn
++TARGET-target-libgnatvsn=all
++maybe-all-target-libgnatvsn: all-target-libgnatvsn
++all-target-libgnatvsn: configure-target-libgnatvsn
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS)   \
++		$(TARGET-target-libgnatvsn))
++@endif target-libgnatvsn
++
++
++
++
++
++.PHONY: check-target-libgnatvsn maybe-check-target-libgnatvsn
++maybe-check-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-check-target-libgnatvsn: check-target-libgnatvsn
++
++# Dummy target for uncheckable module.
++check-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: install-target-libgnatvsn maybe-install-target-libgnatvsn
++maybe-install-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-install-target-libgnatvsn: install-target-libgnatvsn
++
++install-target-libgnatvsn: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install)
++
++@endif target-libgnatvsn
++
++.PHONY: install-strip-target-libgnatvsn maybe-install-strip-target-libgnatvsn
++maybe-install-strip-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-install-strip-target-libgnatvsn: install-strip-target-libgnatvsn
++
++install-strip-target-libgnatvsn: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install-strip)
++
++@endif target-libgnatvsn
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-target-libgnatvsn info-target-libgnatvsn
++maybe-info-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-info-target-libgnatvsn: info-target-libgnatvsn
++
++# libgnatvsn doesn't support info.
++info-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-dvi-target-libgnatvsn dvi-target-libgnatvsn
++maybe-dvi-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-dvi-target-libgnatvsn: dvi-target-libgnatvsn
++
++# libgnatvsn doesn't support dvi.
++dvi-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-pdf-target-libgnatvsn pdf-target-libgnatvsn
++maybe-pdf-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-pdf-target-libgnatvsn: pdf-target-libgnatvsn
++
++pdf-target-libgnatvsn: \
++    configure-target-libgnatvsn 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           pdf) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-html-target-libgnatvsn html-target-libgnatvsn
++maybe-html-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-html-target-libgnatvsn: html-target-libgnatvsn
++
++# libgnatvsn doesn't support html.
++html-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-TAGS-target-libgnatvsn TAGS-target-libgnatvsn
++maybe-TAGS-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-TAGS-target-libgnatvsn: TAGS-target-libgnatvsn
++
++# libgnatvsn doesn't support TAGS.
++TAGS-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-install-info-target-libgnatvsn install-info-target-libgnatvsn
++maybe-install-info-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-install-info-target-libgnatvsn: install-info-target-libgnatvsn
++
++# libgnatvsn doesn't support install-info.
++install-info-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-install-pdf-target-libgnatvsn install-pdf-target-libgnatvsn
++maybe-install-pdf-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-install-pdf-target-libgnatvsn: install-pdf-target-libgnatvsn
++
++install-pdf-target-libgnatvsn: \
++    configure-target-libgnatvsn \
++    pdf-target-libgnatvsn 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-pdf) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-install-html-target-libgnatvsn install-html-target-libgnatvsn
++maybe-install-html-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-install-html-target-libgnatvsn: install-html-target-libgnatvsn
++
++install-html-target-libgnatvsn: \
++    configure-target-libgnatvsn \
++    html-target-libgnatvsn 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-html in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-html) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-installcheck-target-libgnatvsn installcheck-target-libgnatvsn
++maybe-installcheck-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-installcheck-target-libgnatvsn: installcheck-target-libgnatvsn
++
++# libgnatvsn doesn't support installcheck.
++installcheck-target-libgnatvsn:
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-mostlyclean-target-libgnatvsn mostlyclean-target-libgnatvsn
++maybe-mostlyclean-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-mostlyclean-target-libgnatvsn: mostlyclean-target-libgnatvsn
++
++mostlyclean-target-libgnatvsn: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           mostlyclean) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-clean-target-libgnatvsn clean-target-libgnatvsn
++maybe-clean-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-clean-target-libgnatvsn: clean-target-libgnatvsn
++
++clean-target-libgnatvsn: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing clean in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           clean) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-distclean-target-libgnatvsn distclean-target-libgnatvsn
++maybe-distclean-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-distclean-target-libgnatvsn: distclean-target-libgnatvsn
++
++distclean-target-libgnatvsn: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing distclean in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           distclean) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++.PHONY: maybe-maintainer-clean-target-libgnatvsn maintainer-clean-target-libgnatvsn
++maybe-maintainer-clean-target-libgnatvsn:
++@if target-libgnatvsn
++maybe-maintainer-clean-target-libgnatvsn: maintainer-clean-target-libgnatvsn
++
++maintainer-clean-target-libgnatvsn: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatvsn" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libgnatvsn && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           maintainer-clean) \
++	  || exit 1
++
++@endif target-libgnatvsn
++
++
++
++
++
+ .PHONY: configure-target-libgomp maybe-configure-target-libgomp
+ maybe-configure-target-libgomp:
+ @if gcc-bootstrap
+@@ -49748,6 +50122,7 @@ configure-target-zlib: stage_last
+ configure-target-boehm-gc: stage_last
+ configure-target-rda: stage_last
+ configure-target-libada: stage_last
++configure-target-libgnatvsn: stage_last
+ configure-stage1-target-libgomp: maybe-all-stage1-gcc
+ configure-stage2-target-libgomp: maybe-all-stage2-gcc
+ configure-stage3-target-libgomp: maybe-all-stage3-gcc
+@@ -49783,6 +50158,7 @@ configure-target-zlib: maybe-all-gcc
+ configure-target-boehm-gc: maybe-all-gcc
+ configure-target-rda: maybe-all-gcc
+ configure-target-libada: maybe-all-gcc
++configure-target-libgnatvsn: maybe-all-gcc
+ configure-target-libgomp: maybe-all-gcc
+ configure-target-libitm: maybe-all-gcc
+ configure-target-libatomic: maybe-all-gcc
+@@ -50124,6 +50500,8 @@ all-stageprofile-fixincludes: maybe-all-
+ all-stagefeedback-fixincludes: maybe-all-stagefeedback-libiberty
+ all-target-libada: maybe-all-gcc
+ all-gnattools: maybe-all-target-libada
++all-gnattools: maybe-all-target-libgnatvsn
++all-target-libgnatvsn: maybe-all-target-libada
+ all-gnattools: maybe-all-target-libstdc++-v3
+ all-lto-plugin: maybe-all-libiberty
+ 
+@@ -50695,6 +51073,7 @@ configure-target-zlib: maybe-all-target-
+ configure-target-boehm-gc: maybe-all-target-libgcc
+ configure-target-rda: maybe-all-target-libgcc
+ configure-target-libada: maybe-all-target-libgcc
++configure-target-libgnatvsn: maybe-all-target-libgcc
+ configure-target-libgomp: maybe-all-target-libgcc
+ configure-target-libitm: maybe-all-target-libgcc
+ configure-target-libatomic: maybe-all-target-libgcc
+@@ -50749,6 +51128,8 @@ configure-target-rda: maybe-all-target-n
+ 
+ configure-target-libada: maybe-all-target-newlib maybe-all-target-libgloss
+ 
++configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss
++
+ configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss
+ 
+ configure-target-libitm: maybe-all-target-newlib maybe-all-target-libgloss
--- gcc-5-5.4.0.orig/debian/patches/ada-library-project-files-soname.diff
+++ gcc-5-5.4.0/debian/patches/ada-library-project-files-soname.diff
@@ -0,0 +1,81 @@
+# DP: - in project files, use the exact Library_Version provided, if any, as
+# DP:   the soname of libraries; do not strip minor version numbers
+# DP:   (PR ada/40025).
+
+Index: b/src/gcc/ada/mlib-tgt-specific-linux.adb
+===================================================================
+--- a/src/gcc/ada/mlib-tgt-specific-linux.adb
++++ b/src/gcc/ada/mlib-tgt-specific-linux.adb
+@@ -50,6 +50,8 @@ package body MLib.Tgt.Specific is
+ 
+    function Is_Archive_Ext (Ext : String) return Boolean;
+ 
++   function Library_Major_Minor_Id_Supported return Boolean;
++
+    ---------------------------
+    -- Build_Dynamic_Library --
+    ---------------------------
+@@ -142,7 +144,18 @@ package body MLib.Tgt.Specific is
+       return Ext = ".a" or else Ext = ".so";
+    end Is_Archive_Ext;
+ 
++   --------------------------------------
++   -- Library_Major_Minor_Id_Supported --
++   --------------------------------------
++
++   function Library_Major_Minor_Id_Supported return Boolean is
++   begin
++      return False;
++   end Library_Major_Minor_Id_Supported;
++
+ begin
+    Build_Dynamic_Library_Ptr := Build_Dynamic_Library'Access;
+    Is_Archive_Ext_Ptr := Is_Archive_Ext'Access;
++   Library_Major_Minor_Id_Supported_Ptr :=
++                                Library_Major_Minor_Id_Supported'Access;
+ end MLib.Tgt.Specific;
+Index: b/src/gcc/ada/mlib.adb
+===================================================================
+--- a/src/gcc/ada/mlib.adb
++++ b/src/gcc/ada/mlib.adb
+@@ -30,6 +30,7 @@ with System;
+ with Opt;
+ with Output; use Output;
+ 
++with MLib.Tgt;
+ with MLib.Utl; use MLib.Utl;
+ 
+ with Prj.Com;
+@@ -393,7 +394,11 @@ package body MLib is
+    -- Major_Id_Name --
+    -------------------
+ 
+-   function Major_Id_Name
++   function Major_Id_Name_If_Supported
++     (Lib_Filename : String;
++      Lib_Version  : String)
++      return String;
++   function Major_Id_Name_If_Supported
+      (Lib_Filename : String;
+       Lib_Version  : String)
+       return String
+@@ -447,6 +452,19 @@ package body MLib is
+       else
+          return "";
+       end if;
++   end Major_Id_Name_If_Supported;
++
++   function Major_Id_Name
++     (Lib_Filename : String;
++      Lib_Version  : String)
++      return String
++   is
++   begin
++      if MLib.Tgt.Library_Major_Minor_Id_Supported then
++         return Major_Id_Name_If_Supported (Lib_Filename, Lib_Version);
++      else
++         return "";
++      end if;
+    end Major_Id_Name;
+ 
+    -------------------------------
--- gcc-5-5.4.0.orig/debian/patches/ada-link-lib.diff
+++ gcc-5-5.4.0/debian/patches/ada-link-lib.diff
@@ -0,0 +1,1195 @@
+# DP: - Install the shared Ada libraries as '.so.1', not '.so' to conform
+# DP:   to the Debian policy.
+# DP: - Don't include a runtime link path (-rpath), when linking binaries.
+# DP: - Build the shared libraries on hppa-linux.
+# DP: - Instead of building libada as a target library only, build it as
+# DP:   both a host and, if different, target library.
+# DP: - Build the GNAT tools in their top-level directory; do not use
+# DP:   recursive makefiles.
+# DP: - Link the GNAT tools dynamically.
+
+# This patch seems large, but the hunks in Makefile.in are actually
+# generated from Makefile.def using autogen.
+
+Index: b/src/gcc/ada/gcc-interface/config-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/config-lang.in
++++ b/src/gcc/ada/gcc-interface/config-lang.in
+@@ -35,7 +35,7 @@ gtfiles="\$(srcdir)/ada/gcc-interface/ad
+ outputs="ada/gcc-interface/Makefile ada/Makefile"
+ 
+ target_libs="target-libada"
+-lang_dirs="gnattools"
++lang_dirs="libada gnattools"
+ 
+ # Ada is not enabled by default for the time being.
+ build_by_default=no
+Index: b/src/gcc/ada/link.c
+===================================================================
+--- a/src/gcc/ada/link.c
++++ b/src/gcc/ada/link.c
+@@ -105,9 +105,9 @@ const char *__gnat_default_libgcc_subdir
+ 
+ #elif defined (__FreeBSD__)
+ const char *__gnat_object_file_option = "-Wl,@";
+-const char *__gnat_run_path_option = "-Wl,-rpath,";
+-char __gnat_shared_libgnat_default = STATIC;
+-char __gnat_shared_libgcc_default = STATIC;
++const char *__gnat_run_path_option = "";
++char __gnat_shared_libgnat_default = SHARED;
++char __gnat_shared_libgcc_default = SHARED;
+ int __gnat_link_max = 8192;
+ unsigned char __gnat_objlist_file_supported = 1;
+ const char *__gnat_object_library_extension = ".a";
+@@ -127,9 +127,9 @@ const char *__gnat_default_libgcc_subdir
+ 
+ #elif defined (linux) || defined(__GLIBC__)
+ const char *__gnat_object_file_option = "-Wl,@";
+-const char *__gnat_run_path_option = "-Wl,-rpath,";
+-char __gnat_shared_libgnat_default = STATIC;
+-char __gnat_shared_libgcc_default = STATIC;
++const char *__gnat_run_path_option = "";
++char __gnat_shared_libgnat_default = SHARED;
++char __gnat_shared_libgcc_default = SHARED;
+ int __gnat_link_max = 8192;
+ unsigned char __gnat_objlist_file_supported = 1;
+ const char *__gnat_object_library_extension = ".a";
+Index: b/src/libada/Makefile.in
+===================================================================
+--- a/src/libada/Makefile.in
++++ b/src/libada/Makefile.in
+@@ -60,7 +60,7 @@ CFLAGS=-g
+ PICFLAG = @PICFLAG@
+ GNATLIBFLAGS= -W -Wall -gnatpg -nostdinc
+ GNATLIBCFLAGS= -g -O2
+-GNATLIBCFLAGS_FOR_C = -W -Wall $(GNATLIBCFLAGS) $(CFLAGS_FOR_TARGET) \
++GNATLIBCFLAGS_FOR_C = -W -Wall $(GNATLIBCFLAGS) \
+ 	-fexceptions -DIN_RTS @have_getipinfo@
+ 
+ host_subdir = @host_subdir@
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -115,7 +115,13 @@ host_modules= { module= libtermcap; no_c
+                 missing=distclean;
+                 missing=maintainer-clean; };
+ host_modules= { module= utils; no_check=true; };
+-host_modules= { module= gnattools; };
++host_modules= { module= gnattools; no_check=true;
++		missing= info;
++		missing= dvi;
++		missing= html;
++		missing= TAGS;
++		missing= install-info;
++		missing= installcheck; };
+ host_modules= { module= lto-plugin; bootstrap=true;
+ 		extra_configure_flags='--enable-shared @extra_linker_plugin_flags@ @extra_linker_plugin_configure_flags@';
+ 		extra_make_flags='@extra_linker_plugin_flags@'; };
+@@ -158,12 +164,19 @@ target_modules = { module= libtermcap; n
+ target_modules = { module= winsup; };
+ target_modules = { module= libgloss; no_check=true; };
+ target_modules = { module= libffi; no_install=true; };
++target_modules = { module= libiberty; no_install=true; no_check=true; };
+ target_modules = { module= libjava; raw_cxx=true;
+                    extra_configure_flags="$(EXTRA_CONFIGARGS_LIBJAVA)"; };
+ target_modules = { module= zlib; };
+ target_modules = { module= boehm-gc; };
+ target_modules = { module= rda; };
+-target_modules = { module= libada; };
++target_modules = { module= libada; no_install=true; no_check=true;
++		   missing= info;
++		   missing= dvi;
++		   missing= html;
++		   missing= TAGS;
++		   missing= install-info;
++		   missing= installcheck; };
+ target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; };
+ target_modules = { module= libitm; lib_path=.libs; };
+ target_modules = { module= libatomic; lib_path=.libs; };
+@@ -356,6 +369,7 @@ dependencies = { module=all-libcpp; on=a
+ 
+ dependencies = { module=all-fixincludes; on=all-libiberty; };
+ 
++dependencies = { module=all-target-libada; on=all-gcc; };
+ dependencies = { module=all-gnattools; on=all-target-libada; };
+ dependencies = { module=all-gnattools; on=all-target-libstdc++-v3; };
+ 
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -958,6 +958,7 @@ configure-target:  \
+     maybe-configure-target-winsup \
+     maybe-configure-target-libgloss \
+     maybe-configure-target-libffi \
++    maybe-configure-target-libiberty \
+     maybe-configure-target-libjava \
+     maybe-configure-target-zlib \
+     maybe-configure-target-boehm-gc \
+@@ -1123,6 +1124,7 @@ all-target: maybe-all-target-libtermcap
+ all-target: maybe-all-target-winsup
+ all-target: maybe-all-target-libgloss
+ all-target: maybe-all-target-libffi
++all-target: maybe-all-target-libiberty
+ all-target: maybe-all-target-libjava
+ all-target: maybe-all-target-zlib
+ all-target: maybe-all-target-boehm-gc
+@@ -1217,6 +1219,7 @@ info-target: maybe-info-target-libtermca
+ info-target: maybe-info-target-winsup
+ info-target: maybe-info-target-libgloss
+ info-target: maybe-info-target-libffi
++info-target: maybe-info-target-libiberty
+ info-target: maybe-info-target-libjava
+ info-target: maybe-info-target-zlib
+ info-target: maybe-info-target-boehm-gc
+@@ -1304,6 +1307,7 @@ dvi-target: maybe-dvi-target-libtermcap
+ dvi-target: maybe-dvi-target-winsup
+ dvi-target: maybe-dvi-target-libgloss
+ dvi-target: maybe-dvi-target-libffi
++dvi-target: maybe-dvi-target-libiberty
+ dvi-target: maybe-dvi-target-libjava
+ dvi-target: maybe-dvi-target-zlib
+ dvi-target: maybe-dvi-target-boehm-gc
+@@ -1391,6 +1395,7 @@ pdf-target: maybe-pdf-target-libtermcap
+ pdf-target: maybe-pdf-target-winsup
+ pdf-target: maybe-pdf-target-libgloss
+ pdf-target: maybe-pdf-target-libffi
++pdf-target: maybe-pdf-target-libiberty
+ pdf-target: maybe-pdf-target-libjava
+ pdf-target: maybe-pdf-target-zlib
+ pdf-target: maybe-pdf-target-boehm-gc
+@@ -1478,6 +1483,7 @@ html-target: maybe-html-target-libtermca
+ html-target: maybe-html-target-winsup
+ html-target: maybe-html-target-libgloss
+ html-target: maybe-html-target-libffi
++html-target: maybe-html-target-libiberty
+ html-target: maybe-html-target-libjava
+ html-target: maybe-html-target-zlib
+ html-target: maybe-html-target-boehm-gc
+@@ -1565,6 +1571,7 @@ TAGS-target: maybe-TAGS-target-libtermca
+ TAGS-target: maybe-TAGS-target-winsup
+ TAGS-target: maybe-TAGS-target-libgloss
+ TAGS-target: maybe-TAGS-target-libffi
++TAGS-target: maybe-TAGS-target-libiberty
+ TAGS-target: maybe-TAGS-target-libjava
+ TAGS-target: maybe-TAGS-target-zlib
+ TAGS-target: maybe-TAGS-target-boehm-gc
+@@ -1652,6 +1659,7 @@ install-info-target: maybe-install-info-
+ install-info-target: maybe-install-info-target-winsup
+ install-info-target: maybe-install-info-target-libgloss
+ install-info-target: maybe-install-info-target-libffi
++install-info-target: maybe-install-info-target-libiberty
+ install-info-target: maybe-install-info-target-libjava
+ install-info-target: maybe-install-info-target-zlib
+ install-info-target: maybe-install-info-target-boehm-gc
+@@ -1739,6 +1747,7 @@ install-pdf-target: maybe-install-pdf-ta
+ install-pdf-target: maybe-install-pdf-target-winsup
+ install-pdf-target: maybe-install-pdf-target-libgloss
+ install-pdf-target: maybe-install-pdf-target-libffi
++install-pdf-target: maybe-install-pdf-target-libiberty
+ install-pdf-target: maybe-install-pdf-target-libjava
+ install-pdf-target: maybe-install-pdf-target-zlib
+ install-pdf-target: maybe-install-pdf-target-boehm-gc
+@@ -1826,6 +1835,7 @@ install-html-target: maybe-install-html-
+ install-html-target: maybe-install-html-target-winsup
+ install-html-target: maybe-install-html-target-libgloss
+ install-html-target: maybe-install-html-target-libffi
++install-html-target: maybe-install-html-target-libiberty
+ install-html-target: maybe-install-html-target-libjava
+ install-html-target: maybe-install-html-target-zlib
+ install-html-target: maybe-install-html-target-boehm-gc
+@@ -1913,6 +1923,7 @@ installcheck-target: maybe-installcheck-
+ installcheck-target: maybe-installcheck-target-winsup
+ installcheck-target: maybe-installcheck-target-libgloss
+ installcheck-target: maybe-installcheck-target-libffi
++installcheck-target: maybe-installcheck-target-libiberty
+ installcheck-target: maybe-installcheck-target-libjava
+ installcheck-target: maybe-installcheck-target-zlib
+ installcheck-target: maybe-installcheck-target-boehm-gc
+@@ -2000,6 +2011,7 @@ mostlyclean-target: maybe-mostlyclean-ta
+ mostlyclean-target: maybe-mostlyclean-target-winsup
+ mostlyclean-target: maybe-mostlyclean-target-libgloss
+ mostlyclean-target: maybe-mostlyclean-target-libffi
++mostlyclean-target: maybe-mostlyclean-target-libiberty
+ mostlyclean-target: maybe-mostlyclean-target-libjava
+ mostlyclean-target: maybe-mostlyclean-target-zlib
+ mostlyclean-target: maybe-mostlyclean-target-boehm-gc
+@@ -2087,6 +2099,7 @@ clean-target: maybe-clean-target-libterm
+ clean-target: maybe-clean-target-winsup
+ clean-target: maybe-clean-target-libgloss
+ clean-target: maybe-clean-target-libffi
++clean-target: maybe-clean-target-libiberty
+ clean-target: maybe-clean-target-libjava
+ clean-target: maybe-clean-target-zlib
+ clean-target: maybe-clean-target-boehm-gc
+@@ -2174,6 +2187,7 @@ distclean-target: maybe-distclean-target
+ distclean-target: maybe-distclean-target-winsup
+ distclean-target: maybe-distclean-target-libgloss
+ distclean-target: maybe-distclean-target-libffi
++distclean-target: maybe-distclean-target-libiberty
+ distclean-target: maybe-distclean-target-libjava
+ distclean-target: maybe-distclean-target-zlib
+ distclean-target: maybe-distclean-target-boehm-gc
+@@ -2261,6 +2275,7 @@ maintainer-clean-target: maybe-maintaine
+ maintainer-clean-target: maybe-maintainer-clean-target-winsup
+ maintainer-clean-target: maybe-maintainer-clean-target-libgloss
+ maintainer-clean-target: maybe-maintainer-clean-target-libffi
++maintainer-clean-target: maybe-maintainer-clean-target-libiberty
+ maintainer-clean-target: maybe-maintainer-clean-target-libjava
+ maintainer-clean-target: maybe-maintainer-clean-target-zlib
+ maintainer-clean-target: maybe-maintainer-clean-target-boehm-gc
+@@ -2403,6 +2418,7 @@ check-target:  \
+     maybe-check-target-winsup \
+     maybe-check-target-libgloss \
+     maybe-check-target-libffi \
++    maybe-check-target-libiberty \
+     maybe-check-target-libjava \
+     maybe-check-target-zlib \
+     maybe-check-target-boehm-gc \
+@@ -2577,6 +2593,7 @@ install-target:  \
+     maybe-install-target-winsup \
+     maybe-install-target-libgloss \
+     maybe-install-target-libffi \
++    maybe-install-target-libiberty \
+     maybe-install-target-libjava \
+     maybe-install-target-zlib \
+     maybe-install-target-boehm-gc \
+@@ -2684,6 +2701,7 @@ install-strip-target:  \
+     maybe-install-strip-target-winsup \
+     maybe-install-strip-target-libgloss \
+     maybe-install-strip-target-libffi \
++    maybe-install-strip-target-libiberty \
+     maybe-install-strip-target-libjava \
+     maybe-install-strip-target-zlib \
+     maybe-install-strip-target-boehm-gc \
+@@ -30180,12 +30198,6 @@ maybe-check-gnattools:
+ maybe-check-gnattools: check-gnattools
+ 
+ check-gnattools:
+-	@: $(MAKE); $(unstage)
+-	@r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(FLAGS_TO_PASS)  check)
+ 
+ @endif gnattools
+ 
+@@ -30226,24 +30238,8 @@ maybe-info-gnattools:
+ @if gnattools
+ maybe-info-gnattools: info-gnattools
+ 
+-info-gnattools: \
+-    configure-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing info in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          info) \
+-	  || exit 1
++# gnattools doesn't support info.
++info-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -30252,24 +30248,8 @@ maybe-dvi-gnattools:
+ @if gnattools
+ maybe-dvi-gnattools: dvi-gnattools
+ 
+-dvi-gnattools: \
+-    configure-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing dvi in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          dvi) \
+-	  || exit 1
++# gnattools doesn't support dvi.
++dvi-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -30304,24 +30284,8 @@ maybe-html-gnattools:
+ @if gnattools
+ maybe-html-gnattools: html-gnattools
+ 
+-html-gnattools: \
+-    configure-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing html in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          html) \
+-	  || exit 1
++# gnattools doesn't support html.
++html-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -30330,24 +30294,8 @@ maybe-TAGS-gnattools:
+ @if gnattools
+ maybe-TAGS-gnattools: TAGS-gnattools
+ 
+-TAGS-gnattools: \
+-    configure-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing TAGS in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          TAGS) \
+-	  || exit 1
++# gnattools doesn't support TAGS.
++TAGS-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -30356,25 +30304,8 @@ maybe-install-info-gnattools:
+ @if gnattools
+ maybe-install-info-gnattools: install-info-gnattools
+ 
+-install-info-gnattools: \
+-    configure-gnattools \
+-    info-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing install-info in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          install-info) \
+-	  || exit 1
++# gnattools doesn't support install-info.
++install-info-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -30437,24 +30368,8 @@ maybe-installcheck-gnattools:
+ @if gnattools
+ maybe-installcheck-gnattools: installcheck-gnattools
+ 
+-installcheck-gnattools: \
+-    configure-gnattools 
+-	@: $(MAKE); $(unstage)
+-	@[ -f ./gnattools/Makefile ] || exit 0; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(HOST_EXPORTS) \
+-	for flag in $(EXTRA_HOST_FLAGS) ; do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	echo "Doing installcheck in gnattools" ; \
+-	(cd $(HOST_SUBDIR)/gnattools && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	          installcheck) \
+-	  || exit 1
++# gnattools doesn't support installcheck.
++installcheck-gnattools:
+ 
+ @endif gnattools
+ 
+@@ -43078,6 +42993,449 @@ maintainer-clean-target-libffi:
+ 
+ 
+ 
++.PHONY: configure-target-libiberty maybe-configure-target-libiberty
++maybe-configure-target-libiberty:
++@if gcc-bootstrap
++configure-target-libiberty: stage_current
++@endif gcc-bootstrap
++@if target-libiberty
++maybe-configure-target-libiberty: configure-target-libiberty
++configure-target-libiberty: 
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	echo "Checking multilib configuration for libiberty..."; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libiberty/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libiberty/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libiberty/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libiberty/Makefile; \
++	    mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libiberty/multilib.tmp $(TARGET_SUBDIR)/libiberty/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libiberty/Makefile || exit 0; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libiberty ; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	echo Configuring in $(TARGET_SUBDIR)/libiberty; \
++	cd "$(TARGET_SUBDIR)/libiberty" || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libiberty/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libiberty; \
++	rm -f no-such-file || : ; \
++	CONFIG_SITE=no-such-file $(SHELL) \
++	  $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias}  \
++	  || exit 1
++@endif target-libiberty
++
++
++
++
++
++.PHONY: all-target-libiberty maybe-all-target-libiberty
++maybe-all-target-libiberty:
++@if gcc-bootstrap
++all-target-libiberty: stage_current
++@endif gcc-bootstrap
++@if target-libiberty
++TARGET-target-libiberty=all
++maybe-all-target-libiberty: all-target-libiberty
++all-target-libiberty: configure-target-libiberty
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS)   \
++		$(TARGET-target-libiberty))
++@endif target-libiberty
++
++
++
++
++
++.PHONY: check-target-libiberty maybe-check-target-libiberty
++maybe-check-target-libiberty:
++@if target-libiberty
++maybe-check-target-libiberty: check-target-libiberty
++
++# Dummy target for uncheckable module.
++check-target-libiberty:
++
++@endif target-libiberty
++
++.PHONY: install-target-libiberty maybe-install-target-libiberty
++maybe-install-target-libiberty:
++@if target-libiberty
++maybe-install-target-libiberty: install-target-libiberty
++
++# Dummy target for uninstallable.
++install-target-libiberty:
++
++@endif target-libiberty
++
++.PHONY: install-strip-target-libiberty maybe-install-strip-target-libiberty
++maybe-install-strip-target-libiberty:
++@if target-libiberty
++maybe-install-strip-target-libiberty: install-strip-target-libiberty
++
++# Dummy target for uninstallable.
++install-strip-target-libiberty:
++
++@endif target-libiberty
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-target-libiberty info-target-libiberty
++maybe-info-target-libiberty:
++@if target-libiberty
++maybe-info-target-libiberty: info-target-libiberty
++
++info-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing info in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           info) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-dvi-target-libiberty dvi-target-libiberty
++maybe-dvi-target-libiberty:
++@if target-libiberty
++maybe-dvi-target-libiberty: dvi-target-libiberty
++
++dvi-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing dvi in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           dvi) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-pdf-target-libiberty pdf-target-libiberty
++maybe-pdf-target-libiberty:
++@if target-libiberty
++maybe-pdf-target-libiberty: pdf-target-libiberty
++
++pdf-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing pdf in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           pdf) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-html-target-libiberty html-target-libiberty
++maybe-html-target-libiberty:
++@if target-libiberty
++maybe-html-target-libiberty: html-target-libiberty
++
++html-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing html in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           html) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-TAGS-target-libiberty TAGS-target-libiberty
++maybe-TAGS-target-libiberty:
++@if target-libiberty
++maybe-TAGS-target-libiberty: TAGS-target-libiberty
++
++TAGS-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing TAGS in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           TAGS) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-install-info-target-libiberty install-info-target-libiberty
++maybe-install-info-target-libiberty:
++@if target-libiberty
++maybe-install-info-target-libiberty: install-info-target-libiberty
++
++install-info-target-libiberty: \
++    configure-target-libiberty \
++    info-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-info in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-info) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-install-pdf-target-libiberty install-pdf-target-libiberty
++maybe-install-pdf-target-libiberty:
++@if target-libiberty
++maybe-install-pdf-target-libiberty: install-pdf-target-libiberty
++
++install-pdf-target-libiberty: \
++    configure-target-libiberty \
++    pdf-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-pdf in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-pdf) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-install-html-target-libiberty install-html-target-libiberty
++maybe-install-html-target-libiberty:
++@if target-libiberty
++maybe-install-html-target-libiberty: install-html-target-libiberty
++
++install-html-target-libiberty: \
++    configure-target-libiberty \
++    html-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-html in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-html) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-installcheck-target-libiberty installcheck-target-libiberty
++maybe-installcheck-target-libiberty:
++@if target-libiberty
++maybe-installcheck-target-libiberty: installcheck-target-libiberty
++
++installcheck-target-libiberty: \
++    configure-target-libiberty 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing installcheck in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           installcheck) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-mostlyclean-target-libiberty mostlyclean-target-libiberty
++maybe-mostlyclean-target-libiberty:
++@if target-libiberty
++maybe-mostlyclean-target-libiberty: mostlyclean-target-libiberty
++
++mostlyclean-target-libiberty: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing mostlyclean in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           mostlyclean) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-clean-target-libiberty clean-target-libiberty
++maybe-clean-target-libiberty:
++@if target-libiberty
++maybe-clean-target-libiberty: clean-target-libiberty
++
++clean-target-libiberty: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing clean in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           clean) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-distclean-target-libiberty distclean-target-libiberty
++maybe-distclean-target-libiberty:
++@if target-libiberty
++maybe-distclean-target-libiberty: distclean-target-libiberty
++
++distclean-target-libiberty: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing distclean in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           distclean) \
++	  || exit 1
++
++@endif target-libiberty
++
++.PHONY: maybe-maintainer-clean-target-libiberty maintainer-clean-target-libiberty
++maybe-maintainer-clean-target-libiberty:
++@if target-libiberty
++maybe-maintainer-clean-target-libiberty: maintainer-clean-target-libiberty
++
++maintainer-clean-target-libiberty: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libiberty/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libiberty" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libiberty && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           maintainer-clean) \
++	  || exit 1
++
++@endif target-libiberty
++
++
++
++
++
+ .PHONY: configure-target-libjava maybe-configure-target-libjava
+ maybe-configure-target-libjava:
+ @if gcc-bootstrap
+@@ -44985,13 +45343,8 @@ maybe-check-target-libada:
+ @if target-libada
+ maybe-check-target-libada: check-target-libada
+ 
++# Dummy target for uncheckable module.
+ check-target-libada:
+-	@: $(MAKE); $(unstage)
+-	@r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(TARGET_FLAGS_TO_PASS)   check)
+ 
+ @endif target-libada
+ 
+@@ -45000,13 +45353,8 @@ maybe-install-target-libada:
+ @if target-libada
+ maybe-install-target-libada: install-target-libada
+ 
+-install-target-libada: installdirs
+-	@: $(MAKE); $(unstage)
+-	@r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install)
++# Dummy target for uninstallable.
++install-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45015,13 +45363,8 @@ maybe-install-strip-target-libada:
+ @if target-libada
+ maybe-install-strip-target-libada: install-strip-target-libada
+ 
+-install-strip-target-libada: installdirs
+-	@: $(MAKE); $(unstage)
+-	@r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install-strip)
++# Dummy target for uninstallable.
++install-strip-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45032,24 +45375,8 @@ maybe-info-target-libada:
+ @if target-libada
+ maybe-info-target-libada: info-target-libada
+ 
+-info-target-libada: \
+-    configure-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing info in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           info) \
+-	  || exit 1
++# libada doesn't support info.
++info-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45058,24 +45385,8 @@ maybe-dvi-target-libada:
+ @if target-libada
+ maybe-dvi-target-libada: dvi-target-libada
+ 
+-dvi-target-libada: \
+-    configure-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing dvi in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           dvi) \
+-	  || exit 1
++# libada doesn't support dvi.
++dvi-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45110,24 +45421,8 @@ maybe-html-target-libada:
+ @if target-libada
+ maybe-html-target-libada: html-target-libada
+ 
+-html-target-libada: \
+-    configure-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing html in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           html) \
+-	  || exit 1
++# libada doesn't support html.
++html-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45136,24 +45431,8 @@ maybe-TAGS-target-libada:
+ @if target-libada
+ maybe-TAGS-target-libada: TAGS-target-libada
+ 
+-TAGS-target-libada: \
+-    configure-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing TAGS in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           TAGS) \
+-	  || exit 1
++# libada doesn't support TAGS.
++TAGS-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45162,25 +45441,8 @@ maybe-install-info-target-libada:
+ @if target-libada
+ maybe-install-info-target-libada: install-info-target-libada
+ 
+-install-info-target-libada: \
+-    configure-target-libada \
+-    info-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing install-info in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           install-info) \
+-	  || exit 1
++# libada doesn't support install-info.
++install-info-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -45243,24 +45505,8 @@ maybe-installcheck-target-libada:
+ @if target-libada
+ maybe-installcheck-target-libada: installcheck-target-libada
+ 
+-installcheck-target-libada: \
+-    configure-target-libada 
+-	@: $(MAKE); $(unstage)
+-	@[ -f $(TARGET_SUBDIR)/libada/Makefile ] || exit 0 ; \
+-	r=`${PWD_COMMAND}`; export r; \
+-	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+-	$(NORMAL_TARGET_EXPORTS) \
+-	echo "Doing installcheck in $(TARGET_SUBDIR)/libada" ; \
+-	for flag in $(EXTRA_TARGET_FLAGS); do \
+-	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
+-	done; \
+-	(cd $(TARGET_SUBDIR)/libada && \
+-	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
+-	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
+-	          "RANLIB=$${RANLIB}" \
+-	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
+-	           installcheck) \
+-	  || exit 1
++# libada doesn't support installcheck.
++installcheck-target-libada:
+ 
+ @endif target-libada
+ 
+@@ -49496,6 +49742,7 @@ configure-target-libtermcap: stage_last
+ configure-target-winsup: stage_last
+ configure-target-libgloss: stage_last
+ configure-target-libffi: stage_last
++configure-target-libiberty: stage_last
+ configure-target-libjava: stage_last
+ configure-target-zlib: stage_last
+ configure-target-boehm-gc: stage_last
+@@ -49530,6 +49777,7 @@ configure-target-libtermcap: maybe-all-g
+ configure-target-winsup: maybe-all-gcc
+ configure-target-libgloss: maybe-all-gcc
+ configure-target-libffi: maybe-all-gcc
++configure-target-libiberty: maybe-all-gcc
+ configure-target-libjava: maybe-all-gcc
+ configure-target-zlib: maybe-all-gcc
+ configure-target-boehm-gc: maybe-all-gcc
+@@ -49874,6 +50122,7 @@ all-stage3-fixincludes: maybe-all-stage3
+ all-stage4-fixincludes: maybe-all-stage4-libiberty
+ all-stageprofile-fixincludes: maybe-all-stageprofile-libiberty
+ all-stagefeedback-fixincludes: maybe-all-stagefeedback-libiberty
++all-target-libada: maybe-all-gcc
+ all-gnattools: maybe-all-target-libada
+ all-gnattools: maybe-all-target-libstdc++-v3
+ all-lto-plugin: maybe-all-libiberty
+@@ -50440,6 +50689,7 @@ configure-target-libtermcap: maybe-all-t
+ configure-target-winsup: maybe-all-target-libgcc
+ configure-target-libgloss: maybe-all-target-libgcc
+ configure-target-libffi: maybe-all-target-libgcc
++configure-target-libiberty: maybe-all-target-libgcc
+ configure-target-libjava: maybe-all-target-libgcc
+ configure-target-zlib: maybe-all-target-libgcc
+ configure-target-boehm-gc: maybe-all-target-libgcc
+@@ -50487,6 +50737,7 @@ configure-target-winsup: maybe-all-targe
+ configure-target-libffi: maybe-all-target-newlib maybe-all-target-libgloss
+ configure-target-libffi: maybe-all-target-libstdc++-v3
+ 
++
+ configure-target-libjava: maybe-all-target-newlib maybe-all-target-libgloss
+ configure-target-libjava: maybe-all-target-libstdc++-v3
+ 
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -147,6 +147,11 @@ libgcj="target-libffi \
+ 	target-zlib \
+ 	target-libjava"
+ 
++case "${target}" in
++  hppa64-*linux*) ;;
++  *) target_libiberty="target-libiberty";;
++esac
++
+ # these libraries are built for the target environment, and are built after
+ # the host libraries and the host tools (which may be a cross compiler)
+ # Note that libiberty is not a target library.
+@@ -170,6 +175,7 @@ target_libraries="target-libgcc \
+ 		${libgcj} \
+ 		target-libobjc \
+ 		target-libada \
++		${target_libiberty} \
+ 		target-libgo"
+ 
+ # these tools are built using the target libraries, and are intended to
+Index: b/src/gcc/ada/gcc-interface/Make-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Make-lang.in
++++ b/src/gcc/ada/gcc-interface/Make-lang.in
+@@ -58,11 +58,7 @@ WARN_ADAFLAGS= -W -Wall
+ # need to be built by a recent/matching native so we might as well leave the
+ # checks fully active.
+ 
+-ifeq ($(CROSS),)
+ ADAFLAGS= $(COMMON_ADAFLAGS) -gnatwns
+-else
+-ADAFLAGS= $(COMMON_ADAFLAGS)
+-endif
+ 
+ ALL_ADAFLAGS = \
+   $(CFLAGS) $(ADA_CFLAGS) $(ADAFLAGS) $(CHECKING_ADAFLAGS) $(WARN_ADAFLAGS)
+Index: b/src/libada/configure.ac
+===================================================================
+--- a/src/libada/configure.ac
++++ b/src/libada/configure.ac
+@@ -127,8 +127,7 @@ AC_PROG_AWK
+ AC_PROG_LN_S
+ 
+ # Determine what to build for 'gnatlib'
+-if test $build = $target \
+-   && test ${enable_shared} = yes ; then
++if test ${enable_shared} = yes ; then
+   # Note that build=target is almost certainly the wrong test; FIXME
+   default_gnatlib_target="gnatlib-shared"
+ else
--- gcc-5-5.4.0.orig/debian/patches/ada-link-shlib.diff
+++ gcc-5-5.4.0/debian/patches/ada-link-shlib.diff
@@ -0,0 +1,89 @@
+# DP: In gnatlink, pass the options and libraries after objects to the
+# DP: linker to avoid link failures with --as-needed. Closes: #680292.
+
+Index: b/src/gcc/ada/mlib-tgt-specific-linux.adb
+===================================================================
+--- a/src/gcc/ada/mlib-tgt-specific-linux.adb
++++ b/src/gcc/ada/mlib-tgt-specific-linux.adb
+@@ -81,19 +81,54 @@ package body MLib.Tgt.Specific is
+       Version_Arg          : String_Access;
+       Symbolic_Link_Needed : Boolean := False;
+ 
++      N_Options    : Argument_List := Options;
++      Options_Last : Natural := N_Options'Last;
++      --  After moving -lxxx to Options_2, N_Options up to index Options_Last
++      --  will contain the Options to pass to MLib.Utl.Gcc.
++
++      Real_Options_2 : Argument_List (1 .. Options'Length);
++      Real_Options_2_Last : Natural := 0;
++      --  Real_Options_2 up to index Real_Options_2_Last will contain the
++      --  Options_2 to pass to MLib.Utl.Gcc.
++
+    begin
+       if Opt.Verbose_Mode then
+          Write_Str ("building relocatable shared library ");
+          Write_Line (Lib_Path);
+       end if;
+ 
++      --  Move all -lxxx to Options_2
++
++      declare
++         Index : Natural := N_Options'First;
++         Arg   : String_Access;
++
++      begin
++         while Index <= Options_Last loop
++            Arg := N_Options (Index);
++
++            if Arg'Length > 2
++              and then Arg (Arg'First .. Arg'First + 1) = "-l"
++            then
++               Real_Options_2_Last := Real_Options_2_Last + 1;
++               Real_Options_2 (Real_Options_2_Last) := Arg;
++               N_Options (Index .. Options_Last - 1) :=
++                 N_Options (Index + 1 .. Options_Last);
++               Options_Last := Options_Last - 1;
++
++            else
++               Index := Index + 1;
++            end if;
++         end loop;
++      end;
++
+       if Lib_Version = "" then
+          Utl.Gcc
+            (Output_File => Lib_Path,
+             Objects     => Ofiles,
+-            Options     => Options,
++            Options     => N_Options (N_Options'First .. Options_Last),
+             Driver_Name => Driver_Name,
+-            Options_2   => No_Argument_List);
++            Options_2   => Real_Options_2 (1 .. Real_Options_2_Last));
+ 
+       else
+          declare
+@@ -111,18 +146,20 @@ package body MLib.Tgt.Specific is
+                Utl.Gcc
+                  (Output_File => Lib_Version,
+                   Objects     => Ofiles,
+-                  Options     => Options & Version_Arg,
++                  Options     => N_Options (N_Options'First .. Options_Last)
++                                 & Version_Arg,
+                   Driver_Name => Driver_Name,
+-                  Options_2   => No_Argument_List);
++                  Options_2   => Real_Options_2 (1 .. Real_Options_2_Last));
+                Symbolic_Link_Needed := Lib_Version /= Lib_Path;
+ 
+             else
+                Utl.Gcc
+                  (Output_File => Lib_Dir & Directory_Separator & Lib_Version,
+                   Objects     => Ofiles,
+-                  Options     => Options & Version_Arg,
++                  Options     => N_Options (N_Options'First .. Options_Last)
++                                 & Version_Arg,
+                   Driver_Name => Driver_Name,
+-                  Options_2   => No_Argument_List);
++                  Options_2   => Real_Options_2 (1 .. Real_Options_2_Last));
+                Symbolic_Link_Needed :=
+                  Lib_Dir & Directory_Separator & Lib_Version /= Lib_Path;
+             end if;
--- gcc-5-5.4.0.orig/debian/patches/ada-m68k.diff
+++ gcc-5-5.4.0/debian/patches/ada-m68k.diff
@@ -0,0 +1,259 @@
+gcc/ada/
+
+2011-10-12  Mikael Pettersson  <mikpe@it.uu.se>
+
+	PR ada/48835
+	* gcc-interface/Makefile.in: Add support for m68k-linux.
+	* system-linux-m68k.ads: New file based on system-linux-ppc.ads
+	and system-vxworks-m68k.ads.
+	* s-memory.adb (Gnat_Malloc): New wrapper around Alloc, returning
+	the memory address as a pointer not an integer.
+	Add Gnat_Malloc -> __gnat_malloc export.
+	* s-memory.ads: Remove Alloc -> __gnat_malloc export.
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -2084,6 +2084,35 @@ ifeq ($(strip $(filter-out hppa% linux%,
+   LIBRARY_VERSION := $(LIB_VERSION)
+ endif
+ 
++# M68K Linux
++ifeq ($(strip $(filter-out m68k% linux%,$(arch) $(osys))),)
++  LIBGNAT_TARGET_PAIRS = \
++  a-intnam.ads<a-intnam-linux.ads \
++  s-inmaop.adb<s-inmaop-posix.adb \
++  s-intman.adb<s-intman-posix.adb \
++  s-linux.ads<s-linux.ads \
++  s-osinte.adb<s-osinte-posix.adb \
++  s-osinte.ads<s-osinte-linux.ads \
++  s-osprim.adb<s-osprim-posix.adb \
++  s-taprop.adb<s-taprop-linux.adb \
++  s-tasinf.ads<s-tasinf-linux.ads \
++  s-tasinf.adb<s-tasinf-linux.adb \
++  s-taspri.ads<s-taspri-posix.ads \
++  s-tpopsp.adb<s-tpopsp-posix-foreign.adb \
++  system.ads<system-linux-m68k.ads
++
++  TOOLS_TARGET_PAIRS =  \
++    mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \
++    indepsw.adb<indepsw-gnu.adb
++
++  EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
++  EH_MECHANISM=-gcc
++  THREADSLIB = -lpthread
++  GNATLIB_SHARED = gnatlib-shared-dual
++  GMEM_LIB = gmemlib
++  LIBRARY_VERSION := $(LIB_VERSION)
++endif
++
+ # SH4 Linux
+ ifeq ($(strip $(filter-out sh4% linux%,$(target_cpu) $(target_os))),)
+   LIBGNAT_TARGET_PAIRS = \
+Index: b/src/gcc/ada/s-memory.adb
+===================================================================
+--- a/src/gcc/ada/s-memory.adb
++++ b/src/gcc/ada/s-memory.adb
+@@ -47,6 +47,7 @@ with Ada.Exceptions;
+ with System.Soft_Links;
+ with System.Parameters;
+ with System.CRTL;
++with Ada.Unchecked_Conversion;
+ 
+ package body System.Memory is
+ 
+@@ -100,6 +101,22 @@ package body System.Memory is
+       return Result;
+    end Alloc;
+ 
++   type Char_Ptr is access all Character;
++   pragma Convention (C, Char_Ptr);
++   pragma No_Strict_Aliasing (Char_Ptr);
++
++   function To_Char_Ptr is
++      new Ada.Unchecked_Conversion (System.Address, Char_Ptr);
++
++   --  The function exported as __gnat_malloc MUST return a pointer type.
++   function Gnat_Malloc (Size : size_t) return Char_Ptr;
++   pragma Export (C, Gnat_Malloc, "__gnat_malloc");
++
++   function Gnat_Malloc (Size : size_t) return Char_Ptr is
++   begin
++      return To_Char_Ptr (Alloc (Size));
++   end Gnat_Malloc;
++
+    ----------
+    -- Free --
+    ----------
+Index: b/src/gcc/ada/s-memory.ads
+===================================================================
+--- a/src/gcc/ada/s-memory.ads
++++ b/src/gcc/ada/s-memory.ads
+@@ -100,7 +100,6 @@ private
+ 
+    --  The following names are used from the generated compiler code
+ 
+-   pragma Export (C, Alloc,   "__gnat_malloc");
+    pragma Export (C, Free,    "__gnat_free");
+    pragma Export (C, Realloc, "__gnat_realloc");
+ 
+Index: b/src/gcc/ada/system-linux-m68k.ads
+===================================================================
+--- /dev/null
++++ b/src/gcc/ada/system-linux-m68k.ads
+@@ -0,0 +1,154 @@
++------------------------------------------------------------------------------
++--                                                                          --
++--                        GNAT RUN-TIME COMPONENTS                          --
++--                                                                          --
++--                               S Y S T E M                                --
++--                                                                          --
++--                                 S p e c                                  --
++--                         (GNU/Linux/m68k Version)                         --
++--                                                                          --
++--          Copyright (C) 2014, Free Software Foundation, Inc.              --
++--                                                                          --
++-- This specification is derived from the Ada Reference Manual for use with --
++-- GNAT. The copyright notice above, and the license provisions that follow --
++-- apply solely to the  contents of the part following the private keyword. --
++--                                                                          --
++-- GNAT is free software;  you can  redistribute it  and/or modify it under --
++-- terms of the  GNU General Public License as published  by the Free Soft- --
++-- ware  Foundation;  either version 3,  or (at your option) any later ver- --
++-- sion.  GNAT is distributed in the hope that it will be useful, but WITH- --
++-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
++-- or FITNESS FOR A PARTICULAR PURPOSE.                                     --
++--                                                                          --
++-- As a special exception under Section 7 of GPL version 3, you are granted --
++-- additional permissions described in the GCC Runtime Library Exception,   --
++-- version 3.1, as published by the Free Software Foundation.               --
++--                                                                          --
++-- You should have received a copy of the GNU General Public License and    --
++-- a copy of the GCC Runtime Library Exception along with this program;     --
++-- see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see    --
++-- <http://www.gnu.org/licenses/>.                                          --
++--                                                                          --
++-- GNAT was originally developed  by the GNAT team at  New York University. --
++-- Extensive contributions were provided by Ada Core Technologies Inc.      --
++--                                                                          --
++------------------------------------------------------------------------------
++
++package System is
++   pragma Pure;
++   --  Note that we take advantage of the implementation permission to make
++   --  this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada
++   --  2005, this is Pure in any case (AI-362).
++
++   type Name is (SYSTEM_NAME_GNAT);
++   System_Name : constant Name := SYSTEM_NAME_GNAT;
++
++   --  System-Dependent Named Numbers
++
++   Min_Int               : constant := Long_Long_Integer'First;
++   Max_Int               : constant := Long_Long_Integer'Last;
++
++   Max_Binary_Modulus    : constant := 2 ** Long_Long_Integer'Size;
++   Max_Nonbinary_Modulus : constant := 2 ** Integer'Size - 1;
++
++   Max_Base_Digits       : constant := Long_Long_Float'Digits;
++   Max_Digits            : constant := Long_Long_Float'Digits;
++
++   Max_Mantissa          : constant := 63;
++   Fine_Delta            : constant := 2.0 ** (-Max_Mantissa);
++
++   Tick                  : constant := 0.000_001;
++
++   --  Storage-related Declarations
++
++   type Address is private;
++   pragma Preelaborable_Initialization (Address);
++   Null_Address : constant Address;
++
++   Storage_Unit : constant := 8;
++   Word_Size    : constant := 32;
++   Memory_Size  : constant := 2 ** 32;
++
++   --  Address comparison
++
++   function "<"  (Left, Right : Address) return Boolean;
++   function "<=" (Left, Right : Address) return Boolean;
++   function ">"  (Left, Right : Address) return Boolean;
++   function ">=" (Left, Right : Address) return Boolean;
++   function "="  (Left, Right : Address) return Boolean;
++
++   pragma Import (Intrinsic, "<");
++   pragma Import (Intrinsic, "<=");
++   pragma Import (Intrinsic, ">");
++   pragma Import (Intrinsic, ">=");
++   pragma Import (Intrinsic, "=");
++
++   --  Other System-Dependent Declarations
++
++   type Bit_Order is (High_Order_First, Low_Order_First);
++   Default_Bit_Order : constant Bit_Order := High_Order_First;
++   pragma Warnings (Off, Default_Bit_Order); -- kill constant condition warning
++
++   --  Priority-related Declarations (RM D.1)
++
++   --  Is the following actually true for GNU/Linux/m68k?
++   --
++   --  0 .. 98 corresponds to the system priority range 1 .. 99.
++   --
++   --  If the scheduling policy is SCHED_FIFO or SCHED_RR the runtime makes use
++   --  of the entire range provided by the system.
++   --
++   --  If the scheduling policy is SCHED_OTHER the only valid system priority
++   --  is 1 and other values are simply ignored.
++
++   Max_Priority           : constant Positive := 97;
++   Max_Interrupt_Priority : constant Positive := 98;
++
++   subtype Any_Priority       is Integer      range  0 .. 98;
++   subtype Priority           is Any_Priority range  0 .. 97;
++   subtype Interrupt_Priority is Any_Priority range 98 .. 98;
++
++   Default_Priority : constant Priority := 48;
++
++private
++
++   type Address is mod Memory_Size;
++   Null_Address : constant Address := 0;
++
++   --------------------------------------
++   -- System Implementation Parameters --
++   --------------------------------------
++
++   --  These parameters provide information about the target that is used
++   --  by the compiler. They are in the private part of System, where they
++   --  can be accessed using the special circuitry in the Targparm unit
++   --  whose source should be consulted for more detailed descriptions
++   --  of the individual switch values.
++
++   Backend_Divide_Checks     : constant Boolean := False;
++   Backend_Overflow_Checks   : constant Boolean := False;
++   Command_Line_Args         : constant Boolean := True;
++   Configurable_Run_Time     : constant Boolean := False;
++   Denorm                    : constant Boolean := True;
++   Duration_32_Bits          : constant Boolean := False;
++   Exit_Status_Supported     : constant Boolean := True;
++   Fractional_Fixed_Ops      : constant Boolean := False;
++   Frontend_Layout           : constant Boolean := False;
++   Machine_Overflows         : constant Boolean := False;
++   Machine_Rounds            : constant Boolean := True;
++   Preallocated_Stacks       : constant Boolean := False;
++   Signed_Zeros              : constant Boolean := True;
++   Stack_Check_Default       : constant Boolean := False;
++   Stack_Check_Probes        : constant Boolean := False;
++   Stack_Check_Limits        : constant Boolean := False;
++   Support_Aggregates        : constant Boolean := True;
++   Support_Atomic_Primitives : constant Boolean := True;
++   Support_Composite_Assign  : constant Boolean := True;
++   Support_Composite_Compare : constant Boolean := True;
++   Support_Long_Shifts       : constant Boolean := True;
++   Always_Compatible_Rep     : constant Boolean := False;
++   Suppress_Standard_Library : constant Boolean := False;
++   Use_Ada_Main_Program_Name : constant Boolean := False;
++   ZCX_By_Default            : constant Boolean := True;
++
++end System;
--- gcc-5-5.4.0.orig/debian/patches/ada-mips.diff
+++ gcc-5-5.4.0/debian/patches/ada-mips.diff
@@ -0,0 +1,23 @@
+# DP: Improve support for mips.
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -1815,10 +1815,15 @@ ifeq ($(strip $(filter-out mips linux%,$
+   s-taprop.adb<s-taprop-linux.adb \
+   s-tasinf.ads<s-tasinf-linux.ads \
+   s-tasinf.adb<s-tasinf-linux.adb \
+-  s-taspri.ads<s-taspri-posix.ads \
++  s-taspri.ads<s-taspri-posix-noaltstack.ads \
+   s-tpopsp.adb<s-tpopsp-posix-foreign.adb \
+   system.ads<system-linux-mips.ads
+ 
++  TOOLS_TARGET_PAIRS =  \
++    mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \
++    indepsw.adb<indepsw-gnu.adb
++
++  EXTRA_GNATRTL_TASKING_OBJS=s-linux.o
+   EH_MECHANISM=-gcc
+   THREADSLIB = -lpthread
+   GNATLIB_SHARED = gnatlib-shared-dual
--- gcc-5-5.4.0.orig/debian/patches/ada-nobiarch-check.diff
+++ gcc-5-5.4.0/debian/patches/ada-nobiarch-check.diff
@@ -0,0 +1,20 @@
+# DP: For biarch builds, disable the gnat testsuite for the non-default
+# architecture (no biarch support in gnat yet).
+
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -4510,7 +4510,11 @@
+ 	if [ -f $${rootme}/../expect/expect ] ; then  \
+ 	   TCL_LIBRARY=`cd .. ; cd $${srcdir}/../tcl/library ; ${PWD_COMMAND}` ; \
+ 	    export TCL_LIBRARY ; fi ; \
+-	$(RUNTEST) --tool $* $(RUNTESTFLAGS))
++	if [ "$*" = gnat ]; then \
++	  runtestflags="`echo '$(RUNTESTFLAGS)' | sed -r 's/,-m(32|64|x32)//g;s/,-mabi=(n32|64)//g'`"; \
++	  case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \
++	fi; \
++	$(RUNTEST) --tool $* $$runtestflags)
+ 
+ $(patsubst %,%-subtargets,$(filter-out $(lang_checks_parallelized),$(lang_checks))): check-%-subtargets:
+ 	@echo check-$*
--- gcc-5-5.4.0.orig/debian/patches/ada-revert-pr63225.diff
+++ gcc-5-5.4.0/debian/patches/ada-revert-pr63225.diff
@@ -0,0 +1,97 @@
+# DP: Revert the changes made to allow bootstrapping with -fno-inline.
+# DP: We allow inlining during bootstrap and this change breaks aliversion compatibility
+# DP: with earlier uploads of libgnatvsn5.  This patch shall be removed in the next
+# DP: major version of GNAT.
+
+Index: b/src/gcc/ada/uintp.adb
+===================================================================
+--- a/src/gcc/ada/uintp.adb
++++ b/src/gcc/ada/uintp.adb
+@@ -171,6 +171,22 @@ package body Uintp is
+    --  If Discard_Quotient is True, Quotient is set to No_Uint
+    --  If Discard_Remainder is True, Remainder is set to No_Uint
+ 
++   function Vector_To_Uint
++     (In_Vec   : UI_Vector;
++      Negative : Boolean) return Uint;
++   --  Functions that calculate values in UI_Vectors, call this function to
++   --  create and return the Uint value. In_Vec contains the multiple precision
++   --  (Base) representation of a non-negative value. Leading zeroes are
++   --  permitted. Negative is set if the desired result is the negative of the
++   --  given value. The result will be either the appropriate directly
++   --  represented value, or a table entry in the proper canonical format is
++   --  created and returned.
++   --
++   --  Note that Init_Operand puts a signed value in the result vector, but
++   --  Vector_To_Uint is always presented with a non-negative value. The
++   --  processing of signs is something that is done by the caller before
++   --  calling Vector_To_Uint.
++
+    ------------
+    -- Direct --
+    ------------
+Index: b/src/gcc/ada/uintp.ads
+===================================================================
+--- a/src/gcc/ada/uintp.ads
++++ b/src/gcc/ada/uintp.ads
+@@ -90,18 +90,6 @@ package Uintp is
+    Uint_Minus_80  : constant Uint;
+    Uint_Minus_128 : constant Uint;
+ 
+-   type UI_Vector is array (Pos range <>) of Int;
+-   --  Vector containing the integer values of a Uint value
+-
+-   --  Note: An earlier version of this package used pointers of arrays of Ints
+-   --  (dynamically allocated) for the Uint type. The change leads to a few
+-   --  less natural idioms used throughout this code, but eliminates all uses
+-   --  of the heap except for the table package itself. For example, Uint
+-   --  parameters are often converted to UI_Vectors for internal manipulation.
+-   --  This is done by creating the local UI_Vector using the function N_Digits
+-   --  on the Uint to find the size needed for the vector, and then calling
+-   --  Init_Operand to copy the values out of the table into the vector.
+-
+    -----------------
+    -- Subprograms --
+    -----------------
+@@ -264,22 +252,6 @@ package Uintp is
+    --  function is used for capacity checks, and it can be one bit off
+    --  without affecting its usage.
+ 
+-   function Vector_To_Uint
+-     (In_Vec   : UI_Vector;
+-      Negative : Boolean) return Uint;
+-   --  Functions that calculate values in UI_Vectors, call this function to
+-   --  create and return the Uint value. In_Vec contains the multiple precision
+-   --  (Base) representation of a non-negative value. Leading zeroes are
+-   --  permitted. Negative is set if the desired result is the negative of the
+-   --  given value. The result will be either the appropriate directly
+-   --  represented value, or a table entry in the proper canonical format is
+-   --  created and returned.
+-   --
+-   --  Note that Init_Operand puts a signed value in the result vector, but
+-   --  Vector_To_Uint is always presented with a non-negative value. The
+-   --  processing of signs is something that is done by the caller before
+-   --  calling Vector_To_Uint.
+-
+    ---------------------
+    -- Output Routines --
+    ---------------------
+@@ -527,6 +499,18 @@ private
+    --  UI_Vector is defined for this purpose and some internal subprograms
+    --  used for converting from one to the other are defined.
+ 
++   type UI_Vector is array (Pos range <>) of Int;
++   --  Vector containing the integer values of a Uint value
++
++   --  Note: An earlier version of this package used pointers of arrays of Ints
++   --  (dynamically allocated) for the Uint type. The change leads to a few
++   --  less natural idioms used throughout this code, but eliminates all uses
++   --  of the heap except for the table package itself. For example, Uint
++   --  parameters are often converted to UI_Vectors for internal manipulation.
++   --  This is done by creating the local UI_Vector using the function N_Digits
++   --  on the Uint to find the size needed for the vector, and then calling
++   --  Init_Operand to copy the values out of the table into the vector.
++
+    type Uint_Entry is record
+       Length : Pos;
+       --  Length of entry in Udigits table in digits (i.e. in words)
--- gcc-5-5.4.0.orig/debian/patches/ada-s-osinte-gnu.ads.diff
+++ gcc-5-5.4.0/debian/patches/ada-s-osinte-gnu.ads.diff
@@ -0,0 +1,753 @@
+--- /dev/null	2012-01-30 20:41:15.189616186 +0100
++++ b/src/gcc/ada/s-osinte-gnu.ads	2012-04-11 19:34:45.000000000 +0200
+@@ -0,0 +1,750 @@
++------------------------------------------------------------------------------
++--                                                                          --
++--                GNU ADA RUN-TIME LIBRARY (GNARL) COMPONENTS               --
++--                                                                          --
++--                   S Y S T E M . O S _ I N T E R F A C E                  --
++--                                                                          --
++--                                  S p e c                                 --
++--                                                                          --
++--             Copyright (C) 1991-1994, Florida State University            --
++--          Copyright (C) 1995-2011, Free Software Foundation, Inc.         --
++--                                                                          --
++-- GNARL is free software; you can  redistribute it  and/or modify it under --
++-- terms of the  GNU General Public License as published  by the Free Soft- --
++-- ware  Foundation;  either version 2,  or (at your option) any later ver- --
++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- --
++-- OUT ANY WARRANTY;  without even the  implied warranty of MERCHANTABILITY --
++-- or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License --
++-- for  more details.  You should have  received  a copy of the GNU General --
++-- Public License  distributed with GNARL; see file COPYING.  If not, write --
++-- to  the  Free Software Foundation,  51  Franklin  Street,  Fifth  Floor, --
++-- Boston, MA 02110-1301, USA.                                              --
++--                                                                          --
++-- As a special exception,  if other files  instantiate  generics from this --
++-- unit, or you link  this unit with other files  to produce an executable, --
++-- this  unit  does not  by itself cause  the resulting  executable  to  be --
++-- covered  by the  GNU  General  Public  License.  This exception does not --
++-- however invalidate  any other reasons why  the executable file  might be --
++-- covered by the  GNU Public License.                                      --
++--                                                                          --
++-- GNARL was developed by the GNARL team at Florida State University.       --
++-- Extensive contributions were provided by Ada Core Technologies, Inc.     --
++--                                                                          --
++------------------------------------------------------------------------------
++
++--  This is the GNU/Hurd version of this package
++
++--  This package encapsulates all direct interfaces to OS services
++--  that are needed by children of System.
++
++--  PLEASE DO NOT add any with-clauses to this package or remove the pragma
++--  Preelaborate. This package is designed to be a bottom-level (leaf) package
++
++with Interfaces.C;
++with Unchecked_Conversion;
++
++package System.OS_Interface is
++   pragma Preelaborate;
++
++   pragma Linker_Options ("-lpthread");
++   pragma Linker_Options ("-lrt");
++
++   subtype int            is Interfaces.C.int;
++   subtype char           is Interfaces.C.char;
++   subtype short          is Interfaces.C.short;
++   subtype long           is Interfaces.C.long;
++   subtype unsigned       is Interfaces.C.unsigned;
++   subtype unsigned_short is Interfaces.C.unsigned_short;
++   subtype unsigned_long  is Interfaces.C.unsigned_long;
++   subtype unsigned_char  is Interfaces.C.unsigned_char;
++   subtype plain_char     is Interfaces.C.plain_char;
++   subtype size_t         is Interfaces.C.size_t;
++
++   -----------
++   -- Errno --
++   -----------
++   --  From /usr/include/i386-gnu/bits/errno.h
++
++   function errno return int;
++   pragma Import (C, errno, "__get_errno");
++
++   EAGAIN   : constant := 1073741859;
++   EINTR    : constant := 1073741828;
++   EINVAL   : constant := 1073741846;
++   ENOMEM   : constant := 1073741836;
++   EPERM    : constant := 1073741825;
++   ETIMEDOUT    : constant := 1073741884;
++
++   -------------
++   -- Signals --
++   -------------
++   --  From /usr/include/i386-gnu/bits/signum.h
++
++   Max_Interrupt : constant := 32;
++   type Signal is new int range 0 .. Max_Interrupt;
++   for Signal'Size use int'Size;
++
++   SIGHUP     : constant := 1; --  hangup
++   SIGINT     : constant := 2; --  interrupt (rubout)
++   SIGQUIT    : constant := 3; --  quit (ASCD FS)
++   SIGILL     : constant := 4; --  illegal instruction (not reset)
++   SIGTRAP    : constant := 5; --  trace trap (not reset)
++   SIGIOT     : constant := 6; --  IOT instruction
++   SIGABRT    : constant := 6; --  used by abort, replace SIGIOT in the  future
++   SIGEMT     : constant := 7; --  EMT instruction
++   SIGFPE     : constant := 8; --  floating point exception
++   SIGKILL    : constant := 9; --  kill (cannot be caught or ignored)
++   SIGBUS     : constant := 10; --  bus error
++   SIGSEGV    : constant := 11; --  segmentation violation
++   SIGSYS     : constant := 12; --  bad argument to system call
++   SIGPIPE    : constant := 13; --  write on a pipe with no one to read it
++   SIGALRM    : constant := 14; --  alarm clock
++   SIGTERM    : constant := 15; --  software termination signal from kill
++   SIGURG     : constant := 16; --  urgent condition on IO channel
++   SIGSTOP    : constant := 17; --  stop (cannot be caught or ignored)
++   SIGTSTP    : constant := 18; --  user stop requested from tty
++   SIGCONT    : constant := 19; --  stopped process has been continued
++   SIGCLD     : constant := 20; --  alias for SIGCHLD
++   SIGCHLD    : constant := 20; --  child status change
++   SIGTTIN    : constant := 21; --  background tty read attempted
++   SIGTTOU    : constant := 22; --  background tty write attempted
++   SIGIO      : constant := 23; --  I/O possible (Solaris SIGPOLL alias)
++   SIGPOLL    : constant := 23; --  I/O possible (same as SIGIO?)
++   SIGXCPU    : constant := 24; --  CPU time limit exceeded
++   SIGXFSZ    : constant := 25; --  filesize limit exceeded
++   SIGVTALRM  : constant := 26; --  virtual timer expired
++   SIGPROF    : constant := 27; --  profiling timer expired
++   SIGWINCH   : constant := 28; --  window size change
++   SIGINFO    : constant := 29; --  information request (NetBSD/FreeBSD)
++   SIGUSR1    : constant := 30; --  user defined signal 1
++   SIGUSR2    : constant := 31; --  user defined signal 2
++   SIGLOST    : constant := 32; --  Resource lost (Sun); server died (GNU)
++--   SIGLTHRRES : constant := 32; --  GNU/LinuxThreads restart signal
++--   SIGLTHRCAN : constant := 33; --  GNU/LinuxThreads cancel signal
++--   SIGLTHRDBG : constant := 34; --  GNU/LinuxThreads debugger signal
++
++   SIGADAABORT : constant := SIGABRT;
++   --  Change this if you want to use another signal for task abort.
++   --  SIGTERM might be a good one.
++
++   type Signal_Set is array (Natural range <>) of Signal;
++
++   Unmasked    : constant Signal_Set := (
++      SIGTRAP,
++      --  To enable debugging on multithreaded applications, mark SIGTRAP to
++      --  be kept unmasked.
++
++      SIGBUS,
++
++      SIGTTIN, SIGTTOU, SIGTSTP,
++      --  Keep these three signals unmasked so that background processes
++      --  and IO behaves as normal "C" applications
++
++      SIGPROF,
++      --  To avoid confusing the profiler
++
++      SIGKILL, SIGSTOP);
++      --  These two signals actually cannot be masked;
++      --  POSIX simply won't allow it.
++
++   Reserved    : constant Signal_Set :=
++   --  I am not sure why the following signal is reserved.
++   --  I guess they are not supported by this version of GNU/Hurd.
++     (0 .. 0 => SIGVTALRM);
++
++   type sigset_t is private;
++
++   --  From /usr/include/signal.h /usr/include/i386-gnu/bits/sigset.h
++   function sigaddset (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigaddset, "sigaddset");
++
++   function sigdelset (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigdelset, "sigdelset");
++
++   function sigfillset (set : access sigset_t) return int;
++   pragma Import (C, sigfillset, "sigfillset");
++
++   function sigismember (set : access sigset_t; sig : Signal) return int;
++   pragma Import (C, sigismember, "sigismember");
++
++   function sigemptyset (set : access sigset_t) return int;
++   pragma Import (C, sigemptyset, "sigemptyset");
++
++   --  sigcontext is architecture dependent, so define it private
++   type struct_sigcontext is private;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h: Note: arg. order differs
++   type struct_sigaction is record
++      sa_handler : System.Address;
++      sa_mask    : sigset_t;
++      sa_flags   : int;
++   end record;
++   pragma Convention (C, struct_sigaction);
++
++   type struct_sigaction_ptr is access all struct_sigaction;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h
++   SIG_BLOCK   : constant := 1;
++   SIG_UNBLOCK : constant := 2;
++   SIG_SETMASK : constant := 3;
++
++   --  From /usr/include/i386-gnu/bits/signum.h
++   SIG_ERR  : constant := 1;
++   SIG_DFL  : constant := 0;
++   SIG_IGN  : constant := 1;
++   SIG_HOLD : constant := 2;
++
++   --  From /usr/include/i386-gnu/bits/sigaction.h
++   SA_SIGINFO : constant := 16#0040#;
++   SA_ONSTACK : constant := 16#0001#;
++
++   function sigaction
++     (sig  : Signal;
++      act  : struct_sigaction_ptr;
++      oact : struct_sigaction_ptr) return int;
++   pragma Import (C, sigaction, "sigaction");
++
++   ----------
++   -- Time --
++   ----------
++
++   Time_Slice_Supported : constant Boolean := True;
++   --  Indicates whether time slicing is supported (i.e SCHED_RR is supported)
++
++   type timespec is private;
++
++   function nanosleep (rqtp, rmtp : access timespec) return int;
++   pragma Import (C, nanosleep, "nanosleep");
++
++   type clockid_t is private;
++
++   CLOCK_REALTIME : constant clockid_t;
++
++   --  From: /usr/include/time.h
++   function clock_gettime
++     (clock_id : clockid_t;
++      tp       : access timespec)
++      return int;
++   pragma Import (C, clock_gettime, "clock_gettime");
++
++   function To_Duration (TS : timespec) return Duration;
++   pragma Inline (To_Duration);
++
++   function To_Timespec (D : Duration) return timespec;
++   pragma Inline (To_Timespec);
++
++   --  From: /usr/include/unistd.h
++   function sysconf (name : int) return long;
++   pragma Import (C, sysconf);
++
++   --  From /usr/include/i386-gnu/bits/confname.h
++   SC_CLK_TCK          : constant := 2;
++   SC_NPROCESSORS_ONLN : constant := 84;
++
++   -------------------------
++   -- Priority Scheduling --
++   -------------------------
++   --  From /usr/include/i386-gnu/bits/sched.h
++
++   SCHED_OTHER : constant := 0;
++   SCHED_FIFO  : constant := 1;
++   SCHED_RR    : constant := 2;
++
++   function To_Target_Priority
++     (Prio : System.Any_Priority) return Interfaces.C.int;
++   --  Maps System.Any_Priority to a POSIX priority.
++
++   -------------
++   -- Process --
++   -------------
++
++   type pid_t is private;
++
++   --  From: /usr/include/signal.h
++   function kill (pid : pid_t; sig : Signal) return int;
++   pragma Import (C, kill, "kill");
++
++   --  From: /usr/include/unistd.h
++   function getpid return pid_t;
++   pragma Import (C, getpid, "getpid");
++
++   ---------
++   -- LWP --
++   ---------
++
++   --  From: /usr/include/pthread/pthread.h
++   function lwp_self return System.Address;
++   --  lwp_self does not exist on this thread library, revert to pthread_self
++   --  which is the closest approximation (with getpid). This function is
++   --  needed to share 7staprop.adb across POSIX-like targets.
++   pragma Import (C, lwp_self, "pthread_self");
++
++   -------------
++   -- Threads --
++   -------------
++
++   type Thread_Body is access
++     function (arg : System.Address) return System.Address;
++   pragma Convention (C, Thread_Body);
++
++   function Thread_Body_Access is new
++     Unchecked_Conversion (System.Address, Thread_Body);
++
++   --  From: /usr/include/bits/pthread.h:typedef int __pthread_t;
++   --  /usr/include/pthread/pthreadtypes.h:typedef __pthread_t pthread_t;
++   type pthread_t is new unsigned_long;
++   subtype Thread_Id        is pthread_t;
++
++   function To_pthread_t is new Unchecked_Conversion
++     (unsigned_long, pthread_t);
++
++   type pthread_mutex_t     is limited private;
++   type pthread_cond_t      is limited private;
++   type pthread_attr_t      is limited private;
++   type pthread_mutexattr_t is limited private;
++   type pthread_condattr_t  is limited private;
++   type pthread_key_t       is private;
++
++   --  From /usr/include/pthread/pthreadtypes.h
++   PTHREAD_CREATE_DETACHED : constant := 1;
++   PTHREAD_CREATE_JOINABLE : constant := 0;
++
++   PTHREAD_SCOPE_PROCESS : constant := 1;
++   PTHREAD_SCOPE_SYSTEM  : constant := 0;
++
++   -----------
++   -- Stack --
++   -----------
++
++   --  From: /usr/include/i386-gnu/bits/sigstack.h
++   type stack_t is record
++      ss_sp    : System.Address;
++      ss_size  : size_t;
++      ss_flags : int;
++   end record;
++   pragma Convention (C, stack_t);
++
++   function sigaltstack
++     (ss  : not null access stack_t;
++      oss : access stack_t) return int;
++   pragma Import (C, sigaltstack, "sigaltstack");
++
++   Alternate_Stack : aliased System.Address;
++   --  This is a dummy definition, never used (Alternate_Stack_Size is null)
++
++   Alternate_Stack_Size : constant := 0;
++   --  No alternate signal stack is used on this platform
++
++   Stack_Base_Available : constant Boolean := False;
++   --  Indicates whether the stack base is available on this target
++
++   function Get_Stack_Base (thread : pthread_t) return Address;
++   pragma Inline (Get_Stack_Base);
++   --  returns the stack base of the specified thread. Only call this function
++   --  when Stack_Base_Available is True.
++
++   --  From: /usr/include/i386-gnu/bits/shm.h __getpagesize or getpagesize??
++   function Get_Page_Size return size_t;
++   function Get_Page_Size return Address;
++   pragma Import (C, Get_Page_Size, "__getpagesize");
++   --  Returns the size of a page
++
++   --  From /usr/include/i386-gnu/bits/mman.h
++   PROT_NONE  : constant := 0;
++   PROT_READ  : constant := 4;
++   PROT_WRITE : constant := 2;
++   PROT_EXEC  : constant := 1;
++   PROT_ALL   : constant := PROT_READ + PROT_WRITE + PROT_EXEC;
++   PROT_ON    : constant := PROT_NONE;
++   PROT_OFF   : constant := PROT_ALL;
++
++   --  From /usr/include/i386-gnu/bits/mman.h
++   function mprotect (addr : Address; len : size_t; prot : int) return int;
++   pragma Import (C, mprotect);
++
++   ---------------------------------------
++   -- Nonstandard Thread Initialization --
++   ---------------------------------------
++
++   procedure pthread_init;
++   pragma Inline (pthread_init);
++   --  This is a dummy procedure to share some GNULLI files
++
++   -------------------------
++   -- POSIX.1c  Section 3 --
++   -------------------------
++
++   --  From: /usr/include/signal.h:
++   --  sigwait (__const sigset_t *__restrict __set, int *__restrict __sig)
++   function sigwait (set : access sigset_t; sig : access Signal) return int;
++   pragma Import (C, sigwait, "sigwait");
++
++   --  From: /usr/include/pthread/pthread.h:
++   --  extern int pthread_kill (pthread_t thread, int signo);
++   function pthread_kill (thread : pthread_t; sig : Signal) return int;
++   pragma Import (C, pthread_kill, "pthread_kill");
++
++   --  From: /usr/include/i386-gnu/bits/sigthread.h
++   --  extern int pthread_sigmask (int __how, __const __sigset_t *__newmask,
++   --  __sigset_t *__oldmask) __THROW;
++   function pthread_sigmask
++     (how  : int;
++      set  : access sigset_t;
++      oset : access sigset_t) return int;
++   pragma Import (C, pthread_sigmask, "pthread_sigmask");
++
++   --------------------------
++   -- POSIX.1c  Section 11 --
++   --------------------------
++
++   --  From: /usr/include/pthread/pthread.h and
++   --  /usr/include/pthread/pthreadtypes.h
++   function pthread_mutexattr_init
++     (attr : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutexattr_init, "pthread_mutexattr_init");
++
++   function pthread_mutexattr_destroy
++     (attr : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutexattr_destroy, "pthread_mutexattr_destroy");
++
++   function pthread_mutex_init
++     (mutex : access pthread_mutex_t;
++      attr  : access pthread_mutexattr_t) return int;
++   pragma Import (C, pthread_mutex_init, "pthread_mutex_init");
++
++   function pthread_mutex_destroy (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_destroy, "pthread_mutex_destroy");
++
++   function pthread_mutex_lock (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_lock, "pthread_mutex_lock");
++
++   function pthread_mutex_unlock (mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_mutex_unlock, "pthread_mutex_unlock");
++
++   function pthread_condattr_init
++     (attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_condattr_init, "pthread_condattr_init");
++
++   function pthread_condattr_destroy
++     (attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_condattr_destroy, "pthread_condattr_destroy");
++
++   function pthread_cond_init
++     (cond : access pthread_cond_t;
++      attr : access pthread_condattr_t) return int;
++   pragma Import (C, pthread_cond_init, "pthread_cond_init");
++
++   function pthread_cond_destroy (cond : access pthread_cond_t) return int;
++   pragma Import (C, pthread_cond_destroy, "pthread_cond_destroy");
++
++   function pthread_cond_signal (cond : access pthread_cond_t) return int;
++   pragma Import (C, pthread_cond_signal, "pthread_cond_signal");
++
++   function pthread_cond_wait
++     (cond  : access pthread_cond_t;
++      mutex : access pthread_mutex_t) return int;
++   pragma Import (C, pthread_cond_wait, "pthread_cond_wait");
++
++   function pthread_cond_timedwait
++     (cond    : access pthread_cond_t;
++      mutex   : access pthread_mutex_t;
++      abstime : access timespec) return int;
++   pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait");
++
++   Relative_Timed_Wait : constant Boolean := False;
++   --  pthread_cond_timedwait requires an absolute delay time
++
++   --------------------------
++   -- POSIX.1c  Section 13 --
++   --------------------------
++   --  From /usr/include/pthread/pthreadtypes.h
++
++   PTHREAD_PRIO_NONE    : constant := 0;
++   PTHREAD_PRIO_PROTECT : constant := 2;
++   PTHREAD_PRIO_INHERIT : constant := 1;
++
++   --  From: /usr/include/pthread/pthread.h
++   function pthread_mutexattr_setprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : int) return int;
++   pragma Import (C, pthread_mutexattr_setprotocol,
++     "pthread_mutexattr_setprotocol");
++
++   function pthread_mutexattr_getprotocol
++     (attr     : access pthread_mutexattr_t;
++      protocol : access int) return int;
++   pragma Import (C, pthread_mutexattr_getprotocol,
++     "pthread_mutexattr_getprotocol");
++
++   function pthread_mutexattr_setprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : int) return int;
++   pragma Import (C, pthread_mutexattr_setprioceiling,
++     "pthread_mutexattr_setprioceiling");
++
++   function pthread_mutexattr_getprioceiling
++     (attr     : access pthread_mutexattr_t;
++      prioceiling : access int) return int;
++   pragma Import (C, pthread_mutexattr_getprioceiling,
++     "pthread_mutexattr_getprioceiling");
++
++   type struct_sched_param is record
++      sched_priority : int;  --  scheduling priority
++   end record;
++   pragma Convention (C, struct_sched_param);
++
++   function pthread_setschedparam
++     (thread : pthread_t;
++      policy : int;
++      param  : access struct_sched_param) return int;
++   pragma Import (C, pthread_setschedparam, "pthread_setschedparam");
++
++   function pthread_attr_setscope
++     (attr            : access pthread_attr_t;
++      contentionscope : int) return int;
++   pragma Import (C, pthread_attr_setscope, "pthread_attr_setscope");
++
++   function pthread_attr_getscope
++     (attr            : access pthread_attr_t;
++      contentionscope : access int) return int;
++   pragma Import (C, pthread_attr_getscope, "pthread_attr_getscope");
++
++   function pthread_attr_setinheritsched
++     (attr            : access pthread_attr_t;
++      inheritsched : int) return int;
++   pragma Import (C, pthread_attr_setinheritsched,
++     "pthread_attr_setinheritsched");
++
++   function pthread_attr_getinheritsched
++     (attr         : access pthread_attr_t;
++      inheritsched : access int) return int;
++   pragma Import (C, pthread_attr_getinheritsched,
++     "pthread_attr_getinheritsched");
++
++   function pthread_attr_setschedpolicy
++     (attr   : access pthread_attr_t;
++      policy : int) return int;
++   pragma Import (C, pthread_attr_setschedpolicy, "pthread_setschedpolicy");
++
++   function sched_yield return int;
++   pragma Import (C, sched_yield, "sched_yield");
++
++   ---------------------------
++   -- P1003.1c - Section 16 --
++   ---------------------------
++
++   function pthread_attr_init
++     (attributes : access pthread_attr_t) return int;
++   pragma Import (C, pthread_attr_init, "pthread_attr_init");
++
++   function pthread_attr_destroy
++     (attributes : access pthread_attr_t) return int;
++   pragma Import (C, pthread_attr_destroy, "pthread_attr_destroy");
++
++   function pthread_attr_setdetachstate
++     (attr        : access pthread_attr_t;
++      detachstate : int) return int;
++   pragma Import
++     (C, pthread_attr_setdetachstate, "pthread_attr_setdetachstate");
++
++   function pthread_attr_setstacksize
++     (attr      : access pthread_attr_t;
++      stacksize : size_t) return int;
++   pragma Import (C, pthread_attr_setstacksize, "pthread_attr_setstacksize");
++
++   --  From: /usr/include/pthread/pthread.h
++   function pthread_create
++     (thread        : access pthread_t;
++      attributes    : access pthread_attr_t;
++      start_routine : Thread_Body;
++      arg           : System.Address) return int;
++   pragma Import (C, pthread_create, "pthread_create");
++
++   procedure pthread_exit (status : System.Address);
++   pragma Import (C, pthread_exit, "pthread_exit");
++
++   function pthread_self return pthread_t;
++   pragma Import (C, pthread_self, "pthread_self");
++
++   --------------------------
++   -- POSIX.1c  Section 17 --
++   --------------------------
++
++   function pthread_setspecific
++     (key   : pthread_key_t;
++      value : System.Address) return int;
++   pragma Import (C, pthread_setspecific, "pthread_setspecific");
++
++   function pthread_getspecific (key : pthread_key_t) return System.Address;
++   pragma Import (C, pthread_getspecific, "pthread_getspecific");
++
++   type destructor_pointer is access procedure (arg : System.Address);
++   pragma Convention (C, destructor_pointer);
++
++   function pthread_key_create
++     (key        : access pthread_key_t;
++      destructor : destructor_pointer) return int;
++   pragma Import (C, pthread_key_create, "pthread_key_create");
++
++   --  From /usr/include/i386-gnu/bits/sched.h
++   --  1_024 == 1024??
++   CPU_SETSIZE : constant := 1_024;
++
++   type bit_field is array (1 .. CPU_SETSIZE) of Boolean;
++   for bit_field'Size use CPU_SETSIZE;
++   pragma Pack (bit_field);
++   pragma Convention (C, bit_field);
++
++   type cpu_set_t is record
++      bits : bit_field;
++   end record;
++   pragma Convention (C, cpu_set_t);
++
++   --  function pthread_setaffinity_np
++   --  (thread     : pthread_t;
++   --   cpusetsize : size_t;
++   --   cpuset     : access cpu_set_t) return int;
++   --   pragma Import (C, pthread_setaffinity_np,
++   --   "__gnat_pthread_setaffinity_np");
++
++private
++
++   type sigset_t is array (1 .. 4) of unsigned;
++
++   --  FIXME:
++   --  In GNU/Hurd the component sa_handler turns out to
++   --  be one a union type, and the selector is a macro:
++   --  #define sa_handler __sigaction_handler.sa_handler
++   --  #define sa_sigaction __sigaction_handler.sa_sigaction
++
++   --  In FreeBSD the component sa_handler turns out to
++   --  be one a union type, and the selector is a macro:
++   --  #define sa_handler __sigaction_u._handler
++   --  #define sa_sigaction __sigaction_u._sigaction
++
++   --  Should we add a signal_context type here ?
++   --  How could it be done independent of the CPU architecture ?
++   --  sigcontext type is opaque, so it is architecturally neutral.
++   --  It is always passed as an access type, so define it as an empty record
++   --  since the contents are not used anywhere.
++   type struct_sigcontext is null record;
++   pragma Convention (C, struct_sigcontext);
++
++   type pid_t is new int;
++
++   type time_t is new long;
++
++   type timespec is record
++      tv_sec  : time_t;
++      tv_nsec : long;
++   end record;
++   pragma Convention (C, timespec);
++
++   type clockid_t is new int;
++   CLOCK_REALTIME : constant clockid_t := 0;
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_attr pthread_attr_t;
++   --  /usr/include/bits/thread-attr.h: struct __pthread_attr...
++   --  /usr/include/pthread/pthreadtypes.h: enum __pthread_contentionscope
++   --   enum __pthread_detachstate detachstate;
++   --   enum __pthread_inheritsched inheritsched;
++   --   enum __pthread_contentionscope contentionscope;
++   --   Not used: schedpolicy   : int;
++   type pthread_attr_t is record
++      schedparam    : struct_sched_param;
++      stackaddr     : System.Address;
++      stacksize     : size_t;
++      guardsize     : size_t;
++      detachstate   : int;
++      inheritsched  : int;
++      contentionscope : int;
++      schedpolicy   : int;
++   end record;
++   pragma Convention (C, pthread_attr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_condattr pthread_condattr_t;
++   --  From: /usr/include/bits/condition-attr.h:
++   --  struct __pthread_condattr {
++   --    enum __pthread_process_shared pshared;
++   --    __Clockid_T Clock;}
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  enum __pthread_process_shared
++   type pthread_condattr_t is record
++      pshared : int;
++      clock   : clockid_t;
++   end record;
++   pragma Convention (C, pthread_condattr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_mutexattr pthread_mutexattr_t; and
++   --  /usr/include/bits/mutex-attr.h
++   --  struct __pthread_mutexattr {
++   --  Int Prioceiling;
++   --  Enum __Pthread_Mutex_Protocol Protocol;
++   --  Enum __Pthread_Process_Shared Pshared;
++   --  Enum __Pthread_Mutex_Type Mutex_Type;};
++   type pthread_mutexattr_t is record
++      prioceiling : int;
++      protocol    : int;
++      pshared     : int;
++      mutex_type  : int;
++   end record;
++   pragma Convention (C, pthread_mutexattr_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h
++   --  typedef struct __pthread_mutex pthread_mutex_t; and
++   --  /usr/include/bits/mutex.h:
++   --  struct __pthread_mutex {
++   --  __pthread_spinlock_t __held;
++   --  __pthread_spinlock_t __lock;
++   --  /* in cthreads, mutex_init does not initialized the third
++   --    pointer, as such, we cannot rely on its value for anything.  */
++   --    char *cthreadscompat1;
++   --  struct __pthread *__queue;
++   --  struct __pthread_mutexattr *attr;
++   --  void *data;
++   --  /*  up to this point, we are completely compatible with cthreads
++   --    and what libc expects.  */
++   --    void *owner;
++   --  unsigned locks;
++   --  /* if null then the default attributes apply.  */
++   --    };
++   type pthread_mutex_t is record
++      held          : int;
++      lock          : int;
++      cthreadcompat : System.Address;
++      queue         : System.Address;
++      attr          : System.Address;
++      data          : System.Address;
++      owner         : System.Address;
++      locks         : unsigned;
++   end record;
++   pragma Convention (C, pthread_mutex_t);
++   --  pointer needed?
++   --  type pthread_mutex_t_ptr is access pthread_mutex_t;
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef struct __pthread_cond pthread_cond_t;
++   --  typedef struct __pthread_condattr pthread_condattr_t;
++   --  /usr/include/bits/condition.h:struct __pthread_cond{}
++   --  pthread_condattr_t: see above!
++   --  /usr/include/bits/condition.h:    struct __pthread_condimpl *__impl;
++
++   type pthread_cond_t is record
++      lock       : int;
++      queue      : System.Address;
++      condattr   : System.Address;
++      impl       : System.Address;
++      data       : System.Address;
++   end record;
++   pragma Convention (C, pthread_cond_t);
++
++   --  From: /usr/include/pthread/pthreadtypes.h:
++   --  typedef __pthread_key pthread_key_t; and
++   --  /usr/include/bits/thread-specific.h:
++   --  typedef int __pthread_key;
++   type pthread_key_t is new int;
++
++end System.OS_Interface;
--- gcc-5-5.4.0.orig/debian/patches/ada-sjlj.diff
+++ gcc-5-5.4.0/debian/patches/ada-sjlj.diff
@@ -0,0 +1,1033 @@
+Index: b/src/libada-sjlj/Makefile.in
+===================================================================
+--- /dev/null
++++ b/src/libada-sjlj/Makefile.in
+@@ -0,0 +1,201 @@
++# Makefile for libada.
++#   Copyright (C) 2003-2015 Free Software Foundation, Inc.
++#
++# This file is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 3 of the License, or
++# (at your option) any later version.
++# 
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++# 
++# You should have received a copy of the GNU General Public License
++# along with this program; see the file COPYING3.  If not see
++# <http://www.gnu.org/licenses/>.
++
++# Default target; must be first.
++all: gnatlib
++	$(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE)
++
++.PHONY: all
++
++## Multilib support variables.
++MULTISRCTOP =
++MULTIBUILDTOP =
++MULTIDIRS =
++MULTISUBDIR =
++MULTIDO = true
++MULTICLEAN = true
++
++# Standard autoconf-set variables.
++SHELL = @SHELL@
++srcdir = @srcdir@
++libdir = @libdir@
++build = @build@
++target = @target@
++prefix = @prefix@
++
++# Nonstandard autoconf-set variables.
++enable_shared = @enable_shared@
++
++LN_S=@LN_S@
++AWK=@AWK@
++
++ifeq (cp -p,$(LN_S))
++LN_S_RECURSIVE = cp -pR
++else
++LN_S_RECURSIVE = $(LN_S)
++endif
++
++# Variables for the user (or the top level) to override.
++objext=.o
++THREAD_KIND=native
++TRACE=no
++LDFLAGS=
++
++# The tedious process of getting CFLAGS right.
++CFLAGS=-g
++PICFLAG = @PICFLAG@
++GNATLIBFLAGS= -W -Wall -gnatpg -nostdinc
++GNATLIBCFLAGS= -g -O2
++GNATLIBCFLAGS_FOR_C = -W -Wall $(GNATLIBCFLAGS) \
++	-fexceptions -DIN_RTS @have_getipinfo@
++
++host_subdir = @host_subdir@
++GCC_DIR=$(MULTIBUILDTOP)../../$(host_subdir)/gcc
++
++target_noncanonical:=@target_noncanonical@
++version := $(shell cat $(srcdir)/../gcc/BASE-VER)
++libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR)
++ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR))
++ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR))
++
++# exeext should not be used because it's the *host* exeext.  We're building
++# a *target* library, aren't we?!?  Likewise for CC.  Still, provide bogus
++# definitions just in case something slips through the safety net provided
++# by recursive make invocations in gcc/ada/Makefile.in
++LIBADA_FLAGS_TO_PASS = \
++        "MAKEOVERRIDES=" \
++        "LDFLAGS=$(LDFLAGS)" \
++        "LN_S=$(LN_S)" \
++        "SHELL=$(SHELL)" \
++        "GNATLIBFLAGS=$(GNATLIBFLAGS) $(MULTIFLAGS)" \
++        "GNATLIBCFLAGS=$(GNATLIBCFLAGS) $(MULTIFLAGS)" \
++        "GNATLIBCFLAGS_FOR_C=$(GNATLIBCFLAGS_FOR_C) $(MULTIFLAGS)" \
++        "PICFLAG_FOR_TARGET=$(PICFLAG)" \
++        "THREAD_KIND=$(THREAD_KIND)" \
++        "TRACE=$(TRACE)" \
++        "MULTISUBDIR=$(MULTISUBDIR)" \
++        "libsubdir=$(libsubdir)" \
++        "objext=$(objext)" \
++        "prefix=$(prefix)" \
++        "exeext=.exeext.should.not.be.used " \
++	'CC=the.host.compiler.should.not.be.needed' \
++	"GCC_FOR_TARGET=$(CC)" \
++        "CFLAGS=$(CFLAGS)" \
++	"RTSDIR=rts-sjlj"
++
++# Rules to build gnatlib.
++.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool
++gnatlib: gnatlib-sjlj
++
++gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile
++	test -f stamp-libada || \
++	$(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \
++	&& touch stamp-libada
++	-rm -rf adainclude
++	-rm -rf adalib
++	$(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude
++	$(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib
++
++gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile
++	test -f stamp-libada || \
++	$(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \
++	&& touch stamp-libada-sjlj
++	-rm -rf adainclude
++	-rm -rf adalib
++	$(LN_S_RECURSIVE) $(ADA_RTS_DIR) adainclude
++	$(LN_S_RECURSIVE) $(ADA_RTS_DIR) adalib
++
++osconstool:
++	$(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons
++
++install-gnatlib: $(GCC_DIR)/ada/Makefile
++	$(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) install-gnatlib-sjlj
++
++# Check uninstalled version.
++check:
++
++# Check installed version.
++installcheck:
++
++# Build info (none here).
++info:
++
++# Build DVI (none here).
++dvi:
++
++# Build PDF (none here).
++pdf:
++
++# Build html (none here).
++html:
++
++# Build TAGS (none here).
++TAGS:
++
++.PHONY: check installcheck info dvi pdf html
++
++# Installation rules.
++install: install-gnatlib
++	$(MULTIDO) $(AM_MAKEFLAGS) DO=install multi-do # $(MAKE)
++
++install-strip: install
++
++install-info:
++
++install-pdf:
++
++install-html:
++
++.PHONY: install install-strip install-info install-pdf install-html
++
++# Cleaning rules.
++mostlyclean:
++	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=mostlyclean multi-clean # $(MAKE)
++
++clean:
++	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=clean multi-clean # $(MAKE)
++
++distclean:
++	$(MULTICLEAN) $(AM_MAKEFLAGS) DO=distclean multi-clean # $(MAKE)
++	$(RM) Makefile config.status config.log
++
++maintainer-clean:
++
++.PHONY: mostlyclean clean distclean maintainer-clean
++
++# Rules for rebuilding this Makefile.
++Makefile: $(srcdir)/Makefile.in config.status
++	CONFIG_FILES=$@ ; \
++	CONFIG_HEADERS= ; \
++	$(SHELL) ./config.status
++
++config.status: $(srcdir)/configure
++	$(SHELL) ./config.status --recheck
++
++AUTOCONF = autoconf
++configure_deps = \
++	$(srcdir)/configure.ac \
++	$(srcdir)/../config/acx.m4 \
++	$(srcdir)/../config/override.m4 \
++	$(srcdir)/../config/multi.m4
++
++$(srcdir)/configure: @MAINT@ $(configure_deps)
++	cd $(srcdir) && $(AUTOCONF)
++
++# Don't export variables to the environment, in order to not confuse
++# configure.
++.NOEXPORT:
+Index: b/src/libada-sjlj/configure.ac
+===================================================================
+--- /dev/null
++++ b/src/libada-sjlj/configure.ac
+@@ -0,0 +1,140 @@
++# Configure script for libada.
++#   Copyright (C) 2003-2015 Free Software Foundation, Inc.
++#
++# This file is free software; you can redistribute it and/or modify it
++# under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 3 of the License, or
++# (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful, but
++# WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++# General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; see the file COPYING3.  If not see
++# <http://www.gnu.org/licenses/>.
++
++sinclude(../config/acx.m4)
++sinclude(../config/multi.m4)
++sinclude(../config/override.m4)
++sinclude(../config/picflag.m4)
++sinclude(../config/unwind_ipinfo.m4)
++
++AC_INIT
++AC_PREREQ([2.64])
++
++AC_CONFIG_SRCDIR([Makefile.in])
++
++# Determine the host, build, and target systems
++AC_CANONICAL_BUILD
++AC_CANONICAL_HOST
++AC_CANONICAL_TARGET
++target_alias=${target_alias-$host_alias}
++
++# Determine the noncanonical target name, for directory use.
++ACX_NONCANONICAL_TARGET
++
++# Determine the target- and build-specific subdirectories
++GCC_TOPLEV_SUBDIRS
++
++# Command-line options.
++# Very limited version of AC_MAINTAINER_MODE.
++AC_ARG_ENABLE([maintainer-mode],
++  [AC_HELP_STRING([--enable-maintainer-mode],
++                 [enable make rules and dependencies not useful (and
++                  sometimes confusing) to the casual installer])],
++  [case ${enable_maintainer_mode} in
++     yes) MAINT='' ;;
++     no) MAINT='#' ;;
++     *) AC_MSG_ERROR([--enable-maintainer-mode must be yes or no]) ;;
++   esac
++   maintainer_mode=${enableval}],
++  [MAINT='#'])
++AC_SUBST([MAINT])dnl
++
++AM_ENABLE_MULTILIB(, ..)
++# Calculate toolexeclibdir
++# Also toolexecdir, though it's only used in toolexeclibdir
++case ${enable_version_specific_runtime_libs} in
++  yes)
++    # Need the gcc compiler version to know where to install libraries
++    # and header files if --enable-version-specific-runtime-libs option
++    # is selected.
++    toolexecdir='$(libdir)/gcc/$(target_alias)'
++    toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)'
++    ;;
++  no)
++    if test -n "$with_cross_host" &&
++       test x"$with_cross_host" != x"no"; then
++      # Install a library built with a cross compiler in tooldir, not libdir.
++      toolexecdir='$(exec_prefix)/$(target_alias)'
++      toolexeclibdir='$(toolexecdir)/lib'
++    else
++      toolexecdir='$(libdir)/gcc-lib/$(target_alias)'
++      toolexeclibdir='$(libdir)'
++    fi
++    multi_os_directory=`$CC -print-multi-os-directory`
++    case $multi_os_directory in
++      .) ;; # Avoid trailing /.
++      *) toolexeclibdir=$toolexeclibdir/$multi_os_directory ;;
++    esac
++    ;;
++esac
++AC_SUBST(toolexecdir)
++AC_SUBST(toolexeclibdir)
++#TODO: toolexeclibdir is currently disregarded
++
++# Check the compiler.
++# The same as in boehm-gc and libstdc++. Have to borrow it from there.
++# We must force CC to /not/ be precious variables; otherwise
++# the wrong, non-multilib-adjusted value will be used in multilibs.
++# As a side effect, we have to subst CFLAGS ourselves.
++
++m4_rename([_AC_ARG_VAR_PRECIOUS],[real_PRECIOUS])
++m4_define([_AC_ARG_VAR_PRECIOUS],[])
++AC_PROG_CC
++m4_rename_force([real_PRECIOUS],[_AC_ARG_VAR_PRECIOUS])
++
++AC_SUBST(CFLAGS)
++
++AC_ARG_ENABLE([shared],
++[AC_HELP_STRING([--disable-shared],
++                [don't provide a shared libgnat])],
++[
++case $enable_shared in
++  yes | no) ;;
++  *)
++    enable_shared=no
++    IFS="${IFS=         }"; ac_save_ifs="$IFS"; IFS="${IFS}:,"
++    for pkg in $enableval; do
++      case $pkg in
++        ada | libada)
++          enable_shared=yes ;;
++      esac
++    done
++    IFS="$ac_save_ifs"
++    ;;
++esac
++], [enable_shared=yes])
++AC_SUBST([enable_shared])
++
++GCC_PICFLAG
++AC_SUBST([PICFLAG])
++
++# These must be passed down, or are needed by gcc/libgcc.mvars
++AC_PROG_AWK
++AC_PROG_LN_S
++
++# Check for _Unwind_GetIPInfo
++GCC_CHECK_UNWIND_GETIPINFO
++have_getipinfo=
++if test x$have_unwind_getipinfo = xyes; then
++  have_getipinfo=-DHAVE_GETIPINFO
++fi
++AC_SUBST(have_getipinfo)
++
++# Output: create a Makefile.
++AC_CONFIG_FILES([Makefile])
++
++AC_OUTPUT
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -177,6 +177,13 @@ target_modules = { module= libada; no_in
+ 		   missing= TAGS;
+ 		   missing= install-info;
+ 		   missing= installcheck; };
++target_modules = { module= libada-sjlj; no_install=true; no_check=true;
++		   missing= info;
++		   missing= dvi;
++		   missing= html;
++		   missing= TAGS;
++		   missing= install-info;
++		   missing= installcheck; };
+ target_modules = { module= libgnatvsn; no_check=true;
+ 		   missing= info;
+ 		   missing= dvi;
+@@ -384,6 +391,7 @@ dependencies = { module=all-libcpp; on=a
+ dependencies = { module=all-fixincludes; on=all-libiberty; };
+ 
+ dependencies = { module=all-target-libada; on=all-gcc; };
++dependencies = { module=all-target-libada-sjlj; on=all-target-libada; };
+ dependencies = { module=all-gnattools; on=all-target-libada; };
+ dependencies = { module=all-gnattools; on=all-target-libgnatvsn; };
+ dependencies = { module=all-gnattools; on=all-target-libgnatprj; };
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -964,6 +964,7 @@ configure-target:  \
+     maybe-configure-target-boehm-gc \
+     maybe-configure-target-rda \
+     maybe-configure-target-libada \
++    maybe-configure-target-libada-sjlj \
+     maybe-configure-target-libgnatvsn \
+     maybe-configure-target-libgnatprj \
+     maybe-configure-target-libgomp \
+@@ -1132,6 +1133,7 @@ all-target: maybe-all-target-zlib
+ all-target: maybe-all-target-boehm-gc
+ all-target: maybe-all-target-rda
+ all-target: maybe-all-target-libada
++all-target: maybe-all-target-libada-sjlj
+ all-target: maybe-all-target-libgnatvsn
+ all-target: maybe-all-target-libgnatprj
+ @if target-libgomp-no-bootstrap
+@@ -1229,6 +1231,7 @@ info-target: maybe-info-target-zlib
+ info-target: maybe-info-target-boehm-gc
+ info-target: maybe-info-target-rda
+ info-target: maybe-info-target-libada
++info-target: maybe-info-target-libada-sjlj
+ info-target: maybe-info-target-libgnatvsn
+ info-target: maybe-info-target-libgnatprj
+ info-target: maybe-info-target-libgomp
+@@ -1319,6 +1322,7 @@ dvi-target: maybe-dvi-target-zlib
+ dvi-target: maybe-dvi-target-boehm-gc
+ dvi-target: maybe-dvi-target-rda
+ dvi-target: maybe-dvi-target-libada
++dvi-target: maybe-dvi-target-libada-sjlj
+ dvi-target: maybe-dvi-target-libgnatvsn
+ dvi-target: maybe-dvi-target-libgnatprj
+ dvi-target: maybe-dvi-target-libgomp
+@@ -1409,6 +1413,7 @@ pdf-target: maybe-pdf-target-zlib
+ pdf-target: maybe-pdf-target-boehm-gc
+ pdf-target: maybe-pdf-target-rda
+ pdf-target: maybe-pdf-target-libada
++pdf-target: maybe-pdf-target-libada-sjlj
+ pdf-target: maybe-pdf-target-libgnatvsn
+ pdf-target: maybe-pdf-target-libgnatprj
+ pdf-target: maybe-pdf-target-libgomp
+@@ -1499,6 +1504,7 @@ html-target: maybe-html-target-zlib
+ html-target: maybe-html-target-boehm-gc
+ html-target: maybe-html-target-rda
+ html-target: maybe-html-target-libada
++html-target: maybe-html-target-libada-sjlj
+ html-target: maybe-html-target-libgnatvsn
+ html-target: maybe-html-target-libgnatprj
+ html-target: maybe-html-target-libgomp
+@@ -1589,6 +1595,7 @@ TAGS-target: maybe-TAGS-target-zlib
+ TAGS-target: maybe-TAGS-target-boehm-gc
+ TAGS-target: maybe-TAGS-target-rda
+ TAGS-target: maybe-TAGS-target-libada
++TAGS-target: maybe-TAGS-target-libada-sjlj
+ TAGS-target: maybe-TAGS-target-libgnatvsn
+ TAGS-target: maybe-TAGS-target-libgnatprj
+ TAGS-target: maybe-TAGS-target-libgomp
+@@ -1679,6 +1686,7 @@ install-info-target: maybe-install-info-
+ install-info-target: maybe-install-info-target-boehm-gc
+ install-info-target: maybe-install-info-target-rda
+ install-info-target: maybe-install-info-target-libada
++install-info-target: maybe-install-info-target-libada-sjlj
+ install-info-target: maybe-install-info-target-libgnatvsn
+ install-info-target: maybe-install-info-target-libgnatprj
+ install-info-target: maybe-install-info-target-libgomp
+@@ -1769,6 +1777,7 @@ install-pdf-target: maybe-install-pdf-ta
+ install-pdf-target: maybe-install-pdf-target-boehm-gc
+ install-pdf-target: maybe-install-pdf-target-rda
+ install-pdf-target: maybe-install-pdf-target-libada
++install-pdf-target: maybe-install-pdf-target-libada-sjlj
+ install-pdf-target: maybe-install-pdf-target-libgnatvsn
+ install-pdf-target: maybe-install-pdf-target-libgnatprj
+ install-pdf-target: maybe-install-pdf-target-libgomp
+@@ -1859,6 +1868,7 @@ install-html-target: maybe-install-html-
+ install-html-target: maybe-install-html-target-boehm-gc
+ install-html-target: maybe-install-html-target-rda
+ install-html-target: maybe-install-html-target-libada
++install-html-target: maybe-install-html-target-libada-sjlj
+ install-html-target: maybe-install-html-target-libgnatvsn
+ install-html-target: maybe-install-html-target-libgnatprj
+ install-html-target: maybe-install-html-target-libgomp
+@@ -1949,6 +1959,7 @@ installcheck-target: maybe-installcheck-
+ installcheck-target: maybe-installcheck-target-boehm-gc
+ installcheck-target: maybe-installcheck-target-rda
+ installcheck-target: maybe-installcheck-target-libada
++installcheck-target: maybe-installcheck-target-libada-sjlj
+ installcheck-target: maybe-installcheck-target-libgnatvsn
+ installcheck-target: maybe-installcheck-target-libgnatprj
+ installcheck-target: maybe-installcheck-target-libgomp
+@@ -2039,6 +2050,7 @@ mostlyclean-target: maybe-mostlyclean-ta
+ mostlyclean-target: maybe-mostlyclean-target-boehm-gc
+ mostlyclean-target: maybe-mostlyclean-target-rda
+ mostlyclean-target: maybe-mostlyclean-target-libada
++mostlyclean-target: maybe-mostlyclean-target-libada-sjlj
+ mostlyclean-target: maybe-mostlyclean-target-libgnatvsn
+ mostlyclean-target: maybe-mostlyclean-target-libgnatprj
+ mostlyclean-target: maybe-mostlyclean-target-libgomp
+@@ -2129,6 +2141,7 @@ clean-target: maybe-clean-target-zlib
+ clean-target: maybe-clean-target-boehm-gc
+ clean-target: maybe-clean-target-rda
+ clean-target: maybe-clean-target-libada
++clean-target: maybe-clean-target-libada-sjlj
+ clean-target: maybe-clean-target-libgnatvsn
+ clean-target: maybe-clean-target-libgnatprj
+ clean-target: maybe-clean-target-libgomp
+@@ -2219,6 +2232,7 @@ distclean-target: maybe-distclean-target
+ distclean-target: maybe-distclean-target-boehm-gc
+ distclean-target: maybe-distclean-target-rda
+ distclean-target: maybe-distclean-target-libada
++distclean-target: maybe-distclean-target-libada-sjlj
+ distclean-target: maybe-distclean-target-libgnatvsn
+ distclean-target: maybe-distclean-target-libgnatprj
+ distclean-target: maybe-distclean-target-libgomp
+@@ -2309,6 +2323,7 @@ maintainer-clean-target: maybe-maintaine
+ maintainer-clean-target: maybe-maintainer-clean-target-boehm-gc
+ maintainer-clean-target: maybe-maintainer-clean-target-rda
+ maintainer-clean-target: maybe-maintainer-clean-target-libada
++maintainer-clean-target: maybe-maintainer-clean-target-libada-sjlj
+ maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn
+ maintainer-clean-target: maybe-maintainer-clean-target-libgnatprj
+ maintainer-clean-target: maybe-maintainer-clean-target-libgomp
+@@ -2454,6 +2469,7 @@ check-target:  \
+     maybe-check-target-boehm-gc \
+     maybe-check-target-rda \
+     maybe-check-target-libada \
++    maybe-check-target-libada-sjlj \
+     maybe-check-target-libgnatvsn \
+     maybe-check-target-libgnatprj \
+     maybe-check-target-libgomp \
+@@ -2631,6 +2647,7 @@ install-target:  \
+     maybe-install-target-boehm-gc \
+     maybe-install-target-rda \
+     maybe-install-target-libada \
++    maybe-install-target-libada-sjlj \
+     maybe-install-target-libgnatvsn \
+     maybe-install-target-libgnatprj \
+     maybe-install-target-libgomp \
+@@ -2741,6 +2758,7 @@ install-strip-target:  \
+     maybe-install-strip-target-boehm-gc \
+     maybe-install-strip-target-rda \
+     maybe-install-strip-target-libada \
++    maybe-install-strip-target-libada-sjlj \
+     maybe-install-strip-target-libgnatvsn \
+     maybe-install-strip-target-libgnatprj \
+     maybe-install-strip-target-libgomp \
+@@ -45650,6 +45668,352 @@ maintainer-clean-target-libada:
+ 
+ 
+ 
++.PHONY: configure-target-libada-sjlj maybe-configure-target-libada-sjlj
++maybe-configure-target-libada-sjlj:
++@if gcc-bootstrap
++configure-target-libada-sjlj: stage_current
++@endif gcc-bootstrap
++@if target-libada-sjlj
++maybe-configure-target-libada-sjlj: configure-target-libada-sjlj
++configure-target-libada-sjlj: 
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	echo "Checking multilib configuration for libada-sjlj..."; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada-sjlj ; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libada-sjlj/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libada-sjlj/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libada-sjlj/multilib.tmp $(TARGET_SUBDIR)/libada-sjlj/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libada-sjlj/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libada-sjlj/Makefile; \
++	    mv $(TARGET_SUBDIR)/libada-sjlj/multilib.tmp $(TARGET_SUBDIR)/libada-sjlj/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libada-sjlj/multilib.tmp $(TARGET_SUBDIR)/libada-sjlj/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libada-sjlj/Makefile || exit 0; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libada-sjlj ; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	echo Configuring in $(TARGET_SUBDIR)/libada-sjlj; \
++	cd "$(TARGET_SUBDIR)/libada-sjlj" || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libada-sjlj/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libada-sjlj; \
++	rm -f no-such-file || : ; \
++	CONFIG_SITE=no-such-file $(SHELL) \
++	  $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias}  \
++	  || exit 1
++@endif target-libada-sjlj
++
++
++
++
++
++.PHONY: all-target-libada-sjlj maybe-all-target-libada-sjlj
++maybe-all-target-libada-sjlj:
++@if gcc-bootstrap
++all-target-libada-sjlj: stage_current
++@endif gcc-bootstrap
++@if target-libada-sjlj
++TARGET-target-libada-sjlj=all
++maybe-all-target-libada-sjlj: all-target-libada-sjlj
++all-target-libada-sjlj: configure-target-libada-sjlj
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS)   \
++		$(TARGET-target-libada-sjlj))
++@endif target-libada-sjlj
++
++
++
++
++
++.PHONY: check-target-libada-sjlj maybe-check-target-libada-sjlj
++maybe-check-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-check-target-libada-sjlj: check-target-libada-sjlj
++
++# Dummy target for uncheckable module.
++check-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: install-target-libada-sjlj maybe-install-target-libada-sjlj
++maybe-install-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-install-target-libada-sjlj: install-target-libada-sjlj
++
++# Dummy target for uninstallable.
++install-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: install-strip-target-libada-sjlj maybe-install-strip-target-libada-sjlj
++maybe-install-strip-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-install-strip-target-libada-sjlj: install-strip-target-libada-sjlj
++
++# Dummy target for uninstallable.
++install-strip-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-target-libada-sjlj info-target-libada-sjlj
++maybe-info-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-info-target-libada-sjlj: info-target-libada-sjlj
++
++# libada-sjlj doesn't support info.
++info-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-dvi-target-libada-sjlj dvi-target-libada-sjlj
++maybe-dvi-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-dvi-target-libada-sjlj: dvi-target-libada-sjlj
++
++# libada-sjlj doesn't support dvi.
++dvi-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-pdf-target-libada-sjlj pdf-target-libada-sjlj
++maybe-pdf-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-pdf-target-libada-sjlj: pdf-target-libada-sjlj
++
++pdf-target-libada-sjlj: \
++    configure-target-libada-sjlj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing pdf in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           pdf) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-html-target-libada-sjlj html-target-libada-sjlj
++maybe-html-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-html-target-libada-sjlj: html-target-libada-sjlj
++
++# libada-sjlj doesn't support html.
++html-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-TAGS-target-libada-sjlj TAGS-target-libada-sjlj
++maybe-TAGS-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-TAGS-target-libada-sjlj: TAGS-target-libada-sjlj
++
++# libada-sjlj doesn't support TAGS.
++TAGS-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-install-info-target-libada-sjlj install-info-target-libada-sjlj
++maybe-install-info-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-install-info-target-libada-sjlj: install-info-target-libada-sjlj
++
++# libada-sjlj doesn't support install-info.
++install-info-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-install-pdf-target-libada-sjlj install-pdf-target-libada-sjlj
++maybe-install-pdf-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-install-pdf-target-libada-sjlj: install-pdf-target-libada-sjlj
++
++install-pdf-target-libada-sjlj: \
++    configure-target-libada-sjlj \
++    pdf-target-libada-sjlj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-pdf in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-pdf) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-install-html-target-libada-sjlj install-html-target-libada-sjlj
++maybe-install-html-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-install-html-target-libada-sjlj: install-html-target-libada-sjlj
++
++install-html-target-libada-sjlj: \
++    configure-target-libada-sjlj \
++    html-target-libada-sjlj 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-html in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-html) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-installcheck-target-libada-sjlj installcheck-target-libada-sjlj
++maybe-installcheck-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-installcheck-target-libada-sjlj: installcheck-target-libada-sjlj
++
++# libada-sjlj doesn't support installcheck.
++installcheck-target-libada-sjlj:
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-mostlyclean-target-libada-sjlj mostlyclean-target-libada-sjlj
++maybe-mostlyclean-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-mostlyclean-target-libada-sjlj: mostlyclean-target-libada-sjlj
++
++mostlyclean-target-libada-sjlj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing mostlyclean in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           mostlyclean) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-clean-target-libada-sjlj clean-target-libada-sjlj
++maybe-clean-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-clean-target-libada-sjlj: clean-target-libada-sjlj
++
++clean-target-libada-sjlj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing clean in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           clean) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-distclean-target-libada-sjlj distclean-target-libada-sjlj
++maybe-distclean-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-distclean-target-libada-sjlj: distclean-target-libada-sjlj
++
++distclean-target-libada-sjlj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing distclean in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           distclean) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++.PHONY: maybe-maintainer-clean-target-libada-sjlj maintainer-clean-target-libada-sjlj
++maybe-maintainer-clean-target-libada-sjlj:
++@if target-libada-sjlj
++maybe-maintainer-clean-target-libada-sjlj: maintainer-clean-target-libada-sjlj
++
++maintainer-clean-target-libada-sjlj: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libada-sjlj/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libada-sjlj" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libada-sjlj && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           maintainer-clean) \
++	  || exit 1
++
++@endif target-libada-sjlj
++
++
++
++
++
+ .PHONY: configure-target-libgnatvsn maybe-configure-target-libgnatvsn
+ maybe-configure-target-libgnatvsn:
+ @if gcc-bootstrap
+@@ -50496,6 +50860,7 @@ configure-target-zlib: stage_last
+ configure-target-boehm-gc: stage_last
+ configure-target-rda: stage_last
+ configure-target-libada: stage_last
++configure-target-libada-sjlj: stage_last
+ configure-target-libgnatvsn: stage_last
+ configure-target-libgnatprj: stage_last
+ configure-stage1-target-libgomp: maybe-all-stage1-gcc
+@@ -50533,6 +50898,7 @@ configure-target-zlib: maybe-all-gcc
+ configure-target-boehm-gc: maybe-all-gcc
+ configure-target-rda: maybe-all-gcc
+ configure-target-libada: maybe-all-gcc
++configure-target-libada-sjlj: maybe-all-gcc
+ configure-target-libgnatvsn: maybe-all-gcc
+ configure-target-libgnatprj: maybe-all-gcc
+ configure-target-libgomp: maybe-all-gcc
+@@ -50875,6 +51241,7 @@ all-stage4-fixincludes: maybe-all-stage4
+ all-stageprofile-fixincludes: maybe-all-stageprofile-libiberty
+ all-stagefeedback-fixincludes: maybe-all-stagefeedback-libiberty
+ all-target-libada: maybe-all-gcc
++all-target-libada-sjlj: maybe-all-target-libada
+ all-gnattools: maybe-all-target-libada
+ all-gnattools: maybe-all-target-libgnatvsn
+ all-gnattools: maybe-all-target-libgnatprj
+@@ -51453,6 +51820,7 @@ configure-target-zlib: maybe-all-target-
+ configure-target-boehm-gc: maybe-all-target-libgcc
+ configure-target-rda: maybe-all-target-libgcc
+ configure-target-libada: maybe-all-target-libgcc
++configure-target-libada-sjlj: maybe-all-target-libgcc
+ configure-target-libgnatvsn: maybe-all-target-libgcc
+ configure-target-libgnatprj: maybe-all-target-libgcc
+ configure-target-libgomp: maybe-all-target-libgcc
+@@ -51509,6 +51877,8 @@ configure-target-rda: maybe-all-target-n
+ 
+ configure-target-libada: maybe-all-target-newlib maybe-all-target-libgloss
+ 
++configure-target-libada-sjlj: maybe-all-target-newlib maybe-all-target-libgloss
++
+ configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss
+ 
+ configure-target-libgnatprj: maybe-all-target-newlib maybe-all-target-libgloss
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -175,6 +175,7 @@ target_libraries="target-libgcc \
+ 		${libgcj} \
+ 		target-libobjc \
+ 		target-libada \
++		target-libada-sjlj \
+ 		${target_libiberty} \
+ 		target-libgnatvsn \
+ 		target-libgnatprj \
+@@ -447,7 +448,7 @@ AC_ARG_ENABLE(libada,
+ ENABLE_LIBADA=$enableval,
+ ENABLE_LIBADA=yes)
+ if test "${ENABLE_LIBADA}" != "yes" ; then
+-  noconfigdirs="$noconfigdirs target-libgnatvsn target-libgnatprj gnattools"
++  noconfigdirs="$noconfigdirs target-libgnatvsn target-libgnatprj gnattools target-libada-sjlj"
+ fi
+ 
+ AC_ARG_ENABLE(libssp,
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -209,7 +209,7 @@ TOOLSCASE =
+ 
+ # Multilib handling
+ MULTISUBDIR =
+-RTSDIR = rts$(subst /,_,$(MULTISUBDIR))
++RTSDIR := rts$(subst /,_,$(MULTISUBDIR))
+ 
+ # Link flags used to build gnat tools.  By default we prefer to statically
+ # link with libgcc to avoid a dependency on shared libgcc (which is tricky
+@@ -2527,6 +2527,27 @@ install-gnatlib: ../stamp-gnatlib-$(RTSD
+ 	cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb
+ 	cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads
+ 
++install-gnatlib-sjlj: ../stamp-gnatlib-$(RTSDIR)
++#	Create the directory before deleting it, in case the directory is
++#	a list of directories (as it may be on VMS). This ensures we are
++#	deleting the right one.
++	-$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ)
++	-$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ)
++	$(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ)
++	$(RMDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ)
++	-$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ)
++	-$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ)
++	for file in $(RTSDIR)/*.ali; do \
++	    $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR_SJLJ); \
++	done
++	# This copy must be done preserving the date on the original file.
++	for file in $(RTSDIR)/*.ad?; do \
++	    $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); \
++	done
++	cd $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); $(CHMOD) a-wx *.adb
++	cd $(DESTDIR)$(ADA_INCLUDE_DIR_SJLJ); $(CHMOD) a-wx *.ads
++
++
+ ../stamp-gnatlib1-$(RTSDIR): Makefile
+ 	$(RMDIR) $(RTSDIR)
+ 	$(MKDIR) $(RTSDIR)
+@@ -2783,13 +2804,14 @@ gnatlib-shared:
+ # in getting multiple blank lines, hence a style check error, as a
+ # result.
+ gnatlib-sjlj:
+-	$(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="" \
++	$(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="" RTSDIR="$(RTSDIR)" \
+ 	THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR)
+ 	sed -e 's/ZCX_By_Default.*/ZCX_By_Default            : constant Boolean := False;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads
+ 	sed -e 's/\(pragma Linker.*crtbe.*\)/--  \1/' $(RTSDIR)/s.ads > $(RTSDIR)/s2.ads
+ 	$(RM) $(RTSDIR)/s.ads
+ 	$(MV) $(RTSDIR)/s2.ads $(RTSDIR)/system.ads
+ 	$(MAKE) $(FLAGS_TO_PASS) \
++	     RTSDIR="$(RTSDIR)" \
+ 	     EH_MECHANISM="" \
+ 	     GNATLIBFLAGS="$(GNATLIBFLAGS)" \
+ 	     GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \
+@@ -2839,6 +2861,8 @@ b_gnatm.o : b_gnatm.adb
+ 
+ ADA_INCLUDE_DIR = $(libsubdir)/adainclude
+ ADA_RTL_OBJ_DIR = $(libsubdir)/adalib
++ADA_INCLUDE_DIR_SJLJ = $(libsubdir)/rts-sjlj/adainclude
++ADA_RTL_OBJ_DIR_SJLJ = $(libsubdir)/rts-sjlj/adalib
+ 
+ # Special flags
+ 
+Index: b/src/gcc/ada/gcc-interface/config-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/config-lang.in
++++ b/src/gcc/ada/gcc-interface/config-lang.in
+@@ -34,8 +34,8 @@ gtfiles="\$(srcdir)/ada/gcc-interface/ad
+ 
+ outputs="ada/gcc-interface/Makefile ada/Makefile"
+ 
+-target_libs="target-libada target-libgnatvsn target-libgnatprj"
+-lang_dirs="libada libgnatvsn libgnatprj gnattools"
++target_libs="target-libada target-libgnatvsn target-libgnatprj target-libada-sjlj"
++lang_dirs="libada libgnatvsn libgnatprj gnattools libada-sjlj"
+ 
+ # Ada is not enabled by default for the time being.
+ build_by_default=no
+Index: b/src/gcc/ada/gcc-interface/Make-lang.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Make-lang.in
++++ b/src/gcc/ada/gcc-interface/Make-lang.in
+@@ -783,6 +783,7 @@ ada.install-common:
+ 
+ install-gnatlib:
+ 	$(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) install-gnatlib$(LIBGNAT_TARGET)
++	$(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) RTSDIR="rts-sjlj" install-gnatlib-sjlj$(LIBGNAT_TARGET)
+ 
+ install-gnatlib-obj:
+ 	$(MAKE) -C ada $(COMMON_FLAGS_TO_PASS) $(ADA_FLAGS_TO_PASS) install-gnatlib-obj
--- gcc-5-5.4.0.orig/debian/patches/ada-symbolic-tracebacks.diff
+++ gcc-5-5.4.0/debian/patches/ada-symbolic-tracebacks.diff
@@ -0,0 +1,401 @@
+# DP: - Enable support for symbolic tracebacks in exceptions (delete the dummy
+# DP:   convert_addresses from adaint.c, and provide a real one separately.)
+
+Ported Jürgen Pfeifer's patch to enable symbolic tracebacks on Debian
+GNU/Linux.
+
+The binary distribution of GNAT 3.15p comes with an old version of
+binutils that includes a library, libaddr2line.a.  This library does
+not exist in recent versions of binutils.  The patch works around this
+by calling /usr/bin/addr2line (still part of binutils) and parsing the
+output.  See debian/convert_addresses.c for the gory details.
+
+I have modified convert_addresses.c to not use a shell script anymore;
+Debian controls the version of binutils which is installed.  Also, I
+use execve instead of execle.
+
+-- 
+Ludovic Brenta.
+
+# ' make emacs highlighting happy
+
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -270,7 +270,8 @@
+ # Both . and srcdir are used, in that order,
+ # so that tm.h and config.h will be found in the compilation
+ # subdirectory rather than in the source directory.
+-INCLUDES = -I- -I. -I.. -I$(srcdir)/ada -I$(srcdir) -I$(ftop_srcdir)/include $(GMPINC)
++INCLUDES = -iquote . -iquote .. -iquote $(srcdir)/ada -iquote $(srcdir) \
++ -iquote $(ftop_srcdir)/include $(GMPINC)
+ 
+ ADA_INCLUDES = -I- -I. -I$(srcdir)/ada
+ 
+@@ -2426,7 +2427,7 @@
+ # library.  LIBGNAT_OBJS is the list of object files for libgnat.
+ # thread.c is special as put into GNATRTL_TASKING_OBJS by Makefile.rtl
+ LIBGNAT_OBJS = adadecode.o adaint.o argv.o aux-io.o 			\
+-  cal.o cio.o cstreams.o ctrl_c.o					\
++  cal.o cio.o convert_addresses.o cstreams.o ctrl_c.o			\
+   env.o errno.o exit.o expect.o final.o 				\
+   init.o initialize.o locales.o mkdir.o					\
+   raise.o seh_init.o socket.o sysdep.o					\
+@@ -3104,6 +3105,7 @@
+ socket.o  : socket.c gsocket.h
+ sysdep.o  : sysdep.c
+ raise.o   : raise.c raise.h
++convert_addresses.o : convert_addresses.c
+ sigtramp-armdroid.o : sigtramp-armdroid.c sigtramp.h
+ sigtramp-armvxw.o : sigtramp-armvxw.c sigtramp.h
+ sigtramp-ppcvxw.o : sigtramp-ppcvxw.c sigtramp.h
+Index: b/src/gcc/ada/adaint.c
+===================================================================
+--- a/src/gcc/ada/adaint.c
++++ b/src/gcc/ada/adaint.c
+@@ -3608,35 +3608,6 @@
+ }
+ #endif
+ 
+-#if defined (IS_CROSS)  \
+-  || (! ((defined (sparc) || defined (i386)) && defined (sun) \
+-      && defined (__SVR4)) \
+-      && ! (defined (linux) && (defined (i386) || defined (__x86_64__))) \
+-      && ! (defined (linux) && defined (__ia64__)) \
+-      && ! (defined (linux) && defined (powerpc)) \
+-      && ! defined (__FreeBSD__) \
+-      && ! defined (__Lynx__) \
+-      && ! defined (__hpux__) \
+-      && ! defined (__APPLE__) \
+-      && ! defined (_AIX) \
+-      && ! defined (VMS) \
+-      && ! defined (__MINGW32__))
+-
+-/* Dummy function to satisfy g-trasym.o. See the preprocessor conditional
+-   just above for a list of native platforms that provide a non-dummy
+-   version of this procedure in libaddr2line.a.  */
+-
+-void
+-convert_addresses (const char *file_name ATTRIBUTE_UNUSED,
+-		   void *addrs ATTRIBUTE_UNUSED,
+-		   int n_addr ATTRIBUTE_UNUSED,
+-		   void *buf ATTRIBUTE_UNUSED,
+-		   int *len ATTRIBUTE_UNUSED)
+-{
+-  *len = 0;
+-}
+-#endif
+-
+ #if defined (_WIN32)
+ int __gnat_argument_needs_quote = 1;
+ #else
+Index: b/src/gcc/ada/convert_addresses.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/ada/convert_addresses.c
+@@ -0,0 +1,159 @@
++/*
++  Copyright (C) 1999 by Juergen Pfeifer <juergen.pfeifer@gmx.net>
++  Ada for Linux Team (ALT)
++
++  Permission is hereby granted, free of charge, to any person obtaining a
++  copy of this software and associated documentation files (the
++  "Software"), to deal in the Software without restriction, including
++  without limitation the rights to use, copy, modify, merge, publish,
++  distribute, distribute with modifications, sublicense, and/or sell
++  copies of the Software, and to permit persons to whom the Software is
++  furnished to do so, subject to the following conditions:
++
++  The above copyright notice and this permission notice shall be included
++  in all copies or substantial portions of the Software.
++
++  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
++  OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
++  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
++  IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
++  DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
++  OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
++  THE USE OR OTHER DEALINGS IN THE SOFTWARE.
++
++  Except as contained in this notice, the name(s) of the above copyright
++  holders shall not be used in advertising or otherwise to promote the
++  sale, use or other dealings in this Software without prior written
++  authorization.
++*/
++#include <sys/types.h>
++#include <stdlib.h>
++#include <stdio.h>
++#include <unistd.h>
++#include <string.h>
++#include <signal.h>
++
++#define STDIN_FILENO  0
++#define STDOUT_FILENO 1
++#define MAX_LINE      1024
++
++#define CLOSE1  close(fd1[0]); close(fd1[1])
++#define CLOSE2  close(fd2[0]); close(fd2[1])
++#define RESTSIG sigaction(SIGPIPE,&oact,NULL)
++
++void convert_addresses
++(const char const *file_name,
++  void* addrs[],
++  int   n_addr,
++  char* buf,
++  int*  len)
++{
++  int max_len = *len;
++  pid_t child;
++
++  struct sigaction act, oact;
++
++  int fd1[2], fd2[2];
++
++  if (!file_name) {
++    return;
++  }
++
++  *buf = 0; *len = 0;
++  act.sa_handler = SIG_IGN;
++  sigemptyset(&act.sa_mask);
++  act.sa_flags = 0;
++  if (sigaction(SIGPIPE,&act,&oact) < 0)
++    return;
++
++  if (pipe(fd1) >= 0) {
++    if (pipe(fd2)>=0) {
++      if ((child = fork()) < 0) {
++      CLOSE1; CLOSE2; RESTSIG;
++      return;
++      }
++      else {
++      if (0==child) {
++        close(fd1[1]);
++        close(fd2[0]);
++        if (fd1[0] != STDIN_FILENO) {
++          if (dup2(fd1[0],STDIN_FILENO) != STDIN_FILENO) {
++            CLOSE1; CLOSE2;
++          }
++          close(fd1[0]);
++        }
++        if (fd2[1] != STDOUT_FILENO) {
++          if (dup2(fd2[1],STDOUT_FILENO) != STDOUT_FILENO) {
++            CLOSE1; CLOSE2;
++          }
++          close(fd2[1]);
++        }
++        {
++          /* As pointed out by Florian Weimer to me, it is a
++             security threat to call the script with a user defined
++             environment and using the path. That would be Trojans
++             pleasure.  Therefore we use the absolute path to
++             addr2line and an empty environment. That should be
++             safe.
++          */
++          char *file_name_for_execve = strdup (file_name); /* non-const */
++          char *const argv[] = { "addr2line",
++                                 "-e",
++                                 file_name_for_execve,
++                                 "--demangle=gnat",
++                                 "--functions",
++                                 "--basenames",
++                                 NULL };
++          char *const envp[] = { NULL };
++          if (execve("/usr/bin/addr2line", argv, envp) < 0) {
++            CLOSE1; CLOSE2;
++          }
++	  if (file_name_for_execve) { free (file_name_for_execve); }
++        }
++      }
++      else {
++        int i, n;
++        char hex[16];
++        char line[MAX_LINE + 1];
++        char *p;
++        char *s = buf;
++
++        /* Parent context */
++        close(fd1[0]);
++        close(fd2[1]);
++
++        for(i=0; i < n_addr; i++) {
++          snprintf(hex,sizeof(hex),"%p\n",addrs[i]);
++          write(fd1[1],hex,strlen(hex));
++          n = read(fd2[0],line,MAX_LINE);
++          if (n<=0)
++            break;
++          line[n]=0;
++          /* We have approx. 16 additional chars for "%p in " clause.
++             We use this info to prevent a buffer overrun.
++          */
++          if (n + 16 + (*len) > max_len)
++            break;
++          p = strchr(line,'\n');
++          if (p) {
++            if (*(p+1)) {
++              *p = 0;
++              *len += snprintf(s, (max_len - (*len)), "%p in %s at %s",addrs[i], line, p+1);
++            }
++            else {
++              *len += snprintf(s, (max_len - (*len)), "%p at %s",addrs[i], line);
++            }
++            s = buf + (*len);
++          }
++        }
++        close(fd1[1]);
++        close(fd2[0]);
++      }
++      }
++    }
++    else {
++      CLOSE1;
++    }
++  }
++  RESTSIG;
++}
+Index: b/src/gcc/ada/g-trasym.adb
+===================================================================
+--- a/src/gcc/ada/g-trasym.adb
++++ b/src/gcc/ada/g-trasym.adb
+@@ -33,40 +33,110 @@
+ --  is not supported. It returns tracebacks as lists of LF separated strings of
+ --  the form "0x..." corresponding to the addresses.
+ 
++with System.Soft_Links;
+ with Ada.Exceptions.Traceback; use Ada.Exceptions.Traceback;
+-with System.Address_Image;
+ 
+ package body GNAT.Traceback.Symbolic is
+ 
++   package TSL renames System.Soft_Links;
++
++   --  To perform the raw addresses to symbolic form translation we rely on a
++   --  libaddr2line symbolizer which examines debug info from a provided
++   --  executable file name, and an absolute path is needed to ensure the file
++   --  is always found. This is "__gnat_locate_exec_on_path (gnat_argv [0])"
++   --  for our executable file, a fairly heavy operation so we cache the
++   --  result.
++
++   Exename : System.Address;
++   --  Pointer to the name of the executable file to be used on all
++   --  invocations of the libaddr2line symbolization service.
++
++   Exename_Resolved : Boolean := False;
++   --  Flag to indicate whether we have performed the executable file name
++   --  resolution already. Relying on a not null Exename for this purpose
++   --  would be potentially inefficient as this is what we will get if the
++   --  resolution attempt fails.
++
+    ------------------------
+    -- Symbolic_Traceback --
+    ------------------------
+ 
+    function Symbolic_Traceback (Traceback : Tracebacks_Array) return String is
++
++      procedure convert_addresses
++        (filename : System.Address;
++         addrs    : System.Address;
++         n_addrs  : Integer;
++         buf      : System.Address;
++         len      : System.Address);
++      pragma Import (C, convert_addresses, "convert_addresses");
++      --  This is the procedure version of the Ada-aware addr2line. It places
++      --  in BUF a string representing the symbolic translation of the N_ADDRS
++      --  raw addresses provided in ADDRS, looked up in debug information from
++      --  FILENAME. LEN points to an integer which contains the size of the
++      --  BUF buffer at input and the result length at output.
++      --
++      --  Note that this procedure is *not* thread-safe.
++
++      type Argv_Array is array (0 .. 0) of System.Address;
++      gnat_argv : access Argv_Array;
++      pragma Import (C, gnat_argv, "gnat_argv");
++
++      function locate_exec_on_path
++        (c_exename : System.Address) return System.Address;
++      pragma Import (C, locate_exec_on_path, "__gnat_locate_exec_on_path");
++
++      B_Size : constant Integer := 256 * Traceback'Length;
++      Len    : Integer := B_Size;
++      Res    : String (1 .. B_Size);
++
++      use type System.Address;
++
+    begin
++      --  The symbolic translation of an empty set of addresses is an empty
++      --  string.
++
+       if Traceback'Length = 0 then
+          return "";
++      end if;
+ 
+-      else
+-         declare
+-            Img : String := System.Address_Image (Traceback (Traceback'First));
++      --  If our input set of raw addresses is not empty, resort to the
++      --  libaddr2line service to symbolize it all.
+ 
+-            Result : String (1 .. (Img'Length + 3) * Traceback'Length);
+-            Last   : Natural := 0;
++      --  Compute, cache and provide the absolute path to our executable file
++      --  name as the binary file where the relevant debug information is to be
++      --  found. If the executable file name resolution fails, we have no
++      --  sensible basis to invoke the symbolizer at all.
++
++      --  Protect all this against concurrent accesses explicitly, as the
++      --  underlying services are potentially thread unsafe.
++
++      TSL.Lock_Task.all;
++
++      if not Exename_Resolved then
++         Exename := locate_exec_on_path (gnat_argv (0));
++         Exename_Resolved := True;
++      end if;
++
++      if Exename /= System.Null_Address then
++         Len := Res'Length;
++         convert_addresses
++           (Exename, Traceback'Address, Traceback'Length,
++            Res (1)'Address, Len'Address);
++      end if;
++
++      TSL.Unlock_Task.all;
+ 
+-         begin
+-            for J in Traceback'Range loop
+-               Img := System.Address_Image (Traceback (J));
+-               Result (Last + 1 .. Last + 2) := "0x";
+-               Last := Last + 2;
+-               Result (Last + 1 .. Last + Img'Length) := Img;
+-               Last := Last + Img'Length + 1;
+-               Result (Last) := ASCII.LF;
+-            end loop;
++      --  Return what the addr2line symbolizer has produced if we have called
++      --  it (the executable name resolution succeeded), or an empty string
++      --  otherwise.
+ 
+-            return Result (1 .. Last);
+-         end;
++      if Exename /= System.Null_Address then
++         return Res (1 .. Len);
++      else
++         return "";
+       end if;
++
+    end Symbolic_Traceback;
+ 
+    function Symbolic_Traceback (E : Exception_Occurrence) return String is
+Index: b/src/gcc/ada/tracebak.c
+===================================================================
+--- a/src/gcc/ada/tracebak.c
++++ b/src/gcc/ada/tracebak.c
+@@ -425,7 +425,7 @@
+ /* Starting with GCC 4.6, -fomit-frame-pointer is turned on by default for
+    32-bit x86/Linux as well and DWARF 2 unwind tables are emitted instead.
+    See the x86-64 case below for the drawbacks with this approach.  */
+-#if defined (linux) && (__GNUC__ * 10 + __GNUC_MINOR__ > 45)
++#if (defined (linux) || defined(__GNU__)) && (__GNUC__ * 10 + __GNUC_MINOR__ > 45)
+ #define USE_GCC_UNWINDER
+ #else
+ #define USE_GENERIC_UNWINDER
--- gcc-5-5.4.0.orig/debian/patches/alpha-ieee-doc.diff
+++ gcc-5-5.4.0/debian/patches/alpha-ieee-doc.diff
@@ -0,0 +1,24 @@
+# DP: #212912
+# DP: on alpha-linux, make -mieee default and add -mieee-disable switch
+# DP: to turn default off (doc patch)
+
+---
+ gcc/doc/invoke.texi |    7 +++++++
+ 1 files changed, 7 insertions(+), 0 deletions(-)
+
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -9980,6 +9980,13 @@ able to correctly support denormalized numbers and exceptional IEEE
+ values such as not-a-number and plus/minus infinity.  Other Alpha
+ compilers call this option @option{-ieee_with_no_inexact}.
+ 
++DEBIAN SPECIFIC: This option is on by default for alpha-linux-gnu, unless
++@option{-ffinite-math-only} (which is part of the @option{-ffast-math}
++set) is specified, because the software functions in the GNU libc math
++libraries generate denormalized numbers, NaNs, and infs (all of which
++will cause a programs to SIGFPE when it attempts to use the results without
++@option{-mieee}).
++
+ @item -mieee-with-inexact
+ @opindex mieee-with-inexact
+ This is like @option{-mieee} except the generated code also maintains
--- gcc-5-5.4.0.orig/debian/patches/alpha-ieee.diff
+++ gcc-5-5.4.0/debian/patches/alpha-ieee.diff
@@ -0,0 +1,21 @@
+# DP: #212912
+# DP: on alpha-linux, make -mieee default and add -mieee-disable switch
+# DP: to turn default off
+
+---
+ gcc/config/alpha/alpha.c |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+
+--- a/src/gcc/config/alpha/alpha.c
++++ b/src/gcc/config/alpha/alpha.c
+@@ -259,6 +259,10 @@
+   int line_size = 0, l1_size = 0, l2_size = 0;
+   int i;
+ 
++  /* If not -ffinite-math-only, enable -mieee*/
++  if (!flag_finite_math_only)
++    target_flags |= MASK_IEEE|MASK_IEEE_CONFORMANT;
++
+ #ifdef SUBTARGET_OVERRIDE_OPTIONS
+   SUBTARGET_OVERRIDE_OPTIONS;
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/alpha-no-ev4-directive.diff
+++ gcc-5-5.4.0/debian/patches/alpha-no-ev4-directive.diff
@@ -0,0 +1,32 @@
+# DP: never emit .ev4 directive.
+
+---
+ gcc/config/alpha/alpha.c |    7 +++----
+ 1 files changed, 3 insertions(+), 4 deletions(-)
+
+Index: b/src/gcc/config/alpha/alpha.c
+===================================================================
+--- a/src/gcc/config/alpha/alpha.c
++++ b/src/gcc/config/alpha/alpha.c
+@@ -9549,7 +9549,7 @@ alpha_file_start (void)
+     fputs ("\t.set nomacro\n", asm_out_file);
+   if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX)
+     {
+-      const char *arch;
++      const char *arch = NULL;
+ 
+       if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX)
+ 	arch = "ev6";
+@@ -9559,10 +9559,9 @@ alpha_file_start (void)
+ 	arch = "ev56";
+       else if (alpha_cpu == PROCESSOR_EV5)
+ 	arch = "ev5";
+-      else
+-	arch = "ev4";
+ 
+-      fprintf (asm_out_file, "\t.arch %s\n", arch);
++      if (arch)
++        fprintf (asm_out_file, "\t.arch %s\n", arch);
+     }
+ }
+ 
--- gcc-5-5.4.0.orig/debian/patches/aotcompile.diff
+++ gcc-5-5.4.0/debian/patches/aotcompile.diff
@@ -0,0 +1,51 @@
+--- ./build/aot/aotcompile.py.orig	2010-04-08 13:38:27.621086079 +0000
++++ ./build/aot/aotcompile.py	2010-04-08 14:22:55.102335973 +0000
+@@ -31,12 +31,25 @@
+          "dbtool": "/usr/lib/gcc-snapshot/bin/gcj-dbtool"}
+ 
+ MAKEFLAGS = []
+-GCJFLAGS = ["-fPIC", "-findirect-dispatch", "-fjni"]
++GCJFLAGS = ["-O2 -fPIC", "-findirect-dispatch", "-fjni"]
+ LDFLAGS = ["-Wl,-Bsymbolic"]
+ 
+ MAX_CLASSES_PER_JAR = 1024
+ MAX_BYTES_PER_JAR = 1048576
+ 
++try:
++    for line in file('/proc/meminfo'):
++        if line.startswith('MemTotal:'):
++            memtotal = int(line.split()[1])
++        if memtotal < 270000:
++            MAX_CLASSES_PER_JAR = 512
++            MAX_BYTES_PER_JAR = 524288
++        if memtotal < 140000:
++            MAX_CLASSES_PER_JAR = 256
++            MAX_BYTES_PER_JAR = 262144
++except:
++    pass
++
+ MAKEFILE = "Makefile"
+ 
+ MAKEFILE_HEADER = '''\
+@@ -49,7 +62,7 @@
+ 	$(GCJ) -c $(GCJFLAGS) $< -o $@
+ 
+ TARGETS = \\
+-%(targets)s
++javac ecj1
+ 
+ all: $(TARGETS)'''
+ 
+@@ -63,6 +76,12 @@
+ %(dso)s: $(%(base)s_OBJECTS)
+ 	$(GCJ) -shared $(GCJFLAGS) $(LDFLAGS) $^ -o $@
+ 
++javac: $(%(base)s_OBJECTS) resources.o
++	$(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.Main $^ -o $@
++
++ecj1: $(%(base)s_OBJECTS) resources.o
++	$(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.GCCMain $^ -o $@
++
+ %(db)s: $(%(base)s_SOURCES)
+ 	$(DBTOOL) -n $@ 64
+ 	for jar in $^; do \\
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-defaults.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-defaults.diff
@@ -0,0 +1,92 @@
+# DP: Set MULTILIB_DEFAULTS for ARM multilib builds
+
+Index: b/src/gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -3634,10 +3634,18 @@ case "${target}" in
+ 		fi
+ 
+ 		case "$with_float" in
+-		"" \
+-		| soft | hard | softfp)
++		"")
+ 			# OK
+ 			;;
++		soft)
++			tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=0"
++			;;
++		softfp)
++			tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=1"
++			;;
++		hard)
++			tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=2"
++			;;
+ 		*)
+ 			echo "Unknown floating point type used in --with-float=$with_float" 1>&2
+ 			exit 1
+@@ -3671,6 +3679,9 @@ case "${target}" in
+ 		"" \
+ 		| arm | thumb )
+ 			#OK
++			if test "$with_mode" = thumb; then
++				tm_defines="${tm_defines} TARGET_CONFIGURED_THUMB_MODE=1"
++			fi
+ 			;;
+ 		*)
+ 			echo "Unknown mode used in --with-mode=$with_mode"
+Index: b/src/gcc/config/arm/linux-eabi.h
+===================================================================
+--- a/src/gcc/config/arm/linux-eabi.h
++++ b/src/gcc/config/arm/linux-eabi.h
+@@ -43,7 +43,21 @@
+    target hardware.  If you override this to use the hard-float ABI then
+    change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well.  */
+ #undef  TARGET_DEFAULT_FLOAT_ABI
++#ifdef TARGET_CONFIGURED_FLOAT_ABI
++#if TARGET_CONFIGURED_FLOAT_ABI == 2
++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=hard"
++#elif TARGET_CONFIGURED_FLOAT_ABI == 1
++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFTFP
++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=softfp"
++#else
++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft"
++#endif
++#else
+ #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT
++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft"
++#endif
+ 
+ /* We default to the "aapcs-linux" ABI so that enums are int-sized by
+    default.  */
+@@ -86,6 +100,28 @@
+     %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \
+     %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}"
+ 
++/* Set the multilib defaults according the configuration, needed to
++   let gcc -print-multi-dir do the right thing.  */
++
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define MULTILIB_DEFAULT_ENDIAN "mbig-endian"
++#else
++#define MULTILIB_DEFAULT_ENDIAN "mlittle-endian"
++#endif
++
++#ifndef TARGET_CONFIGURED_THUMB_MODE
++#define MULTILIB_DEFAULT_MODE "marm"
++#elif TARGET_CONFIGURED_THUMB_MODE == 1
++#define MULTILIB_DEFAULT_MODE "mthumb"
++#else
++#define MULTILIB_DEFAULT_MODE "marm"
++#endif
++
++#undef  MULTILIB_DEFAULTS
++#define MULTILIB_DEFAULTS \
++	{ MULTILIB_DEFAULT_MODE, MULTILIB_DEFAULT_ENDIAN, \
++	  MULTILIB_DEFAULT_FLOAT_ABI, "mno-thumb-interwork" }
++
+ /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
+    use the GNU/Linux version, not the generic BPABI version.  */
+ #undef  LINK_SPEC
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-soft-cross.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-soft-cross.diff
@@ -0,0 +1,27 @@
+# DP: ARM hard/soft float multilib support
+
+Index: b/src/gcc/config/arm/t-linux-eabi
+===================================================================
+--- a/src/gcc/config/arm/t-linux-eabi
++++ b/src/gcc/config/arm/t-linux-eabi
+@@ -21,6 +21,20 @@
+ MULTILIB_OPTIONS	=
+ MULTILIB_DIRNAMES	=
+ 
++ifeq ($(with_float),hard)
++MULTILIB_OPTIONS	= mfloat-abi=soft/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp
++MULTILIB_OSDIRNAMES	= ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf
++else
++MULTILIB_OPTIONS	= mfloat-abi=soft/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp
++MULTILIB_OSDIRNAMES	= ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf
++endif
++
+ #MULTILIB_OPTIONS     += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te
+ #MULTILIB_DIRNAMES    += fa606te fa626te fmp626 fa726te
+ #MULTILIB_EXCEPTIONS  += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te*
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-soft-float.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-soft-float.diff
@@ -0,0 +1,26 @@
+--- a/src/gcc/config/arm/t-linux-eabi
++++ b/src/gcc/config/arm/t-linux-eabi
+@@ -24,6 +24,23 @@
+ MULTILIB_OPTIONS	=
+ MULTILIB_DIRNAMES	=
+ 
++ifneq (,$(findstring MULTIARCH_DEFAULTS,$(tm_defines)))
++ifneq (,$(findstring __arm_linux_gnueabi__,$(tm_defines)))
++  MULTILIB_OPTIONS	= mfloat-abi=softfp/mfloat-abi=hard/mfloat-abi=soft
++  MULTILIB_DIRNAMES	= . hf soft-float
++  MULTILIB_EXCEPTIONS	=
++  MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float
++  MULTILIB_OSDIRNAMES	= ../../lib/arm-linux-gnueabi ../../lib/arm-linux-gnueabihf soft-float
++endif
++ifneq (,$(findstring __arm_linux_gnueabihf__,$(tm_defines)))
++  MULTILIB_OPTIONS	= mfloat-abi=hard/mfloat-abi=softfp/mfloat-abi=soft
++  MULTILIB_DIRNAMES	= . sf soft-float
++  MULTILIB_EXCEPTIONS	=
++  MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float
++  MULTILIB_OSDIRNAMES	= ../../lib/arm-linux-gnueabihf ../../lib/arm-linux-gnueabi soft-float
++endif
++endif
++
+ #MULTILIB_OPTIONS     += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te
+ #MULTILIB_DIRNAMES    += fa606te fa626te fmp626 fa726te
+ #MULTILIB_EXCEPTIONS  += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te*
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-soft.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-soft.diff
@@ -0,0 +1,27 @@
+# DP: ARM hard/soft float multilib support
+
+Index: b/src/gcc/config/arm/t-linux-eabi
+===================================================================
+--- a/src/gcc/config/arm/t-linux-eabi
++++ b/src/gcc/config/arm/t-linux-eabi
+@@ -23,6 +23,20 @@
+ MULTILIB_OPTIONS	=
+ MULTILIB_DIRNAMES	=
+ 
++ifeq ($(with_float),hard)
++MULTILIB_OPTIONS	= mfloat-abi=soft/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp
++MULTILIB_OSDIRNAMES	= arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf
++else
++MULTILIB_OPTIONS	= mfloat-abi=soft/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp
++MULTILIB_OSDIRNAMES	= ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf
++endif
++
+ #MULTILIB_OPTIONS     += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te
+ #MULTILIB_DIRNAMES    += fa606te fa626te fmp626 fa726te
+ #MULTILIB_EXCEPTIONS  += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te*
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-softfp-cross.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-softfp-cross.diff
@@ -0,0 +1,27 @@
+# DP: ARM hard/softfp float multilib support
+
+Index: b/src/gcc/config/arm/t-linux-eabi
+===================================================================
+--- a/src/gcc/config/arm/t-linux-eabi	2011-01-03 20:52:22.000000000 +0000
++++ b/src/gcc/config/arm/t-linux-eabi	2011-08-21 21:08:47.583351817 +0000
+@@ -24,6 +24,20 @@
+ MULTILIB_OPTIONS	=
+ MULTILIB_DIRNAMES	=
+ 
++ifeq ($(with_float),hard)
++MULTILIB_OPTIONS	= mfloat-abi=softfp/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft
++MULTILIB_OSDIRNAMES	= ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf
++else
++MULTILIB_OPTIONS	= mfloat-abi=softfp/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft
++MULTILIB_OSDIRNAMES	= ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf
++endif
++
+ #MULTILIB_OPTIONS     += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te
+ #MULTILIB_DIRNAMES    += fa606te fa626te fmp626 fa726te
+ #MULTILIB_EXCEPTIONS  += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te*
--- gcc-5-5.4.0.orig/debian/patches/arm-multilib-softfp.diff
+++ gcc-5-5.4.0/debian/patches/arm-multilib-softfp.diff
@@ -0,0 +1,27 @@
+# DP: ARM hard/softfp float multilib support
+
+Index: b/src/gcc/config/arm/t-linux-eabi
+===================================================================
+--- a/src/gcc/config/arm/t-linux-eabi	2011-01-03 20:52:22.000000000 +0000
++++ b/src/gcc/config/arm/t-linux-eabi	2011-08-21 21:08:47.583351817 +0000
+@@ -24,6 +24,20 @@
+ MULTILIB_OPTIONS	=
+ MULTILIB_DIRNAMES	=
+ 
++ifeq ($(with_float),hard)
++MULTILIB_OPTIONS	= mfloat-abi=softfp/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft
++MULTILIB_OSDIRNAMES	= arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf
++else
++MULTILIB_OPTIONS	= mfloat-abi=softfp/mfloat-abi=hard
++MULTILIB_DIRNAMES	= sf hf
++MULTILIB_EXCEPTIONS	=
++MULTILIB_MATCHES	= mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft
++MULTILIB_OSDIRNAMES	= ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf
++endif
++
+ #MULTILIB_OPTIONS     += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te
+ #MULTILIB_DIRNAMES    += fa606te fa626te fmp626 fa726te
+ #MULTILIB_EXCEPTIONS  += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te*
--- gcc-5-5.4.0.orig/debian/patches/bind_now_when_pie-ubuntu.diff
+++ gcc-5-5.4.0/debian/patches/bind_now_when_pie-ubuntu.diff
@@ -0,0 +1,20 @@
+Author: Steve Beattie <steve.beattie@canonical.com>
+Description: enable bind now by default when linking with pie by default
+
+---
+ src/gcc/gcc.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -795,7 +795,7 @@ proper position among the other output f
+ 
+ #ifndef LINK_PIE_SPEC
+ #ifdef HAVE_LD_PIE
+-#define LD_PIE_SPEC "-pie"
++#define LD_PIE_SPEC "-pie -z now"
+ #else
+ #define LD_PIE_SPEC ""
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/boehm-gc-getnprocs.diff
+++ gcc-5-5.4.0/debian/patches/boehm-gc-getnprocs.diff
@@ -0,0 +1,20 @@
+# DP: boehm-gc/pthread_support.c (GC_get_nprocs): Use sysconf as fallback.
+
+---
+ boehm-gc/pthread_support.c |    3 ++-
+ 1 files changed, 2 insertions(+), 1 deletions(-)
+
+Index: b/src/boehm-gc/pthread_support.c
+===================================================================
+--- a/src/boehm-gc/pthread_support.c
++++ b/src/boehm-gc/pthread_support.c
+@@ -724,7 +724,8 @@ int GC_get_nprocs()
+     f = open("/proc/stat", O_RDONLY);
+     if (f < 0 || (len = STAT_READ(f, stat_buf, STAT_BUF_SIZE)) < 100) {
+ 	WARN("Couldn't read /proc/stat\n", 0);
+-	return -1;
++	/* Fallback to sysconf after the warning */
++	return sysconf(_SC_NPROCESSORS_ONLN);
+     }
+     for (i = 0; i < len - 100; ++i) {
+         if (stat_buf[i] == '\n' && stat_buf[i+1] == 'c'
--- gcc-5-5.4.0.orig/debian/patches/boehm-gc-nocheck.diff
+++ gcc-5-5.4.0/debian/patches/boehm-gc-nocheck.diff
@@ -0,0 +1,18 @@
+# DP: Disable running the boehm-gc testsuite. Hangs the buildd at least on hppa.
+
+---
+ boehm-gc/Makefile.in |    3 ++-
+ 1 files changed, 2 insertions(+), 1 deletions(-)
+
+--- a/src/boehm-gc/Makefile.in
++++ b/src/boehm-gc/Makefile.in
+@@ -684,7 +684,8 @@ check-TESTS: $(TESTS)
+ 	  test "$$failed" -eq 0; \
+ 	else :; fi
+ check-am: $(check_PROGRAMS)
+-	$(MAKE) $(AM_MAKEFLAGS) check-TESTS
++	: # $(MAKE) $(AM_MAKEFLAGS) check-TESTS
++	@echo target $@ disabled for Debian build.
+ check: check-recursive
+ all-am: Makefile $(LTLIBRARIES) all-multi
+ installdirs: installdirs-recursive
--- gcc-5-5.4.0.orig/debian/patches/bootstrap-no-unneeded-libs.diff
+++ gcc-5-5.4.0/debian/patches/bootstrap-no-unneeded-libs.diff
@@ -0,0 +1,1422 @@
+# DP: For bootstrap builds, don't build unneeded libstdc++ things
+# DP: (debug library, PCH headers).
+
+Index: b/src/Makefile.tpl
+===================================================================
+--- a/src/Makefile.tpl
++++ b/src/Makefile.tpl
+@@ -1060,7 +1060,9 @@
+ 	  --target=[+target_alias+] $${srcdiroption} [+ IF prev +]\
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) [+ ENDIF prev +]\
+ 	  $(STAGE[+id+]_CONFIGURE_FLAGS)[+ IF extra_configure_flags +] \
+-	  [+extra_configure_flags+][+ ENDIF extra_configure_flags +]
++	  [+extra_configure_flags+][+ ENDIF extra_configure_flags +] \
++	  [+ IF bootstrap_configure_flags +][+bootstrap_configure_flags+] \
++	  [+ ENDIF bootstrap_configure_flags +]
+ @endif [+prefix+][+module+]-bootstrap
+ [+ ENDFOR bootstrap_stage +]
+ [+ ENDIF bootstrap +]
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -117,7 +117,8 @@
+ target_modules = { module= libstdc++-v3;
+ 		   bootstrap=true;
+ 		   lib_path=src/.libs;
+-		   raw_cxx=true; };
++		   raw_cxx=true;
++		   bootstrap_configure_flags='--disable-libstdcxx-debug --disable-libstdcxx-pch'; };
+ target_modules = { module= libmudflap; lib_path=.libs; };
+ target_modules = { module= libsanitizer; lib_path=.libs; };
+ target_modules = { module= libssp; lib_path=.libs; };
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -3007,7 +3007,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ .PHONY: configure-stage2-bfd maybe-configure-stage2-bfd
+@@ -3040,7 +3041,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ .PHONY: configure-stage3-bfd maybe-configure-stage3-bfd
+@@ -3073,7 +3075,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ .PHONY: configure-stage4-bfd maybe-configure-stage4-bfd
+@@ -3106,7 +3109,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ .PHONY: configure-stageprofile-bfd maybe-configure-stageprofile-bfd
+@@ -3139,7 +3143,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ .PHONY: configure-stagefeedback-bfd maybe-configure-stagefeedback-bfd
+@@ -3172,7 +3177,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif bfd-bootstrap
+ 
+ 
+@@ -3879,7 +3885,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ .PHONY: configure-stage2-opcodes maybe-configure-stage2-opcodes
+@@ -3912,7 +3919,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ .PHONY: configure-stage3-opcodes maybe-configure-stage3-opcodes
+@@ -3945,7 +3953,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ .PHONY: configure-stage4-opcodes maybe-configure-stage4-opcodes
+@@ -3978,7 +3987,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ .PHONY: configure-stageprofile-opcodes maybe-configure-stageprofile-opcodes
+@@ -4011,7 +4021,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ .PHONY: configure-stagefeedback-opcodes maybe-configure-stagefeedback-opcodes
+@@ -4044,7 +4055,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif opcodes-bootstrap
+ 
+ 
+@@ -4751,7 +4763,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ .PHONY: configure-stage2-binutils maybe-configure-stage2-binutils
+@@ -4784,7 +4797,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ .PHONY: configure-stage3-binutils maybe-configure-stage3-binutils
+@@ -4817,7 +4831,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ .PHONY: configure-stage4-binutils maybe-configure-stage4-binutils
+@@ -4850,7 +4865,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ .PHONY: configure-stageprofile-binutils maybe-configure-stageprofile-binutils
+@@ -4883,7 +4899,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ .PHONY: configure-stagefeedback-binutils maybe-configure-stagefeedback-binutils
+@@ -4916,7 +4933,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif binutils-bootstrap
+ 
+ 
+@@ -8696,7 +8714,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ .PHONY: configure-stage2-gas maybe-configure-stage2-gas
+@@ -8729,7 +8748,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ .PHONY: configure-stage3-gas maybe-configure-stage3-gas
+@@ -8762,7 +8782,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ .PHONY: configure-stage4-gas maybe-configure-stage4-gas
+@@ -8795,7 +8816,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ .PHONY: configure-stageprofile-gas maybe-configure-stageprofile-gas
+@@ -8828,7 +8850,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ .PHONY: configure-stagefeedback-gas maybe-configure-stagefeedback-gas
+@@ -8861,7 +8884,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif gas-bootstrap
+ 
+ 
+@@ -9568,7 +9592,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ .PHONY: configure-stage2-gcc maybe-configure-stage2-gcc
+@@ -9601,7 +9626,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ .PHONY: configure-stage3-gcc maybe-configure-stage3-gcc
+@@ -9634,7 +9660,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ .PHONY: configure-stage4-gcc maybe-configure-stage4-gcc
+@@ -9667,7 +9694,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ .PHONY: configure-stageprofile-gcc maybe-configure-stageprofile-gcc
+@@ -9700,7 +9728,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ .PHONY: configure-stagefeedback-gcc maybe-configure-stagefeedback-gcc
+@@ -9733,7 +9762,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif gcc-bootstrap
+ 
+ 
+@@ -10441,7 +10471,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=none-${host_vendor}-${host_os} \
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ .PHONY: configure-stage2-gmp maybe-configure-stage2-gmp
+@@ -10475,7 +10506,8 @@
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ .PHONY: configure-stage3-gmp maybe-configure-stage3-gmp
+@@ -10509,7 +10541,8 @@
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ .PHONY: configure-stage4-gmp maybe-configure-stage4-gmp
+@@ -10543,7 +10576,8 @@
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ .PHONY: configure-stageprofile-gmp maybe-configure-stageprofile-gmp
+@@ -10577,7 +10611,8 @@
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ .PHONY: configure-stagefeedback-gmp maybe-configure-stagefeedback-gmp
+@@ -10611,7 +10646,8 @@
+ 	  --target=none-${host_vendor}-${host_os} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif gmp-bootstrap
+ 
+ 
+@@ -11307,7 +11343,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ .PHONY: configure-stage2-mpfr maybe-configure-stage2-mpfr
+@@ -11341,7 +11378,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ .PHONY: configure-stage3-mpfr maybe-configure-stage3-mpfr
+@@ -11375,7 +11413,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ .PHONY: configure-stage4-mpfr maybe-configure-stage4-mpfr
+@@ -11409,7 +11448,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ .PHONY: configure-stageprofile-mpfr maybe-configure-stageprofile-mpfr
+@@ -11443,7 +11483,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ .PHONY: configure-stagefeedback-mpfr maybe-configure-stagefeedback-mpfr
+@@ -11477,7 +11518,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpfr_configure_flags@
++	  --disable-shared @extra_mpfr_configure_flags@ \
++	  
+ @endif mpfr-bootstrap
+ 
+ 
+@@ -12173,7 +12215,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ .PHONY: configure-stage2-mpc maybe-configure-stage2-mpc
+@@ -12207,7 +12250,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ .PHONY: configure-stage3-mpc maybe-configure-stage3-mpc
+@@ -12241,7 +12285,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ .PHONY: configure-stage4-mpc maybe-configure-stage4-mpc
+@@ -12275,7 +12320,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ .PHONY: configure-stageprofile-mpc maybe-configure-stageprofile-mpc
+@@ -12309,7 +12355,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ .PHONY: configure-stagefeedback-mpc maybe-configure-stagefeedback-mpc
+@@ -12343,7 +12390,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@
++	  --disable-shared @extra_mpc_gmp_configure_flags@ @extra_mpc_mpfr_configure_flags@ \
++	  
+ @endif mpc-bootstrap
+ 
+ 
+@@ -13039,7 +13087,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ .PHONY: configure-stage2-isl maybe-configure-stage2-isl
+@@ -13073,7 +13122,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ .PHONY: configure-stage3-isl maybe-configure-stage3-isl
+@@ -13107,7 +13157,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ .PHONY: configure-stage4-isl maybe-configure-stage4-isl
+@@ -13141,7 +13192,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ .PHONY: configure-stageprofile-isl maybe-configure-stageprofile-isl
+@@ -13175,7 +13227,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ .PHONY: configure-stagefeedback-isl maybe-configure-stagefeedback-isl
+@@ -13209,7 +13262,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared @extra_isl_gmp_configure_flags@
++	  --disable-shared @extra_isl_gmp_configure_flags@ \
++	  
+ @endif isl-bootstrap
+ 
+ 
+@@ -13905,7 +13959,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ .PHONY: configure-stage2-cloog maybe-configure-stage2-cloog
+@@ -13939,7 +13994,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ .PHONY: configure-stage3-cloog maybe-configure-stage3-cloog
+@@ -13973,7 +14029,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ .PHONY: configure-stage4-cloog maybe-configure-stage4-cloog
+@@ -14007,7 +14064,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ .PHONY: configure-stageprofile-cloog maybe-configure-stageprofile-cloog
+@@ -14041,7 +14099,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ .PHONY: configure-stagefeedback-cloog maybe-configure-stagefeedback-cloog
+@@ -14075,7 +14134,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system
++	  --disable-shared --with-gmp=system --with-bits=gmp --with-isl=system \
++	  
+ @endif cloog-bootstrap
+ 
+ 
+@@ -14771,7 +14831,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ .PHONY: configure-stage2-libelf maybe-configure-stage2-libelf
+@@ -14805,7 +14866,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ .PHONY: configure-stage3-libelf maybe-configure-stage3-libelf
+@@ -14839,7 +14901,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ .PHONY: configure-stage4-libelf maybe-configure-stage4-libelf
+@@ -14873,7 +14936,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ .PHONY: configure-stageprofile-libelf maybe-configure-stageprofile-libelf
+@@ -14907,7 +14971,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libelf maybe-configure-stagefeedback-libelf
+@@ -14941,7 +15006,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --disable-shared
++	  --disable-shared \
++	  
+ @endif libelf-bootstrap
+ 
+ 
+@@ -15636,7 +15702,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ .PHONY: configure-stage2-gold maybe-configure-stage2-gold
+@@ -15669,7 +15736,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ .PHONY: configure-stage3-gold maybe-configure-stage3-gold
+@@ -15702,7 +15770,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ .PHONY: configure-stage4-gold maybe-configure-stage4-gold
+@@ -15735,7 +15804,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ .PHONY: configure-stageprofile-gold maybe-configure-stageprofile-gold
+@@ -15768,7 +15838,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ .PHONY: configure-stagefeedback-gold maybe-configure-stagefeedback-gold
+@@ -15801,7 +15872,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif gold-bootstrap
+ 
+ 
+@@ -16948,7 +17020,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ .PHONY: configure-stage2-intl maybe-configure-stage2-intl
+@@ -16981,7 +17054,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ .PHONY: configure-stage3-intl maybe-configure-stage3-intl
+@@ -17014,7 +17088,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ .PHONY: configure-stage4-intl maybe-configure-stage4-intl
+@@ -17047,7 +17122,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ .PHONY: configure-stageprofile-intl maybe-configure-stageprofile-intl
+@@ -17080,7 +17156,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ .PHONY: configure-stagefeedback-intl maybe-configure-stagefeedback-intl
+@@ -17113,7 +17190,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif intl-bootstrap
+ 
+ 
+@@ -18685,7 +18763,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ .PHONY: configure-stage2-ld maybe-configure-stage2-ld
+@@ -18718,7 +18797,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ .PHONY: configure-stage3-ld maybe-configure-stage3-ld
+@@ -18751,7 +18831,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ .PHONY: configure-stage4-ld maybe-configure-stage4-ld
+@@ -18784,7 +18865,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ .PHONY: configure-stageprofile-ld maybe-configure-stageprofile-ld
+@@ -18817,7 +18899,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ .PHONY: configure-stagefeedback-ld maybe-configure-stagefeedback-ld
+@@ -18850,7 +18933,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif ld-bootstrap
+ 
+ 
+@@ -19557,7 +19641,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ .PHONY: configure-stage2-libbacktrace maybe-configure-stage2-libbacktrace
+@@ -19590,7 +19675,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ .PHONY: configure-stage3-libbacktrace maybe-configure-stage3-libbacktrace
+@@ -19623,7 +19709,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ .PHONY: configure-stage4-libbacktrace maybe-configure-stage4-libbacktrace
+@@ -19656,7 +19743,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ .PHONY: configure-stageprofile-libbacktrace maybe-configure-stageprofile-libbacktrace
+@@ -19689,7 +19777,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libbacktrace maybe-configure-stagefeedback-libbacktrace
+@@ -19722,7 +19811,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif libbacktrace-bootstrap
+ 
+ 
+@@ -20429,7 +20519,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ .PHONY: configure-stage2-libcpp maybe-configure-stage2-libcpp
+@@ -20462,7 +20553,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ .PHONY: configure-stage3-libcpp maybe-configure-stage3-libcpp
+@@ -20495,7 +20587,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ .PHONY: configure-stage4-libcpp maybe-configure-stage4-libcpp
+@@ -20528,7 +20621,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ .PHONY: configure-stageprofile-libcpp maybe-configure-stageprofile-libcpp
+@@ -20561,7 +20655,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libcpp maybe-configure-stagefeedback-libcpp
+@@ -20594,7 +20689,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif libcpp-bootstrap
+ 
+ 
+@@ -21301,7 +21397,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ .PHONY: configure-stage2-libdecnumber maybe-configure-stage2-libdecnumber
+@@ -21334,7 +21431,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ .PHONY: configure-stage3-libdecnumber maybe-configure-stage3-libdecnumber
+@@ -21367,7 +21465,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ .PHONY: configure-stage4-libdecnumber maybe-configure-stage4-libdecnumber
+@@ -21400,7 +21499,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ .PHONY: configure-stageprofile-libdecnumber maybe-configure-stageprofile-libdecnumber
+@@ -21433,7 +21533,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libdecnumber maybe-configure-stagefeedback-libdecnumber
+@@ -21466,7 +21567,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif libdecnumber-bootstrap
+ 
+ 
+@@ -22614,7 +22716,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ .PHONY: configure-stage2-libiberty maybe-configure-stage2-libiberty
+@@ -22648,7 +22751,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ .PHONY: configure-stage3-libiberty maybe-configure-stage3-libiberty
+@@ -22682,7 +22786,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ .PHONY: configure-stage4-libiberty maybe-configure-stage4-libiberty
+@@ -22716,7 +22821,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ .PHONY: configure-stageprofile-libiberty maybe-configure-stageprofile-libiberty
+@@ -22750,7 +22856,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ .PHONY: configure-stagefeedback-libiberty maybe-configure-stagefeedback-libiberty
+@@ -22784,7 +22891,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  @extra_host_libiberty_configure_flags@
++	  @extra_host_libiberty_configure_flags@ \
++	  
+ @endif libiberty-bootstrap
+ 
+ 
+@@ -26056,7 +26164,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ .PHONY: configure-stage2-zlib maybe-configure-stage2-zlib
+@@ -26089,7 +26198,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ .PHONY: configure-stage3-zlib maybe-configure-stage3-zlib
+@@ -26122,7 +26232,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ .PHONY: configure-stage4-zlib maybe-configure-stage4-zlib
+@@ -26155,7 +26266,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ .PHONY: configure-stageprofile-zlib maybe-configure-stageprofile-zlib
+@@ -26188,7 +26300,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ .PHONY: configure-stagefeedback-zlib maybe-configure-stagefeedback-zlib
+@@ -26221,7 +26334,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif zlib-bootstrap
+ 
+ 
+@@ -29919,7 +30033,8 @@
+ 	  $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  $(STAGE1_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ .PHONY: configure-stage2-lto-plugin maybe-configure-stage2-lto-plugin
+@@ -29953,7 +30068,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE2_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ .PHONY: configure-stage3-lto-plugin maybe-configure-stage3-lto-plugin
+@@ -29987,7 +30103,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE3_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ .PHONY: configure-stage4-lto-plugin maybe-configure-stage4-lto-plugin
+@@ -30021,7 +30138,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGE4_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ .PHONY: configure-stageprofile-lto-plugin maybe-configure-stageprofile-lto-plugin
+@@ -30055,7 +30173,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEprofile_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ .PHONY: configure-stagefeedback-lto-plugin maybe-configure-stagefeedback-lto-plugin
+@@ -30089,7 +30208,8 @@
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+ 	  $(STAGEfeedback_CONFIGURE_FLAGS) \
+-	  --enable-shared
++	  --enable-shared \
++	  
+ @endif lto-plugin-bootstrap
+ 
+ 
+@@ -30829,7 +30949,9 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ .PHONY: configure-stage2-target-libstdc++-v3 maybe-configure-stage2-target-libstdc++-v3
+@@ -30874,7 +30996,9 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ .PHONY: configure-stage3-target-libstdc++-v3 maybe-configure-stage3-target-libstdc++-v3
+@@ -30919,7 +31043,9 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ .PHONY: configure-stage4-target-libstdc++-v3 maybe-configure-stage4-target-libstdc++-v3
+@@ -30964,7 +31090,9 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ .PHONY: configure-stageprofile-target-libstdc++-v3 maybe-configure-stageprofile-target-libstdc++-v3
+@@ -31009,7 +31137,9 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ .PHONY: configure-stagefeedback-target-libstdc++-v3 maybe-configure-stagefeedback-target-libstdc++-v3
+@@ -31054,7 +31184,9 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  --disable-libstdcxx-debug --disable-libstdcxx-pch \
++	  
+ @endif target-libstdc++-v3-bootstrap
+ 
+ 
+@@ -33631,7 +33763,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ .PHONY: configure-stage2-target-libgcc maybe-configure-stage2-target-libgcc
+@@ -33676,7 +33809,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ .PHONY: configure-stage3-target-libgcc maybe-configure-stage3-target-libgcc
+@@ -33721,7 +33855,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ .PHONY: configure-stage4-target-libgcc maybe-configure-stage4-target-libgcc
+@@ -33766,7 +33901,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ .PHONY: configure-stageprofile-target-libgcc maybe-configure-stageprofile-target-libgcc
+@@ -33811,7 +33947,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ .PHONY: configure-stagefeedback-target-libgcc maybe-configure-stagefeedback-target-libgcc
+@@ -33856,7 +33993,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgcc-bootstrap
+ 
+ 
+@@ -40928,7 +41066,8 @@
+ 	$(SHELL) $${libsrcdir}/configure \
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+-	  $(STAGE1_CONFIGURE_FLAGS)
++	  $(STAGE1_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ .PHONY: configure-stage2-target-libgomp maybe-configure-stage2-target-libgomp
+@@ -40973,7 +41112,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE2_CONFIGURE_FLAGS)
++	  $(STAGE2_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ .PHONY: configure-stage3-target-libgomp maybe-configure-stage3-target-libgomp
+@@ -41018,7 +41158,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE3_CONFIGURE_FLAGS)
++	  $(STAGE3_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ .PHONY: configure-stage4-target-libgomp maybe-configure-stage4-target-libgomp
+@@ -41063,7 +41204,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGE4_CONFIGURE_FLAGS)
++	  $(STAGE4_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ .PHONY: configure-stageprofile-target-libgomp maybe-configure-stageprofile-target-libgomp
+@@ -41108,7 +41250,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEprofile_CONFIGURE_FLAGS)
++	  $(STAGEprofile_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ .PHONY: configure-stagefeedback-target-libgomp maybe-configure-stagefeedback-target-libgomp
+@@ -41153,7 +41296,8 @@
+ 	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
+ 	  --target=${target_alias} $${srcdiroption} \
+ 	  --with-build-libsubdir=$(HOST_SUBDIR) \
+-	  $(STAGEfeedback_CONFIGURE_FLAGS)
++	  $(STAGEfeedback_CONFIGURE_FLAGS) \
++	  
+ @endif target-libgomp-bootstrap
+ 
+ 
--- gcc-5-5.4.0.orig/debian/patches/canonical-cpppath.diff
+++ gcc-5-5.4.0/debian/patches/canonical-cpppath.diff
@@ -0,0 +1,36 @@
+# DP: Don't use any relative path names for the standard include paths.
+
+Index: b/src/gcc/incpath.c
+===================================================================
+--- a/src/gcc/incpath.c
++++ b/src/gcc/incpath.c
+@@ -173,6 +173,14 @@ add_standard_paths (const char *sysroot,
+ 			str = reconcat (str, str, dir_separator_str,
+ 					imultiarch, NULL);
+ 		    }
++		  {
++		    char *rp = lrealpath (str);
++		    if (rp)
++		      {
++			free (str);
++			str = rp;
++		      }
++		  }
+ 		  add_path (str, SYSTEM, p->cxx_aware, false);
+ 		}
+ 	    }
+@@ -247,6 +255,14 @@ add_standard_paths (const char *sysroot,
+ 	      else
+ 		str = reconcat (str, str, dir_separator_str, imultiarch, NULL);
+ 	    }
++	  {
++	    char *rp = lrealpath (str);
++	    if (rp)
++	      {
++		free (str);
++		str = rp;
++	      }
++	  }
+ 
+ 	  add_path (str, SYSTEM, p->cxx_aware, false);
+ 	}
--- gcc-5-5.4.0.orig/debian/patches/config-ml.diff
+++ gcc-5-5.4.0/debian/patches/config-ml.diff
@@ -0,0 +1,55 @@
+# DP: - Disable some biarch libraries for biarch builds.
+# DP: - Fix multilib builds on kernels which don't support all multilibs.
+
+Index: b/src/config-ml.in
+===================================================================
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -475,6 +475,25 @@ powerpc*-*-* | rs6000*-*-*)
+ 	;;
+ esac
+ 
++if [ -z "$biarch_multidir_names" ]; then
++  biarch_multidir_names="libiberty libstdc++-v3 libgfortran libmudflap libssp libffi libobjc libgomp"
++  echo "WARNING: biarch_multidir_names is unset. Use default value:"
++  echo "  $biarch_multidir_names"
++fi
++ml_srcbase=`basename $ml_realsrcdir`
++old_multidirs="${multidirs}"
++multidirs=""
++for x in ${old_multidirs}; do
++    case " $x " in
++	" 32 "|" n32 "|" x32 "|" 64 "|" hf "|" sf "|" m4-nofpu ")
++	case "$biarch_multidir_names" in
++	    *"$ml_srcbase"*) multidirs="${multidirs} ${x}" ;;
++	esac
++	;;
++	*) multidirs="${multidirs} ${x}" ;;
++    esac
++done
++
+ # Remove extraneous blanks from multidirs.
+ # Tests like `if [ -n "$multidirs" ]' require it.
+ multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'`
+@@ -891,9 +910,20 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	fi
+     fi
+ 
++    ml_configure_args=
++    for arg in ${ac_configure_args}
++    do
++      case $arg in
++      *CC=*)  ml_configure_args=${ml_config_env} ;;
++      *CXX=*) ml_configure_args=${ml_config_env} ;;
++      *GCJ=*) ml_configure_args=${ml_config_env} ;;
++      *) ;;
++      esac
++    done
++
+     if eval ${ml_config_env} ${ml_config_shell} ${ml_recprog} \
+ 	--with-multisubdir=${ml_dir} --with-multisrctop=${multisrctop} \
+-	"${ac_configure_args}" ${ml_config_env} ${ml_srcdiroption} ; then
++	"${ac_configure_args}" ${ml_configure_args} ${ml_config_env} ${ml_srcdiroption} ; then
+       true
+     else
+       exit 1
--- gcc-5-5.4.0.orig/debian/patches/cross-biarch.diff
+++ gcc-5-5.4.0/debian/patches/cross-biarch.diff
@@ -0,0 +1,91 @@
+# DP: Fix the location of target's libs in cross-build for biarch
+
+Index: b/src/config-ml.in
+===================================================================
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -533,7 +533,13 @@ multi-do:
+ 	    else \
+ 	      if [ -d ../$${dir}/$${lib} ]; then \
+ 		flags=`echo $$i | sed -e 's/^[^;]*;//' -e 's/@/ -/g'`; \
+-		if (cd ../$${dir}/$${lib}; $(MAKE) $(FLAGS_TO_PASS) \
++		libsuffix_="$${dir}"; \
++		if [ "$${dir}" = "n32" ]; then libsuffix_=32; fi; \
++		if [ -n "$$($${compiler} -v 2>&1 |grep '^Target: mips')" ] && [ "$${dir}" = "32" ]; then libsuffix_=o32; fi; \
++		if (cd ../$${dir}/$${lib}; $(MAKE) $(subst \
++				-B$(build_tooldir)/lib/, \
++				-B$(build_tooldir)/lib$${libsuffix_}/, \
++				$(FLAGS_TO_PASS)) \
+ 				CFLAGS="$(CFLAGS) $${flags}" \
+ 				CCASFLAGS="$(CCASFLAGS) $${flags}" \
+ 				FCFLAGS="$(FCFLAGS) $${flags}" \
+@@ -786,6 +792,15 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	GFORTRAN_=$GFORTRAN' '
+ 	GOC_=$GOC' '
+     else
++	if [ "${ml_dir}" = "." ]; then
++		FILTER_="s!X\\(.*\\)!\\1!p"
++	elif [ "${ml_dir}" = "n32" ]; then # mips n32 -> lib32
++		FILTER_="s!X\\(.*\\)/!\\132/!p"
++	elif [ "${ml_dir}" = "32" ] && [ "$(echo ${host} |grep '^mips')" ]; then # mips o32 -> libo32
++		FILTER_="s!X\\(.*\\)/!\\1o32/!p"
++	else
++		FILTER_="s!X\\(.*\\)/!\\1${ml_dir}/!p"
++	fi
+ 	# Create a regular expression that matches any string as long
+ 	# as ML_POPDIR.
+ 	popdir_rx=`echo "${ML_POPDIR}" | sed 's,.,.,g'`
+@@ -794,6 +809,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\1/p"`' ' ;;
++	  -B*/lib/)
++	    CC_="${CC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
+@@ -806,6 +823,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    CXX_="${CXX_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
+@@ -818,6 +837,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    F77_="${F77_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
+@@ -830,6 +851,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
+@@ -842,6 +865,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
+@@ -854,6 +879,8 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    GOC_="${GOC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    GOC_="${GOC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    GOC_="${GOC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
--- gcc-5-5.4.0.orig/debian/patches/cross-fixes.diff
+++ gcc-5-5.4.0/debian/patches/cross-fixes.diff
@@ -0,0 +1,81 @@
+# DP: Fix the linker error when creating an xcc for ia64
+
+---
+ gcc/config/ia64/fde-glibc.c     |    3 +++
+ gcc/config/ia64/unwind-ia64.c   |    3 ++-
+ gcc/unwind-compat.c             |    2 ++
+ gcc/unwind-generic.h            |    2 ++
+ 6 files changed, 14 insertions(+), 1 deletions(-)
+
+Index: b/src/libgcc/config/ia64/fde-glibc.c
+===================================================================
+--- a/src/libgcc/config/ia64/fde-glibc.c
++++ b/src/libgcc/config/ia64/fde-glibc.c
+@@ -28,6 +28,7 @@
+ #ifndef _GNU_SOURCE
+ #define _GNU_SOURCE 1
+ #endif
++#ifndef inhibit_libc
+ #include "config.h"
+ #include <stddef.h>
+ #include <stdlib.h>
+@@ -159,3 +160,5 @@
+ 
+   return data.ret;
+ }
++
++#endif
+Index: b/src/libgcc/config/ia64/unwind-ia64.c
+===================================================================
+--- a/src/libgcc/config/ia64/unwind-ia64.c
++++ b/src/libgcc/config/ia64/unwind-ia64.c
+@@ -27,6 +27,7 @@
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
++#ifndef inhibit_libc
+ #include "tconfig.h"
+ #include "tsystem.h"
+ #include "coretypes.h"
+@@ -2467,3 +2468,4 @@
+ #endif
+ 
+ #endif
++#endif
+Index: b/src/libgcc/unwind-compat.c
+===================================================================
+--- a/src/libgcc/unwind-compat.c
++++ b/src/libgcc/unwind-compat.c
+@@ -24,6 +24,7 @@
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS)
++#ifndef inhibit_libc
+ #include "tconfig.h"
+ #include "tsystem.h"
+ #include "unwind.h"
+@@ -208,3 +209,4 @@
+ }
+ symver (_Unwind_SetIP, GCC_3.0);
+ #endif
++#endif
+Index: b/src/libgcc/unwind-generic.h
+===================================================================
+--- a/src/libgcc/unwind-generic.h
++++ b/src/libgcc/unwind-generic.h
+@@ -221,6 +221,7 @@
+    compatible with the standard ABI for IA-64, we inline these.  */
+ 
+ #ifdef __ia64__
++#ifndef inhibit_libc
+ #include <stdlib.h>
+ 
+ static inline _Unwind_Ptr
+@@ -239,6 +240,7 @@
+ 
+ /* @@@ Retrieve the Backing Store Pointer of the given context.  */
+ extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *);
++#endif
+ #else
+ extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *);
+ extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *);
--- gcc-5-5.4.0.orig/debian/patches/cross-install-location.diff
+++ gcc-5-5.4.0/debian/patches/cross-install-location.diff
@@ -0,0 +1,422 @@
+Index: b/src/fixincludes/Makefile.in
+===================================================================
+--- a/src/fixincludes/Makefile.in
++++ b/src/fixincludes/Makefile.in
+@@ -52,9 +52,9 @@ target_noncanonical:=@target_noncanonica
+ gcc_version := $(shell cat $(srcdir)/../gcc/BASE-VER)
+ 
+ # Directory in which the compiler finds libraries etc.
+-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ # Directory in which the compiler finds executables
+-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ # Where our executable files go
+ itoolsdir = $(libexecsubdir)/install-tools
+ # Where our data files go
+Index: b/src/libgfortran/Makefile.in
+===================================================================
+--- a/src/libgfortran/Makefile.in
++++ b/src/libgfortran/Makefile.in
+@@ -608,17 +608,17 @@ libgfortran_la_LDFLAGS = -version-info `
+ 
+ libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP)
+ myexeclib_LTLIBRARIES = libgfortranbegin.la
+-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+ libgfortranbegin_la_SOURCES = fmain.c
+ libgfortranbegin_la_LDFLAGS = -static
+ libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS)
+ cafexeclib_LTLIBRARIES = libcaf_single.la
+-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+ libcaf_single_la_SOURCES = caf/single.c
+ libcaf_single_la_LDFLAGS = -static
+ libcaf_single_la_DEPENDENCIES = caf/libcaf.h
+ libcaf_single_la_LINK = $(LINK) $(libcaf_single_la_LDFLAGS)
+-@IEEE_SUPPORT_TRUE@fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude
++@IEEE_SUPPORT_TRUE@fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude
+ @IEEE_SUPPORT_TRUE@nodist_finclude_HEADERS = ieee_arithmetic.mod ieee_exceptions.mod ieee_features.mod
+ AM_CPPFLAGS = -iquote$(srcdir)/io -I$(srcdir)/$(MULTISRCTOP)../gcc \
+ 	      -I$(srcdir)/$(MULTISRCTOP)../gcc/config $(LIBQUADINCLUDE) \
+Index: b/src/libgfortran/Makefile.am
+===================================================================
+--- a/src/libgfortran/Makefile.am
++++ b/src/libgfortran/Makefile.am
+@@ -42,20 +42,20 @@ libgfortran_la_LDFLAGS = -version-info `
+ libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP)
+ 
+ myexeclib_LTLIBRARIES = libgfortranbegin.la
+-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+ libgfortranbegin_la_SOURCES = fmain.c
+ libgfortranbegin_la_LDFLAGS = -static
+ libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS)
+ 
+ cafexeclib_LTLIBRARIES = libcaf_single.la
+-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+ libcaf_single_la_SOURCES = caf/single.c
+ libcaf_single_la_LDFLAGS = -static
+ libcaf_single_la_DEPENDENCIES = caf/libcaf.h
+ libcaf_single_la_LINK = $(LINK) $(libcaf_single_la_LDFLAGS)
+ 
+ if IEEE_SUPPORT
+-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude
++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR)/finclude
+ nodist_finclude_HEADERS = ieee_arithmetic.mod ieee_exceptions.mod ieee_features.mod
+ endif
+ 
+Index: b/src/lto-plugin/Makefile.in
+===================================================================
+--- a/src/lto-plugin/Makefile.in
++++ b/src/lto-plugin/Makefile.in
+@@ -229,7 +229,7 @@ with_libiberty = @with_libiberty@
+ ACLOCAL_AMFLAGS = -I .. -I ../config
+ AUTOMAKE_OPTIONS = no-dependencies
+ gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER)
+-libexecsubdir := $(libexecdir)/gcc/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix)
++libexecsubdir := $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix)
+ AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS)
+ AM_CFLAGS = @ac_lto_plugin_warn_cflags@
+ AM_LDFLAGS = @ac_lto_plugin_ldflags@
+Index: b/src/lto-plugin/Makefile.am
+===================================================================
+--- a/src/lto-plugin/Makefile.am
++++ b/src/lto-plugin/Makefile.am
+@@ -5,7 +5,7 @@ AUTOMAKE_OPTIONS = no-dependencies
+ 
+ gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER)
+ target_noncanonical := @target_noncanonical@
+-libexecsubdir := $(libexecdir)/gcc/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix)
++libexecsubdir := $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(gcc_version)$(accel_dir_suffix)
+ 
+ AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS)
+ AM_CFLAGS = @ac_lto_plugin_warn_cflags@
+Index: b/src/libitm/Makefile.in
+===================================================================
+--- a/src/libitm/Makefile.in
++++ b/src/libitm/Makefile.in
+@@ -306,8 +306,8 @@ SUBDIRS = testsuite
+ gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER)
+ abi_version = -fabi-version=4
+ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir)
+-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude
+-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude
++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ AM_CPPFLAGS = $(addprefix -I, $(search_path))
+ AM_CFLAGS = $(XCFLAGS)
+ AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \
+Index: b/src/libitm/Makefile.am
+===================================================================
+--- a/src/libitm/Makefile.am
++++ b/src/libitm/Makefile.am
+@@ -11,8 +11,8 @@ abi_version = -fabi-version=4
+ config_path = @config_path@
+ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir)
+ 
+-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude
+-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude
++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ 
+ vpath % $(strip $(search_path))
+ 
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -3970,7 +3970,7 @@ process_command (unsigned int decoded_op
+ 	 GCC_EXEC_PREFIX is typically a directory name with a trailing
+ 	 / (which is ignored by make_relative_prefix), so append a
+ 	 program name.  */
+-      char *tmp_prefix = concat (gcc_exec_prefix, "gcc", NULL);
++      char *tmp_prefix = concat (gcc_exec_prefix, "gcc-cross", NULL);
+       gcc_libexec_prefix = get_relative_prefix (tmp_prefix,
+ 						standard_exec_prefix,
+ 						standard_libexec_prefix);
+@@ -3996,15 +3996,15 @@ process_command (unsigned int decoded_op
+     {
+       int len = strlen (gcc_exec_prefix);
+ 
+-      if (len > (int) sizeof ("/lib/gcc/") - 1
++      if (len > (int) sizeof ("/lib/gcc-cross/") - 1
+ 	  && (IS_DIR_SEPARATOR (gcc_exec_prefix[len-1])))
+ 	{
+-	  temp = gcc_exec_prefix + len - sizeof ("/lib/gcc/") + 1;
++	  temp = gcc_exec_prefix + len - sizeof ("/lib/gcc-cross/") + 1;
+ 	  if (IS_DIR_SEPARATOR (*temp)
+ 	      && filename_ncmp (temp + 1, "lib", 3) == 0
+ 	      && IS_DIR_SEPARATOR (temp[4])
+-	      && filename_ncmp (temp + 5, "gcc", 3) == 0)
+-	    len -= sizeof ("/lib/gcc/") - 1;
++	      && filename_ncmp (temp + 5, "gcc-cross", 3) == 0)
++	    len -= sizeof ("/lib/gcc-cross/") - 1;
+ 	}
+ 
+       set_std_prefix (gcc_exec_prefix, len);
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -581,9 +581,9 @@ libexecdir = @libexecdir@
+ # --------
+ 
+ # Directory in which the compiler finds libraries etc.
+-libsubdir = $(libdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix)
++libsubdir = $(libdir)/gcc-cross/$(real_target_noncanonical)/$(version)$(accel_dir_suffix)
+ # Directory in which the compiler finds executables
+-libexecsubdir = $(libexecdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix)
++libexecsubdir = $(libexecdir)/gcc-cross/$(real_target_noncanonical)/$(version)$(accel_dir_suffix)
+ # Directory in which all plugin resources are installed
+ plugin_resourcesdir = $(libsubdir)/plugin
+  # Directory in which plugin headers are installed
+@@ -1971,8 +1971,8 @@ prefix.o: $(FULLVER)
+ 
+ DRIVER_DEFINES = \
+   -DSTANDARD_STARTFILE_PREFIX=\"$(unlibsubdir)/\" \
+-  -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
+-  -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc/\" \
++  -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \
++  -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc-cross/\" \
+   -DDEFAULT_TARGET_VERSION=\"$(BASEVER_c)\" \
+   -DDEFAULT_TARGET_FULL_VERSION=\"$(FULLVER_c)\" \
+   -DDEFAULT_REAL_TARGET_MACHINE=\"$(real_target_noncanonical)\" \
+@@ -2594,7 +2594,7 @@ PREPROCESSOR_DEFINES = \
+   -DTOOL_INCLUDE_DIR=\"$(gcc_tooldir)/include\" \
+   -DNATIVE_SYSTEM_HEADER_DIR=\"$(NATIVE_SYSTEM_HEADER_DIR)\" \
+   -DPREFIX=\"$(prefix)/\" \
+-  -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
++  -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \
+   @TARGET_SYSTEM_ROOT_DEFINE@
+ 
+ CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s)
+Index: b/src/libssp/Makefile.in
+===================================================================
+--- a/src/libssp/Makefile.in
++++ b/src/libssp/Makefile.in
+@@ -259,7 +259,7 @@ gcc_version := $(shell cat $(top_srcdir)
+ @LIBSSP_USE_SYMVER_SUN_TRUE@@LIBSSP_USE_SYMVER_TRUE@version_dep = ssp.map-sun
+ AM_CFLAGS = -Wall
+ toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la
+-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include
++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include
+ nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h
+ libssp_la_SOURCES = \
+ 	ssp.c gets-chk.c memcpy-chk.c memmove-chk.c mempcpy-chk.c \
+Index: b/src/libssp/Makefile.am
+===================================================================
+--- a/src/libssp/Makefile.am
++++ b/src/libssp/Makefile.am
+@@ -39,7 +39,7 @@ AM_CFLAGS = -Wall
+ toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la
+ 
+ target_noncanonical = @target_noncanonical@
+-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include
++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include
+ nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h
+ 
+ libssp_la_SOURCES = \
+Index: b/src/libquadmath/Makefile.in
+===================================================================
+--- a/src/libquadmath/Makefile.in
++++ b/src/libquadmath/Makefile.in
+@@ -325,7 +325,7 @@ AUTOMAKE_OPTIONS = 1.8 foreign
+ 
+ @BUILD_LIBQUADMATH_TRUE@libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD)
+ @BUILD_LIBQUADMATH_TRUE@nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h
+-@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ @BUILD_LIBQUADMATH_TRUE@libquadmath_la_SOURCES = \
+ @BUILD_LIBQUADMATH_TRUE@  math/x2y2m1q.c math/isinf_nsq.c math/acoshq.c math/fmodq.c \
+ @BUILD_LIBQUADMATH_TRUE@  math/acosq.c math/frexpq.c \
+Index: b/src/libquadmath/Makefile.am
+===================================================================
+--- a/src/libquadmath/Makefile.am
++++ b/src/libquadmath/Makefile.am
+@@ -41,7 +41,7 @@ libquadmath_la_LDFLAGS = -version-info `
+ libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD)
+ 
+ nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h
+-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ 
+ libquadmath_la_SOURCES = \
+   math/x2y2m1q.c math/isinf_nsq.c math/acoshq.c math/fmodq.c \
+Index: b/src/libobjc/Makefile.in
+===================================================================
+--- a/src/libobjc/Makefile.in
++++ b/src/libobjc/Makefile.in
+@@ -50,7 +50,7 @@ top_builddir = .
+ -include ../boehm-gc/threads.mk
+ 
+ libdir = $(exec_prefix)/lib
+-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ 
+ # Multilib support variables.
+ MULTISRCTOP =
+Index: b/src/libada/Makefile.in
+===================================================================
+--- a/src/libada/Makefile.in
++++ b/src/libada/Makefile.in
+@@ -68,7 +68,7 @@ GCC_DIR=$(MULTIBUILDTOP)../../$(host_sub
+ 
+ target_noncanonical:=@target_noncanonical@
+ version := $(shell cat $(srcdir)/../gcc/BASE-VER)
+-libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR)
++libsubdir := $(libdir)/gcc-cross/$(target_noncanonical)/$(version)$(MULTISUBDIR)
+ ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR))
+ ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR))
+ 
+Index: b/src/libgomp/Makefile.in
+===================================================================
+--- a/src/libgomp/Makefile.in
++++ b/src/libgomp/Makefile.in
+@@ -368,8 +368,8 @@ gcc_version := $(shell cat $(top_srcdir)
+ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) \
+ 	      $(top_srcdir)/../include
+ 
+-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude
+-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude
++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ AM_CPPFLAGS = $(addprefix -I, $(search_path))
+ AM_CFLAGS = $(XCFLAGS)
+ AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS)
+Index: b/src/libgomp/Makefile.am
+===================================================================
+--- a/src/libgomp/Makefile.am
++++ b/src/libgomp/Makefile.am
+@@ -10,8 +10,8 @@ config_path = @config_path@
+ search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) \
+ 	      $(top_srcdir)/../include
+ 
+-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude
+-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude
++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ 
+ vpath % $(strip $(search_path))
+ 
+Index: b/src/libgcc/Makefile.in
+===================================================================
+--- a/src/libgcc/Makefile.in
++++ b/src/libgcc/Makefile.in
+@@ -185,7 +185,7 @@ STRIP = @STRIP@
+ STRIP_FOR_TARGET = $(STRIP)
+ 
+ # Directory in which the compiler finds libraries etc.
+-libsubdir = $(libdir)/gcc/$(host_noncanonical)/$(version)@accel_dir_suffix@
++libsubdir = $(libdir)/gcc-cross/$(host_noncanonical)/$(version)@accel_dir_suffix@
+ # Used to install the shared libgcc.
+ slibdir = @slibdir@
+ # Maybe used for DLLs on Windows targets.
+Index: b/src/libjava/Makefile.in
+===================================================================
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -797,8 +797,8 @@ write_entries_to_file = $(shell rm -f $(
+ 
+ 
+ # This is required by TL_AC_GXX_INCLUDE_DIR.
+-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)
+-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ toolexeclib_LTLIBRARIES = libgcj.la libgij.la libgcj-tools.la \
+ 	$(am__append_2) $(am__append_3) $(am__append_4)
+ toolexecmainlib_DATA = libgcj.spec
+Index: b/src/libjava/Makefile.am
+===================================================================
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -35,9 +35,9 @@ write_entries_to_file = $(shell rm -f $(
+ target_noncanonical = @target_noncanonical@
+ 
+ # This is required by TL_AC_GXX_INCLUDE_DIR.
+-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ 
+-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)
+ 
+ ##
+ ## What gets installed, and where.
+Index: b/src/libffi/include/Makefile.am
+===================================================================
+--- a/src/libffi/include/Makefile.am
++++ b/src/libffi/include/Makefile.am
+@@ -8,6 +8,6 @@ EXTRA_DIST=ffi.h.in
+ 
+ # Where generated headers like ffitarget.h get installed.
+ gcc_version   := $(shell cat $(top_srcdir)/../gcc/BASE-VER)
+-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ 
+ toollibffi_HEADERS = ffi.h ffitarget.h
+Index: b/src/libffi/include/Makefile.in
+===================================================================
+--- a/src/libffi/include/Makefile.in
++++ b/src/libffi/include/Makefile.in
+@@ -223,7 +223,7 @@ EXTRA_DIST = ffi.h.in
+ 
+ # Where generated headers like ffitarget.h get installed.
+ gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER)
+-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include
++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include
+ toollibffi_HEADERS = ffi.h ffitarget.h
+ all: all-am
+ 
+Index: b/src/libcc1/Makefile.am
+===================================================================
+--- a/src/libcc1/Makefile.am
++++ b/src/libcc1/Makefile.am
+@@ -35,7 +35,7 @@ libiberty = $(if $(wildcard $(libiberty_
+ 	    $(Wc)$(libiberty_normal)))
+ libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty))
+ 
+-plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin
++plugindir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/plugin
+ cc1libdir = $(libdir)/$(libsuffix)
+ 
+ if ENABLE_PLUGIN
+Index: b/src/libcc1/Makefile.in
+===================================================================
+--- a/src/libcc1/Makefile.in
++++ b/src/libcc1/Makefile.in
+@@ -262,7 +262,7 @@ libiberty = $(if $(wildcard $(libiberty_
+ 	    $(Wc)$(libiberty_normal)))
+ 
+ libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty))
+-plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin
++plugindir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/plugin
+ cc1libdir = $(libdir)/$(libsuffix)
+ @ENABLE_PLUGIN_TRUE@plugin_LTLIBRARIES = libcc1plugin.la
+ @ENABLE_PLUGIN_TRUE@cc1lib_LTLIBRARIES = libcc1.la
+Index: b/src/libsanitizer/Makefile.am
+===================================================================
+--- a/src/libsanitizer/Makefile.am
++++ b/src/libsanitizer/Makefile.am
+@@ -1,6 +1,6 @@
+ ACLOCAL_AMFLAGS = -I .. -I ../config
+ 
+-sanincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include/sanitizer
++sanincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include/sanitizer
+ 
+ nodist_saninclude_HEADERS =
+ 
+Index: b/src/libsanitizer/Makefile.in
+===================================================================
+--- a/src/libsanitizer/Makefile.in
++++ b/src/libsanitizer/Makefile.in
+@@ -255,7 +255,7 @@ top_build_prefix = @top_build_prefix@
+ top_builddir = @top_builddir@
+ top_srcdir = @top_srcdir@
+ ACLOCAL_AMFLAGS = -I .. -I ../config
+-sanincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include/sanitizer
++sanincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include/sanitizer
+ nodist_saninclude_HEADERS = $(am__append_1)
+ @SANITIZER_SUPPORTED_TRUE@SUBDIRS = sanitizer_common $(am__append_2) \
+ @SANITIZER_SUPPORTED_TRUE@	$(am__append_3) lsan asan ubsan \
--- gcc-5-5.4.0.orig/debian/patches/cross-no-locale-include.diff
+++ gcc-5-5.4.0/debian/patches/cross-no-locale-include.diff
@@ -0,0 +1,17 @@
+# DP: Don't add /usr/local/include for cross compilers. Assume that
+# DP: /usr/include is ready for multiarch, but not /usr/local/include.
+
+--- a/src/gcc/cppdefault.c
++++ b/src/gcc/cppdefault.c
+@@ -66,8 +66,11 @@
+ #ifdef LOCAL_INCLUDE_DIR
+     /* /usr/local/include comes before the fixincluded header files.  */
+     { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 },
++#if 0
++    /* Unsafe to assume that /usr/local/include is ready for multiarch.  */
+     { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 },
+ #endif
++#endif
+ #ifdef PREFIX_INCLUDE_DIR
+     { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 },
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/disable-gdc-tests.diff
+++ gcc-5-5.4.0/debian/patches/disable-gdc-tests.diff
@@ -0,0 +1,16 @@
+# DP: Disable D tests, hang on many buildds
+
+Index: b/src/gcc/d/Make-lang.in
+===================================================================
+--- a/src/gcc/d/Make-lang.in
++++ b/src/gcc/d/Make-lang.in
+@@ -284,6 +284,6 @@ d.stagefeedback: stagefeedback-start
+ # check targets.  However, our DejaGNU framework requires 'check-gdc' as its
+ # entry point.  We feed the former to the latter here.
+ check-d: check-gdc
+-lang_checks += check-gdc
+-lang_checks_parallelized += check-gdc
+-check_gdc_parallelize = 10
++#lang_checks += check-gdc
++#lang_checks_parallelized += check-gdc
++#check_gdc_parallelize = 10
--- gcc-5-5.4.0.orig/debian/patches/g++-multiarch-incdir.diff
+++ gcc-5-5.4.0/debian/patches/g++-multiarch-incdir.diff
@@ -0,0 +1,119 @@
+# DP: Use /usr/include/<multiarch>/c++/4.x as the include directory
+# DP: for host dependent c++ header files.
+
+Index: b/src/libstdc++-v3/include/Makefile.am
+===================================================================
+--- a/src/libstdc++-v3/include/Makefile.am
++++ b/src/libstdc++-v3/include/Makefile.am
+@@ -874,7 +874,7 @@ endif
+ 
+ host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR)
+ host_builddir = ./${host_alias}/bits
+-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits
++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits)
+ host_headers = \
+ 	${host_srcdir}/ctype_base.h \
+ 	${host_srcdir}/ctype_inline.h \
+Index: b/src/libstdc++-v3/include/Makefile.in
+===================================================================
+--- a/src/libstdc++-v3/include/Makefile.in
++++ b/src/libstdc++-v3/include/Makefile.in
+@@ -1155,7 +1155,7 @@ profile_impl_headers = \
+ @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers}
+ host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR)
+ host_builddir = ./${host_alias}/bits
+-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits
++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits)
+ host_headers = \
+ 	${host_srcdir}/ctype_base.h \
+ 	${host_srcdir}/ctype_inline.h \
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -1128,6 +1128,7 @@ FLAGS_TO_PASS = \
+ 	"prefix=$(prefix)" \
+ 	"local_prefix=$(local_prefix)" \
+ 	"gxx_include_dir=$(gcc_gxx_include_dir)" \
++	"gxx_tool_include_dir=$(gcc_gxx_tool_include_dir)" \
+ 	"build_tooldir=$(build_tooldir)" \
+ 	"gcc_tooldir=$(gcc_tooldir)" \
+ 	"bindir=$(bindir)" \
+@@ -1605,6 +1606,14 @@ ifneq ($(xmake_file),)
+ include $(xmake_file)
+ endif
+ 
++# Directory in which the compiler finds target-dependent g++ includes.
++ifneq ($(call if_multiarch,non-empty),)
++  gcc_gxx_tool_include_dir = $(libsubdir)/$(libsubdir_to_prefix)include/$(MULTIARCH_DIRNAME)/c++/$(BASEVER_c)
++else
++  gcc_gxx_tool_include_dir = $(gcc_gxx_include_dir)/$(target_noncanonical)
++endif
++
++
+ # all-tree.def includes all the tree.def files.
+ all-tree.def: s-alltree; @true
+ s-alltree: Makefile
+@@ -2610,7 +2619,7 @@ PREPROCESSOR_DEFINES = \
+   -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \
+   -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \
+   -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \
+-  -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/$(target_noncanonical)\" \
++  -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_tool_include_dir)\" \
+   -DGPLUSPLUS_BACKWARD_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/backward\" \
+   -DLOCAL_INCLUDE_DIR=\"$(local_includedir)\" \
+   -DCROSS_INCLUDE_DIR=\"$(CROSS_SYSTEM_HEADER_DIR)\" \
+Index: b/src/gcc/cppdefault.c
+===================================================================
+--- a/src/gcc/cppdefault.c
++++ b/src/gcc/cppdefault.c
+@@ -49,6 +49,8 @@ const struct default_include cpp_include
+     /* Pick up GNU C++ target-dependent include files.  */
+     { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1,
+       GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 },
++    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1,
++      GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 2 },
+ #endif
+ #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR
+     /* Pick up GNU C++ backward and deprecated include files.  */
+Index: b/src/gcc/incpath.c
+===================================================================
+--- a/src/gcc/incpath.c
++++ b/src/gcc/incpath.c
+@@ -160,6 +160,18 @@ add_standard_paths (const char *sysroot,
+ 			}
+ 		      str = reconcat (str, str, dir_separator_str,
+ 				      imultiarch, NULL);
++		      if (p->cplusplus)
++			{
++			  char *suffix = strstr (str, "/c++/");
++			  *suffix++ = '\0';
++			  suffix = xstrdup (suffix);
++			  str = reconcat (str, str, dir_separator_str,
++					  imultiarch,
++					  dir_separator_str, suffix, NULL);
++			}
++		      else
++			str = reconcat (str, str, dir_separator_str,
++					imultiarch, NULL);
+ 		    }
+ 		  add_path (str, SYSTEM, p->cxx_aware, false);
+ 		}
+@@ -224,7 +236,16 @@ add_standard_paths (const char *sysroot,
+ 		  free (str);
+ 		  continue;
+ 		}
+-	      str = reconcat (str, str, dir_separator_str, imultiarch, NULL);
++	      if (p->cplusplus)
++		{
++		  char *suffix = strstr (str, "/c++/");
++		  *suffix++ = '\0';
++		  suffix = xstrdup (suffix);
++		  str = reconcat (str, str, dir_separator_str, imultiarch,
++				  dir_separator_str, suffix, NULL);
++		}
++	      else
++		str = reconcat (str, str, dir_separator_str, imultiarch, NULL);
+ 	    }
+ 
+ 	  add_path (str, SYSTEM, p->cxx_aware, false);
--- gcc-5-5.4.0.orig/debian/patches/gcc-SOURCE_DATE_EPOCH-2-doc.diff
+++ gcc-5-5.4.0/debian/patches/gcc-SOURCE_DATE_EPOCH-2-doc.diff
@@ -0,0 +1,31 @@
+gcc/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* doc/cppenv.texi: Note that the `%s` in `date` is a non-standard
+	extension.
+
+diff --git a/gcc/doc/cppenv.texi b/gcc/doc/cppenv.texi
+index e958e93..8cefd52 100644
+--- a/src/gcc/doc/cppenv.texi
++++ b/src/gcc/doc/cppenv.texi
+@@ -81,7 +81,6 @@ main input file is omitted.
+ @end ifclear
+ 
+ @item SOURCE_DATE_EPOCH
+-
+ If this variable is set, its value specifies a UNIX timestamp to be
+ used in replacement of the current date and time in the @code{__DATE__}
+ and @code{__TIME__} macros, so that the embedded timestamps become
+@@ -89,8 +88,9 @@ reproducible.
+ 
+ The value of @env{SOURCE_DATE_EPOCH} must be a UNIX timestamp,
+ defined as the number of seconds (excluding leap seconds) since
+-01 Jan 1970 00:00:00 represented in ASCII, identical to the output of
+-@samp{@command{date +%s}}.
++01 Jan 1970 00:00:00 represented in ASCII; identical to the output of
++@samp{@command{date +%s}} on GNU/Linux and other systems that support the
++@code{%s} extension in the @code{date} command.
+ 
+ The value should be a known timestamp such as the last modification
+ time of the source or package and it should be set by the build
--- gcc-5-5.4.0.orig/debian/patches/gcc-SOURCE_DATE_EPOCH-2-linaro.diff
+++ gcc-5-5.4.0/debian/patches/gcc-SOURCE_DATE_EPOCH-2-linaro.diff
@@ -0,0 +1,378 @@
+gcc/c-family/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* c-common.c (get_source_date_epoch): Rename to
+	cb_get_source_date_epoch.
+	* c-common.c (cb_get_source_date_epoch): Use a single generic erorr
+	message when the parsing fails.  Use error_at instead of fatal_error.
+	* c-common.h (get_source_date_epoch): Rename to
+	cb_get_source_date_epoch.
+	* c-common.h (cb_get_source_date_epoch): Prototype.
+	* c-common.h (MAX_SOURCE_DATE_EPOCH): Define.
+	* c-common.h (c_omp_region_type): Remove trailing comma.
+	* c-lex.c (init_c_lex): Set cb->get_source_date_epoch callback.
+	* c-lex.c (c_lex_with_flags): Remove initialization of
+	pfile->source_date_epoch.
+
+gcc/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* doc/cppenv.texi: Note that the `%s` in `date` is a non-standard
+	extension.
+	* gcc.c (driver_handle_option): Call set_source_date_epoch_envvar.
+	* gcc.c (set_source_date_epoch_envvar): New function, sets
+	the SOURCE_DATE_EPOCH environment variable to the current time.
+
+gcc/testsuite/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* gcc.dg/cpp/source_date_epoch-1.c: New file, test the proper
+	behaviour of the macros __DATE__ and __TIME__ when SOURCE_DATE_EPOCH
+	env var is set.
+	* gcc.dg/cpp/source_date_epoch-2.c: New file, test the error output
+	when parsing the SOURCE_DATE_EPOCH env var, and make sure it is only
+	shown once.
+	* lib/gcc-dg.exp (dg-set-compiler-env-var): New function, set env vars
+	during compilation.
+	* lib/gcc-dg.exp (restore-compiler-env-var): New function, restore env
+	vars set by dg-set-compiler-env-var.
+
+libcpp/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* include/cpplib.h (cpp_callbacks): Add get_source_date_epoch
+	callback.
+	* include/cpplib.h (cpp_init_source_date_epoch): Remove prototype.
+	* init.c (cpp_init_source_date_epoch): Remove function.
+	* init.c (cpp_create_reader): Initialize pfile->source_date_epoch.
+	* internal.h (cpp_reader): Extend comment about source_date_epoch.
+	* macro.c (_cpp_builtin_macro_text): Use get_source_date_epoch
+	callback only once, read pfile->source_date_epoch on future passes.
+	Check that get_source_date_epoch callback is not NULL.
+
+Index: b/src/gcc/c-family/c-common.c
+===================================================================
+--- a/src/gcc/c-family/c-common.c
++++ b/src/gcc/c-family/c-common.c
+@@ -12343,8 +12343,9 @@ pointer_to_zero_sized_aggr_p (tree t)
+ /* Read SOURCE_DATE_EPOCH from environment to have a deterministic
+    timestamp to replace embedded current dates to get reproducible
+    results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++
+ time_t
+-get_source_date_epoch ()
++cb_get_source_date_epoch (cpp_reader *pfile ATTRIBUTE_UNUSED)
+ {
+   char *source_date_epoch;
+   long long epoch;
+@@ -12356,19 +12357,14 @@ get_source_date_epoch ()
+ 
+   errno = 0;
+   epoch = strtoll (source_date_epoch, &endptr, 10);
+-  if ((errno == ERANGE && (epoch == LLONG_MAX || epoch == LLONG_MIN))
+-      || (errno != 0 && epoch == 0))
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "strtoll: %s\n", xstrerror(errno));
+-  if (endptr == source_date_epoch)
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "no digits were found: %s\n", endptr);
+-  if (*endptr != '\0')
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "trailing garbage: %s\n", endptr);
+-  if (epoch < 0)
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "value must be nonnegative: %lld \n", epoch);
++  if (errno != 0 || endptr == source_date_epoch || *endptr != '\0'
++      || epoch < 0 || epoch > MAX_SOURCE_DATE_EPOCH)
++    {
++      error_at (input_location, "environment variable SOURCE_DATE_EPOCH must "
++	        "expand to a non-negative integer less than or equal to %wd",
++		MAX_SOURCE_DATE_EPOCH);
++      return (time_t) -1;
++    }
+ 
+   return (time_t) epoch;
+ }
+Index: b/src/gcc/c-family/c-common.h
+===================================================================
+--- a/src/gcc/c-family/c-common.h
++++ b/src/gcc/c-family/c-common.h
+@@ -1063,6 +1063,16 @@ extern vec<tree, va_gc> *make_tree_vecto
+    c_register_builtin_type.  */
+ extern GTY(()) tree registered_builtin_types;
+ 
++/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
++   timestamp to replace embedded current dates to get reproducible
++   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++extern time_t cb_get_source_date_epoch (cpp_reader *pfile);
++
++/* The value (as a unix timestamp) corresponds to date
++   "Dec 31 9999 23:59:59 UTC", which is the latest date that __DATE__ and
++   __TIME__ can store.  */
++#define MAX_SOURCE_DATE_EPOCH HOST_WIDE_INT_C (253402300799)
++
+ /* In c-gimplify.c  */
+ extern void c_genericize (tree);
+ extern int c_gimplify_expr (tree *, gimple_seq *, gimple_seq *);
+@@ -1440,9 +1450,4 @@ extern tree cilk_for_number_of_iteration
+ extern bool check_no_cilk (tree, const char *, const char *,
+ 		           location_t loc = UNKNOWN_LOCATION);
+ 
+-/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
+-   timestamp to replace embedded current dates to get reproducible
+-   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
+-extern time_t get_source_date_epoch (void);
+-
+ #endif /* ! GCC_C_COMMON_H */
+Index: b/src/gcc/c-family/c-lex.c
+===================================================================
+--- a/src/gcc/c-family/c-lex.c
++++ b/src/gcc/c-family/c-lex.c
+@@ -97,6 +97,7 @@ init_c_lex (void)
+   cb->valid_pch = c_common_valid_pch;
+   cb->read_pch = c_common_read_pch;
+   cb->has_attribute = c_common_has_attribute;
++  cb->get_source_date_epoch = cb_get_source_date_epoch;
+ 
+   /* Set the debug callbacks if we can use them.  */
+   if ((debug_info_level == DINFO_LEVEL_VERBOSE
+@@ -402,9 +403,6 @@ c_lex_with_flags (tree *value, location_
+   enum cpp_ttype type;
+   unsigned char add_flags = 0;
+   enum overflow_type overflow = OT_NONE;
+-  time_t source_date_epoch = get_source_date_epoch ();
+-
+-  cpp_init_source_date_epoch (parse_in, source_date_epoch);
+ 
+   timevar_push (TV_CPP);
+  retry:
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -3374,6 +3374,29 @@ save_switch (const char *opt, size_t n_a
+   n_switches++;
+ }
+ 
++/* Set the SOURCE_DATE_EPOCH environment variable to the current time if it is
++   not set already.  */
++
++static void
++set_source_date_epoch_envvar ()
++{
++  /* Array size is 21 = ceil(log_10(2^64)) + 1 to hold string representations
++     of 64 bit integers.  */
++  char source_date_epoch[21];
++  time_t tt;
++
++  errno = 0;
++  tt = time (NULL);
++  if (tt < (time_t) 0 || errno != 0)
++    tt = (time_t) 0;
++
++  snprintf (source_date_epoch, 21, "%llu", (unsigned long long) tt);
++  /* Using setenv instead of xputenv because we want the variable to remain
++     after finalizing so that it's still set in the second run when using
++     -fcompare-debug.  */
++  setenv ("SOURCE_DATE_EPOCH", source_date_epoch, 0);
++}
++
+ /* Handle an option DECODED that is unknown to the option-processing
+    machinery.  */
+ 
+@@ -3674,6 +3697,7 @@ driver_handle_option (struct gcc_options
+       else
+ 	compare_debug_opt = arg;
+       save_switch (compare_debug_replacement_opt, 0, NULL, validated, true);
++      set_source_date_epoch_envvar ();
+       return true;
+ 
+     case OPT_fdiagnostics_color_:
+Index: b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-1.c
+@@ -0,0 +1,11 @@
++/* { dg-do run } */
++/* { dg-set-compiler-env-var SOURCE_DATE_EPOCH "630333296" } */
++
++int
++main()
++{
++  if (__builtin_strcmp (__DATE__, "Dec 22 1989") != 0
++      || __builtin_strcmp (__TIME__, "12:34:56") != 0)
++    __builtin_abort ();
++  return 0;
++}
+Index: b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-2.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-set-compiler-env-var SOURCE_DATE_EPOCH "AAA" } */
++
++/* Make sure that SOURCE_DATE_EPOCH is only parsed once */
++
++int
++main(void)
++{
++  __builtin_printf ("%s %s\n", __DATE__, __TIME__); /* { dg-error "SOURCE_DATE_EPOCH must expand" } */
++  __builtin_printf ("%s %s\n", __DATE__, __TIME__);
++  return 0;
++}
+Index: b/src/gcc/testsuite/lib/gcc-dg.exp
+===================================================================
+--- a/src/gcc/testsuite/lib/gcc-dg.exp
++++ b/src/gcc/testsuite/lib/gcc-dg.exp
+@@ -427,6 +427,38 @@ proc restore-target-env-var { } {
+     }
+ }
+ 
++proc dg-set-compiler-env-var { args } {
++    global set_compiler_env_var
++    global saved_compiler_env_var
++    if { [llength $args] != 3 } {
++	error "dg-set-compiler-env-var: need two arguments"
++	return
++    }
++    set var [lindex $args 1]
++    set value [lindex $args 2]
++    if [info exists ::env($var)] {
++      lappend saved_compiler_env_var [list $var 1 $::env($var)]
++    } else {
++      lappend saved_compiler_env_var [list $var 0]
++    }
++    setenv $var $value
++    lappend set_compiler_env_var [list $var $value]
++}
++
++proc restore-compiler-env-var { } {
++    global saved_compiler_env_var
++    for { set env_vari [llength $saved_compiler_env_var] } {
++          [incr env_vari -1] >= 0 } {} {
++	set env_var [lindex $saved_compiler_env_var $env_vari]
++	set var [lindex $env_var 0]
++	if [lindex $env_var 1] {
++	    setenv $var [lindex $env_var 2]
++	} else {
++	    unsetenv $var
++	}
++    }
++}
++
+ # Utility routines.
+ 
+ #
+@@ -836,6 +868,8 @@ if { [info procs saved-dg-test] == [list
+ 	global shouldfail
+ 	global testname_with_flags
+ 	global set_target_env_var
++	global set_compiler_env_var
++	global saved_compiler_env_var
+ 	global keep_saved_temps_suffixes
+ 
+ 	if { [ catch { eval saved-dg-test $args } errmsg ] } {
+@@ -865,6 +899,11 @@ if { [info procs saved-dg-test] == [list
+ 	if [info exists keep_saved_temps_suffixes] {
+ 	    unset keep_saved_temps_suffixes
+ 	}
++	if [info exists set_compiler_env_var] {
++	    restore-compiler-env-var
++	    unset set_compiler_env_var
++	    unset saved_compiler_env_var
++	}
+ 	unset_timeout_vars
+ 	if [info exists compiler_conditional_xfail_data] {
+ 	    unset compiler_conditional_xfail_data
+Index: b/src/libcpp/include/cpplib.h
+===================================================================
+--- a/src/libcpp/include/cpplib.h
++++ b/src/libcpp/include/cpplib.h
+@@ -585,6 +585,9 @@ struct cpp_callbacks
+ 
+   /* Callback that can change a user builtin into normal macro.  */
+   bool (*user_builtin_macro) (cpp_reader *, cpp_hashnode *);
++
++  /* Callback to parse SOURCE_DATE_EPOCH from environment.  */
++  time_t (*get_source_date_epoch) (cpp_reader *);
+ };
+ 
+ #ifdef VMS
+@@ -775,9 +778,6 @@ extern void cpp_init_special_builtins (c
+ /* Set up built-ins like __FILE__.  */
+ extern void cpp_init_builtins (cpp_reader *, int);
+ 
+-/* Initialize the source_date_epoch value.  */
+-extern void cpp_init_source_date_epoch (cpp_reader *, time_t);
+-
+ /* This is called after options have been parsed, and partially
+    processed.  */
+ extern void cpp_post_options (cpp_reader *);
+Index: b/src/libcpp/init.c
+===================================================================
+--- a/src/libcpp/init.c
++++ b/src/libcpp/init.c
+@@ -254,6 +254,9 @@ cpp_create_reader (enum c_lang lang, cpp
+   /* Do not force token locations by default.  */
+   pfile->forced_token_location_p = NULL;
+ 
++  /* Initialize source_date_epoch to -2 (not yet set).  */
++  pfile->source_date_epoch = (time_t) -2;
++
+   /* The expression parser stack.  */
+   _cpp_expand_op_stack (pfile);
+ 
+@@ -530,13 +533,6 @@ cpp_init_builtins (cpp_reader *pfile, in
+     _cpp_define_builtin (pfile, "__OBJC__ 1");
+ }
+ 
+-/* Initialize the source_date_epoch value.  */
+-void
+-cpp_init_source_date_epoch (cpp_reader *pfile, time_t source_date_epoch)
+-{
+-  pfile->source_date_epoch = source_date_epoch; 
+-}
+-
+ /* Sanity-checks are dependent on command-line options, so it is
+    called as a subroutine of cpp_read_main_file ().  */
+ #if ENABLE_CHECKING
+Index: b/src/libcpp/internal.h
+===================================================================
+--- a/src/libcpp/internal.h
++++ b/src/libcpp/internal.h
+@@ -503,7 +503,8 @@ struct cpp_reader
+   const unsigned char *time;
+ 
+   /* Externally set timestamp to replace current date and time useful for
+-     reproducibility.  */
++     reproducibility.  It should be initialized to -2 (not yet set) and
++     set to -1 to disable it or to a non-negative value to enable it.  */
+   time_t source_date_epoch;
+ 
+   /* EOF token, and a token forcing paste avoidance.  */
+Index: b/src/libcpp/macro.c
+===================================================================
+--- a/src/libcpp/macro.c
++++ b/src/libcpp/macro.c
+@@ -351,9 +351,13 @@ _cpp_builtin_macro_text (cpp_reader *pfi
+ 	  struct tm *tb = NULL;
+ 
+ 	  /* Set a reproducible timestamp for __DATE__ and __TIME__ macro
+-	     usage if SOURCE_DATE_EPOCH is defined.  */
+-	  if (pfile->source_date_epoch != (time_t) -1)
+-	     tb = gmtime (&pfile->source_date_epoch);
++	     if SOURCE_DATE_EPOCH is defined.  */
++	  if (pfile->source_date_epoch == (time_t) -2
++	      && pfile->cb.get_source_date_epoch != NULL)
++	    pfile->source_date_epoch = pfile->cb.get_source_date_epoch (pfile);
++
++	  if (pfile->source_date_epoch >= (time_t) 0)
++	    tb = gmtime (&pfile->source_date_epoch);
+ 	  else
+ 	    {
+ 	      /* (time_t) -1 is a legitimate value for "number of seconds
--- gcc-5-5.4.0.orig/debian/patches/gcc-SOURCE_DATE_EPOCH-2.diff
+++ gcc-5-5.4.0/debian/patches/gcc-SOURCE_DATE_EPOCH-2.diff
@@ -0,0 +1,378 @@
+gcc/c-family/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* c-common.c (get_source_date_epoch): Rename to
+	cb_get_source_date_epoch.
+	* c-common.c (cb_get_source_date_epoch): Use a single generic erorr
+	message when the parsing fails.  Use error_at instead of fatal_error.
+	* c-common.h (get_source_date_epoch): Rename to
+	cb_get_source_date_epoch.
+	* c-common.h (cb_get_source_date_epoch): Prototype.
+	* c-common.h (MAX_SOURCE_DATE_EPOCH): Define.
+	* c-common.h (c_omp_region_type): Remove trailing comma.
+	* c-lex.c (init_c_lex): Set cb->get_source_date_epoch callback.
+	* c-lex.c (c_lex_with_flags): Remove initialization of
+	pfile->source_date_epoch.
+
+gcc/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* doc/cppenv.texi: Note that the `%s` in `date` is a non-standard
+	extension.
+	* gcc.c (driver_handle_option): Call set_source_date_epoch_envvar.
+	* gcc.c (set_source_date_epoch_envvar): New function, sets
+	the SOURCE_DATE_EPOCH environment variable to the current time.
+
+gcc/testsuite/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* gcc.dg/cpp/source_date_epoch-1.c: New file, test the proper
+	behaviour of the macros __DATE__ and __TIME__ when SOURCE_DATE_EPOCH
+	env var is set.
+	* gcc.dg/cpp/source_date_epoch-2.c: New file, test the error output
+	when parsing the SOURCE_DATE_EPOCH env var, and make sure it is only
+	shown once.
+	* lib/gcc-dg.exp (dg-set-compiler-env-var): New function, set env vars
+	during compilation.
+	* lib/gcc-dg.exp (restore-compiler-env-var): New function, restore env
+	vars set by dg-set-compiler-env-var.
+
+libcpp/ChangeLog:
+
+2016-05-13  Eduard Sanou  <dhole@openmailbox.org>
+
+	* include/cpplib.h (cpp_callbacks): Add get_source_date_epoch
+	callback.
+	* include/cpplib.h (cpp_init_source_date_epoch): Remove prototype.
+	* init.c (cpp_init_source_date_epoch): Remove function.
+	* init.c (cpp_create_reader): Initialize pfile->source_date_epoch.
+	* internal.h (cpp_reader): Extend comment about source_date_epoch.
+	* macro.c (_cpp_builtin_macro_text): Use get_source_date_epoch
+	callback only once, read pfile->source_date_epoch on future passes.
+	Check that get_source_date_epoch callback is not NULL.
+
+Index: b/src/gcc/c-family/c-common.c
+===================================================================
+--- a/src/gcc/c-family/c-common.c
++++ b/src/gcc/c-family/c-common.c
+@@ -12321,8 +12321,9 @@ pointer_to_zero_sized_aggr_p (tree t)
+ /* Read SOURCE_DATE_EPOCH from environment to have a deterministic
+    timestamp to replace embedded current dates to get reproducible
+    results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++
+ time_t
+-get_source_date_epoch ()
++cb_get_source_date_epoch (cpp_reader *pfile ATTRIBUTE_UNUSED)
+ {
+   char *source_date_epoch;
+   long long epoch;
+@@ -12334,19 +12335,14 @@ get_source_date_epoch ()
+ 
+   errno = 0;
+   epoch = strtoll (source_date_epoch, &endptr, 10);
+-  if ((errno == ERANGE && (epoch == LLONG_MAX || epoch == LLONG_MIN))
+-      || (errno != 0 && epoch == 0))
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "strtoll: %s\n", xstrerror(errno));
+-  if (endptr == source_date_epoch)
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "no digits were found: %s\n", endptr);
+-  if (*endptr != '\0')
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "trailing garbage: %s\n", endptr);
+-  if (epoch < 0)
+-    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
+-		 "value must be nonnegative: %lld \n", epoch);
++  if (errno != 0 || endptr == source_date_epoch || *endptr != '\0'
++      || epoch < 0 || epoch > MAX_SOURCE_DATE_EPOCH)
++    {
++      error_at (input_location, "environment variable SOURCE_DATE_EPOCH must "
++	        "expand to a non-negative integer less than or equal to %wd",
++		MAX_SOURCE_DATE_EPOCH);
++      return (time_t) -1;
++    }
+ 
+   return (time_t) epoch;
+ }
+Index: b/src/gcc/c-family/c-common.h
+===================================================================
+--- a/src/gcc/c-family/c-common.h
++++ b/src/gcc/c-family/c-common.h
+@@ -1063,6 +1063,16 @@ extern vec<tree, va_gc> *make_tree_vecto
+    c_register_builtin_type.  */
+ extern GTY(()) tree registered_builtin_types;
+ 
++/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
++   timestamp to replace embedded current dates to get reproducible
++   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++extern time_t cb_get_source_date_epoch (cpp_reader *pfile);
++
++/* The value (as a unix timestamp) corresponds to date
++   "Dec 31 9999 23:59:59 UTC", which is the latest date that __DATE__ and
++   __TIME__ can store.  */
++#define MAX_SOURCE_DATE_EPOCH HOST_WIDE_INT_C (253402300799)
++
+ /* In c-gimplify.c  */
+ extern void c_genericize (tree);
+ extern int c_gimplify_expr (tree *, gimple_seq *, gimple_seq *);
+@@ -1438,9 +1448,4 @@ extern tree cilk_for_number_of_iteration
+ extern bool check_no_cilk (tree, const char *, const char *,
+ 		           location_t loc = UNKNOWN_LOCATION);
+ 
+-/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
+-   timestamp to replace embedded current dates to get reproducible
+-   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
+-extern time_t get_source_date_epoch (void);
+-
+ #endif /* ! GCC_C_COMMON_H */
+Index: b/src/gcc/c-family/c-lex.c
+===================================================================
+--- a/src/gcc/c-family/c-lex.c
++++ b/src/gcc/c-family/c-lex.c
+@@ -97,6 +97,7 @@ init_c_lex (void)
+   cb->valid_pch = c_common_valid_pch;
+   cb->read_pch = c_common_read_pch;
+   cb->has_attribute = c_common_has_attribute;
++  cb->get_source_date_epoch = cb_get_source_date_epoch;
+ 
+   /* Set the debug callbacks if we can use them.  */
+   if ((debug_info_level == DINFO_LEVEL_VERBOSE
+@@ -402,9 +403,6 @@ c_lex_with_flags (tree *value, location_
+   enum cpp_ttype type;
+   unsigned char add_flags = 0;
+   enum overflow_type overflow = OT_NONE;
+-  time_t source_date_epoch = get_source_date_epoch ();
+-
+-  cpp_init_source_date_epoch (parse_in, source_date_epoch);
+ 
+   timevar_push (TV_CPP);
+  retry:
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -3374,6 +3374,29 @@ save_switch (const char *opt, size_t n_a
+   n_switches++;
+ }
+ 
++/* Set the SOURCE_DATE_EPOCH environment variable to the current time if it is
++   not set already.  */
++
++static void
++set_source_date_epoch_envvar ()
++{
++  /* Array size is 21 = ceil(log_10(2^64)) + 1 to hold string representations
++     of 64 bit integers.  */
++  char source_date_epoch[21];
++  time_t tt;
++
++  errno = 0;
++  tt = time (NULL);
++  if (tt < (time_t) 0 || errno != 0)
++    tt = (time_t) 0;
++
++  snprintf (source_date_epoch, 21, "%llu", (unsigned long long) tt);
++  /* Using setenv instead of xputenv because we want the variable to remain
++     after finalizing so that it's still set in the second run when using
++     -fcompare-debug.  */
++  setenv ("SOURCE_DATE_EPOCH", source_date_epoch, 0);
++}
++
+ /* Handle an option DECODED that is unknown to the option-processing
+    machinery.  */
+ 
+@@ -3674,6 +3697,7 @@ driver_handle_option (struct gcc_options
+       else
+ 	compare_debug_opt = arg;
+       save_switch (compare_debug_replacement_opt, 0, NULL, validated, true);
++      set_source_date_epoch_envvar ();
+       return true;
+ 
+     case OPT_fdiagnostics_color_:
+Index: b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-1.c
+@@ -0,0 +1,11 @@
++/* { dg-do run } */
++/* { dg-set-compiler-env-var SOURCE_DATE_EPOCH "630333296" } */
++
++int
++main()
++{
++  if (__builtin_strcmp (__DATE__, "Dec 22 1989") != 0
++      || __builtin_strcmp (__TIME__, "12:34:56") != 0)
++    __builtin_abort ();
++  return 0;
++}
+Index: b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/cpp/source_date_epoch-2.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-set-compiler-env-var SOURCE_DATE_EPOCH "AAA" } */
++
++/* Make sure that SOURCE_DATE_EPOCH is only parsed once */
++
++int
++main(void)
++{
++  __builtin_printf ("%s %s\n", __DATE__, __TIME__); /* { dg-error "SOURCE_DATE_EPOCH must expand" } */
++  __builtin_printf ("%s %s\n", __DATE__, __TIME__);
++  return 0;
++}
+Index: b/src/gcc/testsuite/lib/gcc-dg.exp
+===================================================================
+--- a/src/gcc/testsuite/lib/gcc-dg.exp
++++ b/src/gcc/testsuite/lib/gcc-dg.exp
+@@ -324,6 +324,38 @@ proc restore-target-env-var { } {
+     }
+ }
+ 
++proc dg-set-compiler-env-var { args } {
++    global set_compiler_env_var
++    global saved_compiler_env_var
++    if { [llength $args] != 3 } {
++	error "dg-set-compiler-env-var: need two arguments"
++	return
++    }
++    set var [lindex $args 1]
++    set value [lindex $args 2]
++    if [info exists ::env($var)] {
++      lappend saved_compiler_env_var [list $var 1 $::env($var)]
++    } else {
++      lappend saved_compiler_env_var [list $var 0]
++    }
++    setenv $var $value
++    lappend set_compiler_env_var [list $var $value]
++}
++
++proc restore-compiler-env-var { } {
++    global saved_compiler_env_var
++    for { set env_vari [llength $saved_compiler_env_var] } {
++          [incr env_vari -1] >= 0 } {} {
++	set env_var [lindex $saved_compiler_env_var $env_vari]
++	set var [lindex $env_var 0]
++	if [lindex $env_var 1] {
++	    setenv $var [lindex $env_var 2]
++	} else {
++	    unsetenv $var
++	}
++    }
++}
++
+ # Utility routines.
+ 
+ #
+@@ -760,6 +792,8 @@ if { [info procs saved-dg-test] == [list
+ 	global shouldfail
+ 	global testname_with_flags
+ 	global set_target_env_var
++	global set_compiler_env_var
++	global saved_compiler_env_var
+ 
+ 	if { [ catch { eval saved-dg-test $args } errmsg ] } {
+ 	    set saved_info $errorInfo
+@@ -785,6 +819,11 @@ if { [info procs saved-dg-test] == [list
+ 	if [info exists set_target_env_var] {
+ 	    unset set_target_env_var
+ 	}
++	if [info exists set_compiler_env_var] {
++	    restore-compiler-env-var
++	    unset set_compiler_env_var
++	    unset saved_compiler_env_var
++	}
+ 	unset_timeout_vars
+ 	if [info exists compiler_conditional_xfail_data] {
+ 	    unset compiler_conditional_xfail_data
+Index: b/src/libcpp/include/cpplib.h
+===================================================================
+--- a/src/libcpp/include/cpplib.h
++++ b/src/libcpp/include/cpplib.h
+@@ -585,6 +585,9 @@ struct cpp_callbacks
+ 
+   /* Callback that can change a user builtin into normal macro.  */
+   bool (*user_builtin_macro) (cpp_reader *, cpp_hashnode *);
++
++  /* Callback to parse SOURCE_DATE_EPOCH from environment.  */
++  time_t (*get_source_date_epoch) (cpp_reader *);
+ };
+ 
+ #ifdef VMS
+@@ -775,9 +778,6 @@ extern void cpp_init_special_builtins (c
+ /* Set up built-ins like __FILE__.  */
+ extern void cpp_init_builtins (cpp_reader *, int);
+ 
+-/* Initialize the source_date_epoch value.  */
+-extern void cpp_init_source_date_epoch (cpp_reader *, time_t);
+-
+ /* This is called after options have been parsed, and partially
+    processed.  */
+ extern void cpp_post_options (cpp_reader *);
+Index: b/src/libcpp/init.c
+===================================================================
+--- a/src/libcpp/init.c
++++ b/src/libcpp/init.c
+@@ -254,6 +254,9 @@ cpp_create_reader (enum c_lang lang, cpp
+   /* Do not force token locations by default.  */
+   pfile->forced_token_location_p = NULL;
+ 
++  /* Initialize source_date_epoch to -2 (not yet set).  */
++  pfile->source_date_epoch = (time_t) -2;
++
+   /* The expression parser stack.  */
+   _cpp_expand_op_stack (pfile);
+ 
+@@ -530,13 +533,6 @@ cpp_init_builtins (cpp_reader *pfile, in
+     _cpp_define_builtin (pfile, "__OBJC__ 1");
+ }
+ 
+-/* Initialize the source_date_epoch value.  */
+-void
+-cpp_init_source_date_epoch (cpp_reader *pfile, time_t source_date_epoch)
+-{
+-  pfile->source_date_epoch = source_date_epoch; 
+-}
+-
+ /* Sanity-checks are dependent on command-line options, so it is
+    called as a subroutine of cpp_read_main_file ().  */
+ #if ENABLE_CHECKING
+Index: b/src/libcpp/internal.h
+===================================================================
+--- a/src/libcpp/internal.h
++++ b/src/libcpp/internal.h
+@@ -503,7 +503,8 @@ struct cpp_reader
+   const unsigned char *time;
+ 
+   /* Externally set timestamp to replace current date and time useful for
+-     reproducibility.  */
++     reproducibility.  It should be initialized to -2 (not yet set) and
++     set to -1 to disable it or to a non-negative value to enable it.  */
+   time_t source_date_epoch;
+ 
+   /* EOF token, and a token forcing paste avoidance.  */
+Index: b/src/libcpp/macro.c
+===================================================================
+--- a/src/libcpp/macro.c
++++ b/src/libcpp/macro.c
+@@ -351,9 +351,13 @@ _cpp_builtin_macro_text (cpp_reader *pfi
+ 	  struct tm *tb = NULL;
+ 
+ 	  /* Set a reproducible timestamp for __DATE__ and __TIME__ macro
+-	     usage if SOURCE_DATE_EPOCH is defined.  */
+-	  if (pfile->source_date_epoch != (time_t) -1)
+-	     tb = gmtime (&pfile->source_date_epoch);
++	     if SOURCE_DATE_EPOCH is defined.  */
++	  if (pfile->source_date_epoch == (time_t) -2
++	      && pfile->cb.get_source_date_epoch != NULL)
++	    pfile->source_date_epoch = pfile->cb.get_source_date_epoch (pfile);
++
++	  if (pfile->source_date_epoch >= (time_t) 0)
++	    tb = gmtime (&pfile->source_date_epoch);
+ 	  else
+ 	    {
+ 	      /* (time_t) -1 is a legitimate value for "number of seconds
--- gcc-5-5.4.0.orig/debian/patches/gcc-SOURCE_DATE_EPOCH-doc.diff
+++ gcc-5-5.4.0/debian/patches/gcc-SOURCE_DATE_EPOCH-doc.diff
@@ -0,0 +1,33 @@
+# DP: Allow embedded timestamps by C/C++ macros to be set externally (docs)
+
+gcc/ChangeLog:
+
+2016-04-27  Eduard Sanou  <dhole@openmailbox.org>
+	    Matthias Klose  <doko@debian.org>
+
+	* doc/cppenv.texi: Document SOURCE_DATE_EPOCH environment variable.
+
+--- a/src/gcc/doc/cppenv.texi
++++ b/src/gcc/doc/cppenv.texi
+@@ -79,4 +79,21 @@
+ @ifclear cppmanual
+ @xref{Preprocessor Options}.
+ @end ifclear
++
++@item SOURCE_DATE_EPOCH
++
++If this variable is set, its value specifies a UNIX timestamp to be
++used in replacement of the current date and time in the @code{__DATE__}
++and @code{__TIME__} macros, so that the embedded timestamps become
++reproducible.
++
++The value of @env{SOURCE_DATE_EPOCH} must be a UNIX timestamp,
++defined as the number of seconds (excluding leap seconds) since
++01 Jan 1970 00:00:00 represented in ASCII, identical to the output of
++@samp{@command{date +%s}}.
++
++The value should be a known timestamp such as the last modification
++time of the source or package and it should be set by the build
++process.
++
+ @end vtable
--- gcc-5-5.4.0.orig/debian/patches/gcc-SOURCE_DATE_EPOCH.diff
+++ gcc-5-5.4.0/debian/patches/gcc-SOURCE_DATE_EPOCH.diff
@@ -0,0 +1,184 @@
+# DP: Allow embedded timestamps by C/C++ macros to be set externally
+
+gcc/c-family/ChangeLog:
+
+2016-04-27  Eduard Sanou  <dhole@openmailbox.org>
+	    Matthias Klose  <doko@debian.org>
+
+	* c-common.c (get_source_date_epoch): New function, gets the environment
+	variable SOURCE_DATE_EPOCH and parses it as long long with error 
+	handling.
+	* c-common.h (get_source_date_epoch): Prototype.
+	* c-lex.c (c_lex_with_flags): set parse_in->source_date_epoch.
+
+gcc/ChangeLog:
+
+2016-04-27  Eduard Sanou  <dhole@openmailbox.org>
+	    Matthias Klose  <doko@debian.org>
+
+	* doc/cppenv.texi: Document SOURCE_DATE_EPOCH environment variable.
+
+libcpp/ChangeLog:
+
+2016-04-27  Eduard Sanou  <dhole@openmailbox.org>
+	    Matthias Klose  <doko@debian.org>
+
+	* include/cpplib.h (cpp_init_source_date_epoch): Prototype.
+	* init.c (cpp_init_source_date_epoch): New function.
+	* internal.h: Added source_date_epoch variable to struct
+	cpp_reader to store a reproducible date.
+	* macro.c (_cpp_builtin_macro_text): Set pfile->date timestamp from 
+	pfile->source_date_epoch instead of localtime if source_date_epoch is 
+	set, to be used for __DATE__ and __TIME__ macros to help reproducible 
+	builds.
+
+Index: b/src/gcc/c-family/c-common.c
+===================================================================
+--- a/src/gcc/c-family/c-common.c
++++ b/src/gcc/c-family/c-common.c
+@@ -12318,4 +12318,37 @@ pointer_to_zero_sized_aggr_p (tree t)
+   return (TYPE_SIZE (t) && integer_zerop (TYPE_SIZE (t)));
+ }
+ 
++/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
++   timestamp to replace embedded current dates to get reproducible
++   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++time_t
++get_source_date_epoch ()
++{
++  char *source_date_epoch;
++  long long epoch;
++  char *endptr;
++
++  source_date_epoch = getenv ("SOURCE_DATE_EPOCH");
++  if (!source_date_epoch)
++    return (time_t) -1;
++
++  errno = 0;
++  epoch = strtoll (source_date_epoch, &endptr, 10);
++  if ((errno == ERANGE && (epoch == LLONG_MAX || epoch == LLONG_MIN))
++      || (errno != 0 && epoch == 0))
++    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
++		 "strtoll: %s\n", xstrerror(errno));
++  if (endptr == source_date_epoch)
++    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
++		 "no digits were found: %s\n", endptr);
++  if (*endptr != '\0')
++    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
++		 "trailing garbage: %s\n", endptr);
++  if (epoch < 0)
++    fatal_error (UNKNOWN_LOCATION, "environment variable $SOURCE_DATE_EPOCH: "
++		 "value must be nonnegative: %lld \n", epoch);
++
++  return (time_t) epoch;
++}
++
+ #include "gt-c-family-c-common.h"
+Index: b/src/gcc/c-family/c-common.h
+===================================================================
+--- a/src/gcc/c-family/c-common.h
++++ b/src/gcc/c-family/c-common.h
+@@ -1437,4 +1437,10 @@ extern bool contains_cilk_spawn_stmt (tr
+ extern tree cilk_for_number_of_iterations (tree);
+ extern bool check_no_cilk (tree, const char *, const char *,
+ 		           location_t loc = UNKNOWN_LOCATION);
++
++/* Read SOURCE_DATE_EPOCH from environment to have a deterministic
++   timestamp to replace embedded current dates to get reproducible
++   results.  Returns -1 if SOURCE_DATE_EPOCH is not defined.  */
++extern time_t get_source_date_epoch (void);
++
+ #endif /* ! GCC_C_COMMON_H */
+Index: b/src/gcc/c-family/c-lex.c
+===================================================================
+--- a/src/gcc/c-family/c-lex.c
++++ b/src/gcc/c-family/c-lex.c
+@@ -402,6 +402,9 @@ c_lex_with_flags (tree *value, location_
+   enum cpp_ttype type;
+   unsigned char add_flags = 0;
+   enum overflow_type overflow = OT_NONE;
++  time_t source_date_epoch = get_source_date_epoch ();
++
++  cpp_init_source_date_epoch (parse_in, source_date_epoch);
+ 
+   timevar_push (TV_CPP);
+  retry:
+Index: b/src/libcpp/include/cpplib.h
+===================================================================
+--- a/src/libcpp/include/cpplib.h
++++ b/src/libcpp/include/cpplib.h
+@@ -775,6 +775,9 @@ extern void cpp_init_special_builtins (c
+ /* Set up built-ins like __FILE__.  */
+ extern void cpp_init_builtins (cpp_reader *, int);
+ 
++/* Initialize the source_date_epoch value.  */
++extern void cpp_init_source_date_epoch (cpp_reader *, time_t);
++
+ /* This is called after options have been parsed, and partially
+    processed.  */
+ extern void cpp_post_options (cpp_reader *);
+Index: b/src/libcpp/init.c
+===================================================================
+--- a/src/libcpp/init.c
++++ b/src/libcpp/init.c
+@@ -530,6 +530,13 @@ cpp_init_builtins (cpp_reader *pfile, in
+     _cpp_define_builtin (pfile, "__OBJC__ 1");
+ }
+ 
++/* Initialize the source_date_epoch value.  */
++void
++cpp_init_source_date_epoch (cpp_reader *pfile, time_t source_date_epoch)
++{
++  pfile->source_date_epoch = source_date_epoch; 
++}
++
+ /* Sanity-checks are dependent on command-line options, so it is
+    called as a subroutine of cpp_read_main_file ().  */
+ #if ENABLE_CHECKING
+Index: b/src/libcpp/internal.h
+===================================================================
+--- a/src/libcpp/internal.h
++++ b/src/libcpp/internal.h
+@@ -502,6 +502,10 @@ struct cpp_reader
+   const unsigned char *date;
+   const unsigned char *time;
+ 
++  /* Externally set timestamp to replace current date and time useful for
++     reproducibility.  */
++  time_t source_date_epoch;
++
+   /* EOF token, and a token forcing paste avoidance.  */
+   cpp_token avoid_paste;
+   cpp_token eof;
+Index: b/src/libcpp/macro.c
+===================================================================
+--- a/src/libcpp/macro.c
++++ b/src/libcpp/macro.c
+@@ -350,13 +350,20 @@ _cpp_builtin_macro_text (cpp_reader *pfi
+ 	  time_t tt;
+ 	  struct tm *tb = NULL;
+ 
+-	  /* (time_t) -1 is a legitimate value for "number of seconds
+-	     since the Epoch", so we have to do a little dance to
+-	     distinguish that from a genuine error.  */
+-	  errno = 0;
+-	  tt = time(NULL);
+-	  if (tt != (time_t)-1 || errno == 0)
+-	    tb = localtime (&tt);
++	  /* Set a reproducible timestamp for __DATE__ and __TIME__ macro
++	     usage if SOURCE_DATE_EPOCH is defined.  */
++	  if (pfile->source_date_epoch != (time_t) -1)
++	     tb = gmtime (&pfile->source_date_epoch);
++	  else
++	    {
++	      /* (time_t) -1 is a legitimate value for "number of seconds
++		 since the Epoch", so we have to do a little dance to
++		 distinguish that from a genuine error.  */
++	      errno = 0;
++	      tt = time (NULL);
++	      if (tt != (time_t)-1 || errno == 0)
++		tb = localtime (&tt);
++	    }
+ 
+ 	  if (tb)
+ 	    {
--- gcc-5-5.4.0.orig/debian/patches/gcc-as-needed.diff
+++ gcc-5-5.4.0/debian/patches/gcc-as-needed.diff
@@ -0,0 +1,208 @@
+# DP: On linux targets pass --as-needed by default to the linker, but always
+# DP: link the sanitizer libraries with --no-as-needed.
+
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -568,8 +568,11 @@ proper position among the other output f
+ #ifdef LIBTSAN_EARLY_SPEC
+ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS
+ #elif defined(HAVE_LD_STATIC_DYNAMIC)
+-#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION \
+-		     "} -ltsan %{static-libtsan:" LD_DYNAMIC_OPTION "}" \
++#define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \
++		     " %{!static-libtsan:%{!fuse-ld=gold:--push-state }--no-as-needed}" \
++		     " -ltsan " \
++		     " %{static-libtsan:" LD_DYNAMIC_OPTION "}" \
++		     " %{!static-libtsan:%{fuse-ld=gold:--as-needed;:--pop-state}}" \
+ 		     STATIC_LIBTSAN_LIBS
+ #else
+ #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS
+--- a/src/gcc/config/gnu-user.h
++++ b/src/gcc/config/gnu-user.h
+@@ -124,13 +124,13 @@
+ #define LIBASAN_EARLY_SPEC "%{!shared:libasan_preinit%O%s} " \
+   "%{static-libasan:%{!shared:" \
+   LD_STATIC_OPTION " --whole-archive -lasan --no-whole-archive " \
+-  LD_DYNAMIC_OPTION "}}%{!static-libasan:-lasan}"
++  LD_DYNAMIC_OPTION "}}%{!static-libasan:%{!fuse-ld=gold:--push-state} --no-as-needed -lasan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #undef LIBTSAN_EARLY_SPEC
+ #define LIBTSAN_EARLY_SPEC "%{static-libtsan:%{!shared:" \
+   LD_STATIC_OPTION " --whole-archive -ltsan --no-whole-archive " \
+-  LD_DYNAMIC_OPTION "}}%{!static-libtsan:-ltsan}"
++  LD_DYNAMIC_OPTION "}}%{!static-libtsan:%{!fuse-ld=gold:--push-state} --no-as-needed -ltsan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #undef LIBLSAN_EARLY_SPEC
+ #define LIBLSAN_EARLY_SPEC "%{static-liblsan:%{!shared:" \
+   LD_STATIC_OPTION " --whole-archive -llsan --no-whole-archive " \
+-  LD_DYNAMIC_OPTION "}}%{!static-liblsan:-llsan}"
++  LD_DYNAMIC_OPTION "}}%{!static-liblsan:%{!fuse-ld=gold:--push-state} --no-as-needed -llsan %{fuse-ld=gold:--as-needed;:--pop-state}}"
+ #endif
+Index: b/src/gcc/config/aarch64/aarch64-linux.h
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64-linux.h
++++ b/src/gcc/config/aarch64/aarch64-linux.h
+@@ -33,6 +33,7 @@
+ 
+ #define LINUX_TARGET_LINK_SPEC  "%{h*}		\
+    --hash-style=gnu				\
++   --as-needed					\
+    %{static:-Bstatic}				\
+    %{shared:-shared}				\
+    %{symbolic:-Bsymbolic}			\
+Index: b/src/gcc/config/ia64/linux.h
+===================================================================
+--- a/src/gcc/config/ia64/linux.h
++++ b/src/gcc/config/ia64/linux.h
+@@ -58,7 +58,7 @@ do {						\
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
+ 
+ #undef LINK_SPEC
+-#define LINK_SPEC " --hash-style=gnu \
++#define LINK_SPEC " --hash-style=gnu --as-needed \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/sparc/linux.h
+===================================================================
+--- a/src/gcc/config/sparc/linux.h
++++ b/src/gcc/config/sparc/linux.h
+@@ -86,7 +86,7 @@ extern const char *host_detect_local_cpu
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+ 
+ #undef  LINK_SPEC
+-#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \
++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu --as-needed %{shared:-shared} \
+   %{!mno-relax:%{!r:-relax}} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/s390/linux.h
+===================================================================
+--- a/src/gcc/config/s390/linux.h
++++ b/src/gcc/config/s390/linux.h
+@@ -65,7 +65,7 @@ along with GCC; see the file COPYING3.
+ 
+ #undef  LINK_SPEC
+ #define LINK_SPEC \
+-  "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \
++  "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu --as-needed \
+    %{shared:-shared} \
+    %{!shared: \
+       %{static:-static} \
+Index: b/src/gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -407,11 +407,11 @@ extern int dot_symbols;
+ 					   " -m elf64ppc")
+ #endif
+ 
+-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu --as-needed %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}"
+ 
+-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu --as-needed %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}"
+ 
+Index: b/src/gcc/config/rs6000/sysv4.h
+===================================================================
+--- a/src/gcc/config/rs6000/sysv4.h
++++ b/src/gcc/config/rs6000/sysv4.h
+@@ -769,7 +769,7 @@ ENDIAN_SELECT(" -mbig", " -mlittle", DEF
+ #define GNU_USER_DYNAMIC_LINKER \
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER)
+ 
+-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu --as-needed %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
+ 
+Index: b/src/gcc/config/i386/gnu-user64.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user64.h
++++ b/src/gcc/config/i386/gnu-user64.h
+@@ -57,6 +57,7 @@ see the files COPYING3 and COPYING.RUNTI
+                    %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \
+                    %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \
+   --hash-style=gnu \
++  --as-needed \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/i386/gnu-user.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user.h
++++ b/src/gcc/config/i386/gnu-user.h
+@@ -74,7 +74,7 @@ along with GCC; see the file COPYING3.
+   { "link_emulation", GNU_USER_LINK_EMULATION },\
+   { "dynamic_linker", GNU_USER_DYNAMIC_LINKER }
+ 
+-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \
++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu --as-needed %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+       %{rdynamic:-export-dynamic} \
+Index: b/src/gcc/config/alpha/linux-elf.h
+===================================================================
+--- a/src/gcc/config/alpha/linux-elf.h
++++ b/src/gcc/config/alpha/linux-elf.h
+@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3.
+ 
+ #define ELF_DYNAMIC_LINKER	GNU_USER_DYNAMIC_LINKER
+ 
+-#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax}	\
++#define LINK_SPEC "-m elf64alpha --hash-style=gnu --as-needed %{G*} %{relax:-relax}	\
+   %{O*:-O3} %{!O*:-O1}						\
+   %{shared:-shared}						\
+   %{!shared:							\
+Index: b/src/gcc/config/arm/linux-elf.h
+===================================================================
+--- a/src/gcc/config/arm/linux-elf.h
++++ b/src/gcc/config/arm/linux-elf.h
+@@ -73,6 +73,7 @@
+      %{!shared:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
+    -X \
+    --hash-style=gnu \
++   --as-needed \
+    %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ 
+Index: b/src/gcc/config/mips/gnu-user.h
+===================================================================
+--- a/src/gcc/config/mips/gnu-user.h
++++ b/src/gcc/config/mips/gnu-user.h
+@@ -55,6 +55,7 @@ along with GCC; see the file COPYING3.
+ #undef GNU_USER_TARGET_LINK_SPEC
+ #define GNU_USER_TARGET_LINK_SPEC "\
+   %{G*} %{EB} %{EL} %{mips*} %{shared} \
++ -as-needed \
+   %{!shared: \
+     %{!static: \
+       %{rdynamic:-export-dynamic} \
+Index: b/src/libjava/Makefile.am
+===================================================================
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -628,7 +628,7 @@ libgcj_bc.la: $(libgcj_bc_la_OBJECTS) $(
+ 	rm .libs/libgcj_bc.so; \
+ 	mv .libs/libgcj_bc.so.1.0.0 .libs/libgcj_bc.so; \
+ 	$(libgcj_bc_dummy_LINK) -xc /dev/null -Wl,-soname,libgcj_bc.so.1 \
+-	-o .libs/libgcj_bc.so.1.0.0 -lgcj || exit; \
++	-o .libs/libgcj_bc.so.1.0.0 -Wl,--no-as-needed -lgcj || exit; \
+ 	rm .libs/libgcj_bc.so.1; \
+ 	$(LN_S) libgcj_bc.so.1.0.0 .libs/libgcj_bc.so.1
+ 
+Index: b/src/libjava/Makefile.in
+===================================================================
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -10600,7 +10600,7 @@ libgcj_bc.la: $(libgcj_bc_la_OBJECTS) $(
+ 	rm .libs/libgcj_bc.so; \
+ 	mv .libs/libgcj_bc.so.1.0.0 .libs/libgcj_bc.so; \
+ 	$(libgcj_bc_dummy_LINK) -xc /dev/null -Wl,-soname,libgcj_bc.so.1 \
+-	-o .libs/libgcj_bc.so.1.0.0 -lgcj || exit; \
++	-o .libs/libgcj_bc.so.1.0.0 -Wl,--no-as-needed -lgcj || exit; \
+ 	rm .libs/libgcj_bc.so.1; \
+ 	$(LN_S) libgcj_bc.so.1.0.0 .libs/libgcj_bc.so.1
+ 
--- gcc-5-5.4.0.orig/debian/patches/gcc-auto-build.diff
+++ gcc-5-5.4.0/debian/patches/gcc-auto-build.diff
@@ -0,0 +1,15 @@
+# DP: Fix cross building a native compiler.
+
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -1628,7 +1628,7 @@ else
+ 	# Clearing GMPINC is necessary to prevent host headers being
+ 	# used by the build compiler.  Defining GENERATOR_FILE stops
+ 	# system.h from including gmp.h.
+-	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
++	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD} -DGENERATOR_FILE" \
+ 	CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \
+ 	LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \
+ 	GMPINC="" CPPFLAGS="${CPPFLAGS} -DGENERATOR_FILE" \
--- gcc-5-5.4.0.orig/debian/patches/gcc-base-version.diff
+++ gcc-5-5.4.0/debian/patches/gcc-base-version.diff
@@ -0,0 +1,228 @@
+# DP: Set base version to 5, introduce full version 5.x.y.
+
+Index: b/src/gcc/BASE-VER
+===================================================================
+--- a/src/gcc/BASE-VER
++++ b/src/gcc/BASE-VER
+@@ -1 +1 @@
+-5.4.0
++5
+Index: b/src/gcc/FULL-VER
+===================================================================
+--- /dev/null
++++ b/src/gcc/FULL-VER
+@@ -0,0 +1 @@
++5.4.0
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -810,11 +810,13 @@ GTM_H     = tm.h      $(tm_file_list) in
+ TM_H      = $(GTM_H) insn-flags.h $(OPTIONS_H)
+ 
+ # Variables for version information.
+-BASEVER     := $(srcdir)/BASE-VER  # 4.x.y
++FULLVER     := $(srcdir)/FULL-VER  # 5.x.y
++BASEVER     := $(srcdir)/BASE-VER  # 5.x
+ DEVPHASE    := $(srcdir)/DEV-PHASE # experimental, prerelease, ""
+ DATESTAMP   := $(srcdir)/DATESTAMP # YYYYMMDD or empty
+ REVISION    := $(srcdir)/REVISION  # [BRANCH revision XXXXXX]
+ 
++FULLVER_c   := $(shell cat $(FULLVER))
+ BASEVER_c   := $(shell cat $(BASEVER))
+ DEVPHASE_c  := $(shell cat $(DEVPHASE))
+ DATESTAMP_c := $(shell cat $(DATESTAMP))
+@@ -839,6 +841,7 @@ PATCHLEVEL_c := \
+ # immediately after the comma in the $(if ...) constructs is
+ # significant - do not remove it.
+ BASEVER_s   := "\"$(BASEVER_c)\""
++FULLVER_s   := "\"$(FULLVER_c)\""
+ DEVPHASE_s  := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\""
+ DATESTAMP_s := \
+   "\"$(if $(DEVPHASE_c)$(filter-out 0,$(PATCHLEVEL_c)), $(DATESTAMP_c))\""
+@@ -1969,8 +1972,8 @@ default-c.o: config/default-c.c
+ 
+ # Files used by all variants of C and some other languages.
+ 
+-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s)
+-prefix.o: $(BASEVER)
++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s)
++prefix.o: $(FULLVER)
+ 
+ # Language-independent files.
+ 
+@@ -1978,7 +1981,8 @@ DRIVER_DEFINES = \
+   -DSTANDARD_STARTFILE_PREFIX=\"$(unlibsubdir)/\" \
+   -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
+   -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc/\" \
+-  -DDEFAULT_TARGET_VERSION=\"$(version)\" \
++  -DDEFAULT_TARGET_VERSION=\"$(BASEVER_c)\" \
++  -DDEFAULT_TARGET_FULL_VERSION=\"$(FULLVER_c)\" \
+   -DDEFAULT_REAL_TARGET_MACHINE=\"$(real_target_noncanonical)\" \
+   -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" \
+   -DSTANDARD_BINDIR_PREFIX=\"$(bindir)/\" \
+@@ -2028,20 +2032,20 @@ s-options-h: optionlist $(srcdir)/opt-fu
+ 
+ dumpvers: dumpvers.c
+ 
+-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \
++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \
+ 	-DREVISION=$(REVISION_s) \
+ 	-DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \
+ 	-DBUGURL=$(BUGURL_s)
+-version.o: $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE)
++version.o: $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE)
+ 
+ # lto-compress.o needs $(ZLIBINC) added to the include flags.
+ CFLAGS-lto-compress.o += $(ZLIBINC)
+ 
+ bversion.h: s-bversion; @true
+-s-bversion: BASE-VER
+-	echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h
+-	echo "#define BUILDING_GCC_MINOR `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h
+-	echo "#define BUILDING_GCC_PATCHLEVEL `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h
++s-bversion: FULL-VER
++	echo "#define BUILDING_GCC_MAJOR `echo $(FULLVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h
++	echo "#define BUILDING_GCC_MINOR `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h
++	echo "#define BUILDING_GCC_PATCHLEVEL `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h
+ 	echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h
+ 	$(STAMP) s-bversion
+ 
+@@ -2388,9 +2392,9 @@ build/%.o :  # dependencies provided by
+ ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs
+ ## several C macro definitions, just like version.o
+ build/version.o:  version.c version.h \
+-                  $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE)
++                  $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE)
+ 	$(COMPILER_FOR_BUILD) -c $(BUILD_COMPILERFLAGS) $(BUILD_CPPFLAGS) \
+-	-DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \
++	-DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \
+ 	-DREVISION=$(REVISION_s) \
+ 	-DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \
+ 	-DBUGURL=$(BUGURL_s) -o $@ $<
+@@ -2601,8 +2605,8 @@ PREPROCESSOR_DEFINES = \
+   -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
+   @TARGET_SYSTEM_ROOT_DEFINE@
+ 
+-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s)
+-cppbuiltin.o: $(BASEVER)
++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s)
++cppbuiltin.o: $(FULLVER)
+ 
+ CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES)
+ 
+@@ -2618,8 +2622,8 @@ build/gcov-iov$(build_exeext): build/gco
+ 		build/gcov-iov.o -o $@
+ 
+ gcov-iov.h: s-iov
+-s-iov: build/gcov-iov$(build_exeext) $(BASEVER) $(DEVPHASE)
+-	build/gcov-iov$(build_exeext) '$(BASEVER_c)' '$(DEVPHASE_c)' \
++s-iov: build/gcov-iov$(build_exeext) $(FULLVER) $(DEVPHASE)
++	build/gcov-iov$(build_exeext) '$(FULLVER_c)' '$(DEVPHASE_c)' \
+ 	    > tmp-gcov-iov.h
+ 	$(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h
+ 	$(STAMP) s-iov
+@@ -2896,8 +2900,8 @@ TEXI_GCCINSTALL_FILES = install.texi ins
+ TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi
+ 
+ # gcc-vers.texi is generated from the version files.
+-gcc-vers.texi: $(BASEVER) $(DEVPHASE)
+-	(echo "@set version-GCC $(BASEVER_c)"; \
++gcc-vers.texi: $(FULLVER) $(DEVPHASE)
++	(echo "@set version-GCC $(FULLVER_c)"; \
+ 	 if [ "$(DEVPHASE_c)" = "experimental" ]; \
+ 	 then echo "@set DEVELOPMENT"; \
+ 	 else echo "@clear DEVELOPMENT"; \
+Index: b/src/libjava/testsuite/lib/libjava.exp
+===================================================================
+--- a/src/libjava/testsuite/lib/libjava.exp
++++ b/src/libjava/testsuite/lib/libjava.exp
+@@ -179,7 +179,8 @@ proc libjava_init { args } {
+ 
+     set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"]
+     regexp " version \[^\n\r\]*" $text version
+-    set libjava_version [lindex $version 1]
++    # FIXME: Still needed?
++    #set libjava_version 5
+ 
+     verbose "version: $libjava_version"
+ 
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -152,7 +152,8 @@ static const char *compiler_version;
+ 
+ /* The target version.  */
+ 
+-static const char *const spec_version = DEFAULT_TARGET_VERSION;
++static const char *const base_version = DEFAULT_TARGET_VERSION;
++static const char *const spec_version = DEFAULT_TARGET_FULL_VERSION;
+ 
+ /* The target machine.  */
+ 
+@@ -4273,7 +4274,7 @@ process_command (unsigned int decoded_op
+      running, or, if that is not available, the configured prefix.  */
+   tooldir_prefix
+     = concat (gcc_exec_prefix ? gcc_exec_prefix : standard_exec_prefix,
+-	      spec_host_machine, dir_separator_str, spec_version,
++	      spec_host_machine, dir_separator_str, base_version,
+ 	      accel_dir_suffix, dir_separator_str, tooldir_prefix2, NULL);
+   free (tooldir_prefix2);
+ 
+@@ -7097,7 +7098,7 @@ driver::set_up_specs () const
+ 
+   /* Read specs from a file if there is one.  */
+ 
+-  machine_suffix = concat (spec_host_machine, dir_separator_str, spec_version,
++  machine_suffix = concat (spec_host_machine, dir_separator_str, base_version,
+ 			   accel_dir_suffix, dir_separator_str, NULL);
+   just_machine_suffix = concat (spec_machine, dir_separator_str, NULL);
+ 
+@@ -7302,7 +7303,7 @@ driver::set_up_specs () const
+   /* If we have a GCC_EXEC_PREFIX envvar, modify it for cpp's sake.  */
+   if (gcc_exec_prefix)
+     gcc_exec_prefix = concat (gcc_exec_prefix, spec_host_machine,
+-			      dir_separator_str, spec_version,
++			      dir_separator_str, base_version,
+ 			      accel_dir_suffix, dir_separator_str, NULL);
+ 
+   /* Now we have the specs.
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -140,7 +140,7 @@ if test x${gcc_gxx_include_dir} = x; the
+   if test x${enable_version_specific_runtime_libs} = xyes; then
+     gcc_gxx_include_dir='${libsubdir}/include/c++'
+   else
+-    libstdcxx_incdir='include/c++/$(version)'
++    libstdcxx_incdir='include/c++/$(BASEVER_c)'
+     if test x$host != x$target; then
+        libstdcxx_incdir="$target_alias/$libstdcxx_incdir"
+     fi
+@@ -1688,6 +1688,7 @@ changequote([,])dnl
+ 
+ changequote(,)dnl
+ gcc_BASEVER=`cat $srcdir/BASE-VER`
++gcc_FULLVER=`cat $srcdir/FULL-VER`
+ gcc_DEVPHASE=`cat $srcdir/DEV-PHASE`
+ gcc_DATESTAMP=`cat $srcdir/DATESTAMP`
+ if test -f $srcdir/REVISION ; then
+@@ -1698,12 +1699,12 @@ fi
+ cat > plugin-version.h <<EOF
+ #include "configargs.h"
+ 
+-#define GCCPLUGIN_VERSION_MAJOR   `echo $gcc_BASEVER | sed -e 's/^\([0-9]*\).*$/\1/'`
+-#define GCCPLUGIN_VERSION_MINOR   `echo $gcc_BASEVER | sed -e 's/^[0-9]*\.\([0-9]*\).*$/\1/'`
+-#define GCCPLUGIN_VERSION_PATCHLEVEL   `echo $gcc_BASEVER | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$/\1/'`
++#define GCCPLUGIN_VERSION_MAJOR   `echo $gcc_FULLVER | sed -e 's/^\([0-9]*\).*$/\1/'`
++#define GCCPLUGIN_VERSION_MINOR   `echo $gcc_FULLVER | sed -e 's/^[0-9]*\.\([0-9]*\).*$/\1/'`
++#define GCCPLUGIN_VERSION_PATCHLEVEL   `echo $gcc_FULLVER | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$/\1/'`
+ #define GCCPLUGIN_VERSION  (GCCPLUGIN_VERSION_MAJOR*1000 + GCCPLUGIN_VERSION_MINOR)
+ 
+-static char basever[] = "$gcc_BASEVER";
++static char basever[] = "$gcc_FULLVER";
+ static char datestamp[] = "$gcc_DATESTAMP";
+ static char devphase[] = "$gcc_DEVPHASE";
+ static char revision[] = "$gcc_REVISION";
--- gcc-5-5.4.0.orig/debian/patches/gcc-configure-pie-doc.diff
+++ gcc-5-5.4.0/debian/patches/gcc-configure-pie-doc.diff
@@ -0,0 +1,31 @@
+# DP: Add --enable-default-pie option to GCC configure (documentation)
+
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -11207,6 +11207,10 @@ For predictable results, you must also s
+ used for compilation (@option{-fpie}, @option{-fPIE},
+ or model suboptions) when you specify this linker option.
+ 
++@item -no-pie
++@opindex no-pie
++Don't produce a position independent executable.
++
+ @item -rdynamic
+ @opindex rdynamic
+ Pass the flag @option{-export-dynamic} to the ELF linker, on targets
+Index: b/src/gcc/doc/install.texi
+===================================================================
+--- a/src/gcc/doc/install.texi
++++ b/src/gcc/doc/install.texi
+@@ -1619,6 +1619,9 @@ defaulted to o32.
+ Currently, this option only affects sparc-linux, powerpc-linux, x86-linux,
+ mips-linux and s390-linux.
+ 
++@item --enable-default-pie
++Turn on @option{-fPIE} and @option{-pie} by default.
++
+ @item --enable-secureplt
+ This option enables @option{-msecure-plt} by default for powerpc-linux.
+ @ifnothtml
--- gcc-5-5.4.0.orig/debian/patches/gcc-configure-pie.diff
+++ gcc-5-5.4.0/debian/patches/gcc-configure-pie.diff
@@ -0,0 +1,880 @@
+# DP: Add --enable-default-pie option to GCC configure
+
+gcc/
+2015-05-27  Magnus Granberg  <zorry@gentoo.org>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in (COMPILER): Add @NO_PIE_CFLAGS@.
+	(BUILD_CFLAGS): Likewise.
+	(BUILD_CXXFLAGS): Likewise.
+	(LINKER): Add @NO_PIE_FLAG@.
+	(BUILD_LDFLAGS): Likewise.
+	(libgcc.mvars): Set NO_PIE_CFLAGS to -fno-PIE for
+	--enable-default-pie.
+	* common.opt (fPIE): Initialize to -1.
+	(fpie): Likewise.
+	(no-pie): New option.
+	(pie): Replace "Negative(shared)" with "Negative(no-pie)".
+	* configure.ac: Add --enable-default-pie.
+	(NO_PIE_CFLAGS): New.  Check if -fno-PIE works.  AC_SUBST.
+	(NO_PIE_FLAG): New.  Check if -no-pie works.  AC_SUBST.
+	* defaults.h (DEFAULT_FLAG_PIE): New.  Default PIE to -fPIE.
+	* gcc.c (NO_PIE_SPEC): New.
+	(PIE_SPEC): Likewise.
+	(NO_FPIE1_SPEC): Likewise.
+	(FPIE1_SPEC): Likewise.
+	(NO_FPIE2_SPEC): Likewise.
+	(FPIE2_SPEC): Likewise.
+	(NO_FPIE2_SPEC): Likewise.
+	(FPIE_SPEC): Likewise.
+	(NO_FPIE_SPEC): Likewise.
+	(NO_FPIC1_SPEC): Likewise.
+	(FPIC1_SPEC): Likewise.
+	(NO_FPIC2_SPEC): Likewise.
+	(FPIC2_SPEC): Likewise.
+	(NO_FPIC2_SPEC): Likewise.
+	(FPIC_SPEC): Likewise.
+	(NO_FPIC_SPEC): Likewise.
+	(NO_FPIE1_AND_FPIC1_SPEC): Likewise.
+	(FPIE1_OR_FPIC1_SPEC): Likewise.
+	(NO_FPIE2_AND_FPIC2_SPEC): Likewise.
+	(FPIE2_OR_FPIC2_SPEC): Likewise.
+	(NO_FPIE_AND_FPIC_SPEC): Likewise.
+	(FPIE_OR_FPIC_SPEC): Likewise.
+	(LD_PIE_SPEC): Likewise.
+	(LINK_PIE_SPEC): Handle -no-pie.  Use PIE_SPEC and LD_PIE_SPEC.
+	* opts.c (finish_options): Update opts->x_flag_pie if it is -1.
+	* config/darwin.h (PIE_SPEC): Renamed to ...
+	(DARWIN_PIE_SPEC): This.
+	(LINK_SPEC): Replace PIE_SPEC with DARWIN_PIE_SPEC.
+	* config/darwin9.h (PIE_SPEC): Renamed to ...
+	(DARWIN_PIE_SPEC): This.
+	* config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Use
+	PIE_SPEC and NO_PIE_SPEC if HAVE_LD_PIE is defined.
+	* config/openbsd.h (ASM_SPEC): Use FPIE1_OR_FPIC1_SPEC and
+	FPIE2_OR_FPIC2_SPEC.
+	* config/m68k/netbsd-elf.h (ASM_SPEC): Likewise.
+	* config/m68k/openbsd.h (ASM_SPEC): Likewise.
+	* gcc/config/sol2.h (ASM_PIC_SPEC): Likewise.
+	* config/arm/freebsd.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
+	* config/arm/netbsd-elf.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
+	* config/arm/semi.h (SUBTARGET_EXTRA_ASM_SPEC): Likewise.
+	* config/cris/linux.h (CRIS_ASM_SUBTARGET_SPEC): Likewise.
+	* config/m32r/m32r.h (ASM_SPEC): Likewise.
+	* config/m68k/uclinux.h (DRIVER_SELF_SPECS): Likewise.
+	* config/rs6000/linux64.h (ASM_SPEC32): Likewise.
+	* config/rs6000/sysv4.h (ASM_SPEC): Likewise.
+	* config/sparc/freebsd.h (ASM_SPEC): Likewise.
+	* config/sparc/linux.h (ASM_SPEC): Likewise.
+	* config/sparc/linux64.h (ASM_SPEC): Likewise.
+	* config/sparc/netbsd-elf.h (ASM_SPEC): Likewise.
+	* config/sparc/openbsd64.h (ASM_SPEC): Likewise.
+	* config/sparc/sp-elf.h (ASM_SPEC): Likewise.
+	* config/sparc/sp64-elf.h (ASM_SPEC): Likewise.
+	* config/sparc/sparc.h (ASM_SPEC): Likewise.
+	* config/sparc/sysv4.h (ASM_SPEC): Likewise.
+	* config/sparc/vxworks.h (ASM_SPEC): Likewise.
+	* config/c6x/elf-common.h (ASM_SPEC): Use NO_FPIC2_SPEC,
+	FPIC2_SPEC, FPIC1_SPEC and FPIC2_SPEC.
+	* config/c6x/uclinux-elf.h (LINK_SPEC): Use FPIE_SPEC.
+	* config/frv/frv.h (DRIVER_SELF_SPECS): Use FPIC_SPEC,
+	NO_FPIC_SPEC and NO_FPIE1_AND_FPIC1_SPEC.
+	(ASM_SPEC): Use FPIE1_OR_FPIC1_SPEC and FPIE2_OR_FPIC2_SPEC.
+	* config/m68k/m68k.h (ASM_PCREL_SPEC): Use FPIC_SPEC and
+	NO_FPIC_SPEC.
+	* config/mips/gnu-user.h (NO_SHARED_SPECS): Use
+	NO_FPIE_AND_FPIC_SPEC.
+	* config/mips/vxworks.h (SUBTARGET_ASM_SPEC): Use FPIC_SPEC.
+	* config/rs6000/freebsd64.h (ASM_SPEC32): Likewise.
+	* config/rs6000/vxworks.h (ASM_SPEC): Likewise.
+	* config/vax/linux.h (ASM_SPEC): Likewise.
+	* doc/install.texi: Document --enable-default-pie.
+	* doc/invoke.texi: Document -no-pie.
+	* config.in: Regenerated.
+	* configure: Likewise.
+
+gcc/ada/
+2015-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* gcc-interface/Makefile.in (TOOLS_LIBS): Add @NO_PIE_FLAG@.
+
+libgcc/
+
+2015-05-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* Makefile.in (CRTSTUFF_CFLAGS): Add $(NO_PIE_CFLAGS).
+
+Index: b/src/libgcc/Makefile.in
+===================================================================
+--- a/src/libgcc/Makefile.in
++++ b/src/libgcc/Makefile.in
+@@ -284,7 +284,7 @@ INTERNAL_CFLAGS = $(CFLAGS) $(LIBGCC2_CF
+ 
+ # Options to use when compiling crtbegin/end.
+ CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -g0 \
+-  -finhibit-size-directive -fno-inline -fno-exceptions \
++  $(NO_PIE_CFLAGS) -finhibit-size-directive -fno-inline -fno-exceptions \
+   -fno-zero-initialized-in-bss -fno-toplevel-reorder -fno-tree-vectorize \
+   -fbuilding-libgcc -fno-stack-protector $(FORCE_EXPLICIT_EH_REGISTRY) \
+   $(INHIBIT_LIBC_CFLAGS)
+Index: b/src/gcc/defaults.h
+===================================================================
+--- a/src/gcc/defaults.h
++++ b/src/gcc/defaults.h
+@@ -1186,6 +1186,18 @@ see the files COPYING3 and COPYING.RUNTI
+ #define DEFAULT_PCC_STRUCT_RETURN 1
+ #endif
+ 
++/* Default value for flag_pie when flag_pie is initialized to -1:
++   --enable-default-pie: Default flag_pie to -fPIE.
++   --disable-default-pie: Default flag_pie to 0.
++ */
++#ifdef ENABLE_DEFAULT_PIE
++# ifndef DEFAULT_FLAG_PIE
++#  define DEFAULT_FLAG_PIE 2
++# endif
++#else
++# define DEFAULT_FLAG_PIE 0
++#endif
++
+ #ifdef GCC_INSN_FLAGS_H
+ /* Dependent default target macro definitions
+ 
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -738,12 +738,57 @@ proper position among the other output f
+ #endif
+ #endif
+ 
++#ifdef ENABLE_DEFAULT_PIE
++#define NO_PIE_SPEC		"no-pie|static"
++#define PIE_SPEC		NO_PIE_SPEC "|r|shared:;"
++#define NO_FPIE1_SPEC		"fno-pie"
++#define FPIE1_SPEC		NO_FPIE1_SPEC ":;"
++#define NO_FPIE2_SPEC		"fno-PIE"
++#define FPIE2_SPEC		NO_FPIE2_SPEC ":;"
++#define NO_FPIE_SPEC		NO_FPIE1_SPEC "|" NO_FPIE2_SPEC
++#define FPIE_SPEC		NO_FPIE_SPEC ":;"
++#define NO_FPIC1_SPEC		"fno-pic"
++#define FPIC1_SPEC		NO_FPIC1_SPEC ":;"
++#define NO_FPIC2_SPEC		"fno-PIC"
++#define FPIC2_SPEC		NO_FPIC2_SPEC ":;"
++#define NO_FPIC_SPEC		NO_FPIC1_SPEC "|" NO_FPIC2_SPEC
++#define FPIC_SPEC		NO_FPIC_SPEC ":;"
++#define NO_FPIE1_AND_FPIC1_SPEC	NO_FPIE1_SPEC "|" NO_FPIC1_SPEC
++#define FPIE1_OR_FPIC1_SPEC	NO_FPIE1_AND_FPIC1_SPEC ":;"
++#define NO_FPIE2_AND_FPIC2_SPEC	NO_FPIE2_SPEC "|" NO_FPIC2_SPEC
++#define FPIE2_OR_FPIC2_SPEC	NO_FPIE2_AND_FPIC2_SPEC ":;"
++#define NO_FPIE_AND_FPIC_SPEC	NO_FPIE_SPEC "|" NO_FPIC_SPEC
++#define FPIE_OR_FPIC_SPEC	NO_FPIE_AND_FPIC_SPEC ":;"
++#else
++#define PIE_SPEC		"pie"
++#define NO_PIE_SPEC		PIE_SPEC "|r|shared:;"
++#define FPIE1_SPEC		"fpie"
++#define NO_FPIE1_SPEC		FPIE1_SPEC ":;"
++#define FPIE2_SPEC		"fPIE"
++#define NO_FPIE2_SPEC		FPIE2_SPEC ":;"
++#define FPIE_SPEC		FPIE1_SPEC "|" FPIE2_SPEC
++#define NO_FPIE_SPEC		FPIE_SPEC ":;"
++#define FPIC1_SPEC		"fpic"
++#define NO_FPIC1_SPEC		FPIC1_SPEC ":;"
++#define FPIC2_SPEC		"fPIC"
++#define NO_FPIC2_SPEC		FPIC2_SPEC ":;"
++#define FPIC_SPEC		FPIC1_SPEC "|" FPIC2_SPEC
++#define NO_FPIC_SPEC		FPIC_SPEC ":;"
++#define FPIE1_OR_FPIC1_SPEC	FPIE1_SPEC "|" FPIC1_SPEC
++#define NO_FPIE1_AND_FPIC1_SPEC	FPIE1_OR_FPIC1_SPEC ":;"
++#define FPIE2_OR_FPIC2_SPEC	FPIE2_SPEC "|" FPIC2_SPEC
++#define NO_FPIE2_AND_FPIC2_SPEC	FPIE1_OR_FPIC2_SPEC ":;"
++#define FPIE_OR_FPIC_SPEC	FPIE_SPEC "|" FPIC_SPEC
++#define NO_FPIE_AND_FPIC_SPEC	FPIE_OR_FPIC_SPEC ":;"
++#endif
++
+ #ifndef LINK_PIE_SPEC
+ #ifdef HAVE_LD_PIE
+-#define LINK_PIE_SPEC "%{pie:-pie} "
++#define LD_PIE_SPEC "-pie"
+ #else
+-#define LINK_PIE_SPEC "%{pie:} "
++#define LD_PIE_SPEC ""
+ #endif
++#define LINK_PIE_SPEC "%{no-pie:} " "%{" PIE_SPEC ":" LD_PIE_SPEC "} "
+ #endif
+ 
+ #ifndef LINK_BUILDID_SPEC
+Index: b/src/gcc/config.in
+===================================================================
+--- a/src/gcc/config.in
++++ b/src/gcc/config.in
+@@ -89,6 +89,12 @@
+ #endif
+ 
+ 
++/* Define if your target supports default PIE and it is enabled. */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_DEFAULT_PIE
++#endif
++
++
+ /* Define if you want more run-time sanity checks for dataflow. */
+ #ifndef USED_FOR_TARGET
+ #undef ENABLE_DF_CHECKING
+Index: b/src/gcc/opts.c
+===================================================================
+--- a/src/gcc/opts.c
++++ b/src/gcc/opts.c
+@@ -741,6 +741,15 @@ finish_options (struct gcc_options *opts
+ 
+   if (!opts->x_flag_opts_finished)
+     {
++      /* We initialize opts->x_flag_pie to -1 so that targets can set a
++	 default value.  */
++      if (opts->x_flag_pie == -1)
++	{
++	  if (opts->x_flag_pic == 0)
++	    opts->x_flag_pie = DEFAULT_FLAG_PIE;
++	  else
++	    opts->x_flag_pie = 0;
++	}
+       if (opts->x_flag_pie)
+ 	opts->x_flag_pic = opts->x_flag_pie;
+       if (opts->x_flag_pic && !opts->x_flag_pie)
+Index: b/src/gcc/ada/gcc-interface/Makefile.in
+===================================================================
+--- a/src/gcc/ada/gcc-interface/Makefile.in
++++ b/src/gcc/ada/gcc-interface/Makefile.in
+@@ -267,6 +267,9 @@ TOOLS_LIBS = ../link.o ../targext.o ../.
+   ../../libcommon.a ../../../libcpp/libcpp.a $(LIBGNAT) $(LIBINTL) $(LIBICONV) \
+   ../$(LIBBACKTRACE) ../$(LIBIBERTY) $(SYSLIBS) $(TGT_LIB)
+ 
++# Add -no-pie to TOOLS_LIBS since some of them are compiled with -fno-PIE.
++TOOLS_LIBS += @NO_PIE_FLAG@
++
+ # Specify the directories to be searched for header files.
+ # Both . and srcdir are used, in that order,
+ # so that tm.h and config.h will be found in the compilation
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -5869,6 +5869,46 @@ cat > gcc-driver-name.h <<EOF
+ #define GCC_DRIVER_NAME "${target_noncanonical}-gcc-${gcc_BASEVER}${exeext}"
+ EOF
+ 
++# Check whether --enable-default-pie was given.
++AC_ARG_ENABLE(default-pie,
++[AS_HELP_STRING([--enable-default-pie],
++  [enable Position Independent Executable as default])],
++enable_default_pie=$enableval,
++enable_default_pie=no)
++if test x$enable_default_pie == xyes ; then
++  AC_DEFINE(ENABLE_DEFAULT_PIE, 1,
++      [Define if your target supports default PIE and it is enabled.])
++fi
++AC_SUBST([enable_default_pie])
++
++# Check if -fno-PIE works.
++AC_CACHE_CHECK([for -fno-PIE option],
++  [gcc_cv_c_no_fpie],
++  [saved_CFLAGS="$CFLAGS"
++   CFLAGS="$CFLAGS -fno-PIE"
++   AC_COMPILE_IFELSE([int main(void) {return 0;}],
++     [gcc_cv_c_no_fpie=yes],
++     [gcc_cv_c_no_fpie=no])
++   CFLAGS="$saved_CFLAGS"])
++if test "$gcc_cv_c_no_fpie" = "yes"; then
++  NO_PIE_CFLAGS="-fno-PIE"
++fi
++AC_SUBST([NO_PIE_CFLAGS])
++
++# Check if -no-pie works.
++AC_CACHE_CHECK([for -no-pie option],
++  [gcc_cv_no_pie],
++  [saved_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -no-pie"
++   AC_LINK_IFELSE([int main(void) {return 0;}],
++     [gcc_cv_no_pie=yes],
++     [gcc_cv_no_pie=no])
++   LDFLAGS="$saved_LDFLAGS"])
++if test "$gcc_cv_no_pie" = "yes"; then
++  NO_PIE_FLAG="-no-pie"
++fi
++AC_SUBST([NO_PIE_FLAG])
++
+ # Configure the subdirectories
+ # AC_CONFIG_SUBDIRS($subdirs)
+ 
+Index: b/src/gcc/common.opt
+===================================================================
+--- a/src/gcc/common.opt
++++ b/src/gcc/common.opt
+@@ -1768,7 +1768,7 @@ Common Report Var(flag_pic,2) Negative(f
+ Generate position-independent code if possible (large mode)
+ 
+ fPIE
+-Common Report Var(flag_pie,2) Negative(fpic)
++Common Report Var(flag_pie,2) Negative(fpic) Init(-1)
+ Generate position-independent code for executables if possible (large mode)
+ 
+ fpic
+@@ -1776,7 +1776,7 @@ Common Report Var(flag_pic,1) Negative(f
+ Generate position-independent code if possible (small mode)
+ 
+ fpie
+-Common Report Var(flag_pie,1) Negative(fPIC)
++Common Report Var(flag_pie,1) Negative(fPIC) Init(-1)
+ Generate position-independent code for executables if possible (small mode)
+ 
+ fplugin=
+@@ -2849,8 +2849,12 @@ Driver
+ symbolic
+ Driver
+ 
+-pie
++no-pie
+ Driver RejectNegative Negative(shared)
++Don't create a position independent executable
++
++pie
++Driver RejectNegative Negative(no-pie)
+ Create a position independent executable
+ 
+ z
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -252,6 +252,12 @@ LINKER = $(CC)
+ LINKER_FLAGS = $(CFLAGS)
+ endif
+ 
++# We don't want to compile the compilers with -fPIE, it make PCH fail.
++COMPILER += @NO_PIE_CFLAGS@
++
++# Link with -no-pie since we compile the compiler with -fno-PIE.
++LINKER += @NO_PIE_FLAG@
++
+ # Like LINKER, but use a mutex for serializing front end links.
+ ifeq (@DO_LINK_MUTEX@,true)
+ LLINKER = $(SHELL) $(srcdir)/lock-and-run.sh linkfe.lck $(LINKER)
+@@ -749,6 +755,8 @@ CC_FOR_BUILD = @CC_FOR_BUILD@
+ CXX_FOR_BUILD = @CXX_FOR_BUILD@
+ BUILD_CFLAGS= @BUILD_CFLAGS@ -DGENERATOR_FILE
+ BUILD_CXXFLAGS = @BUILD_CXXFLAGS@ -DGENERATOR_FILE
++BUILD_CFLAGS += @NO_PIE_CFLAGS@
++BUILD_CXXFLAGS += @NO_PIE_CFLAGS@
+ 
+ # Native compiler that we use.  This may be C++ some day.
+ COMPILER_FOR_BUILD = $(CXX_FOR_BUILD)
+@@ -760,6 +768,7 @@ BUILD_LINKERFLAGS = $(BUILD_CXXFLAGS)
+ 
+ # Native linker and preprocessor flags.  For x-fragment overrides.
+ BUILD_LDFLAGS=@BUILD_LDFLAGS@
++BUILD_LDFLAGS += @NO_PIE_FLAG@
+ BUILD_CPPFLAGS= -I. -I$(@D) -I$(srcdir) -I$(srcdir)/$(@D) \
+ 		-I$(srcdir)/../include @INCINTL@ $(CPPINC) $(CPPFLAGS)
+ 
+@@ -1865,6 +1874,12 @@ libgcc.mvars: config.status Makefile spe
+ 	echo GCC_CFLAGS = '$(GCC_CFLAGS)' >> tmp-libgcc.mvars
+ 	echo INHIBIT_LIBC_CFLAGS = '$(INHIBIT_LIBC_CFLAGS)' >> tmp-libgcc.mvars
+ 	echo TARGET_SYSTEM_ROOT = '$(TARGET_SYSTEM_ROOT)' >> tmp-libgcc.mvars
++	if test @enable_default_pie@ = yes; then \
++	  NO_PIE_CFLAGS="-fno-PIE"; \
++	else \
++	  NO_PIE_CFLAGS=; \
++	fi; \
++	echo NO_PIE_CFLAGS = "$$NO_PIE_CFLAGS" >> tmp-libgcc.mvars
+ 
+ 	mv tmp-libgcc.mvars libgcc.mvars
+ 
+Index: b/src/gcc/config/frv/frv.h
+===================================================================
+--- a/src/gcc/config/frv/frv.h
++++ b/src/gcc/config/frv/frv.h
+@@ -42,12 +42,12 @@
+ "%{mno-pack:\
+    %{!mhard-float:-msoft-float}\
+    %{!mmedia:-mno-media}}\
+- %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\
++ %{!mfdpic:%{" FPIC_SPEC ": -multilib-library-pic}}\
+  %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
+    	    %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \
+-	  %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \
+-                    %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \
+-	  %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \
++	  %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{" FPIC_SPEC ":-minline-plt} \
++                    %{" NO_FPIC_SPEC ":%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}} \
++	  %{!mno-gprel-ro:%{" NO_FPIE1_AND_FPIC1_SPEC ":-mgprel-ro}}} \
+ "
+ #ifndef SUBTARGET_DRIVER_SELF_SPECS
+ # define SUBTARGET_DRIVER_SELF_SPECS
+@@ -67,7 +67,7 @@
+     %{mmuladd} %{mno-muladd} \
+     %{mpack} %{mno-pack} \
+     %{mno-fdpic:-mnopic} %{mfdpic} \
+-    %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}"
++    %{" FPIE1_OR_FPIC1_SPEC ":-mpic} %{" FPIE2_OR_FPIC2_SPEC ":-mPIC} %{mlibrary-pic}}"
+ 
+ #undef  STARTFILE_SPEC
+ #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s"
+Index: b/src/gcc/config/sparc/linux.h
+===================================================================
+--- a/src/gcc/config/sparc/linux.h
++++ b/src/gcc/config/sparc/linux.h
+@@ -98,7 +98,7 @@ extern const char *host_detect_local_cpu
+ #undef ASM_SPEC
+ #define ASM_SPEC "\
+ -s \
+-%{fpic|fPIC|fpie|fPIE:-K PIC} \
++%{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %{!.c:%{findirect-dispatch:-K PIC}} \
+ %(asm_cpu) %(asm_relax)"
+ 
+Index: b/src/gcc/config/sparc/sp64-elf.h
+===================================================================
+--- a/src/gcc/config/sparc/sp64-elf.h
++++ b/src/gcc/config/sparc/sp64-elf.h
+@@ -32,7 +32,7 @@ along with GCC; see the file COPYING3.
+ 
+ #undef ASM_SPEC
+ #define ASM_SPEC "\
+--s %{fpic|fPIC|fpie|fPIE:-K PIC} \
++-s %{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %(asm_cpu) %(asm_arch) \
+ "
+ 
+Index: b/src/gcc/config/sparc/openbsd64.h
+===================================================================
+--- a/src/gcc/config/sparc/openbsd64.h
++++ b/src/gcc/config/sparc/openbsd64.h
+@@ -46,7 +46,7 @@ along with GCC; see the file COPYING3.
+ 
+ #undef ASM_SPEC
+ #define ASM_SPEC "\
+--s %{fpic|fPIC|fpie|fPIE:-K PIC} \
++-s %{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %(asm_cpu) %(asm_arch) \
+ "
+ 
+Index: b/src/gcc/config/sparc/sp-elf.h
+===================================================================
+--- a/src/gcc/config/sparc/sp-elf.h
++++ b/src/gcc/config/sparc/sp-elf.h
+@@ -25,7 +25,7 @@ along with GCC; see the file COPYING3.
+ #undef ASM_SPEC
+ #define ASM_SPEC \
+   "-s \
+-   %{fpic|fpie|fPIC|fPIE:-K PIC} %(asm_cpu)"
++   %{" FPIE_OR_FPIC_SPEC ":-K PIC} %(asm_cpu)"
+ 
+ /* Use the default.  */
+ #undef LINK_SPEC
+Index: b/src/gcc/config/sparc/sparc.h
+===================================================================
+--- a/src/gcc/config/sparc/sparc.h
++++ b/src/gcc/config/sparc/sparc.h
+@@ -380,7 +380,7 @@ extern enum cmodel sparc_cmodel;
+ /* Special flags to the Sun-4 assembler when using pipe for input.  */
+ 
+ #define ASM_SPEC "\
+-%{!pg:%{!p:%{fpic|fPIC|fpie|fPIE:-k}}} %{keep-local-as-symbols:-L} \
++%{!pg:%{!p:%{" FPIE_OR_FPIC_SPEC ":-k}}} %{keep-local-as-symbols:-L} \
+ %(asm_cpu) %(asm_relax)"
+ 
+ /* This macro defines names of additional specifications to put in the specs
+Index: b/src/gcc/config/sparc/linux64.h
+===================================================================
+--- a/src/gcc/config/sparc/linux64.h
++++ b/src/gcc/config/sparc/linux64.h
+@@ -208,7 +208,7 @@ extern const char *host_detect_local_cpu
+ #undef ASM_SPEC
+ #define ASM_SPEC "\
+ -s \
+-%{fpic|fPIC|fpie|fPIE:-K PIC} \
++%{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %{!.c:%{findirect-dispatch:-K PIC}} \
+ %(asm_cpu) %(asm_arch) %(asm_relax)"
+ 
+Index: b/src/gcc/config/sparc/freebsd.h
+===================================================================
+--- a/src/gcc/config/sparc/freebsd.h
++++ b/src/gcc/config/sparc/freebsd.h
+@@ -38,7 +38,7 @@ along with GCC; see the file COPYING3.
+   while (0)
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{fpic|fPIC|fpie|fPIE:-K PIC} %(asm_cpu)"
++#define ASM_SPEC "%{" FPIE_OR_FPIC_SPEC ":-K PIC} %(asm_cpu)"
+ 
+ #define LINK_SPEC "%(link_arch)						\
+   %{!mno-relax:%{!r:-relax}}						\
+Index: b/src/gcc/config/sparc/netbsd-elf.h
+===================================================================
+--- a/src/gcc/config/sparc/netbsd-elf.h
++++ b/src/gcc/config/sparc/netbsd-elf.h
+@@ -67,7 +67,7 @@ along with GCC; see the file COPYING3.
+ #define USER_LABEL_PREFIX ""
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{fpic|fPIC|fpie|fPIE:-K PIC} \
++#define ASM_SPEC "%{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %(asm_cpu) %(asm_arch) %(asm_relax)"
+ 
+ #undef STDC_0_IN_SYSTEM_HEADERS
+Index: b/src/gcc/config/sparc/vxworks.h
+===================================================================
+--- a/src/gcc/config/sparc/vxworks.h
++++ b/src/gcc/config/sparc/vxworks.h
+@@ -34,7 +34,7 @@ along with GCC; see the file COPYING3.
+ #define CPP_SUBTARGET_SPEC VXWORKS_ADDITIONAL_CPP_SPEC
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{fpic|fPIC|fpie|fPIE:-K PIC} %(asm_cpu)"
++#define ASM_SPEC "%{" FPIE_OR_FPIC_SPEC ":-K PIC} %(asm_cpu)"
+ 
+ #undef LIB_SPEC
+ #define LIB_SPEC VXWORKS_LIB_SPEC
+Index: b/src/gcc/config/sparc/sysv4.h
+===================================================================
+--- a/src/gcc/config/sparc/sysv4.h
++++ b/src/gcc/config/sparc/sysv4.h
+@@ -41,7 +41,7 @@ along with GCC; see the file COPYING3.
+ #undef ASM_SPEC
+ #define ASM_SPEC \
+   "%{v:-V} %{Qy:} %{!Qn:-Qy} %{Ym,*} \
+-   %{fpic|fPIC|fpie|fPIE:-K PIC} %(asm_cpu)"
++   %{" FPIE_OR_FPIC_SPEC ":-K PIC} %(asm_cpu)"
+ 
+ /* Define the names of various pseudo-op used by the SPARC/svr4 assembler.
+    Note that many of these are different from the typical pseudo-ops used
+Index: b/src/gcc/config/m32r/m32r.h
+===================================================================
+--- a/src/gcc/config/m32r/m32r.h
++++ b/src/gcc/config/m32r/m32r.h
+@@ -159,7 +159,7 @@
+ 
+ /* Options to pass on to the assembler.  */
+ #undef  ASM_SPEC
+-#define ASM_SPEC "%(asm_cpu) %(relax) %{fpic|fpie:-K PIC} %{fPIC|fPIE:-K PIC}"
++#define ASM_SPEC "%(asm_cpu) %(relax) %{" FPIE_OR_FPIC_SPEC ":-K PIC}"
+ 
+ #define LINK_SPEC "%{v} %(link_cpu) %(relax)"
+ 
+Index: b/src/gcc/config/sol2.h
+===================================================================
+--- a/src/gcc/config/sol2.h
++++ b/src/gcc/config/sol2.h
+@@ -127,7 +127,7 @@ along with GCC; see the file COPYING3.
+ #define ASM_SPEC_BASE \
+ "%{v:-V} %{Qy:} %{!Qn:-Qy} %{Ym,*} -s %(asm_cpu)"
+ 
+-#define ASM_PIC_SPEC " %{fpic|fpie|fPIC|fPIE:-K PIC}"
++#define ASM_PIC_SPEC " %{" FPIE_OR_FPIC_SPEC ":-K PIC}"
+ 
+ #undef ASM_CPU_DEFAULT_SPEC
+ #define ASM_CPU_DEFAULT_SPEC \
+Index: b/src/gcc/config/cris/linux.h
+===================================================================
+--- a/src/gcc/config/cris/linux.h
++++ b/src/gcc/config/cris/linux.h
+@@ -79,13 +79,13 @@ along with GCC; see the file COPYING3.
+  "--em=criself \
+   %{!march=*:%{!mcpu=*:--march=v32}} \
+   %{!fleading-underscore:--no-underscore}\
+-  %{fPIC|fpic|fPIE|fpie: --pic}"
++  %{" FPIE_OR_FPIC_SPEC ": --pic}"
+ #else
+ # define CRIS_ASM_SUBTARGET_SPEC \
+  "--em=criself \
+   %{!march=*:%{!mcpu=*:--march=v10}} \
+   %{!fleading-underscore:--no-underscore}\
+-  %{fPIC|fpic|fPIE|fpie: --pic}"
++  %{" FPIE_OR_FPIC_SPEC ": --pic}"
+ #endif
+ 
+ /* Previously controlled by target_flags.  */
+Index: b/src/gcc/config/gnu-user.h
+===================================================================
+--- a/src/gcc/config/gnu-user.h
++++ b/src/gcc/config/gnu-user.h
+@@ -42,8 +42,11 @@ see the files COPYING3 and COPYING.RUNTI
+ 
+ #if defined HAVE_LD_PIE
+ #define GNU_USER_TARGET_STARTFILE_SPEC \
+-  "%{!shared: %{pg|p|profile:gcrt1.o%s;pie:Scrt1.o%s;:crt1.o%s}} \
+-   crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s} \
++  "%{!shared: %{pg|p|profile:gcrt1.o%s;: \
++    %{" PIE_SPEC ":Scrt1.o%s} %{" NO_PIE_SPEC ":crt1.o%s}}} \
++   crti.o%s %{static:crtbeginT.o%s;: %{shared:crtbeginS.o%s} \
++	      %{" PIE_SPEC ":crtbeginS.o%s} \
++	      %{" NO_PIE_SPEC ":crtbegin.o%s}} \
+    %{fvtable-verify=none:%s; \
+      fvtable-verify=preinit:vtv_start_preinit.o%s; \
+      fvtable-verify=std:vtv_start.o%s}"
+Index: b/src/gcc/config/c6x/uclinux-elf.h
+===================================================================
+--- a/src/gcc/config/c6x/uclinux-elf.h
++++ b/src/gcc/config/c6x/uclinux-elf.h
+@@ -40,7 +40,7 @@
+ 
+ #undef LINK_SPEC
+ #define LINK_SPEC ENDIAN_LINK_SPEC \
+-  "%{shared} %{fpie|fPIE:-pie} \
++  "%{shared} %{" FPIE_SPEC ":-pie} \
+   %{!shared: %{!static: \
+    %{rdynamic:-export-dynamic} \
+    %{!dynamic-linker:-dynamic-linker " UCLIBC_DYNAMIC_LINKER "}} \
+Index: b/src/gcc/config/c6x/elf-common.h
+===================================================================
+--- a/src/gcc/config/c6x/elf-common.h
++++ b/src/gcc/config/c6x/elf-common.h
+@@ -24,8 +24,10 @@
+ 
+ #undef ASM_SPEC
+ #define ASM_SPEC "%{march=*:-march=%*} %{mbig-endian:-mbig-endian} \
+- %{mdsbt:-mdsbt %{!fPIC:-mpid=near} %{fPIC:-mpid=far -mpic} %{fpic:-mpic}} \
+- %{!mdsbt:%{fpic:-mpic -mpid=near} %{fPIC:-mpic -mpid=far}}"
++ %{mdsbt:-mdsbt %{" NO_FPIC2_SPEC ":-mpid=near} \
++   %{" FPIC2_SPEC ":-mpid=far -mpic} %{" FPIC1_SPEC ":-mpic}} \
++ %{!mdsbt:%{" FPIC1_SPEC ":-mpic -mpid=near} \
++   %{" FPIC2_SPEC ":-mpic -mpid=far}}"
+ 
+ #undef DATA_SECTION_ASM_OP
+ #define DATA_SECTION_ASM_OP "\t.section\t\".fardata\",\"aw\""
+Index: b/src/gcc/config/m68k/openbsd.h
+===================================================================
+--- a/src/gcc/config/m68k/openbsd.h
++++ b/src/gcc/config/m68k/openbsd.h
+@@ -34,7 +34,8 @@ along with GCC; see the file COPYING3.
+ #define CPP_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__} %{posix:-D_POSIX_SOURCE} %{pthread:-D_POSIX_THREADS}"
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%(asm_cpu_spec) %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
++#define ASM_SPEC \
++  "%(asm_cpu_spec) %{" FPIE1_OR_FPIC1_SPEC ":-k} %{" FPIE2_OR_FPIC2_SPEC ":-k -K}"
+ 
+ /* Layout of source language data types.  */
+ 
+Index: b/src/gcc/config/m68k/netbsd-elf.h
+===================================================================
+--- a/src/gcc/config/m68k/netbsd-elf.h
++++ b/src/gcc/config/m68k/netbsd-elf.h
+@@ -56,7 +56,8 @@ along with GCC; see the file COPYING3.
+    to pass PIC code generation options.  */
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%(asm_cpu_spec) %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
++#define ASM_SPEC \
++  "%(asm_cpu_spec) %{" FPIE1_OR_FPIC1_SPEC ":-k} %{" FPIE2_OR_FPIC2_SPEC ":-k -K}"
+ 
+ /* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target.  */
+ 
+Index: b/src/gcc/config/m68k/m68k.h
+===================================================================
+--- a/src/gcc/config/m68k/m68k.h
++++ b/src/gcc/config/m68k/m68k.h
+@@ -40,7 +40,8 @@ along with GCC; see the file COPYING3.
+ %{m68020-40:-m68040}%{m68020-60:-m68040}\
+ %{mcpu=*:-mcpu=%*}%{march=*:-march=%*}\
+ "
+-#define ASM_PCREL_SPEC "%{fPIC|fpic|mpcrel:--pcrel} \
++#define ASM_PCREL_SPEC "%{" FPIC_SPEC ":--pcrel} \
++ %{mpcrel:%{" NO_FPIC_SPEC ":--pcrel}} \
+  %{msep-data|mid-shared-library:--pcrel} \
+ "
+ 
+Index: b/src/gcc/config/m68k/uclinux.h
+===================================================================
+--- a/src/gcc/config/m68k/uclinux.h
++++ b/src/gcc/config/m68k/uclinux.h
+@@ -60,7 +60,7 @@ along with GCC; see the file COPYING3.
+ 
+ /* -msep-data is the default PIC mode on this target.  */
+ #define DRIVER_SELF_SPECS \
+-  "%{fpie|fPIE|fpic|fPIC:%{!msep-data:%{!mid-shared-library: -msep-data}}}"
++  "%{" FPIE_OR_FPIC_SPEC ":%{!msep-data:%{!mid-shared-library: -msep-data}}}"
+ 
+ /* The uclinux binary format relies on relocations against a segment being
+    within that segment.  Conservatively apply this rule to individual
+Index: b/src/gcc/config/rs6000/freebsd64.h
+===================================================================
+--- a/src/gcc/config/rs6000/freebsd64.h
++++ b/src/gcc/config/rs6000/freebsd64.h
+@@ -143,7 +143,7 @@ extern int dot_symbols;
+ #define	LINK_OS_FREEBSD_SPEC "%{m32:%(link_os_freebsd_spec32)}%{!m32:%(link_os_freebsd_spec64)}"
+ 
+ #define ASM_SPEC32 "-a32 \
+-%{mrelocatable} %{mrelocatable-lib} %{fpic|fpie|fPIC|fPIE:-K PIC} \
++%{mrelocatable} %{mrelocatable-lib} %{" FPIC_SPEC ":-K PIC} \
+ %{memb} %{!memb: %{msdata=eabi: -memb}} \
+ %{!mlittle: %{!mlittle-endian: %{!mbig: %{!mbig-endian: \
+     %{mcall-freebsd: -mbig} \
+Index: b/src/gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -192,7 +192,7 @@ extern int dot_symbols;
+ #endif
+ 
+ #define ASM_SPEC32 "-a32 \
+-%{mrelocatable} %{mrelocatable-lib} %{fpic|fpie|fPIC|fPIE:-K PIC} \
++%{mrelocatable} %{mrelocatable-lib} %{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %{memb|msdata=eabi: -memb}"
+ 
+ #define ASM_SPEC64 "-a64"
+Index: b/src/gcc/config/rs6000/vxworks.h
+===================================================================
+--- a/src/gcc/config/rs6000/vxworks.h
++++ b/src/gcc/config/rs6000/vxworks.h
+@@ -90,7 +90,7 @@ VXWORKS_ADDITIONAL_CPP_SPEC
+ #define ASM_SPEC \
+ "%(asm_cpu) \
+  %{,assembler|,assembler-with-cpp: %{mregnames} %{mno-regnames}} \
+- %{mrelocatable} %{mrelocatable-lib} %{fpic:-K PIC} %{fPIC:-K PIC} -mbig"
++ %{mrelocatable} %{mrelocatable-lib} %{" FPIC_SPEC ":-K PIC} -mbig"
+ 
+ #undef  LIB_SPEC
+ #define LIB_SPEC VXWORKS_LIB_SPEC
+Index: b/src/gcc/config/rs6000/sysv4.h
+===================================================================
+--- a/src/gcc/config/rs6000/sysv4.h
++++ b/src/gcc/config/rs6000/sysv4.h
+@@ -530,7 +530,7 @@ extern int fixuplabelno;
+ #undef	ASM_SPEC
+ #define	ASM_SPEC "%(asm_cpu) \
+ %{,assembler|,assembler-with-cpp: %{mregnames} %{mno-regnames}} \
+-%{mrelocatable} %{mrelocatable-lib} %{fpic|fpie|fPIC|fPIE:-K PIC} \
++%{mrelocatable} %{mrelocatable-lib} %{" FPIE_OR_FPIC_SPEC ":-K PIC} \
+ %{memb|msdata=eabi: -memb}" \
+ ENDIAN_SELECT(" -mbig", " -mlittle", DEFAULT_ASM_ENDIAN)
+ 
+Index: b/src/gcc/config/darwin.h
+===================================================================
+--- a/src/gcc/config/darwin.h
++++ b/src/gcc/config/darwin.h
+@@ -214,7 +214,7 @@ extern GTY(()) int darwin_ms_struct;
+ #define LINK_SYSROOT_SPEC "%{isysroot*:-syslibroot %*}"
+ #endif
+ 
+-#define PIE_SPEC "%{fpie|pie|fPIE:}"
++#define DARWIN_PIE_SPEC "%{fpie|pie|fPIE:}"
+ 
+ /* Please keep the random linker options in alphabetical order (modulo
+    'Z' and 'no' prefixes). Note that options taking arguments may appear
+@@ -280,7 +280,7 @@ extern GTY(()) int darwin_ms_struct;
+      %:version-compare(< 10.5 mmacosx-version-min= -multiply_defined) \
+      %:version-compare(< 10.5 mmacosx-version-min= suppress)}} \
+    %{Zmultiplydefinedunused*:-multiply_defined_unused %*} \
+-   " PIE_SPEC " \
++   " DARWIN_PIE_SPEC " \
+    %{prebind} %{noprebind} %{nofixprebinding} %{prebind_all_twolevel_modules} \
+    %{read_only_relocs} \
+    %{sectcreate*} %{sectorder*} %{seg1addr*} %{segprot*} \
+Index: b/src/gcc/config/arm/semi.h
+===================================================================
+--- a/src/gcc/config/arm/semi.h
++++ b/src/gcc/config/arm/semi.h
+@@ -58,7 +58,7 @@
+    binutils can't.  */
+ #ifndef ASM_SPEC
+ #define ASM_SPEC "\
+-%{fpic|fpie: -k} %{fPIC|fPIE: -k} \
++%{" FPIE_OR_FPIC_SPEC ": -k} \
+ %{mbig-endian:-EB} \
+ %(arm_cpu_spec) \
+ %{mapcs-float:-mfloat} \
+Index: b/src/gcc/config/arm/freebsd.h
+===================================================================
+--- a/src/gcc/config/arm/freebsd.h
++++ b/src/gcc/config/arm/freebsd.h
+@@ -34,7 +34,7 @@
+ #undef SUBTARGET_EXTRA_ASM_SPEC
+ #define SUBTARGET_EXTRA_ASM_SPEC \
+   "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5} " TARGET_FIX_V4BX_SPEC " \
+-  %{fpic|fpie:-k} %{fPIC|fPIE:-k}"
++  %{" FPIE_OR_FPIC_SPEC ":-k}"
+ 
+ #undef SUBTARGET_ASM_FLOAT_SPEC
+ #ifdef TARGET_FREEBSD_ARM_HARD_FLOAT
+Index: b/src/gcc/config/arm/netbsd-elf.h
+===================================================================
+--- a/src/gcc/config/arm/netbsd-elf.h
++++ b/src/gcc/config/arm/netbsd-elf.h
+@@ -55,7 +55,7 @@
+ 
+ #undef SUBTARGET_EXTRA_ASM_SPEC
+ #define SUBTARGET_EXTRA_ASM_SPEC	\
+-  "-matpcs %{fpic|fpie:-k} %{fPIC|fPIE:-k}"
++  "-matpcs %{" FPIE_OR_FPIC_SPEC ":-k}"
+ 
+ /* Default to full VFP if -mfloat-abi=hard is specified.  */
+ #undef SUBTARGET_ASM_FLOAT_SPEC
+Index: b/src/gcc/config/darwin9.h
+===================================================================
+--- a/src/gcc/config/darwin9.h
++++ b/src/gcc/config/darwin9.h
+@@ -35,8 +35,8 @@ along with GCC; see the file COPYING3.
+ /* Tell collect2 to run dsymutil for us as necessary.  */
+ #define COLLECT_RUN_DSYMUTIL 1
+ 
+-#undef PIE_SPEC
+-#define PIE_SPEC \
++#undef DARWIN_PIE_SPEC
++#define DARWIN_PIE_SPEC \
+   "%{fpie|pie|fPIE: \
+      %{mdynamic-no-pic: %n'-mdynamic-no-pic' overrides '-pie', '-fpie' or '-fPIE'; \
+       :-pie}}"
+Index: b/src/gcc/config/mips/gnu-user.h
+===================================================================
+--- a/src/gcc/config/mips/gnu-user.h
++++ b/src/gcc/config/mips/gnu-user.h
+@@ -100,7 +100,7 @@ along with GCC; see the file COPYING3.
+ #ifdef HAVE_AS_NO_SHARED
+ /* Default to -mno-shared for non-PIC.  */
+ # define NO_SHARED_SPECS \
+-  " %{mshared|mno-shared|fpic|fPIC|fpie|fPIE:;:-mno-shared}"
++  " %{mshared|mno-shared:;:%{" NO_FPIE_AND_FPIC_SPEC ":-mno-shared}}"
+ #else
+ # define NO_SHARED_SPECS ""
+ #endif
+Index: b/src/gcc/config/mips/vxworks.h
+===================================================================
+--- a/src/gcc/config/mips/vxworks.h
++++ b/src/gcc/config/mips/vxworks.h
+@@ -70,7 +70,7 @@ VXWORKS_LINK_SPEC
+ #define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER
+ 
+ #undef SUBTARGET_ASM_SPEC
+-#define SUBTARGET_ASM_SPEC "%{mrtp:%{fPIC|fpic:-mvxworks-pic}}"
++#define SUBTARGET_ASM_SPEC "%{mrtp:%{" FPIC_SPEC ":-mvxworks-pic}}"
+ 
+ #undef SUBTARGET_OVERRIDE_OPTIONS
+ #define SUBTARGET_OVERRIDE_OPTIONS VXWORKS_OVERRIDE_OPTIONS
+Index: b/src/gcc/config/openbsd.h
+===================================================================
+--- a/src/gcc/config/openbsd.h
++++ b/src/gcc/config/openbsd.h
+@@ -126,7 +126,7 @@ while (0)
+    still uses a special flavor of gas that needs to be told when generating 
+    pic code.  */
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
++#define ASM_SPEC "%{" FPIE1_OR_FPIC1_SPEC ":-k} %{" FPIE2_OR_FPIC2_SPEC ":-k -K}"
+ #endif
+ 
+ /* Since we use gas, stdin -> - is a good idea.  */
+Index: b/src/gcc/config/vax/linux.h
+===================================================================
+--- a/src/gcc/config/vax/linux.h
++++ b/src/gcc/config/vax/linux.h
+@@ -32,7 +32,7 @@ along with GCC; see the file COPYING3.
+ #define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
+ 
+ #undef ASM_SPEC
+-#define ASM_SPEC "%{fpic|fPIC:-k}"
++#define ASM_SPEC "%{" FPIC_SPEC ":-k}"
+ 
+ #undef LINK_SPEC
+ #define LINK_SPEC \
--- gcc-5-5.4.0.orig/debian/patches/gcc-d-lang.diff
+++ gcc-5-5.4.0/debian/patches/gcc-d-lang.diff
@@ -0,0 +1,251 @@
+# DP: Add D options and specs for the gcc driver.
+
+Index: b/src/gcc/d/lang-specs.h
+===================================================================
+--- /dev/null
++++ b/src/gcc/d/lang-specs.h
+@@ -0,0 +1,31 @@
++/* lang-specs.h -- D frontend for GCC.
++   Copyright (C) 2011, 2012 Free Software Foundation, Inc.
++
++   GCC is free software; you can redistribute it and/or modify it under
++   the terms of the GNU General Public License as published by the Free
++   Software Foundation; either version 3, or (at your option) any later
++   version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or
++   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++   for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.
++*/
++
++/* %{!M} probably doesn't make sense because we would need
++   to do that -- -MD and -MMD doesn't sound like a plan for D.... */
++
++{".d", "@d", 0, 1, 0 },
++{".D", "@d", 0, 1, 0 },
++{".dd", "@d", 0, 1, 0 },
++{".DD", "@d", 0, 1, 0 },
++{".di", "@d", 0, 1, 0 },
++{".DI", "@d", 0, 1, 0 },
++{"@d",
++  "%{!E:cc1d %i %(cc1_options) %(cc1d) %I %{nostdinc*} %{+e*} %{I*} %{J*}\
++    %{M} %{MM} %{!fsyntax-only:%(invoke_as)}}", 0, 1, 0 },
++
+Index: b/src/gcc/d/lang.opt
+===================================================================
+--- /dev/null
++++ b/src/gcc/d/lang.opt
+@@ -0,0 +1,208 @@
++; GDC -- D front-end for GCC
++; Copyright (C) 2011, 2012 Free Software Foundation, Inc.
++;
++; This program is free software; you can redistribute it and/or modify
++; it under the terms of the GNU General Public License as published by
++; the Free Software Foundation; either version 2 of the License, or
++; (at your option) any later version.
++;
++; This program is distributed in the hope that it will be useful,
++; but WITHOUT ANY WARRANTY; without even the implied warranty of
++; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++; GNU General Public License for more details.
++;
++; You should have received a copy of the GNU General Public License
++; along with GCC; see the file COPYING3.  If not see
++; <http://www.gnu.org/licenses/>.
++
++Language
++D
++
++debuglib=
++Driver Joined
++Debug library to use instead of phobos
++
++defaultlib=
++Driver Joined
++Default library to use instead of phobos
++
++fassert
++D
++Permit the use of the assert keyword
++
++; For D: defaults to on
++fbounds-check
++D
++Generate code to check bounds before indexing arrays
++
++fbuiltin
++D Var(flag_no_builtin, 0)
++Recognize built-in functions
++
++fdebug
++D
++Compile in debug code
++
++fdebug=
++D Joined RejectNegative
++-fdebug,-fdebug=<level>,-fdebug=<ident> Compile in debug code, code <= level, or code identified by ident
++
++fdeps=
++D Joined RejectNegative
++-fdeps=<filename> Write module dependencies to filename
++
++fdoc
++D
++Generate documentation
++
++fdoc-dir=
++D Joined RejectNegative
++-fdoc-dir=<docdir> Write documentation file to docdir directory
++
++fdoc-file=
++D Joined RejectNegative
++-fdoc-file=<filename> Write documentation file to filename
++
++fdoc-inc=
++D Joined RejectNegative
++-fdoc-inc=<filename> Include a Ddoc macro file
++
++fdump-source
++D RejectNegative
++Dump decoded UTF-8 text and source from HTML
++
++fd-verbose
++D
++Print information about D language processing to stdout
++
++fd-vtls
++D
++List all variables going into thread local storage
++
++femit-templates
++D
++-femit-templates Emit templates code and data even if the linker cannot merge multiple copies
++
++fignore-unknown-pragmas
++D
++Ignore unsupported pragmas
++
++fin
++D
++Generate runtime code for in() contracts
++
++fintfc
++Generate D interface files
++
++fintfc-dir=
++D Joined RejectNegative
++-fintfc-dir=<dir> Write D interface files to directory <dir>
++
++fintfc-file=
++D Joined RejectNegative
++-fintfc-file=<filename> Write D interface file to <filename>
++
++finvariants
++D
++Generate runtime code for invariant()'s
++
++fmake-deps=
++D Joined RejectNegative
++-fmake-deps=<file> Write dependency output to the given file
++
++fmake-mdeps=
++D Joined RejectNegative
++Like -fmake-deps=<file> but ignore system modules
++
++femit-moduleinfo
++D
++Generate ModuleInfo struct for output module
++
++fonly=
++D Joined RejectNegative
++Process all modules specified on the command line, but only generate code for the module specified by the argument
++
++fout
++D
++Generate runtime code for out() contracts
++
++fproperty
++D
++Enforce property syntax
++
++frelease
++D
++Compile release version
++
++fsplit-dynamic-arrays
++D Var(flag_split_darrays)
++Split dynamic arrays into length and pointer when passing to functions
++
++funittest
++D
++Compile in unittest code
++
++fversion=
++D Joined RejectNegative
++-fversion=<level|ident> Compile in version code >= <level> or identified by <ident>
++
++fXf=
++D Joined RejectNegative
++-fXf=<filename> Write JSON file to <filename>
++
++imultilib
++D Joined Separate
++-imultilib <dir>	Set <dir> to be the multilib include subdirectory
++
++iprefix
++D Joined Separate
++-iprefix <path>	Specify <path> as a prefix for next two options
++
++isysroot
++D Joined Separate
++-isysroot <dir>	Set <dir> to be the system root directory
++
++isystem
++D Joined Separate
++-isystem <dir>	Add <dir> to the start of the system include path
++
++I
++D Joined Separate
++-I <dir>	Add <dir> to the end of the main include path
++
++J
++D Joined Separate
++-J<directory>	Put MODULE files in 'directory'
++
++nophoboslib
++Driver
++Do not link the standard D library in the compilation
++
++nostdinc
++D
++Do not search standard system include directories (those specified with -isystem will still be used)
++
++static-libphobos
++Driver
++Link the standard D library statically in the compilation
++
++Wall
++D
++; Documented in c.opt
++
++Wcast-result
++D Warning Var(warn_cast_result)
++Warn about casts that will produce a null or nil result
++
++Wdeprecated
++D
++; Documented in c.opt
++
++Werror
++D
++; Documented in common.opt
++
++Wunknown-pragmas
++D
++; Documented in c.opt
++
--- gcc-5-5.4.0.orig/debian/patches/gcc-default-format-security.diff
+++ gcc-5-5.4.0/debian/patches/gcc-default-format-security.diff
@@ -0,0 +1,39 @@
+# DP: Turn on -Wformat -Wformat-security by  default for C, C++, ObjC, ObjC++.
+
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -3685,6 +3685,11 @@ included in @option{-Wformat-nonliteral}
+ If @option{-Wformat} is specified, also warn if the format string
+ requires an unsigned argument and the argument is signed and vice versa.
+ 
++NOTE: In Ubuntu 8.10 and later versions this option is enabled by default
++for C, C++, ObjC, ObjC++.  To disable, use @option{-Wno-format-security},
++or disable all format warnings with @option{-Wformat=0}.  To make format
++security warnings fatal, specify @option{-Werror=format-security}.
++
+ @item -Wformat-y2k
+ @opindex Wformat-y2k
+ @opindex Wno-format-y2k
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -727,11 +727,14 @@ proper position among the other output f
+ #define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G"
+ #endif
+ 
++/* no separate spec, just shove it into the ssp default spec */
++#define FORMAT_SECURITY_SPEC "%{!Wformat:%{!Wformat=2:%{!Wformat=0:%{!Wall:-Wformat} %{!Wno-format-security:-Wformat-security}}}}"
++
+ #ifndef SSP_DEFAULT_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+-#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}}"
++#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}} " FORMAT_SECURITY_SPEC
+ #else
+-#define SSP_DEFAULT_SPEC ""
++#define SSP_DEFAULT_SPEC FORMAT_SECURITY_SPEC
+ #endif
+ #endif
+ 
--- gcc-5-5.4.0.orig/debian/patches/gcc-default-fortify-source.diff
+++ gcc-5-5.4.0/debian/patches/gcc-default-fortify-source.diff
@@ -0,0 +1,40 @@
+# DP: Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++,
+# DP: if the optimization level is > 0
+
+---
+ gcc/doc/invoke.texi          |    6 ++++++
+ gcc/c-family/c-cppbuiltin.c  |    3 +
+ 2 files changed, 9 insertions(+), 0 deletions(-)
+
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -7533,6 +7533,12 @@ also turns on the following optimization
+ Please note the warning under @option{-fgcse} about
+ invoking @option{-O2} on programs that use computed gotos.
+ 
++NOTE: In Ubuntu 8.10 and later versions, @option{-D_FORTIFY_SOURCE=2} is
++set by default, and is activated when @option{-O} is set to 2 or higher.
++This enables additional compile-time and run-time checks for several libc
++functions.  To disable, specify either @option{-U_FORTIFY_SOURCE} or
++@option{-D_FORTIFY_SOURCE=0}.
++
+ @item -O3
+ @opindex O3
+ Optimize yet more.  @option{-O3} turns on all optimizations specified
+Index: b/src/gcc/c-family/c-cppbuiltin.c
+===================================================================
+--- a/src/gcc/c-family/c-cppbuiltin.c
++++ b/src/gcc/c-family/c-cppbuiltin.c
+@@ -1171,6 +1171,10 @@ c_cpp_builtins (cpp_reader *pfile)
+   builtin_define_with_value ("__REGISTER_PREFIX__", REGISTER_PREFIX, 0);
+   builtin_define_with_value ("__USER_LABEL_PREFIX__", user_label_prefix, 0);
+ 
++  /* Fortify Source enabled by default for optimization levels > 0 */
++  if (optimize)
++    builtin_define_with_int_value ("_FORTIFY_SOURCE", 2);
++
+   /* Misc.  */
+   if (flag_gnu89_inline)
+     cpp_define (pfile, "__GNUC_GNU_INLINE__");
--- gcc-5-5.4.0.orig/debian/patches/gcc-default-relro.diff
+++ gcc-5-5.4.0/debian/patches/gcc-default-relro.diff
@@ -0,0 +1,33 @@
+# DP: Turn on -Wl,-z,relro by default.
+
+---
+ gcc/doc/invoke.texi |    3 +++
+ gcc/gcc.c           |    1 +
+ 2 files changed, 4 insertions(+), 0 deletions(-)
+
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -11424,6 +11424,9 @@ For example, @option{-Wl,-Map,output.map
+ linker.  When using the GNU linker, you can also get the same effect with
+ @option{-Wl,-Map=output.map}.
+ 
++NOTE: In Ubuntu 8.10 and later versions, for LDFLAGS, the option
++@option{-Wl,-z,relro} is used.  To disable, use @option{-Wl,-z,norelro}.
++
+ @item -u @var{symbol}
+ @opindex u
+ Pretend the symbol @var{symbol} is undefined, to force linking of
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -890,6 +890,7 @@ proper position among the other output f
+    "%{flto|flto=*:%<fcompare-debug*} \
+     %{flto} %{fno-lto} %{flto=*} %l " LINK_PIE_SPEC \
+    "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \
++   "-z relro " \
+    "%X %{o*} %{e*} %{N} %{n} %{r}\
+     %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!nostartfiles:%S}} " VTABLE_VERIFICATION_SPEC " \
+     %{static:} %{L*} %(mfwrap) %(link_libgcc) " SANITIZER_EARLY_SPEC " %o\
--- gcc-5-5.4.0.orig/debian/patches/gcc-default-ssp-strong.diff
+++ gcc-5-5.4.0/debian/patches/gcc-default-ssp-strong.diff
@@ -0,0 +1,59 @@
+# DP: Default to -fstack-protector-strong starting with Ubuntu 14.10.
+
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -732,7 +732,7 @@ proper position among the other output f
+ 
+ #ifndef SSP_DEFAULT_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+-#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}} " FORMAT_SECURITY_SPEC
++#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:%{!fstack-protector:-fstack-protector-strong}}}}} " FORMAT_SECURITY_SPEC
+ #else
+ #define SSP_DEFAULT_SPEC FORMAT_SECURITY_SPEC
+ #endif
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -10034,10 +10034,6 @@ functions with buffers larger than 8 byt
+ when a function is entered and then checked when the function exits.
+ If a guard check fails, an error message is printed and the program exits.
+ 
+-NOTE: In Ubuntu 6.10 and later versions this option is enabled by default
+-for C, C++, ObjC, ObjC++, if none of @option{-fno-stack-protector},
+-@option{-nostdlib}, nor @option{-ffreestanding} are found.
+-
+ @item -fstack-protector-all
+ @opindex fstack-protector-all
+ Like @option{-fstack-protector} except that all functions are protected.
+@@ -10058,6 +10054,11 @@ have the @code{stack_protect} attribute
+ Optimize the prologue of variadic argument functions with respect to usage of
+ those arguments.
+ 
++NOTE: In Ubuntu 14.10 and later versions,
++@option{-fstack-protector-strong} is enabled by default for C,
++C++, ObjC, ObjC++, if none of @option{-fno-stack-protector},
++@option{-nostdlib}, nor @option{-ffreestanding} are found.
++
+ @item -fsection-anchors
+ @opindex fsection-anchors
+ Try to reduce the number of symbolic address calculations by using
+@@ -10658,13 +10659,13 @@ value of a shared integer constant.  The
+ The minimum size of buffers (i.e.@: arrays) that receive stack smashing
+ protection when @option{-fstack-protection} is used.
+ 
++This default before Ubuntu 10.10 was "8". Currently it is "4", to increase
++the number of functions protected by the stack protector.
++
+ @item min-size-for-stack-sharing
+ The minimum size of variables taking part in stack slot sharing when not
+ optimizing. The default value is 32.
+ 
+-This default before Ubuntu 10.10 was "8". Currently it is "4", to increase
+-the number of functions protected by the stack protector.
+-
+ @item max-jump-thread-duplication-stmts
+ Maximum number of statements allowed in a block that needs to be
+ duplicated when threading jumps.
--- gcc-5-5.4.0.orig/debian/patches/gcc-default-ssp.diff
+++ gcc-5-5.4.0/debian/patches/gcc-default-ssp.diff
@@ -0,0 +1,214 @@
+# DP: Turn on -fstack-protector by default for C, C++, ObjC, ObjC++.
+# DP: Build libgcc using -fno-stack-protector.
+
+---
+ gcc/Makefile.in        |    2 ++
+ gcc/cp/lang-specs.h    |    6 +++---
+ gcc/doc/invoke.texi    |    4 ++++
+ gcc/gcc.c              |   18 ++++++++++++++----
+ gcc/objc/lang-specs.h  |   10 +++++-----
+ gcc/objcp/lang-specs.h |    8 ++++----
+ 6 files changed, 32 insertions(+), 16 deletions(-)
+
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -727,6 +727,14 @@ proper position among the other output f
+ #define LINK_GCC_C_SEQUENCE_SPEC "%G %L %G"
+ #endif
+ 
++#ifndef SSP_DEFAULT_SPEC
++#ifdef TARGET_LIBC_PROVIDES_SSP
++#define SSP_DEFAULT_SPEC "%{!fno-stack-protector:%{!fstack-protector-all:%{!ffreestanding:%{!nostdlib:-fstack-protector}}}}"
++#else
++#define SSP_DEFAULT_SPEC ""
++#endif
++#endif
++
+ #ifndef LINK_SSP_SPEC
+ #ifdef TARGET_LIBC_PROVIDES_SSP
+ #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \
+@@ -919,6 +927,7 @@ static const char *cc1_spec = CC1_SPEC;
+ static const char *cc1plus_spec = CC1PLUS_SPEC;
+ static const char *link_gcc_c_sequence_spec = LINK_GCC_C_SEQUENCE_SPEC;
+ static const char *link_ssp_spec = LINK_SSP_SPEC;
++static const char *ssp_default_spec = SSP_DEFAULT_SPEC;
+ static const char *asm_spec = ASM_SPEC;
+ static const char *asm_final_spec = ASM_FINAL_SPEC;
+ static const char *link_spec = LINK_SPEC;
+@@ -973,7 +982,7 @@ static const char *cpp_unique_options =
+ static const char *cpp_options =
+ "%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w}\
+  %{f*} %{g*:%{!g0:%{g*} %{!fno-working-directory:-fworking-directory}}} %{O*}\
+- %{undef} %{save-temps*:-fpch-preprocess}";
++ %{undef} %{save-temps*:-fpch-preprocess} %(ssp_default)";
+ 
+ /* This contains cpp options which are not passed when the preprocessor
+    output will be used by another program.  */
+@@ -1161,9 +1170,9 @@ static const struct compiler default_com
+       %{save-temps*|traditional-cpp|no-integrated-cpp:%(trad_capable_cpp) \
+ 	  %(cpp_options) -o %{save-temps*:%b.i} %{!save-temps*:%g.i} \n\
+ 	    cc1 -fpreprocessed %{save-temps*:%b.i} %{!save-temps*:%g.i} \
+-	  %(cc1_options)}\
++	  %(cc1_options) %(ssp_default)}\
+       %{!save-temps*:%{!traditional-cpp:%{!no-integrated-cpp:\
+-	  cc1 %(cpp_unique_options) %(cc1_options)}}}\
++	  cc1 %(cpp_unique_options) %(cc1_options) %(ssp_default)}}}\
+       %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 1},
+   {"-",
+    "%{!E:%e-E or -x required when input is from standard input}\
+@@ -1186,7 +1195,7 @@ static const struct compiler default_com
+                     %W{o*:--output-pch=%*}}%V}}}}}}", 0, 0, 0},
+   {".i", "@cpp-output", 0, 0, 0},
+   {"@cpp-output",
+-   "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
++   "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %(ssp_default) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+   {".s", "@assembler", 0, 0, 0},
+   {"@assembler",
+    "%{!M:%{!MM:%{!E:%{!S:as %(asm_debug) %(asm_options) %i %A }}}}", 0, 0, 0},
+@@ -1416,6 +1425,7 @@ static struct spec_list static_specs[] =
+   INIT_STATIC_SPEC ("cc1plus",			&cc1plus_spec),
+   INIT_STATIC_SPEC ("link_gcc_c_sequence",	&link_gcc_c_sequence_spec),
+   INIT_STATIC_SPEC ("link_ssp",			&link_ssp_spec),
++  INIT_STATIC_SPEC ("ssp_default",		&ssp_default_spec),
+   INIT_STATIC_SPEC ("endfile",			&endfile_spec),
+   INIT_STATIC_SPEC ("link",			&link_spec),
+   INIT_STATIC_SPEC ("lib",			&lib_spec),
+Index: b/src/gcc/cp/lang-specs.h
+===================================================================
+--- a/src/gcc/cp/lang-specs.h
++++ b/src/gcc/cp/lang-specs.h
+@@ -46,7 +46,7 @@ along with GCC; see the file COPYING3.
+ 		%(cpp_options) %2 -o %{save-temps*:%b.ii} %{!save-temps*:%g.ii} \n}\
+       cc1plus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.ii} %{!save-temps*:%g.ii}}\
+ 	      %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\
+-	%(cc1_options) %2\
++	%(cc1_options) %(ssp_default) %2\
+ 	%{!fsyntax-only:%{!fdump-ada-spec*:-o %g.s %{!o*:--output-pch=%i.gch}\
+         %W{o*:--output-pch=%*}}%V}}}}",
+      CPLUSPLUS_CPP_SPEC, 0, 0},
+@@ -57,11 +57,11 @@ along with GCC; see the file COPYING3.
+ 		%(cpp_options) %2 -o %{save-temps*:%b.ii} %{!save-temps*:%g.ii} \n}\
+       cc1plus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.ii} %{!save-temps*:%g.ii}}\
+ 	      %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\
+-	%(cc1_options) %2\
++	%(cc1_options) %(ssp_default) %2\
+        %{!fsyntax-only:%(invoke_as)}}}}",
+      CPLUSPLUS_CPP_SPEC, 0, 0},
+   {".ii", "@c++-cpp-output", 0, 0, 0},
+   {"@c++-cpp-output",
+    "%{!M:%{!MM:%{!E:\
+-    cc1plus -fpreprocessed %i %(cc1_options) %2\
++    cc1plus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\
+     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+Index: b/src/gcc/params.def
+===================================================================
+--- a/src/gcc/params.def
++++ b/src/gcc/params.def
+@@ -695,7 +695,7 @@ DEFPARAM (PARAM_INTEGER_SHARE_LIMIT,
+ DEFPARAM (PARAM_SSP_BUFFER_SIZE,
+ 	  "ssp-buffer-size",
+ 	  "The lower bound for a buffer to be considered for stack smashing protection",
+-	  8, 1, 0)
++	  4, 1, 0)
+ 
+ DEFPARAM (PARAM_MIN_SIZE_FOR_STACK_SHARING,
+ 	  "min-size-for-stack-sharing",
+Index: b/src/gcc/objc/lang-specs.h
+===================================================================
+--- a/src/gcc/objc/lang-specs.h
++++ b/src/gcc/objc/lang-specs.h
+@@ -29,9 +29,9 @@ along with GCC; see the file COPYING3.
+ 	%{traditional|traditional-cpp:\
+ %eGNU Objective C no longer supports traditional compilation}\
+ 	%{save-temps*|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps*:%b.mi} %{!save-temps*:%g.mi} \n\
+-	    cc1obj -fpreprocessed %{save-temps*:%b.mi} %{!save-temps*:%g.mi} %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}\
++	    cc1obj -fpreprocessed %{save-temps*:%b.mi} %{!save-temps*:%g.mi} %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}}\
+ 	%{!save-temps*:%{!no-integrated-cpp:\
+-	    cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}}\
++	    cc1obj %(cpp_unique_options) %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}}}\
+         %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+   {"@objective-c-header",
+      "%{E|M|MM:cc1obj -E %{traditional|traditional-cpp:-traditional-cpp}\
+@@ -40,18 +40,18 @@ along with GCC; see the file COPYING3.
+ 	%{traditional|traditional-cpp:\
+ %eGNU Objective C no longer supports traditional compilation}\
+ 	%{save-temps*|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps*:%b.mi} %{!save-temps*:%g.mi} \n\
+-	    cc1obj -fpreprocessed %b.mi %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++	    cc1obj -fpreprocessed %b.mi %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\
+                         -o %g.s %{!o*:--output-pch=%i.gch}\
+                         %W{o*:--output-pch=%*}%V}\
+ 	%{!save-temps*:%{!no-integrated-cpp:\
+-	    cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++	    cc1obj %(cpp_unique_options) %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\
+                         -o %g.s %{!o*:--output-pch=%i.gch}\
+                         %W{o*:--output-pch=%*}%V}}}}}", 0, 0, 0},
+   {".mi", "@objective-c-cpp-output", 0, 0, 0},
+   {"@objective-c-cpp-output",
+-     "%{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++     "%{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\
+ 			     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+   {"@objc-cpp-output",
+       "%nobjc-cpp-output is deprecated; please use objective-c-cpp-output instead\n\
+-       %{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++       %{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %(ssp_default) %{print-objc-runtime-info} %{gen-decls}\
+ 			     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+Index: b/src/gcc/objcp/lang-specs.h
+===================================================================
+--- a/src/gcc/objcp/lang-specs.h
++++ b/src/gcc/objcp/lang-specs.h
+@@ -36,7 +36,7 @@ along with GCC; see the file COPYING3.
+ 		%(cpp_options) %2 -o %{save-temps*:%b.mii} %{!save-temps*:%g.mii} \n}\
+       cc1objplus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.mii} %{!save-temps*:%g.mii}}\
+ 	      %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\
+-	%(cc1_options) %2\
++	%(cc1_options) %(ssp_default) %2\
+         -o %g.s %{!o*:--output-pch=%i.gch} %W{o*:--output-pch=%*}%V}}}",
+      CPLUSPLUS_CPP_SPEC, 0, 0},
+   {"@objective-c++",
+@@ -46,16 +46,16 @@ along with GCC; see the file COPYING3.
+ 		%(cpp_options) %2 -o %{save-temps*:%b.mii} %{!save-temps*:%g.mii} \n}\
+       cc1objplus %{save-temps*|no-integrated-cpp:-fpreprocessed %{save-temps*:%b.mii} %{!save-temps*:%g.mii}}\
+ 	      %{!save-temps*:%{!no-integrated-cpp:%(cpp_unique_options)}}\
+-	%(cc1_options) %2\
++	%(cc1_options) %(ssp_default) %2\
+        %{!fsyntax-only:%(invoke_as)}}}}",
+      CPLUSPLUS_CPP_SPEC, 0, 0},
+   {".mii", "@objective-c++-cpp-output", 0, 0, 0},
+   {"@objective-c++-cpp-output",
+    "%{!M:%{!MM:%{!E:\
+-    cc1objplus -fpreprocessed %i %(cc1_options) %2\
++    cc1objplus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\
+     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+   {"@objc++-cpp-output",
+    "%nobjc++-cpp-output is deprecated; please use objective-c++-cpp-output instead\n\
+     %{!M:%{!MM:%{!E:\
+-    cc1objplus -fpreprocessed %i %(cc1_options) %2\
++    cc1objplus -fpreprocessed %i %(cc1_options) %(ssp_default) %2\
+     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -10029,6 +10029,10 @@ functions with buffers larger than 8 byt
+ when a function is entered and then checked when the function exits.
+ If a guard check fails, an error message is printed and the program exits.
+ 
++NOTE: In Ubuntu 6.10 and later versions this option is enabled by default
++for C, C++, ObjC, ObjC++, if none of @option{-fno-stack-protector},
++@option{-nostdlib}, nor @option{-ffreestanding} are found.
++
+ @item -fstack-protector-all
+ @opindex fstack-protector-all
+ Like @option{-fstack-protector} except that all functions are protected.
+@@ -10653,6 +10657,9 @@ protection when @option{-fstack-protecti
+ The minimum size of variables taking part in stack slot sharing when not
+ optimizing. The default value is 32.
+ 
++This default before Ubuntu 10.10 was "8". Currently it is "4", to increase
++the number of functions protected by the stack protector.
++
+ @item max-jump-thread-duplication-stmts
+ Maximum number of statements allowed in a block that needs to be
+ duplicated when threading jumps.
--- gcc-5-5.4.0.orig/debian/patches/gcc-driver-extra-langs-linaro.diff
+++ gcc-5-5.4.0/debian/patches/gcc-driver-extra-langs-linaro.diff
@@ -0,0 +1,22 @@
+# DP: Add options and specs for languages that are not built from a source
+# DP: (but built from separate sources).
+
+---
+ gcc/Makefile.in |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -527,8 +527,8 @@ xm_include_list=@xm_include_list@
+ xm_defines=@xm_defines@
+ lang_checks=
+ lang_checks_parallelized=
+-lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt
+-lang_specs_files=@lang_specs_files@
++lang_opt_files=$(sort @lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang.opt))
++lang_specs_files=$(sort @lang_specs_files@ $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang-specs.h))
+ lang_tree_files=@lang_tree_files@
+ target_cpu_default=@target_cpu_default@
+ OBJC_BOEHM_GC=@objc_boehm_gc@
--- gcc-5-5.4.0.orig/debian/patches/gcc-driver-extra-langs.diff
+++ gcc-5-5.4.0/debian/patches/gcc-driver-extra-langs.diff
@@ -0,0 +1,22 @@
+# DP: Add options and specs for languages that are not built from a source
+# DP: (but built from separate sources).
+
+---
+ gcc/Makefile.in |    4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -531,8 +531,8 @@ lang_checks_parallelized=
+ # It doesn't make sense to try e.g. 128 goals for small testsuites
+ # like objc or go.
+ check_gcc_parallelize=10000
+-lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt
+-lang_specs_files=@lang_specs_files@
++lang_opt_files=$(sort @lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang.opt))
++lang_specs_files=$(sort @lang_specs_files@ $(foreach lang,$(subst ada,ada/gcc-interface,$(debian_extra_langs)),$(srcdir)/$(lang)/lang-specs.h))
+ lang_tree_files=@lang_tree_files@
+ target_cpu_default=@target_cpu_default@
+ OBJC_BOEHM_GC=@objc_boehm_gc@
--- gcc-5-5.4.0.orig/debian/patches/gcc-gfdl-build.diff
+++ gcc-5-5.4.0/debian/patches/gcc-gfdl-build.diff
@@ -0,0 +1,39 @@
+# DP: Build a dummy s-tm-texi without access to the texinfo sources
+
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -2249,30 +2249,8 @@ s-tm-texi: $(srcdir)/doc/../doc/tm.texi
+ # \r is not portable to Solaris tr, therefore we have a special
+ # case for ASCII.  We use \r for other encodings like EBCDIC.
+ s-tm-texi: build/genhooks$(build_exeext) $(srcdir)/doc/tm.texi.in
+-	$(RUN_GEN) build/genhooks$(build_exeext) -d \
+-			$(srcdir)/doc/tm.texi.in > tmp-tm.texi
+-	case `echo X|tr X '\101'` in \
+-	  A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \
+-	  *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \
+-	esac
+-	mv tmp2-tm.texi tmp-tm.texi
+-	$(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi
+-	@if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \
+-	  $(STAMP) $@; \
+-	elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \
+-	  && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \
+-	    || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \
+-	    || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \
+-	  ); then \
+-	  echo >&2 ; \
+-	  echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \
+-	  false; \
+-	else \
+-	  echo >&2 ; \
+-	  echo Verify that you have permission to grant a GFDL license for all >&2 ; \
+-	  echo new text in tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \
+-	  false; \
+-	fi
++	cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi
++	$(STAMP) $@
+ 
+ gimple-match.c: s-match gimple-match-head.c ; @true
+ generic-match.c: s-match generic-match-head.c ; @true
--- gcc-5-5.4.0.orig/debian/patches/gcc-hash-style-both.diff
+++ gcc-5-5.4.0/debian/patches/gcc-hash-style-both.diff
@@ -0,0 +1,167 @@
+# DP: Link using --hash-style=both (alpha, amd64, armel, armhf, ia64, i386, powerpc, ppc64, s390, sparc)
+
+2006-07-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/i386/linux.h (LINK_SPEC): Add --hash-style=both.
+	* config/i386/linux64.h (LINK_SPEC): Likewise.
+	* config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise.
+	* config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32,
+	LINK_OS_LINUX_SPEC64): Likewise.
+	* config/s390/linux.h (LINK_SPEC): Likewise.
+	* config/ia64/linux.h (LINK_SPEC): Likewise.
+	* config/sparc/linux.h (LINK_SPEC): Likewise.
+	* config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC,
+	LINK_ARCH64_SPEC): Likewise.
+	* config/alpha/linux-elf.h (LINK_SPEC): Likewise.
+
+2009-12-21  Matthias Klose  <doko@ubuntu.com>
+
+	* config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=both.
+
+2012-11-17  Matthias Klose  <doko@ubuntu.com>
+
+	* config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=both.
+	
+---
+ gcc/config/alpha/linux-elf.h |    2 +-
+ gcc/config/i386/linux.h      |    2 +-
+ gcc/config/i386/linux64.h    |    2 +-
+ gcc/config/ia64/linux.h      |    2 +-
+ gcc/config/rs6000/linux64.h  |    4 ++--
+ gcc/config/rs6000/sysv4.h    |    2 +-
+ gcc/config/s390/linux.h      |    2 +-
+ gcc/config/sparc/linux.h     |    2 +-
+ 8 files changed, 9 insertions(+), 9 deletions(-)
+
+Index: b/src/gcc/config/alpha/linux-elf.h
+===================================================================
+--- a/src/gcc/config/alpha/linux-elf.h
++++ b/src/gcc/config/alpha/linux-elf.h
+@@ -37,7 +37,7 @@
+ 
+ #define ELF_DYNAMIC_LINKER	GNU_USER_DYNAMIC_LINKER
+ 
+-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax}		\
++#define LINK_SPEC "-m elf64alpha --hash-style=both %{G*} %{relax:-relax}	\
+   %{O*:-O3} %{!O*:-O1}						\
+   %{shared:-shared}						\
+   %{!shared:							\
+Index: b/src/gcc/config/ia64/linux.h
+===================================================================
+--- a/src/gcc/config/ia64/linux.h
++++ b/src/gcc/config/ia64/linux.h
+@@ -58,7 +58,7 @@
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
+ 
+ #undef LINK_SPEC
+-#define LINK_SPEC "\
++#define LINK_SPEC " --hash-style=both \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -385,11 +385,11 @@
+ 					   " -m elf64ppc")
+ #endif
+ 
+-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=both %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}"
+ 
+-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=both %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}"
+ 
+Index: b/src/gcc/config/rs6000/sysv4.h
+===================================================================
+--- a/src/gcc/config/rs6000/sysv4.h
++++ b/src/gcc/config/rs6000/sysv4.h
+@@ -788,7 +788,7 @@
+ #define GNU_USER_DYNAMIC_LINKER \
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER)
+ 
+-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
+ 
+Index: b/src/gcc/config/s390/linux.h
+===================================================================
+--- a/src/gcc/config/s390/linux.h
++++ b/src/gcc/config/s390/linux.h
+@@ -65,7 +65,7 @@
+ 
+ #undef  LINK_SPEC
+ #define LINK_SPEC \
+-  "%{m31:-m elf_s390}%{m64:-m elf64_s390} \
++  "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=both \
+    %{shared:-shared} \
+    %{!shared: \
+       %{static:-static} \
+Index: b/src/gcc/config/sparc/linux.h
+===================================================================
+--- a/src/gcc/config/sparc/linux.h
++++ b/src/gcc/config/sparc/linux.h
+@@ -86,7 +86,7 @@
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+ 
+ #undef  LINK_SPEC
+-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
++#define LINK_SPEC "-m elf32_sparc --hash-style=both %{shared:-shared} \
+   %{!mno-relax:%{!r:-relax}} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/arm/linux-elf.h
+===================================================================
+--- a/src/gcc/config/arm/linux-elf.h
++++ b/src/gcc/config/arm/linux-elf.h
+@@ -67,6 +67,7 @@
+      %{rdynamic:-export-dynamic} \
+      -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \
+    -X \
++   --hash-style=both \
+    %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ 
+Index: b/src/gcc/config/i386/gnu-user.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user.h
++++ b/src/gcc/config/i386/gnu-user.h
+@@ -74,7 +74,7 @@
+   { "link_emulation", GNU_USER_LINK_EMULATION },\
+   { "dynamic_linker", GNU_USER_DYNAMIC_LINKER }
+ 
+-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \
++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=both %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+       %{rdynamic:-export-dynamic} \
+Index: b/src/gcc/config/i386/gnu-user64.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user64.h
++++ b/src/gcc/config/i386/gnu-user64.h
+@@ -56,6 +56,7 @@
+                   "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \
+                    %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \
+                    %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \
++  --hash-style=both \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/aarch64/aarch64-linux.h
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64-linux.h
++++ b/src/gcc/config/aarch64/aarch64-linux.h
+@@ -24,6 +24,7 @@
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1"
+ 
+ #define LINUX_TARGET_LINK_SPEC  "%{h*}		\
++   --hash-style=both				\
+    %{static:-Bstatic}				\
+    %{shared:-shared}				\
+    %{symbolic:-Bsymbolic}			\
--- gcc-5-5.4.0.orig/debian/patches/gcc-hash-style-gnu.diff
+++ gcc-5-5.4.0/debian/patches/gcc-hash-style-gnu.diff
@@ -0,0 +1,168 @@
+# DP: Link using --hash-style=gnu (aarch64, alpha, amd64, armel, armhf, ia64,
+# DP: i386, powerpc, ppc64, s390, sparc)
+
+2006-07-11  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/i386/linux.h (LINK_SPEC): Add --hash-style=gnu.
+	* config/i386/linux64.h (LINK_SPEC): Likewise.
+	* config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise.
+	* config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32,
+	LINK_OS_LINUX_SPEC64): Likewise.
+	* config/s390/linux.h (LINK_SPEC): Likewise.
+	* config/ia64/linux.h (LINK_SPEC): Likewise.
+	* config/sparc/linux.h (LINK_SPEC): Likewise.
+	* config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC,
+	LINK_ARCH64_SPEC): Likewise.
+	* config/alpha/linux-elf.h (LINK_SPEC): Likewise.
+
+2009-12-21  Matthias Klose  <doko@ubuntu.com>
+
+	* config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=gnu.
+
+2012-11-17  Matthias Klose  <doko@ubuntu.com>
+
+	* config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=gnu.
+	
+---
+ gcc/config/alpha/linux-elf.h |    2 +-
+ gcc/config/i386/linux.h      |    2 +-
+ gcc/config/i386/linux64.h    |    2 +-
+ gcc/config/ia64/linux.h      |    2 +-
+ gcc/config/rs6000/linux64.h  |    4 ++--
+ gcc/config/rs6000/sysv4.h    |    2 +-
+ gcc/config/s390/linux.h      |    2 +-
+ gcc/config/sparc/linux.h     |    2 +-
+ 8 files changed, 9 insertions(+), 9 deletions(-)
+
+Index: b/src/gcc/config/alpha/linux-elf.h
+===================================================================
+--- a/src/gcc/config/alpha/linux-elf.h
++++ b/src/gcc/config/alpha/linux-elf.h
+@@ -37,7 +37,7 @@ along with GCC; see the file COPYING3.
+ 
+ #define ELF_DYNAMIC_LINKER	GNU_USER_DYNAMIC_LINKER
+ 
+-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax}		\
++#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax}	\
+   %{O*:-O3} %{!O*:-O1}						\
+   %{shared:-shared}						\
+   %{!shared:							\
+Index: b/src/gcc/config/ia64/linux.h
+===================================================================
+--- a/src/gcc/config/ia64/linux.h
++++ b/src/gcc/config/ia64/linux.h
+@@ -58,7 +58,7 @@ do {						\
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
+ 
+ #undef LINK_SPEC
+-#define LINK_SPEC "\
++#define LINK_SPEC " --hash-style=gnu \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -396,11 +396,11 @@ extern int dot_symbols;
+ 					   " -m elf64ppc")
+ #endif
+ 
+-#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " --hash-style=gnu %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}"
+ 
+-#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC64 LINK_OS_LINUX_EMUL64 " --hash-style=gnu %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}"
+ 
+Index: b/src/gcc/config/rs6000/sysv4.h
+===================================================================
+--- a/src/gcc/config/rs6000/sysv4.h
++++ b/src/gcc/config/rs6000/sysv4.h
+@@ -769,7 +769,7 @@ ENDIAN_SELECT(" -mbig", " -mlittle", DEF
+ #define GNU_USER_DYNAMIC_LINKER \
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER)
+ 
+-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \
++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \
+   %{rdynamic:-export-dynamic} \
+   -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}"
+ 
+Index: b/src/gcc/config/s390/linux.h
+===================================================================
+--- a/src/gcc/config/s390/linux.h
++++ b/src/gcc/config/s390/linux.h
+@@ -65,7 +65,7 @@ along with GCC; see the file COPYING3.
+ 
+ #undef  LINK_SPEC
+ #define LINK_SPEC \
+-  "%{m31:-m elf_s390}%{m64:-m elf64_s390} \
++  "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \
+    %{shared:-shared} \
+    %{!shared: \
+       %{static:-static} \
+Index: b/src/gcc/config/sparc/linux.h
+===================================================================
+--- a/src/gcc/config/sparc/linux.h
++++ b/src/gcc/config/sparc/linux.h
+@@ -86,7 +86,7 @@ extern const char *host_detect_local_cpu
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+ 
+ #undef  LINK_SPEC
+-#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu %{shared:-shared} \
+   %{!mno-relax:%{!r:-relax}} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/arm/linux-elf.h
+===================================================================
+--- a/src/gcc/config/arm/linux-elf.h
++++ b/src/gcc/config/arm/linux-elf.h
+@@ -72,6 +72,7 @@
+      %{rdynamic:-export-dynamic} \
+      %{!shared:-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \
+    -X \
++   --hash-style=gnu \
+    %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
+    SUBTARGET_EXTRA_LINK_SPEC
+ 
+Index: b/src/gcc/config/i386/gnu-user.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user.h
++++ b/src/gcc/config/i386/gnu-user.h
+@@ -74,7 +74,7 @@ along with GCC; see the file COPYING3.
+   { "link_emulation", GNU_USER_LINK_EMULATION },\
+   { "dynamic_linker", GNU_USER_DYNAMIC_LINKER }
+ 
+-#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) %{shared:-shared} \
++#define GNU_USER_TARGET_LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+       %{rdynamic:-export-dynamic} \
+Index: b/src/gcc/config/i386/gnu-user64.h
+===================================================================
+--- a/src/gcc/config/i386/gnu-user64.h
++++ b/src/gcc/config/i386/gnu-user64.h
+@@ -56,6 +56,7 @@ see the files COPYING3 and COPYING.RUNTI
+                   "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \
+                    %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \
+                    %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \
++  --hash-style=gnu \
+   %{shared:-shared} \
+   %{!shared: \
+     %{!static: \
+Index: b/src/gcc/config/aarch64/aarch64-linux.h
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64-linux.h
++++ b/src/gcc/config/aarch64/aarch64-linux.h
+@@ -32,6 +32,7 @@
+ #define CPP_SPEC "%{pthread:-D_REENTRANT}"
+ 
+ #define LINUX_TARGET_LINK_SPEC  "%{h*}		\
++   --hash-style=gnu				\
+    %{static:-Bstatic}				\
+    %{shared:-shared}				\
+    %{symbolic:-Bsymbolic}			\
--- gcc-5-5.4.0.orig/debian/patches/gcc-ia64-bootstrap-ignore.diff
+++ gcc-5-5.4.0/debian/patches/gcc-ia64-bootstrap-ignore.diff
@@ -0,0 +1,17 @@
+# DP: Ignore bootstrap comparison failure on ia64. Filed upstream as
+# DP: PR middle-end/65874.
+
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -3550,6 +3550,9 @@ fi
+ 
+ compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/*"
+ case "$target" in
++  ia64-*linux-gnu)
++    compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | gcc/ira.o"
++    ;;
+   hppa*64*-*-hpux*) ;;
+   hppa*-*-hpux*) compare_exclusions="gcc/cc*-checksum\$(objext) | */libgcc/lib2funcs* | gcc/ada/*tools/*" ;;
+   powerpc*-ibm-aix*) compare_exclusions="gcc/cc*-checksum\$(objext) | gcc/ada/*tools/* | *libgomp*\$(objext)" ;;
--- gcc-5-5.4.0.orig/debian/patches/gcc-ice-apport.diff
+++ gcc-5-5.4.0/debian/patches/gcc-ice-apport.diff
@@ -0,0 +1,24 @@
+# DP: Report an ICE to apport (if apport is available
+# DP: and the environment variable GCC_NOAPPORT is not set)
+
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -6658,6 +6658,16 @@ do_report_bug (const char **new_argv, co
+ 	  fflush(stderr);
+ 	  free(cmd);
+ 	}
++      if (!getenv ("GCC_NOAPPORT")
++	  && !access ("/usr/share/apport/gcc_ice_hook", R_OK | X_OK))
++	{
++	  char *cmd = XNEWVEC (char, 50 + strlen (*out_file)
++			       + strlen (new_argv[0]));
++	  sprintf (cmd, "/usr/share/apport/gcc_ice_hook %s %s",
++		   new_argv[0], *out_file);
++	  system (cmd);
++	  free (cmd);
++	}
+       /* Make sure it is not deleted.  */
+       free (*out_file);
+       *out_file = NULL;
--- gcc-5-5.4.0.orig/debian/patches/gcc-ice-dump.diff
+++ gcc-5-5.4.0/debian/patches/gcc-ice-dump.diff
@@ -0,0 +1,41 @@
+# DP: For ICEs, dump the preprocessed source file to stderr
+# DP: when in a distro build environment.
+
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -2985,7 +2985,8 @@ execute (void)
+ 	    /* For ICEs in cc1, cc1obj, cc1plus see if it is
+ 	       reproducible or not.  */
+ 	    const char *p;
+-	    if (flag_report_bug
++	    char *deb_build_options = getenv("DEB_BUILD_OPTIONS");
++	    if ((flag_report_bug || deb_build_options)
+ 		&& WEXITSTATUS (status) == ICE_EXIT_CODE
+ 		&& i == 0
+ 		&& (p = strrchr (commands[0].argv[0], DIR_SEPARATOR))
+@@ -6640,8 +6641,23 @@ do_report_bug (const char **new_argv, co
+ 
+   if (status == ATTEMPT_STATUS_SUCCESS)
+     {
++      char *deb_build_options = getenv("DEB_BUILD_OPTIONS");
++
+       fnotice (stderr, "Preprocessed source stored into %s file,"
+ 	       " please attach this to your bugreport.\n", *out_file);
++      if (deb_build_options)
++	{
++	  char *cmd = XNEWVEC (char, 50 + strlen (*out_file));
++
++	  sprintf(cmd, "/bin/cat %s >&2", *out_file);
++	  fprintf(stderr, "=== BEGIN GCC DUMP ===\n");
++	  fflush(stderr);
++	  system(cmd);
++	  fflush(stderr);
++	  fprintf(stderr, "=== END GCC DUMP ===\n");
++	  fflush(stderr);
++	  free(cmd);
++	}
+       /* Make sure it is not deleted.  */
+       free (*out_file);
+       *out_file = NULL;
--- gcc-5-5.4.0.orig/debian/patches/gcc-ignore-fdebug-prefix-map-in-producer-string.diff
+++ gcc-5-5.4.0/debian/patches/gcc-ignore-fdebug-prefix-map-in-producer-string.diff
@@ -0,0 +1,40 @@
+# DP: Ignore -fdebug-prefix-map in producer string (taken from the trunk)
+
+From: bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Fri, 18 Dec 2015 19:48:26 +0000
+Subject: [PATCH] Ignore -fdebug-prefix-map in producer string (by Daniel Kahn
+ Gillmor)
+
+gcc/
+	* dwarf2out.c (gen_producer_string): Ignore -fdebug-prefix-map.
+
+gcc/testsuite/
+	* gcc.dg/debug/dwarf2/prod-options.c: New test.
+
+
+
+--- a/src/gcc/dwarf2out.c
++++ b/src/gcc/dwarf2out.c
+@@ -21498,6 +21498,7 @@ gen_producer_string (void)
+       case OPT_fpreprocessed:
+       case OPT_fltrans_output_list_:
+       case OPT_fresolution_:
++      case OPT_fdebug_prefix_map_:
+ 	/* Ignore these.  */
+ 	continue;
+       default:
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/prod-options.c
+@@ -0,0 +1,12 @@
++/* Verify that the DW_AT_producer does not contain certain compiler options
++   such as -fdebug-prefix-map=; this is undesirable since path names make
++   the build not reproducible.  Other skipped options could be tested here
++   as well.  */
++/* { dg-do compile } */
++/* { dg-options "-O2 -gdwarf -dA -fdebug-prefix-map=a=b" } */
++/* { dg-final { scan-assembler "DW_AT_producer: \"GNU C" } } */
++/* { dg-final { scan-assembler-not "debug-prefix-map" } } */
++
++void func (void)
++{
++}
--- gcc-5-5.4.0.orig/debian/patches/gcc-linaro-doc.diff
+++ gcc-5-5.4.0/debian/patches/gcc-linaro-doc.diff
@@ -0,0 +1,7521 @@
+# DP: Changes for the Linaro 5-2016.06 snapshot (documentation).
+
+--- a/src/gcc/doc/extend.texi
++++ b/src/gcc/doc/extend.texi
+@@ -2147,62 +2147,84 @@ the enclosing block.
+ @section Declaring Attributes of Functions
+ @cindex function attributes
+ @cindex declaring attributes of functions
+-@cindex functions that never return
+-@cindex functions that return more than once
+-@cindex functions that have no side effects
+-@cindex functions in arbitrary sections
+-@cindex functions that behave like malloc
+ @cindex @code{volatile} applied to function
+ @cindex @code{const} applied to function
+-@cindex functions with @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style arguments
+-@cindex functions with non-null pointer arguments
+-@cindex functions that are passed arguments in registers on x86-32
+-@cindex functions that pop the argument stack on x86-32
+-@cindex functions that do not pop the argument stack on x86-32
+-@cindex functions that have different compilation options on x86-32
+-@cindex functions that have different optimization options
+-@cindex functions that are dynamically resolved
+ 
+-In GNU C, you declare certain things about functions called in your program
+-which help the compiler optimize function calls and check your code more
+-carefully.
+-
+-The keyword @code{__attribute__} allows you to specify special
+-attributes when making a declaration.  This keyword is followed by an
+-attribute specification inside double parentheses.  The following
+-attributes are currently defined for functions on all targets:
+-@code{aligned}, @code{alloc_size}, @code{alloc_align}, @code{assume_aligned},
+-@code{noreturn}, @code{returns_twice}, @code{noinline}, @code{noclone},
+-@code{no_icf},
+-@code{always_inline}, @code{flatten}, @code{pure}, @code{const},
+-@code{nothrow}, @code{sentinel}, @code{format}, @code{format_arg},
+-@code{no_instrument_function}, @code{no_split_stack},
+-@code{section}, @code{constructor},
+-@code{destructor}, @code{used}, @code{unused}, @code{deprecated},
+-@code{weak}, @code{malloc}, @code{alias}, @code{ifunc},
+-@code{warn_unused_result}, @code{nonnull},
+-@code{returns_nonnull}, @code{gnu_inline},
+-@code{externally_visible}, @code{hot}, @code{cold}, @code{artificial},
+-@code{no_sanitize_address}, @code{no_address_safety_analysis},
+-@code{no_sanitize_thread},
+-@code{no_sanitize_undefined}, @code{no_reorder}, @code{bnd_legacy},
+-@code{bnd_instrument}, @code{stack_protect},
+-@code{error} and @code{warning}.
+-Several other attributes are defined for functions on particular
+-target systems.  Other attributes, including @code{section} are
+-supported for variables declarations (@pxref{Variable Attributes}),
+-labels (@pxref{Label Attributes})
+-and for types (@pxref{Type Attributes}).
++In GNU C, you can use function attributes to declare certain things
++about functions called in your program which help the compiler
++optimize calls and check your code more carefully.  For example, you
++can use attributes to declare that a function never returns
++(@code{noreturn}), returns a value depending only on its arguments
++(@code{pure}), or has @code{printf}-style arguments (@code{format}).
++
++You can also use attributes to control memory placement, code
++generation options or call/return conventions within the function
++being annotated.  Many of these attributes are target-specific.  For
++example, many targets support attributes for defining interrupt
++handler functions, which typically must follow special register usage
++and return conventions.
++
++Function attributes are introduced by the @code{__attribute__} keyword
++on a declaration, followed by an attribute specification inside double
++parentheses.  You can specify multiple attributes in a declaration by
++separating them by commas within the double parentheses or by
++immediately following an attribute declaration with another attribute
++declaration.  @xref{Attribute Syntax}, for the exact rules on
++attribute syntax and placement.
++
++GCC also supports attributes on
++variable declarations (@pxref{Variable Attributes}),
++labels (@pxref{Label Attributes}),
++and types (@pxref{Type Attributes}).
++
++There is some overlap between the purposes of attributes and pragmas
++(@pxref{Pragmas,,Pragmas Accepted by GCC}).  It has been
++found convenient to use @code{__attribute__} to achieve a natural
++attachment of attributes to their corresponding declarations, whereas
++@code{#pragma} is of use for compatibility with other compilers
++or constructs that do not naturally form part of the grammar.
+ 
++In addition to the attributes documented here,
+ GCC plugins may provide their own attributes.
+ 
+-You may also specify attributes with @samp{__} preceding and following
+-each keyword.  This allows you to use them in header files without
+-being concerned about a possible macro of the same name.  For example,
+-you may use @code{__noreturn__} instead of @code{noreturn}.
++@menu
++* Common Function Attributes::
++* AArch64 Function Attributes::
++* ARC Function Attributes::
++* ARM Function Attributes::
++* AVR Function Attributes::
++* Blackfin Function Attributes::
++* CR16 Function Attributes::
++* Epiphany Function Attributes::
++* H8/300 Function Attributes::
++* IA-64 Function Attributes::
++* M32C Function Attributes::
++* M32R/D Function Attributes::
++* m68k Function Attributes::
++* MCORE Function Attributes::
++* MeP Function Attributes::
++* MicroBlaze Function Attributes::
++* Microsoft Windows Function Attributes::
++* MIPS Function Attributes::
++* MSP430 Function Attributes::
++* NDS32 Function Attributes::
++* Nios II Function Attributes::
++* PowerPC Function Attributes::
++* RL78 Function Attributes::
++* RX Function Attributes::
++* S/390 Function Attributes::
++* SH Function Attributes::
++* SPU Function Attributes::
++* Symbian OS Function Attributes::
++* Visium Function Attributes::
++* x86 Function Attributes::
++* Xstormy16 Function Attributes::
++@end menu
+ 
+-@xref{Attribute Syntax}, for details of the exact syntax for using
+-attributes.
++@node Common Function Attributes
++@subsection Common Function Attributes
++
++The following attributes are supported on most targets.
+ 
+ @table @code
+ @c Keep this table alphabetized by attribute name.  Treat _ as space.
+@@ -2222,7 +2244,8 @@ defines @samp{f} to be a weak alias for @samp{__f}.  In C++, the
+ mangled name for the target must be used.  It is an error if @samp{__f}
+ is not defined in the same translation unit.
+ 
+-Not all target machines support this attribute.
++This attribute requires assembler and object file support,
++and may not be available on all targets.
+ 
+ @item aligned (@var{alignment})
+ @cindex @code{aligned} function attribute
+@@ -2245,31 +2268,6 @@ further information.
+ The @code{aligned} attribute can also be used for variables and fields
+ (@pxref{Variable Attributes}.)
+ 
+-@item alloc_size
+-@cindex @code{alloc_size} function attribute
+-The @code{alloc_size} attribute is used to tell the compiler that the
+-function return value points to memory, where the size is given by
+-one or two of the functions parameters.  GCC uses this
+-information to improve the correctness of @code{__builtin_object_size}.
+-
+-The function parameter(s) denoting the allocated size are specified by
+-one or two integer arguments supplied to the attribute.  The allocated size
+-is either the value of the single function argument specified or the product
+-of the two function arguments specified.  Argument numbering starts at
+-one.
+-
+-For instance,
+-
+-@smallexample
+-void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)))
+-void* my_realloc(void*, size_t) __attribute__((alloc_size(2)))
+-@end smallexample
+-
+-@noindent
+-declares that @code{my_calloc} returns memory of the size given by
+-the product of parameter 1 and 2 and that @code{my_realloc} returns memory
+-of the size given by parameter 2.
+-
+ @item alloc_align
+ @cindex @code{alloc_align} function attribute
+ The @code{alloc_align} attribute is used to tell the compiler that the
+@@ -2291,24 +2289,30 @@ void* my_memalign(size_t, size_t) __attribute__((alloc_align(1)))
+ declares that @code{my_memalign} returns memory with minimum alignment
+ given by parameter 1.
+ 
+-@item assume_aligned
+-@cindex @code{assume_aligned} function attribute
+-The @code{assume_aligned} attribute is used to tell the compiler that the
+-function return value points to memory, where the returned pointer minimum
+-alignment is given by the first argument.
+-If the attribute has two arguments, the second argument is misalignment offset.
++@item alloc_size
++@cindex @code{alloc_size} function attribute
++The @code{alloc_size} attribute is used to tell the compiler that the
++function return value points to memory, where the size is given by
++one or two of the functions parameters.  GCC uses this
++information to improve the correctness of @code{__builtin_object_size}.
+ 
+-For instance
++The function parameter(s) denoting the allocated size are specified by
++one or two integer arguments supplied to the attribute.  The allocated size
++is either the value of the single function argument specified or the product
++of the two function arguments specified.  Argument numbering starts at
++one.
++
++For instance,
+ 
+ @smallexample
+-void* my_alloc1(size_t) __attribute__((assume_aligned(16)))
+-void* my_alloc2(size_t) __attribute__((assume_aligned(32, 8)))
++void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)))
++void* my_realloc(void*, size_t) __attribute__((alloc_size(2)))
+ @end smallexample
+ 
+ @noindent
+-declares that @code{my_alloc1} returns 16-byte aligned pointer and
+-that @code{my_alloc2} returns a pointer whose value modulo 32 is equal
+-to 8.
++declares that @code{my_calloc} returns memory of the size given by
++the product of parameter 1 and 2 and that @code{my_realloc} returns memory
++of the size given by parameter 2.
+ 
+ @item always_inline
+ @cindex @code{always_inline} function attribute
+@@ -2320,44 +2324,6 @@ Note that if such a function is called indirectly the compiler may
+ or may not inline it depending on optimization level and a failure
+ to inline an indirect call may or may not be diagnosed.
+ 
+-@item gnu_inline
+-@cindex @code{gnu_inline} function attribute
+-This attribute should be used with a function that is also declared
+-with the @code{inline} keyword.  It directs GCC to treat the function
+-as if it were defined in gnu90 mode even when compiling in C99 or
+-gnu99 mode.
+-
+-If the function is declared @code{extern}, then this definition of the
+-function is used only for inlining.  In no case is the function
+-compiled as a standalone function, not even if you take its address
+-explicitly.  Such an address becomes an external reference, as if you
+-had only declared the function, and had not defined it.  This has
+-almost the effect of a macro.  The way to use this is to put a
+-function definition in a header file with this attribute, and put
+-another copy of the function, without @code{extern}, in a library
+-file.  The definition in the header file causes most calls to the
+-function to be inlined.  If any uses of the function remain, they
+-refer to the single copy in the library.  Note that the two
+-definitions of the functions need not be precisely the same, although
+-if they do not have the same effect your program may behave oddly.
+-
+-In C, if the function is neither @code{extern} nor @code{static}, then
+-the function is compiled as a standalone function, as well as being
+-inlined where possible.
+-
+-This is how GCC traditionally handled functions declared
+-@code{inline}.  Since ISO C99 specifies a different semantics for
+-@code{inline}, this function attribute is provided as a transition
+-measure and as a useful feature in its own right.  This attribute is
+-available in GCC 4.1.3 and later.  It is available if either of the
+-preprocessor macros @code{__GNUC_GNU_INLINE__} or
+-@code{__GNUC_STDC_INLINE__} are defined.  @xref{Inline,,An Inline
+-Function is As Fast As a Macro}.
+-
+-In C++, this attribute does not depend on @code{extern} in any way,
+-but it still requires the @code{inline} keyword to enable its special
+-behavior.
+-
+ @item artificial
+ @cindex @code{artificial} function attribute
+ This attribute is useful for small inline wrappers that if possible
+@@ -2366,54 +2332,56 @@ info format it either means marking the function as artificial
+ or using the caller location for all instructions within the inlined
+ body.
+ 
+-@item bank_switch
+-@cindex @code{bank_switch} function attribute, M32C
+-When added to an interrupt handler with the M32C port, causes the
+-prologue and epilogue to use bank switching to preserve the registers
+-rather than saving them on the stack.
++@item assume_aligned
++@cindex @code{assume_aligned} function attribute
++The @code{assume_aligned} attribute is used to tell the compiler that the
++function return value points to memory, where the returned pointer minimum
++alignment is given by the first argument.
++If the attribute has two arguments, the second argument is misalignment offset.
+ 
+-@item flatten
+-@cindex @code{flatten} function attribute
+-Generally, inlining into a function is limited.  For a function marked with
+-this attribute, every call inside this function is inlined, if possible.
+-Whether the function itself is considered for inlining depends on its size and
+-the current inlining parameters.
++For instance
+ 
+-@item error ("@var{message}")
+-@cindex @code{error} function attribute
+-If this attribute is used on a function declaration and a call to such a function
+-is not eliminated through dead code elimination or other optimizations, an error
+-that includes @var{message} is diagnosed.  This is useful
+-for compile-time checking, especially together with @code{__builtin_constant_p}
+-and inline functions where checking the inline function arguments is not
+-possible through @code{extern char [(condition) ? 1 : -1];} tricks.
+-While it is possible to leave the function undefined and thus invoke
+-a link failure, when using this attribute the problem is diagnosed
+-earlier and with exact location of the call even in presence of inline
+-functions or when not emitting debugging information.
++@smallexample
++void* my_alloc1(size_t) __attribute__((assume_aligned(16)))
++void* my_alloc2(size_t) __attribute__((assume_aligned(32, 8)))
++@end smallexample
+ 
+-@item warning ("@var{message}")
+-@cindex @code{warning} function attribute
+-If this attribute is used on a function declaration and a call to such a function
+-is not eliminated through dead code elimination or other optimizations, a warning
+-that includes @var{message} is diagnosed.  This is useful
+-for compile-time checking, especially together with @code{__builtin_constant_p}
+-and inline functions.  While it is possible to define the function with
+-a message in @code{.gnu.warning*} section, when using this attribute the problem
+-is diagnosed earlier and with exact location of the call even in presence
+-of inline functions or when not emitting debugging information.
++@noindent
++declares that @code{my_alloc1} returns 16-byte aligned pointer and
++that @code{my_alloc2} returns a pointer whose value modulo 32 is equal
++to 8.
+ 
+-@item cdecl
+-@cindex @code{cdecl} function attribute, x86-32
+-@cindex functions that do pop the argument stack on x86-32
+-@opindex mrtd
+-On the x86-32 targets, the @code{cdecl} attribute causes the compiler to
+-assume that the calling function pops off the stack space used to
+-pass arguments.  This is
+-useful to override the effects of the @option{-mrtd} switch.
++@item bnd_instrument
++@cindex @code{bnd_instrument} function attribute
++The @code{bnd_instrument} attribute on functions is used to inform the
++compiler that the function should be instrumented when compiled
++with the @option{-fchkp-instrument-marked-only} option.
++
++@item bnd_legacy
++@cindex @code{bnd_legacy} function attribute
++@cindex Pointer Bounds Checker attributes
++The @code{bnd_legacy} attribute on functions is used to inform the
++compiler that the function should not be instrumented when compiled
++with the @option{-fcheck-pointer-bounds} option.
++
++@item cold
++@cindex @code{cold} function attribute
++The @code{cold} attribute on functions is used to inform the compiler that
++the function is unlikely to be executed.  The function is optimized for
++size rather than speed and on many targets it is placed into a special
++subsection of the text section so all cold functions appear close together,
++improving code locality of non-cold parts of program.  The paths leading
++to calls of cold functions within code are marked as unlikely by the branch
++prediction mechanism.  It is thus useful to mark functions used to handle
++unlikely conditions, such as @code{perror}, as cold to improve optimization
++of hot functions that do call marked functions in rare occasions.
++
++When profile feedback is available, via @option{-fprofile-use}, cold functions
++are automatically detected and this attribute is ignored.
+ 
+ @item const
+ @cindex @code{const} function attribute
++@cindex functions that have no side effects
+ Many functions do not examine any values except their arguments, and
+ have no effects except the return value.  Basically this is just slightly
+ more strict class than the @code{pure} attribute below, since function is not
+@@ -2477,184 +2445,62 @@ present.
+ The @code{deprecated} attribute can also be used for variables and
+ types (@pxref{Variable Attributes}, @pxref{Type Attributes}.)
+ 
+-@item disinterrupt
+-@cindex @code{disinterrupt} function attribute, Epiphany
+-@cindex @code{disinterrupt} function attribute, MeP
+-On Epiphany and MeP targets, this attribute causes the compiler to emit
+-instructions to disable interrupts for the duration of the given
+-function.
++@item error ("@var{message}")
++@itemx warning ("@var{message}")
++@cindex @code{error} function attribute
++@cindex @code{warning} function attribute
++If the @code{error} or @code{warning} attribute 
++is used on a function declaration and a call to such a function
++is not eliminated through dead code elimination or other optimizations, 
++an error or warning (respectively) that includes @var{message} is diagnosed.  
++This is useful
++for compile-time checking, especially together with @code{__builtin_constant_p}
++and inline functions where checking the inline function arguments is not
++possible through @code{extern char [(condition) ? 1 : -1];} tricks.
+ 
+-@item dllexport
+-@cindex @code{dllexport} function attribute
+-@cindex @code{__declspec(dllexport)}
+-On Microsoft Windows targets and Symbian OS targets the
+-@code{dllexport} attribute causes the compiler to provide a global
+-pointer to a pointer in a DLL, so that it can be referenced with the
+-@code{dllimport} attribute.  On Microsoft Windows targets, the pointer
+-name is formed by combining @code{_imp__} and the function or variable
+-name.
++While it is possible to leave the function undefined and thus invoke
++a link failure (to define the function with
++a message in @code{.gnu.warning*} section),
++when using these attributes the problem is diagnosed
++earlier and with exact location of the call even in presence of inline
++functions or when not emitting debugging information.
+ 
+-You can use @code{__declspec(dllexport)} as a synonym for
+-@code{__attribute__ ((dllexport))} for compatibility with other
+-compilers.
++@item externally_visible
++@cindex @code{externally_visible} function attribute
++This attribute, attached to a global variable or function, nullifies
++the effect of the @option{-fwhole-program} command-line option, so the
++object remains visible outside the current compilation unit.
+ 
+-On systems that support the @code{visibility} attribute, this
+-attribute also implies ``default'' visibility.  It is an error to
+-explicitly specify any other visibility.
++If @option{-fwhole-program} is used together with @option{-flto} and 
++@command{gold} is used as the linker plugin, 
++@code{externally_visible} attributes are automatically added to functions 
++(not variable yet due to a current @command{gold} issue) 
++that are accessed outside of LTO objects according to resolution file
++produced by @command{gold}.
++For other linkers that cannot generate resolution file,
++explicit @code{externally_visible} attributes are still necessary.
+ 
+-GCC's default behavior is to emit all inline functions with the
+-@code{dllexport} attribute.  Since this can cause object file-size bloat,
+-you can use @option{-fno-keep-inline-dllexport}, which tells GCC to
+-ignore the attribute for inlined functions unless the 
+-@option{-fkeep-inline-functions} flag is used instead.
++@item flatten
++@cindex @code{flatten} function attribute
++Generally, inlining into a function is limited.  For a function marked with
++this attribute, every call inside this function is inlined, if possible.
++Whether the function itself is considered for inlining depends on its size and
++the current inlining parameters.
+ 
+-The attribute is ignored for undefined symbols.
++@item format (@var{archetype}, @var{string-index}, @var{first-to-check})
++@cindex @code{format} function attribute
++@cindex functions with @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style arguments
++@opindex Wformat
++The @code{format} attribute specifies that a function takes @code{printf},
++@code{scanf}, @code{strftime} or @code{strfmon} style arguments that
++should be type-checked against a format string.  For example, the
++declaration:
+ 
+-When applied to C++ classes, the attribute marks defined non-inlined
+-member functions and static data members as exports.  Static consts
+-initialized in-class are not marked unless they are also defined
+-out-of-class.
+-
+-For Microsoft Windows targets there are alternative methods for
+-including the symbol in the DLL's export table such as using a
+-@file{.def} file with an @code{EXPORTS} section or, with GNU ld, using
+-the @option{--export-all} linker flag.
+-
+-@item dllimport
+-@cindex @code{dllimport} function attribute
+-@cindex @code{__declspec(dllimport)}
+-On Microsoft Windows and Symbian OS targets, the @code{dllimport}
+-attribute causes the compiler to reference a function or variable via
+-a global pointer to a pointer that is set up by the DLL exporting the
+-symbol.  The attribute implies @code{extern}.  On Microsoft Windows
+-targets, the pointer name is formed by combining @code{_imp__} and the
+-function or variable name.
+-
+-You can use @code{__declspec(dllimport)} as a synonym for
+-@code{__attribute__ ((dllimport))} for compatibility with other
+-compilers.
+-
+-On systems that support the @code{visibility} attribute, this
+-attribute also implies ``default'' visibility.  It is an error to
+-explicitly specify any other visibility.
+-
+-Currently, the attribute is ignored for inlined functions.  If the
+-attribute is applied to a symbol @emph{definition}, an error is reported.
+-If a symbol previously declared @code{dllimport} is later defined, the
+-attribute is ignored in subsequent references, and a warning is emitted.
+-The attribute is also overridden by a subsequent declaration as
+-@code{dllexport}.
+-
+-When applied to C++ classes, the attribute marks non-inlined
+-member functions and static data members as imports.  However, the
+-attribute is ignored for virtual methods to allow creation of vtables
+-using thunks.
+-
+-On the SH Symbian OS target the @code{dllimport} attribute also has
+-another affect---it can cause the vtable and run-time type information
+-for a class to be exported.  This happens when the class has a
+-dllimported constructor or a non-inline, non-pure virtual function
+-and, for either of those two conditions, the class also has an inline
+-constructor or destructor and has a key function that is defined in
+-the current translation unit.
+-
+-For Microsoft Windows targets the use of the @code{dllimport}
+-attribute on functions is not necessary, but provides a small
+-performance benefit by eliminating a thunk in the DLL@.  The use of the
+-@code{dllimport} attribute on imported variables can be avoided by passing the
+-@option{--enable-auto-import} switch to the GNU linker.  As with
+-functions, using the attribute for a variable eliminates a thunk in
+-the DLL@.
+-
+-One drawback to using this attribute is that a pointer to a
+-@emph{variable} marked as @code{dllimport} cannot be used as a constant
+-address. However, a pointer to a @emph{function} with the
+-@code{dllimport} attribute can be used as a constant initializer; in
+-this case, the address of a stub function in the import lib is
+-referenced.  On Microsoft Windows targets, the attribute can be disabled
+-for functions by setting the @option{-mnop-fun-dllimport} flag.
+-
+-@item exception
+-@cindex @code{exception} function attribute
+-@cindex exception handler functions, NDS32
+-Use this attribute on the NDS32 target to indicate that the specified function
+-is an exception handler.  The compiler will generate corresponding sections
+-for use in an exception handler.
+-
+-@item exception_handler
+-@cindex @code{exception_handler} function attribute
+-@cindex exception handler functions, Blackfin
+-Use this attribute on the Blackfin to indicate that the specified function
+-is an exception handler.  The compiler generates function entry and
+-exit sequences suitable for use in an exception handler when this
+-attribute is present.
+-
+-@item externally_visible
+-@cindex @code{externally_visible} function attribute
+-This attribute, attached to a global variable or function, nullifies
+-the effect of the @option{-fwhole-program} command-line option, so the
+-object remains visible outside the current compilation unit.
+-
+-If @option{-fwhole-program} is used together with @option{-flto} and 
+-@command{gold} is used as the linker plugin, 
+-@code{externally_visible} attributes are automatically added to functions 
+-(not variable yet due to a current @command{gold} issue) 
+-that are accessed outside of LTO objects according to resolution file
+-produced by @command{gold}.
+-For other linkers that cannot generate resolution file,
+-explicit @code{externally_visible} attributes are still necessary.
+-
+-@item far
+-@cindex @code{far} function attribute
+-
+-On MeP targets this causes the compiler to use a calling convention
+-that assumes the called function is too far away for the built-in
+-addressing modes.
+-
+-@item fast_interrupt
+-@cindex @code{fast_interrupt} function attribute, M32C
+-@cindex @code{fast_interrupt} function attribute, RX
+-Use this attribute on the M32C and RX ports to indicate that the specified
+-function is a fast interrupt handler.  This is just like the
+-@code{interrupt} attribute, except that @code{freit} is used to return
+-instead of @code{reit}.
+-
+-@item fastcall
+-@cindex @code{fastcall} function attribute, x86-32
+-@cindex functions that pop the argument stack on x86-32
+-On x86-32 targets, the @code{fastcall} attribute causes the compiler to
+-pass the first argument (if of integral type) in the register ECX and
+-the second argument (if of integral type) in the register EDX@.  Subsequent
+-and other typed arguments are passed on the stack.  The called function
+-pops the arguments off the stack.  If the number of arguments is variable all
+-arguments are pushed on the stack.
+-
+-@item thiscall
+-@cindex @code{thiscall} function attribute, x86-32
+-@cindex functions that pop the argument stack on x86-32
+-On x86-32 targets, the @code{thiscall} attribute causes the compiler to
+-pass the first argument (if of integral type) in the register ECX.
+-Subsequent and other typed arguments are passed on the stack. The called
+-function pops the arguments off the stack.
+-If the number of arguments is variable all arguments are pushed on the
+-stack.
+-The @code{thiscall} attribute is intended for C++ non-static member functions.
+-As a GCC extension, this calling convention can be used for C functions
+-and for static member methods.
+-
+-@item format (@var{archetype}, @var{string-index}, @var{first-to-check})
+-@cindex @code{format} function attribute
+-@opindex Wformat
+-The @code{format} attribute specifies that a function takes @code{printf},
+-@code{scanf}, @code{strftime} or @code{strfmon} style arguments that
+-should be type-checked against a format string.  For example, the
+-declaration:
+-
+-@smallexample
+-extern int
+-my_printf (void *my_object, const char *my_format, ...)
+-      __attribute__ ((format (printf, 2, 3)));
+-@end smallexample
++@smallexample
++extern int
++my_printf (void *my_object, const char *my_format, ...)
++      __attribute__ ((format (printf, 2, 3)));
++@end smallexample
+ 
+ @noindent
+ causes the compiler to check the arguments in calls to @code{my_printf}
+@@ -2771,72 +2617,59 @@ The target may also allow additional types in @code{format-arg} attributes.
+ @xref{Target Format Checks,,Format Checks Specific to Particular
+ Target Machines}.
+ 
+-@item function_vector
+-@cindex @code{function_vector} function attribute, H8/300
+-@cindex @code{function_vector} function attribute, M16C/M32C
+-@cindex @code{function_vector} function attribute, SH
+-@cindex calling functions through the function vector on H8/300, M16C, M32C and SH2A processors
+-Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
+-function should be called through the function vector.  Calling a
+-function through the function vector reduces code size, however;
+-the function vector has a limited size (maximum 128 entries on the H8/300
+-and 64 entries on the H8/300H and H8S) and shares space with the interrupt vector.
+-
+-On SH2A targets, this attribute declares a function to be called using the
+-TBR relative addressing mode.  The argument to this attribute is the entry
+-number of the same function in a vector table containing all the TBR
+-relative addressable functions.  For correct operation the TBR must be setup
+-accordingly to point to the start of the vector table before any functions with
+-this attribute are invoked.  Usually a good place to do the initialization is
+-the startup routine.  The TBR relative vector table can have at max 256 function
+-entries.  The jumps to these functions are generated using a SH2A specific,
+-non delayed branch instruction JSR/N @@(disp8,TBR).  You must use GAS and GLD
+-from GNU binutils version 2.7 or later for this attribute to work correctly.
+-
+-Please refer the example of M16C target, to see the use of this
+-attribute while declaring a function,
+-
+-In an application, for a function being called once, this attribute
+-saves at least 8 bytes of code; and if other successive calls are being
+-made to the same function, it saves 2 bytes of code per each of these
+-calls.
++@item gnu_inline
++@cindex @code{gnu_inline} function attribute
++This attribute should be used with a function that is also declared
++with the @code{inline} keyword.  It directs GCC to treat the function
++as if it were defined in gnu90 mode even when compiling in C99 or
++gnu99 mode.
+ 
+-On M16C/M32C targets, the @code{function_vector} attribute declares a
+-special page subroutine call function. Use of this attribute reduces
+-the code size by 2 bytes for each call generated to the
+-subroutine. The argument to the attribute is the vector number entry
+-from the special page vector table which contains the 16 low-order
+-bits of the subroutine's entry address. Each vector table has special
+-page number (18 to 255) that is used in @code{jsrs} instructions.
+-Jump addresses of the routines are generated by adding 0x0F0000 (in
+-case of M16C targets) or 0xFF0000 (in case of M32C targets), to the
+-2-byte addresses set in the vector table. Therefore you need to ensure
+-that all the special page vector routines should get mapped within the
+-address range 0x0F0000 to 0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF
+-(for M32C).
++If the function is declared @code{extern}, then this definition of the
++function is used only for inlining.  In no case is the function
++compiled as a standalone function, not even if you take its address
++explicitly.  Such an address becomes an external reference, as if you
++had only declared the function, and had not defined it.  This has
++almost the effect of a macro.  The way to use this is to put a
++function definition in a header file with this attribute, and put
++another copy of the function, without @code{extern}, in a library
++file.  The definition in the header file causes most calls to the
++function to be inlined.  If any uses of the function remain, they
++refer to the single copy in the library.  Note that the two
++definitions of the functions need not be precisely the same, although
++if they do not have the same effect your program may behave oddly.
+ 
+-In the following example 2 bytes are saved for each call to
+-function @code{foo}.
++In C, if the function is neither @code{extern} nor @code{static}, then
++the function is compiled as a standalone function, as well as being
++inlined where possible.
+ 
+-@smallexample
+-void foo (void) __attribute__((function_vector(0x18)));
+-void foo (void)
+-@{
+-@}
++This is how GCC traditionally handled functions declared
++@code{inline}.  Since ISO C99 specifies a different semantics for
++@code{inline}, this function attribute is provided as a transition
++measure and as a useful feature in its own right.  This attribute is
++available in GCC 4.1.3 and later.  It is available if either of the
++preprocessor macros @code{__GNUC_GNU_INLINE__} or
++@code{__GNUC_STDC_INLINE__} are defined.  @xref{Inline,,An Inline
++Function is As Fast As a Macro}.
+ 
+-void bar (void)
+-@{
+-    foo();
+-@}
+-@end smallexample
++In C++, this attribute does not depend on @code{extern} in any way,
++but it still requires the @code{inline} keyword to enable its special
++behavior.
+ 
+-If functions are defined in one file and are called in another file,
+-then be sure to write this declaration in both files.
++@item hot
++@cindex @code{hot} function attribute
++The @code{hot} attribute on a function is used to inform the compiler that
++the function is a hot spot of the compiled program.  The function is
++optimized more aggressively and on many targets it is placed into a special
++subsection of the text section so all hot functions appear close together,
++improving locality.
+ 
+-This attribute is ignored for R8C target.
++When profile feedback is available, via @option{-fprofile-use}, hot functions
++are automatically detected and this attribute is ignored.
+ 
+ @item ifunc ("@var{resolver}")
+ @cindex @code{ifunc} function attribute
++@cindex indirect functions
++@cindex functions that are dynamically resolved
+ The @code{ifunc} attribute is used to mark a function as an indirect
+ function using the STT_GNU_IFUNC symbol type extension to the ELF
+ standard.  This allows the resolution of the symbol value to be
+@@ -2883,324 +2716,753 @@ Indirect functions cannot be weak.  Binutils version 2.20.1 or higher
+ and GNU C Library version 2.11.1 are required to use this feature.
+ 
+ @item interrupt
+-@cindex @code{interrupt} function attribute, ARC
+-@cindex @code{interrupt} function attribute, ARM
+-@cindex @code{interrupt} function attribute, AVR
+-@cindex @code{interrupt} function attribute, CR16
+-@cindex @code{interrupt} function attribute, Epiphany
+-@cindex @code{interrupt} function attribute, M32C
+-@cindex @code{interrupt} function attribute, M32R/D
+-@cindex @code{interrupt} function attribute, m68k
+-@cindex @code{interrupt} function attribute, MeP
+-@cindex @code{interrupt} function attribute, MIPS
+-@cindex @code{interrupt} function attribute, MSP430
+-@cindex @code{interrupt} function attribute, NDS32
+-@cindex @code{interrupt} function attribute, RL78
+-@cindex @code{interrupt} function attribute, RX
+-@cindex @code{interrupt} function attribute, Visium
+-@cindex @code{interrupt} function attribute, Xstormy16
+-Use this attribute on the ARC, ARM, AVR, CR16, Epiphany, M32C, M32R/D,
+-m68k, MeP, MIPS, MSP430, NDS32, RL78, RX, Visium and Xstormy16 ports to indicate
+-that the specified function is an interrupt handler.  The compiler generates
+-function entry and exit sequences suitable for use in an interrupt handler
+-when this attribute is present.  With Epiphany targets it may also generate
+-a special section with code to initialize the interrupt vector table.
+-
+-Note, interrupt handlers for the Blackfin, H8/300, H8/300H, H8S, MicroBlaze,
+-and SH processors can be specified via the @code{interrupt_handler} attribute.
++@itemx interrupt_handler
++Many GCC back ends support attributes to indicate that a function is
++an interrupt handler, which tells the compiler to generate function
++entry and exit sequences that differ from those from regular
++functions.  The exact syntax and behavior are target-specific;
++refer to the following subsections for details.
+ 
+-Note, on the ARC, you must specify the kind of interrupt to be handled
+-in a parameter to the interrupt attribute like this:
+-
+-@smallexample
+-void f () __attribute__ ((interrupt ("ilink1")));
+-@end smallexample
++@item leaf
++@cindex @code{leaf} function attribute
++Calls to external functions with this attribute must return to the current
++compilation unit only by return or by exception handling.  In particular, leaf
++functions are not allowed to call callback function passed to it from the current
++compilation unit or directly call functions exported by the unit or longjmp
++into the unit.  Leaf function might still call functions from other compilation
++units and thus they are not necessarily leaf in the sense that they contain no
++function calls at all.
+ 
+-Permissible values for this parameter are: @w{@code{ilink1}} and
+-@w{@code{ilink2}}.
++The attribute is intended for library functions to improve dataflow analysis.
++The compiler takes the hint that any data not escaping the current compilation unit can
++not be used or modified by the leaf function.  For example, the @code{sin} function
++is a leaf function, but @code{qsort} is not.
+ 
+-Note, on the AVR, the hardware globally disables interrupts when an
+-interrupt is executed.  The first instruction of an interrupt handler
+-declared with this attribute is a @code{SEI} instruction to
+-re-enable interrupts.  See also the @code{signal} function attribute
+-that does not insert a @code{SEI} instruction.  If both @code{signal} and
+-@code{interrupt} are specified for the same function, @code{signal}
+-is silently ignored.
++Note that leaf functions might invoke signals and signal handlers might be
++defined in the current compilation unit and use static variables.  The only
++compliant way to write such a signal handler is to declare such variables
++@code{volatile}.
+ 
+-Note, for the ARM, you can specify the kind of interrupt to be handled by
+-adding an optional parameter to the interrupt attribute like this:
++The attribute has no effect on functions defined within the current compilation
++unit.  This is to allow easy merging of multiple compilation units into one,
++for example, by using the link-time optimization.  For this reason the
++attribute is not allowed on types to annotate indirect calls.
+ 
+-@smallexample
+-void f () __attribute__ ((interrupt ("IRQ")));
+-@end smallexample
+ 
+-@noindent
+-Permissible values for this parameter are: @code{IRQ}, @code{FIQ},
+-@code{SWI}, @code{ABORT} and @code{UNDEF}.
++@item malloc
++@cindex @code{malloc} function attribute
++@cindex functions that behave like malloc
++This tells the compiler that a function is @code{malloc}-like, i.e.,
++that the pointer @var{P} returned by the function cannot alias any
++other pointer valid when the function returns, and moreover no
++pointers to valid objects occur in any storage addressed by @var{P}.
+ 
+-On ARMv7-M the interrupt type is ignored, and the attribute means the function
+-may be called with a word-aligned stack pointer.
++Using this attribute can improve optimization.  Functions like
++@code{malloc} and @code{calloc} have this property because they return
++a pointer to uninitialized or zeroed-out storage.  However, functions
++like @code{realloc} do not have this property, as they can return a
++pointer to storage containing pointers.
+ 
+-Note, for the MSP430 you can provide an argument to the interrupt
+-attribute which specifies a name or number.  If the argument is a
+-number it indicates the slot in the interrupt vector table (0 - 31) to
+-which this handler should be assigned.  If the argument is a name it
+-is treated as a symbolic name for the vector slot.  These names should
+-match up with appropriate entries in the linker script.  By default
+-the names @code{watchdog} for vector 26, @code{nmi} for vector 30 and
+-@code{reset} for vector 31 are recognized.
++@item no_icf
++@cindex @code{no_icf} function attribute
++This function attribute prevents a functions from being merged with another
++semantically equivalent function.
++
++@item no_instrument_function
++@cindex @code{no_instrument_function} function attribute
++@opindex finstrument-functions
++If @option{-finstrument-functions} is given, profiling function calls are
++generated at entry and exit of most user-compiled functions.
++Functions with this attribute are not so instrumented.
+ 
+-You can also use the following function attributes to modify how
+-normal functions interact with interrupt functions:
++@item no_reorder
++@cindex @code{no_reorder} function attribute
++Do not reorder functions or variables marked @code{no_reorder}
++against each other or top level assembler statements the executable.
++The actual order in the program will depend on the linker command
++line. Static variables marked like this are also not removed.
++This has a similar effect
++as the @option{-fno-toplevel-reorder} option, but only applies to the
++marked symbols.
+ 
+-@table @code
+-@item critical
+-@cindex @code{critical} function attribute, MSP430
+-Critical functions disable interrupts upon entry and restore the
+-previous interrupt state upon exit.  Critical functions cannot also
+-have the @code{naked} or @code{reentrant} attributes.  They can have
+-the @code{interrupt} attribute.
++@item no_sanitize_address
++@itemx no_address_safety_analysis
++@cindex @code{no_sanitize_address} function attribute
++The @code{no_sanitize_address} attribute on functions is used
++to inform the compiler that it should not instrument memory accesses
++in the function when compiling with the @option{-fsanitize=address} option.
++The @code{no_address_safety_analysis} is a deprecated alias of the
++@code{no_sanitize_address} attribute, new code should use
++@code{no_sanitize_address}.
+ 
+-@item reentrant
+-@cindex @code{reentrant} function attribute, MSP430
+-Reentrant functions disable interrupts upon entry and enable them
+-upon exit.  Reentrant functions cannot also have the @code{naked}
+-or @code{critical} attributes.  They can have the @code{interrupt}
+-attribute.
++@item no_sanitize_thread
++@cindex @code{no_sanitize_thread} function attribute
++The @code{no_sanitize_thread} attribute on functions is used
++to inform the compiler that it should not instrument memory accesses
++in the function when compiling with the @option{-fsanitize=thread} option.
+ 
+-@item wakeup
+-@cindex @code{wakeup} function attribute, MSP430
+-This attribute only applies to interrupt functions.  It is silently
+-ignored if applied to a non-interrupt function.  A wakeup interrupt
+-function will rouse the processor from any low-power state that it
+-might be in when the function exits.
++@item no_sanitize_undefined
++@cindex @code{no_sanitize_undefined} function attribute
++The @code{no_sanitize_undefined} attribute on functions is used
++to inform the compiler that it should not check for undefined behavior
++in the function when compiling with the @option{-fsanitize=undefined} option.
+ 
+-@end table
++@item no_split_stack
++@cindex @code{no_split_stack} function attribute
++@opindex fsplit-stack
++If @option{-fsplit-stack} is given, functions have a small
++prologue which decides whether to split the stack.  Functions with the
++@code{no_split_stack} attribute do not have that prologue, and thus
++may run with only a small amount of stack space available.
+ 
+-On Epiphany targets one or more optional parameters can be added like this:
++@item noclone
++@cindex @code{noclone} function attribute
++This function attribute prevents a function from being considered for
++cloning---a mechanism that produces specialized copies of functions
++and which is (currently) performed by interprocedural constant
++propagation.
+ 
++@item noinline
++@cindex @code{noinline} function attribute
++This function attribute prevents a function from being considered for
++inlining.
++@c Don't enumerate the optimizations by name here; we try to be
++@c future-compatible with this mechanism.
++If the function does not have side-effects, there are optimizations
++other than inlining that cause function calls to be optimized away,
++although the function call is live.  To keep such calls from being
++optimized away, put
+ @smallexample
+-void __attribute__ ((interrupt ("dma0, dma1"))) universal_dma_handler ();
++asm ("");
+ @end smallexample
+ 
+-Permissible values for these parameters are: @w{@code{reset}},
+-@w{@code{software_exception}}, @w{@code{page_miss}},
+-@w{@code{timer0}}, @w{@code{timer1}}, @w{@code{message}},
+-@w{@code{dma0}}, @w{@code{dma1}}, @w{@code{wand}} and @w{@code{swi}}.
+-Multiple parameters indicate that multiple entries in the interrupt
+-vector table should be initialized for this function, i.e.@: for each
+-parameter @w{@var{name}}, a jump to the function is emitted in
+-the section @w{ivt_entry_@var{name}}.  The parameter(s) may be omitted
+-entirely, in which case no interrupt vector table entry is provided.
+-
+-Note, on Epiphany targets, interrupts are enabled inside the function
+-unless the @code{disinterrupt} attribute is also specified.
++@noindent
++(@pxref{Extended Asm}) in the called function, to serve as a special
++side-effect.
+ 
+-On Epiphany targets, you can also use the following attribute to
+-modify the behavior of an interrupt handler:
+-@table @code
+-@item forwarder_section
+-@cindex @code{forwarder_section} function attribute, Epiphany
+-The interrupt handler may be in external memory which cannot be
+-reached by a branch instruction, so generate a local memory trampoline
+-to transfer control.  The single parameter identifies the section where
+-the trampoline is placed.
+-@end table
++@item nonnull (@var{arg-index}, @dots{})
++@cindex @code{nonnull} function attribute
++@cindex functions with non-null pointer arguments
++The @code{nonnull} attribute specifies that some function parameters should
++be non-null pointers.  For instance, the declaration:
+ 
+-The following examples are all valid uses of these attributes on
+-Epiphany targets:
+ @smallexample
+-void __attribute__ ((interrupt)) universal_handler ();
+-void __attribute__ ((interrupt ("dma1"))) dma1_handler ();
+-void __attribute__ ((interrupt ("dma0, dma1"))) universal_dma_handler ();
+-void __attribute__ ((interrupt ("timer0"), disinterrupt))
+-  fast_timer_handler ();
+-void __attribute__ ((interrupt ("dma0, dma1"), forwarder_section ("tramp")))
+-  external_dma_handler ();
++extern void *
++my_memcpy (void *dest, const void *src, size_t len)
++        __attribute__((nonnull (1, 2)));
+ @end smallexample
+ 
+-On MIPS targets, you can use the following attributes to modify the behavior
+-of an interrupt handler:
+-@table @code
+-@item use_shadow_register_set
+-@cindex @code{use_shadow_register_set} function attribute, MIPS
+-Assume that the handler uses a shadow register set, instead of
+-the main general-purpose registers.
+-
+-@item keep_interrupts_masked
+-@cindex @code{keep_interrupts_masked} function attribute, MIPS
+-Keep interrupts masked for the whole function.  Without this attribute,
+-GCC tries to reenable interrupts for as much of the function as it can.
++@noindent
++causes the compiler to check that, in calls to @code{my_memcpy},
++arguments @var{dest} and @var{src} are non-null.  If the compiler
++determines that a null pointer is passed in an argument slot marked
++as non-null, and the @option{-Wnonnull} option is enabled, a warning
++is issued.  The compiler may also choose to make optimizations based
++on the knowledge that certain function arguments will never be null.
+ 
+-@item use_debug_exception_return
+-@cindex @code{use_debug_exception_return} function attribute, MIPS
+-Return using the @code{deret} instruction.  Interrupt handlers that don't
+-have this attribute return using @code{eret} instead.
+-@end table
++If no argument index list is given to the @code{nonnull} attribute,
++all pointer arguments are marked as non-null.  To illustrate, the
++following declaration is equivalent to the previous example:
+ 
+-You can use any combination of these attributes, as shown below:
+ @smallexample
+-void __attribute__ ((interrupt)) v0 ();
+-void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
+-void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
+-void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
+-void __attribute__ ((interrupt, use_shadow_register_set,
+-                     keep_interrupts_masked)) v4 ();
+-void __attribute__ ((interrupt, use_shadow_register_set,
+-                     use_debug_exception_return)) v5 ();
+-void __attribute__ ((interrupt, keep_interrupts_masked,
+-                     use_debug_exception_return)) v6 ();
+-void __attribute__ ((interrupt, use_shadow_register_set,
+-                     keep_interrupts_masked,
+-                     use_debug_exception_return)) v7 ();
++extern void *
++my_memcpy (void *dest, const void *src, size_t len)
++        __attribute__((nonnull));
+ @end smallexample
+ 
+-On NDS32 target, this attribute indicates that the specified function
+-is an interrupt handler.  The compiler generates corresponding sections
+-for use in an interrupt handler.  You can use the following attributes
+-to modify the behavior:
+-@table @code
+-@item nested
+-@cindex @code{nested} function attribute, NDS32
+-This interrupt service routine is interruptible.
+-@item not_nested
+-@cindex @code{not_nested} function attribute, NDS32
+-This interrupt service routine is not interruptible.
+-@item nested_ready
+-@cindex @code{nested_ready} function attribute, NDS32
+-This interrupt service routine is interruptible after @code{PSW.GIE}
+-(global interrupt enable) is set.  This allows interrupt service routine to
+-finish some short critical code before enabling interrupts.
+-@item save_all
+-@cindex @code{save_all} function attribute, NDS32
+-The system will help save all registers into stack before entering
+-interrupt handler.
+-@item partial_save
+-@cindex @code{partial_save} function attribute, NDS32
+-The system will help save caller registers into stack before entering
+-interrupt handler.
+-@end table
++@item noreturn
++@cindex @code{noreturn} function attribute
++@cindex functions that never return
++A few standard library functions, such as @code{abort} and @code{exit},
++cannot return.  GCC knows this automatically.  Some programs define
++their own functions that never return.  You can declare them
++@code{noreturn} to tell the compiler this fact.  For example,
+ 
+-@cindex @code{brk_interrupt} function attribute, RL78
+-On RL78, use @code{brk_interrupt} instead of @code{interrupt} for
+-handlers intended to be used with the @code{BRK} opcode (i.e.@: those
+-that must end with @code{RETB} instead of @code{RETI}).
++@smallexample
++@group
++void fatal () __attribute__ ((noreturn));
++
++void
++fatal (/* @r{@dots{}} */)
++@{
++  /* @r{@dots{}} */ /* @r{Print error message.} */ /* @r{@dots{}} */
++  exit (1);
++@}
++@end group
++@end smallexample
++
++The @code{noreturn} keyword tells the compiler to assume that
++@code{fatal} cannot return.  It can then optimize without regard to what
++would happen if @code{fatal} ever did return.  This makes slightly
++better code.  More importantly, it helps avoid spurious warnings of
++uninitialized variables.
++
++The @code{noreturn} keyword does not affect the exceptional path when that
++applies: a @code{noreturn}-marked function may still return to the caller
++by throwing an exception or calling @code{longjmp}.
++
++Do not assume that registers saved by the calling function are
++restored before calling the @code{noreturn} function.
++
++It does not make sense for a @code{noreturn} function to have a return
++type other than @code{void}.
++
++@item nothrow
++@cindex @code{nothrow} function attribute
++The @code{nothrow} attribute is used to inform the compiler that a
++function cannot throw an exception.  For example, most functions in
++the standard C library can be guaranteed not to throw an exception
++with the notable exceptions of @code{qsort} and @code{bsearch} that
++take function pointer arguments.
++
++@item noplt
++@cindex @code{noplt} function attribute
++The @code{noplt} attribute is the counterpart to option @option{-fno-plt} and
++does not use PLT for calls to functions marked with this attribute in position
++independent code. 
++
++@smallexample
++@group
++/* Externally defined function foo.  */
++int foo () __attribute__ ((noplt));
++
++int
++main (/* @r{@dots{}} */)
++@{
++  /* @r{@dots{}} */
++  foo ();
++  /* @r{@dots{}} */
++@}
++@end group
++@end smallexample
++
++The @code{noplt} attribute on function foo tells the compiler to assume that
++the function foo is externally defined and the call to foo must avoid the PLT
++in position independent code.
++
++Additionally, a few targets also convert calls to those functions that are
++marked to not use the PLT to use the GOT instead for non-position independent
++code.
++
++@item optimize
++@cindex @code{optimize} function attribute
++The @code{optimize} attribute is used to specify that a function is to
++be compiled with different optimization options than specified on the
++command line.  Arguments can either be numbers or strings.  Numbers
++are assumed to be an optimization level.  Strings that begin with
++@code{O} are assumed to be an optimization option, while other options
++are assumed to be used with a @code{-f} prefix.  You can also use the
++@samp{#pragma GCC optimize} pragma to set the optimization options
++that affect more than one function.
++@xref{Function Specific Option Pragmas}, for details about the
++@samp{#pragma GCC optimize} pragma.
++
++This can be used for instance to have frequently-executed functions
++compiled with more aggressive optimization options that produce faster
++and larger code, while other functions can be compiled with less
++aggressive options.
++
++@item pure
++@cindex @code{pure} function attribute
++@cindex functions that have no side effects
++Many functions have no effects except the return value and their
++return value depends only on the parameters and/or global variables.
++Such a function can be subject
++to common subexpression elimination and loop optimization just as an
++arithmetic operator would be.  These functions should be declared
++with the attribute @code{pure}.  For example,
++
++@smallexample
++int square (int) __attribute__ ((pure));
++@end smallexample
++
++@noindent
++says that the hypothetical function @code{square} is safe to call
++fewer times than the program says.
++
++Some of common examples of pure functions are @code{strlen} or @code{memcmp}.
++Interesting non-pure functions are functions with infinite loops or those
++depending on volatile memory or other system resource, that may change between
++two consecutive calls (such as @code{feof} in a multithreading environment).
++
++@item returns_nonnull
++@cindex @code{returns_nonnull} function attribute
++The @code{returns_nonnull} attribute specifies that the function
++return value should be a non-null pointer.  For instance, the declaration:
++
++@smallexample
++extern void *
++mymalloc (size_t len) __attribute__((returns_nonnull));
++@end smallexample
++
++@noindent
++lets the compiler optimize callers based on the knowledge
++that the return value will never be null.
++
++@item returns_twice
++@cindex @code{returns_twice} function attribute
++@cindex functions that return more than once
++The @code{returns_twice} attribute tells the compiler that a function may
++return more than one time.  The compiler ensures that all registers
++are dead before calling such a function and emits a warning about
++the variables that may be clobbered after the second return from the
++function.  Examples of such functions are @code{setjmp} and @code{vfork}.
++The @code{longjmp}-like counterpart of such function, if any, might need
++to be marked with the @code{noreturn} attribute.
++
++@item section ("@var{section-name}")
++@cindex @code{section} function attribute
++@cindex functions in arbitrary sections
++Normally, the compiler places the code it generates in the @code{text} section.
++Sometimes, however, you need additional sections, or you need certain
++particular functions to appear in special sections.  The @code{section}
++attribute specifies that a function lives in a particular section.
++For example, the declaration:
++
++@smallexample
++extern void foobar (void) __attribute__ ((section ("bar")));
++@end smallexample
++
++@noindent
++puts the function @code{foobar} in the @code{bar} section.
++
++Some file formats do not support arbitrary sections so the @code{section}
++attribute is not available on all platforms.
++If you need to map the entire contents of a module to a particular
++section, consider using the facilities of the linker instead.
++
++@item sentinel
++@cindex @code{sentinel} function attribute
++This function attribute ensures that a parameter in a function call is
++an explicit @code{NULL}.  The attribute is only valid on variadic
++functions.  By default, the sentinel is located at position zero, the
++last parameter of the function call.  If an optional integer position
++argument P is supplied to the attribute, the sentinel must be located at
++position P counting backwards from the end of the argument list.
++
++@smallexample
++__attribute__ ((sentinel))
++is equivalent to
++__attribute__ ((sentinel(0)))
++@end smallexample
++
++The attribute is automatically set with a position of 0 for the built-in
++functions @code{execl} and @code{execlp}.  The built-in function
++@code{execle} has the attribute set with a position of 1.
++
++A valid @code{NULL} in this context is defined as zero with any pointer
++type.  If your system defines the @code{NULL} macro with an integer type
++then you need to add an explicit cast.  GCC replaces @code{stddef.h}
++with a copy that redefines NULL appropriately.
++
++The warnings for missing or incorrect sentinels are enabled with
++@option{-Wformat}.
++
++@item stack_protect
++@cindex @code{stack_protect} function attribute
++This function attribute make a stack protection of the function if 
++flags @option{fstack-protector} or @option{fstack-protector-strong}
++or @option{fstack-protector-explicit} are set.
++
++@item target (@var{options})
++@cindex @code{target} function attribute
++Multiple target back ends implement the @code{target} attribute
++to specify that a function is to
++be compiled with different target options than specified on the
++command line.  This can be used for instance to have functions
++compiled with a different ISA (instruction set architecture) than the
++default.  You can also use the @samp{#pragma GCC target} pragma to set
++more than one function to be compiled with specific target options.
++@xref{Function Specific Option Pragmas}, for details about the
++@samp{#pragma GCC target} pragma.
++
++For instance, on an x86, you could declare one function with the
++@code{target("sse4.1,arch=core2")} attribute and another with
++@code{target("sse4a,arch=amdfam10")}.  This is equivalent to
++compiling the first function with @option{-msse4.1} and
++@option{-march=core2} options, and the second function with
++@option{-msse4a} and @option{-march=amdfam10} options.  It is up to you
++to make sure that a function is only invoked on a machine that
++supports the particular ISA it is compiled for (for example by using
++@code{cpuid} on x86 to determine what feature bits and architecture
++family are used).
++
++@smallexample
++int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
++int sse3_func (void) __attribute__ ((__target__ ("sse3")));
++@end smallexample
++
++You can either use multiple
++strings separated by commas to specify multiple options,
++or separate the options with a comma (@samp{,}) within a single string.
++
++The options supported are specific to each target; refer to @ref{x86
++Function Attributes}, @ref{PowerPC Function Attributes},
++@ref{ARM Function Attributes},and @ref{Nios II Function Attributes},
++for details.
++
++@item unused
++@cindex @code{unused} function attribute
++This attribute, attached to a function, means that the function is meant
++to be possibly unused.  GCC does not produce a warning for this
++function.
++
++@item used
++@cindex @code{used} function attribute
++This attribute, attached to a function, means that code must be emitted
++for the function even if it appears that the function is not referenced.
++This is useful, for example, when the function is referenced only in
++inline assembly.
++
++When applied to a member function of a C++ class template, the
++attribute also means that the function is instantiated if the
++class itself is instantiated.
++
++@item visibility ("@var{visibility_type}")
++@cindex @code{visibility} function attribute
++This attribute affects the linkage of the declaration to which it is attached.
++There are four supported @var{visibility_type} values: default,
++hidden, protected or internal visibility.
++
++@smallexample
++void __attribute__ ((visibility ("protected")))
++f () @{ /* @r{Do something.} */; @}
++int i __attribute__ ((visibility ("hidden")));
++@end smallexample
++
++The possible values of @var{visibility_type} correspond to the
++visibility settings in the ELF gABI.
++
++@table @code
++@c keep this list of visibilities in alphabetical order.
++
++@item default
++Default visibility is the normal case for the object file format.
++This value is available for the visibility attribute to override other
++options that may change the assumed visibility of entities.
++
++On ELF, default visibility means that the declaration is visible to other
++modules and, in shared libraries, means that the declared entity may be
++overridden.
++
++On Darwin, default visibility means that the declaration is visible to
++other modules.
++
++Default visibility corresponds to ``external linkage'' in the language.
++
++@item hidden
++Hidden visibility indicates that the entity declared has a new
++form of linkage, which we call ``hidden linkage''.  Two
++declarations of an object with hidden linkage refer to the same object
++if they are in the same shared object.
++
++@item internal
++Internal visibility is like hidden visibility, but with additional
++processor specific semantics.  Unless otherwise specified by the
++psABI, GCC defines internal visibility to mean that a function is
++@emph{never} called from another module.  Compare this with hidden
++functions which, while they cannot be referenced directly by other
++modules, can be referenced indirectly via function pointers.  By
++indicating that a function cannot be called from outside the module,
++GCC may for instance omit the load of a PIC register since it is known
++that the calling function loaded the correct value.
++
++@item protected
++Protected visibility is like default visibility except that it
++indicates that references within the defining module bind to the
++definition in that module.  That is, the declared entity cannot be
++overridden by another module.
++
++@end table
++
++All visibilities are supported on many, but not all, ELF targets
++(supported when the assembler supports the @samp{.visibility}
++pseudo-op).  Default visibility is supported everywhere.  Hidden
++visibility is supported on Darwin targets.
++
++The visibility attribute should be applied only to declarations that
++would otherwise have external linkage.  The attribute should be applied
++consistently, so that the same entity should not be declared with
++different settings of the attribute.
+ 
+-On RX targets, you may specify one or more vector numbers as arguments
+-to the attribute, as well as naming an alternate table name.
+-Parameters are handled sequentially, so one handler can be assigned to
+-multiple entries in multiple tables.  One may also pass the magic
+-string @code{"$default"} which causes the function to be used for any
+-unfilled slots in the current table.
++In C++, the visibility attribute applies to types as well as functions
++and objects, because in C++ types have linkage.  A class must not have
++greater visibility than its non-static data member types and bases,
++and class members default to the visibility of their class.  Also, a
++declaration without explicit visibility is limited to the visibility
++of its type.
++
++In C++, you can mark member functions and static member variables of a
++class with the visibility attribute.  This is useful if you know a
++particular method or static member variable should only be used from
++one shared object; then you can mark it hidden while the rest of the
++class has default visibility.  Care must be taken to avoid breaking
++the One Definition Rule; for example, it is usually not useful to mark
++an inline method as hidden without marking the whole class as hidden.
++
++A C++ namespace declaration can also have the visibility attribute.
+ 
+-This example shows a simple assignment of a function to one vector in
+-the default table (note that preprocessor macros may be used for
+-chip-specific symbolic vector names):
+ @smallexample
+-void __attribute__ ((interrupt (5))) txd1_handler ();
++namespace nspace1 __attribute__ ((visibility ("protected")))
++@{ /* @r{Do something.} */; @}
+ @end smallexample
+ 
+-This example assigns a function to two slots in the default table
+-(using preprocessor macros defined elsewhere) and makes it the default
+-for the @code{dct} table:
++This attribute applies only to the particular namespace body, not to
++other definitions of the same namespace; it is equivalent to using
++@samp{#pragma GCC visibility} before and after the namespace
++definition (@pxref{Visibility Pragmas}).
++
++In C++, if a template argument has limited visibility, this
++restriction is implicitly propagated to the template instantiation.
++Otherwise, template instantiations and specializations default to the
++visibility of their template.
++
++If both the template and enclosing class have explicit visibility, the
++visibility from the template is used.
++
++@item warn_unused_result
++@cindex @code{warn_unused_result} function attribute
++The @code{warn_unused_result} attribute causes a warning to be emitted
++if a caller of the function with this attribute does not use its
++return value.  This is useful for functions where not checking
++the result is either a security problem or always a bug, such as
++@code{realloc}.
++
+ @smallexample
+-void __attribute__ ((interrupt (RXD1_VECT,RXD2_VECT,"dct","$default")))
+-	txd1_handler ();
++int fn () __attribute__ ((warn_unused_result));
++int foo ()
++@{
++  if (fn () < 0) return -1;
++  fn ();
++  return 0;
++@}
+ @end smallexample
+ 
+-@item interrupt_handler
+-@cindex @code{interrupt_handler} function attribute, Blackfin
+-@cindex @code{interrupt_handler} function attribute, m68k
+-@cindex @code{interrupt_handler} function attribute, H8/300
+-@cindex @code{interrupt_handler} function attribute, SH
+-Use this attribute on the Blackfin, m68k, H8/300, H8/300H, H8S, and SH to
+-indicate that the specified function is an interrupt handler.  The compiler
+-generates function entry and exit sequences suitable for use in an
+-interrupt handler when this attribute is present.
++@noindent
++results in warning on line 5.
+ 
+-@item interrupt_thread
+-@cindex @code{interrupt_thread} function attribute, fido
+-Use this attribute on fido, a subarchitecture of the m68k, to indicate
+-that the specified function is an interrupt handler that is designed
+-to run as a thread.  The compiler omits generate prologue/epilogue
+-sequences and replaces the return instruction with a @code{sleep}
+-instruction.  This attribute is available only on fido.
++@item weak
++@cindex @code{weak} function attribute
++The @code{weak} attribute causes the declaration to be emitted as a weak
++symbol rather than a global.  This is primarily useful in defining
++library functions that can be overridden in user code, though it can
++also be used with non-function declarations.  Weak symbols are supported
++for ELF targets, and also for a.out targets when using the GNU assembler
++and linker.
+ 
+-@item isr
+-@cindex @code{isr} function attribute, ARM
+-Use this attribute on ARM to write Interrupt Service Routines. This is an
+-alias to the @code{interrupt} attribute above.
++@item weakref
++@itemx weakref ("@var{target}")
++@cindex @code{weakref} function attribute
++The @code{weakref} attribute marks a declaration as a weak reference.
++Without arguments, it should be accompanied by an @code{alias} attribute
++naming the target symbol.  Optionally, the @var{target} may be given as
++an argument to @code{weakref} itself.  In either case, @code{weakref}
++implicitly marks the declaration as @code{weak}.  Without a
++@var{target}, given as an argument to @code{weakref} or to @code{alias},
++@code{weakref} is equivalent to @code{weak}.
+ 
+-@item kspisusp
+-@cindex @code{kspisusp} function attribute, Blackfin
+-@cindex User stack pointer in interrupts on the Blackfin
+-When used together with @code{interrupt_handler}, @code{exception_handler}
+-or @code{nmi_handler}, code is generated to load the stack pointer
+-from the USP register in the function prologue.
++@smallexample
++static int x() __attribute__ ((weakref ("y")));
++/* is equivalent to... */
++static int x() __attribute__ ((weak, weakref, alias ("y")));
++/* and to... */
++static int x() __attribute__ ((weakref));
++static int x() __attribute__ ((alias ("y")));
++@end smallexample
+ 
+-@item l1_text
+-@cindex @code{l1_text} function attribute, Blackfin
+-This attribute specifies a function to be placed into L1 Instruction
+-SRAM@. The function is put into a specific section named @code{.l1.text}.
+-With @option{-mfdpic}, function calls with a such function as the callee
+-or caller uses inlined PLT.
++A weak reference is an alias that does not by itself require a
++definition to be given for the target symbol.  If the target symbol is
++only referenced through weak references, then it becomes a @code{weak}
++undefined symbol.  If it is directly referenced, however, then such
++strong references prevail, and a definition is required for the
++symbol, not necessarily in the same translation unit.
+ 
+-@item l2
+-@cindex @code{l2} function attribute, Blackfin
+-On the Blackfin, this attribute specifies a function to be placed into L2
+-SRAM. The function is put into a specific section named
+-@code{.l1.text}. With @option{-mfdpic}, callers of such functions use
+-an inlined PLT.
++The effect is equivalent to moving all references to the alias to a
++separate translation unit, renaming the alias to the aliased symbol,
++declaring it as weak, compiling the two separate translation units and
++performing a reloadable link on them.
+ 
+-@item leaf
+-@cindex @code{leaf} function attribute
+-Calls to external functions with this attribute must return to the current
+-compilation unit only by return or by exception handling.  In particular, leaf
+-functions are not allowed to call callback function passed to it from the current
+-compilation unit or directly call functions exported by the unit or longjmp
+-into the unit.  Leaf function might still call functions from other compilation
+-units and thus they are not necessarily leaf in the sense that they contain no
+-function calls at all.
++At present, a declaration to which @code{weakref} is attached can
++only be @code{static}.
+ 
+-The attribute is intended for library functions to improve dataflow analysis.
+-The compiler takes the hint that any data not escaping the current compilation unit can
+-not be used or modified by the leaf function.  For example, the @code{sin} function
+-is a leaf function, but @code{qsort} is not.
++@end table
+ 
+-Note that leaf functions might invoke signals and signal handlers might be
+-defined in the current compilation unit and use static variables.  The only
+-compliant way to write such a signal handler is to declare such variables
+-@code{volatile}.
++@c This is the end of the target-independent attribute table
+ 
+-The attribute has no effect on functions defined within the current compilation
+-unit.  This is to allow easy merging of multiple compilation units into one,
+-for example, by using the link-time optimization.  For this reason the
+-attribute is not allowed on types to annotate indirect calls.
++@node AArch64 Function Attributes
++@subsection AArch64 Function Attributes
++
++The following target-specific function attributes are available for the
++AArch64 target.  For the most part, these options mirror the behavior of
++similar command-line options (@pxref{AArch64 Options}), but on a
++per-function basis.
++
++@table @code
++@item general-regs-only
++@cindex @code{general-regs-only} function attribute, AArch64
++Indicates that no floating-point or Advanced SIMD registers should be
++used when generating code for this function.  If the function explicitly
++uses floating-point code, then the compiler gives an error.  This is
++the same behavior as that of the command-line option
++@option{-mgeneral-regs-only}.
++
++@item fix-cortex-a53-835769
++@cindex @code{fix-cortex-a53-835769} function attribute, AArch64
++Indicates that the workaround for the Cortex-A53 erratum 835769 should be
++applied to this function.  To explicitly disable the workaround for this
++function specify the negated form: @code{no-fix-cortex-a53-835769}.
++This corresponds to the behavior of the command line options
++@option{-mfix-cortex-a53-835769} and @option{-mno-fix-cortex-a53-835769}.
++
++@item cmodel=
++@cindex @code{cmodel=} function attribute, AArch64
++Indicates that code should be generated for a particular code model for
++this function.  The behavior and permissible arguments are the same as
++for the command line option @option{-mcmodel=}.
++
++@item strict-align
++@cindex @code{strict-align} function attribute, AArch64
++Indicates that the compiler should not assume that unaligned memory references
++are handled by the system.  The behavior is the same as for the command-line
++option @option{-mstrict-align}.
++
++@item omit-leaf-frame-pointer
++@cindex @code{omit-leaf-frame-pointer} function attribute, AArch64
++Indicates that the frame pointer should be omitted for a leaf function call.
++To keep the frame pointer, the inverse attribute
++@code{no-omit-leaf-frame-pointer} can be specified.  These attributes have
++the same behavior as the command-line options @option{-momit-leaf-frame-pointer}
++and @option{-mno-omit-leaf-frame-pointer}.
++
++@item tls-dialect=
++@cindex @code{tls-dialect=} function attribute, AArch64
++Specifies the TLS dialect to use for this function.  The behavior and
++permissible arguments are the same as for the command-line option
++@option{-mtls-dialect=}.
++
++@item arch=
++@cindex @code{arch=} function attribute, AArch64
++Specifies the architecture version and architectural extensions to use
++for this function.  The behavior and permissible arguments are the same as
++for the @option{-march=} command-line option.
++
++@item tune=
++@cindex @code{tune=} function attribute, AArch64
++Specifies the core for which to tune the performance of this function.
++The behavior and permissible arguments are the same as for the @option{-mtune=}
++command-line option.
++
++@item cpu=
++@cindex @code{cpu=} function attribute, AArch64
++Specifies the core for which to tune the performance of this function and also
++whose architectural features to use.  The behavior and valid arguments are the
++same as for the @option{-mcpu=} command-line option.
++
++@end table
++
++The above target attributes can be specified as follows:
++
++@smallexample
++__attribute__((target("@var{attr-string}")))
++int
++f (int a)
++@{
++  return a + 5;
++@}
++@end smallexample
++
++where @code{@var{attr-string}} is one of the attribute strings specified above.
++
++Additionally, the architectural extension string may be specified on its
++own.  This can be used to turn on and off particular architectural extensions
++without having to specify a particular architecture version or core.  Example:
++
++@smallexample
++__attribute__((target("+crc+nocrypto")))
++int
++foo (int a)
++@{
++  return a + 5;
++@}
++@end smallexample
++
++In this example @code{target("+crc+nocrypto")} enables the @code{crc}
++extension and disables the @code{crypto} extension for the function @code{foo}
++without modifying an existing @option{-march=} or @option{-mcpu} option.
++
++Multiple target function attributes can be specified by separating them with
++a comma.  For example:
++@smallexample
++__attribute__((target("arch=armv8-a+crc+crypto,tune=cortex-a53")))
++int
++foo (int a)
++@{
++  return a + 5;
++@}
++@end smallexample
++
++is valid and compiles function @code{foo} for ARMv8-A with @code{crc}
++and @code{crypto} extensions and tunes it for @code{cortex-a53}.
++
++@subsubsection Inlining rules
++Specifying target attributes on individual functions or performing link-time
++optimization across translation units compiled with different target options
++can affect function inlining rules:
++
++In particular, a caller function can inline a callee function only if the
++architectural features available to the callee are a subset of the features
++available to the caller.
++For example: A function @code{foo} compiled with @option{-march=armv8-a+crc},
++or tagged with the equivalent @code{arch=armv8-a+crc} attribute,
++can inline a function @code{bar} compiled with @option{-march=armv8-a+nocrc}
++because the all the architectural features that function @code{bar} requires
++are available to function @code{foo}.  Conversely, function @code{bar} cannot
++inline function @code{foo}.
++
++Additionally inlining a function compiled with @option{-mstrict-align} into a
++function compiled without @code{-mstrict-align} is not allowed.
++However, inlining a function compiled without @option{-mstrict-align} into a
++function compiled with @option{-mstrict-align} is allowed.
++
++Note that CPU tuning options and attributes such as the @option{-mcpu=},
++@option{-mtune=} do not inhibit inlining unless the CPU specified by the
++@option{-mcpu=} option or the @code{cpu=} attribute conflicts with the
++architectural feature rules specified above.
++
++@node ARC Function Attributes
++@subsection ARC Function Attributes
++
++These function attributes are supported by the ARC back end:
++
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, ARC
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
++
++On the ARC, you must specify the kind of interrupt to be handled
++in a parameter to the interrupt attribute like this:
++
++@smallexample
++void f () __attribute__ ((interrupt ("ilink1")));
++@end smallexample
++
++Permissible values for this parameter are: @w{@code{ilink1}} and
++@w{@code{ilink2}}.
+ 
+ @item long_call
+ @itemx medium_call
+ @itemx short_call
+ @cindex @code{long_call} function attribute, ARC
+-@cindex @code{long_call} function attribute, ARM
+-@cindex @code{long_call} function attribute, Epiphany
+ @cindex @code{medium_call} function attribute, ARC
+ @cindex @code{short_call} function attribute, ARC
+-@cindex @code{short_call} function attribute, ARM
+-@cindex @code{short_call} function attribute, Epiphany
+ @cindex indirect calls, ARC
+-@cindex indirect calls, ARM
+-@cindex indirect calls, Epiphany
+-These attributes specify how a particular function is called on
+-ARC, ARM and Epiphany - with @code{medium_call} being specific to ARC.
++These attributes specify how a particular function is called.
+ These attributes override the
+-@option{-mlong-calls} (@pxref{ARM Options} and @ref{ARC Options})
+-and @option{-mmedium-calls} (@pxref{ARC Options})
+-command-line switches and @code{#pragma long_calls} settings.  For ARM, the
+-@code{long_call} attribute indicates that the function might be far
+-away from the call site and require a different (more expensive)
+-calling sequence.   The @code{short_call} attribute always places
+-the offset to the function from the call site into the @samp{BL}
+-instruction directly.
++@option{-mlong-calls} and @option{-mmedium-calls} (@pxref{ARC Options})
++command-line switches and @code{#pragma long_calls} settings.
+ 
+ For ARC, a function marked with the @code{long_call} attribute is
+ always called using register-indirect jump-and-link instructions,
+@@ -3208,183 +3470,138 @@ thereby enabling the called function to be placed anywhere within the
+ 32-bit address space.  A function marked with the @code{medium_call}
+ attribute will always be close enough to be called with an unconditional
+ branch-and-link instruction, which has a 25-bit offset from
+-the call site.  A function marked with the @code{short_call}
+-attribute will always be close enough to be called with a conditional
+-branch-and-link instruction, which has a 21-bit offset from
+-the call site.
+-
+-@item longcall
+-@itemx shortcall
+-@cindex indirect calls, Blackfin
+-@cindex indirect calls, PowerPC
+-@cindex @code{longcall} function attribute, Blackfin
+-@cindex @code{longcall} function attribute, PowerPC
+-@cindex @code{shortcall} function attribute, Blackfin
+-@cindex @code{shortcall} function attribute, PowerPC
+-On Blackfin and PowerPC, the @code{longcall} attribute
+-indicates that the function might be far away from the call site and
+-require a different (more expensive) calling sequence.  The
+-@code{shortcall} attribute indicates that the function is always close
+-enough for the shorter calling sequence to be used.  These attributes
+-override both the @option{-mlongcall} switch and, on the RS/6000 and
+-PowerPC, the @code{#pragma longcall} setting.
+-
+-@xref{RS/6000 and PowerPC Options}, for more information on whether long
+-calls are necessary.
+-
+-@item long_call
+-@itemx near
+-@itemx far
+-@cindex indirect calls, MIPS
+-@cindex @code{long_call} function attribute, MIPS
+-@cindex @code{near} function attribute, MIPS
+-@cindex @code{far} function attribute, MIPS
+-These attributes specify how a particular function is called on MIPS@.
+-The attributes override the @option{-mlong-calls} (@pxref{MIPS Options})
+-command-line switch.  The @code{long_call} and @code{far} attributes are
+-synonyms, and cause the compiler to always call
+-the function by first loading its address into a register, and then using
+-the contents of that register.  The @code{near} attribute has the opposite
+-effect; it specifies that non-PIC calls should be made using the more
+-efficient @code{jal} instruction.
++the call site.  A function marked with the @code{short_call}
++attribute will always be close enough to be called with a conditional
++branch-and-link instruction, which has a 21-bit offset from
++the call site.
++@end table
+ 
+-@item malloc
+-@cindex @code{malloc} function attribute
+-This tells the compiler that a function is @code{malloc}-like, i.e.,
+-that the pointer @var{P} returned by the function cannot alias any
+-other pointer valid when the function returns, and moreover no
+-pointers to valid objects occur in any storage addressed by @var{P}.
++@node ARM Function Attributes
++@subsection ARM Function Attributes
+ 
+-Using this attribute can improve optimization.  Functions like
+-@code{malloc} and @code{calloc} have this property because they return
+-a pointer to uninitialized or zeroed-out storage.  However, functions
+-like @code{realloc} do not have this property, as they can return a
+-pointer to storage containing pointers.
++These function attributes are supported for ARM targets:
+ 
+-@item mips16
+-@itemx nomips16
+-@cindex @code{mips16} function attribute, MIPS
+-@cindex @code{nomips16} function attribute, MIPS
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, ARM
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-On MIPS targets, you can use the @code{mips16} and @code{nomips16}
+-function attributes to locally select or turn off MIPS16 code generation.
+-A function with the @code{mips16} attribute is emitted as MIPS16 code,
+-while MIPS16 code generation is disabled for functions with the
+-@code{nomips16} attribute.  These attributes override the
+-@option{-mips16} and @option{-mno-mips16} options on the command line
+-(@pxref{MIPS Options}).
++You can specify the kind of interrupt to be handled by
++adding an optional parameter to the interrupt attribute like this:
+ 
+-When compiling files containing mixed MIPS16 and non-MIPS16 code, the
+-preprocessor symbol @code{__mips16} reflects the setting on the command line,
+-not that within individual functions.  Mixed MIPS16 and non-MIPS16 code
+-may interact badly with some GCC extensions such as @code{__builtin_apply}
+-(@pxref{Constructing Calls}).
++@smallexample
++void f () __attribute__ ((interrupt ("IRQ")));
++@end smallexample
+ 
+-@item micromips, MIPS
+-@itemx nomicromips, MIPS
+-@cindex @code{micromips} function attribute
+-@cindex @code{nomicromips} function attribute
++@noindent
++Permissible values for this parameter are: @code{IRQ}, @code{FIQ},
++@code{SWI}, @code{ABORT} and @code{UNDEF}.
+ 
+-On MIPS targets, you can use the @code{micromips} and @code{nomicromips}
+-function attributes to locally select or turn off microMIPS code generation.
+-A function with the @code{micromips} attribute is emitted as microMIPS code,
+-while microMIPS code generation is disabled for functions with the
+-@code{nomicromips} attribute.  These attributes override the
+-@option{-mmicromips} and @option{-mno-micromips} options on the command line
+-(@pxref{MIPS Options}).
++On ARMv7-M the interrupt type is ignored, and the attribute means the function
++may be called with a word-aligned stack pointer.
+ 
+-When compiling files containing mixed microMIPS and non-microMIPS code, the
+-preprocessor symbol @code{__mips_micromips} reflects the setting on the
+-command line,
+-not that within individual functions.  Mixed microMIPS and non-microMIPS code
+-may interact badly with some GCC extensions such as @code{__builtin_apply}
+-(@pxref{Constructing Calls}).
++@item isr
++@cindex @code{isr} function attribute, ARM
++Use this attribute on ARM to write Interrupt Service Routines. This is an
++alias to the @code{interrupt} attribute above.
+ 
+-@item model (@var{model-name})
+-@cindex @code{model} function attribute, M32R/D
+-@cindex function addressability on the M32R/D
++@item long_call
++@itemx short_call
++@cindex @code{long_call} function attribute, ARM
++@cindex @code{short_call} function attribute, ARM
++@cindex indirect calls, ARM
++These attributes specify how a particular function is called.
++These attributes override the
++@option{-mlong-calls} (@pxref{ARM Options})
++command-line switch and @code{#pragma long_calls} settings.  For ARM, the
++@code{long_call} attribute indicates that the function might be far
++away from the call site and require a different (more expensive)
++calling sequence.   The @code{short_call} attribute always places
++the offset to the function from the call site into the @samp{BL}
++instruction directly.
+ 
+-On the M32R/D, use this attribute to set the addressability of an
+-object, and of the code generated for a function.  The identifier
+-@var{model-name} is one of @code{small}, @code{medium}, or
+-@code{large}, representing each of the code models.
++@item naked
++@cindex @code{naked} function attribute, ARM
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ 
+-Small model objects live in the lower 16MB of memory (so that their
+-addresses can be loaded with the @code{ld24} instruction), and are
+-callable with the @code{bl} instruction.
++@item pcs
++@cindex @code{pcs} function attribute, ARM
+ 
+-Medium model objects may live anywhere in the 32-bit address space (the
+-compiler generates @code{seth/add3} instructions to load their addresses),
+-and are callable with the @code{bl} instruction.
++The @code{pcs} attribute can be used to control the calling convention
++used for a function on ARM.  The attribute takes an argument that specifies
++the calling convention to use.
+ 
+-Large model objects may live anywhere in the 32-bit address space (the
+-compiler generates @code{seth/add3} instructions to load their addresses),
+-and may not be reachable with the @code{bl} instruction (the compiler
+-generates the much slower @code{seth/add3/jl} instruction sequence).
++When compiling using the AAPCS ABI (or a variant of it) then valid
++values for the argument are @code{"aapcs"} and @code{"aapcs-vfp"}.  In
++order to use a variant other than @code{"aapcs"} then the compiler must
++be permitted to use the appropriate co-processor registers (i.e., the
++VFP registers must be available in order to use @code{"aapcs-vfp"}).
++For example,
+ 
+-@item ms_abi
+-@itemx sysv_abi
+-@cindex @code{ms_abi} function attribute, x86
+-@cindex @code{sysv_abi} function attribute, x86
++@smallexample
++/* Argument passed in r0, and result returned in r0+r1.  */
++double f2d (float) __attribute__((pcs("aapcs")));
++@end smallexample
+ 
+-On 32-bit and 64-bit x86 targets, you can use an ABI attribute
+-to indicate which calling convention should be used for a function.  The
+-@code{ms_abi} attribute tells the compiler to use the Microsoft ABI,
+-while the @code{sysv_abi} attribute tells the compiler to use the ABI
+-used on GNU/Linux and other systems.  The default is to use the Microsoft ABI
+-when targeting Windows.  On all other systems, the default is the x86/AMD ABI.
++Variadic functions always use the @code{"aapcs"} calling convention and
++the compiler rejects attempts to specify an alternative.
+ 
+-Note, the @code{ms_abi} attribute for Microsoft Windows 64-bit targets currently
+-requires the @option{-maccumulate-outgoing-args} option.
++@item target (@var{options})
++@cindex @code{target} function attribute
++As discussed in @ref{Common Function Attributes}, this attribute 
++allows specification of target-specific compilation options.
+ 
+-@item callee_pop_aggregate_return (@var{number})
+-@cindex @code{callee_pop_aggregate_return} function attribute, x86
++On ARM, the following options are allowed:
+ 
+-On x86-32 targets, you can use this attribute to control how
+-aggregates are returned in memory.  If the caller is responsible for
+-popping the hidden pointer together with the rest of the arguments, specify
+-@var{number} equal to zero.  If callee is responsible for popping the
+-hidden pointer, specify @var{number} equal to one.  
++@table @samp
++@item thumb
++@cindex @code{target("thumb")} function attribute, ARM
++Force code generation in the Thumb (T16/T32) ISA, depending on the
++architecture level.
++
++@item arm
++@cindex @code{target("arm")} function attribute, ARM
++Force code generation in the ARM (A32) ISA.
++@end table
+ 
+-The default x86-32 ABI assumes that the callee pops the
+-stack for hidden pointer.  However, on x86-32 Microsoft Windows targets,
+-the compiler assumes that the
+-caller pops the stack for hidden pointer.
++Functions from different modes can be inlined in the caller's mode.
+ 
+-@item ms_hook_prologue
+-@cindex @code{ms_hook_prologue} function attribute, x86
++@end table
+ 
+-On 32-bit and 64-bit x86 targets, you can use
+-this function attribute to make GCC generate the ``hot-patching'' function
+-prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
+-and newer.
++@node AVR Function Attributes
++@subsection AVR Function Attributes
+ 
+-@item hotpatch (@var{halfwords-before-function-label},@var{halfwords-after-function-label})
+-@cindex @code{hotpatch} function attribute, S/390
++These function attributes are supported by the AVR back end:
+ 
+-On S/390 System z targets, you can use this function attribute to
+-make GCC generate a ``hot-patching'' function prologue.  If the
+-@option{-mhotpatch=} command-line option is used at the same time,
+-the @code{hotpatch} attribute takes precedence.  The first of the
+-two arguments specifies the number of halfwords to be added before
+-the function label.  A second argument can be used to specify the
+-number of halfwords to be added after the function label.  For
+-both arguments the maximum allowed value is 1000000.
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, AVR
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-If both arguments are zero, hotpatching is disabled.
++On the AVR, the hardware globally disables interrupts when an
++interrupt is executed.  The first instruction of an interrupt handler
++declared with this attribute is a @code{SEI} instruction to
++re-enable interrupts.  See also the @code{signal} function attribute
++that does not insert a @code{SEI} instruction.  If both @code{signal} and
++@code{interrupt} are specified for the same function, @code{signal}
++is silently ignored.
+ 
+ @item naked
+-@cindex @code{naked} function attribute, ARM
+ @cindex @code{naked} function attribute, AVR
+-@cindex @code{naked} function attribute, MCORE
+-@cindex @code{naked} function attribute, MSP430
+-@cindex @code{naked} function attribute, NDS32
+-@cindex @code{naked} function attribute, RL78
+-@cindex @code{naked} function attribute, RX
+-@cindex @code{naked} function attribute, SPU
+-@cindex function without prologue/epilogue code
+-This attribute is available on the ARM, AVR, MCORE, MSP430, NDS32,
+-RL78, RX and SPU ports.  It allows the compiler to construct the
++This attribute allows the compiler to construct the
+ requisite function declaration, while allowing the body of the
+ function to be assembly code. The specified function will not have
+ prologue/epilogue sequences generated by the compiler. Only basic
+@@ -3393,12 +3610,108 @@ prologue/epilogue sequences generated by the compiler. Only basic
+ basic @code{asm} and C code may appear to work, they cannot be
+ depended upon to work reliably and are not supported.
+ 
+-@item near
+-@cindex @code{near} function attribute, MeP
+-@cindex functions that do not handle memory bank switching on 68HC11/68HC12
+-On MeP targets this attribute causes the compiler to assume the called
+-function is close enough to use the normal calling convention,
+-overriding the @option{-mtf} command-line option.
++@item OS_main
++@itemx OS_task
++@cindex @code{OS_main} function attribute, AVR
++@cindex @code{OS_task} function attribute, AVR
++On AVR, functions with the @code{OS_main} or @code{OS_task} attribute
++do not save/restore any call-saved register in their prologue/epilogue.
++
++The @code{OS_main} attribute can be used when there @emph{is
++guarantee} that interrupts are disabled at the time when the function
++is entered.  This saves resources when the stack pointer has to be
++changed to set up a frame for local variables.
++
++The @code{OS_task} attribute can be used when there is @emph{no
++guarantee} that interrupts are disabled at that time when the function
++is entered like for, e@.g@. task functions in a multi-threading operating
++system. In that case, changing the stack pointer register is
++guarded by save/clear/restore of the global interrupt enable flag.
++
++The differences to the @code{naked} function attribute are:
++@itemize @bullet
++@item @code{naked} functions do not have a return instruction whereas 
++@code{OS_main} and @code{OS_task} functions have a @code{RET} or
++@code{RETI} return instruction.
++@item @code{naked} functions do not set up a frame for local variables
++or a frame pointer whereas @code{OS_main} and @code{OS_task} do this
++as needed.
++@end itemize
++
++@item signal
++@cindex @code{signal} function attribute, AVR
++Use this attribute on the AVR to indicate that the specified
++function is an interrupt handler.  The compiler generates function
++entry and exit sequences suitable for use in an interrupt handler when this
++attribute is present.
++
++See also the @code{interrupt} function attribute. 
++
++The AVR hardware globally disables interrupts when an interrupt is executed.
++Interrupt handler functions defined with the @code{signal} attribute
++do not re-enable interrupts.  It is save to enable interrupts in a
++@code{signal} handler.  This ``save'' only applies to the code
++generated by the compiler and not to the IRQ layout of the
++application which is responsibility of the application.
++
++If both @code{signal} and @code{interrupt} are specified for the same
++function, @code{signal} is silently ignored.
++@end table
++
++@node Blackfin Function Attributes
++@subsection Blackfin Function Attributes
++
++These function attributes are supported by the Blackfin back end:
++
++@table @code
++
++@item exception_handler
++@cindex @code{exception_handler} function attribute
++@cindex exception handler functions, Blackfin
++Use this attribute on the Blackfin to indicate that the specified function
++is an exception handler.  The compiler generates function entry and
++exit sequences suitable for use in an exception handler when this
++attribute is present.
++
++@item interrupt_handler
++@cindex @code{interrupt_handler} function attribute, Blackfin
++Use this attribute to
++indicate that the specified function is an interrupt handler.  The compiler
++generates function entry and exit sequences suitable for use in an
++interrupt handler when this attribute is present.
++
++@item kspisusp
++@cindex @code{kspisusp} function attribute, Blackfin
++@cindex User stack pointer in interrupts on the Blackfin
++When used together with @code{interrupt_handler}, @code{exception_handler}
++or @code{nmi_handler}, code is generated to load the stack pointer
++from the USP register in the function prologue.
++
++@item l1_text
++@cindex @code{l1_text} function attribute, Blackfin
++This attribute specifies a function to be placed into L1 Instruction
++SRAM@. The function is put into a specific section named @code{.l1.text}.
++With @option{-mfdpic}, function calls with a such function as the callee
++or caller uses inlined PLT.
++
++@item l2
++@cindex @code{l2} function attribute, Blackfin
++This attribute specifies a function to be placed into L2
++SRAM. The function is put into a specific section named
++@code{.l2.text}. With @option{-mfdpic}, callers of such functions use
++an inlined PLT.
++
++@item longcall
++@itemx shortcall
++@cindex indirect calls, Blackfin
++@cindex @code{longcall} function attribute, Blackfin
++@cindex @code{shortcall} function attribute, Blackfin
++The @code{longcall} attribute
++indicates that the function might be far away from the call site and
++require a different (more expensive) calling sequence.  The
++@code{shortcall} attribute indicates that the function is always close
++enough for the shorter calling sequence to be used.  These attributes
++override the @option{-mlongcall} switch.
+ 
+ @item nesting
+ @cindex @code{nesting} function attribute, Blackfin
+@@ -3415,410 +3728,349 @@ is an NMI handler.  The compiler generates function entry and
+ exit sequences suitable for use in an NMI handler when this
+ attribute is present.
+ 
+-@item nocompression
+-@cindex @code{nocompression} function attribute, MIPS
+-On MIPS targets, you can use the @code{nocompression} function attribute
+-to locally turn off MIPS16 and microMIPS code generation.  This attribute
+-overrides the @option{-mips16} and @option{-mmicromips} options on the
+-command line (@pxref{MIPS Options}).
+-
+-@item no_instrument_function
+-@cindex @code{no_instrument_function} function attribute
+-@opindex finstrument-functions
+-If @option{-finstrument-functions} is given, profiling function calls are
+-generated at entry and exit of most user-compiled functions.
+-Functions with this attribute are not so instrumented.
+-
+-@item no_split_stack
+-@cindex @code{no_split_stack} function attribute
+-@opindex fsplit-stack
+-If @option{-fsplit-stack} is given, functions have a small
+-prologue which decides whether to split the stack.  Functions with the
+-@code{no_split_stack} attribute do not have that prologue, and thus
+-may run with only a small amount of stack space available.
++@item saveall
++@cindex @code{saveall} function attribute, Blackfin
++@cindex save all registers on the Blackfin
++Use this attribute to indicate that
++all registers except the stack pointer should be saved in the prologue
++regardless of whether they are used or not.
++@end table
+ 
+-@item stack_protect
+-@cindex @code{stack_protect} function attribute
+-This function attribute make a stack protection of the function if 
+-flags @option{fstack-protector} or @option{fstack-protector-strong}
+-or @option{fstack-protector-explicit} are set.
++@node CR16 Function Attributes
++@subsection CR16 Function Attributes
+ 
+-@item noinline
+-@cindex @code{noinline} function attribute
+-This function attribute prevents a function from being considered for
+-inlining.
+-@c Don't enumerate the optimizations by name here; we try to be
+-@c future-compatible with this mechanism.
+-If the function does not have side-effects, there are optimizations
+-other than inlining that cause function calls to be optimized away,
+-although the function call is live.  To keep such calls from being
+-optimized away, put
+-@smallexample
+-asm ("");
+-@end smallexample
++These function attributes are supported by the CR16 back end:
+ 
+-@noindent
+-(@pxref{Extended Asm}) in the called function, to serve as a special
+-side-effect.
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, CR16
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
++@end table
+ 
+-@item noclone
+-@cindex @code{noclone} function attribute
+-This function attribute prevents a function from being considered for
+-cloning---a mechanism that produces specialized copies of functions
+-and which is (currently) performed by interprocedural constant
+-propagation.
++@node Epiphany Function Attributes
++@subsection Epiphany Function Attributes
+ 
+-@item no_icf
+-@cindex @code{no_icf} function attribute
+-This function attribute prevents a functions from being merged with another
+-semantically equivalent function.
++These function attributes are supported by the Epiphany back end:
+ 
+-@item nonnull (@var{arg-index}, @dots{})
+-@cindex @code{nonnull} function attribute
+-The @code{nonnull} attribute specifies that some function parameters should
+-be non-null pointers.  For instance, the declaration:
++@table @code
++@item disinterrupt
++@cindex @code{disinterrupt} function attribute, Epiphany
++This attribute causes the compiler to emit
++instructions to disable interrupts for the duration of the given
++function.
+ 
+-@smallexample
+-extern void *
+-my_memcpy (void *dest, const void *src, size_t len)
+-        __attribute__((nonnull (1, 2)));
+-@end smallexample
++@item forwarder_section
++@cindex @code{forwarder_section} function attribute, Epiphany
++This attribute modifies the behavior of an interrupt handler.
++The interrupt handler may be in external memory which cannot be
++reached by a branch instruction, so generate a local memory trampoline
++to transfer control.  The single parameter identifies the section where
++the trampoline is placed.
+ 
+-@noindent
+-causes the compiler to check that, in calls to @code{my_memcpy},
+-arguments @var{dest} and @var{src} are non-null.  If the compiler
+-determines that a null pointer is passed in an argument slot marked
+-as non-null, and the @option{-Wnonnull} option is enabled, a warning
+-is issued.  The compiler may also choose to make optimizations based
+-on the knowledge that certain function arguments will never be null.
++@item interrupt
++@cindex @code{interrupt} function attribute, Epiphany
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.  It may also generate
++a special section with code to initialize the interrupt vector table.
+ 
+-If no argument index list is given to the @code{nonnull} attribute,
+-all pointer arguments are marked as non-null.  To illustrate, the
+-following declaration is equivalent to the previous example:
++On Epiphany targets one or more optional parameters can be added like this:
+ 
+ @smallexample
+-extern void *
+-my_memcpy (void *dest, const void *src, size_t len)
+-        __attribute__((nonnull));
++void __attribute__ ((interrupt ("dma0, dma1"))) universal_dma_handler ();
+ @end smallexample
+ 
+-@item no_reorder
+-@cindex @code{no_reorder} function attribute
+-Do not reorder functions or variables marked @code{no_reorder}
+-against each other or top level assembler statements the executable.
+-The actual order in the program will depend on the linker command
+-line. Static variables marked like this are also not removed.
+-This has a similar effect
+-as the @option{-fno-toplevel-reorder} option, but only applies to the
+-marked symbols.
++Permissible values for these parameters are: @w{@code{reset}},
++@w{@code{software_exception}}, @w{@code{page_miss}},
++@w{@code{timer0}}, @w{@code{timer1}}, @w{@code{message}},
++@w{@code{dma0}}, @w{@code{dma1}}, @w{@code{wand}} and @w{@code{swi}}.
++Multiple parameters indicate that multiple entries in the interrupt
++vector table should be initialized for this function, i.e.@: for each
++parameter @w{@var{name}}, a jump to the function is emitted in
++the section @w{ivt_entry_@var{name}}.  The parameter(s) may be omitted
++entirely, in which case no interrupt vector table entry is provided.
+ 
+-@item returns_nonnull
+-@cindex @code{returns_nonnull} function attribute
+-The @code{returns_nonnull} attribute specifies that the function
+-return value should be a non-null pointer.  For instance, the declaration:
++Note that interrupts are enabled inside the function
++unless the @code{disinterrupt} attribute is also specified.
+ 
++The following examples are all valid uses of these attributes on
++Epiphany targets:
+ @smallexample
+-extern void *
+-mymalloc (size_t len) __attribute__((returns_nonnull));
++void __attribute__ ((interrupt)) universal_handler ();
++void __attribute__ ((interrupt ("dma1"))) dma1_handler ();
++void __attribute__ ((interrupt ("dma0, dma1"))) 
++  universal_dma_handler ();
++void __attribute__ ((interrupt ("timer0"), disinterrupt))
++  fast_timer_handler ();
++void __attribute__ ((interrupt ("dma0, dma1"), 
++                     forwarder_section ("tramp")))
++  external_dma_handler ();
+ @end smallexample
+ 
+-@noindent
+-lets the compiler optimize callers based on the knowledge
+-that the return value will never be null.
++@item long_call
++@itemx short_call
++@cindex @code{long_call} function attribute, Epiphany
++@cindex @code{short_call} function attribute, Epiphany
++@cindex indirect calls, Epiphany
++These attributes specify how a particular function is called.
++These attributes override the
++@option{-mlong-calls} (@pxref{Adapteva Epiphany Options})
++command-line switch and @code{#pragma long_calls} settings.
++@end table
+ 
+-@item noreturn
+-@cindex @code{noreturn} function attribute
+-A few standard library functions, such as @code{abort} and @code{exit},
+-cannot return.  GCC knows this automatically.  Some programs define
+-their own functions that never return.  You can declare them
+-@code{noreturn} to tell the compiler this fact.  For example,
+ 
+-@smallexample
+-@group
+-void fatal () __attribute__ ((noreturn));
++@node H8/300 Function Attributes
++@subsection H8/300 Function Attributes
+ 
+-void
+-fatal (/* @r{@dots{}} */)
+-@{
+-  /* @r{@dots{}} */ /* @r{Print error message.} */ /* @r{@dots{}} */
+-  exit (1);
+-@}
+-@end group
+-@end smallexample
++These function attributes are available for H8/300 targets:
+ 
+-The @code{noreturn} keyword tells the compiler to assume that
+-@code{fatal} cannot return.  It can then optimize without regard to what
+-would happen if @code{fatal} ever did return.  This makes slightly
+-better code.  More importantly, it helps avoid spurious warnings of
+-uninitialized variables.
++@table @code
++@item function_vector
++@cindex @code{function_vector} function attribute, H8/300
++Use this attribute on the H8/300, H8/300H, and H8S to indicate 
++that the specified function should be called through the function vector.
++Calling a function through the function vector reduces code size; however,
++the function vector has a limited size (maximum 128 entries on the H8/300
++and 64 entries on the H8/300H and H8S)
++and shares space with the interrupt vector.
+ 
+-The @code{noreturn} keyword does not affect the exceptional path when that
+-applies: a @code{noreturn}-marked function may still return to the caller
+-by throwing an exception or calling @code{longjmp}.
++@item interrupt_handler
++@cindex @code{interrupt_handler} function attribute, H8/300
++Use this attribute on the H8/300, H8/300H, and H8S to
++indicate that the specified function is an interrupt handler.  The compiler
++generates function entry and exit sequences suitable for use in an
++interrupt handler when this attribute is present.
+ 
+-Do not assume that registers saved by the calling function are
+-restored before calling the @code{noreturn} function.
++@item saveall
++@cindex @code{saveall} function attribute, H8/300
++@cindex save all registers on the H8/300, H8/300H, and H8S
++Use this attribute on the H8/300, H8/300H, and H8S to indicate that
++all registers except the stack pointer should be saved in the prologue
++regardless of whether they are used or not.
++@end table
+ 
+-It does not make sense for a @code{noreturn} function to have a return
+-type other than @code{void}.
++@node IA-64 Function Attributes
++@subsection IA-64 Function Attributes
+ 
+-@item nothrow
+-@cindex @code{nothrow} function attribute
+-The @code{nothrow} attribute is used to inform the compiler that a
+-function cannot throw an exception.  For example, most functions in
+-the standard C library can be guaranteed not to throw an exception
+-with the notable exceptions of @code{qsort} and @code{bsearch} that
+-take function pointer arguments.
++These function attributes are supported on IA-64 targets:
+ 
+-@item nosave_low_regs
+-@cindex @code{nosave_low_regs} function attribute, SH
+-Use this attribute on SH targets to indicate that an @code{interrupt_handler}
+-function should not save and restore registers R0..R7.  This can be used on SH3*
+-and SH4* targets that have a second R0..R7 register bank for non-reentrant
+-interrupt handlers.
++@table @code
++@item syscall_linkage
++@cindex @code{syscall_linkage} function attribute, IA-64
++This attribute is used to modify the IA-64 calling convention by marking
++all input registers as live at all function exits.  This makes it possible
++to restart a system call after an interrupt without having to save/restore
++the input registers.  This also prevents kernel data from leaking into
++application code.
+ 
+-@item optimize
+-@cindex @code{optimize} function attribute
+-The @code{optimize} attribute is used to specify that a function is to
+-be compiled with different optimization options than specified on the
+-command line.  Arguments can either be numbers or strings.  Numbers
+-are assumed to be an optimization level.  Strings that begin with
+-@code{O} are assumed to be an optimization option, while other options
+-are assumed to be used with a @code{-f} prefix.  You can also use the
+-@samp{#pragma GCC optimize} pragma to set the optimization options
+-that affect more than one function.
+-@xref{Function Specific Option Pragmas}, for details about the
+-@samp{#pragma GCC optimize} pragma.
++@item version_id
++@cindex @code{version_id} function attribute, IA-64
++This IA-64 HP-UX attribute, attached to a global variable or function, renames a
++symbol to contain a version string, thus allowing for function level
++versioning.  HP-UX system header files may use function level versioning
++for some system calls.
+ 
+-This can be used for instance to have frequently-executed functions
+-compiled with more aggressive optimization options that produce faster
+-and larger code, while other functions can be compiled with less
+-aggressive options.
++@smallexample
++extern int foo () __attribute__((version_id ("20040821")));
++@end smallexample
+ 
+-@item OS_main
+-@itemx OS_task
+-@cindex @code{OS_main} function attribute, AVR
+-@cindex @code{OS_task} function attribute, AVR
+-On AVR, functions with the @code{OS_main} or @code{OS_task} attribute
+-do not save/restore any call-saved register in their prologue/epilogue.
++@noindent
++Calls to @code{foo} are mapped to calls to @code{foo@{20040821@}}.
++@end table
+ 
+-The @code{OS_main} attribute can be used when there @emph{is
+-guarantee} that interrupts are disabled at the time when the function
+-is entered.  This saves resources when the stack pointer has to be
+-changed to set up a frame for local variables.
++@node M32C Function Attributes
++@subsection M32C Function Attributes
+ 
+-The @code{OS_task} attribute can be used when there is @emph{no
+-guarantee} that interrupts are disabled at that time when the function
+-is entered like for, e@.g@. task functions in a multi-threading operating
+-system. In that case, changing the stack pointer register is
+-guarded by save/clear/restore of the global interrupt enable flag.
++These function attributes are supported by the M32C back end:
+ 
+-The differences to the @code{naked} function attribute are:
+-@itemize @bullet
+-@item @code{naked} functions do not have a return instruction whereas 
+-@code{OS_main} and @code{OS_task} functions have a @code{RET} or
+-@code{RETI} return instruction.
+-@item @code{naked} functions do not set up a frame for local variables
+-or a frame pointer whereas @code{OS_main} and @code{OS_task} do this
+-as needed.
+-@end itemize
++@table @code
++@item bank_switch
++@cindex @code{bank_switch} function attribute, M32C
++When added to an interrupt handler with the M32C port, causes the
++prologue and epilogue to use bank switching to preserve the registers
++rather than saving them on the stack.
+ 
+-@item pcs
+-@cindex @code{pcs} function attribute, ARM
++@item fast_interrupt
++@cindex @code{fast_interrupt} function attribute, M32C
++Use this attribute on the M32C port to indicate that the specified
++function is a fast interrupt handler.  This is just like the
++@code{interrupt} attribute, except that @code{freit} is used to return
++instead of @code{reit}.
+ 
+-The @code{pcs} attribute can be used to control the calling convention
+-used for a function on ARM.  The attribute takes an argument that specifies
+-the calling convention to use.
++@item function_vector
++@cindex @code{function_vector} function attribute, M16C/M32C
++On M16C/M32C targets, the @code{function_vector} attribute declares a
++special page subroutine call function. Use of this attribute reduces
++the code size by 2 bytes for each call generated to the
++subroutine. The argument to the attribute is the vector number entry
++from the special page vector table which contains the 16 low-order
++bits of the subroutine's entry address. Each vector table has special
++page number (18 to 255) that is used in @code{jsrs} instructions.
++Jump addresses of the routines are generated by adding 0x0F0000 (in
++case of M16C targets) or 0xFF0000 (in case of M32C targets), to the
++2-byte addresses set in the vector table. Therefore you need to ensure
++that all the special page vector routines should get mapped within the
++address range 0x0F0000 to 0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF
++(for M32C).
+ 
+-When compiling using the AAPCS ABI (or a variant of it) then valid
+-values for the argument are @code{"aapcs"} and @code{"aapcs-vfp"}.  In
+-order to use a variant other than @code{"aapcs"} then the compiler must
+-be permitted to use the appropriate co-processor registers (i.e., the
+-VFP registers must be available in order to use @code{"aapcs-vfp"}).
+-For example,
++In the following example 2 bytes are saved for each call to
++function @code{foo}.
+ 
+ @smallexample
+-/* Argument passed in r0, and result returned in r0+r1.  */
+-double f2d (float) __attribute__((pcs("aapcs")));
++void foo (void) __attribute__((function_vector(0x18)));
++void foo (void)
++@{
++@}
++
++void bar (void)
++@{
++    foo();
++@}
+ @end smallexample
+ 
+-Variadic functions always use the @code{"aapcs"} calling convention and
+-the compiler rejects attempts to specify an alternative.
++If functions are defined in one file and are called in another file,
++then be sure to write this declaration in both files.
+ 
+-@item pure
+-@cindex @code{pure} function attribute
+-Many functions have no effects except the return value and their
+-return value depends only on the parameters and/or global variables.
+-Such a function can be subject
+-to common subexpression elimination and loop optimization just as an
+-arithmetic operator would be.  These functions should be declared
+-with the attribute @code{pure}.  For example,
++This attribute is ignored for R8C target.
+ 
+-@smallexample
+-int square (int) __attribute__ ((pure));
+-@end smallexample
++@item interrupt
++@cindex @code{interrupt} function attribute, M32C
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
++@end table
+ 
+-@noindent
+-says that the hypothetical function @code{square} is safe to call
+-fewer times than the program says.
++@node M32R/D Function Attributes
++@subsection M32R/D Function Attributes
+ 
+-Some of common examples of pure functions are @code{strlen} or @code{memcmp}.
+-Interesting non-pure functions are functions with infinite loops or those
+-depending on volatile memory or other system resource, that may change between
+-two consecutive calls (such as @code{feof} in a multithreading environment).
++These function attributes are supported by the M32R/D back end:
+ 
+-@item hot
+-@cindex @code{hot} function attribute
+-The @code{hot} attribute on a function is used to inform the compiler that
+-the function is a hot spot of the compiled program.  The function is
+-optimized more aggressively and on many targets it is placed into a special
+-subsection of the text section so all hot functions appear close together,
+-improving locality.
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, M32R/D
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-When profile feedback is available, via @option{-fprofile-use}, hot functions
+-are automatically detected and this attribute is ignored.
++@item model (@var{model-name})
++@cindex @code{model} function attribute, M32R/D
++@cindex function addressability on the M32R/D
+ 
+-@item cold
+-@cindex @code{cold} function attribute
+-The @code{cold} attribute on functions is used to inform the compiler that
+-the function is unlikely to be executed.  The function is optimized for
+-size rather than speed and on many targets it is placed into a special
+-subsection of the text section so all cold functions appear close together,
+-improving code locality of non-cold parts of program.  The paths leading
+-to calls of cold functions within code are marked as unlikely by the branch
+-prediction mechanism.  It is thus useful to mark functions used to handle
+-unlikely conditions, such as @code{perror}, as cold to improve optimization
+-of hot functions that do call marked functions in rare occasions.
++On the M32R/D, use this attribute to set the addressability of an
++object, and of the code generated for a function.  The identifier
++@var{model-name} is one of @code{small}, @code{medium}, or
++@code{large}, representing each of the code models.
+ 
+-When profile feedback is available, via @option{-fprofile-use}, cold functions
+-are automatically detected and this attribute is ignored.
++Small model objects live in the lower 16MB of memory (so that their
++addresses can be loaded with the @code{ld24} instruction), and are
++callable with the @code{bl} instruction.
+ 
+-@item no_sanitize_address
+-@itemx no_address_safety_analysis
+-@cindex @code{no_sanitize_address} function attribute
+-The @code{no_sanitize_address} attribute on functions is used
+-to inform the compiler that it should not instrument memory accesses
+-in the function when compiling with the @option{-fsanitize=address} option.
+-The @code{no_address_safety_analysis} is a deprecated alias of the
+-@code{no_sanitize_address} attribute, new code should use
+-@code{no_sanitize_address}.
++Medium model objects may live anywhere in the 32-bit address space (the
++compiler generates @code{seth/add3} instructions to load their addresses),
++and are callable with the @code{bl} instruction.
+ 
+-@item no_sanitize_thread
+-@cindex @code{no_sanitize_thread} function attribute
+-The @code{no_sanitize_thread} attribute on functions is used
+-to inform the compiler that it should not instrument memory accesses
+-in the function when compiling with the @option{-fsanitize=thread} option.
++Large model objects may live anywhere in the 32-bit address space (the
++compiler generates @code{seth/add3} instructions to load their addresses),
++and may not be reachable with the @code{bl} instruction (the compiler
++generates the much slower @code{seth/add3/jl} instruction sequence).
++@end table
+ 
+-@item no_sanitize_undefined
+-@cindex @code{no_sanitize_undefined} function attribute
+-The @code{no_sanitize_undefined} attribute on functions is used
+-to inform the compiler that it should not check for undefined behavior
+-in the function when compiling with the @option{-fsanitize=undefined} option.
++@node m68k Function Attributes
++@subsection m68k Function Attributes
+ 
+-@item bnd_legacy
+-@cindex @code{bnd_legacy} function attribute
+-@cindex Pointer Bounds Checker attributes
+-The @code{bnd_legacy} attribute on functions is used to inform the
+-compiler that the function should not be instrumented when compiled
+-with the @option{-fcheck-pointer-bounds} option.
++These function attributes are supported by the m68k back end:
+ 
+-@item bnd_instrument
+-@cindex @code{bnd_instrument} function attribute
+-The @code{bnd_instrument} attribute on functions is used to inform the
+-compiler that the function should be instrumented when compiled
+-with the @option{-fchkp-instrument-marked-only} option.
++@table @code
++@item interrupt
++@itemx interrupt_handler
++@cindex @code{interrupt} function attribute, m68k
++@cindex @code{interrupt_handler} function attribute, m68k
++Use this attribute to
++indicate that the specified function is an interrupt handler.  The compiler
++generates function entry and exit sequences suitable for use in an
++interrupt handler when this attribute is present.  Either name may be used.
+ 
+-@item regparm (@var{number})
+-@cindex @code{regparm} function attribute, x86
+-@cindex functions that are passed arguments in registers on x86-32
+-On x86-32 targets, the @code{regparm} attribute causes the compiler to
+-pass arguments number one to @var{number} if they are of integral type
+-in registers EAX, EDX, and ECX instead of on the stack.  Functions that
+-take a variable number of arguments continue to be passed all of their
+-arguments on the stack.
++@item interrupt_thread
++@cindex @code{interrupt_thread} function attribute, fido
++Use this attribute on fido, a subarchitecture of the m68k, to indicate
++that the specified function is an interrupt handler that is designed
++to run as a thread.  The compiler omits generate prologue/epilogue
++sequences and replaces the return instruction with a @code{sleep}
++instruction.  This attribute is available only on fido.
++@end table
+ 
+-Beware that on some ELF systems this attribute is unsuitable for
+-global functions in shared libraries with lazy binding (which is the
+-default).  Lazy binding sends the first call via resolving code in
+-the loader, which might assume EAX, EDX and ECX can be clobbered, as
+-per the standard calling conventions.  Solaris 8 is affected by this.
+-Systems with the GNU C Library version 2.1 or higher
+-and FreeBSD are believed to be
+-safe since the loaders there save EAX, EDX and ECX.  (Lazy binding can be
+-disabled with the linker or the loader if desired, to avoid the
+-problem.)
++@node MCORE Function Attributes
++@subsection MCORE Function Attributes
++
++These function attributes are supported by the MCORE back end:
+ 
+-@item reset
+-@cindex @code{reset} function attribute, NDS32
+-@cindex reset handler functions
+-Use this attribute on the NDS32 target to indicate that the specified function
+-is a reset handler.  The compiler will generate corresponding sections
+-for use in a reset handler.  You can use the following attributes
+-to provide extra exception handling:
+ @table @code
+-@item nmi
+-@cindex @code{nmi} function attribute, NDS32
+-Provide a user-defined function to handle NMI exception.
+-@item warm
+-@cindex @code{warm} function attribute, NDS32
+-Provide a user-defined function to handle warm reset exception.
++@item naked
++@cindex @code{naked} function attribute, MCORE
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ @end table
+ 
+-@item sseregparm
+-@cindex @code{sseregparm} function attribute, x86
+-On x86-32 targets with SSE support, the @code{sseregparm} attribute
+-causes the compiler to pass up to 3 floating-point arguments in
+-SSE registers instead of on the stack.  Functions that take a
+-variable number of arguments continue to pass all of their
+-floating-point arguments on the stack.
++@node MeP Function Attributes
++@subsection MeP Function Attributes
+ 
+-@item force_align_arg_pointer
+-@cindex @code{force_align_arg_pointer} function attribute, x86
+-On x86 targets, the @code{force_align_arg_pointer} attribute may be
+-applied to individual function definitions, generating an alternate
+-prologue and epilogue that realigns the run-time stack if necessary.
+-This supports mixing legacy codes that run with a 4-byte aligned stack
+-with modern codes that keep a 16-byte stack for SSE compatibility.
++These function attributes are supported by the MeP back end:
++
++@table @code
++@item disinterrupt
++@cindex @code{disinterrupt} function attribute, MeP
++On MeP targets, this attribute causes the compiler to emit
++instructions to disable interrupts for the duration of the given
++function.
+ 
+-@item renesas
+-@cindex @code{renesas} function attribute, SH
+-On SH targets this attribute specifies that the function or struct follows the
+-Renesas ABI.
++@item interrupt
++@cindex @code{interrupt} function attribute, MeP
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-@item resbank
+-@cindex @code{resbank} function attribute, SH
+-On the SH2A target, this attribute enables the high-speed register
+-saving and restoration using a register bank for @code{interrupt_handler}
+-routines.  Saving to the bank is performed automatically after the CPU
+-accepts an interrupt that uses a register bank.
++@item near
++@cindex @code{near} function attribute, MeP
++This attribute causes the compiler to assume the called
++function is close enough to use the normal calling convention,
++overriding the @option{-mtf} command-line option.
+ 
+-The nineteen 32-bit registers comprising general register R0 to R14,
+-control register GBR, and system registers MACH, MACL, and PR and the
+-vector table address offset are saved into a register bank.  Register
+-banks are stacked in first-in last-out (FILO) sequence.  Restoration
+-from the bank is executed by issuing a RESBANK instruction.
++@item far
++@cindex @code{far} function attribute, MeP
++On MeP targets this causes the compiler to use a calling convention
++that assumes the called function is too far away for the built-in
++addressing modes.
+ 
+-@item returns_twice
+-@cindex @code{returns_twice} function attribute
+-The @code{returns_twice} attribute tells the compiler that a function may
+-return more than one time.  The compiler ensures that all registers
+-are dead before calling such a function and emits a warning about
+-the variables that may be clobbered after the second return from the
+-function.  Examples of such functions are @code{setjmp} and @code{vfork}.
+-The @code{longjmp}-like counterpart of such function, if any, might need
+-to be marked with the @code{noreturn} attribute.
++@item vliw
++@cindex @code{vliw} function attribute, MeP
++The @code{vliw} attribute tells the compiler to emit
++instructions in VLIW mode instead of core mode.  Note that this
++attribute is not allowed unless a VLIW coprocessor has been configured
++and enabled through command-line options.
++@end table
+ 
+-@item saveall
+-@cindex @code{saveall} function attribute, Blackfin
+-@cindex @code{saveall} function attribute, H8/300
+-@cindex save all registers on the Blackfin, H8/300, H8/300H, and H8S
+-Use this attribute on the Blackfin, H8/300, H8/300H, and H8S to indicate that
+-all registers except the stack pointer should be saved in the prologue
+-regardless of whether they are used or not.
++@node MicroBlaze Function Attributes
++@subsection MicroBlaze Function Attributes
+ 
++These function attributes are supported on MicroBlaze targets:
++
++@table @code
+ @item save_volatiles
+ @cindex @code{save_volatiles} function attribute, MicroBlaze
+-Use this attribute on the MicroBlaze to indicate that the function is
++Use this attribute to indicate that the function is
+ an interrupt handler.  All volatile registers (in addition to non-volatile
+ registers) are saved in the function prologue.  If the function is a leaf
+ function, only volatiles used by the function are saved.  A normal function
+@@ -3827,7 +4079,7 @@ return is generated instead of a return from interrupt.
+ @item break_handler
+ @cindex @code{break_handler} function attribute, MicroBlaze
+ @cindex break handler functions
+-Use this attribute on the MicroBlaze ports to indicate that
++Use this attribute to indicate that
+ the specified function is a break handler.  The compiler generates function
+ entry and exit sequences suitable for use in an break handler when this
+ attribute is present. The return from @code{break_handler} is done through
+@@ -3836,290 +4088,404 @@ the @code{rtbd} instead of @code{rtsd}.
+ @smallexample
+ void f () __attribute__ ((break_handler));
+ @end smallexample
++@end table
+ 
+-@item section ("@var{section-name}")
+-@cindex @code{section} function attribute
+-Normally, the compiler places the code it generates in the @code{text} section.
+-Sometimes, however, you need additional sections, or you need certain
+-particular functions to appear in special sections.  The @code{section}
+-attribute specifies that a function lives in a particular section.
+-For example, the declaration:
++@node Microsoft Windows Function Attributes
++@subsection Microsoft Windows Function Attributes
+ 
+-@smallexample
+-extern void foobar (void) __attribute__ ((section ("bar")));
+-@end smallexample
++The following attributes are available on Microsoft Windows and Symbian OS
++targets.
+ 
+-@noindent
+-puts the function @code{foobar} in the @code{bar} section.
++@table @code
++@item dllexport
++@cindex @code{dllexport} function attribute
++@cindex @code{__declspec(dllexport)}
++On Microsoft Windows targets and Symbian OS targets the
++@code{dllexport} attribute causes the compiler to provide a global
++pointer to a pointer in a DLL, so that it can be referenced with the
++@code{dllimport} attribute.  On Microsoft Windows targets, the pointer
++name is formed by combining @code{_imp__} and the function or variable
++name.
+ 
+-Some file formats do not support arbitrary sections so the @code{section}
+-attribute is not available on all platforms.
+-If you need to map the entire contents of a module to a particular
+-section, consider using the facilities of the linker instead.
++You can use @code{__declspec(dllexport)} as a synonym for
++@code{__attribute__ ((dllexport))} for compatibility with other
++compilers.
+ 
+-@item sentinel
+-@cindex @code{sentinel} function attribute
+-This function attribute ensures that a parameter in a function call is
+-an explicit @code{NULL}.  The attribute is only valid on variadic
+-functions.  By default, the sentinel is located at position zero, the
+-last parameter of the function call.  If an optional integer position
+-argument P is supplied to the attribute, the sentinel must be located at
+-position P counting backwards from the end of the argument list.
++On systems that support the @code{visibility} attribute, this
++attribute also implies ``default'' visibility.  It is an error to
++explicitly specify any other visibility.
+ 
+-@smallexample
+-__attribute__ ((sentinel))
+-is equivalent to
+-__attribute__ ((sentinel(0)))
+-@end smallexample
++GCC's default behavior is to emit all inline functions with the
++@code{dllexport} attribute.  Since this can cause object file-size bloat,
++you can use @option{-fno-keep-inline-dllexport}, which tells GCC to
++ignore the attribute for inlined functions unless the 
++@option{-fkeep-inline-functions} flag is used instead.
+ 
+-The attribute is automatically set with a position of 0 for the built-in
+-functions @code{execl} and @code{execlp}.  The built-in function
+-@code{execle} has the attribute set with a position of 1.
++The attribute is ignored for undefined symbols.
+ 
+-A valid @code{NULL} in this context is defined as zero with any pointer
+-type.  If your system defines the @code{NULL} macro with an integer type
+-then you need to add an explicit cast.  GCC replaces @code{stddef.h}
+-with a copy that redefines NULL appropriately.
++When applied to C++ classes, the attribute marks defined non-inlined
++member functions and static data members as exports.  Static consts
++initialized in-class are not marked unless they are also defined
++out-of-class.
+ 
+-The warnings for missing or incorrect sentinels are enabled with
+-@option{-Wformat}.
++For Microsoft Windows targets there are alternative methods for
++including the symbol in the DLL's export table such as using a
++@file{.def} file with an @code{EXPORTS} section or, with GNU ld, using
++the @option{--export-all} linker flag.
++
++@item dllimport
++@cindex @code{dllimport} function attribute
++@cindex @code{__declspec(dllimport)}
++On Microsoft Windows and Symbian OS targets, the @code{dllimport}
++attribute causes the compiler to reference a function or variable via
++a global pointer to a pointer that is set up by the DLL exporting the
++symbol.  The attribute implies @code{extern}.  On Microsoft Windows
++targets, the pointer name is formed by combining @code{_imp__} and the
++function or variable name.
+ 
+-@item short_call
+-See @code{long_call}.
++You can use @code{__declspec(dllimport)} as a synonym for
++@code{__attribute__ ((dllimport))} for compatibility with other
++compilers.
+ 
+-@item shortcall
+-See @code{longcall}.
++On systems that support the @code{visibility} attribute, this
++attribute also implies ``default'' visibility.  It is an error to
++explicitly specify any other visibility.
+ 
+-@item signal
+-@cindex @code{signal} function attribute, AVR
+-Use this attribute on the AVR to indicate that the specified
+-function is an interrupt handler.  The compiler generates function
+-entry and exit sequences suitable for use in an interrupt handler when this
+-attribute is present.
++Currently, the attribute is ignored for inlined functions.  If the
++attribute is applied to a symbol @emph{definition}, an error is reported.
++If a symbol previously declared @code{dllimport} is later defined, the
++attribute is ignored in subsequent references, and a warning is emitted.
++The attribute is also overridden by a subsequent declaration as
++@code{dllexport}.
+ 
+-See also the @code{interrupt} function attribute. 
++When applied to C++ classes, the attribute marks non-inlined
++member functions and static data members as imports.  However, the
++attribute is ignored for virtual methods to allow creation of vtables
++using thunks.
+ 
+-The AVR hardware globally disables interrupts when an interrupt is executed.
+-Interrupt handler functions defined with the @code{signal} attribute
+-do not re-enable interrupts.  It is save to enable interrupts in a
+-@code{signal} handler.  This ``save'' only applies to the code
+-generated by the compiler and not to the IRQ layout of the
+-application which is responsibility of the application.
++On the SH Symbian OS target the @code{dllimport} attribute also has
++another affect---it can cause the vtable and run-time type information
++for a class to be exported.  This happens when the class has a
++dllimported constructor or a non-inline, non-pure virtual function
++and, for either of those two conditions, the class also has an inline
++constructor or destructor and has a key function that is defined in
++the current translation unit.
+ 
+-If both @code{signal} and @code{interrupt} are specified for the same
+-function, @code{signal} is silently ignored.
++For Microsoft Windows targets the use of the @code{dllimport}
++attribute on functions is not necessary, but provides a small
++performance benefit by eliminating a thunk in the DLL@.  The use of the
++@code{dllimport} attribute on imported variables can be avoided by passing the
++@option{--enable-auto-import} switch to the GNU linker.  As with
++functions, using the attribute for a variable eliminates a thunk in
++the DLL@.
+ 
+-@item sp_switch
+-@cindex @code{sp_switch} function attribute, SH
+-Use this attribute on the SH to indicate an @code{interrupt_handler}
+-function should switch to an alternate stack.  It expects a string
+-argument that names a global variable holding the address of the
+-alternate stack.
++One drawback to using this attribute is that a pointer to a
++@emph{variable} marked as @code{dllimport} cannot be used as a constant
++address. However, a pointer to a @emph{function} with the
++@code{dllimport} attribute can be used as a constant initializer; in
++this case, the address of a stub function in the import lib is
++referenced.  On Microsoft Windows targets, the attribute can be disabled
++for functions by setting the @option{-mnop-fun-dllimport} flag.
++@end table
+ 
+-@smallexample
+-void *alt_stack;
+-void f () __attribute__ ((interrupt_handler,
+-                          sp_switch ("alt_stack")));
+-@end smallexample
++@node MIPS Function Attributes
++@subsection MIPS Function Attributes
+ 
+-@item stdcall
+-@cindex @code{stdcall} function attribute, x86-32
+-@cindex functions that pop the argument stack on x86-32
+-On x86-32 targets, the @code{stdcall} attribute causes the compiler to
+-assume that the called function pops off the stack space used to
+-pass arguments, unless it takes a variable number of arguments.
++These function attributes are supported by the MIPS back end:
+ 
+-@item syscall_linkage
+-@cindex @code{syscall_linkage} function attribute, IA-64
+-This attribute is used to modify the IA-64 calling convention by marking
+-all input registers as live at all function exits.  This makes it possible
+-to restart a system call after an interrupt without having to save/restore
+-the input registers.  This also prevents kernel data from leaking into
+-application code.
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, MIPS
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-@item target
+-@cindex @code{target} function attribute
+-The @code{target} attribute is used to specify that a function is to
+-be compiled with different target options than specified on the
+-command line.  This can be used for instance to have functions
+-compiled with a different ISA (instruction set architecture) than the
+-default.  You can also use the @samp{#pragma GCC target} pragma to set
+-more than one function to be compiled with specific target options.
+-@xref{Function Specific Option Pragmas}, for details about the
+-@samp{#pragma GCC target} pragma.
++You can use the following attributes to modify the behavior
++of an interrupt handler:
++@table @code
++@item use_shadow_register_set
++@cindex @code{use_shadow_register_set} function attribute, MIPS
++Assume that the handler uses a shadow register set, instead of
++the main general-purpose registers.
+ 
+-For instance on an x86, you could compile one function with
+-@code{target("sse4.1,arch=core2")} and another with
+-@code{target("sse4a,arch=amdfam10")}.  This is equivalent to
+-compiling the first function with @option{-msse4.1} and
+-@option{-march=core2} options, and the second function with
+-@option{-msse4a} and @option{-march=amdfam10} options.  It is up to the
+-user to make sure that a function is only invoked on a machine that
+-supports the particular ISA it is compiled for (for example by using
+-@code{cpuid} on x86 to determine what feature bits and architecture
+-family are used).
++@item keep_interrupts_masked
++@cindex @code{keep_interrupts_masked} function attribute, MIPS
++Keep interrupts masked for the whole function.  Without this attribute,
++GCC tries to reenable interrupts for as much of the function as it can.
++
++@item use_debug_exception_return
++@cindex @code{use_debug_exception_return} function attribute, MIPS
++Return using the @code{deret} instruction.  Interrupt handlers that don't
++have this attribute return using @code{eret} instead.
++@end table
+ 
++You can use any combination of these attributes, as shown below:
+ @smallexample
+-int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
+-int sse3_func (void) __attribute__ ((__target__ ("sse3")));
++void __attribute__ ((interrupt)) v0 ();
++void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
++void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
++void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
++void __attribute__ ((interrupt, use_shadow_register_set,
++                     keep_interrupts_masked)) v4 ();
++void __attribute__ ((interrupt, use_shadow_register_set,
++                     use_debug_exception_return)) v5 ();
++void __attribute__ ((interrupt, keep_interrupts_masked,
++                     use_debug_exception_return)) v6 ();
++void __attribute__ ((interrupt, use_shadow_register_set,
++                     keep_interrupts_masked,
++                     use_debug_exception_return)) v7 ();
+ @end smallexample
+ 
+-You can either use multiple
+-strings to specify multiple options, or separate the options
+-with a comma (@samp{,}).
++@item long_call
++@itemx near
++@itemx far
++@cindex indirect calls, MIPS
++@cindex @code{long_call} function attribute, MIPS
++@cindex @code{near} function attribute, MIPS
++@cindex @code{far} function attribute, MIPS
++These attributes specify how a particular function is called on MIPS@.
++The attributes override the @option{-mlong-calls} (@pxref{MIPS Options})
++command-line switch.  The @code{long_call} and @code{far} attributes are
++synonyms, and cause the compiler to always call
++the function by first loading its address into a register, and then using
++the contents of that register.  The @code{near} attribute has the opposite
++effect; it specifies that non-PIC calls should be made using the more
++efficient @code{jal} instruction.
+ 
+-The @code{target} attribute is presently implemented for
+-x86, PowerPC, and Nios II targets only.
+-The options supported are specific to each target.
++@item mips16
++@itemx nomips16
++@cindex @code{mips16} function attribute, MIPS
++@cindex @code{nomips16} function attribute, MIPS
+ 
+-On the x86, the following options are allowed:
++On MIPS targets, you can use the @code{mips16} and @code{nomips16}
++function attributes to locally select or turn off MIPS16 code generation.
++A function with the @code{mips16} attribute is emitted as MIPS16 code,
++while MIPS16 code generation is disabled for functions with the
++@code{nomips16} attribute.  These attributes override the
++@option{-mips16} and @option{-mno-mips16} options on the command line
++(@pxref{MIPS Options}).
+ 
+-@table @samp
+-@item abm
+-@itemx no-abm
+-@cindex @code{target("abm")} function attribute, x86
+-Enable/disable the generation of the advanced bit instructions.
++When compiling files containing mixed MIPS16 and non-MIPS16 code, the
++preprocessor symbol @code{__mips16} reflects the setting on the command line,
++not that within individual functions.  Mixed MIPS16 and non-MIPS16 code
++may interact badly with some GCC extensions such as @code{__builtin_apply}
++(@pxref{Constructing Calls}).
+ 
+-@item aes
+-@itemx no-aes
+-@cindex @code{target("aes")} function attribute, x86
+-Enable/disable the generation of the AES instructions.
++@item micromips, MIPS
++@itemx nomicromips, MIPS
++@cindex @code{micromips} function attribute
++@cindex @code{nomicromips} function attribute
+ 
+-@item default
+-@cindex @code{target("default")} function attribute, x86
+-@xref{Function Multiversioning}, where it is used to specify the
+-default function version.
++On MIPS targets, you can use the @code{micromips} and @code{nomicromips}
++function attributes to locally select or turn off microMIPS code generation.
++A function with the @code{micromips} attribute is emitted as microMIPS code,
++while microMIPS code generation is disabled for functions with the
++@code{nomicromips} attribute.  These attributes override the
++@option{-mmicromips} and @option{-mno-micromips} options on the command line
++(@pxref{MIPS Options}).
+ 
+-@item mmx
+-@itemx no-mmx
+-@cindex @code{target("mmx")} function attribute, x86
+-Enable/disable the generation of the MMX instructions.
++When compiling files containing mixed microMIPS and non-microMIPS code, the
++preprocessor symbol @code{__mips_micromips} reflects the setting on the
++command line,
++not that within individual functions.  Mixed microMIPS and non-microMIPS code
++may interact badly with some GCC extensions such as @code{__builtin_apply}
++(@pxref{Constructing Calls}).
+ 
+-@item pclmul
+-@itemx no-pclmul
+-@cindex @code{target("pclmul")} function attribute, x86
+-Enable/disable the generation of the PCLMUL instructions.
++@item nocompression
++@cindex @code{nocompression} function attribute, MIPS
++On MIPS targets, you can use the @code{nocompression} function attribute
++to locally turn off MIPS16 and microMIPS code generation.  This attribute
++overrides the @option{-mips16} and @option{-mmicromips} options on the
++command line (@pxref{MIPS Options}).
++@end table
+ 
+-@item popcnt
+-@itemx no-popcnt
+-@cindex @code{target("popcnt")} function attribute, x86
+-Enable/disable the generation of the POPCNT instruction.
++@node MSP430 Function Attributes
++@subsection MSP430 Function Attributes
+ 
+-@item sse
+-@itemx no-sse
+-@cindex @code{target("sse")} function attribute, x86
+-Enable/disable the generation of the SSE instructions.
++These function attributes are supported by the MSP430 back end:
+ 
+-@item sse2
+-@itemx no-sse2
+-@cindex @code{target("sse2")} function attribute, x86
+-Enable/disable the generation of the SSE2 instructions.
++@table @code
++@item critical
++@cindex @code{critical} function attribute, MSP430
++Critical functions disable interrupts upon entry and restore the
++previous interrupt state upon exit.  Critical functions cannot also
++have the @code{naked} or @code{reentrant} attributes.  They can have
++the @code{interrupt} attribute.
+ 
+-@item sse3
+-@itemx no-sse3
+-@cindex @code{target("sse3")} function attribute, x86
+-Enable/disable the generation of the SSE3 instructions.
++@item interrupt
++@cindex @code{interrupt} function attribute, MSP430
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-@item sse4
+-@itemx no-sse4
+-@cindex @code{target("sse4")} function attribute, x86
+-Enable/disable the generation of the SSE4 instructions (both SSE4.1
+-and SSE4.2).
++You can provide an argument to the interrupt
++attribute which specifies a name or number.  If the argument is a
++number it indicates the slot in the interrupt vector table (0 - 31) to
++which this handler should be assigned.  If the argument is a name it
++is treated as a symbolic name for the vector slot.  These names should
++match up with appropriate entries in the linker script.  By default
++the names @code{watchdog} for vector 26, @code{nmi} for vector 30 and
++@code{reset} for vector 31 are recognized.
+ 
+-@item sse4.1
+-@itemx no-sse4.1
+-@cindex @code{target("sse4.1")} function attribute, x86
+-Enable/disable the generation of the sse4.1 instructions.
++@item naked
++@cindex @code{naked} function attribute, MSP430
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ 
+-@item sse4.2
+-@itemx no-sse4.2
+-@cindex @code{target("sse4.2")} function attribute, x86
+-Enable/disable the generation of the sse4.2 instructions.
++@item reentrant
++@cindex @code{reentrant} function attribute, MSP430
++Reentrant functions disable interrupts upon entry and enable them
++upon exit.  Reentrant functions cannot also have the @code{naked}
++or @code{critical} attributes.  They can have the @code{interrupt}
++attribute.
+ 
+-@item sse4a
+-@itemx no-sse4a
+-@cindex @code{target("sse4a")} function attribute, x86
+-Enable/disable the generation of the SSE4A instructions.
++@item wakeup
++@cindex @code{wakeup} function attribute, MSP430
++This attribute only applies to interrupt functions.  It is silently
++ignored if applied to a non-interrupt function.  A wakeup interrupt
++function will rouse the processor from any low-power state that it
++might be in when the function exits.
++@end table
+ 
+-@item fma4
+-@itemx no-fma4
+-@cindex @code{target("fma4")} function attribute, x86
+-Enable/disable the generation of the FMA4 instructions.
++@node NDS32 Function Attributes
++@subsection NDS32 Function Attributes
+ 
+-@item xop
+-@itemx no-xop
+-@cindex @code{target("xop")} function attribute, x86
+-Enable/disable the generation of the XOP instructions.
++These function attributes are supported by the NDS32 back end:
+ 
+-@item lwp
+-@itemx no-lwp
+-@cindex @code{target("lwp")} function attribute, x86
+-Enable/disable the generation of the LWP instructions.
++@table @code
++@item exception
++@cindex @code{exception} function attribute
++@cindex exception handler functions, NDS32
++Use this attribute on the NDS32 target to indicate that the specified function
++is an exception handler.  The compiler will generate corresponding sections
++for use in an exception handler.
+ 
+-@item ssse3
+-@itemx no-ssse3
+-@cindex @code{target("ssse3")} function attribute, x86
+-Enable/disable the generation of the SSSE3 instructions.
++@item interrupt
++@cindex @code{interrupt} function attribute, NDS32
++On NDS32 target, this attribute indicates that the specified function
++is an interrupt handler.  The compiler generates corresponding sections
++for use in an interrupt handler.  You can use the following attributes
++to modify the behavior:
++@table @code
++@item nested
++@cindex @code{nested} function attribute, NDS32
++This interrupt service routine is interruptible.
++@item not_nested
++@cindex @code{not_nested} function attribute, NDS32
++This interrupt service routine is not interruptible.
++@item nested_ready
++@cindex @code{nested_ready} function attribute, NDS32
++This interrupt service routine is interruptible after @code{PSW.GIE}
++(global interrupt enable) is set.  This allows interrupt service routine to
++finish some short critical code before enabling interrupts.
++@item save_all
++@cindex @code{save_all} function attribute, NDS32
++The system will help save all registers into stack before entering
++interrupt handler.
++@item partial_save
++@cindex @code{partial_save} function attribute, NDS32
++The system will help save caller registers into stack before entering
++interrupt handler.
++@end table
+ 
+-@item cld
+-@itemx no-cld
+-@cindex @code{target("cld")} function attribute, x86
+-Enable/disable the generation of the CLD before string moves.
++@item naked
++@cindex @code{naked} function attribute, NDS32
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ 
+-@item fancy-math-387
+-@itemx no-fancy-math-387
+-@cindex @code{target("fancy-math-387")} function attribute, x86
+-Enable/disable the generation of the @code{sin}, @code{cos}, and
+-@code{sqrt} instructions on the 387 floating-point unit.
++@item reset
++@cindex @code{reset} function attribute, NDS32
++@cindex reset handler functions
++Use this attribute on the NDS32 target to indicate that the specified function
++is a reset handler.  The compiler will generate corresponding sections
++for use in a reset handler.  You can use the following attributes
++to provide extra exception handling:
++@table @code
++@item nmi
++@cindex @code{nmi} function attribute, NDS32
++Provide a user-defined function to handle NMI exception.
++@item warm
++@cindex @code{warm} function attribute, NDS32
++Provide a user-defined function to handle warm reset exception.
++@end table
++@end table
+ 
+-@item fused-madd
+-@itemx no-fused-madd
+-@cindex @code{target("fused-madd")} function attribute, x86
+-Enable/disable the generation of the fused multiply/add instructions.
++@node Nios II Function Attributes
++@subsection Nios II Function Attributes
+ 
+-@item ieee-fp
+-@itemx no-ieee-fp
+-@cindex @code{target("ieee-fp")} function attribute, x86
+-Enable/disable the generation of floating point that depends on IEEE arithmetic.
++These function attributes are supported by the Nios II back end:
+ 
+-@item inline-all-stringops
+-@itemx no-inline-all-stringops
+-@cindex @code{target("inline-all-stringops")} function attribute, x86
+-Enable/disable inlining of string operations.
++@table @code
++@item target (@var{options})
++@cindex @code{target} function attribute
++As discussed in @ref{Common Function Attributes}, this attribute 
++allows specification of target-specific compilation options.
++
++When compiling for Nios II, the following options are allowed:
++
++@table @samp
++@item custom-@var{insn}=@var{N}
++@itemx no-custom-@var{insn}
++@cindex @code{target("custom-@var{insn}=@var{N}")} function attribute, Nios II
++@cindex @code{target("no-custom-@var{insn}")} function attribute, Nios II
++Each @samp{custom-@var{insn}=@var{N}} attribute locally enables use of a
++custom instruction with encoding @var{N} when generating code that uses 
++@var{insn}.  Similarly, @samp{no-custom-@var{insn}} locally inhibits use of
++the custom instruction @var{insn}.
++These target attributes correspond to the
++@option{-mcustom-@var{insn}=@var{N}} and @option{-mno-custom-@var{insn}}
++command-line options, and support the same set of @var{insn} keywords.
++@xref{Nios II Options}, for more information.
+ 
+-@item inline-stringops-dynamically
+-@itemx no-inline-stringops-dynamically
+-@cindex @code{target("inline-stringops-dynamically")} function attribute, x86
+-Enable/disable the generation of the inline code to do small string
+-operations and calling the library routines for large operations.
++@item custom-fpu-cfg=@var{name}
++@cindex @code{target("custom-fpu-cfg=@var{name}")} function attribute, Nios II
++This attribute corresponds to the @option{-mcustom-fpu-cfg=@var{name}}
++command-line option, to select a predefined set of custom instructions
++named @var{name}.
++@xref{Nios II Options}, for more information.
++@end table
++@end table
+ 
+-@item align-stringops
+-@itemx no-align-stringops
+-@cindex @code{target("align-stringops")} function attribute, x86
+-Do/do not align destination of inlined string operations.
++@node PowerPC Function Attributes
++@subsection PowerPC Function Attributes
+ 
+-@item recip
+-@itemx no-recip
+-@cindex @code{target("recip")} function attribute, x86
+-Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS
+-instructions followed an additional Newton-Raphson step instead of
+-doing a floating-point division.
++These function attributes are supported by the PowerPC back end:
+ 
+-@item arch=@var{ARCH}
+-@cindex @code{target("arch=@var{ARCH}")} function attribute, x86
+-Specify the architecture to generate code for in compiling the function.
++@table @code
++@item longcall
++@itemx shortcall
++@cindex indirect calls, PowerPC
++@cindex @code{longcall} function attribute, PowerPC
++@cindex @code{shortcall} function attribute, PowerPC
++The @code{longcall} attribute
++indicates that the function might be far away from the call site and
++require a different (more expensive) calling sequence.  The
++@code{shortcall} attribute indicates that the function is always close
++enough for the shorter calling sequence to be used.  These attributes
++override both the @option{-mlongcall} switch and
++the @code{#pragma longcall} setting.
+ 
+-@item tune=@var{TUNE}
+-@cindex @code{target("tune=@var{TUNE}")} function attribute, x86
+-Specify the architecture to tune for in compiling the function.
++@xref{RS/6000 and PowerPC Options}, for more information on whether long
++calls are necessary.
+ 
+-@item fpmath=@var{FPMATH}
+-@cindex @code{target("fpmath=@var{FPMATH}")} function attribute, x86
+-Specify which floating-point unit to use.  The
+-@code{target("fpmath=sse,387")} option must be specified as
+-@code{target("fpmath=sse+387")} because the comma would separate
+-different options.
+-@end table
++@item target (@var{options})
++@cindex @code{target} function attribute
++As discussed in @ref{Common Function Attributes}, this attribute 
++allows specification of target-specific compilation options.
+ 
+ On the PowerPC, the following options are allowed:
+ 
+@@ -4293,666 +4659,535 @@ compilation tunes for the @var{CPU} architecture, and not the
+ default tuning specified on the command line.
+ @end table
+ 
+-When compiling for Nios II, the following options are allowed:
+-
+-@table @samp
+-@item custom-@var{insn}=@var{N}
+-@itemx no-custom-@var{insn}
+-@cindex @code{target("custom-@var{insn}=@var{N}")} function attribute, Nios II
+-@cindex @code{target("no-custom-@var{insn}")} function attribute, Nios II
+-Each @samp{custom-@var{insn}=@var{N}} attribute locally enables use of a
+-custom instruction with encoding @var{N} when generating code that uses 
+-@var{insn}.  Similarly, @samp{no-custom-@var{insn}} locally inhibits use of
+-the custom instruction @var{insn}.
+-These target attributes correspond to the
+-@option{-mcustom-@var{insn}=@var{N}} and @option{-mno-custom-@var{insn}}
+-command-line options, and support the same set of @var{insn} keywords.
+-@xref{Nios II Options}, for more information.
+-
+-@item custom-fpu-cfg=@var{name}
+-@cindex @code{target("custom-fpu-cfg=@var{name}")} function attribute, Nios II
+-This attribute corresponds to the @option{-mcustom-fpu-cfg=@var{name}}
+-command-line option, to select a predefined set of custom instructions
+-named @var{name}.
+-@xref{Nios II Options}, for more information.
+-@end table
+-
+-On the x86 and PowerPC back ends, the inliner does not inline a
++On the PowerPC, the inliner does not inline a
+ function that has different target options than the caller, unless the
+-callee has a subset of the target options of the caller.  For example
+-a function declared with @code{target("sse3")} can inline a function
+-with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.
+-
+-@item trap_exit
+-@cindex @code{trap_exit} function attribute, SH
+-Use this attribute on the SH for an @code{interrupt_handler} to return using
+-@code{trapa} instead of @code{rte}.  This attribute expects an integer
+-argument specifying the trap number to be used.
+-
+-@item trapa_handler
+-@cindex @code{trapa_handler} function attribute, SH
+-On SH targets this function attribute is similar to @code{interrupt_handler}
+-but it does not save and restore all registers.
+-
+-@item unused
+-@cindex @code{unused} function attribute
+-This attribute, attached to a function, means that the function is meant
+-to be possibly unused.  GCC does not produce a warning for this
+-function.
+-
+-@item used
+-@cindex @code{used} function attribute
+-This attribute, attached to a function, means that code must be emitted
+-for the function even if it appears that the function is not referenced.
+-This is useful, for example, when the function is referenced only in
+-inline assembly.
+-
+-When applied to a member function of a C++ class template, the
+-attribute also means that the function is instantiated if the
+-class itself is instantiated.
+-
+-@item vector
+-@cindex @code{vector} function attribute, RX
+-This RX attribute is similar to the @code{interrupt} attribute, including its
+-parameters, but does not make the function an interrupt-handler type
+-function (i.e. it retains the normal C function calling ABI).  See the
+-@code{interrupt} attribute for a description of its arguments.
+-
+-@item version_id
+-@cindex @code{version_id} function attribute, IA-64
+-This IA-64 HP-UX attribute, attached to a global variable or function, renames a
+-symbol to contain a version string, thus allowing for function level
+-versioning.  HP-UX system header files may use function level versioning
+-for some system calls.
+-
+-@smallexample
+-extern int foo () __attribute__((version_id ("20040821")));
+-@end smallexample
+-
+-@noindent
+-Calls to @var{foo} are mapped to calls to @var{foo@{20040821@}}.
+-
+-@item visibility ("@var{visibility_type}")
+-@cindex @code{visibility} function attribute
+-This attribute affects the linkage of the declaration to which it is attached.
+-There are four supported @var{visibility_type} values: default,
+-hidden, protected or internal visibility.
+-
+-@smallexample
+-void __attribute__ ((visibility ("protected")))
+-f () @{ /* @r{Do something.} */; @}
+-int i __attribute__ ((visibility ("hidden")));
+-@end smallexample
+-
+-The possible values of @var{visibility_type} correspond to the
+-visibility settings in the ELF gABI.
+-
+-@table @dfn
+-@c keep this list of visibilities in alphabetical order.
+-
+-@item default
+-Default visibility is the normal case for the object file format.
+-This value is available for the visibility attribute to override other
+-options that may change the assumed visibility of entities.
+-
+-On ELF, default visibility means that the declaration is visible to other
+-modules and, in shared libraries, means that the declared entity may be
+-overridden.
+-
+-On Darwin, default visibility means that the declaration is visible to
+-other modules.
+-
+-Default visibility corresponds to ``external linkage'' in the language.
+-
+-@item hidden
+-Hidden visibility indicates that the entity declared has a new
+-form of linkage, which we call ``hidden linkage''.  Two
+-declarations of an object with hidden linkage refer to the same object
+-if they are in the same shared object.
+-
+-@item internal
+-Internal visibility is like hidden visibility, but with additional
+-processor specific semantics.  Unless otherwise specified by the
+-psABI, GCC defines internal visibility to mean that a function is
+-@emph{never} called from another module.  Compare this with hidden
+-functions which, while they cannot be referenced directly by other
+-modules, can be referenced indirectly via function pointers.  By
+-indicating that a function cannot be called from outside the module,
+-GCC may for instance omit the load of a PIC register since it is known
+-that the calling function loaded the correct value.
+-
+-@item protected
+-Protected visibility is like default visibility except that it
+-indicates that references within the defining module bind to the
+-definition in that module.  That is, the declared entity cannot be
+-overridden by another module.
+-
++callee has a subset of the target options of the caller.
+ @end table
+ 
+-All visibilities are supported on many, but not all, ELF targets
+-(supported when the assembler supports the @samp{.visibility}
+-pseudo-op).  Default visibility is supported everywhere.  Hidden
+-visibility is supported on Darwin targets.
+-
+-The visibility attribute should be applied only to declarations that
+-would otherwise have external linkage.  The attribute should be applied
+-consistently, so that the same entity should not be declared with
+-different settings of the attribute.
++@node RL78 Function Attributes
++@subsection RL78 Function Attributes
+ 
+-In C++, the visibility attribute applies to types as well as functions
+-and objects, because in C++ types have linkage.  A class must not have
+-greater visibility than its non-static data member types and bases,
+-and class members default to the visibility of their class.  Also, a
+-declaration without explicit visibility is limited to the visibility
+-of its type.
++These function attributes are supported by the RL78 back end:
+ 
+-In C++, you can mark member functions and static member variables of a
+-class with the visibility attribute.  This is useful if you know a
+-particular method or static member variable should only be used from
+-one shared object; then you can mark it hidden while the rest of the
+-class has default visibility.  Care must be taken to avoid breaking
+-the One Definition Rule; for example, it is usually not useful to mark
+-an inline method as hidden without marking the whole class as hidden.
++@table @code
++@item interrupt
++@itemx brk_interrupt
++@cindex @code{interrupt} function attribute, RL78
++@cindex @code{brk_interrupt} function attribute, RL78
++These attributes indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-A C++ namespace declaration can also have the visibility attribute.
++Use @code{brk_interrupt} instead of @code{interrupt} for
++handlers intended to be used with the @code{BRK} opcode (i.e.@: those
++that must end with @code{RETB} instead of @code{RETI}).
+ 
+-@smallexample
+-namespace nspace1 __attribute__ ((visibility ("protected")))
+-@{ /* @r{Do something.} */; @}
+-@end smallexample
++@item naked
++@cindex @code{naked} function attribute, RL78
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
++@end table
+ 
+-This attribute applies only to the particular namespace body, not to
+-other definitions of the same namespace; it is equivalent to using
+-@samp{#pragma GCC visibility} before and after the namespace
+-definition (@pxref{Visibility Pragmas}).
++@node RX Function Attributes
++@subsection RX Function Attributes
+ 
+-In C++, if a template argument has limited visibility, this
+-restriction is implicitly propagated to the template instantiation.
+-Otherwise, template instantiations and specializations default to the
+-visibility of their template.
++These function attributes are supported by the RX back end:
+ 
+-If both the template and enclosing class have explicit visibility, the
+-visibility from the template is used.
++@table @code
++@item fast_interrupt
++@cindex @code{fast_interrupt} function attribute, RX
++Use this attribute on the RX port to indicate that the specified
++function is a fast interrupt handler.  This is just like the
++@code{interrupt} attribute, except that @code{freit} is used to return
++instead of @code{reit}.
+ 
+-@item vliw
+-@cindex @code{vliw} function attribute, MeP
+-On MeP, the @code{vliw} attribute tells the compiler to emit
+-instructions in VLIW mode instead of core mode.  Note that this
+-attribute is not allowed unless a VLIW coprocessor has been configured
+-and enabled through command-line options.
++@item interrupt
++@cindex @code{interrupt} function attribute, RX
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
+ 
+-@item warn_unused_result
+-@cindex @code{warn_unused_result} function attribute
+-The @code{warn_unused_result} attribute causes a warning to be emitted
+-if a caller of the function with this attribute does not use its
+-return value.  This is useful for functions where not checking
+-the result is either a security problem or always a bug, such as
+-@code{realloc}.
++On RX targets, you may specify one or more vector numbers as arguments
++to the attribute, as well as naming an alternate table name.
++Parameters are handled sequentially, so one handler can be assigned to
++multiple entries in multiple tables.  One may also pass the magic
++string @code{"$default"} which causes the function to be used for any
++unfilled slots in the current table.
+ 
++This example shows a simple assignment of a function to one vector in
++the default table (note that preprocessor macros may be used for
++chip-specific symbolic vector names):
+ @smallexample
+-int fn () __attribute__ ((warn_unused_result));
+-int foo ()
+-@{
+-  if (fn () < 0) return -1;
+-  fn ();
+-  return 0;
+-@}
++void __attribute__ ((interrupt (5))) txd1_handler ();
+ @end smallexample
+ 
+-@noindent
+-results in warning on line 5.
+-
+-@item weak
+-@cindex @code{weak} function attribute
+-The @code{weak} attribute causes the declaration to be emitted as a weak
+-symbol rather than a global.  This is primarily useful in defining
+-library functions that can be overridden in user code, though it can
+-also be used with non-function declarations.  Weak symbols are supported
+-for ELF targets, and also for a.out targets when using the GNU assembler
+-and linker.
+-
+-@item weakref
+-@itemx weakref ("@var{target}")
+-@cindex @code{weakref} function attribute
+-The @code{weakref} attribute marks a declaration as a weak reference.
+-Without arguments, it should be accompanied by an @code{alias} attribute
+-naming the target symbol.  Optionally, the @var{target} may be given as
+-an argument to @code{weakref} itself.  In either case, @code{weakref}
+-implicitly marks the declaration as @code{weak}.  Without a
+-@var{target}, given as an argument to @code{weakref} or to @code{alias},
+-@code{weakref} is equivalent to @code{weak}.
+-
++This example assigns a function to two slots in the default table
++(using preprocessor macros defined elsewhere) and makes it the default
++for the @code{dct} table:
+ @smallexample
+-static int x() __attribute__ ((weakref ("y")));
+-/* is equivalent to... */
+-static int x() __attribute__ ((weak, weakref, alias ("y")));
+-/* and to... */
+-static int x() __attribute__ ((weakref));
+-static int x() __attribute__ ((alias ("y")));
++void __attribute__ ((interrupt (RXD1_VECT,RXD2_VECT,"dct","$default")))
++	txd1_handler ();
+ @end smallexample
+ 
+-A weak reference is an alias that does not by itself require a
+-definition to be given for the target symbol.  If the target symbol is
+-only referenced through weak references, then it becomes a @code{weak}
+-undefined symbol.  If it is directly referenced, however, then such
+-strong references prevail, and a definition is required for the
+-symbol, not necessarily in the same translation unit.
++@item naked
++@cindex @code{naked} function attribute, RX
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ 
+-The effect is equivalent to moving all references to the alias to a
+-separate translation unit, renaming the alias to the aliased symbol,
+-declaring it as weak, compiling the two separate translation units and
+-performing a reloadable link on them.
++@item vector
++@cindex @code{vector} function attribute, RX
++This RX attribute is similar to the @code{interrupt} attribute, including its
++parameters, but does not make the function an interrupt-handler type
++function (i.e. it retains the normal C function calling ABI).  See the
++@code{interrupt} attribute for a description of its arguments.
++@end table
+ 
+-At present, a declaration to which @code{weakref} is attached can
+-only be @code{static}.
++@node S/390 Function Attributes
++@subsection S/390 Function Attributes
+ 
+-@end table
++These function attributes are supported on the S/390:
+ 
+-You can specify multiple attributes in a declaration by separating them
+-by commas within the double parentheses or by immediately following an
+-attribute declaration with another attribute declaration.
++@table @code
++@item hotpatch (@var{halfwords-before-function-label},@var{halfwords-after-function-label})
++@cindex @code{hotpatch} function attribute, S/390
+ 
+-@cindex @code{#pragma}, reason for not using
+-@cindex pragma, reason for not using
+-Some people object to the @code{__attribute__} feature, suggesting that
+-ISO C's @code{#pragma} should be used instead.  At the time
+-@code{__attribute__} was designed, there were two reasons for not doing
+-this.
++On S/390 System z targets, you can use this function attribute to
++make GCC generate a ``hot-patching'' function prologue.  If the
++@option{-mhotpatch=} command-line option is used at the same time,
++the @code{hotpatch} attribute takes precedence.  The first of the
++two arguments specifies the number of halfwords to be added before
++the function label.  A second argument can be used to specify the
++number of halfwords to be added after the function label.  For
++both arguments the maximum allowed value is 1000000.
+ 
+-@enumerate
+-@item
+-It is impossible to generate @code{#pragma} commands from a macro.
++If both arguments are zero, hotpatching is disabled.
++@end table
+ 
+-@item
+-There is no telling what the same @code{#pragma} might mean in another
+-compiler.
+-@end enumerate
++@node SH Function Attributes
++@subsection SH Function Attributes
+ 
+-These two reasons applied to almost any application that might have been
+-proposed for @code{#pragma}.  It was basically a mistake to use
+-@code{#pragma} for @emph{anything}.
++These function attributes are supported on the SH family of processors:
+ 
+-The ISO C99 standard includes @code{_Pragma}, which now allows pragmas
+-to be generated from macros.  In addition, a @code{#pragma GCC}
+-namespace is now in use for GCC-specific pragmas.  However, it has been
+-found convenient to use @code{__attribute__} to achieve a natural
+-attachment of attributes to their corresponding declarations, whereas
+-@code{#pragma GCC} is of use for constructs that do not naturally form
+-part of the grammar.  @xref{Pragmas,,Pragmas Accepted by GCC}.
++@table @code
++@item function_vector
++@cindex @code{function_vector} function attribute, SH
++@cindex calling functions through the function vector on SH2A
++On SH2A targets, this attribute declares a function to be called using the
++TBR relative addressing mode.  The argument to this attribute is the entry
++number of the same function in a vector table containing all the TBR
++relative addressable functions.  For correct operation the TBR must be setup
++accordingly to point to the start of the vector table before any functions with
++this attribute are invoked.  Usually a good place to do the initialization is
++the startup routine.  The TBR relative vector table can have at max 256 function
++entries.  The jumps to these functions are generated using a SH2A specific,
++non delayed branch instruction JSR/N @@(disp8,TBR).  You must use GAS and GLD
++from GNU binutils version 2.7 or later for this attribute to work correctly.
+ 
+-@node Label Attributes
+-@section Label Attributes
+-@cindex Label Attributes
++In an application, for a function being called once, this attribute
++saves at least 8 bytes of code; and if other successive calls are being
++made to the same function, it saves 2 bytes of code per each of these
++calls.
+ 
+-GCC allows attributes to be set on C labels.  @xref{Attribute Syntax}, for 
+-details of the exact syntax for using attributes.  Other attributes are 
+-available for functions (@pxref{Function Attributes}), variables 
+-(@pxref{Variable Attributes}) and for types (@pxref{Type Attributes}).
++@item interrupt_handler
++@cindex @code{interrupt_handler} function attribute, SH
++Use this attribute to
++indicate that the specified function is an interrupt handler.  The compiler
++generates function entry and exit sequences suitable for use in an
++interrupt handler when this attribute is present.
+ 
+-This example uses the @code{cold} label attribute to indicate the 
+-@code{ErrorHandling} branch is unlikely to be taken and that the
+-@code{ErrorHandling} label is unused:
++@item nosave_low_regs
++@cindex @code{nosave_low_regs} function attribute, SH
++Use this attribute on SH targets to indicate that an @code{interrupt_handler}
++function should not save and restore registers R0..R7.  This can be used on SH3*
++and SH4* targets that have a second R0..R7 register bank for non-reentrant
++interrupt handlers.
+ 
+-@smallexample
++@item renesas
++@cindex @code{renesas} function attribute, SH
++On SH targets this attribute specifies that the function or struct follows the
++Renesas ABI.
+ 
+-   asm goto ("some asm" : : : : NoError);
++@item resbank
++@cindex @code{resbank} function attribute, SH
++On the SH2A target, this attribute enables the high-speed register
++saving and restoration using a register bank for @code{interrupt_handler}
++routines.  Saving to the bank is performed automatically after the CPU
++accepts an interrupt that uses a register bank.
+ 
+-/* This branch (the fall-through from the asm) is less commonly used */
+-ErrorHandling: 
+-   __attribute__((cold, unused)); /* Semi-colon is required here */
+-   printf("error\n");
+-   return 0;
++The nineteen 32-bit registers comprising general register R0 to R14,
++control register GBR, and system registers MACH, MACL, and PR and the
++vector table address offset are saved into a register bank.  Register
++banks are stacked in first-in last-out (FILO) sequence.  Restoration
++from the bank is executed by issuing a RESBANK instruction.
+ 
+-NoError:
+-   printf("no error\n");
+-   return 1;
++@item sp_switch
++@cindex @code{sp_switch} function attribute, SH
++Use this attribute on the SH to indicate an @code{interrupt_handler}
++function should switch to an alternate stack.  It expects a string
++argument that names a global variable holding the address of the
++alternate stack.
++
++@smallexample
++void *alt_stack;
++void f () __attribute__ ((interrupt_handler,
++                          sp_switch ("alt_stack")));
+ @end smallexample
+ 
+-@table @code
+-@item unused
+-@cindex @code{unused} label attribute
+-This feature is intended for program-generated code that may contain 
+-unused labels, but which is compiled with @option{-Wall}.  It is
+-not normally appropriate to use in it human-written code, though it
+-could be useful in cases where the code that jumps to the label is
+-contained within an @code{#ifdef} conditional.
++@item trap_exit
++@cindex @code{trap_exit} function attribute, SH
++Use this attribute on the SH for an @code{interrupt_handler} to return using
++@code{trapa} instead of @code{rte}.  This attribute expects an integer
++argument specifying the trap number to be used.
+ 
+-@item hot
+-@cindex @code{hot} label attribute
+-The @code{hot} attribute on a label is used to inform the compiler that
+-the path following the label is more likely than paths that are not so
+-annotated.  This attribute is used in cases where @code{__builtin_expect}
+-cannot be used, for instance with computed goto or @code{asm goto}.
++@item trapa_handler
++@cindex @code{trapa_handler} function attribute, SH
++On SH targets this function attribute is similar to @code{interrupt_handler}
++but it does not save and restore all registers.
++@end table
+ 
+-@item cold
+-@cindex @code{cold} label attribute
+-The @code{cold} attribute on labels is used to inform the compiler that
+-the path following the label is unlikely to be executed.  This attribute
+-is used in cases where @code{__builtin_expect} cannot be used, for instance
+-with computed goto or @code{asm goto}.
++@node SPU Function Attributes
++@subsection SPU Function Attributes
++
++These function attributes are supported by the SPU back end:
+ 
++@table @code
++@item naked
++@cindex @code{naked} function attribute, SPU
++This attribute allows the compiler to construct the
++requisite function declaration, while allowing the body of the
++function to be assembly code. The specified function will not have
++prologue/epilogue sequences generated by the compiler. Only basic
++@code{asm} statements can safely be included in naked functions
++(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
++basic @code{asm} and C code may appear to work, they cannot be
++depended upon to work reliably and are not supported.
+ @end table
+ 
+-@node Attribute Syntax
+-@section Attribute Syntax
+-@cindex attribute syntax
++@node Symbian OS Function Attributes
++@subsection Symbian OS Function Attributes
+ 
+-This section describes the syntax with which @code{__attribute__} may be
+-used, and the constructs to which attribute specifiers bind, for the C
+-language.  Some details may vary for C++ and Objective-C@.  Because of
+-infelicities in the grammar for attributes, some forms described here
+-may not be successfully parsed in all cases.
++@xref{Microsoft Windows Function Attributes}, for discussion of the
++@code{dllexport} and @code{dllimport} attributes.
+ 
+-There are some problems with the semantics of attributes in C++.  For
+-example, there are no manglings for attributes, although they may affect
+-code generation, so problems may arise when attributed types are used in
+-conjunction with templates or overloading.  Similarly, @code{typeid}
+-does not distinguish between types with different attributes.  Support
+-for attributes in C++ may be restricted in future to attributes on
+-declarations only, but not on nested declarators.
++@node Visium Function Attributes
++@subsection Visium Function Attributes
+ 
+-@xref{Function Attributes}, for details of the semantics of attributes
+-applying to functions.  @xref{Variable Attributes}, for details of the
+-semantics of attributes applying to variables.  @xref{Type Attributes},
+-for details of the semantics of attributes applying to structure, union
+-and enumerated types.
+-@xref{Label Attributes}, for details of the semantics of attributes 
+-applying to labels.
++These function attributes are supported by the Visium back end:
+ 
+-An @dfn{attribute specifier} is of the form
+-@code{__attribute__ ((@var{attribute-list}))}.  An @dfn{attribute list}
+-is a possibly empty comma-separated sequence of @dfn{attributes}, where
+-each attribute is one of the following:
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, Visium
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
++@end table
+ 
+-@itemize @bullet
+-@item
+-Empty.  Empty attributes are ignored.
++@node x86 Function Attributes
++@subsection x86 Function Attributes
+ 
+-@item
+-A word (which may be an identifier such as @code{unused}, or a reserved
+-word such as @code{const}).
++These function attributes are supported by the x86 back end:
+ 
+-@item
+-A word, followed by, in parentheses, parameters for the attribute.
+-These parameters take one of the following forms:
++@table @code
++@item cdecl
++@cindex @code{cdecl} function attribute, x86-32
++@cindex functions that pop the argument stack on x86-32
++@opindex mrtd
++On the x86-32 targets, the @code{cdecl} attribute causes the compiler to
++assume that the calling function pops off the stack space used to
++pass arguments.  This is
++useful to override the effects of the @option{-mrtd} switch.
+ 
+-@itemize @bullet
+-@item
+-An identifier.  For example, @code{mode} attributes use this form.
++@item fastcall
++@cindex @code{fastcall} function attribute, x86-32
++@cindex functions that pop the argument stack on x86-32
++On x86-32 targets, the @code{fastcall} attribute causes the compiler to
++pass the first argument (if of integral type) in the register ECX and
++the second argument (if of integral type) in the register EDX@.  Subsequent
++and other typed arguments are passed on the stack.  The called function
++pops the arguments off the stack.  If the number of arguments is variable all
++arguments are pushed on the stack.
+ 
+-@item
+-An identifier followed by a comma and a non-empty comma-separated list
+-of expressions.  For example, @code{format} attributes use this form.
++@item thiscall
++@cindex @code{thiscall} function attribute, x86-32
++@cindex functions that pop the argument stack on x86-32
++On x86-32 targets, the @code{thiscall} attribute causes the compiler to
++pass the first argument (if of integral type) in the register ECX.
++Subsequent and other typed arguments are passed on the stack. The called
++function pops the arguments off the stack.
++If the number of arguments is variable all arguments are pushed on the
++stack.
++The @code{thiscall} attribute is intended for C++ non-static member functions.
++As a GCC extension, this calling convention can be used for C functions
++and for static member methods.
+ 
+-@item
+-A possibly empty comma-separated list of expressions.  For example,
+-@code{format_arg} attributes use this form with the list being a single
+-integer constant expression, and @code{alias} attributes use this form
+-with the list being a single string constant.
+-@end itemize
+-@end itemize
++@item ms_abi
++@itemx sysv_abi
++@cindex @code{ms_abi} function attribute, x86
++@cindex @code{sysv_abi} function attribute, x86
+ 
+-An @dfn{attribute specifier list} is a sequence of one or more attribute
+-specifiers, not separated by any other tokens.
++On 32-bit and 64-bit x86 targets, you can use an ABI attribute
++to indicate which calling convention should be used for a function.  The
++@code{ms_abi} attribute tells the compiler to use the Microsoft ABI,
++while the @code{sysv_abi} attribute tells the compiler to use the ABI
++used on GNU/Linux and other systems.  The default is to use the Microsoft ABI
++when targeting Windows.  On all other systems, the default is the x86/AMD ABI.
+ 
+-@subsubheading Label Attributes
++Note, the @code{ms_abi} attribute for Microsoft Windows 64-bit targets currently
++requires the @option{-maccumulate-outgoing-args} option.
+ 
+-In GNU C, an attribute specifier list may appear after the colon following a
+-label, other than a @code{case} or @code{default} label.  GNU C++ only permits
+-attributes on labels if the attribute specifier is immediately
+-followed by a semicolon (i.e., the label applies to an empty
+-statement).  If the semicolon is missing, C++ label attributes are
+-ambiguous, as it is permissible for a declaration, which could begin
+-with an attribute list, to be labelled in C++.  Declarations cannot be
+-labelled in C90 or C99, so the ambiguity does not arise there.
++@item callee_pop_aggregate_return (@var{number})
++@cindex @code{callee_pop_aggregate_return} function attribute, x86
+ 
+-@subsubheading Type Attributes
++On x86-32 targets, you can use this attribute to control how
++aggregates are returned in memory.  If the caller is responsible for
++popping the hidden pointer together with the rest of the arguments, specify
++@var{number} equal to zero.  If callee is responsible for popping the
++hidden pointer, specify @var{number} equal to one.  
+ 
+-An attribute specifier list may appear as part of a @code{struct},
+-@code{union} or @code{enum} specifier.  It may go either immediately
+-after the @code{struct}, @code{union} or @code{enum} keyword, or after
+-the closing brace.  The former syntax is preferred.
+-Where attribute specifiers follow the closing brace, they are considered
+-to relate to the structure, union or enumerated type defined, not to any
+-enclosing declaration the type specifier appears in, and the type
+-defined is not complete until after the attribute specifiers.
+-@c Otherwise, there would be the following problems: a shift/reduce
+-@c conflict between attributes binding the struct/union/enum and
+-@c binding to the list of specifiers/qualifiers; and "aligned"
+-@c attributes could use sizeof for the structure, but the size could be
+-@c changed later by "packed" attributes.
++The default x86-32 ABI assumes that the callee pops the
++stack for hidden pointer.  However, on x86-32 Microsoft Windows targets,
++the compiler assumes that the
++caller pops the stack for hidden pointer.
+ 
++@item ms_hook_prologue
++@cindex @code{ms_hook_prologue} function attribute, x86
+ 
+-@subsubheading All other attributes
++On 32-bit and 64-bit x86 targets, you can use
++this function attribute to make GCC generate the ``hot-patching'' function
++prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
++and newer.
+ 
+-Otherwise, an attribute specifier appears as part of a declaration,
+-counting declarations of unnamed parameters and type names, and relates
+-to that declaration (which may be nested in another declaration, for
+-example in the case of a parameter declaration), or to a particular declarator
+-within a declaration.  Where an
+-attribute specifier is applied to a parameter declared as a function or
+-an array, it should apply to the function or array rather than the
+-pointer to which the parameter is implicitly converted, but this is not
+-yet correctly implemented.
++@item regparm (@var{number})
++@cindex @code{regparm} function attribute, x86
++@cindex functions that are passed arguments in registers on x86-32
++On x86-32 targets, the @code{regparm} attribute causes the compiler to
++pass arguments number one to @var{number} if they are of integral type
++in registers EAX, EDX, and ECX instead of on the stack.  Functions that
++take a variable number of arguments continue to be passed all of their
++arguments on the stack.
+ 
+-Any list of specifiers and qualifiers at the start of a declaration may
+-contain attribute specifiers, whether or not such a list may in that
+-context contain storage class specifiers.  (Some attributes, however,
+-are essentially in the nature of storage class specifiers, and only make
+-sense where storage class specifiers may be used; for example,
+-@code{section}.)  There is one necessary limitation to this syntax: the
+-first old-style parameter declaration in a function definition cannot
+-begin with an attribute specifier, because such an attribute applies to
+-the function instead by syntax described below (which, however, is not
+-yet implemented in this case).  In some other cases, attribute
+-specifiers are permitted by this grammar but not yet supported by the
+-compiler.  All attribute specifiers in this place relate to the
+-declaration as a whole.  In the obsolescent usage where a type of
+-@code{int} is implied by the absence of type specifiers, such a list of
+-specifiers and qualifiers may be an attribute specifier list with no
+-other specifiers or qualifiers.
++Beware that on some ELF systems this attribute is unsuitable for
++global functions in shared libraries with lazy binding (which is the
++default).  Lazy binding sends the first call via resolving code in
++the loader, which might assume EAX, EDX and ECX can be clobbered, as
++per the standard calling conventions.  Solaris 8 is affected by this.
++Systems with the GNU C Library version 2.1 or higher
++and FreeBSD are believed to be
++safe since the loaders there save EAX, EDX and ECX.  (Lazy binding can be
++disabled with the linker or the loader if desired, to avoid the
++problem.)
+ 
+-At present, the first parameter in a function prototype must have some
+-type specifier that is not an attribute specifier; this resolves an
+-ambiguity in the interpretation of @code{void f(int
+-(__attribute__((foo)) x))}, but is subject to change.  At present, if
+-the parentheses of a function declarator contain only attributes then
+-those attributes are ignored, rather than yielding an error or warning
+-or implying a single parameter of type int, but this is subject to
+-change.
++@item sseregparm
++@cindex @code{sseregparm} function attribute, x86
++On x86-32 targets with SSE support, the @code{sseregparm} attribute
++causes the compiler to pass up to 3 floating-point arguments in
++SSE registers instead of on the stack.  Functions that take a
++variable number of arguments continue to pass all of their
++floating-point arguments on the stack.
+ 
+-An attribute specifier list may appear immediately before a declarator
+-(other than the first) in a comma-separated list of declarators in a
+-declaration of more than one identifier using a single list of
+-specifiers and qualifiers.  Such attribute specifiers apply
+-only to the identifier before whose declarator they appear.  For
+-example, in
++@item force_align_arg_pointer
++@cindex @code{force_align_arg_pointer} function attribute, x86
++On x86 targets, the @code{force_align_arg_pointer} attribute may be
++applied to individual function definitions, generating an alternate
++prologue and epilogue that realigns the run-time stack if necessary.
++This supports mixing legacy codes that run with a 4-byte aligned stack
++with modern codes that keep a 16-byte stack for SSE compatibility.
+ 
+-@smallexample
+-__attribute__((noreturn)) void d0 (void),
+-    __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
+-     d2 (void);
+-@end smallexample
++@item stdcall
++@cindex @code{stdcall} function attribute, x86-32
++@cindex functions that pop the argument stack on x86-32
++On x86-32 targets, the @code{stdcall} attribute causes the compiler to
++assume that the called function pops off the stack space used to
++pass arguments, unless it takes a variable number of arguments.
+ 
+-@noindent
+-the @code{noreturn} attribute applies to all the functions
+-declared; the @code{format} attribute only applies to @code{d1}.
++@item target (@var{options})
++@cindex @code{target} function attribute
++As discussed in @ref{Common Function Attributes}, this attribute 
++allows specification of target-specific compilation options.
+ 
+-An attribute specifier list may appear immediately before the comma,
+-@code{=} or semicolon terminating the declaration of an identifier other
+-than a function definition.  Such attribute specifiers apply
+-to the declared object or function.  Where an
+-assembler name for an object or function is specified (@pxref{Asm
+-Labels}), the attribute must follow the @code{asm}
+-specification.
++On the x86, the following options are allowed:
++@table @samp
++@item abm
++@itemx no-abm
++@cindex @code{target("abm")} function attribute, x86
++Enable/disable the generation of the advanced bit instructions.
+ 
+-An attribute specifier list may, in future, be permitted to appear after
+-the declarator in a function definition (before any old-style parameter
+-declarations or the function body).
++@item aes
++@itemx no-aes
++@cindex @code{target("aes")} function attribute, x86
++Enable/disable the generation of the AES instructions.
+ 
+-Attribute specifiers may be mixed with type qualifiers appearing inside
+-the @code{[]} of a parameter array declarator, in the C99 construct by
+-which such qualifiers are applied to the pointer to which the array is
+-implicitly converted.  Such attribute specifiers apply to the pointer,
+-not to the array, but at present this is not implemented and they are
+-ignored.
++@item default
++@cindex @code{target("default")} function attribute, x86
++@xref{Function Multiversioning}, where it is used to specify the
++default function version.
+ 
+-An attribute specifier list may appear at the start of a nested
+-declarator.  At present, there are some limitations in this usage: the
+-attributes correctly apply to the declarator, but for most individual
+-attributes the semantics this implies are not implemented.
+-When attribute specifiers follow the @code{*} of a pointer
+-declarator, they may be mixed with any type qualifiers present.
+-The following describes the formal semantics of this syntax.  It makes the
+-most sense if you are familiar with the formal specification of
+-declarators in the ISO C standard.
++@item mmx
++@itemx no-mmx
++@cindex @code{target("mmx")} function attribute, x86
++Enable/disable the generation of the MMX instructions.
+ 
+-Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration @code{T
+-D1}, where @code{T} contains declaration specifiers that specify a type
+-@var{Type} (such as @code{int}) and @code{D1} is a declarator that
+-contains an identifier @var{ident}.  The type specified for @var{ident}
+-for derived declarators whose type does not include an attribute
+-specifier is as in the ISO C standard.
++@item pclmul
++@itemx no-pclmul
++@cindex @code{target("pclmul")} function attribute, x86
++Enable/disable the generation of the PCLMUL instructions.
++
++@item popcnt
++@itemx no-popcnt
++@cindex @code{target("popcnt")} function attribute, x86
++Enable/disable the generation of the POPCNT instruction.
++
++@item sse
++@itemx no-sse
++@cindex @code{target("sse")} function attribute, x86
++Enable/disable the generation of the SSE instructions.
++
++@item sse2
++@itemx no-sse2
++@cindex @code{target("sse2")} function attribute, x86
++Enable/disable the generation of the SSE2 instructions.
+ 
+-If @code{D1} has the form @code{( @var{attribute-specifier-list} D )},
+-and the declaration @code{T D} specifies the type
+-``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
+-@code{T D1} specifies the type ``@var{derived-declarator-type-list}
+-@var{attribute-specifier-list} @var{Type}'' for @var{ident}.
++@item sse3
++@itemx no-sse3
++@cindex @code{target("sse3")} function attribute, x86
++Enable/disable the generation of the SSE3 instructions.
+ 
+-If @code{D1} has the form @code{*
+-@var{type-qualifier-and-attribute-specifier-list} D}, and the
+-declaration @code{T D} specifies the type
+-``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
+-@code{T D1} specifies the type ``@var{derived-declarator-type-list}
+-@var{type-qualifier-and-attribute-specifier-list} pointer to @var{Type}'' for
+-@var{ident}.
++@item sse4
++@itemx no-sse4
++@cindex @code{target("sse4")} function attribute, x86
++Enable/disable the generation of the SSE4 instructions (both SSE4.1
++and SSE4.2).
+ 
+-For example,
++@item sse4.1
++@itemx no-sse4.1
++@cindex @code{target("sse4.1")} function attribute, x86
++Enable/disable the generation of the sse4.1 instructions.
+ 
+-@smallexample
+-void (__attribute__((noreturn)) ****f) (void);
+-@end smallexample
++@item sse4.2
++@itemx no-sse4.2
++@cindex @code{target("sse4.2")} function attribute, x86
++Enable/disable the generation of the sse4.2 instructions.
+ 
+-@noindent
+-specifies the type ``pointer to pointer to pointer to pointer to
+-non-returning function returning @code{void}''.  As another example,
++@item sse4a
++@itemx no-sse4a
++@cindex @code{target("sse4a")} function attribute, x86
++Enable/disable the generation of the SSE4A instructions.
+ 
+-@smallexample
+-char *__attribute__((aligned(8))) *f;
+-@end smallexample
++@item fma4
++@itemx no-fma4
++@cindex @code{target("fma4")} function attribute, x86
++Enable/disable the generation of the FMA4 instructions.
+ 
+-@noindent
+-specifies the type ``pointer to 8-byte-aligned pointer to @code{char}''.
+-Note again that this does not work with most attributes; for example,
+-the usage of @samp{aligned} and @samp{noreturn} attributes given above
+-is not yet supported.
++@item xop
++@itemx no-xop
++@cindex @code{target("xop")} function attribute, x86
++Enable/disable the generation of the XOP instructions.
+ 
+-For compatibility with existing code written for compiler versions that
+-did not implement attributes on nested declarators, some laxity is
+-allowed in the placing of attributes.  If an attribute that only applies
+-to types is applied to a declaration, it is treated as applying to
+-the type of that declaration.  If an attribute that only applies to
+-declarations is applied to the type of a declaration, it is treated
+-as applying to that declaration; and, for compatibility with code
+-placing the attributes immediately before the identifier declared, such
+-an attribute applied to a function return type is treated as
+-applying to the function type, and such an attribute applied to an array
+-element type is treated as applying to the array type.  If an
+-attribute that only applies to function types is applied to a
+-pointer-to-function type, it is treated as applying to the pointer
+-target type; if such an attribute is applied to a function return type
+-that is not a pointer-to-function type, it is treated as applying
+-to the function type.
++@item lwp
++@itemx no-lwp
++@cindex @code{target("lwp")} function attribute, x86
++Enable/disable the generation of the LWP instructions.
+ 
+-@node Function Prototypes
+-@section Prototypes and Old-Style Function Definitions
+-@cindex function prototype declarations
+-@cindex old-style function definitions
+-@cindex promotion of formal parameters
++@item ssse3
++@itemx no-ssse3
++@cindex @code{target("ssse3")} function attribute, x86
++Enable/disable the generation of the SSSE3 instructions.
+ 
+-GNU C extends ISO C to allow a function prototype to override a later
+-old-style non-prototype definition.  Consider the following example:
++@item cld
++@itemx no-cld
++@cindex @code{target("cld")} function attribute, x86
++Enable/disable the generation of the CLD before string moves.
+ 
+-@smallexample
+-/* @r{Use prototypes unless the compiler is old-fashioned.}  */
+-#ifdef __STDC__
+-#define P(x) x
+-#else
+-#define P(x) ()
+-#endif
++@item fancy-math-387
++@itemx no-fancy-math-387
++@cindex @code{target("fancy-math-387")} function attribute, x86
++Enable/disable the generation of the @code{sin}, @code{cos}, and
++@code{sqrt} instructions on the 387 floating-point unit.
+ 
+-/* @r{Prototype function declaration.}  */
+-int isroot P((uid_t));
++@item fused-madd
++@itemx no-fused-madd
++@cindex @code{target("fused-madd")} function attribute, x86
++Enable/disable the generation of the fused multiply/add instructions.
+ 
+-/* @r{Old-style function definition.}  */
+-int
+-isroot (x)   /* @r{??? lossage here ???} */
+-     uid_t x;
+-@{
+-  return x == 0;
+-@}
+-@end smallexample
++@item ieee-fp
++@itemx no-ieee-fp
++@cindex @code{target("ieee-fp")} function attribute, x86
++Enable/disable the generation of floating point that depends on IEEE arithmetic.
+ 
+-Suppose the type @code{uid_t} happens to be @code{short}.  ISO C does
+-not allow this example, because subword arguments in old-style
+-non-prototype definitions are promoted.  Therefore in this example the
+-function definition's argument is really an @code{int}, which does not
+-match the prototype argument type of @code{short}.
++@item inline-all-stringops
++@itemx no-inline-all-stringops
++@cindex @code{target("inline-all-stringops")} function attribute, x86
++Enable/disable inlining of string operations.
+ 
+-This restriction of ISO C makes it hard to write code that is portable
+-to traditional C compilers, because the programmer does not know
+-whether the @code{uid_t} type is @code{short}, @code{int}, or
+-@code{long}.  Therefore, in cases like these GNU C allows a prototype
+-to override a later old-style definition.  More precisely, in GNU C, a
+-function prototype argument type overrides the argument type specified
+-by a later old-style definition if the former type is the same as the
+-latter type before promotion.  Thus in GNU C the above example is
+-equivalent to the following:
++@item inline-stringops-dynamically
++@itemx no-inline-stringops-dynamically
++@cindex @code{target("inline-stringops-dynamically")} function attribute, x86
++Enable/disable the generation of the inline code to do small string
++operations and calling the library routines for large operations.
+ 
+-@smallexample
+-int isroot (uid_t);
++@item align-stringops
++@itemx no-align-stringops
++@cindex @code{target("align-stringops")} function attribute, x86
++Do/do not align destination of inlined string operations.
+ 
+-int
+-isroot (uid_t x)
+-@{
+-  return x == 0;
+-@}
+-@end smallexample
++@item recip
++@itemx no-recip
++@cindex @code{target("recip")} function attribute, x86
++Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS
++instructions followed an additional Newton-Raphson step instead of
++doing a floating-point division.
+ 
+-@noindent
+-GNU C++ does not support old-style function definitions, so this
+-extension is irrelevant.
++@item arch=@var{ARCH}
++@cindex @code{target("arch=@var{ARCH}")} function attribute, x86
++Specify the architecture to generate code for in compiling the function.
+ 
+-@node C++ Comments
+-@section C++ Style Comments
+-@cindex @code{//}
+-@cindex C++ comments
+-@cindex comments, C++ style
++@item tune=@var{TUNE}
++@cindex @code{target("tune=@var{TUNE}")} function attribute, x86
++Specify the architecture to tune for in compiling the function.
+ 
+-In GNU C, you may use C++ style comments, which start with @samp{//} and
+-continue until the end of the line.  Many other C implementations allow
+-such comments, and they are included in the 1999 C standard.  However,
+-C++ style comments are not recognized if you specify an @option{-std}
+-option specifying a version of ISO C before C99, or @option{-ansi}
+-(equivalent to @option{-std=c90}).
++@item fpmath=@var{FPMATH}
++@cindex @code{target("fpmath=@var{FPMATH}")} function attribute, x86
++Specify which floating-point unit to use.  You must specify the
++@code{target("fpmath=sse,387")} option as
++@code{target("fpmath=sse+387")} because the comma would separate
++different options.
++@end table
+ 
+-@node Dollar Signs
+-@section Dollar Signs in Identifier Names
+-@cindex $
+-@cindex dollar signs in identifier names
+-@cindex identifier names, dollar signs in
++On the x86, the inliner does not inline a
++function that has different target options than the caller, unless the
++callee has a subset of the target options of the caller.  For example
++a function declared with @code{target("sse3")} can inline a function
++with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.
++@end table
+ 
+-In GNU C, you may normally use dollar signs in identifier names.
+-This is because many traditional C implementations allow such identifiers.
+-However, dollar signs in identifiers are not supported on a few target
+-machines, typically because the target assembler does not allow them.
++@node Xstormy16 Function Attributes
++@subsection Xstormy16 Function Attributes
+ 
+-@node Character Escapes
+-@section The Character @key{ESC} in Constants
++These function attributes are supported by the Xstormy16 back end:
+ 
+-You can use the sequence @samp{\e} in a string or character constant to
+-stand for the ASCII character @key{ESC}.
++@table @code
++@item interrupt
++@cindex @code{interrupt} function attribute, Xstormy16
++Use this attribute to indicate
++that the specified function is an interrupt handler.  The compiler generates
++function entry and exit sequences suitable for use in an interrupt handler
++when this attribute is present.
++@end table
+ 
+ @node Variable Attributes
+ @section Specifying Attributes of Variables
+@@ -4970,14 +5205,29 @@ types (@pxref{Type Attributes}).
+ Other front ends might define more attributes
+ (@pxref{C++ Extensions,,Extensions to the C++ Language}).
+ 
+-You may also specify attributes with @samp{__} preceding and following
+-each keyword.  This allows you to use them in header files without
+-being concerned about a possible macro of the same name.  For example,
+-you may use @code{__aligned__} instead of @code{aligned}.
+-
+ @xref{Attribute Syntax}, for details of the exact syntax for using
+ attributes.
+ 
++@menu
++* Common Variable Attributes::
++* AVR Variable Attributes::
++* Blackfin Variable Attributes::
++* H8/300 Variable Attributes::
++* IA-64 Variable Attributes::
++* M32R/D Variable Attributes::
++* MeP Variable Attributes::
++* Microsoft Windows Variable Attributes::
++* PowerPC Variable Attributes::
++* SPU Variable Attributes::
++* x86 Variable Attributes::
++* Xstormy16 Variable Attributes::
++@end menu
++
++@node Common Variable Attributes
++@subsection Common Variable Attributes
++
++The following attributes are supported on most targets.
++
+ @table @code
+ @cindex @code{aligned} variable attribute
+ @item aligned (@var{alignment})
+@@ -5046,7 +5296,7 @@ in an @code{__attribute__} still only provides you with 8-byte
+ alignment.  See your linker documentation for further information.
+ 
+ The @code{aligned} attribute can also be used for functions
+-(@pxref{Function Attributes}.)
++(@pxref{Common Function Attributes}.)
+ 
+ @item cleanup (@var{cleanup_function})
+ @cindex @code{cleanup} variable attribute
+@@ -5100,7 +5350,8 @@ argument, which must be a string, is printed in the warning if
+ present.
+ 
+ The @code{deprecated} attribute can also be used for functions and
+-types (@pxref{Function Attributes}, @pxref{Type Attributes}.)
++types (@pxref{Common Function Attributes},
++@pxref{Common Type Attributes}).
+ 
+ @item mode (@var{mode})
+ @cindex @code{mode} variable attribute
+@@ -5171,47 +5422,20 @@ Use the @code{section} attribute with
+ @emph{global} variables and not @emph{local} variables,
+ as shown in the example.
+ 
+-You may use the @code{section} attribute with initialized or
+-uninitialized global variables but the linker requires
+-each object be defined once, with the exception that uninitialized
+-variables tentatively go in the @code{common} (or @code{bss}) section
+-and can be multiply ``defined''.  Using the @code{section} attribute
+-changes what section the variable goes into and may cause the
+-linker to issue an error if an uninitialized variable has multiple
+-definitions.  You can force a variable to be initialized with the
+-@option{-fno-common} flag or the @code{nocommon} attribute.
+-
+-Some file formats do not support arbitrary sections so the @code{section}
+-attribute is not available on all platforms.
+-If you need to map the entire contents of a module to a particular
+-section, consider using the facilities of the linker instead.
+-
+-@item shared
+-@cindex @code{shared} variable attribute
+-On Microsoft Windows, in addition to putting variable definitions in a named
+-section, the section can also be shared among all running copies of an
+-executable or DLL@.  For example, this small program defines shared data
+-by putting it in a named section @code{shared} and marking the section
+-shareable:
+-
+-@smallexample
+-int foo __attribute__((section ("shared"), shared)) = 0;
+-
+-int
+-main()
+-@{
+-  /* @r{Read and write foo.  All running
+-     copies see the same value.}  */
+-  return 0;
+-@}
+-@end smallexample
+-
+-@noindent
+-You may only use the @code{shared} attribute along with @code{section}
+-attribute with a fully-initialized global definition because of the way
+-linkers work.  See @code{section} attribute for more information.
++You may use the @code{section} attribute with initialized or
++uninitialized global variables but the linker requires
++each object be defined once, with the exception that uninitialized
++variables tentatively go in the @code{common} (or @code{bss}) section
++and can be multiply ``defined''.  Using the @code{section} attribute
++changes what section the variable goes into and may cause the
++linker to issue an error if an uninitialized variable has multiple
++definitions.  You can force a variable to be initialized with the
++@option{-fno-common} flag or the @code{nocommon} attribute.
+ 
+-The @code{shared} attribute is only available on Microsoft Windows@.
++Some file formats do not support arbitrary sections so the @code{section}
++attribute is not available on all platforms.
++If you need to map the entire contents of a module to a particular
++section, consider using the facilities of the linker instead.
+ 
+ @item tls_model ("@var{tls_model}")
+ @cindex @code{tls_model} variable attribute
+@@ -5258,17 +5482,280 @@ This attribute is only applicable to integral and float scalars,
+ although arrays, pointers, and function return values are allowed in
+ conjunction with this construct.
+ 
+-Aggregates with this attribute are invalid, even if they are of the same
+-size as a corresponding scalar.  For example, the declaration:
++Aggregates with this attribute are invalid, even if they are of the same
++size as a corresponding scalar.  For example, the declaration:
++
++@smallexample
++struct S @{ int a; @};
++struct S  __attribute__ ((vector_size (16))) foo;
++@end smallexample
++
++@noindent
++is invalid even if the size of the structure is the same as the size of
++the @code{int}.
++
++@item weak
++@cindex @code{weak} variable attribute
++The @code{weak} attribute is described in
++@ref{Common Function Attributes}.
++
++@end table
++
++@node AVR Variable Attributes
++@subsection AVR Variable Attributes
++
++@table @code
++@item progmem
++@cindex @code{progmem} variable attribute, AVR
++The @code{progmem} attribute is used on the AVR to place read-only
++data in the non-volatile program memory (flash). The @code{progmem}
++attribute accomplishes this by putting respective variables into a
++section whose name starts with @code{.progmem}.
++
++This attribute works similar to the @code{section} attribute
++but adds additional checking. Notice that just like the
++@code{section} attribute, @code{progmem} affects the location
++of the data but not how this data is accessed.
++
++In order to read data located with the @code{progmem} attribute
++(inline) assembler must be used.
++@smallexample
++/* Use custom macros from @w{@uref{http://nongnu.org/avr-libc/user-manual/,AVR-LibC}} */
++#include <avr/pgmspace.h> 
++
++/* Locate var in flash memory */
++const int var[2] PROGMEM = @{ 1, 2 @};
++
++int read_var (int i)
++@{
++    /* Access var[] by accessor macro from avr/pgmspace.h */
++    return (int) pgm_read_word (& var[i]);
++@}
++@end smallexample
++
++AVR is a Harvard architecture processor and data and read-only data
++normally resides in the data memory (RAM).
++
++See also the @ref{AVR Named Address Spaces} section for
++an alternate way to locate and access data in flash memory.
++
++@item io
++@itemx io (@var{addr})
++@cindex @code{io} variable attribute, AVR
++Variables with the @code{io} attribute are used to address
++memory-mapped peripherals in the io address range.
++If an address is specified, the variable
++is assigned that address, and the value is interpreted as an
++address in the data address space.
++Example:
++
++@smallexample
++volatile int porta __attribute__((io (0x22)));
++@end smallexample
++
++The address specified in the address in the data address range.
++
++Otherwise, the variable it is not assigned an address, but the
++compiler will still use in/out instructions where applicable,
++assuming some other module assigns an address in the io address range.
++Example:
++
++@smallexample
++extern volatile int porta __attribute__((io));
++@end smallexample
++
++@item io_low
++@itemx io_low (@var{addr})
++@cindex @code{io_low} variable attribute, AVR
++This is like the @code{io} attribute, but additionally it informs the
++compiler that the object lies in the lower half of the I/O area,
++allowing the use of @code{cbi}, @code{sbi}, @code{sbic} and @code{sbis}
++instructions.
++
++@item address
++@itemx address (@var{addr})
++@cindex @code{address} variable attribute, AVR
++Variables with the @code{address} attribute are used to address
++memory-mapped peripherals that may lie outside the io address range.
++
++@smallexample
++volatile int porta __attribute__((address (0x600)));
++@end smallexample
++
++@end table
++
++@node Blackfin Variable Attributes
++@subsection Blackfin Variable Attributes
++
++Three attributes are currently defined for the Blackfin.
++
++@table @code
++@item l1_data
++@itemx l1_data_A
++@itemx l1_data_B
++@cindex @code{l1_data} variable attribute, Blackfin
++@cindex @code{l1_data_A} variable attribute, Blackfin
++@cindex @code{l1_data_B} variable attribute, Blackfin
++Use these attributes on the Blackfin to place the variable into L1 Data SRAM.
++Variables with @code{l1_data} attribute are put into the specific section
++named @code{.l1.data}. Those with @code{l1_data_A} attribute are put into
++the specific section named @code{.l1.data.A}. Those with @code{l1_data_B}
++attribute are put into the specific section named @code{.l1.data.B}.
++
++@item l2
++@cindex @code{l2} variable attribute, Blackfin
++Use this attribute on the Blackfin to place the variable into L2 SRAM.
++Variables with @code{l2} attribute are put into the specific section
++named @code{.l2.data}.
++@end table
++
++@node H8/300 Variable Attributes
++@subsection H8/300 Variable Attributes
++
++These variable attributes are available for H8/300 targets:
++
++@table @code
++@item eightbit_data
++@cindex @code{eightbit_data} variable attribute, H8/300
++@cindex eight-bit data on the H8/300, H8/300H, and H8S
++Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
++variable should be placed into the eight-bit data section.
++The compiler generates more efficient code for certain operations
++on data in the eight-bit data area.  Note the eight-bit data area is limited to
++256 bytes of data.
++
++You must use GAS and GLD from GNU binutils version 2.7 or later for
++this attribute to work correctly.
++
++@item tiny_data
++@cindex @code{tiny_data} variable attribute, H8/300
++@cindex tiny data section on the H8/300H and H8S
++Use this attribute on the H8/300H and H8S to indicate that the specified
++variable should be placed into the tiny data section.
++The compiler generates more efficient code for loads and stores
++on data in the tiny data section.  Note the tiny data area is limited to
++slightly under 32KB of data.
++
++@end table
++
++@node IA-64 Variable Attributes
++@subsection IA-64 Variable Attributes
++
++The IA-64 back end supports the following variable attribute:
++
++@table @code
++@item model (@var{model-name})
++@cindex @code{model} variable attribute, IA-64
++
++On IA-64, use this attribute to set the addressability of an object.
++At present, the only supported identifier for @var{model-name} is
++@code{small}, indicating addressability via ``small'' (22-bit)
++addresses (so that their addresses can be loaded with the @code{addl}
++instruction).  Caveat: such addressing is by definition not position
++independent and hence this attribute must not be used for objects
++defined by shared libraries.
++
++@end table
++
++@node M32R/D Variable Attributes
++@subsection M32R/D Variable Attributes
++
++One attribute is currently defined for the M32R/D@.
++
++@table @code
++@item model (@var{model-name})
++@cindex @code{model-name} variable attribute, M32R/D
++@cindex variable addressability on the M32R/D
++Use this attribute on the M32R/D to set the addressability of an object.
++The identifier @var{model-name} is one of @code{small}, @code{medium},
++or @code{large}, representing each of the code models.
++
++Small model objects live in the lower 16MB of memory (so that their
++addresses can be loaded with the @code{ld24} instruction).
++
++Medium and large model objects may live anywhere in the 32-bit address space
++(the compiler generates @code{seth/add3} instructions to load their
++addresses).
++@end table
++
++@node MeP Variable Attributes
++@subsection MeP Variable Attributes
++
++The MeP target has a number of addressing modes and busses.  The
++@code{near} space spans the standard memory space's first 16 megabytes
++(24 bits).  The @code{far} space spans the entire 32-bit memory space.
++The @code{based} space is a 128-byte region in the memory space that
++is addressed relative to the @code{$tp} register.  The @code{tiny}
++space is a 65536-byte region relative to the @code{$gp} register.  In
++addition to these memory regions, the MeP target has a separate 16-bit
++control bus which is specified with @code{cb} attributes.
++
++@table @code
++
++@item based
++@cindex @code{based} variable attribute, MeP
++Any variable with the @code{based} attribute is assigned to the
++@code{.based} section, and is accessed with relative to the
++@code{$tp} register.
++
++@item tiny
++@cindex @code{tiny} variable attribute, MeP
++Likewise, the @code{tiny} attribute assigned variables to the
++@code{.tiny} section, relative to the @code{$gp} register.
++
++@item near
++@cindex @code{near} variable attribute, MeP
++Variables with the @code{near} attribute are assumed to have addresses
++that fit in a 24-bit addressing mode.  This is the default for large
++variables (@code{-mtiny=4} is the default) but this attribute can
++override @code{-mtiny=} for small variables, or override @code{-ml}.
++
++@item far
++@cindex @code{far} variable attribute, MeP
++Variables with the @code{far} attribute are addressed using a full
++32-bit address.  Since this covers the entire memory space, this
++allows modules to make no assumptions about where variables might be
++stored.
++
++@item io
++@cindex @code{io} variable attribute, MeP
++@itemx io (@var{addr})
++Variables with the @code{io} attribute are used to address
++memory-mapped peripherals.  If an address is specified, the variable
++is assigned that address, else it is not assigned an address (it is
++assumed some other module assigns an address).  Example:
++
++@smallexample
++int timer_count __attribute__((io(0x123)));
++@end smallexample
++
++@item cb
++@itemx cb (@var{addr})
++@cindex @code{cb} variable attribute, MeP
++Variables with the @code{cb} attribute are used to access the control
++bus, using special instructions.  @code{addr} indicates the control bus
++address.  Example:
+ 
+ @smallexample
+-struct S @{ int a; @};
+-struct S  __attribute__ ((vector_size (16))) foo;
++int cpu_clock __attribute__((cb(0x123)));
+ @end smallexample
+ 
+-@noindent
+-is invalid even if the size of the structure is the same as the size of
+-the @code{int}.
++@end table
++
++@node Microsoft Windows Variable Attributes
++@subsection Microsoft Windows Variable Attributes
++
++You can use these attributes on Microsoft Windows targets.
++@ref{x86 Variable Attributes} for additional Windows compatibility
++attributes available on all x86 targets.
++
++@table @code
++@item dllimport
++@itemx dllexport
++@cindex @code{dllimport} variable attribute
++@cindex @code{dllexport} variable attribute
++The @code{dllimport} and @code{dllexport} attributes are described in
++@ref{Microsoft Windows Function Attributes}.
+ 
+ @item selectany
+ @cindex @code{selectany} variable attribute
+@@ -5291,891 +5778,1062 @@ targets.  You can use @code{__declspec (selectany)} as a synonym for
+ @code{__attribute__ ((selectany))} for compatibility with other
+ compilers.
+ 
+-@item weak
+-@cindex @code{weak} variable attribute
+-The @code{weak} attribute is described in @ref{Function Attributes}.
++@item shared
++@cindex @code{shared} variable attribute
++On Microsoft Windows, in addition to putting variable definitions in a named
++section, the section can also be shared among all running copies of an
++executable or DLL@.  For example, this small program defines shared data
++by putting it in a named section @code{shared} and marking the section
++shareable:
+ 
+-@item dllimport
+-@cindex @code{dllimport} variable attribute
+-The @code{dllimport} attribute is described in @ref{Function Attributes}.
++@smallexample
++int foo __attribute__((section ("shared"), shared)) = 0;
+ 
+-@item dllexport
+-@cindex @code{dllexport} variable attribute
+-The @code{dllexport} attribute is described in @ref{Function Attributes}.
++int
++main()
++@{
++  /* @r{Read and write foo.  All running
++     copies see the same value.}  */
++  return 0;
++@}
++@end smallexample
++
++@noindent
++You may only use the @code{shared} attribute along with @code{section}
++attribute with a fully-initialized global definition because of the way
++linkers work.  See @code{section} attribute for more information.
++
++The @code{shared} attribute is only available on Microsoft Windows@.
+ 
+ @end table
+ 
+-@anchor{AVR Variable Attributes}
+-@subsection AVR Variable Attributes
++@node PowerPC Variable Attributes
++@subsection PowerPC Variable Attributes
++
++Three attributes currently are defined for PowerPC configurations:
++@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
++
++@cindex @code{ms_struct} variable attribute, PowerPC
++@cindex @code{gcc_struct} variable attribute, PowerPC
++For full documentation of the struct attributes please see the
++documentation in @ref{x86 Variable Attributes}.
++
++@cindex @code{altivec} variable attribute, PowerPC
++For documentation of @code{altivec} attribute please see the
++documentation in @ref{PowerPC Type Attributes}.
++
++@node SPU Variable Attributes
++@subsection SPU Variable Attributes
++
++@cindex @code{spu_vector} variable attribute, SPU
++The SPU supports the @code{spu_vector} attribute for variables.  For
++documentation of this attribute please see the documentation in
++@ref{SPU Type Attributes}.
++
++@node x86 Variable Attributes
++@subsection x86 Variable Attributes
++
++Two attributes are currently defined for x86 configurations:
++@code{ms_struct} and @code{gcc_struct}.
+ 
+ @table @code
+-@item progmem
+-@cindex @code{progmem} variable attribute, AVR
+-The @code{progmem} attribute is used on the AVR to place read-only
+-data in the non-volatile program memory (flash). The @code{progmem}
+-attribute accomplishes this by putting respective variables into a
+-section whose name starts with @code{.progmem}.
++@item ms_struct
++@itemx gcc_struct
++@cindex @code{ms_struct} variable attribute, x86
++@cindex @code{gcc_struct} variable attribute, x86
+ 
+-This attribute works similar to the @code{section} attribute
+-but adds additional checking. Notice that just like the
+-@code{section} attribute, @code{progmem} affects the location
+-of the data but not how this data is accessed.
++If @code{packed} is used on a structure, or if bit-fields are used,
++it may be that the Microsoft ABI lays out the structure differently
++than the way GCC normally does.  Particularly when moving packed
++data between functions compiled with GCC and the native Microsoft compiler
++(either via function call or as data in a file), it may be necessary to access
++either format.
+ 
+-In order to read data located with the @code{progmem} attribute
+-(inline) assembler must be used.
+-@smallexample
+-/* Use custom macros from @w{@uref{http://nongnu.org/avr-libc/user-manual/,AVR-LibC}} */
+-#include <avr/pgmspace.h> 
++Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows x86
++compilers to match the native Microsoft compiler.
+ 
+-/* Locate var in flash memory */
+-const int var[2] PROGMEM = @{ 1, 2 @};
++The Microsoft structure layout algorithm is fairly simple with the exception
++of the bit-field packing.  
++The padding and alignment of members of structures and whether a bit-field 
++can straddle a storage-unit boundary are determine by these rules:
+ 
+-int read_var (int i)
+-@{
+-    /* Access var[] by accessor macro from avr/pgmspace.h */
+-    return (int) pgm_read_word (& var[i]);
+-@}
++@enumerate
++@item Structure members are stored sequentially in the order in which they are
++declared: the first member has the lowest memory address and the last member
++the highest.
++
++@item Every data object has an alignment requirement.  The alignment requirement
++for all data except structures, unions, and arrays is either the size of the
++object or the current packing size (specified with either the
++@code{aligned} attribute or the @code{pack} pragma),
++whichever is less.  For structures, unions, and arrays,
++the alignment requirement is the largest alignment requirement of its members.
++Every object is allocated an offset so that:
++
++@smallexample
++offset % alignment_requirement == 0
+ @end smallexample
+ 
+-AVR is a Harvard architecture processor and data and read-only data
+-normally resides in the data memory (RAM).
++@item Adjacent bit-fields are packed into the same 1-, 2-, or 4-byte allocation
++unit if the integral types are the same size and if the next bit-field fits
++into the current allocation unit without crossing the boundary imposed by the
++common alignment requirements of the bit-fields.
++@end enumerate
+ 
+-See also the @ref{AVR Named Address Spaces} section for
+-an alternate way to locate and access data in flash memory.
++MSVC interprets zero-length bit-fields in the following ways:
+ 
+-@item io
+-@itemx io (@var{addr})
+-@cindex @code{io} variable attribute, AVR
+-Variables with the @code{io} attribute are used to address
+-memory-mapped peripherals in the io address range.
+-If an address is specified, the variable
+-is assigned that address, and the value is interpreted as an
+-address in the data address space.
+-Example:
++@enumerate
++@item If a zero-length bit-field is inserted between two bit-fields that
++are normally coalesced, the bit-fields are not coalesced.
++
++For example:
+ 
+ @smallexample
+-volatile int porta __attribute__((io (0x22)));
++struct
++ @{
++   unsigned long bf_1 : 12;
++   unsigned long : 0;
++   unsigned long bf_2 : 12;
++ @} t1;
+ @end smallexample
+ 
+-The address specified in the address in the data address range.
++@noindent
++The size of @code{t1} is 8 bytes with the zero-length bit-field.  If the
++zero-length bit-field were removed, @code{t1}'s size would be 4 bytes.
+ 
+-Otherwise, the variable it is not assigned an address, but the
+-compiler will still use in/out instructions where applicable,
+-assuming some other module assigns an address in the io address range.
+-Example:
++@item If a zero-length bit-field is inserted after a bit-field, @code{foo}, and the
++alignment of the zero-length bit-field is greater than the member that follows it,
++@code{bar}, @code{bar} is aligned as the type of the zero-length bit-field.
++
++For example:
+ 
+ @smallexample
+-extern volatile int porta __attribute__((io));
++struct
++ @{
++   char foo : 4;
++   short : 0;
++   char bar;
++ @} t2;
++
++struct
++ @{
++   char foo : 4;
++   short : 0;
++   double bar;
++ @} t3;
+ @end smallexample
+ 
+-@item io_low
+-@itemx io_low (@var{addr})
+-@cindex @code{io_low} variable attribute, AVR
+-This is like the @code{io} attribute, but additionally it informs the
+-compiler that the object lies in the lower half of the I/O area,
+-allowing the use of @code{cbi}, @code{sbi}, @code{sbic} and @code{sbis}
+-instructions.
++@noindent
++For @code{t2}, @code{bar} is placed at offset 2, rather than offset 1.
++Accordingly, the size of @code{t2} is 4.  For @code{t3}, the zero-length
++bit-field does not affect the alignment of @code{bar} or, as a result, the size
++of the structure.
+ 
+-@item address
+-@itemx address (@var{addr})
+-@cindex @code{address} variable attribute, AVR
+-Variables with the @code{address} attribute are used to address
+-memory-mapped peripherals that may lie outside the io address range.
++Taking this into account, it is important to note the following:
++
++@enumerate
++@item If a zero-length bit-field follows a normal bit-field, the type of the
++zero-length bit-field may affect the alignment of the structure as whole. For
++example, @code{t2} has a size of 4 bytes, since the zero-length bit-field follows a
++normal bit-field, and is of type short.
++
++@item Even if a zero-length bit-field is not followed by a normal bit-field, it may
++still affect the alignment of the structure:
+ 
+ @smallexample
+-volatile int porta __attribute__((address (0x600)));
++struct
++ @{
++   char foo : 6;
++   long : 0;
++ @} t4;
+ @end smallexample
+ 
+-@end table
+-
+-@subsection Blackfin Variable Attributes
++@noindent
++Here, @code{t4} takes up 4 bytes.
++@end enumerate
+ 
+-Three attributes are currently defined for the Blackfin.
++@item Zero-length bit-fields following non-bit-field members are ignored:
+ 
+-@table @code
+-@item l1_data
+-@itemx l1_data_A
+-@itemx l1_data_B
+-@cindex @code{l1_data} variable attribute, Blackfin
+-@cindex @code{l1_data_A} variable attribute, Blackfin
+-@cindex @code{l1_data_B} variable attribute, Blackfin
+-Use these attributes on the Blackfin to place the variable into L1 Data SRAM.
+-Variables with @code{l1_data} attribute are put into the specific section
+-named @code{.l1.data}. Those with @code{l1_data_A} attribute are put into
+-the specific section named @code{.l1.data.A}. Those with @code{l1_data_B}
+-attribute are put into the specific section named @code{.l1.data.B}.
++@smallexample
++struct
++ @{
++   char foo;
++   long : 0;
++   char bar;
++ @} t5;
++@end smallexample
+ 
+-@item l2
+-@cindex @code{l2} variable attribute, Blackfin
+-Use this attribute on the Blackfin to place the variable into L2 SRAM.
+-Variables with @code{l2} attribute are put into the specific section
+-named @code{.l2.data}.
++@noindent
++Here, @code{t5} takes up 2 bytes.
++@end enumerate
+ @end table
+ 
+-@subsection H8/300 Variable Attributes
++@node Xstormy16 Variable Attributes
++@subsection Xstormy16 Variable Attributes
+ 
+-These variable attributes are available for H8/300 targets:
++One attribute is currently defined for xstormy16 configurations:
++@code{below100}.
+ 
+ @table @code
+-@item eightbit_data
+-@cindex @code{eightbit_data} variable attribute, H8/300
+-@cindex eight-bit data on the H8/300, H8/300H, and H8S
+-Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
+-variable should be placed into the eight-bit data section.
+-The compiler generates more efficient code for certain operations
+-on data in the eight-bit data area.  Note the eight-bit data area is limited to
+-256 bytes of data.
+-
+-You must use GAS and GLD from GNU binutils version 2.7 or later for
+-this attribute to work correctly.
++@item below100
++@cindex @code{below100} variable attribute, Xstormy16
+ 
+-@item tiny_data
+-@cindex @code{tiny_data} variable attribute, H8/300
+-@cindex tiny data section on the H8/300H and H8S
+-Use this attribute on the H8/300H and H8S to indicate that the specified
+-variable should be placed into the tiny data section.
+-The compiler generates more efficient code for loads and stores
+-on data in the tiny data section.  Note the tiny data area is limited to
+-slightly under 32KB of data.
++If a variable has the @code{below100} attribute (@code{BELOW100} is
++allowed also), GCC places the variable in the first 0x100 bytes of
++memory and use special opcodes to access it.  Such variables are
++placed in either the @code{.bss_below100} section or the
++@code{.data_below100} section.
+ 
+ @end table
+ 
+-@subsection IA-64 Variable Attributes
++@node Type Attributes
++@section Specifying Attributes of Types
++@cindex attribute of types
++@cindex type attributes
+ 
+-The IA-64 back end supports the following variable attribute:
++The keyword @code{__attribute__} allows you to specify special
++attributes of types.  Some type attributes apply only to @code{struct}
++and @code{union} types, while others can apply to any type defined
++via a @code{typedef} declaration.  Other attributes are defined for
++functions (@pxref{Function Attributes}), labels (@pxref{Label 
++Attributes}) and for variables (@pxref{Variable Attributes}).
+ 
+-@table @code
+-@item model (@var{model-name})
+-@cindex @code{model} variable attribute, IA-64
++The @code{__attribute__} keyword is followed by an attribute specification
++inside double parentheses.  
+ 
+-On IA-64, use this attribute to set the addressability of an object.
+-At present, the only supported identifier for @var{model-name} is
+-@code{small}, indicating addressability via ``small'' (22-bit)
+-addresses (so that their addresses can be loaded with the @code{addl}
+-instruction).  Caveat: such addressing is by definition not position
+-independent and hence this attribute must not be used for objects
+-defined by shared libraries.
++You may specify type attributes in an enum, struct or union type
++declaration or definition by placing them immediately after the
++@code{struct}, @code{union} or @code{enum} keyword.  A less preferred
++syntax is to place them just past the closing curly brace of the
++definition.
+ 
+-@end table
++You can also include type attributes in a @code{typedef} declaration.
++@xref{Attribute Syntax}, for details of the exact syntax for using
++attributes.
+ 
+-@subsection M32R/D Variable Attributes
++@menu
++* Common Type Attributes::
++* ARM Type Attributes::
++* MeP Type Attributes::
++* PowerPC Type Attributes::
++* SPU Type Attributes::
++* x86 Type Attributes::
++@end menu
+ 
+-One attribute is currently defined for the M32R/D@.
++@node Common Type Attributes
++@subsection Common Type Attributes
++
++The following type attributes are supported on most targets.
+ 
+ @table @code
+-@item model (@var{model-name})
+-@cindex @code{model-name} variable attribute, M32R/D
+-@cindex variable addressability on the M32R/D
+-Use this attribute on the M32R/D to set the addressability of an object.
+-The identifier @var{model-name} is one of @code{small}, @code{medium},
+-or @code{large}, representing each of the code models.
++@cindex @code{aligned} type attribute
++@item aligned (@var{alignment})
++This attribute specifies a minimum alignment (in bytes) for variables
++of the specified type.  For example, the declarations:
+ 
+-Small model objects live in the lower 16MB of memory (so that their
+-addresses can be loaded with the @code{ld24} instruction).
++@smallexample
++struct S @{ short f[3]; @} __attribute__ ((aligned (8)));
++typedef int more_aligned_int __attribute__ ((aligned (8)));
++@end smallexample
+ 
+-Medium and large model objects may live anywhere in the 32-bit address space
+-(the compiler generates @code{seth/add3} instructions to load their
+-addresses).
+-@end table
++@noindent
++force the compiler to ensure (as far as it can) that each variable whose
++type is @code{struct S} or @code{more_aligned_int} is allocated and
++aligned @emph{at least} on a 8-byte boundary.  On a SPARC, having all
++variables of type @code{struct S} aligned to 8-byte boundaries allows
++the compiler to use the @code{ldd} and @code{std} (doubleword load and
++store) instructions when copying one variable of type @code{struct S} to
++another, thus improving run-time efficiency.
+ 
+-@anchor{MeP Variable Attributes}
+-@subsection MeP Variable Attributes
++Note that the alignment of any given @code{struct} or @code{union} type
++is required by the ISO C standard to be at least a perfect multiple of
++the lowest common multiple of the alignments of all of the members of
++the @code{struct} or @code{union} in question.  This means that you @emph{can}
++effectively adjust the alignment of a @code{struct} or @code{union}
++type by attaching an @code{aligned} attribute to any one of the members
++of such a type, but the notation illustrated in the example above is a
++more obvious, intuitive, and readable way to request the compiler to
++adjust the alignment of an entire @code{struct} or @code{union} type.
+ 
+-The MeP target has a number of addressing modes and busses.  The
+-@code{near} space spans the standard memory space's first 16 megabytes
+-(24 bits).  The @code{far} space spans the entire 32-bit memory space.
+-The @code{based} space is a 128-byte region in the memory space that
+-is addressed relative to the @code{$tp} register.  The @code{tiny}
+-space is a 65536-byte region relative to the @code{$gp} register.  In
+-addition to these memory regions, the MeP target has a separate 16-bit
+-control bus which is specified with @code{cb} attributes.
++As in the preceding example, you can explicitly specify the alignment
++(in bytes) that you wish the compiler to use for a given @code{struct}
++or @code{union} type.  Alternatively, you can leave out the alignment factor
++and just ask the compiler to align a type to the maximum
++useful alignment for the target machine you are compiling for.  For
++example, you could write:
+ 
+-@table @code
++@smallexample
++struct S @{ short f[3]; @} __attribute__ ((aligned));
++@end smallexample
+ 
+-@item based
+-@cindex @code{based} variable attribute, MeP
+-Any variable with the @code{based} attribute is assigned to the
+-@code{.based} section, and is accessed with relative to the
+-@code{$tp} register.
++Whenever you leave out the alignment factor in an @code{aligned}
++attribute specification, the compiler automatically sets the alignment
++for the type to the largest alignment that is ever used for any data
++type on the target machine you are compiling for.  Doing this can often
++make copy operations more efficient, because the compiler can use
++whatever instructions copy the biggest chunks of memory when performing
++copies to or from the variables that have types that you have aligned
++this way.
+ 
+-@item tiny
+-@cindex @code{tiny} variable attribute, MeP
+-Likewise, the @code{tiny} attribute assigned variables to the
+-@code{.tiny} section, relative to the @code{$gp} register.
++In the example above, if the size of each @code{short} is 2 bytes, then
++the size of the entire @code{struct S} type is 6 bytes.  The smallest
++power of two that is greater than or equal to that is 8, so the
++compiler sets the alignment for the entire @code{struct S} type to 8
++bytes.
+ 
+-@item near
+-@cindex @code{near} variable attribute, MeP
+-Variables with the @code{near} attribute are assumed to have addresses
+-that fit in a 24-bit addressing mode.  This is the default for large
+-variables (@code{-mtiny=4} is the default) but this attribute can
+-override @code{-mtiny=} for small variables, or override @code{-ml}.
++Note that although you can ask the compiler to select a time-efficient
++alignment for a given type and then declare only individual stand-alone
++objects of that type, the compiler's ability to select a time-efficient
++alignment is primarily useful only when you plan to create arrays of
++variables having the relevant (efficiently aligned) type.  If you
++declare or use arrays of variables of an efficiently-aligned type, then
++it is likely that your program also does pointer arithmetic (or
++subscripting, which amounts to the same thing) on pointers to the
++relevant type, and the code that the compiler generates for these
++pointer arithmetic operations is often more efficient for
++efficiently-aligned types than for other types.
+ 
+-@item far
+-@cindex @code{far} variable attribute, MeP
+-Variables with the @code{far} attribute are addressed using a full
+-32-bit address.  Since this covers the entire memory space, this
+-allows modules to make no assumptions about where variables might be
+-stored.
++The @code{aligned} attribute can only increase the alignment; but you
++can decrease it by specifying @code{packed} as well.  See below.
+ 
+-@item io
+-@cindex @code{io} variable attribute, MeP
+-@itemx io (@var{addr})
+-Variables with the @code{io} attribute are used to address
+-memory-mapped peripherals.  If an address is specified, the variable
+-is assigned that address, else it is not assigned an address (it is
+-assumed some other module assigns an address).  Example:
++Note that the effectiveness of @code{aligned} attributes may be limited
++by inherent limitations in your linker.  On many systems, the linker is
++only able to arrange for variables to be aligned up to a certain maximum
++alignment.  (For some linkers, the maximum supported alignment may
++be very very small.)  If your linker is only able to align variables
++up to a maximum of 8-byte alignment, then specifying @code{aligned(16)}
++in an @code{__attribute__} still only provides you with 8-byte
++alignment.  See your linker documentation for further information.
++
++@opindex fshort-enums
++Specifying this attribute for @code{struct} and @code{union} types is
++equivalent to specifying the @code{packed} attribute on each of the
++structure or union members.  Specifying the @option{-fshort-enums}
++flag on the line is equivalent to specifying the @code{packed}
++attribute on all @code{enum} definitions.
++
++In the following example @code{struct my_packed_struct}'s members are
++packed closely together, but the internal layout of its @code{s} member
++is not packed---to do that, @code{struct my_unpacked_struct} needs to
++be packed too.
+ 
+ @smallexample
+-int timer_count __attribute__((io(0x123)));
++struct my_unpacked_struct
++ @{
++    char c;
++    int i;
++ @};
++
++struct __attribute__ ((__packed__)) my_packed_struct
++  @{
++     char c;
++     int  i;
++     struct my_unpacked_struct s;
++  @};
+ @end smallexample
+ 
+-@item cb
+-@itemx cb (@var{addr})
+-@cindex @code{cb} variable attribute, MeP
+-Variables with the @code{cb} attribute are used to access the control
+-bus, using special instructions.  @code{addr} indicates the control bus
+-address.  Example:
++You may only specify this attribute on the definition of an @code{enum},
++@code{struct} or @code{union}, not on a @code{typedef} that does not
++also define the enumerated type, structure or union.
++
++@item bnd_variable_size
++@cindex @code{bnd_variable_size} type attribute
++@cindex Pointer Bounds Checker attributes
++When applied to a structure field, this attribute tells Pointer
++Bounds Checker that the size of this field should not be computed
++using static type information.  It may be used to mark variably-sized
++static array fields placed at the end of a structure.
++
++@smallexample
++struct S
++@{
++  int size;
++  char data[1];
++@}
++S *p = (S *)malloc (sizeof(S) + 100);
++p->data[10] = 0; //Bounds violation
++@end smallexample
++
++@noindent
++By using an attribute for the field we may avoid unwanted bound
++violation checks:
++
++@smallexample
++struct S
++@{
++  int size;
++  char data[1] __attribute__((bnd_variable_size));
++@}
++S *p = (S *)malloc (sizeof(S) + 100);
++p->data[10] = 0; //OK
++@end smallexample
++
++@item deprecated
++@itemx deprecated (@var{msg})
++@cindex @code{deprecated} type attribute
++The @code{deprecated} attribute results in a warning if the type
++is used anywhere in the source file.  This is useful when identifying
++types that are expected to be removed in a future version of a program.
++If possible, the warning also includes the location of the declaration
++of the deprecated type, to enable users to easily find further
++information about why the type is deprecated, or what they should do
++instead.  Note that the warnings only occur for uses and then only
++if the type is being applied to an identifier that itself is not being
++declared as deprecated.
+ 
+ @smallexample
+-int cpu_clock __attribute__((cb(0x123)));
++typedef int T1 __attribute__ ((deprecated));
++T1 x;
++typedef T1 T2;
++T2 y;
++typedef T1 T3 __attribute__ ((deprecated));
++T3 z __attribute__ ((deprecated));
+ @end smallexample
+ 
+-@end table
+-
+-@subsection PowerPC Variable Attributes
++@noindent
++results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
++warning is issued for line 4 because T2 is not explicitly
++deprecated.  Line 5 has no warning because T3 is explicitly
++deprecated.  Similarly for line 6.  The optional @var{msg}
++argument, which must be a string, is printed in the warning if
++present.
+ 
+-Three attributes currently are defined for PowerPC configurations:
+-@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
++The @code{deprecated} attribute can also be used for functions and
++variables (@pxref{Function Attributes}, @pxref{Variable Attributes}.)
+ 
+-@cindex @code{ms_struct} variable attribute, PowerPC
+-@cindex @code{gcc_struct} variable attribute, PowerPC
+-For full documentation of the struct attributes please see the
+-documentation in @ref{x86 Variable Attributes}.
++@item designated_init
++@cindex @code{designated_init} type attribute
++This attribute may only be applied to structure types.  It indicates
++that any initialization of an object of this type must use designated
++initializers rather than positional initializers.  The intent of this
++attribute is to allow the programmer to indicate that a structure's
++layout may change, and that therefore relying on positional
++initialization will result in future breakage.
+ 
+-@cindex @code{altivec} variable attribute, PowerPC
+-For documentation of @code{altivec} attribute please see the
+-documentation in @ref{PowerPC Type Attributes}.
++GCC emits warnings based on this attribute by default; use
++@option{-Wno-designated-init} to suppress them.
+ 
+-@subsection SPU Variable Attributes
++@item may_alias
++@cindex @code{may_alias} type attribute
++Accesses through pointers to types with this attribute are not subject
++to type-based alias analysis, but are instead assumed to be able to alias
++any other type of objects.
++In the context of section 6.5 paragraph 7 of the C99 standard,
++an lvalue expression
++dereferencing such a pointer is treated like having a character type.
++See @option{-fstrict-aliasing} for more information on aliasing issues.
++This extension exists to support some vector APIs, in which pointers to
++one vector type are permitted to alias pointers to a different vector type.
+ 
+-@cindex @code{spu_vector} variable attribute, SPU
+-The SPU supports the @code{spu_vector} attribute for variables.  For
+-documentation of this attribute please see the documentation in
+-@ref{SPU Type Attributes}.
++Note that an object of a type with this attribute does not have any
++special semantics.
+ 
+-@anchor{x86 Variable Attributes}
+-@subsection x86 Variable Attributes
++Example of use:
+ 
+-Two attributes are currently defined for x86 configurations:
+-@code{ms_struct} and @code{gcc_struct}.
++@smallexample
++typedef short __attribute__((__may_alias__)) short_a;
+ 
+-@table @code
+-@item ms_struct
+-@itemx gcc_struct
+-@cindex @code{ms_struct} variable attribute, x86
+-@cindex @code{gcc_struct} variable attribute, x86
++int
++main (void)
++@{
++  int a = 0x12345678;
++  short_a *b = (short_a *) &a;
+ 
+-If @code{packed} is used on a structure, or if bit-fields are used,
+-it may be that the Microsoft ABI lays out the structure differently
+-than the way GCC normally does.  Particularly when moving packed
+-data between functions compiled with GCC and the native Microsoft compiler
+-(either via function call or as data in a file), it may be necessary to access
+-either format.
++  b[1] = 0;
+ 
+-Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows x86
+-compilers to match the native Microsoft compiler.
++  if (a == 0x12345678)
++    abort();
+ 
+-The Microsoft structure layout algorithm is fairly simple with the exception
+-of the bit-field packing.  
+-The padding and alignment of members of structures and whether a bit-field 
+-can straddle a storage-unit boundary are determine by these rules:
++  exit(0);
++@}
++@end smallexample
+ 
+-@enumerate
+-@item Structure members are stored sequentially in the order in which they are
+-declared: the first member has the lowest memory address and the last member
+-the highest.
++@noindent
++If you replaced @code{short_a} with @code{short} in the variable
++declaration, the above program would abort when compiled with
++@option{-fstrict-aliasing}, which is on by default at @option{-O2} or
++above.
+ 
+-@item Every data object has an alignment requirement.  The alignment requirement
+-for all data except structures, unions, and arrays is either the size of the
+-object or the current packing size (specified with either the
+-@code{aligned} attribute or the @code{pack} pragma),
+-whichever is less.  For structures, unions, and arrays,
+-the alignment requirement is the largest alignment requirement of its members.
+-Every object is allocated an offset so that:
++@item packed
++@cindex @code{packed} type attribute
++This attribute, attached to @code{struct} or @code{union} type
++definition, specifies that each member (other than zero-width bit-fields)
++of the structure or union is placed to minimize the memory required.  When
++attached to an @code{enum} definition, it indicates that the smallest
++integral type should be used.
+ 
+-@smallexample
+-offset % alignment_requirement == 0
+-@end smallexample
++@item transparent_union
++@cindex @code{transparent_union} type attribute
+ 
+-@item Adjacent bit-fields are packed into the same 1-, 2-, or 4-byte allocation
+-unit if the integral types are the same size and if the next bit-field fits
+-into the current allocation unit without crossing the boundary imposed by the
+-common alignment requirements of the bit-fields.
+-@end enumerate
++This attribute, attached to a @code{union} type definition, indicates
++that any function parameter having that union type causes calls to that
++function to be treated in a special way.
+ 
+-MSVC interprets zero-length bit-fields in the following ways:
++First, the argument corresponding to a transparent union type can be of
++any type in the union; no cast is required.  Also, if the union contains
++a pointer type, the corresponding argument can be a null pointer
++constant or a void pointer expression; and if the union contains a void
++pointer type, the corresponding argument can be any pointer expression.
++If the union member type is a pointer, qualifiers like @code{const} on
++the referenced type must be respected, just as with normal pointer
++conversions.
+ 
+-@enumerate
+-@item If a zero-length bit-field is inserted between two bit-fields that
+-are normally coalesced, the bit-fields are not coalesced.
++Second, the argument is passed to the function using the calling
++conventions of the first member of the transparent union, not the calling
++conventions of the union itself.  All members of the union must have the
++same machine representation; this is necessary for this argument passing
++to work properly.
+ 
+-For example:
++Transparent unions are designed for library functions that have multiple
++interfaces for compatibility reasons.  For example, suppose the
++@code{wait} function must accept either a value of type @code{int *} to
++comply with POSIX, or a value of type @code{union wait *} to comply with
++the 4.1BSD interface.  If @code{wait}'s parameter were @code{void *},
++@code{wait} would accept both kinds of arguments, but it would also
++accept any other pointer type and this would make argument type checking
++less useful.  Instead, @code{<sys/wait.h>} might define the interface
++as follows:
+ 
+ @smallexample
+-struct
+- @{
+-   unsigned long bf_1 : 12;
+-   unsigned long : 0;
+-   unsigned long bf_2 : 12;
+- @} t1;
++typedef union __attribute__ ((__transparent_union__))
++  @{
++    int *__ip;
++    union wait *__up;
++  @} wait_status_ptr_t;
++
++pid_t wait (wait_status_ptr_t);
+ @end smallexample
+ 
+ @noindent
+-The size of @code{t1} is 8 bytes with the zero-length bit-field.  If the
+-zero-length bit-field were removed, @code{t1}'s size would be 4 bytes.
+-
+-@item If a zero-length bit-field is inserted after a bit-field, @code{foo}, and the
+-alignment of the zero-length bit-field is greater than the member that follows it,
+-@code{bar}, @code{bar} is aligned as the type of the zero-length bit-field.
+-
+-For example:
++This interface allows either @code{int *} or @code{union wait *}
++arguments to be passed, using the @code{int *} calling convention.
++The program can call @code{wait} with arguments of either type:
+ 
+ @smallexample
+-struct
+- @{
+-   char foo : 4;
+-   short : 0;
+-   char bar;
+- @} t2;
+-
+-struct
+- @{
+-   char foo : 4;
+-   short : 0;
+-   double bar;
+- @} t3;
++int w1 () @{ int w; return wait (&w); @}
++int w2 () @{ union wait w; return wait (&w); @}
+ @end smallexample
+ 
+ @noindent
+-For @code{t2}, @code{bar} is placed at offset 2, rather than offset 1.
+-Accordingly, the size of @code{t2} is 4.  For @code{t3}, the zero-length
+-bit-field does not affect the alignment of @code{bar} or, as a result, the size
+-of the structure.
+-
+-Taking this into account, it is important to note the following:
+-
+-@enumerate
+-@item If a zero-length bit-field follows a normal bit-field, the type of the
+-zero-length bit-field may affect the alignment of the structure as whole. For
+-example, @code{t2} has a size of 4 bytes, since the zero-length bit-field follows a
+-normal bit-field, and is of type short.
+-
+-@item Even if a zero-length bit-field is not followed by a normal bit-field, it may
+-still affect the alignment of the structure:
++With this interface, @code{wait}'s implementation might look like this:
+ 
+ @smallexample
+-struct
+- @{
+-   char foo : 6;
+-   long : 0;
+- @} t4;
++pid_t wait (wait_status_ptr_t p)
++@{
++  return waitpid (-1, p.__ip, 0);
++@}
+ @end smallexample
+ 
+-@noindent
+-Here, @code{t4} takes up 4 bytes.
+-@end enumerate
++@item unused
++@cindex @code{unused} type attribute
++When attached to a type (including a @code{union} or a @code{struct}),
++this attribute means that variables of that type are meant to appear
++possibly unused.  GCC does not produce a warning for any variables of
++that type, even if the variable appears to do nothing.  This is often
++the case with lock or thread classes, which are usually defined and then
++not referenced, but contain constructors and destructors that have
++nontrivial bookkeeping functions.
+ 
+-@item Zero-length bit-fields following non-bit-field members are ignored:
++@item visibility
++@cindex @code{visibility} type attribute
++In C++, attribute visibility (@pxref{Function Attributes}) can also be
++applied to class, struct, union and enum types.  Unlike other type
++attributes, the attribute must appear between the initial keyword and
++the name of the type; it cannot appear after the body of the type.
+ 
+-@smallexample
+-struct
+- @{
+-   char foo;
+-   long : 0;
+-   char bar;
+- @} t5;
+-@end smallexample
++Note that the type visibility is applied to vague linkage entities
++associated with the class (vtable, typeinfo node, etc.).  In
++particular, if a class is thrown as an exception in one shared object
++and caught in another, the class must have default visibility.
++Otherwise the two shared objects are unable to use the same
++typeinfo node and exception handling will break.
+ 
+-@noindent
+-Here, @code{t5} takes up 2 bytes.
+-@end enumerate
+ @end table
+ 
+-@subsection Xstormy16 Variable Attributes
++To specify multiple attributes, separate them by commas within the
++double parentheses: for example, @samp{__attribute__ ((aligned (16),
++packed))}.
+ 
+-One attribute is currently defined for xstormy16 configurations:
+-@code{below100}.
++@node ARM Type Attributes
++@subsection ARM Type Attributes
+ 
+-@table @code
+-@item below100
+-@cindex @code{below100} variable attribute, Xstormy16
++@cindex @code{notshared} type attribute, ARM
++On those ARM targets that support @code{dllimport} (such as Symbian
++OS), you can use the @code{notshared} attribute to indicate that the
++virtual table and other similar data for a class should not be
++exported from a DLL@.  For example:
+ 
+-If a variable has the @code{below100} attribute (@code{BELOW100} is
+-allowed also), GCC places the variable in the first 0x100 bytes of
+-memory and use special opcodes to access it.  Such variables are
+-placed in either the @code{.bss_below100} section or the
+-@code{.data_below100} section.
++@smallexample
++class __declspec(notshared) C @{
++public:
++  __declspec(dllimport) C();
++  virtual void f();
++@}
+ 
+-@end table
++__declspec(dllexport)
++C::C() @{@}
++@end smallexample
+ 
+-@node Type Attributes
+-@section Specifying Attributes of Types
+-@cindex attribute of types
+-@cindex type attributes
++@noindent
++In this code, @code{C::C} is exported from the current DLL, but the
++virtual table for @code{C} is not exported.  (You can use
++@code{__attribute__} instead of @code{__declspec} if you prefer, but
++most Symbian OS code uses @code{__declspec}.)
+ 
+-The keyword @code{__attribute__} allows you to specify special
+-attributes of @code{struct} and @code{union} types when you define
+-such types.  This keyword is followed by an attribute specification
+-inside double parentheses.  Eight attributes are currently defined for
+-types: @code{aligned}, @code{packed}, @code{transparent_union},
+-@code{unused}, @code{deprecated}, @code{visibility}, @code{may_alias}
+-and @code{bnd_variable_size}.  Other attributes are defined for
+-functions (@pxref{Function Attributes}), labels (@pxref{Label 
+-Attributes}) and for variables (@pxref{Variable Attributes}).
++@node MeP Type Attributes
++@subsection MeP Type Attributes
+ 
+-You may also specify any one of these attributes with @samp{__}
+-preceding and following its keyword.  This allows you to use these
+-attributes in header files without being concerned about a possible
+-macro of the same name.  For example, you may use @code{__aligned__}
+-instead of @code{aligned}.
++@cindex @code{based} type attribute, MeP
++@cindex @code{tiny} type attribute, MeP
++@cindex @code{near} type attribute, MeP
++@cindex @code{far} type attribute, MeP
++Many of the MeP variable attributes may be applied to types as well.
++Specifically, the @code{based}, @code{tiny}, @code{near}, and
++@code{far} attributes may be applied to either.  The @code{io} and
++@code{cb} attributes may not be applied to types.
+ 
+-You may specify type attributes in an enum, struct or union type
+-declaration or definition, or for other types in a @code{typedef}
+-declaration.
++@node PowerPC Type Attributes
++@subsection PowerPC Type Attributes
+ 
+-For an enum, struct or union type, you may specify attributes either
+-between the enum, struct or union tag and the name of the type, or
+-just past the closing curly brace of the @emph{definition}.  The
+-former syntax is preferred.
++Three attributes currently are defined for PowerPC configurations:
++@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
+ 
+-@xref{Attribute Syntax}, for details of the exact syntax for using
+-attributes.
++@cindex @code{ms_struct} type attribute, PowerPC
++@cindex @code{gcc_struct} type attribute, PowerPC
++For full documentation of the @code{ms_struct} and @code{gcc_struct}
++attributes please see the documentation in @ref{x86 Type Attributes}.
+ 
+-@table @code
+-@cindex @code{aligned} type attribute
+-@item aligned (@var{alignment})
+-This attribute specifies a minimum alignment (in bytes) for variables
+-of the specified type.  For example, the declarations:
++@cindex @code{altivec} type attribute, PowerPC
++The @code{altivec} attribute allows one to declare AltiVec vector data
++types supported by the AltiVec Programming Interface Manual.  The
++attribute requires an argument to specify one of three vector types:
++@code{vector__}, @code{pixel__} (always followed by unsigned short),
++and @code{bool__} (always followed by unsigned).
+ 
+ @smallexample
+-struct S @{ short f[3]; @} __attribute__ ((aligned (8)));
+-typedef int more_aligned_int __attribute__ ((aligned (8)));
++__attribute__((altivec(vector__)))
++__attribute__((altivec(pixel__))) unsigned short
++__attribute__((altivec(bool__))) unsigned
+ @end smallexample
+ 
+-@noindent
+-force the compiler to ensure (as far as it can) that each variable whose
+-type is @code{struct S} or @code{more_aligned_int} is allocated and
+-aligned @emph{at least} on a 8-byte boundary.  On a SPARC, having all
+-variables of type @code{struct S} aligned to 8-byte boundaries allows
+-the compiler to use the @code{ldd} and @code{std} (doubleword load and
+-store) instructions when copying one variable of type @code{struct S} to
+-another, thus improving run-time efficiency.
++These attributes mainly are intended to support the @code{__vector},
++@code{__pixel}, and @code{__bool} AltiVec keywords.
+ 
+-Note that the alignment of any given @code{struct} or @code{union} type
+-is required by the ISO C standard to be at least a perfect multiple of
+-the lowest common multiple of the alignments of all of the members of
+-the @code{struct} or @code{union} in question.  This means that you @emph{can}
+-effectively adjust the alignment of a @code{struct} or @code{union}
+-type by attaching an @code{aligned} attribute to any one of the members
+-of such a type, but the notation illustrated in the example above is a
+-more obvious, intuitive, and readable way to request the compiler to
+-adjust the alignment of an entire @code{struct} or @code{union} type.
++@node SPU Type Attributes
++@subsection SPU Type Attributes
+ 
+-As in the preceding example, you can explicitly specify the alignment
+-(in bytes) that you wish the compiler to use for a given @code{struct}
+-or @code{union} type.  Alternatively, you can leave out the alignment factor
+-and just ask the compiler to align a type to the maximum
+-useful alignment for the target machine you are compiling for.  For
+-example, you could write:
++@cindex @code{spu_vector} type attribute, SPU
++The SPU supports the @code{spu_vector} attribute for types.  This attribute
++allows one to declare vector data types supported by the Sony/Toshiba/IBM SPU
++Language Extensions Specification.  It is intended to support the
++@code{__vector} keyword.
+ 
+-@smallexample
+-struct S @{ short f[3]; @} __attribute__ ((aligned));
+-@end smallexample
++@node x86 Type Attributes
++@subsection x86 Type Attributes
+ 
+-Whenever you leave out the alignment factor in an @code{aligned}
+-attribute specification, the compiler automatically sets the alignment
+-for the type to the largest alignment that is ever used for any data
+-type on the target machine you are compiling for.  Doing this can often
+-make copy operations more efficient, because the compiler can use
+-whatever instructions copy the biggest chunks of memory when performing
+-copies to or from the variables that have types that you have aligned
+-this way.
++Two attributes are currently defined for x86 configurations:
++@code{ms_struct} and @code{gcc_struct}.
+ 
+-In the example above, if the size of each @code{short} is 2 bytes, then
+-the size of the entire @code{struct S} type is 6 bytes.  The smallest
+-power of two that is greater than or equal to that is 8, so the
+-compiler sets the alignment for the entire @code{struct S} type to 8
+-bytes.
++@table @code
+ 
+-Note that although you can ask the compiler to select a time-efficient
+-alignment for a given type and then declare only individual stand-alone
+-objects of that type, the compiler's ability to select a time-efficient
+-alignment is primarily useful only when you plan to create arrays of
+-variables having the relevant (efficiently aligned) type.  If you
+-declare or use arrays of variables of an efficiently-aligned type, then
+-it is likely that your program also does pointer arithmetic (or
+-subscripting, which amounts to the same thing) on pointers to the
+-relevant type, and the code that the compiler generates for these
+-pointer arithmetic operations is often more efficient for
+-efficiently-aligned types than for other types.
++@item ms_struct
++@itemx gcc_struct
++@cindex @code{ms_struct} type attribute, x86
++@cindex @code{gcc_struct} type attribute, x86
+ 
+-The @code{aligned} attribute can only increase the alignment; but you
+-can decrease it by specifying @code{packed} as well.  See below.
++If @code{packed} is used on a structure, or if bit-fields are used
++it may be that the Microsoft ABI packs them differently
++than GCC normally packs them.  Particularly when moving packed
++data between functions compiled with GCC and the native Microsoft compiler
++(either via function call or as data in a file), it may be necessary to access
++either format.
+ 
+-Note that the effectiveness of @code{aligned} attributes may be limited
+-by inherent limitations in your linker.  On many systems, the linker is
+-only able to arrange for variables to be aligned up to a certain maximum
+-alignment.  (For some linkers, the maximum supported alignment may
+-be very very small.)  If your linker is only able to align variables
+-up to a maximum of 8-byte alignment, then specifying @code{aligned(16)}
+-in an @code{__attribute__} still only provides you with 8-byte
+-alignment.  See your linker documentation for further information.
++Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows x86
++compilers to match the native Microsoft compiler.
++@end table
+ 
+-@item packed
+-@cindex @code{packed} type attribute
+-This attribute, attached to @code{struct} or @code{union} type
+-definition, specifies that each member (other than zero-width bit-fields)
+-of the structure or union is placed to minimize the memory required.  When
+-attached to an @code{enum} definition, it indicates that the smallest
+-integral type should be used.
++@node Label Attributes
++@section Label Attributes
++@cindex Label Attributes
+ 
+-@opindex fshort-enums
+-Specifying this attribute for @code{struct} and @code{union} types is
+-equivalent to specifying the @code{packed} attribute on each of the
+-structure or union members.  Specifying the @option{-fshort-enums}
+-flag on the line is equivalent to specifying the @code{packed}
+-attribute on all @code{enum} definitions.
++GCC allows attributes to be set on C labels.  @xref{Attribute Syntax}, for 
++details of the exact syntax for using attributes.  Other attributes are 
++available for functions (@pxref{Function Attributes}), variables 
++(@pxref{Variable Attributes}) and for types (@pxref{Type Attributes}).
+ 
+-In the following example @code{struct my_packed_struct}'s members are
+-packed closely together, but the internal layout of its @code{s} member
+-is not packed---to do that, @code{struct my_unpacked_struct} needs to
+-be packed too.
++This example uses the @code{cold} label attribute to indicate the 
++@code{ErrorHandling} branch is unlikely to be taken and that the
++@code{ErrorHandling} label is unused:
+ 
+ @smallexample
+-struct my_unpacked_struct
+- @{
+-    char c;
+-    int i;
+- @};
+ 
+-struct __attribute__ ((__packed__)) my_packed_struct
+-  @{
+-     char c;
+-     int  i;
+-     struct my_unpacked_struct s;
+-  @};
++   asm goto ("some asm" : : : : NoError);
++
++/* This branch (the fall-through from the asm) is less commonly used */
++ErrorHandling: 
++   __attribute__((cold, unused)); /* Semi-colon is required here */
++   printf("error\n");
++   return 0;
++
++NoError:
++   printf("no error\n");
++   return 1;
+ @end smallexample
+ 
+-You may only specify this attribute on the definition of an @code{enum},
+-@code{struct} or @code{union}, not on a @code{typedef} that does not
+-also define the enumerated type, structure or union.
++@table @code
++@item unused
++@cindex @code{unused} label attribute
++This feature is intended for program-generated code that may contain 
++unused labels, but which is compiled with @option{-Wall}.  It is
++not normally appropriate to use in it human-written code, though it
++could be useful in cases where the code that jumps to the label is
++contained within an @code{#ifdef} conditional.
+ 
+-@item transparent_union
+-@cindex @code{transparent_union} type attribute
++@item hot
++@cindex @code{hot} label attribute
++The @code{hot} attribute on a label is used to inform the compiler that
++the path following the label is more likely than paths that are not so
++annotated.  This attribute is used in cases where @code{__builtin_expect}
++cannot be used, for instance with computed goto or @code{asm goto}.
+ 
+-This attribute, attached to a @code{union} type definition, indicates
+-that any function parameter having that union type causes calls to that
+-function to be treated in a special way.
++@item cold
++@cindex @code{cold} label attribute
++The @code{cold} attribute on labels is used to inform the compiler that
++the path following the label is unlikely to be executed.  This attribute
++is used in cases where @code{__builtin_expect} cannot be used, for instance
++with computed goto or @code{asm goto}.
++
++@end table
++
++@node Attribute Syntax
++@section Attribute Syntax
++@cindex attribute syntax
++
++This section describes the syntax with which @code{__attribute__} may be
++used, and the constructs to which attribute specifiers bind, for the C
++language.  Some details may vary for C++ and Objective-C@.  Because of
++infelicities in the grammar for attributes, some forms described here
++may not be successfully parsed in all cases.
++
++There are some problems with the semantics of attributes in C++.  For
++example, there are no manglings for attributes, although they may affect
++code generation, so problems may arise when attributed types are used in
++conjunction with templates or overloading.  Similarly, @code{typeid}
++does not distinguish between types with different attributes.  Support
++for attributes in C++ may be restricted in future to attributes on
++declarations only, but not on nested declarators.
+ 
+-First, the argument corresponding to a transparent union type can be of
+-any type in the union; no cast is required.  Also, if the union contains
+-a pointer type, the corresponding argument can be a null pointer
+-constant or a void pointer expression; and if the union contains a void
+-pointer type, the corresponding argument can be any pointer expression.
+-If the union member type is a pointer, qualifiers like @code{const} on
+-the referenced type must be respected, just as with normal pointer
+-conversions.
++@xref{Function Attributes}, for details of the semantics of attributes
++applying to functions.  @xref{Variable Attributes}, for details of the
++semantics of attributes applying to variables.  @xref{Type Attributes},
++for details of the semantics of attributes applying to structure, union
++and enumerated types.
++@xref{Label Attributes}, for details of the semantics of attributes 
++applying to labels.
+ 
+-Second, the argument is passed to the function using the calling
+-conventions of the first member of the transparent union, not the calling
+-conventions of the union itself.  All members of the union must have the
+-same machine representation; this is necessary for this argument passing
+-to work properly.
++An @dfn{attribute specifier} is of the form
++@code{__attribute__ ((@var{attribute-list}))}.  An @dfn{attribute list}
++is a possibly empty comma-separated sequence of @dfn{attributes}, where
++each attribute is one of the following:
+ 
+-Transparent unions are designed for library functions that have multiple
+-interfaces for compatibility reasons.  For example, suppose the
+-@code{wait} function must accept either a value of type @code{int *} to
+-comply with POSIX, or a value of type @code{union wait *} to comply with
+-the 4.1BSD interface.  If @code{wait}'s parameter were @code{void *},
+-@code{wait} would accept both kinds of arguments, but it would also
+-accept any other pointer type and this would make argument type checking
+-less useful.  Instead, @code{<sys/wait.h>} might define the interface
+-as follows:
++@itemize @bullet
++@item
++Empty.  Empty attributes are ignored.
+ 
+-@smallexample
+-typedef union __attribute__ ((__transparent_union__))
+-  @{
+-    int *__ip;
+-    union wait *__up;
+-  @} wait_status_ptr_t;
++@item
++An attribute name
++(which may be an identifier such as @code{unused}, or a reserved
++word such as @code{const}).
+ 
+-pid_t wait (wait_status_ptr_t);
+-@end smallexample
++@item
++An attribute name followed by a parenthesized list of
++parameters for the attribute.
++These parameters take one of the following forms:
+ 
+-@noindent
+-This interface allows either @code{int *} or @code{union wait *}
+-arguments to be passed, using the @code{int *} calling convention.
+-The program can call @code{wait} with arguments of either type:
++@itemize @bullet
++@item
++An identifier.  For example, @code{mode} attributes use this form.
+ 
+-@smallexample
+-int w1 () @{ int w; return wait (&w); @}
+-int w2 () @{ union wait w; return wait (&w); @}
+-@end smallexample
++@item
++An identifier followed by a comma and a non-empty comma-separated list
++of expressions.  For example, @code{format} attributes use this form.
+ 
+-@noindent
+-With this interface, @code{wait}'s implementation might look like this:
++@item
++A possibly empty comma-separated list of expressions.  For example,
++@code{format_arg} attributes use this form with the list being a single
++integer constant expression, and @code{alias} attributes use this form
++with the list being a single string constant.
++@end itemize
++@end itemize
+ 
+-@smallexample
+-pid_t wait (wait_status_ptr_t p)
+-@{
+-  return waitpid (-1, p.__ip, 0);
+-@}
+-@end smallexample
++An @dfn{attribute specifier list} is a sequence of one or more attribute
++specifiers, not separated by any other tokens.
+ 
+-@item unused
+-@cindex @code{unused} type attribute
+-When attached to a type (including a @code{union} or a @code{struct}),
+-this attribute means that variables of that type are meant to appear
+-possibly unused.  GCC does not produce a warning for any variables of
+-that type, even if the variable appears to do nothing.  This is often
+-the case with lock or thread classes, which are usually defined and then
+-not referenced, but contain constructors and destructors that have
+-nontrivial bookkeeping functions.
++You may optionally specify attribute names with @samp{__}
++preceding and following the name.
++This allows you to use them in header files without
++being concerned about a possible macro of the same name.  For example,
++you may use the attribute name @code{__noreturn__} instead of @code{noreturn}.
+ 
+-@item deprecated
+-@itemx deprecated (@var{msg})
+-@cindex @code{deprecated} type attribute
+-The @code{deprecated} attribute results in a warning if the type
+-is used anywhere in the source file.  This is useful when identifying
+-types that are expected to be removed in a future version of a program.
+-If possible, the warning also includes the location of the declaration
+-of the deprecated type, to enable users to easily find further
+-information about why the type is deprecated, or what they should do
+-instead.  Note that the warnings only occur for uses and then only
+-if the type is being applied to an identifier that itself is not being
+-declared as deprecated.
+ 
+-@smallexample
+-typedef int T1 __attribute__ ((deprecated));
+-T1 x;
+-typedef T1 T2;
+-T2 y;
+-typedef T1 T3 __attribute__ ((deprecated));
+-T3 z __attribute__ ((deprecated));
+-@end smallexample
++@subsubheading Label Attributes
+ 
+-@noindent
+-results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
+-warning is issued for line 4 because T2 is not explicitly
+-deprecated.  Line 5 has no warning because T3 is explicitly
+-deprecated.  Similarly for line 6.  The optional @var{msg}
+-argument, which must be a string, is printed in the warning if
+-present.
++In GNU C, an attribute specifier list may appear after the colon following a
++label, other than a @code{case} or @code{default} label.  GNU C++ only permits
++attributes on labels if the attribute specifier is immediately
++followed by a semicolon (i.e., the label applies to an empty
++statement).  If the semicolon is missing, C++ label attributes are
++ambiguous, as it is permissible for a declaration, which could begin
++with an attribute list, to be labelled in C++.  Declarations cannot be
++labelled in C90 or C99, so the ambiguity does not arise there.
+ 
+-The @code{deprecated} attribute can also be used for functions and
+-variables (@pxref{Function Attributes}, @pxref{Variable Attributes}.)
++@subsubheading Type Attributes
+ 
+-@item may_alias
+-@cindex @code{may_alias} type attribute
+-Accesses through pointers to types with this attribute are not subject
+-to type-based alias analysis, but are instead assumed to be able to alias
+-any other type of objects.
+-In the context of section 6.5 paragraph 7 of the C99 standard,
+-an lvalue expression
+-dereferencing such a pointer is treated like having a character type.
+-See @option{-fstrict-aliasing} for more information on aliasing issues.
+-This extension exists to support some vector APIs, in which pointers to
+-one vector type are permitted to alias pointers to a different vector type.
++An attribute specifier list may appear as part of a @code{struct},
++@code{union} or @code{enum} specifier.  It may go either immediately
++after the @code{struct}, @code{union} or @code{enum} keyword, or after
++the closing brace.  The former syntax is preferred.
++Where attribute specifiers follow the closing brace, they are considered
++to relate to the structure, union or enumerated type defined, not to any
++enclosing declaration the type specifier appears in, and the type
++defined is not complete until after the attribute specifiers.
++@c Otherwise, there would be the following problems: a shift/reduce
++@c conflict between attributes binding the struct/union/enum and
++@c binding to the list of specifiers/qualifiers; and "aligned"
++@c attributes could use sizeof for the structure, but the size could be
++@c changed later by "packed" attributes.
+ 
+-Note that an object of a type with this attribute does not have any
+-special semantics.
+ 
+-Example of use:
++@subsubheading All other attributes
+ 
+-@smallexample
+-typedef short __attribute__((__may_alias__)) short_a;
++Otherwise, an attribute specifier appears as part of a declaration,
++counting declarations of unnamed parameters and type names, and relates
++to that declaration (which may be nested in another declaration, for
++example in the case of a parameter declaration), or to a particular declarator
++within a declaration.  Where an
++attribute specifier is applied to a parameter declared as a function or
++an array, it should apply to the function or array rather than the
++pointer to which the parameter is implicitly converted, but this is not
++yet correctly implemented.
+ 
+-int
+-main (void)
+-@{
+-  int a = 0x12345678;
+-  short_a *b = (short_a *) &a;
++Any list of specifiers and qualifiers at the start of a declaration may
++contain attribute specifiers, whether or not such a list may in that
++context contain storage class specifiers.  (Some attributes, however,
++are essentially in the nature of storage class specifiers, and only make
++sense where storage class specifiers may be used; for example,
++@code{section}.)  There is one necessary limitation to this syntax: the
++first old-style parameter declaration in a function definition cannot
++begin with an attribute specifier, because such an attribute applies to
++the function instead by syntax described below (which, however, is not
++yet implemented in this case).  In some other cases, attribute
++specifiers are permitted by this grammar but not yet supported by the
++compiler.  All attribute specifiers in this place relate to the
++declaration as a whole.  In the obsolescent usage where a type of
++@code{int} is implied by the absence of type specifiers, such a list of
++specifiers and qualifiers may be an attribute specifier list with no
++other specifiers or qualifiers.
+ 
+-  b[1] = 0;
++At present, the first parameter in a function prototype must have some
++type specifier that is not an attribute specifier; this resolves an
++ambiguity in the interpretation of @code{void f(int
++(__attribute__((foo)) x))}, but is subject to change.  At present, if
++the parentheses of a function declarator contain only attributes then
++those attributes are ignored, rather than yielding an error or warning
++or implying a single parameter of type int, but this is subject to
++change.
+ 
+-  if (a == 0x12345678)
+-    abort();
++An attribute specifier list may appear immediately before a declarator
++(other than the first) in a comma-separated list of declarators in a
++declaration of more than one identifier using a single list of
++specifiers and qualifiers.  Such attribute specifiers apply
++only to the identifier before whose declarator they appear.  For
++example, in
+ 
+-  exit(0);
+-@}
++@smallexample
++__attribute__((noreturn)) void d0 (void),
++    __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
++     d2 (void);
+ @end smallexample
+ 
+ @noindent
+-If you replaced @code{short_a} with @code{short} in the variable
+-declaration, the above program would abort when compiled with
+-@option{-fstrict-aliasing}, which is on by default at @option{-O2} or
+-above.
++the @code{noreturn} attribute applies to all the functions
++declared; the @code{format} attribute only applies to @code{d1}.
+ 
+-@item visibility
+-@cindex @code{visibility} type attribute
+-In C++, attribute visibility (@pxref{Function Attributes}) can also be
+-applied to class, struct, union and enum types.  Unlike other type
+-attributes, the attribute must appear between the initial keyword and
+-the name of the type; it cannot appear after the body of the type.
++An attribute specifier list may appear immediately before the comma,
++@code{=} or semicolon terminating the declaration of an identifier other
++than a function definition.  Such attribute specifiers apply
++to the declared object or function.  Where an
++assembler name for an object or function is specified (@pxref{Asm
++Labels}), the attribute must follow the @code{asm}
++specification.
+ 
+-Note that the type visibility is applied to vague linkage entities
+-associated with the class (vtable, typeinfo node, etc.).  In
+-particular, if a class is thrown as an exception in one shared object
+-and caught in another, the class must have default visibility.
+-Otherwise the two shared objects are unable to use the same
+-typeinfo node and exception handling will break.
++An attribute specifier list may, in future, be permitted to appear after
++the declarator in a function definition (before any old-style parameter
++declarations or the function body).
++
++Attribute specifiers may be mixed with type qualifiers appearing inside
++the @code{[]} of a parameter array declarator, in the C99 construct by
++which such qualifiers are applied to the pointer to which the array is
++implicitly converted.  Such attribute specifiers apply to the pointer,
++not to the array, but at present this is not implemented and they are
++ignored.
++
++An attribute specifier list may appear at the start of a nested
++declarator.  At present, there are some limitations in this usage: the
++attributes correctly apply to the declarator, but for most individual
++attributes the semantics this implies are not implemented.
++When attribute specifiers follow the @code{*} of a pointer
++declarator, they may be mixed with any type qualifiers present.
++The following describes the formal semantics of this syntax.  It makes the
++most sense if you are familiar with the formal specification of
++declarators in the ISO C standard.
+ 
+-@item designated_init
+-@cindex @code{designated_init} type attribute
+-This attribute may only be applied to structure types.  It indicates
+-that any initialization of an object of this type must use designated
+-initializers rather than positional initializers.  The intent of this
+-attribute is to allow the programmer to indicate that a structure's
+-layout may change, and that therefore relying on positional
+-initialization will result in future breakage.
++Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration @code{T
++D1}, where @code{T} contains declaration specifiers that specify a type
++@var{Type} (such as @code{int}) and @code{D1} is a declarator that
++contains an identifier @var{ident}.  The type specified for @var{ident}
++for derived declarators whose type does not include an attribute
++specifier is as in the ISO C standard.
+ 
+-GCC emits warnings based on this attribute by default; use
+-@option{-Wno-designated-init} to suppress them.
++If @code{D1} has the form @code{( @var{attribute-specifier-list} D )},
++and the declaration @code{T D} specifies the type
++``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
++@code{T D1} specifies the type ``@var{derived-declarator-type-list}
++@var{attribute-specifier-list} @var{Type}'' for @var{ident}.
+ 
+-@item bnd_variable_size
+-@cindex @code{bnd_variable_size} type attribute
+-@cindex Pointer Bounds Checker attributes
+-When applied to a structure field, this attribute tells Pointer
+-Bounds Checker that the size of this field should not be computed
+-using static type information.  It may be used to mark variably-sized
+-static array fields placed at the end of a structure.
++If @code{D1} has the form @code{*
++@var{type-qualifier-and-attribute-specifier-list} D}, and the
++declaration @code{T D} specifies the type
++``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
++@code{T D1} specifies the type ``@var{derived-declarator-type-list}
++@var{type-qualifier-and-attribute-specifier-list} pointer to @var{Type}'' for
++@var{ident}.
++
++For example,
+ 
+ @smallexample
+-struct S
+-@{
+-  int size;
+-  char data[1];
+-@}
+-S *p = (S *)malloc (sizeof(S) + 100);
+-p->data[10] = 0; //Bounds violation
++void (__attribute__((noreturn)) ****f) (void);
+ @end smallexample
+ 
+ @noindent
+-By using an attribute for the field we may avoid unwanted bound
+-violation checks:
++specifies the type ``pointer to pointer to pointer to pointer to
++non-returning function returning @code{void}''.  As another example,
+ 
+ @smallexample
+-struct S
+-@{
+-  int size;
+-  char data[1] __attribute__((bnd_variable_size));
+-@}
+-S *p = (S *)malloc (sizeof(S) + 100);
+-p->data[10] = 0; //OK
++char *__attribute__((aligned(8))) *f;
+ @end smallexample
+ 
+-@end table
++@noindent
++specifies the type ``pointer to 8-byte-aligned pointer to @code{char}''.
++Note again that this does not work with most attributes; for example,
++the usage of @samp{aligned} and @samp{noreturn} attributes given above
++is not yet supported.
+ 
+-To specify multiple attributes, separate them by commas within the
+-double parentheses: for example, @samp{__attribute__ ((aligned (16),
+-packed))}.
++For compatibility with existing code written for compiler versions that
++did not implement attributes on nested declarators, some laxity is
++allowed in the placing of attributes.  If an attribute that only applies
++to types is applied to a declaration, it is treated as applying to
++the type of that declaration.  If an attribute that only applies to
++declarations is applied to the type of a declaration, it is treated
++as applying to that declaration; and, for compatibility with code
++placing the attributes immediately before the identifier declared, such
++an attribute applied to a function return type is treated as
++applying to the function type, and such an attribute applied to an array
++element type is treated as applying to the array type.  If an
++attribute that only applies to function types is applied to a
++pointer-to-function type, it is treated as applying to the pointer
++target type; if such an attribute is applied to a function return type
++that is not a pointer-to-function type, it is treated as applying
++to the function type.
+ 
+-@subsection ARM Type Attributes
++@node Function Prototypes
++@section Prototypes and Old-Style Function Definitions
++@cindex function prototype declarations
++@cindex old-style function definitions
++@cindex promotion of formal parameters
+ 
+-@cindex @code{notshared} type attribute, ARM
+-On those ARM targets that support @code{dllimport} (such as Symbian
+-OS), you can use the @code{notshared} attribute to indicate that the
+-virtual table and other similar data for a class should not be
+-exported from a DLL@.  For example:
++GNU C extends ISO C to allow a function prototype to override a later
++old-style non-prototype definition.  Consider the following example:
+ 
+ @smallexample
+-class __declspec(notshared) C @{
+-public:
+-  __declspec(dllimport) C();
+-  virtual void f();
+-@}
+-
+-__declspec(dllexport)
+-C::C() @{@}
+-@end smallexample
+-
+-@noindent
+-In this code, @code{C::C} is exported from the current DLL, but the
+-virtual table for @code{C} is not exported.  (You can use
+-@code{__attribute__} instead of @code{__declspec} if you prefer, but
+-most Symbian OS code uses @code{__declspec}.)
+-
+-@anchor{MeP Type Attributes}
+-@subsection MeP Type Attributes
+-
+-@cindex @code{based} type attribute, MeP
+-@cindex @code{tiny} type attribute, MeP
+-@cindex @code{near} type attribute, MeP
+-@cindex @code{far} type attribute, MeP
+-Many of the MeP variable attributes may be applied to types as well.
+-Specifically, the @code{based}, @code{tiny}, @code{near}, and
+-@code{far} attributes may be applied to either.  The @code{io} and
+-@code{cb} attributes may not be applied to types.
++/* @r{Use prototypes unless the compiler is old-fashioned.}  */
++#ifdef __STDC__
++#define P(x) x
++#else
++#define P(x) ()
++#endif
+ 
+-@anchor{PowerPC Type Attributes}
+-@subsection PowerPC Type Attributes
++/* @r{Prototype function declaration.}  */
++int isroot P((uid_t));
+ 
+-Three attributes currently are defined for PowerPC configurations:
+-@code{altivec}, @code{ms_struct} and @code{gcc_struct}.
++/* @r{Old-style function definition.}  */
++int
++isroot (x)   /* @r{??? lossage here ???} */
++     uid_t x;
++@{
++  return x == 0;
++@}
++@end smallexample
+ 
+-@cindex @code{ms_struct} type attribute, PowerPC
+-@cindex @code{gcc_struct} type attribute, PowerPC
+-For full documentation of the @code{ms_struct} and @code{gcc_struct}
+-attributes please see the documentation in @ref{x86 Type Attributes}.
++Suppose the type @code{uid_t} happens to be @code{short}.  ISO C does
++not allow this example, because subword arguments in old-style
++non-prototype definitions are promoted.  Therefore in this example the
++function definition's argument is really an @code{int}, which does not
++match the prototype argument type of @code{short}.
+ 
+-@cindex @code{altivec} type attribute, PowerPC
+-The @code{altivec} attribute allows one to declare AltiVec vector data
+-types supported by the AltiVec Programming Interface Manual.  The
+-attribute requires an argument to specify one of three vector types:
+-@code{vector__}, @code{pixel__} (always followed by unsigned short),
+-and @code{bool__} (always followed by unsigned).
++This restriction of ISO C makes it hard to write code that is portable
++to traditional C compilers, because the programmer does not know
++whether the @code{uid_t} type is @code{short}, @code{int}, or
++@code{long}.  Therefore, in cases like these GNU C allows a prototype
++to override a later old-style definition.  More precisely, in GNU C, a
++function prototype argument type overrides the argument type specified
++by a later old-style definition if the former type is the same as the
++latter type before promotion.  Thus in GNU C the above example is
++equivalent to the following:
+ 
+ @smallexample
+-__attribute__((altivec(vector__)))
+-__attribute__((altivec(pixel__))) unsigned short
+-__attribute__((altivec(bool__))) unsigned
+-@end smallexample
+-
+-These attributes mainly are intended to support the @code{__vector},
+-@code{__pixel}, and @code{__bool} AltiVec keywords.
++int isroot (uid_t);
+ 
+-@anchor{SPU Type Attributes}
+-@subsection SPU Type Attributes
++int
++isroot (uid_t x)
++@{
++  return x == 0;
++@}
++@end smallexample
+ 
+-@cindex @code{spu_vector} type attribute, SPU
+-The SPU supports the @code{spu_vector} attribute for types.  This attribute
+-allows one to declare vector data types supported by the Sony/Toshiba/IBM SPU
+-Language Extensions Specification.  It is intended to support the
+-@code{__vector} keyword.
++@noindent
++GNU C++ does not support old-style function definitions, so this
++extension is irrelevant.
+ 
+-@anchor{x86 Type Attributes}
+-@subsection x86 Type Attributes
++@node C++ Comments
++@section C++ Style Comments
++@cindex @code{//}
++@cindex C++ comments
++@cindex comments, C++ style
+ 
+-Two attributes are currently defined for x86 configurations:
+-@code{ms_struct} and @code{gcc_struct}.
++In GNU C, you may use C++ style comments, which start with @samp{//} and
++continue until the end of the line.  Many other C implementations allow
++such comments, and they are included in the 1999 C standard.  However,
++C++ style comments are not recognized if you specify an @option{-std}
++option specifying a version of ISO C before C99, or @option{-ansi}
++(equivalent to @option{-std=c90}).
+ 
+-@table @code
++@node Dollar Signs
++@section Dollar Signs in Identifier Names
++@cindex $
++@cindex dollar signs in identifier names
++@cindex identifier names, dollar signs in
+ 
+-@item ms_struct
+-@itemx gcc_struct
+-@cindex @code{ms_struct} type attribute, x86
+-@cindex @code{gcc_struct} type attribute, x86
++In GNU C, you may normally use dollar signs in identifier names.
++This is because many traditional C implementations allow such identifiers.
++However, dollar signs in identifiers are not supported on a few target
++machines, typically because the target assembler does not allow them.
+ 
+-If @code{packed} is used on a structure, or if bit-fields are used
+-it may be that the Microsoft ABI packs them differently
+-than GCC normally packs them.  Particularly when moving packed
+-data between functions compiled with GCC and the native Microsoft compiler
+-(either via function call or as data in a file), it may be necessary to access
+-either format.
++@node Character Escapes
++@section The Character @key{ESC} in Constants
+ 
+-Currently @option{-m[no-]ms-bitfields} is provided for the Microsoft Windows x86
+-compilers to match the native Microsoft compiler.
+-@end table
++You can use the sequence @samp{\e} in a string or character constant to
++stand for the ASCII character @key{ESC}.
+ 
+ @node Alignment
+ @section Inquiring on Alignment of Types or Variables
+@@ -8213,15 +8871,19 @@ identifier, or a sequence of member accesses and array references.
+ The following built-in functions
+ are intended to be compatible with those described
+ in the @cite{Intel Itanium Processor-specific Application Binary Interface},
+-section 7.4.  As such, they depart from the normal GCC practice of using
+-the @samp{__builtin_} prefix, and further that they are overloaded such that
+-they work on multiple types.
++section 7.4.  As such, they depart from normal GCC practice by not using
++the @samp{__builtin_} prefix and also by being overloaded so that they
++work on multiple types.
+ 
+ The definition given in the Intel documentation allows only for the use of
+-the types @code{int}, @code{long}, @code{long long} as well as their unsigned
++the types @code{int}, @code{long}, @code{long long} or their unsigned
+ counterparts.  GCC allows any integral scalar or pointer type that is
+ 1, 2, 4 or 8 bytes in length.
+ 
++These functions are implemented in terms of the @samp{__atomic}
++builtins (@pxref{__atomic Builtins}).  They should not be used for new
++code which should use the @samp{__atomic} builtins instead.
++
+ Not all operations are supported by all target processors.  If a particular
+ operation cannot be implemented on the target processor, a warning is
+ generated and a call to an external function is generated.  The external
+@@ -8243,11 +8905,10 @@ after the operation.
+ All of the routines are described in the Intel documentation to take
+ ``an optional list of variables protected by the memory barrier''.  It's
+ not clear what is meant by that; it could mean that @emph{only} the
+-following variables are protected, or it could mean that these variables
+-should in addition be protected.  At present GCC ignores this list and
+-protects all variables that are globally accessible.  If in the future
+-we make some use of this list, an empty list will continue to mean all
+-globally accessible variables.
++listed variables are protected, or it could mean a list of additional
++variables to be protected.  The list is ignored by GCC which treats it as
++empty.  GCC interprets an empty list as meaning that all globally
++accessible variables should be protected.
+ 
+ @table @code
+ @item @var{type} __sync_fetch_and_add (@var{type} *ptr, @var{type} value, ...)
+@@ -8350,45 +9011,47 @@ are not prevented from being speculated to before the barrier.
+ @node __atomic Builtins
+ @section Built-in Functions for Memory Model Aware Atomic Operations
+ 
+-The following built-in functions approximately match the requirements for
+-C++11 memory model. Many are similar to the @samp{__sync} prefixed built-in
+-functions, but all also have a memory model parameter.  These are all
+-identified by being prefixed with @samp{__atomic}, and most are overloaded
+-such that they work with multiple types.
++The following built-in functions approximately match the requirements
++for C++11 concurrency and memory models.  They are all
++identified by being prefixed with @samp{__atomic} and most are
++overloaded so that they work with multiple types.
+ 
+-GCC allows any integral scalar or pointer type that is 1, 2, 4, or 8
+-bytes in length. 16-byte integral types are also allowed if
+-@samp{__int128} (@pxref{__int128}) is supported by the architecture.
++These functions are intended to replace the legacy @samp{__sync}
++builtins.  The main difference is that the memory model to be used is a
++parameter to the functions.  New code should always use the
++@samp{__atomic} builtins rather than the @samp{__sync} builtins.
+ 
+-Target architectures are encouraged to provide their own patterns for
+-each of these built-in functions.  If no target is provided, the original 
+-non-memory model set of @samp{__sync} atomic built-in functions are
+-utilized, along with any required synchronization fences surrounding it in
+-order to achieve the proper behavior.  Execution in this case is subject
+-to the same restrictions as those built-in functions.
++Note that the @samp{__atomic} builtins assume that programs will
++conform to the C++11 model for concurrency.  In particular, they assume
++that programs are free of data races.  See the C++11 standard for
++detailed definitions.
+ 
+-If there is no pattern or mechanism to provide a lock free instruction
+-sequence, a call is made to an external routine with the same parameters
+-to be resolved at run time.
++The @samp{__atomic} builtins can be used with any integral scalar or
++pointer type that is 1, 2, 4, or 8 bytes in length.  16-byte integral
++types are also allowed if @samp{__int128} (@pxref{__int128}) is
++supported by the architecture.
+ 
+ The four non-arithmetic functions (load, store, exchange, and 
+ compare_exchange) all have a generic version as well.  This generic
+ version works on any data type.  If the data type size maps to one
+ of the integral sizes that may have lock free support, the generic
+-version utilizes the lock free built-in function.  Otherwise an
++version uses the lock free built-in function.  Otherwise an
+ external call is left to be resolved at run time.  This external call is
+ the same format with the addition of a @samp{size_t} parameter inserted
+ as the first parameter indicating the size of the object being pointed to.
+ All objects must be the same size.
+ 
+ There are 6 different memory models that can be specified.  These map
+-to the same names in the C++11 standard.  Refer there or to the
+-@uref{http://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync,GCC wiki on
+-atomic synchronization} for more detailed definitions.  These memory
+-models integrate both barriers to code motion as well as synchronization
+-requirements with other threads. These are listed in approximately
+-ascending order of strength. It is also possible to use target specific
+-flags for memory model flags, like Hardware Lock Elision.
++to the C++11 memory models with the same names, see the C++11 standard
++or the @uref{http://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync,GCC wiki
++on atomic synchronization} for detailed definitions.  Individual
++targets may also support additional memory models for use on specific
++architectures.  Refer to the target documentation for details of
++these.
++
++The memory models integrate both barriers to code motion as well as
++synchronization requirements with other threads.  They are listed here
++in approximately ascending order of strength.
+ 
+ @table  @code
+ @item __ATOMIC_RELAXED
+@@ -8403,13 +9066,32 @@ semantic stores from another thread.
+ Barrier to sinking of code and synchronizes with acquire (or stronger)
+ semantic loads from another thread.
+ @item __ATOMIC_ACQ_REL
+-Full barrier in both directions and synchronizes with acquire loads and
++Barrier in both directions and synchronizes with acquire loads and
+ release stores in another thread.
+ @item __ATOMIC_SEQ_CST
+-Full barrier in both directions and synchronizes with acquire loads and
++Barrier in both directions and synchronizes with acquire loads and
+ release stores in all threads.
+ @end table
+ 
++Note that the scope of a C++11 memory model depends on whether or not
++the function being called is a @emph{fence} (such as
++@samp{__atomic_thread_fence}).  In a fence, all memory accesses are
++subject to the restrictions of the memory model.  When the function is
++an operation on a location, the restrictions apply only to those
++memory accesses that could affect or that could depend on the
++location.
++
++Target architectures are encouraged to provide their own patterns for
++each of these built-in functions.  If no target is provided, the original
++non-memory model set of @samp{__sync} atomic built-in functions are
++used, along with any required synchronization fences surrounding it in
++order to achieve the proper behavior.  Execution in this case is subject
++to the same restrictions as those built-in functions.
++
++If there is no pattern or mechanism to provide a lock free instruction
++sequence, a call is made to an external routine with the same parameters
++to be resolved at run time.
++
+ When implementing patterns for these built-in functions, the memory model
+ parameter can be ignored as long as the pattern implements the most
+ restrictive @code{__ATOMIC_SEQ_CST} model.  Any of the other memory models
+@@ -8480,19 +9162,20 @@ of @code{*@var{ptr}} is copied into @code{*@var{ret}}.
+ @deftypefn {Built-in Function} bool __atomic_compare_exchange_n (@var{type} *ptr, @var{type} *expected, @var{type} desired, bool weak, int success_memmodel, int failure_memmodel)
+ This built-in function implements an atomic compare and exchange operation.
+ This compares the contents of @code{*@var{ptr}} with the contents of
+-@code{*@var{expected}} and if equal, writes @var{desired} into
+-@code{*@var{ptr}}.  If they are not equal, the current contents of
++@code{*@var{expected}}. If equal, the operation is a @emph{read-modify-write}
++which writes @var{desired} into @code{*@var{ptr}}.  If they are not
++equal, the operation is a @emph{read} and the current contents of
+ @code{*@var{ptr}} is written into @code{*@var{expected}}.  @var{weak} is true
+ for weak compare_exchange, and false for the strong variation.  Many targets 
+ only offer the strong variation and ignore the parameter.  When in doubt, use
+ the strong variation.
+ 
+ True is returned if @var{desired} is written into
+-@code{*@var{ptr}} and the execution is considered to conform to the
++@code{*@var{ptr}} and the operation is considered to conform to the
+ memory model specified by @var{success_memmodel}.  There are no
+ restrictions on what memory model can be used here.
+ 
+-False is returned otherwise, and the execution is considered to conform
++False is returned otherwise, and the operation is considered to conform
+ to @var{failure_memmodel}. This memory model cannot be
+ @code{__ATOMIC_RELEASE} nor @code{__ATOMIC_ACQ_REL}.  It also cannot be a
+ stronger model than that specified by @var{success_memmodel}.
+@@ -17455,6 +18138,7 @@ we do not recommend the use of pragmas; @xref{Function Attributes},
+ for further explanation.
+ 
+ @menu
++* AArch64 Pragmas::
+ * ARM Pragmas::
+ * M32C Pragmas::
+ * MeP Pragmas::
+@@ -17471,6 +18155,19 @@ for further explanation.
+ * Loop-Specific Pragmas::
+ @end menu
+ 
++@node AArch64 Pragmas
++@subsection AArch64 Pragmas
++
++The pragmas defined by the AArch64 target correspond to the AArch64
++target function attributes.  They can be specified as below:
++@smallexample
++#pragma GCC target("string")
++@end smallexample
++
++where @code{@var{string}} can be any string accepted as an AArch64 target
++attribute.  @xref{AArch64 Function Attributes}, for more details
++on the permissible values of @code{string}.
++
+ @node ARM Pragmas
+ @subsection ARM Pragmas
+ 
+--- a/src/gcc/doc/install.texi
++++ b/src/gcc/doc/install.texi
+@@ -1544,15 +1544,17 @@ their runtime libraries should be built.  For a list of valid values for
+ @var{langN} you can issue the following command in the
+ @file{gcc} directory of your GCC source tree:@*
+ @smallexample
+-grep language= */config-lang.in
++grep ^language= */config-lang.in
+ @end smallexample
+ Currently, you can use any of the following:
+ @code{all}, @code{ada}, @code{c}, @code{c++}, @code{fortran},
+-@code{go}, @code{java}, @code{objc}, @code{obj-c++}.
++@code{go}, @code{java}, @code{jit}, @code{lto}, @code{objc}, @code{obj-c++}.
+ Building the Ada compiler has special requirements, see below.
+ If you do not pass this flag, or specify the option @code{all}, then all
+ default languages available in the @file{gcc} sub-tree will be configured.
+-Ada, Go and Objective-C++ are not default languages; the rest are.
++Ada, Go, Jit, and Objective-C++ are not default languages.  LTO is not a
++default language, but is built by default because @option{--enable-lto} is
++enabled by default.  The other languages are default languages.
+ 
+ @item --enable-stage1-languages=@var{lang1},@var{lang2},@dots{}
+ Specify that a particular subset of compilers and their runtime
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -510,6 +510,7 @@ Objective-C and Objective-C++ Dialects}.
+ -mstrict-align @gol
+ -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer @gol
+ -mtls-dialect=desc  -mtls-dialect=traditional @gol
++-mtls-size=@var{size} @gol
+ -mfix-cortex-a53-835769  -mno-fix-cortex-a53-835769 @gol
+ -mfix-cortex-a53-843419  -mno-fix-cortex-a53-843419 @gol
+ -march=@var{name}  -mcpu=@var{name}  -mtune=@var{name}}
+@@ -667,7 +668,7 @@ Objective-C and Objective-C++ Dialects}.
+ -mcpu=@var{cpu}}
+ 
+ @emph{GNU/Linux Options}
+-@gccoptlist{-mglibc -muclibc -mbionic -mandroid @gol
++@gccoptlist{-mglibc -muclibc -mmusl -mbionic -mandroid @gol
+ -tno-android-cc -tno-android-ld}
+ 
+ @emph{H8/300 Options}
+@@ -1123,7 +1124,7 @@ See S/390 and zSeries Options.
+ -finstrument-functions-exclude-function-list=@var{sym},@var{sym},@dots{} @gol
+ -finstrument-functions-exclude-file-list=@var{file},@var{file},@dots{} @gol
+ -fno-common  -fno-ident @gol
+--fpcc-struct-return  -fpic  -fPIC -fpie -fPIE @gol
++-fpcc-struct-return  -fpic  -fPIC -fpie -fPIE -fno-plt @gol
+ -fno-jump-tables @gol
+ -frecord-gcc-switches @gol
+ -freg-struct-return  -fshort-enums @gol
+@@ -7574,10 +7575,10 @@ that do not interfere with debugging. It should be the optimization
+ level of choice for the standard edit-compile-debug cycle, offering
+ a reasonable level of optimization while maintaining fast compilation
+ and a good debugging experience.
++@end table
+ 
+ If you use multiple @option{-O} options, with or without level numbers,
+ the last such option is the one that is effective.
+-@end table
+ 
+ Options of the form @option{-f@var{flag}} specify machine-independent
+ flags.  Most flags have both positive and negative forms; the negative
+@@ -12274,7 +12275,9 @@ Generate big-endian code.  This is the default when GCC is configured for an
+ 
+ @item -mgeneral-regs-only
+ @opindex mgeneral-regs-only
+-Generate code which uses only the general registers.
++Generate code which uses only the general-purpose registers.  This will prevent
++the compiler from using floating-point and Advanced SIMD registers but will not
++impose any restrictions on the assembler.
+ 
+ @item -mlittle-endian
+ @opindex mlittle-endian
+@@ -12321,6 +12324,11 @@ of TLS variables.  This is the default.
+ Use traditional TLS as the thread-local storage mechanism for dynamic accesses
+ of TLS variables.
+ 
++@item -mtls-size=@var{size}
++@opindex mtls-size
++Specify bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
++This option depends on binutils higher than 2.25.
++
+ @item -mfix-cortex-a53-835769
+ @itemx -mno-fix-cortex-a53-835769
+ @opindex mfix-cortex-a53-835769
+@@ -12339,34 +12347,51 @@ corresponding flag to the linker.
+ 
+ @item -march=@var{name}
+ @opindex march
+-Specify the name of the target architecture, optionally suffixed by one or
++Specify the name of the target architecture and, optionally, one or
+ more feature modifiers.  This option has the form
+-@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the
+-only permissible value for @var{arch} is @samp{armv8-a}.  The permissible
+-values for @var{feature} are documented in the sub-section below.
++@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}.
+ 
+-Where conflicting feature modifiers are specified, the right-most feature is
+-used.
++The permissible values for @var{arch} are @samp{armv8-a},
++@samp{armv8.1-a} or @var{native}.
+ 
+-GCC uses this name to determine what kind of instructions it can emit when
+-generating assembly code.
++The value @samp{armv8.1-a} implies @samp{armv8-a} and enables compiler
++support for the ARMv8.1 architecture extension.  In particular, it
++enables the @samp{+crc} and @samp{+lse} features.
+ 
+-Where @option{-march} is specified without either of @option{-mtune}
+-or @option{-mcpu} also being specified, the code is tuned to perform
+-well across a range of target processors implementing the target
+-architecture.
++The value @samp{native} is available on native AArch64 GNU/Linux and
++causes the compiler to pick the architecture of the host system.  This
++option has no effect if the compiler is unable to recognize the
++architecture of the host system,
++
++The permissible values for @var{feature} are listed in the sub-section
++on @ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu}
++Feature Modifiers}.  Where conflicting feature modifiers are
++specified, the right-most feature is used.
++
++GCC uses @var{name} to determine what kind of instructions it can emit
++when generating assembly code.  If @option{-march} is specified
++without either of @option{-mtune} or @option{-mcpu} also being
++specified, the code is tuned to perform well across a range of target
++processors implementing the target architecture.
+ 
+ @item -mtune=@var{name}
+ @opindex mtune
+ Specify the name of the target processor for which GCC should tune the
+ performance of the code.  Permissible values for this option are:
+-@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{cortex-a72},
+-@samp{exynos-m1}, @samp{thunderx}, @samp{xgene1}.
++@samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
++@samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
++@samp{xgene1}.
+ 
+ Additionally, this option can specify that GCC should tune the performance
+ of the code for a big.LITTLE system.  Permissible values for this
+ option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
+ 
++Additionally on native AArch64 GNU/Linux systems the value
++@samp{native} is available.  This option causes the compiler to pick
++the architecture of and tune the performance of the code for the
++processor of the host system.  This option has no effect if the
++compiler is unable to recognize the architecture of the host system.
++
+ Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=}
+ are specified, the code is tuned to perform well across a range
+ of target processors.
+@@ -12375,45 +12400,78 @@ This option cannot be suffixed by feature modifiers.
+ 
+ @item -mcpu=@var{name}
+ @opindex mcpu
+-Specify the name of the target processor, optionally suffixed by one or more
+-feature modifiers.  This option has the form
+-@option{-mcpu=@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the
+-permissible values for @var{cpu} are the same as those available for
+-@option{-mtune}.
+-
+-The permissible values for @var{feature} are documented in the sub-section
+-below.
+-
+-Where conflicting feature modifiers are specified, the right-most feature is
+-used.
+-
+-GCC uses this name to determine what kind of instructions it can emit when
++Specify the name of the target processor, optionally suffixed by one
++or more feature modifiers.  This option has the form
++@option{-mcpu=@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where
++the permissible values for @var{cpu} are the same as those available
++for @option{-mtune}.  The permissible values for @var{feature} are
++documented in the sub-section on
++@ref{aarch64-feature-modifiers,,@option{-march} and @option{-mcpu}
++Feature Modifiers}.  Where conflicting feature modifiers are
++specified, the right-most feature is used.
++
++Additionally on native AArch64 GNU/Linux systems the value
++@samp{native} is available.  This option causes the compiler to tune
++the performance of the code for the processor of the host system.
++This option has no effect if the compiler is unable to recognize the
++architecture of the host system.
++
++GCC uses @var{name} to determine what kind of instructions it can emit when
+ generating assembly code (as if by @option{-march}) and to determine
+ the target processor for which to tune for performance (as if
+ by @option{-mtune}).  Where this option is used in conjunction
+ with @option{-march} or @option{-mtune}, those options take precedence
+ over the appropriate part of this option.
++
++@item -moverride=@var{string}
++@opindex moverride
++Override tuning decisions made by the back-end in response to a
++@option{-mtune=} switch.  The syntax, semantics, and accepted values
++for @var{string} in this option are not guaranteed to be consistent
++across releases.
++
++This option is only intended to be useful when developing GCC.
++
++@item -mpc-relative-literal-loads
++@opindex mpcrelativeliteralloads
++Enable PC relative literal loads. If this option is used, literal
++pools are assumed to have a range of up to 1MiB and an appropriate
++instruction sequence is used. This option has no impact when used
++with @option{-mcmodel=tiny}.
++
+ @end table
+ 
+ @subsubsection @option{-march} and @option{-mcpu} Feature Modifiers
++@anchor{aarch64-feature-modifiers}
+ @cindex @option{-march} feature modifiers
+ @cindex @option{-mcpu} feature modifiers
+-Feature modifiers used with @option{-march} and @option{-mcpu} can be one
+-the following:
++Feature modifiers used with @option{-march} and @option{-mcpu} can be any of
++the following and their inverses @option{no@var{feature}}:
+ 
+ @table @samp
+ @item crc
+-Enable CRC extension.
++Enable CRC extension.  This is on by default for
++@option{-march=armv8.1-a}.
+ @item crypto
+-Enable Crypto extension.  This implies Advanced SIMD is enabled.
++Enable Crypto extension.  This also enables Advanced SIMD and floating-point
++instructions.
+ @item fp
+-Enable floating-point instructions.
++Enable floating-point instructions.  This is on by default for all possible
++values for options @option{-march} and @option{-mcpu}.
+ @item simd
+-Enable Advanced SIMD instructions.  This implies floating-point instructions
+-are enabled.  This is the default for all current possible values for options
+-@option{-march} and @option{-mcpu=}.
++Enable Advanced SIMD instructions.  This also enables floating-point
++instructions.  This is on by default for all possible values for options
++@option{-march} and @option{-mcpu}.
++@item lse
++Enable Large System Extension instructions.  This is on by default for
++@option{-march=armv8.1-a}.
++
+ @end table
+ 
++That is, @option{crypto} implies @option{simd} implies @option{fp}.
++Conversely, @option{nofp} (or equivalently, @option{-mgeneral-regs-only})
++implies @option{nosimd} implies @option{nocrypto}.
++
+ @node Adapteva Epiphany Options
+ @subsection Adapteva Epiphany Options
+ 
+@@ -13184,10 +13242,10 @@ of the @option{-mcpu=} option.  Permissible names are: @samp{armv2},
+ @samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
+ @samp{armv5}, @samp{armv5t}, @samp{armv5e}, @samp{armv5te},
+ @samp{armv6}, @samp{armv6j},
+-@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m},
++@samp{armv6t2}, @samp{armv6z}, @samp{armv6kz}, @samp{armv6-m},
+ @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m},
+-@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc},
+-@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
++@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, @samp{armv8.1-a},
++@samp{armv8.1-a+crc}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
+ 
+ @option{-march=armv7ve} is the armv7-a architecture with virtualization
+ extensions.
+@@ -13223,11 +13281,12 @@ Permissible names are: @samp{arm2}, @samp{arm250},
+ @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
+ @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
+ @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
+-@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
+-@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53},
+-@samp{cortex-a57}, @samp{cortex-a72},
+-@samp{cortex-r4},
+-@samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m7},
++@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8},
++@samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17},
++@samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
++@samp{cortex-a72}, @samp{cortex-r4},
++@samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8},
++@samp{cortex-m7},
+ @samp{cortex-m4},
+ @samp{cortex-m3},
+ @samp{cortex-m1},
+@@ -13237,6 +13296,7 @@ Permissible names are: @samp{arm2}, @samp{arm250},
+ @samp{cortex-m0.small-multiply},
+ @samp{cortex-m0plus.small-multiply},
+ @samp{exynos-m1},
++@samp{qdf24xx},
+ @samp{marvell-pj4},
+ @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312},
+ @samp{fa526}, @samp{fa626},
+@@ -13245,8 +13305,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
+ 
+ Additionally, this option can specify that GCC should tune the performance
+ of the code for a big.LITTLE system.  Permissible names are:
+-@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53},
+-@samp{cortex-a72.cortex-a53}.
++@samp{cortex-a15.cortex-a7}, @samp{cortex-a17.cortex-a7},
++@samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
+ 
+ @option{-mtune=generic-@var{arch}} specifies that GCC should tune the
+ performance for a blend of processors within architecture @var{arch}.
+@@ -13289,7 +13349,7 @@ available on the target.  Permissible names are: @samp{vfp}, @samp{vfpv3},
+ @samp{vfpv3xd-fp16}, @samp{neon}, @samp{neon-fp16}, @samp{vfpv4},
+ @samp{vfpv4-d16}, @samp{fpv4-sp-d16}, @samp{neon-vfpv4},
+ @samp{fpv5-d16}, @samp{fpv5-sp-d16},
+-@samp{fp-armv8}, @samp{neon-fp-armv8}, and @samp{crypto-neon-fp-armv8}.
++@samp{fp-armv8}, @samp{neon-fp-armv8} and @samp{crypto-neon-fp-armv8}.
+ 
+ If @option{-msoft-float} is specified this specifies the format of
+ floating-point values.
+@@ -13412,6 +13472,10 @@ that executes in ARM state, but the default can be changed by
+ configuring GCC with the @option{--with-mode=}@var{state}
+ configure option.
+ 
++You can also override the ARM and Thumb mode for each function
++by using the @code{target("thumb")} and @code{target("arm")} function attributes
++(@pxref{ARM Function Attributes}) or pragmas (@pxref{Function Specific Option Pragmas}).
++
+ @item -mtpcs-frame
+ @opindex mtpcs-frame
+ Generate a stack frame that is compliant with the Thumb Procedure Call
+@@ -13509,10 +13573,9 @@ off by default.
+ @item -masm-syntax-unified
+ @opindex masm-syntax-unified
+ Assume inline assembler is using unified asm syntax.  The default is
+-currently off which implies divided syntax.  Currently this option is
+-available only for Thumb1 and has no effect on ARM state and Thumb2.
+-However, this may change in future releases of GCC.  Divided syntax
+-should be considered deprecated.
++currently off which implies divided syntax.  This option has no impact
++on Thumb2. However, this may change in future releases of GCC.
++Divided syntax should be considered deprecated.
+ 
+ @item -mrestrict-it
+ @opindex mrestrict-it
+@@ -15340,13 +15403,19 @@ These @samp{-m} options are defined for GNU/Linux targets:
+ @item -mglibc
+ @opindex mglibc
+ Use the GNU C library.  This is the default except
+-on @samp{*-*-linux-*uclibc*} and @samp{*-*-linux-*android*} targets.
++on @samp{*-*-linux-*uclibc*}, @samp{*-*-linux-*musl*} and
++@samp{*-*-linux-*android*} targets.
+ 
+ @item -muclibc
+ @opindex muclibc
+ Use uClibc C library.  This is the default on
+ @samp{*-*-linux-*uclibc*} targets.
+ 
++@item -mmusl
++@opindex mmusl
++Use the musl C library.  This is the default on
++@samp{*-*-linux-*musl*} targets.
++
+ @item -mbionic
+ @opindex mbionic
+ Use Bionic C library.  This is the default on
+@@ -23607,7 +23676,7 @@ loader is not part of GCC; it is part of the operating system).  If
+ the GOT size for the linked executable exceeds a machine-specific
+ maximum size, you get an error message from the linker indicating that
+ @option{-fpic} does not work; in that case, recompile with @option{-fPIC}
+-instead.  (These maximums are 8k on the SPARC and 32k
++instead.  (These maximums are 8k on the SPARC, 28k on AArch64 and 32k
+ on the m68k and RS/6000.  The x86 has no such limit.)
+ 
+ Position-independent code requires special support, and therefore works
+@@ -23622,7 +23691,7 @@ are defined to 1.
+ @opindex fPIC
+ If supported for the target machine, emit position-independent code,
+ suitable for dynamic linking and avoiding any limit on the size of the
+-global offset table.  This option makes a difference on the m68k,
++global offset table.  This option makes a difference on AArch64, m68k,
+ PowerPC and SPARC@.
+ 
+ Position-independent code requires special support, and therefore works
+@@ -23644,6 +23713,24 @@ used during linking.
+ @code{__pie__} and @code{__PIE__}.  The macros have the value 1
+ for @option{-fpie} and 2 for @option{-fPIE}.
+ 
++@item -fno-plt
++@opindex fno-plt
++Do not use PLT for external function calls in position-independent code.
++Instead, load callee address at call site from GOT and branch to it.
++This leads to more efficient code by eliminating PLT stubs and exposing
++GOT load to optimizations.  On architectures such as 32-bit x86 where
++PLT stubs expect GOT pointer in a specific register, this gives more
++register allocation freedom to the compiler.  Lazy binding requires PLT:
++with @option{-fno-plt} all external symbols are resolved at load time.
++
++Alternatively, function attribute @code{noplt} can be used to avoid PLT
++for calls to specific external functions by marking those functions with
++this attribute.
++
++Additionally, a few targets also convert calls to those functions that are
++marked to not use the PLT to use the GOT instead for non-position independent
++code.
++
+ @item -fno-jump-tables
+ @opindex fno-jump-tables
+ Do not use jump tables for switch statements even where it would be
+--- a/src/gcc/doc/lto.texi
++++ b/src/gcc/doc/lto.texi
+@@ -538,10 +538,6 @@ plugin obtains the symbol resolution information which specifies
+ which symbols provided by the claimed objects are bound from the
+ rest of a binary being linked.
+ 
+-Currently, the linker plugin  works only in combination
+-with the Gold linker, but a GNU ld implementation is under
+-development.
+-
+ GCC is designed to be independent of the rest of the toolchain
+ and aims to support linkers without plugin support.  For this
+ reason it does not use the linker plugin by default.  Instead,
+--- a/src/gcc/doc/match-and-simplify.texi
++++ b/src/gcc/doc/match-and-simplify.texi
+@@ -39,7 +39,7 @@ APIs are introduced.
+ @deftypefnx {GIMPLE function} tree gimple_simplify (enum tree_code, tree, tree, tree, tree, gimple_seq *, tree (*)(tree))
+ @deftypefnx {GIMPLE function} tree gimple_simplify (enum built_in_function, tree, tree, gimple_seq *, tree (*)(tree))
+ @deftypefnx {GIMPLE function} tree gimple_simplify (enum built_in_function, tree, tree, tree, gimple_seq *, tree (*)(tree))
+-@deftypefnx {GIMPLE function} tree gimple_simplify (enum built_in_function, tree, tree, tree, gimple_seq *, tree (*)(tree))
++@deftypefnx {GIMPLE function} tree gimple_simplify (enum built_in_function, tree, tree, tree, tree, gimple_seq *, tree (*)(tree))
+ The main GIMPLE API entry to the expression simplifications mimicing
+ that of the GENERIC fold_@{unary,binary,ternary@} functions.
+ @end deftypefn
+@@ -64,6 +64,7 @@ Ontop of these a @code{fold_buildN}-like API for GIMPLE is introduced:
+ @deftypefnx {GIMPLE function} tree gimple_build (gimple_seq *, location_t, enum tree_code, tree, tree, tree, tree, tree (*valueize) (tree) = NULL);
+ @deftypefnx {GIMPLE function} tree gimple_build (gimple_seq *, location_t, enum built_in_function, tree, tree, tree (*valueize) (tree) = NULL);
+ @deftypefnx {GIMPLE function} tree gimple_build (gimple_seq *, location_t, enum built_in_function, tree, tree, tree, tree (*valueize) (tree) = NULL);
++@deftypefnx {GIMPLE function} tree gimple_build (gimple_seq *, location_t, enum built_in_function, tree, tree, tree, tree, tree (*valueize) (tree) = NULL);
+ @deftypefnx {GIMPLE function} tree gimple_convert (gimple_seq *, location_t, tree, tree);
+ @end deftypefn
+ 
+--- a/src/gcc/doc/md.texi
++++ b/src/gcc/doc/md.texi
+@@ -4911,10 +4911,10 @@ is of a wider mode, is computed and added to operand 3. Operand 3 is of a mode
+ equal or wider than the mode of the absolute difference. The result is placed
+ in operand 0, which is of the same mode as operand 3.
+ 
+-@cindex @code{ssum_widen@var{m3}} instruction pattern
+-@item @samp{ssum_widen@var{m3}}
+-@cindex @code{usum_widen@var{m3}} instruction pattern
+-@itemx @samp{usum_widen@var{m3}}
++@cindex @code{widen_ssum@var{m3}} instruction pattern
++@item @samp{widen_ssum@var{m3}}
++@cindex @code{widen_usum@var{m3}} instruction pattern
++@itemx @samp{widen_usum@var{m3}}
+ Operands 0 and 2 are of the same mode, which is wider than the mode of
+ operand 1. Add operand 1 to operand 2 and place the widened result in
+ operand 0. (This is used express accumulation of elements into an accumulator
+--- a/src/gcc/doc/sourcebuild.texi
++++ b/src/gcc/doc/sourcebuild.texi
+@@ -1549,7 +1549,12 @@ options.  Some multilibs may be incompatible with these options.
+ @item arm_neon_fp16_ok
+ @anchor{arm_neon_fp16_ok}
+ ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
+-options.  Some multilibs may be incompatible with these options.
++options, including @code{-mfp16-format=ieee} if necessary to obtain the
++@code{__fp16} type.  Some multilibs may be incompatible with these options.
++
++@item arm_neon_fp16_hw
++Test system supports executing Neon half-precision float instructions.
++(Implies previous.)
+ 
+ @item arm_thumb1_ok
+ ARM target generates Thumb-1 code for @code{-mthumb}.
+@@ -1574,12 +1579,43 @@ Some multilibs may be incompatible with these options.
+ ARM target supports @code{-mfpu=neon-fp-armv8 -mfloat-abi=softfp}.
+ Some multilibs may be incompatible with these options.
+ 
++@item arm_v8_1a_neon_ok
++ARM target supports options to generate ARMv8.1 Adv.SIMD instructions.
++Some multilibs may be incompatible with these options.
++
++@item arm_v8_1a_neon_hw
++ARM target supports executing ARMv8.1 Adv.SIMD instructions.  Some
++multilibs may be incompatible with the options needed.  Implies
++arm_v8_1a_neon_ok.
++
+ @item arm_prefer_ldrd_strd
+ ARM target prefers @code{LDRD} and @code{STRD} instructions over
+ @code{LDM} and @code{STM} instructions.
+ 
+ @end table
+ 
++@subsubsection AArch64-specific attributes
++
++@table @code
++@item aarch64_asm_<ext>_ok
++AArch64 assembler supports the architecture extension @code{ext} via the
++@code{.arch_extension} pseudo-op.
++@item aarch64_tiny
++AArch64 target which generates instruction sequences for tiny memory model.
++@item aarch64_small
++AArch64 target which generates instruction sequences for small memory model.
++@item aarch64_large
++AArch64 target which generates instruction sequences for large memory model.
++@item aarch64_little_endian
++AArch64 target which generates instruction sequences for little endian.
++@item aarch64_big_endian
++AArch64 target which generates instruction sequences for big endian.
++@item aarch64_small_fpic
++Binutils installed on test system supports relocation types required by -fpic
++for AArch64 small memory model.
++
++@end table
++
+ @subsubsection MIPS-specific attributes
+ 
+ @table @code
+@@ -1695,6 +1731,9 @@ Target supports FPU instructions.
+ @item non_strict_align
+ Target does not require strict alignment.
+ 
++@item sqrt_insn
++Target has a square root instruction that the compiler can generate.
++
+ @item sse
+ Target supports compiling @code{sse} instructions.
+ 
+@@ -2016,7 +2055,7 @@ keyword}.
+ @item arm_neon_fp16
+ NEON and half-precision floating point support.  Only ARM targets
+ support this feature, and only then in certain modes; see
+-the @ref{arm_neon_ok,,arm_neon_fp16_ok effective target keyword}.
++the @ref{arm_neon_fp16_ok,,arm_neon_fp16_ok effective target keyword}.
+ 
+ @item arm_vfp3
+ arm vfp3 floating point support; see
+@@ -2213,13 +2252,17 @@ Check branch and/or call counts, in addition to line counts, in
+ 
+ @subsubsection Clean up generated test files
+ 
++Usually the test-framework removes files that were generated during
++testing. If a testcase, for example, uses any dumping mechanism to
++inspect a passes dump file, the testsuite recognized the dump option
++passed to the tool and schedules a final cleanup to remove these files.
++
++There are, however, following additional cleanup directives that can be
++used to annotate a testcase "manually".
+ @table @code
+ @item cleanup-coverage-files
+ Removes coverage data files generated for this test.
+ 
+-@item cleanup-ipa-dump @var{suffix}
+-Removes IPA dump files generated for this test.
+-
+ @item cleanup-modules "@var{list-of-extra-modules}"
+ Removes Fortran module files generated for this test, excluding the
+ module names listed in keep-modules.
+@@ -2254,21 +2297,23 @@ end module keep2
+ ! @{ dg-final @{ keep-modules "" @} @} ! keep all
+ @end smallexample
+ 
++@item dg-keep-saved-temps "@var{list-of-suffixes-not-to-delete}"
++Whitespace separated list of suffixes that should not be deleted
++automatically in a testcase that uses @option{-save-temps}.
++@smallexample
++// @{ dg-options "-save-temps -fpch-preprocess -I." @}
++int main() @{ return 0; @}
++// @{ dg-keep-saved-temps ".s" @} ! just keep assembler file
++// @{ dg-keep-saved-temps ".s" ".i" @} ! ... and .i
++// @{ dg-keep-saved-temps ".ii" ".o" @} ! or just .ii and .o
++@end smallexample
++
+ @item cleanup-profile-file
+ Removes profiling files generated for this test.
+ 
+ @item cleanup-repo-files
+ Removes files generated for this test for @option{-frepo}.
+ 
+-@item cleanup-rtl-dump @var{suffix}
+-Removes RTL dump files generated for this test.
+-
+-@item cleanup-saved-temps
+-Removes files for the current test which were kept for @option{-save-temps}.
+-
+-@item cleanup-tree-dump @var{suffix}
+-Removes tree dump files matching @var{suffix} which were generated for
+-this test.
+ @end table
+ 
+ @node Ada Tests
+--- a/src/gcc/doc/tm.texi
++++ b/src/gcc/doc/tm.texi
+@@ -9800,7 +9800,7 @@ be documented in @file{extend.texi}.
+ 
+ @deftypevr {Target Hook} {const struct attribute_spec *} TARGET_ATTRIBUTE_TABLE
+ If defined, this target hook points to an array of @samp{struct
+-attribute_spec} (defined in @file{tree.h}) specifying the machine
++attribute_spec} (defined in @file{tree-core.h}) specifying the machine
+ specific attributes for this target and some of the restrictions on the
+ entities to which these attributes are applied and the arguments they
+ take.
--- gcc-5-5.4.0.orig/debian/patches/gcc-linaro-no-macros.diff
+++ gcc-5-5.4.0/debian/patches/gcc-linaro-no-macros.diff
@@ -0,0 +1,105 @@
+# DP : Don't add the __LINARO_RELEASE__ and __LINARO_SPIN__ macros for distro builds.
+
+Index: b/src/gcc/cppbuiltin.c
+===================================================================
+--- a/src/gcc/cppbuiltin.c
++++ b/src/gcc/cppbuiltin.c
+@@ -62,41 +62,18 @@ parse_basever (int *major, int *minor, i
+     *patchlevel = s_patchlevel;
+ }
+ 
+-/* Parse a LINAROVER version string of the format "M.m-year.month[-spin][~dev]"
+-   to create Linaro release number YYYYMM and spin version.  */
+-static void
+-parse_linarover (int *release, int *spin)
+-{
+-  static int s_year = -1, s_month, s_spin;
+-
+-  if (s_year == -1)
+-    if (sscanf (LINAROVER, "%*[^-]-%d.%d-%d", &s_year, &s_month, &s_spin) != 3)
+-      {
+-	sscanf (LINAROVER, "%*[^-]-%d.%d", &s_year, &s_month);
+-	s_spin = 0;
+-      }
+-
+-  if (release)
+-    *release = s_year * 100 + s_month;
+-
+-  if (spin)
+-    *spin = s_spin;
+-}
+ 
+ /* Define __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__ and __VERSION__.  */
+ static void
+ define__GNUC__ (cpp_reader *pfile)
+ {
+-  int major, minor, patchlevel, linaro_release, linaro_spin;
++  int major, minor, patchlevel;
+ 
+   parse_basever (&major, &minor, &patchlevel);
+-  parse_linarover (&linaro_release, &linaro_spin);
+   cpp_define_formatted (pfile, "__GNUC__=%d", major);
+   cpp_define_formatted (pfile, "__GNUC_MINOR__=%d", minor);
+   cpp_define_formatted (pfile, "__GNUC_PATCHLEVEL__=%d", patchlevel);
+   cpp_define_formatted (pfile, "__VERSION__=\"%s\"", version_string);
+-  cpp_define_formatted (pfile, "__LINARO_RELEASE__=%d", linaro_release);
+-  cpp_define_formatted (pfile, "__LINARO_SPIN__=%d", linaro_spin);
+   cpp_define_formatted (pfile, "__ATOMIC_RELAXED=%d", MEMMODEL_RELAXED);
+   cpp_define_formatted (pfile, "__ATOMIC_SEQ_CST=%d", MEMMODEL_SEQ_CST);
+   cpp_define_formatted (pfile, "__ATOMIC_ACQUIRE=%d", MEMMODEL_ACQUIRE);
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -810,12 +810,10 @@ BASEVER     := $(srcdir)/BASE-VER  # 4.x
+ DEVPHASE    := $(srcdir)/DEV-PHASE # experimental, prerelease, ""
+ DATESTAMP   := $(srcdir)/DATESTAMP # YYYYMMDD or empty
+ REVISION    := $(srcdir)/REVISION  # [BRANCH revision XXXXXX]
+-LINAROVER   := $(srcdir)/LINARO-VERSION # M.x-YYYY.MM[-S][~dev]
+ 
+ BASEVER_c   := $(shell cat $(BASEVER))
+ DEVPHASE_c  := $(shell cat $(DEVPHASE))
+ DATESTAMP_c := $(shell cat $(DATESTAMP))
+-LINAROVER_c := $(shell cat $(LINAROVER))
+ 
+ ifeq (,$(wildcard $(REVISION)))
+ REVISION_c  :=
+@@ -842,7 +840,6 @@ DATESTAMP_s := \
+   "\"$(if $(DEVPHASE_c)$(filter-out 0,$(PATCHLEVEL_c)), $(DATESTAMP_c))\""
+ PKGVERSION_s:= "\"@PKGVERSION@\""
+ BUGURL_s    := "\"@REPORT_BUGS_TO@\""
+-LINAROVER_s := "\"$(LINAROVER_c)\""
+ 
+ PKGVERSION  := @PKGVERSION@
+ BUGURL_TEXI := @REPORT_BUGS_TEXI@
+@@ -2622,9 +2619,8 @@ PREPROCESSOR_DEFINES = \
+   -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
+   @TARGET_SYSTEM_ROOT_DEFINE@
+ 
+-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) \
+-	-DLINAROVER=$(LINAROVER_s)
+-cppbuiltin.o: $(BASEVER) $(LINAROVER)
++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s)
++cppbuiltin.o: $(BASEVER)
+ 
+ CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES)
+ 
+Index: b/src/gcc/LINARO-VERSION
+===================================================================
+--- a/src/gcc/LINARO-VERSION
++++ /dev/null
+@@ -1,1 +0,0 @@
+-5.3-2016.06~dev
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -868,7 +868,7 @@ AC_ARG_WITH(specs,
+ )
+ AC_SUBST(CONFIGURE_SPECS)
+ 
+-ACX_PKGVERSION([Linaro GCC `cat $srcdir/LINARO-VERSION`])
++ACX_PKGVERSION([GCC])
+ ACX_BUGURL([http://gcc.gnu.org/bugs.html])
+ 
+ # Sanity check enable_languages in case someone does not run the toplevel
--- gcc-5-5.4.0.orig/debian/patches/gcc-linaro.diff
+++ gcc-5-5.4.0/debian/patches/gcc-linaro.diff
@@ -0,0 +1,108284 @@
+# DP: Changes for the Linaro 5-2016.06 snapshot.
+
+MSG=$(git log origin/linaro/gcc-5-branch --format=format:"%s" -n 1 --grep "Merge branches"); SVN=${MSG##* }; git log origin/gcc-5-branch --format=format:"%H" -n 1 --grep "gcc-5-branch@${SVN%.}"
+
+LANG=C git diff fecb047450506a831a117f56027549f6759aae1f edceeffafc77f05f5e0c20e91cd5106da486a811 \
+ | egrep -v '^(diff|index) ' \
+ | filterdiff --strip=1 --addoldprefix=a/src/  --addnewprefix=b/src/ \
+ | sed 's,a/src//dev/null,/dev/null,'
+
+--- a/src/fixincludes/mkfixinc.sh
++++ b/src/fixincludes/mkfixinc.sh
+@@ -19,7 +19,8 @@ case $machine in
+     powerpc-*-eabi*    | \
+     powerpc-*-rtems*   | \
+     powerpcle-*-eabisim* | \
+-    powerpcle-*-eabi* )
++    powerpcle-*-eabi* | \
++    *-musl* )
+ 	#  IF there is no include fixing,
+ 	#  THEN create a no-op fixer and exit
+ 	(echo "#! /bin/sh" ; echo "exit 0" ) > ${target}
+--- a/src/gcc/ChangeLog
++++ b/src/gcc/ChangeLog
+@@ -598,11 +598,6 @@
+ 	* varasm.c (output_constructor_regular_field): Flush bitfield
+ 	earlier.  Assert we don't want to move backwards.
+ 
+-2016-03-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+-
+-	* config/arm/sync.md (arm_atomic_loaddi2_ldrd): Fix output template
+-	for non-unified syntax.
+-
+ 2016-03-31  Kirill Yukhin  <kirill.yukhin@intel.com>
+ 
+ 	PR target/70453
+--- /dev/null
++++ b/src/gcc/LINARO-VERSION
+@@ -0,0 +1 @@
++5.3-2016.06~dev
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -527,10 +527,6 @@ xm_include_list=@xm_include_list@
+ xm_defines=@xm_defines@
+ lang_checks=
+ lang_checks_parallelized=
+-# Upper limit to which it is useful to parallelize this lang target.
+-# It doesn't make sense to try e.g. 128 goals for small testsuites
+-# like objc or go.
+-check_gcc_parallelize=10000
+ lang_opt_files=@lang_opt_files@ $(srcdir)/c-family/c.opt $(srcdir)/common.opt
+ lang_specs_files=@lang_specs_files@
+ lang_tree_files=@lang_tree_files@
+@@ -814,10 +810,12 @@ BASEVER     := $(srcdir)/BASE-VER  # 4.x.y
+ DEVPHASE    := $(srcdir)/DEV-PHASE # experimental, prerelease, ""
+ DATESTAMP   := $(srcdir)/DATESTAMP # YYYYMMDD or empty
+ REVISION    := $(srcdir)/REVISION  # [BRANCH revision XXXXXX]
++LINAROVER   := $(srcdir)/LINARO-VERSION # M.x-YYYY.MM[-S][~dev]
+ 
+ BASEVER_c   := $(shell cat $(BASEVER))
+ DEVPHASE_c  := $(shell cat $(DEVPHASE))
+ DATESTAMP_c := $(shell cat $(DATESTAMP))
++LINAROVER_c := $(shell cat $(LINAROVER))
+ 
+ ifeq (,$(wildcard $(REVISION)))
+ REVISION_c  :=
+@@ -844,6 +842,7 @@ DATESTAMP_s := \
+   "\"$(if $(DEVPHASE_c)$(filter-out 0,$(PATCHLEVEL_c)), $(DATESTAMP_c))\""
+ PKGVERSION_s:= "\"@PKGVERSION@\""
+ BUGURL_s    := "\"@REPORT_BUGS_TO@\""
++LINAROVER_s := "\"$(LINAROVER_c)\""
+ 
+ PKGVERSION  := @PKGVERSION@
+ BUGURL_TEXI := @REPORT_BUGS_TEXI@
+@@ -2623,8 +2622,9 @@ PREPROCESSOR_DEFINES = \
+   -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \
+   @TARGET_SYSTEM_ROOT_DEFINE@
+ 
+-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s)
+-cppbuiltin.o: $(BASEVER)
++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) \
++	-DLINAROVER=$(LINAROVER_s)
++cppbuiltin.o: $(BASEVER) $(LINAROVER)
+ 
+ CFLAGS-cppdefault.o += $(PREPROCESSOR_DEFINES)
+ 
+@@ -3736,7 +3736,9 @@ check_p_subdirs=$(wordlist 1,$(check_p_count),$(wordlist 1, \
+ #
+ # To parallelize some language check, add the corresponding check-$lang
+ # to lang_checks_parallelized variable and define check_$lang_parallelize
+-# variable (see above check_gcc_parallelize description).
++# variable.  This is the upper limit to which it is useful to parallelize the
++# check-$lang target.  It doesn't make sense to try e.g. 128 goals for small
++# testsuites like objc or go.
+ $(lang_checks_parallelized): check-% : site.exp
+ 	-rm -rf $(TESTSUITEDIR)/$*-parallel
+ 	@if [ "$(filter -j, $(MFLAGS))" = "-j" ]; then \
+--- a/src/gcc/ada/gcc-interface/Make-lang.in
++++ b/src/gcc/ada/gcc-interface/Make-lang.in
+@@ -811,6 +811,7 @@ ada.mostlyclean:
+ 	-$(RM) ada/*$(coverageexts)
+ 	-$(RM) ada/sdefault.adb ada/stamp-sdefault ada/stamp-snames
+ 	-$(RMDIR) ada/tools
++	-$(RM) gnatbind$(exeext) gnat1$(exeext)
+ ada.clean:
+ ada.distclean:
+ 	-$(RM) ada/Makefile
+--- a/src/gcc/builtins.c
++++ b/src/gcc/builtins.c
+@@ -5481,7 +5481,8 @@ expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp,
+      the normal case where EXPECT is totally private, i.e. a register.  At
+      which point the store can be unconditional.  */
+   label = gen_label_rtx ();
+-  emit_cmp_and_jump_insns (target, const0_rtx, NE, NULL, VOIDmode, 1, label);
++  emit_cmp_and_jump_insns (target, const0_rtx, NE, NULL,
++			   GET_MODE (target), 1, label);
+   emit_move_insn (expect, oldval);
+   emit_label (label);
+ 
+--- a/src/gcc/c-family/c-common.c
++++ b/src/gcc/c-family/c-common.c
+@@ -357,6 +357,7 @@ static tree handle_mode_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_section_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_aligned_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_weak_attribute (tree *, tree, tree, int, bool *) ;
++static tree handle_noplt_attribute (tree *, tree, tree, int, bool *) ;
+ static tree handle_alias_ifunc_attribute (bool, tree *, tree, tree, bool *);
+ static tree handle_ifunc_attribute (tree *, tree, tree, int, bool *);
+ static tree handle_alias_attribute (tree *, tree, tree, int, bool *);
+@@ -706,6 +707,8 @@ const struct attribute_spec c_common_attribute_table[] =
+ 			      handle_aligned_attribute, false },
+   { "weak",                   0, 0, true,  false, false,
+ 			      handle_weak_attribute, false },
++  { "noplt",                   0, 0, true,  false, false,
++			      handle_noplt_attribute, false },
+   { "ifunc",                  1, 1, true,  false, false,
+ 			      handle_ifunc_attribute, false },
+   { "alias",                  1, 1, true,  false, false,
+@@ -7877,6 +7880,25 @@ handle_weak_attribute (tree *node, tree name,
+   return NULL_TREE;
+ }
+ 
++/* Handle a "noplt" attribute; arguments as in
++   struct attribute_spec.handler.  */
++
++static tree
++handle_noplt_attribute (tree *node, tree name,
++		       tree ARG_UNUSED (args),
++		       int ARG_UNUSED (flags),
++		       bool * ARG_UNUSED (no_add_attrs))
++{
++  if (TREE_CODE (*node) != FUNCTION_DECL)
++    {
++      warning (OPT_Wattributes,
++	       "%qE attribute is only applicable on functions", name);
++      *no_add_attrs = true;
++      return NULL_TREE;
++    }
++  return NULL_TREE;
++}
++
+ /* Handle an "alias" or "ifunc" attribute; arguments as in
+    struct attribute_spec.handler, except that IS_ALIAS tells us
+    whether this is an alias as opposed to ifunc attribute.  */
+--- a/src/gcc/c-family/c-common.h
++++ b/src/gcc/c-family/c-common.h
+@@ -1084,6 +1084,8 @@ extern const unsigned char executable_checksum[16];
+ /* In c-cppbuiltin.c  */
+ extern void builtin_define_std (const char *macro);
+ extern void builtin_define_with_value (const char *, const char *, int);
++extern void builtin_define_with_int_value (const char *, HOST_WIDE_INT);
++extern void builtin_define_type_sizeof (const char *, tree);
+ extern void c_stddef_cpp_builtins (void);
+ extern void fe_file_change (const struct line_map *);
+ extern void c_parse_error (const char *, enum cpp_ttype, tree, unsigned char);
+--- a/src/gcc/c-family/c-cppbuiltin.c
++++ b/src/gcc/c-family/c-cppbuiltin.c
+@@ -58,8 +58,6 @@ along with GCC; see the file COPYING3.  If not see
+ #endif
+ 
+ /* Non-static as some targets don't use it.  */
+-void builtin_define_std (const char *) ATTRIBUTE_UNUSED;
+-static void builtin_define_with_int_value (const char *, HOST_WIDE_INT);
+ static void builtin_define_with_hex_fp_value (const char *, tree,
+ 					      int, const char *,
+ 					      const char *,
+@@ -68,7 +66,6 @@ static void builtin_define_stdint_macros (void);
+ static void builtin_define_constants (const char *, tree);
+ static void builtin_define_type_max (const char *, tree);
+ static void builtin_define_type_minmax (const char *, const char *, tree);
+-static void builtin_define_type_sizeof (const char *, tree);
+ static void builtin_define_float_constants (const char *,
+ 					    const char *,
+ 					    const char *,
+@@ -113,7 +110,7 @@ mode_has_fma (machine_mode mode)
+ }
+ 
+ /* Define NAME with value TYPE size_unit.  */
+-static void
++void
+ builtin_define_type_sizeof (const char *name, tree type)
+ {
+   builtin_define_with_int_value (name,
+@@ -1372,7 +1369,7 @@ builtin_define_with_value (const char *macro, const char *expansion, int is_str)
+ 
+ 
+ /* Pass an object-like macro and an integer value to define it to.  */
+-static void
++void
+ builtin_define_with_int_value (const char *macro, HOST_WIDE_INT value)
+ {
+   char *buf;
+--- a/src/gcc/c/Make-lang.in
++++ b/src/gcc/c/Make-lang.in
+@@ -95,6 +95,8 @@ c.srcman:
+ # List of targets that can use the generic check- rule and its // variant.
+ lang_checks += check-gcc
+ lang_checks_parallelized += check-gcc
++# For description see the check_$lang_parallelize comment in gcc/Makefile.in.
++check_gcc_parallelize=10000
+ 
+ # 'make check' in gcc/ looks for check-c.  Redirect it to check-gcc.
+ check-c : check-gcc
+--- a/src/gcc/c/c-decl.c
++++ b/src/gcc/c/c-decl.c
+@@ -2661,6 +2661,12 @@ merge_decls (tree newdecl, tree olddecl, tree newtype, tree oldtype)
+   else if (DECL_PRESERVE_P (newdecl))
+     DECL_PRESERVE_P (olddecl) = 1;
+ 
++  /* Merge DECL_COMMON */
++  if (VAR_P (olddecl) && VAR_P (newdecl)
++      && !lookup_attribute ("common", DECL_ATTRIBUTES (newdecl))
++      && !lookup_attribute ("nocommon", DECL_ATTRIBUTES (newdecl)))
++    DECL_COMMON (newdecl) = DECL_COMMON (newdecl) && DECL_COMMON (olddecl);
++
+   /* Copy most of the decl-specific fields of NEWDECL into OLDDECL.
+      But preserve OLDDECL's DECL_UID, DECL_CONTEXT and
+      DECL_ARGUMENTS (if appropriate).  */
+@@ -7576,12 +7582,23 @@ detect_field_duplicates (tree fieldlist)
+ /* Finish up struct info used by -Wc++-compat.  */
+ 
+ static void
+-warn_cxx_compat_finish_struct (tree fieldlist)
++warn_cxx_compat_finish_struct (tree fieldlist, enum tree_code code,
++			       location_t record_loc)
+ {
+   unsigned int ix;
+   tree x;
+   struct c_binding *b;
+ 
++  if (fieldlist == NULL_TREE)
++    {
++      if (code == RECORD_TYPE)
++	warning_at (record_loc, OPT_Wc___compat,
++		    "empty struct has size 0 in C, size 1 in C++");
++      else
++	warning_at (record_loc, OPT_Wc___compat,
++		    "empty union has size 0 in C, size 1 in C++");
++    }
++
+   /* Set the C_TYPE_DEFINED_IN_STRUCT flag for each type defined in
+      the current struct.  We do this now at the end of the struct
+      because the flag is used to issue visibility warnings, and we
+@@ -7914,7 +7931,7 @@ finish_struct (location_t loc, tree t, tree fieldlist, tree attributes,
+ 			  DECL_EXPR, build_decl (loc, TYPE_DECL, NULL, t)));
+ 
+   if (warn_cxx_compat)
+-    warn_cxx_compat_finish_struct (fieldlist);
++    warn_cxx_compat_finish_struct (fieldlist, TREE_CODE (t), loc);
+ 
+   struct_parse_info->struct_types.release ();
+   struct_parse_info->fields.release ();
+--- a/src/gcc/c/c-typeck.c
++++ b/src/gcc/c/c-typeck.c
+@@ -12678,6 +12678,11 @@ c_build_qualified_type (tree type, int type_quals, tree orig_qual_type,
+   tree var_type = (orig_qual_type && orig_qual_indirect == 0
+ 		   ? orig_qual_type
+ 		   : build_qualified_type (type, type_quals));
++  /* A variant type does not inherit the list of incomplete vars from the
++     type main variant.  */
++  if (TREE_CODE (var_type) == RECORD_TYPE
++      || TREE_CODE (var_type) == UNION_TYPE)
++    C_TYPE_INCOMPLETE_VARS (var_type) = 0;
+   return var_type;
+ }
+ 
+--- a/src/gcc/calls.c
++++ b/src/gcc/calls.c
+@@ -225,6 +225,18 @@ prepare_call_address (tree fndecl_or_type, rtx funexp, rtx static_chain_value,
+ 	       && targetm.small_register_classes_for_mode_p (FUNCTION_MODE))
+ 	      ? force_not_mem (memory_address (FUNCTION_MODE, funexp))
+ 	      : memory_address (FUNCTION_MODE, funexp));
++  else if (flag_pic
++	   && fndecl_or_type
++	   && TREE_CODE (fndecl_or_type) == FUNCTION_DECL
++	   && (!flag_plt
++	       || lookup_attribute ("noplt", DECL_ATTRIBUTES (fndecl_or_type)))
++	   && !targetm.binds_local_p (fndecl_or_type))
++    {
++      /* This is done only for PIC code.  There is no easy interface to force the
++	 function address into GOT for non-PIC case.  non-PIC case needs to be
++	 handled specially by the backend.  */
++      funexp = force_reg (Pmode, funexp);
++    }
+   else if (! sibcallp)
+     {
+ #ifndef NO_FUNCTION_CSE
+--- a/src/gcc/cfgexpand.c
++++ b/src/gcc/cfgexpand.c
+@@ -1382,7 +1382,16 @@ expand_one_var (tree var, bool toplevel, bool really_expand)
+   else
+     {
+       if (really_expand)
+-        expand_one_stack_var (origvar);
++        {
++          if (lookup_attribute ("naked",
++                                DECL_ATTRIBUTES (current_function_decl)))
++            error ("cannot allocate stack for variable %q+D, naked function.",
++                   var);
++
++          expand_one_stack_var (origvar);
++        }
++
++
+       return tree_to_uhwi (DECL_SIZE_UNIT (var));
+     }
+   return 0;
+--- a/src/gcc/combine.c
++++ b/src/gcc/combine.c
+@@ -1650,6 +1650,73 @@ setup_incoming_promotions (rtx_insn *first)
+     }
+ }
+ 
++#ifdef SHORT_IMMEDIATES_SIGN_EXTEND
++/* If MODE has a precision lower than PREC and SRC is a non-negative constant
++   that would appear negative in MODE, sign-extend SRC for use in nonzero_bits
++   because some machines (maybe most) will actually do the sign-extension and
++   this is the conservative approach.
++
++   ??? For 2.5, try to tighten up the MD files in this regard instead of this
++   kludge.  */
++
++static rtx
++sign_extend_short_imm (rtx src, machine_mode mode, unsigned int prec)
++{
++  if (GET_MODE_PRECISION (mode) < prec
++      && CONST_INT_P (src)
++      && INTVAL (src) > 0
++      && val_signbit_known_set_p (mode, INTVAL (src)))
++    src = GEN_INT (INTVAL (src) | ~GET_MODE_MASK (mode));
++
++  return src;
++}
++#endif
++
++/* Update RSP for pseudo-register X from INSN's REG_EQUAL note (if one exists)
++   and SET.  */
++
++static void
++update_rsp_from_reg_equal (reg_stat_type *rsp, rtx_insn *insn, const_rtx set,
++			   rtx x)
++{
++  rtx reg_equal_note = insn ? find_reg_equal_equiv_note (insn) : NULL_RTX;
++  unsigned HOST_WIDE_INT bits = 0;
++  rtx reg_equal = NULL, src = SET_SRC (set);
++  unsigned int num = 0;
++
++  if (reg_equal_note)
++    reg_equal = XEXP (reg_equal_note, 0);
++
++#ifdef SHORT_IMMEDIATES_SIGN_EXTEND
++  src = sign_extend_short_imm (src, GET_MODE (x), BITS_PER_WORD);
++  if (reg_equal)
++    reg_equal = sign_extend_short_imm (reg_equal, GET_MODE (x), BITS_PER_WORD);
++#endif
++
++  /* Don't call nonzero_bits if it cannot change anything.  */
++  if (rsp->nonzero_bits != ~(unsigned HOST_WIDE_INT) 0)
++    {
++      bits = nonzero_bits (src, nonzero_bits_mode);
++      if (reg_equal && bits)
++	bits &= nonzero_bits (reg_equal, nonzero_bits_mode);
++      rsp->nonzero_bits |= bits;
++    }
++
++  /* Don't call num_sign_bit_copies if it cannot change anything.  */
++  if (rsp->sign_bit_copies != 1)
++    {
++      num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));
++      if (reg_equal && num != GET_MODE_PRECISION (GET_MODE (x)))
++	{
++	  unsigned int numeq = num_sign_bit_copies (reg_equal, GET_MODE (x));
++	  if (num == 0 || numeq > num)
++	    num = numeq;
++	}
++      if (rsp->sign_bit_copies == 0 || num < rsp->sign_bit_copies)
++	rsp->sign_bit_copies = num;
++    }
++}
++
+ /* Called via note_stores.  If X is a pseudo that is narrower than
+    HOST_BITS_PER_WIDE_INT and is being set, record what bits are known zero.
+ 
+@@ -1665,7 +1732,6 @@ static void
+ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
+ {
+   rtx_insn *insn = (rtx_insn *) data;
+-  unsigned int num;
+ 
+   if (REG_P (x)
+       && REGNO (x) >= FIRST_PSEUDO_REGISTER
+@@ -1725,34 +1791,7 @@ set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
+       if (SET_DEST (set) == x
+ 	  || (paradoxical_subreg_p (SET_DEST (set))
+ 	      && SUBREG_REG (SET_DEST (set)) == x))
+-	{
+-	  rtx src = SET_SRC (set);
+-
+-#ifdef SHORT_IMMEDIATES_SIGN_EXTEND
+-	  /* If X is narrower than a word and SRC is a non-negative
+-	     constant that would appear negative in the mode of X,
+-	     sign-extend it for use in reg_stat[].nonzero_bits because some
+-	     machines (maybe most) will actually do the sign-extension
+-	     and this is the conservative approach.
+-
+-	     ??? For 2.5, try to tighten up the MD files in this regard
+-	     instead of this kludge.  */
+-
+-	  if (GET_MODE_PRECISION (GET_MODE (x)) < BITS_PER_WORD
+-	      && CONST_INT_P (src)
+-	      && INTVAL (src) > 0
+-	      && val_signbit_known_set_p (GET_MODE (x), INTVAL (src)))
+-	    src = GEN_INT (INTVAL (src) | ~GET_MODE_MASK (GET_MODE (x)));
+-#endif
+-
+-	  /* Don't call nonzero_bits if it cannot change anything.  */
+-	  if (rsp->nonzero_bits != ~(unsigned HOST_WIDE_INT) 0)
+-	    rsp->nonzero_bits |= nonzero_bits (src, nonzero_bits_mode);
+-	  num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));
+-	  if (rsp->sign_bit_copies == 0
+-	      || rsp->sign_bit_copies > num)
+-	    rsp->sign_bit_copies = num;
+-	}
++	update_rsp_from_reg_equal (rsp, insn, set, x);
+       else
+ 	{
+ 	  rsp->nonzero_bits = GET_MODE_MASK (GET_MODE (x));
+@@ -1914,6 +1953,15 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
+   set = expand_field_assignment (set);
+   src = SET_SRC (set), dest = SET_DEST (set);
+ 
++  /* Do not eliminate user-specified register if it is in an
++     asm input because we may break the register asm usage defined
++     in GCC manual if allow to do so.
++     Be aware that this may cover more cases than we expect but this
++     should be harmless.  */
++  if (REG_P (dest) && REG_USERVAR_P (dest) && HARD_REGISTER_P (dest)
++      && extract_asm_operands (PATTERN (i3)))
++    return 0;
++
+   /* Don't eliminate a store in the stack pointer.  */
+   if (dest == stack_pointer_rtx
+       /* Don't combine with an insn that sets a register to itself if it has
+@@ -2510,7 +2558,8 @@ is_parallel_of_n_reg_sets (rtx pat, int n)
+ 	|| !REG_P (SET_DEST (XVECEXP (pat, 0, i))))
+       return false;
+   for ( ; i < len; i++)
+-    if (GET_CODE (XVECEXP (pat, 0, i)) != CLOBBER)
++    if (GET_CODE (XVECEXP (pat, 0, i)) != CLOBBER
++	|| XEXP (XVECEXP (pat, 0, i), 0) == const0_rtx)
+       return false;
+ 
+   return true;
+@@ -5268,6 +5317,19 @@ subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
+ 	      || GET_CODE (SET_DEST (x)) == PC))
+ 	fmt = "ie";
+ 
++      /* Trying to simplify the operands of a widening MULT is not likely
++	 to create RTL matching a machine insn.  */
++      if (code == MULT
++	  && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
++	      || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
++	  && (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND
++	      || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)
++	  && REG_P (XEXP (XEXP (x, 0), 0))
++	  && REG_P (XEXP (XEXP (x, 1), 0))
++	  && from == to)
++	return x;
++
++
+       /* Get the mode of operand 0 in case X is now a SIGN_EXTEND of a
+ 	 constant.  */
+       if (fmt[0] == 'e')
+@@ -5463,6 +5525,51 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest,
+       SUBST (XEXP (x, 1), temp);
+     }
+ 
++  /* Try to fold this expression in case we have constants that weren't
++     present before.  */
++  temp = 0;
++  switch (GET_RTX_CLASS (code))
++    {
++    case RTX_UNARY:
++      if (op0_mode == VOIDmode)
++	op0_mode = GET_MODE (XEXP (x, 0));
++      temp = simplify_unary_operation (code, mode, XEXP (x, 0), op0_mode);
++      break;
++    case RTX_COMPARE:
++    case RTX_COMM_COMPARE:
++      {
++	machine_mode cmp_mode = GET_MODE (XEXP (x, 0));
++	if (cmp_mode == VOIDmode)
++	  {
++	    cmp_mode = GET_MODE (XEXP (x, 1));
++	    if (cmp_mode == VOIDmode)
++	      cmp_mode = op0_mode;
++	  }
++	temp = simplify_relational_operation (code, mode, cmp_mode,
++					      XEXP (x, 0), XEXP (x, 1));
++      }
++      break;
++    case RTX_COMM_ARITH:
++    case RTX_BIN_ARITH:
++      temp = simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
++      break;
++    case RTX_BITFIELD_OPS:
++    case RTX_TERNARY:
++      temp = simplify_ternary_operation (code, mode, op0_mode, XEXP (x, 0),
++					 XEXP (x, 1), XEXP (x, 2));
++      break;
++    default:
++      break;
++    }
++
++  if (temp)
++    {
++      x = temp;
++      code = GET_CODE (temp);
++      op0_mode = VOIDmode;
++      mode = GET_MODE (temp);
++    }
++
+   /* If this is a simple operation applied to an IF_THEN_ELSE, try
+      applying it to the arms of the IF_THEN_ELSE.  This often simplifies
+      things.  Check for cases where both arms are testing the same
+@@ -5562,51 +5669,6 @@ combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest,
+ 	}
+     }
+ 
+-  /* Try to fold this expression in case we have constants that weren't
+-     present before.  */
+-  temp = 0;
+-  switch (GET_RTX_CLASS (code))
+-    {
+-    case RTX_UNARY:
+-      if (op0_mode == VOIDmode)
+-	op0_mode = GET_MODE (XEXP (x, 0));
+-      temp = simplify_unary_operation (code, mode, XEXP (x, 0), op0_mode);
+-      break;
+-    case RTX_COMPARE:
+-    case RTX_COMM_COMPARE:
+-      {
+-	machine_mode cmp_mode = GET_MODE (XEXP (x, 0));
+-	if (cmp_mode == VOIDmode)
+-	  {
+-	    cmp_mode = GET_MODE (XEXP (x, 1));
+-	    if (cmp_mode == VOIDmode)
+-	      cmp_mode = op0_mode;
+-	  }
+-	temp = simplify_relational_operation (code, mode, cmp_mode,
+-					      XEXP (x, 0), XEXP (x, 1));
+-      }
+-      break;
+-    case RTX_COMM_ARITH:
+-    case RTX_BIN_ARITH:
+-      temp = simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
+-      break;
+-    case RTX_BITFIELD_OPS:
+-    case RTX_TERNARY:
+-      temp = simplify_ternary_operation (code, mode, op0_mode, XEXP (x, 0),
+-					 XEXP (x, 1), XEXP (x, 2));
+-      break;
+-    default:
+-      break;
+-    }
+-
+-  if (temp)
+-    {
+-      x = temp;
+-      code = GET_CODE (temp);
+-      op0_mode = VOIDmode;
+-      mode = GET_MODE (temp);
+-    }
+-
+   /* First see if we can apply the inverse distributive law.  */
+   if (code == PLUS || code == MINUS
+       || code == AND || code == IOR || code == XOR)
+@@ -7727,9 +7789,8 @@ extract_left_shift (rtx x, int count)
+    We try, as much as possible, to re-use rtl expressions to save memory.
+ 
+    IN_CODE says what kind of expression we are processing.  Normally, it is
+-   SET.  In a memory address (inside a MEM, PLUS or minus, the latter two
+-   being kludges), it is MEM.  When processing the arguments of a comparison
+-   or a COMPARE against zero, it is COMPARE.  */
++   SET.  In a memory address it is MEM.  When processing the arguments of
++   a comparison or a COMPARE against zero, it is COMPARE.  */
+ 
+ rtx
+ make_compound_operation (rtx x, enum rtx_code in_code)
+@@ -7749,8 +7810,6 @@ make_compound_operation (rtx x, enum rtx_code in_code)
+      but once inside, go back to our default of SET.  */
+ 
+   next_code = (code == MEM ? MEM
+-	       : ((code == PLUS || code == MINUS)
+-		  && SCALAR_INT_MODE_P (mode)) ? MEM
+ 	       : ((code == COMPARE || COMPARISON_P (x))
+ 		  && XEXP (x, 1) == const0_rtx) ? COMPARE
+ 	       : in_code == COMPARE ? SET : in_code);
+@@ -8454,6 +8513,17 @@ force_to_mode (rtx x, machine_mode mode, unsigned HOST_WIDE_INT mask,
+       /* ... fall through ...  */
+ 
+     case MULT:
++      /* Substituting into the operands of a widening MULT is not likely to
++	 create RTL matching a machine insn.  */
++      if (code == MULT
++	  && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
++	      || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
++	  && (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND
++	      || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)
++	  && REG_P (XEXP (XEXP (x, 0), 0))
++	  && REG_P (XEXP (XEXP (x, 1), 0)))
++	return gen_lowpart_or_truncate (mode, x);
++
+       /* For PLUS, MINUS and MULT, we need any bits less significant than the
+ 	 most significant bit in MASK since carries from those bits will
+ 	 affect the bits we are interested in.  */
+@@ -9801,20 +9871,8 @@ reg_nonzero_bits_for_combine (const_rtx x, machine_mode mode,
+   if (tem)
+     {
+ #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
+-      /* If X is narrower than MODE and TEM is a non-negative
+-	 constant that would appear negative in the mode of X,
+-	 sign-extend it for use in reg_nonzero_bits because some
+-	 machines (maybe most) will actually do the sign-extension
+-	 and this is the conservative approach.
+-
+-	 ??? For 2.5, try to tighten up the MD files in this regard
+-	 instead of this kludge.  */
+-
+-      if (GET_MODE_PRECISION (GET_MODE (x)) < GET_MODE_PRECISION (mode)
+-	  && CONST_INT_P (tem)
+-	  && INTVAL (tem) > 0
+-	  && val_signbit_known_set_p (GET_MODE (x), INTVAL (tem)))
+-	tem = GEN_INT (INTVAL (tem) | ~GET_MODE_MASK (GET_MODE (x)));
++      tem = sign_extend_short_imm (tem, GET_MODE (x),
++				   GET_MODE_PRECISION (mode));
+ #endif
+       return tem;
+     }
+--- a/src/gcc/common.opt
++++ b/src/gcc/common.opt
+@@ -1779,6 +1779,10 @@ fpie
+ Common Report Var(flag_pie,1) Negative(fPIC)
+ Generate position-independent code for executables if possible (small mode)
+ 
++fplt
++Common Report Var(flag_plt) Init(1) Optimization
++Use PLT for PIC calls (-fno-plt: load the address from GOT at call site)
++
+ fplugin=
+ Common Joined RejectNegative Var(common_deferred_options) Defer
+ Specify a plugin to load
+--- a/src/gcc/common/config/aarch64/aarch64-common.c
++++ b/src/gcc/common/config/aarch64/aarch64-common.c
+@@ -27,7 +27,7 @@
+ #include "common/common-target-def.h"
+ #include "opts.h"
+ #include "flags.h"
+-#include "errors.h"
++#include "diagnostic.h"
+ 
+ #ifdef  TARGET_BIG_ENDIAN_DEFAULT
+ #undef  TARGET_DEFAULT_TARGET_FLAGS
+@@ -60,7 +60,7 @@ static const struct default_options aarch_option_optimization_table[] =
+    respective component of -mcpu.  This logic is implemented
+    in config/aarch64/aarch64.c:aarch64_override_options.  */
+ 
+-static bool
++bool
+ aarch64_handle_option (struct gcc_options *opts,
+ 		       struct gcc_options *opts_set ATTRIBUTE_UNUSED,
+ 		       const struct cl_decoded_option *decoded,
+@@ -68,6 +68,7 @@ aarch64_handle_option (struct gcc_options *opts,
+ {
+   size_t code = decoded->opt_index;
+   const char *arg = decoded->arg;
++  int val = decoded->value;
+ 
+   switch (code)
+     {
+@@ -83,6 +84,22 @@ aarch64_handle_option (struct gcc_options *opts,
+       opts->x_aarch64_tune_string = arg;
+       return true;
+ 
++    case OPT_mgeneral_regs_only:
++      opts->x_target_flags |= MASK_GENERAL_REGS_ONLY;
++      return true;
++
++    case OPT_mfix_cortex_a53_835769:
++      opts->x_aarch64_fix_a53_err835769 = val;
++      return true;
++
++    case OPT_mstrict_align:
++      opts->x_target_flags |= MASK_STRICT_ALIGN;
++      return true;
++
++    case OPT_momit_leaf_frame_pointer:
++      opts->x_flag_omit_leaf_frame_pointer = val;
++      return true;
++
+     default:
+       return true;
+     }
+@@ -90,36 +107,224 @@ aarch64_handle_option (struct gcc_options *opts,
+ 
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+ 
+-#define AARCH64_CPU_NAME_LENGTH 128
++/* An ISA extension in the co-processor and main instruction set space.  */
++struct aarch64_option_extension
++{
++  const char *const name;
++  const unsigned long flag_canonical;
++  const unsigned long flags_on;
++  const unsigned long flags_off;
++};
++
++/* ISA extensions in AArch64.  */
++static const struct aarch64_option_extension all_extensions[] =
++{
++#define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, Z) \
++  {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF},
++#include "config/aarch64/aarch64-option-extensions.def"
++#undef AARCH64_OPT_EXTENSION
++  {NULL, 0, 0, 0}
++};
++
++struct processor_name_to_arch
++{
++  const std::string processor_name;
++  const enum aarch64_arch arch;
++  const unsigned long flags;
++};
++
++struct arch_to_arch_name
++{
++  const enum aarch64_arch arch;
++  const std::string arch_name;
++  const unsigned long flags;
++};
++
++/* Map processor names to the architecture revision they implement and
++   the default set of architectural feature flags they support.  */
++static const struct processor_name_to_arch all_cores[] =
++{
++#define AARCH64_CORE(NAME, X, IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART) \
++  {NAME, AARCH64_ARCH_##ARCH_IDENT, FLAGS},
++#include "config/aarch64/aarch64-cores.def"
++#undef AARCH64_CORE
++  {"generic", AARCH64_ARCH_8A, AARCH64_FL_FOR_ARCH8},
++  {"", aarch64_no_arch, 0}
++};
++
++/* Map architecture revisions to their string representation.  */
++static const struct arch_to_arch_name all_architectures[] =
++{
++#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
++  {AARCH64_ARCH_##ARCH_IDENT, NAME, FLAGS},
++#include "config/aarch64/aarch64-arches.def"
++#undef AARCH64_ARCH
++  {aarch64_no_arch, "", 0}
++};
++
++/* Parse the architecture extension string STR and update ISA_FLAGS
++   with the architecture features turned on or off.  Return a
++   aarch64_parse_opt_result describing the result.  */
++
++enum aarch64_parse_opt_result
++aarch64_parse_extension (const char *str, unsigned long *isa_flags)
++{
++  /* The extension string is parsed left to right.  */
++  const struct aarch64_option_extension *opt = NULL;
++
++  /* Flag to say whether we are adding or removing an extension.  */
++  int adding_ext = -1;
++
++  while (str != NULL && *str != 0)
++    {
++      const char *ext;
++      size_t len;
++
++      str++;
++      ext = strchr (str, '+');
+ 
+-/* Truncate NAME at the first '.' character seen up to the first '+'
+-   or return NAME unmodified.  */
++      if (ext != NULL)
++	len = ext - str;
++      else
++	len = strlen (str);
++
++      if (len >= 2 && strncmp (str, "no", 2) == 0)
++	{
++	  adding_ext = 0;
++	  len -= 2;
++	  str += 2;
++	}
++      else if (len > 0)
++	adding_ext = 1;
++
++      if (len == 0)
++	return AARCH64_PARSE_MISSING_ARG;
++
++
++      /* Scan over the extensions table trying to find an exact match.  */
++      for (opt = all_extensions; opt->name != NULL; opt++)
++	{
++	  if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0)
++	    {
++	      /* Add or remove the extension.  */
++	      if (adding_ext)
++		*isa_flags |= (opt->flags_on | opt->flag_canonical);
++	      else
++		*isa_flags &= ~(opt->flags_off | opt->flag_canonical);
++	      break;
++	    }
++	}
++
++      if (opt->name == NULL)
++	{
++	  /* Extension not found in list.  */
++	  return AARCH64_PARSE_INVALID_FEATURE;
++	}
++
++      str = ext;
++    };
++
++  return AARCH64_PARSE_OK;
++}
++
++/* Return a string representation of ISA_FLAGS.  DEFAULT_ARCH_FLAGS
++   gives the default set of flags which are implied by whatever -march
++   we'd put out.  Our job is to figure out the minimal set of "+" and
++   "+no" feature flags to put out, and to put them out grouped such
++   that all the "+" flags come before the "+no" flags.  */
++
++std::string
++aarch64_get_extension_string_for_isa_flags (unsigned long isa_flags,
++					    unsigned long default_arch_flags)
++{
++  const struct aarch64_option_extension *opt = NULL;
++  std::string outstr = "";
++
++  /* Pass one: Find all the things we need to turn on.  As a special case,
++     we always want to put out +crc if it is enabled.  */
++  for (opt = all_extensions; opt->name != NULL; opt++)
++    if ((isa_flags & opt->flag_canonical
++	 && !(default_arch_flags & opt->flag_canonical))
++	|| (default_arch_flags & opt->flag_canonical
++            && opt->flag_canonical == AARCH64_ISA_CRC))
++      {
++	outstr += "+";
++	outstr += opt->name;
++      }
++
++  /* Pass two: Find all the things we need to turn off.  */
++  for (opt = all_extensions; opt->name != NULL; opt++)
++    if ((~isa_flags) & opt->flag_canonical
++	&& !((~default_arch_flags) & opt->flag_canonical))
++      {
++	outstr += "+no";
++	outstr += opt->name;
++      }
++
++  return outstr;
++}
++
++/* Attempt to rewrite NAME, which has been passed on the command line
++   as a -mcpu option to an equivalent -march value.  If we can do so,
++   return the new string, otherwise return an error.  */
+ 
+ const char *
+ aarch64_rewrite_selected_cpu (const char *name)
+ {
+-  static char output_buf[AARCH64_CPU_NAME_LENGTH + 1] = {0};
+-  const char *bL_sep;
+-  const char *feats;
+-  size_t pref_size;
+-  size_t feat_size;
++  std::string original_string (name);
++  std::string extension_str;
++  std::string processor;
++  size_t extension_pos = original_string.find_first_of ('+');
+ 
+-  bL_sep = strchr (name, '.');
+-  if (!bL_sep)
+-    return name;
++  /* Strip and save the extension string.  */
++  if (extension_pos != std::string::npos)
++    {
++      processor = original_string.substr (0, extension_pos);
++      extension_str = original_string.substr (extension_pos,
++					      std::string::npos);
++    }
++  else
++    {
++      /* No extensions.  */
++      processor = original_string;
++    }
++
++  const struct processor_name_to_arch* p_to_a;
++  for (p_to_a = all_cores;
++       p_to_a->arch != aarch64_no_arch;
++       p_to_a++)
++    {
++      if (p_to_a->processor_name == processor)
++	break;
++    }
++
++  const struct arch_to_arch_name* a_to_an;
++  for (a_to_an = all_architectures;
++       a_to_an->arch != aarch64_no_arch;
++       a_to_an++)
++    {
++      if (a_to_an->arch == p_to_a->arch)
++	break;
++    }
+ 
+-  feats = strchr (name, '+');
+-  feat_size = feats ? strnlen (feats, AARCH64_CPU_NAME_LENGTH) : 0;
+-  pref_size = bL_sep - name;
++  /* We couldn't find that proceesor name, or the processor name we
++     found does not map to an architecture we understand.  */
++  if (p_to_a->arch == aarch64_no_arch
++      || a_to_an->arch == aarch64_no_arch)
++    fatal_error (input_location, "unknown value %qs for -mcpu", name);
+ 
+-  if ((feat_size + pref_size) > AARCH64_CPU_NAME_LENGTH)
+-    internal_error ("-mcpu string too large");
++  unsigned long extensions = p_to_a->flags;
++  aarch64_parse_extension (extension_str.c_str (), &extensions);
+ 
+-  strncpy (output_buf, name, pref_size);
+-  if (feats)
+-    strncpy (output_buf + pref_size, feats, feat_size);
++  std::string outstr = a_to_an->arch_name
++	+ aarch64_get_extension_string_for_isa_flags (extensions,
++						      a_to_an->flags);
+ 
+-  return output_buf;
++  /* We are going to memory leak here, nobody elsewhere
++     in the callchain is going to clean up after us.  The alternative is
++     to allocate a static buffer, and assert that it is big enough for our
++     modified string, which seems much worse!  */
++  return xstrdup (outstr.c_str ());
+ }
+ 
+ /* Called by the driver to rewrite a name passed to the -mcpu
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -302,7 +302,9 @@ m32c*-*-*)
+ aarch64*-*-*)
+ 	cpu_type=aarch64
+ 	extra_headers="arm_neon.h arm_acle.h"
+-	extra_objs="aarch64-builtins.o aarch-common.o"
++	c_target_objs="aarch64-c.o"
++	cxx_target_objs="aarch64-c.o"
++	extra_objs="aarch64-builtins.o aarch-common.o cortex-a57-fma-steering.o"
+ 	target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.c"
+ 	target_has_targetm_common=yes
+ 	;;
+@@ -575,7 +577,7 @@ case ${target} in
+ esac
+ 
+ # Common C libraries.
+-tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3"
++tm_defines="$tm_defines LIBC_GLIBC=1 LIBC_UCLIBC=2 LIBC_BIONIC=3 LIBC_MUSL=4"
+ 
+ # 32-bit x86 processors supported by --with-arch=.  Each processor
+ # MUST be separated by exactly one space.
+@@ -720,6 +722,9 @@ case ${target} in
+     *-*-*uclibc*)
+       tm_defines="$tm_defines DEFAULT_LIBC=LIBC_UCLIBC"
+       ;;
++    *-*-*musl*)
++      tm_defines="$tm_defines DEFAULT_LIBC=LIBC_MUSL"
++      ;;
+     *)
+       tm_defines="$tm_defines DEFAULT_LIBC=LIBC_GLIBC"
+       ;;
+@@ -3482,7 +3487,7 @@ case "${target}" in
+ 
+ 			eval "val=\$with_$which"
+ 			base_val=`echo $val | sed -e 's/\+.*//'`
+-			ext_val=`echo $val | sed -e 's/[a-z0-9\-]\+//'`
++			ext_val=`echo $val | sed -e 's/[a-z0-9.-]\+//'`
+ 
+ 			if [ $which = arch ]; then
+ 			  def=aarch64-arches.def
+@@ -3529,22 +3534,28 @@ case "${target}" in
+ 				    ${srcdir}/config/aarch64/aarch64-option-extensions.def \
+ 				    > /dev/null; then
+ 
+-				  ext_on=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \
++				  ext_canon=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \
+ 					${srcdir}/config/aarch64/aarch64-option-extensions.def | \
+ 					sed -e 's/^[^,]*,[ 	]*//' | \
+ 					sed -e 's/,.*$//'`
+-				  ext_off=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \
++				  ext_on=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \
+ 					${srcdir}/config/aarch64/aarch64-option-extensions.def | \
+ 					sed -e 's/^[^,]*,[ 	]*[^,]*,[ 	]*//' | \
+ 					sed -e 's/,.*$//' | \
+ 					sed -e 's/).*$//'`
++				  ext_off=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \
++					${srcdir}/config/aarch64/aarch64-option-extensions.def | \
++					sed -e 's/^[^,]*,[ 	]*[^,]*,[ 	]*[^,]*,[ 	]*//' | \
++					sed -e 's/,.*$//' | \
++					sed -e 's/).*$//'`
++
+ 
+ 				  if [ $ext = $base_ext ]; then
+ 					# Adding extension
+-					ext_mask="("$ext_mask") | ("$ext_on")"
++					ext_mask="("$ext_mask") | ("$ext_on" | "$ext_canon")"
+ 				  else
+ 					# Removing extension
+-					ext_mask="("$ext_mask") & ~("$ext_off")"
++					ext_mask="("$ext_mask") & ~("$ext_off" | "$ext_canon")"
+ 				  fi
+ 
+ 				  true
+--- a/src/gcc/config.host
++++ b/src/gcc/config.host
+@@ -99,6 +99,14 @@ case ${host} in
+ esac
+ 
+ case ${host} in
++  aarch64*-*-linux*)
++    case ${target} in
++      aarch64*-*-*)
++	host_extra_gcc_objs="driver-aarch64.o"
++	host_xmake_file="${host_xmake_file} aarch64/x-aarch64"
++	;;
++    esac
++    ;;
+   arm*-*-freebsd* | arm*-*-linux*)
+     case ${target} in
+       arm*-*-*)
+--- a/src/gcc/config.in
++++ b/src/gcc/config.in
+@@ -568,6 +568,12 @@
+ #endif
+ 
+ 
++/* Define if your assembler supports relocs needed by -fpic. */
++#ifndef USED_FOR_TARGET
++#undef HAVE_AS_SMALL_PIC_RELOCS
++#endif
++
++
+ /* Define if your assembler supports SPARC4 instructions. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_SPARC4
+--- a/src/gcc/config/aarch64/aarch64-arches.def
++++ b/src/gcc/config/aarch64/aarch64-arches.def
+@@ -19,11 +19,17 @@
+ 
+ /* Before using #include to read this file, define a macro:
+ 
+-      AARCH64_ARCH(NAME, CORE, ARCH, FLAGS)
++      AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS)
+ 
+    The NAME is the name of the architecture, represented as a string
+    constant.  The CORE is the identifier for a core representative of
+-   this architecture.  ARCH is the architecture revision.  FLAGS are
+-   the flags implied by the architecture.  */
++   this architecture.  ARCH_IDENT is the architecture identifier.  It must be
++   unique and be syntactically valid to appear as part of an enum identifier.
++   ARCH_REV is an integer specifying the architecture major revision.
++   FLAGS are the flags implied by the architecture.
++   Due to the assumptions about the positions of these fields in config.gcc,
++   the NAME should be kept as the first argument and FLAGS as the last.  */
++
++AARCH64_ARCH("armv8-a",	      generic,	     8A,	8,  AARCH64_FL_FOR_ARCH8)
++AARCH64_ARCH("armv8.1-a",     generic,	     8_1A,	8,  AARCH64_FL_FOR_ARCH8_1)
+ 
+-AARCH64_ARCH("armv8-a",	      generic,	     8,  AARCH64_FL_FOR_ARCH8)
+--- a/src/gcc/config/aarch64/aarch64-builtins.c
++++ b/src/gcc/config/aarch64/aarch64-builtins.c
+@@ -80,6 +80,7 @@
+ 
+ #define v8qi_UP  V8QImode
+ #define v4hi_UP  V4HImode
++#define v4hf_UP  V4HFmode
+ #define v2si_UP  V2SImode
+ #define v2sf_UP  V2SFmode
+ #define v1df_UP  V1DFmode
+@@ -87,12 +88,12 @@
+ #define df_UP    DFmode
+ #define v16qi_UP V16QImode
+ #define v8hi_UP  V8HImode
++#define v8hf_UP  V8HFmode
+ #define v4si_UP  V4SImode
+ #define v4sf_UP  V4SFmode
+ #define v2di_UP  V2DImode
+ #define v2df_UP  V2DFmode
+ #define ti_UP	 TImode
+-#define ei_UP	 EImode
+ #define oi_UP	 OImode
+ #define ci_UP	 CImode
+ #define xi_UP	 XImode
+@@ -133,7 +134,9 @@ enum aarch64_type_qualifiers
+   /* Polynomial types.  */
+   qualifier_poly = 0x100,
+   /* Lane indices - must be in range, and flipped for bigendian.  */
+-  qualifier_lane_index = 0x200
++  qualifier_lane_index = 0x200,
++  /* Lane indices for single lane structure loads and stores.  */
++  qualifier_struct_load_store_lane_index = 0x400
+ };
+ 
+ typedef struct
+@@ -154,6 +157,10 @@ aarch64_types_unopu_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_unsigned, qualifier_unsigned };
+ #define TYPES_UNOPU (aarch64_types_unopu_qualifiers)
+ static enum aarch64_type_qualifiers
++aarch64_types_unopus_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++  = { qualifier_unsigned, qualifier_none };
++#define TYPES_UNOPUS (aarch64_types_unopus_qualifiers)
++static enum aarch64_type_qualifiers
+ aarch64_types_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_maybe_immediate };
+ #define TYPES_BINOP (aarch64_types_binop_qualifiers)
+@@ -235,7 +242,7 @@ aarch64_types_load1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ static enum aarch64_type_qualifiers
+ aarch64_types_loadstruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_const_pointer_map_mode,
+-      qualifier_none, qualifier_none };
++      qualifier_none, qualifier_struct_load_store_lane_index };
+ #define TYPES_LOADSTRUCT_LANE (aarch64_types_loadstruct_lane_qualifiers)
+ 
+ static enum aarch64_type_qualifiers
+@@ -267,7 +274,7 @@ aarch64_types_store1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ static enum aarch64_type_qualifiers
+ aarch64_types_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer_map_mode,
+-      qualifier_none, qualifier_none };
++      qualifier_none, qualifier_struct_load_store_lane_index };
+ #define TYPES_STORESTRUCT_LANE (aarch64_types_storestruct_lane_qualifiers)
+ 
+ #define CF0(N, X) CODE_FOR_aarch64_##N##X
+@@ -312,6 +319,12 @@ aarch64_types_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ #define VAR12(T, N, MAP, A, B, C, D, E, F, G, H, I, J, K, L) \
+   VAR11 (T, N, MAP, A, B, C, D, E, F, G, H, I, J, K) \
+   VAR1 (T, N, MAP, L)
++#define VAR13(T, N, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M) \
++  VAR12 (T, N, MAP, A, B, C, D, E, F, G, H, I, J, K, L) \
++  VAR1 (T, N, MAP, M)
++#define VAR14(T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M, N) \
++  VAR13 (T, X, MAP, A, B, C, D, E, F, G, H, I, J, K, L, M) \
++  VAR1 (T, X, MAP, N)
+ 
+ #include "aarch64-builtin-iterators.h"
+ 
+@@ -389,6 +402,7 @@ const char *aarch64_scalar_builtin_types[] = {
+   "__builtin_aarch64_simd_qi",
+   "__builtin_aarch64_simd_hi",
+   "__builtin_aarch64_simd_si",
++  "__builtin_aarch64_simd_hf",
+   "__builtin_aarch64_simd_sf",
+   "__builtin_aarch64_simd_di",
+   "__builtin_aarch64_simd_df",
+@@ -453,8 +467,10 @@ static struct aarch64_simd_type_info aarch64_simd_types [] = {
+ };
+ #undef ENTRY
+ 
++/* This type is not SIMD-specific; it is the user-visible __fp16.  */
++static tree aarch64_fp16_type_node = NULL_TREE;
++
+ static tree aarch64_simd_intOI_type_node = NULL_TREE;
+-static tree aarch64_simd_intEI_type_node = NULL_TREE;
+ static tree aarch64_simd_intCI_type_node = NULL_TREE;
+ static tree aarch64_simd_intXI_type_node = NULL_TREE;
+ 
+@@ -528,12 +544,12 @@ aarch64_simd_builtin_std_type (enum machine_mode mode,
+       return QUAL_TYPE (TI);
+     case OImode:
+       return aarch64_simd_intOI_type_node;
+-    case EImode:
+-      return aarch64_simd_intEI_type_node;
+     case CImode:
+       return aarch64_simd_intCI_type_node;
+     case XImode:
+       return aarch64_simd_intXI_type_node;
++    case HFmode:
++      return aarch64_fp16_type_node;
+     case SFmode:
+       return float_type_node;
+     case DFmode:
+@@ -618,6 +634,8 @@ aarch64_init_simd_builtin_types (void)
+   aarch64_simd_types[Poly64x2_t].eltype = aarch64_simd_types[Poly64_t].itype;
+ 
+   /* Continue with standard types.  */
++  aarch64_simd_types[Float16x4_t].eltype = aarch64_fp16_type_node;
++  aarch64_simd_types[Float16x8_t].eltype = aarch64_fp16_type_node;
+   aarch64_simd_types[Float32x2_t].eltype = float_type_node;
+   aarch64_simd_types[Float32x4_t].eltype = float_type_node;
+   aarch64_simd_types[Float64x1_t].eltype = double_type_node;
+@@ -644,15 +662,11 @@ aarch64_init_simd_builtin_types (void)
+ #define AARCH64_BUILD_SIGNED_TYPE(mode)  \
+   make_signed_type (GET_MODE_PRECISION (mode));
+   aarch64_simd_intOI_type_node = AARCH64_BUILD_SIGNED_TYPE (OImode);
+-  aarch64_simd_intEI_type_node = AARCH64_BUILD_SIGNED_TYPE (EImode);
+   aarch64_simd_intCI_type_node = AARCH64_BUILD_SIGNED_TYPE (CImode);
+   aarch64_simd_intXI_type_node = AARCH64_BUILD_SIGNED_TYPE (XImode);
+ #undef AARCH64_BUILD_SIGNED_TYPE
+ 
+   tdecl = add_builtin_type
+-	    ("__builtin_aarch64_simd_ei" , aarch64_simd_intEI_type_node);
+-  TYPE_NAME (aarch64_simd_intEI_type_node) = tdecl;
+-  tdecl = add_builtin_type
+ 	    ("__builtin_aarch64_simd_oi" , aarch64_simd_intOI_type_node);
+   TYPE_NAME (aarch64_simd_intOI_type_node) = tdecl;
+   tdecl = add_builtin_type
+@@ -671,6 +685,8 @@ aarch64_init_simd_builtin_scalar_types (void)
+ 					     "__builtin_aarch64_simd_qi");
+   (*lang_hooks.types.register_builtin_type) (intHI_type_node,
+ 					     "__builtin_aarch64_simd_hi");
++  (*lang_hooks.types.register_builtin_type) (aarch64_fp16_type_node,
++					     "__builtin_aarch64_simd_hf");
+   (*lang_hooks.types.register_builtin_type) (intSI_type_node,
+ 					     "__builtin_aarch64_simd_si");
+   (*lang_hooks.types.register_builtin_type) (float_type_node,
+@@ -700,11 +716,18 @@ aarch64_init_simd_builtin_scalar_types (void)
+ 					     "__builtin_aarch64_simd_udi");
+ }
+ 
+-static void
++static bool aarch64_simd_builtins_initialized_p = false;
++
++void
+ aarch64_init_simd_builtins (void)
+ {
+   unsigned int i, fcode = AARCH64_SIMD_PATTERN_START;
+ 
++  if (aarch64_simd_builtins_initialized_p)
++    return;
++
++  aarch64_simd_builtins_initialized_p = true;
++
+   aarch64_init_simd_builtin_types ();
+ 
+   /* Strong-typing hasn't been implemented for all AdvSIMD builtin intrinsics.
+@@ -865,10 +888,16 @@ aarch64_init_builtins (void)
+     = add_builtin_function ("__builtin_aarch64_set_fpsr", ftype_set_fpr,
+ 			    AARCH64_BUILTIN_SET_FPSR, BUILT_IN_MD, NULL, NULL_TREE);
+ 
++  aarch64_fp16_type_node = make_node (REAL_TYPE);
++  TYPE_PRECISION (aarch64_fp16_type_node) = 16;
++  layout_type (aarch64_fp16_type_node);
++
++  (*lang_hooks.types.register_builtin_type) (aarch64_fp16_type_node, "__fp16");
++
+   if (TARGET_SIMD)
+     aarch64_init_simd_builtins ();
+-  if (TARGET_CRC32)
+-    aarch64_init_crc32_builtins ();
++
++  aarch64_init_crc32_builtins ();
+ }
+ 
+ tree
+@@ -885,12 +914,15 @@ typedef enum
+   SIMD_ARG_COPY_TO_REG,
+   SIMD_ARG_CONSTANT,
+   SIMD_ARG_LANE_INDEX,
++  SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX,
+   SIMD_ARG_STOP
+ } builtin_simd_arg;
+ 
++
+ static rtx
+ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
+-			  tree exp, builtin_simd_arg *args)
++			  tree exp, builtin_simd_arg *args,
++			  enum machine_mode builtin_mode)
+ {
+   rtx pat;
+   rtx op[SIMD_MAX_BUILTIN_ARGS + 1]; /* First element for result operand.  */
+@@ -929,6 +961,19 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
+ 		op[opc] = copy_to_mode_reg (mode, op[opc]);
+ 	      break;
+ 
++	    case SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX:
++	      gcc_assert (opc > 1);
++	      if (CONST_INT_P (op[opc]))
++		{
++		  aarch64_simd_lane_bounds (op[opc], 0,
++					    GET_MODE_NUNITS (builtin_mode),
++					    exp);
++		  /* Keep to GCC-vector-extension lane indices in the RTL.  */
++		  op[opc] =
++		    GEN_INT (ENDIAN_LANE_N (builtin_mode, INTVAL (op[opc])));
++		}
++	      goto constant_arg;
++
+ 	    case SIMD_ARG_LANE_INDEX:
+ 	      /* Must be a previous operand into which this is an index.  */
+ 	      gcc_assert (opc > 0);
+@@ -943,6 +988,7 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
+ 	      /* Fall through - if the lane index isn't a constant then
+ 		 the next case will error.  */
+ 	    case SIMD_ARG_CONSTANT:
++constant_arg:
+ 	      if (!(*insn_data[icode].operand[opc].predicate)
+ 		  (op[opc], mode))
+ 	      {
+@@ -1051,6 +1097,8 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
+ 
+       if (d->qualifiers[qualifiers_k] & qualifier_lane_index)
+ 	args[k] = SIMD_ARG_LANE_INDEX;
++      else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
++	args[k] = SIMD_ARG_STRUCT_LOAD_STORE_LANE_INDEX;
+       else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
+ 	args[k] = SIMD_ARG_CONSTANT;
+       else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate)
+@@ -1074,7 +1122,7 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
+   /* The interface to aarch64_simd_expand_args expects a 0 if
+      the function is void, and a 1 if it is not.  */
+   return aarch64_simd_expand_args
+-	  (target, icode, !is_void, exp, &args[1]);
++	  (target, icode, !is_void, exp, &args[1], d->mode);
+ }
+ 
+ rtx
+@@ -1148,7 +1196,7 @@ aarch64_expand_builtin (tree exp,
+ 	  icode = (fcode == AARCH64_BUILTIN_SET_FPSR) ?
+ 	    CODE_FOR_set_fpsr : CODE_FOR_set_fpcr;
+ 	  arg0 = CALL_EXPR_ARG (exp, 0);
+-	  op0 = expand_normal (arg0);
++	  op0 = force_reg (SImode, expand_normal (arg0));
+ 	  pat = GEN_FCN (icode) (op0);
+ 	}
+       emit_insn (pat);
+--- /dev/null
++++ b/src/gcc/config/aarch64/aarch64-c.c
+@@ -0,0 +1,209 @@
++/* Target-specific code for C family languages.
++   Copyright (C) 2015 Free Software Foundation, Inc.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify
++   it under the terms of the GNU General Public License as published by
++   the Free Software Foundation; either version 3, or (at your option)
++   any later version.
++
++   GCC is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++   GNU General Public License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "input.h"
++#include "tm_p.h"
++#include "flags.h"
++#include "c-family/c-common.h"
++#include "cpplib.h"
++#include "c-family/c-pragma.h"
++#include "langhooks.h"
++#include "target.h"
++
++
++#define builtin_define(TXT) cpp_define (pfile, TXT)
++#define builtin_assert(TXT) cpp_assert (pfile, TXT)
++
++
++static void
++aarch64_def_or_undef (bool def_p, const char *macro, cpp_reader *pfile)
++{
++  if (def_p)
++    cpp_define (pfile, macro);
++  else
++    cpp_undef (pfile, macro);
++}
++
++/* Define the macros that we always expect to have on AArch64.  */
++
++static void
++aarch64_define_unconditional_macros (cpp_reader *pfile)
++{
++  builtin_define ("__aarch64__");
++  builtin_define ("__ARM_64BIT_STATE");
++
++  builtin_define ("__ARM_ARCH_ISA_A64");
++  builtin_define_with_int_value ("__ARM_ALIGN_MAX_PWR", 28);
++  builtin_define_with_int_value ("__ARM_ALIGN_MAX_STACK_PWR", 16);
++
++  /* __ARM_ARCH_8A is not mandated by ACLE but we define it unconditionally
++     as interoperability with the same arm macro.  */
++  builtin_define ("__ARM_ARCH_8A");
++
++  builtin_define_with_int_value ("__ARM_ARCH_PROFILE", 'A');
++  builtin_define ("__ARM_FEATURE_CLZ");
++  builtin_define ("__ARM_FEATURE_IDIV");
++  builtin_define ("__ARM_FEATURE_UNALIGNED");
++  builtin_define ("__ARM_PCS_AAPCS64");
++  builtin_define_with_int_value ("__ARM_SIZEOF_WCHAR_T", WCHAR_TYPE_SIZE / 8);
++}
++
++/* Undefine/redefine macros that depend on the current backend state and may
++   need to change when a target pragma modifies the backend state.  */
++
++static void
++aarch64_update_cpp_builtins (cpp_reader *pfile)
++{
++  aarch64_def_or_undef (flag_unsafe_math_optimizations, "__ARM_FP_FAST", pfile);
++
++  builtin_define_with_int_value ("__ARM_ARCH", aarch64_architecture_version);
++
++  builtin_define_with_int_value ("__ARM_SIZEOF_MINIMAL_ENUM",
++				 flag_short_enums ? 1 : 4);
++  aarch64_def_or_undef (TARGET_BIG_END, "__AARCH64EB__", pfile);
++  aarch64_def_or_undef (TARGET_BIG_END, "__ARM_BIG_ENDIAN", pfile);
++  aarch64_def_or_undef (!TARGET_BIG_END, "__AARCH64EL__", pfile);
++
++  aarch64_def_or_undef (TARGET_FLOAT, "__ARM_FEATURE_FMA", pfile);
++
++  if (TARGET_FLOAT || TARGET_SIMD)
++    {
++      builtin_define_with_int_value ("__ARM_FP", 0x0E);
++      builtin_define ("__ARM_FP16_FORMAT_IEEE");
++      builtin_define ("__ARM_FP16_ARGS");
++    }
++  else
++    cpp_undef (pfile, "__ARM_FP");
++
++  aarch64_def_or_undef (TARGET_SIMD, "__ARM_FEATURE_NUMERIC_MAXMIN", pfile);
++  aarch64_def_or_undef (TARGET_SIMD, "__ARM_NEON", pfile);
++
++
++  aarch64_def_or_undef (TARGET_CRC32, "__ARM_FEATURE_CRC32", pfile);
++
++  cpp_undef (pfile, "__AARCH64_CMODEL_TINY__");
++  cpp_undef (pfile, "__AARCH64_CMODEL_SMALL__");
++  cpp_undef (pfile, "__AARCH64_CMODEL_LARGE__");
++
++  switch (aarch64_cmodel)
++    {
++      case AARCH64_CMODEL_TINY:
++      case AARCH64_CMODEL_TINY_PIC:
++	builtin_define ("__AARCH64_CMODEL_TINY__");
++	break;
++      case AARCH64_CMODEL_SMALL:
++      case AARCH64_CMODEL_SMALL_PIC:
++	builtin_define ("__AARCH64_CMODEL_SMALL__");
++	break;
++      case AARCH64_CMODEL_LARGE:
++	builtin_define ("__AARCH64_CMODEL_LARGE__");
++	break;
++      default:
++	break;
++    }
++
++  aarch64_def_or_undef (TARGET_ILP32, "_ILP32", pfile);
++  aarch64_def_or_undef (TARGET_ILP32, "__ILP32__", pfile);
++
++  aarch64_def_or_undef (TARGET_CRYPTO, "__ARM_FEATURE_CRYPTO", pfile);
++  aarch64_def_or_undef (TARGET_SIMD_RDMA, "__ARM_FEATURE_QRDMX", pfile);
++}
++
++/* Implement TARGET_CPU_CPP_BUILTINS.  */
++
++void
++aarch64_cpu_cpp_builtins (cpp_reader *pfile)
++{
++  aarch64_define_unconditional_macros (pfile);
++  aarch64_update_cpp_builtins (pfile);
++}
++
++/* Hook to validate the current #pragma GCC target and set the state, and
++   update the macros based on what was changed.  If ARGS is NULL, then
++   POP_TARGET is used to reset the options.  */
++
++static bool
++aarch64_pragma_target_parse (tree args, tree pop_target)
++{
++  /* If args is not NULL then process it and setup the target-specific
++     information that it specifies.  */
++  if (args)
++    {
++      if (!aarch64_process_target_attr (args, "pragma"))
++	return false;
++
++      aarch64_override_options_internal (&global_options);
++    }
++
++  /* args is NULL, restore to the state described in pop_target.  */
++  else
++    {
++      pop_target = pop_target ? pop_target : target_option_default_node;
++      cl_target_option_restore (&global_options,
++				TREE_TARGET_OPTION (pop_target));
++    }
++
++  target_option_current_node
++    = build_target_option_node (&global_options);
++
++  aarch64_reset_previous_fndecl ();
++  /* For the definitions, ensure all newly defined macros are considered
++     as used for -Wunused-macros.  There is no point warning about the
++     compiler predefined macros.  */
++  cpp_options *cpp_opts = cpp_get_options (parse_in);
++  unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
++  cpp_opts->warn_unused_macros = 0;
++
++  aarch64_update_cpp_builtins (parse_in);
++
++  cpp_opts->warn_unused_macros = saved_warn_unused_macros;
++
++  /* If we're popping or reseting make sure to update the globals so that
++     the optab availability predicates get recomputed.  */
++  if (pop_target)
++    aarch64_save_restore_target_globals (pop_target);
++
++  /* Initialize SIMD builtins if we haven't already.
++     Set current_target_pragma to NULL for the duration so that
++     the builtin initialization code doesn't try to tag the functions
++     being built with the attributes specified by any current pragma, thus
++     going into an infinite recursion.  */
++  if (TARGET_SIMD)
++    {
++      tree saved_current_target_pragma = current_target_pragma;
++      current_target_pragma = NULL;
++      aarch64_init_simd_builtins ();
++      current_target_pragma = saved_current_target_pragma;
++    }
++
++  return true;
++}
++
++/* Implement REGISTER_TARGET_PRAGMAS.  */
++
++void
++aarch64_register_pragmas (void)
++{
++  /* Update pragma hook to allow parsing #pragma GCC target.  */
++  targetm.target_option.pragma_parse = aarch64_pragma_target_parse;
++}
+--- a/src/gcc/config/aarch64/aarch64-cores.def
++++ b/src/gcc/config/aarch64/aarch64-cores.def
+@@ -21,27 +21,36 @@
+ 
+    Before using #include to read this file, define a macro:
+ 
+-      AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHEDULER_IDENT, ARCH, FLAGS, COSTS)
++      AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHEDULER_IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART)
+ 
+    The CORE_NAME is the name of the core, represented as a string constant.
+    The CORE_IDENT is the name of the core, represented as an identifier.
+    The SCHEDULER_IDENT is the name of the core for which scheduling decisions
+    will be made, represented as an identifier.
+-   ARCH is the architecture revision implemented by the chip.
++   ARCH_IDENT is the architecture implemented by the chip as specified in
++   aarch64-arches.def.
+    FLAGS are the bitwise-or of the traits that apply to that core.
+    This need not include flags implied by the architecture.
+-   COSTS is the name of the rtx_costs routine to use.  */
++   COSTS is the name of the rtx_costs routine to use.
++   IMP is the implementer ID of the CPU vendor.  On a GNU/Linux system it can
++   be found in /proc/cpuinfo.
++   PART is the part number of the CPU.  On a GNU/Linux system it can be found
++   in /proc/cpuinfo.  For big.LITTLE systems this should have the form at of
++   "<big core part number>.<LITTLE core part number>".  */
+ 
+ /* V8 Architecture Processors.  */
+ 
+-AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53)
+-AARCH64_CORE("cortex-a57",  cortexa57, cortexa57, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+-AARCH64_CORE("cortex-a72",  cortexa72, cortexa57, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+-AARCH64_CORE("exynos-m1",   exynosm1,  cortexa57, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57)
+-AARCH64_CORE("thunderx",    thunderx,  thunderx, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx)
+-AARCH64_CORE("xgene1",      xgene1,    xgene1,    8,  AARCH64_FL_FOR_ARCH8, xgene1)
++AARCH64_CORE("cortex-a35",  cortexa35, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, "0x41", "0xd04")
++AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03")
++AARCH64_CORE("cortex-a57",  cortexa57, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07")
++AARCH64_CORE("cortex-a72",  cortexa72, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
++AARCH64_CORE("exynos-m1",   exynosm1,  cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, "0x53", "0x001")
++AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800")
++AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  "0x43", "0x0a1")
++AARCH64_CORE("xgene1",      xgene1,    xgene1,    8A,  AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
+ 
+ /* V8 big.LITTLE implementations.  */
+ 
+-AARCH64_CORE("cortex-a57.cortex-a53",  cortexa57cortexa53, cortexa53, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+-AARCH64_CORE("cortex-a72.cortex-a53",  cortexa72cortexa53, cortexa53, 8,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
++AARCH64_CORE("cortex-a57.cortex-a53",  cortexa57cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03")
++AARCH64_CORE("cortex-a72.cortex-a53",  cortexa72cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08.0xd03")
++
+--- a/src/gcc/config/aarch64/aarch64-cost-tables.h
++++ b/src/gcc/config/aarch64/aarch64-cost-tables.h
+@@ -83,7 +83,9 @@ const struct cpu_cost_table thunderx_extra_costs =
+     0,			/* N/A: Stm_regs_per_insn_subsequent.  */
+     0,			/* Storef.  */
+     0,			/* Stored.  */
+-    COSTS_N_INSNS (1)  /* Store_unaligned.  */
++    COSTS_N_INSNS (1),	/* Store_unaligned.  */
++    COSTS_N_INSNS (1),	/* Loadv.  */
++    COSTS_N_INSNS (1)	/* Storev.  */
+   },
+   {
+     /* FP SFmode */
+--- a/src/gcc/config/aarch64/aarch64-elf-raw.h
++++ b/src/gcc/config/aarch64/aarch64-elf-raw.h
+@@ -27,7 +27,7 @@
+   " crtend%O%s crtn%O%s " \
+   "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
+ 
+-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
++#if TARGET_FIX_ERR_A53_835769_DEFAULT
+ #define CA53_ERR_835769_SPEC \
+   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #else
+@@ -35,7 +35,7 @@
+   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #endif
+ 
+-#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
++#if TARGET_FIX_ERR_A53_843419_DEFAULT
+ #define CA53_ERR_843419_SPEC \
+   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+ #else
+--- a/src/gcc/config/aarch64/aarch64-elf.h
++++ b/src/gcc/config/aarch64/aarch64-elf.h
+@@ -132,7 +132,8 @@
+ #undef DRIVER_SELF_SPECS
+ #define DRIVER_SELF_SPECS \
+   " %{!mbig-endian:%{!mlittle-endian:" ENDIAN_SPEC "}}" \
+-  " %{!mabi=*:" ABI_SPEC "}"
++  " %{!mabi=*:" ABI_SPEC "}" \
++  MCPU_MTUNE_NATIVE_SPECS
+ 
+ #ifdef HAVE_AS_MABI_OPTION
+ #define ASM_MABI_SPEC	"%{mabi=*:-mabi=%*}"
+@@ -152,9 +153,6 @@ ASM_MABI_SPEC
+ #undef TYPE_OPERAND_FMT
+ #define TYPE_OPERAND_FMT	"%%%s"
+ 
+-#undef TARGET_ASM_NAMED_SECTION
+-#define TARGET_ASM_NAMED_SECTION  aarch64_elf_asm_named_section
+-
+ /* Stabs debug not required.  */
+ #undef DBX_DEBUGGING_INFO
+ 
+--- /dev/null
++++ b/src/gcc/config/aarch64/aarch64-fusion-pairs.def
+@@ -0,0 +1,37 @@
++/* Copyright (C) 2015 Free Software Foundation, Inc.
++   Contributed by ARM Ltd.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++/* Pairs of instructions which can be fused. before including this file,
++   define a macro:
++
++     AARCH64_FUSION_PAIR (name, internal_name)
++
++   Where:
++
++     NAME is a string giving a friendly name for the instructions to fuse.
++     INTERNAL_NAME gives the internal name suitable for appending to
++     AARCH64_FUSE_ to give an enum name. */
++
++AARCH64_FUSION_PAIR ("mov+movk", MOV_MOVK)
++AARCH64_FUSION_PAIR ("adrp+add", ADRP_ADD)
++AARCH64_FUSION_PAIR ("movk+movk", MOVK_MOVK)
++AARCH64_FUSION_PAIR ("adrp+ldr", ADRP_LDR)
++AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH)
++AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC)
++
+--- a/src/gcc/config/aarch64/aarch64-ldpstp.md
++++ b/src/gcc/config/aarch64/aarch64-ldpstp.md
+@@ -80,9 +80,9 @@
+ 
+ (define_peephole2
+   [(set (match_operand:GPF 0 "aarch64_mem_pair_operand" "")
+-	(match_operand:GPF 1 "register_operand" ""))
++	(match_operand:GPF 1 "aarch64_reg_or_fp_zero" ""))
+    (set (match_operand:GPF 2 "memory_operand" "")
+-	(match_operand:GPF 3 "register_operand" ""))]
++	(match_operand:GPF 3 "aarch64_reg_or_fp_zero" ""))]
+   "aarch64_operands_ok_for_ldpstp (operands, false, <MODE>mode)"
+   [(parallel [(set (match_dup 0) (match_dup 1))
+ 	      (set (match_dup 2) (match_dup 3))])]
+@@ -98,6 +98,47 @@
+     }
+ })
+ 
++(define_peephole2
++  [(set (match_operand:VD 0 "register_operand" "")
++	(match_operand:VD 1 "aarch64_mem_pair_operand" ""))
++   (set (match_operand:VD 2 "register_operand" "")
++	(match_operand:VD 3 "memory_operand" ""))]
++  "aarch64_operands_ok_for_ldpstp (operands, true, <MODE>mode)"
++  [(parallel [(set (match_dup 0) (match_dup 1))
++	      (set (match_dup 2) (match_dup 3))])]
++{
++  rtx base, offset_1, offset_2;
++
++  extract_base_offset_in_addr (operands[1], &base, &offset_1);
++  extract_base_offset_in_addr (operands[3], &base, &offset_2);
++  if (INTVAL (offset_1) > INTVAL (offset_2))
++    {
++      std::swap (operands[0], operands[2]);
++      std::swap (operands[1], operands[3]);
++    }
++})
++
++(define_peephole2
++  [(set (match_operand:VD 0 "aarch64_mem_pair_operand" "")
++	(match_operand:VD 1 "register_operand" ""))
++   (set (match_operand:VD 2 "memory_operand" "")
++	(match_operand:VD 3 "register_operand" ""))]
++  "TARGET_SIMD && aarch64_operands_ok_for_ldpstp (operands, false, <MODE>mode)"
++  [(parallel [(set (match_dup 0) (match_dup 1))
++	      (set (match_dup 2) (match_dup 3))])]
++{
++  rtx base, offset_1, offset_2;
++
++  extract_base_offset_in_addr (operands[0], &base, &offset_1);
++  extract_base_offset_in_addr (operands[2], &base, &offset_2);
++  if (INTVAL (offset_1) > INTVAL (offset_2))
++    {
++      std::swap (operands[0], operands[2]);
++      std::swap (operands[1], operands[3]);
++    }
++})
++
++
+ ;; Handle sign/zero extended consecutive load/store.
+ 
+ (define_peephole2
+@@ -308,13 +349,13 @@
+ (define_peephole2
+   [(match_scratch:DI 8 "r")
+    (set (match_operand:GPF 0 "memory_operand" "")
+-	(match_operand:GPF 1 "aarch64_reg_or_zero" ""))
++	(match_operand:GPF 1 "aarch64_reg_or_fp_zero" ""))
+    (set (match_operand:GPF 2 "memory_operand" "")
+-	(match_operand:GPF 3 "aarch64_reg_or_zero" ""))
++	(match_operand:GPF 3 "aarch64_reg_or_fp_zero" ""))
+    (set (match_operand:GPF 4 "memory_operand" "")
+-	(match_operand:GPF 5 "aarch64_reg_or_zero" ""))
++	(match_operand:GPF 5 "aarch64_reg_or_fp_zero" ""))
+    (set (match_operand:GPF 6 "memory_operand" "")
+-	(match_operand:GPF 7 "aarch64_reg_or_zero" ""))
++	(match_operand:GPF 7 "aarch64_reg_or_fp_zero" ""))
+    (match_dup 8)]
+   "aarch64_operands_adjust_ok_for_ldpstp (operands, false, <MODE>mode)"
+   [(const_int 0)]
+--- a/src/gcc/config/aarch64/aarch64-linux.h
++++ b/src/gcc/config/aarch64/aarch64-linux.h
+@@ -23,6 +23,9 @@
+ 
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
+ 
++#undef MUSL_DYNAMIC_LINKER
++#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
++
+ #undef  ASAN_CC1_SPEC
+ #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
+ 
+@@ -42,7 +45,7 @@
+    %{mbig-endian:-EB} %{mlittle-endian:-EL}     \
+    -maarch64linux%{mabi=ilp32:32}%{mbig-endian:b}"
+ 
+-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
++#if TARGET_FIX_ERR_A53_835769_DEFAULT
+ #define CA53_ERR_835769_SPEC \
+   " %{!mno-fix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #else
+@@ -50,7 +53,7 @@
+   " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}"
+ #endif
+ 
+-#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT
++#if TARGET_FIX_ERR_A53_843419_DEFAULT
+ #define CA53_ERR_843419_SPEC \
+   " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}"
+ #else
+--- a/src/gcc/config/aarch64/aarch64-modes.def
++++ b/src/gcc/config/aarch64/aarch64-modes.def
+@@ -37,6 +37,10 @@ CC_MODE (CC_DLTU);
+ CC_MODE (CC_DGEU);
+ CC_MODE (CC_DGTU);
+ 
++/* Half-precision floating point for __fp16.  */
++FLOAT_MODE (HF, 2, 0);
++ADJUST_FLOAT_FORMAT (HF, &ieee_half_format);
++
+ /* Vector modes.  */
+ VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI.  */
+ VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI.  */
+@@ -47,9 +51,8 @@ VECTOR_MODE (FLOAT, DF, 1);   /*                 V1DF.  */
+ /* Oct Int: 256-bit integer mode needed for 32-byte vector arguments.  */
+ INT_MODE (OI, 32);
+ 
+-/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is
+-   TImode).  */
+-INT_MODE (EI, 24);
++/* Opaque integer modes for 3 or 4 Neon q-registers / 6 or 8 Neon d-registers
++   (2 d-regs = 1 q-reg = TImode).  */
+ INT_MODE (CI, 48);
+ INT_MODE (XI, 64);
+ 
+--- a/src/gcc/config/aarch64/aarch64-option-extensions.def
++++ b/src/gcc/config/aarch64/aarch64-option-extensions.def
+@@ -21,18 +21,37 @@
+ 
+    Before using #include to read this file, define a macro:
+ 
+-      AARCH64_OPT_EXTENSION(EXT_NAME, FLAGS_ON, FLAGS_OFF)
++      AARCH64_OPT_EXTENSION(EXT_NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, FEATURE_STRING)
+ 
+    EXT_NAME is the name of the extension, represented as a string constant.
+-   FLAGS_ON are the bitwise-or of the features that the extension adds.
+-   FLAGS_OFF are the bitwise-or of the features that the extension removes.  */
+-
+-/* V8 Architecture Extensions.
+-   This list currently contains example extensions for CPUs that implement
+-   AArch64, and therefore serves as a template for adding more CPUs in the
+-   future.  */
+-
+-AARCH64_OPT_EXTENSION("fp",	AARCH64_FL_FP,	AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO)
+-AARCH64_OPT_EXTENSION("simd",	AARCH64_FL_FPSIMD,	AARCH64_FL_SIMD | AARCH64_FL_CRYPTO)
+-AARCH64_OPT_EXTENSION("crypto",	AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD,	AARCH64_FL_CRYPTO)
+-AARCH64_OPT_EXTENSION("crc",	AARCH64_FL_CRC,	AARCH64_FL_CRC)
++   FLAGS_CANONICAL is the canonical internal name for this flag.
++   FLAGS_ON are the bitwise-or of the features that enabling the extension
++   adds, or zero if enabling this extension has no effect on other features.
++   FLAGS_OFF are the bitwise-or of the features that disabling the extension
++   removes, or zero if disabling this extension has no effect on other
++   features.
++   FEAT_STRING is a string containing the entries in the 'Features' field of
++   /proc/cpuinfo on a GNU/Linux system that correspond to this architecture
++   extension being available.  Sometimes multiple entries are needed to enable
++   the extension (for example, the 'crypto' extension depends on four
++   entries: aes, pmull, sha1, sha2 being present).  In that case this field
++   should contain a space (" ") separated list of the strings in 'Features'
++   that are required.  Their order is not important.  */
++
++/* Enabling "fp" just enables "fp".
++   Disabling "fp" also disables "simd", "crypto".  */
++AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, 0, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO, "fp")
++
++/* Enabling "simd" also enables "fp".
++   Disabling "simd" also disables "crypto".  */
++AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP, AARCH64_FL_CRYPTO, "asimd")
++
++/* Enabling "crypto" also enables "fp", "simd".
++   Disabling "crypto" just disables "crypto".  */
++AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | AARCH64_FL_SIMD, 0, "aes pmull sha1 sha2")
++
++/* Enabling or disabling "crc" only changes "crc".  */
++AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, "crc32")
++
++/* Enabling or disabling "lse" only changes "lse".  */
++AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, "atomics")
+--- a/src/gcc/config/aarch64/aarch64-opts.h
++++ b/src/gcc/config/aarch64/aarch64-opts.h
+@@ -25,7 +25,7 @@
+ /* The various cores that implement AArch64.  */
+ enum aarch64_processor
+ {
+-#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS) \
++#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
+   INTERNAL_IDENT,
+ #include "aarch64-cores.def"
+ #undef AARCH64_CORE
+@@ -35,6 +35,15 @@ enum aarch64_processor
+   aarch64_none
+ };
+ 
++enum aarch64_arch
++{
++#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
++  AARCH64_ARCH_##ARCH_IDENT,
++#include "aarch64-arches.def"
++#undef AARCH64_ARCH
++  aarch64_no_arch
++};
++
+ /* TLS types.  */
+ enum aarch64_tls_type {
+   TLS_TRADITIONAL,
+@@ -56,6 +65,9 @@ enum aarch64_code_model {
+   /* Static code, data and GOT/PLT fit within a 4GB region.
+      The default PIC code model.  */
+   AARCH64_CMODEL_SMALL_PIC,
++  /* -fpic for small memory model.
++     GOT size to 28KiB (4K*8-4K) or 3580 entries.  */
++  AARCH64_CMODEL_SMALL_SPIC,
+   /* No assumptions about addresses of code and data.
+      The PIC variant is not yet implemented.  */
+   AARCH64_CMODEL_LARGE
+--- a/src/gcc/config/aarch64/aarch64-protos.h
++++ b/src/gcc/config/aarch64/aarch64-protos.h
+@@ -22,17 +22,7 @@
+ #ifndef GCC_AARCH64_PROTOS_H
+ #define GCC_AARCH64_PROTOS_H
+ 
+-/*
+-  SYMBOL_CONTEXT_ADR
+-  The symbol is used in a load-address operation.
+-  SYMBOL_CONTEXT_MEM
+-  The symbol is used as the address in a MEM.
+- */
+-enum aarch64_symbol_context
+-{
+-  SYMBOL_CONTEXT_MEM,
+-  SYMBOL_CONTEXT_ADR
+-};
++#include "input.h"
+ 
+ /* SYMBOL_SMALL_ABSOLUTE: Generate symbol accesses through
+    high and lo relocs that calculate the base address using a PC
+@@ -49,23 +39,35 @@ enum aarch64_symbol_context
+ 
+    This corresponds to the small code model of the compiler.
+ 
+-   SYMBOL_SMALL_GOT: Similar to the one above but this
++   SYMBOL_SMALL_GOT_4G: Similar to the one above but this
+    gives us the GOT entry of the symbol being referred to :
+    Thus calculating the GOT entry for foo is done using the
+    following sequence of instructions.  The ADRP instruction
+    gets us to the page containing the GOT entry of the symbol
+-   and the got_lo12 gets us the actual offset in it.
++   and the got_lo12 gets us the actual offset in it, together
++   the base and offset, we can address 4G size GOT table.
+ 
+    adrp  x0, :got:foo
+    ldr   x0, [x0, :gotoff_lo12:foo]
+ 
+    This corresponds to the small PIC model of the compiler.
+ 
++   SYMBOL_SMALL_GOT_28K: Similar to SYMBOL_SMALL_GOT_4G, but used for symbol
++   restricted within 28K GOT table size.
++
++   ldr reg, [gp, #:gotpage_lo15:sym]
++
++   This corresponds to -fpic model for small memory model of the compiler.
++
+    SYMBOL_SMALL_TLSGD
+    SYMBOL_SMALL_TLSDESC
+-   SYMBOL_SMALL_GOTTPREL
+-   SYMBOL_SMALL_TPREL
+-   Each of of these represents a thread-local symbol, and corresponds to the
++   SYMBOL_SMALL_TLSIE
++   SYMBOL_TINY_TLSIE
++   SYMBOL_TLSLE12
++   SYMBOL_TLSLE24
++   SYMBOL_TLSLE32
++   SYMBOL_TLSLE48
++   Each of these represents a thread-local symbol, and corresponds to the
+    thread local storage relocation operator for the symbol being referred to.
+ 
+    SYMBOL_TINY_ABSOLUTE
+@@ -94,13 +96,18 @@ enum aarch64_symbol_context
+ enum aarch64_symbol_type
+ {
+   SYMBOL_SMALL_ABSOLUTE,
+-  SYMBOL_SMALL_GOT,
++  SYMBOL_SMALL_GOT_28K,
++  SYMBOL_SMALL_GOT_4G,
+   SYMBOL_SMALL_TLSGD,
+   SYMBOL_SMALL_TLSDESC,
+-  SYMBOL_SMALL_GOTTPREL,
+-  SYMBOL_SMALL_TPREL,
++  SYMBOL_SMALL_TLSIE,
+   SYMBOL_TINY_ABSOLUTE,
+   SYMBOL_TINY_GOT,
++  SYMBOL_TINY_TLSIE,
++  SYMBOL_TLSLE12,
++  SYMBOL_TLSLE24,
++  SYMBOL_TLSLE32,
++  SYMBOL_TLSLE48,
+   SYMBOL_FORCE_TO_MEM
+ };
+ 
+@@ -127,7 +134,8 @@ struct cpu_addrcost_table
+   const int pre_modify;
+   const int post_modify;
+   const int register_offset;
+-  const int register_extend;
++  const int register_sextend;
++  const int register_zextend;
+   const int imm_offset;
+ };
+ 
+@@ -162,28 +170,117 @@ struct cpu_vector_cost
+   const int cond_not_taken_branch_cost;  /* Cost of not taken branch.  */
+ };
+ 
++/* Branch costs.  */
++struct cpu_branch_cost
++{
++  const int predictable;    /* Predictable branch or optimizing for size.  */
++  const int unpredictable;  /* Unpredictable branch or optimizing for speed.  */
++};
++
+ struct tune_params
+ {
+-  const struct cpu_cost_table *const insn_extra_cost;
+-  const struct cpu_addrcost_table *const addr_cost;
+-  const struct cpu_regmove_cost *const regmove_cost;
+-  const struct cpu_vector_cost *const vec_costs;
+-  const int memmov_cost;
+-  const int issue_rate;
+-  const unsigned int fuseable_ops;
+-  const int function_align;
+-  const int jump_align;
+-  const int loop_align;
+-  const int int_reassoc_width;
+-  const int fp_reassoc_width;
+-  const int vec_reassoc_width;
++  const struct cpu_cost_table *insn_extra_cost;
++  const struct cpu_addrcost_table *addr_cost;
++  const struct cpu_regmove_cost *regmove_cost;
++  const struct cpu_vector_cost *vec_costs;
++  const struct cpu_branch_cost *branch_costs;
++  int memmov_cost;
++  int issue_rate;
++  unsigned int fusible_ops;
++  int function_align;
++  int jump_align;
++  int loop_align;
++  int int_reassoc_width;
++  int fp_reassoc_width;
++  int vec_reassoc_width;
++  int min_div_recip_mul_sf;
++  int min_div_recip_mul_df;
++  /* Value for aarch64_case_values_threshold; or 0 for the default.  */
++  unsigned int max_case_values;
++  /* Value for PARAM_L1_CACHE_LINE_SIZE; or 0 to use the default.  */
++  unsigned int cache_line_size;
++
++/* An enum specifying how to take into account CPU autoprefetch capabilities
++   during instruction scheduling:
++   - AUTOPREFETCHER_OFF: Do not take autoprefetch capabilities into account.
++   - AUTOPREFETCHER_WEAK: Attempt to sort sequences of loads/store in order of
++   offsets but allow the pipeline hazard recognizer to alter that order to
++   maximize multi-issue opportunities.
++   - AUTOPREFETCHER_STRONG: Attempt to sort sequences of loads/store in order of
++   offsets and prefer this even if it restricts multi-issue opportunities.  */
++
++  enum aarch64_autoprefetch_model
++  {
++    AUTOPREFETCHER_OFF,
++    AUTOPREFETCHER_WEAK,
++    AUTOPREFETCHER_STRONG
++  } autoprefetcher_model;
++
++  unsigned int extra_tuning_flags;
++};
++
++#define AARCH64_FUSION_PAIR(x, name) \
++  AARCH64_FUSE_##name##_index, 
++/* Supported fusion operations.  */
++enum aarch64_fusion_pairs_index
++{
++#include "aarch64-fusion-pairs.def"
++  AARCH64_FUSE_index_END
++};
++#undef AARCH64_FUSION_PAIR
++
++#define AARCH64_FUSION_PAIR(x, name) \
++  AARCH64_FUSE_##name = (1u << AARCH64_FUSE_##name##_index),
++/* Supported fusion operations.  */
++enum aarch64_fusion_pairs
++{
++  AARCH64_FUSE_NOTHING = 0,
++#include "aarch64-fusion-pairs.def"
++  AARCH64_FUSE_ALL = (1u << AARCH64_FUSE_index_END) - 1
++};
++#undef AARCH64_FUSION_PAIR
++
++#define AARCH64_EXTRA_TUNING_OPTION(x, name) \
++  AARCH64_EXTRA_TUNE_##name##_index,
++/* Supported tuning flags indexes.  */
++enum aarch64_extra_tuning_flags_index
++{
++#include "aarch64-tuning-flags.def"
++  AARCH64_EXTRA_TUNE_index_END
+ };
++#undef AARCH64_EXTRA_TUNING_OPTION
++
++
++#define AARCH64_EXTRA_TUNING_OPTION(x, name) \
++  AARCH64_EXTRA_TUNE_##name = (1u << AARCH64_EXTRA_TUNE_##name##_index),
++/* Supported tuning flags.  */
++enum aarch64_extra_tuning_flags
++{
++  AARCH64_EXTRA_TUNE_NONE = 0,
++#include "aarch64-tuning-flags.def"
++  AARCH64_EXTRA_TUNE_ALL = (1u << AARCH64_EXTRA_TUNE_index_END) - 1
++};
++#undef AARCH64_EXTRA_TUNING_OPTION
++
++/* Enum describing the various ways that the
++   aarch64_parse_{arch,tune,cpu,extension} functions can fail.
++   This way their callers can choose what kind of error to give.  */
++
++enum aarch64_parse_opt_result
++{
++  AARCH64_PARSE_OK,			/* Parsing was successful.  */
++  AARCH64_PARSE_MISSING_ARG,		/* Missing argument.  */
++  AARCH64_PARSE_INVALID_FEATURE,	/* Invalid feature modifier.  */
++  AARCH64_PARSE_INVALID_ARG		/* Invalid arch, tune, cpu arg.  */
++};
++
++extern struct tune_params aarch64_tune_params;
+ 
+ HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
+ int aarch64_get_condition_code (rtx);
+ bool aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode);
+-enum aarch64_symbol_type
+-aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context);
++int aarch64_branch_cost (bool, bool);
++enum aarch64_symbol_type aarch64_classify_symbolic_expression (rtx);
+ bool aarch64_cannot_change_mode_class (machine_mode,
+ 				       machine_mode,
+ 				       enum reg_class);
+@@ -196,14 +293,15 @@ bool aarch64_gen_movmemqi (rtx *);
+ bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *);
+ bool aarch64_is_extend_from_extract (machine_mode, rtx, rtx);
+ bool aarch64_is_long_call_p (rtx);
++bool aarch64_is_noplt_call_p (rtx);
+ bool aarch64_label_mentioned_p (rtx);
++void aarch64_declare_function_name (FILE *, const char*, tree);
+ bool aarch64_legitimate_pic_operand_p (rtx);
+ bool aarch64_modes_tieable_p (machine_mode mode1,
+ 			      machine_mode mode2);
+ bool aarch64_zero_extend_const_eq (machine_mode, rtx, machine_mode, rtx);
+ bool aarch64_move_imm (HOST_WIDE_INT, machine_mode);
+-bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context,
+-			    machine_mode);
++bool aarch64_mov_operand_p (rtx, machine_mode);
+ int aarch64_simd_attr_length_rglist (enum machine_mode);
+ rtx aarch64_reverse_mask (enum machine_mode);
+ bool aarch64_offset_7bit_signed_scaled_p (machine_mode, HOST_WIDE_INT);
+@@ -226,10 +324,8 @@ bool aarch64_uimm12_shift (HOST_WIDE_INT);
+ bool aarch64_use_return_insn_p (void);
+ const char *aarch64_mangle_builtin_type (const_tree);
+ const char *aarch64_output_casesi (rtx *);
+-const char *aarch64_rewrite_selected_cpu (const char *name);
+ 
+-enum aarch64_symbol_type aarch64_classify_symbol (rtx, rtx,
+-						  enum aarch64_symbol_context);
++enum aarch64_symbol_type aarch64_classify_symbol (rtx, rtx);
+ enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx);
+ enum reg_class aarch64_regno_regclass (unsigned);
+ int aarch64_asm_preferred_eh_data_format (int, int);
+@@ -241,6 +337,7 @@ int aarch64_simd_attr_length_move (rtx_insn *);
+ int aarch64_uxt_size (int, HOST_WIDE_INT);
+ rtx aarch64_final_eh_return_addr (void);
+ rtx aarch64_legitimize_reload_address (rtx *, machine_mode, int, int, int);
++rtx aarch64_mask_from_zextract_ops (rtx, rtx);
+ const char *aarch64_output_move_struct (rtx *operands);
+ rtx aarch64_return_addr (int, rtx);
+ rtx aarch64_simd_gen_const_vector_dup (machine_mode, int);
+@@ -251,7 +348,10 @@ tree aarch64_fold_builtin (tree, int, tree *, bool);
+ unsigned aarch64_dbx_register_number (unsigned);
+ unsigned aarch64_trampoline_size (void);
+ void aarch64_asm_output_labelref (FILE *, const char *);
++void aarch64_cpu_cpp_builtins (cpp_reader *);
+ void aarch64_elf_asm_named_section (const char *, unsigned, tree);
++const char * aarch64_gen_far_branch (rtx *, int, const char *, const char *);
++void aarch64_err_no_fpadvsimd (machine_mode, const char *);
+ void aarch64_expand_epilogue (bool);
+ void aarch64_expand_mov_immediate (rtx, rtx);
+ void aarch64_expand_prologue (void);
+@@ -259,21 +359,20 @@ void aarch64_expand_vector_init (rtx, rtx);
+ void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx,
+ 				   const_tree, unsigned);
+ void aarch64_init_expanders (void);
++void aarch64_init_simd_builtins (void);
+ void aarch64_print_operand (FILE *, rtx, char);
+ void aarch64_print_operand_address (FILE *, rtx);
+ void aarch64_emit_call_insn (rtx);
++void aarch64_register_pragmas (void);
++void aarch64_relayout_simd_types (void);
++void aarch64_reset_previous_fndecl (void);
++void aarch64_save_restore_target_globals (tree);
+ 
+ /* Initialize builtins for SIMD intrinsics.  */
+ void init_aarch64_simd_builtins (void);
+ 
+ void aarch64_simd_emit_reg_reg_move (rtx *, enum machine_mode, unsigned int);
+ 
+-/* Emit code to place a AdvSIMD pair result in memory locations (with equal
+-   registers).  */
+-void aarch64_simd_emit_pair_result_insn (machine_mode,
+-					 rtx (*intfn) (rtx, rtx, rtx), rtx,
+-					 rtx);
+-
+ /* Expand builtins for SIMD intrinsics.  */
+ rtx aarch64_simd_expand_builtin (int, tree, rtx);
+ 
+@@ -299,12 +398,20 @@ rtx aarch64_load_tp (rtx);
+ 
+ void aarch64_expand_compare_and_swap (rtx op[]);
+ void aarch64_split_compare_and_swap (rtx op[]);
++void aarch64_gen_atomic_cas (rtx, rtx, rtx, rtx, rtx);
++
++bool aarch64_atomic_ldop_supported_p (enum rtx_code);
++void aarch64_gen_atomic_ldop (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
+ void aarch64_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
+ 
+ bool aarch64_gen_adjusted_ldpstp (rtx *, bool, enum machine_mode, RTX_CODE);
+ #endif /* RTX_CODE */
+ 
+ void aarch64_init_builtins (void);
++
++bool aarch64_process_target_attr (tree, const char*);
++void aarch64_override_options_internal (struct gcc_options *);
++
+ rtx aarch64_expand_builtin (tree exp,
+ 			    rtx target,
+ 			    rtx subtarget ATTRIBUTE_UNUSED,
+@@ -329,4 +436,15 @@ int aarch64_ccmp_mode_to_code (enum machine_mode mode);
+ bool extract_base_offset_in_addr (rtx mem, rtx *base, rtx *offset);
+ bool aarch64_operands_ok_for_ldpstp (rtx *, bool, enum machine_mode);
+ bool aarch64_operands_adjust_ok_for_ldpstp (rtx *, bool, enum machine_mode);
++extern bool aarch64_nopcrelative_literal_loads;
++
++/* Defined in common/config/aarch64-common.c.  */
++bool aarch64_handle_option (struct gcc_options *, struct gcc_options *,
++			     const struct cl_decoded_option *, location_t);
++const char *aarch64_rewrite_selected_cpu (const char *name);
++enum aarch64_parse_opt_result aarch64_parse_extension (const char *,
++						       unsigned long *);
++std::string aarch64_get_extension_string_for_isa_flags (unsigned long,
++							unsigned long);
++
+ #endif /* GCC_AARCH64_PROTOS_H */
+--- a/src/gcc/config/aarch64/aarch64-simd-builtin-types.def
++++ b/src/gcc/config/aarch64/aarch64-simd-builtin-types.def
+@@ -44,6 +44,8 @@
+   ENTRY (Poly16x8_t, V8HI, poly, 12)
+   ENTRY (Poly64x1_t, DI, poly, 12)
+   ENTRY (Poly64x2_t, V2DI, poly, 12)
++  ENTRY (Float16x4_t, V4HF, none, 13)
++  ENTRY (Float16x8_t, V8HF, none, 13)
+   ENTRY (Float32x2_t, V2SF, none, 13)
+   ENTRY (Float32x4_t, V4SF, none, 13)
+   ENTRY (Float64x1_t, V1DF, none, 13)
+--- a/src/gcc/config/aarch64/aarch64-simd-builtins.def
++++ b/src/gcc/config/aarch64/aarch64-simd-builtins.def
+@@ -88,9 +88,9 @@
+   BUILTIN_VALLDIF (LOADSTRUCT, ld3r, 0)
+   BUILTIN_VALLDIF (LOADSTRUCT, ld4r, 0)
+   /* Implemented by aarch64_ld<VSTRUCT:nregs>_lane<VQ:mode>.  */
+-  BUILTIN_VQ (LOADSTRUCT_LANE, ld2_lane, 0)
+-  BUILTIN_VQ (LOADSTRUCT_LANE, ld3_lane, 0)
+-  BUILTIN_VQ (LOADSTRUCT_LANE, ld4_lane, 0)
++  BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld2_lane, 0)
++  BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld3_lane, 0)
++  BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld4_lane, 0)
+   /* Implemented by aarch64_st<VSTRUCT:nregs><VDC:mode>.  */
+   BUILTIN_VDC (STORESTRUCT, st2, 0)
+   BUILTIN_VDC (STORESTRUCT, st3, 0)
+@@ -100,9 +100,9 @@
+   BUILTIN_VQ (STORESTRUCT, st3, 0)
+   BUILTIN_VQ (STORESTRUCT, st4, 0)
+ 
+-  BUILTIN_VQ (STORESTRUCT_LANE, st2_lane, 0)
+-  BUILTIN_VQ (STORESTRUCT_LANE, st3_lane, 0)
+-  BUILTIN_VQ (STORESTRUCT_LANE, st4_lane, 0)
++  BUILTIN_VALLDIF (STORESTRUCT_LANE, st2_lane, 0)
++  BUILTIN_VALLDIF (STORESTRUCT_LANE, st3_lane, 0)
++  BUILTIN_VALLDIF (STORESTRUCT_LANE, st4_lane, 0)
+ 
+   BUILTIN_VQW (BINOP, saddl2, 0)
+   BUILTIN_VQW (BINOP, uaddl2, 0)
+@@ -274,9 +274,9 @@
+   VAR1 (UNOP, lbtruncv4sf, 2, v4si)
+   VAR1 (UNOP, lbtruncv2df, 2, v2di)
+ 
+-  VAR1 (UNOP, lbtruncuv2sf, 2, v2si)
+-  VAR1 (UNOP, lbtruncuv4sf, 2, v4si)
+-  VAR1 (UNOP, lbtruncuv2df, 2, v2di)
++  VAR1 (UNOPUS, lbtruncuv2sf, 2, v2si)
++  VAR1 (UNOPUS, lbtruncuv4sf, 2, v4si)
++  VAR1 (UNOPUS, lbtruncuv2df, 2, v2di)
+ 
+   VAR1 (UNOP, lroundv2sf, 2, v2si)
+   VAR1 (UNOP, lroundv4sf, 2, v4si)
+@@ -285,31 +285,31 @@
+   VAR1 (UNOP, lroundsf, 2, si)
+   VAR1 (UNOP, lrounddf, 2, di)
+ 
+-  VAR1 (UNOP, lrounduv2sf, 2, v2si)
+-  VAR1 (UNOP, lrounduv4sf, 2, v4si)
+-  VAR1 (UNOP, lrounduv2df, 2, v2di)
+-  VAR1 (UNOP, lroundusf, 2, si)
+-  VAR1 (UNOP, lroundudf, 2, di)
++  VAR1 (UNOPUS, lrounduv2sf, 2, v2si)
++  VAR1 (UNOPUS, lrounduv4sf, 2, v4si)
++  VAR1 (UNOPUS, lrounduv2df, 2, v2di)
++  VAR1 (UNOPUS, lroundusf, 2, si)
++  VAR1 (UNOPUS, lroundudf, 2, di)
+ 
+   VAR1 (UNOP, lceilv2sf, 2, v2si)
+   VAR1 (UNOP, lceilv4sf, 2, v4si)
+   VAR1 (UNOP, lceilv2df, 2, v2di)
+ 
+-  VAR1 (UNOP, lceiluv2sf, 2, v2si)
+-  VAR1 (UNOP, lceiluv4sf, 2, v4si)
+-  VAR1 (UNOP, lceiluv2df, 2, v2di)
+-  VAR1 (UNOP, lceilusf, 2, si)
+-  VAR1 (UNOP, lceiludf, 2, di)
++  VAR1 (UNOPUS, lceiluv2sf, 2, v2si)
++  VAR1 (UNOPUS, lceiluv4sf, 2, v4si)
++  VAR1 (UNOPUS, lceiluv2df, 2, v2di)
++  VAR1 (UNOPUS, lceilusf, 2, si)
++  VAR1 (UNOPUS, lceiludf, 2, di)
+ 
+   VAR1 (UNOP, lfloorv2sf, 2, v2si)
+   VAR1 (UNOP, lfloorv4sf, 2, v4si)
+   VAR1 (UNOP, lfloorv2df, 2, v2di)
+ 
+-  VAR1 (UNOP, lflooruv2sf, 2, v2si)
+-  VAR1 (UNOP, lflooruv4sf, 2, v4si)
+-  VAR1 (UNOP, lflooruv2df, 2, v2di)
+-  VAR1 (UNOP, lfloorusf, 2, si)
+-  VAR1 (UNOP, lfloorudf, 2, di)
++  VAR1 (UNOPUS, lflooruv2sf, 2, v2si)
++  VAR1 (UNOPUS, lflooruv4sf, 2, v4si)
++  VAR1 (UNOPUS, lflooruv2df, 2, v2di)
++  VAR1 (UNOPUS, lfloorusf, 2, si)
++  VAR1 (UNOPUS, lfloorudf, 2, di)
+ 
+   VAR1 (UNOP, lfrintnv2sf, 2, v2si)
+   VAR1 (UNOP, lfrintnv4sf, 2, v4si)
+@@ -317,11 +317,11 @@
+   VAR1 (UNOP, lfrintnsf, 2, si)
+   VAR1 (UNOP, lfrintndf, 2, di)
+ 
+-  VAR1 (UNOP, lfrintnuv2sf, 2, v2si)
+-  VAR1 (UNOP, lfrintnuv4sf, 2, v4si)
+-  VAR1 (UNOP, lfrintnuv2df, 2, v2di)
+-  VAR1 (UNOP, lfrintnusf, 2, si)
+-  VAR1 (UNOP, lfrintnudf, 2, di)
++  VAR1 (UNOPUS, lfrintnuv2sf, 2, v2si)
++  VAR1 (UNOPUS, lfrintnuv4sf, 2, v4si)
++  VAR1 (UNOPUS, lfrintnuv2df, 2, v2di)
++  VAR1 (UNOPUS, lfrintnusf, 2, si)
++  VAR1 (UNOPUS, lfrintnudf, 2, di)
+ 
+   /* Implemented by <optab><fcvt_target><VDQF:mode>2.  */
+   VAR1 (UNOP, floatv2si, 2, v2sf)
+@@ -361,17 +361,19 @@
+   BUILTIN_VSDQ_I_DI (UNOP, abs, 0)
+   BUILTIN_VDQF (UNOP, abs, 2)
+ 
+-  VAR1 (UNOP, vec_unpacks_hi_, 10, v4sf)
++  BUILTIN_VQ_HSF (UNOP, vec_unpacks_hi_, 10)
+   VAR1 (BINOP, float_truncate_hi_, 0, v4sf)
++  VAR1 (BINOP, float_truncate_hi_, 0, v8hf)
+ 
+   VAR1 (UNOP, float_extend_lo_, 0, v2df)
+-  VAR1 (UNOP, float_truncate_lo_, 0, v2sf)
++  VAR1 (UNOP, float_extend_lo_,  0, v4sf)
++  BUILTIN_VDF (UNOP, float_truncate_lo_, 0)
+ 
+-  /* Implemented by aarch64_ld1<VALL:mode>.  */
+-  BUILTIN_VALL (LOAD1, ld1, 0)
++  /* Implemented by aarch64_ld1<VALL_F16:mode>.  */
++  BUILTIN_VALL_F16 (LOAD1, ld1, 0)
+ 
+-  /* Implemented by aarch64_st1<VALL:mode>.  */
+-  BUILTIN_VALL (STORE1, st1, 0)
++  /* Implemented by aarch64_st1<VALL_F16:mode>.  */
++  BUILTIN_VALL_F16 (STORE1, st1, 0)
+ 
+   /* Implemented by fma<mode>4.  */
+   BUILTIN_VDQF (TERNOP, fma, 4)
+@@ -405,3 +407,22 @@
+   VAR1 (BINOPP, crypto_pmull, 0, di)
+   VAR1 (BINOPP, crypto_pmull, 0, v2di)
+ 
++  /* Implemented by aarch64_tbl3v8qi.  */
++  VAR1 (BINOP, tbl3, 0, v8qi)
++
++  /* Implemented by aarch64_tbx4v8qi.  */
++  VAR1 (TERNOP, tbx4, 0, v8qi)
++
++  /* Builtins for ARMv8.1 Adv.SIMD instructions.  */
++
++  /* Implemented by aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>.  */
++  BUILTIN_VSDQ_HSI (TERNOP, sqrdmlah, 0)
++  BUILTIN_VSDQ_HSI (TERNOP, sqrdmlsh, 0)
++
++  /* Implemented by aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>.  */
++  BUILTIN_VSDQ_HSI (QUADOP_LANE, sqrdmlah_lane, 0)
++  BUILTIN_VSDQ_HSI (QUADOP_LANE, sqrdmlsh_lane, 0)
++
++  /* Implemented by aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>.  */
++  BUILTIN_VSDQ_HSI (QUADOP_LANE, sqrdmlah_laneq, 0)
++  BUILTIN_VSDQ_HSI (QUADOP_LANE, sqrdmlsh_laneq, 0)
+--- a/src/gcc/config/aarch64/aarch64-simd.md
++++ b/src/gcc/config/aarch64/aarch64-simd.md
+@@ -19,8 +19,8 @@
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_expand "mov<mode>"
+-  [(set (match_operand:VALL 0 "nonimmediate_operand" "")
+-	(match_operand:VALL 1 "general_operand" ""))]
++  [(set (match_operand:VALL_F16 0 "nonimmediate_operand" "")
++	(match_operand:VALL_F16 1 "general_operand" ""))]
+   "TARGET_SIMD"
+   "
+     if (GET_CODE (operands[0]) == MEM)
+@@ -53,18 +53,19 @@
+ )
+ 
+ (define_insn "aarch64_simd_dup<mode>"
+-  [(set (match_operand:VDQF 0 "register_operand" "=w")
+-        (vec_duplicate:VDQF (match_operand:<VEL> 1 "register_operand" "w")))]
++  [(set (match_operand:VDQF_F16 0 "register_operand" "=w")
++	(vec_duplicate:VDQF_F16
++	  (match_operand:<VEL> 1 "register_operand" "w")))]
+   "TARGET_SIMD"
+   "dup\\t%0.<Vtype>, %1.<Vetype>[0]"
+   [(set_attr "type" "neon_dup<q>")]
+ )
+ 
+ (define_insn "aarch64_dup_lane<mode>"
+-  [(set (match_operand:VALL 0 "register_operand" "=w")
+-	(vec_duplicate:VALL
++  [(set (match_operand:VALL_F16 0 "register_operand" "=w")
++	(vec_duplicate:VALL_F16
+ 	  (vec_select:<VEL>
+-	    (match_operand:VALL 1 "register_operand" "w")
++	    (match_operand:VALL_F16 1 "register_operand" "w")
+ 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")])
+           )))]
+   "TARGET_SIMD"
+@@ -76,8 +77,8 @@
+ )
+ 
+ (define_insn "aarch64_dup_lane_<vswap_width_name><mode>"
+-  [(set (match_operand:VALL 0 "register_operand" "=w")
+-	(vec_duplicate:VALL
++  [(set (match_operand:VALL_F16 0 "register_operand" "=w")
++	(vec_duplicate:VALL_F16
+ 	  (vec_select:<VEL>
+ 	    (match_operand:<VSWAP_WIDTH> 1 "register_operand" "w")
+ 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")])
+@@ -152,6 +153,34 @@
+    (set_attr "length" "4,4,4,8,8,8,4")]
+ )
+ 
++(define_insn "load_pair<mode>"
++  [(set (match_operand:VD 0 "register_operand" "=w")
++	(match_operand:VD 1 "aarch64_mem_pair_operand" "Ump"))
++   (set (match_operand:VD 2 "register_operand" "=w")
++	(match_operand:VD 3 "memory_operand" "m"))]
++  "TARGET_SIMD
++   && rtx_equal_p (XEXP (operands[3], 0),
++		   plus_constant (Pmode,
++				  XEXP (operands[1], 0),
++				  GET_MODE_SIZE (<MODE>mode)))"
++  "ldp\\t%d0, %d2, %1"
++  [(set_attr "type" "neon_ldp")]
++)
++
++(define_insn "store_pair<mode>"
++  [(set (match_operand:VD 0 "aarch64_mem_pair_operand" "=Ump")
++	(match_operand:VD 1 "register_operand" "w"))
++   (set (match_operand:VD 2 "memory_operand" "=m")
++	(match_operand:VD 3 "register_operand" "w"))]
++  "TARGET_SIMD
++   && rtx_equal_p (XEXP (operands[2], 0),
++		   plus_constant (Pmode,
++				  XEXP (operands[0], 0),
++				  GET_MODE_SIZE (<MODE>mode)))"
++  "stp\\t%d1, %d3, %0"
++  [(set_attr "type" "neon_stp")]
++)
++
+ (define_split
+   [(set (match_operand:VQ 0 "register_operand" "")
+       (match_operand:VQ 1 "register_operand" ""))]
+@@ -834,11 +863,11 @@
+ )
+ 
+ (define_insn "aarch64_simd_vec_set<mode>"
+-  [(set (match_operand:VDQF 0 "register_operand" "=w")
+-        (vec_merge:VDQF
+-	    (vec_duplicate:VDQF
++  [(set (match_operand:VDQF_F16 0 "register_operand" "=w")
++	(vec_merge:VDQF_F16
++	    (vec_duplicate:VDQF_F16
+ 		(match_operand:<VEL> 1 "register_operand" "w"))
+-	    (match_operand:VDQF 3 "register_operand" "0")
++	    (match_operand:VDQF_F16 3 "register_operand" "0")
+ 	    (match_operand:SI 2 "immediate_operand" "i")))]
+   "TARGET_SIMD"
+   {
+@@ -851,7 +880,7 @@
+ )
+ 
+ (define_expand "vec_set<mode>"
+-  [(match_operand:VDQF 0 "register_operand" "+w")
++  [(match_operand:VDQF_F16 0 "register_operand" "+w")
+    (match_operand:<VEL> 1 "register_operand" "w")
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_SIMD"
+@@ -1691,61 +1720,116 @@
+ 
+ ;; Float widening operations.
+ 
+-(define_insn "vec_unpacks_lo_v4sf"
+-  [(set (match_operand:V2DF 0 "register_operand" "=w")
+-	(float_extend:V2DF
+-	  (vec_select:V2SF
+-	    (match_operand:V4SF 1 "register_operand" "w")
+-	    (parallel [(const_int 0) (const_int 1)])
+-	  )))]
++(define_insn "aarch64_simd_vec_unpacks_lo_<mode>"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
++        (float_extend:<VWIDE> (vec_select:<VHALF>
++			       (match_operand:VQ_HSF 1 "register_operand" "w")
++			       (match_operand:VQ_HSF 2 "vect_par_cnst_lo_half" "")
++			    )))]
+   "TARGET_SIMD"
+-  "fcvtl\\t%0.2d, %1.2s"
++  "fcvtl\\t%0.<Vwtype>, %1.<Vhalftype>"
+   [(set_attr "type" "neon_fp_cvt_widen_s")]
+ )
+ 
+-(define_insn "aarch64_float_extend_lo_v2df"
+-  [(set (match_operand:V2DF 0 "register_operand" "=w")
+-	(float_extend:V2DF
+-	  (match_operand:V2SF 1 "register_operand" "w")))]
++;; ??? Note that the vectorizer usage of the vec_unpacks_[lo/hi] patterns
++;; is inconsistent with vector ordering elsewhere in the compiler, in that
++;; the meaning of HI and LO changes depending on the target endianness.
++;; While elsewhere we map the higher numbered elements of a vector to
++;; the lower architectural lanes of the vector, for these patterns we want
++;; to always treat "hi" as referring to the higher architectural lanes.
++;; Consequently, while the patterns below look inconsistent with our
++;; other big-endian patterns their behaviour is as required.
++
++(define_expand "vec_unpacks_lo_<mode>"
++  [(match_operand:<VWIDE> 0 "register_operand" "")
++   (match_operand:VQ_HSF 1 "register_operand" "")]
++  "TARGET_SIMD"
++  {
++    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, false);
++    emit_insn (gen_aarch64_simd_vec_unpacks_lo_<mode> (operands[0],
++						       operands[1], p));
++    DONE;
++  }
++)
++
++(define_insn "aarch64_simd_vec_unpacks_hi_<mode>"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
++        (float_extend:<VWIDE> (vec_select:<VHALF>
++			       (match_operand:VQ_HSF 1 "register_operand" "w")
++			       (match_operand:VQ_HSF 2 "vect_par_cnst_hi_half" "")
++			    )))]
+   "TARGET_SIMD"
+-  "fcvtl\\t%0.2d, %1.2s"
++  "fcvtl2\\t%0.<Vwtype>, %1.<Vtype>"
+   [(set_attr "type" "neon_fp_cvt_widen_s")]
+ )
+ 
+-(define_insn "vec_unpacks_hi_v4sf"
+-  [(set (match_operand:V2DF 0 "register_operand" "=w")
+-	(float_extend:V2DF
+-	  (vec_select:V2SF
+-	    (match_operand:V4SF 1 "register_operand" "w")
+-	    (parallel [(const_int 2) (const_int 3)])
+-	  )))]
++(define_expand "vec_unpacks_hi_<mode>"
++  [(match_operand:<VWIDE> 0 "register_operand" "")
++   (match_operand:VQ_HSF 1 "register_operand" "")]
+   "TARGET_SIMD"
+-  "fcvtl2\\t%0.2d, %1.4s"
++  {
++    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, true);
++    emit_insn (gen_aarch64_simd_vec_unpacks_lo_<mode> (operands[0],
++						       operands[1], p));
++    DONE;
++  }
++)
++(define_insn "aarch64_float_extend_lo_<Vwide>"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
++	(float_extend:<VWIDE>
++	  (match_operand:VDF 1 "register_operand" "w")))]
++  "TARGET_SIMD"
++  "fcvtl\\t%0<Vmwtype>, %1<Vmtype>"
+   [(set_attr "type" "neon_fp_cvt_widen_s")]
+ )
+ 
+ ;; Float narrowing operations.
+ 
+-(define_insn "aarch64_float_truncate_lo_v2sf"
+-  [(set (match_operand:V2SF 0 "register_operand" "=w")
+-      (float_truncate:V2SF
+-	(match_operand:V2DF 1 "register_operand" "w")))]
++(define_insn "aarch64_float_truncate_lo_<mode>"
++  [(set (match_operand:VDF 0 "register_operand" "=w")
++      (float_truncate:VDF
++	(match_operand:<VWIDE> 1 "register_operand" "w")))]
+   "TARGET_SIMD"
+-  "fcvtn\\t%0.2s, %1.2d"
++  "fcvtn\\t%0.<Vtype>, %1<Vmwtype>"
+   [(set_attr "type" "neon_fp_cvt_narrow_d_q")]
+ )
+ 
+-(define_insn "aarch64_float_truncate_hi_v4sf"
+-  [(set (match_operand:V4SF 0 "register_operand" "=w")
+-    (vec_concat:V4SF
+-      (match_operand:V2SF 1 "register_operand" "0")
+-      (float_truncate:V2SF
+-	(match_operand:V2DF 2 "register_operand" "w"))))]
+-  "TARGET_SIMD"
+-  "fcvtn2\\t%0.4s, %2.2d"
++(define_insn "aarch64_float_truncate_hi_<Vdbl>_le"
++  [(set (match_operand:<VDBL> 0 "register_operand" "=w")
++    (vec_concat:<VDBL>
++      (match_operand:VDF 1 "register_operand" "0")
++      (float_truncate:VDF
++	(match_operand:<VWIDE> 2 "register_operand" "w"))))]
++  "TARGET_SIMD && !BYTES_BIG_ENDIAN"
++  "fcvtn2\\t%0.<Vdtype>, %2<Vmwtype>"
+   [(set_attr "type" "neon_fp_cvt_narrow_d_q")]
+ )
+ 
++(define_insn "aarch64_float_truncate_hi_<Vdbl>_be"
++  [(set (match_operand:<VDBL> 0 "register_operand" "=w")
++    (vec_concat:<VDBL>
++      (float_truncate:VDF
++	(match_operand:<VWIDE> 2 "register_operand" "w"))
++      (match_operand:VDF 1 "register_operand" "0")))]
++  "TARGET_SIMD && BYTES_BIG_ENDIAN"
++  "fcvtn2\\t%0.<Vdtype>, %2<Vmwtype>"
++  [(set_attr "type" "neon_fp_cvt_narrow_d_q")]
++)
++
++(define_expand "aarch64_float_truncate_hi_<Vdbl>"
++  [(match_operand:<VDBL> 0 "register_operand" "=w")
++   (match_operand:VDF 1 "register_operand" "0")
++   (match_operand:<VWIDE> 2 "register_operand" "w")]
++  "TARGET_SIMD"
++{
++  rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
++			     ? gen_aarch64_float_truncate_hi_<Vdbl>_be
++			     : gen_aarch64_float_truncate_hi_<Vdbl>_le;
++  emit_insn (gen (operands[0], operands[1], operands[2]));
++  DONE;
++}
++)
++
+ (define_expand "vec_pack_trunc_v2df"
+   [(set (match_operand:V4SF 0 "register_operand")
+       (vec_concat:V4SF
+@@ -2074,13 +2158,13 @@
+ })
+ 
+ (define_expand "aarch64_vcond_internal<mode><mode>"
+-  [(set (match_operand:VDQ_I 0 "register_operand")
+-	(if_then_else:VDQ_I
++  [(set (match_operand:VSDQ_I_DI 0 "register_operand")
++	(if_then_else:VSDQ_I_DI
+ 	  (match_operator 3 "comparison_operator"
+-	    [(match_operand:VDQ_I 4 "register_operand")
+-	     (match_operand:VDQ_I 5 "nonmemory_operand")])
+-	  (match_operand:VDQ_I 1 "nonmemory_operand")
+-	  (match_operand:VDQ_I 2 "nonmemory_operand")))]
++	    [(match_operand:VSDQ_I_DI 4 "register_operand")
++	     (match_operand:VSDQ_I_DI 5 "nonmemory_operand")])
++	  (match_operand:VSDQ_I_DI 1 "nonmemory_operand")
++	  (match_operand:VSDQ_I_DI 2 "nonmemory_operand")))]
+   "TARGET_SIMD"
+ {
+   rtx op1 = operands[1];
+@@ -2382,13 +2466,13 @@
+ })
+ 
+ (define_expand "vcond<mode><mode>"
+-  [(set (match_operand:VALL 0 "register_operand")
+-	(if_then_else:VALL
++  [(set (match_operand:VALLDI 0 "register_operand")
++	(if_then_else:VALLDI
+ 	  (match_operator 3 "comparison_operator"
+-	    [(match_operand:VALL 4 "register_operand")
+-	     (match_operand:VALL 5 "nonmemory_operand")])
+-	  (match_operand:VALL 1 "nonmemory_operand")
+-	  (match_operand:VALL 2 "nonmemory_operand")))]
++	    [(match_operand:VALLDI 4 "register_operand")
++	     (match_operand:VALLDI 5 "nonmemory_operand")])
++	  (match_operand:VALLDI 1 "nonmemory_operand")
++	  (match_operand:VALLDI 2 "nonmemory_operand")))]
+   "TARGET_SIMD"
+ {
+   emit_insn (gen_aarch64_vcond_internal<mode><mode> (operands[0], operands[1],
+@@ -2415,13 +2499,13 @@
+ })
+ 
+ (define_expand "vcondu<mode><mode>"
+-  [(set (match_operand:VDQ_I 0 "register_operand")
+-	(if_then_else:VDQ_I
++  [(set (match_operand:VSDQ_I_DI 0 "register_operand")
++	(if_then_else:VSDQ_I_DI
+ 	  (match_operator 3 "comparison_operator"
+-	    [(match_operand:VDQ_I 4 "register_operand")
+-	     (match_operand:VDQ_I 5 "nonmemory_operand")])
+-	  (match_operand:VDQ_I 1 "nonmemory_operand")
+-	  (match_operand:VDQ_I 2 "nonmemory_operand")))]
++	    [(match_operand:VSDQ_I_DI 4 "register_operand")
++	     (match_operand:VSDQ_I_DI 5 "nonmemory_operand")])
++	  (match_operand:VSDQ_I_DI 1 "nonmemory_operand")
++	  (match_operand:VSDQ_I_DI 2 "nonmemory_operand")))]
+   "TARGET_SIMD"
+ {
+   emit_insn (gen_aarch64_vcond_internal<mode><mode> (operands[0], operands[1],
+@@ -2467,7 +2551,7 @@
+ (define_insn "aarch64_get_lane<mode>"
+   [(set (match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "=r, w, Utv")
+ 	(vec_select:<VEL>
+-	  (match_operand:VALL 1 "register_operand" "w, w, w")
++	  (match_operand:VALL_F16 1 "register_operand" "w, w, w")
+ 	  (parallel [(match_operand:SI 2 "immediate_operand" "i, i, i")])))]
+   "TARGET_SIMD"
+   {
+@@ -2491,23 +2575,33 @@
+ ;; dest vector.
+ 
+ (define_insn "*aarch64_combinez<mode>"
+-  [(set (match_operand:<VDBL> 0 "register_operand" "=&w")
++  [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
+         (vec_concat:<VDBL>
+-	   (match_operand:VD_BHSI 1 "register_operand" "w")
+-	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz")))]
++	   (match_operand:VD_BHSI 1 "general_operand" "w,r,m")
++	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz,Dz,Dz")))]
+   "TARGET_SIMD && !BYTES_BIG_ENDIAN"
+-  "mov\\t%0.8b, %1.8b"
+-  [(set_attr "type" "neon_move<q>")]
++  "@
++   mov\\t%0.8b, %1.8b
++   fmov\t%d0, %1
++   ldr\\t%d0, %1"
++  [(set_attr "type" "neon_move<q>, neon_from_gp, neon_load1_1reg")
++   (set_attr "simd" "yes,*,yes")
++   (set_attr "fp" "*,yes,*")]
+ )
+ 
+ (define_insn "*aarch64_combinez_be<mode>"
+-  [(set (match_operand:<VDBL> 0 "register_operand" "=&w")
++  [(set (match_operand:<VDBL> 0 "register_operand" "=w,w,w")
+         (vec_concat:<VDBL>
+-	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz")
+-	   (match_operand:VD_BHSI 1 "register_operand" "w")))]
++	   (match_operand:VD_BHSI 2 "aarch64_simd_imm_zero" "Dz,Dz,Dz")
++	   (match_operand:VD_BHSI 1 "general_operand" "w,r,m")))]
+   "TARGET_SIMD && BYTES_BIG_ENDIAN"
+-  "mov\\t%0.8b, %1.8b"
+-  [(set_attr "type" "neon_move<q>")]
++  "@
++   mov\\t%0.8b, %1.8b
++   fmov\t%d0, %1
++   ldr\\t%d0, %1"
++  [(set_attr "type" "neon_move<q>, neon_from_gp, neon_load1_1reg")
++   (set_attr "simd" "yes,*,yes")
++   (set_attr "fp" "*,yes,*")]
+ )
+ 
+ (define_expand "aarch64_combine<mode>"
+@@ -2653,6 +2747,62 @@
+ 
+ ;; <su><addsub>w<q>.
+ 
++(define_expand "widen_ssum<mode>3"
++  [(set (match_operand:<VDBLW> 0 "register_operand" "")
++	(plus:<VDBLW> (sign_extend:<VDBLW> 
++		        (match_operand:VQW 1 "register_operand" ""))
++		      (match_operand:<VDBLW> 2 "register_operand" "")))]
++  "TARGET_SIMD"
++  {
++    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, false);
++    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));
++
++    emit_insn (gen_aarch64_saddw<mode>_internal (temp, operands[2],
++						operands[1], p));
++    emit_insn (gen_aarch64_saddw2<mode> (operands[0], temp, operands[1]));
++    DONE;
++  }
++)
++
++(define_expand "widen_ssum<mode>3"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "")
++	(plus:<VWIDE> (sign_extend:<VWIDE>
++		        (match_operand:VD_BHSI 1 "register_operand" ""))
++		      (match_operand:<VWIDE> 2 "register_operand" "")))]
++  "TARGET_SIMD"
++{
++  emit_insn (gen_aarch64_saddw<mode> (operands[0], operands[2], operands[1]));
++  DONE;
++})
++
++(define_expand "widen_usum<mode>3"
++  [(set (match_operand:<VDBLW> 0 "register_operand" "")
++	(plus:<VDBLW> (zero_extend:<VDBLW> 
++		        (match_operand:VQW 1 "register_operand" ""))
++		      (match_operand:<VDBLW> 2 "register_operand" "")))]
++  "TARGET_SIMD"
++  {
++    rtx p = aarch64_simd_vect_par_cnst_half (<MODE>mode, false);
++    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));
++
++    emit_insn (gen_aarch64_uaddw<mode>_internal (temp, operands[2],
++						 operands[1], p));
++    emit_insn (gen_aarch64_uaddw2<mode> (operands[0], temp, operands[1]));
++    DONE;
++  }
++)
++
++(define_expand "widen_usum<mode>3"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "")
++	(plus:<VWIDE> (zero_extend:<VWIDE>
++		        (match_operand:VD_BHSI 1 "register_operand" ""))
++		      (match_operand:<VWIDE> 2 "register_operand" "")))]
++  "TARGET_SIMD"
++{
++  emit_insn (gen_aarch64_uaddw<mode> (operands[0], operands[2], operands[1]));
++  DONE;
++})
++
+ (define_insn "aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>"
+   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
+         (ADDSUB:<VWIDE> (match_operand:<VWIDE> 1 "register_operand" "w")
+@@ -2663,6 +2813,18 @@
+   [(set_attr "type" "neon_<ADDSUB:optab>_widen")]
+ )
+ 
++(define_insn "aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>_internal"
++  [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
++        (ADDSUB:<VWIDE> (match_operand:<VWIDE> 1 "register_operand" "w")
++			(ANY_EXTEND:<VWIDE>
++			  (vec_select:<VHALF>
++			   (match_operand:VQW 2 "register_operand" "w")
++			   (match_operand:VQW 3 "vect_par_cnst_lo_half" "")))))]
++  "TARGET_SIMD"
++  "<ANY_EXTEND:su><ADDSUB:optab>w\\t%0.<Vwtype>, %1.<Vwtype>, %2.<Vhalftype>"
++  [(set_attr "type" "neon_<ADDSUB:optab>_widen")]
++)
++
+ (define_insn "aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>_internal"
+   [(set (match_operand:<VWIDE> 0 "register_operand" "=w")
+         (ADDSUB:<VWIDE> (match_operand:<VWIDE> 1 "register_operand" "w")
+@@ -2803,7 +2965,7 @@
+    "TARGET_SIMD"
+    "sqxtun\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
+    [(set_attr "type" "neon_sat_shift_imm_narrow_q")]
+- )
++)
+ 
+ ;; sqmovn and uqmovn
+ 
+@@ -2814,7 +2976,7 @@
+   "TARGET_SIMD"
+   "<sur>qxtn\\t%<vn2>0<Vmntype>, %<v>1<Vmtype>"
+    [(set_attr "type" "neon_sat_shift_imm_narrow_q")]
+- )
++)
+ 
+ ;; <su>q<absneg>
+ 
+@@ -2902,6 +3064,96 @@
+   [(set_attr "type" "neon_sat_mul_<Vetype>_scalar<q>")]
+ )
+ 
++;; sqrdml[as]h.
++
++(define_insn "aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>"
++  [(set (match_operand:VSDQ_HSI 0 "register_operand" "=w")
++	(unspec:VSDQ_HSI
++	  [(match_operand:VSDQ_HSI 1 "register_operand" "0")
++	   (match_operand:VSDQ_HSI 2 "register_operand" "w")
++	   (match_operand:VSDQ_HSI 3 "register_operand" "w")]
++	  SQRDMLH_AS))]
++   "TARGET_SIMD_RDMA"
++   "sqrdml<SQRDMLH_AS:rdma_as>h\\t%<v>0<Vmtype>, %<v>2<Vmtype>, %<v>3<Vmtype>"
++   [(set_attr "type" "neon_sat_mla_<Vetype>_long")]
++)
++
++;; sqrdml[as]h_lane.
++
++(define_insn "aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>"
++  [(set (match_operand:VDQHS 0 "register_operand" "=w")
++	(unspec:VDQHS
++	  [(match_operand:VDQHS 1 "register_operand" "0")
++	   (match_operand:VDQHS 2 "register_operand" "w")
++	   (vec_select:<VEL>
++	     (match_operand:<VCOND> 3 "register_operand" "<vwx>")
++	     (parallel [(match_operand:SI 4 "immediate_operand" "i")]))]
++	  SQRDMLH_AS))]
++   "TARGET_SIMD_RDMA"
++   {
++     operands[4] = GEN_INT (ENDIAN_LANE_N (<VCOND>mode, INTVAL (operands[4])));
++     return
++      "sqrdml<SQRDMLH_AS:rdma_as>h\\t%0.<Vtype>, %2.<Vtype>, %3.<Vetype>[%4]";
++   }
++   [(set_attr "type" "neon_sat_mla_<Vetype>_scalar_long")]
++)
++
++(define_insn "aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>"
++  [(set (match_operand:SD_HSI 0 "register_operand" "=w")
++	(unspec:SD_HSI
++	  [(match_operand:SD_HSI 1 "register_operand" "0")
++	   (match_operand:SD_HSI 2 "register_operand" "w")
++	   (vec_select:<VEL>
++	     (match_operand:<VCOND> 3 "register_operand" "<vwx>")
++	     (parallel [(match_operand:SI 4 "immediate_operand" "i")]))]
++	  SQRDMLH_AS))]
++   "TARGET_SIMD_RDMA"
++   {
++     operands[4] = GEN_INT (ENDIAN_LANE_N (<VCOND>mode, INTVAL (operands[4])));
++     return
++      "sqrdml<SQRDMLH_AS:rdma_as>h\\t%<v>0, %<v>2, %3.<Vetype>[%4]";
++   }
++   [(set_attr "type" "neon_sat_mla_<Vetype>_scalar_long")]
++)
++
++;; sqrdml[as]h_laneq.
++
++(define_insn "aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>"
++  [(set (match_operand:VDQHS 0 "register_operand" "=w")
++	(unspec:VDQHS
++	  [(match_operand:VDQHS 1 "register_operand" "0")
++	   (match_operand:VDQHS 2 "register_operand" "w")
++	   (vec_select:<VEL>
++	     (match_operand:<VCONQ> 3 "register_operand" "<vwx>")
++	     (parallel [(match_operand:SI 4 "immediate_operand" "i")]))]
++	  SQRDMLH_AS))]
++   "TARGET_SIMD_RDMA"
++   {
++     operands[4] = GEN_INT (ENDIAN_LANE_N (<VCONQ>mode, INTVAL (operands[4])));
++     return
++      "sqrdml<SQRDMLH_AS:rdma_as>h\\t%0.<Vtype>, %2.<Vtype>, %3.<Vetype>[%4]";
++   }
++   [(set_attr "type" "neon_sat_mla_<Vetype>_scalar_long")]
++)
++
++(define_insn "aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>"
++  [(set (match_operand:SD_HSI 0 "register_operand" "=w")
++	(unspec:SD_HSI
++	  [(match_operand:SD_HSI 1 "register_operand" "0")
++	   (match_operand:SD_HSI 2 "register_operand" "w")
++	   (vec_select:<VEL>
++	     (match_operand:<VCONQ> 3 "register_operand" "<vwx>")
++	     (parallel [(match_operand:SI 4 "immediate_operand" "i")]))]
++	  SQRDMLH_AS))]
++   "TARGET_SIMD_RDMA"
++   {
++     operands[4] = GEN_INT (ENDIAN_LANE_N (<VCONQ>mode, INTVAL (operands[4])));
++     return
++      "sqrdml<SQRDMLH_AS:rdma_as>h\\t%<v>0, %<v>2, %3.<v>[%4]";
++   }
++   [(set_attr "type" "neon_sat_mla_<Vetype>_scalar_long")]
++)
++
+ ;; vqdml[sa]l
+ 
+ (define_insn "aarch64_sqdml<SBINQOPS:as>l<mode>"
+@@ -3923,7 +4175,7 @@
+ 
+ (define_insn "aarch64_simd_ld2r<mode>"
+   [(set (match_operand:OI 0 "register_operand" "=w")
+-       (unspec:OI [(match_operand:<V_TWO_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++       (unspec:OI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+                    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
+                   UNSPEC_LD2_DUP))]
+   "TARGET_SIMD"
+@@ -3933,13 +4185,16 @@
+ 
+ (define_insn "aarch64_vec_load_lanesoi_lane<mode>"
+   [(set (match_operand:OI 0 "register_operand" "=w")
+-	(unspec:OI [(match_operand:<V_TWO_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++	(unspec:OI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+ 		    (match_operand:OI 2 "register_operand" "0")
+ 		    (match_operand:SI 3 "immediate_operand" "i")
+-		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
++		    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
+ 		   UNSPEC_LD2_LANE))]
+   "TARGET_SIMD"
+-  "ld2\\t{%S0.<Vetype> - %T0.<Vetype>}[%3], %1"
++  {
++    operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
++    return "ld2\\t{%S0.<Vetype> - %T0.<Vetype>}[%3], %1";
++  }
+   [(set_attr "type" "neon_load2_one_lane")]
+ )
+ 
+@@ -3972,15 +4227,19 @@
+   [(set_attr "type" "neon_store2_2reg<q>")]
+ )
+ 
+-(define_insn "vec_store_lanesoi_lane<mode>"
+-  [(set (match_operand:<V_TWO_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:<V_TWO_ELEM> [(match_operand:OI 1 "register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
++;; RTL uses GCC vector extension indices, so flip only for assembly.
++(define_insn "aarch64_vec_store_lanesoi_lane<mode>"
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:OI 1 "register_operand" "w")
++		    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+ 		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_ST2_LANE))]
++		   UNSPEC_ST2_LANE))]
+   "TARGET_SIMD"
+-  "st2\\t{%S1.<Vetype> - %T1.<Vetype>}[%2], %0"
+-  [(set_attr "type" "neon_store3_one_lane<q>")]
++  {
++    operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
++    return "st2\\t{%S1.<Vetype> - %T1.<Vetype>}[%2], %0";
++  }
++  [(set_attr "type" "neon_store2_one_lane<q>")]
+ )
+ 
+ (define_expand "vec_store_lanesoi<mode>"
+@@ -4014,7 +4273,7 @@
+ 
+ (define_insn "aarch64_simd_ld3r<mode>"
+   [(set (match_operand:CI 0 "register_operand" "=w")
+-       (unspec:CI [(match_operand:<V_THREE_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++       (unspec:CI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+                    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
+                   UNSPEC_LD3_DUP))]
+   "TARGET_SIMD"
+@@ -4024,13 +4283,16 @@
+ 
+ (define_insn "aarch64_vec_load_lanesci_lane<mode>"
+   [(set (match_operand:CI 0 "register_operand" "=w")
+-	(unspec:CI [(match_operand:<V_THREE_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++	(unspec:CI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+ 		    (match_operand:CI 2 "register_operand" "0")
+ 		    (match_operand:SI 3 "immediate_operand" "i")
+-		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++		    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 		   UNSPEC_LD3_LANE))]
+   "TARGET_SIMD"
+-  "ld3\\t{%S0.<Vetype> - %U0.<Vetype>}[%3], %1"
++{
++    operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
++    return "ld3\\t{%S0.<Vetype> - %U0.<Vetype>}[%3], %1";
++}
+   [(set_attr "type" "neon_load3_one_lane")]
+ )
+ 
+@@ -4063,14 +4325,18 @@
+   [(set_attr "type" "neon_store3_3reg<q>")]
+ )
+ 
+-(define_insn "vec_store_lanesci_lane<mode>"
+-  [(set (match_operand:<V_THREE_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:<V_THREE_ELEM> [(match_operand:CI 1 "register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+-		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_ST3_LANE))]
++;; RTL uses GCC vector extension indices, so flip only for assembly.
++(define_insn "aarch64_vec_store_lanesci_lane<mode>"
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:CI 1 "register_operand" "w")
++		     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
++		     (match_operand:SI 2 "immediate_operand" "i")]
++		    UNSPEC_ST3_LANE))]
+   "TARGET_SIMD"
+-  "st3\\t{%S1.<Vetype> - %U1.<Vetype>}[%2], %0"
++  {
++    operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
++    return "st3\\t{%S1.<Vetype> - %U1.<Vetype>}[%2], %0";
++  }
+   [(set_attr "type" "neon_store3_one_lane<q>")]
+ )
+ 
+@@ -4105,7 +4371,7 @@
+ 
+ (define_insn "aarch64_simd_ld4r<mode>"
+   [(set (match_operand:XI 0 "register_operand" "=w")
+-       (unspec:XI [(match_operand:<V_FOUR_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++       (unspec:XI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+                    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY) ]
+                   UNSPEC_LD4_DUP))]
+   "TARGET_SIMD"
+@@ -4115,13 +4381,16 @@
+ 
+ (define_insn "aarch64_vec_load_lanesxi_lane<mode>"
+   [(set (match_operand:XI 0 "register_operand" "=w")
+-	(unspec:XI [(match_operand:<V_FOUR_ELEM> 1 "aarch64_simd_struct_operand" "Utv")
++	(unspec:XI [(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")
+ 		    (match_operand:XI 2 "register_operand" "0")
+ 		    (match_operand:SI 3 "immediate_operand" "i")
+-		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++		    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 		   UNSPEC_LD4_LANE))]
+   "TARGET_SIMD"
+-  "ld4\\t{%S0.<Vetype> - %V0.<Vetype>}[%3], %1"
++{
++    operands[3] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3])));
++    return "ld4\\t{%S0.<Vetype> - %V0.<Vetype>}[%3], %1";
++}
+   [(set_attr "type" "neon_load4_one_lane")]
+ )
+ 
+@@ -4154,14 +4423,18 @@
+   [(set_attr "type" "neon_store4_4reg<q>")]
+ )
+ 
+-(define_insn "vec_store_lanesxi_lane<mode>"
+-  [(set (match_operand:<V_FOUR_ELEM> 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:<V_FOUR_ELEM> [(match_operand:XI 1 "register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+-		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_ST4_LANE))]
++;; RTL uses GCC vector extension indices, so flip only for assembly.
++(define_insn "aarch64_vec_store_lanesxi_lane<mode>"
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:XI 1 "register_operand" "w")
++		     (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
++		     (match_operand:SI 2 "immediate_operand" "i")]
++		    UNSPEC_ST4_LANE))]
+   "TARGET_SIMD"
+-  "st4\\t{%S1.<Vetype> - %V1.<Vetype>}[%2], %0"
++  {
++    operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
++    return "st4\\t{%S1.<Vetype> - %V1.<Vetype>}[%2], %0";
++  }
+   [(set_attr "type" "neon_store4_one_lane<q>")]
+ )
+ 
+@@ -4239,8 +4512,9 @@
+ )
+ 
+ (define_insn "aarch64_be_ld1<mode>"
+-  [(set (match_operand:VALLDI 0	"register_operand" "=w")
+-	(unspec:VALLDI [(match_operand:VALLDI 1 "aarch64_simd_struct_operand" "Utv")]
++  [(set (match_operand:VALLDI_F16 0	"register_operand" "=w")
++	(unspec:VALLDI_F16 [(match_operand:VALLDI_F16 1
++			     "aarch64_simd_struct_operand" "Utv")]
+ 	UNSPEC_LD1))]
+   "TARGET_SIMD"
+   "ld1\\t{%0<Vmtype>}, %1"
+@@ -4248,8 +4522,8 @@
+ )
+ 
+ (define_insn "aarch64_be_st1<mode>"
+-  [(set (match_operand:VALLDI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:VALLDI [(match_operand:VALLDI 1 "register_operand" "w")]
++  [(set (match_operand:VALLDI_F16 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:VALLDI_F16 [(match_operand:VALLDI_F16 1 "register_operand" "w")]
+ 	UNSPEC_ST1))]
+   "TARGET_SIMD"
+   "st1\\t{%1<Vmtype>}, %0"
+@@ -4266,7 +4540,7 @@
+    #
+    stp\\t%q1, %R1, %0
+    ldp\\t%q0, %R0, %1"
+-  [(set_attr "type" "multiple,neon_store2_2reg_q,neon_load2_2reg_q")
++  [(set_attr "type" "multiple,neon_stp_q,neon_ldp_q")
+    (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)"))]
+ )
+ 
+@@ -4354,42 +4628,18 @@
+     FAIL;
+ })
+ 
+-(define_expand "aarch64_ld2r<mode>"
+-  [(match_operand:OI 0 "register_operand" "=w")
++(define_expand "aarch64_ld<VSTRUCT:nregs>r<VALLDIF:mode>"
++  [(match_operand:VSTRUCT 0 "register_operand" "=w")
+    (match_operand:DI 1 "register_operand" "w")
+    (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <V_TWO_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
++  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
++  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (<VALLDIF:MODE>mode))
++		     * <VSTRUCT:nregs>);
+ 
+-  emit_insn (gen_aarch64_simd_ld2r<mode> (operands[0], mem));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_ld3r<mode>"
+-  [(match_operand:CI 0 "register_operand" "=w")
+-   (match_operand:DI 1 "register_operand" "w")
+-   (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_THREE_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
+-
+-  emit_insn (gen_aarch64_simd_ld3r<mode> (operands[0], mem));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_ld4r<mode>"
+-  [(match_operand:XI 0 "register_operand" "=w")
+-   (match_operand:DI 1 "register_operand" "w")
+-   (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_FOUR_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
+-
+-  emit_insn (gen_aarch64_simd_ld4r<mode> (operands[0],mem));
++  emit_insn (gen_aarch64_simd_ld<VSTRUCT:nregs>r<VALLDIF:mode> (operands[0],
++								mem));
+   DONE;
+ })
+ 
+@@ -4398,8 +4648,9 @@
+ 	(subreg:OI
+ 	  (vec_concat:<VRL2>
+ 	    (vec_concat:<VDBL>
+-	     (unspec:VD [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")]
+-			UNSPEC_LD2)
++	     (unspec:VD
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD2)
+ 	     (vec_duplicate:VD (const_int 0)))
+ 	    (vec_concat:<VDBL>
+ 	     (unspec:VD [(match_dup 1)]
+@@ -4415,8 +4666,9 @@
+ 	(subreg:OI
+ 	  (vec_concat:<VRL2>
+ 	    (vec_concat:<VDBL>
+-	     (unspec:DX [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")]
+-			UNSPEC_LD2)
++	     (unspec:DX
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD2)
+ 	     (const_int 0))
+ 	    (vec_concat:<VDBL>
+ 	     (unspec:DX [(match_dup 1)]
+@@ -4433,8 +4685,9 @@
+ 	 (vec_concat:<VRL3>
+ 	  (vec_concat:<VRL2>
+ 	    (vec_concat:<VDBL>
+-	     (unspec:VD [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")]
+-			UNSPEC_LD3)
++	     (unspec:VD
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD3)
+ 	     (vec_duplicate:VD (const_int 0)))
+ 	    (vec_concat:<VDBL>
+ 	     (unspec:VD [(match_dup 1)]
+@@ -4455,8 +4708,9 @@
+ 	 (vec_concat:<VRL3>
+ 	  (vec_concat:<VRL2>
+ 	    (vec_concat:<VDBL>
+-	     (unspec:DX [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")]
+-			UNSPEC_LD3)
++	     (unspec:DX
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD3)
+ 	     (const_int 0))
+ 	    (vec_concat:<VDBL>
+ 	     (unspec:DX [(match_dup 1)]
+@@ -4477,8 +4731,9 @@
+ 	 (vec_concat:<VRL4>
+ 	   (vec_concat:<VRL2>
+ 	     (vec_concat:<VDBL>
+-	       (unspec:VD [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")]
+-			  UNSPEC_LD4)
++	       (unspec:VD
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD4)
+ 	       (vec_duplicate:VD (const_int 0)))
+ 	      (vec_concat:<VDBL>
+ 	        (unspec:VD [(match_dup 1)]
+@@ -4504,8 +4759,9 @@
+ 	 (vec_concat:<VRL4>
+ 	   (vec_concat:<VRL2>
+ 	     (vec_concat:<VDBL>
+-	       (unspec:DX [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")]
+-			  UNSPEC_LD4)
++	       (unspec:DX
++		[(match_operand:BLK 1 "aarch64_simd_struct_operand" "Utv")]
++		UNSPEC_LD4)
+ 	       (const_int 0))
+ 	      (vec_concat:<VDBL>
+ 	        (unspec:DX [(match_dup 1)]
+@@ -4531,23 +4787,23 @@
+   (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
++  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
++  set_mem_size (mem, <VSTRUCT:nregs> * 8);
+ 
+   emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg (operands[0], mem));
+   DONE;
+ })
+ 
+-(define_expand "aarch64_ld1<VALL:mode>"
+- [(match_operand:VALL 0 "register_operand")
++(define_expand "aarch64_ld1<VALL_F16:mode>"
++ [(match_operand:VALL_F16 0 "register_operand")
+   (match_operand:DI 1 "register_operand")]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <VALL:MODE>mode;
++  machine_mode mode = <VALL_F16:MODE>mode;
+   rtx mem = gen_rtx_MEM (mode, operands[1]);
+ 
+   if (BYTES_BIG_ENDIAN)
+-    emit_insn (gen_aarch64_be_ld1<VALL:mode> (operands[0], mem));
++    emit_insn (gen_aarch64_be_ld1<VALL_F16:mode> (operands[0], mem));
+   else
+     emit_move_insn (operands[0], mem);
+   DONE;
+@@ -4562,72 +4818,30 @@
+   machine_mode mode = <VSTRUCT:MODE>mode;
+   rtx mem = gen_rtx_MEM (mode, operands[1]);
+ 
+-  emit_insn (gen_vec_load_lanes<VSTRUCT:mode><VQ:mode> (operands[0], mem));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_ld2_lane<mode>"
+-  [(match_operand:OI 0 "register_operand" "=w")
+-	(match_operand:DI 1 "register_operand" "w")
+-	(match_operand:OI 2 "register_operand" "0")
+-	(match_operand:SI 3 "immediate_operand" "i")
+-	(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_TWO_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
+-
+-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
+-			    NULL);
+-  emit_insn (gen_aarch64_vec_load_lanesoi_lane<mode> (operands[0],
+-						      mem,
+-						      operands[2],
+-						      operands[3]));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_ld3_lane<mode>"
+-  [(match_operand:CI 0 "register_operand" "=w")
+-	(match_operand:DI 1 "register_operand" "w")
+-	(match_operand:CI 2 "register_operand" "0")
+-	(match_operand:SI 3 "immediate_operand" "i")
+-	(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_THREE_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
+-
+-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
+-			    NULL);
+-  emit_insn (gen_aarch64_vec_load_lanesci_lane<mode> (operands[0],
+-						      mem,
+-						      operands[2],
+-						      operands[3]));
++  emit_insn (gen_aarch64_simd_ld<VSTRUCT:nregs><VQ:mode> (operands[0], mem));
+   DONE;
+ })
+ 
+-(define_expand "aarch64_ld4_lane<mode>"
+-  [(match_operand:XI 0 "register_operand" "=w")
++(define_expand "aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>"
++  [(match_operand:VSTRUCT 0 "register_operand" "=w")
+ 	(match_operand:DI 1 "register_operand" "w")
+-	(match_operand:XI 2 "register_operand" "0")
++	(match_operand:VSTRUCT 2 "register_operand" "0")
+ 	(match_operand:SI 3 "immediate_operand" "i")
+-	(unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++	(unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <V_FOUR_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[1]);
++  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
++  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (<VALLDIF:MODE>mode))
++		     * <VSTRUCT:nregs>);
+ 
+-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
++  aarch64_simd_lane_bounds (operands[3], 0,
++			    GET_MODE_NUNITS (<VALLDIF:MODE>mode),
+ 			    NULL);
+-  emit_insn (gen_aarch64_vec_load_lanesxi_lane<mode> (operands[0],
+-						      mem,
+-						      operands[2],
+-						      operands[3]));
++  emit_insn (gen_aarch64_vec_load_lanes<VSTRUCT:mode>_lane<VALLDIF:mode> (
++	operands[0], mem, operands[2], operands[3]));
+   DONE;
+ })
+ 
+-
+-
+ ;; Expanders for builtins to extract vector registers from large
+ ;; opaque integer modes.
+ 
+@@ -4671,9 +4885,9 @@
+ ;; vec_perm support
+ 
+ (define_expand "vec_perm_const<mode>"
+-  [(match_operand:VALL 0 "register_operand")
+-   (match_operand:VALL 1 "register_operand")
+-   (match_operand:VALL 2 "register_operand")
++  [(match_operand:VALL_F16 0 "register_operand")
++   (match_operand:VALL_F16 1 "register_operand")
++   (match_operand:VALL_F16 2 "register_operand")
+    (match_operand:<V_cmp_result> 3)]
+   "TARGET_SIMD"
+ {
+@@ -4718,6 +4932,27 @@
+   [(set_attr "type" "neon_tbl2_q")]
+ )
+ 
++(define_insn "aarch64_tbl3v8qi"
++  [(set (match_operand:V8QI 0 "register_operand" "=w")
++	(unspec:V8QI [(match_operand:OI 1 "register_operand" "w")
++		      (match_operand:V8QI 2 "register_operand" "w")]
++		      UNSPEC_TBL))]
++  "TARGET_SIMD"
++  "tbl\\t%S0.8b, {%S1.16b - %T1.16b}, %S2.8b"
++  [(set_attr "type" "neon_tbl3")]
++)
++
++(define_insn "aarch64_tbx4v8qi"
++  [(set (match_operand:V8QI 0 "register_operand" "=w")
++	(unspec:V8QI [(match_operand:V8QI 1 "register_operand" "0")
++		      (match_operand:OI 2 "register_operand" "w")
++		      (match_operand:V8QI 3 "register_operand" "w")]
++		      UNSPEC_TBX))]
++  "TARGET_SIMD"
++  "tbx\\t%S0.8b, {%S2.16b - %T2.16b}, %S3.8b"
++  [(set_attr "type" "neon_tbl4")]
++)
++
+ (define_insn_and_split "aarch64_combinev16qi"
+   [(set (match_operand:OI 0 "register_operand" "=w")
+ 	(unspec:OI [(match_operand:V16QI 1 "register_operand" "w")
+@@ -4754,7 +4989,7 @@
+   "TARGET_SIMD"
+ {
+   operands[3] = GEN_INT (INTVAL (operands[3])
+-      * GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)));
++      * GET_MODE_UNIT_SIZE (<MODE>mode));
+   return "ext\\t%0.<Vbtype>, %1.<Vbtype>, %2.<Vbtype>, #%3";
+ }
+   [(set_attr "type" "neon_ext<q>")]
+@@ -4770,8 +5005,8 @@
+ )
+ 
+ (define_insn "aarch64_st2<mode>_dreg"
+-  [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:TI [(match_operand:OI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:OI 1 "register_operand" "w")
+                     (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST2))]
+   "TARGET_SIMD"
+@@ -4780,8 +5015,8 @@
+ )
+ 
+ (define_insn "aarch64_st2<mode>_dreg"
+-  [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:TI [(match_operand:OI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:OI 1 "register_operand" "w")
+                     (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST2))]
+   "TARGET_SIMD"
+@@ -4790,8 +5025,8 @@
+ )
+ 
+ (define_insn "aarch64_st3<mode>_dreg"
+-  [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:EI [(match_operand:CI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:CI 1 "register_operand" "w")
+                     (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST3))]
+   "TARGET_SIMD"
+@@ -4800,8 +5035,8 @@
+ )
+ 
+ (define_insn "aarch64_st3<mode>_dreg"
+-  [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:EI [(match_operand:CI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:CI 1 "register_operand" "w")
+                     (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST3))]
+   "TARGET_SIMD"
+@@ -4810,8 +5045,8 @@
+ )
+ 
+ (define_insn "aarch64_st4<mode>_dreg"
+-  [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:OI [(match_operand:XI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:XI 1 "register_operand" "w")
+                     (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST4))]
+   "TARGET_SIMD"
+@@ -4820,8 +5055,8 @@
+ )
+ 
+ (define_insn "aarch64_st4<mode>_dreg"
+-  [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv")
+-	(unspec:OI [(match_operand:XI 1 "register_operand" "w")
++  [(set (match_operand:BLK 0 "aarch64_simd_struct_operand" "=Utv")
++	(unspec:BLK [(match_operand:XI 1 "register_operand" "w")
+                     (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_ST4))]
+   "TARGET_SIMD"
+@@ -4835,8 +5070,8 @@
+   (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[0]);
++  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
++  set_mem_size (mem, <VSTRUCT:nregs> * 8);
+ 
+   emit_insn (gen_aarch64_st<VSTRUCT:nregs><VDC:mode>_dreg (mem, operands[1]));
+   DONE;
+@@ -4851,71 +5086,36 @@
+   machine_mode mode = <VSTRUCT:MODE>mode;
+   rtx mem = gen_rtx_MEM (mode, operands[0]);
+ 
+-  emit_insn (gen_vec_store_lanes<VSTRUCT:mode><VQ:mode> (mem, operands[1]));
++  emit_insn (gen_aarch64_simd_st<VSTRUCT:nregs><VQ:mode> (mem, operands[1]));
+   DONE;
+ })
+ 
+-(define_expand "aarch64_st2_lane<VQ:mode>"
++(define_expand "aarch64_st<VSTRUCT:nregs>_lane<VALLDIF:mode>"
+  [(match_operand:DI 0 "register_operand" "r")
+-  (match_operand:OI 1 "register_operand" "w")
+-  (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+-  (match_operand:SI 2 "immediate_operand")]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_TWO_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[0]);
+-  operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
+-
+-  emit_insn (gen_vec_store_lanesoi_lane<VQ:mode> (mem,
+-						  operands[1],
+-						  operands[2]));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_st3_lane<VQ:mode>"
+- [(match_operand:DI 0 "register_operand" "r")
+-  (match_operand:CI 1 "register_operand" "w")
+-  (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+-  (match_operand:SI 2 "immediate_operand")]
+-  "TARGET_SIMD"
+-{
+-  machine_mode mode = <V_THREE_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[0]);
+-  operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
+-
+-  emit_insn (gen_vec_store_lanesci_lane<VQ:mode> (mem,
+-						  operands[1],
+-						  operands[2]));
+-  DONE;
+-})
+-
+-(define_expand "aarch64_st4_lane<VQ:mode>"
+- [(match_operand:DI 0 "register_operand" "r")
+-  (match_operand:XI 1 "register_operand" "w")
+-  (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
++  (match_operand:VSTRUCT 1 "register_operand" "w")
++  (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)
+   (match_operand:SI 2 "immediate_operand")]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <V_FOUR_ELEM>mode;
+-  rtx mem = gen_rtx_MEM (mode, operands[0]);
+-  operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])));
++  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
++  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (<VALLDIF:MODE>mode))
++		     * <VSTRUCT:nregs>);
+ 
+-  emit_insn (gen_vec_store_lanesxi_lane<VQ:mode> (mem,
+-						  operands[1],
+-						  operands[2]));
++  emit_insn (gen_aarch64_vec_store_lanes<VSTRUCT:mode>_lane<VALLDIF:mode> (
++		mem, operands[1], operands[2]));
+   DONE;
+ })
+ 
+-(define_expand "aarch64_st1<VALL:mode>"
++(define_expand "aarch64_st1<VALL_F16:mode>"
+  [(match_operand:DI 0 "register_operand")
+-  (match_operand:VALL 1 "register_operand")]
++  (match_operand:VALL_F16 1 "register_operand")]
+   "TARGET_SIMD"
+ {
+-  machine_mode mode = <VALL:MODE>mode;
++  machine_mode mode = <VALL_F16:MODE>mode;
+   rtx mem = gen_rtx_MEM (mode, operands[0]);
+ 
+   if (BYTES_BIG_ENDIAN)
+-    emit_insn (gen_aarch64_be_st1<VALL:mode> (mem, operands[1]));
++    emit_insn (gen_aarch64_be_st1<VALL_F16:mode> (mem, operands[1]));
+   else
+     emit_move_insn (mem, operands[1]);
+   DONE;
+@@ -4946,7 +5146,7 @@
+ ;; Standard pattern name vec_init<mode>.
+ 
+ (define_expand "vec_init<mode>"
+-  [(match_operand:VALL 0 "register_operand" "")
++  [(match_operand:VALL_F16 0 "register_operand" "")
+    (match_operand 1 "" "")]
+   "TARGET_SIMD"
+ {
+@@ -4955,8 +5155,8 @@
+ })
+ 
+ (define_insn "*aarch64_simd_ld1r<mode>"
+-  [(set (match_operand:VALL 0 "register_operand" "=w")
+-	(vec_duplicate:VALL
++  [(set (match_operand:VALL_F16 0 "register_operand" "=w")
++	(vec_duplicate:VALL_F16
+ 	  (match_operand:<VEL> 1 "aarch64_simd_struct_operand" "Utv")))]
+   "TARGET_SIMD"
+   "ld1r\\t{%0.<Vtype>}, %1"
+@@ -5003,7 +5203,7 @@
+ 
+ (define_expand "vec_extract<mode>"
+   [(match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand" "")
+-   (match_operand:VALL 1 "register_operand" "")
++   (match_operand:VALL_F16 1 "register_operand" "")
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_SIMD"
+ {
+--- a/src/gcc/config/aarch64/aarch64-tune.md
++++ b/src/gcc/config/aarch64/aarch64-tune.md
+@@ -1,5 +1,5 @@
+ ;; -*- buffer-read-only: t -*-
+ ;; Generated automatically by gentune.sh from aarch64-cores.def
+ (define_attr "tune"
+-	"cortexa53,cortexa57,cortexa72,exynosm1,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
++	"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
+ 	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
+--- /dev/null
++++ b/src/gcc/config/aarch64/aarch64-tuning-flags.def
+@@ -0,0 +1,32 @@
++/* Copyright (C) 2015 Free Software Foundation, Inc.
++   Contributed by ARM Ltd.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++/* Additional control over certain tuning parameters.  Before including
++   this file, define a macro:
++
++     AARCH64_EXTRA_TUNING_OPTION (name, internal_name)
++
++   Where:
++
++     NAME is a string giving a friendly name for the tuning flag.
++     INTERNAL_NAME gives the internal name suitable for appending to
++     AARCH64_TUNE_ to give an enum name. */
++
++AARCH64_EXTRA_TUNING_OPTION ("rename_fma_regs", RENAME_FMA_REGS)
++
+--- a/src/gcc/config/aarch64/aarch64.c
++++ b/src/gcc/config/aarch64/aarch64.c
+@@ -75,6 +75,8 @@
+ #include "tm_p.h"
+ #include "recog.h"
+ #include "langhooks.h"
++#include "opts.h"
++#include "diagnostic.h"
+ #include "diagnostic-core.h"
+ #include "hash-table.h"
+ #include "tree-ssa-alias.h"
+@@ -84,6 +86,7 @@
+ #include "gimple-expr.h"
+ #include "is-a.h"
+ #include "gimple.h"
++#include "params.h"
+ #include "gimplify.h"
+ #include "optabs.h"
+ #include "dwarf2.h"
+@@ -95,6 +98,8 @@
+ #include "rtl-iter.h"
+ #include "tm-constrs.h"
+ #include "sched-int.h"
++#include "cortex-a57-fma-steering.h"
++#include "target-globals.h"
+ 
+ /* Defined for convenience.  */
+ #define POINTER_BYTES (POINTER_SIZE / BITS_PER_UNIT)
+@@ -166,7 +171,6 @@ static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED;
+ static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED;
+ static void aarch64_override_options_after_change (void);
+ static bool aarch64_vector_mode_supported_p (machine_mode);
+-static unsigned bit_count (unsigned HOST_WIDE_INT);
+ static bool aarch64_vectorize_vec_perm_const_ok (machine_mode vmode,
+ 						 const unsigned char *sel);
+ static int aarch64_address_cost (rtx, machine_mode, addr_space_t, bool);
+@@ -177,15 +181,42 @@ unsigned aarch64_architecture_version;
+ /* The processor for which instructions should be scheduled.  */
+ enum aarch64_processor aarch64_tune = cortexa53;
+ 
+-/* The current tuning set.  */
+-const struct tune_params *aarch64_tune_params;
+-
+-/* Mask to specify which instructions we are allowed to generate.  */
+-unsigned long aarch64_isa_flags = 0;
+-
+ /* Mask to specify which instruction scheduling options should be used.  */
+ unsigned long aarch64_tune_flags = 0;
+ 
++/* Global flag for PC relative loads.  */
++bool aarch64_nopcrelative_literal_loads;
++
++/* Support for command line parsing of boolean flags in the tuning
++   structures.  */
++struct aarch64_flag_desc
++{
++  const char* name;
++  unsigned int flag;
++};
++
++#define AARCH64_FUSION_PAIR(name, internal_name) \
++  { name, AARCH64_FUSE_##internal_name },
++static const struct aarch64_flag_desc aarch64_fusible_pairs[] =
++{
++  { "none", AARCH64_FUSE_NOTHING },
++#include "aarch64-fusion-pairs.def"
++  { "all", AARCH64_FUSE_ALL },
++  { NULL, AARCH64_FUSE_NOTHING }
++};
++#undef AARCH64_FUION_PAIR
++
++#define AARCH64_EXTRA_TUNING_OPTION(name, internal_name) \
++  { name, AARCH64_EXTRA_TUNE_##internal_name },
++static const struct aarch64_flag_desc aarch64_tuning_flags[] =
++{
++  { "none", AARCH64_EXTRA_TUNE_NONE },
++#include "aarch64-tuning-flags.def"
++  { "all", AARCH64_EXTRA_TUNE_ALL },
++  { NULL, AARCH64_EXTRA_TUNE_NONE }
++};
++#undef AARCH64_EXTRA_TUNING_OPTION
++
+ /* Tuning parameters.  */
+ 
+ static const struct cpu_addrcost_table generic_addrcost_table =
+@@ -199,7 +230,8 @@ static const struct cpu_addrcost_table generic_addrcost_table =
+   0, /* pre_modify  */
+   0, /* post_modify  */
+   0, /* register_offset  */
+-  0, /* register_extend  */
++  0, /* register_sextend  */
++  0, /* register_zextend  */
+   0 /* imm_offset  */
+ };
+ 
+@@ -214,7 +246,8 @@ static const struct cpu_addrcost_table cortexa57_addrcost_table =
+   0, /* pre_modify  */
+   0, /* post_modify  */
+   0, /* register_offset  */
+-  0, /* register_extend  */
++  0, /* register_sextend  */
++  0, /* register_zextend  */
+   0, /* imm_offset  */
+ };
+ 
+@@ -229,7 +262,8 @@ static const struct cpu_addrcost_table xgene1_addrcost_table =
+   1, /* pre_modify  */
+   0, /* post_modify  */
+   0, /* register_offset  */
+-  1, /* register_extend  */
++  1, /* register_sextend  */
++  1, /* register_zextend  */
+   0, /* imm_offset  */
+ };
+ 
+@@ -332,12 +366,19 @@ static const struct cpu_vector_cost xgene1_vector_cost =
+   1 /* cond_not_taken_branch_cost  */
+ };
+ 
+-#define AARCH64_FUSE_NOTHING	(0)
+-#define AARCH64_FUSE_MOV_MOVK	(1 << 0)
+-#define AARCH64_FUSE_ADRP_ADD	(1 << 1)
+-#define AARCH64_FUSE_MOVK_MOVK	(1 << 2)
+-#define AARCH64_FUSE_ADRP_LDR	(1 << 3)
+-#define AARCH64_FUSE_CMP_BRANCH	(1 << 4)
++/* Generic costs for branch instructions.  */
++static const struct cpu_branch_cost generic_branch_cost =
++{
++  2,  /* Predictable.  */
++  2   /* Unpredictable.  */
++};
++
++/* Branch costs for Cortex-A57.  */
++static const struct cpu_branch_cost cortexa57_branch_cost =
++{
++  1,  /* Predictable.  */
++  3   /* Unpredictable.  */
++};
+ 
+ static const struct tune_params generic_tunings =
+ {
+@@ -345,15 +386,47 @@ static const struct tune_params generic_tunings =
+   &generic_addrcost_table,
+   &generic_regmove_cost,
+   &generic_vector_cost,
++  &generic_branch_cost,
+   4, /* memmov_cost  */
+   2, /* issue_rate  */
+-  AARCH64_FUSE_NOTHING, /* fuseable_ops  */
++  AARCH64_FUSE_NOTHING, /* fusible_ops  */
++  8,	/* function_align.  */
++  8,	/* jump_align.  */
++  4,	/* loop_align.  */
++  2,	/* int_reassoc_width.  */
++  4,	/* fp_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_OFF,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
++};
++
++static const struct tune_params cortexa35_tunings =
++{
++  &cortexa53_extra_costs,
++  &generic_addrcost_table,
++  &cortexa53_regmove_cost,
++  &generic_vector_cost,
++  &generic_branch_cost,
++  4, /* memmov_cost  */
++  1, /* issue_rate  */
++  (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
++   | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
+   8,	/* function_align.  */
+   8,	/* jump_align.  */
+   4,	/* loop_align.  */
+   2,	/* int_reassoc_width.  */
+   4,	/* fp_reassoc_width.  */
+-  1	/* vec_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
+ };
+ 
+ static const struct tune_params cortexa53_tunings =
+@@ -362,16 +435,23 @@ static const struct tune_params cortexa53_tunings =
+   &generic_addrcost_table,
+   &cortexa53_regmove_cost,
+   &generic_vector_cost,
++  &generic_branch_cost,
+   4, /* memmov_cost  */
+   2, /* issue_rate  */
+-  (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
+-   | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fuseable_ops  */
++  (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
++   | AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fusible_ops  */
+   8,	/* function_align.  */
+   8,	/* jump_align.  */
+   4,	/* loop_align.  */
+   2,	/* int_reassoc_width.  */
+   4,	/* fp_reassoc_width.  */
+-  1	/* vec_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
+ };
+ 
+ static const struct tune_params cortexa57_tunings =
+@@ -380,16 +460,48 @@ static const struct tune_params cortexa57_tunings =
+   &cortexa57_addrcost_table,
+   &cortexa57_regmove_cost,
+   &cortexa57_vector_cost,
++  &cortexa57_branch_cost,
+   4, /* memmov_cost  */
+   3, /* issue_rate  */
+-  (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
+-   | AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops  */
++  (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
++   | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
++  16,	/* function_align.  */
++  8,	/* jump_align.  */
++  4,	/* loop_align.  */
++  2,	/* int_reassoc_width.  */
++  4,	/* fp_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_WEAK,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_RENAME_FMA_REGS)	/* tune_flags.  */
++};
++
++static const struct tune_params cortexa72_tunings =
++{
++  &cortexa57_extra_costs,
++  &cortexa57_addrcost_table,
++  &cortexa57_regmove_cost,
++  &cortexa57_vector_cost,
++  &generic_branch_cost,
++  4, /* memmov_cost  */
++  3, /* issue_rate  */
++  (AARCH64_FUSE_AES_AESMC | AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
++   | AARCH64_FUSE_MOVK_MOVK), /* fusible_ops  */
+   16,	/* function_align.  */
+   8,	/* jump_align.  */
+   4,	/* loop_align.  */
+   2,	/* int_reassoc_width.  */
+   4,	/* fp_reassoc_width.  */
+-  1	/* vec_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_OFF,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
+ };
+ 
+ static const struct tune_params thunderx_tunings =
+@@ -398,15 +510,22 @@ static const struct tune_params thunderx_tunings =
+   &generic_addrcost_table,
+   &thunderx_regmove_cost,
+   &generic_vector_cost,
++  &generic_branch_cost,
+   6, /* memmov_cost  */
+   2, /* issue_rate  */
+-  AARCH64_FUSE_CMP_BRANCH, /* fuseable_ops  */
++  AARCH64_FUSE_CMP_BRANCH, /* fusible_ops  */
+   8,	/* function_align.  */
+   8,	/* jump_align.  */
+   8,	/* loop_align.  */
+   2,	/* int_reassoc_width.  */
+   4,	/* fp_reassoc_width.  */
+-  1	/* vec_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_OFF,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
+ };
+ 
+ static const struct tune_params xgene1_tunings =
+@@ -415,55 +534,88 @@ static const struct tune_params xgene1_tunings =
+   &xgene1_addrcost_table,
+   &xgene1_regmove_cost,
+   &xgene1_vector_cost,
++  &generic_branch_cost,
+   6, /* memmov_cost  */
+   4, /* issue_rate  */
+-  AARCH64_FUSE_NOTHING, /* fuseable_ops  */
++  AARCH64_FUSE_NOTHING, /* fusible_ops  */
+   16,	/* function_align.  */
+   8,	/* jump_align.  */
+   16,	/* loop_align.  */
+   2,	/* int_reassoc_width.  */
+   4,	/* fp_reassoc_width.  */
+-  1	/* vec_reassoc_width.  */
++  1,	/* vec_reassoc_width.  */
++  2,	/* min_div_recip_mul_sf.  */
++  2,	/* min_div_recip_mul_df.  */
++  0,	/* max_case_values.  */
++  0,	/* cache_line_size.  */
++  tune_params::AUTOPREFETCHER_OFF,	/* autoprefetcher_model.  */
++  (AARCH64_EXTRA_TUNE_NONE)	/* tune_flags.  */
++};
++
++/* Support for fine-grained override of the tuning structures.  */
++struct aarch64_tuning_override_function
++{
++  const char* name;
++  void (*parse_override)(const char*, struct tune_params*);
++};
++
++static void aarch64_parse_fuse_string (const char*, struct tune_params*);
++static void aarch64_parse_tune_string (const char*, struct tune_params*);
++
++static const struct aarch64_tuning_override_function
++aarch64_tuning_override_functions[] =
++{
++  { "fuse", aarch64_parse_fuse_string },
++  { "tune", aarch64_parse_tune_string },
++  { NULL, NULL }
+ };
+ 
+ /* A processor implementing AArch64.  */
+ struct processor
+ {
+   const char *const name;
+-  enum aarch64_processor core;
+-  const char *arch;
++  enum aarch64_processor ident;
++  enum aarch64_processor sched_core;
++  enum aarch64_arch arch;
+   unsigned architecture_version;
+   const unsigned long flags;
+   const struct tune_params *const tune;
+ };
+ 
++/* Architectures implementing AArch64.  */
++static const struct processor all_architectures[] =
++{
++#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
++  {NAME, CORE, CORE, AARCH64_ARCH_##ARCH_IDENT, ARCH_REV, FLAGS, NULL},
++#include "aarch64-arches.def"
++#undef AARCH64_ARCH
++  {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
++};
++
+ /* Processor cores implementing AArch64.  */
+ static const struct processor all_cores[] =
+ {
+-#define AARCH64_CORE(NAME, IDENT, SCHED, ARCH, FLAGS, COSTS) \
+-  {NAME, SCHED, #ARCH, ARCH, FLAGS, &COSTS##_tunings},
++#define AARCH64_CORE(NAME, IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
++  {NAME, IDENT, SCHED, AARCH64_ARCH_##ARCH,				\
++  all_architectures[AARCH64_ARCH_##ARCH].architecture_version,	\
++  FLAGS, &COSTS##_tunings},
+ #include "aarch64-cores.def"
+ #undef AARCH64_CORE
+-  {"generic", cortexa53, "8", 8, AARCH64_FL_FOR_ARCH8, &generic_tunings},
+-  {NULL, aarch64_none, NULL, 0, 0, NULL}
++  {"generic", generic, cortexa53, AARCH64_ARCH_8A, 8,
++    AARCH64_FL_FOR_ARCH8, &generic_tunings},
++  {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
+ };
+ 
+-/* Architectures implementing AArch64.  */
+-static const struct processor all_architectures[] =
+-{
+-#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \
+-  {NAME, CORE, #ARCH, ARCH, FLAGS, NULL},
+-#include "aarch64-arches.def"
+-#undef AARCH64_ARCH
+-  {NULL, aarch64_none, NULL, 0, 0, NULL}
+-};
+ 
+-/* Target specification.  These are populated as commandline arguments
+-   are processed, or NULL if not specified.  */
++/* Target specification.  These are populated by the -march, -mtune, -mcpu
++   handling code or by target attributes.  */
+ static const struct processor *selected_arch;
+ static const struct processor *selected_cpu;
+ static const struct processor *selected_tune;
+ 
++/* The current tuning set.  */
++struct tune_params aarch64_tune_params = generic_tunings;
++
+ #define AARCH64_CPU_DEFAULT_FLAGS ((selected_cpu) ? selected_cpu->flags : 0)
+ 
+ /* An ISA extension in the co-processor and main instruction set space.  */
+@@ -477,7 +629,7 @@ struct aarch64_option_extension
+ /* ISA extensions in AArch64.  */
+ static const struct aarch64_option_extension all_extensions[] =
+ {
+-#define AARCH64_OPT_EXTENSION(NAME, FLAGS_ON, FLAGS_OFF) \
++#define AARCH64_OPT_EXTENSION(NAME, X, FLAGS_ON, FLAGS_OFF, FEATURE_STRING) \
+   {NAME, FLAGS_ON, FLAGS_OFF},
+ #include "aarch64-option-extensions.def"
+ #undef AARCH64_OPT_EXTENSION
+@@ -488,12 +640,6 @@ static const struct aarch64_option_extension all_extensions[] =
+    increment address.  */
+ static machine_mode aarch64_memory_reference_mode;
+ 
+-/* A table of valid AArch64 "bitmask immediate" values for
+-   logical instructions.  */
+-
+-#define AARCH64_NUM_BITMASKS  5334
+-static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS];
+-
+ typedef enum aarch64_cond_code
+ {
+   AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL,
+@@ -511,10 +657,45 @@ static const char * const aarch64_condition_codes[] =
+   "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
+ };
+ 
++/* Generate code to enable conditional branches in functions over 1 MiB.  */
++const char *
++aarch64_gen_far_branch (rtx * operands, int pos_label, const char * dest,
++			const char * branch_format)
++{
++    rtx_code_label * tmp_label = gen_label_rtx ();
++    char label_buf[256];
++    char buffer[128];
++    ASM_GENERATE_INTERNAL_LABEL (label_buf, dest,
++				 CODE_LABEL_NUMBER (tmp_label));
++    const char *label_ptr = targetm.strip_name_encoding (label_buf);
++    rtx dest_label = operands[pos_label];
++    operands[pos_label] = tmp_label;
++
++    snprintf (buffer, sizeof (buffer), "%s%s", branch_format, label_ptr);
++    output_asm_insn (buffer, operands);
++
++    snprintf (buffer, sizeof (buffer), "b\t%%l%d\n%s:", pos_label, label_ptr);
++    operands[pos_label] = dest_label;
++    output_asm_insn (buffer, operands);
++    return "";
++}
++
++void
++aarch64_err_no_fpadvsimd (machine_mode mode, const char *msg)
++{
++  const char *mc = FLOAT_MODE_P (mode) ? "floating-point" : "vector";
++  if (TARGET_GENERAL_REGS_ONLY)
++    error ("%qs is incompatible with %s %s", "-mgeneral-regs-only", mc, msg);
++  else
++    error ("%qs feature modifier is incompatible with %s %s", "+nofp", mc, msg);
++}
++
+ static unsigned int
+-aarch64_min_divisions_for_recip_mul (enum machine_mode mode ATTRIBUTE_UNUSED)
++aarch64_min_divisions_for_recip_mul (enum machine_mode mode)
+ {
+-  return 2;
++  if (GET_MODE_UNIT_SIZE (mode) == 4)
++    return aarch64_tune_params.min_div_recip_mul_sf;
++  return aarch64_tune_params.min_div_recip_mul_df;
+ }
+ 
+ static int
+@@ -522,11 +703,11 @@ aarch64_reassociation_width (unsigned opc ATTRIBUTE_UNUSED,
+ 			     enum machine_mode mode)
+ {
+   if (VECTOR_MODE_P (mode))
+-    return aarch64_tune_params->vec_reassoc_width;
++    return aarch64_tune_params.vec_reassoc_width;
+   if (INTEGRAL_MODE_P (mode))
+-    return aarch64_tune_params->int_reassoc_width;
++    return aarch64_tune_params.int_reassoc_width;
+   if (FLOAT_MODE_P (mode))
+-    return aarch64_tune_params->fp_reassoc_width;
++    return aarch64_tune_params.fp_reassoc_width;
+   return 1;
+ }
+ 
+@@ -567,7 +748,8 @@ aarch64_array_mode_supported_p (machine_mode mode,
+ 				unsigned HOST_WIDE_INT nelems)
+ {
+   if (TARGET_SIMD
+-      && AARCH64_VALID_SIMD_QREG_MODE (mode)
++      && (AARCH64_VALID_SIMD_QREG_MODE (mode)
++	  || AARCH64_VALID_SIMD_DREG_MODE (mode))
+       && (nelems >= 2 && nelems <= 4))
+     return true;
+ 
+@@ -656,6 +838,24 @@ aarch64_is_long_call_p (rtx sym)
+   return aarch64_decl_is_long_call_p (SYMBOL_REF_DECL (sym));
+ }
+ 
++/* Return true if calls to symbol-ref SYM should not go through
++   plt stubs.  */
++
++bool
++aarch64_is_noplt_call_p (rtx sym)
++{
++  const_tree decl = SYMBOL_REF_DECL (sym);
++
++  if (flag_pic
++      && decl
++      && (!flag_plt
++	  || lookup_attribute ("noplt", DECL_ATTRIBUTES (decl)))
++      && !targetm.binds_local_p (decl))
++    return true;
++
++  return false;
++}
++
+ /* Return true if the offsets to a zero/sign-extract operation
+    represent an expression that matches an extend operation.  The
+    operands represent the paramters from
+@@ -803,7 +1003,80 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+       emit_insn (gen_rtx_SET (Pmode, dest, imm));
+       return;
+ 
+-    case SYMBOL_SMALL_GOT:
++    case SYMBOL_SMALL_GOT_28K:
++      {
++	machine_mode mode = GET_MODE (dest);
++	rtx gp_rtx = pic_offset_table_rtx;
++	rtx insn;
++	rtx mem;
++
++	/* NOTE: pic_offset_table_rtx can be NULL_RTX, because we can reach
++	   here before rtl expand.  Tree IVOPT will generate rtl pattern to
++	   decide rtx costs, in which case pic_offset_table_rtx is not
++	   initialized.  For that case no need to generate the first adrp
++	   instruction as the the final cost for global variable access is
++	   one instruction.  */
++	if (gp_rtx != NULL)
++	  {
++	    /* -fpic for -mcmodel=small allow 32K GOT table size (but we are
++	       using the page base as GOT base, the first page may be wasted,
++	       in the worst scenario, there is only 28K space for GOT).
++
++	       The generate instruction sequence for accessing global variable
++	       is:
++
++		 ldr reg, [pic_offset_table_rtx, #:gotpage_lo15:sym]
++
++	       Only one instruction needed. But we must initialize
++	       pic_offset_table_rtx properly.  We generate initialize insn for
++	       every global access, and allow CSE to remove all redundant.
++
++	       The final instruction sequences will look like the following
++	       for multiply global variables access.
++
++		 adrp pic_offset_table_rtx, _GLOBAL_OFFSET_TABLE_
++
++		 ldr reg, [pic_offset_table_rtx, #:gotpage_lo15:sym1]
++		 ldr reg, [pic_offset_table_rtx, #:gotpage_lo15:sym2]
++		 ldr reg, [pic_offset_table_rtx, #:gotpage_lo15:sym3]
++		 ...  */
++
++	    rtx s = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
++	    crtl->uses_pic_offset_table = 1;
++	    emit_move_insn (gp_rtx, gen_rtx_HIGH (Pmode, s));
++
++	    if (mode != GET_MODE (gp_rtx))
++	      gp_rtx = simplify_gen_subreg (mode, gp_rtx, GET_MODE (gp_rtx), 0);
++	  }
++
++	if (mode == ptr_mode)
++	  {
++	    if (mode == DImode)
++	      insn = gen_ldr_got_small_28k_di (dest, gp_rtx, imm);
++	    else
++	      insn = gen_ldr_got_small_28k_si (dest, gp_rtx, imm);
++
++	    mem = XVECEXP (SET_SRC (insn), 0, 0);
++	  }
++	else
++	  {
++	    gcc_assert (mode == Pmode);
++
++	    insn = gen_ldr_got_small_28k_sidi (dest, gp_rtx, imm);
++	    mem = XVECEXP (XEXP (SET_SRC (insn), 0), 0, 0);
++	  }
++
++	/* The operand is expected to be MEM.  Whenever the related insn
++	   pattern changed, above code which calculate mem should be
++	   updated.  */
++	gcc_assert (GET_CODE (mem) == MEM);
++	MEM_READONLY_P (mem) = 1;
++	MEM_NOTRAP_P (mem) = 1;
++	emit_insn (insn);
++	return;
++      }
++
++    case SYMBOL_SMALL_GOT_4G:
+       {
+ 	/* In ILP32, the mode of dest can be either SImode or DImode,
+ 	   while the got entry is always of SImode size.  The mode of
+@@ -812,6 +1085,9 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+ 	   DImode if dest is dereferenced to access the memeory.
+ 	   This is why we have to handle three different ldr_got_small
+ 	   patterns here (two patterns for ILP32).  */
++
++	rtx insn;
++	rtx mem;
+ 	rtx tmp_reg = dest;
+ 	machine_mode mode = GET_MODE (dest);
+ 
+@@ -822,16 +1098,24 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+ 	if (mode == ptr_mode)
+ 	  {
+ 	    if (mode == DImode)
+-	      emit_insn (gen_ldr_got_small_di (dest, tmp_reg, imm));
++	      insn = gen_ldr_got_small_di (dest, tmp_reg, imm);
+ 	    else
+-	      emit_insn (gen_ldr_got_small_si (dest, tmp_reg, imm));
++	      insn = gen_ldr_got_small_si (dest, tmp_reg, imm);
++
++	    mem = XVECEXP (SET_SRC (insn), 0, 0);
+ 	  }
+ 	else
+ 	  {
+ 	    gcc_assert (mode == Pmode);
+-	    emit_insn (gen_ldr_got_small_sidi (dest, tmp_reg, imm));
++
++	    insn = gen_ldr_got_small_sidi (dest, tmp_reg, imm);
++	    mem = XVECEXP (XEXP (SET_SRC (insn), 0), 0, 0);
+ 	  }
+ 
++	gcc_assert (GET_CODE (mem) == MEM);
++	MEM_READONLY_P (mem) = 1;
++	MEM_NOTRAP_P (mem) = 1;
++	emit_insn (insn);
+ 	return;
+       }
+ 
+@@ -874,7 +1158,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+ 	return;
+       }
+ 
+-    case SYMBOL_SMALL_GOTTPREL:
++    case SYMBOL_SMALL_TLSIE:
+       {
+ 	/* In ILP32, the mode of dest can be either SImode or DImode,
+ 	   while the got entry is always of SImode size.  The mode of
+@@ -908,14 +1192,43 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+ 	return;
+       }
+ 
+-    case SYMBOL_SMALL_TPREL:
++    case SYMBOL_TLSLE12:
++    case SYMBOL_TLSLE24:
++    case SYMBOL_TLSLE32:
++    case SYMBOL_TLSLE48:
+       {
++	machine_mode mode = GET_MODE (dest);
+ 	rtx tp = aarch64_load_tp (NULL);
+ 
+-	if (GET_MODE (dest) != Pmode)
+-	  tp = gen_lowpart (GET_MODE (dest), tp);
++	if (mode != Pmode)
++	  tp = gen_lowpart (mode, tp);
++
++	switch (type)
++	  {
++	  case SYMBOL_TLSLE12:
++	    emit_insn ((mode == DImode ? gen_tlsle12_di : gen_tlsle12_si)
++			(dest, tp, imm));
++	    break;
++	  case SYMBOL_TLSLE24:
++	    emit_insn ((mode == DImode ? gen_tlsle24_di : gen_tlsle24_si)
++			(dest, tp, imm));
++	  break;
++	  case SYMBOL_TLSLE32:
++	    emit_insn ((mode == DImode ? gen_tlsle32_di : gen_tlsle32_si)
++			(dest, imm));
++	    emit_insn ((mode == DImode ? gen_adddi3 : gen_addsi3)
++			(dest, dest, tp));
++	  break;
++	  case SYMBOL_TLSLE48:
++	    emit_insn ((mode == DImode ? gen_tlsle48_di : gen_tlsle48_si)
++			(dest, imm));
++	    emit_insn ((mode == DImode ? gen_adddi3 : gen_addsi3)
++			(dest, dest, tp));
++	    break;
++	  default:
++	    gcc_unreachable ();
++	  }
+ 
+-	emit_insn (gen_tlsle_small (dest, tp, imm));
+ 	set_unique_reg_note (get_last_insn (), REG_EQUIV, imm);
+ 	return;
+       }
+@@ -924,6 +1237,31 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
+       emit_insn (gen_ldr_got_tiny (dest, imm));
+       return;
+ 
++    case SYMBOL_TINY_TLSIE:
++      {
++	machine_mode mode = GET_MODE (dest);
++	rtx tp = aarch64_load_tp (NULL);
++
++	if (mode == ptr_mode)
++	  {
++	    if (mode == DImode)
++	      emit_insn (gen_tlsie_tiny_di (dest, imm, tp));
++	    else
++	      {
++		tp = gen_lowpart (mode, tp);
++		emit_insn (gen_tlsie_tiny_si (dest, imm, tp));
++	      }
++	  }
++	else
++	  {
++	    gcc_assert (mode == Pmode);
++	    emit_insn (gen_tlsie_tiny_sidi (dest, imm, tp));
++	  }
++
++	set_unique_reg_note (get_last_insn (), REG_EQUIV, imm);
++	return;
++      }
++
+     default:
+       gcc_unreachable ();
+     }
+@@ -1052,6 +1390,9 @@ aarch64_split_simd_combine (rtx dst, rtx src1, rtx src2)
+ 	case V2SImode:
+ 	  gen = gen_aarch64_simd_combinev2si;
+ 	  break;
++	case V4HFmode:
++	  gen = gen_aarch64_simd_combinev4hf;
++	  break;
+ 	case V2SFmode:
+ 	  gen = gen_aarch64_simd_combinev2sf;
+ 	  break;
+@@ -1100,6 +1441,9 @@ aarch64_split_simd_move (rtx dst, rtx src)
+ 	case V2DImode:
+ 	  gen = gen_aarch64_split_simd_movv2di;
+ 	  break;
++	case V8HFmode:
++	  gen = gen_aarch64_split_simd_movv8hf;
++	  break;
+ 	case V4SFmode:
+ 	  gen = gen_aarch64_split_simd_movv4sf;
+ 	  break;
+@@ -1159,268 +1503,96 @@ static int
+ aarch64_internal_mov_immediate (rtx dest, rtx imm, bool generate,
+ 				machine_mode mode)
+ {
+-  unsigned HOST_WIDE_INT mask;
+   int i;
+-  bool first;
+-  unsigned HOST_WIDE_INT val;
+-  bool subtargets;
+-  rtx subtarget;
+-  int one_match, zero_match, first_not_ffff_match;
+-  int num_insns = 0;
++  unsigned HOST_WIDE_INT val, val2, mask;
++  int one_match, zero_match;
++  int num_insns;
++
++  val = INTVAL (imm);
+ 
+-  if (CONST_INT_P (imm) && aarch64_move_imm (INTVAL (imm), mode))
++  if (aarch64_move_imm (val, mode))
+     {
+       if (generate)
+ 	emit_insn (gen_rtx_SET (VOIDmode, dest, imm));
+-      num_insns++;
+-      return num_insns;
++      return 1;
+     }
+ 
+-  if (mode == SImode)
++  if ((val >> 32) == 0 || mode == SImode)
+     {
+-      /* We know we can't do this in 1 insn, and we must be able to do it
+-	 in two; so don't mess around looking for sequences that don't buy
+-	 us anything.  */
+       if (generate)
+ 	{
+-	  emit_insn (gen_rtx_SET (VOIDmode, dest,
+-				  GEN_INT (INTVAL (imm) & 0xffff)));
+-	  emit_insn (gen_insv_immsi (dest, GEN_INT (16),
+-				     GEN_INT ((INTVAL (imm) >> 16) & 0xffff)));
++	  emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (val & 0xffff)));
++	  if (mode == SImode)
++	    emit_insn (gen_insv_immsi (dest, GEN_INT (16),
++				       GEN_INT ((val >> 16) & 0xffff)));
++	  else
++	    emit_insn (gen_insv_immdi (dest, GEN_INT (16),
++				       GEN_INT ((val >> 16) & 0xffff)));
+ 	}
+-      num_insns += 2;
+-      return num_insns;
++      return 2;
+     }
+ 
+   /* Remaining cases are all for DImode.  */
+ 
+-  val = INTVAL (imm);
+-  subtargets = optimize && can_create_pseudo_p ();
+-
+-  one_match = 0;
+-  zero_match = 0;
+   mask = 0xffff;
+-  first_not_ffff_match = -1;
+-
+-  for (i = 0; i < 64; i += 16, mask <<= 16)
+-    {
+-      if ((val & mask) == mask)
+-	one_match++;
+-      else
+-	{
+-	  if (first_not_ffff_match < 0)
+-	    first_not_ffff_match = i;
+-	  if ((val & mask) == 0)
+-	    zero_match++;
+-	}
+-    }
+-
+-  if (one_match == 2)
+-    {
+-      /* Set one of the quarters and then insert back into result.  */
+-      mask = 0xffffll << first_not_ffff_match;
+-      if (generate)
+-	{
+-	  emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (val | mask)));
+-	  emit_insn (gen_insv_immdi (dest, GEN_INT (first_not_ffff_match),
+-				     GEN_INT ((val >> first_not_ffff_match)
+-					      & 0xffff)));
+-	}
+-      num_insns += 2;
+-      return num_insns;
+-    }
++  zero_match = ((val & mask) == 0) + ((val & (mask << 16)) == 0) +
++    ((val & (mask << 32)) == 0) + ((val & (mask << 48)) == 0);
++  one_match = ((~val & mask) == 0) + ((~val & (mask << 16)) == 0) +
++    ((~val & (mask << 32)) == 0) + ((~val & (mask << 48)) == 0);
+ 
+-  if (zero_match == 2)
+-    goto simple_sequence;
+-
+-  mask = 0x0ffff0000UL;
+-  for (i = 16; i < 64; i += 16, mask <<= 16)
++  if (zero_match != 2 && one_match != 2)
+     {
+-      HOST_WIDE_INT comp = mask & ~(mask - 1);
++      /* Try emitting a bitmask immediate with a movk replacing 16 bits.
++	 For a 64-bit bitmask try whether changing 16 bits to all ones or
++	 zeroes creates a valid bitmask.  To check any repeated bitmask,
++	 try using 16 bits from the other 32-bit half of val.  */
+ 
+-      if (aarch64_uimm12_shift (val - (val & mask)))
+-	{
+-	  if (generate)
+-	    {
+-	      subtarget = subtargets ? gen_reg_rtx (DImode) : dest;
+-	      emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-				      GEN_INT (val & mask)));
+-	      emit_insn (gen_adddi3 (dest, subtarget,
+-				     GEN_INT (val - (val & mask))));
+-	    }
+-	  num_insns += 2;
+-	  return num_insns;
+-	}
+-      else if (aarch64_uimm12_shift (-(val - ((val + comp) & mask))))
+-	{
+-	  if (generate)
+-	    {
+-	      subtarget = subtargets ? gen_reg_rtx (DImode) : dest;
+-	      emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-				      GEN_INT ((val + comp) & mask)));
+-	      emit_insn (gen_adddi3 (dest, subtarget,
+-				     GEN_INT (val - ((val + comp) & mask))));
+-	    }
+-	  num_insns += 2;
+-	  return num_insns;
+-	}
+-      else if (aarch64_uimm12_shift (val - ((val - comp) | ~mask)))
+-	{
+-	  if (generate)
+-	    {
+-	      subtarget = subtargets ? gen_reg_rtx (DImode) : dest;
+-	      emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-				      GEN_INT ((val - comp) | ~mask)));
+-	      emit_insn (gen_adddi3 (dest, subtarget,
+-				     GEN_INT (val - ((val - comp) | ~mask))));
+-	    }
+-	  num_insns += 2;
+-	  return num_insns;
+-	}
+-      else if (aarch64_uimm12_shift (-(val - (val | ~mask))))
++      for (i = 0; i < 64; i += 16, mask <<= 16)
+ 	{
+-	  if (generate)
+-	    {
+-	      subtarget = subtargets ? gen_reg_rtx (DImode) : dest;
+-	      emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-				      GEN_INT (val | ~mask)));
+-	      emit_insn (gen_adddi3 (dest, subtarget,
+-				     GEN_INT (val - (val | ~mask))));
+-	    }
+-	  num_insns += 2;
+-	  return num_insns;
++	  val2 = val & ~mask;
++	  if (val2 != val && aarch64_bitmask_imm (val2, mode))
++	    break;
++	  val2 = val | mask;
++	  if (val2 != val && aarch64_bitmask_imm (val2, mode))
++	    break;
++	  val2 = val2 & ~mask;
++	  val2 = val2 | (((val2 >> 32) | (val2 << 32)) & mask);
++	  if (val2 != val && aarch64_bitmask_imm (val2, mode))
++	    break;
+ 	}
+-    }
+-
+-  /* See if we can do it by arithmetically combining two
+-     immediates.  */
+-  for (i = 0; i < AARCH64_NUM_BITMASKS; i++)
+-    {
+-      int j;
+-      mask = 0xffff;
+-
+-      if (aarch64_uimm12_shift (val - aarch64_bitmasks[i])
+-	  || aarch64_uimm12_shift (-val + aarch64_bitmasks[i]))
++      if (i != 64)
+ 	{
+ 	  if (generate)
+ 	    {
+-	      subtarget = subtargets ? gen_reg_rtx (DImode) : dest;
+-	      emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-				      GEN_INT (aarch64_bitmasks[i])));
+-	      emit_insn (gen_adddi3 (dest, subtarget,
+-				     GEN_INT (val - aarch64_bitmasks[i])));
+-	    }
+-	  num_insns += 2;
+-	  return num_insns;
+-	}
+-
+-      for (j = 0; j < 64; j += 16, mask <<= 16)
+-	{
+-	  if ((aarch64_bitmasks[i] & ~mask) == (val & ~mask))
+-	    {
+-	      if (generate)
+-		{
+-		  emit_insn (gen_rtx_SET (VOIDmode, dest,
+-					  GEN_INT (aarch64_bitmasks[i])));
+-		  emit_insn (gen_insv_immdi (dest, GEN_INT (j),
+-					     GEN_INT ((val >> j) & 0xffff)));
+-		}
+-	      num_insns += 2;
+-	      return num_insns;
++	      emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (val2)));
++	      emit_insn (gen_insv_immdi (dest, GEN_INT (i),
++					 GEN_INT ((val >> i) & 0xffff)));
+ 	    }
++	  return 2;
+ 	}
+     }
+ 
+-  /* See if we can do it by logically combining two immediates.  */
+-  for (i = 0; i < AARCH64_NUM_BITMASKS; i++)
+-    {
+-      if ((aarch64_bitmasks[i] & val) == aarch64_bitmasks[i])
+-	{
+-	  int j;
+-
+-	  for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++)
+-	    if (val == (aarch64_bitmasks[i] | aarch64_bitmasks[j]))
+-	      {
+-		if (generate)
+-		  {
+-		    subtarget = subtargets ? gen_reg_rtx (mode) : dest;
+-		    emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-					    GEN_INT (aarch64_bitmasks[i])));
+-		    emit_insn (gen_iordi3 (dest, subtarget,
+-					   GEN_INT (aarch64_bitmasks[j])));
+-		  }
+-		num_insns += 2;
+-		return num_insns;
+-	      }
+-	}
+-      else if ((val & aarch64_bitmasks[i]) == val)
+-	{
+-	  int j;
++  /* Generate 2-4 instructions, skipping 16 bits of all zeroes or ones which
++     are emitted by the initial mov.  If one_match > zero_match, skip set bits,
++     otherwise skip zero bits.  */
+ 
+-	  for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++)
+-	    if (val == (aarch64_bitmasks[j] & aarch64_bitmasks[i]))
+-	      {
+-		if (generate)
+-		  {
+-		    subtarget = subtargets ? gen_reg_rtx (mode) : dest;
+-		    emit_insn (gen_rtx_SET (VOIDmode, subtarget,
+-					    GEN_INT (aarch64_bitmasks[j])));
+-		    emit_insn (gen_anddi3 (dest, subtarget,
+-					   GEN_INT (aarch64_bitmasks[i])));
+-		  }
+-		num_insns += 2;
+-		return num_insns;
+-	      }
+-	}
+-    }
++  num_insns = 1;
++  mask = 0xffff;
++  val2 = one_match > zero_match ? ~val : val;
++  i = (val2 & mask) != 0 ? 0 : (val2 & (mask << 16)) != 0 ? 16 : 32;
+ 
+-  if (one_match > zero_match)
++  if (generate)
++    emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (one_match > zero_match
++						    ? (val | ~(mask << i))
++						    : (val & (mask << i)))));
++  for (i += 16; i < 64; i += 16)
+     {
+-      /* Set either first three quarters or all but the third.	 */
+-      mask = 0xffffll << (16 - first_not_ffff_match);
++      if ((val2 & (mask << i)) == 0)
++	continue;
+       if (generate)
+-	emit_insn (gen_rtx_SET (VOIDmode, dest,
+-				GEN_INT (val | mask | 0xffffffff00000000ull)));
++	emit_insn (gen_insv_immdi (dest, GEN_INT (i),
++				   GEN_INT ((val >> i) & 0xffff)));
+       num_insns ++;
+-
+-      /* Now insert other two quarters.	 */
+-      for (i = first_not_ffff_match + 16, mask <<= (first_not_ffff_match << 1);
+-	   i < 64; i += 16, mask <<= 16)
+-	{
+-	  if ((val & mask) != mask)
+-	    {
+-	      if (generate)
+-		emit_insn (gen_insv_immdi (dest, GEN_INT (i),
+-					   GEN_INT ((val >> i) & 0xffff)));
+-	      num_insns ++;
+-	    }
+-	}
+-      return num_insns;
+-    }
+-
+- simple_sequence:
+-  first = true;
+-  mask = 0xffff;
+-  for (i = 0; i < 64; i += 16, mask <<= 16)
+-    {
+-      if ((val & mask) != 0)
+-	{
+-	  if (first)
+-	    {
+-	      if (generate)
+-		emit_insn (gen_rtx_SET (VOIDmode, dest,
+-					GEN_INT (val & mask)));
+-	      num_insns ++;
+-	      first = false;
+-	    }
+-	  else
+-	    {
+-	      if (generate)
+-		emit_insn (gen_insv_immdi (dest, GEN_INT (i),
+-					   GEN_INT ((val >> i) & 0xffff)));
+-	      num_insns ++;
+-	    }
+-	}
+     }
+ 
+   return num_insns;
+@@ -1446,7 +1618,7 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
+ 	 before we start classifying the symbol.  */
+       split_const (imm, &base, &offset);
+ 
+-      sty = aarch64_classify_symbol (base, offset, SYMBOL_CONTEXT_ADR);
++      sty = aarch64_classify_symbol (base, offset);
+       switch (sty)
+ 	{
+ 	case SYMBOL_FORCE_TO_MEM:
+@@ -1459,18 +1631,36 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
+ 	      aarch64_emit_move (dest, base);
+ 	      return;
+ 	    }
++
+ 	  mem = force_const_mem (ptr_mode, imm);
+ 	  gcc_assert (mem);
++
++	  /* If we aren't generating PC relative literals, then
++	     we need to expand the literal pool access carefully.
++	     This is something that needs to be done in a number
++	     of places, so could well live as a separate function.  */
++	  if (aarch64_nopcrelative_literal_loads)
++	    {
++	      gcc_assert (can_create_pseudo_p ());
++	      base = gen_reg_rtx (ptr_mode);
++	      aarch64_expand_mov_immediate (base, XEXP (mem, 0));
++	      mem = gen_rtx_MEM (ptr_mode, base);
++	    }
++
+ 	  if (mode != ptr_mode)
+ 	    mem = gen_rtx_ZERO_EXTEND (mode, mem);
++
+ 	  emit_insn (gen_rtx_SET (VOIDmode, dest, mem));
++
+ 	  return;
+ 
+         case SYMBOL_SMALL_TLSGD:
+         case SYMBOL_SMALL_TLSDESC:
+-        case SYMBOL_SMALL_GOTTPREL:
+-	case SYMBOL_SMALL_GOT:
++	case SYMBOL_SMALL_TLSIE:
++	case SYMBOL_SMALL_GOT_28K:
++	case SYMBOL_SMALL_GOT_4G:
+ 	case SYMBOL_TINY_GOT:
++	case SYMBOL_TINY_TLSIE:
+ 	  if (offset != const0_rtx)
+ 	    {
+ 	      gcc_assert(can_create_pseudo_p ());
+@@ -1481,9 +1671,12 @@ aarch64_expand_mov_immediate (rtx dest, rtx imm)
+ 	    }
+ 	  /* FALLTHRU */
+ 
+-        case SYMBOL_SMALL_TPREL:
+ 	case SYMBOL_SMALL_ABSOLUTE:
+ 	case SYMBOL_TINY_ABSOLUTE:
++	case SYMBOL_TLSLE12:
++	case SYMBOL_TLSLE24:
++	case SYMBOL_TLSLE32:
++	case SYMBOL_TLSLE48:
+ 	  aarch64_load_symref_appropriately (dest, imm, sty);
+ 	  return;
+ 
+@@ -1773,6 +1966,9 @@ aarch64_layout_arg (cumulative_args_t pcum_v, machine_mode mode,
+      and homogenous short-vector aggregates (HVA).  */
+   if (allocate_nvrn)
+     {
++      if (!TARGET_FLOAT)
++	aarch64_err_no_fpadvsimd (mode, "argument");
++
+       if (nvrn + nregs <= NUM_FP_ARG_REGS)
+ 	{
+ 	  pcum->aapcs_nextnvrn = nvrn + nregs;
+@@ -1899,6 +2095,17 @@ aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum,
+   pcum->aapcs_stack_words = 0;
+   pcum->aapcs_stack_size = 0;
+ 
++  if (!TARGET_FLOAT
++      && fndecl && TREE_PUBLIC (fndecl)
++      && fntype && fntype != error_mark_node)
++    {
++      const_tree type = TREE_TYPE (fntype);
++      machine_mode mode ATTRIBUTE_UNUSED; /* To pass pointer as argument.  */
++      int nregs ATTRIBUTE_UNUSED; /* Likewise.  */
++      if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), type,
++						   &mode, &nregs, NULL))
++	aarch64_err_no_fpadvsimd (TYPE_MODE (type), "return type");
++    }
+   return;
+ }
+ 
+@@ -3002,67 +3209,6 @@ aarch64_tls_referenced_p (rtx x)
+ }
+ 
+ 
+-static int
+-aarch64_bitmasks_cmp (const void *i1, const void *i2)
+-{
+-  const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1;
+-  const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2;
+-
+-  if (*imm1 < *imm2)
+-    return -1;
+-  if (*imm1 > *imm2)
+-    return +1;
+-  return 0;
+-}
+-
+-
+-static void
+-aarch64_build_bitmask_table (void)
+-{
+-  unsigned HOST_WIDE_INT mask, imm;
+-  unsigned int log_e, e, s, r;
+-  unsigned int nimms = 0;
+-
+-  for (log_e = 1; log_e <= 6; log_e++)
+-    {
+-      e = 1 << log_e;
+-      if (e == 64)
+-	mask = ~(HOST_WIDE_INT) 0;
+-      else
+-	mask = ((HOST_WIDE_INT) 1 << e) - 1;
+-      for (s = 1; s < e; s++)
+-	{
+-	  for (r = 0; r < e; r++)
+-	    {
+-	      /* set s consecutive bits to 1 (s < 64) */
+-	      imm = ((unsigned HOST_WIDE_INT)1 << s) - 1;
+-	      /* rotate right by r */
+-	      if (r != 0)
+-		imm = ((imm >> r) | (imm << (e - r))) & mask;
+-	      /* replicate the constant depending on SIMD size */
+-	      switch (log_e) {
+-	      case 1: imm |= (imm <<  2);
+-	      case 2: imm |= (imm <<  4);
+-	      case 3: imm |= (imm <<  8);
+-	      case 4: imm |= (imm << 16);
+-	      case 5: imm |= (imm << 32);
+-	      case 6:
+-		break;
+-	      default:
+-		gcc_unreachable ();
+-	      }
+-	      gcc_assert (nimms < AARCH64_NUM_BITMASKS);
+-	      aarch64_bitmasks[nimms++] = imm;
+-	    }
+-	}
+-    }
+-
+-  gcc_assert (nimms == AARCH64_NUM_BITMASKS);
+-  qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]),
+-	 aarch64_bitmasks_cmp);
+-}
+-
+-
+ /* Return true if val can be encoded as a 12-bit unsigned immediate with
+    a left shift of 0 or 12 bits.  */
+ bool
+@@ -3094,19 +3240,63 @@ aarch64_movw_imm (HOST_WIDE_INT val, machine_mode mode)
+ 	  || (val & (((HOST_WIDE_INT) 0xffff) << 16)) == val);
+ }
+ 
++/* Multipliers for repeating bitmasks of width 32, 16, 8, 4, and 2.  */
++
++static const unsigned HOST_WIDE_INT bitmask_imm_mul[] =
++  {
++    0x0000000100000001ull,
++    0x0001000100010001ull,
++    0x0101010101010101ull,
++    0x1111111111111111ull,
++    0x5555555555555555ull,
++  };
++
+ 
+ /* Return true if val is a valid bitmask immediate.  */
++
+ bool
+-aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode mode)
++aarch64_bitmask_imm (HOST_WIDE_INT val_in, machine_mode mode)
+ {
+-  if (GET_MODE_SIZE (mode) < 8)
+-    {
+-      /* Replicate bit pattern.  */
+-      val &= (HOST_WIDE_INT) 0xffffffff;
+-      val |= val << 32;
+-    }
+-  return bsearch (&val, aarch64_bitmasks, AARCH64_NUM_BITMASKS,
+-		  sizeof (aarch64_bitmasks[0]), aarch64_bitmasks_cmp) != NULL;
++  unsigned HOST_WIDE_INT val, tmp, mask, first_one, next_one;
++  int bits;
++
++  /* Check for a single sequence of one bits and return quickly if so.
++     The special cases of all ones and all zeroes returns false.  */
++  val = (unsigned HOST_WIDE_INT) val_in;
++  tmp = val + (val & -val);
++
++  if (tmp == (tmp & -tmp))
++    return (val + 1) > 1;
++
++  /* Replicate 32-bit immediates so we can treat them as 64-bit.  */
++  if (mode == SImode)
++    val = (val << 32) | (val & 0xffffffff);
++
++  /* Invert if the immediate doesn't start with a zero bit - this means we
++     only need to search for sequences of one bits.  */
++  if (val & 1)
++    val = ~val;
++
++  /* Find the first set bit and set tmp to val with the first sequence of one
++     bits removed.  Return success if there is a single sequence of ones.  */
++  first_one = val & -val;
++  tmp = val & (val + first_one);
++
++  if (tmp == 0)
++    return true;
++
++  /* Find the next set bit and compute the difference in bit position.  */
++  next_one = tmp & -tmp;
++  bits = clz_hwi (first_one) - clz_hwi (next_one);
++  mask = val ^ tmp;
++
++  /* Check the bit position difference is a power of 2, and that the first
++     sequence of one bits fits within 'bits' bits.  */
++  if ((mask >> bits) != 0 || bits != (bits & -bits))
++    return false;
++
++  /* Check the sequence of one bits is repeated 64/bits times.  */
++  return val == mask * bitmask_imm_mul[__builtin_clz (bits) - 26];
+ }
+ 
+ 
+@@ -3131,7 +3321,7 @@ aarch64_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
+   split_const (x, &base, &offset);
+   if (GET_CODE (base) == SYMBOL_REF || GET_CODE (base) == LABEL_REF)
+     {
+-      if (aarch64_classify_symbol (base, offset, SYMBOL_CONTEXT_ADR)
++      if (aarch64_classify_symbol (base, offset)
+ 	  != SYMBOL_FORCE_TO_MEM)
+ 	return true;
+       else
+@@ -3143,6 +3333,20 @@ aarch64_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x)
+   return aarch64_tls_referenced_p (x);
+ }
+ 
++/* Implement TARGET_CASE_VALUES_THRESHOLD.  */
++
++static unsigned int
++aarch64_case_values_threshold (void)
++{
++  /* Use the specified limit for the number of cases before using jump
++     tables at higher optimization levels.  */
++  if (optimize > 2
++      && selected_cpu->tune->max_case_values != 0)
++    return selected_cpu->tune->max_case_values;
++  else
++    return default_case_values_threshold ();
++}
++
+ /* Return true if register REGNO is a valid index register.
+    STRICT_P is true if REG_OK_STRICT is in effect.  */
+ 
+@@ -3382,6 +3586,18 @@ offset_12bit_unsigned_scaled_p (machine_mode mode, HOST_WIDE_INT offset)
+ 	  && offset % GET_MODE_SIZE (mode) == 0);
+ }
+ 
++/* Return true if MODE is one of the modes for which we
++   support LDP/STP operations.  */
++
++static bool
++aarch64_mode_valid_for_sched_fusion_p (machine_mode mode)
++{
++  return mode == SImode || mode == DImode
++	 || mode == SFmode || mode == DFmode
++	 || (aarch64_vector_mode_supported_p (mode)
++	     && GET_MODE_SIZE (mode) == 8);
++}
++
+ /* Return true if X is a valid address for machine mode MODE.  If it is,
+    fill in INFO appropriately.  STRICT_P is true if REG_OK_STRICT is in
+    effect.  OUTER_CODE is PARALLEL for a load/store pair.  */
+@@ -3560,9 +3776,10 @@ aarch64_classify_address (struct aarch64_address_info *info,
+ 	  rtx sym, addend;
+ 
+ 	  split_const (x, &sym, &addend);
+-	  return (GET_CODE (sym) == LABEL_REF
+-		  || (GET_CODE (sym) == SYMBOL_REF
+-		      && CONSTANT_POOL_ADDRESS_P (sym)));
++	  return ((GET_CODE (sym) == LABEL_REF
++		   || (GET_CODE (sym) == SYMBOL_REF
++		       && CONSTANT_POOL_ADDRESS_P (sym)
++		       && !aarch64_nopcrelative_literal_loads)));
+ 	}
+       return false;
+ 
+@@ -3576,8 +3793,7 @@ aarch64_classify_address (struct aarch64_address_info *info,
+ 	  rtx sym, offs;
+ 	  split_const (info->offset, &sym, &offs);
+ 	  if (GET_CODE (sym) == SYMBOL_REF
+-	      && (aarch64_classify_symbol (sym, offs, SYMBOL_CONTEXT_MEM)
+-		  == SYMBOL_SMALL_ABSOLUTE))
++	      && (aarch64_classify_symbol (sym, offs) == SYMBOL_SMALL_ABSOLUTE))
+ 	    {
+ 	      /* The symbol and offset must be aligned to the access size.  */
+ 	      unsigned int align;
+@@ -3623,17 +3839,15 @@ aarch64_symbolic_address_p (rtx x)
+   return GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF;
+ }
+ 
+-/* Classify the base of symbolic expression X, given that X appears in
+-   context CONTEXT.  */
++/* Classify the base of symbolic expression X.  */
+ 
+ enum aarch64_symbol_type
+-aarch64_classify_symbolic_expression (rtx x,
+-				      enum aarch64_symbol_context context)
++aarch64_classify_symbolic_expression (rtx x)
+ {
+   rtx offset;
+ 
+   split_const (x, &x, &offset);
+-  return aarch64_classify_symbol (x, offset, context);
++  return aarch64_classify_symbol (x, offset);
+ }
+ 
+ 
+@@ -3728,11 +3942,20 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
+ 	}
+     }
+ 
++  /* Equality comparisons of short modes against zero can be performed
++     using the TST instruction with the appropriate bitmask.  */
++  if (y == const0_rtx && REG_P (x)
++      && (code == EQ || code == NE)
++      && (GET_MODE (x) == HImode || GET_MODE (x) == QImode))
++    return CC_NZmode;
++
+   if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode)
+       && y == const0_rtx
+       && (code == EQ || code == NE || code == LT || code == GE)
+       && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS || GET_CODE (x) == AND
+-	  || GET_CODE (x) == NEG))
++	  || GET_CODE (x) == NEG
++	  || (GET_CODE (x) == ZERO_EXTRACT && CONST_INT_P (XEXP (x, 1))
++	      && CONST_INT_P (XEXP (x, 2)))))
+     return CC_NZmode;
+ 
+   /* A compare with a shifted operand.  Because of canonicalization,
+@@ -3971,19 +4194,6 @@ aarch64_const_vec_all_same_int_p (rtx x, HOST_WIDE_INT val)
+   return aarch64_const_vec_all_same_in_range_p (x, val, val);
+ }
+ 
+-static unsigned
+-bit_count (unsigned HOST_WIDE_INT value)
+-{
+-  unsigned count = 0;
+-
+-  while (value)
+-    {
+-      count++;
+-      value &= value - 1;
+-    }
+-
+-  return count;
+-}
+ 
+ /* N Z C V.  */
+ #define AARCH64_CC_V 1
+@@ -4138,7 +4348,7 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 	  return;
+ 	}
+ 
+-      asm_fprintf (f, "%u", bit_count (INTVAL (x)));
++      asm_fprintf (f, "%u", popcount_hwi (INTVAL (x)));
+       break;
+ 
+     case 'H':
+@@ -4289,6 +4499,7 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 	  output_address (XEXP (x, 0));
+ 	  break;
+ 
++	case CONST:
+ 	case LABEL_REF:
+ 	case SYMBOL_REF:
+ 	  output_addr_const (asm_out_file, x);
+@@ -4349,9 +4560,9 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+       if (GET_CODE (x) == HIGH)
+ 	x = XEXP (x, 0);
+ 
+-      switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR))
++      switch (aarch64_classify_symbolic_expression (x))
+ 	{
+-	case SYMBOL_SMALL_GOT:
++	case SYMBOL_SMALL_GOT_4G:
+ 	  asm_fprintf (asm_out_file, ":got:");
+ 	  break;
+ 
+@@ -4363,11 +4574,11 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 	  asm_fprintf (asm_out_file, ":tlsdesc:");
+ 	  break;
+ 
+-	case SYMBOL_SMALL_GOTTPREL:
++	case SYMBOL_SMALL_TLSIE:
+ 	  asm_fprintf (asm_out_file, ":gottprel:");
+ 	  break;
+ 
+-	case SYMBOL_SMALL_TPREL:
++	case SYMBOL_TLSLE24:
+ 	  asm_fprintf (asm_out_file, ":tprel:");
+ 	  break;
+ 
+@@ -4382,9 +4593,9 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+       break;
+ 
+     case 'L':
+-      switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR))
++      switch (aarch64_classify_symbolic_expression (x))
+ 	{
+-	case SYMBOL_SMALL_GOT:
++	case SYMBOL_SMALL_GOT_4G:
+ 	  asm_fprintf (asm_out_file, ":lo12:");
+ 	  break;
+ 
+@@ -4396,11 +4607,15 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 	  asm_fprintf (asm_out_file, ":tlsdesc_lo12:");
+ 	  break;
+ 
+-	case SYMBOL_SMALL_GOTTPREL:
++	case SYMBOL_SMALL_TLSIE:
+ 	  asm_fprintf (asm_out_file, ":gottprel_lo12:");
+ 	  break;
+ 
+-	case SYMBOL_SMALL_TPREL:
++	case SYMBOL_TLSLE12:
++	  asm_fprintf (asm_out_file, ":tprel_lo12:");
++	  break;
++
++	case SYMBOL_TLSLE24:
+ 	  asm_fprintf (asm_out_file, ":tprel_lo12_nc:");
+ 	  break;
+ 
+@@ -4408,6 +4623,10 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 	  asm_fprintf (asm_out_file, ":got:");
+ 	  break;
+ 
++	case SYMBOL_TINY_TLSIE:
++	  asm_fprintf (asm_out_file, ":gottprel:");
++	  break;
++
+ 	default:
+ 	  break;
+ 	}
+@@ -4416,9 +4635,9 @@ aarch64_print_operand (FILE *f, rtx x, char code)
+ 
+     case 'G':
+ 
+-      switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR))
++      switch (aarch64_classify_symbolic_expression (x))
+ 	{
+-	case SYMBOL_SMALL_TPREL:
++	case SYMBOL_TLSLE24:
+ 	  asm_fprintf (asm_out_file, ":tprel_hi12:");
+ 	  break;
+ 	default:
+@@ -4765,12 +4984,69 @@ aarch64_legitimize_reload_address (rtx *x_p,
+ }
+ 
+ 
++/* Return the reload icode required for a constant pool in mode.  */
++static enum insn_code
++aarch64_constant_pool_reload_icode (machine_mode mode)
++{
++  switch (mode)
++    {
++    case SFmode:
++      return CODE_FOR_aarch64_reload_movcpsfdi;
++
++    case DFmode:
++      return CODE_FOR_aarch64_reload_movcpdfdi;
++
++    case TFmode:
++      return CODE_FOR_aarch64_reload_movcptfdi;
++
++    case V8QImode:
++      return CODE_FOR_aarch64_reload_movcpv8qidi;
++
++    case V16QImode:
++      return CODE_FOR_aarch64_reload_movcpv16qidi;
++
++    case V4HImode:
++      return CODE_FOR_aarch64_reload_movcpv4hidi;
++
++    case V8HImode:
++      return CODE_FOR_aarch64_reload_movcpv8hidi;
++
++    case V2SImode:
++      return CODE_FOR_aarch64_reload_movcpv2sidi;
++
++    case V4SImode:
++      return CODE_FOR_aarch64_reload_movcpv4sidi;
++
++    case V2DImode:
++      return CODE_FOR_aarch64_reload_movcpv2didi;
++
++    case V2DFmode:
++      return CODE_FOR_aarch64_reload_movcpv2dfdi;
++
++    default:
++      gcc_unreachable ();
++    }
++
++  gcc_unreachable ();
++}
+ static reg_class_t
+ aarch64_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x,
+ 			  reg_class_t rclass,
+ 			  machine_mode mode,
+ 			  secondary_reload_info *sri)
+ {
++
++  /* If we have to disable direct literal pool loads and stores because the
++     function is too big, then we need a scratch register.  */
++  if (MEM_P (x) && GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x)
++      && (SCALAR_FLOAT_MODE_P (GET_MODE (x))
++	  || targetm.vector_mode_supported_p (GET_MODE (x)))
++      && aarch64_nopcrelative_literal_loads)
++    {
++      sri->icode = aarch64_constant_pool_reload_icode (mode);
++      return NO_REGS;
++    }
++
+   /* Without the TARGET_SIMD instructions we cannot move a Q register
+      to a Q register directly.  We need a scratch.  */
+   if (REG_P (x) && (mode == TFmode || mode == TImode) && mode == GET_MODE (x)
+@@ -4926,8 +5202,9 @@ aarch64_class_max_nregs (reg_class_t regclass, machine_mode mode)
+     case FP_REGS:
+     case FP_LO_REGS:
+       return
+-	aarch64_vector_mode_p (mode) ? (GET_MODE_SIZE (mode) + 15) / 16 :
+-				       (GET_MODE_SIZE (mode) + 7) / 8;
++	aarch64_vector_mode_p (mode)
++	  ? (GET_MODE_SIZE (mode) + UNITS_PER_VREG - 1) / UNITS_PER_VREG
++	  : (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+     case STACK_REG:
+       return 1;
+ 
+@@ -5182,9 +5459,18 @@ aarch64_strip_extend (rtx x)
+   return x;
+ }
+ 
++/* Return true iff CODE is a shift supported in combination
++   with arithmetic instructions.  */
++
++static bool
++aarch64_shift_p (enum rtx_code code)
++{
++  return code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT;
++}
++
+ /* Helper function for rtx cost calculation.  Calculate the cost of
+-   a MULT, which may be part of a multiply-accumulate rtx.  Return
+-   the calculated cost of the expression, recursing manually in to
++   a MULT or ASHIFT, which may be part of a compound PLUS/MINUS rtx.
++   Return the calculated cost of the expression, recursing manually in to
+    operands where needed.  */
+ 
+ static int
+@@ -5192,9 +5478,9 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+ {
+   rtx op0, op1;
+   const struct cpu_cost_table *extra_cost
+-    = aarch64_tune_params->insn_extra_cost;
++    = aarch64_tune_params.insn_extra_cost;
+   int cost = 0;
+-  bool maybe_fma = (outer == PLUS || outer == MINUS);
++  bool compound_p = (outer == PLUS || outer == MINUS);
+   machine_mode mode = GET_MODE (x);
+ 
+   gcc_checking_assert (code == MULT);
+@@ -5209,24 +5495,50 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+   if (GET_MODE_CLASS (mode) == MODE_INT)
+     {
+       /* The multiply will be canonicalized as a shift, cost it as such.  */
+-      if (CONST_INT_P (op1)
+-	  && exact_log2 (INTVAL (op1)) > 0)
++      if (aarch64_shift_p (GET_CODE (x))
++	  || (CONST_INT_P (op1)
++	      && exact_log2 (INTVAL (op1)) > 0))
+ 	{
++	  bool is_extend = GET_CODE (op0) == ZERO_EXTEND
++	                   || GET_CODE (op0) == SIGN_EXTEND;
+ 	  if (speed)
+ 	    {
+-	      if (maybe_fma)
+-		/* ADD (shifted register).  */
+-		cost += extra_cost->alu.arith_shift;
++	      if (compound_p)
++	        {
++	          if (REG_P (op1))
++		    /* ARITH + shift-by-register.  */
++		    cost += extra_cost->alu.arith_shift_reg;
++		  else if (is_extend)
++		    /* ARITH + extended register.  We don't have a cost field
++		       for ARITH+EXTEND+SHIFT, so use extend_arith here.  */
++		    cost += extra_cost->alu.extend_arith;
++		  else
++		    /* ARITH + shift-by-immediate.  */
++		    cost += extra_cost->alu.arith_shift;
++		}
+ 	      else
+ 		/* LSL (immediate).  */
+-		cost += extra_cost->alu.shift;
++	        cost += extra_cost->alu.shift;
++
+ 	    }
++	  /* Strip extends as we will have costed them in the case above.  */
++	  if (is_extend)
++	    op0 = aarch64_strip_extend (op0);
+ 
+ 	  cost += rtx_cost (op0, GET_CODE (op0), 0, speed);
+ 
+ 	  return cost;
+ 	}
+ 
++      /* MNEG or [US]MNEGL.  Extract the NEG operand and indicate that it's a
++	 compound and let the below cases handle it.  After all, MNEG is a
++	 special-case alias of MSUB.  */
++      if (GET_CODE (op0) == NEG)
++	{
++	  op0 = XEXP (op0, 0);
++	  compound_p = true;
++	}
++
+       /* Integer multiplies or FMAs have zero/sign extending variants.  */
+       if ((GET_CODE (op0) == ZERO_EXTEND
+ 	   && GET_CODE (op1) == ZERO_EXTEND)
+@@ -5238,8 +5550,8 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+ 
+ 	  if (speed)
+ 	    {
+-	      if (maybe_fma)
+-		/* MADD/SMADDL/UMADDL.  */
++	      if (compound_p)
++		/* SMADDL/UMADDL/UMSUBL/SMSUBL.  */
+ 		cost += extra_cost->mult[0].extend_add;
+ 	      else
+ 		/* MUL/SMULL/UMULL.  */
+@@ -5249,15 +5561,15 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+ 	  return cost;
+ 	}
+ 
+-      /* This is either an integer multiply or an FMA.  In both cases
++      /* This is either an integer multiply or a MADD.  In both cases
+ 	 we want to recurse and cost the operands.  */
+       cost += rtx_cost (op0, MULT, 0, speed)
+ 	      + rtx_cost (op1, MULT, 1, speed);
+ 
+       if (speed)
+ 	{
+-	  if (maybe_fma)
+-	    /* MADD.  */
++	  if (compound_p)
++	    /* MADD/MSUB.  */
+ 	    cost += extra_cost->mult[mode == DImode].add;
+ 	  else
+ 	    /* MUL.  */
+@@ -5275,7 +5587,7 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+ 	     which case FNMUL is different than FMUL with operand negation.  */
+ 	  bool neg0 = GET_CODE (op0) == NEG;
+ 	  bool neg1 = GET_CODE (op1) == NEG;
+-	  if (maybe_fma || !flag_rounding_math || (neg0 && neg1))
++	  if (compound_p || !flag_rounding_math || (neg0 && neg1))
+ 	    {
+ 	      if (neg0)
+ 		op0 = XEXP (op0, 0);
+@@ -5283,7 +5595,7 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed)
+ 		op1 = XEXP (op1, 0);
+ 	    }
+ 
+-	  if (maybe_fma)
++	  if (compound_p)
+ 	    /* FMADD/FNMADD/FNMSUB/FMSUB.  */
+ 	    cost += extra_cost->fp[mode == DFmode].fma;
+ 	  else
+@@ -5304,7 +5616,7 @@ aarch64_address_cost (rtx x,
+ 		      bool speed)
+ {
+   enum rtx_code c = GET_CODE (x);
+-  const struct cpu_addrcost_table *addr_cost = aarch64_tune_params->addr_cost;
++  const struct cpu_addrcost_table *addr_cost = aarch64_tune_params.addr_cost;
+   struct aarch64_address_info info;
+   int cost = 0;
+   info.shift = 0;
+@@ -5354,9 +5666,12 @@ aarch64_address_cost (rtx x,
+ 	cost += addr_cost->register_offset;
+ 	break;
+ 
+-      case ADDRESS_REG_UXTW:
+       case ADDRESS_REG_SXTW:
+-	cost += addr_cost->register_extend;
++	cost += addr_cost->register_sextend;
++	break;
++
++      case ADDRESS_REG_UXTW:
++	cost += addr_cost->register_zextend;
+ 	break;
+ 
+       default:
+@@ -5392,6 +5707,23 @@ aarch64_address_cost (rtx x,
+   return cost;
+ }
+ 
++/* Return the cost of a branch.  If SPEED_P is true then the compiler is
++   optimizing for speed.  If PREDICTABLE_P is true then the branch is predicted
++   to be taken.  */
++
++int
++aarch64_branch_cost (bool speed_p, bool predictable_p)
++{
++  /* When optimizing for speed, use the cost of unpredictable branches.  */
++  const struct cpu_branch_cost *branch_costs =
++    aarch64_tune_params.branch_costs;
++
++  if (!speed_p || predictable_p)
++    return branch_costs->predictable;
++  else
++    return branch_costs->unpredictable;
++}
++
+ /* Return true if the RTX X in mode MODE is a zero or sign extract
+    usable in an ADD or SUB (extended register) instruction.  */
+ static bool
+@@ -5417,6 +5749,11 @@ aarch64_rtx_arith_op_extract_p (rtx x, machine_mode mode)
+ 	  return true;
+ 	}
+     }
++  /* The simple case <ARITH>, XD, XN, XM, [us]xt.
++     No shift.  */
++  else if (GET_CODE (x) == SIGN_EXTEND
++	   || GET_CODE (x) == ZERO_EXTEND)
++    return REG_P (XEXP (x, 0));
+ 
+   return false;
+ }
+@@ -5440,6 +5777,51 @@ aarch64_frint_unspec_p (unsigned int u)
+     }
+ }
+ 
++/* Return true iff X is an rtx that will match an extr instruction
++   i.e. as described in the *extr<mode>5_insn family of patterns.
++   OP0 and OP1 will be set to the operands of the shifts involved
++   on success and will be NULL_RTX otherwise.  */
++
++static bool
++aarch64_extr_rtx_p (rtx x, rtx *res_op0, rtx *res_op1)
++{
++  rtx op0, op1;
++  machine_mode mode = GET_MODE (x);
++
++  *res_op0 = NULL_RTX;
++  *res_op1 = NULL_RTX;
++
++  if (GET_CODE (x) != IOR)
++    return false;
++
++  op0 = XEXP (x, 0);
++  op1 = XEXP (x, 1);
++
++  if ((GET_CODE (op0) == ASHIFT && GET_CODE (op1) == LSHIFTRT)
++      || (GET_CODE (op1) == ASHIFT && GET_CODE (op0) == LSHIFTRT))
++    {
++     /* Canonicalise locally to ashift in op0, lshiftrt in op1.  */
++      if (GET_CODE (op1) == ASHIFT)
++        std::swap (op0, op1);
++
++      if (!CONST_INT_P (XEXP (op0, 1)) || !CONST_INT_P (XEXP (op1, 1)))
++        return false;
++
++      unsigned HOST_WIDE_INT shft_amnt_0 = UINTVAL (XEXP (op0, 1));
++      unsigned HOST_WIDE_INT shft_amnt_1 = UINTVAL (XEXP (op1, 1));
++
++      if (shft_amnt_0 < GET_MODE_BITSIZE (mode)
++          && shft_amnt_0 + shft_amnt_1 == GET_MODE_BITSIZE (mode))
++        {
++          *res_op0 = XEXP (op0, 0);
++          *res_op1 = XEXP (op1, 0);
++          return true;
++        }
++    }
++
++  return false;
++}
++
+ /* Calculate the cost of calculating (if_then_else (OP0) (OP1) (OP2)),
+    storing it in *COST.  Result is true if the total cost of the operation
+    has now been calculated.  */
+@@ -5504,6 +5886,12 @@ aarch64_if_then_else_costs (rtx op0, rtx op1, rtx op2, int *cost, bool speed)
+           || GET_CODE (op1) == NOT
+           || (GET_CODE (op1) == PLUS && XEXP (op1, 1) == const1_rtx))
+ 	op1 = XEXP (op1, 0);
++      else if (GET_CODE (op1) == ZERO_EXTEND && GET_CODE (op2) == ZERO_EXTEND)
++	{
++	  /* CSEL with zero-extension (*cmovdi_insn_uxtw).  */
++	  op1 = XEXP (op1, 0);
++	  op2 = XEXP (op2, 0);
++	}
+ 
+       *cost += rtx_cost (op1, IF_THEN_ELSE, 1, speed);
+       *cost += rtx_cost (op2, IF_THEN_ELSE, 2, speed);
+@@ -5522,7 +5910,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ {
+   rtx op0, op1, op2;
+   const struct cpu_cost_table *extra_cost
+-    = aarch64_tune_params->insn_extra_cost;
++    = aarch64_tune_params.insn_extra_cost;
+   machine_mode mode = GET_MODE (x);
+ 
+   /* By default, assume that everything has equivalent cost to the
+@@ -5530,16 +5918,6 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+      above this default.  */
+   *cost = COSTS_N_INSNS (1);
+ 
+-  /* TODO: The cost infrastructure currently does not handle
+-     vector operations.  Assume that all vector operations
+-     are equally expensive.  */
+-  if (VECTOR_MODE_P (mode))
+-    {
+-      if (speed)
+-	*cost += extra_cost->vect.alu;
+-      return true;
+-    }
+-
+   switch (code)
+     {
+     case SET:
+@@ -5554,7 +5932,9 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ 	  if (speed)
+ 	    {
+ 	      rtx address = XEXP (op0, 0);
+-	      if (GET_MODE_CLASS (mode) == MODE_INT)
++	      if (VECTOR_MODE_P (mode))
++		*cost += extra_cost->ldst.storev;
++	      else if (GET_MODE_CLASS (mode) == MODE_INT)
+ 		*cost += extra_cost->ldst.store;
+ 	      else if (mode == SFmode)
+ 		*cost += extra_cost->ldst.storef;
+@@ -5575,15 +5955,22 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ 
+ 	  /* Fall through.  */
+ 	case REG:
++	  /* The cost is one per vector-register copied.  */
++	  if (VECTOR_MODE_P (GET_MODE (op0)) && REG_P (op1))
++	    {
++	      int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
++			      / GET_MODE_SIZE (V4SImode);
++	      *cost = COSTS_N_INSNS (n_minus_1 + 1);
++	    }
+ 	  /* const0_rtx is in general free, but we will use an
+ 	     instruction to set a register to 0.  */
+-          if (REG_P (op1) || op1 == const0_rtx)
+-            {
+-              /* The cost is 1 per register copied.  */
+-              int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
++	  else if (REG_P (op1) || op1 == const0_rtx)
++	    {
++	      /* The cost is 1 per register copied.  */
++	      int n_minus_1 = (GET_MODE_SIZE (GET_MODE (op0)) - 1)
+ 			      / UNITS_PER_WORD;
+-              *cost = COSTS_N_INSNS (n_minus_1 + 1);
+-            }
++	      *cost = COSTS_N_INSNS (n_minus_1 + 1);
++	    }
+           else
+ 	    /* Cost is just the cost of the RHS of the set.  */
+ 	    *cost += rtx_cost (op1, SET, 1, speed);
+@@ -5681,7 +6068,9 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ 	     approximation for the additional cost of the addressing
+ 	     mode.  */
+ 	  rtx address = XEXP (x, 0);
+-	  if (GET_MODE_CLASS (mode) == MODE_INT)
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->ldst.loadv;
++	  else if (GET_MODE_CLASS (mode) == MODE_INT)
+ 	    *cost += extra_cost->ldst.load;
+ 	  else if (mode == SFmode)
+ 	    *cost += extra_cost->ldst.loadf;
+@@ -5698,6 +6087,16 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+     case NEG:
+       op0 = XEXP (x, 0);
+ 
++      if (VECTOR_MODE_P (mode))
++	{
++	  if (speed)
++	    {
++	      /* FNEG.  */
++	      *cost += extra_cost->vect.alu;
++	    }
++	  return false;
++	}
++
+       if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
+        {
+           if (GET_RTX_CLASS (GET_CODE (op0)) == RTX_COMPARE
+@@ -5742,7 +6141,12 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+     case CLRSB:
+     case CLZ:
+       if (speed)
+-        *cost += extra_cost->alu.clz;
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->alu.clz;
++	}
+ 
+       return false;
+ 
+@@ -5787,6 +6191,22 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+               goto cost_minus;
+             }
+ 
++	  if (GET_CODE (op0) == ZERO_EXTRACT && op1 == const0_rtx
++	      && GET_MODE (x) == CC_NZmode && CONST_INT_P (XEXP (op0, 1))
++	      && CONST_INT_P (XEXP (op0, 2)))
++	    {
++	      /* COMPARE of ZERO_EXTRACT form of TST-immediate.
++		 Handle it here directly rather than going to cost_logic
++		 since we know the immediate generated for the TST is valid
++		 so we can avoid creating an intermediate rtx for it only
++		 for costing purposes.  */
++	      if (speed)
++		*cost += extra_cost->alu.logical;
++
++	      *cost += rtx_cost (XEXP (op0, 0), ZERO_EXTRACT, 0, speed);
++	      return true;
++	    }
++
+           if (GET_CODE (op1) == NEG)
+             {
+ 	      /* CMN.  */
+@@ -5821,12 +6241,27 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ 
+           if (CONST_DOUBLE_P (op1) && aarch64_float_const_zero_rtx_p (op1))
+             {
++              *cost += rtx_cost (op0, COMPARE, 0, speed);
+               /* FCMP supports constant 0.0 for no extra cost. */
+               return true;
+             }
+           return false;
+         }
+ 
++      if (VECTOR_MODE_P (mode))
++	{
++	  /* Vector compare.  */
++	  if (speed)
++	    *cost += extra_cost->vect.alu;
++
++	  if (aarch64_float_const_zero_rtx_p (op1))
++	    {
++	      /* Vector cm (eq|ge|gt|lt|le) supports constant 0.0 for no extra
++		 cost.  */
++	      return true;
++	    }
++	  return false;
++	}
+       return false;
+ 
+     case MINUS:
+@@ -5835,6 +6270,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ 	op1 = XEXP (x, 1);
+ 
+ cost_minus:
++	*cost += rtx_cost (op0, MINUS, 0, speed);
++
+ 	/* Detect valid immediates.  */
+ 	if ((GET_MODE_CLASS (mode) == MODE_INT
+ 	     || (GET_MODE_CLASS (mode) == MODE_CC
+@@ -5842,24 +6279,20 @@ cost_minus:
+ 	    && CONST_INT_P (op1)
+ 	    && aarch64_uimm12_shift (INTVAL (op1)))
+ 	  {
+-	    *cost += rtx_cost (op0, MINUS, 0, speed);
+-
+ 	    if (speed)
+ 	      /* SUB(S) (immediate).  */
+ 	      *cost += extra_cost->alu.arith;
+ 	    return true;
+-
+ 	  }
+ 
+ 	/* Look for SUB (extended register).  */
+         if (aarch64_rtx_arith_op_extract_p (op1, mode))
+ 	  {
+ 	    if (speed)
+-	      *cost += extra_cost->alu.arith_shift;
++	      *cost += extra_cost->alu.extend_arith;
+ 
+-	    *cost += rtx_cost (XEXP (XEXP (op1, 0), 0),
+-			       (enum rtx_code) GET_CODE (op1),
+-			       0, speed);
++	    op1 = aarch64_strip_extend (op1);
++	    *cost += rtx_cost (op1, (enum rtx_code) GET_CODE (op1), 0, speed);
+ 	    return true;
+ 	  }
+ 
+@@ -5867,13 +6300,12 @@ cost_minus:
+ 
+ 	/* Cost this as an FMA-alike operation.  */
+ 	if ((GET_CODE (new_op1) == MULT
+-	     || GET_CODE (new_op1) == ASHIFT)
++	     || aarch64_shift_p (GET_CODE (new_op1)))
+ 	    && code != COMPARE)
+ 	  {
+ 	    *cost += aarch64_rtx_mult_cost (new_op1, MULT,
+ 					    (enum rtx_code) code,
+ 					    speed);
+-	    *cost += rtx_cost (op0, MINUS, 0, speed);
+ 	    return true;
+ 	  }
+ 
+@@ -5881,12 +6313,21 @@ cost_minus:
+ 
+ 	if (speed)
+ 	  {
+-	    if (GET_MODE_CLASS (mode) == MODE_INT)
+-	      /* SUB(S).  */
+-	      *cost += extra_cost->alu.arith;
++	    if (VECTOR_MODE_P (mode))
++	      {
++		/* Vector SUB.  */
++		*cost += extra_cost->vect.alu;
++	      }
++	    else if (GET_MODE_CLASS (mode) == MODE_INT)
++	      {
++		/* SUB(S).  */
++		*cost += extra_cost->alu.arith;
++	      }
+ 	    else if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+-	      /* FSUB.  */
+-	      *cost += extra_cost->fp[mode == DFmode].addsub;
++	      {
++		/* FSUB.  */
++		*cost += extra_cost->fp[mode == DFmode].addsub;
++	      }
+ 	  }
+ 	return true;
+       }
+@@ -5920,15 +6361,16 @@ cost_plus:
+ 	    return true;
+ 	  }
+ 
++	*cost += rtx_cost (op1, PLUS, 1, speed);
++
+ 	/* Look for ADD (extended register).  */
+         if (aarch64_rtx_arith_op_extract_p (op0, mode))
+ 	  {
+ 	    if (speed)
+-	      *cost += extra_cost->alu.arith_shift;
++	      *cost += extra_cost->alu.extend_arith;
+ 
+-	    *cost += rtx_cost (XEXP (XEXP (op0, 0), 0),
+-			       (enum rtx_code) GET_CODE (op0),
+-			       0, speed);
++	    op0 = aarch64_strip_extend (op0);
++	    *cost += rtx_cost (op0, (enum rtx_code) GET_CODE (op0), 0, speed);
+ 	    return true;
+ 	  }
+ 
+@@ -5937,25 +6379,32 @@ cost_plus:
+ 	new_op0 = aarch64_strip_extend (op0);
+ 
+ 	if (GET_CODE (new_op0) == MULT
+-	    || GET_CODE (new_op0) == ASHIFT)
++	    || aarch64_shift_p (GET_CODE (new_op0)))
+ 	  {
+ 	    *cost += aarch64_rtx_mult_cost (new_op0, MULT, PLUS,
+ 					    speed);
+-	    *cost += rtx_cost (op1, PLUS, 1, speed);
+ 	    return true;
+ 	  }
+ 
+-	*cost += (rtx_cost (new_op0, PLUS, 0, speed)
+-		  + rtx_cost (op1, PLUS, 1, speed));
++	*cost += rtx_cost (new_op0, PLUS, 0, speed);
+ 
+ 	if (speed)
+ 	  {
+-	    if (GET_MODE_CLASS (mode) == MODE_INT)
+-	      /* ADD.  */
+-	      *cost += extra_cost->alu.arith;
++	    if (VECTOR_MODE_P (mode))
++	      {
++		/* Vector ADD.  */
++		*cost += extra_cost->vect.alu;
++	      }
++	    else if (GET_MODE_CLASS (mode) == MODE_INT)
++	      {
++		/* ADD.  */
++		*cost += extra_cost->alu.arith;
++	      }
+ 	    else if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+-	      /* FADD.  */
+-	      *cost += extra_cost->fp[mode == DFmode].addsub;
++	      {
++		/* FADD.  */
++		*cost += extra_cost->fp[mode == DFmode].addsub;
++	      }
+ 	  }
+ 	return true;
+       }
+@@ -5964,8 +6413,12 @@ cost_plus:
+       *cost = COSTS_N_INSNS (1);
+ 
+       if (speed)
+-        *cost += extra_cost->alu.rev;
+-
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->alu.rev;
++	}
+       return false;
+ 
+     case IOR:
+@@ -5973,8 +6426,22 @@ cost_plus:
+         {
+           *cost = COSTS_N_INSNS (1);
+ 
++	  if (speed)
++	    {
++	      if (VECTOR_MODE_P (mode))
++		*cost += extra_cost->vect.alu;
++	      else
++		*cost += extra_cost->alu.rev;
++	    }
++	  return true;
++        }
++
++      if (aarch64_extr_rtx_p (x, &op0, &op1))
++        {
++          *cost += rtx_cost (op0, IOR, 0, speed)
++                   + rtx_cost (op1, IOR, 1, speed);
+           if (speed)
+-            *cost += extra_cost->alu.rev;
++            *cost += extra_cost->alu.shift;
+ 
+           return true;
+         }
+@@ -5985,6 +6452,13 @@ cost_plus:
+       op0 = XEXP (x, 0);
+       op1 = XEXP (x, 1);
+ 
++      if (VECTOR_MODE_P (mode))
++	{
++	  if (speed)
++	    *cost += extra_cost->vect.alu;
++	  return true;
++	}
++
+       if (code == AND
+           && GET_CODE (op0) == MULT
+           && CONST_INT_P (XEXP (op0, 1))
+@@ -6050,13 +6524,52 @@ cost_plus:
+       return false;
+ 
+     case NOT:
++      x = XEXP (x, 0);
++      op0 = aarch64_strip_shift (x);
++
++      if (VECTOR_MODE_P (mode))
++	{
++	  /* Vector NOT.  */
++	  *cost += extra_cost->vect.alu;
++	  return false;
++	}
++
++      /* MVN-shifted-reg.  */
++      if (op0 != x)
++        {
++          *cost += rtx_cost (op0, (enum rtx_code) code, 0, speed);
++
++          if (speed)
++            *cost += extra_cost->alu.log_shift;
++
++          return true;
++        }
++      /* EON can have two forms: (xor (not a) b) but also (not (xor a b)).
++         Handle the second form here taking care that 'a' in the above can
++         be a shift.  */
++      else if (GET_CODE (op0) == XOR)
++        {
++          rtx newop0 = XEXP (op0, 0);
++          rtx newop1 = XEXP (op0, 1);
++          rtx op0_stripped = aarch64_strip_shift (newop0);
++
++          *cost += rtx_cost (newop1, (enum rtx_code) code, 1, speed)
++                   + rtx_cost (op0_stripped, XOR, 0, speed);
++
++          if (speed)
++            {
++              if (op0_stripped != newop0)
++                *cost += extra_cost->alu.log_shift;
++              else
++                *cost += extra_cost->alu.logical;
++            }
++
++          return true;
++        }
+       /* MVN.  */
+       if (speed)
+ 	*cost += extra_cost->alu.logical;
+ 
+-      /* The logical instruction could have the shifted register form,
+-         but the cost is the same if the shift is processed as a separate
+-         instruction, so we don't bother with it here.  */
+       return false;
+ 
+     case ZERO_EXTEND:
+@@ -6092,10 +6605,19 @@ cost_plus:
+ 	  return true;
+ 	}
+ 
+-      /* UXTB/UXTH.  */
+       if (speed)
+-	*cost += extra_cost->alu.extend;
+-
++	{
++	  if (VECTOR_MODE_P (mode))
++	    {
++	      /* UMOV.  */
++	      *cost += extra_cost->vect.alu;
++	    }
++	  else
++	    {
++	      /* UXTB/UXTH.  */
++	      *cost += extra_cost->alu.extend;
++	    }
++	}
+       return false;
+ 
+     case SIGN_EXTEND:
+@@ -6115,19 +6637,34 @@ cost_plus:
+ 	}
+ 
+       if (speed)
+-	*cost += extra_cost->alu.extend;
+-      return false;
+-
+-    case ASHIFT:
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->alu.extend;
++	}
++      return false;
++
++    case ASHIFT:
+       op0 = XEXP (x, 0);
+       op1 = XEXP (x, 1);
+ 
+       if (CONST_INT_P (op1))
+         {
+-	  /* LSL (immediate), UBMF, UBFIZ and friends.  These are all
+-	     aliases.  */
+ 	  if (speed)
+-	    *cost += extra_cost->alu.shift;
++	    {
++	      if (VECTOR_MODE_P (mode))
++		{
++		  /* Vector shift (immediate).  */
++		  *cost += extra_cost->vect.alu;
++		}
++	      else
++		{
++		  /* LSL (immediate), UBMF, UBFIZ and friends.  These are all
++		     aliases.  */
++		  *cost += extra_cost->alu.shift;
++		}
++	    }
+ 
+           /* We can incorporate zero/sign extend for free.  */
+           if (GET_CODE (op0) == ZERO_EXTEND
+@@ -6139,10 +6676,19 @@ cost_plus:
+         }
+       else
+         {
+-	  /* LSLV.  */
+ 	  if (speed)
+-	    *cost += extra_cost->alu.shift_reg;
+-
++	    {
++	      if (VECTOR_MODE_P (mode))
++		{
++		  /* Vector shift (register).  */
++		  *cost += extra_cost->vect.alu;
++		}
++	      else
++		{
++		  /* LSLV.  */
++		  *cost += extra_cost->alu.shift_reg;
++		}
++	    }
+ 	  return false;  /* All arguments need to be in registers.  */
+         }
+ 
+@@ -6157,7 +6703,12 @@ cost_plus:
+ 	{
+ 	  /* ASR (immediate) and friends.  */
+ 	  if (speed)
+-	    *cost += extra_cost->alu.shift;
++	    {
++	      if (VECTOR_MODE_P (mode))
++		*cost += extra_cost->vect.alu;
++	      else
++		*cost += extra_cost->alu.shift;
++	    }
+ 
+ 	  *cost += rtx_cost (op0, (enum rtx_code) code, 0, speed);
+ 	  return true;
+@@ -6167,14 +6718,19 @@ cost_plus:
+ 
+ 	  /* ASR (register) and friends.  */
+ 	  if (speed)
+-	    *cost += extra_cost->alu.shift_reg;
+-
++	    {
++	      if (VECTOR_MODE_P (mode))
++		*cost += extra_cost->vect.alu;
++	      else
++		*cost += extra_cost->alu.shift_reg;
++	    }
+ 	  return false;  /* All arguments need to be in registers.  */
+ 	}
+ 
+     case SYMBOL_REF:
+ 
+-      if (aarch64_cmodel == AARCH64_CMODEL_LARGE)
++      if (aarch64_cmodel == AARCH64_CMODEL_LARGE
++	  || aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC)
+ 	{
+ 	  /* LDR.  */
+ 	  if (speed)
+@@ -6216,7 +6772,12 @@ cost_plus:
+     case SIGN_EXTRACT:
+       /* UBFX/SBFX.  */
+       if (speed)
+-	*cost += extra_cost->alu.bfx;
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->alu.bfx;
++	}
+ 
+       /* We can trust that the immediates used will be correct (there
+ 	 are no by-register forms), so we need only cost op0.  */
+@@ -6230,10 +6791,31 @@ cost_plus:
+       return true;
+ 
+     case MOD:
++    /* We can expand signed mod by power of 2 using a NEGS, two parallel
++       ANDs and a CSNEG.  Assume here that CSNEG is the same as the cost of
++       an unconditional negate.  This case should only ever be reached through
++       the set_smod_pow2_cheap check in expmed.c.  */
++      if (CONST_INT_P (XEXP (x, 1))
++	  && exact_log2 (INTVAL (XEXP (x, 1))) > 0
++	  && (mode == SImode || mode == DImode))
++	{
++	  /* We expand to 4 instructions.  Reset the baseline.  */
++	  *cost = COSTS_N_INSNS (4);
++
++	  if (speed)
++	    *cost += 2 * extra_cost->alu.logical
++		     + 2 * extra_cost->alu.arith;
++
++	  return true;
++	}
++
++    /* Fall-through.  */
+     case UMOD:
+       if (speed)
+ 	{
+-	  if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
+ 	    *cost += (extra_cost->mult[GET_MODE (x) == DImode].add
+ 		      + extra_cost->mult[GET_MODE (x) == DImode].idiv);
+ 	  else if (GET_MODE (x) == DFmode)
+@@ -6250,7 +6832,9 @@ cost_plus:
+     case SQRT:
+       if (speed)
+ 	{
+-	  if (GET_MODE_CLASS (mode) == MODE_INT)
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else if (GET_MODE_CLASS (mode) == MODE_INT)
+ 	    /* There is no integer SQRT, so only DIV and UDIV can get
+ 	       here.  */
+ 	    *cost += extra_cost->mult[mode == DImode].idiv;
+@@ -6282,7 +6866,12 @@ cost_plus:
+       op2 = XEXP (x, 2);
+ 
+       if (speed)
+-	*cost += extra_cost->fp[mode == DFmode].fma;
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->fp[mode == DFmode].fma;
++	}
+ 
+       /* FMSUB, FNMADD, and FNMSUB are free.  */
+       if (GET_CODE (op0) == NEG)
+@@ -6320,14 +6909,36 @@ cost_plus:
+       *cost += rtx_cost (op2, FMA, 2, speed);
+       return true;
+ 
++    case FLOAT:
++    case UNSIGNED_FLOAT:
++      if (speed)
++	*cost += extra_cost->fp[mode == DFmode].fromint;
++      return false;
++
+     case FLOAT_EXTEND:
+       if (speed)
+-	*cost += extra_cost->fp[mode == DFmode].widen;
++	{
++	  if (VECTOR_MODE_P (mode))
++	    {
++	      /*Vector truncate.  */
++	      *cost += extra_cost->vect.alu;
++	    }
++	  else
++	    *cost += extra_cost->fp[mode == DFmode].widen;
++	}
+       return false;
+ 
+     case FLOAT_TRUNCATE:
+       if (speed)
+-	*cost += extra_cost->fp[mode == DFmode].narrow;
++	{
++	  if (VECTOR_MODE_P (mode))
++	    {
++	      /*Vector conversion.  */
++	      *cost += extra_cost->vect.alu;
++	    }
++	  else
++	    *cost += extra_cost->fp[mode == DFmode].narrow;
++	}
+       return false;
+ 
+     case FIX:
+@@ -6348,15 +6959,37 @@ cost_plus:
+         }
+ 
+       if (speed)
+-        *cost += extra_cost->fp[GET_MODE (x) == DFmode].toint;
+-
++	{
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    *cost += extra_cost->fp[GET_MODE (x) == DFmode].toint;
++	}
+       *cost += rtx_cost (x, (enum rtx_code) code, 0, speed);
+       return true;
+ 
+     case ABS:
+-      if (GET_MODE_CLASS (mode) == MODE_FLOAT)
++      if (VECTOR_MODE_P (mode))
++	{
++	  /* ABS (vector).  */
++	  if (speed)
++	    *cost += extra_cost->vect.alu;
++	}
++      else if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+ 	{
+-	  /* FABS and FNEG are analogous.  */
++	  op0 = XEXP (x, 0);
++
++	  /* FABD, which is analogous to FADD.  */
++	  if (GET_CODE (op0) == MINUS)
++	    {
++	      *cost += rtx_cost (XEXP (op0, 0), MINUS, 0, speed);
++			+ rtx_cost (XEXP (op0, 1), MINUS, 1, speed);
++	      if (speed)
++		*cost += extra_cost->fp[mode == DFmode].addsub;
++
++	      return true;
++	    }
++	  /* Simple FABS is analogous to FNEG.  */
+ 	  if (speed)
+ 	    *cost += extra_cost->fp[mode == DFmode].neg;
+ 	}
+@@ -6375,10 +7008,15 @@ cost_plus:
+     case SMIN:
+       if (speed)
+ 	{
+-	  /* FMAXNM/FMINNM/FMAX/FMIN.
+-	     TODO: This may not be accurate for all implementations, but
+-	     we do not model this in the cost tables.  */
+-	  *cost += extra_cost->fp[mode == DFmode].addsub;
++	  if (VECTOR_MODE_P (mode))
++	    *cost += extra_cost->vect.alu;
++	  else
++	    {
++	      /* FMAXNM/FMINNM/FMAX/FMIN.
++	         TODO: This may not be accurate for all implementations, but
++	         we do not model this in the cost tables.  */
++	      *cost += extra_cost->fp[mode == DFmode].addsub;
++	    }
+ 	}
+       return false;
+ 
+@@ -6472,7 +7110,7 @@ aarch64_register_move_cost (machine_mode mode,
+   enum reg_class from = (enum reg_class) from_i;
+   enum reg_class to = (enum reg_class) to_i;
+   const struct cpu_regmove_cost *regmove_cost
+-    = aarch64_tune_params->regmove_cost;
++    = aarch64_tune_params.regmove_cost;
+ 
+   /* Caller save and pointer regs are equivalent to GENERAL_REGS.  */
+   if (to == CALLER_SAVE_REGS || to == POINTER_REGS)
+@@ -6527,14 +7165,14 @@ aarch64_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED,
+ 			  reg_class_t rclass ATTRIBUTE_UNUSED,
+ 			  bool in ATTRIBUTE_UNUSED)
+ {
+-  return aarch64_tune_params->memmov_cost;
++  return aarch64_tune_params.memmov_cost;
+ }
+ 
+ /* Return the number of instructions that can be issued per cycle.  */
+ static int
+ aarch64_sched_issue_rate (void)
+ {
+-  return aarch64_tune_params->issue_rate;
++  return aarch64_tune_params.issue_rate;
+ }
+ 
+ static int
+@@ -6545,6 +7183,19 @@ aarch64_sched_first_cycle_multipass_dfa_lookahead (void)
+   return issue_rate > 1 && !sched_fusion ? issue_rate : 0;
+ }
+ 
++
++/* Implement TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD as
++   autopref_multipass_dfa_lookahead_guard from haifa-sched.c.  It only
++   has an effect if PARAM_SCHED_AUTOPREF_QUEUE_DEPTH > 0.  */
++
++static int
++aarch64_first_cycle_multipass_dfa_lookahead_guard (rtx_insn *insn,
++						    int ready_index)
++{
++  return autopref_multipass_dfa_lookahead_guard (insn, ready_index);
++}
++
++
+ /* Vectorizer cost model target hooks.  */
+ 
+ /* Implement targetm.vectorize.builtin_vectorization_cost.  */
+@@ -6558,44 +7209,44 @@ aarch64_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
+   switch (type_of_cost)
+     {
+       case scalar_stmt:
+-	return aarch64_tune_params->vec_costs->scalar_stmt_cost;
++	return aarch64_tune_params.vec_costs->scalar_stmt_cost;
+ 
+       case scalar_load:
+-	return aarch64_tune_params->vec_costs->scalar_load_cost;
++	return aarch64_tune_params.vec_costs->scalar_load_cost;
+ 
+       case scalar_store:
+-	return aarch64_tune_params->vec_costs->scalar_store_cost;
++	return aarch64_tune_params.vec_costs->scalar_store_cost;
+ 
+       case vector_stmt:
+-	return aarch64_tune_params->vec_costs->vec_stmt_cost;
++	return aarch64_tune_params.vec_costs->vec_stmt_cost;
+ 
+       case vector_load:
+-	return aarch64_tune_params->vec_costs->vec_align_load_cost;
++	return aarch64_tune_params.vec_costs->vec_align_load_cost;
+ 
+       case vector_store:
+-	return aarch64_tune_params->vec_costs->vec_store_cost;
++	return aarch64_tune_params.vec_costs->vec_store_cost;
+ 
+       case vec_to_scalar:
+-	return aarch64_tune_params->vec_costs->vec_to_scalar_cost;
++	return aarch64_tune_params.vec_costs->vec_to_scalar_cost;
+ 
+       case scalar_to_vec:
+-	return aarch64_tune_params->vec_costs->scalar_to_vec_cost;
++	return aarch64_tune_params.vec_costs->scalar_to_vec_cost;
+ 
+       case unaligned_load:
+-	return aarch64_tune_params->vec_costs->vec_unalign_load_cost;
++	return aarch64_tune_params.vec_costs->vec_unalign_load_cost;
+ 
+       case unaligned_store:
+-	return aarch64_tune_params->vec_costs->vec_unalign_store_cost;
++	return aarch64_tune_params.vec_costs->vec_unalign_store_cost;
+ 
+       case cond_branch_taken:
+-	return aarch64_tune_params->vec_costs->cond_taken_branch_cost;
++	return aarch64_tune_params.vec_costs->cond_taken_branch_cost;
+ 
+       case cond_branch_not_taken:
+-	return aarch64_tune_params->vec_costs->cond_not_taken_branch_cost;
++	return aarch64_tune_params.vec_costs->cond_not_taken_branch_cost;
+ 
+       case vec_perm:
+       case vec_promote_demote:
+-	return aarch64_tune_params->vec_costs->vec_stmt_cost;
++	return aarch64_tune_params.vec_costs->vec_stmt_cost;
+ 
+       case vec_construct:
+         elements = TYPE_VECTOR_SUBPARTS (vectype);
+@@ -6640,86 +7291,78 @@ aarch64_add_stmt_cost (void *data, int count, enum vect_cost_for_stmt kind,
+   return retval;
+ }
+ 
+-static void initialize_aarch64_code_model (void);
++static void initialize_aarch64_code_model (struct gcc_options *);
+ 
+-/* Parse the architecture extension string.  */
++/* Parse the TO_PARSE string and put the architecture struct that it
++   selects into RES and the architectural features into ISA_FLAGS.
++   Return an aarch64_parse_opt_result describing the parse result.
++   If there is an error parsing, RES and ISA_FLAGS are left unchanged.  */
+ 
+-static void
+-aarch64_parse_extension (char *str)
++static enum aarch64_parse_opt_result
++aarch64_parse_arch (const char *to_parse, const struct processor **res,
++		    unsigned long *isa_flags)
+ {
+-  /* The extension string is parsed left to right.  */
+-  const struct aarch64_option_extension *opt = NULL;
++  char *ext;
++  const struct processor *arch;
++  char *str = (char *) alloca (strlen (to_parse) + 1);
++  size_t len;
+ 
+-  /* Flag to say whether we are adding or removing an extension.  */
+-  int adding_ext = -1;
++  strcpy (str, to_parse);
+ 
+-  while (str != NULL && *str != 0)
+-    {
+-      char *ext;
+-      size_t len;
++  ext = strchr (str, '+');
+ 
+-      str++;
+-      ext = strchr (str, '+');
++  if (ext != NULL)
++    len = ext - str;
++  else
++    len = strlen (str);
+ 
+-      if (ext != NULL)
+-	len = ext - str;
+-      else
+-	len = strlen (str);
++  if (len == 0)
++    return AARCH64_PARSE_MISSING_ARG;
+ 
+-      if (len >= 2 && strncmp (str, "no", 2) == 0)
+-	{
+-	  adding_ext = 0;
+-	  len -= 2;
+-	  str += 2;
+-	}
+-      else if (len > 0)
+-	adding_ext = 1;
+ 
+-      if (len == 0)
++  /* Loop through the list of supported ARCHes to find a match.  */
++  for (arch = all_architectures; arch->name != NULL; arch++)
++    {
++      if (strlen (arch->name) == len && strncmp (arch->name, str, len) == 0)
+ 	{
+-	  error ("missing feature modifier after %qs", adding_ext ? "+"
+-	                                                          : "+no");
+-	  return;
+-	}
++	  unsigned long isa_temp = arch->flags;
+ 
+-      /* Scan over the extensions table trying to find an exact match.  */
+-      for (opt = all_extensions; opt->name != NULL; opt++)
+-	{
+-	  if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0)
++	  if (ext != NULL)
+ 	    {
+-	      /* Add or remove the extension.  */
+-	      if (adding_ext)
+-		aarch64_isa_flags |= opt->flags_on;
+-	      else
+-		aarch64_isa_flags &= ~(opt->flags_off);
+-	      break;
+-	    }
+-	}
++	      /* TO_PARSE string contains at least one extension.  */
++	      enum aarch64_parse_opt_result ext_res
++		= aarch64_parse_extension (ext, &isa_temp);
+ 
+-      if (opt->name == NULL)
+-	{
+-	  /* Extension not found in list.  */
+-	  error ("unknown feature modifier %qs", str);
+-	  return;
++	      if (ext_res != AARCH64_PARSE_OK)
++		return ext_res;
++	    }
++	  /* Extension parsing was successful.  Confirm the result
++	     arch and ISA flags.  */
++	  *res = arch;
++	  *isa_flags = isa_temp;
++	  return AARCH64_PARSE_OK;
+ 	}
++    }
+ 
+-      str = ext;
+-    };
+-
+-  return;
++  /* ARCH name not found in list.  */
++  return AARCH64_PARSE_INVALID_ARG;
+ }
+ 
+-/* Parse the ARCH string.  */
++/* Parse the TO_PARSE string and put the result tuning in RES and the
++   architecture flags in ISA_FLAGS.  Return an aarch64_parse_opt_result
++   describing the parse result.  If there is an error parsing, RES and
++   ISA_FLAGS are left unchanged.  */
+ 
+-static void
+-aarch64_parse_arch (void)
++static enum aarch64_parse_opt_result
++aarch64_parse_cpu (const char *to_parse, const struct processor **res,
++		   unsigned long *isa_flags)
+ {
+   char *ext;
+-  const struct processor *arch;
+-  char *str = (char *) alloca (strlen (aarch64_arch_string) + 1);
++  const struct processor *cpu;
++  char *str = (char *) alloca (strlen (to_parse) + 1);
+   size_t len;
+ 
+-  strcpy (str, aarch64_arch_string);
++  strcpy (str, to_parse);
+ 
+   ext = strchr (str, '+');
+ 
+@@ -6729,265 +7372,1450 @@ aarch64_parse_arch (void)
+     len = strlen (str);
+ 
+   if (len == 0)
+-    {
+-      error ("missing arch name in -march=%qs", str);
+-      return;
+-    }
++    return AARCH64_PARSE_MISSING_ARG;
+ 
+-  /* Loop through the list of supported ARCHs to find a match.  */
+-  for (arch = all_architectures; arch->name != NULL; arch++)
++
++  /* Loop through the list of supported CPUs to find a match.  */
++  for (cpu = all_cores; cpu->name != NULL; cpu++)
+     {
+-      if (strlen (arch->name) == len && strncmp (arch->name, str, len) == 0)
++      if (strlen (cpu->name) == len && strncmp (cpu->name, str, len) == 0)
+ 	{
+-	  selected_arch = arch;
+-	  aarch64_isa_flags = selected_arch->flags;
++	  unsigned long isa_temp = cpu->flags;
+ 
+-	  if (!selected_cpu)
+-	    selected_cpu = &all_cores[selected_arch->core];
+ 
+ 	  if (ext != NULL)
+ 	    {
+-	      /* ARCH string contains at least one extension.  */
+-	      aarch64_parse_extension (ext);
+-	    }
++	      /* TO_PARSE string contains at least one extension.  */
++	      enum aarch64_parse_opt_result ext_res
++		= aarch64_parse_extension (ext, &isa_temp);
+ 
+-	  if (strcmp (selected_arch->arch, selected_cpu->arch))
+-	    {
+-	      warning (0, "switch -mcpu=%s conflicts with -march=%s switch",
+-		       selected_cpu->name, selected_arch->name);
++	      if (ext_res != AARCH64_PARSE_OK)
++		return ext_res;
+ 	    }
++	  /* Extension parsing was successfull.  Confirm the result
++	     cpu and ISA flags.  */
++	  *res = cpu;
++	  *isa_flags = isa_temp;
++	  return AARCH64_PARSE_OK;
++	}
++    }
+ 
+-	  return;
++  /* CPU name not found in list.  */
++  return AARCH64_PARSE_INVALID_ARG;
++}
++
++/* Parse the TO_PARSE string and put the cpu it selects into RES.
++   Return an aarch64_parse_opt_result describing the parse result.
++   If the parsing fails the RES does not change.  */
++
++static enum aarch64_parse_opt_result
++aarch64_parse_tune (const char *to_parse, const struct processor **res)
++{
++  const struct processor *cpu;
++  char *str = (char *) alloca (strlen (to_parse) + 1);
++
++  strcpy (str, to_parse);
++
++  /* Loop through the list of supported CPUs to find a match.  */
++  for (cpu = all_cores; cpu->name != NULL; cpu++)
++    {
++      if (strcmp (cpu->name, str) == 0)
++	{
++	  *res = cpu;
++	  return AARCH64_PARSE_OK;
+ 	}
+     }
+ 
+-  /* ARCH name not found in list.  */
+-  error ("unknown value %qs for -march", str);
+-  return;
++  /* CPU name not found in list.  */
++  return AARCH64_PARSE_INVALID_ARG;
++}
++
++/* Parse TOKEN, which has length LENGTH to see if it is an option
++   described in FLAG.  If it is, return the index bit for that fusion type.
++   If not, error (printing OPTION_NAME) and return zero.  */
++
++static unsigned int
++aarch64_parse_one_option_token (const char *token,
++				size_t length,
++				const struct aarch64_flag_desc *flag,
++				const char *option_name)
++{
++  for (; flag->name != NULL; flag++)
++    {
++      if (length == strlen (flag->name)
++	  && !strncmp (flag->name, token, length))
++	return flag->flag;
++    }
++
++  error ("unknown flag passed in -moverride=%s (%s)", option_name, token);
++  return 0;
++}
++
++/* Parse OPTION which is a comma-separated list of flags to enable.
++   FLAGS gives the list of flags we understand, INITIAL_STATE gives any
++   default state we inherit from the CPU tuning structures.  OPTION_NAME
++   gives the top-level option we are parsing in the -moverride string,
++   for use in error messages.  */
++
++static unsigned int
++aarch64_parse_boolean_options (const char *option,
++			       const struct aarch64_flag_desc *flags,
++			       unsigned int initial_state,
++			       const char *option_name)
++{
++  const char separator = '.';
++  const char* specs = option;
++  const char* ntoken = option;
++  unsigned int found_flags = initial_state;
++
++  while ((ntoken = strchr (specs, separator)))
++    {
++      size_t token_length = ntoken - specs;
++      unsigned token_ops = aarch64_parse_one_option_token (specs,
++							   token_length,
++							   flags,
++							   option_name);
++      /* If we find "none" (or, for simplicity's sake, an error) anywhere
++	 in the token stream, reset the supported operations.  So:
++
++	   adrp+add.cmp+branch.none.adrp+add
++
++	   would have the result of turning on only adrp+add fusion.  */
++      if (!token_ops)
++	found_flags = 0;
++
++      found_flags |= token_ops;
++      specs = ++ntoken;
++    }
++
++  /* We ended with a comma, print something.  */
++  if (!(*specs))
++    {
++      error ("%s string ill-formed\n", option_name);
++      return 0;
++    }
++
++  /* We still have one more token to parse.  */
++  size_t token_length = strlen (specs);
++  unsigned token_ops = aarch64_parse_one_option_token (specs,
++						       token_length,
++						       flags,
++						       option_name);
++   if (!token_ops)
++     found_flags = 0;
++
++  found_flags |= token_ops;
++  return found_flags;
+ }
+ 
+-/* Parse the CPU string.  */
++/* Support for overriding instruction fusion.  */
+ 
+ static void
+-aarch64_parse_cpu (void)
++aarch64_parse_fuse_string (const char *fuse_string,
++			    struct tune_params *tune)
+ {
+-  char *ext;
+-  const struct processor *cpu;
+-  char *str = (char *) alloca (strlen (aarch64_cpu_string) + 1);
+-  size_t len;
++  tune->fusible_ops = aarch64_parse_boolean_options (fuse_string,
++						     aarch64_fusible_pairs,
++						     tune->fusible_ops,
++						     "fuse=");
++}
+ 
+-  strcpy (str, aarch64_cpu_string);
++/* Support for overriding other tuning flags.  */
+ 
+-  ext = strchr (str, '+');
++static void
++aarch64_parse_tune_string (const char *tune_string,
++			    struct tune_params *tune)
++{
++  tune->extra_tuning_flags
++    = aarch64_parse_boolean_options (tune_string,
++				     aarch64_tuning_flags,
++				     tune->extra_tuning_flags,
++				     "tune=");
++}
+ 
+-  if (ext != NULL)
+-    len = ext - str;
+-  else
+-    len = strlen (str);
++/* Parse TOKEN, which has length LENGTH to see if it is a tuning option
++   we understand.  If it is, extract the option string and handoff to
++   the appropriate function.  */
+ 
+-  if (len == 0)
++void
++aarch64_parse_one_override_token (const char* token,
++				  size_t length,
++				  struct tune_params *tune)
++{
++  const struct aarch64_tuning_override_function *fn
++    = aarch64_tuning_override_functions;
++
++  const char *option_part = strchr (token, '=');
++  if (!option_part)
+     {
+-      error ("missing cpu name in -mcpu=%qs", str);
++      error ("tuning string missing in option (%s)", token);
+       return;
+     }
+ 
+-  /* Loop through the list of supported CPUs to find a match.  */
+-  for (cpu = all_cores; cpu->name != NULL; cpu++)
++  /* Get the length of the option name.  */
++  length = option_part - token;
++  /* Skip the '=' to get to the option string.  */
++  option_part++;
++
++  for (; fn->name != NULL; fn++)
+     {
+-      if (strlen (cpu->name) == len && strncmp (cpu->name, str, len) == 0)
++      if (!strncmp (fn->name, token, length))
+ 	{
+-	  selected_cpu = cpu;
+-	  aarch64_isa_flags = selected_cpu->flags;
+-
+-	  if (ext != NULL)
+-	    {
+-	      /* CPU string contains at least one extension.  */
+-	      aarch64_parse_extension (ext);
+-	    }
+-
++	  fn->parse_override (option_part, tune);
+ 	  return;
+ 	}
+     }
+ 
+-  /* CPU name not found in list.  */
+-  error ("unknown value %qs for -mcpu", str);
+-  return;
+-}
+-
+-/* Parse the TUNE string.  */
++  error ("unknown tuning option (%s)",token);
++  return;
++}
++
++/* A checking mechanism for the implementation of the tls size.  */
++
++static void
++initialize_aarch64_tls_size (struct gcc_options *opts)
++{
++  if (aarch64_tls_size == 0)
++    aarch64_tls_size = 24;
++
++  switch (opts->x_aarch64_cmodel_var)
++    {
++    case AARCH64_CMODEL_TINY:
++      /* Both the default and maximum TLS size allowed under tiny is 1M which
++	 needs two instructions to address, so we clamp the size to 24.  */
++      if (aarch64_tls_size > 24)
++	aarch64_tls_size = 24;
++      break;
++    case AARCH64_CMODEL_SMALL:
++      /* The maximum TLS size allowed under small is 4G.  */
++      if (aarch64_tls_size > 32)
++	aarch64_tls_size = 32;
++      break;
++    case AARCH64_CMODEL_LARGE:
++      /* The maximum TLS size allowed under large is 16E.
++	 FIXME: 16E should be 64bit, we only support 48bit offset now.  */
++      if (aarch64_tls_size > 48)
++	aarch64_tls_size = 48;
++      break;
++    default:
++      gcc_unreachable ();
++    }
++
++  return;
++}
++
++/* Parse STRING looking for options in the format:
++     string	:: option:string
++     option	:: name=substring
++     name	:: {a-z}
++     substring	:: defined by option.  */
++
++static void
++aarch64_parse_override_string (const char* input_string,
++			       struct tune_params* tune)
++{
++  const char separator = ':';
++  size_t string_length = strlen (input_string) + 1;
++  char *string_root = (char *) xmalloc (sizeof (*string_root) * string_length);
++  char *string = string_root;
++  strncpy (string, input_string, string_length);
++  string[string_length - 1] = '\0';
++
++  char* ntoken = string;
++
++  while ((ntoken = strchr (string, separator)))
++    {
++      size_t token_length = ntoken - string;
++      /* Make this substring look like a string.  */
++      *ntoken = '\0';
++      aarch64_parse_one_override_token (string, token_length, tune);
++      string = ++ntoken;
++    }
++
++  /* One last option to parse.  */
++  aarch64_parse_one_override_token (string, strlen (string), tune);
++  free (string_root);
++}
++
++
++static void
++aarch64_override_options_after_change_1 (struct gcc_options *opts)
++{
++  /* The logic here is that if we are disabling all frame pointer generation
++     then we do not need to disable leaf frame pointer generation as a
++     separate operation.  But if we are *only* disabling leaf frame pointer
++     generation then we set flag_omit_frame_pointer to true, but in
++     aarch64_frame_pointer_required we return false only for leaf functions.
++
++     PR 70044: We have to be careful about being called multiple times for the
++     same function.  Once we have decided to set flag_omit_frame_pointer just
++     so that we can omit leaf frame pointers, we must then not interpret a
++     second call as meaning that all frame pointer generation should be
++     omitted.  We do this by setting flag_omit_frame_pointer to a special,
++     non-zero value.  */
++  if (opts->x_flag_omit_frame_pointer == 2)
++    opts->x_flag_omit_frame_pointer = 0;
++
++  if (opts->x_flag_omit_frame_pointer)
++    opts->x_flag_omit_leaf_frame_pointer = false;
++  else if (opts->x_flag_omit_leaf_frame_pointer)
++    opts->x_flag_omit_frame_pointer = 2;
++
++  /* If not optimizing for size, set the default
++     alignment to what the target wants.  */
++  if (!opts->x_optimize_size)
++    {
++      if (opts->x_align_loops <= 0)
++	opts->x_align_loops = aarch64_tune_params.loop_align;
++      if (opts->x_align_jumps <= 0)
++	opts->x_align_jumps = aarch64_tune_params.jump_align;
++      if (opts->x_align_functions <= 0)
++	opts->x_align_functions = aarch64_tune_params.function_align;
++    }
++
++  /* If nopcrelative_literal_loads is set on the command line, this
++     implies that the user asked for PC relative literal loads.  */
++  if (opts->x_nopcrelative_literal_loads == 1)
++    aarch64_nopcrelative_literal_loads = false;
++
++  /* If it is not set on the command line, we default to no pc
++     relative literal loads, unless the workaround for Cortex-A53
++     erratum 843419 is in effect.  */
++  /* This is PR70113. When building the Linux kernel with
++     CONFIG_ARM64_ERRATUM_843419, support for relocations
++     R_AARCH64_ADR_PREL_PG_HI21 and R_AARCH64_ADR_PREL_PG_HI21_NC is
++     removed from the kernel to avoid loading objects with possibly
++     offending sequences. With nopcrelative_literal_loads, we would
++     generate such relocations, preventing the kernel build from
++     succeeding.  */
++  if (opts->x_nopcrelative_literal_loads == 2
++      && !TARGET_FIX_ERR_A53_843419)
++    aarch64_nopcrelative_literal_loads = true;
++
++  /* In the tiny memory model it makes no sense
++     to disallow non PC relative literal pool loads
++     as many other things will break anyway.  */
++  if (opts->x_nopcrelative_literal_loads
++      && (aarch64_cmodel == AARCH64_CMODEL_TINY
++	  || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC))
++    aarch64_nopcrelative_literal_loads = false;
++}
++
++/* 'Unpack' up the internal tuning structs and update the options
++    in OPTS.  The caller must have set up selected_tune and selected_arch
++    as all the other target-specific codegen decisions are
++    derived from them.  */
++
++void
++aarch64_override_options_internal (struct gcc_options *opts)
++{
++  aarch64_tune_flags = selected_tune->flags;
++  aarch64_tune = selected_tune->sched_core;
++  /* Make a copy of the tuning parameters attached to the core, which
++     we may later overwrite.  */
++  aarch64_tune_params = *(selected_tune->tune);
++  aarch64_architecture_version = selected_arch->architecture_version;
++
++  if (opts->x_aarch64_override_tune_string)
++    aarch64_parse_override_string (opts->x_aarch64_override_tune_string,
++				  &aarch64_tune_params);
++
++  /* This target defaults to strict volatile bitfields.  */
++  if (opts->x_flag_strict_volatile_bitfields < 0 && abi_version_at_least (2))
++    opts->x_flag_strict_volatile_bitfields = 1;
++
++  initialize_aarch64_code_model (opts);
++  initialize_aarch64_tls_size (opts);
++
++  int queue_depth = 0;
++  switch (aarch64_tune_params.autoprefetcher_model)
++    {
++      case tune_params::AUTOPREFETCHER_OFF:
++	queue_depth = -1;
++	break;
++      case tune_params::AUTOPREFETCHER_WEAK:
++	queue_depth = 0;
++	break;
++      case tune_params::AUTOPREFETCHER_STRONG:
++	queue_depth = max_insn_queue_index + 1;
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  /* We don't mind passing in global_options_set here as we don't use
++     the *options_set structs anyway.  */
++  maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
++			 queue_depth,
++			 opts->x_param_values,
++			 global_options_set.x_param_values);
++
++  /* Set the L1 cache line size.  */
++  if (selected_cpu->tune->cache_line_size != 0)
++    maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
++			   selected_cpu->tune->cache_line_size,
++			   opts->x_param_values,
++			   global_options_set.x_param_values);
++
++  aarch64_override_options_after_change_1 (opts);
++}
++
++/* Validate a command-line -mcpu option.  Parse the cpu and extensions (if any)
++   specified in STR and throw errors if appropriate.  Put the results if
++   they are valid in RES and ISA_FLAGS.  Return whether the option is
++   valid.  */
++
++static bool
++aarch64_validate_mcpu (const char *str, const struct processor **res,
++		       unsigned long *isa_flags)
++{
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_cpu (str, res, isa_flags);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    return true;
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing cpu name in -mcpu=%qs", str);
++	break;
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for -mcpu", str);
++	break;
++      case AARCH64_PARSE_INVALID_FEATURE:
++	error ("invalid feature modifier in -mcpu=%qs", str);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  return false;
++}
++
++/* Validate a command-line -march option.  Parse the arch and extensions
++   (if any) specified in STR and throw errors if appropriate.  Put the
++   results, if they are valid, in RES and ISA_FLAGS.  Return whether the
++   option is valid.  */
++
++static bool
++aarch64_validate_march (const char *str, const struct processor **res,
++		       unsigned long *isa_flags)
++{
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_arch (str, res, isa_flags);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    return true;
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing arch name in -march=%qs", str);
++	break;
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for -march", str);
++	break;
++      case AARCH64_PARSE_INVALID_FEATURE:
++	error ("invalid feature modifier in -march=%qs", str);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  return false;
++}
++
++/* Validate a command-line -mtune option.  Parse the cpu
++   specified in STR and throw errors if appropriate.  Put the
++   result, if it is valid, in RES.  Return whether the option is
++   valid.  */
++
++static bool
++aarch64_validate_mtune (const char *str, const struct processor **res)
++{
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_tune (str, res);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    return true;
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing cpu name in -mtune=%qs", str);
++	break;
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for -mtune", str);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++  return false;
++}
++
++/* Return the CPU corresponding to the enum CPU.
++   If it doesn't specify a cpu, return the default.  */
++
++static const struct processor *
++aarch64_get_tune_cpu (enum aarch64_processor cpu)
++{
++  if (cpu != aarch64_none)
++    return &all_cores[cpu];
++
++  /* The & 0x3f is to extract the bottom 6 bits that encode the
++     default cpu as selected by the --with-cpu GCC configure option
++     in config.gcc.
++     ???: The whole TARGET_CPU_DEFAULT and AARCH64_CPU_DEFAULT_FLAGS
++     flags mechanism should be reworked to make it more sane.  */
++  return &all_cores[TARGET_CPU_DEFAULT & 0x3f];
++}
++
++/* Return the architecture corresponding to the enum ARCH.
++   If it doesn't specify a valid architecture, return the default.  */
++
++static const struct processor *
++aarch64_get_arch (enum aarch64_arch arch)
++{
++  if (arch != aarch64_no_arch)
++    return &all_architectures[arch];
++
++  const struct processor *cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f];
++
++  return &all_architectures[cpu->arch];
++}
++
++/* Implement TARGET_OPTION_OVERRIDE.  This is called once in the beginning
++   and is used to parse the -m{cpu,tune,arch} strings and setup the initial
++   tuning structs.  In particular it must set selected_tune and
++   aarch64_isa_flags that define the available ISA features and tuning
++   decisions.  It must also set selected_arch as this will be used to
++   output the .arch asm tags for each function.  */
++
++static void
++aarch64_override_options (void)
++{
++  unsigned long cpu_isa = 0;
++  unsigned long arch_isa = 0;
++  aarch64_isa_flags = 0;
++
++  bool valid_cpu = true;
++  bool valid_tune = true;
++  bool valid_arch = true;
++
++  selected_cpu = NULL;
++  selected_arch = NULL;
++  selected_tune = NULL;
++
++  /* -mcpu=CPU is shorthand for -march=ARCH_FOR_CPU, -mtune=CPU.
++     If either of -march or -mtune is given, they override their
++     respective component of -mcpu.  */
++  if (aarch64_cpu_string)
++    valid_cpu = aarch64_validate_mcpu (aarch64_cpu_string, &selected_cpu,
++					&cpu_isa);
++
++  if (aarch64_arch_string)
++    valid_arch = aarch64_validate_march (aarch64_arch_string, &selected_arch,
++					  &arch_isa);
++
++  if (aarch64_tune_string)
++    valid_tune = aarch64_validate_mtune (aarch64_tune_string, &selected_tune);
++
++  /* If the user did not specify a processor, choose the default
++     one for them.  This will be the CPU set during configuration using
++     --with-cpu, otherwise it is "generic".  */
++  if (!selected_cpu)
++    {
++      if (selected_arch)
++	{
++	  selected_cpu = &all_cores[selected_arch->ident];
++	  aarch64_isa_flags = arch_isa;
++	  explicit_arch = selected_arch->arch;
++	}
++      else
++	{
++	  /* Get default configure-time CPU.  */
++	  selected_cpu = aarch64_get_tune_cpu (aarch64_none);
++	  aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6;
++	}
++
++      if (selected_tune)
++	explicit_tune_core = selected_tune->ident;
++    }
++  /* If both -mcpu and -march are specified check that they are architecturally
++     compatible, warn if they're not and prefer the -march ISA flags.  */
++  else if (selected_arch)
++    {
++      if (selected_arch->arch != selected_cpu->arch)
++	{
++	  warning (0, "switch -mcpu=%s conflicts with -march=%s switch",
++		       all_architectures[selected_cpu->arch].name,
++		       selected_arch->name);
++	}
++      aarch64_isa_flags = arch_isa;
++      explicit_arch = selected_arch->arch;
++      explicit_tune_core = selected_tune ? selected_tune->ident
++					  : selected_cpu->ident;
++    }
++  else
++    {
++      /* -mcpu but no -march.  */
++      aarch64_isa_flags = cpu_isa;
++      explicit_tune_core = selected_tune ? selected_tune->ident
++					  : selected_cpu->ident;
++      gcc_assert (selected_cpu);
++      selected_arch = &all_architectures[selected_cpu->arch];
++      explicit_arch = selected_arch->arch;
++    }
++
++  /* Set the arch as well as we will need it when outputing
++     the .arch directive in assembly.  */
++  if (!selected_arch)
++    {
++      gcc_assert (selected_cpu);
++      selected_arch = &all_architectures[selected_cpu->arch];
++    }
++
++  if (!selected_tune)
++    selected_tune = selected_cpu;
++
++#ifndef HAVE_AS_MABI_OPTION
++  /* The compiler may have been configured with 2.23.* binutils, which does
++     not have support for ILP32.  */
++  if (TARGET_ILP32)
++    error ("Assembler does not support -mabi=ilp32");
++#endif
++
++  /* Make sure we properly set up the explicit options.  */
++  if ((aarch64_cpu_string && valid_cpu)
++       || (aarch64_tune_string && valid_tune))
++    gcc_assert (explicit_tune_core != aarch64_none);
++
++  if ((aarch64_cpu_string && valid_cpu)
++       || (aarch64_arch_string && valid_arch))
++    gcc_assert (explicit_arch != aarch64_no_arch);
++
++  aarch64_override_options_internal (&global_options);
++
++  /* Save these options as the default ones in case we push and pop them later
++     while processing functions with potential target attributes.  */
++  target_option_default_node = target_option_current_node
++      = build_target_option_node (&global_options);
++
++  aarch64_register_fma_steering ();
++
++}
++
++/* Implement targetm.override_options_after_change.  */
++
++static void
++aarch64_override_options_after_change (void)
++{
++  aarch64_override_options_after_change_1 (&global_options);
++}
++
++static struct machine_function *
++aarch64_init_machine_status (void)
++{
++  struct machine_function *machine;
++  machine = ggc_cleared_alloc<machine_function> ();
++  return machine;
++}
++
++void
++aarch64_init_expanders (void)
++{
++  init_machine_status = aarch64_init_machine_status;
++}
++
++/* A checking mechanism for the implementation of the various code models.  */
++static void
++initialize_aarch64_code_model (struct gcc_options *opts)
++{
++   if (opts->x_flag_pic)
++     {
++       switch (opts->x_aarch64_cmodel_var)
++	 {
++	 case AARCH64_CMODEL_TINY:
++	   aarch64_cmodel = AARCH64_CMODEL_TINY_PIC;
++	   break;
++	 case AARCH64_CMODEL_SMALL:
++#ifdef HAVE_AS_SMALL_PIC_RELOCS
++	   aarch64_cmodel = (flag_pic == 2
++			     ? AARCH64_CMODEL_SMALL_PIC
++			     : AARCH64_CMODEL_SMALL_SPIC);
++#else
++	   aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC;
++#endif
++	   break;
++	 case AARCH64_CMODEL_LARGE:
++	   sorry ("code model %qs with -f%s", "large",
++		  opts->x_flag_pic > 1 ? "PIC" : "pic");
++	   break;
++	 default:
++	   gcc_unreachable ();
++	 }
++     }
++   else
++     aarch64_cmodel = opts->x_aarch64_cmodel_var;
++}
++
++/* Implement TARGET_OPTION_SAVE.  */
++
++static void
++aarch64_option_save (struct cl_target_option *ptr, struct gcc_options *opts)
++{
++  ptr->x_aarch64_override_tune_string = opts->x_aarch64_override_tune_string;
++}
++
++/* Implements TARGET_OPTION_RESTORE.  Restore the backend codegen decisions
++   using the information saved in PTR.  */
++
++static void
++aarch64_option_restore (struct gcc_options *opts, struct cl_target_option *ptr)
++{
++  opts->x_explicit_tune_core = ptr->x_explicit_tune_core;
++  selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
++  opts->x_explicit_arch = ptr->x_explicit_arch;
++  selected_arch = aarch64_get_arch (ptr->x_explicit_arch);
++  opts->x_aarch64_override_tune_string = ptr->x_aarch64_override_tune_string;
++
++  aarch64_override_options_internal (opts);
++}
++
++/* Implement TARGET_OPTION_PRINT.  */
++
++static void
++aarch64_option_print (FILE *file, int indent, struct cl_target_option *ptr)
++{
++  const struct processor *cpu
++    = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
++  unsigned long isa_flags = ptr->x_aarch64_isa_flags;
++  const struct processor *arch = aarch64_get_arch (ptr->x_explicit_arch);
++  std::string extension
++    = aarch64_get_extension_string_for_isa_flags (isa_flags, arch->flags);
++
++  fprintf (file, "%*sselected tune = %s\n", indent, "", cpu->name);
++  fprintf (file, "%*sselected arch = %s%s\n", indent, "",
++	   arch->name, extension.c_str ());
++}
++
++static GTY(()) tree aarch64_previous_fndecl;
++
++void
++aarch64_reset_previous_fndecl (void)
++{
++  aarch64_previous_fndecl = NULL;
++}
++
++/* Restore or save the TREE_TARGET_GLOBALS from or to NEW_TREE.
++   Used by aarch64_set_current_function and aarch64_pragma_target_parse to
++   make sure optab availability predicates are recomputed when necessary.  */
++
++void
++aarch64_save_restore_target_globals (tree new_tree)
++{
++  if (TREE_TARGET_GLOBALS (new_tree))
++    restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
++  else if (new_tree == target_option_default_node)
++    restore_target_globals (&default_target_globals);
++  else
++    TREE_TARGET_GLOBALS (new_tree) = save_target_globals_default_opts ();
++}
++
++/* Implement TARGET_SET_CURRENT_FUNCTION.  Unpack the codegen decisions
++   like tuning and ISA features from the DECL_FUNCTION_SPECIFIC_TARGET
++   of the function, if such exists.  This function may be called multiple
++   times on a single function so use aarch64_previous_fndecl to avoid
++   setting up identical state.  */
++
++static void
++aarch64_set_current_function (tree fndecl)
++{
++  if (!fndecl || fndecl == aarch64_previous_fndecl)
++    return;
++
++  tree old_tree = (aarch64_previous_fndecl
++		   ? DECL_FUNCTION_SPECIFIC_TARGET (aarch64_previous_fndecl)
++		   : NULL_TREE);
++
++  tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
++
++  /* If current function has no attributes but the previous one did,
++     use the default node.  */
++  if (!new_tree && old_tree)
++    new_tree = target_option_default_node;
++
++  /* If nothing to do, return.  #pragma GCC reset or #pragma GCC pop to
++     the default have been handled by aarch64_save_restore_target_globals from
++     aarch64_pragma_target_parse.  */
++  if (old_tree == new_tree)
++    return;
++
++  aarch64_previous_fndecl = fndecl;
++
++  /* First set the target options.  */
++  cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));
++
++  /* If we turned on SIMD make sure that any vector parameters are re-laid out
++     so that they use proper vector modes.  */
++  if (TARGET_SIMD)
++    {
++      tree parms = DECL_ARGUMENTS (fndecl);
++      for (; parms && parms != void_list_node; parms = TREE_CHAIN (parms))
++	{
++	  if (TREE_CODE (parms) == PARM_DECL
++	      && VECTOR_TYPE_P (TREE_TYPE (parms))
++	      && DECL_MODE (parms) != TYPE_MODE (TREE_TYPE (parms)))
++	    relayout_decl (parms);
++	}
++    }
++  aarch64_save_restore_target_globals (new_tree);
++}
++
++/* Enum describing the various ways we can handle attributes.
++   In many cases we can reuse the generic option handling machinery.  */
++
++enum aarch64_attr_opt_type
++{
++  aarch64_attr_mask,	/* Attribute should set a bit in target_flags.  */
++  aarch64_attr_bool,	/* Attribute sets or unsets a boolean variable.  */
++  aarch64_attr_enum,	/* Attribute sets an enum variable.  */
++  aarch64_attr_custom	/* Attribute requires a custom handling function.  */
++};
++
++/* All the information needed to handle a target attribute.
++   NAME is the name of the attribute.
++   ATTR_TYPE specifies the type of behaviour of the attribute as described
++   in the definition of enum aarch64_attr_opt_type.
++   ALLOW_NEG is true if the attribute supports a "no-" form.
++   HANDLER is the function that takes the attribute string and whether
++   it is a pragma or attribute and handles the option.  It is needed only
++   when the ATTR_TYPE is aarch64_attr_custom.
++   OPT_NUM is the enum specifying the option that the attribute modifies.
++   This is needed for attributes that mirror the behaviour of a command-line
++   option, that is it has ATTR_TYPE aarch64_attr_mask, aarch64_attr_bool or
++   aarch64_attr_enum.  */
++
++struct aarch64_attribute_info
++{
++  const char *name;
++  enum aarch64_attr_opt_type attr_type;
++  bool allow_neg;
++  bool (*handler) (const char *, const char *);
++  enum opt_code opt_num;
++};
++
++/* Handle the ARCH_STR argument to the arch= target attribute.
++   PRAGMA_OR_ATTR is used in potential error messages.  */
++
++static bool
++aarch64_handle_attr_arch (const char *str, const char *pragma_or_attr)
++{
++  const struct processor *tmp_arch = NULL;
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_arch (str, &tmp_arch, &aarch64_isa_flags);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    {
++      gcc_assert (tmp_arch);
++      selected_arch = tmp_arch;
++      explicit_arch = selected_arch->arch;
++      return true;
++    }
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing architecture name in 'arch' target %s", pragma_or_attr);
++	break;
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for 'arch' target %s", str, pragma_or_attr);
++	break;
++      case AARCH64_PARSE_INVALID_FEATURE:
++	error ("invalid feature modifier %qs for 'arch' target %s",
++	       str, pragma_or_attr);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  return false;
++}
++
++/* Handle the argument CPU_STR to the cpu= target attribute.
++   PRAGMA_OR_ATTR is used in potential error messages.  */
++
++static bool
++aarch64_handle_attr_cpu (const char *str, const char *pragma_or_attr)
++{
++  const struct processor *tmp_cpu = NULL;
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_cpu (str, &tmp_cpu, &aarch64_isa_flags);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    {
++      gcc_assert (tmp_cpu);
++      selected_tune = tmp_cpu;
++      explicit_tune_core = selected_tune->ident;
++
++      selected_arch = &all_architectures[tmp_cpu->arch];
++      explicit_arch = selected_arch->arch;
++      return true;
++    }
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing cpu name in 'cpu' target %s", pragma_or_attr);
++	break;
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for 'cpu' target %s", str, pragma_or_attr);
++	break;
++      case AARCH64_PARSE_INVALID_FEATURE:
++	error ("invalid feature modifier %qs for 'cpu' target %s",
++	       str, pragma_or_attr);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  return false;
++}
++
++/* Handle the argument STR to the tune= target attribute.
++   PRAGMA_OR_ATTR is used in potential error messages.  */
++
++static bool
++aarch64_handle_attr_tune (const char *str, const char *pragma_or_attr)
++{
++  const struct processor *tmp_tune = NULL;
++  enum aarch64_parse_opt_result parse_res
++    = aarch64_parse_tune (str, &tmp_tune);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    {
++      gcc_assert (tmp_tune);
++      selected_tune = tmp_tune;
++      explicit_tune_core = selected_tune->ident;
++      return true;
++    }
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_INVALID_ARG:
++	error ("unknown value %qs for 'tune' target %s", str, pragma_or_attr);
++	break;
++      default:
++	gcc_unreachable ();
++    }
++
++  return false;
++}
++
++/* Parse an architecture extensions target attribute string specified in STR.
++   For example "+fp+nosimd".  Show any errors if needed.  Return TRUE
++   if successful.  Update aarch64_isa_flags to reflect the ISA features
++   modified.
++   PRAGMA_OR_ATTR is used in potential error messages.  */
++
++static bool
++aarch64_handle_attr_isa_flags (char *str, const char *pragma_or_attr)
++{
++  enum aarch64_parse_opt_result parse_res;
++  unsigned long isa_flags = aarch64_isa_flags;
++
++  /* We allow "+nothing" in the beginning to clear out all architectural
++     features if the user wants to handpick specific features.  */
++  if (strncmp ("+nothing", str, 8) == 0)
++    {
++      isa_flags = 0;
++      str += 8;
++    }
++
++  parse_res = aarch64_parse_extension (str, &isa_flags);
++
++  if (parse_res == AARCH64_PARSE_OK)
++    {
++      aarch64_isa_flags = isa_flags;
++      return true;
++    }
++
++  switch (parse_res)
++    {
++      case AARCH64_PARSE_MISSING_ARG:
++	error ("missing feature modifier in target %s %qs",
++	       pragma_or_attr, str);
++	break;
++
++      case AARCH64_PARSE_INVALID_FEATURE:
++	error ("invalid feature modifier in target %s %qs",
++	       pragma_or_attr, str);
++	break;
++
++      default:
++	gcc_unreachable ();
++    }
++
++ return false;
++}
++
++/* The target attributes that we support.  On top of these we also support just
++   ISA extensions, like  __attribute__ ((target ("+crc"))), but that case is
++   handled explicitly in aarch64_process_one_target_attr.  */
++
++static const struct aarch64_attribute_info aarch64_attributes[] =
++{
++  { "general-regs-only", aarch64_attr_mask, false, NULL,
++     OPT_mgeneral_regs_only },
++  { "fix-cortex-a53-835769", aarch64_attr_bool, true, NULL,
++     OPT_mfix_cortex_a53_835769 },
++  { "fix-cortex-a53-843419", aarch64_attr_bool, true, NULL,
++     OPT_mfix_cortex_a53_843419 },
++  { "cmodel", aarch64_attr_enum, false, NULL, OPT_mcmodel_ },
++  { "strict-align", aarch64_attr_mask, false, NULL, OPT_mstrict_align },
++  { "omit-leaf-frame-pointer", aarch64_attr_bool, true, NULL,
++     OPT_momit_leaf_frame_pointer },
++  { "tls-dialect", aarch64_attr_enum, false, NULL, OPT_mtls_dialect_ },
++  { "arch", aarch64_attr_custom, false, aarch64_handle_attr_arch,
++     OPT_march_ },
++  { "cpu", aarch64_attr_custom, false, aarch64_handle_attr_cpu, OPT_mcpu_ },
++  { "tune", aarch64_attr_custom, false, aarch64_handle_attr_tune,
++     OPT_mtune_ },
++  { NULL, aarch64_attr_custom, false, NULL, OPT____ }
++};
++
++/* Parse ARG_STR which contains the definition of one target attribute.
++   Show appropriate errors if any or return true if the attribute is valid.
++   PRAGMA_OR_ATTR holds the string to use in error messages about whether
++   we're processing a target attribute or pragma.  */
++
++static bool
++aarch64_process_one_target_attr (char *arg_str, const char* pragma_or_attr)
++{
++  bool invert = false;
++
++  size_t len = strlen (arg_str);
++
++  if (len == 0)
++    {
++      error ("malformed target %s", pragma_or_attr);
++      return false;
++    }
++
++  char *str_to_check = (char *) alloca (len + 1);
++  strcpy (str_to_check, arg_str);
++
++  /* Skip leading whitespace.  */
++  while (*str_to_check == ' ' || *str_to_check == '\t')
++    str_to_check++;
++
++  /* We have something like __attribute__ ((target ("+fp+nosimd"))).
++     It is easier to detect and handle it explicitly here rather than going
++     through the machinery for the rest of the target attributes in this
++     function.  */
++  if (*str_to_check == '+')
++    return aarch64_handle_attr_isa_flags (str_to_check, pragma_or_attr);
++
++  if (len > 3 && strncmp (str_to_check, "no-", 3) == 0)
++    {
++      invert = true;
++      str_to_check += 3;
++    }
++  char *arg = strchr (str_to_check, '=');
++
++  /* If we found opt=foo then terminate STR_TO_CHECK at the '='
++     and point ARG to "foo".  */
++  if (arg)
++    {
++      *arg = '\0';
++      arg++;
++    }
++  const struct aarch64_attribute_info *p_attr;
++  bool found = false;
++  for (p_attr = aarch64_attributes; p_attr->name; p_attr++)
++    {
++      /* If the names don't match up, or the user has given an argument
++	 to an attribute that doesn't accept one, or didn't give an argument
++	 to an attribute that expects one, fail to match.  */
++      if (strcmp (str_to_check, p_attr->name) != 0)
++	continue;
++
++      found = true;
++      bool attr_need_arg_p = p_attr->attr_type == aarch64_attr_custom
++			      || p_attr->attr_type == aarch64_attr_enum;
++
++      if (attr_need_arg_p ^ (arg != NULL))
++	{
++	  error ("target %s %qs does not accept an argument",
++		  pragma_or_attr, str_to_check);
++	  return false;
++	}
++
++      /* If the name matches but the attribute does not allow "no-" versions
++	 then we can't match.  */
++      if (invert && !p_attr->allow_neg)
++	{
++	  error ("target %s %qs does not allow a negated form",
++		  pragma_or_attr, str_to_check);
++	  return false;
++	}
++
++      switch (p_attr->attr_type)
++	{
++	/* Has a custom handler registered.
++	   For example, cpu=, arch=, tune=.  */
++	  case aarch64_attr_custom:
++	    gcc_assert (p_attr->handler);
++	    if (!p_attr->handler (arg, pragma_or_attr))
++	      return false;
++	    break;
++
++	  /* Either set or unset a boolean option.  */
++	  case aarch64_attr_bool:
++	    {
++	      struct cl_decoded_option decoded;
++
++	      generate_option (p_attr->opt_num, NULL, !invert,
++			       CL_TARGET, &decoded);
++	      aarch64_handle_option (&global_options, &global_options_set,
++				      &decoded, input_location);
++	      break;
++	    }
++	  /* Set or unset a bit in the target_flags.  aarch64_handle_option
++	     should know what mask to apply given the option number.  */
++	  case aarch64_attr_mask:
++	    {
++	      struct cl_decoded_option decoded;
++	      /* We only need to specify the option number.
++		 aarch64_handle_option will know which mask to apply.  */
++	      decoded.opt_index = p_attr->opt_num;
++	      decoded.value = !invert;
++	      aarch64_handle_option (&global_options, &global_options_set,
++				      &decoded, input_location);
++	      break;
++	    }
++	  /* Use the option setting machinery to set an option to an enum.  */
++	  case aarch64_attr_enum:
++	    {
++	      gcc_assert (arg);
++	      bool valid;
++	      int value;
++	      valid = opt_enum_arg_to_value (p_attr->opt_num, arg,
++					      &value, CL_TARGET);
++	      if (valid)
++		{
++		  set_option (&global_options, NULL, p_attr->opt_num, value,
++			      NULL, DK_UNSPECIFIED, input_location,
++			      global_dc);
++		}
++	      else
++		{
++		  error ("target %s %s=%s is not valid",
++			 pragma_or_attr, str_to_check, arg);
++		}
++	      break;
++	    }
++	  default:
++	    gcc_unreachable ();
++	}
++    }
++
++  /* If we reached here we either have found an attribute and validated
++     it or didn't match any.  If we matched an attribute but its arguments
++     were malformed we will have returned false already.  */
++  return found;
++}
++
++/* Count how many times the character C appears in
++   NULL-terminated string STR.  */
++
++static unsigned int
++num_occurences_in_str (char c, char *str)
++{
++  unsigned int res = 0;
++  while (*str != '\0')
++    {
++      if (*str == c)
++	res++;
++
++      str++;
++    }
++
++  return res;
++}
++
++/* Parse the tree in ARGS that contains the target attribute information
++   and update the global target options space.  PRAGMA_OR_ATTR is a string
++   to be used in error messages, specifying whether this is processing
++   a target attribute or a target pragma.  */
++
++bool
++aarch64_process_target_attr (tree args, const char* pragma_or_attr)
++{
++  if (TREE_CODE (args) == TREE_LIST)
++    {
++      do
++	{
++	  tree head = TREE_VALUE (args);
++	  if (head)
++	    {
++	      if (!aarch64_process_target_attr (head, pragma_or_attr))
++		return false;
++	    }
++	  args = TREE_CHAIN (args);
++	} while (args);
++
++      return true;
++    }
++  /* We expect to find a string to parse.  */
++  gcc_assert (TREE_CODE (args) == STRING_CST);
++
++  size_t len = strlen (TREE_STRING_POINTER (args));
++  char *str_to_check = (char *) alloca (len + 1);
++  strcpy (str_to_check, TREE_STRING_POINTER (args));
++
++  if (len == 0)
++    {
++      error ("malformed target %s value", pragma_or_attr);
++      return false;
++    }
++
++  /* Used to catch empty spaces between commas i.e.
++     attribute ((target ("attr1,,attr2"))).  */
++  unsigned int num_commas = num_occurences_in_str (',', str_to_check);
+ 
+-static void
+-aarch64_parse_tune (void)
+-{
+-  const struct processor *cpu;
+-  char *str = (char *) alloca (strlen (aarch64_tune_string) + 1);
+-  strcpy (str, aarch64_tune_string);
++  /* Handle multiple target attributes separated by ','.  */
++  char *token = strtok (str_to_check, ",");
+ 
+-  /* Loop through the list of supported CPUs to find a match.  */
+-  for (cpu = all_cores; cpu->name != NULL; cpu++)
++  unsigned int num_attrs = 0;
++  while (token)
+     {
+-      if (strcmp (cpu->name, str) == 0)
++      num_attrs++;
++      if (!aarch64_process_one_target_attr (token, pragma_or_attr))
+ 	{
+-	  selected_tune = cpu;
+-	  return;
++	  error ("target %s %qs is invalid", pragma_or_attr, token);
++	  return false;
+ 	}
++
++      token = strtok (NULL, ",");
+     }
+ 
+-  /* CPU name not found in list.  */
+-  error ("unknown value %qs for -mtune", str);
+-  return;
+-}
++  if (num_attrs != num_commas + 1)
++    {
++      error ("malformed target %s list %qs",
++	      pragma_or_attr, TREE_STRING_POINTER (args));
++      return false;
++    }
+ 
++  return true;
++}
+ 
+-/* Implement TARGET_OPTION_OVERRIDE.  */
++/* Implement TARGET_OPTION_VALID_ATTRIBUTE_P.  This is used to
++   process attribute ((target ("..."))).  */
+ 
+-static void
+-aarch64_override_options (void)
++static bool
++aarch64_option_valid_attribute_p (tree fndecl, tree, tree args, int)
+ {
+-  /* -mcpu=CPU is shorthand for -march=ARCH_FOR_CPU, -mtune=CPU.
+-     If either of -march or -mtune is given, they override their
+-     respective component of -mcpu.
+-
+-     So, first parse AARCH64_CPU_STRING, then the others, be careful
+-     with -march as, if -mcpu is not present on the command line, march
+-     must set a sensible default CPU.  */
+-  if (aarch64_cpu_string)
+-    {
+-      aarch64_parse_cpu ();
++  struct cl_target_option cur_target;
++  bool ret;
++  tree old_optimize;
++  tree new_target, new_optimize;
++  tree existing_target = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
++
++  /* If what we're processing is the current pragma string then the
++     target option node is already stored in target_option_current_node
++     by aarch64_pragma_target_parse in aarch64-c.c.  Use that to avoid
++     having to re-parse the string.  This is especially useful to keep
++     arm_neon.h compile times down since that header contains a lot
++     of intrinsics enclosed in pragmas.  */
++  if (!existing_target && args == current_target_pragma)
++    {
++      DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = target_option_current_node;
++      return true;
+     }
++  tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
+ 
+-  if (aarch64_arch_string)
+-    {
+-      aarch64_parse_arch ();
+-    }
++  old_optimize = build_optimization_node (&global_options);
++  func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
+ 
+-  if (aarch64_tune_string)
++  /* If the function changed the optimization levels as well as setting
++     target options, start with the optimizations specified.  */
++  if (func_optimize && func_optimize != old_optimize)
++    cl_optimization_restore (&global_options,
++			     TREE_OPTIMIZATION (func_optimize));
++
++  /* Save the current target options to restore at the end.  */
++  cl_target_option_save (&cur_target, &global_options);
++
++  /* If fndecl already has some target attributes applied to it, unpack
++     them so that we add this attribute on top of them, rather than
++     overwriting them.  */
++  if (existing_target)
+     {
+-      aarch64_parse_tune ();
++      struct cl_target_option *existing_options
++	= TREE_TARGET_OPTION (existing_target);
++
++      if (existing_options)
++	cl_target_option_restore (&global_options, existing_options);
+     }
++  else
++    cl_target_option_restore (&global_options,
++			TREE_TARGET_OPTION (target_option_current_node));
+ 
+-#ifndef HAVE_AS_MABI_OPTION
+-  /* The compiler may have been configured with 2.23.* binutils, which does
+-     not have support for ILP32.  */
+-  if (TARGET_ILP32)
+-    error ("Assembler does not support -mabi=ilp32");
+-#endif
+ 
+-  initialize_aarch64_code_model ();
++  ret = aarch64_process_target_attr (args, "attribute");
+ 
+-  aarch64_build_bitmask_table ();
++  /* Set up any additional state.  */
++  if (ret)
++    {
++      aarch64_override_options_internal (&global_options);
++      /* Initialize SIMD builtins if we haven't already.
++	 Set current_target_pragma to NULL for the duration so that
++	 the builtin initialization code doesn't try to tag the functions
++	 being built with the attributes specified by any current pragma, thus
++	 going into an infinite recursion.  */
++      if (TARGET_SIMD)
++	{
++	  tree saved_current_target_pragma = current_target_pragma;
++	  current_target_pragma = NULL;
++	  aarch64_init_simd_builtins ();
++	  current_target_pragma = saved_current_target_pragma;
++	}
++      new_target = build_target_option_node (&global_options);
++    }
++  else
++    new_target = NULL;
+ 
+-  /* This target defaults to strict volatile bitfields.  */
+-  if (flag_strict_volatile_bitfields < 0 && abi_version_at_least (2))
+-    flag_strict_volatile_bitfields = 1;
++  new_optimize = build_optimization_node (&global_options);
+ 
+-  /* If the user did not specify a processor, choose the default
+-     one for them.  This will be the CPU set during configuration using
+-     --with-cpu, otherwise it is "generic".  */
+-  if (!selected_cpu)
++  if (fndecl && ret)
+     {
+-      selected_cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f];
+-      aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6;
++      DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = new_target;
++
++      if (old_optimize != new_optimize)
++	DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
+     }
+ 
+-  gcc_assert (selected_cpu);
++  cl_target_option_restore (&global_options, &cur_target);
+ 
+-  if (!selected_tune)
+-    selected_tune = selected_cpu;
++  if (old_optimize != new_optimize)
++    cl_optimization_restore (&global_options,
++			     TREE_OPTIMIZATION (old_optimize));
++  return ret;
++}
+ 
+-  aarch64_tune_flags = selected_tune->flags;
+-  aarch64_tune = selected_tune->core;
+-  aarch64_tune_params = selected_tune->tune;
+-  aarch64_architecture_version = selected_cpu->architecture_version;
++/* Helper for aarch64_can_inline_p.  In the case where CALLER and CALLEE are
++   tri-bool options (yes, no, don't care) and the default value is
++   DEF, determine whether to reject inlining.  */
+ 
+-  if (aarch64_fix_a53_err835769 == 2)
+-    {
+-#ifdef TARGET_FIX_ERR_A53_835769_DEFAULT
+-      aarch64_fix_a53_err835769 = 1;
+-#else
+-      aarch64_fix_a53_err835769 = 0;
+-#endif
+-    }
++static bool
++aarch64_tribools_ok_for_inlining_p (int caller, int callee,
++				     int dont_care, int def)
++{
++  /* If the callee doesn't care, always allow inlining.  */
++  if (callee == dont_care)
++    return true;
+ 
+-  aarch64_override_options_after_change ();
++  /* If the caller doesn't care, always allow inlining.  */
++  if (caller == dont_care)
++    return true;
++
++  /* Otherwise, allow inlining if either the callee and caller values
++     agree, or if the callee is using the default value.  */
++  return (callee == caller || callee == def);
+ }
+ 
+-/* Implement targetm.override_options_after_change.  */
++/* Implement TARGET_CAN_INLINE_P.  Decide whether it is valid
++   to inline CALLEE into CALLER based on target-specific info.
++   Make sure that the caller and callee have compatible architectural
++   features.  Then go through the other possible target attributes
++   and see if they can block inlining.  Try not to reject always_inline
++   callees unless they are incompatible architecturally.  */
+ 
+-static void
+-aarch64_override_options_after_change (void)
++static bool
++aarch64_can_inline_p (tree caller, tree callee)
+ {
+-  /* The logic here is that if we are disabling all frame pointer generation
+-     then we do not need to disable leaf frame pointer generation as a
+-     separate operation.  But if we are *only* disabling leaf frame pointer
+-     generation then we set flag_omit_frame_pointer to true, but in
+-     aarch64_frame_pointer_required we return false only for leaf functions.
++  tree caller_tree = DECL_FUNCTION_SPECIFIC_TARGET (caller);
++  tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (callee);
+ 
+-     PR 70044: We have to be careful about being called multiple times for the
+-     same function.  Once we have decided to set flag_omit_frame_pointer just
+-     so that we can omit leaf frame pointers, we must then not interpret a
+-     second call as meaning that all frame pointer generation should be
+-     omitted.  We do this by setting flag_omit_frame_pointer to a special,
+-     non-zero value.  */
++  /* If callee has no option attributes, then it is ok to inline.  */
++  if (!callee_tree)
++    return true;
+ 
+-  if (flag_omit_frame_pointer == 2)
+-    flag_omit_frame_pointer = 0;
++  struct cl_target_option *caller_opts
++	= TREE_TARGET_OPTION (caller_tree ? caller_tree
++					   : target_option_default_node);
+ 
+-  if (flag_omit_frame_pointer)
+-    flag_omit_leaf_frame_pointer = false;
+-  else if (flag_omit_leaf_frame_pointer)
+-    flag_omit_frame_pointer = 2;
++  struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
+ 
+-  /* If not optimizing for size, set the default
+-     alignment to what the target wants */
+-  if (!optimize_size)
+-    {
+-      if (align_loops <= 0)
+-	align_loops = aarch64_tune_params->loop_align;
+-      if (align_jumps <= 0)
+-	align_jumps = aarch64_tune_params->jump_align;
+-      if (align_functions <= 0)
+-	align_functions = aarch64_tune_params->function_align;
+-    }
+-}
+ 
+-static struct machine_function *
+-aarch64_init_machine_status (void)
+-{
+-  struct machine_function *machine;
+-  machine = ggc_cleared_alloc<machine_function> ();
+-  return machine;
+-}
++  /* Callee's ISA flags should be a subset of the caller's.  */
++  if ((caller_opts->x_aarch64_isa_flags & callee_opts->x_aarch64_isa_flags)
++       != callee_opts->x_aarch64_isa_flags)
++    return false;
+ 
+-void
+-aarch64_init_expanders (void)
+-{
+-  init_machine_status = aarch64_init_machine_status;
+-}
++  /* Allow non-strict aligned functions inlining into strict
++     aligned ones.  */
++  if ((TARGET_STRICT_ALIGN_P (caller_opts->x_target_flags)
++       != TARGET_STRICT_ALIGN_P (callee_opts->x_target_flags))
++      && !(!TARGET_STRICT_ALIGN_P (callee_opts->x_target_flags)
++	   && TARGET_STRICT_ALIGN_P (caller_opts->x_target_flags)))
++    return false;
+ 
+-/* A checking mechanism for the implementation of the various code models.  */
+-static void
+-initialize_aarch64_code_model (void)
+-{
+-   if (flag_pic)
+-     {
+-       switch (aarch64_cmodel_var)
+-	 {
+-	 case AARCH64_CMODEL_TINY:
+-	   aarch64_cmodel = AARCH64_CMODEL_TINY_PIC;
+-	   break;
+-	 case AARCH64_CMODEL_SMALL:
+-	   aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC;
+-	   break;
+-	 case AARCH64_CMODEL_LARGE:
+-	   sorry ("code model %qs with -f%s", "large",
+-		  flag_pic > 1 ? "PIC" : "pic");
+-	 default:
+-	   gcc_unreachable ();
+-	 }
+-     }
+-   else
+-     aarch64_cmodel = aarch64_cmodel_var;
++  bool always_inline = lookup_attribute ("always_inline",
++					  DECL_ATTRIBUTES (callee));
++
++  /* If the architectural features match up and the callee is always_inline
++     then the other attributes don't matter.  */
++  if (always_inline)
++    return true;
++
++  if (caller_opts->x_aarch64_cmodel_var
++      != callee_opts->x_aarch64_cmodel_var)
++    return false;
++
++  if (caller_opts->x_aarch64_tls_dialect
++      != callee_opts->x_aarch64_tls_dialect)
++    return false;
++
++  /* Honour explicit requests to workaround errata.  */
++  if (!aarch64_tribools_ok_for_inlining_p (
++	  caller_opts->x_aarch64_fix_a53_err835769,
++	  callee_opts->x_aarch64_fix_a53_err835769,
++	  2, TARGET_FIX_ERR_A53_835769_DEFAULT))
++    return false;
++
++  if (!aarch64_tribools_ok_for_inlining_p (
++	  caller_opts->x_aarch64_fix_a53_err843419,
++	  callee_opts->x_aarch64_fix_a53_err843419,
++	  2, TARGET_FIX_ERR_A53_843419))
++    return false;
++
++  /* If the user explicitly specified -momit-leaf-frame-pointer for the
++     caller and calle and they don't match up, reject inlining.  */
++  if (!aarch64_tribools_ok_for_inlining_p (
++	  caller_opts->x_flag_omit_leaf_frame_pointer,
++	  callee_opts->x_flag_omit_leaf_frame_pointer,
++	  2, 1))
++    return false;
++
++  /* If the callee has specific tuning overrides, respect them.  */
++  if (callee_opts->x_aarch64_override_tune_string != NULL
++      && caller_opts->x_aarch64_override_tune_string == NULL)
++    return false;
++
++  /* If the user specified tuning override strings for the
++     caller and callee and they don't match up, reject inlining.
++     We just do a string compare here, we don't analyze the meaning
++     of the string, as it would be too costly for little gain.  */
++  if (callee_opts->x_aarch64_override_tune_string
++      && caller_opts->x_aarch64_override_tune_string
++      && (strcmp (callee_opts->x_aarch64_override_tune_string,
++		  caller_opts->x_aarch64_override_tune_string) != 0))
++    return false;
++
++  return true;
+ }
+ 
+ /* Return true if SYMBOL_REF X binds locally.  */
+@@ -7026,10 +8854,26 @@ aarch64_classify_tls_symbol (rtx x)
+       return TARGET_TLS_DESC ? SYMBOL_SMALL_TLSDESC : SYMBOL_SMALL_TLSGD;
+ 
+     case TLS_MODEL_INITIAL_EXEC:
+-      return SYMBOL_SMALL_GOTTPREL;
++      switch (aarch64_cmodel)
++	{
++	case AARCH64_CMODEL_TINY:
++	case AARCH64_CMODEL_TINY_PIC:
++	  return SYMBOL_TINY_TLSIE;
++	default:
++	  return SYMBOL_SMALL_TLSIE;
++	}
+ 
+     case TLS_MODEL_LOCAL_EXEC:
+-      return SYMBOL_SMALL_TPREL;
++      if (aarch64_tls_size == 12)
++	return SYMBOL_TLSLE12;
++      else if (aarch64_tls_size == 24)
++	return SYMBOL_TLSLE24;
++      else if (aarch64_tls_size == 32)
++	return SYMBOL_TLSLE32;
++      else if (aarch64_tls_size == 48)
++	return SYMBOL_TLSLE48;
++      else
++	gcc_unreachable ();
+ 
+     case TLS_MODEL_EMULATED:
+     case TLS_MODEL_NONE:
+@@ -7041,11 +8885,10 @@ aarch64_classify_tls_symbol (rtx x)
+ }
+ 
+ /* Return the method that should be used to access SYMBOL_REF or
+-   LABEL_REF X in context CONTEXT.  */
++   LABEL_REF X.  */
+ 
+ enum aarch64_symbol_type
+-aarch64_classify_symbol (rtx x, rtx offset,
+-			 enum aarch64_symbol_context context ATTRIBUTE_UNUSED)
++aarch64_classify_symbol (rtx x, rtx offset)
+ {
+   if (GET_CODE (x) == LABEL_REF)
+     {
+@@ -7058,6 +8901,7 @@ aarch64_classify_symbol (rtx x, rtx offset,
+ 	case AARCH64_CMODEL_TINY:
+ 	  return SYMBOL_TINY_ABSOLUTE;
+ 
++	case AARCH64_CMODEL_SMALL_SPIC:
+ 	case AARCH64_CMODEL_SMALL_PIC:
+ 	case AARCH64_CMODEL_SMALL:
+ 	  return SYMBOL_SMALL_ABSOLUTE;
+@@ -7070,7 +8914,16 @@ aarch64_classify_symbol (rtx x, rtx offset,
+   if (GET_CODE (x) == SYMBOL_REF)
+     {
+       if (aarch64_cmodel == AARCH64_CMODEL_LARGE)
+-	  return SYMBOL_FORCE_TO_MEM;
++	{
++	  /* This is alright even in PIC code as the constant
++	     pool reference is always PC relative and within
++	     the same translation unit.  */
++	  if (nopcrelative_literal_loads
++	      && CONSTANT_POOL_ADDRESS_P (x))
++	    return SYMBOL_SMALL_ABSOLUTE;
++	  else
++	    return SYMBOL_FORCE_TO_MEM;
++	}
+ 
+       if (aarch64_tls_symbol_p (x))
+ 	return aarch64_classify_tls_symbol (x);
+@@ -7105,9 +8958,11 @@ aarch64_classify_symbol (rtx x, rtx offset,
+ 	    return SYMBOL_TINY_GOT;
+ 	  return SYMBOL_TINY_ABSOLUTE;
+ 
++	case AARCH64_CMODEL_SMALL_SPIC:
+ 	case AARCH64_CMODEL_SMALL_PIC:
+ 	  if (!aarch64_symbol_binds_local_p (x))
+-	    return SYMBOL_SMALL_GOT;
++	    return (aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC
++		    ?  SYMBOL_SMALL_GOT_28K : SYMBOL_SMALL_GOT_4G);
+ 	  return SYMBOL_SMALL_ABSOLUTE;
+ 
+ 	default:
+@@ -7145,16 +9000,13 @@ aarch64_valid_floating_const (machine_mode mode, rtx x)
+   if (!CONST_DOUBLE_P (x))
+     return false;
+ 
+-  /* TODO: We could handle moving 0.0 to a TFmode register,
+-     but first we would like to refactor the movtf_aarch64
+-     to be more amicable to split moves properly and
+-     correctly gate on TARGET_SIMD.  For now - reject all
+-     constants which are not to SFmode or DFmode registers.  */
++  if (aarch64_float_const_zero_rtx_p (x))
++    return true;
++
++  /* We only handle moving 0.0 to a TFmode register.  */
+   if (!(mode == SFmode || mode == DFmode))
+     return false;
+ 
+-  if (aarch64_float_const_zero_rtx_p (x))
+-    return true;
+   return aarch64_float_const_representable_p (x);
+ }
+ 
+@@ -7288,9 +9140,7 @@ aarch64_expand_builtin_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
+ 
+   if (!TARGET_FLOAT)
+     {
+-      if (cum->aapcs_nvrn > 0)
+-	sorry ("%qs and floating point or vector arguments",
+-	       "-mgeneral-regs-only");
++      gcc_assert (cum->aapcs_nvrn == 0);
+       vr_save_area_size = 0;
+     }
+ 
+@@ -7397,8 +9247,7 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
+     {
+       /* TYPE passed in fp/simd registers.  */
+       if (!TARGET_FLOAT)
+-	sorry ("%qs and floating point or vector arguments",
+-	       "-mgeneral-regs-only");
++	aarch64_err_no_fpadvsimd (mode, "varargs");
+ 
+       f_top = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop),
+ 		      unshare_expr (valist), f_vrtop, NULL_TREE);
+@@ -7635,9 +9484,7 @@ aarch64_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode,
+ 
+   if (!TARGET_FLOAT)
+     {
+-      if (local_cum.aapcs_nvrn > 0)
+-	sorry ("%qs and floating point or vector arguments",
+-	       "-mgeneral-regs-only");
++      gcc_assert (local_cum.aapcs_nvrn == 0);
+       vr_saved = 0;
+     }
+ 
+@@ -7871,6 +9718,26 @@ aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep)
+   return -1;
+ }
+ 
++/* Return TRUE if the type, as described by TYPE and MODE, is a short vector
++   type as described in AAPCS64 \S 4.1.2.
++
++   See the comment above aarch64_composite_type_p for the notes on MODE.  */
++
++static bool
++aarch64_short_vector_p (const_tree type,
++			machine_mode mode)
++{
++  HOST_WIDE_INT size = -1;
++
++  if (type && TREE_CODE (type) == VECTOR_TYPE)
++    size = int_size_in_bytes (type);
++  else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
++	    || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
++    size = GET_MODE_SIZE (mode);
++
++  return (size == 8 || size == 16);
++}
++
+ /* Return TRUE if the type, as described by TYPE and MODE, is a composite
+    type as described in AAPCS64 \S 4.3.  This includes aggregate, union and
+    array types.  The C99 floating-point complex types are also considered
+@@ -7892,6 +9759,9 @@ static bool
+ aarch64_composite_type_p (const_tree type,
+ 			  machine_mode mode)
+ {
++  if (aarch64_short_vector_p (type, mode))
++    return false;
++
+   if (type && (AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE))
+     return true;
+ 
+@@ -7903,27 +9773,6 @@ aarch64_composite_type_p (const_tree type,
+   return false;
+ }
+ 
+-/* Return TRUE if the type, as described by TYPE and MODE, is a short vector
+-   type as described in AAPCS64 \S 4.1.2.
+-
+-   See the comment above aarch64_composite_type_p for the notes on MODE.  */
+-
+-static bool
+-aarch64_short_vector_p (const_tree type,
+-			machine_mode mode)
+-{
+-  HOST_WIDE_INT size = -1;
+-
+-  if (type && TREE_CODE (type) == VECTOR_TYPE)
+-    size = int_size_in_bytes (type);
+-  else if (!aarch64_composite_type_p (type, mode)
+-	   && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+-	       || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT))
+-    size = GET_MODE_SIZE (mode);
+-
+-  return (size == 8 || size == 16) ? true : false;
+-}
+-
+ /* Return TRUE if an argument, whose type is described by TYPE and MODE,
+    shall be passed or returned in simd/fp register(s) (providing these
+    parameter passing registers are available).
+@@ -7995,6 +9844,7 @@ aarch64_vector_mode_supported_p (machine_mode mode)
+ 	  || mode == V2SImode  || mode == V4HImode
+ 	  || mode == V8QImode || mode == V2SFmode
+ 	  || mode == V4SFmode || mode == V2DFmode
++	  || mode == V4HFmode || mode == V8HFmode
+ 	  || mode == V1DFmode))
+     return true;
+ 
+@@ -8070,6 +9920,10 @@ aarch64_mangle_type (const_tree type)
+   if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type))
+     return "St9__va_list";
+ 
++  /* Half-precision float.  */
++  if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16)
++    return "Dh";
++
+   /* Mangle AArch64-specific internal types.  TYPE_NAME is non-NULL_TREE for
+      builtin types.  */
+   if (TYPE_NAME (type) != NULL)
+@@ -8171,7 +10025,7 @@ aarch64_madd_needs_nop (rtx_insn* insn)
+   rtx_insn *prev;
+   rtx body;
+ 
+-  if (!aarch64_fix_a53_err835769)
++  if (!TARGET_FIX_ERR_A53_835769)
+     return false;
+ 
+   if (!INSN_P (insn) || recog_memoized (insn) < 0)
+@@ -8282,7 +10136,7 @@ aarch64_simd_valid_immediate (rtx op, machine_mode mode, bool inverse,
+     }
+ 
+   unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op);
+-  unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
++  unsigned int innersize = GET_MODE_UNIT_SIZE (mode);
+   unsigned char bytes[16];
+   int immtype = -1, matches;
+   unsigned int invmask = inverse ? 0xff : 0;
+@@ -8312,32 +10166,16 @@ aarch64_simd_valid_immediate (rtx op, machine_mode mode, bool inverse,
+          it must be laid out in the vector register in reverse order.  */
+       rtx el = CONST_VECTOR_ELT (op, BYTES_BIG_ENDIAN ? (n_elts - 1 - i) : i);
+       unsigned HOST_WIDE_INT elpart;
+-      unsigned int part, parts;
+ 
+-      if (CONST_INT_P (el))
+-        {
+-          elpart = INTVAL (el);
+-          parts = 1;
+-        }
+-      else if (GET_CODE (el) == CONST_DOUBLE)
+-        {
+-          elpart = CONST_DOUBLE_LOW (el);
+-          parts = 2;
+-        }
+-      else
+-        gcc_unreachable ();
++      gcc_assert (CONST_INT_P (el));
++      elpart = INTVAL (el);
++
++      for (unsigned int byte = 0; byte < innersize; byte++)
++	{
++	  bytes[idx++] = (elpart & 0xff) ^ invmask;
++	  elpart >>= BITS_PER_UNIT;
++	}
+ 
+-      for (part = 0; part < parts; part++)
+-        {
+-          unsigned int byte;
+-          for (byte = 0; byte < innersize; byte++)
+-            {
+-              bytes[idx++] = (elpart & 0xff) ^ invmask;
+-              elpart >>= BITS_PER_UNIT;
+-            }
+-          if (GET_CODE (el) == CONST_DOUBLE)
+-            elpart = CONST_DOUBLE_HIGH (el);
+-        }
+     }
+ 
+   /* Sanity check.  */
+@@ -8465,6 +10303,21 @@ aarch64_simd_imm_zero_p (rtx x, machine_mode mode)
+   return x == CONST0_RTX (mode);
+ }
+ 
++
++/* Return the bitmask CONST_INT to select the bits required by a zero extract
++   operation of width WIDTH at bit position POS.  */
++
++rtx
++aarch64_mask_from_zextract_ops (rtx width, rtx pos)
++{
++  gcc_assert (CONST_INT_P (width));
++  gcc_assert (CONST_INT_P (pos));
++
++  unsigned HOST_WIDE_INT mask
++    = ((unsigned HOST_WIDE_INT) 1 << UINTVAL (width)) - 1;
++  return GEN_INT (mask << UINTVAL (pos));
++}
++
+ bool
+ aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
+ {
+@@ -8483,9 +10336,7 @@ aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED)
+ }
+ 
+ bool
+-aarch64_mov_operand_p (rtx x,
+-		       enum aarch64_symbol_context context,
+-		       machine_mode mode)
++aarch64_mov_operand_p (rtx x, machine_mode mode)
+ {
+   if (GET_CODE (x) == HIGH
+       && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0))))
+@@ -8497,7 +10348,7 @@ aarch64_mov_operand_p (rtx x,
+   if (GET_CODE (x) == SYMBOL_REF && mode == DImode && CONSTANT_ADDRESS_P (x))
+     return true;
+ 
+-  return aarch64_classify_symbolic_expression (x, context)
++  return aarch64_classify_symbolic_expression (x)
+     == SYMBOL_TINY_ABSOLUTE;
+ }
+ 
+@@ -8616,30 +10467,12 @@ aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+   if (lane < low || lane >= high)
+   {
+     if (exp)
+-      error ("%Klane %ld out of range %ld - %ld", exp, lane, low, high - 1);
++      error ("%Klane %wd out of range %wd - %wd", exp, lane, low, high - 1);
+     else
+-      error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
++      error ("lane %wd out of range %wd - %wd", lane, low, high - 1);
+   }
+ }
+ 
+-/* Emit code to place a AdvSIMD pair result in memory locations (with equal
+-   registers).  */
+-void
+-aarch64_simd_emit_pair_result_insn (machine_mode mode,
+-			    rtx (*intfn) (rtx, rtx, rtx), rtx destaddr,
+-                            rtx op1)
+-{
+-  rtx mem = gen_rtx_MEM (mode, destaddr);
+-  rtx tmp1 = gen_reg_rtx (mode);
+-  rtx tmp2 = gen_reg_rtx (mode);
+-
+-  emit_insn (intfn (tmp1, op1, tmp2));
+-
+-  emit_move_insn (mem, tmp1);
+-  mem = adjust_address (mem, mode, GET_MODE_SIZE (mode));
+-  emit_move_insn (mem, tmp2);
+-}
+-
+ /* Return TRUE if OP is a valid vector addressing mode.  */
+ bool
+ aarch64_simd_mem_operand_p (rtx op)
+@@ -8700,7 +10533,7 @@ aarch64_simd_attr_length_move (rtx_insn *insn)
+ }
+ 
+ /* Compute and return the length of aarch64_simd_reglist<mode>, where <mode> is
+-   one of VSTRUCT modes: OI, CI, EI, or XI.  */
++   one of VSTRUCT modes: OI, CI, or XI.  */
+ int
+ aarch64_simd_attr_length_rglist (enum machine_mode mode)
+ {
+@@ -8816,31 +10649,37 @@ aarch64_simd_make_constant (rtx vals)
+     return NULL_RTX;
+ }
+ 
++/* Expand a vector initialisation sequence, such that TARGET is
++   initialised to contain VALS.  */
++
+ void
+ aarch64_expand_vector_init (rtx target, rtx vals)
+ {
+   machine_mode mode = GET_MODE (target);
+   machine_mode inner_mode = GET_MODE_INNER (mode);
++  /* The number of vector elements.  */
+   int n_elts = GET_MODE_NUNITS (mode);
+-  int n_var = 0, one_var = -1;
++  /* The number of vector elements which are not constant.  */
++  int n_var = 0;
++  rtx any_const = NULL_RTX;
++  /* The first element of vals.  */
++  rtx v0 = XVECEXP (vals, 0, 0);
+   bool all_same = true;
+-  rtx x, mem;
+-  int i;
+ 
+-  x = XVECEXP (vals, 0, 0);
+-  if (!CONST_INT_P (x) && !CONST_DOUBLE_P (x))
+-    n_var = 1, one_var = 0;
+-  
+-  for (i = 1; i < n_elts; ++i)
++  /* Count the number of variable elements to initialise.  */
++  for (int i = 0; i < n_elts; ++i)
+     {
+-      x = XVECEXP (vals, 0, i);
+-      if (!CONST_INT_P (x) && !CONST_DOUBLE_P (x))
+-	++n_var, one_var = i;
++      rtx x = XVECEXP (vals, 0, i);
++      if (!(CONST_INT_P (x) || CONST_DOUBLE_P (x)))
++	++n_var;
++      else
++	any_const = x;
+ 
+-      if (!rtx_equal_p (x, XVECEXP (vals, 0, 0)))
+-	all_same = false;
++      all_same &= rtx_equal_p (x, v0);
+     }
+ 
++  /* No variable elements, hand off to aarch64_simd_make_constant which knows
++     how best to handle this.  */
+   if (n_var == 0)
+     {
+       rtx constant = aarch64_simd_make_constant (vals);
+@@ -8854,123 +10693,64 @@ aarch64_expand_vector_init (rtx target, rtx vals)
+   /* Splat a single non-constant element if we can.  */
+   if (all_same)
+     {
+-      x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, 0));
++      rtx x = copy_to_mode_reg (inner_mode, v0);
+       aarch64_emit_move (target, gen_rtx_VEC_DUPLICATE (mode, x));
+       return;
+     }
+ 
+-  /* One field is non-constant.  Load constant then overwrite varying
+-     field.  This is more efficient than using the stack.  */
+-  if (n_var == 1)
++  /* Initialise a vector which is part-variable.  We want to first try
++     to build those lanes which are constant in the most efficient way we
++     can.  */
++  if (n_var != n_elts)
+     {
+       rtx copy = copy_rtx (vals);
+-      rtx index = GEN_INT (one_var);
+-      enum insn_code icode;
+-
+-      /* Load constant part of vector, substitute neighboring value for
+-	 varying element.  */
+-      XVECEXP (copy, 0, one_var) = XVECEXP (vals, 0, one_var ^ 1);
+-      aarch64_expand_vector_init (target, copy);
+-
+-      /* Insert variable.  */
+-      x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var));
+-      icode = optab_handler (vec_set_optab, mode);
+-      gcc_assert (icode != CODE_FOR_nothing);
+-      emit_insn (GEN_FCN (icode) (target, x, index));
+-      return;
+-    }
+-
+-  /* Construct the vector in memory one field at a time
+-     and load the whole vector.  */
+-  mem = assign_stack_temp (mode, GET_MODE_SIZE (mode));
+-  for (i = 0; i < n_elts; i++)
+-    emit_move_insn (adjust_address_nv (mem, inner_mode,
+-				    i * GET_MODE_SIZE (inner_mode)),
+-		    XVECEXP (vals, 0, i));
+-  emit_move_insn (target, mem);
+-
+-}
+-
+-static unsigned HOST_WIDE_INT
+-aarch64_shift_truncation_mask (machine_mode mode)
+-{
+-  return
+-    (aarch64_vector_mode_supported_p (mode)
+-     || aarch64_vect_struct_mode_p (mode)) ? 0 : (GET_MODE_BITSIZE (mode) - 1);
+-}
+-
+-#ifndef TLS_SECTION_ASM_FLAG
+-#define TLS_SECTION_ASM_FLAG 'T'
+-#endif
+ 
+-void
+-aarch64_elf_asm_named_section (const char *name, unsigned int flags,
+-			       tree decl ATTRIBUTE_UNUSED)
+-{
+-  char flagchars[10], *f = flagchars;
+-
+-  /* If we have already declared this section, we can use an
+-     abbreviated form to switch back to it -- unless this section is
+-     part of a COMDAT groups, in which case GAS requires the full
+-     declaration every time.  */
+-  if (!(HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
+-      && (flags & SECTION_DECLARED))
+-    {
+-      fprintf (asm_out_file, "\t.section\t%s\n", name);
+-      return;
++      /* Load constant part of vector.  We really don't care what goes into the
++	 parts we will overwrite, but we're more likely to be able to load the
++	 constant efficiently if it has fewer, larger, repeating parts
++	 (see aarch64_simd_valid_immediate).  */
++      for (int i = 0; i < n_elts; i++)
++	{
++	  rtx x = XVECEXP (vals, 0, i);
++	  if (CONST_INT_P (x) || CONST_DOUBLE_P (x))
++	    continue;
++	  rtx subst = any_const;
++	  for (int bit = n_elts / 2; bit > 0; bit /= 2)
++	    {
++	      /* Look in the copied vector, as more elements are const.  */
++	      rtx test = XVECEXP (copy, 0, i ^ bit);
++	      if (CONST_INT_P (test) || CONST_DOUBLE_P (test))
++		{
++		  subst = test;
++		  break;
++		}
++	    }
++	  XVECEXP (copy, 0, i) = subst;
++	}
++      aarch64_expand_vector_init (target, copy);
+     }
+ 
+-  if (!(flags & SECTION_DEBUG))
+-    *f++ = 'a';
+-  if (flags & SECTION_WRITE)
+-    *f++ = 'w';
+-  if (flags & SECTION_CODE)
+-    *f++ = 'x';
+-  if (flags & SECTION_SMALL)
+-    *f++ = 's';
+-  if (flags & SECTION_MERGE)
+-    *f++ = 'M';
+-  if (flags & SECTION_STRINGS)
+-    *f++ = 'S';
+-  if (flags & SECTION_TLS)
+-    *f++ = TLS_SECTION_ASM_FLAG;
+-  if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
+-    *f++ = 'G';
+-  *f = '\0';
+-
+-  fprintf (asm_out_file, "\t.section\t%s,\"%s\"", name, flagchars);
+-
+-  if (!(flags & SECTION_NOTYPE))
+-    {
+-      const char *type;
+-      const char *format;
+-
+-      if (flags & SECTION_BSS)
+-	type = "nobits";
+-      else
+-	type = "progbits";
+-
+-#ifdef TYPE_OPERAND_FMT
+-      format = "," TYPE_OPERAND_FMT;
+-#else
+-      format = ",@%s";
+-#endif
++  /* Insert the variable lanes directly.  */
+ 
+-      fprintf (asm_out_file, format, type);
++  enum insn_code icode = optab_handler (vec_set_optab, mode);
++  gcc_assert (icode != CODE_FOR_nothing);
+ 
+-      if (flags & SECTION_ENTSIZE)
+-	fprintf (asm_out_file, ",%d", flags & SECTION_ENTSIZE);
+-      if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE))
+-	{
+-	  if (TREE_CODE (decl) == IDENTIFIER_NODE)
+-	    fprintf (asm_out_file, ",%s,comdat", IDENTIFIER_POINTER (decl));
+-	  else
+-	    fprintf (asm_out_file, ",%s,comdat",
+-		     IDENTIFIER_POINTER (DECL_COMDAT_GROUP (decl)));
+-	}
++  for (int i = 0; i < n_elts; i++)
++    {
++      rtx x = XVECEXP (vals, 0, i);
++      if (CONST_INT_P (x) || CONST_DOUBLE_P (x))
++	continue;
++      x = copy_to_mode_reg (inner_mode, x);
++      emit_insn (GEN_FCN (icode) (target, x, GEN_INT (i)));
+     }
++}
+ 
+-  putc ('\n', asm_out_file);
++static unsigned HOST_WIDE_INT
++aarch64_shift_truncation_mask (machine_mode mode)
++{
++  return
++    (aarch64_vector_mode_supported_p (mode)
++     || aarch64_vect_struct_mode_p (mode)) ? 0 : (GET_MODE_BITSIZE (mode) - 1);
+ }
+ 
+ /* Select a format to encode pointers in exception handling data.  */
+@@ -8984,6 +10764,7 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
+      case AARCH64_CMODEL_TINY_PIC:
+      case AARCH64_CMODEL_SMALL:
+      case AARCH64_CMODEL_SMALL_PIC:
++     case AARCH64_CMODEL_SMALL_SPIC:
+        /* text+got+data < 4Gb.  4-byte signed relocs are sufficient
+ 	  for everything.  */
+        type = DW_EH_PE_sdata4;
+@@ -8996,6 +10777,83 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
+    return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
+ }
+ 
++/* The last .arch and .tune assembly strings that we printed.  */
++static std::string aarch64_last_printed_arch_string;
++static std::string aarch64_last_printed_tune_string;
++
++/* Implement ASM_DECLARE_FUNCTION_NAME.  Output the ISA features used
++   by the function fndecl.  */
++
++void
++aarch64_declare_function_name (FILE *stream, const char* name,
++				tree fndecl)
++{
++  tree target_parts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
++
++  struct cl_target_option *targ_options;
++  if (target_parts)
++    targ_options = TREE_TARGET_OPTION (target_parts);
++  else
++    targ_options = TREE_TARGET_OPTION (target_option_current_node);
++  gcc_assert (targ_options);
++
++  const struct processor *this_arch
++    = aarch64_get_arch (targ_options->x_explicit_arch);
++
++  unsigned long isa_flags = targ_options->x_aarch64_isa_flags;
++  std::string extension
++    = aarch64_get_extension_string_for_isa_flags (isa_flags,
++						  this_arch->flags);
++  /* Only update the assembler .arch string if it is distinct from the last
++     such string we printed.  */
++  std::string to_print = this_arch->name + extension;
++  if (to_print != aarch64_last_printed_arch_string)
++    {
++      asm_fprintf (asm_out_file, "\t.arch %s\n", to_print.c_str ());
++      aarch64_last_printed_arch_string = to_print;
++    }
++
++  /* Print the cpu name we're tuning for in the comments, might be
++     useful to readers of the generated asm.  Do it only when it changes
++     from function to function and verbose assembly is requested.  */
++  const struct processor *this_tune
++    = aarch64_get_tune_cpu (targ_options->x_explicit_tune_core);
++
++  if (flag_debug_asm && aarch64_last_printed_tune_string != this_tune->name)
++    {
++      asm_fprintf (asm_out_file, "\t" ASM_COMMENT_START ".tune %s\n",
++		   this_tune->name);
++      aarch64_last_printed_tune_string = this_tune->name;
++    }
++
++  /* Don't forget the type directive for ELF.  */
++  ASM_OUTPUT_TYPE_DIRECTIVE (stream, name, "function");
++  ASM_OUTPUT_LABEL (stream, name);
++}
++
++/* Implements TARGET_ASM_FILE_START.  Output the assembly header.  */
++
++static void
++aarch64_start_file (void)
++{
++  struct cl_target_option *default_options
++    = TREE_TARGET_OPTION (target_option_default_node);
++
++  const struct processor *default_arch
++    = aarch64_get_arch (default_options->x_explicit_arch);
++  unsigned long default_isa_flags = default_options->x_aarch64_isa_flags;
++  std::string extension
++    = aarch64_get_extension_string_for_isa_flags (default_isa_flags,
++						  default_arch->flags);
++
++   aarch64_last_printed_arch_string = default_arch->name + extension;
++   aarch64_last_printed_tune_string = "";
++   asm_fprintf (asm_out_file, "\t.arch %s\n",
++		aarch64_last_printed_arch_string.c_str ());
++
++   default_file_start ();
++}
++
+ /* Emit load exclusive.  */
+ 
+ static void
+@@ -9056,7 +10914,23 @@ aarch64_expand_compare_and_swap (rtx operands[])
+ {
+   rtx bval, rval, mem, oldval, newval, is_weak, mod_s, mod_f, x;
+   machine_mode mode, cmp_mode;
+-  rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
++  typedef rtx (*gen_cas_fn) (rtx, rtx, rtx, rtx, rtx, rtx, rtx);
++  int idx;
++  gen_cas_fn gen;
++  const gen_cas_fn split_cas[] =
++  {
++    gen_aarch64_compare_and_swapqi,
++    gen_aarch64_compare_and_swaphi,
++    gen_aarch64_compare_and_swapsi,
++    gen_aarch64_compare_and_swapdi
++  };
++  const gen_cas_fn atomic_cas[] =
++  {
++    gen_aarch64_compare_and_swapqi_lse,
++    gen_aarch64_compare_and_swaphi_lse,
++    gen_aarch64_compare_and_swapsi_lse,
++    gen_aarch64_compare_and_swapdi_lse
++  };
+ 
+   bval = operands[0];
+   rval = operands[1];
+@@ -9101,13 +10975,17 @@ aarch64_expand_compare_and_swap (rtx operands[])
+ 
+   switch (mode)
+     {
+-    case QImode: gen = gen_atomic_compare_and_swapqi_1; break;
+-    case HImode: gen = gen_atomic_compare_and_swaphi_1; break;
+-    case SImode: gen = gen_atomic_compare_and_swapsi_1; break;
+-    case DImode: gen = gen_atomic_compare_and_swapdi_1; break;
++    case QImode: idx = 0; break;
++    case HImode: idx = 1; break;
++    case SImode: idx = 2; break;
++    case DImode: idx = 3; break;
+     default:
+       gcc_unreachable ();
+     }
++  if (TARGET_LSE)
++    gen = atomic_cas[idx];
++  else
++    gen = split_cas[idx];
+ 
+   emit_insn (gen (rval, mem, oldval, newval, is_weak, mod_s, mod_f));
+ 
+@@ -9119,6 +10997,32 @@ aarch64_expand_compare_and_swap (rtx operands[])
+   emit_insn (gen_rtx_SET (VOIDmode, bval, x));
+ }
+ 
++/* Test whether the target supports using a atomic load-operate instruction.
++   CODE is the operation and AFTER is TRUE if the data in memory after the
++   operation should be returned and FALSE if the data before the operation
++   should be returned.  Returns FALSE if the operation isn't supported by the
++   architecture.  */
++
++bool
++aarch64_atomic_ldop_supported_p (enum rtx_code code)
++{
++  if (!TARGET_LSE)
++    return false;
++
++  switch (code)
++    {
++    case SET:
++    case AND:
++    case IOR:
++    case XOR:
++    case MINUS:
++    case PLUS:
++      return true;
++    default:
++      return false;
++    }
++}
++
+ /* Emit a barrier, that is appropriate for memory model MODEL, at the end of a
+    sequence implementing an atomic operation.  */
+ 
+@@ -9136,6 +11040,42 @@ aarch64_emit_post_barrier (enum memmodel model)
+     }
+ }
+ 
++/* Emit an atomic compare-and-swap operation.  RVAL is the destination register
++   for the data in memory.  EXPECTED is the value expected to be in memory.
++   DESIRED is the value to store to memory.  MEM is the memory location.  MODEL
++   is the memory ordering to use.  */
++
++void
++aarch64_gen_atomic_cas (rtx rval, rtx mem,
++			rtx expected, rtx desired,
++			rtx model)
++{
++  rtx (*gen) (rtx, rtx, rtx, rtx);
++  machine_mode mode;
++
++  mode = GET_MODE (mem);
++
++  switch (mode)
++    {
++    case QImode: gen = gen_aarch64_atomic_casqi; break;
++    case HImode: gen = gen_aarch64_atomic_cashi; break;
++    case SImode: gen = gen_aarch64_atomic_cassi; break;
++    case DImode: gen = gen_aarch64_atomic_casdi; break;
++    default:
++      gcc_unreachable ();
++    }
++
++  /* Move the expected value into the CAS destination register.  */
++  emit_insn (gen_rtx_SET (VOIDmode, rval, expected));
++
++  /* Emit the CAS.  */
++  emit_insn (gen (rval, mem, desired, model));
++
++  /* Compare the expected value with the value loaded by the CAS, to establish
++     whether the swap was made.  */
++  aarch64_gen_compare_reg (EQ, rval, expected);
++}
++
+ /* Split a compare and swap pattern.  */
+ 
+ void
+@@ -9204,11 +11144,257 @@ aarch64_split_compare_and_swap (rtx operands[])
+     aarch64_emit_post_barrier (model);
+ }
+ 
++/* Emit a BIC instruction.  */
++
++static void
++aarch64_emit_bic (machine_mode mode, rtx dst, rtx s1, rtx s2, int shift)
++{
++  rtx shift_rtx = GEN_INT (shift);
++  rtx (*gen) (rtx, rtx, rtx, rtx);
++
++  switch (mode)
++    {
++    case SImode: gen = gen_and_one_cmpl_lshrsi3; break;
++    case DImode: gen = gen_and_one_cmpl_lshrdi3; break;
++    default:
++      gcc_unreachable ();
++    }
++
++  emit_insn (gen (dst, s2, shift_rtx, s1));
++}
++
++/* Emit an atomic swap.  */
++
++static void
++aarch64_emit_atomic_swap (machine_mode mode, rtx dst, rtx value,
++			  rtx mem, rtx model)
++{
++  rtx (*gen) (rtx, rtx, rtx, rtx);
++
++  switch (mode)
++    {
++    case QImode: gen = gen_aarch64_atomic_swpqi; break;
++    case HImode: gen = gen_aarch64_atomic_swphi; break;
++    case SImode: gen = gen_aarch64_atomic_swpsi; break;
++    case DImode: gen = gen_aarch64_atomic_swpdi; break;
++    default:
++      gcc_unreachable ();
++    }
++
++  emit_insn (gen (dst, mem, value, model));
++}
++
++/* Operations supported by aarch64_emit_atomic_load_op.  */
++
++enum aarch64_atomic_load_op_code
++{
++  AARCH64_LDOP_PLUS,	/* A + B  */
++  AARCH64_LDOP_XOR,	/* A ^ B  */
++  AARCH64_LDOP_OR,	/* A | B  */
++  AARCH64_LDOP_BIC	/* A & ~B  */
++};
++
++/* Emit an atomic load-operate.  */
++
++static void
++aarch64_emit_atomic_load_op (enum aarch64_atomic_load_op_code code,
++			     machine_mode mode, rtx dst, rtx src,
++			     rtx mem, rtx model)
++{
++  typedef rtx (*aarch64_atomic_load_op_fn) (rtx, rtx, rtx, rtx);
++  const aarch64_atomic_load_op_fn plus[] =
++  {
++    gen_aarch64_atomic_loadaddqi,
++    gen_aarch64_atomic_loadaddhi,
++    gen_aarch64_atomic_loadaddsi,
++    gen_aarch64_atomic_loadadddi
++  };
++  const aarch64_atomic_load_op_fn eor[] =
++  {
++    gen_aarch64_atomic_loadeorqi,
++    gen_aarch64_atomic_loadeorhi,
++    gen_aarch64_atomic_loadeorsi,
++    gen_aarch64_atomic_loadeordi
++  };
++  const aarch64_atomic_load_op_fn ior[] =
++  {
++    gen_aarch64_atomic_loadsetqi,
++    gen_aarch64_atomic_loadsethi,
++    gen_aarch64_atomic_loadsetsi,
++    gen_aarch64_atomic_loadsetdi
++  };
++  const aarch64_atomic_load_op_fn bic[] =
++  {
++    gen_aarch64_atomic_loadclrqi,
++    gen_aarch64_atomic_loadclrhi,
++    gen_aarch64_atomic_loadclrsi,
++    gen_aarch64_atomic_loadclrdi
++  };
++  aarch64_atomic_load_op_fn gen;
++  int idx = 0;
++
++  switch (mode)
++    {
++    case QImode: idx = 0; break;
++    case HImode: idx = 1; break;
++    case SImode: idx = 2; break;
++    case DImode: idx = 3; break;
++    default:
++      gcc_unreachable ();
++    }
++
++  switch (code)
++    {
++    case AARCH64_LDOP_PLUS: gen = plus[idx]; break;
++    case AARCH64_LDOP_XOR: gen = eor[idx]; break;
++    case AARCH64_LDOP_OR: gen = ior[idx]; break;
++    case AARCH64_LDOP_BIC: gen = bic[idx]; break;
++    default:
++      gcc_unreachable ();
++    }
++
++  emit_insn (gen (dst, mem, src, model));
++}
++
++/* Emit an atomic load+operate.  CODE is the operation.  OUT_DATA is the
++   location to store the data read from memory.  OUT_RESULT is the location to
++   store the result of the operation.  MEM is the memory location to read and
++   modify.  MODEL_RTX is the memory ordering to use.  VALUE is the second
++   operand for the operation.  Either OUT_DATA or OUT_RESULT, but not both, can
++   be NULL.  */
++
++void
++aarch64_gen_atomic_ldop (enum rtx_code code, rtx out_data, rtx out_result,
++			 rtx mem, rtx value, rtx model_rtx)
++{
++  machine_mode mode = GET_MODE (mem);
++  machine_mode wmode = (mode == DImode ? DImode : SImode);
++  const bool short_mode = (mode < SImode);
++  aarch64_atomic_load_op_code ldop_code;
++  rtx src;
++  rtx x;
++
++  if (out_data)
++    out_data = gen_lowpart (mode, out_data);
++
++  if (out_result)
++    out_result = gen_lowpart (mode, out_result);
++
++  /* Make sure the value is in a register, putting it into a destination
++     register if it needs to be manipulated.  */
++  if (!register_operand (value, mode)
++      || code == AND || code == MINUS)
++    {
++      src = out_result ? out_result : out_data;
++      emit_move_insn (src, gen_lowpart (mode, value));
++    }
++  else
++    src = value;
++  gcc_assert (register_operand (src, mode));
++
++  /* Preprocess the data for the operation as necessary.  If the operation is
++     a SET then emit a swap instruction and finish.  */
++  switch (code)
++    {
++    case SET:
++      aarch64_emit_atomic_swap (mode, out_data, src, mem, model_rtx);
++      return;
++
++    case MINUS:
++      /* Negate the value and treat it as a PLUS.  */
++      {
++	rtx neg_src;
++
++	/* Resize the value if necessary.  */
++	if (short_mode)
++	  src = gen_lowpart (wmode, src);
++
++	neg_src = gen_rtx_NEG (wmode, src);
++	emit_insn (gen_rtx_SET (VOIDmode, src, neg_src));
++
++	if (short_mode)
++	  src = gen_lowpart (mode, src);
++      }
++      /* Fall-through.  */
++    case PLUS:
++      ldop_code = AARCH64_LDOP_PLUS;
++      break;
++
++    case IOR:
++      ldop_code = AARCH64_LDOP_OR;
++      break;
++
++    case XOR:
++      ldop_code = AARCH64_LDOP_XOR;
++      break;
++
++    case AND:
++      {
++	rtx not_src;
++
++	/* Resize the value if necessary.  */
++	if (short_mode)
++	  src = gen_lowpart (wmode, src);
++
++	not_src = gen_rtx_NOT (wmode, src);
++	emit_insn (gen_rtx_SET (VOIDmode, src, not_src));
++
++	if (short_mode)
++	  src = gen_lowpart (mode, src);
++      }
++      ldop_code = AARCH64_LDOP_BIC;
++      break;
++
++    default:
++      /* The operation can't be done with atomic instructions.  */
++      gcc_unreachable ();
++    }
++
++  aarch64_emit_atomic_load_op (ldop_code, mode, out_data, src, mem, model_rtx);
++
++  /* If necessary, calculate the data in memory after the update by redoing the
++     operation from values in registers.  */
++  if (!out_result)
++    return;
++
++  if (short_mode)
++    {
++      src = gen_lowpart (wmode, src);
++      out_data = gen_lowpart (wmode, out_data);
++      out_result = gen_lowpart (wmode, out_result);
++    }
++
++  x = NULL_RTX;
++
++  switch (code)
++    {
++    case MINUS:
++    case PLUS:
++      x = gen_rtx_PLUS (wmode, out_data, src);
++      break;
++    case IOR:
++      x = gen_rtx_IOR (wmode, out_data, src);
++      break;
++    case XOR:
++      x = gen_rtx_XOR (wmode, out_data, src);
++      break;
++    case AND:
++      aarch64_emit_bic (wmode, out_result, out_data, src, 0);
++      return;
++    default:
++      gcc_unreachable ();
++    }
++
++  emit_set_insn (out_result, x);
++
++  return;
++}
++
+ /* Split an atomic operation.  */
+ 
+ void
+ aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
+-		     rtx value, rtx model_rtx, rtx cond)
++			 rtx value, rtx model_rtx, rtx cond)
+ {
+   machine_mode mode = GET_MODE (mem);
+   machine_mode wmode = (mode == DImode ? DImode : SImode);
+@@ -9217,6 +11403,7 @@ aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
+   rtx_code_label *label;
+   rtx x;
+ 
++  /* Split the atomic operation into a sequence.  */
+   label = gen_label_rtx ();
+   emit_label (label);
+ 
+@@ -9277,33 +11464,30 @@ aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem,
+ }
+ 
+ static void
+-aarch64_print_extension (void)
++aarch64_init_libfuncs (void)
+ {
+-  const struct aarch64_option_extension *opt = NULL;
++   /* Half-precision float operations.  The compiler handles all operations
++     with NULL libfuncs by converting to SFmode.  */
+ 
+-  for (opt = all_extensions; opt->name != NULL; opt++)
+-    if ((aarch64_isa_flags & opt->flags_on) == opt->flags_on)
+-      asm_fprintf (asm_out_file, "+%s", opt->name);
++  /* Conversions.  */
++  set_conv_libfunc (trunc_optab, HFmode, SFmode, "__gnu_f2h_ieee");
++  set_conv_libfunc (sext_optab, SFmode, HFmode, "__gnu_h2f_ieee");
+ 
+-  asm_fprintf (asm_out_file, "\n");
+-}
++  /* Arithmetic.  */
++  set_optab_libfunc (add_optab, HFmode, NULL);
++  set_optab_libfunc (sdiv_optab, HFmode, NULL);
++  set_optab_libfunc (smul_optab, HFmode, NULL);
++  set_optab_libfunc (neg_optab, HFmode, NULL);
++  set_optab_libfunc (sub_optab, HFmode, NULL);
+ 
+-static void
+-aarch64_start_file (void)
+-{
+-  if (selected_arch)
+-    {
+-      asm_fprintf (asm_out_file, "\t.arch %s", selected_arch->name);
+-      aarch64_print_extension ();
+-    }
+-  else if (selected_cpu)
+-    {
+-      const char *truncated_name
+-	    = aarch64_rewrite_selected_cpu (selected_cpu->name);
+-      asm_fprintf (asm_out_file, "\t.cpu %s", truncated_name);
+-      aarch64_print_extension ();
+-    }
+-  default_file_start();
++  /* Comparisons.  */
++  set_optab_libfunc (eq_optab, HFmode, NULL);
++  set_optab_libfunc (ne_optab, HFmode, NULL);
++  set_optab_libfunc (lt_optab, HFmode, NULL);
++  set_optab_libfunc (le_optab, HFmode, NULL);
++  set_optab_libfunc (ge_optab, HFmode, NULL);
++  set_optab_libfunc (gt_optab, HFmode, NULL);
++  set_optab_libfunc (unord_optab, HFmode, NULL);
+ }
+ 
+ /* Target hook for c_mode_for_suffix.  */
+@@ -9344,7 +11528,8 @@ aarch64_float_const_representable_p (rtx x)
+   if (!CONST_DOUBLE_P (x))
+     return false;
+ 
+-  if (GET_MODE (x) == VOIDmode)
++  /* We don't support HFmode constants yet.  */
++  if (GET_MODE (x) == VOIDmode || GET_MODE (x) == HFmode)
+     return false;
+ 
+   REAL_VALUE_FROM_CONST_DOUBLE (r, x);
+@@ -9431,9 +11616,11 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
+   lane_count = width / info.element_width;
+ 
+   mode = GET_MODE_INNER (mode);
+-  if (mode == SFmode || mode == DFmode)
++  if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+     {
+       gcc_assert (info.shift == 0 && ! info.mvn);
++      /* For FP zero change it to a CONST_INT 0 and use the integer SIMD
++	 move immediate path.  */
+       if (aarch64_float_const_zero_rtx_p (info.value))
+         info.value = GEN_INT (0);
+       else
+@@ -9457,6 +11644,7 @@ aarch64_output_simd_mov_immediate (rtx const_vector,
+   mnemonic = info.mvn ? "mvni" : "movi";
+   shift_op = info.msl ? "msl" : "lsl";
+ 
++  gcc_assert (CONST_INT_P (info.value));
+   if (lane_count == 1)
+     snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX,
+ 	      mnemonic, UINTVAL (info.value));
+@@ -10047,6 +12235,8 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d)
+     case V4SImode: gen = gen_aarch64_dup_lanev4si; break;
+     case V2SImode: gen = gen_aarch64_dup_lanev2si; break;
+     case V2DImode: gen = gen_aarch64_dup_lanev2di; break;
++    case V8HFmode: gen = gen_aarch64_dup_lanev8hf; break;
++    case V4HFmode: gen = gen_aarch64_dup_lanev4hf; break;
+     case V4SFmode: gen = gen_aarch64_dup_lanev4sf; break;
+     case V2SFmode: gen = gen_aarch64_dup_lanev2sf; break;
+     case V2DFmode: gen = gen_aarch64_dup_lanev2df; break;
+@@ -10663,7 +12853,7 @@ aarch64_gen_ccmp_next (rtx *prep_seq, rtx *gen_seq, rtx prev, int cmp_code,
+ static bool
+ aarch64_macro_fusion_p (void)
+ {
+-  return aarch64_tune_params->fuseable_ops != AARCH64_FUSE_NOTHING;
++  return aarch64_tune_params.fusible_ops != AARCH64_FUSE_NOTHING;
+ }
+ 
+ 
+@@ -10683,7 +12873,7 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+     return false;
+ 
+   if (simple_sets_p
+-      && (aarch64_tune_params->fuseable_ops & AARCH64_FUSE_MOV_MOVK))
++      && (aarch64_tune_params.fusible_ops & AARCH64_FUSE_MOV_MOVK))
+     {
+       /* We are trying to match:
+          prev (mov)  == (set (reg r0) (const_int imm16))
+@@ -10708,7 +12898,7 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+     }
+ 
+   if (simple_sets_p
+-      && (aarch64_tune_params->fuseable_ops & AARCH64_FUSE_ADRP_ADD))
++      && (aarch64_tune_params.fusible_ops & AARCH64_FUSE_ADRP_ADD))
+     {
+ 
+       /*  We're trying to match:
+@@ -10734,7 +12924,7 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+     }
+ 
+   if (simple_sets_p
+-      && (aarch64_tune_params->fuseable_ops & AARCH64_FUSE_MOVK_MOVK))
++      && (aarch64_tune_params.fusible_ops & AARCH64_FUSE_MOVK_MOVK))
+     {
+ 
+       /* We're trying to match:
+@@ -10763,7 +12953,7 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+ 
+     }
+   if (simple_sets_p
+-      && (aarch64_tune_params->fuseable_ops & AARCH64_FUSE_ADRP_LDR))
++      && (aarch64_tune_params.fusible_ops & AARCH64_FUSE_ADRP_LDR))
+     {
+       /* We're trying to match:
+           prev (adrp) == (set (reg r0)
+@@ -10794,7 +12984,11 @@ aarch_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
+         }
+     }
+ 
+-  if ((aarch64_tune_params->fuseable_ops & AARCH64_FUSE_CMP_BRANCH)
++  if ((aarch64_tune_params.fusible_ops & AARCH64_FUSE_AES_AESMC)
++       && aarch_crypto_can_dual_issue (prev, curr))
++    return true;
++
++  if ((aarch64_tune_params.fusible_ops & AARCH64_FUSE_CMP_BRANCH)
+       && any_condjump_p (curr))
+     {
+       enum attr_type prev_type = get_attr_type (prev);
+@@ -10874,8 +13068,9 @@ fusion_load_store (rtx_insn *insn, rtx *base, rtx *offset)
+   src = SET_SRC (x);
+   dest = SET_DEST (x);
+ 
+-  if (GET_MODE (dest) != SImode && GET_MODE (dest) != DImode
+-      && GET_MODE (dest) != SFmode && GET_MODE (dest) != DFmode)
++  machine_mode dest_mode = GET_MODE (dest);
++
++  if (!aarch64_mode_valid_for_sched_fusion_p (dest_mode))
+     return SCHED_FUSION_NONE;
+ 
+   if (GET_CODE (src) == SIGN_EXTEND)
+@@ -11298,6 +13493,42 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+   return true;
+ }
+ 
++/* Implement TARGET_PROMOTED_TYPE to promote __fp16 to float.  */
++static tree
++aarch64_promoted_type (const_tree t)
++{
++  if (SCALAR_FLOAT_TYPE_P (t) && TYPE_PRECISION (t) == 16)
++    return float_type_node;
++  return NULL_TREE;
++}
++
++/* Return 1 if pseudo register should be created and used to hold
++   GOT address for PIC code.  */
++
++bool
++aarch64_use_pseudo_pic_reg (void)
++{
++  return aarch64_cmodel == AARCH64_CMODEL_SMALL_SPIC;
++}
++
++/* Implement TARGET_UNSPEC_MAY_TRAP_P.  */
++
++static int
++aarch64_unspec_may_trap_p (const_rtx x, unsigned flags)
++{
++  switch (XINT (x, 1))
++    {
++    case UNSPEC_GOTSMALLPIC:
++    case UNSPEC_GOTSMALLPIC28K:
++    case UNSPEC_GOTTINYPIC:
++      return 0;
++    default:
++      break;
++    }
++
++  return default_unspec_may_trap_p (x, flags);
++}
++
+ #undef TARGET_ADDRESS_COST
+ #define TARGET_ADDRESS_COST aarch64_address_cost
+ 
+@@ -11342,9 +13573,15 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #undef TARGET_CAN_ELIMINATE
+ #define TARGET_CAN_ELIMINATE aarch64_can_eliminate
+ 
++#undef TARGET_CAN_INLINE_P
++#define TARGET_CAN_INLINE_P aarch64_can_inline_p
++
+ #undef TARGET_CANNOT_FORCE_CONST_MEM
+ #define TARGET_CANNOT_FORCE_CONST_MEM aarch64_cannot_force_const_mem
+ 
++#undef TARGET_CASE_VALUES_THRESHOLD
++#define TARGET_CASE_VALUES_THRESHOLD aarch64_case_values_threshold
++
+ #undef TARGET_CONDITIONAL_REGISTER_USAGE
+ #define TARGET_CONDITIONAL_REGISTER_USAGE aarch64_conditional_register_usage
+ 
+@@ -11443,6 +13680,21 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE \
+   aarch64_override_options_after_change
+ 
++#undef TARGET_OPTION_SAVE
++#define TARGET_OPTION_SAVE aarch64_option_save
++
++#undef TARGET_OPTION_RESTORE
++#define TARGET_OPTION_RESTORE aarch64_option_restore
++
++#undef TARGET_OPTION_PRINT
++#define TARGET_OPTION_PRINT aarch64_option_print
++
++#undef TARGET_OPTION_VALID_ATTRIBUTE_P
++#define TARGET_OPTION_VALID_ATTRIBUTE_P aarch64_option_valid_attribute_p
++
++#undef TARGET_SET_CURRENT_FUNCTION
++#define TARGET_SET_CURRENT_FUNCTION aarch64_set_current_function
++
+ #undef TARGET_PASS_BY_REFERENCE
+ #define TARGET_PASS_BY_REFERENCE aarch64_pass_by_reference
+ 
+@@ -11452,6 +13704,9 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #undef TARGET_SCHED_REASSOCIATION_WIDTH
+ #define TARGET_SCHED_REASSOCIATION_WIDTH aarch64_reassociation_width
+ 
++#undef TARGET_PROMOTED_TYPE
++#define TARGET_PROMOTED_TYPE aarch64_promoted_type
++
+ #undef TARGET_SECONDARY_RELOAD
+ #define TARGET_SECONDARY_RELOAD aarch64_secondary_reload
+ 
+@@ -11483,6 +13738,10 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
+   aarch64_sched_first_cycle_multipass_dfa_lookahead
+ 
++#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD
++#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD \
++  aarch64_first_cycle_multipass_dfa_lookahead_guard
++
+ #undef TARGET_TRAMPOLINE_INIT
+ #define TARGET_TRAMPOLINE_INIT aarch64_trampoline_init
+ 
+@@ -11544,6 +13803,8 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #define TARGET_VECTORIZE_VEC_PERM_CONST_OK \
+   aarch64_vectorize_vec_perm_const_ok
+ 
++#undef TARGET_INIT_LIBFUNCS
++#define TARGET_INIT_LIBFUNCS aarch64_init_libfuncs
+ 
+ #undef TARGET_FIXED_CONDITION_CODE_REGS
+ #define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
+@@ -11579,6 +13840,12 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
+ #undef TARGET_RELAXED_ORDERING
+ #define TARGET_RELAXED_ORDERING true
+ 
++#undef TARGET_UNSPEC_MAY_TRAP_P
++#define TARGET_UNSPEC_MAY_TRAP_P aarch64_unspec_may_trap_p
++
++#undef TARGET_USE_PSEUDO_PIC_REG
++#define TARGET_USE_PSEUDO_PIC_REG aarch64_use_pseudo_pic_reg
++
+ struct gcc_target targetm = TARGET_INITIALIZER;
+ 
+ #include "gt-aarch64.h"
+--- a/src/gcc/config/aarch64/aarch64.h
++++ b/src/gcc/config/aarch64/aarch64.h
+@@ -23,80 +23,13 @@
+ #define GCC_AARCH64_H
+ 
+ /* Target CPU builtins.  */
+-#define TARGET_CPU_CPP_BUILTINS()			\
+-  do							\
+-    {							\
+-      builtin_define ("__aarch64__");                   \
+-      builtin_define ("__ARM_64BIT_STATE");             \
+-      builtin_define_with_int_value                     \
+-        ("__ARM_ARCH", aarch64_architecture_version);   \
+-      cpp_define_formatted                                              \
+-        (parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version);     \
+-      builtin_define ("__ARM_ARCH_ISA_A64");            \
+-      builtin_define_with_int_value                     \
+-        ("__ARM_ARCH_PROFILE", 'A');                    \
+-      builtin_define ("__ARM_FEATURE_CLZ");             \
+-      builtin_define ("__ARM_FEATURE_IDIV");            \
+-      builtin_define ("__ARM_FEATURE_UNALIGNED");       \
+-      if (flag_unsafe_math_optimizations)               \
+-        builtin_define ("__ARM_FP_FAST");               \
+-      builtin_define ("__ARM_PCS_AAPCS64");             \
+-      builtin_define_with_int_value                     \
+-        ("__ARM_SIZEOF_WCHAR_T", WCHAR_TYPE_SIZE / 8);  \
+-      builtin_define_with_int_value                     \
+-        ("__ARM_SIZEOF_MINIMAL_ENUM",                   \
+-         flag_short_enums? 1 : 4);                      \
+-      if (TARGET_BIG_END)				\
+-        {                                               \
+-          builtin_define ("__AARCH64EB__");             \
+-          builtin_define ("__ARM_BIG_ENDIAN");          \
+-        }                                               \
+-      else						\
+-	builtin_define ("__AARCH64EL__");		\
+-							\
+-      if (TARGET_FLOAT)                                         \
+-        {                                                       \
+-          builtin_define ("__ARM_FEATURE_FMA");                 \
+-          builtin_define_with_int_value ("__ARM_FP", 0x0C);     \
+-        }                                                       \
+-      if (TARGET_SIMD)                                          \
+-        {                                                       \
+-          builtin_define ("__ARM_FEATURE_NUMERIC_MAXMIN");      \
+-          builtin_define ("__ARM_NEON");			\
+-          builtin_define_with_int_value ("__ARM_NEON_FP", 0x0C);\
+-        }                                                       \
+-							        \
+-      if (TARGET_CRC32)				        \
+-	builtin_define ("__ARM_FEATURE_CRC32");		\
+-							\
+-      switch (aarch64_cmodel)				\
+-	{						\
+-	  case AARCH64_CMODEL_TINY:			\
+-	  case AARCH64_CMODEL_TINY_PIC:			\
+-	    builtin_define ("__AARCH64_CMODEL_TINY__");	\
+-	    break;					\
+-	  case AARCH64_CMODEL_SMALL:			\
+-	  case AARCH64_CMODEL_SMALL_PIC:		\
+-	    builtin_define ("__AARCH64_CMODEL_SMALL__");\
+-	    break;					\
+-	  case AARCH64_CMODEL_LARGE:			\
+-	    builtin_define ("__AARCH64_CMODEL_LARGE__");	\
+-	    break;					\
+-	  default:					\
+-	    break;					\
+-	}						\
+-							\
+-      if (TARGET_ILP32)					\
+-	{						\
+-	  cpp_define (parse_in, "_ILP32");		\
+-	  cpp_define (parse_in, "__ILP32__");		\
+-	}						\
+-      if (TARGET_CRYPTO)				\
+-	builtin_define ("__ARM_FEATURE_CRYPTO");	\
+-    } while (0)
++#define TARGET_CPU_CPP_BUILTINS()	\
++  aarch64_cpu_cpp_builtins (pfile)
+ 
+ 
+ 
++#define REGISTER_TARGET_PRAGMAS() aarch64_register_pragmas ()
++
+ /* Target machine storage layout.  */
+ 
+ #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)	\
+@@ -200,8 +133,10 @@ extern unsigned aarch64_architecture_version;
+ #define AARCH64_FL_SIMD       (1 << 0)	/* Has SIMD instructions.  */
+ #define AARCH64_FL_FP         (1 << 1)	/* Has FP.  */
+ #define AARCH64_FL_CRYPTO     (1 << 2)	/* Has crypto.  */
+-#define AARCH64_FL_SLOWMUL    (1 << 3)	/* A slow multiply core.  */
+-#define AARCH64_FL_CRC        (1 << 4)	/* Has CRC.  */
++#define AARCH64_FL_CRC        (1 << 3)	/* Has CRC.  */
++/* ARMv8.1 architecture extensions.  */
++#define AARCH64_FL_LSE	      (1 << 4)  /* Has Large System Extensions.  */
++#define AARCH64_FL_V8_1	      (1 << 5)  /* Has ARMv8.1 extensions.  */
+ 
+ /* Has FP and SIMD.  */
+ #define AARCH64_FL_FPSIMD     (AARCH64_FL_FP | AARCH64_FL_SIMD)
+@@ -211,17 +146,17 @@ extern unsigned aarch64_architecture_version;
+ 
+ /* Architecture flags that effect instruction selection.  */
+ #define AARCH64_FL_FOR_ARCH8       (AARCH64_FL_FPSIMD)
++#define AARCH64_FL_FOR_ARCH8_1			       \
++  (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_CRC | AARCH64_FL_V8_1)
+ 
+ /* Macros to test ISA flags.  */
+-extern unsigned long aarch64_isa_flags;
++
+ #define AARCH64_ISA_CRC            (aarch64_isa_flags & AARCH64_FL_CRC)
+ #define AARCH64_ISA_CRYPTO         (aarch64_isa_flags & AARCH64_FL_CRYPTO)
+ #define AARCH64_ISA_FP             (aarch64_isa_flags & AARCH64_FL_FP)
+ #define AARCH64_ISA_SIMD           (aarch64_isa_flags & AARCH64_FL_SIMD)
+-
+-/* Macros to test tuning flags.  */
+-extern unsigned long aarch64_tune_flags;
+-#define AARCH64_TUNE_SLOWMUL       (aarch64_tune_flags & AARCH64_FL_SLOWMUL)
++#define AARCH64_ISA_LSE		   (aarch64_isa_flags & AARCH64_FL_LSE)
++#define AARCH64_ISA_RDMA	   (aarch64_isa_flags & AARCH64_FL_V8_1)
+ 
+ /* Crypto is an optional extension to AdvSIMD.  */
+ #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
+@@ -229,6 +164,40 @@ extern unsigned long aarch64_tune_flags;
+ /* CRC instructions that can be enabled through +crc arch extension.  */
+ #define TARGET_CRC32 (AARCH64_ISA_CRC)
+ 
++/* Atomic instructions that can be enabled through the +lse extension.  */
++#define TARGET_LSE (AARCH64_ISA_LSE)
++
++/* Make sure this is always defined so we don't have to check for ifdefs
++   but rather use normal ifs.  */
++#ifndef TARGET_FIX_ERR_A53_835769_DEFAULT
++#define TARGET_FIX_ERR_A53_835769_DEFAULT 0
++#else
++#undef TARGET_FIX_ERR_A53_835769_DEFAULT
++#define TARGET_FIX_ERR_A53_835769_DEFAULT 1
++#endif
++
++/* Apply the workaround for Cortex-A53 erratum 835769.  */
++#define TARGET_FIX_ERR_A53_835769	\
++  ((aarch64_fix_a53_err835769 == 2)	\
++  ? TARGET_FIX_ERR_A53_835769_DEFAULT : aarch64_fix_a53_err835769)
++
++/* Make sure this is always defined so we don't have to check for ifdefs
++   but rather use normal ifs.  */
++#ifndef TARGET_FIX_ERR_A53_843419_DEFAULT
++#define TARGET_FIX_ERR_A53_843419_DEFAULT 0
++#else
++#undef TARGET_FIX_ERR_A53_843419_DEFAULT
++#define TARGET_FIX_ERR_A53_843419_DEFAULT 1
++#endif
++
++/* Apply the workaround for Cortex-A53 erratum 843419.  */
++#define TARGET_FIX_ERR_A53_843419	\
++  ((aarch64_fix_a53_err843419 == 2)	\
++  ? TARGET_FIX_ERR_A53_843419_DEFAULT : aarch64_fix_a53_err843419)
++
++/* ARMv8.1 Adv.SIMD support.  */
++#define TARGET_SIMD_RDMA (TARGET_SIMD && AARCH64_ISA_RDMA)
++
+ /* Standard register usage.  */
+ 
+ /* 31 64-bit general purpose registers R0-R30:
+@@ -418,6 +387,10 @@ extern unsigned long aarch64_tune_flags;
+ #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
+   aarch64_asm_preferred_eh_data_format ((CODE), (GLOBAL))
+ 
++/* Output the assembly strings we want to add to a function definition.  */
++#define ASM_DECLARE_FUNCTION_NAME(STR, NAME, DECL)	\
++  aarch64_declare_function_name (STR, NAME, DECL)
++
+ /* The register that holds the return address in exception handlers.  */
+ #define AARCH64_EH_STACKADJ_REGNUM	(R0_REGNUM + 4)
+ #define EH_RETURN_STACKADJ_RTX	gen_rtx_REG (Pmode, AARCH64_EH_STACKADJ_REGNUM)
+@@ -508,7 +481,7 @@ enum reg_class
+ 
+ enum target_cpus
+ {
+-#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS) \
++#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
+   TARGET_CPU_##INTERNAL_IDENT,
+ #include "aarch64-cores.def"
+ #undef AARCH64_CORE
+@@ -825,7 +798,8 @@ do {									     \
+ #define TRAMPOLINE_SECTION text_section
+ 
+ /* To start with.  */
+-#define BRANCH_COST(SPEED_P, PREDICTABLE_P) 2
++#define BRANCH_COST(SPEED_P, PREDICTABLE_P) \
++  (aarch64_branch_cost (SPEED_P, PREDICTABLE_P))
+ 
+ 
+ /* Assembly output.  */
+@@ -897,6 +871,9 @@ do {									     \
+ #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \
+ 		(FP_REGNUM_P (REGNO) && GET_MODE_SIZE (MODE) > 8)
+ 
++#undef SWITCHABLE_TARGET
++#define SWITCHABLE_TARGET 1
++
+ /* Check TLS Descriptors mechanism is selected.  */
+ #define TARGET_TLS_DESC (aarch64_tls_dialect == TLS_DESCRIPTORS)
+ 
+@@ -912,10 +889,17 @@ extern enum aarch64_code_model aarch64_cmodel;
+   (aarch64_cmodel == AARCH64_CMODEL_TINY		\
+    || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC)
+ 
++/* Modes valid for AdvSIMD D registers, i.e. that fit in half a Q register.  */
++#define AARCH64_VALID_SIMD_DREG_MODE(MODE) \
++  ((MODE) == V2SImode || (MODE) == V4HImode || (MODE) == V8QImode \
++   || (MODE) == V2SFmode || (MODE) == V4HFmode || (MODE) == DImode \
++   || (MODE) == DFmode)
++
+ /* Modes valid for AdvSIMD Q registers.  */
+ #define AARCH64_VALID_SIMD_QREG_MODE(MODE) \
+   ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
+-   || (MODE) == V4SFmode || (MODE) == V2DImode || mode == V2DFmode)
++   || (MODE) == V4SFmode || (MODE) == V8HFmode || (MODE) == V2DImode \
++   || (MODE) == V2DFmode)
+ 
+ #define ENDIAN_LANE_N(mode, n)  \
+   (BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (mode) - 1 - n : n)
+@@ -927,17 +911,30 @@ extern enum aarch64_code_model aarch64_cmodel;
+   {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" },	\
+   {"cpu",  "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" },
+ 
+-#define BIG_LITTLE_SPEC \
+-   " %{mcpu=*:-mcpu=%:rewrite_mcpu(%{mcpu=*:%*})}"
++#define MCPU_TO_MARCH_SPEC \
++   " %{mcpu=*:-march=%:rewrite_mcpu(%{mcpu=*:%*})}"
+ 
+ extern const char *aarch64_rewrite_mcpu (int argc, const char **argv);
+-#define BIG_LITTLE_CPU_SPEC_FUNCTIONS \
++#define MCPU_TO_MARCH_SPEC_FUNCTIONS \
+   { "rewrite_mcpu", aarch64_rewrite_mcpu },
+ 
+-#define ASM_CPU_SPEC \
+-   BIG_LITTLE_SPEC
++#if defined(__aarch64__)
++extern const char *host_detect_local_cpu (int argc, const char **argv);
++# define EXTRA_SPEC_FUNCTIONS						\
++  { "local_cpu_detect", host_detect_local_cpu },			\
++  MCPU_TO_MARCH_SPEC_FUNCTIONS
+ 
+-#define EXTRA_SPEC_FUNCTIONS BIG_LITTLE_CPU_SPEC_FUNCTIONS
++# define MCPU_MTUNE_NATIVE_SPECS					\
++   " %{march=native:%<march=native %:local_cpu_detect(arch)}"		\
++   " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}"		\
++   " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}"
++#else
++# define MCPU_MTUNE_NATIVE_SPECS ""
++# define EXTRA_SPEC_FUNCTIONS MCPU_TO_MARCH_SPEC_FUNCTIONS
++#endif
++
++#define ASM_CPU_SPEC \
++   MCPU_TO_MARCH_SPEC
+ 
+ #define EXTRA_SPECS						\
+   { "asm_cpu_spec",		ASM_CPU_SPEC }
+--- a/src/gcc/config/aarch64/aarch64.md
++++ b/src/gcc/config/aarch64/aarch64.md
+@@ -87,8 +87,10 @@
+     UNSPEC_FRINTX
+     UNSPEC_FRINTZ
+     UNSPEC_GOTSMALLPIC
++    UNSPEC_GOTSMALLPIC28K
+     UNSPEC_GOTSMALLTLS
+     UNSPEC_GOTTINYPIC
++    UNSPEC_GOTTINYTLS
+     UNSPEC_LD1
+     UNSPEC_LD2
+     UNSPEC_LD2_DUP
+@@ -116,6 +118,10 @@
+     UNSPEC_ST4_LANE
+     UNSPEC_TLS
+     UNSPEC_TLSDESC
++    UNSPEC_TLSLE12
++    UNSPEC_TLSLE24
++    UNSPEC_TLSLE32
++    UNSPEC_TLSLE48
+     UNSPEC_USHL_2S
+     UNSPEC_VSTRUCTDUMMY
+     UNSPEC_SP_SET
+@@ -179,6 +185,17 @@
+ 	     (const_string "no")
+ 	] (const_string "yes")))
+ 
++;; Attribute that specifies whether we are dealing with a branch to a
++;; label that is far away, i.e. further away than the maximum/minimum
++;; representable in a signed 21-bits number.
++;; 0 :=: no
++;; 1 :=: yes
++(define_attr "far_branch" "" (const_int 0))
++
++;; Strictly for compatibility with AArch32 in pipeline models, since AArch64 has
++;; no predicated insns.
++(define_attr "predicated" "yes,no" (const_string "no"))
++
+ ;; -------------------------------------------------------------------
+ ;; Pipeline descriptions and scheduling
+ ;; -------------------------------------------------------------------
+@@ -227,7 +244,7 @@
+ (define_expand "cbranch<mode>4"
+   [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+ 			    [(match_operand:GPF 1 "register_operand" "")
+-			     (match_operand:GPF 2 "aarch64_reg_or_zero" "")])
++			     (match_operand:GPF 2 "aarch64_fp_compare_operand" "")])
+ 			   (label_ref (match_operand 3 "" ""))
+ 			   (pc)))]
+   ""
+@@ -262,7 +279,7 @@
+   "aarch64_ccmp_mode_to_code (GET_MODE (operands[1])) == GET_CODE (operands[5])"
+   "@
+    ccmp\\t%<w>2, %<w>3, %k5, %m4
+-   ccmp\\t%<w>2, %<w>3, %k5, %m4
++   ccmp\\t%<w>2, %3, %k5, %m4
+    ccmn\\t%<w>2, #%n3, %k5, %m4"
+   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+ )
+@@ -300,14 +317,120 @@
+   }
+ )
+ 
+-(define_insn "*condjump"
++;; Expansion of signed mod by a power of 2 using CSNEG.
++;; For x0 % n where n is a power of 2 produce:
++;; negs   x1, x0
++;; and    x0, x0, #(n - 1)
++;; and    x1, x1, #(n - 1)
++;; csneg  x0, x0, x1, mi
++
++(define_expand "mod<mode>3"
++  [(match_operand:GPI 0 "register_operand" "")
++   (match_operand:GPI 1 "register_operand" "")
++   (match_operand:GPI 2 "const_int_operand" "")]
++  ""
++  {
++    HOST_WIDE_INT val = INTVAL (operands[2]);
++
++    if (val <= 0
++       || exact_log2 (val) <= 0
++       || !aarch64_bitmask_imm (val - 1, <MODE>mode))
++      FAIL;
++
++    rtx mask = GEN_INT (val - 1);
++
++    /* In the special case of x0 % 2 we can do the even shorter:
++	cmp    x0, xzr
++	and    x0, x0, 1
++	cneg   x0, x0, lt.  */
++    if (val == 2)
++      {
++	rtx masked = gen_reg_rtx (<MODE>mode);
++	rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
++	emit_insn (gen_and<mode>3 (masked, operands[1], mask));
++	rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
++	emit_insn (gen_csneg3<mode>_insn (operands[0], x, masked, masked));
++	DONE;
++      }
++
++    rtx neg_op = gen_reg_rtx (<MODE>mode);
++    rtx_insn *insn = emit_insn (gen_neg<mode>2_compare0 (neg_op, operands[1]));
++
++    /* Extract the condition register and mode.  */
++    rtx cmp = XVECEXP (PATTERN (insn), 0, 0);
++    rtx cc_reg = SET_DEST (cmp);
++    rtx cond = gen_rtx_GE (VOIDmode, cc_reg, const0_rtx);
++
++    rtx masked_pos = gen_reg_rtx (<MODE>mode);
++    emit_insn (gen_and<mode>3 (masked_pos, operands[1], mask));
++
++    rtx masked_neg = gen_reg_rtx (<MODE>mode);
++    emit_insn (gen_and<mode>3 (masked_neg, neg_op, mask));
++
++    emit_insn (gen_csneg3<mode>_insn (operands[0], cond,
++				       masked_neg, masked_pos));
++    DONE;
++  }
++)
++
++(define_insn "condjump"
+   [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator"
+ 			    [(match_operand 1 "cc_register" "") (const_int 0)])
+ 			   (label_ref (match_operand 2 "" ""))
+ 			   (pc)))]
+   ""
+-  "b%m0\\t%l2"
+-  [(set_attr "type" "branch")]
++  {
++    if (get_attr_length (insn) == 8)
++      return aarch64_gen_far_branch (operands, 2, "Lbcond", "b%M0\\t");
++    else
++      return  "b%m0\\t%l2";
++  }
++  [(set_attr "type" "branch")
++   (set (attr "length")
++	(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 2) (pc)) (const_int 1048572)))
++		      (const_int 4)
++		      (const_int 8)))
++   (set (attr "far_branch")
++	(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 2) (pc)) (const_int 1048572)))
++		      (const_int 0)
++		      (const_int 1)))]
++)
++
++;; For a 24-bit immediate CST we can optimize the compare for equality
++;; and branch sequence from:
++;; 	mov	x0, #imm1
++;; 	movk	x0, #imm2, lsl 16 /* x0 contains CST.  */
++;; 	cmp	x1, x0
++;; 	b<ne,eq> .Label
++;; into the shorter:
++;; 	sub	x0, x1, #(CST & 0xfff000)
++;; 	subs	x0, x0, #(CST & 0x000fff)
++;; 	b<ne,eq> .Label
++(define_insn_and_split "*compare_condjump<mode>"
++  [(set (pc) (if_then_else (EQL
++			      (match_operand:GPI 0 "register_operand" "r")
++			      (match_operand:GPI 1 "aarch64_imm24" "n"))
++			   (label_ref:P (match_operand 2 "" ""))
++			   (pc)))]
++  "!aarch64_move_imm (INTVAL (operands[1]), <MODE>mode)
++   && !aarch64_plus_operand (operands[1], <MODE>mode)
++   && !reload_completed"
++  "#"
++  "&& true"
++  [(const_int 0)]
++  {
++    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
++    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
++    rtx tmp = gen_reg_rtx (<MODE>mode);
++    emit_insn (gen_add<mode>3 (tmp, operands[0], GEN_INT (-hi_imm)));
++    emit_insn (gen_add<mode>3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
++    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
++    rtx cmp_rtx = gen_rtx_fmt_ee (<EQL:CMP>, <MODE>mode, cc_reg, const0_rtx);
++    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
++    DONE;
++  }
+ )
+ 
+ (define_expand "casesi"
+@@ -486,9 +609,23 @@
+ 			   (label_ref (match_operand 1 "" ""))
+ 			   (pc)))]
+   ""
+-  "<cbz>\\t%<w>0, %l1"
+-  [(set_attr "type" "branch")]
+-
++  {
++    if (get_attr_length (insn) == 8)
++      return aarch64_gen_far_branch (operands, 1, "Lcb", "<inv_cb>\\t%<w>0, ");
++    else
++      return "<cbz>\\t%<w>0, %l1";
++  }
++  [(set_attr "type" "branch")
++   (set (attr "length")
++	(if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 1) (pc)) (const_int 1048572)))
++		      (const_int 4)
++		      (const_int 8)))
++   (set (attr "far_branch")
++	(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 2) (pc)) (const_int 1048572)))
++		      (const_int 0)
++		      (const_int 1)))]
+ )
+ 
+ (define_insn "*tb<optab><mode>1"
+@@ -504,8 +641,14 @@
+   {
+     if (get_attr_length (insn) == 8)
+       {
+-	operands[1] = GEN_INT (HOST_WIDE_INT_1U << UINTVAL (operands[1]));
+-	return "tst\t%<w>0, %1\;<bcond>\t%l2";
++	if (get_attr_far_branch (insn) == 1)
++	  return aarch64_gen_far_branch (operands, 2, "Ltb",
++					 "<inv_tb>\\t%<w>0, %1, ");
++	else
++	  {
++	    operands[1] = GEN_INT (HOST_WIDE_INT_1U << UINTVAL (operands[1]));
++	    return "tst\t%<w>0, %1\;<bcond>\t%l2";
++	  }
+       }
+     else
+       return "<tbz>\t%<w>0, %1, %l2";
+@@ -515,7 +658,13 @@
+ 	(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -32768))
+ 			   (lt (minus (match_dup 2) (pc)) (const_int 32764)))
+ 		      (const_int 4)
+-		      (const_int 8)))]
++		      (const_int 8)))
++   (set (attr "far_branch")
++	(if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 2) (pc)) (const_int 1048572)))
++		      (const_int 0)
++		      (const_int 1)))]
++
+ )
+ 
+ (define_insn "*cb<optab><mode>1"
+@@ -528,12 +677,18 @@
+   {
+     if (get_attr_length (insn) == 8)
+       {
+-	char buf[64];
+-	uint64_t val = ((uint64_t ) 1)
+-			<< (GET_MODE_SIZE (<MODE>mode) * BITS_PER_UNIT - 1);
+-	sprintf (buf, "tst\t%%<w>0, %"PRId64, val);
+-	output_asm_insn (buf, operands);
+-	return "<bcond>\t%l1";
++	if (get_attr_far_branch (insn) == 1)
++	  return aarch64_gen_far_branch (operands, 1, "Ltb",
++					 "<inv_tb>\\t%<w>0, <sizem1>, ");
++	else
++	  {
++	    char buf[64];
++	    uint64_t val = ((uint64_t) 1)
++		<< (GET_MODE_SIZE (<MODE>mode) * BITS_PER_UNIT - 1);
++	    sprintf (buf, "tst\t%%<w>0, %" PRId64, val);
++	    output_asm_insn (buf, operands);
++	    return "<bcond>\t%l1";
++	  }
+       }
+     else
+       return "<tbz>\t%<w>0, <sizem1>, %l1";
+@@ -543,7 +698,12 @@
+ 	(if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -32768))
+ 			   (lt (minus (match_dup 1) (pc)) (const_int 32764)))
+ 		      (const_int 4)
+-		      (const_int 8)))]
++		      (const_int 8)))
++   (set (attr "far_branch")
++	(if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -1048576))
++			   (lt (minus (match_dup 1) (pc)) (const_int 1048572)))
++		      (const_int 0)
++		      (const_int 1)))]
+ )
+ 
+ ;; -------------------------------------------------------------------
+@@ -601,7 +761,8 @@
+    (use (match_operand 2 "" ""))
+    (clobber (reg:DI LR_REGNUM))]
+   "GET_CODE (operands[0]) == SYMBOL_REF
+-   && !aarch64_is_long_call_p (operands[0])"
++   && !aarch64_is_long_call_p (operands[0])
++   && !aarch64_is_noplt_call_p (operands[0])"
+   "bl\\t%a0"
+   [(set_attr "type" "call")]
+ )
+@@ -663,7 +824,8 @@
+    (use (match_operand 3 "" ""))
+    (clobber (reg:DI LR_REGNUM))]
+   "GET_CODE (operands[1]) == SYMBOL_REF
+-   && !aarch64_is_long_call_p (operands[1])"
++   && !aarch64_is_long_call_p (operands[1])
++   && !aarch64_is_noplt_call_p (operands[1])"
+   "bl\\t%a1"
+   [(set_attr "type" "call")]
+ )
+@@ -827,7 +989,7 @@
+        gcc_unreachable ();
+      }
+ }
+-  [(set_attr "type" "mov_reg,mov_imm,mov_imm,load1,load1,store1,store1,\
++  [(set_attr "type" "mov_reg,mov_imm,neon_move,load1,load1,store1,store1,\
+                      neon_to_gp<q>,neon_from_gp<q>,neon_dup")
+    (set_attr "simd" "*,*,yes,*,*,*,*,yes,yes,yes")]
+ )
+@@ -912,7 +1074,7 @@
+        DONE;
+     }"
+   [(set_attr "type" "mov_reg,mov_reg,mov_reg,mov_imm,mov_imm,load1,load1,store1,store1,\
+-                     adr,adr,f_mcr,f_mrc,fmov,fmov")
++                     adr,adr,f_mcr,f_mrc,fmov,neon_move")
+    (set_attr "fp" "*,*,*,*,*,*,yes,*,yes,*,*,yes,yes,yes,*")
+    (set_attr "simd" "*,*,*,*,*,*,*,*,*,*,*,*,*,*,yes")]
+ )
+@@ -976,26 +1138,48 @@
+ })
+ 
+ (define_expand "mov<mode>"
+-  [(set (match_operand:GPF 0 "nonimmediate_operand" "")
+-	(match_operand:GPF 1 "general_operand" ""))]
++  [(set (match_operand:GPF_TF_F16 0 "nonimmediate_operand" "")
++	(match_operand:GPF_TF_F16 1 "general_operand" ""))]
+   ""
+-  "
++  {
+     if (!TARGET_FLOAT)
+-     {
+-	sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\");
++      {
++	aarch64_err_no_fpadvsimd (<MODE>mode, "code");
+ 	FAIL;
+-     }
++      }
+ 
+-    if (GET_CODE (operands[0]) == MEM)
++    if (GET_CODE (operands[0]) == MEM
++        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
++	      && aarch64_float_const_zero_rtx_p (operands[1])))
+       operands[1] = force_reg (<MODE>mode, operands[1]);
+-  "
++  }
++)
++
++(define_insn "*movhf_aarch64"
++  [(set (match_operand:HF 0 "nonimmediate_operand" "=w, ?r,w,w,m,r,m ,r")
++	(match_operand:HF 1 "general_operand"      "?rY, w,w,m,w,m,rY,r"))]
++  "TARGET_FLOAT && (register_operand (operands[0], HFmode)
++    || aarch64_reg_or_fp_zero (operands[1], HFmode))"
++  "@
++   mov\\t%0.h[0], %w1
++   umov\\t%w0, %1.h[0]
++   mov\\t%0.h[0], %1.h[0]
++   ldr\\t%h0, %1
++   str\\t%h1, %0
++   ldrh\\t%w0, %1
++   strh\\t%w1, %0
++   mov\\t%w0, %w1"
++  [(set_attr "type" "neon_from_gp,neon_to_gp,neon_move,\
++                     f_loads,f_stores,load1,store1,mov_reg")
++   (set_attr "simd" "yes,yes,yes,*,*,*,*,*")
++   (set_attr "fp"   "*,*,*,yes,yes,*,*,*")]
+ )
+ 
+ (define_insn "*movsf_aarch64"
+   [(set (match_operand:SF 0 "nonimmediate_operand" "=w, ?r,w,w  ,w,m,r,m ,r")
+ 	(match_operand:SF 1 "general_operand"      "?rY, w,w,Ufc,m,w,m,rY,r"))]
+   "TARGET_FLOAT && (register_operand (operands[0], SFmode)
+-    || register_operand (operands[1], SFmode))"
++    || aarch64_reg_or_fp_zero (operands[1], SFmode))"
+   "@
+    fmov\\t%s0, %w1
+    fmov\\t%w0, %s1
+@@ -1007,14 +1191,14 @@
+    str\\t%w1, %0
+    mov\\t%w0, %w1"
+   [(set_attr "type" "f_mcr,f_mrc,fmov,fconsts,\
+-                     f_loads,f_stores,f_loads,f_stores,mov_reg")]
++                     f_loads,f_stores,load1,store1,mov_reg")]
+ )
+ 
+ (define_insn "*movdf_aarch64"
+   [(set (match_operand:DF 0 "nonimmediate_operand" "=w, ?r,w,w  ,w,m,r,m ,r")
+ 	(match_operand:DF 1 "general_operand"      "?rY, w,w,Ufc,m,w,m,rY,r"))]
+   "TARGET_FLOAT && (register_operand (operands[0], DFmode)
+-    || register_operand (operands[1], DFmode))"
++    || aarch64_reg_or_fp_zero (operands[1], DFmode))"
+   "@
+    fmov\\t%d0, %x1
+    fmov\\t%x0, %d1
+@@ -1026,32 +1210,16 @@
+    str\\t%x1, %0
+    mov\\t%x0, %x1"
+   [(set_attr "type" "f_mcr,f_mrc,fmov,fconstd,\
+-                     f_loadd,f_stored,f_loadd,f_stored,mov_reg")]
+-)
+-
+-(define_expand "movtf"
+-  [(set (match_operand:TF 0 "nonimmediate_operand" "")
+-	(match_operand:TF 1 "general_operand" ""))]
+-  ""
+-  "
+-    if (!TARGET_FLOAT)
+-     {
+-	sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\");
+-	FAIL;
+-     }
+-
+-    if (GET_CODE (operands[0]) == MEM)
+-      operands[1] = force_reg (TFmode, operands[1]);
+-  "
++                     f_loadd,f_stored,load1,store1,mov_reg")]
+ )
+ 
+ (define_insn "*movtf_aarch64"
+   [(set (match_operand:TF 0
+-	 "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump")
++	 "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump,Ump")
+ 	(match_operand:TF 1
+-	 "general_operand"      " w,?r, ?r,w ,Y,Y ,m,w,Ump,?rY"))]
++	 "general_operand"      " w,?r, ?r,w ,Y,Y ,m,w,Ump,?r ,Y"))]
+   "TARGET_FLOAT && (register_operand (operands[0], TFmode)
+-    || register_operand (operands[1], TFmode))"
++    || aarch64_reg_or_fp_zero (operands[1], TFmode))"
+   "@
+    orr\\t%0.16b, %1.16b, %1.16b
+    #
+@@ -1062,12 +1230,13 @@
+    ldr\\t%q0, %1
+    str\\t%q1, %0
+    ldp\\t%0, %H0, %1
+-   stp\\t%1, %H1, %0"
+-  [(set_attr "type" "logic_reg,multiple,f_mcr,f_mrc,fconstd,fconstd,\
+-                     f_loadd,f_stored,neon_load1_2reg,neon_store1_2reg")
+-   (set_attr "length" "4,8,8,8,4,4,4,4,4,4")
+-   (set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*")
+-   (set_attr "simd" "yes,*,*,*,yes,*,*,*,*,*")]
++   stp\\t%1, %H1, %0
++   stp\\txzr, xzr, %0"
++  [(set_attr "type" "logic_reg,multiple,f_mcr,f_mrc,neon_move_q,f_mcr,\
++                     f_loadd,f_stored,load2,store2,store2")
++   (set_attr "length" "4,8,8,8,4,4,4,4,4,4,4")
++   (set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*,*")
++   (set_attr "simd" "yes,*,*,*,yes,*,*,*,*,*,*")]
+ )
+ 
+ (define_split
+@@ -1206,9 +1375,9 @@
+ ;; fairly lax checking on the second memory operation.
+ (define_insn "store_pairsf"
+   [(set (match_operand:SF 0 "aarch64_mem_pair_operand" "=Ump,Ump")
+-	(match_operand:SF 1 "register_operand" "w,*r"))
++	(match_operand:SF 1 "aarch64_reg_or_fp_zero" "w,*rY"))
+    (set (match_operand:SF 2 "memory_operand" "=m,m")
+-	(match_operand:SF 3 "register_operand" "w,*r"))]
++	(match_operand:SF 3 "aarch64_reg_or_fp_zero" "w,*rY"))]
+   "rtx_equal_p (XEXP (operands[2], 0),
+ 		plus_constant (Pmode,
+ 			       XEXP (operands[0], 0),
+@@ -1222,9 +1391,9 @@
+ 
+ (define_insn "store_pairdf"
+   [(set (match_operand:DF 0 "aarch64_mem_pair_operand" "=Ump,Ump")
+-	(match_operand:DF 1 "register_operand" "w,*r"))
++	(match_operand:DF 1 "aarch64_reg_or_fp_zero" "w,*rY"))
+    (set (match_operand:DF 2 "memory_operand" "=m,m")
+-	(match_operand:DF 3 "register_operand" "w,*r"))]
++	(match_operand:DF 3 "aarch64_reg_or_fp_zero" "w,*rY"))]
+   "rtx_equal_p (XEXP (operands[2], 0),
+ 		plus_constant (Pmode,
+ 			       XEXP (operands[0], 0),
+@@ -1411,70 +1580,120 @@
+     (plus:GPI (match_operand:GPI 1 "register_operand" "")
+ 	      (match_operand:GPI 2 "aarch64_pluslong_operand" "")))]
+   ""
+-  "
+-  if (! aarch64_plus_operand (operands[2], VOIDmode))
++{
++  if (aarch64_pluslong_strict_immedate (operands[2], <MODE>mode))
+     {
+-      rtx subtarget = ((optimize && can_create_pseudo_p ())
+-		       ? gen_reg_rtx (<MODE>mode) : operands[0]);
+-      HOST_WIDE_INT imm = INTVAL (operands[2]);
+-
+-      if (imm < 0)
+-	imm = -(-imm & ~0xfff);
+-      else
+-        imm &= ~0xfff;
+-
+-      emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
+-      operands[1] = subtarget;
+-      operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
++      /* Give CSE the opportunity to share this constant across additions.  */
++      if (!cse_not_expected && can_create_pseudo_p ())
++        operands[2] = force_reg (<MODE>mode, operands[2]);
++
++      /* Split will refuse to operate on a modification to the stack pointer.
++	 Aid the prologue and epilogue expanders by splitting this now.  */
++      else if (reload_completed && operands[0] == stack_pointer_rtx)
++	{
++	  HOST_WIDE_INT i = INTVAL (operands[2]);
++	  HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++	  emit_insn (gen_rtx_SET (VOIDmode, operands[0],
++				  gen_rtx_PLUS (<MODE>mode, operands[1],
++						GEN_INT (i - s))));
++	  operands[1] = operands[0];
++	  operands[2] = GEN_INT (s);
++	}
+     }
+-  "
+-)
++})
+ 
+-(define_insn "*addsi3_aarch64"
++(define_insn "*add<mode>3_aarch64"
+   [(set
+-    (match_operand:SI 0 "register_operand" "=rk,rk,w,rk")
+-    (plus:SI
+-     (match_operand:SI 1 "register_operand" "%rk,rk,w,rk")
+-     (match_operand:SI 2 "aarch64_plus_operand" "I,r,w,J")))]
++    (match_operand:GPI 0 "register_operand" "=rk,rk,w,rk,r")
++    (plus:GPI
++     (match_operand:GPI 1 "register_operand" "%rk,rk,w,rk,rk")
++     (match_operand:GPI 2 "aarch64_pluslong_operand" "I,r,w,J,Upl")))]
+   ""
+   "@
+-  add\\t%w0, %w1, %2
+-  add\\t%w0, %w1, %w2
+-  add\\t%0.2s, %1.2s, %2.2s
+-  sub\\t%w0, %w1, #%n2"
+-  [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm")
+-   (set_attr "simd" "*,*,yes,*")]
++  add\\t%<w>0, %<w>1, %2
++  add\\t%<w>0, %<w>1, %<w>2
++  add\\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>
++  sub\\t%<w>0, %<w>1, #%n2
++  #"
++  [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm,multiple")
++   (set_attr "simd" "*,*,yes,*,*")]
+ )
+ 
+ ;; zero_extend version of above
+ (define_insn "*addsi3_aarch64_uxtw"
+   [(set
+-    (match_operand:DI 0 "register_operand" "=rk,rk,rk")
++    (match_operand:DI 0 "register_operand" "=rk,rk,rk,r")
+     (zero_extend:DI
+-     (plus:SI (match_operand:SI 1 "register_operand" "%rk,rk,rk")
+-              (match_operand:SI 2 "aarch64_plus_operand" "I,r,J"))))]
++     (plus:SI (match_operand:SI 1 "register_operand" "%rk,rk,rk,rk")
++              (match_operand:SI 2 "aarch64_pluslong_operand" "I,r,J,Upl"))))]
+   ""
+   "@
+   add\\t%w0, %w1, %2
+   add\\t%w0, %w1, %w2
+-  sub\\t%w0, %w1, #%n2"
+-  [(set_attr "type" "alu_imm,alu_sreg,alu_imm")]
++  sub\\t%w0, %w1, #%n2
++  #"
++  [(set_attr "type" "alu_imm,alu_sreg,alu_imm,multiple")]
+ )
+ 
+-(define_insn "*adddi3_aarch64"
+-  [(set
+-    (match_operand:DI 0 "register_operand" "=rk,rk,rk,w")
+-    (plus:DI
+-     (match_operand:DI 1 "register_operand" "%rk,rk,rk,w")
+-     (match_operand:DI 2 "aarch64_plus_operand" "I,r,J,w")))]
+-  ""
+-  "@
+-  add\\t%x0, %x1, %2
+-  add\\t%x0, %x1, %x2
+-  sub\\t%x0, %x1, #%n2
+-  add\\t%d0, %d1, %d2"
+-  [(set_attr "type" "alu_imm,alu_sreg,alu_imm,neon_add")
+-   (set_attr "simd" "*,*,*,yes")]
++;; If there's a free register, and we can load the constant with a
++;; single instruction, do so.  This has a chance to improve scheduling.
++(define_peephole2
++  [(match_scratch:GPI 3 "r")
++   (set (match_operand:GPI 0 "register_operand")
++	(plus:GPI
++	  (match_operand:GPI 1 "register_operand")
++	  (match_operand:GPI 2 "aarch64_pluslong_strict_immedate")))]
++  "aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)"
++  [(set (match_dup 3) (match_dup 2))
++   (set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3)))]
++)
++
++(define_peephole2
++  [(match_scratch:SI 3 "r")
++   (set (match_operand:DI 0 "register_operand")
++	(zero_extend:DI
++	  (plus:SI
++	    (match_operand:SI 1 "register_operand")
++	    (match_operand:SI 2 "aarch64_pluslong_strict_immedate"))))]
++  "aarch64_move_imm (INTVAL (operands[2]), SImode)"
++  [(set (match_dup 3) (match_dup 2))
++   (set (match_dup 0) (zero_extend:DI (plus:SI (match_dup 1) (match_dup 3))))]
++)
++
++;; After peephole2 has had a chance to run, split any remaining long
++;; additions into two add immediates.
++(define_split
++  [(set (match_operand:GPI 0 "register_operand")
++	(plus:GPI
++	  (match_operand:GPI 1 "register_operand")
++	  (match_operand:GPI 2 "aarch64_pluslong_strict_immedate")))]
++  "epilogue_completed"
++  [(set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3)))
++   (set (match_dup 0) (plus:GPI (match_dup 0) (match_dup 4)))]
++  {
++    HOST_WIDE_INT i = INTVAL (operands[2]);
++    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++    operands[3] = GEN_INT (i - s);
++    operands[4] = GEN_INT (s);
++  }
++)
++
++(define_split
++  [(set (match_operand:DI 0 "register_operand")
++	(zero_extend:DI
++	  (plus:SI
++	    (match_operand:SI 1 "register_operand")
++	    (match_operand:SI 2 "aarch64_pluslong_strict_immedate"))))]
++  "epilogue_completed"
++  [(set (match_dup 5) (plus:SI (match_dup 1) (match_dup 3)))
++   (set (match_dup 0) (zero_extend:DI (plus:SI (match_dup 5) (match_dup 4))))]
++  {
++    HOST_WIDE_INT i = INTVAL (operands[2]);
++    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++    operands[3] = GEN_INT (i - s);
++    operands[4] = GEN_INT (s);
++    operands[5] = gen_lowpart (SImode, operands[0]);
++  }
+ )
+ 
+ (define_expand "addti3"
+@@ -1507,7 +1726,7 @@
+   ""
+   "@
+   adds\\t%<w>0, %<w>1, %<w>2
+-  adds\\t%<w>0, %<w>1, %<w>2
++  adds\\t%<w>0, %<w>1, %2
+   subs\\t%<w>0, %<w>1, #%n2"
+   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+ )
+@@ -1524,7 +1743,7 @@
+   ""
+   "@
+   adds\\t%w0, %w1, %w2
+-  adds\\t%w0, %w1, %w2
++  adds\\t%w0, %w1, %2
+   subs\\t%w0, %w1, #%n2"
+   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+ )
+@@ -1594,6 +1813,38 @@
+   [(set_attr "type" "alus_sreg")]
+ )
+ 
++(define_insn "*adds_shift_imm_<mode>"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (plus:GPI (ASHIFT:GPI 
++		    (match_operand:GPI 1 "register_operand" "r")
++		    (match_operand:QI 2 "aarch64_shift_imm_<mode>" "n"))
++		   (match_operand:GPI 3 "register_operand" "r"))
++	 (const_int 0)))
++   (set (match_operand:GPI 0 "register_operand" "=r")
++	(plus:GPI (ASHIFT:GPI (match_dup 1) (match_dup 2))
++		  (match_dup 3)))]
++  ""
++  "adds\\t%<w>0, %<w>3, %<w>1, <shift> %2"
++  [(set_attr "type" "alus_shift_imm")]
++)
++
++(define_insn "*subs_shift_imm_<mode>"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (minus:GPI (match_operand:GPI 1 "register_operand" "r")
++		    (ASHIFT:GPI
++		     (match_operand:GPI 2 "register_operand" "r")
++		     (match_operand:QI 3 "aarch64_shift_imm_<mode>" "n")))
++	 (const_int 0)))
++   (set (match_operand:GPI 0 "register_operand" "=r")
++	(minus:GPI (match_dup 1)
++		   (ASHIFT:GPI (match_dup 2) (match_dup 3))))]
++  ""
++  "subs\\t%<w>0, %<w>1, %<w>2, <shift> %3"
++  [(set_attr "type" "alus_shift_imm")]
++)
++
+ (define_insn "*adds_mul_imm_<mode>"
+   [(set (reg:CC_NZ CC_REGNUM)
+ 	(compare:CC_NZ
+@@ -1654,6 +1905,42 @@
+   [(set_attr "type" "alus_ext")]
+ )
+ 
++(define_insn "*adds_<optab><ALLX:mode>_shift_<GPI:mode>"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (plus:GPI (ashift:GPI 
++		    (ANY_EXTEND:GPI 
++		     (match_operand:ALLX 1 "register_operand" "r"))
++		    (match_operand 2 "aarch64_imm3" "Ui3"))
++		   (match_operand:GPI 3 "register_operand" "r"))
++	 (const_int 0)))
++   (set (match_operand:GPI 0 "register_operand" "=rk")
++	(plus:GPI (ashift:GPI (ANY_EXTEND:GPI (match_dup 1))
++			      (match_dup 2))
++		  (match_dup 3)))]
++  ""
++  "adds\\t%<GPI:w>0, %<GPI:w>3, %<GPI:w>1, <su>xt<ALLX:size> %2"
++  [(set_attr "type" "alus_ext")]
++)
++
++(define_insn "*subs_<optab><ALLX:mode>_shift_<GPI:mode>"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (minus:GPI (match_operand:GPI 1 "register_operand" "r")
++		    (ashift:GPI 
++		     (ANY_EXTEND:GPI
++		      (match_operand:ALLX 2 "register_operand" "r"))
++		     (match_operand 3 "aarch64_imm3" "Ui3")))
++	 (const_int 0)))
++   (set (match_operand:GPI 0 "register_operand" "=rk")
++	(minus:GPI (match_dup 1)
++		   (ashift:GPI (ANY_EXTEND:GPI (match_dup 2))
++			       (match_dup 3))))]
++  ""
++  "subs\\t%<GPI:w>0, %<GPI:w>1, %<GPI:w>2, <su>xt<ALLX:size> %3"
++  [(set_attr "type" "alus_ext")]
++)
++
+ (define_insn "*adds_<optab><mode>_multp2"
+   [(set (reg:CC_NZ CC_REGNUM)
+ 	(compare:CC_NZ
+@@ -1703,7 +1990,7 @@
+   ""
+   "@
+   cmn\\t%<w>0, %<w>1
+-  cmn\\t%<w>0, %<w>1
++  cmn\\t%<w>0, %1
+   cmp\\t%<w>0, #%n1"
+   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+ )
+@@ -1885,6 +2172,38 @@
+   [(set_attr "type" "adc_reg")]
+ )
+ 
++(define_insn "*add_uxt<mode>_shift2"
++  [(set (match_operand:GPI 0 "register_operand" "=rk")
++	(plus:GPI (and:GPI
++		   (ashift:GPI (match_operand:GPI 1 "register_operand" "r")
++			       (match_operand 2 "aarch64_imm3" "Ui3"))
++		   (match_operand 3 "const_int_operand" "n"))
++		  (match_operand:GPI 4 "register_operand" "r")))]
++  "aarch64_uxt_size (INTVAL (operands[2]), INTVAL (operands[3])) != 0"
++  "*
++  operands[3] = GEN_INT (aarch64_uxt_size (INTVAL(operands[2]),
++					   INTVAL (operands[3])));
++  return \"add\t%<w>0, %<w>4, %<w>1, uxt%e3 %2\";"
++  [(set_attr "type" "alu_ext")]
++)
++
++;; zero_extend version of above
++(define_insn "*add_uxtsi_shift2_uxtw"
++  [(set (match_operand:DI 0 "register_operand" "=rk")
++	(zero_extend:DI
++	 (plus:SI (and:SI
++		   (ashift:SI (match_operand:SI 1 "register_operand" "r")
++			      (match_operand 2 "aarch64_imm3" "Ui3"))
++		   (match_operand 3 "const_int_operand" "n"))
++		  (match_operand:SI 4 "register_operand" "r"))))]
++  "aarch64_uxt_size (INTVAL (operands[2]), INTVAL (operands[3])) != 0"
++  "*
++  operands[3] = GEN_INT (aarch64_uxt_size (INTVAL (operands[2]),
++					   INTVAL (operands[3])));
++  return \"add\t%w0, %w4, %w1, uxt%e3 %2\";"
++  [(set_attr "type" "alu_ext")]
++)
++
+ (define_insn "*add_uxt<mode>_multp2"
+   [(set (match_operand:GPI 0 "register_operand" "=rk")
+ 	(plus:GPI (and:GPI
+@@ -2220,6 +2539,38 @@
+   [(set_attr "type" "adc_reg")]
+ )
+ 
++(define_insn "*sub_uxt<mode>_shift2"
++  [(set (match_operand:GPI 0 "register_operand" "=rk")
++	(minus:GPI (match_operand:GPI 4 "register_operand" "rk")
++		   (and:GPI
++		    (ashift:GPI (match_operand:GPI 1 "register_operand" "r")
++				(match_operand 2 "aarch64_imm3" "Ui3"))
++		    (match_operand 3 "const_int_operand" "n"))))]
++  "aarch64_uxt_size (INTVAL (operands[2]),INTVAL (operands[3])) != 0"
++  "*
++  operands[3] = GEN_INT (aarch64_uxt_size (INTVAL (operands[2]),
++					   INTVAL (operands[3])));
++  return \"sub\t%<w>0, %<w>4, %<w>1, uxt%e3 %2\";"
++  [(set_attr "type" "alu_ext")]
++)
++
++;; zero_extend version of above
++(define_insn "*sub_uxtsi_shift2_uxtw"
++  [(set (match_operand:DI 0 "register_operand" "=rk")
++	(zero_extend:DI
++	 (minus:SI (match_operand:SI 4 "register_operand" "rk")
++		   (and:SI
++		    (ashift:SI (match_operand:SI 1 "register_operand" "r")
++			       (match_operand 2 "aarch64_imm3" "Ui3"))
++		    (match_operand 3 "const_int_operand" "n")))))]
++  "aarch64_uxt_size (INTVAL (operands[2]),INTVAL (operands[3])) != 0"
++  "*
++  operands[3] = GEN_INT (aarch64_uxt_size (INTVAL (operands[2]),
++					   INTVAL (operands[3])));
++  return \"sub\t%w0, %w4, %w1, uxt%e3 %2\";"
++  [(set_attr "type" "alu_ext")]
++)
++
+ (define_insn "*sub_uxt<mode>_multp2"
+   [(set (match_operand:GPI 0 "register_operand" "=rk")
+ 	(minus:GPI (match_operand:GPI 4 "register_operand" "rk")
+@@ -2252,35 +2603,16 @@
+   [(set_attr "type" "alu_ext")]
+ )
+ 
+-(define_insn_and_split "absdi2"
+-  [(set (match_operand:DI 0 "register_operand" "=&r,w")
+-	(abs:DI (match_operand:DI 1 "register_operand" "r,w")))]
++(define_expand "abs<mode>2"
++  [(match_operand:GPI 0 "register_operand" "")
++   (match_operand:GPI 1 "register_operand" "")]
+   ""
+-  "@
+-   #
+-   abs\\t%d0, %d1"
+-  "reload_completed
+-   && GP_REGNUM_P (REGNO (operands[0]))
+-   && GP_REGNUM_P (REGNO (operands[1]))"
+-  [(const_int 0)]
+   {
+-    emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-			    gen_rtx_XOR (DImode,
+-					 gen_rtx_ASHIFTRT (DImode,
+-							   operands[1],
+-							   GEN_INT (63)),
+-					 operands[1])));
+-    emit_insn (gen_rtx_SET (VOIDmode,
+-			    operands[0],
+-			    gen_rtx_MINUS (DImode,
+-					   operands[0],
+-					   gen_rtx_ASHIFTRT (DImode,
+-							     operands[1],
+-							     GEN_INT (63)))));
++    rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
++    rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
++    emit_insn (gen_csneg3<mode>_insn (operands[0], x, operands[1], operands[1]));
+     DONE;
+   }
+-  [(set_attr "type" "alu_sreg")
+-   (set_attr "simd" "no,yes")]
+ )
+ 
+ (define_insn "neg<mode>2"
+@@ -2324,7 +2656,7 @@
+   [(set_attr "type" "adc_reg")]
+ )
+ 
+-(define_insn "*neg<mode>2_compare0"
++(define_insn "neg<mode>2_compare0"
+   [(set (reg:CC_NZ CC_REGNUM)
+ 	(compare:CC_NZ (neg:GPI (match_operand:GPI 1 "register_operand" "r"))
+ 		       (const_int 0)))
+@@ -2621,7 +2953,7 @@
+   ""
+   "@
+    cmp\\t%<w>0, %<w>1
+-   cmp\\t%<w>0, %<w>1
++   cmp\\t%<w>0, %1
+    cmn\\t%<w>0, #%n1"
+   [(set_attr "type" "alus_sreg,alus_imm,alus_imm")]
+ )
+@@ -2714,7 +3046,7 @@
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(match_operator:SI 1 "aarch64_comparison_operator"
+ 	 [(match_operand:GPF 2 "register_operand" "")
+-	  (match_operand:GPF 3 "register_operand" "")]))]
++	  (match_operand:GPF 3 "aarch64_fp_compare_operand" "")]))]
+   ""
+   "
+   operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
+@@ -2723,7 +3055,7 @@
+   "
+ )
+ 
+-(define_insn "*cstore<mode>_insn"
++(define_insn "aarch64_cstore<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=r")
+ 	(match_operator:ALLI 1 "aarch64_comparison_operator"
+ 	 [(match_operand 2 "cc_register" "") (const_int 0)]))]
+@@ -2732,6 +3064,40 @@
+   [(set_attr "type" "csel")]
+ )
+ 
++;; For a 24-bit immediate CST we can optimize the compare for equality
++;; and branch sequence from:
++;; 	mov	x0, #imm1
++;; 	movk	x0, #imm2, lsl 16 /* x0 contains CST.  */
++;; 	cmp	x1, x0
++;; 	cset	x2, <ne,eq>
++;; into the shorter:
++;; 	sub	x0, x1, #(CST & 0xfff000)
++;; 	subs	x0, x0, #(CST & 0x000fff)
++;; 	cset x2, <ne, eq>.
++(define_insn_and_split "*compare_cstore<mode>_insn"
++  [(set (match_operand:GPI 0 "register_operand" "=r")
++	 (EQL:GPI (match_operand:GPI 1 "register_operand" "r")
++		  (match_operand:GPI 2 "aarch64_imm24" "n")))]
++  "!aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)
++   && !aarch64_plus_operand (operands[2], <MODE>mode)
++   && !reload_completed"
++  "#"
++  "&& true"
++  [(const_int 0)]
++  {
++    HOST_WIDE_INT lo_imm = UINTVAL (operands[2]) & 0xfff;
++    HOST_WIDE_INT hi_imm = UINTVAL (operands[2]) & 0xfff000;
++    rtx tmp = gen_reg_rtx (<MODE>mode);
++    emit_insn (gen_add<mode>3 (tmp, operands[1], GEN_INT (-hi_imm)));
++    emit_insn (gen_add<mode>3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
++    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
++    rtx cmp_rtx = gen_rtx_fmt_ee (<EQL:CMP>, <MODE>mode, cc_reg, const0_rtx);
++    emit_insn (gen_aarch64_cstore<mode> (operands[0], cmp_rtx, cc_reg));
++    DONE;
++  }
++  [(set_attr "type" "csel")]
++)
++
+ ;; zero_extend version of the above
+ (define_insn "*cstoresi_insn_uxtw"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+@@ -2784,7 +3150,7 @@
+ 	(if_then_else:GPF
+ 	 (match_operator 1 "aarch64_comparison_operator"
+ 	  [(match_operand:GPF 2 "register_operand" "")
+-	   (match_operand:GPF 3 "register_operand" "")])
++	   (match_operand:GPF 3 "aarch64_fp_compare_operand" "")])
+ 	 (match_operand:GPF 4 "register_operand" "")
+ 	 (match_operand:GPF 5 "register_operand" "")))]
+   ""
+@@ -2813,7 +3179,7 @@
+    csinc\\t%<w>0, %<w>4, <w>zr, %M1
+    mov\\t%<w>0, -1
+    mov\\t%<w>0, 1"
+-  [(set_attr "type" "csel")]
++  [(set_attr "type" "csel, csel, csel, csel, csel, mov_imm, mov_imm")]
+ )
+ 
+ ;; zero_extend version of above
+@@ -2836,6 +3202,18 @@
+    csinc\\t%w0, %w4, wzr, %M1
+    mov\\t%w0, -1
+    mov\\t%w0, 1"
++  [(set_attr "type" "csel, csel, csel, csel, csel, mov_imm, mov_imm")]
++)
++
++(define_insn "*cmovdi_insn_uxtw"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(if_then_else:DI
++	 (match_operator 1 "aarch64_comparison_operator"
++	  [(match_operand 2 "cc_register" "") (const_int 0)])
++	 (zero_extend:DI (match_operand:SI 3 "register_operand" "r"))
++	 (zero_extend:DI (match_operand:SI 4 "register_operand" "r"))))]
++  ""
++  "csel\\t%w0, %w3, %w4, %m1"
+   [(set_attr "type" "csel")]
+ )
+ 
+@@ -2934,7 +3312,7 @@
+         (plus:GPI (match_operand 2 "aarch64_comparison_operation" "")
+                   (match_operand:GPI 1 "register_operand" "r")))]
+   ""
+-  "csinc\\t%<w>0, %<w>1, %<w>1, %M2"
++  "cinc\\t%<w>0, %<w>1, %m2"
+   [(set_attr "type" "csel")]
+ )
+ 
+@@ -2961,7 +3339,19 @@
+   [(set_attr "type" "csel")]
+ )
+ 
+-(define_insn "*csneg3<mode>_insn"
++(define_insn "csneg3_uxtw_insn"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	  (if_then_else:SI
++	    (match_operand 1 "aarch64_comparison_operation" "")
++	    (neg:SI (match_operand:SI 2 "register_operand" "r"))
++	    (match_operand:SI 3 "aarch64_reg_or_zero" "rZ"))))]
++  ""
++  "csneg\\t%w0, %w3, %w2, %M1"
++  [(set_attr "type" "csel")]
++)
++
++(define_insn "csneg3<mode>_insn"
+   [(set (match_operand:GPI 0 "register_operand" "=r")
+         (if_then_else:GPI
+ 	  (match_operand 1 "aarch64_comparison_operation" "")
+@@ -2983,7 +3373,7 @@
+   ""
+   "@
+   <logical>\\t%<w>0, %<w>1, %<w>2
+-  <logical>\\t%<w>0, %<w>1, %<w>2
++  <logical>\\t%<w>0, %<w>1, %2
+   <logical>\\t%0.<Vbtype>, %1.<Vbtype>, %2.<Vbtype>"
+   [(set_attr "type" "logic_reg,logic_imm,neon_logic")
+    (set_attr "simd" "*,*,yes")]
+@@ -3140,6 +3530,26 @@
+    (set_attr "simd" "*,yes")]
+ )
+ 
++(define_insn "*<NLOGICAL:optab>_one_cmplsidi3_ze"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	  (NLOGICAL:SI (not:SI (match_operand:SI 1 "register_operand" "r"))
++	               (match_operand:SI 2 "register_operand" "r"))))]
++  ""
++  "<NLOGICAL:nlogical>\\t%w0, %w2, %w1"
++  [(set_attr "type" "logic_reg")]
++)
++
++(define_insn "*xor_one_cmplsidi3_ze"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++        (zero_extend:DI
++          (not:SI (xor:SI (match_operand:SI 1 "register_operand" "r")
++                          (match_operand:SI 2 "register_operand" "r")))))]
++  ""
++  "eon\\t%w0, %w1, %w2"
++  [(set_attr "type" "logic_reg")]
++)
++
+ ;; (xor (not a) b) is simplify_rtx-ed down to (not (xor a b)).
+ ;; eon does not operate on SIMD registers so the vector variant must be split.
+ (define_insn_and_split "*xor_one_cmpl<mode>3"
+@@ -3201,7 +3611,7 @@
+   [(set_attr "type" "logics_reg")]
+ )
+ 
+-(define_insn "*<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3"
++(define_insn "<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3"
+   [(set (match_operand:GPI 0 "register_operand" "=r")
+ 	(LOGICAL:GPI (not:GPI
+ 		      (SHIFT:GPI
+@@ -3210,7 +3620,33 @@
+ 		     (match_operand:GPI 3 "register_operand" "r")))]
+   ""
+   "<LOGICAL:nlogical>\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
+-  [(set_attr "type" "logics_shift_imm")]
++  [(set_attr "type" "logic_shift_imm")]
++)
++
++(define_insn "*eor_one_cmpl_<SHIFT:optab><mode>3_alt"
++  [(set (match_operand:GPI 0 "register_operand" "=r")
++	(not:GPI (xor:GPI
++		      (SHIFT:GPI
++		       (match_operand:GPI 1 "register_operand" "r")
++		       (match_operand:QI 2 "aarch64_shift_imm_<mode>" "n"))
++		     (match_operand:GPI 3 "register_operand" "r"))))]
++  ""
++  "eon\\t%<w>0, %<w>3, %<w>1, <SHIFT:shift> %2"
++  [(set_attr "type" "logic_shift_imm")]
++)
++
++;; Zero-extend version of the above.
++(define_insn "*eor_one_cmpl_<SHIFT:optab>sidi3_alt_ze"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	  (not:SI (xor:SI
++		    (SHIFT:SI
++		      (match_operand:SI 1 "register_operand" "r")
++		      (match_operand:QI 2 "aarch64_shift_imm_si" "n"))
++		    (match_operand:SI 3 "register_operand" "r")))))]
++  ""
++  "eon\\t%w0, %w3, %w1, <SHIFT:shift> %2"
++  [(set_attr "type" "logic_shift_imm")]
+ )
+ 
+ (define_insn "*and_one_cmpl_<SHIFT:optab><mode>3_compare0"
+@@ -3314,6 +3750,16 @@
+   }
+ )
+ 
++(define_insn "*and<mode>_compare0"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (match_operand:SHORT 0 "register_operand" "r")
++	 (const_int 0)))]
++  ""
++  "tst\\t%<w>0, <short_mask>"
++  [(set_attr "type" "alus_imm")]
++)
++
+ (define_insn "*and<mode>3nr_compare0"
+   [(set (reg:CC_NZ CC_REGNUM)
+ 	(compare:CC_NZ
+@@ -3322,7 +3768,29 @@
+ 	 (const_int 0)))]
+   ""
+   "tst\\t%<w>0, %<w>1"
+-  [(set_attr "type" "logics_reg")]
++  [(set_attr "type" "logics_reg,logics_imm")]
++)
++
++(define_insn "*and<mode>3nr_compare0_zextract"
++  [(set (reg:CC_NZ CC_REGNUM)
++	(compare:CC_NZ
++	 (zero_extract:GPI (match_operand:GPI 0 "register_operand" "r")
++		  (match_operand:GPI 1 "const_int_operand" "n")
++		  (match_operand:GPI 2 "const_int_operand" "n"))
++	 (const_int 0)))]
++  "INTVAL (operands[1]) > 0
++   && ((INTVAL (operands[1]) + INTVAL (operands[2]))
++	<= GET_MODE_BITSIZE (<MODE>mode))
++   && aarch64_bitmask_imm (
++	UINTVAL (aarch64_mask_from_zextract_ops (operands[1],
++						 operands[2])),
++	<MODE>mode)"
++  {
++    operands[1]
++      = aarch64_mask_from_zextract_ops (operands[1], operands[2]);
++    return "tst\\t%<w>0, %1";
++  }
++  [(set_attr "type" "logics_shift_imm")]
+ )
+ 
+ (define_insn "*and_<SHIFT:optab><mode>3nr_compare0"
+@@ -3429,32 +3897,33 @@
+ 
+ ;; Logical left shift using SISD or Integer instruction
+ (define_insn "*aarch64_ashl_sisd_or_int_<mode>3"
+-  [(set (match_operand:GPI 0 "register_operand" "=w,w,r")
++  [(set (match_operand:GPI 0 "register_operand" "=r,w,w")
+         (ashift:GPI
+-          (match_operand:GPI 1 "register_operand" "w,w,r")
+-          (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "Us<cmode>,w,rUs<cmode>")))]
++          (match_operand:GPI 1 "register_operand" "r,w,w")
++          (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "rUs<cmode>,Us<cmode>,w")))]
+   ""
+   "@
++   lsl\t%<w>0, %<w>1, %<w>2
+    shl\t%<rtn>0<vas>, %<rtn>1<vas>, %2
+-   ushl\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>
+-   lsl\t%<w>0, %<w>1, %<w>2"
+-  [(set_attr "simd" "yes,yes,no")
+-   (set_attr "type" "neon_shift_imm<q>, neon_shift_reg<q>,shift_reg")]
++   ushl\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>"
++  [(set_attr "simd" "no,yes,yes")
++   (set_attr "type" "shift_reg,neon_shift_imm<q>, neon_shift_reg<q>")]
+ )
+ 
+ ;; Logical right shift using SISD or Integer instruction
+ (define_insn "*aarch64_lshr_sisd_or_int_<mode>3"
+-  [(set (match_operand:GPI 0 "register_operand" "=w,&w,r")
++  [(set (match_operand:GPI 0 "register_operand" "=r,w,&w,&w")
+         (lshiftrt:GPI
+-          (match_operand:GPI 1 "register_operand" "w,w,r")
+-          (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "Us<cmode>,w,rUs<cmode>")))]
++          (match_operand:GPI 1 "register_operand" "r,w,w,w")
++          (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "rUs<cmode>,Us<cmode>,w,0")))]
+   ""
+   "@
++   lsr\t%<w>0, %<w>1, %<w>2
+    ushr\t%<rtn>0<vas>, %<rtn>1<vas>, %2
+    #
+-   lsr\t%<w>0, %<w>1, %<w>2"
+-  [(set_attr "simd" "yes,yes,no")
+-   (set_attr "type" "neon_shift_imm<q>,neon_shift_reg<q>,shift_reg")]
++   #"
++  [(set_attr "simd" "no,yes,yes,yes")
++   (set_attr "type" "shift_reg,neon_shift_imm<q>,neon_shift_reg<q>,neon_shift_reg<q>")]
+ )
+ 
+ (define_split
+@@ -3489,18 +3958,18 @@
+ 
+ ;; Arithmetic right shift using SISD or Integer instruction
+ (define_insn "*aarch64_ashr_sisd_or_int_<mode>3"
+-  [(set (match_operand:GPI 0 "register_operand" "=w,&w,&w,r")
++  [(set (match_operand:GPI 0 "register_operand" "=r,w,&w,&w")
+         (ashiftrt:GPI
+-          (match_operand:GPI 1 "register_operand" "w,w,w,r")
+-          (match_operand:QI 2 "aarch64_reg_or_shift_imm_di" "Us<cmode>,w,0,rUs<cmode>")))]
++          (match_operand:GPI 1 "register_operand" "r,w,w,w")
++          (match_operand:QI 2 "aarch64_reg_or_shift_imm_di" "rUs<cmode>,Us<cmode>,w,0")))]
+   ""
+   "@
++   asr\t%<w>0, %<w>1, %<w>2
+    sshr\t%<rtn>0<vas>, %<rtn>1<vas>, %2
+    #
+-   #
+-   asr\t%<w>0, %<w>1, %<w>2"
+-  [(set_attr "simd" "yes,yes,yes,no")
+-   (set_attr "type" "neon_shift_imm<q>,neon_shift_reg<q>,neon_shift_reg<q>,shift_reg")]
++   #"
++  [(set_attr "simd" "no,yes,yes,yes")
++   (set_attr "type" "shift_reg,neon_shift_imm<q>,neon_shift_reg<q>,neon_shift_reg<q>")]
+ )
+ 
+ (define_split
+@@ -3589,13 +4058,13 @@
+ 
+ ;; Rotate right
+ (define_insn "*ror<mode>3_insn"
+-  [(set (match_operand:GPI 0 "register_operand" "=r")
+-        (rotatert:GPI
+-          (match_operand:GPI 1 "register_operand" "r")
+-          (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "rUs<cmode>")))]
++  [(set (match_operand:GPI 0 "register_operand" "=r,r")
++     (rotatert:GPI
++       (match_operand:GPI 1 "register_operand" "r,r")
++       (match_operand:QI 2 "aarch64_reg_or_shift_imm_<mode>" "r,Us<cmode>")))]
+   ""
+   "ror\\t%<w>0, %<w>1, %<w>2"
+-  [(set_attr "type" "shift_reg")]
++  [(set_attr "type" "shift_reg, rotate_imm")]
+ )
+ 
+ ;; zero_extend version of above
+@@ -3633,6 +4102,21 @@
+   [(set_attr "type" "shift_imm")]
+ )
+ 
++;; There are no canonicalisation rules for ashift and lshiftrt inside an ior
++;; so we have to match both orderings.
++(define_insn "*extr<mode>5_insn_alt"
++  [(set (match_operand:GPI 0 "register_operand" "=r")
++	(ior:GPI  (lshiftrt:GPI (match_operand:GPI 2 "register_operand" "r")
++			        (match_operand 4 "const_int_operand" "n"))
++		  (ashift:GPI (match_operand:GPI 1 "register_operand" "r")
++			      (match_operand 3 "const_int_operand" "n"))))]
++  "UINTVAL (operands[3]) < GET_MODE_BITSIZE (<MODE>mode)
++   && (UINTVAL (operands[3]) + UINTVAL (operands[4])
++       == GET_MODE_BITSIZE (<MODE>mode))"
++  "extr\\t%<w>0, %<w>1, %<w>2, %4"
++  [(set_attr "type" "shift_imm")]
++)
++
+ ;; zero_extend version of the above
+ (define_insn "*extrsi5_insn_uxtw"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+@@ -3647,6 +4131,19 @@
+   [(set_attr "type" "shift_imm")]
+ )
+ 
++(define_insn "*extrsi5_insn_uxtw_alt"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	 (ior:SI (lshiftrt:SI (match_operand:SI 2 "register_operand" "r")
++			       (match_operand 4 "const_int_operand" "n"))
++		 (ashift:SI (match_operand:SI 1 "register_operand" "r")
++			    (match_operand 3 "const_int_operand" "n")))))]
++  "UINTVAL (operands[3]) < 32 &&
++   (UINTVAL (operands[3]) + UINTVAL (operands[4]) == 32)"
++  "extr\\t%w0, %w1, %w2, %4"
++  [(set_attr "type" "shift_imm")]
++)
++
+ (define_insn "*ror<mode>3_insn"
+   [(set (match_operand:GPI 0 "register_operand" "=r")
+ 	(rotate:GPI (match_operand:GPI 1 "register_operand" "r")
+@@ -3656,7 +4153,7 @@
+   operands[3] = GEN_INT (<sizen> - UINTVAL (operands[2]));
+   return "ror\\t%<w>0, %<w>1, %3";
+ }
+-  [(set_attr "type" "shift_imm")]
++  [(set_attr "type" "rotate_imm")]
+ )
+ 
+ ;; zero_extend version of the above
+@@ -3670,7 +4167,7 @@
+   operands[3] = GEN_INT (32 - UINTVAL (operands[2]));
+   return "ror\\t%w0, %w1, %3";
+ }
+-  [(set_attr "type" "shift_imm")]
++  [(set_attr "type" "rotate_imm")]
+ )
+ 
+ (define_insn "*<ANY_EXTEND:optab><GPI:mode>_ashl<SHORT:mode>"
+@@ -3778,6 +4275,16 @@
+   [(set_attr "type" "bfm")]
+ )
+ 
++(define_insn "*aarch64_bfi<GPI:mode><ALLX:mode>4"
++  [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
++			  (match_operand 1 "const_int_operand" "n")
++			  (match_operand 2 "const_int_operand" "n"))
++	(zero_extend:GPI (match_operand:ALLX 3  "register_operand" "r")))]
++  "UINTVAL (operands[1]) <= <ALLX:sizen>"
++  "bfi\\t%<GPI:w>0, %<GPI:w>3, %2, %1"
++  [(set_attr "type" "bfm")]
++)
++
+ (define_insn "*extr_insv_lower_reg<mode>"
+   [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
+ 			  (match_operand 1 "const_int_operand" "n")
+@@ -3970,6 +4477,22 @@
+   [(set_attr "type" "f_cvt")]
+ )
+ 
++(define_insn "extendhfsf2"
++  [(set (match_operand:SF 0 "register_operand" "=w")
++        (float_extend:SF (match_operand:HF 1 "register_operand" "w")))]
++  "TARGET_FLOAT"
++  "fcvt\\t%s0, %h1"
++  [(set_attr "type" "f_cvt")]
++)
++
++(define_insn "extendhfdf2"
++  [(set (match_operand:DF 0 "register_operand" "=w")
++        (float_extend:DF (match_operand:HF 1 "register_operand" "w")))]
++  "TARGET_FLOAT"
++  "fcvt\\t%d0, %h1"
++  [(set_attr "type" "f_cvt")]
++)
++
+ (define_insn "truncdfsf2"
+   [(set (match_operand:SF 0 "register_operand" "=w")
+         (float_truncate:SF (match_operand:DF 1 "register_operand" "w")))]
+@@ -3978,6 +4501,22 @@
+   [(set_attr "type" "f_cvt")]
+ )
+ 
++(define_insn "truncsfhf2"
++  [(set (match_operand:HF 0 "register_operand" "=w")
++        (float_truncate:HF (match_operand:SF 1 "register_operand" "w")))]
++  "TARGET_FLOAT"
++  "fcvt\\t%h0, %s1"
++  [(set_attr "type" "f_cvt")]
++)
++
++(define_insn "truncdfhf2"
++  [(set (match_operand:HF 0 "register_operand" "=w")
++        (float_truncate:HF (match_operand:DF 1 "register_operand" "w")))]
++  "TARGET_FLOAT"
++  "fcvt\\t%h0, %d1"
++  [(set_attr "type" "f_cvt")]
++)
++
+ (define_insn "fix_trunc<GPF:mode><GPI:mode>2"
+   [(set (match_operand:GPI 0 "register_operand" "=r")
+         (fix:GPI (match_operand:GPF 1 "register_operand" "w")))]
+@@ -3997,7 +4536,7 @@
+ (define_insn "<optab><fcvt_target><GPF:mode>2"
+   [(set (match_operand:GPF 0 "register_operand" "=w,w")
+         (FLOATUORS:GPF (match_operand:<FCVT_TARGET> 1 "register_operand" "w,r")))]
+-  ""
++  "TARGET_FLOAT"
+   "@
+    <su_optab>cvtf\t%<GPF:s>0, %<s>1
+    <su_optab>cvtf\t%<GPF:s>0, %<w1>1"
+@@ -4124,9 +4663,81 @@
+   [(set_attr "type" "f_minmax<s>")]
+ )
+ 
++;; For copysign (x, y), we want to generate:
++;;
++;;   LDR d2, #(1 << 63)
++;;   BSL v2.8b, [y], [x]
++;;
++;; or another, equivalent, sequence using one of BSL/BIT/BIF.
++;; aarch64_simd_bsldf will select the best suited of these instructions
++;; to generate based on register allocation, and knows how to partially
++;; constant fold based on the values of X and Y, so expand through that.
++
++(define_expand "copysigndf3"
++  [(match_operand:DF 0 "register_operand")
++   (match_operand:DF 1 "register_operand")
++   (match_operand:DF 2 "register_operand")]
++  "TARGET_FLOAT && TARGET_SIMD"
++{
++  rtx mask = gen_reg_rtx (DImode);
++  emit_move_insn (mask, GEN_INT (HOST_WIDE_INT_1U << 63));
++  emit_insn (gen_aarch64_simd_bsldf (operands[0], mask,
++				     operands[2], operands[1]));
++  DONE;
++}
++)
++
++;; As above, but we must first get to a 64-bit value if we wish to use
++;; aarch64_simd_bslv2sf.
++
++(define_expand "copysignsf3"
++  [(match_operand:SF 0 "register_operand")
++   (match_operand:SF 1 "register_operand")
++   (match_operand:SF 2 "register_operand")]
++  "TARGET_FLOAT && TARGET_SIMD"
++{
++  rtx mask = gen_reg_rtx (DImode);
++
++  /* Juggle modes to get us in to a vector mode for BSL.  */
++  rtx op1 = lowpart_subreg (V2SFmode, operands[1], SFmode);
++  rtx op2 = lowpart_subreg (V2SFmode, operands[2], SFmode);
++  rtx tmp = gen_reg_rtx (V2SFmode);
++  emit_move_insn (mask, GEN_INT (HOST_WIDE_INT_1U << 31));
++  emit_insn (gen_aarch64_simd_bslv2sf (tmp, mask, op2, op1));
++  emit_move_insn (operands[0], lowpart_subreg (SFmode, tmp, V2SFmode));
++  DONE;
++}
++)
++
+ ;; -------------------------------------------------------------------
+ ;; Reload support
+ ;; -------------------------------------------------------------------
++;; Reload Scalar Floating point modes from constant pool.
++;; The AArch64 port doesn't have __int128 constant move support.
++(define_expand "aarch64_reload_movcp<GPF_TF:mode><P:mode>"
++ [(set (match_operand:GPF_TF 0 "register_operand" "=w")
++       (mem:GPF_TF (match_operand 1 "aarch64_constant_pool_symref" "S")))
++  (clobber (match_operand:P 2 "register_operand" "=&r"))]
++ "TARGET_FLOAT && aarch64_nopcrelative_literal_loads"
++ {
++   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
++   emit_move_insn (operands[0], gen_rtx_MEM (<GPF_TF:MODE>mode, operands[2]));
++   DONE;
++ }
++)
++
++;; Reload Vector modes from constant pool.
++(define_expand "aarch64_reload_movcp<VALL:mode><P:mode>"
++ [(set (match_operand:VALL 0 "register_operand" "=w")
++       (mem:VALL (match_operand 1 "aarch64_constant_pool_symref" "S")))
++  (clobber (match_operand:P 2 "register_operand" "=&r"))]
++ "TARGET_FLOAT && aarch64_nopcrelative_literal_loads"
++ {
++   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
++   emit_move_insn (operands[0], gen_rtx_MEM (<VALL:MODE>mode, operands[2]));
++   DONE;
++ }
++)
+ 
+ (define_expand "aarch64_reload_mov<mode>"
+   [(set (match_operand:TX 0 "register_operand" "=w")
+@@ -4250,6 +4861,29 @@
+   [(set_attr "type" "load1")]
+ )
+ 
++(define_insn "ldr_got_small_28k_<mode>"
++  [(set (match_operand:PTR 0 "register_operand" "=r")
++	(unspec:PTR [(mem:PTR (lo_sum:PTR
++			      (match_operand:PTR 1 "register_operand" "r")
++			      (match_operand:PTR 2 "aarch64_valid_symref" "S")))]
++		    UNSPEC_GOTSMALLPIC28K))]
++  ""
++  "ldr\\t%<w>0, [%1, #:<got_modifier>:%a2]"
++  [(set_attr "type" "load1")]
++)
++
++(define_insn "ldr_got_small_28k_sidi"
++  [(set (match_operand:DI 0 "register_operand" "=r")
++	(zero_extend:DI
++	 (unspec:SI [(mem:SI (lo_sum:DI
++			     (match_operand:DI 1 "register_operand" "r")
++			     (match_operand:DI 2 "aarch64_valid_symref" "S")))]
++		    UNSPEC_GOTSMALLPIC28K)))]
++  "TARGET_ILP32"
++  "ldr\\t%w0, [%1, #:gotpage_lo14:%a2]"
++  [(set_attr "type" "load1")]
++)
++
+ (define_insn "ldr_got_tiny"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+ 	(unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")]
+@@ -4312,33 +4946,72 @@
+    (set_attr "length" "8")]
+ )
+ 
+-(define_expand "tlsle_small"
+-  [(set (match_operand 0 "register_operand" "=r")
+-        (unspec [(match_operand 1 "register_operand" "r")
+-                   (match_operand 2 "aarch64_tls_le_symref" "S")]
+-                   UNSPEC_GOTSMALLTLS))]
++(define_insn "tlsie_tiny_<mode>"
++  [(set (match_operand:PTR 0 "register_operand" "=&r")
++	(unspec:PTR [(match_operand 1 "aarch64_tls_ie_symref" "S")
++		     (match_operand:PTR 2 "register_operand" "r")]
++		   UNSPEC_GOTTINYTLS))]
+   ""
+-{
+-  machine_mode mode = GET_MODE (operands[0]);
+-  emit_insn ((mode == DImode
+-	      ? gen_tlsle_small_di
+-	      : gen_tlsle_small_si) (operands[0],
+-				     operands[1],
+-				     operands[2]));
+-  DONE;
+-})
++  "ldr\\t%<w>0, %L1\;add\\t%<w>0, %<w>0, %<w>2"
++  [(set_attr "type" "multiple")
++   (set_attr "length" "8")]
++)
++
++(define_insn "tlsie_tiny_sidi"
++  [(set (match_operand:DI 0 "register_operand" "=&r")
++	(zero_extend:DI
++	  (unspec:SI [(match_operand 1 "aarch64_tls_ie_symref" "S")
++		      (match_operand:DI 2 "register_operand" "r")
++		      ]
++		      UNSPEC_GOTTINYTLS)))]
++  ""
++  "ldr\\t%w0, %L1\;add\\t%w0, %w0, %w2"
++  [(set_attr "type" "multiple")
++   (set_attr "length" "8")]
++)
+ 
+-(define_insn "tlsle_small_<mode>"
++(define_insn "tlsle12_<mode>"
+   [(set (match_operand:P 0 "register_operand" "=r")
+-        (unspec:P [(match_operand:P 1 "register_operand" "r")
+-                   (match_operand 2 "aarch64_tls_le_symref" "S")]
+-		   UNSPEC_GOTSMALLTLS))]
++	(unspec:P [(match_operand:P 1 "register_operand" "r")
++		   (match_operand 2 "aarch64_tls_le_symref" "S")]
++		   UNSPEC_TLSLE12))]
+   ""
+-  "add\\t%<w>0, %<w>1, #%G2, lsl #12\;add\\t%<w>0, %<w>0, #%L2"
++  "add\\t%<w>0, %<w>1, #%L2";
+   [(set_attr "type" "alu_sreg")
++   (set_attr "length" "4")]
++)
++
++(define_insn "tlsle24_<mode>"
++  [(set (match_operand:P 0 "register_operand" "=r")
++	(unspec:P [(match_operand:P 1 "register_operand" "r")
++		   (match_operand 2 "aarch64_tls_le_symref" "S")]
++		   UNSPEC_TLSLE24))]
++  ""
++  "add\\t%<w>0, %<w>1, #%G2, lsl #12\;add\\t%<w>0, %<w>0, #%L2"
++  [(set_attr "type" "multiple")
+    (set_attr "length" "8")]
+ )
+ 
++(define_insn "tlsle32_<mode>"
++  [(set (match_operand:P 0 "register_operand" "=r")
++	(unspec:P [(match_operand 1 "aarch64_tls_le_symref" "S")]
++		   UNSPEC_TLSLE32))]
++  ""
++  "movz\\t%<w>0, #:tprel_g1:%1\;movk\\t%<w>0, #:tprel_g0_nc:%1"
++  [(set_attr "type" "multiple")
++   (set_attr "length" "8")]
++)
++
++(define_insn "tlsle48_<mode>"
++  [(set (match_operand:P 0 "register_operand" "=r")
++	(unspec:P [(match_operand 1 "aarch64_tls_le_symref" "S")]
++		   UNSPEC_TLSLE48))]
++  ""
++  "movz\\t%<w>0, #:tprel_g2:%1\;movk\\t%<w>0, #:tprel_g1_nc:%1\;movk\\t%<w>0, #:tprel_g0_nc:%1"
++  [(set_attr "type" "multiple")
++   (set_attr "length" "12")]
++)
++
+ (define_insn "tlsdesc_small_<mode>"
+   [(set (reg:PTR R0_REGNUM)
+         (unspec:PTR [(match_operand 0 "aarch64_valid_symref" "S")]
+--- a/src/gcc/config/aarch64/aarch64.opt
++++ b/src/gcc/config/aarch64/aarch64.opt
+@@ -21,6 +21,18 @@
+ HeaderInclude
+ config/aarch64/aarch64-opts.h
+ 
++TargetVariable
++enum aarch64_processor explicit_tune_core = aarch64_none
++
++TargetVariable
++enum aarch64_arch explicit_arch = aarch64_no_arch
++
++TargetSave
++const char *x_aarch64_override_tune_string
++
++TargetVariable
++unsigned long aarch64_isa_flags = 0
++
+ ; The TLS dialect names to use with -mtls-dialect.
+ 
+ Enum
+@@ -48,31 +60,20 @@ Enum(cmodel) String(small) Value(AARCH64_CMODEL_SMALL)
+ EnumValue
+ Enum(cmodel) String(large) Value(AARCH64_CMODEL_LARGE)
+ 
+-; The cpu/arch option names to use in cpu/arch selection.
+-
+-Variable
+-const char *aarch64_arch_string
+-
+-Variable
+-const char *aarch64_cpu_string
+-
+-Variable
+-const char *aarch64_tune_string
+-
+ mbig-endian
+ Target Report RejectNegative Mask(BIG_END)
+ Assume target CPU is configured as big endian
+ 
+ mgeneral-regs-only
+-Target Report RejectNegative Mask(GENERAL_REGS_ONLY)
++Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
+ Generate code which uses only the general registers
+ 
+ mfix-cortex-a53-835769
+-Target Report Var(aarch64_fix_a53_err835769) Init(2)
++Target Report Var(aarch64_fix_a53_err835769) Init(2) Save
+ Workaround for ARM Cortex-A53 Erratum number 835769
+ 
+ mfix-cortex-a53-843419
+-Target Report
++Target Report Var(aarch64_fix_a53_err843419) Init(2) Save
+ Workaround for ARM Cortex-A53 Erratum number 843419
+ 
+ mlittle-endian
+@@ -80,21 +81,40 @@ Target Report RejectNegative InverseMask(BIG_END)
+ Assume target CPU is configured as little endian
+ 
+ mcmodel=
+-Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL)
++Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save
+ Specify the code model
+ 
+ mstrict-align
+-Target Report RejectNegative Mask(STRICT_ALIGN)
++Target Report RejectNegative Mask(STRICT_ALIGN) Save
+ Don't assume that unaligned accesses are handled by the system
+ 
+ momit-leaf-frame-pointer
+-Target Report Save Var(flag_omit_leaf_frame_pointer) Init(1)
++Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save
+ Omit the frame pointer in leaf functions
+ 
+ mtls-dialect=
+-Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS)
++Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) Save
+ Specify TLS dialect
+ 
++mtls-size=
++Target RejectNegative Joined Var(aarch64_tls_size) Enum(aarch64_tls_size)
++Specifies bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
++
++Enum
++Name(aarch64_tls_size) Type(int)
++
++EnumValue
++Enum(aarch64_tls_size) String(12) Value(12)
++
++EnumValue
++Enum(aarch64_tls_size) String(24) Value(24)
++
++EnumValue
++Enum(aarch64_tls_size) String(32) Value(32)
++
++EnumValue
++Enum(aarch64_tls_size) String(48) Value(48)
++
+ march=
+ Target RejectNegative ToLower Joined Var(aarch64_arch_string)
+ -march=ARCH	Use features of architecture ARCH
+@@ -111,6 +131,10 @@ mabi=
+ Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT)
+ -mabi=ABI	Generate code that conforms to the specified ABI
+ 
++moverride=
++Target RejectNegative ToLower Joined Var(aarch64_override_tune_string)
++-moverride=STRING	Power users only! Override CPU optimization parameters
++
+ Enum
+ Name(aarch64_abi) Type(int)
+ Known AArch64 ABIs (for use with the -mabi= option):
+@@ -120,3 +144,7 @@ Enum(aarch64_abi) String(ilp32) Value(AARCH64_ABI_ILP32)
+ 
+ EnumValue
+ Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64)
++
++mpc-relative-literal-loads
++Target Report Save Var(nopcrelative_literal_loads) Init(2) Save
++PC relative literal loads.
+--- a/src/gcc/config/aarch64/arm_acle.h
++++ b/src/gcc/config/aarch64/arm_acle.h
+@@ -28,11 +28,15 @@
+ #define _GCC_ARM_ACLE_H
+ 
+ #include <stdint.h>
++
++#pragma GCC push_options
++
++#pragma GCC target ("+nothing+crc")
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+ 
+-#ifdef __ARM_FEATURE_CRC32
+ __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ __crc32b (uint32_t __a, uint8_t __b)
+ {
+@@ -81,10 +85,10 @@ __crc32d (uint32_t __a, uint64_t __b)
+   return __builtin_aarch64_crc32x (__a, __b);
+ }
+ 
+-#endif
+-
+ #ifdef __cplusplus
+ }
+ #endif
+ 
++#pragma GCC pop_options
++
+ #endif
+--- a/src/gcc/config/aarch64/arm_neon.h
++++ b/src/gcc/config/aarch64/arm_neon.h
+@@ -27,9 +27,8 @@
+ #ifndef _AARCH64_NEON_H_
+ #define _AARCH64_NEON_H_
+ 
+-#ifndef __ARM_NEON
+-#error You must enable AdvancedSIMD instructions to use arm_neon.h
+-#else
++#pragma GCC push_options
++#pragma GCC target ("+nothing+simd")
+ 
+ #include <stdint.h>
+ 
+@@ -40,6 +39,7 @@ typedef __Int8x8_t int8x8_t;
+ typedef __Int16x4_t int16x4_t;
+ typedef __Int32x2_t int32x2_t;
+ typedef __Int64x1_t int64x1_t;
++typedef __Float16x4_t float16x4_t;
+ typedef __Float32x2_t float32x2_t;
+ typedef __Poly8x8_t poly8x8_t;
+ typedef __Poly16x4_t poly16x4_t;
+@@ -52,6 +52,7 @@ typedef __Int8x16_t int8x16_t;
+ typedef __Int16x8_t int16x8_t;
+ typedef __Int32x4_t int32x4_t;
+ typedef __Int64x2_t int64x2_t;
++typedef __Float16x8_t float16x8_t;
+ typedef __Float32x4_t float32x4_t;
+ typedef __Float64x2_t float64x2_t;
+ typedef __Poly8x16_t poly8x16_t;
+@@ -67,6 +68,7 @@ typedef __Poly16_t poly16_t;
+ typedef __Poly64_t poly64_t;
+ typedef __Poly128_t poly128_t;
+ 
++typedef __fp16 float16_t;
+ typedef float float32_t;
+ typedef double float64_t;
+ 
+@@ -150,6 +152,16 @@ typedef struct uint64x2x2_t
+   uint64x2_t val[2];
+ } uint64x2x2_t;
+ 
++typedef struct float16x4x2_t
++{
++  float16x4_t val[2];
++} float16x4x2_t;
++
++typedef struct float16x8x2_t
++{
++  float16x8_t val[2];
++} float16x8x2_t;
++
+ typedef struct float32x2x2_t
+ {
+   float32x2_t val[2];
+@@ -270,6 +282,16 @@ typedef struct uint64x2x3_t
+   uint64x2_t val[3];
+ } uint64x2x3_t;
+ 
++typedef struct float16x4x3_t
++{
++  float16x4_t val[3];
++} float16x4x3_t;
++
++typedef struct float16x8x3_t
++{
++  float16x8_t val[3];
++} float16x8x3_t;
++
+ typedef struct float32x2x3_t
+ {
+   float32x2_t val[3];
+@@ -390,6 +412,16 @@ typedef struct uint64x2x4_t
+   uint64x2_t val[4];
+ } uint64x2x4_t;
+ 
++typedef struct float16x4x4_t
++{
++  float16x4_t val[4];
++} float16x4x4_t;
++
++typedef struct float16x8x4_t
++{
++  float16x8_t val[4];
++} float16x8x4_t;
++
+ typedef struct float32x2x4_t
+ {
+   float32x2_t val[4];
+@@ -2641,6 +2673,12 @@ vcreate_s64 (uint64_t __a)
+   return (int64x1_t) {__a};
+ }
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vcreate_f16 (uint64_t __a)
++{
++  return (float16x4_t) __a;
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vcreate_f32 (uint64_t __a)
+ {
+@@ -2691,6 +2729,12 @@ vcreate_p16 (uint64_t __a)
+ 
+ /* vget_lane  */
+ 
++__extension__ static __inline float16_t __attribute__ ((__always_inline__))
++vget_lane_f16 (float16x4_t __a, const int __b)
++{
++  return __aarch64_vget_lane_any (__a, __b);
++}
++
+ __extension__ static __inline float32_t __attribute__ ((__always_inline__))
+ vget_lane_f32 (float32x2_t __a, const int __b)
+ {
+@@ -2765,6 +2809,12 @@ vget_lane_u64 (uint64x1_t __a, const int __b)
+ 
+ /* vgetq_lane  */
+ 
++__extension__ static __inline float16_t __attribute__ ((__always_inline__))
++vgetq_lane_f16 (float16x8_t __a, const int __b)
++{
++  return __aarch64_vget_lane_any (__a, __b);
++}
++
+ __extension__ static __inline float32_t __attribute__ ((__always_inline__))
+ vgetq_lane_f32 (float32x4_t __a, const int __b)
+ {
+@@ -2840,6 +2890,12 @@ vgetq_lane_u64 (uint64x2_t __a, const int __b)
+ /* vreinterpret  */
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
++vreinterpret_p8_f16 (float16x4_t __a)
++{
++  return (poly8x8_t) __a;
++}
++
++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_f64 (float64x1_t __a)
+ {
+   return (poly8x8_t) __a;
+@@ -2936,6 +2992,12 @@ vreinterpretq_p8_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_p8_f16 (float16x8_t __a)
++{
++  return (poly8x16_t) __a;
++}
++
++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_f32 (float32x4_t __a)
+ {
+   return (poly8x16_t) __a;
+@@ -2972,6 +3034,12 @@ vreinterpretq_p8_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
++vreinterpret_p16_f16 (float16x4_t __a)
++{
++  return (poly16x4_t) __a;
++}
++
++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_f64 (float64x1_t __a)
+ {
+   return (poly16x4_t) __a;
+@@ -3068,6 +3136,12 @@ vreinterpretq_p16_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_p16_f16 (float16x8_t __a)
++{
++  return (poly16x8_t) __a;
++}
++
++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_f32 (float32x4_t __a)
+ {
+   return (poly16x8_t) __a;
+@@ -3103,6 +3177,156 @@ vreinterpretq_p16_p8 (poly8x16_t __a)
+   return (poly16x8_t) __a;
+ }
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_f64 (float64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s8 (int8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s16 (int16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s32 (int32x2_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s64 (int64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_f32 (float32x2_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u8 (uint8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u16 (uint16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u32 (uint32x2_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u64 (uint64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_p8 (poly8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_p16 (poly16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_f64 (float64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s8 (int8x16_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s16 (int16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s32 (int32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s64 (int64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_f32 (float32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u8 (uint8x16_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u16 (uint16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u32 (uint32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u64 (uint64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p8 (poly8x16_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p16 (poly16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++
++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
++vreinterpret_f32_f16 (float16x4_t __a)
++{
++  return (float32x2_t) __a;
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_f64 (float64x1_t __a)
+ {
+@@ -3170,6 +3394,12 @@ vreinterpret_f32_p16 (poly16x4_t __a)
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_f32_f16 (float16x8_t __a)
++{
++  return (float32x4_t) __a;
++}
++
++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_f64 (float64x2_t __a)
+ {
+   return (float32x4_t) __a;
+@@ -3236,6 +3466,12 @@ vreinterpretq_f32_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline float64x1_t __attribute__((__always_inline__))
++vreinterpret_f64_f16 (float16x4_t __a)
++{
++  return (float64x1_t) __a;
++}
++
++__extension__ static __inline float64x1_t __attribute__((__always_inline__))
+ vreinterpret_f64_f32 (float32x2_t __a)
+ {
+   return (float64x1_t) __a;
+@@ -3302,6 +3538,12 @@ vreinterpret_f64_u64 (uint64x1_t __a)
+ }
+ 
+ __extension__ static __inline float64x2_t __attribute__((__always_inline__))
++vreinterpretq_f64_f16 (float16x8_t __a)
++{
++  return (float64x2_t) __a;
++}
++
++__extension__ static __inline float64x2_t __attribute__((__always_inline__))
+ vreinterpretq_f64_f32 (float32x4_t __a)
+ {
+   return (float64x2_t) __a;
+@@ -3368,6 +3610,12 @@ vreinterpretq_f64_u64 (uint64x2_t __a)
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vreinterpret_s64_f16 (float16x4_t __a)
++{
++  return (int64x1_t) __a;
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_f64 (float64x1_t __a)
+ {
+   return (int64x1_t) __a;
+@@ -3458,6 +3706,12 @@ vreinterpretq_s64_s32 (int32x4_t __a)
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
++vreinterpretq_s64_f16 (float16x8_t __a)
++{
++  return (int64x2_t) __a;
++}
++
++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_f32 (float32x4_t __a)
+ {
+   return (int64x2_t) __a;
+@@ -3500,6 +3754,12 @@ vreinterpretq_s64_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vreinterpret_u64_f16 (float16x4_t __a)
++{
++  return (uint64x1_t) __a;
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_f64 (float64x1_t __a)
+ {
+   return (uint64x1_t) __a;
+@@ -3596,6 +3856,12 @@ vreinterpretq_u64_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
++vreinterpretq_u64_f16 (float16x8_t __a)
++{
++  return (uint64x2_t) __a;
++}
++
++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_f32 (float32x4_t __a)
+ {
+   return (uint64x2_t) __a;
+@@ -3632,6 +3898,12 @@ vreinterpretq_u64_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
++vreinterpret_s8_f16 (float16x4_t __a)
++{
++  return (int8x8_t) __a;
++}
++
++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_f64 (float64x1_t __a)
+ {
+   return (int8x8_t) __a;
+@@ -3722,6 +3994,12 @@ vreinterpretq_s8_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_s8_f16 (float16x8_t __a)
++{
++  return (int8x16_t) __a;
++}
++
++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_f32 (float32x4_t __a)
+ {
+   return (int8x16_t) __a;
+@@ -3764,6 +4042,12 @@ vreinterpretq_s8_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vreinterpret_s16_f16 (float16x4_t __a)
++{
++  return (int16x4_t) __a;
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_f64 (float64x1_t __a)
+ {
+   return (int16x4_t) __a;
+@@ -3854,6 +4138,12 @@ vreinterpretq_s16_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_s16_f16 (float16x8_t __a)
++{
++  return (int16x8_t) __a;
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_f32 (float32x4_t __a)
+ {
+   return (int16x8_t) __a;
+@@ -3896,6 +4186,12 @@ vreinterpretq_s16_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vreinterpret_s32_f16 (float16x4_t __a)
++{
++  return (int32x2_t) __a;
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_f64 (float64x1_t __a)
+ {
+   return (int32x2_t) __a;
+@@ -3986,6 +4282,12 @@ vreinterpretq_s32_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_s32_f16 (float16x8_t __a)
++{
++  return (int32x4_t) __a;
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_f32 (float32x4_t __a)
+ {
+   return (int32x4_t) __a;
+@@ -4028,6 +4330,12 @@ vreinterpretq_s32_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
++vreinterpret_u8_f16 (float16x4_t __a)
++{
++  return (uint8x8_t) __a;
++}
++
++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_f64 (float64x1_t __a)
+ {
+   return (uint8x8_t) __a;
+@@ -4124,6 +4432,12 @@ vreinterpretq_u8_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_u8_f16 (float16x8_t __a)
++{
++  return (uint8x16_t) __a;
++}
++
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_f32 (float32x4_t __a)
+ {
+   return (uint8x16_t) __a;
+@@ -4160,6 +4474,12 @@ vreinterpretq_u8_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
++vreinterpret_u16_f16 (float16x4_t __a)
++{
++  return (uint16x4_t) __a;
++}
++
++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_f64 (float64x1_t __a)
+ {
+   return (uint16x4_t) __a;
+@@ -4256,6 +4576,12 @@ vreinterpretq_u16_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_u16_f16 (float16x8_t __a)
++{
++  return (uint16x8_t) __a;
++}
++
++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_f32 (float32x4_t __a)
+ {
+   return (uint16x8_t) __a;
+@@ -4292,6 +4618,12 @@ vreinterpretq_u16_p16 (poly16x8_t __a)
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
++vreinterpret_u32_f16 (float16x4_t __a)
++{
++  return (uint32x2_t) __a;
++}
++
++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_f64 (float64x1_t __a)
+ {
+   return (uint32x2_t) __a;
+@@ -4388,6 +4720,12 @@ vreinterpretq_u32_s64 (int64x2_t __a)
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_u32_f16 (float16x8_t __a)
++{
++  return (uint32x4_t) __a;
++}
++
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_f32 (float32x4_t __a)
+ {
+   return (uint32x4_t) __a;
+@@ -4425,6 +4763,12 @@ vreinterpretq_u32_p16 (poly16x8_t __a)
+ 
+ /* vset_lane  */
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vset_lane_f16 (float16_t __elem, float16x4_t __vec, const int __index)
++{
++  return __aarch64_vset_lane_any (__elem, __vec, __index);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vset_lane_f32 (float32_t __elem, float32x2_t __vec, const int __index)
+ {
+@@ -4499,6 +4843,12 @@ vset_lane_u64 (uint64_t __elem, uint64x1_t __vec, const int __index)
+ 
+ /* vsetq_lane  */
+ 
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vsetq_lane_f16 (float16_t __elem, float16x8_t __vec, const int __index)
++{
++  return __aarch64_vset_lane_any (__elem, __vec, __index);
++}
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vsetq_lane_f32 (float32_t __elem, float32x4_t __vec, const int __index)
+ {
+@@ -4576,6 +4926,12 @@ vsetq_lane_u64 (uint64_t __elem, uint64x2_t __vec, const int __index)
+   uint64x1_t lo = vcreate_u64 (vgetq_lane_u64 (tmp, 0));  \
+   return vreinterpret_##__TYPE##_u64 (lo);
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vget_low_f16 (float16x8_t __a)
++{
++  __GET_LOW (f16);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vget_low_f32 (float32x4_t __a)
+ {
+@@ -4655,6 +5011,12 @@ vget_low_u64 (uint64x2_t __a)
+   uint64x1_t hi = vcreate_u64 (vgetq_lane_u64 (tmp, 1));	\
+   return vreinterpret_##__TYPE##_u64 (hi);
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vget_high_f16 (float16x8_t __a)
++{
++  __GET_HIGH (f16);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vget_high_f32 (float32x4_t __a)
+ {
+@@ -4753,6 +5115,12 @@ vcombine_s64 (int64x1_t __a, int64x1_t __b)
+   return __builtin_aarch64_combinedi (__a[0], __b[0]);
+ }
+ 
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vcombine_f16 (float16x4_t __a, float16x4_t __b)
++{
++  return __builtin_aarch64_combinev4hf (__a, __b);
++}
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vcombine_f32 (float32x2_t __a, float32x2_t __b)
+ {
+@@ -5657,16 +6025,6 @@ vaddlvq_u32 (uint32x4_t a)
+        result;                                                          \
+      })
+ 
+-/* vcvt_f16_f32 not supported */
+-
+-/* vcvt_f32_f16 not supported */
+-
+-/* vcvt_high_f16_f32 not supported */
+-
+-/* vcvt_high_f32_f16 not supported */
+-
+-static float32x2_t vdup_n_f32 (float32_t);
+-
+ #define vcvt_n_f32_s32(a, b)                                            \
+   __extension__                                                         \
+     ({                                                                  \
+@@ -9824,282 +10182,16 @@ vrsqrtss_f32 (float32_t a, float32_t b)
+        result;                                                          \
+      })
+ 
+-#define vst1_lane_f32(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       float32x2_t b_ = (b);                                            \
+-       float32_t * a_ = (a);                                            \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_f64(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       float64x1_t b_ = (b);                                            \
+-       float64_t * a_ = (a);                                            \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_p8(a, b, c)                                           \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       poly8x8_t b_ = (b);                                              \
+-       poly8_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_p16(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       poly16x4_t b_ = (b);                                             \
+-       poly16_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_s8(a, b, c)                                           \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int8x8_t b_ = (b);                                               \
+-       int8_t * a_ = (a);                                               \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_s16(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int16x4_t b_ = (b);                                              \
+-       int16_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_s32(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int32x2_t b_ = (b);                                              \
+-       int32_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_s64(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int64x1_t b_ = (b);                                              \
+-       int64_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_u8(a, b, c)                                           \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint8x8_t b_ = (b);                                              \
+-       uint8_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_u16(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint16x4_t b_ = (b);                                             \
+-       uint16_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_u32(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint32x2_t b_ = (b);                                             \
+-       uint32_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1_lane_u64(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint64x1_t b_ = (b);                                             \
+-       uint64_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-
+-#define vst1q_lane_f32(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       float32x4_t b_ = (b);                                            \
+-       float32_t * a_ = (a);                                            \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_f64(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       float64x2_t b_ = (b);                                            \
+-       float64_t * a_ = (a);                                            \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_p8(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       poly8x16_t b_ = (b);                                             \
+-       poly8_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_p16(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       poly16x8_t b_ = (b);                                             \
+-       poly16_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_s8(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int8x16_t b_ = (b);                                              \
+-       int8_t * a_ = (a);                                               \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_s16(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int16x8_t b_ = (b);                                              \
+-       int16_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_s32(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int32x4_t b_ = (b);                                              \
+-       int32_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_s64(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       int64x2_t b_ = (b);                                              \
+-       int64_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_u8(a, b, c)                                          \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint8x16_t b_ = (b);                                             \
+-       uint8_t * a_ = (a);                                              \
+-       __asm__ ("st1 {%1.b}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_u16(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint16x8_t b_ = (b);                                             \
+-       uint16_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.h}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_u32(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint32x4_t b_ = (b);                                             \
+-       uint32_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.s}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-#define vst1q_lane_u64(a, b, c)                                         \
+-  __extension__                                                         \
+-    ({                                                                  \
+-       uint64x2_t b_ = (b);                                             \
+-       uint64_t * a_ = (a);                                             \
+-       __asm__ ("st1 {%1.d}[%2],[%0]"                                   \
+-                :                                                       \
+-                : "r"(a_), "w"(b_), "i"(c)                              \
+-                : "memory");                                            \
+-     })
+-
+-
+-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+-vtst_p8 (poly8x8_t a, poly8x8_t b)
+-{
+-  uint8x8_t result;
+-  __asm__ ("cmtst %0.8b, %1.8b, %2.8b"
+-           : "=w"(result)
+-           : "w"(a), "w"(b)
+-           : /* No clobbers */);
+-  return result;
+-}
++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
++vtst_p8 (poly8x8_t a, poly8x8_t b)
++{
++  uint8x8_t result;
++  __asm__ ("cmtst %0.8b, %1.8b, %2.8b"
++           : "=w"(result)
++           : "w"(a), "w"(b)
++           : /* No clobbers */);
++  return result;
++}
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vtst_p16 (poly16x4_t a, poly16x4_t b)
+@@ -10149,7 +10241,7 @@ vtstq_p16 (poly16x8_t a, poly16x8_t b)
+    +------+----+----+----+----+
+    |uint  | Y  | Y  | N  | N  |
+    +------+----+----+----+----+
+-   |float | -  | -  | N  | N  |
++   |float | -  | Y  | N  | N  |
+    +------+----+----+----+----+
+    |poly  | Y  | Y  | -  | -  |
+    +------+----+----+----+----+
+@@ -10163,7 +10255,7 @@ vtstq_p16 (poly16x8_t a, poly16x8_t b)
+    +------+----+----+----+----+
+    |uint  | Y  | Y  | Y  | Y  |
+    +------+----+----+----+----+
+-   |float | -  | -  | Y  | Y  |
++   |float | -  | Y  | Y  | Y  |
+    +------+----+----+----+----+
+    |poly  | Y  | Y  | -  | -  |
+    +------+----+----+----+----+
+@@ -10177,7 +10269,7 @@ vtstq_p16 (poly16x8_t a, poly16x8_t b)
+    +------+----+----+----+----+
+    |uint  | Y  | N  | N  | Y  |
+    +------+----+----+----+----+
+-   |float | -  | -  | N  | Y  |
++   |float | -  | N  | N  | Y  |
+    +------+----+----+----+----+
+    |poly  | Y  | N  | -  | -  |
+    +------+----+----+----+----+
+@@ -10193,6 +10285,7 @@ __STRUCTN (int, 8, 2)
+ __STRUCTN (int, 16, 2)
+ __STRUCTN (uint, 8, 2)
+ __STRUCTN (uint, 16, 2)
++__STRUCTN (float, 16, 2)
+ __STRUCTN (poly, 8, 2)
+ __STRUCTN (poly, 16, 2)
+ /* 3-element structs.  */
+@@ -10204,6 +10297,7 @@ __STRUCTN (uint, 8, 3)
+ __STRUCTN (uint, 16, 3)
+ __STRUCTN (uint, 32, 3)
+ __STRUCTN (uint, 64, 3)
++__STRUCTN (float, 16, 3)
+ __STRUCTN (float, 32, 3)
+ __STRUCTN (float, 64, 3)
+ __STRUCTN (poly, 8, 3)
+@@ -10218,8 +10312,8 @@ __STRUCTN (float, 64, 4)
+ #undef __STRUCTN
+ 
+ 
+-#define __ST2_LANE_FUNC(intype, largetype, ptrtype,			     \
+-			mode, ptr_mode, funcsuffix, signedtype)		     \
++#define __ST2_LANE_FUNC(intype, largetype, ptrtype, mode,		     \
++			qmode, ptr_mode, funcsuffix, signedtype)	     \
+ __extension__ static __inline void					     \
+ __attribute__ ((__always_inline__))					     \
+ vst2_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+@@ -10233,31 +10327,39 @@ vst2_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+   __temp.val[1]								     \
+     = vcombine_##funcsuffix (__b.val[1],				     \
+ 			     vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
+-  __o = __builtin_aarch64_set_qregoi##mode (__o,			     \
+-					    (signedtype) __temp.val[0], 0);  \
+-  __o = __builtin_aarch64_set_qregoi##mode (__o,			     \
+-					    (signedtype) __temp.val[1], 1);  \
++  __o = __builtin_aarch64_set_qregoi##qmode (__o,			     \
++					     (signedtype) __temp.val[0], 0); \
++  __o = __builtin_aarch64_set_qregoi##qmode (__o,			     \
++					     (signedtype) __temp.val[1], 1); \
+   __builtin_aarch64_st2_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *)  \
+ 				     __ptr, __o, __c);			     \
+ }
+ 
+-__ST2_LANE_FUNC (float32x2x2_t, float32x4x2_t, float32_t, v4sf, sf, f32,
++__ST2_LANE_FUNC (float16x4x2_t, float16x8x2_t, float16_t, v4hf, v8hf, hf, f16,
++		 float16x8_t)
++__ST2_LANE_FUNC (float32x2x2_t, float32x4x2_t, float32_t, v2sf, v4sf, sf, f32,
+ 		 float32x4_t)
+-__ST2_LANE_FUNC (float64x1x2_t, float64x2x2_t, float64_t, v2df, df, f64,
++__ST2_LANE_FUNC (float64x1x2_t, float64x2x2_t, float64_t, df, v2df, df, f64,
+ 		 float64x2_t)
+-__ST2_LANE_FUNC (poly8x8x2_t, poly8x16x2_t, poly8_t, v16qi, qi, p8, int8x16_t)
+-__ST2_LANE_FUNC (poly16x4x2_t, poly16x8x2_t, poly16_t, v8hi, hi, p16,
++__ST2_LANE_FUNC (poly8x8x2_t, poly8x16x2_t, poly8_t, v8qi, v16qi, qi, p8,
++		 int8x16_t)
++__ST2_LANE_FUNC (poly16x4x2_t, poly16x8x2_t, poly16_t, v4hi, v8hi, hi, p16,
+ 		 int16x8_t)
+-__ST2_LANE_FUNC (int8x8x2_t, int8x16x2_t, int8_t, v16qi, qi, s8, int8x16_t)
+-__ST2_LANE_FUNC (int16x4x2_t, int16x8x2_t, int16_t, v8hi, hi, s16, int16x8_t)
+-__ST2_LANE_FUNC (int32x2x2_t, int32x4x2_t, int32_t, v4si, si, s32, int32x4_t)
+-__ST2_LANE_FUNC (int64x1x2_t, int64x2x2_t, int64_t, v2di, di, s64, int64x2_t)
+-__ST2_LANE_FUNC (uint8x8x2_t, uint8x16x2_t, uint8_t, v16qi, qi, u8, int8x16_t)
+-__ST2_LANE_FUNC (uint16x4x2_t, uint16x8x2_t, uint16_t, v8hi, hi, u16,
++__ST2_LANE_FUNC (int8x8x2_t, int8x16x2_t, int8_t, v8qi, v16qi, qi, s8,
++		 int8x16_t)
++__ST2_LANE_FUNC (int16x4x2_t, int16x8x2_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__ST2_LANE_FUNC (uint32x2x2_t, uint32x4x2_t, uint32_t, v4si, si, u32,
++__ST2_LANE_FUNC (int32x2x2_t, int32x4x2_t, int32_t, v2si, v4si, si, s32,
+ 		 int32x4_t)
+-__ST2_LANE_FUNC (uint64x1x2_t, uint64x2x2_t, uint64_t, v2di, di, u64,
++__ST2_LANE_FUNC (int64x1x2_t, int64x2x2_t, int64_t, di, v2di, di, s64,
++		 int64x2_t)
++__ST2_LANE_FUNC (uint8x8x2_t, uint8x16x2_t, uint8_t, v8qi, v16qi, qi, u8,
++		 int8x16_t)
++__ST2_LANE_FUNC (uint16x4x2_t, uint16x8x2_t, uint16_t, v4hi, v8hi, hi, u16,
++		 int16x8_t)
++__ST2_LANE_FUNC (uint32x2x2_t, uint32x4x2_t, uint32_t, v2si, v4si, si, u32,
++		 int32x4_t)
++__ST2_LANE_FUNC (uint64x1x2_t, uint64x2x2_t, uint64_t, di, v2di, di, u64,
+ 		 int64x2_t)
+ 
+ #undef __ST2_LANE_FUNC
+@@ -10273,6 +10375,7 @@ vst2q_lane_ ## funcsuffix (ptrtype *__ptr,				    \
+ 				    __ptr, __temp.__o, __c);		    \
+ }
+ 
++__ST2_LANE_FUNC (float16x8x2_t, float16_t, v8hf, hf, f16)
+ __ST2_LANE_FUNC (float32x4x2_t, float32_t, v4sf, sf, f32)
+ __ST2_LANE_FUNC (float64x2x2_t, float64_t, v2df, df, f64)
+ __ST2_LANE_FUNC (poly8x16x2_t, poly8_t, v16qi, qi, p8)
+@@ -10286,8 +10389,8 @@ __ST2_LANE_FUNC (uint16x8x2_t, uint16_t, v8hi, hi, u16)
+ __ST2_LANE_FUNC (uint32x4x2_t, uint32_t, v4si, si, u32)
+ __ST2_LANE_FUNC (uint64x2x2_t, uint64_t, v2di, di, u64)
+ 
+-#define __ST3_LANE_FUNC(intype, largetype, ptrtype,			     \
+-			mode, ptr_mode, funcsuffix, signedtype)		     \
++#define __ST3_LANE_FUNC(intype, largetype, ptrtype, mode,		     \
++			qmode, ptr_mode, funcsuffix, signedtype)	     \
+ __extension__ static __inline void					     \
+ __attribute__ ((__always_inline__))					     \
+ vst3_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+@@ -10304,33 +10407,41 @@ vst3_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+   __temp.val[2]								     \
+     = vcombine_##funcsuffix (__b.val[2],				     \
+ 			     vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			     \
+-					    (signedtype) __temp.val[0], 0);  \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			     \
+-					    (signedtype) __temp.val[1], 1);  \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			     \
+-					    (signedtype) __temp.val[2], 2);  \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			     \
++					     (signedtype) __temp.val[0], 0); \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			     \
++					     (signedtype) __temp.val[1], 1); \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			     \
++					     (signedtype) __temp.val[2], 2); \
+   __builtin_aarch64_st3_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *)  \
+ 				     __ptr, __o, __c);			     \
+ }
+ 
+-__ST3_LANE_FUNC (float32x2x3_t, float32x4x3_t, float32_t, v4sf, sf, f32,
++__ST3_LANE_FUNC (float16x4x3_t, float16x8x3_t, float16_t, v4hf, v8hf, hf, f16,
++		 float16x8_t)
++__ST3_LANE_FUNC (float32x2x3_t, float32x4x3_t, float32_t, v2sf, v4sf, sf, f32,
+ 		 float32x4_t)
+-__ST3_LANE_FUNC (float64x1x3_t, float64x2x3_t, float64_t, v2df, df, f64,
++__ST3_LANE_FUNC (float64x1x3_t, float64x2x3_t, float64_t, df, v2df, df, f64,
+ 		 float64x2_t)
+-__ST3_LANE_FUNC (poly8x8x3_t, poly8x16x3_t, poly8_t, v16qi, qi, p8, int8x16_t)
+-__ST3_LANE_FUNC (poly16x4x3_t, poly16x8x3_t, poly16_t, v8hi, hi, p16,
++__ST3_LANE_FUNC (poly8x8x3_t, poly8x16x3_t, poly8_t, v8qi, v16qi, qi, p8,
++		 int8x16_t)
++__ST3_LANE_FUNC (poly16x4x3_t, poly16x8x3_t, poly16_t, v4hi, v8hi, hi, p16,
+ 		 int16x8_t)
+-__ST3_LANE_FUNC (int8x8x3_t, int8x16x3_t, int8_t, v16qi, qi, s8, int8x16_t)
+-__ST3_LANE_FUNC (int16x4x3_t, int16x8x3_t, int16_t, v8hi, hi, s16, int16x8_t)
+-__ST3_LANE_FUNC (int32x2x3_t, int32x4x3_t, int32_t, v4si, si, s32, int32x4_t)
+-__ST3_LANE_FUNC (int64x1x3_t, int64x2x3_t, int64_t, v2di, di, s64, int64x2_t)
+-__ST3_LANE_FUNC (uint8x8x3_t, uint8x16x3_t, uint8_t, v16qi, qi, u8, int8x16_t)
+-__ST3_LANE_FUNC (uint16x4x3_t, uint16x8x3_t, uint16_t, v8hi, hi, u16,
++__ST3_LANE_FUNC (int8x8x3_t, int8x16x3_t, int8_t, v8qi, v16qi, qi, s8,
++		 int8x16_t)
++__ST3_LANE_FUNC (int16x4x3_t, int16x8x3_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__ST3_LANE_FUNC (uint32x2x3_t, uint32x4x3_t, uint32_t, v4si, si, u32,
++__ST3_LANE_FUNC (int32x2x3_t, int32x4x3_t, int32_t, v2si, v4si, si, s32,
+ 		 int32x4_t)
+-__ST3_LANE_FUNC (uint64x1x3_t, uint64x2x3_t, uint64_t, v2di, di, u64,
++__ST3_LANE_FUNC (int64x1x3_t, int64x2x3_t, int64_t, di, v2di, di, s64,
++		 int64x2_t)
++__ST3_LANE_FUNC (uint8x8x3_t, uint8x16x3_t, uint8_t, v8qi, v16qi, qi, u8,
++		 int8x16_t)
++__ST3_LANE_FUNC (uint16x4x3_t, uint16x8x3_t, uint16_t, v4hi, v8hi, hi, u16,
++		 int16x8_t)
++__ST3_LANE_FUNC (uint32x2x3_t, uint32x4x3_t, uint32_t, v2si, v4si, si, u32,
++		 int32x4_t)
++__ST3_LANE_FUNC (uint64x1x3_t, uint64x2x3_t, uint64_t, di, v2di, di, u64,
+ 		 int64x2_t)
+ 
+ #undef __ST3_LANE_FUNC
+@@ -10346,6 +10457,7 @@ vst3q_lane_ ## funcsuffix (ptrtype *__ptr,				    \
+ 				    __ptr, __temp.__o, __c);		    \
+ }
+ 
++__ST3_LANE_FUNC (float16x8x3_t, float16_t, v8hf, hf, f16)
+ __ST3_LANE_FUNC (float32x4x3_t, float32_t, v4sf, sf, f32)
+ __ST3_LANE_FUNC (float64x2x3_t, float64_t, v2df, df, f64)
+ __ST3_LANE_FUNC (poly8x16x3_t, poly8_t, v16qi, qi, p8)
+@@ -10359,8 +10471,8 @@ __ST3_LANE_FUNC (uint16x8x3_t, uint16_t, v8hi, hi, u16)
+ __ST3_LANE_FUNC (uint32x4x3_t, uint32_t, v4si, si, u32)
+ __ST3_LANE_FUNC (uint64x2x3_t, uint64_t, v2di, di, u64)
+ 
+-#define __ST4_LANE_FUNC(intype, largetype, ptrtype,			     \
+-			mode, ptr_mode, funcsuffix, signedtype)		     \
++#define __ST4_LANE_FUNC(intype, largetype, ptrtype, mode,		     \
++			qmode, ptr_mode, funcsuffix, signedtype)	     \
+ __extension__ static __inline void					     \
+ __attribute__ ((__always_inline__))					     \
+ vst4_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+@@ -10380,35 +10492,43 @@ vst4_lane_ ## funcsuffix (ptrtype *__ptr,				     \
+   __temp.val[3]								     \
+     = vcombine_##funcsuffix (__b.val[3],				     \
+ 			     vcreate_##funcsuffix (__AARCH64_UINT64_C (0))); \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			     \
+-					    (signedtype) __temp.val[0], 0);  \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			     \
+-					    (signedtype) __temp.val[1], 1);  \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			     \
+-					    (signedtype) __temp.val[2], 2);  \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			     \
+-					    (signedtype) __temp.val[3], 3);  \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			     \
++					     (signedtype) __temp.val[0], 0); \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			     \
++					     (signedtype) __temp.val[1], 1); \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			     \
++					     (signedtype) __temp.val[2], 2); \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			     \
++					     (signedtype) __temp.val[3], 3); \
+   __builtin_aarch64_st4_lane##mode ((__builtin_aarch64_simd_ ## ptr_mode *)  \
+ 				     __ptr, __o, __c);			     \
+ }
+ 
+-__ST4_LANE_FUNC (float32x2x4_t, float32x4x4_t, float32_t, v4sf, sf, f32,
++__ST4_LANE_FUNC (float16x4x4_t, float16x8x4_t, float16_t, v4hf, v8hf, hf, f16,
++		 float16x8_t)
++__ST4_LANE_FUNC (float32x2x4_t, float32x4x4_t, float32_t, v2sf, v4sf, sf, f32,
+ 		 float32x4_t)
+-__ST4_LANE_FUNC (float64x1x4_t, float64x2x4_t, float64_t, v2df, df, f64,
++__ST4_LANE_FUNC (float64x1x4_t, float64x2x4_t, float64_t, df, v2df, df, f64,
+ 		 float64x2_t)
+-__ST4_LANE_FUNC (poly8x8x4_t, poly8x16x4_t, poly8_t, v16qi, qi, p8, int8x16_t)
+-__ST4_LANE_FUNC (poly16x4x4_t, poly16x8x4_t, poly16_t, v8hi, hi, p16,
++__ST4_LANE_FUNC (poly8x8x4_t, poly8x16x4_t, poly8_t, v8qi, v16qi, qi, p8,
++		 int8x16_t)
++__ST4_LANE_FUNC (poly16x4x4_t, poly16x8x4_t, poly16_t, v4hi, v8hi, hi, p16,
++		 int16x8_t)
++__ST4_LANE_FUNC (int8x8x4_t, int8x16x4_t, int8_t, v8qi, v16qi, qi, s8,
++		 int8x16_t)
++__ST4_LANE_FUNC (int16x4x4_t, int16x8x4_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__ST4_LANE_FUNC (int8x8x4_t, int8x16x4_t, int8_t, v16qi, qi, s8, int8x16_t)
+-__ST4_LANE_FUNC (int16x4x4_t, int16x8x4_t, int16_t, v8hi, hi, s16, int16x8_t)
+-__ST4_LANE_FUNC (int32x2x4_t, int32x4x4_t, int32_t, v4si, si, s32, int32x4_t)
+-__ST4_LANE_FUNC (int64x1x4_t, int64x2x4_t, int64_t, v2di, di, s64, int64x2_t)
+-__ST4_LANE_FUNC (uint8x8x4_t, uint8x16x4_t, uint8_t, v16qi, qi, u8, int8x16_t)
+-__ST4_LANE_FUNC (uint16x4x4_t, uint16x8x4_t, uint16_t, v8hi, hi, u16,
++__ST4_LANE_FUNC (int32x2x4_t, int32x4x4_t, int32_t, v2si, v4si, si, s32,
++		 int32x4_t)
++__ST4_LANE_FUNC (int64x1x4_t, int64x2x4_t, int64_t, di, v2di, di, s64,
++		 int64x2_t)
++__ST4_LANE_FUNC (uint8x8x4_t, uint8x16x4_t, uint8_t, v8qi, v16qi, qi, u8,
++		 int8x16_t)
++__ST4_LANE_FUNC (uint16x4x4_t, uint16x8x4_t, uint16_t, v4hi, v8hi, hi, u16,
+ 		 int16x8_t)
+-__ST4_LANE_FUNC (uint32x2x4_t, uint32x4x4_t, uint32_t, v4si, si, u32,
++__ST4_LANE_FUNC (uint32x2x4_t, uint32x4x4_t, uint32_t, v2si, v4si, si, u32,
+ 		 int32x4_t)
+-__ST4_LANE_FUNC (uint64x1x4_t, uint64x2x4_t, uint64_t, v2di, di, u64,
++__ST4_LANE_FUNC (uint64x1x4_t, uint64x2x4_t, uint64_t, di, v2di, di, u64,
+ 		 int64x2_t)
+ 
+ #undef __ST4_LANE_FUNC
+@@ -10424,6 +10544,7 @@ vst4q_lane_ ## funcsuffix (ptrtype *__ptr,				    \
+ 				    __ptr, __temp.__o, __c);		    \
+ }
+ 
++__ST4_LANE_FUNC (float16x8x4_t, float16_t, v8hf, hf, f16)
+ __ST4_LANE_FUNC (float32x4x4_t, float32_t, v4sf, sf, f32)
+ __ST4_LANE_FUNC (float64x2x4_t, float64_t, v2df, df, f64)
+ __ST4_LANE_FUNC (poly8x16x4_t, poly8_t, v16qi, qi, p8)
+@@ -11153,13 +11274,14 @@ vtbl3_s8 (int8x8x3_t tab, int8x8_t idx)
+ {
+   int8x8_t result;
+   int8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (__AARCH64_UINT64_C (0x0)));
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = __builtin_aarch64_tbl3v8qi (__o, idx);
+   return result;
+ }
+ 
+@@ -11168,13 +11290,14 @@ vtbl3_u8 (uint8x8x3_t tab, uint8x8_t idx)
+ {
+   uint8x8_t result;
+   uint8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (__AARCH64_UINT64_C (0x0)));
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
+   return result;
+ }
+ 
+@@ -11183,13 +11306,14 @@ vtbl3_p8 (poly8x8x3_t tab, uint8x8_t idx)
+ {
+   poly8x8_t result;
+   poly8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (__AARCH64_UINT64_C (0x0)));
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
+   return result;
+ }
+ 
+@@ -11198,13 +11322,14 @@ vtbl4_s8 (int8x8x4_t tab, int8x8_t idx)
+ {
+   int8x8_t result;
+   int8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = __builtin_aarch64_tbl3v8qi (__o, idx);
+   return result;
+ }
+ 
+@@ -11213,13 +11338,14 @@ vtbl4_u8 (uint8x8x4_t tab, uint8x8_t idx)
+ {
+   uint8x8_t result;
+   uint8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (uint8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
+   return result;
+ }
+ 
+@@ -11228,13 +11354,14 @@ vtbl4_p8 (poly8x8x4_t tab, uint8x8_t idx)
+ {
+   poly8x8_t result;
+   poly8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
+   temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]);
+   temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "=w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (poly8x8_t)__builtin_aarch64_tbl3v8qi (__o, (int8x8_t)idx);
+   return result;
+ }
+ 
+@@ -11274,51 +11401,6 @@ vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx)
+   return result;
+ }
+ 
+-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+-vtbx4_s8 (int8x8_t r, int8x8x4_t tab, int8x8_t idx)
+-{
+-  int8x8_t result = r;
+-  int8x16x2_t temp;
+-  temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]);
+-  temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "+w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
+-  return result;
+-}
+-
+-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+-vtbx4_u8 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx)
+-{
+-  uint8x8_t result = r;
+-  uint8x16x2_t temp;
+-  temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]);
+-  temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "+w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
+-  return result;
+-}
+-
+-__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+-vtbx4_p8 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx)
+-{
+-  poly8x8_t result = r;
+-  poly8x16x2_t temp;
+-  temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]);
+-  temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]);
+-  __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t"
+-	   "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t"
+-           : "+w"(result)
+-           : "Q"(temp), "w"(idx)
+-           : "v16", "v17", "memory");
+-  return result;
+-}
+-
+ /* End of temporary inline asm.  */
+ 
+ /* Start of optimal implementations in approved order.  */
+@@ -11664,35 +11746,255 @@ vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c)
+   return __builtin_aarch64_simd_bslv2di_uuuu (__a, __b, __c);
+ }
+ 
+-#ifdef __ARM_FEATURE_CRYPTO
++/* ARMv8.1 instrinsics.  */
++#pragma GCC push_options
++#pragma GCC target ("arch=armv8.1-a")
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlah_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
++{
++  return __builtin_aarch64_sqrdmlahv4hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlah_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
++{
++  return __builtin_aarch64_sqrdmlahv2si (__a, __b, __c);
++}
+ 
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlahq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
++{
++  return __builtin_aarch64_sqrdmlahv8hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlahq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
++{
++  return __builtin_aarch64_sqrdmlahv4si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlsh_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
++{
++  return __builtin_aarch64_sqrdmlshv4hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlsh_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
++{
++  return __builtin_aarch64_sqrdmlshv2si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlshq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
++{
++  return __builtin_aarch64_sqrdmlshv8hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlshq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
++{
++  return __builtin_aarch64_sqrdmlshv4si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlah_laneq_s16 (int16x4_t __a, int16x4_t __b, int16x8_t __c, const int __d)
++{
++  return  __builtin_aarch64_sqrdmlah_laneqv4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlah_laneq_s32 (int32x2_t __a, int32x2_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_laneqv2si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlahq_laneq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_laneqv8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlahq_laneq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_laneqv4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlsh_laneq_s16 (int16x4_t __a, int16x4_t __b, int16x8_t __c, const int __d)
++{
++  return  __builtin_aarch64_sqrdmlsh_laneqv4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlsh_laneq_s32 (int32x2_t __a, int32x2_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_laneqv2si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlshq_laneq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_laneqv8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlshq_laneq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_laneqv4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlah_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
++{
++  return  __builtin_aarch64_sqrdmlah_lanev4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlah_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_lanev2si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlahq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_lanev8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlahq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_lanev4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlahh_s16 (int16_t __a, int16_t __b, int16_t __c)
++{
++  return (int16_t) __builtin_aarch64_sqrdmlahhi (__a, __b, __c);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlahh_lane_s16 (int16_t __a, int16_t __b, int16x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_lanehi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlahh_laneq_s16 (int16_t __a, int16_t __b, int16x8_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_laneqhi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlahs_s32 (int32_t __a, int32_t __b, int32_t __c)
++{
++  return (int32_t) __builtin_aarch64_sqrdmlahsi (__a, __b, __c);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlahs_lane_s32 (int32_t __a, int32_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_lanesi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlahs_laneq_s32 (int32_t __a, int32_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlah_laneqsi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlsh_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
++{
++  return  __builtin_aarch64_sqrdmlsh_lanev4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlsh_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_lanev2si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlshq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_lanev8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlshq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_lanev4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlshh_s16 (int16_t __a, int16_t __b, int16_t __c)
++{
++  return (int16_t) __builtin_aarch64_sqrdmlshhi (__a, __b, __c);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlshh_lane_s16 (int16_t __a, int16_t __b, int16x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_lanehi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16_t __attribute__ ((__always_inline__))
++vqrdmlshh_laneq_s16 (int16_t __a, int16_t __b, int16x8_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_laneqhi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlshs_s32 (int32_t __a, int32_t __b, int32_t __c)
++{
++  return (int32_t) __builtin_aarch64_sqrdmlshsi (__a, __b, __c);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlshs_lane_s32 (int32_t __a, int32_t __b, int32x2_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_lanesi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32_t __attribute__ ((__always_inline__))
++vqrdmlshs_laneq_s32 (int32_t __a, int32_t __b, int32x4_t __c, const int __d)
++{
++  return __builtin_aarch64_sqrdmlsh_laneqsi (__a, __b, __c, __d);
++}
++#pragma GCC pop_options
++
++#pragma GCC push_options
++#pragma GCC target ("+nothing+crypto")
+ /* vaes  */
+ 
+-static __inline uint8x16_t
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vaeseq_u8 (uint8x16_t data, uint8x16_t key)
+ {
+   return __builtin_aarch64_crypto_aesev16qi_uuu (data, key);
+ }
+ 
+-static __inline uint8x16_t
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vaesdq_u8 (uint8x16_t data, uint8x16_t key)
+ {
+   return __builtin_aarch64_crypto_aesdv16qi_uuu (data, key);
+ }
+ 
+-static __inline uint8x16_t
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vaesmcq_u8 (uint8x16_t data)
+ {
+   return __builtin_aarch64_crypto_aesmcv16qi_uu (data);
+ }
+ 
+-static __inline uint8x16_t
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vaesimcq_u8 (uint8x16_t data)
+ {
+   return __builtin_aarch64_crypto_aesimcv16qi_uu (data);
+ }
+-
+-#endif
++#pragma GCC pop_options
+ 
+ /* vcage  */
+ 
+@@ -11887,7 +12189,7 @@ vceq_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vceq_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] == __b[0] ? -1ll : 0ll};
++  return (uint64x1_t) (__a == __b);
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -11911,7 +12213,7 @@ vceq_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vceq_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] == __b[0] ? -1ll : 0ll};
++  return (__a == __b);
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12047,7 +12349,7 @@ vceqz_s32 (int32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vceqz_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] == 0ll ? -1ll : 0ll};
++  return (uint64x1_t) (__a == __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -12071,7 +12373,7 @@ vceqz_u32 (uint32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vceqz_u64 (uint64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] == 0ll ? -1ll : 0ll};
++  return (__a == __AARCH64_UINT64_C (0));
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12201,7 +12503,7 @@ vcge_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcge_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] >= __b[0] ? -1ll : 0ll};
++  return (uint64x1_t) (__a >= __b);
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -12225,7 +12527,7 @@ vcge_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcge_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] >= __b[0] ? -1ll : 0ll};
++  return (__a >= __b);
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12349,7 +12651,7 @@ vcgez_s32 (int32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcgez_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] >= 0ll ? -1ll : 0ll};
++  return (uint64x1_t) (__a >= __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12443,7 +12745,7 @@ vcgt_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcgt_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) (__a[0] > __b[0] ? -1ll : 0ll);
++  return (uint64x1_t) (__a > __b);
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -12467,7 +12769,7 @@ vcgt_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcgt_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) (__a[0] > __b[0] ? -1ll : 0ll);
++  return (__a > __b);
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12591,7 +12893,7 @@ vcgtz_s32 (int32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcgtz_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] > 0ll ? -1ll : 0ll};
++  return (uint64x1_t) (__a > __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12685,7 +12987,7 @@ vcle_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcle_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] <= __b[0] ? -1ll : 0ll};
++  return (uint64x1_t) (__a <= __b);
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -12709,7 +13011,7 @@ vcle_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcle_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] <= __b[0] ? -1ll : 0ll};
++  return (__a <= __b);
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12833,7 +13135,7 @@ vclez_s32 (int32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vclez_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] <= 0ll ? -1ll : 0ll};
++  return (uint64x1_t) (__a <= __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -12927,7 +13229,7 @@ vclt_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vclt_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] < __b[0] ? -1ll : 0ll};
++  return (uint64x1_t) (__a < __b);
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -12951,7 +13253,7 @@ vclt_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vclt_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) {__a[0] < __b[0] ? -1ll : 0ll};
++  return (__a < __b);
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -13075,7 +13377,7 @@ vcltz_s32 (int32x2_t __a)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vcltz_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t) {__a[0] < 0ll ? -1ll : 0ll};
++  return (uint64x1_t) (__a < __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+@@ -13286,6 +13588,18 @@ vcntq_u8 (uint8x16_t __a)
+ 
+ /* vcvt (double -> float).  */
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vcvt_f16_f32 (float32x4_t __a)
++{
++  return __builtin_aarch64_float_truncate_lo_v4hf (__a);
++}
++
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vcvt_high_f16_f32 (float16x4_t __a, float32x4_t __b)
++{
++  return __builtin_aarch64_float_truncate_hi_v8hf (__a, __b);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vcvt_f32_f64 (float64x2_t __a)
+ {
+@@ -13300,6 +13614,12 @@ vcvt_high_f32_f64 (float32x2_t __a, float64x2_t __b)
+ 
+ /* vcvt (float -> double).  */
+ 
++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
++vcvt_f32_f16 (float16x4_t __a)
++{
++  return __builtin_aarch64_float_extend_lo_v4sf (__a);
++}
++
+ __extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
+ vcvt_f64_f32 (float32x2_t __a)
+ {
+@@ -13307,6 +13627,12 @@ vcvt_f64_f32 (float32x2_t __a)
+   return __builtin_aarch64_float_extend_lo_v2df (__a);
+ }
+ 
++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
++vcvt_high_f32_f16 (float16x8_t __a)
++{
++  return __builtin_aarch64_vec_unpacks_hi_v8hf (__a);
++}
++
+ __extension__ static __inline float64x2_t __attribute__ ((__always_inline__))
+ vcvt_high_f64_f32 (float32x4_t __a)
+ {
+@@ -13410,9 +13736,7 @@ vcvt_s32_f32 (float32x2_t __a)
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vcvt_u32_f32 (float32x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x2_t) __builtin_aarch64_lbtruncuv2sfv2si (__a);
++  return __builtin_aarch64_lbtruncuv2sfv2si_us (__a);
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+@@ -13424,9 +13748,19 @@ vcvtq_s32_f32 (float32x4_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vcvtq_u32_f32 (float32x4_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x4_t) __builtin_aarch64_lbtruncuv4sfv4si (__a);
++  return __builtin_aarch64_lbtruncuv4sfv4si_us (__a);
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vcvt_s64_f64 (float64x1_t __a)
++{
++  return (int64x1_t) {vcvtd_s64_f64 (__a[0])};
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vcvt_u64_f64 (float64x1_t __a)
++{
++  return (uint64x1_t) {vcvtd_u64_f64 (__a[0])};
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+@@ -13438,9 +13772,7 @@ vcvtq_s64_f64 (float64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vcvtq_u64_f64 (float64x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint64x2_t) __builtin_aarch64_lbtruncuv2dfv2di (__a);
++  return __builtin_aarch64_lbtruncuv2dfv2di_us (__a);
+ }
+ 
+ /* vcvta  */
+@@ -13454,7 +13786,7 @@ vcvtad_s64_f64 (float64_t __a)
+ __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+ vcvtad_u64_f64 (float64_t __a)
+ {
+-  return __builtin_aarch64_lroundudfdi (__a);
++  return __builtin_aarch64_lroundudfdi_us (__a);
+ }
+ 
+ __extension__ static __inline int32_t __attribute__ ((__always_inline__))
+@@ -13466,7 +13798,7 @@ vcvtas_s32_f32 (float32_t __a)
+ __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ vcvtas_u32_f32 (float32_t __a)
+ {
+-  return __builtin_aarch64_lroundusfsi (__a);
++  return __builtin_aarch64_lroundusfsi_us (__a);
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+@@ -13478,9 +13810,7 @@ vcvta_s32_f32 (float32x2_t __a)
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vcvta_u32_f32 (float32x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x2_t) __builtin_aarch64_lrounduv2sfv2si (__a);
++  return __builtin_aarch64_lrounduv2sfv2si_us (__a);
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+@@ -13492,9 +13822,19 @@ vcvtaq_s32_f32 (float32x4_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vcvtaq_u32_f32 (float32x4_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x4_t) __builtin_aarch64_lrounduv4sfv4si (__a);
++  return __builtin_aarch64_lrounduv4sfv4si_us (__a);
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vcvta_s64_f64 (float64x1_t __a)
++{
++  return (int64x1_t) {vcvtad_s64_f64 (__a[0])};
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vcvta_u64_f64 (float64x1_t __a)
++{
++  return (uint64x1_t) {vcvtad_u64_f64 (__a[0])};
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+@@ -13506,9 +13846,7 @@ vcvtaq_s64_f64 (float64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vcvtaq_u64_f64 (float64x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint64x2_t) __builtin_aarch64_lrounduv2dfv2di (__a);
++  return __builtin_aarch64_lrounduv2dfv2di_us (__a);
+ }
+ 
+ /* vcvtm  */
+@@ -13522,7 +13860,7 @@ vcvtmd_s64_f64 (float64_t __a)
+ __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+ vcvtmd_u64_f64 (float64_t __a)
+ {
+-  return __builtin_aarch64_lfloorudfdi (__a);
++  return __builtin_aarch64_lfloorudfdi_us (__a);
+ }
+ 
+ __extension__ static __inline int32_t __attribute__ ((__always_inline__))
+@@ -13534,7 +13872,7 @@ vcvtms_s32_f32 (float32_t __a)
+ __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ vcvtms_u32_f32 (float32_t __a)
+ {
+-  return __builtin_aarch64_lfloorusfsi (__a);
++  return __builtin_aarch64_lfloorusfsi_us (__a);
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+@@ -13546,9 +13884,7 @@ vcvtm_s32_f32 (float32x2_t __a)
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vcvtm_u32_f32 (float32x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x2_t) __builtin_aarch64_lflooruv2sfv2si (__a);
++  return __builtin_aarch64_lflooruv2sfv2si_us (__a);
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+@@ -13560,9 +13896,19 @@ vcvtmq_s32_f32 (float32x4_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vcvtmq_u32_f32 (float32x4_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x4_t) __builtin_aarch64_lflooruv4sfv4si (__a);
++  return __builtin_aarch64_lflooruv4sfv4si_us (__a);
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vcvtm_s64_f64 (float64x1_t __a)
++{
++  return (int64x1_t) {vcvtmd_s64_f64 (__a[0])};
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vcvtm_u64_f64 (float64x1_t __a)
++{
++  return (uint64x1_t) {vcvtmd_u64_f64 (__a[0])};
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+@@ -13574,9 +13920,7 @@ vcvtmq_s64_f64 (float64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vcvtmq_u64_f64 (float64x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint64x2_t) __builtin_aarch64_lflooruv2dfv2di (__a);
++  return __builtin_aarch64_lflooruv2dfv2di_us (__a);
+ }
+ 
+ /* vcvtn  */
+@@ -13590,7 +13934,7 @@ vcvtnd_s64_f64 (float64_t __a)
+ __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+ vcvtnd_u64_f64 (float64_t __a)
+ {
+-  return __builtin_aarch64_lfrintnudfdi (__a);
++  return __builtin_aarch64_lfrintnudfdi_us (__a);
+ }
+ 
+ __extension__ static __inline int32_t __attribute__ ((__always_inline__))
+@@ -13602,7 +13946,7 @@ vcvtns_s32_f32 (float32_t __a)
+ __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ vcvtns_u32_f32 (float32_t __a)
+ {
+-  return __builtin_aarch64_lfrintnusfsi (__a);
++  return __builtin_aarch64_lfrintnusfsi_us (__a);
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+@@ -13614,9 +13958,7 @@ vcvtn_s32_f32 (float32x2_t __a)
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vcvtn_u32_f32 (float32x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x2_t) __builtin_aarch64_lfrintnuv2sfv2si (__a);
++  return __builtin_aarch64_lfrintnuv2sfv2si_us (__a);
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+@@ -13628,9 +13970,19 @@ vcvtnq_s32_f32 (float32x4_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vcvtnq_u32_f32 (float32x4_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x4_t) __builtin_aarch64_lfrintnuv4sfv4si (__a);
++  return __builtin_aarch64_lfrintnuv4sfv4si_us (__a);
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vcvtn_s64_f64 (float64x1_t __a)
++{
++  return (int64x1_t) {vcvtnd_s64_f64 (__a[0])};
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vcvtn_u64_f64 (float64x1_t __a)
++{
++  return (uint64x1_t) {vcvtnd_u64_f64 (__a[0])};
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+@@ -13642,9 +13994,7 @@ vcvtnq_s64_f64 (float64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vcvtnq_u64_f64 (float64x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint64x2_t) __builtin_aarch64_lfrintnuv2dfv2di (__a);
++  return __builtin_aarch64_lfrintnuv2dfv2di_us (__a);
+ }
+ 
+ /* vcvtp  */
+@@ -13658,7 +14008,7 @@ vcvtpd_s64_f64 (float64_t __a)
+ __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
+ vcvtpd_u64_f64 (float64_t __a)
+ {
+-  return __builtin_aarch64_lceiludfdi (__a);
++  return __builtin_aarch64_lceiludfdi_us (__a);
+ }
+ 
+ __extension__ static __inline int32_t __attribute__ ((__always_inline__))
+@@ -13670,7 +14020,7 @@ vcvtps_s32_f32 (float32_t __a)
+ __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ vcvtps_u32_f32 (float32_t __a)
+ {
+-  return __builtin_aarch64_lceilusfsi (__a);
++  return __builtin_aarch64_lceilusfsi_us (__a);
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+@@ -13682,9 +14032,7 @@ vcvtp_s32_f32 (float32x2_t __a)
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vcvtp_u32_f32 (float32x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x2_t) __builtin_aarch64_lceiluv2sfv2si (__a);
++  return __builtin_aarch64_lceiluv2sfv2si_us (__a);
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+@@ -13696,9 +14044,19 @@ vcvtpq_s32_f32 (float32x4_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vcvtpq_u32_f32 (float32x4_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint32x4_t) __builtin_aarch64_lceiluv4sfv4si (__a);
++  return __builtin_aarch64_lceiluv4sfv4si_us (__a);
++}
++
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vcvtp_s64_f64 (float64x1_t __a)
++{
++  return (int64x1_t) {vcvtpd_s64_f64 (__a[0])};
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vcvtp_u64_f64 (float64x1_t __a)
++{
++  return (uint64x1_t) {vcvtpd_u64_f64 (__a[0])};
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+@@ -13710,9 +14068,7 @@ vcvtpq_s64_f64 (float64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vcvtpq_u64_f64 (float64x2_t __a)
+ {
+-  /* TODO: This cast should go away when builtins have
+-     their correct types.  */
+-  return (uint64x2_t) __builtin_aarch64_lceiluv2dfv2di (__a);
++  return __builtin_aarch64_lceiluv2dfv2di_us (__a);
+ }
+ 
+ /* vdup_n  */
+@@ -14880,6 +15236,12 @@ vfmsq_laneq_f64 (float64x2_t __a, float64x2_t __b,
+ 
+ /* vld1 */
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_f16 (const float16_t *__a)
++{
++  return __builtin_aarch64_ld1v4hf (__a);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_f32 (const float32_t *a)
+ {
+@@ -14959,6 +15321,12 @@ vld1_u64 (const uint64_t *a)
+ 
+ /* vld1q */
+ 
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_f16 (const float16_t *__a)
++{
++  return __builtin_aarch64_ld1v8hf (__a);
++}
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_f32 (const float32_t *a)
+ {
+@@ -15039,6 +15407,13 @@ vld1q_u64 (const uint64_t *a)
+ 
+ /* vld1_dup  */
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_dup_f16 (const float16_t* __a)
++{
++  float16_t __f = *__a;
++  return (float16x4_t) { __f, __f, __f, __f };
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_dup_f32 (const float32_t* __a)
+ {
+@@ -15113,6 +15488,13 @@ vld1_dup_u64 (const uint64_t* __a)
+ 
+ /* vld1q_dup  */
+ 
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_dup_f16 (const float16_t* __a)
++{
++  float16_t __f = *__a;
++  return (float16x8_t) { __f, __f, __f, __f, __f, __f, __f, __f };
++}
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_dup_f32 (const float32_t* __a)
+ {
+@@ -15187,6 +15569,12 @@ vld1q_dup_u64 (const uint64_t* __a)
+ 
+ /* vld1_lane  */
+ 
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_lane_f16 (const float16_t *__src, float16x4_t __vec, const int __lane)
++{
++  return __aarch64_vset_lane_any (*__src, __vec, __lane);
++}
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_lane_f32 (const float32_t *__src, float32x2_t __vec, const int __lane)
+ {
+@@ -15261,6 +15649,12 @@ vld1_lane_u64 (const uint64_t *__src, uint64x1_t __vec, const int __lane)
+ 
+ /* vld1q_lane  */
+ 
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_lane_f16 (const float16_t *__src, float16x8_t __vec, const int __lane)
++{
++  return __aarch64_vset_lane_any (*__src, __vec, __lane);
++}
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_lane_f32 (const float32_t *__src, float32x4_t __vec, const int __lane)
+ {
+@@ -15456,6 +15850,17 @@ vld2_u32 (const uint32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x2_t __attribute__ ((__always_inline__))
++vld2_f16 (const float16_t * __a)
++{
++  float16x4x2_t ret;
++  __builtin_aarch64_simd_oi __o;
++  __o = __builtin_aarch64_ld2v4hf (__a);
++  ret.val[0] = __builtin_aarch64_get_dregoiv4hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_dregoiv4hf (__o, 1);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+ vld2_f32 (const float32_t * __a)
+ {
+@@ -15577,6 +15982,17 @@ vld2q_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x2_t __attribute__ ((__always_inline__))
++vld2q_f16 (const float16_t * __a)
++{
++  float16x8x2_t ret;
++  __builtin_aarch64_simd_oi __o;
++  __o = __builtin_aarch64_ld2v8hf (__a);
++  ret.val[0] = __builtin_aarch64_get_qregoiv8hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_qregoiv8hf (__o, 1);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+ vld2q_f32 (const float32_t * __a)
+ {
+@@ -15731,6 +16147,18 @@ vld3_u32 (const uint32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x3_t __attribute__ ((__always_inline__))
++vld3_f16 (const float16_t * __a)
++{
++  float16x4x3_t ret;
++  __builtin_aarch64_simd_ci __o;
++  __o = __builtin_aarch64_ld3v4hf (__a);
++  ret.val[0] = __builtin_aarch64_get_dregciv4hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_dregciv4hf (__o, 1);
++  ret.val[2] = __builtin_aarch64_get_dregciv4hf (__o, 2);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+ vld3_f32 (const float32_t * __a)
+ {
+@@ -15863,6 +16291,18 @@ vld3q_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x3_t __attribute__ ((__always_inline__))
++vld3q_f16 (const float16_t * __a)
++{
++  float16x8x3_t ret;
++  __builtin_aarch64_simd_ci __o;
++  __o = __builtin_aarch64_ld3v8hf (__a);
++  ret.val[0] = __builtin_aarch64_get_qregciv8hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_qregciv8hf (__o, 1);
++  ret.val[2] = __builtin_aarch64_get_qregciv8hf (__o, 2);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+ vld3q_f32 (const float32_t * __a)
+ {
+@@ -16030,6 +16470,19 @@ vld4_u32 (const uint32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x4_t __attribute__ ((__always_inline__))
++vld4_f16 (const float16_t * __a)
++{
++  float16x4x4_t ret;
++  __builtin_aarch64_simd_xi __o;
++  __o = __builtin_aarch64_ld4v4hf (__a);
++  ret.val[0] = __builtin_aarch64_get_dregxiv4hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_dregxiv4hf (__o, 1);
++  ret.val[2] = __builtin_aarch64_get_dregxiv4hf (__o, 2);
++  ret.val[3] = __builtin_aarch64_get_dregxiv4hf (__o, 3);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+ vld4_f32 (const float32_t * __a)
+ {
+@@ -16173,6 +16626,19 @@ vld4q_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x4_t __attribute__ ((__always_inline__))
++vld4q_f16 (const float16_t * __a)
++{
++  float16x8x4_t ret;
++  __builtin_aarch64_simd_xi __o;
++  __o = __builtin_aarch64_ld4v8hf (__a);
++  ret.val[0] = __builtin_aarch64_get_qregxiv8hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_qregxiv8hf (__o, 1);
++  ret.val[2] = __builtin_aarch64_get_qregxiv8hf (__o, 2);
++  ret.val[3] = __builtin_aarch64_get_qregxiv8hf (__o, 3);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+ vld4q_f32 (const float32_t * __a)
+ {
+@@ -16234,6 +16700,17 @@ vld2_dup_s32 (const int32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x2_t __attribute__ ((__always_inline__))
++vld2_dup_f16 (const float16_t * __a)
++{
++  float16x4x2_t ret;
++  __builtin_aarch64_simd_oi __o;
++  __o = __builtin_aarch64_ld2rv4hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = __builtin_aarch64_get_dregoiv4hf (__o, 0);
++  ret.val[1] = (float16x4_t) __builtin_aarch64_get_dregoiv4hf (__o, 1);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+ vld2_dup_f32 (const float32_t * __a)
+ {
+@@ -16443,6 +16920,17 @@ vld2q_dup_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x2_t __attribute__ ((__always_inline__))
++vld2q_dup_f16 (const float16_t * __a)
++{
++  float16x8x2_t ret;
++  __builtin_aarch64_simd_oi __o;
++  __o = __builtin_aarch64_ld2rv8hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = (float16x8_t) __builtin_aarch64_get_qregoiv8hf (__o, 0);
++  ret.val[1] = __builtin_aarch64_get_qregoiv8hf (__o, 1);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+ vld2q_dup_f32 (const float32_t * __a)
+ {
+@@ -16597,6 +17085,18 @@ vld3_dup_u32 (const uint32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x3_t __attribute__ ((__always_inline__))
++vld3_dup_f16 (const float16_t * __a)
++{
++  float16x4x3_t ret;
++  __builtin_aarch64_simd_ci __o;
++  __o = __builtin_aarch64_ld3rv4hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = (float16x4_t) __builtin_aarch64_get_dregciv4hf (__o, 0);
++  ret.val[1] = (float16x4_t) __builtin_aarch64_get_dregciv4hf (__o, 1);
++  ret.val[2] = (float16x4_t) __builtin_aarch64_get_dregciv4hf (__o, 2);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+ vld3_dup_f32 (const float32_t * __a)
+ {
+@@ -16729,6 +17229,18 @@ vld3q_dup_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x3_t __attribute__ ((__always_inline__))
++vld3q_dup_f16 (const float16_t * __a)
++{
++  float16x8x3_t ret;
++  __builtin_aarch64_simd_ci __o;
++  __o = __builtin_aarch64_ld3rv8hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = (float16x8_t) __builtin_aarch64_get_qregciv8hf (__o, 0);
++  ret.val[1] = (float16x8_t) __builtin_aarch64_get_qregciv8hf (__o, 1);
++  ret.val[2] = (float16x8_t) __builtin_aarch64_get_qregciv8hf (__o, 2);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+ vld3q_dup_f32 (const float32_t * __a)
+ {
+@@ -16896,6 +17408,19 @@ vld4_dup_u32 (const uint32_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x4x4_t __attribute__ ((__always_inline__))
++vld4_dup_f16 (const float16_t * __a)
++{
++  float16x4x4_t ret;
++  __builtin_aarch64_simd_xi __o;
++  __o = __builtin_aarch64_ld4rv4hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = (float16x4_t) __builtin_aarch64_get_dregxiv4hf (__o, 0);
++  ret.val[1] = (float16x4_t) __builtin_aarch64_get_dregxiv4hf (__o, 1);
++  ret.val[2] = (float16x4_t) __builtin_aarch64_get_dregxiv4hf (__o, 2);
++  ret.val[3] = (float16x4_t) __builtin_aarch64_get_dregxiv4hf (__o, 3);
++  return ret;
++}
++
+ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+ vld4_dup_f32 (const float32_t * __a)
+ {
+@@ -17039,6 +17564,19 @@ vld4q_dup_u64 (const uint64_t * __a)
+   return ret;
+ }
+ 
++__extension__ static __inline float16x8x4_t __attribute__ ((__always_inline__))
++vld4q_dup_f16 (const float16_t * __a)
++{
++  float16x8x4_t ret;
++  __builtin_aarch64_simd_xi __o;
++  __o = __builtin_aarch64_ld4rv8hf ((const __builtin_aarch64_simd_hf *) __a);
++  ret.val[0] = (float16x8_t) __builtin_aarch64_get_qregxiv8hf (__o, 0);
++  ret.val[1] = (float16x8_t) __builtin_aarch64_get_qregxiv8hf (__o, 1);
++  ret.val[2] = (float16x8_t) __builtin_aarch64_get_qregxiv8hf (__o, 2);
++  ret.val[3] = (float16x8_t) __builtin_aarch64_get_qregxiv8hf (__o, 3);
++  return ret;
++}
++
+ __extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+ vld4q_dup_f32 (const float32_t * __a)
+ {
+@@ -17067,8 +17605,8 @@ vld4q_dup_f64 (const float64_t * __a)
+ 
+ /* vld2_lane */
+ 
+-#define __LD2_LANE_FUNC(intype, vectype, largetype, ptrtype,		   \
+-			 mode, ptrmode, funcsuffix, signedtype)		   \
++#define __LD2_LANE_FUNC(intype, vectype, largetype, ptrtype, mode,	   \
++			 qmode, ptrmode, funcsuffix, signedtype)	   \
+ __extension__ static __inline intype __attribute__ ((__always_inline__))   \
+ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+ {									   \
+@@ -17078,12 +17616,12 @@ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+     vcombine_##funcsuffix (__b.val[0], vcreate_##funcsuffix (0));	   \
+   __temp.val[1] =							   \
+     vcombine_##funcsuffix (__b.val[1], vcreate_##funcsuffix (0));	   \
+-  __o = __builtin_aarch64_set_qregoi##mode (__o,			   \
+-					   (signedtype) __temp.val[0],	   \
+-					   0);				   \
+-  __o = __builtin_aarch64_set_qregoi##mode (__o,			   \
+-					   (signedtype) __temp.val[1],	   \
+-					   1);				   \
++  __o = __builtin_aarch64_set_qregoi##qmode (__o,			   \
++					    (signedtype) __temp.val[0],	   \
++					    0);				   \
++  __o = __builtin_aarch64_set_qregoi##qmode (__o,			   \
++					    (signedtype) __temp.val[1],	   \
++					    1);				   \
+   __o =	__builtin_aarch64_ld2_lane##mode (				   \
+ 	  (__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c);	   \
+   __b.val[0] = (vectype) __builtin_aarch64_get_dregoidi (__o, 0);	   \
+@@ -17091,29 +17629,31 @@ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+   return __b;								   \
+ }
+ 
+-__LD2_LANE_FUNC (float32x2x2_t, float32x2_t, float32x4x2_t, float32_t, v4sf,
++__LD2_LANE_FUNC (float16x4x2_t, float16x4_t, float16x8x2_t, float16_t, v4hf,
++		 v8hf, hf, f16, float16x8_t)
++__LD2_LANE_FUNC (float32x2x2_t, float32x2_t, float32x4x2_t, float32_t, v2sf, v4sf,
+ 		 sf, f32, float32x4_t)
+-__LD2_LANE_FUNC (float64x1x2_t, float64x1_t, float64x2x2_t, float64_t, v2df,
++__LD2_LANE_FUNC (float64x1x2_t, float64x1_t, float64x2x2_t, float64_t, df, v2df,
+ 		 df, f64, float64x2_t)
+-__LD2_LANE_FUNC (poly8x8x2_t, poly8x8_t, poly8x16x2_t, poly8_t, v16qi, qi, p8,
++__LD2_LANE_FUNC (poly8x8x2_t, poly8x8_t, poly8x16x2_t, poly8_t, v8qi, v16qi, qi, p8,
+ 		 int8x16_t)
+-__LD2_LANE_FUNC (poly16x4x2_t, poly16x4_t, poly16x8x2_t, poly16_t, v8hi, hi,
++__LD2_LANE_FUNC (poly16x4x2_t, poly16x4_t, poly16x8x2_t, poly16_t, v4hi, v8hi, hi,
+ 		 p16, int16x8_t)
+-__LD2_LANE_FUNC (int8x8x2_t, int8x8_t, int8x16x2_t, int8_t, v16qi, qi, s8,
++__LD2_LANE_FUNC (int8x8x2_t, int8x8_t, int8x16x2_t, int8_t, v8qi, v16qi, qi, s8,
+ 		 int8x16_t)
+-__LD2_LANE_FUNC (int16x4x2_t, int16x4_t, int16x8x2_t, int16_t, v8hi, hi, s16,
++__LD2_LANE_FUNC (int16x4x2_t, int16x4_t, int16x8x2_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__LD2_LANE_FUNC (int32x2x2_t, int32x2_t, int32x4x2_t, int32_t, v4si, si, s32,
++__LD2_LANE_FUNC (int32x2x2_t, int32x2_t, int32x4x2_t, int32_t, v2si, v4si, si, s32,
+ 		 int32x4_t)
+-__LD2_LANE_FUNC (int64x1x2_t, int64x1_t, int64x2x2_t, int64_t, v2di, di, s64,
++__LD2_LANE_FUNC (int64x1x2_t, int64x1_t, int64x2x2_t, int64_t, di, v2di, di, s64,
+ 		 int64x2_t)
+-__LD2_LANE_FUNC (uint8x8x2_t, uint8x8_t, uint8x16x2_t, uint8_t, v16qi, qi, u8,
++__LD2_LANE_FUNC (uint8x8x2_t, uint8x8_t, uint8x16x2_t, uint8_t, v8qi, v16qi, qi, u8,
+ 		 int8x16_t)
+-__LD2_LANE_FUNC (uint16x4x2_t, uint16x4_t, uint16x8x2_t, uint16_t, v8hi, hi,
++__LD2_LANE_FUNC (uint16x4x2_t, uint16x4_t, uint16x8x2_t, uint16_t, v4hi, v8hi, hi,
+ 		 u16, int16x8_t)
+-__LD2_LANE_FUNC (uint32x2x2_t, uint32x2_t, uint32x4x2_t, uint32_t, v4si, si,
++__LD2_LANE_FUNC (uint32x2x2_t, uint32x2_t, uint32x4x2_t, uint32_t, v2si, v4si, si,
+ 		 u32, int32x4_t)
+-__LD2_LANE_FUNC (uint64x1x2_t, uint64x1_t, uint64x2x2_t, uint64_t, v2di, di,
++__LD2_LANE_FUNC (uint64x1x2_t, uint64x1_t, uint64x2x2_t, uint64_t, di, v2di, di,
+ 		 u64, int64x2_t)
+ 
+ #undef __LD2_LANE_FUNC
+@@ -17135,6 +17675,7 @@ vld2q_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
+   return ret;								   \
+ }
+ 
++__LD2_LANE_FUNC (float16x8x2_t, float16x8_t, float16_t, v8hf, hf, f16)
+ __LD2_LANE_FUNC (float32x4x2_t, float32x4_t, float32_t, v4sf, sf, f32)
+ __LD2_LANE_FUNC (float64x2x2_t, float64x2_t, float64_t, v2df, df, f64)
+ __LD2_LANE_FUNC (poly8x16x2_t, poly8x16_t, poly8_t, v16qi, qi, p8)
+@@ -17152,8 +17693,8 @@ __LD2_LANE_FUNC (uint64x2x2_t, uint64x2_t, uint64_t, v2di, di, u64)
+ 
+ /* vld3_lane */
+ 
+-#define __LD3_LANE_FUNC(intype, vectype, largetype, ptrtype,		   \
+-			 mode, ptrmode, funcsuffix, signedtype)		   \
++#define __LD3_LANE_FUNC(intype, vectype, largetype, ptrtype, mode,	   \
++			 qmode, ptrmode, funcsuffix, signedtype)	   \
+ __extension__ static __inline intype __attribute__ ((__always_inline__))   \
+ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+ {									   \
+@@ -17165,15 +17706,15 @@ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+     vcombine_##funcsuffix (__b.val[1], vcreate_##funcsuffix (0));	   \
+   __temp.val[2] =							   \
+     vcombine_##funcsuffix (__b.val[2], vcreate_##funcsuffix (0));	   \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			   \
+-					   (signedtype) __temp.val[0],	   \
+-					   0);				   \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			   \
+-					   (signedtype) __temp.val[1],	   \
+-					   1);				   \
+-  __o = __builtin_aarch64_set_qregci##mode (__o,			   \
+-					   (signedtype) __temp.val[2],	   \
+-					   2);				   \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			   \
++					    (signedtype) __temp.val[0],	   \
++					    0);				   \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			   \
++					    (signedtype) __temp.val[1],	   \
++					    1);				   \
++  __o = __builtin_aarch64_set_qregci##qmode (__o,			   \
++					    (signedtype) __temp.val[2],	   \
++					    2);				   \
+   __o =	__builtin_aarch64_ld3_lane##mode (				   \
+ 	  (__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c);	   \
+   __b.val[0] = (vectype) __builtin_aarch64_get_dregcidi (__o, 0);	   \
+@@ -17182,29 +17723,31 @@ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+   return __b;								   \
+ }
+ 
+-__LD3_LANE_FUNC (float32x2x3_t, float32x2_t, float32x4x3_t, float32_t, v4sf,
++__LD3_LANE_FUNC (float16x4x3_t, float16x4_t, float16x8x3_t, float16_t, v4hf,
++		 v8hf, hf, f16, float16x8_t)
++__LD3_LANE_FUNC (float32x2x3_t, float32x2_t, float32x4x3_t, float32_t, v2sf, v4sf,
+ 		 sf, f32, float32x4_t)
+-__LD3_LANE_FUNC (float64x1x3_t, float64x1_t, float64x2x3_t, float64_t, v2df,
++__LD3_LANE_FUNC (float64x1x3_t, float64x1_t, float64x2x3_t, float64_t, df, v2df,
+ 		 df, f64, float64x2_t)
+-__LD3_LANE_FUNC (poly8x8x3_t, poly8x8_t, poly8x16x3_t, poly8_t, v16qi, qi, p8,
++__LD3_LANE_FUNC (poly8x8x3_t, poly8x8_t, poly8x16x3_t, poly8_t, v8qi, v16qi, qi, p8,
+ 		 int8x16_t)
+-__LD3_LANE_FUNC (poly16x4x3_t, poly16x4_t, poly16x8x3_t, poly16_t, v8hi, hi,
++__LD3_LANE_FUNC (poly16x4x3_t, poly16x4_t, poly16x8x3_t, poly16_t, v4hi, v8hi, hi,
+ 		 p16, int16x8_t)
+-__LD3_LANE_FUNC (int8x8x3_t, int8x8_t, int8x16x3_t, int8_t, v16qi, qi, s8,
++__LD3_LANE_FUNC (int8x8x3_t, int8x8_t, int8x16x3_t, int8_t, v8qi, v16qi, qi, s8,
+ 		 int8x16_t)
+-__LD3_LANE_FUNC (int16x4x3_t, int16x4_t, int16x8x3_t, int16_t, v8hi, hi, s16,
++__LD3_LANE_FUNC (int16x4x3_t, int16x4_t, int16x8x3_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__LD3_LANE_FUNC (int32x2x3_t, int32x2_t, int32x4x3_t, int32_t, v4si, si, s32,
++__LD3_LANE_FUNC (int32x2x3_t, int32x2_t, int32x4x3_t, int32_t, v2si, v4si, si, s32,
+ 		 int32x4_t)
+-__LD3_LANE_FUNC (int64x1x3_t, int64x1_t, int64x2x3_t, int64_t, v2di, di, s64,
++__LD3_LANE_FUNC (int64x1x3_t, int64x1_t, int64x2x3_t, int64_t, di, v2di, di, s64,
+ 		 int64x2_t)
+-__LD3_LANE_FUNC (uint8x8x3_t, uint8x8_t, uint8x16x3_t, uint8_t, v16qi, qi, u8,
++__LD3_LANE_FUNC (uint8x8x3_t, uint8x8_t, uint8x16x3_t, uint8_t, v8qi, v16qi, qi, u8,
+ 		 int8x16_t)
+-__LD3_LANE_FUNC (uint16x4x3_t, uint16x4_t, uint16x8x3_t, uint16_t, v8hi, hi,
++__LD3_LANE_FUNC (uint16x4x3_t, uint16x4_t, uint16x8x3_t, uint16_t, v4hi, v8hi, hi,
+ 		 u16, int16x8_t)
+-__LD3_LANE_FUNC (uint32x2x3_t, uint32x2_t, uint32x4x3_t, uint32_t, v4si, si,
++__LD3_LANE_FUNC (uint32x2x3_t, uint32x2_t, uint32x4x3_t, uint32_t, v2si, v4si, si,
+ 		 u32, int32x4_t)
+-__LD3_LANE_FUNC (uint64x1x3_t, uint64x1_t, uint64x2x3_t, uint64_t, v2di, di,
++__LD3_LANE_FUNC (uint64x1x3_t, uint64x1_t, uint64x2x3_t, uint64_t, di, v2di, di,
+ 		 u64, int64x2_t)
+ 
+ #undef __LD3_LANE_FUNC
+@@ -17228,6 +17771,7 @@ vld3q_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
+   return ret;								   \
+ }
+ 
++__LD3_LANE_FUNC (float16x8x3_t, float16x8_t, float16_t, v8hf, hf, f16)
+ __LD3_LANE_FUNC (float32x4x3_t, float32x4_t, float32_t, v4sf, sf, f32)
+ __LD3_LANE_FUNC (float64x2x3_t, float64x2_t, float64_t, v2df, df, f64)
+ __LD3_LANE_FUNC (poly8x16x3_t, poly8x16_t, poly8_t, v16qi, qi, p8)
+@@ -17245,8 +17789,8 @@ __LD3_LANE_FUNC (uint64x2x3_t, uint64x2_t, uint64_t, v2di, di, u64)
+ 
+ /* vld4_lane */
+ 
+-#define __LD4_LANE_FUNC(intype, vectype, largetype, ptrtype,		   \
+-			 mode, ptrmode, funcsuffix, signedtype)		   \
++#define __LD4_LANE_FUNC(intype, vectype, largetype, ptrtype, mode,	   \
++			 qmode, ptrmode, funcsuffix, signedtype)	   \
+ __extension__ static __inline intype __attribute__ ((__always_inline__))   \
+ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+ {									   \
+@@ -17260,18 +17804,18 @@ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+     vcombine_##funcsuffix (__b.val[2], vcreate_##funcsuffix (0));	   \
+   __temp.val[3] =							   \
+     vcombine_##funcsuffix (__b.val[3], vcreate_##funcsuffix (0));	   \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			   \
+-					   (signedtype) __temp.val[0],	   \
+-					   0);				   \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			   \
+-					   (signedtype) __temp.val[1],	   \
+-					   1);				   \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			   \
+-					   (signedtype) __temp.val[2],	   \
+-					   2);				   \
+-  __o = __builtin_aarch64_set_qregxi##mode (__o,			   \
+-					   (signedtype) __temp.val[3],	   \
+-					   3);				   \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			   \
++					    (signedtype) __temp.val[0],	   \
++					    0);				   \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			   \
++					    (signedtype) __temp.val[1],	   \
++					    1);				   \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			   \
++					    (signedtype) __temp.val[2],	   \
++					    2);				   \
++  __o = __builtin_aarch64_set_qregxi##qmode (__o,			   \
++					    (signedtype) __temp.val[3],	   \
++					    3);				   \
+   __o =	__builtin_aarch64_ld4_lane##mode (				   \
+ 	  (__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c);	   \
+   __b.val[0] = (vectype) __builtin_aarch64_get_dregxidi (__o, 0);	   \
+@@ -17283,29 +17827,31 @@ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c)  \
+ 
+ /* vld4q_lane */
+ 
+-__LD4_LANE_FUNC (float32x2x4_t, float32x2_t, float32x4x4_t, float32_t, v4sf,
++__LD4_LANE_FUNC (float16x4x4_t, float16x4_t, float16x8x4_t, float16_t, v4hf,
++		 v8hf, hf, f16, float16x8_t)
++__LD4_LANE_FUNC (float32x2x4_t, float32x2_t, float32x4x4_t, float32_t, v2sf, v4sf,
+ 		 sf, f32, float32x4_t)
+-__LD4_LANE_FUNC (float64x1x4_t, float64x1_t, float64x2x4_t, float64_t, v2df,
++__LD4_LANE_FUNC (float64x1x4_t, float64x1_t, float64x2x4_t, float64_t, df, v2df,
+ 		 df, f64, float64x2_t)
+-__LD4_LANE_FUNC (poly8x8x4_t, poly8x8_t, poly8x16x4_t, poly8_t, v16qi, qi, p8,
++__LD4_LANE_FUNC (poly8x8x4_t, poly8x8_t, poly8x16x4_t, poly8_t, v8qi, v16qi, qi, p8,
+ 		 int8x16_t)
+-__LD4_LANE_FUNC (poly16x4x4_t, poly16x4_t, poly16x8x4_t, poly16_t, v8hi, hi,
++__LD4_LANE_FUNC (poly16x4x4_t, poly16x4_t, poly16x8x4_t, poly16_t, v4hi, v8hi, hi,
+ 		 p16, int16x8_t)
+-__LD4_LANE_FUNC (int8x8x4_t, int8x8_t, int8x16x4_t, int8_t, v16qi, qi, s8,
++__LD4_LANE_FUNC (int8x8x4_t, int8x8_t, int8x16x4_t, int8_t, v8qi, v16qi, qi, s8,
+ 		 int8x16_t)
+-__LD4_LANE_FUNC (int16x4x4_t, int16x4_t, int16x8x4_t, int16_t, v8hi, hi, s16,
++__LD4_LANE_FUNC (int16x4x4_t, int16x4_t, int16x8x4_t, int16_t, v4hi, v8hi, hi, s16,
+ 		 int16x8_t)
+-__LD4_LANE_FUNC (int32x2x4_t, int32x2_t, int32x4x4_t, int32_t, v4si, si, s32,
++__LD4_LANE_FUNC (int32x2x4_t, int32x2_t, int32x4x4_t, int32_t, v2si, v4si, si, s32,
+ 		 int32x4_t)
+-__LD4_LANE_FUNC (int64x1x4_t, int64x1_t, int64x2x4_t, int64_t, v2di, di, s64,
++__LD4_LANE_FUNC (int64x1x4_t, int64x1_t, int64x2x4_t, int64_t, di, v2di, di, s64,
+ 		 int64x2_t)
+-__LD4_LANE_FUNC (uint8x8x4_t, uint8x8_t, uint8x16x4_t, uint8_t, v16qi, qi, u8,
++__LD4_LANE_FUNC (uint8x8x4_t, uint8x8_t, uint8x16x4_t, uint8_t, v8qi, v16qi, qi, u8,
+ 		 int8x16_t)
+-__LD4_LANE_FUNC (uint16x4x4_t, uint16x4_t, uint16x8x4_t, uint16_t, v8hi, hi,
++__LD4_LANE_FUNC (uint16x4x4_t, uint16x4_t, uint16x8x4_t, uint16_t, v4hi, v8hi, hi,
+ 		 u16, int16x8_t)
+-__LD4_LANE_FUNC (uint32x2x4_t, uint32x2_t, uint32x4x4_t, uint32_t, v4si, si,
++__LD4_LANE_FUNC (uint32x2x4_t, uint32x2_t, uint32x4x4_t, uint32_t, v2si, v4si, si,
+ 		 u32, int32x4_t)
+-__LD4_LANE_FUNC (uint64x1x4_t, uint64x1_t, uint64x2x4_t, uint64_t, v2di, di,
++__LD4_LANE_FUNC (uint64x1x4_t, uint64x1_t, uint64x2x4_t, uint64_t, di, v2di, di,
+ 		 u64, int64x2_t)
+ 
+ #undef __LD4_LANE_FUNC
+@@ -17331,6 +17877,7 @@ vld4q_lane_##funcsuffix (const ptrtype * __ptr, intype __b, const int __c) \
+   return ret;								   \
+ }
+ 
++__LD4_LANE_FUNC (float16x8x4_t, float16x8_t, float16_t, v8hf, hf, f16)
+ __LD4_LANE_FUNC (float32x4x4_t, float32x4_t, float32_t, v4sf, sf, f32)
+ __LD4_LANE_FUNC (float64x2x4_t, float64x2_t, float64_t, v2df, df, f64)
+ __LD4_LANE_FUNC (poly8x16x4_t, poly8x16_t, poly8_t, v16qi, qi, p8)
+@@ -21317,82 +21864,85 @@ vrsrad_n_u64 (uint64_t __a, uint64_t __b, const int __c)
+   return __builtin_aarch64_ursra_ndi_uuus (__a, __b, __c);
+ }
+ 
+-#ifdef __ARM_FEATURE_CRYPTO
++#pragma GCC push_options
++#pragma GCC target ("+nothing+crypto")
+ 
+ /* vsha1  */
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+ {
+   return __builtin_aarch64_crypto_sha1cv4si_uuuu (hash_abcd, hash_e, wk);
+ }
+-static __inline uint32x4_t
++
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+ {
+   return __builtin_aarch64_crypto_sha1mv4si_uuuu (hash_abcd, hash_e, wk);
+ }
+-static __inline uint32x4_t
++
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
+ {
+   return __builtin_aarch64_crypto_sha1pv4si_uuuu (hash_abcd, hash_e, wk);
+ }
+ 
+-static __inline uint32_t
++__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+ vsha1h_u32 (uint32_t hash_e)
+ {
+   return __builtin_aarch64_crypto_sha1hsi_uu (hash_e);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
+ {
+   return __builtin_aarch64_crypto_sha1su0v4si_uuuu (w0_3, w4_7, w8_11);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
+ {
+   return __builtin_aarch64_crypto_sha1su1v4si_uuu (tw0_3, w12_15);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
+ {
+   return __builtin_aarch64_crypto_sha256hv4si_uuuu (hash_abcd, hash_efgh, wk);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
+ {
+   return __builtin_aarch64_crypto_sha256h2v4si_uuuu (hash_efgh, hash_abcd, wk);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
+ {
+   return __builtin_aarch64_crypto_sha256su0v4si_uuu (w0_3, w4_7);
+ }
+ 
+-static __inline uint32x4_t
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
+ {
+   return __builtin_aarch64_crypto_sha256su1v4si_uuuu (tw0_3, w8_11, w12_15);
+ }
+ 
+-static __inline poly128_t
++__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vmull_p64 (poly64_t a, poly64_t b)
+ {
+   return
+     __builtin_aarch64_crypto_pmulldi_ppp (a, b);
+ }
+ 
+-static __inline poly128_t
++__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vmull_high_p64 (poly64x2_t a, poly64x2_t b)
+ {
+   return __builtin_aarch64_crypto_pmullv2di_ppp (a, b);
+ }
+ 
+-#endif
++#pragma GCC pop_options
+ 
+ /* vshl */
+ 
+@@ -22226,6 +22776,12 @@ vsrid_n_u64 (uint64_t __a, uint64_t __b, const int __c)
+ /* vst1 */
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_f16 (float16_t *__a, float16x4_t __b)
++{
++  __builtin_aarch64_st1v4hf (__a, __b);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1_f32 (float32_t *a, float32x2_t b)
+ {
+   __builtin_aarch64_st1v2sf ((__builtin_aarch64_simd_sf *) a, b);
+@@ -22302,6 +22858,14 @@ vst1_u64 (uint64_t *a, uint64x1_t b)
+   *a = b[0];
+ }
+ 
++/* vst1q */
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_f16 (float16_t *__a, float16x8_t __b)
++{
++  __builtin_aarch64_st1v8hf (__a, __b);
++}
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1q_f32 (float32_t *a, float32x4_t b)
+ {
+@@ -22314,8 +22878,6 @@ vst1q_f64 (float64_t *a, float64x2_t b)
+   __builtin_aarch64_st1v2df ((__builtin_aarch64_simd_df *) a, b);
+ }
+ 
+-/* vst1q */
+-
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1q_p8 (poly8_t *a, poly8x16_t b)
+ {
+@@ -22382,6 +22944,166 @@ vst1q_u64 (uint64_t *a, uint64x2_t b)
+ 			     (int64x2_t) b);
+ }
+ 
++/* vst1_lane */
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_f16 (float16_t *__a, float16x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_f32 (float32_t *__a, float32x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_f64 (float64_t *__a, float64x1_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_p8 (poly8_t *__a, poly8x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_p16 (poly16_t *__a, poly16x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_s8 (int8_t *__a, int8x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_s16 (int16_t *__a, int16x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_s32 (int32_t *__a, int32x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_s64 (int64_t *__a, int64x1_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_u8 (uint8_t *__a, uint8x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_u16 (uint16_t *__a, uint16x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_u32 (uint32_t *__a, uint32x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_u64 (uint64_t *__a, uint64x1_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++/* vst1q_lane */
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_f16 (float16_t *__a, float16x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_f32 (float32_t *__a, float32x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_f64 (float64_t *__a, float64x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_p8 (poly8_t *__a, poly8x16_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_p16 (poly16_t *__a, poly16x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_s8 (int8_t *__a, int8x16_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_s16 (int16_t *__a, int16x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_s32 (int32_t *__a, int32x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_s64 (int64_t *__a, int64x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_u8 (uint8_t *__a, uint8x16_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_u16 (uint16_t *__a, uint16x8_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_u32 (uint32_t *__a, uint32x4_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_u64 (uint64_t *__a, uint64x2_t __b, const int __lane)
++{
++  *__a = __aarch64_vget_lane_any (__b, __lane);
++}
++
+ /* vstn */
+ 
+ __extension__ static __inline void
+@@ -22517,6 +23239,18 @@ vst2_u32 (uint32_t * __a, uint32x2x2_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst2_f16 (float16_t * __a, float16x4x2_t val)
++{
++  __builtin_aarch64_simd_oi __o;
++  float16x8x2_t temp;
++  temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv8hf (__o, temp.val[1], 1);
++  __builtin_aarch64_st2v4hf (__a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2_f32 (float32_t * __a, float32x2x2_t val)
+ {
+   __builtin_aarch64_simd_oi __o;
+@@ -22619,6 +23353,15 @@ vst2q_u64 (uint64_t * __a, uint64x2x2_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst2q_f16 (float16_t * __a, float16x8x2_t val)
++{
++  __builtin_aarch64_simd_oi __o;
++  __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv8hf (__o, val.val[1], 1);
++  __builtin_aarch64_st2v8hf (__a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2q_f32 (float32_t * __a, float32x4x2_t val)
+ {
+   __builtin_aarch64_simd_oi __o;
+@@ -22791,6 +23534,20 @@ vst3_u32 (uint32_t * __a, uint32x2x3_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst3_f16 (float16_t * __a, float16x4x3_t val)
++{
++  __builtin_aarch64_simd_ci __o;
++  float16x8x3_t temp;
++  temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[2] = vcombine_f16 (val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[1], 1);
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) temp.val[2], 2);
++  __builtin_aarch64_st3v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst3_f32 (float32_t * __a, float32x2x3_t val)
+ {
+   __builtin_aarch64_simd_ci __o;
+@@ -22905,6 +23662,16 @@ vst3q_u64 (uint64_t * __a, uint64x2x3_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst3q_f16 (float16_t * __a, float16x8x3_t val)
++{
++  __builtin_aarch64_simd_ci __o;
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[0], 0);
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[1], 1);
++  __o = __builtin_aarch64_set_qregciv8hf (__o, (float16x8_t) val.val[2], 2);
++  __builtin_aarch64_st3v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst3q_f32 (float32_t * __a, float32x4x3_t val)
+ {
+   __builtin_aarch64_simd_ci __o;
+@@ -23101,6 +23868,22 @@ vst4_u32 (uint32_t * __a, uint32x2x4_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst4_f16 (float16_t * __a, float16x4x4_t val)
++{
++  __builtin_aarch64_simd_xi __o;
++  float16x8x4_t temp;
++  temp.val[0] = vcombine_f16 (val.val[0], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[1] = vcombine_f16 (val.val[1], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[2] = vcombine_f16 (val.val[2], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  temp.val[3] = vcombine_f16 (val.val[3], vcreate_f16 (__AARCH64_UINT64_C (0)));
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[1], 1);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[2], 2);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) temp.val[3], 3);
++  __builtin_aarch64_st4v4hf ((__builtin_aarch64_simd_hf *) __a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4_f32 (float32_t * __a, float32x2x4_t val)
+ {
+   __builtin_aarch64_simd_xi __o;
+@@ -23227,6 +24010,17 @@ vst4q_u64 (uint64_t * __a, uint64x2x4_t val)
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
++vst4q_f16 (float16_t * __a, float16x8x4_t val)
++{
++  __builtin_aarch64_simd_xi __o;
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[0], 0);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[1], 1);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[2], 2);
++  __o = __builtin_aarch64_set_qregxiv8hf (__o, (float16x8_t) val.val[3], 3);
++  __builtin_aarch64_st4v8hf ((__builtin_aarch64_simd_hf *) __a, __o);
++}
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4q_f32 (float32_t * __a, float32x4x4_t val)
+ {
+   __builtin_aarch64_simd_xi __o;
+@@ -23322,6 +24116,58 @@ vtbx3_p8 (poly8x8_t __r, poly8x8x3_t __tab, uint8x8_t __idx)
+   return vbsl_p8 (__mask, __tbl, __r);
+ }
+ 
++/* vtbx4  */
++
++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
++vtbx4_s8 (int8x8_t __r, int8x8x4_t __tab, int8x8_t __idx)
++{
++  int8x8_t result;
++  int8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
++  temp.val[0] = vcombine_s8 (__tab.val[0], __tab.val[1]);
++  temp.val[1] = vcombine_s8 (__tab.val[2], __tab.val[3]);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = __builtin_aarch64_tbx4v8qi (__r, __o, __idx);
++  return result;
++}
++
++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
++vtbx4_u8 (uint8x8_t __r, uint8x8x4_t __tab, uint8x8_t __idx)
++{
++  uint8x8_t result;
++  uint8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
++  temp.val[0] = vcombine_u8 (__tab.val[0], __tab.val[1]);
++  temp.val[1] = vcombine_u8 (__tab.val[2], __tab.val[3]);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (uint8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
++						  (int8x8_t)__idx);
++  return result;
++}
++
++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
++vtbx4_p8 (poly8x8_t __r, poly8x8x4_t __tab, uint8x8_t __idx)
++{
++  poly8x8_t result;
++  poly8x16x2_t temp;
++  __builtin_aarch64_simd_oi __o;
++  temp.val[0] = vcombine_p8 (__tab.val[0], __tab.val[1]);
++  temp.val[1] = vcombine_p8 (__tab.val[2], __tab.val[3]);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[0], 0);
++  __o = __builtin_aarch64_set_qregoiv16qi (__o,
++					   (int8x16_t) temp.val[1], 1);
++  result = (poly8x8_t)__builtin_aarch64_tbx4v8qi ((int8x8_t)__r, __o,
++						  (int8x8_t)__idx);
++  return result;
++}
++
+ /* vtrn */
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+@@ -23887,7 +24733,7 @@ vtst_s32 (int32x2_t __a, int32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vtst_s64 (int64x1_t __a, int64x1_t __b)
+ {
+-  return (uint64x1_t) {(__a[0] & __b[0]) ? -1ll : 0ll};
++  return (uint64x1_t) ((__a & __b) != __AARCH64_INT64_C (0));
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+@@ -23911,7 +24757,7 @@ vtst_u32 (uint32x2_t __a, uint32x2_t __b)
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vtst_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+-  return (uint64x1_t) {(__a[0] & __b[0]) ? -1ll : 0ll};
++  return ((__a & __b) != __AARCH64_UINT64_C (0));
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+@@ -25012,6 +25858,6 @@ __INTERLEAVE_LIST (zip)
+ #undef __aarch64_vdupq_laneq_u32
+ #undef __aarch64_vdupq_laneq_u64
+ 
+-#endif
++#pragma GCC pop_options
+ 
+ #endif
+--- a/src/gcc/config/aarch64/atomics.md
++++ b/src/gcc/config/aarch64/atomics.md
+@@ -18,16 +18,7 @@
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+-(define_c_enum "unspecv"
+- [
+-    UNSPECV_LX				; Represent a load-exclusive.
+-    UNSPECV_SX				; Represent a store-exclusive.
+-    UNSPECV_LDA				; Represent an atomic load or load-acquire.
+-    UNSPECV_STL				; Represent an atomic store or store-release.
+-    UNSPECV_ATOMIC_CMPSW		; Represent an atomic compare swap.
+-    UNSPECV_ATOMIC_EXCHG		; Represent an atomic exchange.
+-    UNSPECV_ATOMIC_OP			; Represent an atomic operation.
+-])
++;; Instruction patterns.
+ 
+ (define_expand "atomic_compare_and_swap<mode>"
+   [(match_operand:SI 0 "register_operand" "")			;; bool out
+@@ -45,10 +36,10 @@
+   }
+ )
+ 
+-(define_insn_and_split "atomic_compare_and_swap<mode>_1"
++(define_insn_and_split "aarch64_compare_and_swap<mode>"
+   [(set (reg:CC CC_REGNUM)					;; bool out
+     (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW))
+-   (set (match_operand:SI 0 "register_operand" "=&r")		;; val out
++   (set (match_operand:SI 0 "register_operand" "=&r")	   ;; val out
+     (zero_extend:SI
+       (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q"))) ;; memory
+    (set (match_dup 1)
+@@ -57,7 +48,7 @@
+        (match_operand:SHORT 3 "register_operand" "r")	;; desired
+        (match_operand:SI 4 "const_int_operand")		;; is_weak
+        (match_operand:SI 5 "const_int_operand")		;; mod_s
+-       (match_operand:SI 6 "const_int_operand")]		;; mod_f
++       (match_operand:SI 6 "const_int_operand")]	;; mod_f
+       UNSPECV_ATOMIC_CMPSW))
+    (clobber (match_scratch:SI 7 "=&r"))]
+   ""
+@@ -70,17 +61,17 @@
+   }
+ )
+ 
+-(define_insn_and_split "atomic_compare_and_swap<mode>_1"
++(define_insn_and_split "aarch64_compare_and_swap<mode>"
+   [(set (reg:CC CC_REGNUM)					;; bool out
+     (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW))
+    (set (match_operand:GPI 0 "register_operand" "=&r")		;; val out
+-    (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
++    (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q"))   ;; memory
+    (set (match_dup 1)
+     (unspec_volatile:GPI
+       [(match_operand:GPI 2 "aarch64_plus_operand" "rI")	;; expect
+        (match_operand:GPI 3 "register_operand" "r")		;; desired
+-       (match_operand:SI 4 "const_int_operand")		;; is_weak
+-       (match_operand:SI 5 "const_int_operand")		;; mod_s
++       (match_operand:SI 4 "const_int_operand")			;; is_weak
++       (match_operand:SI 5 "const_int_operand")			;; mod_s
+        (match_operand:SI 6 "const_int_operand")]		;; mod_f
+       UNSPECV_ATOMIC_CMPSW))
+    (clobber (match_scratch:SI 7 "=&r"))]
+@@ -94,7 +85,79 @@
+   }
+ )
+ 
+-(define_insn_and_split "atomic_exchange<mode>"
++(define_insn_and_split "aarch64_compare_and_swap<mode>_lse"
++  [(set (reg:CC CC_REGNUM)					;; bool out
++    (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW))
++   (set (match_operand:SI 0 "register_operand" "=&r")		;; val out
++    (zero_extend:SI
++      (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q"))) ;; memory
++   (set (match_dup 1)
++    (unspec_volatile:SHORT
++      [(match_operand:SI 2 "aarch64_plus_operand" "rI")	;; expected
++       (match_operand:SHORT 3 "register_operand" "r")	;; desired
++       (match_operand:SI 4 "const_int_operand")		;; is_weak
++       (match_operand:SI 5 "const_int_operand")		;; mod_s
++       (match_operand:SI 6 "const_int_operand")]	;; mod_f
++      UNSPECV_ATOMIC_CMPSW))]
++  "TARGET_LSE"
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_gen_atomic_cas (operands[0], operands[1],
++			    operands[2], operands[3],
++			    operands[5]);
++    DONE;
++  }
++)
++
++(define_insn_and_split "aarch64_compare_and_swap<mode>_lse"
++  [(set (reg:CC CC_REGNUM)					;; bool out
++    (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW))
++   (set (match_operand:GPI 0 "register_operand" "=&r")		;; val out
++    (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q"))   ;; memory
++   (set (match_dup 1)
++    (unspec_volatile:GPI
++      [(match_operand:GPI 2 "aarch64_plus_operand" "rI")	;; expect
++       (match_operand:GPI 3 "register_operand" "r")		;; desired
++       (match_operand:SI 4 "const_int_operand")			;; is_weak
++       (match_operand:SI 5 "const_int_operand")			;; mod_s
++       (match_operand:SI 6 "const_int_operand")]		;; mod_f
++      UNSPECV_ATOMIC_CMPSW))]
++  "TARGET_LSE"
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_gen_atomic_cas (operands[0], operands[1],
++			    operands[2], operands[3],
++			    operands[5]);
++    DONE;
++  }
++)
++
++(define_expand "atomic_exchange<mode>"
++ [(match_operand:ALLI 0 "register_operand" "")
++  (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
++  (match_operand:ALLI 2 "register_operand" "")
++  (match_operand:SI 3 "const_int_operand" "")]
++  ""
++  {
++    rtx (*gen) (rtx, rtx, rtx, rtx);
++
++    /* Use an atomic SWP when available.  */
++    if (TARGET_LSE)
++      gen = gen_aarch64_atomic_exchange<mode>_lse;
++    else
++      gen = gen_aarch64_atomic_exchange<mode>;
++
++    emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
++
++    DONE;
++  }
++)
++
++(define_insn_and_split "aarch64_atomic_exchange<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=&r")		;; output
+     (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
+    (set (match_dup 1)
+@@ -110,28 +173,87 @@
+   [(const_int 0)]
+   {
+     aarch64_split_atomic_op (SET, operands[0], NULL, operands[1],
+-			    operands[2], operands[3], operands[4]);
++			     operands[2], operands[3], operands[4]);
++    DONE;
++  }
++)
++
++(define_insn_and_split "aarch64_atomic_exchange<mode>_lse"
++  [(set (match_operand:ALLI 0 "register_operand" "=&r")
++    (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
++   (set (match_dup 1)
++    (unspec_volatile:ALLI
++      [(match_operand:ALLI 2 "register_operand" "r")
++       (match_operand:SI 3 "const_int_operand" "")]
++      UNSPECV_ATOMIC_EXCHG))]
++  "TARGET_LSE"
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_gen_atomic_ldop (SET, operands[0], NULL, operands[1],
++			     operands[2], operands[3]);
++    DONE;
++  }
++)
++
++(define_expand "atomic_<atomic_optab><mode>"
++ [(match_operand:ALLI 0 "aarch64_sync_memory_operand" "")
++  (atomic_op:ALLI
++   (match_operand:ALLI 1 "<atomic_op_operand>" "")
++   (match_operand:SI 2 "const_int_operand"))]
++  ""
++  {
++    rtx (*gen) (rtx, rtx, rtx);
++
++    /* Use an atomic load-operate instruction when possible.  */
++    if (aarch64_atomic_ldop_supported_p (<CODE>))
++      gen = gen_aarch64_atomic_<atomic_optab><mode>_lse;
++    else
++      gen = gen_aarch64_atomic_<atomic_optab><mode>;
++
++    emit_insn (gen (operands[0], operands[1], operands[2]));
++
++    DONE;
++  }
++)
++
++(define_insn_and_split "aarch64_atomic_<atomic_optab><mode>"
++ [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q")
++   (unspec_volatile:ALLI
++    [(atomic_op:ALLI (match_dup 0)
++      (match_operand:ALLI 1 "<atomic_op_operand>" "r<const_atomic>"))
++     (match_operand:SI 2 "const_int_operand")]
++    UNSPECV_ATOMIC_OP))
++  (clobber (reg:CC CC_REGNUM))
++  (clobber (match_scratch:ALLI 3 "=&r"))
++  (clobber (match_scratch:SI 4 "=&r"))]
++  ""
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_split_atomic_op (<CODE>, NULL, operands[3], operands[0],
++			     operands[1], operands[2], operands[4]);
+     DONE;
+   }
+ )
+ 
+-(define_insn_and_split "atomic_<atomic_optab><mode>"
++(define_insn_and_split "aarch64_atomic_<atomic_optab><mode>_lse"
+   [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q")
+     (unspec_volatile:ALLI
+       [(atomic_op:ALLI (match_dup 0)
+ 	(match_operand:ALLI 1 "<atomic_op_operand>" "r<const_atomic>"))
+-       (match_operand:SI 2 "const_int_operand")]		;; model
++       (match_operand:SI 2 "const_int_operand")]
+       UNSPECV_ATOMIC_OP))
+-       (clobber (reg:CC CC_REGNUM))
+-   (clobber (match_scratch:ALLI 3 "=&r"))
+-   (clobber (match_scratch:SI 4 "=&r"))]
+-  ""
++   (clobber (match_scratch:ALLI 3 "=&r"))]
++  "TARGET_LSE"
+   "#"
+   "&& reload_completed"
+   [(const_int 0)]
+   {
+-    aarch64_split_atomic_op (<CODE>, NULL, operands[3], operands[0],
+-			    operands[1], operands[2], operands[4]);
++    aarch64_gen_atomic_ldop (<CODE>, operands[3], NULL, operands[0],
++			     operands[1], operands[2]);
+     DONE;
+   }
+ )
+@@ -158,7 +280,30 @@
+   }
+ )
+ 
+-(define_insn_and_split "atomic_fetch_<atomic_optab><mode>"
++;; Load-operate-store, returning the updated memory data.
++
++(define_expand "atomic_fetch_<atomic_optab><mode>"
++ [(match_operand:ALLI 0 "register_operand" "")
++  (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
++  (atomic_op:ALLI
++   (match_operand:ALLI 2 "<atomic_op_operand>" "")
++   (match_operand:SI 3 "const_int_operand"))]
++ ""
++{
++  rtx (*gen) (rtx, rtx, rtx, rtx);
++
++  /* Use an atomic load-operate instruction when possible.  */
++  if (aarch64_atomic_ldop_supported_p (<CODE>))
++    gen = gen_aarch64_atomic_fetch_<atomic_optab><mode>_lse;
++  else
++    gen = gen_aarch64_atomic_fetch_<atomic_optab><mode>;
++
++  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
++
++  DONE;
++})
++
++(define_insn_and_split "aarch64_atomic_fetch_<atomic_optab><mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=&r")
+     (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
+    (set (match_dup 1)
+@@ -181,6 +326,26 @@
+   }
+ )
+ 
++(define_insn_and_split "aarch64_atomic_fetch_<atomic_optab><mode>_lse"
++  [(set (match_operand:ALLI 0 "register_operand" "=&r")
++    (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
++   (set (match_dup 1)
++    (unspec_volatile:ALLI
++      [(atomic_op:ALLI (match_dup 1)
++	(match_operand:ALLI 2 "<atomic_op_operand>" "r<const_atomic>"))
++       (match_operand:SI 3 "const_int_operand")]
++      UNSPECV_ATOMIC_LDOP))]
++  "TARGET_LSE"
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_gen_atomic_ldop (<CODE>, operands[0], NULL, operands[1],
++			     operands[2], operands[3]);
++    DONE;
++  }
++)
++
+ (define_insn_and_split "atomic_fetch_nand<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=&r")
+     (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
+@@ -205,7 +370,31 @@
+   }
+ )
+ 
+-(define_insn_and_split "atomic_<atomic_optab>_fetch<mode>"
++;; Load-operate-store, returning the original memory data.
++
++(define_expand "atomic_<atomic_optab>_fetch<mode>"
++ [(match_operand:ALLI 0 "register_operand" "")
++  (atomic_op:ALLI
++   (match_operand:ALLI 1 "aarch64_sync_memory_operand" "")
++   (match_operand:ALLI 2 "<atomic_op_operand>" ""))
++  (match_operand:SI 3 "const_int_operand")]
++ ""
++{
++  rtx (*gen) (rtx, rtx, rtx, rtx);
++  rtx value = operands[2];
++
++  /* Use an atomic load-operate instruction when possible.  */
++  if (aarch64_atomic_ldop_supported_p (<CODE>))
++    gen = gen_aarch64_atomic_<atomic_optab>_fetch<mode>_lse;
++  else
++    gen = gen_aarch64_atomic_<atomic_optab>_fetch<mode>;
++
++  emit_insn (gen (operands[0], operands[1], value, operands[3]));
++
++  DONE;
++})
++
++(define_insn_and_split "aarch64_atomic_<atomic_optab>_fetch<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=&r")
+     (atomic_op:ALLI
+       (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
+@@ -228,6 +417,29 @@
+   }
+ )
+ 
++(define_insn_and_split "aarch64_atomic_<atomic_optab>_fetch<mode>_lse"
++  [(set (match_operand:ALLI 0 "register_operand" "=&r")
++    (atomic_op:ALLI
++     (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
++     (match_operand:ALLI 2 "<atomic_op_operand>" "r<const_atomic>")))
++   (set (match_dup 1)
++    (unspec_volatile:ALLI
++      [(match_dup 1)
++       (match_dup 2)
++       (match_operand:SI 3 "const_int_operand")]
++      UNSPECV_ATOMIC_LDOP))
++     (clobber (match_scratch:ALLI 4 "=&r"))]
++  "TARGET_LSE"
++  "#"
++  "&& reload_completed"
++  [(const_int 0)]
++  {
++    aarch64_gen_atomic_ldop (<CODE>, operands[4], operands[0], operands[1],
++			     operands[2], operands[3]);
++    DONE;
++  }
++)
++
+ (define_insn_and_split "atomic_nand_fetch<mode>"
+   [(set (match_operand:ALLI 0 "register_operand" "=&r")
+     (not:ALLI
+@@ -269,7 +481,7 @@
+ )
+ 
+ (define_insn "atomic_store<mode>"
+-  [(set (match_operand:ALLI 0 "memory_operand" "=Q")
++  [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "=Q")
+     (unspec_volatile:ALLI
+       [(match_operand:ALLI 1 "general_operand" "rZ")
+        (match_operand:SI 2 "const_int_operand")]			;; model
+@@ -370,3 +582,100 @@
+       return "dmb\\tish";
+   }
+ )
++
++;; ARMv8.1 LSE instructions.
++
++;; Atomic swap with memory.
++(define_insn "aarch64_atomic_swp<mode>"
++ [(set (match_operand:ALLI 0 "register_operand" "+&r")
++   (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
++  (set (match_dup 1)
++   (unspec_volatile:ALLI
++    [(match_operand:ALLI 2 "register_operand" "r")
++     (match_operand:SI 3 "const_int_operand" "")]
++    UNSPECV_ATOMIC_SWP))]
++  "TARGET_LSE && reload_completed"
++  {
++    enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
++    if (is_mm_relaxed (model))
++      return "swp<atomic_sfx>\t%<w>2, %<w>0, %1";
++    else if (is_mm_acquire (model) || is_mm_consume (model))
++      return "swpa<atomic_sfx>\t%<w>2, %<w>0, %1";
++    else if (is_mm_release (model))
++      return "swpl<atomic_sfx>\t%<w>2, %<w>0, %1";
++    else
++      return "swpal<atomic_sfx>\t%<w>2, %<w>0, %1";
++  })
++
++;; Atomic compare-and-swap: HI and smaller modes.
++
++(define_insn "aarch64_atomic_cas<mode>"
++ [(set (match_operand:SI 0 "register_operand" "+&r")		  ;; out
++   (zero_extend:SI
++    (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q")))  ;; memory.
++  (set (match_dup 1)
++   (unspec_volatile:SHORT
++    [(match_dup 0)
++     (match_operand:SHORT 2 "register_operand" "r")	;; value.
++     (match_operand:SI 3 "const_int_operand" "")]	;; model.
++    UNSPECV_ATOMIC_CAS))]
++ "TARGET_LSE && reload_completed"
++{
++  enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
++  if (is_mm_relaxed (model))
++    return "cas<atomic_sfx>\t%<w>0, %<w>2, %1";
++  else if (is_mm_acquire (model) || is_mm_consume (model))
++    return "casa<atomic_sfx>\t%<w>0, %<w>2, %1";
++  else if (is_mm_release (model))
++    return "casl<atomic_sfx>\t%<w>0, %<w>2, %1";
++  else
++    return "casal<atomic_sfx>\t%<w>0, %<w>2, %1";
++})
++
++;; Atomic compare-and-swap: SI and larger modes.
++
++(define_insn "aarch64_atomic_cas<mode>"
++ [(set (match_operand:GPI 0 "register_operand" "+&r")	      ;; out
++   (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q"))  ;; memory.
++  (set (match_dup 1)
++   (unspec_volatile:GPI
++    [(match_dup 0)
++     (match_operand:GPI 2 "register_operand" "r")	;; value.
++     (match_operand:SI 3 "const_int_operand" "")]	;; model.
++    UNSPECV_ATOMIC_CAS))]
++  "TARGET_LSE && reload_completed"
++{
++    enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
++    if (is_mm_relaxed (model))
++      return "cas<atomic_sfx>\t%<w>0, %<w>2, %1";
++    else if (is_mm_acquire (model) || is_mm_consume (model))
++      return "casa<atomic_sfx>\t%<w>0, %<w>2, %1";
++    else if (is_mm_release (model))
++      return "casl<atomic_sfx>\t%<w>0, %<w>2, %1";
++    else
++      return "casal<atomic_sfx>\t%<w>0, %<w>2, %1";
++})
++
++;; Atomic load-op: Load data, operate, store result, keep data.
++
++(define_insn "aarch64_atomic_load<atomic_ldop><mode>"
++ [(set (match_operand:ALLI 0 "register_operand" "=r")
++   (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q"))
++  (set (match_dup 1)
++   (unspec_volatile:ALLI
++    [(match_dup 1)
++     (match_operand:ALLI 2 "register_operand")
++     (match_operand:SI 3 "const_int_operand")]
++    ATOMIC_LDOP))]
++ "TARGET_LSE && reload_completed"
++ {
++   enum memmodel model = memmodel_from_int (INTVAL (operands[3]));
++   if (is_mm_relaxed (model))
++     return "ld<atomic_ldop><atomic_sfx>\t%<w>2, %<w>0, %1";
++   else if (is_mm_acquire (model) || is_mm_consume (model))
++     return "ld<atomic_ldop>a<atomic_sfx>\t%<w>2, %<w>0, %1";
++   else if (is_mm_release (model))
++     return "ld<atomic_ldop>l<atomic_sfx>\t%<w>2, %<w>0, %1";
++   else
++     return "ld<atomic_ldop>al<atomic_sfx>\t%<w>2, %<w>0, %1";
++ })
+--- a/src/gcc/config/aarch64/constraints.md
++++ b/src/gcc/config/aarch64/constraints.md
+@@ -35,6 +35,11 @@
+  (and (match_code "const_int")
+       (match_test "aarch64_uimm12_shift (ival)")))
+ 
++(define_constraint "Upl"
++  "@internal A constant that matches two uses of add instructions."
++  (and (match_code "const_int")
++       (match_test "aarch64_pluslong_strict_immedate (op, VOIDmode)")))
++
+ (define_constraint "J"
+  "A constant that can be used with a SUB operation (once negated)."
+  (and (match_code "const_int")
+@@ -101,8 +106,9 @@
+        (match_test "(unsigned HOST_WIDE_INT) ival < 64")))
+ 
+ (define_constraint "Usf"
+-  "@internal Usf is a symbol reference."
+-  (match_code "symbol_ref"))
++  "@internal Usf is a symbol reference under the context where plt stub allowed."
++  (and (match_code "symbol_ref")
++       (match_test "!aarch64_is_noplt_call_p (op)")))
+ 
+ (define_constraint "UsM"
+   "@internal
+--- /dev/null
++++ b/src/gcc/config/aarch64/cortex-a57-fma-steering.c
+@@ -0,0 +1,1099 @@
++/* FMA steering optimization pass for Cortex-A57.
++   Copyright (C) 2015 Free Software Foundation, Inc.
++   Contributed by ARM Ltd.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published by
++   the Free Software Foundation; either version 3, or (at your option)
++   any later version.
++
++   GCC is distributed in the hope that it will be useful, but
++   WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   General Public License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "regs.h"
++#include "insn-config.h"
++#include "hard-reg-set.h"
++#include "dominance.h"
++#include "cfg.h"
++#include "cfganal.h"
++#include "predict.h"
++#include "basic-block.h"
++#include "insn-attr.h"
++#include "machmode.h"
++#include "recog.h"
++#include "output.h"
++#include "vec.h"
++#include "hash-map.h"
++#include "bitmap.h"
++#include "obstack.h"
++#include "df.h"
++#include "target.h"
++#include "rtl.h"
++#include "context.h"
++#include "tree-pass.h"
++#include "regrename.h"
++#include "cortex-a57-fma-steering.h"
++#include "aarch64-protos.h"
++
++#include <list>
++
++/* For better performance, the destination of FMADD/FMSUB instructions should
++   have the same parity as their accumulator register if the accumulator
++   contains the result of a previous FMUL or FMADD/FMSUB instruction if
++   targetting Cortex-A57 processors.  Performance is also increased by
++   otherwise keeping a good balance in the parity of the destination register
++   of FMUL or FMADD/FMSUB.
++
++   This pass ensure that registers are renamed so that these conditions hold.
++   We reuse the existing register renaming facility from regrename.c to build
++   dependency chains and expose candidate registers for renaming.
++
++
++   The algorithm has three steps:
++
++   First, the functions of the register renaming pass are called.  These
++   analyze the instructions and produce a list of def/use chains of
++   instructions.
++
++   Next, this information is used to build trees of multiply and
++   multiply-accumulate instructions.  The roots of these trees are any
++   multiply, or any multiply-accumulate whose accumulator is not dependent on
++   a multiply or multiply-accumulate instruction.  A child is added to the
++   tree where a dependency chain exists between the result of the parent
++   instruction and the accumulator operand of the child, as in the diagram
++   below:
++
++		 fmul s2, s0, s1
++		/		\
++   fmadd s0, s1, s1, s2   fmadd s4, s1, s1 s2
++	    |
++   fmadd s3, s1, s1, s0
++
++   Trees made of a single instruction are permitted.
++
++   Finally, renaming is performed.  The parity of the destination register at
++   the root of a tree is checked against the current balance of multiply and
++   multiply-accumulate on each pipeline.  If necessary, the root of a tree is
++   renamed, in which case the rest of the tree is then renamed to keep the same
++   parity in the destination registers of all instructions in the tree.  */
++
++
++
++/* Forward declarations.  */
++class fma_node;
++class fma_root_node;
++class func_fma_steering;
++
++/* Dependencies between FMUL or FMADD/FMSUB instructions and subsequent
++   FMADD/FMSUB instructions form a graph.  This is because alternatives can
++   make a register be set by several FMUL or FMADD/FMSUB instructions in
++   different basic blocks and because of loops.  For ease of browsing, the
++   connected components of this graph are broken up into forests of trees.
++   Forests are represented by fma_forest objects, contained in the fma_forests
++   list.  Using a separate object for the forests allows for a better use of
++   memory as there is some information that is global to each forest, such as
++   the number of FMSUB and FMADD/FMSUB instructions currently scheduled on each
++   floating-point execution pipelines.  */
++
++class fma_forest
++{
++public:
++  fma_forest (func_fma_steering *, fma_root_node *, int);
++  ~fma_forest ();
++
++  int get_id ();
++  std::list<fma_root_node *> *get_roots ();
++  func_fma_steering *get_globals ();
++  int get_target_parity ();
++  void fma_node_created (fma_node *);
++  void merge_forest (fma_forest *);
++  void dump_info ();
++  void dispatch ();
++
++private:
++  /* The list of roots that form this forest.  */
++  std::list<fma_root_node *> *m_roots;
++
++  /* Target parity the destination register of all FMUL and FMADD/FMSUB
++     instructions in this forest should have.  */
++  int m_target_parity;
++
++  /* Link to the instance of func_fma_steering holding data related to the
++     FMA steering of the current function (cfun).  */
++  func_fma_steering *m_globals;
++
++  /* Identifier for the forest (used for dumps).  */
++  int m_id;
++
++  /* Total number of nodes in the forest (for statistics).  */
++  int m_nb_nodes;
++};
++
++class fma_node
++{
++public:
++  fma_node (fma_node *parent, du_chain *chain);
++  ~fma_node ();
++
++  bool root_p ();
++  fma_forest *get_forest ();
++  std::list<fma_node *> *get_children ();
++  rtx_insn *get_insn ();
++  void add_child (fma_node *);
++  int get_parity ();
++  void set_head (du_head *);
++  void rename (fma_forest *);
++  void dump_info (fma_forest *);
++
++protected:
++  /* Root node that lead to this node.  */
++  fma_root_node *m_root;
++
++  /* The parent node of this node.  If the node belong to a chain with several
++     parent nodes, the first one encountered in a depth-first search is chosen
++     as canonical parent.  */
++  fma_node *m_parent;
++
++  /* The list of child nodes.  If a chain contains several parent nodes, one is
++     chosen as canonical parent and the others will have no children.  */
++  std::list<fma_node *> *m_children;
++
++  /* The associated DU_HEAD chain that the insn represented by this object
++     is (one of) the root of.  When a chain contains several roots, the non
++     canonical ones have this field set to NULL.  */
++  struct du_head *m_head;
++
++  /* The FMUL or FMADD/FMSUB instruction this object corresponds to.  */
++  rtx_insn *m_insn;
++};
++
++class fma_root_node : public fma_node
++{
++public:
++  fma_root_node (func_fma_steering *, du_chain *, int);
++
++  fma_forest *get_forest ();
++  void set_forest (fma_forest *);
++  void dump_info (fma_forest *);
++
++private:
++  /* The forest this node belonged to when it was created.  */
++  fma_forest *m_forest;
++};
++
++/* Class holding all data and methods relative to the FMA steering of a given
++   function.  The FMA steering pass could then run in parallel for different
++   functions.  */
++
++class func_fma_steering
++{
++public:
++  func_fma_steering ();
++  ~func_fma_steering ();
++
++  int get_fpu_balance ();
++  void remove_forest (fma_forest *);
++  bool put_node (fma_node *);
++  void update_balance (int);
++  fma_node *get_fma_node (rtx_insn *);
++  void analyze_fma_fmul_insn (fma_forest *, du_chain *, du_head_p);
++  void execute_fma_steering ();
++
++private:
++  void dfs (void (*) (fma_forest *), void (*) (fma_forest *, fma_root_node *),
++	    void (*) (fma_forest *, fma_node *), bool);
++  void analyze ();
++  void rename_fma_trees ();
++
++  /* Mapping between FMUL or FMADD/FMSUB instructions and the associated
++     fma_node object.  Used when analyzing an instruction that is a root of
++     a chain to find if such an object was created because this instruction
++     is also a use in another chain.  */
++  hash_map<rtx_insn *, fma_node *> *m_insn_fma_head_map;
++
++  /* A list of all the forests in a given function.  */
++  std::list<fma_forest *> m_fma_forests;
++
++  /* Balance of FMUL and FMADD/FMSUB instructions between the two FPU
++     pipelines:
++     < 0: more instruction dispatched to the first pipeline
++     == 0: perfect balance
++     > 0: more instruction dispatched to the second pipeline.  */
++  int m_fpu_balance;
++
++  /* Identifier for the next forest created.  */
++  int m_next_forest_id;
++};
++
++/* Rename the register HEAD->regno in all the insns in the chain HEAD to any
++   register not in the set UNAVAILABLE.  Adapted from rename_chains in
++   regrename.c.  */
++
++static bool
++rename_single_chain (du_head_p head, HARD_REG_SET *unavailable)
++{
++  int best_new_reg;
++  int n_uses = 0;
++  struct du_chain *tmp;
++  int reg = head->regno;
++  enum reg_class super_class = NO_REGS;
++
++  if (head->cannot_rename)
++    return false;
++
++  if (fixed_regs[reg] || global_regs[reg]
++      || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM))
++    return false;
++
++  /* Iterate over elements in the chain in order to:
++     1. Count number of uses, and narrow the set of registers we can
++	use for renaming.
++     2. Compute the superunion of register classes in this chain.  */
++  for (tmp = head->first; tmp; tmp = tmp->next_use)
++    {
++      if (DEBUG_INSN_P (tmp->insn))
++	continue;
++      n_uses++;
++      IOR_COMPL_HARD_REG_SET (*unavailable, reg_class_contents[tmp->cl]);
++      super_class = reg_class_superunion[(int) super_class][(int) tmp->cl];
++    }
++
++  if (n_uses < 1)
++    return false;
++
++  best_new_reg = find_rename_reg (head, super_class, unavailable, reg,
++				  false);
++
++  if (dump_file)
++    {
++      fprintf (dump_file, "Register %s in insn %d", reg_names[reg],
++	       INSN_UID (head->first->insn));
++      if (head->need_caller_save_reg)
++	fprintf (dump_file, " crosses a call");
++    }
++
++  if (best_new_reg == reg)
++    {
++      if (dump_file)
++	fprintf (dump_file, "; no available better choice\n");
++      return false;
++    }
++
++  if (regrename_do_replace (head, best_new_reg))
++    {
++      if (dump_file)
++	fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
++      df_set_regs_ever_live (best_new_reg, true);
++    }
++  else
++    {
++      if (dump_file)
++	fprintf (dump_file, ", renaming as %s failed\n",
++		 reg_names[best_new_reg]);
++      return false;
++    }
++  return true;
++}
++
++/* Return whether T is the attribute of a FMADD/FMSUB-like instruction.  */
++
++static bool
++is_fmac_op (enum attr_type t)
++{
++  return (t == TYPE_FMACS) || (t == TYPE_FMACD) || (t == TYPE_NEON_FP_MLA_S);
++}
++
++/* Return whether T is the attribute of a FMUL instruction.  */
++
++static bool
++is_fmul_op (enum attr_type t)
++{
++  return (t == TYPE_FMULS) || (t == TYPE_FMULD) || (t == TYPE_NEON_FP_MUL_S);
++}
++
++/* Return whether INSN is an FMUL (if FMUL_OK is true) or FMADD/FMSUB
++   instruction.  */
++
++static bool
++is_fmul_fmac_insn (rtx_insn *insn, bool fmul_ok)
++{
++  enum attr_type t;
++
++  if (!NONDEBUG_INSN_P (insn))
++    return false;
++
++  if (recog_memoized (insn) < 0)
++    return false;
++
++  /* Only consider chain(s) this instruction is a root of if this is an FMUL or
++     FMADD/FMSUB instruction.  This allows to avoid browsing chains of all
++     instructions for FMUL or FMADD/FMSUB in them.  */
++  t = get_attr_type (insn);
++  return is_fmac_op (t) || (fmul_ok && is_fmul_op (t));
++}
++
++
++/*
++ * Class fma_forest method definitions.
++ */
++
++fma_forest::fma_forest (func_fma_steering *fma_steer, fma_root_node *fma_root,
++			int id)
++{
++      memset (this, 0, sizeof (*this));
++      this->m_globals = fma_steer;
++      this->m_roots = new std::list<fma_root_node *>;
++      this->m_roots->push_back (fma_root);
++      this->m_id = id;
++}
++
++fma_forest::~fma_forest ()
++{
++  delete this->m_roots;
++}
++
++int
++fma_forest::get_id ()
++{
++  return this->m_id;
++}
++
++std::list<fma_root_node *> *
++fma_forest::get_roots ()
++{
++  return this->m_roots;
++}
++
++func_fma_steering *
++fma_forest::get_globals ()
++{
++  return this->m_globals;
++}
++
++int
++fma_forest::get_target_parity ()
++{
++  return this->m_target_parity;
++}
++
++/* Act on the creation of NODE by updating statistics in FOREST and adding an
++   entry for it in the func_fma_steering hashmap.  */
++
++void fma_forest::fma_node_created (fma_node *node)
++{
++  bool created = !this->m_globals->put_node (node);
++
++  gcc_assert (created);
++  this->m_nb_nodes++;
++}
++
++/* Merge REF_FOREST and OTHER_FOREST together, making REF_FOREST the canonical
++   fma_forest object to represent both.  */
++
++void
++fma_forest::merge_forest (fma_forest *other_forest)
++{
++  std::list<fma_root_node *> *other_roots;
++  std::list<fma_root_node *>::iterator other_root_iter;
++
++  if (this == other_forest)
++    return;
++
++  other_roots = other_forest->m_roots;
++
++  /* Update root nodes' pointer to forest.  */
++  for (other_root_iter = other_roots->begin ();
++       other_root_iter != other_roots->end (); other_root_iter++)
++    (*other_root_iter)->set_forest (this);
++
++  /* Remove other_forest from the list of forests and move its tree roots in
++     the list of tree roots of ref_forest.  */
++  this->m_globals->remove_forest (other_forest);
++  this->m_roots->splice (this->m_roots->begin (), *other_roots);
++  delete other_forest;
++
++  this->m_nb_nodes += other_forest->m_nb_nodes;
++}
++
++/* Dump information about the forest FOREST.  */
++
++void
++fma_forest::dump_info ()
++{
++  gcc_assert (dump_file);
++
++  fprintf (dump_file, "Forest #%d has %d nodes\n", this->m_id,
++	   this->m_nb_nodes);
++}
++
++/* Wrapper around fma_forest::dump_info for use as parameter of function
++   pointer type in func_fma_steering::dfs.  */
++
++static void
++dump_forest_info (fma_forest *forest)
++{
++  forest->dump_info ();
++}
++
++/* Dispatch forest to the least utilized pipeline.  */
++
++void
++fma_forest::dispatch ()
++{
++  this->m_target_parity = this->m_roots->front ()->get_parity ();
++  int fpu_balance = this->m_globals->get_fpu_balance ();
++  if (fpu_balance != 0)
++    this->m_target_parity = (fpu_balance < 0);
++
++  if (dump_file)
++    fprintf (dump_file, "Target parity for forest #%d: %s\n", this->m_id,
++	     this->m_target_parity ? "odd" : "even");
++}
++
++/* Wrapper around fma_forest::dispatch for use as parameter of function pointer
++   type in func_fma_steering::dfs.  */
++
++static void
++dispatch_forest (fma_forest *forest)
++{
++  forest->dispatch ();
++}
++
++fma_node::fma_node (fma_node *parent, du_chain *chain)
++{
++  memset (this, 0, sizeof (*this));
++  this->m_parent = parent;
++  this->m_children = new std::list<fma_node *>;
++  this->m_insn = chain->insn;
++  /* root_p () cannot be used to check for root before root is set.  */
++  if (this->m_parent == this)
++    this->m_root = static_cast<fma_root_node *> (parent);
++  else
++    {
++      this->m_root = parent->m_root;
++      this->get_forest ()->fma_node_created (this);
++    }
++}
++
++fma_node::~fma_node ()
++{
++  delete this->m_children;
++}
++
++std::list<fma_node *> *
++fma_node::get_children ()
++{
++  return this->m_children;
++}
++
++rtx_insn *
++fma_node::get_insn ()
++{
++  return this->m_insn;
++}
++
++void
++fma_node::set_head (du_head *head)
++{
++  gcc_assert (!this->m_head);
++  this->m_head = head;
++}
++
++/* Add a child to this node in the list of children.  */
++
++void
++fma_node::add_child (fma_node *child)
++{
++  this->m_children->push_back (child);
++}
++
++/* Return the parity of the destination register of the instruction represented
++   by this node.  */
++
++int
++fma_node::get_parity ()
++{
++  return this->m_head->regno % 2;
++}
++
++/* Get the actual forest associated with a non root node as the one the node
++   points to might have been merged into another one.  In that case the pointer
++   in the root nodes are updated so we return the forest pointer of a root node
++   pointed to by the initial forest.  Despite being a oneliner, this method is
++   defined here as it references a method from fma_root_node.  */
++
++fma_forest *
++fma_node::get_forest ()
++{
++  return this->m_root->get_forest ();
++}
++
++/* Return whether a node is a root node.  */
++
++bool
++fma_node::root_p ()
++{
++  return this->m_root == this;
++}
++
++/* Dump information about the children of node FMA_NODE in forest FOREST.  */
++
++void
++fma_node::dump_info (ATTRIBUTE_UNUSED fma_forest *forest)
++{
++  struct du_chain *chain;
++  std::list<fma_node *>::iterator fma_child;
++
++  gcc_assert (dump_file);
++
++  if (this->get_children ()->empty ())
++    return;
++
++  fprintf (dump_file, "Instruction(s)");
++  for (chain = this->m_head->first; chain; chain = chain->next_use)
++    {
++      if (!is_fmul_fmac_insn (chain->insn, true))
++	continue;
++
++      if (chain->loc != &SET_DEST (PATTERN (chain->insn)))
++	continue;
++
++      fprintf (dump_file, " %d", INSN_UID (chain->insn));
++    }
++
++  fprintf (dump_file, " is(are) accumulator dependency of instructions");
++  for (fma_child = this->get_children ()->begin ();
++       fma_child != this->get_children ()->end (); fma_child++)
++    fprintf (dump_file, " %d", INSN_UID ((*fma_child)->m_insn));
++  fprintf (dump_file, "\n");
++}
++
++/* Wrapper around fma_node::dump_info for use as parameter of function pointer
++   type in func_fma_steering::dfs.  */
++
++static void
++dump_tree_node_info (fma_forest *forest, fma_node *node)
++{
++  node->dump_info (forest);
++}
++
++/* Rename the destination register of a single FMUL or FMADD/FMSUB instruction
++   represented by FMA_NODE to a register that respect the target parity for
++   FOREST or with same parity of the instruction represented by its parent node
++   if it has one.  */
++
++void
++fma_node::rename (fma_forest *forest)
++{
++  int cur_parity, target_parity;
++
++  /* This is alternate root of a chain and thus has no children.  It will be
++     renamed when processing the canonical root for that chain.  */
++  if (!this->m_head)
++    return;
++
++  target_parity = forest->get_target_parity ();
++  if (this->m_parent)
++    target_parity = this->m_parent->get_parity ();
++  cur_parity = this->get_parity ();
++
++  /* Rename if parity differs.  */
++  if (cur_parity != target_parity)
++    {
++      rtx_insn *insn = this->m_insn;
++      HARD_REG_SET unavailable;
++      enum machine_mode mode;
++      int reg;
++
++      if (dump_file)
++	{
++	  unsigned cur_dest_reg = this->m_head->regno;
++
++	  fprintf (dump_file, "FMA or FMUL at insn %d but destination "
++		   "register (%s) has different parity from expected to "
++		   "maximize FPU pipeline utilization\n", INSN_UID (insn),
++		   reg_names[cur_dest_reg]);
++	}
++
++      /* Don't clobber traceback for noreturn functions.  */
++      CLEAR_HARD_REG_SET (unavailable);
++      if (frame_pointer_needed)
++	{
++	  add_to_hard_reg_set (&unavailable, Pmode, FRAME_POINTER_REGNUM);
++	  add_to_hard_reg_set (&unavailable, Pmode, HARD_FRAME_POINTER_REGNUM);
++	}
++
++      /* Exclude registers with wrong parity.  */
++      mode = GET_MODE (SET_DEST (PATTERN (insn)));
++      for (reg = cur_parity; reg < FIRST_PSEUDO_REGISTER; reg += 2)
++	add_to_hard_reg_set (&unavailable, mode, reg);
++
++      if (!rename_single_chain (this->m_head, &unavailable))
++	{
++	  if (dump_file)
++	    fprintf (dump_file, "Destination register of insn %d could not be "
++		     "renamed. Dependent FMA insns will use this parity from "
++		     "there on.\n", INSN_UID (insn));
++	}
++      else
++	cur_parity = target_parity;
++    }
++
++  forest->get_globals ()->update_balance (cur_parity);
++}
++
++/* Wrapper around fma_node::dump_info for use as parameter of function pointer
++   type in func_fma_steering::dfs.  */
++
++static void
++rename_fma_node (fma_forest *forest, fma_node *node)
++{
++  node->rename (forest);
++}
++
++fma_root_node::fma_root_node (func_fma_steering *globals, du_chain *chain,
++			      int id) : fma_node (this, chain)
++{
++  this->m_forest = new fma_forest (globals, this, id);
++  this->m_forest->fma_node_created (this);
++}
++
++fma_forest *
++fma_root_node::get_forest ()
++{
++  return this->m_forest;
++}
++
++void
++fma_root_node::set_forest (fma_forest *ref_forest)
++{
++  this->m_forest = ref_forest;
++}
++
++/* Dump information about the roots of forest FOREST.  */
++
++void
++fma_root_node::dump_info (fma_forest *forest)
++{
++  gcc_assert (dump_file);
++
++  if (this == forest->get_roots ()->front ())
++    fprintf (dump_file, "Instruction(s) at root of forest #%d:",
++	     forest->get_id ());
++  fprintf (dump_file, " %d", INSN_UID (this->m_insn));
++  if (this == forest->get_roots ()->back ())
++    fprintf (dump_file, "\n");
++}
++
++/* Wrapper around fma_root_node::dump_info for use as parameter of function
++   pointer type in func_fma_steering::dfs.  */
++
++static void
++dump_tree_root_info (fma_forest *forest, fma_root_node *node)
++{
++  node->dump_info (forest);
++}
++
++func_fma_steering::func_fma_steering () : m_fpu_balance (0)
++{
++  this->m_insn_fma_head_map = new hash_map<rtx_insn *, fma_node *>;
++  this->m_fma_forests.clear ();
++  this->m_next_forest_id = 0;
++}
++
++func_fma_steering::~func_fma_steering ()
++{
++  delete this->m_insn_fma_head_map;
++}
++
++int
++func_fma_steering::get_fpu_balance ()
++{
++  return this->m_fpu_balance;
++}
++
++void
++func_fma_steering::remove_forest (fma_forest *forest)
++{
++  this->m_fma_forests.remove (forest);
++}
++
++/* Memorize the mapping of this instruction to its fma_node object and return
++   whether such a mapping existed.  */
++
++bool
++func_fma_steering::put_node (fma_node *node)
++{
++  return this->m_insn_fma_head_map->put (node->get_insn (), node);
++}
++
++/* Update the current balance considering a node with the given PARITY.  */
++
++void
++func_fma_steering::update_balance (int parity)
++{
++  this->m_fpu_balance = parity ? this->m_fpu_balance + 1
++			       : this->m_fpu_balance - 1;
++}
++
++/* Return whether an fma_node object exists for instruction INSN and, if not,
++   allocate one in *RET.  */
++
++fma_node *
++func_fma_steering::get_fma_node (rtx_insn *insn)
++{
++  fma_node **fma_slot;
++
++  fma_slot = this->m_insn_fma_head_map->get (insn);
++  if (fma_slot)
++    return *fma_slot;
++  return NULL;
++}
++
++/* Allocate and initialize fma_node objects for the FMUL or FMADD/FMSUB
++   instruction in CHAIN->insn and its dependent FMADD/FMSUB instructions, all
++   part of FOREST.  For the children, the associated head is left untouched
++   (and thus null) as this function will be called again when considering the
++   chain where they are def.  For the parent, the chain is given in HEAD.  */
++
++void
++func_fma_steering::analyze_fma_fmul_insn (fma_forest *ref_forest,
++					  du_chain *chain, du_head_p head)
++{
++  fma_forest *forest;
++  fma_node *node = this->get_fma_node (chain->insn);
++
++  /* This is a root node.  */
++  if (!node)
++    {
++      fma_root_node *root_node;
++
++      root_node = new fma_root_node (this, chain, this->m_next_forest_id++);
++      forest = root_node->get_forest ();
++      node = root_node;
++
++      /* Until proved otherwise, assume this root is not part of an existing
++	 forest and thus add its forest to the list of forests.  */
++      this->m_fma_forests.push_back (forest);
++    }
++  else
++    forest = node->get_forest ();
++
++  node->set_head (head);
++
++  /* fma_node is part of a chain with several defs, one of them having already
++     been processed.  The root of that already processed def is the canonical
++     one and the root of fma_node is added to its forest.  No need to process
++     the children nodes as they were already processed when the other def was
++     processed.  */
++  if (ref_forest)
++    {
++      ref_forest->merge_forest (forest);
++      return;
++    }
++
++  for (chain = head->first; chain; chain = chain->next_use)
++    {
++      fma_node *child_fma;
++      rtx fma_rtx, *accum_rtx_p;
++
++      if (!is_fmul_fmac_insn (chain->insn, false))
++	continue;
++
++      /* Get FMA rtx.  */
++      fma_rtx = SET_SRC (PATTERN (chain->insn));
++      /* FMA is negated.  */
++      if (GET_CODE (fma_rtx) == NEG)
++	fma_rtx = XEXP (fma_rtx, 0);
++      /* Get accumulator rtx.  */
++      accum_rtx_p = &XEXP (fma_rtx, 2);
++      /* Accumulator is negated.  */
++      if (!REG_P (*accum_rtx_p))
++	accum_rtx_p = &XEXP (*accum_rtx_p, 0);
++
++      /* This du_chain structure is not for the accumulator register.  */
++      if (accum_rtx_p != chain->loc)
++	continue;
++
++      /* If object already created, this is a loop carried dependency.  We
++	 don't include this object in the children as we want trees for
++	 rename_fma_trees to not be an infinite loop.  */
++      if (this->get_fma_node (chain->insn))
++	continue;
++
++      child_fma = new fma_node (node, chain);
++
++      /* Memorize the mapping of this instruction to its fma_node object
++	 as it will be processed for the chain starting at its destination
++	 register later.  */
++
++      /* Link to siblings.  */
++      node->add_child (child_fma);
++    }
++}
++
++/* Perform a depth-first search of the forests of fma_node in
++   THIS->m_fma_forests, calling PROCESS_FOREST () on each fma_forest object in
++   THIS->m_fma_forests list, PROCESS_ROOT () on each tree root and
++   PROCESS_NODE () on each node.  If FREE is true, free all std::list in the
++   same dfs.  */
++
++void
++func_fma_steering::dfs (void (*process_forest) (fma_forest *),
++			void (*process_root) (fma_forest *, fma_root_node *),
++			void (*process_node) (fma_forest *, fma_node *),
++			bool free)
++{
++  vec<fma_node *> to_process;
++  std::list<fma_forest *>::iterator forest_iter;
++
++  to_process.create (0);
++
++  /* For each forest.  */
++  for (forest_iter = this->m_fma_forests.begin ();
++       forest_iter != this->m_fma_forests.end (); forest_iter++)
++    {
++      std::list<fma_root_node *>::iterator root_iter;
++
++      if (process_forest)
++	process_forest (*forest_iter);
++
++      /* For each tree root in this forest.  */
++      for (root_iter = (*forest_iter)->get_roots ()->begin ();
++	   root_iter != (*forest_iter)->get_roots ()->end (); root_iter++)
++	{
++	  if (process_root)
++	    process_root (*forest_iter, *root_iter);
++	  to_process.safe_push (*root_iter);
++	}
++
++      /* For each tree node in this forest.  */
++      while (!to_process.is_empty ())
++	{
++	  fma_node *node;
++	  std::list<fma_node *>::iterator child_iter;
++
++	  node = to_process.pop ();
++
++	  if (process_node)
++	    process_node (*forest_iter, node);
++
++	  /* Absence of children might indicate an alternate root of a *chain*.
++	     It's ok to skip it here as the chain will be renamed when
++	     processing the canonical root for that chain.  */
++	  if (node->get_children ()->empty ())
++	    continue;
++
++	  for (child_iter = node->get_children ()->begin ();
++	       child_iter != node->get_children ()->end (); child_iter++)
++	    to_process.safe_push (*child_iter);
++	  if (free)
++	    {
++	      if (node->root_p ())
++		delete static_cast<fma_root_node *> (node);
++	      else
++		delete node;
++	    }
++	}
++      if (free)
++	delete *forest_iter;
++    }
++
++  to_process.release ();
++}
++
++/* Build the dependency trees of FMUL and FMADD/FMSUB instructions.  */
++
++void
++func_fma_steering::analyze ()
++{
++  int i, n_blocks, *bb_dfs_preorder;
++  basic_block bb;
++  rtx_insn *insn;
++
++  bb_dfs_preorder = XNEWVEC (int, last_basic_block_for_fn (cfun));
++  n_blocks = pre_and_rev_post_order_compute (bb_dfs_preorder, NULL, false);
++
++  /* Browse the graph of basic blocks looking for FMUL or FMADD/FMSUB
++     instructions.  */
++  for (i = 0; i < n_blocks; i++)
++    {
++      bb = BASIC_BLOCK_FOR_FN (cfun, bb_dfs_preorder[i]);
++      FOR_BB_INSNS (bb, insn)
++	{
++	  operand_rr_info *dest_op_info;
++	  struct du_chain *chain;
++	  unsigned dest_regno;
++	  fma_forest *forest;
++	  du_head_p head;
++	  int i;
++
++	  if (!is_fmul_fmac_insn (insn, true))
++	    continue;
++
++	  /* Search the chain where this instruction is (one of) the root.  */
++	  dest_op_info = insn_rr[INSN_UID (insn)].op_info;
++	  dest_regno = REGNO (SET_DEST (PATTERN (insn)));
++	  for (i = 0; i < dest_op_info->n_chains; i++)
++	    {
++	      /* The register tracked by this chain does not match the
++		 destination register of insn.  */
++	      if (dest_op_info->heads[i]->regno != dest_regno)
++		continue;
++
++	      head = dest_op_info->heads[i];
++	      /* The chain was merged in another, find the new head.  */
++	      if (!head->first)
++		head = regrename_chain_from_id (head->id);
++
++	      /* Search the chain element for this instruction and, if another
++		 FMUL or FMADD/FMSUB instruction was already processed, note
++		 the forest of its tree.  */
++	      forest = NULL;
++	      for (chain = head->first; chain; chain = chain->next_use)
++		{
++		  fma_node **fma_slot;
++
++		  if (!is_fmul_fmac_insn (chain->insn, true))
++		    continue;
++
++		  /* This is a use, continue.  */
++		  if (chain->loc != &SET_DEST (PATTERN (chain->insn)))
++		    continue;
++
++		  if (chain->insn == insn)
++		    break;
++
++		  fma_slot = this->m_insn_fma_head_map->get (chain->insn);
++		  if (fma_slot && (*fma_slot)->get_children ())
++		    forest = (*fma_slot)->get_forest ();
++		}
++	      if (chain)
++		break;
++	    }
++
++	  /* We didn't find a chain with a def for this instruction.  */
++	  gcc_assert (i < dest_op_info->n_chains);
++
++	  this->analyze_fma_fmul_insn (forest, chain, head);
++	}
++    }
++  free (bb_dfs_preorder);
++
++  if (dump_file)
++    this->dfs (dump_forest_info, dump_tree_root_info, dump_tree_node_info,
++	       false);
++}
++
++/* Perform the renaming of all chains with FMUL or FMADD/FMSUB involved with
++   the objective of keeping FPU pipeline balanced in term of instructions and
++   having FMADD/FMSUB with dependencies on previous FMUL or FMADD/FMSUB be
++   scheduled on the same pipeline.  */
++
++void
++func_fma_steering::rename_fma_trees ()
++{
++  this->dfs (dispatch_forest, NULL, rename_fma_node, true);
++
++  if (dump_file && !this->m_fma_forests.empty ())
++    {
++      fprintf (dump_file, "Function %s has ", current_function_name ());
++      if (this->m_fpu_balance == 0)
++	fprintf (dump_file, "perfect balance of FMUL/FMA chains between the "
++		 "two FPU pipelines\n");
++      else if (this->m_fpu_balance > 0)
++	fprintf (dump_file, "%d more FMUL/FMA chains scheduled on the second "
++		 "FPU pipeline\n", this->m_fpu_balance);
++      else /* this->m_fpu_balance < 0 */
++	fprintf (dump_file, "%d more FMUL/FMA chains scheduled on the first "
++		 "FPU pipeline\n", - this->m_fpu_balance);
++    }
++}
++
++/* Execute FMA steering pass.  */
++
++void
++func_fma_steering::execute_fma_steering ()
++{
++  df_set_flags (DF_LR_RUN_DCE);
++  df_note_add_problem ();
++  df_analyze ();
++  df_set_flags (DF_DEFER_INSN_RESCAN);
++
++  regrename_init (true);
++  regrename_analyze (NULL);
++  this->analyze ();
++  this->rename_fma_trees ();
++  regrename_finish ();
++}
++
++const pass_data pass_data_fma_steering =
++{
++  RTL_PASS, /* type */
++  "fma_steering", /* name */
++  OPTGROUP_NONE, /* optinfo_flags */
++  TV_NONE, /* tv_id */
++  0, /* properties_required */
++  0, /* properties_provided */
++  0, /* properties_destroyed */
++  0, /* todo_flags_start */
++  TODO_df_finish, /* todo_flags_finish */
++};
++
++class pass_fma_steering : public rtl_opt_pass
++{
++public:
++  pass_fma_steering (gcc::context *ctxt)
++    : rtl_opt_pass (pass_data_fma_steering, ctxt)
++  {}
++
++  /* opt_pass methods: */
++  virtual bool gate (function *)
++    {
++      return (aarch64_tune_params.extra_tuning_flags
++	      & AARCH64_EXTRA_TUNE_RENAME_FMA_REGS)
++	      && optimize >= 2;
++    }
++
++  virtual unsigned int execute (function *)
++    {
++      func_fma_steering *fma_steering = new func_fma_steering;
++      fma_steering->execute_fma_steering ();
++      delete fma_steering;
++      return 0;
++    }
++
++}; // class pass_fma_steering
++
++/* Create a new fma steering pass instance.  */
++
++static rtl_opt_pass *
++make_pass_fma_steering (gcc::context *ctxt)
++{
++  return new pass_fma_steering (ctxt);
++}
++
++/* Register the FMA steering pass to the pass manager.  */
++
++void
++aarch64_register_fma_steering ()
++{
++  opt_pass *pass_fma_steering = make_pass_fma_steering (g);
++
++  struct register_pass_info fma_steering_info
++    = { pass_fma_steering, "rnreg", 1, PASS_POS_INSERT_AFTER };
++
++  register_pass (&fma_steering_info);
++}
+--- /dev/null
++++ b/src/gcc/config/aarch64/cortex-a57-fma-steering.h
+@@ -0,0 +1,22 @@
++/* This file contains declarations for the FMA steering optimization
++   pass for Cortex-A57.
++   Copyright (C) 2015 Free Software Foundation, Inc.
++   Contributed by ARM Ltd.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published by
++   the Free Software Foundation; either version 3, or (at your option)
++   any later version.
++
++   GCC is distributed in the hope that it will be useful, but
++   WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   General Public License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++void aarch64_register_fma_steering (void);
+--- /dev/null
++++ b/src/gcc/config/aarch64/driver-aarch64.c
+@@ -0,0 +1,341 @@
++/* Native CPU detection for aarch64.
++   Copyright (C) 2015 Free Software Foundation, Inc.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify
++   it under the terms of the GNU General Public License as published by
++   the Free Software Foundation; either version 3, or (at your option)
++   any later version.
++
++   GCC is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++   GNU General Public License for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.  */
++
++#include "config.h"
++#define INCLUDE_STRING
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++
++/* Defined in common/config/aarch64/aarch64-common.c.  */
++std::string aarch64_get_extension_string_for_isa_flags (unsigned long,
++							unsigned long);
++
++struct aarch64_arch_extension
++{
++  const char *ext;
++  unsigned int flag;
++  const char *feat_string;
++};
++
++#define AARCH64_OPT_EXTENSION(EXT_NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, FEATURE_STRING) \
++  { EXT_NAME, FLAG_CANONICAL, FEATURE_STRING },
++static struct aarch64_arch_extension aarch64_extensions[] =
++{
++#include "aarch64-option-extensions.def"
++};
++#undef AARCH64_OPT_EXTENSION
++
++
++struct aarch64_core_data
++{
++  const char* name;
++  const char* arch;
++  const char* implementer_id;
++  const char* part_no;
++  const unsigned long flags;
++};
++
++#define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
++  { CORE_NAME, #ARCH, IMP, PART, FLAGS },
++
++static struct aarch64_core_data aarch64_cpu_data[] =
++{
++#include "aarch64-cores.def"
++  { NULL, NULL, NULL, NULL, 0 }
++};
++
++#undef AARCH64_CORE
++
++struct aarch64_arch_driver_info
++{
++  const char* id;
++  const char* name;
++  const unsigned long flags;
++};
++
++#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
++  { #ARCH_IDENT, NAME, FLAGS },
++
++static struct aarch64_arch_driver_info aarch64_arches[] =
++{
++#include "aarch64-arches.def"
++  {NULL, NULL, 0}
++};
++
++#undef AARCH64_ARCH
++
++/* Return an aarch64_arch_driver_info for the architecture described
++   by ID, or NULL if ID describes something we don't know about.  */
++
++static struct aarch64_arch_driver_info*
++get_arch_from_id (const char* id)
++{
++  unsigned int i = 0;
++
++  for (i = 0; aarch64_arches[i].id != NULL; i++)
++    {
++      if (strcmp (id, aarch64_arches[i].id) == 0)
++	return &aarch64_arches[i];
++    }
++
++  return NULL;
++}
++
++/* Check wether the string CORE contains the same CPU part numbers
++   as BL_STRING.  For example CORE="{0xd03, 0xd07}" and BL_STRING="0xd07.0xd03"
++   should return true.  */
++
++static bool
++valid_bL_string_p (const char** core, const char* bL_string)
++{
++  return strstr (bL_string, core[0]) != NULL
++    && strstr (bL_string, core[1]) != NULL;
++}
++
++/*  Return true iff ARR contains STR in one of its two elements.  */
++
++static bool
++contains_string_p (const char** arr, const char* str)
++{
++  bool res = false;
++
++  if (arr[0] != NULL)
++    {
++      res = strstr (arr[0], str) != NULL;
++      if (res)
++        return res;
++
++      if (arr[1] != NULL)
++        return strstr (arr[1], str) != NULL;
++    }
++
++  return false;
++}
++
++/* This will be called by the spec parser in gcc.c when it sees
++   a %:local_cpu_detect(args) construct.  Currently it will be called
++   with either "arch", "cpu" or "tune" as argument depending on if
++   -march=native, -mcpu=native or -mtune=native is to be substituted.
++
++   It returns a string containing new command line parameters to be
++   put at the place of the above two options, depending on what CPU
++   this is executed.  E.g. "-march=armv8-a" on a Cortex-A57 for
++   -march=native.  If the routine can't detect a known processor,
++   the -march or -mtune option is discarded.
++
++   For -mtune and -mcpu arguments it attempts to detect the CPU or
++   a big.LITTLE system.
++   ARGC and ARGV are set depending on the actual arguments given
++   in the spec.  */
++
++const char *
++host_detect_local_cpu (int argc, const char **argv)
++{
++  const char *arch_id = NULL;
++  const char *res = NULL;
++  static const int num_exts = ARRAY_SIZE (aarch64_extensions);
++  char buf[128];
++  FILE *f = NULL;
++  bool arch = false;
++  bool tune = false;
++  bool cpu = false;
++  unsigned int i = 0;
++  unsigned int core_idx = 0;
++  const char* imps[2] = { NULL, NULL };
++  const char* cores[2] = { NULL, NULL };
++  unsigned int n_cores = 0;
++  unsigned int n_imps = 0;
++  bool processed_exts = false;
++  const char *ext_string = "";
++  unsigned long extension_flags = 0;
++  unsigned long default_flags = 0;
++
++  gcc_assert (argc);
++
++  if (!argv[0])
++    goto not_found;
++
++  /* Are we processing -march, mtune or mcpu?  */
++  arch = strcmp (argv[0], "arch") == 0;
++  if (!arch)
++    tune = strcmp (argv[0], "tune") == 0;
++
++  if (!arch && !tune)
++    cpu = strcmp (argv[0], "cpu") == 0;
++
++  if (!arch && !tune && !cpu)
++    goto not_found;
++
++  f = fopen ("/proc/cpuinfo", "r");
++
++  if (f == NULL)
++    goto not_found;
++
++  /* Look through /proc/cpuinfo to determine the implementer
++     and then the part number that identifies a particular core.  */
++  while (fgets (buf, sizeof (buf), f) != NULL)
++    {
++      if (strstr (buf, "implementer") != NULL)
++	{
++	  for (i = 0; aarch64_cpu_data[i].name != NULL; i++)
++	    if (strstr (buf, aarch64_cpu_data[i].implementer_id) != NULL
++		&& !contains_string_p (imps,
++				       aarch64_cpu_data[i].implementer_id))
++	      {
++		if (n_imps == 2)
++		  goto not_found;
++
++		imps[n_imps++] = aarch64_cpu_data[i].implementer_id;
++
++		break;
++	      }
++	  continue;
++	}
++
++      if (strstr (buf, "part") != NULL)
++	{
++	  for (i = 0; aarch64_cpu_data[i].name != NULL; i++)
++	    if (strstr (buf, aarch64_cpu_data[i].part_no) != NULL
++		&& !contains_string_p (cores, aarch64_cpu_data[i].part_no))
++	      {
++		if (n_cores == 2)
++		  goto not_found;
++
++		cores[n_cores++] = aarch64_cpu_data[i].part_no;
++		core_idx = i;
++		arch_id = aarch64_cpu_data[i].arch;
++		break;
++	      }
++	  continue;
++	}
++      if (!tune && !processed_exts && strstr (buf, "Features") != NULL)
++	{
++	  for (i = 0; i < num_exts; i++)
++	    {
++	      char *p = NULL;
++	      char *feat_string
++		= concat (aarch64_extensions[i].feat_string, NULL);
++	      bool enabled = true;
++
++	      /* This may be a multi-token feature string.  We need
++		 to match all parts, which could be in any order.
++		 If this isn't a multi-token feature string, strtok is
++		 just going to return a pointer to feat_string.  */
++	      p = strtok (feat_string, " ");
++	      while (p != NULL)
++		{
++		  if (strstr (buf, p) == NULL)
++		    {
++		      /* Failed to match this token.  Turn off the
++			 features we'd otherwise enable.  */
++		      enabled = false;
++		      break;
++		    }
++		  p = strtok (NULL, " ");
++		}
++
++	      if (enabled)
++		extension_flags |= aarch64_extensions[i].flag;
++	      else
++		extension_flags &= ~(aarch64_extensions[i].flag);
++	    }
++
++	  processed_exts = true;
++	}
++    }
++
++  fclose (f);
++  f = NULL;
++
++  /* Weird cpuinfo format that we don't know how to handle.  */
++  if (n_cores == 0 || n_cores > 2 || n_imps != 1)
++    goto not_found;
++
++  if (arch && !arch_id)
++    goto not_found;
++
++  if (arch)
++    {
++      struct aarch64_arch_driver_info* arch_info = get_arch_from_id (arch_id);
++
++      /* We got some arch indentifier that's not in aarch64-arches.def?  */
++      if (!arch_info)
++	goto not_found;
++
++      res = concat ("-march=", arch_info->name, NULL);
++      default_flags = arch_info->flags;
++    }
++  /* We have big.LITTLE.  */
++  else if (n_cores == 2)
++    {
++      for (i = 0; aarch64_cpu_data[i].name != NULL; i++)
++	{
++	  if (strchr (aarch64_cpu_data[i].part_no, '.') != NULL
++	      && strncmp (aarch64_cpu_data[i].implementer_id,
++			  imps[0],
++			  strlen (imps[0]) - 1) == 0
++	      && valid_bL_string_p (cores, aarch64_cpu_data[i].part_no))
++	    {
++	      res = concat ("-m",
++			    cpu ? "cpu" : "tune", "=",
++			    aarch64_cpu_data[i].name,
++			    NULL);
++	      default_flags = aarch64_cpu_data[i].flags;
++	      break;
++	    }
++	}
++      if (!res)
++	goto not_found;
++    }
++  /* The simple, non-big.LITTLE case.  */
++  else
++    {
++      if (strncmp (aarch64_cpu_data[core_idx].implementer_id, imps[0],
++		   strlen (imps[0]) - 1) != 0)
++	goto not_found;
++
++      res = concat ("-m", cpu ? "cpu" : "tune", "=",
++		    aarch64_cpu_data[core_idx].name, NULL);
++      default_flags = aarch64_cpu_data[core_idx].flags;
++    }
++
++  if (tune)
++    return res;
++
++  ext_string
++    = aarch64_get_extension_string_for_isa_flags (extension_flags,
++						  default_flags).c_str ();
++
++  res = concat (res, ext_string, NULL);
++
++  return res;
++
++not_found:
++  {
++   /* If detection fails we ignore the option.
++      Clean up and return empty string.  */
++
++    if (f)
++      fclose (f);
++
++    return "";
++  }
++}
++
+--- a/src/gcc/config/aarch64/iterators.md
++++ b/src/gcc/config/aarch64/iterators.md
+@@ -38,6 +38,15 @@
+ ;; Iterator for General Purpose Floating-point registers (32- and 64-bit modes)
+ (define_mode_iterator GPF [SF DF])
+ 
++;; Iterator for all scalar floating point modes (HF, SF, DF and TF)
++(define_mode_iterator GPF_TF_F16 [HF SF DF TF])
++
++;; Double vector modes.
++(define_mode_iterator VDF [V2SF V4HF])
++
++;; Iterator for all scalar floating point modes (SF, DF and TF)
++(define_mode_iterator GPF_TF [SF DF TF])
++
+ ;; Integer vector modes.
+ (define_mode_iterator VDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI])
+ 
+@@ -49,7 +58,7 @@
+ (define_mode_iterator VSDQ_I_DI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI DI])
+ 
+ ;; Double vector modes.
+-(define_mode_iterator VD [V8QI V4HI V2SI V2SF])
++(define_mode_iterator VD [V8QI V4HI V4HF V2SI V2SF])
+ 
+ ;; vector, 64-bit container, all integer modes
+ (define_mode_iterator VD_BHSI [V8QI V4HI V2SI])
+@@ -58,10 +67,10 @@
+ (define_mode_iterator VDQ_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI])
+ 
+ ;; Quad vector modes.
+-(define_mode_iterator VQ [V16QI V8HI V4SI V2DI V4SF V2DF])
++(define_mode_iterator VQ [V16QI V8HI V4SI V2DI V8HF V4SF V2DF])
+ 
+ ;; VQ without 2 element modes.
+-(define_mode_iterator VQ_NO2E [V16QI V8HI V4SI V4SF])
++(define_mode_iterator VQ_NO2E [V16QI V8HI V4SI V8HF V4SF])
+ 
+ ;; Quad vector with only 2 element modes.
+ (define_mode_iterator VQ_2E [V2DI V2DF])
+@@ -76,7 +85,10 @@
+ ;; pointer-sized quantities.  Exactly one of the two alternatives will match.
+ (define_mode_iterator PTR [(SI "ptr_mode == SImode") (DI "ptr_mode == DImode")])
+ 
+-;; Vector Float modes.
++;; Vector Float modes suitable for moving, loading and storing.
++(define_mode_iterator VDQF_F16 [V4HF V8HF V2SF V4SF V2DF])
++
++;; Vector Float modes, barring HF modes.
+ (define_mode_iterator VDQF [V2SF V4SF V2DF])
+ 
+ ;; Vector Float modes, and DF.
+@@ -85,6 +97,9 @@
+ ;; Vector single Float modes.
+ (define_mode_iterator VDQSF [V2SF V4SF])
+ 
++;; Quad vector Float modes with half/single elements.
++(define_mode_iterator VQ_HSF [V8HF V4SF])
++
+ ;; Modes suitable to use as the return type of a vcond expression.
+ (define_mode_iterator VDQF_COND [V2SF V2SI V4SF V4SI V2DF V2DI])
+ 
+@@ -94,15 +109,23 @@
+ ;; Vector Float modes with 2 elements.
+ (define_mode_iterator V2F [V2SF V2DF])
+ 
+-;; All modes.
++;; All vector modes on which we support any arithmetic operations.
+ (define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF V2DF])
+ 
+-;; All vector modes and DI.
++;; All vector modes suitable for moving, loading, and storing.
++(define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
++				V4HF V8HF V2SF V4SF V2DF])
++
++;; All vector modes barring HF modes, plus DI.
+ (define_mode_iterator VALLDI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF V2DF DI])
+ 
+-;; All vector modes and DI and DF.
++;; All vector modes and DI.
++(define_mode_iterator VALLDI_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
++				  V4HF V8HF V2SF V4SF V2DF DI])
++
++;; All vector modes, plus DI and DF.
+ (define_mode_iterator VALLDIF [V8QI V16QI V4HI V8HI V2SI V4SI
+-			       V2DI V2SF V4SF V2DF DI DF])
++			       V2DI V4HF V8HF V2SF V4SF V2DF DI DF])
+ 
+ ;; Vector modes for Integer reduction across lanes.
+ (define_mode_iterator VDQV [V8QI V16QI V4HI V8HI V4SI V2DI])
+@@ -123,7 +146,7 @@
+ (define_mode_iterator VQW [V16QI V8HI V4SI])
+ 
+ ;; Double vector modes for combines.
+-(define_mode_iterator VDC [V8QI V4HI V2SI V2SF DI DF])
++(define_mode_iterator VDC [V8QI V4HI V4HF V2SI V2SF DI DF])
+ 
+ ;; Vector modes except double int.
+ (define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF])
+@@ -250,6 +273,7 @@
+     UNSPEC_USHLL	; Used in aarch64-simd.md.
+     UNSPEC_ADDP		; Used in aarch64-simd.md.
+     UNSPEC_TBL		; Used in vector permute patterns.
++    UNSPEC_TBX		; Used in vector permute patterns.
+     UNSPEC_CONCAT	; Used in vector permute patterns.
+     UNSPEC_ZIP1		; Used in vector permute patterns.
+     UNSPEC_ZIP2		; Used in vector permute patterns.
+@@ -279,6 +303,31 @@
+     UNSPEC_PMULL2       ; Used in aarch64-simd.md.
+     UNSPEC_REV_REGLIST  ; Used in aarch64-simd.md.
+     UNSPEC_VEC_SHR      ; Used in aarch64-simd.md.
++    UNSPEC_SQRDMLAH     ; Used in aarch64-simd.md.
++    UNSPEC_SQRDMLSH     ; Used in aarch64-simd.md.
++])
++
++;; ------------------------------------------------------------------
++;; Unspec enumerations for Atomics.  They are here so that they can be
++;; used in the int_iterators for atomic operations.
++;; ------------------------------------------------------------------
++
++(define_c_enum "unspecv"
++ [
++    UNSPECV_LX			; Represent a load-exclusive.
++    UNSPECV_SX			; Represent a store-exclusive.
++    UNSPECV_LDA			; Represent an atomic load or load-acquire.
++    UNSPECV_STL			; Represent an atomic store or store-release.
++    UNSPECV_ATOMIC_CMPSW	; Represent an atomic compare swap.
++    UNSPECV_ATOMIC_EXCHG	; Represent an atomic exchange.
++    UNSPECV_ATOMIC_CAS		; Represent an atomic CAS.
++    UNSPECV_ATOMIC_SWP		; Represent an atomic SWP.
++    UNSPECV_ATOMIC_OP		; Represent an atomic operation.
++    UNSPECV_ATOMIC_LDOP		; Represent an atomic load-operation
++    UNSPECV_ATOMIC_LDOP_OR	; Represent an atomic load-or
++    UNSPECV_ATOMIC_LDOP_BIC	; Represent an atomic load-bic
++    UNSPECV_ATOMIC_LDOP_XOR	; Represent an atomic load-xor
++    UNSPECV_ATOMIC_LDOP_PLUS	; Represent an atomic load-add
+ ])
+ 
+ ;; -------------------------------------------------------------------
+@@ -293,6 +342,8 @@
+ (define_mode_attr w1 [(SF "w") (DF "x")])
+ (define_mode_attr w2 [(SF "x") (DF "w")])
+ 
++(define_mode_attr short_mask [(HI "65535") (QI "255")])
++
+ ;; For constraints used in scalar immediate vector moves
+ (define_mode_attr hq [(HI "h") (QI "q")])
+ 
+@@ -353,7 +404,8 @@
+                          (V2SI "2s") (V4SI  "4s")
+                          (DI   "1d") (DF    "1d")
+                          (V2DI "2d") (V2SF "2s")
+-			 (V4SF "4s") (V2DF "2d")])
++			 (V4SF "4s") (V2DF "2d")
++			 (V4HF "4h") (V8HF "8h")])
+ 
+ (define_mode_attr Vrevsuff [(V4HI "16") (V8HI "16") (V2SI "32")
+                             (V4SI "32") (V2DI "64")])
+@@ -361,7 +413,8 @@
+ (define_mode_attr Vmtype [(V8QI ".8b") (V16QI ".16b")
+ 			 (V4HI ".4h") (V8HI  ".8h")
+ 			 (V2SI ".2s") (V4SI  ".4s")
+-			 (V2DI ".2d") (V2SF ".2s")
++			 (V2DI ".2d") (V4HF ".4h")
++			 (V8HF ".8h") (V2SF ".2s")
+ 			 (V4SF ".4s") (V2DF ".2d")
+ 			 (DI   "")    (SI   "")
+ 			 (HI   "")    (QI   "")
+@@ -378,7 +431,8 @@
+ (define_mode_attr Vetype [(V8QI "b") (V16QI "b")
+ 			  (V4HI "h") (V8HI  "h")
+                           (V2SI "s") (V4SI  "s")
+-			  (V2DI "d") (V2SF  "s")
++			  (V2DI "d") (V4HF "h")
++			  (V8HF "h") (V2SF  "s")
+ 			  (V4SF "s") (V2DF  "d")
+ 			  (SF   "s") (DF  "d")
+ 			  (QI "b")   (HI "h")
+@@ -388,7 +442,8 @@
+ (define_mode_attr Vbtype [(V8QI "8b")  (V16QI "16b")
+ 			  (V4HI "8b") (V8HI  "16b")
+ 			  (V2SI "8b") (V4SI  "16b")
+-			  (V2DI "16b") (V2SF  "8b")
++			  (V2DI "16b") (V4HF "8b")
++			  (V8HF "16b") (V2SF  "8b")
+ 			  (V4SF "16b") (V2DF  "16b")
+ 			  (DI   "8b")  (DF    "8b")
+ 			  (SI   "8b")])
+@@ -398,6 +453,7 @@
+ 			(V4HI "HI") (V8HI "HI")
+                         (V2SI "SI") (V4SI "SI")
+                         (DI "DI")   (V2DI "DI")
++                        (V4HF "HF") (V8HF "HF")
+                         (V2SF "SF") (V4SF "SF")
+                         (V2DF "DF") (DF "DF")
+ 			(SI   "SI") (HI   "HI")
+@@ -416,6 +472,7 @@
+ 			 (V4HI "V8HI") (V8HI "V8HI")
+ 			 (V2SI "V4SI") (V4SI "V4SI")
+ 			 (DI   "V2DI") (V2DI "V2DI")
++			 (V4HF "V8HF") (V8HF "V8HF")
+ 			 (V2SF "V2SF") (V4SF "V4SF")
+ 			 (V2DF "V2DF") (SI   "V4SI")
+ 			 (HI   "V8HI") (QI   "V16QI")])
+@@ -425,20 +482,38 @@
+ 			 (V4HI "V2HI")  (V8HI  "V4HI")
+ 			 (V2SI "SI")    (V4SI  "V2SI")
+ 			 (V2DI "DI")    (V2SF  "SF")
+-			 (V4SF "V2SF")  (V2DF  "DF")])
++			 (V4SF "V2SF")  (V4HF "V2HF")
++			 (V8HF "V4HF")  (V2DF  "DF")])
++
++;; Half modes of all vector modes, in lower-case.
++(define_mode_attr Vhalf [(V8QI "v4qi")  (V16QI "v8qi")
++			 (V4HI "v2hi")  (V8HI  "v4hi")
++			 (V2SI "si")    (V4SI  "v2si")
++			 (V2DI "di")    (V2SF  "sf")
++			 (V4SF "v2sf")  (V2DF  "df")])
+ 
+ ;; Double modes of vector modes.
+ (define_mode_attr VDBL [(V8QI "V16QI") (V4HI "V8HI")
++			(V4HF "V8HF")
+ 			(V2SI "V4SI")  (V2SF "V4SF")
+ 			(SI   "V2SI")  (DI   "V2DI")
+ 			(DF   "V2DF")])
+ 
++;; Register suffix for double-length mode.
++(define_mode_attr Vdtype [(V4HF "8h") (V2SF "4s")])
++
+ ;; Double modes of vector modes (lower case).
+ (define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi")
++			(V4HF "v8hf")
+ 			(V2SI "v4si")  (V2SF "v4sf")
+ 			(SI   "v2si")  (DI   "v2di")
+ 			(DF   "v2df")])
+ 
++;; Modes with double-width elements.
++(define_mode_attr VDBLW [(V8QI "V4HI") (V16QI "V8HI")
++                  (V4HI "V2SI") (V8HI "V4SI")
++                  (V2SI "DI")   (V4SI "V2DI")])
++
+ ;; Narrowed modes for VDN.
+ (define_mode_attr VNARROWD [(V4HI "V8QI") (V2SI "V4HI")
+ 			    (DI   "V2SI")])
+@@ -465,24 +540,31 @@
+ (define_mode_attr VWIDE [(V8QI "V8HI") (V4HI "V4SI")
+ 			 (V2SI "V2DI") (V16QI "V8HI") 
+ 			 (V8HI "V4SI") (V4SI "V2DI")
+-			 (HI "SI")     (SI "DI")]
+-
++			 (HI "SI")     (SI "DI")
++			 (V8HF "V4SF") (V4SF "V2DF")
++			 (V4HF "V4SF") (V2SF "V2DF")]
+ )
+ 
+-;; Widened mode register suffixes for VD_BHSI/VQW.
++;; Widened modes of vector modes, lowercase
++(define_mode_attr Vwide [(V2SF "v2df") (V4HF "v4sf")])
++
++;; Widened mode register suffixes for VD_BHSI/VQW/VQ_HSF.
+ (define_mode_attr Vwtype [(V8QI "8h") (V4HI "4s")
+ 			  (V2SI "2d") (V16QI "8h") 
+-			  (V8HI "4s") (V4SI "2d")])
++			  (V8HI "4s") (V4SI "2d")
++			  (V8HF "4s") (V4SF "2d")])
+ 
+ ;; Widened mode register suffixes for VDW/VQW.
+ (define_mode_attr Vmwtype [(V8QI ".8h") (V4HI ".4s")
+ 			   (V2SI ".2d") (V16QI ".8h") 
+ 			   (V8HI ".4s") (V4SI ".2d")
++			   (V4HF ".4s") (V2SF ".2d")
+ 			   (SI   "")    (HI   "")])
+ 
+-;; Lower part register suffixes for VQW.
++;; Lower part register suffixes for VQW/VQ_HSF.
+ (define_mode_attr Vhalftype [(V16QI "8b") (V8HI "4h")
+-			     (V4SI "2s")])
++			     (V4SI "2s") (V8HF "4h")
++			     (V4SF "2s")])
+ 
+ ;; Define corresponding core/FP element mode for each vector mode.
+ (define_mode_attr vw   [(V8QI "w") (V16QI "w")
+@@ -498,6 +580,7 @@
+ 			   (V4HI "w") (V8HI "w")
+ 			   (V2SI "w") (V4SI "w")
+ 			   (DI   "x") (V2DI "x")
++			   (V4HF "w") (V8HF "w")
+ 			   (V2SF "w") (V4SF "w")
+ 			   (V2DF "x")])
+ 
+@@ -509,6 +592,7 @@
+ 				(V4HI "V4HI") (V8HI  "V8HI")
+ 				(V2SI "V2SI") (V4SI  "V4SI")
+ 				(DI   "DI")   (V2DI  "V2DI")
++				(V4HF "V4HI") (V8HF  "V8HI")
+ 				(V2SF "V2SI") (V4SF  "V4SI")
+ 				(V2DF "V2DI") (DF    "DI")
+ 				(SF   "SI")])
+@@ -518,6 +602,7 @@
+ 				(V4HI "v4hi") (V8HI  "v8hi")
+ 				(V2SI "v2si") (V4SI  "v4si")
+ 				(DI   "di")   (V2DI  "v2di")
++				(V4HF "v4hi") (V8HF  "v8hi")
+ 				(V2SF "v2si") (V4SF  "v4si")
+ 				(V2DF "v2di") (DF    "di")
+ 				(SF   "si")])
+@@ -536,56 +621,25 @@
+ 
+ (define_mode_attr Vendreg [(OI "T") (CI "U") (XI "V")])
+ 
++;; This is both the number of Q-Registers needed to hold the corresponding
++;; opaque large integer mode, and the number of elements touched by the
++;; ld..._lane and st..._lane operations.
+ (define_mode_attr nregs [(OI "2") (CI "3") (XI "4")])
+ 
+ (define_mode_attr VRL2 [(V8QI "V32QI") (V4HI "V16HI")
++			(V4HF "V16HF")
+ 			(V2SI "V8SI")  (V2SF "V8SF")
+-			(DI   "V4DI")  (DF   "V4DF")
+-			(V16QI "V32QI") (V8HI "V16HI")
+-			(V4SI "V8SI")  (V4SF "V8SF")
+-			(V2DI "V4DI")  (V2DF "V4DF")])
++			(DI   "V4DI")  (DF   "V4DF")])
+ 
+ (define_mode_attr VRL3 [(V8QI "V48QI") (V4HI "V24HI")
++			(V4HF "V24HF")
+ 			(V2SI "V12SI")  (V2SF "V12SF")
+-			(DI   "V6DI")  (DF   "V6DF")
+-			(V16QI "V48QI") (V8HI "V24HI")
+-			(V4SI "V12SI")  (V4SF "V12SF")
+-			(V2DI "V6DI")  (V2DF "V6DF")])
++			(DI   "V6DI")  (DF   "V6DF")])
+ 
+ (define_mode_attr VRL4 [(V8QI "V64QI") (V4HI "V32HI")
++			(V4HF "V32HF")
+ 			(V2SI "V16SI")  (V2SF "V16SF")
+-			(DI   "V8DI")  (DF   "V8DF")
+-			(V16QI "V64QI") (V8HI "V32HI")
+-			(V4SI "V16SI")  (V4SF "V16SF")
+-			(V2DI "V8DI")  (V2DF "V8DF")])
+-
+-(define_mode_attr VSTRUCT_DREG [(OI "TI") (CI "EI") (XI "OI")])
+-
+-;; Mode of pair of elements for each vector mode, to define transfer
+-;; size for structure lane/dup loads and stores.
+-(define_mode_attr V_TWO_ELEM [(V8QI "HI")   (V16QI "HI")
+-                              (V4HI "SI")   (V8HI "SI")
+-                              (V2SI "V2SI") (V4SI "V2SI")
+-                              (DI "V2DI")   (V2DI "V2DI")
+-                              (V2SF "V2SF") (V4SF "V2SF")
+-                              (DF "V2DI")   (V2DF "V2DI")])
+-
+-;; Similar, for three elements.
+-(define_mode_attr V_THREE_ELEM [(V8QI "BLK") (V16QI "BLK")
+-                                (V4HI "BLK") (V8HI "BLK")
+-                                (V2SI "BLK") (V4SI "BLK")
+-                                (DI "EI")    (V2DI "EI")
+-                                (V2SF "BLK") (V4SF "BLK")
+-                                (DF "EI")    (V2DF "EI")])
+-
+-;; Similar, for four elements.
+-(define_mode_attr V_FOUR_ELEM [(V8QI "SI")   (V16QI "SI")
+-                               (V4HI "V4HI") (V8HI "V4HI")
+-                               (V2SI "V4SI") (V4SI "V4SI")
+-                               (DI "OI")     (V2DI "OI")
+-                               (V2SF "V4SF") (V4SF "V4SF")
+-                               (DF "OI")     (V2DF "OI")])
+-
++			(DI   "V8DI")  (DF   "V8DF")])
+ 
+ ;; Mode for atomic operation suffixes
+ (define_mode_attr atomic_sfx
+@@ -603,12 +657,14 @@
+ 				(V2SI "V4SI") (V4SI  "V2SI")
+ 				(DI   "V2DI") (V2DI  "DI")
+ 				(V2SF "V4SF") (V4SF  "V2SF")
++				(V4HF "V8HF") (V8HF  "V4HF")
+ 				(DF   "V2DF") (V2DF  "DF")])
+ 
+ (define_mode_attr vswap_width_name [(V8QI "to_128") (V16QI "to_64")
+ 				    (V4HI "to_128") (V8HI  "to_64")
+ 				    (V2SI "to_128") (V4SI  "to_64")
+ 				    (DI   "to_128") (V2DI  "to_64")
++				    (V4HF "to_128") (V8HF  "to_64")
+ 				    (V2SF "to_128") (V4SF  "to_64")
+ 				    (DF   "to_128") (V2DF  "to_64")])
+ 
+@@ -642,6 +698,7 @@
+ 		     (V4HI "") (V8HI  "_q")
+ 		     (V2SI "") (V4SI  "_q")
+ 		     (DI   "") (V2DI  "_q")
++		     (V4HF "") (V8HF "_q")
+ 		     (V2SF "") (V4SF  "_q")
+ 			       (V2DF  "_q")
+ 		     (QI "") (HI "") (SI "") (DI "") (SF "") (DF "")])
+@@ -657,6 +714,10 @@
+ 
+ (define_mode_attr insn_count [(OI "8") (CI "12") (XI "16")])
+ 
++;; -fpic small model GOT reloc modifers: gotpage_lo15/lo14 for ILP64/32.
++;; No need of iterator for -fPIC as it use got_lo12 for both modes.
++(define_mode_attr got_modifier [(SI "gotpage_lo14") (DI "gotpage_lo15")])
++
+ ;; -------------------------------------------------------------------
+ ;; Code Iterators
+ ;; -------------------------------------------------------------------
+@@ -778,7 +839,8 @@
+ 			   (ltu "1") (leu "1") (geu "2") (gtu "2")])
+ 
+ (define_code_attr CMP [(lt "LT") (le "LE") (eq "EQ") (ge "GE") (gt "GT")
+-			   (ltu "LTU") (leu "LEU") (geu "GEU") (gtu "GTU")])
++			(ltu "LTU") (leu "LEU") (ne "NE") (geu "GEU")
++			(gtu "GTU")])
+ 
+ (define_code_attr fix_trunc_optab [(fix "fix_trunc")
+ 				   (unsigned_fix "fixuns_trunc")])
+@@ -822,9 +884,15 @@
+ ;; Emit cbz/cbnz depending on comparison type.
+ (define_code_attr cbz [(eq "cbz") (ne "cbnz") (lt "cbnz") (ge "cbz")])
+ 
++;; Emit inverted cbz/cbnz depending on comparison type.
++(define_code_attr inv_cb [(eq "cbnz") (ne "cbz") (lt "cbz") (ge "cbnz")])
++
+ ;; Emit tbz/tbnz depending on comparison type.
+ (define_code_attr tbz [(eq "tbz") (ne "tbnz") (lt "tbnz") (ge "tbz")])
+ 
++;; Emit inverted tbz/tbnz depending on comparison type.
++(define_code_attr inv_tb [(eq "tbnz") (ne "tbz") (lt "tbz") (ge "tbnz")])
++
+ ;; Max/min attributes.
+ (define_code_attr maxmin [(smax "max")
+ 			  (smin "min")
+@@ -907,6 +975,8 @@
+                                UNSPEC_SQSHRN UNSPEC_UQSHRN
+                                UNSPEC_SQRSHRN UNSPEC_UQRSHRN])
+ 
++(define_int_iterator SQRDMLH_AS [UNSPEC_SQRDMLAH UNSPEC_SQRDMLSH])
++
+ (define_int_iterator PERMUTE [UNSPEC_ZIP1 UNSPEC_ZIP2
+ 			      UNSPEC_TRN1 UNSPEC_TRN2
+ 			      UNSPEC_UZP1 UNSPEC_UZP2])
+@@ -933,6 +1003,16 @@
+ 
+ (define_int_iterator CRYPTO_SHA256 [UNSPEC_SHA256H UNSPEC_SHA256H2])
+ 
++;; Iterators for atomic operations.
++
++(define_int_iterator ATOMIC_LDOP
++ [UNSPECV_ATOMIC_LDOP_OR UNSPECV_ATOMIC_LDOP_BIC
++  UNSPECV_ATOMIC_LDOP_XOR UNSPECV_ATOMIC_LDOP_PLUS])
++
++(define_int_attr atomic_ldop
++ [(UNSPECV_ATOMIC_LDOP_OR "set") (UNSPECV_ATOMIC_LDOP_BIC "clr")
++  (UNSPECV_ATOMIC_LDOP_XOR "eor") (UNSPECV_ATOMIC_LDOP_PLUS "add")])
++
+ ;; -------------------------------------------------------------------
+ ;; Int Iterators Attributes.
+ ;; -------------------------------------------------------------------
+@@ -1071,3 +1151,5 @@
+ 			  (UNSPEC_SHA1M "m")])
+ 
+ (define_int_attr sha256_op [(UNSPEC_SHA256H "") (UNSPEC_SHA256H2 "2")])
++
++(define_int_attr rdma_as [(UNSPEC_SQRDMLAH "a") (UNSPEC_SQRDMLSH "s")])
+--- a/src/gcc/config/aarch64/predicates.md
++++ b/src/gcc/config/aarch64/predicates.md
+@@ -100,6 +100,10 @@
+   (and (match_code "const_int")
+        (match_test "(INTVAL (op) < 0xffffff && INTVAL (op) > -0xffffff)")))
+ 
++(define_predicate "aarch64_pluslong_strict_immedate"
++  (and (match_operand 0 "aarch64_pluslong_immediate")
++       (not (match_operand 0 "aarch64_plus_immediate"))))
++
+ (define_predicate "aarch64_pluslong_operand"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_pluslong_immediate")))
+@@ -138,6 +142,11 @@
+   (and (match_code "const_int")
+        (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) <= 4")))
+ 
++;; An immediate that fits into 24 bits.
++(define_predicate "aarch64_imm24"
++  (and (match_code "const_int")
++       (match_test "IN_RANGE (UINTVAL (op), 0, 0xffffff)")))
++
+ (define_predicate "aarch64_pwr_imm3"
+   (and (match_code "const_int")
+        (match_test "INTVAL (op) != 0
+@@ -165,7 +174,7 @@
+ (define_predicate "aarch64_valid_symref"
+   (match_code "const, symbol_ref, label_ref")
+ {
+-  return (aarch64_classify_symbolic_expression (op, SYMBOL_CONTEXT_ADR)
++  return (aarch64_classify_symbolic_expression (op)
+ 	  != SYMBOL_FORCE_TO_MEM);
+ })
+ 
+@@ -215,7 +224,7 @@
+   (and (match_code "reg,subreg,mem,const,const_int,symbol_ref,label_ref,high")
+        (ior (match_operand 0 "register_operand")
+ 	    (ior (match_operand 0 "memory_operand")
+-		 (match_test "aarch64_mov_operand_p (op, SYMBOL_CONTEXT_ADR, mode)")))))
++		 (match_test "aarch64_mov_operand_p (op, mode)")))))
+ 
+ (define_predicate "aarch64_movti_operand"
+   (and (match_code "reg,subreg,mem,const_int")
+@@ -294,7 +303,7 @@
+ })
+ 
+ (define_predicate "aarch64_simd_reg_or_zero"
+-  (and (match_code "reg,subreg,const_int,const_vector")
++  (and (match_code "reg,subreg,const_int,const_double,const_vector")
+        (ior (match_operand 0 "register_operand")
+            (ior (match_test "op == const0_rtx")
+                 (match_test "aarch64_simd_imm_zero_p (op, mode)")))))
+@@ -381,3 +390,7 @@
+ (define_predicate "aarch64_simd_shift_imm_bitsize_di"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 0, 64)")))
++
++(define_predicate "aarch64_constant_pool_symref"
++   (and (match_code "symbol_ref")
++	(match_test "CONSTANT_POOL_ADDRESS_P (op)")))
+--- a/src/gcc/config/aarch64/t-aarch64
++++ b/src/gcc/config/aarch64/t-aarch64
+@@ -19,7 +19,10 @@
+ #  <http://www.gnu.org/licenses/>.
+ 
+ TM_H += $(srcdir)/config/aarch64/aarch64-cores.def
+-OPTIONS_H_EXTRA += $(srcdir)/config/aarch64/aarch64-cores.def
++OPTIONS_H_EXTRA += $(srcdir)/config/aarch64/aarch64-cores.def \
++		   $(srcdir)/config/aarch64/aarch64-arches.def \
++		   $(srcdir)/config/aarch64/aarch64-fusion-pairs.def \
++		   $(srcdir)/config/aarch64/aarch64-tuning-flags.def
+ 
+ $(srcdir)/config/aarch64/aarch64-tune.md: $(srcdir)/config/aarch64/gentune.sh \
+ 	$(srcdir)/config/aarch64/aarch64-cores.def
+@@ -48,6 +51,21 @@ aarch-common.o: $(srcdir)/config/arm/aarch-common.c $(CONFIG_H) $(SYSTEM_H) \
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/arm/aarch-common.c
+ 
++aarch64-c.o: $(srcdir)/config/aarch64/aarch64-c.c $(CONFIG_H) $(SYSTEM_H) \
++    coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H)
++	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
++		$(srcdir)/config/aarch64/aarch64-c.c
++
++cortex-a57-fma-steering.o: $(srcdir)/config/aarch64/cortex-a57-fma-steering.c \
++    $(CONFIG_H) $(SYSTEM_H) $(TM_H) $(REGS_H) insn-config.h $(RTL_BASE_H) \
++    dominance.h cfg.h cfganal.h $(BASIC_BLOCK_H) $(INSN_ATTR_H) $(RECOG_H) \
++    output.h hash-map.h $(DF_H) $(OBSTACK_H) $(TARGET_H) $(RTL_H) \
++    $(CONTEXT_H) $(TREE_PASS_H) regrename.h \
++    $(srcdir)/config/aarch64/cortex-a57-fma-steering.h \
++    $(srcdir)/config/aarch64/aarch64-protos.h
++	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
++		$(srcdir)/config/aarch64/cortex-a57-fma-steering.c
++
+ comma=,
+ MULTILIB_OPTIONS    = $(subst $(comma),/, $(patsubst %, mabi=%, $(subst $(comma),$(comma)mabi=,$(TM_MULTILIB_CONFIG))))
+ MULTILIB_DIRNAMES   = $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
+--- a/src/gcc/config/aarch64/thunderx.md
++++ b/src/gcc/config/aarch64/thunderx.md
+@@ -39,7 +39,7 @@
+ 
+ (define_insn_reservation "thunderx_shift" 1
+   (and (eq_attr "tune" "thunderx")
+-       (eq_attr "type" "bfm,extend,shift_imm,shift_reg"))
++       (eq_attr "type" "bfm,extend,rotate_imm,shift_imm,shift_reg,rbit,rev"))
+   "thunderx_pipe0 | thunderx_pipe1")
+ 
+ 
+@@ -66,12 +66,18 @@
+        (eq_attr "type" "mul,muls,mla,mlas,clz,smull,umull,smlal,umlal"))
+   "thunderx_pipe1 + thunderx_mult")
+ 
+-;; Multiply high instructions take an extra cycle and cause the muliply unit to
+-;; be busy for an extra cycle.
++;; crcb,crch,crcw is 4 cycles and can only happen on pipe 1
+ 
+-;(define_insn_reservation "thunderx_mul_high" 5
++(define_insn_reservation "thunderx_crc32" 4
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "crc"))
++  "thunderx_pipe1 + thunderx_mult")
++
++;; crcx is 5 cycles and only happen on pipe 1
++;(define_insn_reservation "thunderx_crc64" 5
+ ;  (and (eq_attr "tune" "thunderx")
+-;       (eq_attr "type" "smull,umull"))
++;       (eq_attr "type" "crc")
++;       (eq_attr "mode" "DI"))
+ ;  "thunderx_pipe1 + thunderx_mult")
+ 
+ (define_insn_reservation "thunderx_div32" 22
+@@ -97,6 +103,11 @@
+        (eq_attr "type" "store2"))
+   "thunderx_pipe0 + thunderx_pipe1")
+ 
++;; Prefetch are single issued
++;(define_insn_reservation "thunderx_prefetch" 1
++;  (and (eq_attr "tune" "thunderx")
++;       (eq_attr "type" "prefetch"))
++;  "thunderx_pipe0 + thunderx_pipe1")
+ 
+ ;; loads (and load pairs) from L1 take 3 cycles in pipe 0
+ (define_insn_reservation "thunderx_load" 3
+@@ -121,10 +132,21 @@
+        (eq_attr "type" "fconsts,fconstd"))
+   "thunderx_pipe1")
+ 
+-;; Moves between fp are 2 cycles including min/max/select/abs/neg
++;; Moves between fp are 2 cycles including min/max
+ (define_insn_reservation "thunderx_fmov" 2
+   (and (eq_attr "tune" "thunderx")
+-       (eq_attr "type" "fmov,f_minmaxs,f_minmaxd,fcsel,ffarithd,ffariths"))
++       (eq_attr "type" "fmov,f_minmaxs,f_minmaxd"))
++  "thunderx_pipe1")
++
++;; ABS, and NEG are 1 cycle
++(define_insn_reservation "thunderx_fabs" 1
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "ffariths,ffarithd"))
++  "thunderx_pipe1")
++
++(define_insn_reservation "thunderx_fcsel" 3
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "fcsel"))
+   "thunderx_pipe1")
+ 
+ (define_insn_reservation "thunderx_fmovgpr" 2
+@@ -132,6 +154,11 @@
+        (eq_attr "type" "f_mrc, f_mcr"))
+   "thunderx_pipe1")
+ 
++(define_insn_reservation "thunderx_fcmp" 3
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "fcmps,fcmpd"))
++  "thunderx_pipe1")
++
+ (define_insn_reservation "thunderx_fmul" 6
+   (and (eq_attr "tune" "thunderx")
+        (eq_attr "type" "fmacs,fmacd,fmuls,fmuld"))
+@@ -152,21 +179,21 @@
+        (eq_attr "type" "fsqrts"))
+   "thunderx_pipe1 + thunderx_divide, thunderx_divide*13")
+ 
+-(define_insn_reservation "thunderx_fsqrtd" 28
++(define_insn_reservation "thunderx_fsqrtd" 31
+   (and (eq_attr "tune" "thunderx")
+        (eq_attr "type" "fsqrtd"))
+-  "thunderx_pipe1 + thunderx_divide, thunderx_divide*31")
++  "thunderx_pipe1 + thunderx_divide, thunderx_divide*27")
+ 
+ ;; The rounding conversion inside fp is 4 cycles
+ (define_insn_reservation "thunderx_frint" 4
+   (and (eq_attr "tune" "thunderx")
+-       (eq_attr "type" "f_rints,f_rintd"))
++       (eq_attr "type" "f_cvt,f_rints,f_rintd"))
+   "thunderx_pipe1")
+ 
+ ;; Float to integer with a move from int to/from float is 6 cycles
+ (define_insn_reservation "thunderx_f_cvt" 6
+   (and (eq_attr "tune" "thunderx")
+-       (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f"))
++       (eq_attr "type" "f_cvtf2i,f_cvti2f"))
+   "thunderx_pipe1")
+ 
+ ;; FP/SIMD load/stores happen in pipe 0
+@@ -184,9 +211,12 @@
+   "thunderx_pipe0+thunderx_pipe1")
+ 
+ ;; FP/SIMD Stores takes one cycle in pipe 0
++;; ST1 with one registers either multiple structures or single structure is
++;;    also one cycle.
+ (define_insn_reservation "thunderx_simd_fp_store" 1
+   (and (eq_attr "tune" "thunderx")
+-       (eq_attr "type" "f_stored,f_stores,neon_store1_1reg,neon_store1_1reg_q"))
++       (eq_attr "type" "f_stored,f_stores,neon_store1_1reg,neon_store1_1reg_q, \
++			neon_store1_one_lane, neon_store1_one_lane_q"))
+   "thunderx_pipe0")
+ 
+ ;; 64bit neon store pairs are single issue for one cycle
+@@ -201,24 +231,38 @@
+        (eq_attr "type" "neon_store1_2reg_q"))
+   "(thunderx_pipe0 + thunderx_pipe1)*2")
+ 
++;; LD1R/LD1 (with a single struct) takes 6 cycles and issued in pipe0
++(define_insn_reservation "thunderx_neon_ld1" 6
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "neon_load1_all_lanes"))
++  "thunderx_pipe0")
+ 
+ ;; SIMD/NEON (q forms take an extra cycle)
++;; SIMD For ThunderX is 64bit wide,
+ 
+-;; Thunder simd move instruction types - 2/3 cycles
++;; ThunderX simd move instruction types - 2/3 cycles
++;; ThunderX dup, ins is the same
++;; ThunderX SIMD fabs/fneg instruction types
+ (define_insn_reservation "thunderx_neon_move" 2
+   (and (eq_attr "tune" "thunderx")
+        (eq_attr "type" "neon_logic, neon_bsl, neon_fp_compare_s, \
+-			neon_fp_compare_d, neon_move"))
++			neon_fp_compare_d, neon_move, neon_dup, \
++			neon_ins, neon_from_gp, neon_to_gp, \
++			neon_abs, neon_neg, \
++			neon_fp_neg_s, neon_fp_abs_s"))
+   "thunderx_pipe1 + thunderx_simd")
+ 
+ (define_insn_reservation "thunderx_neon_move_q" 3
+   (and (eq_attr "tune" "thunderx")
+        (eq_attr "type" "neon_logic_q, neon_bsl_q, neon_fp_compare_s_q, \
+-			neon_fp_compare_d_q, neon_move_q"))
++			neon_fp_compare_d_q, neon_move_q, neon_dup_q, \
++			neon_ins_q, neon_from_gp_q, neon_to_gp_q, \
++			neon_abs_q, neon_neg_q, \
++			neon_fp_neg_s_q, neon_fp_neg_d_q, \
++			neon_fp_abs_s_q, neon_fp_abs_d_q"))
+   "thunderx_pipe1 + thunderx_simd, thunderx_simd")
+ 
+-
+-;; Thunder simd simple/add instruction types - 4/5 cycles
++;; ThunderX simd simple/add instruction types - 4/5 cycles
+ 
+ (define_insn_reservation "thunderx_neon_add" 4
+   (and (eq_attr "tune" "thunderx")
+@@ -227,7 +271,9 @@
+ 			neon_add_halve, neon_sub_halve, neon_qadd, neon_compare, \
+ 			neon_compare_zero, neon_minmax, neon_abd, neon_add, neon_sub, \
+ 			neon_fp_minmax_s, neon_fp_minmax_d, neon_reduc_add, neon_cls, \
+-			neon_qabs, neon_qneg, neon_fp_addsub_s, neon_fp_addsub_d"))
++			neon_qabs, neon_qneg, neon_fp_addsub_s, neon_fp_addsub_d, \
++			neon_arith_acc, neon_rev, neon_fp_abd_s, neon_fp_abd_d, \
++			neon_fp_reduc_minmax_s"))
+   "thunderx_pipe1 + thunderx_simd")
+ 
+ ;; BIG NOTE: neon_add_long/neon_sub_long don't have a q form which is incorrect
+@@ -240,13 +286,74 @@
+ 			neon_compare_zero_q, neon_minmax_q, neon_abd_q, neon_add_q, neon_sub_q, \
+ 			neon_fp_minmax_s_q, neon_fp_minmax_d_q, neon_reduc_add_q, neon_cls_q, \
+ 			neon_qabs_q, neon_qneg_q, neon_fp_addsub_s_q, neon_fp_addsub_d_q, \
+-			neon_add_long, neon_sub_long"))
++			neon_add_long, neon_sub_long, neon_fp_abd_s_q, neon_fp_abd_d_q, \
++			neon_arith_acc_q, neon_rev_q, \
++			neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d_q"))
+   "thunderx_pipe1 + thunderx_simd, thunderx_simd")
+ 
++;; Multiplies (float and integer) and shifts and permutes (except for TBL) and float conversions
++;; are 6/7 cycles
++(define_insn_reservation "thunderx_neon_mult" 6
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "neon_fp_mul_s, neon_fp_mul_d, neon_fp_mla_s, neon_fp_mla_d, \
++			neon_mla_b, neon_mla_h, neon_mla_s, \
++			neon_mla_h_scalar, neon_mla_s_scalar, \
++			neon_ext, neon_shift_imm, neon_permute, \
++			neon_int_to_fp_s, neon_int_to_fp_d, neon_shift_reg, \
++			neon_sat_shift_reg, neon_shift_acc, \
++			neon_mul_b, neon_mul_h, neon_mul_s, \
++			neon_mul_h_scalar, neon_mul_s_scalar, \
++			neon_fp_mul_s_scalar, \
++			neon_fp_mla_s_scalar"))
++  "thunderx_pipe1 + thunderx_simd")
++
++(define_insn_reservation "thunderx_neon_mult_q" 7
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "neon_fp_mul_s_q, neon_fp_mul_d_q, neon_fp_mla_s_q, neon_fp_mla_d_q, \
++			neon_mla_b_q, neon_mla_h_q, neon_mla_s_q, \
++			neon_mla_h_scalar_q, neon_mla_s_scalar_q, \
++			neon_ext_q, neon_shift_imm_q, neon_permute_q, \
++			neon_int_to_fp_s_q, neon_int_to_fp_d_q, neon_shift_reg_q, \
++			neon_sat_shift_reg_q, neon_shift_acc_q, \
++			neon_shift_imm_long, \
++			neon_mul_b_q, neon_mul_h_q, neon_mul_s_q, \
++			neon_mul_h_scalar_q, neon_mul_s_scalar_q, \
++			neon_fp_mul_s_scalar_q, neon_fp_mul_d_scalar_q, \
++			neon_mul_b_long, neon_mul_h_long, neon_mul_s_long, \
++			neon_shift_imm_narrow_q, neon_fp_cvt_widen_s, neon_fp_cvt_narrow_d_q, \
++			neon_fp_mla_s_scalar_q, neon_fp_mla_d_scalar_q"))
++  "thunderx_pipe1 + thunderx_simd, thunderx_simd")
++
++
++;; AES[ED] is 5 cycles
++(define_insn_reservation "thunderx_crypto_aese" 5
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "crypto_aese"))
++  "thunderx_pipe1 + thunderx_simd, thunderx_simd")
+ 
+-;; Thunder 128bit SIMD reads the upper halve in cycle 2 and writes in the last cycle
+-(define_bypass 2 "thunderx_neon_move_q" "thunderx_neon_move_q, thunderx_neon_add_q")
+-(define_bypass 4 "thunderx_neon_add_q" "thunderx_neon_move_q, thunderx_neon_add_q")
++;; AES{,I}MC is 3 cycles
++(define_insn_reservation "thunderx_crypto_aesmc" 3
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "crypto_aesmc"))
++  "thunderx_pipe1 + thunderx_simd, thunderx_simd")
++
++
++;; Thunder 128bit SIMD reads the upper halve in cycle 2 and writes upper halve in the last cycle
++(define_bypass 2 "thunderx_neon_move_q" "thunderx_neon_move_q, thunderx_neon_add_q, thunderx_neon_mult_q")
++(define_bypass 4 "thunderx_neon_add_q" "thunderx_neon_move_q, thunderx_neon_add_q, thunderx_neon_mult_q")
++(define_bypass 6 "thunderx_neon_mult_q" "thunderx_neon_move_q, thunderx_neon_add_q, thunderx_neon_mult_q")
++
++;; 64bit TBL is emulated and takes 160 cycles
++(define_insn_reservation "thunderx_tbl" 160
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "neon_tbl1"))
++  "(thunderx_pipe1+thunderx_pipe0)*160")
++
++;; 128bit TBL is emulated and takes 320 cycles
++(define_insn_reservation "thunderx_tblq" 320
++  (and (eq_attr "tune" "thunderx")
++       (eq_attr "type" "neon_tbl1_q"))
++  "(thunderx_pipe1+thunderx_pipe0)*320")
+ 
+ ;; Assume both pipes are needed for unknown and multiple-instruction
+ ;; patterns.
+--- /dev/null
++++ b/src/gcc/config/aarch64/x-aarch64
+@@ -0,0 +1,3 @@
++driver-aarch64.o: $(srcdir)/config/aarch64/driver-aarch64.c \
++  $(CONFIG_H) $(SYSTEM_H)
++	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
+--- a/src/gcc/config/alpha/linux.h
++++ b/src/gcc/config/alpha/linux.h
+@@ -61,10 +61,14 @@ along with GCC; see the file COPYING3.  If not see
+ #define OPTION_GLIBC  (DEFAULT_LIBC == LIBC_GLIBC)
+ #define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC)
+ #define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (DEFAULT_LIBC == LIBC_MUSL)
+ #else
+ #define OPTION_GLIBC  (linux_libc == LIBC_GLIBC)
+ #define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC)
+ #define OPTION_BIONIC (linux_libc == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (linux_libc == LIBC_MUSL)
+ #endif
+ 
+ /* Determine what functions are present at the runtime;
+--- a/src/gcc/config/arm/aarch-common-protos.h
++++ b/src/gcc/config/arm/aarch-common-protos.h
+@@ -23,7 +23,9 @@
+ #ifndef GCC_AARCH_COMMON_PROTOS_H
+ #define GCC_AARCH_COMMON_PROTOS_H
+ 
++extern int aarch_accumulator_forwarding (rtx_insn *, rtx_insn *);
+ extern int aarch_crypto_can_dual_issue (rtx_insn *, rtx_insn *);
++extern int aarch_forward_to_shift_is_not_shifted_reg (rtx_insn *, rtx_insn *);
+ extern bool aarch_rev16_p (rtx);
+ extern bool aarch_rev16_shleft_mask_imm_p (rtx, machine_mode);
+ extern bool aarch_rev16_shright_mask_imm_p (rtx, machine_mode);
+@@ -102,6 +104,8 @@ struct mem_cost_table
+   const int storef;		/* SFmode.  */
+   const int stored;		/* DFmode.  */
+   const int store_unaligned;	/* Extra for unaligned stores.  */
++  const int loadv;		/* Vector load.  */
++  const int storev;		/* Vector store.  */
+ };
+ 
+ struct fp_cost_table
+--- a/src/gcc/config/arm/aarch-common.c
++++ b/src/gcc/config/arm/aarch-common.c
+@@ -71,8 +71,11 @@ aarch_crypto_can_dual_issue (rtx_insn *producer_insn, rtx_insn *consumer_insn)
+   {
+     unsigned int regno = REGNO (SET_DEST (producer_set));
+ 
+-    return REGNO (SET_DEST (consumer_set)) == regno
+-           && REGNO (XVECEXP (consumer_src, 0, 0)) == regno;
++    /* Before reload the registers are virtual, so the destination of
++       consumer_set doesn't need to match.  */
++
++    return (REGNO (SET_DEST (consumer_set)) == regno || !reload_completed)
++	    && REGNO (XVECEXP (consumer_src, 0, 0)) == regno;
+   }
+ 
+   return 0;
+@@ -402,6 +405,118 @@ arm_mac_accumulator_is_result (rtx producer, rtx consumer)
+           && !reg_overlap_mentioned_p (result, op1));
+ }
+ 
++/* Return non-zero if the destination of PRODUCER feeds the accumulator
++   operand of an MLA-like operation.  */
++
++int
++aarch_accumulator_forwarding (rtx_insn *producer, rtx_insn *consumer)
++{
++  rtx producer_set = single_set (producer);
++  rtx consumer_set = single_set (consumer);
++
++  /* We are looking for a SET feeding a SET.  */
++  if (!producer_set || !consumer_set)
++    return 0;
++
++  rtx dest = SET_DEST (producer_set);
++  rtx mla = SET_SRC (consumer_set);
++
++  /* We're looking for a register SET.  */
++  if (!REG_P (dest))
++    return 0;
++
++  rtx accumulator;
++
++  /* Strip a zero_extend.  */
++  if (GET_CODE (mla) == ZERO_EXTEND)
++    mla = XEXP (mla, 0);
++
++  switch (GET_CODE (mla))
++    {
++    case PLUS:
++      /* Possibly an MADD.  */
++      if (GET_CODE (XEXP (mla, 0)) == MULT)
++	accumulator = XEXP (mla, 1);
++      else
++	return 0;
++      break;
++    case MINUS:
++      /* Possibly an MSUB.  */
++      if (GET_CODE (XEXP (mla, 1)) == MULT)
++	accumulator = XEXP (mla, 0);
++      else
++	return 0;
++      break;
++    case FMA:
++	{
++	  /* Possibly an FMADD/FMSUB/FNMADD/FNMSUB.  */
++	  if (REG_P (XEXP (mla, 1))
++	      && REG_P (XEXP (mla, 2))
++	      && (REG_P (XEXP (mla, 0))
++		  || GET_CODE (XEXP (mla, 0)) == NEG))
++
++	    {
++	      /* FMADD/FMSUB.  */
++	      accumulator = XEXP (mla, 2);
++	    }
++	  else if (REG_P (XEXP (mla, 1))
++		   && GET_CODE (XEXP (mla, 2)) == NEG
++		   && (REG_P (XEXP (mla, 0))
++		       || GET_CODE (XEXP (mla, 0)) == NEG))
++	    {
++	      /* FNMADD/FNMSUB.  */
++	      accumulator = XEXP (XEXP (mla, 2), 0);
++	    }
++	  else
++	    return 0;
++	  break;
++	}
++      default:
++	/* Not an MLA-like operation.  */
++	return 0;
++    }
++
++  if (GET_CODE (accumulator) == SUBREG)
++    accumulator = SUBREG_REG (accumulator);
++
++  if (!REG_P (accumulator))
++    return 0;
++
++  return (REGNO (dest) == REGNO (accumulator));
++}
++
++/* Return nonzero if the CONSUMER instruction is some sort of
++   arithmetic or logic + shift operation, and the register we are
++   writing in PRODUCER is not used in a register shift by register
++   operation.  */
++
++int
++aarch_forward_to_shift_is_not_shifted_reg (rtx_insn *producer,
++					   rtx_insn *consumer)
++{
++  rtx value, op;
++  rtx early_op;
++
++  if (!arm_get_set_operands (producer, consumer, &value, &op))
++    return 0;
++
++  if ((early_op = arm_find_shift_sub_rtx (op)))
++    {
++      if (REG_P (early_op))
++	early_op = op;
++
++      /* Any other canonicalisation of a shift is a shift-by-constant
++	 so we don't care.  */
++      if (GET_CODE (early_op) == ASHIFT)
++	return (!REG_P (XEXP (early_op, 0))
++		|| !REG_P (XEXP (early_op, 1)));
++      else
++	return 1;
++    }
++
++  return 0;
++}
++
+ /* Return non-zero if the consumer (a multiply-accumulate instruction)
+    has an accumulator dependency on the result of the producer (a
+    multiplication instruction) and no other dependency on that result.  */
+--- a/src/gcc/config/arm/aarch-cost-tables.h
++++ b/src/gcc/config/arm/aarch-cost-tables.h
+@@ -81,7 +81,9 @@ const struct cpu_cost_table generic_extra_costs =
+     1,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (2),	/* storef.  */
+     COSTS_N_INSNS (3),	/* stored.  */
+-    COSTS_N_INSNS (1)  /* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -130,12 +132,12 @@ const struct cpu_cost_table cortexa53_extra_costs =
+     0,			/* arith.  */
+     0,			/* logical.  */
+     COSTS_N_INSNS (1),	/* shift.  */
+-    COSTS_N_INSNS (2),	/* shift_reg.  */
++    0,			/* shift_reg.  */
+     COSTS_N_INSNS (1),	/* arith_shift.  */
+-    COSTS_N_INSNS (2),	/* arith_shift_reg.  */
++    COSTS_N_INSNS (1),	/* arith_shift_reg.  */
+     COSTS_N_INSNS (1),	/* log_shift.  */
+-    COSTS_N_INSNS (2),	/* log_shift_reg.  */
+-    0,			/* extend.  */
++    COSTS_N_INSNS (1),	/* log_shift_reg.  */
++    COSTS_N_INSNS (1),	/* extend.  */
+     COSTS_N_INSNS (1),	/* extend_arith.  */
+     COSTS_N_INSNS (1),	/* bfi.  */
+     COSTS_N_INSNS (1),	/* bfx.  */
+@@ -182,7 +184,9 @@ const struct cpu_cost_table cortexa53_extra_costs =
+     2,				/* stm_regs_per_insn_subsequent.  */
+     0,				/* storef.  */
+     0,				/* stored.  */
+-    COSTS_N_INSNS (1)		/* store_unaligned.  */
++    COSTS_N_INSNS (1),		/* store_unaligned.  */
++    COSTS_N_INSNS (1),		/* loadv.  */
++    COSTS_N_INSNS (1)		/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -283,7 +287,9 @@ const struct cpu_cost_table cortexa57_extra_costs =
+     2,                         /* stm_regs_per_insn_subsequent.  */
+     0,                         /* storef.  */
+     0,                         /* stored.  */
+-    COSTS_N_INSNS (1)          /* store_unaligned.  */
++    COSTS_N_INSNS (1),         /* store_unaligned.  */
++    COSTS_N_INSNS (1),         /* loadv.  */
++    COSTS_N_INSNS (1)          /* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -385,6 +391,8 @@ const struct cpu_cost_table xgene1_extra_costs =
+     0,                         /* storef.  */
+     0,                         /* stored.  */
+     0,                         /* store_unaligned.  */
++    COSTS_N_INSNS (1),         /* loadv.  */
++    COSTS_N_INSNS (1)          /* storev.  */
+   },
+   {
+     /* FP SFmode */
+--- a/src/gcc/config/arm/arm-arches.def
++++ b/src/gcc/config/arm/arm-arches.def
+@@ -23,38 +23,45 @@
+ 
+    The NAME is the name of the architecture, represented as a string
+    constant.  The CORE is the identifier for a core representative of
+-   this architecture.  ARCH is the architecture revision.  FLAGS are
+-   the flags implied by the architecture.
++   this architecture.  ARCH is the architecture revision.  FLAGS is
++   the set of feature flags implied by the architecture.
+ 
+    genopt.sh assumes no whitespace up to the first "," in each entry.  */
+ 
+-ARM_ARCH("armv2",   arm2,       2,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2)
+-ARM_ARCH("armv2a",  arm2,       2,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2)
+-ARM_ARCH("armv3",   arm6,       3,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3)
+-ARM_ARCH("armv3m",  arm7m,      3M,  FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M)
+-ARM_ARCH("armv4",   arm7tdmi,   4,   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH4)
++ARM_ARCH("armv2",   arm2,       2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2))
++ARM_ARCH("armv2a",  arm2,       2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2))
++ARM_ARCH("armv3",   arm6,       3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3))
++ARM_ARCH("armv3m",  arm7m,      3M,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M))
++ARM_ARCH("armv4",   arm7tdmi,   4,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH4))
+ /* Strictly, FL_MODE26 is a permitted option for v4t, but there are no
+    implementations that support it, so we will leave it out for now.  */
+-ARM_ARCH("armv4t",  arm7tdmi,   4T,  FL_CO_PROC |             FL_FOR_ARCH4T)
+-ARM_ARCH("armv5",   arm10tdmi,  5,   FL_CO_PROC |             FL_FOR_ARCH5)
+-ARM_ARCH("armv5t",  arm10tdmi,  5T,  FL_CO_PROC |             FL_FOR_ARCH5T)
+-ARM_ARCH("armv5e",  arm1026ejs, 5E,  FL_CO_PROC |             FL_FOR_ARCH5E)
+-ARM_ARCH("armv5te", arm1026ejs, 5TE, FL_CO_PROC |             FL_FOR_ARCH5TE)
+-ARM_ARCH("armv6",   arm1136js,  6,   FL_CO_PROC |             FL_FOR_ARCH6)
+-ARM_ARCH("armv6j",  arm1136js,  6J,  FL_CO_PROC |             FL_FOR_ARCH6J)
+-ARM_ARCH("armv6k",  mpcore,	6K,  FL_CO_PROC |             FL_FOR_ARCH6K)
+-ARM_ARCH("armv6z",  arm1176jzs, 6Z,  FL_CO_PROC |             FL_FOR_ARCH6Z)
+-ARM_ARCH("armv6zk", arm1176jzs, 6ZK, FL_CO_PROC |             FL_FOR_ARCH6ZK)
+-ARM_ARCH("armv6t2", arm1156t2s, 6T2, FL_CO_PROC |             FL_FOR_ARCH6T2)
+-ARM_ARCH("armv6-m", cortexm1,	6M,			      FL_FOR_ARCH6M)
+-ARM_ARCH("armv6s-m", cortexm1,	6M,			      FL_FOR_ARCH6M)
+-ARM_ARCH("armv7",   cortexa8,	7,   FL_CO_PROC |	      FL_FOR_ARCH7)
+-ARM_ARCH("armv7-a", cortexa8,	7A,  FL_CO_PROC |	      FL_FOR_ARCH7A)
+-ARM_ARCH("armv7ve", cortexa8,	7A,  FL_CO_PROC |	      FL_FOR_ARCH7VE)
+-ARM_ARCH("armv7-r", cortexr4,	7R,  FL_CO_PROC |	      FL_FOR_ARCH7R)
+-ARM_ARCH("armv7-m", cortexm3,	7M,  FL_CO_PROC |	      FL_FOR_ARCH7M)
+-ARM_ARCH("armv7e-m", cortexm4,  7EM, FL_CO_PROC |	      FL_FOR_ARCH7EM)
+-ARM_ARCH("armv8-a", cortexa53,  8A,  FL_CO_PROC |             FL_FOR_ARCH8A)
+-ARM_ARCH("armv8-a+crc",cortexa53, 8A,FL_CO_PROC | FL_CRC32  | FL_FOR_ARCH8A)
+-ARM_ARCH("iwmmxt",  iwmmxt,     5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT)
+-ARM_ARCH("iwmmxt2", iwmmxt2,    5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2)
++ARM_ARCH("armv4t",  arm7tdmi,   4T,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH4T))
++ARM_ARCH("armv5",   arm10tdmi,  5,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH5))
++ARM_ARCH("armv5t",  arm10tdmi,  5T,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH5T))
++ARM_ARCH("armv5e",  arm1026ejs, 5E,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH5E))
++ARM_ARCH("armv5te", arm1026ejs, 5TE,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH5TE))
++ARM_ARCH("armv6",   arm1136js,  6,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6))
++ARM_ARCH("armv6j",  arm1136js,  6J,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6J))
++ARM_ARCH("armv6k",  mpcore,	6K,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6K))
++ARM_ARCH("armv6z",  arm1176jzs, 6Z,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6Z))
++ARM_ARCH("armv6kz", arm1176jzs, 6KZ,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6KZ))
++ARM_ARCH("armv6zk", arm1176jzs, 6KZ,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6KZ))
++ARM_ARCH("armv6t2", arm1156t2s, 6T2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH6T2))
++ARM_ARCH("armv6-m", cortexm1,	6M,	ARM_FSET_MAKE_CPU1 (FL_FOR_ARCH6M))
++ARM_ARCH("armv6s-m", cortexm1,	6M,	ARM_FSET_MAKE_CPU1 (FL_FOR_ARCH6M))
++ARM_ARCH("armv7",   cortexa8,	7,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7))
++ARM_ARCH("armv7-a", cortexa8,	7A,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7A))
++ARM_ARCH("armv7ve", cortexa8,	7A,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7VE))
++ARM_ARCH("armv7-r", cortexr4,	7R,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7R))
++ARM_ARCH("armv7-m", cortexm3,	7M,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7M))
++ARM_ARCH("armv7e-m", cortexm4,  7EM,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |	      FL_FOR_ARCH7EM))
++ARM_ARCH("armv8-a", cortexa53,  8A,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC |             FL_FOR_ARCH8A))
++ARM_ARCH("armv8-a+crc",cortexa53, 8A,   ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_CRC32  | FL_FOR_ARCH8A))
++ARM_ARCH("armv8.1-a", cortexa53,  8A,
++	  ARM_FSET_MAKE (FL_CO_PROC | FL_FOR_ARCH8A,  FL2_FOR_ARCH8_1A))
++ARM_ARCH("armv8.1-a+crc",cortexa53, 8A,
++	  ARM_FSET_MAKE (FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A,
++			 FL2_FOR_ARCH8_1A))
++ARM_ARCH("iwmmxt",  iwmmxt,     5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT))
++ARM_ARCH("iwmmxt2", iwmmxt2,    5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2))
++
+--- a/src/gcc/config/arm/arm-builtins.c
++++ b/src/gcc/config/arm/arm-builtins.c
+@@ -89,7 +89,11 @@ enum arm_type_qualifiers
+   /* qualifier_const_pointer | qualifier_map_mode  */
+   qualifier_const_pointer_map_mode = 0x86,
+   /* Polynomial types.  */
+-  qualifier_poly = 0x100
++  qualifier_poly = 0x100,
++  /* Lane indices - must be within range of previous argument = a vector.  */
++  qualifier_lane_index = 0x200,
++  /* Lane indices for single lane structure loads and stores.  */
++  qualifier_struct_load_store_lane_index = 0x400
+ };
+ 
+ /*  The qualifier_internal allows generation of a unary builtin from
+@@ -120,21 +124,40 @@ arm_ternop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ 
+ /* T (T, immediate).  */
+ static enum arm_type_qualifiers
+-arm_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_immediate };
++#define BINOP_IMM_QUALIFIERS (arm_binop_imm_qualifiers)
++
++/* T (T, lane index).  */
++static enum arm_type_qualifiers
++arm_getlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++  = { qualifier_none, qualifier_none, qualifier_lane_index };
+ #define GETLANE_QUALIFIERS (arm_getlane_qualifiers)
+ 
+ /* T (T, T, T, immediate).  */
+ static enum arm_type_qualifiers
+-arm_lanemac_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++arm_mac_n_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none,
+       qualifier_none, qualifier_immediate };
+-#define LANEMAC_QUALIFIERS (arm_lanemac_qualifiers)
++#define MAC_N_QUALIFIERS (arm_mac_n_qualifiers)
++
++/* T (T, T, T, lane index).  */
++static enum arm_type_qualifiers
++arm_mac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++  = { qualifier_none, qualifier_none, qualifier_none,
++      qualifier_none, qualifier_lane_index };
++#define MAC_LANE_QUALIFIERS (arm_mac_lane_qualifiers)
+ 
+ /* T (T, T, immediate).  */
+ static enum arm_type_qualifiers
+-arm_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++arm_ternop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_none, qualifier_none, qualifier_immediate };
++#define TERNOP_IMM_QUALIFIERS (arm_ternop_imm_qualifiers)
++
++/* T (T, T, lane index).  */
++static enum arm_type_qualifiers
++arm_setlane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
++  = { qualifier_none, qualifier_none, qualifier_none, qualifier_lane_index };
+ #define SETLANE_QUALIFIERS (arm_setlane_qualifiers)
+ 
+ /* T (T, T).  */
+@@ -153,7 +176,7 @@ arm_load1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ static enum arm_type_qualifiers
+ arm_load1_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_none, qualifier_const_pointer_map_mode,
+-      qualifier_none, qualifier_immediate };
++      qualifier_none, qualifier_struct_load_store_lane_index };
+ #define LOAD1LANE_QUALIFIERS (arm_load1_lane_qualifiers)
+ 
+ /* The first argument (return type) of a store should be void type,
+@@ -172,7 +195,7 @@ arm_store1_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ static enum arm_type_qualifiers
+ arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+   = { qualifier_void, qualifier_pointer_map_mode,
+-      qualifier_none, qualifier_immediate };
++      qualifier_none, qualifier_struct_load_store_lane_index };
+ #define STORE1LANE_QUALIFIERS (arm_storestruct_lane_qualifiers)
+ 
+ #define v8qi_UP  V8QImode
+@@ -183,6 +206,7 @@ arm_storestruct_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ #define di_UP    DImode
+ #define v16qi_UP V16QImode
+ #define v8hi_UP  V8HImode
++#define v8hf_UP  V8HFmode
+ #define v4si_UP  V4SImode
+ #define v4sf_UP  V4SFmode
+ #define v2di_UP  V2DImode
+@@ -231,6 +255,12 @@ typedef struct {
+ #define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \
+   VAR9 (T, N, A, B, C, D, E, F, G, H, I) \
+   VAR1 (T, N, J)
++#define VAR11(T, N, A, B, C, D, E, F, G, H, I, J, K) \
++  VAR10 (T, N, A, B, C, D, E, F, G, H, I, J) \
++  VAR1 (T, N, K)
++#define VAR12(T, N, A, B, C, D, E, F, G, H, I, J, K, L) \
++  VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \
++  VAR1 (T, N, L)
+ 
+ /* The NEON builtin data can be found in arm_neon_builtins.def.
+    The mode entries in the following table correspond to the "key" type of the
+@@ -525,12 +555,16 @@ enum arm_builtins
+ #undef CRYPTO2
+ #undef CRYPTO3
+ 
++  ARM_BUILTIN_NEON_BASE,
++  ARM_BUILTIN_NEON_LANE_CHECK = ARM_BUILTIN_NEON_BASE,
++
+ #include "arm_neon_builtins.def"
+ 
+   ARM_BUILTIN_MAX
+ };
+ 
+-#define ARM_BUILTIN_NEON_BASE (ARM_BUILTIN_MAX - ARRAY_SIZE (neon_builtin_data))
++#define ARM_BUILTIN_NEON_PATTERN_START \
++    (ARM_BUILTIN_MAX - ARRAY_SIZE (neon_builtin_data))
+ 
+ #undef CF
+ #undef VAR1
+@@ -758,13 +792,6 @@ arm_init_simd_builtin_types (void)
+   int nelts = sizeof (arm_simd_types) / sizeof (arm_simd_types[0]);
+   tree tdecl;
+ 
+-  /* Initialize the HFmode scalar type.  */
+-  arm_simd_floatHF_type_node = make_node (REAL_TYPE);
+-  TYPE_PRECISION (arm_simd_floatHF_type_node) = GET_MODE_PRECISION (HFmode);
+-  layout_type (arm_simd_floatHF_type_node);
+-  (*lang_hooks.types.register_builtin_type) (arm_simd_floatHF_type_node,
+-					     "__builtin_neon_hf");
+-
+   /* Poly types are a world of their own.  In order to maintain legacy
+      ABI, they get initialized using the old interface, and don't get
+      an entry in our mangling table, consequently, they get default
+@@ -812,7 +839,10 @@ arm_init_simd_builtin_types (void)
+      mangling.  */
+ 
+   /* Continue with standard types.  */
++  /* The __builtin_simd{64,128}_float16 types are kept private unless
++     we have a scalar __fp16 type.  */
+   arm_simd_types[Float16x4_t].eltype = arm_simd_floatHF_type_node;
++  arm_simd_types[Float16x8_t].eltype = arm_simd_floatHF_type_node;
+   arm_simd_types[Float32x2_t].eltype = float_type_node;
+   arm_simd_types[Float32x4_t].eltype = float_type_node;
+ 
+@@ -889,7 +919,7 @@ arm_init_simd_builtin_scalar_types (void)
+ static void
+ arm_init_neon_builtins (void)
+ {
+-  unsigned int i, fcode = ARM_BUILTIN_NEON_BASE;
++  unsigned int i, fcode = ARM_BUILTIN_NEON_PATTERN_START;
+ 
+   arm_init_simd_builtin_types ();
+ 
+@@ -899,6 +929,15 @@ arm_init_neon_builtins (void)
+      system.  */
+   arm_init_simd_builtin_scalar_types ();
+ 
++  tree lane_check_fpr = build_function_type_list (void_type_node,
++						  intSI_type_node,
++						  intSI_type_node,
++						  NULL);
++  arm_builtin_decls[ARM_BUILTIN_NEON_LANE_CHECK] =
++      add_builtin_function ("__builtin_arm_lane_check", lane_check_fpr,
++			    ARM_BUILTIN_NEON_LANE_CHECK, BUILT_IN_MD,
++			    NULL, NULL_TREE);
++
+   for (i = 0; i < ARRAY_SIZE (neon_builtin_data); i++, fcode++)
+     {
+       bool print_type_signature_p = false;
+@@ -1086,10 +1125,11 @@ arm_init_neon_builtins (void)
+ #undef NUM_DREG_TYPES
+ #undef NUM_QREG_TYPES
+ 
+-#define def_mbuiltin(MASK, NAME, TYPE, CODE)				\
++#define def_mbuiltin(FLAGS, NAME, TYPE, CODE)				\
+   do									\
+     {									\
+-      if ((MASK) & insn_flags)						\
++      const arm_feature_set flags = FLAGS;				\
++      if (ARM_FSET_CPU_SUBSET (flags, insn_flags))			\
+ 	{								\
+ 	  tree bdecl;							\
+ 	  bdecl = add_builtin_function ((NAME), (TYPE), (CODE),		\
+@@ -1101,7 +1141,7 @@ arm_init_neon_builtins (void)
+ 
+ struct builtin_description
+ {
+-  const unsigned int       mask;
++  const arm_feature_set    features;
+   const enum insn_code     icode;
+   const char * const       name;
+   const enum arm_builtins  code;
+@@ -1112,11 +1152,13 @@ struct builtin_description
+ static const struct builtin_description bdesc_2arg[] =
+ {
+ #define IWMMXT_BUILTIN(code, string, builtin) \
+-  { FL_IWMMXT, CODE_FOR_##code, "__builtin_arm_" string, \
++  { ARM_FSET_MAKE_CPU1 (FL_IWMMXT), CODE_FOR_##code, \
++    "__builtin_arm_" string,			     \
+     ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ 
+ #define IWMMXT2_BUILTIN(code, string, builtin) \
+-  { FL_IWMMXT2, CODE_FOR_##code, "__builtin_arm_" string, \
++  { ARM_FSET_MAKE_CPU1 (FL_IWMMXT2), CODE_FOR_##code, \
++    "__builtin_arm_" string,			      \
+     ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ 
+   IWMMXT_BUILTIN (addv8qi3, "waddb", WADDB)
+@@ -1199,10 +1241,12 @@ static const struct builtin_description bdesc_2arg[] =
+   IWMMXT_BUILTIN (iwmmxt_walignr3, "walignr3", WALIGNR3)
+ 
+ #define IWMMXT_BUILTIN2(code, builtin) \
+-  { FL_IWMMXT, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
++  { ARM_FSET_MAKE_CPU1 (FL_IWMMXT), CODE_FOR_##code, NULL, \
++    ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ 
+ #define IWMMXT2_BUILTIN2(code, builtin) \
+-  { FL_IWMMXT2, CODE_FOR_##code, NULL, ARM_BUILTIN_##builtin, UNKNOWN, 0 },
++  { ARM_FSET_MAKE_CPU2 (FL_IWMMXT2), CODE_FOR_##code, NULL, \
++    ARM_BUILTIN_##builtin, UNKNOWN, 0 },
+ 
+   IWMMXT2_BUILTIN2 (iwmmxt_waddbhusm, WADDBHUSM)
+   IWMMXT2_BUILTIN2 (iwmmxt_waddbhusl, WADDBHUSL)
+@@ -1217,7 +1261,7 @@ static const struct builtin_description bdesc_2arg[] =
+ 
+ 
+ #define FP_BUILTIN(L, U) \
+-  {0, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \
++  {ARM_FSET_EMPTY, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \
+    UNKNOWN, 0},
+ 
+   FP_BUILTIN (get_fpscr, GET_FPSCR)
+@@ -1225,8 +1269,8 @@ static const struct builtin_description bdesc_2arg[] =
+ #undef FP_BUILTIN
+ 
+ #define CRC32_BUILTIN(L, U) \
+-  {0, CODE_FOR_##L, "__builtin_arm_"#L, ARM_BUILTIN_##U, \
+-   UNKNOWN, 0},
++  {ARM_FSET_EMPTY, CODE_FOR_##L, "__builtin_arm_"#L, \
++   ARM_BUILTIN_##U, UNKNOWN, 0},
+    CRC32_BUILTIN (crc32b, CRC32B)
+    CRC32_BUILTIN (crc32h, CRC32H)
+    CRC32_BUILTIN (crc32w, CRC32W)
+@@ -1236,9 +1280,9 @@ static const struct builtin_description bdesc_2arg[] =
+ #undef CRC32_BUILTIN
+ 
+ 
+-#define CRYPTO_BUILTIN(L, U) \
+-  {0, CODE_FOR_crypto_##L, "__builtin_arm_crypto_"#L, ARM_BUILTIN_CRYPTO_##U, \
+-   UNKNOWN, 0},
++#define CRYPTO_BUILTIN(L, U)					   \
++  {ARM_FSET_EMPTY, CODE_FOR_crypto_##L,	"__builtin_arm_crypto_"#L, \
++   ARM_BUILTIN_CRYPTO_##U, UNKNOWN, 0},
+ #undef CRYPTO1
+ #undef CRYPTO2
+ #undef CRYPTO3
+@@ -1494,7 +1538,9 @@ arm_init_iwmmxt_builtins (void)
+       machine_mode mode;
+       tree type;
+ 
+-      if (d->name == 0 || !(d->mask == FL_IWMMXT || d->mask == FL_IWMMXT2))
++      if (d->name == 0 ||
++	  !(ARM_FSET_HAS_CPU1 (d->features, FL_IWMMXT) ||
++	    ARM_FSET_HAS_CPU1 (d->features, FL_IWMMXT2)))
+ 	continue;
+ 
+       mode = insn_data[d->icode].operand[1].mode;
+@@ -1518,17 +1564,17 @@ arm_init_iwmmxt_builtins (void)
+ 	  gcc_unreachable ();
+ 	}
+ 
+-      def_mbuiltin (d->mask, d->name, type, d->code);
++      def_mbuiltin (d->features, d->name, type, d->code);
+     }
+ 
+   /* Add the remaining MMX insns with somewhat more complicated types.  */
+ #define iwmmx_mbuiltin(NAME, TYPE, CODE)			\
+-  def_mbuiltin (FL_IWMMXT, "__builtin_arm_" NAME, (TYPE),	\
+-		ARM_BUILTIN_ ## CODE)
++  def_mbuiltin (ARM_FSET_MAKE_CPU1 (FL_IWMMXT), "__builtin_arm_" NAME, \
++		(TYPE), ARM_BUILTIN_ ## CODE)
+ 
+ #define iwmmx2_mbuiltin(NAME, TYPE, CODE)                      \
+-  def_mbuiltin (FL_IWMMXT2, "__builtin_arm_" NAME, (TYPE),     \
+-               ARM_BUILTIN_ ## CODE)
++  def_mbuiltin (ARM_FSET_MAKE_CPU1 (FL_IWMMXT2), "__builtin_arm_" NAME, \
++		(TYPE),	ARM_BUILTIN_ ## CODE)
+ 
+   iwmmx_mbuiltin ("wzero", di_ftype_void, WZERO);
+   iwmmx_mbuiltin ("setwcgr0", void_ftype_int, SETWCGR0);
+@@ -1682,10 +1728,12 @@ arm_init_iwmmxt_builtins (void)
+ static void
+ arm_init_fp16_builtins (void)
+ {
+-  tree fp16_type = make_node (REAL_TYPE);
+-  TYPE_PRECISION (fp16_type) = 16;
+-  layout_type (fp16_type);
+-  (*lang_hooks.types.register_builtin_type) (fp16_type, "__fp16");
++  arm_simd_floatHF_type_node = make_node (REAL_TYPE);
++  TYPE_PRECISION (arm_simd_floatHF_type_node) = GET_MODE_PRECISION (HFmode);
++  layout_type (arm_simd_floatHF_type_node);
++  if (arm_fp16_format)
++    (*lang_hooks.types.register_builtin_type) (arm_simd_floatHF_type_node,
++					       "__fp16");
+ }
+ 
+ static void
+@@ -1730,12 +1778,13 @@ arm_init_builtins (void)
+   if (TARGET_REALLY_IWMMXT)
+     arm_init_iwmmxt_builtins ();
+ 
++  /* This creates the arm_simd_floatHF_type_node so must come before
++     arm_init_neon_builtins which uses it.  */
++  arm_init_fp16_builtins ();
++
+   if (TARGET_NEON)
+     arm_init_neon_builtins ();
+ 
+-  if (arm_fp16_format)
+-    arm_init_fp16_builtins ();
+-
+   if (TARGET_CRC32)
+     arm_init_crc32_builtins ();
+ 
+@@ -1939,6 +1988,8 @@ arm_expand_unop_builtin (enum insn_code icode,
+ typedef enum {
+   NEON_ARG_COPY_TO_REG,
+   NEON_ARG_CONSTANT,
++  NEON_ARG_LANE_INDEX,
++  NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX,
+   NEON_ARG_MEMORY,
+   NEON_ARG_STOP
+ } builtin_arg;
+@@ -1996,9 +2047,9 @@ neon_dereference_pointer (tree exp, tree type, machine_mode mem_mode,
+ /* Expand a Neon builtin.  */
+ static rtx
+ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
+-		      int icode, int have_retval, tree exp, ...)
++		      int icode, int have_retval, tree exp,
++		      builtin_arg *args)
+ {
+-  va_list ap;
+   rtx pat;
+   tree arg[SIMD_MAX_BUILTIN_ARGS];
+   rtx op[SIMD_MAX_BUILTIN_ARGS];
+@@ -2013,13 +2064,11 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
+ 	  || !(*insn_data[icode].operand[0].predicate) (target, tmode)))
+     target = gen_reg_rtx (tmode);
+ 
+-  va_start (ap, exp);
+-
+   formals = TYPE_ARG_TYPES (TREE_TYPE (arm_builtin_decls[fcode]));
+ 
+   for (;;)
+     {
+-      builtin_arg thisarg = (builtin_arg) va_arg (ap, int);
++      builtin_arg thisarg = args[argc];
+ 
+       if (thisarg == NEON_ARG_STOP)
+ 	break;
+@@ -2055,19 +2104,44 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
+ 		op[argc] = copy_to_mode_reg (mode[argc], op[argc]);
+ 	      break;
+ 
++	    case NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX:
++	      gcc_assert (argc > 1);
++	      if (CONST_INT_P (op[argc]))
++		{
++		  neon_lane_bounds (op[argc], 0,
++				    GET_MODE_NUNITS (map_mode), exp);
++		  /* Keep to GCC-vector-extension lane indices in the RTL.  */
++		  op[argc] =
++		    GEN_INT (NEON_ENDIAN_LANE_N (map_mode, INTVAL (op[argc])));
++		}
++	      goto constant_arg;
++
++	    case NEON_ARG_LANE_INDEX:
++	      /* Previous argument must be a vector, which this indexes.  */
++	      gcc_assert (argc > 0);
++	      if (CONST_INT_P (op[argc]))
++		{
++		  enum machine_mode vmode = mode[argc - 1];
++		  neon_lane_bounds (op[argc], 0, GET_MODE_NUNITS (vmode), exp);
++		}
++	      /* Fall through - if the lane index isn't a constant then
++		 the next case will error.  */
++
+ 	    case NEON_ARG_CONSTANT:
++constant_arg:
+ 	      if (!(*insn_data[icode].operand[opno].predicate)
+ 		  (op[argc], mode[argc]))
+-		error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, "
+-		       "expected %<const int%>", argc + 1);
++		{
++		  error ("%Kargument %d must be a constant immediate",
++			 exp, argc + 1);
++		  return const0_rtx;
++		}
+ 	      break;
++
+             case NEON_ARG_MEMORY:
+ 	      /* Check if expand failed.  */
+ 	      if (op[argc] == const0_rtx)
+-	      {
+-		va_end (ap);
+ 		return 0;
+-	      }
+ 	      gcc_assert (MEM_P (op[argc]));
+ 	      PUT_MODE (op[argc], mode[argc]);
+ 	      /* ??? arm_neon.h uses the same built-in functions for signed
+@@ -2089,8 +2163,6 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
+ 	}
+     }
+ 
+-  va_end (ap);
+-
+   if (have_retval)
+     switch (argc)
+       {
+@@ -2152,14 +2224,31 @@ arm_expand_neon_args (rtx target, machine_mode map_mode, int fcode,
+   return target;
+ }
+ 
+-/* Expand a Neon builtin. These are "special" because they don't have symbolic
++/* Expand a Neon builtin, i.e. those registered only if TARGET_NEON holds.
++   Most of these are "special" because they don't have symbolic
+    constants defined per-instruction or per instruction-variant. Instead, the
+    required info is looked up in the table neon_builtin_data.  */
+ static rtx
+ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
+ {
++  if (fcode == ARM_BUILTIN_NEON_LANE_CHECK)
++    {
++      /* Builtin is only to check bounds of the lane passed to some intrinsics
++	 that are implemented with gcc vector extensions in arm_neon.h.  */
++
++      tree nlanes = CALL_EXPR_ARG (exp, 0);
++      gcc_assert (TREE_CODE (nlanes) == INTEGER_CST);
++      rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1));
++      if (CONST_INT_P (lane_idx))
++	neon_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp);
++      else
++	error ("%Klane index must be a constant immediate", exp);
++      /* Don't generate any RTL.  */
++      return const0_rtx;
++    }
++
+   neon_builtin_datum *d =
+-		&neon_builtin_data[fcode - ARM_BUILTIN_NEON_BASE];
++		&neon_builtin_data[fcode - ARM_BUILTIN_NEON_PATTERN_START];
+   enum insn_code icode = d->code;
+   builtin_arg args[SIMD_MAX_BUILTIN_ARGS + 1];
+   int num_args = insn_data[d->code].n_operands;
+@@ -2183,7 +2272,11 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
+       int operands_k = k - is_void;
+       int expr_args_k = k - 1;
+ 
+-      if (d->qualifiers[qualifiers_k] & qualifier_immediate)
++      if (d->qualifiers[qualifiers_k] & qualifier_lane_index)
++	args[k] = NEON_ARG_LANE_INDEX;
++      else if (d->qualifiers[qualifiers_k] & qualifier_struct_load_store_lane_index)
++	args[k] = NEON_ARG_STRUCT_LOAD_STORE_LANE_INDEX;
++      else if (d->qualifiers[qualifiers_k] & qualifier_immediate)
+ 	args[k] = NEON_ARG_CONSTANT;
+       else if (d->qualifiers[qualifiers_k] & qualifier_maybe_immediate)
+ 	{
+@@ -2208,11 +2301,7 @@ arm_expand_neon_builtin (int fcode, tree exp, rtx target)
+      the function is void, and a 1 if it is not.  */
+   return arm_expand_neon_args
+ 	  (target, d->mode, fcode, icode, !is_void, exp,
+-	   args[1],
+-	   args[2],
+-	   args[3],
+-	   args[4],
+-	   NEON_ARG_STOP);
++	   &args[1]);
+ }
+ 
+ /* Expand an expression EXP that calls a built-in function,
+--- a/src/gcc/config/arm/arm-c.c
++++ b/src/gcc/config/arm/arm-c.c
+@@ -31,7 +31,11 @@
+ #include "wide-int.h"
+ #include "inchash.h"
+ #include "tree.h"
++#include "tm_p.h"
+ #include "c-family/c-common.h"
++#include "target.h"
++#include "target-def.h"
++#include "c-family/c-pragma.h"
+ 
+ /* Output C specific EABI object attributes.  These can not be done in
+    arm.c because they require information from the C frontend.  */
+@@ -51,3 +55,226 @@ arm_lang_object_attributes_init (void)
+ {
+   arm_lang_output_object_attributes_hook = arm_output_c_attributes;
+ }
++
++#define builtin_define(TXT) cpp_define (pfile, TXT)
++#define builtin_assert(TXT) cpp_assert (pfile, TXT)
++
++/* Define or undefine macros based on the current target.  If the user does
++   #pragma GCC target, we need to adjust the macros dynamically.  */
++
++static void
++def_or_undef_macro(struct cpp_reader* pfile, const char *name, bool def_p)
++{
++  if (def_p)
++    cpp_define (pfile, name);
++  else
++    cpp_undef (pfile, name);
++}
++
++static void
++arm_cpu_builtins (struct cpp_reader* pfile)
++{
++  def_or_undef_macro (pfile, "__ARM_FEATURE_DSP", TARGET_DSP_MULTIPLY);
++  def_or_undef_macro (pfile, "__ARM_FEATURE_QBIT", TARGET_ARM_QBIT);
++  def_or_undef_macro (pfile, "__ARM_FEATURE_SAT", TARGET_ARM_SAT);
++  if (TARGET_CRYPTO)
++    builtin_define ("__ARM_FEATURE_CRYPTO");
++  if (unaligned_access)
++    builtin_define ("__ARM_FEATURE_UNALIGNED");
++
++  def_or_undef_macro (pfile, "__ARM_FEATURE_QRDMX", TARGET_NEON_RDMA);
++
++  if (TARGET_CRC32)
++    builtin_define ("__ARM_FEATURE_CRC32");
++
++  def_or_undef_macro (pfile, "__ARM_32BIT_STATE", TARGET_32BIT);
++
++  if (TARGET_ARM_FEATURE_LDREX)
++    builtin_define_with_int_value ("__ARM_FEATURE_LDREX",
++				   TARGET_ARM_FEATURE_LDREX);
++  else
++    cpp_undef (pfile, "__ARM_FEATURE_LDREX");
++
++  def_or_undef_macro (pfile, "__ARM_FEATURE_CLZ",
++		      ((TARGET_ARM_ARCH >= 5 && !TARGET_THUMB)
++		       || TARGET_ARM_ARCH_ISA_THUMB >=2));
++
++  def_or_undef_macro (pfile, "__ARM_FEATURE_SIMD32", TARGET_INT_SIMD);
++
++  builtin_define_with_int_value ("__ARM_SIZEOF_MINIMAL_ENUM",
++				 flag_short_enums ? 1 : 4);
++  builtin_define_type_sizeof ("__ARM_SIZEOF_WCHAR_T", wchar_type_node);
++  if (TARGET_ARM_ARCH_PROFILE)
++    builtin_define_with_int_value ("__ARM_ARCH_PROFILE",
++				   TARGET_ARM_ARCH_PROFILE);
++
++  /* Define __arm__ even when in thumb mode, for
++     consistency with armcc.  */
++  builtin_define ("__arm__");
++  if (TARGET_ARM_ARCH)
++    builtin_define_with_int_value ("__ARM_ARCH", TARGET_ARM_ARCH);
++  if (arm_arch_notm)
++    builtin_define ("__ARM_ARCH_ISA_ARM");
++  builtin_define ("__APCS_32__");
++
++  def_or_undef_macro (pfile, "__thumb__", TARGET_THUMB);
++  def_or_undef_macro (pfile, "__thumb2__", TARGET_THUMB2);
++  if (TARGET_BIG_END)
++    def_or_undef_macro (pfile, "__THUMBEB__", TARGET_THUMB);
++  else
++    def_or_undef_macro (pfile, "__THUMBEL__", TARGET_THUMB);
++
++  if (TARGET_ARM_ARCH_ISA_THUMB)
++    builtin_define_with_int_value ("__ARM_ARCH_ISA_THUMB",
++				   TARGET_ARM_ARCH_ISA_THUMB);
++
++  if (TARGET_BIG_END)
++    {
++      builtin_define ("__ARMEB__");
++      builtin_define ("__ARM_BIG_ENDIAN");
++    }
++  else
++    {
++      builtin_define ("__ARMEL__");
++    }
++
++  if (TARGET_SOFT_FLOAT)
++    builtin_define ("__SOFTFP__");
++
++  if (TARGET_VFP)
++    builtin_define ("__VFP_FP__");
++	
++  if (TARGET_ARM_FP)
++    builtin_define_with_int_value ("__ARM_FP", TARGET_ARM_FP);
++  if (arm_fp16_format == ARM_FP16_FORMAT_IEEE)
++    builtin_define ("__ARM_FP16_FORMAT_IEEE");
++  if (arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)
++    builtin_define ("__ARM_FP16_FORMAT_ALTERNATIVE");
++  if (TARGET_FMA)
++    builtin_define ("__ARM_FEATURE_FMA");
++
++  if (TARGET_NEON)
++    {
++      builtin_define ("__ARM_NEON__");
++      builtin_define ("__ARM_NEON");
++    }
++  if (TARGET_NEON_FP)
++    builtin_define_with_int_value ("__ARM_NEON_FP", TARGET_NEON_FP);
++  
++  /* Add a define for interworking. Needed when building libgcc.a.  */
++  if (arm_cpp_interwork)
++    builtin_define ("__THUMB_INTERWORK__");
++
++
++  builtin_define (arm_arch_name);
++  if (arm_arch_xscale)
++    builtin_define ("__XSCALE__");
++  if (arm_arch_iwmmxt)
++    {
++      builtin_define ("__IWMMXT__");
++      builtin_define ("__ARM_WMMX");
++    }
++  if (arm_arch_iwmmxt2)
++    builtin_define ("__IWMMXT2__");
++  /* ARMv6KZ was originally identified as the misspelled __ARM_ARCH_6ZK__.  To
++     preserve the existing behaviour, the misspelled feature macro must still be
++     defined.  */
++  if (arm_arch6kz)
++    builtin_define ("__ARM_ARCH_6ZK__");
++  if (TARGET_AAPCS_BASED)
++    {
++      if (arm_pcs_default == ARM_PCS_AAPCS_VFP)
++	builtin_define ("__ARM_PCS_VFP");
++      else if (arm_pcs_default == ARM_PCS_AAPCS)
++	builtin_define ("__ARM_PCS");
++      builtin_define ("__ARM_EABI__");
++    }
++
++  def_or_undef_macro (pfile, "__ARM_ARCH_EXT_IDIV__", TARGET_IDIV);
++  def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
++
++  def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified);
++}
++
++void
++arm_cpu_cpp_builtins (struct cpp_reader * pfile)
++{
++  builtin_assert ("cpu=arm");
++  builtin_assert ("machine=arm");
++
++  arm_cpu_builtins (pfile);
++}
++
++/* Hook to validate the current #pragma GCC target and set the arch custom
++   mode state.  If ARGS is NULL, then POP_TARGET is used to reset
++   the options.  */
++static bool
++arm_pragma_target_parse (tree args, tree pop_target)
++{
++  tree prev_tree = build_target_option_node (&global_options);
++  tree cur_tree;
++  struct cl_target_option *prev_opt;
++  struct cl_target_option *cur_opt;
++
++  if (! args)
++    {
++      cur_tree = ((pop_target) ? pop_target : target_option_default_node);
++      cl_target_option_restore (&global_options,
++				TREE_TARGET_OPTION (cur_tree));
++    }
++  else
++    {
++      cur_tree = arm_valid_target_attribute_tree (args, &global_options,
++						  &global_options_set);
++      if (cur_tree == NULL_TREE)
++	{
++	  cl_target_option_restore (&global_options,
++				    TREE_TARGET_OPTION (prev_tree));
++	  return false;
++	}
++    }
++
++  target_option_current_node = cur_tree;
++  arm_reset_previous_fndecl ();
++
++  /* Figure out the previous mode.  */
++  prev_opt  = TREE_TARGET_OPTION (prev_tree);
++  cur_opt   = TREE_TARGET_OPTION (cur_tree);
++
++  gcc_assert (prev_opt);
++  gcc_assert (cur_opt);
++
++  if (cur_opt->x_target_flags != prev_opt->x_target_flags)
++    {
++      /* For the definitions, ensure all newly defined macros are considered
++	 as used for -Wunused-macros.  There is no point warning about the
++	 compiler predefined macros.  */
++      cpp_options *cpp_opts = cpp_get_options (parse_in);
++      unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros;
++      cpp_opts->warn_unused_macros = 0;
++
++      /* Update macros.  */
++      gcc_assert (cur_opt->x_target_flags == target_flags);
++      arm_cpu_builtins (parse_in);
++
++      cpp_opts->warn_unused_macros = saved_warn_unused_macros;
++    }
++
++  return true;
++}
++
++/* Register target pragmas.  We need to add the hook for parsing #pragma GCC
++   option here rather than in arm.c since it will pull in various preprocessor
++   functions, and those are not present in languages like fortran without a
++   preprocessor.  */
++
++void
++arm_register_target_pragmas (void)
++{
++  /* Update pragma hook to allow parsing #pragma GCC target.  */
++  targetm.target_option.pragma_parse = arm_pragma_target_parse;
++
++#ifdef REGISTER_SUBTARGET_PRAGMAS
++  REGISTER_SUBTARGET_PRAGMAS ();
++#endif
++}
+--- a/src/gcc/config/arm/arm-cores.def
++++ b/src/gcc/config/arm/arm-cores.def
+@@ -33,7 +33,7 @@
+    The TUNE_IDENT is the name of the core for which scheduling decisions
+    should be made, represented as an identifier.
+    ARCH is the architecture revision implemented by the chip.
+-   FLAGS are the bitwise-or of the traits that apply to that core.
++   FLAGS is the set of feature flags of that core.
+    This need not include flags implied by the architecture.
+    COSTS is the name of the rtx_costs routine to use.
+ 
+@@ -43,134 +43,138 @@
+    Some tools assume no whitespace up to the first "," in each entry.  */
+ 
+ /* V2/V2A Architecture Processors */
+-ARM_CORE("arm2", 	arm2, arm2,	2, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm250", 	arm250, arm250,	2, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm3",	arm3, arm3,	2, FL_CO_PROC | FL_MODE26, slowmul)
++ARM_CORE("arm2",	arm2, arm2,	2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2), slowmul)
++ARM_CORE("arm250",	arm250, arm250,	2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2), slowmul)
++ARM_CORE("arm3",	arm3, arm3,	2,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2), slowmul)
+ 
+ /* V3 Architecture Processors */
+-ARM_CORE("arm6",	arm6, arm6,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm60",	arm60, arm60,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm600",	arm600, arm600,		3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm610",	arm610, arm610,		3, FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm620",	arm620, arm620,		3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm7",	arm7, arm7,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm7d",	arm7d, arm7d,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm7di",	arm7di, arm7di,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm70",	arm70, arm70,		3, FL_CO_PROC | FL_MODE26, slowmul)
+-ARM_CORE("arm700",	arm700, arm700,		3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm700i",	arm700i, arm700i,	3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm710",	arm710, arm710,		3, FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm720",	arm720, arm720,		3, FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm710c",	arm710c, arm710c,	3, FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm7100",	arm7100, arm7100,	3, FL_MODE26 | FL_WBUF, slowmul)
+-ARM_CORE("arm7500",	arm7500, arm7500,	3, FL_MODE26 | FL_WBUF, slowmul)
++ARM_CORE("arm6",	arm6, arm6,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm60",	arm60, arm60,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm600",	arm600, arm600,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm610",	arm610, arm610,		3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm620",	arm620, arm620,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm7",	arm7, arm7,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm7d",	arm7d, arm7d,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm7di",	arm7di, arm7di,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm70",	arm70, arm70,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm700",	arm700, arm700,		3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm700i",	arm700i, arm700i,	3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm710",	arm710, arm710,		3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm720",	arm720, arm720,		3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm710c",	arm710c, arm710c,	3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm7100",	arm7100, arm7100,	3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
++ARM_CORE("arm7500",	arm7500, arm7500,	3,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
+ /* Doesn't have an external co-proc, but does have embedded fpa. */
+-ARM_CORE("arm7500fe", arm7500fe, arm7500fe,	3, FL_CO_PROC | FL_MODE26 | FL_WBUF, slowmul)
++ARM_CORE("arm7500fe", arm7500fe, arm7500fe,	3,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_WBUF | FL_FOR_ARCH3), slowmul)
+ 
+ /* V3M Architecture Processors */
+ /* arm7m doesn't exist on its own, but only with D, ("and", and I), but
+    those don't alter the code, so arm7m is sometimes used.  */
+-ARM_CORE("arm7m",   arm7m, arm7m,	3M, FL_CO_PROC | FL_MODE26, fastmul)
+-ARM_CORE("arm7dm",  arm7dm, arm7dm,	3M, FL_CO_PROC | FL_MODE26, fastmul)
+-ARM_CORE("arm7dmi", arm7dmi, arm7dmi,	3M, FL_CO_PROC | FL_MODE26, fastmul)
++ARM_CORE("arm7m",   arm7m, arm7m,	3M,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M), fastmul)
++ARM_CORE("arm7dm",  arm7dm, arm7dm,	3M,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M), fastmul)
++ARM_CORE("arm7dmi", arm7dmi, arm7dmi,	3M,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH3M), fastmul)
+ 
+ /* V4 Architecture Processors */
+-ARM_CORE("arm8",          arm8, arm8,			4, FL_MODE26 | FL_LDSCHED, fastmul)
+-ARM_CORE("arm810",        arm810, arm810,		4, FL_MODE26 | FL_LDSCHED, fastmul)
+-ARM_CORE("strongarm",     strongarm, strongarm,		4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
+-ARM_CORE("strongarm110",  strongarm110, strongarm110,	4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
+-ARM_CORE("strongarm1100", strongarm1100, strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
+-ARM_CORE("strongarm1110", strongarm1110, strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm)
+-ARM_CORE("fa526",         fa526, fa526,			4, FL_LDSCHED, fastmul)
+-ARM_CORE("fa626",         fa626, fa626,			4, FL_LDSCHED, fastmul)
++ARM_CORE("arm8",          arm8, arm8,			4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_FOR_ARCH4), fastmul)
++ARM_CORE("arm810",        arm810, arm810,		4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_FOR_ARCH4), fastmul)
++ARM_CORE("strongarm",     strongarm, strongarm,		4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_STRONG | FL_FOR_ARCH4), strongarm)
++ARM_CORE("strongarm110",  strongarm110, strongarm110,	4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_STRONG | FL_FOR_ARCH4), strongarm)
++ARM_CORE("strongarm1100", strongarm1100, strongarm1100, 4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_STRONG | FL_FOR_ARCH4), strongarm)
++ARM_CORE("strongarm1110", strongarm1110, strongarm1110, 4,	ARM_FSET_MAKE_CPU1 (FL_MODE26 | FL_LDSCHED | FL_STRONG | FL_FOR_ARCH4), strongarm)
++ARM_CORE("fa526",         fa526, fa526,			4,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4), fastmul)
++ARM_CORE("fa626",         fa626, fa626,			4,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4), fastmul)
+ 
+ /* V4T Architecture Processors */
+-ARM_CORE("arm7tdmi",	arm7tdmi, arm7tdmi,	4T, FL_CO_PROC, fastmul)
+-ARM_CORE("arm7tdmi-s",	arm7tdmis, arm7tdmis,	4T, FL_CO_PROC, fastmul)
+-ARM_CORE("arm710t",	arm710t, arm710t,	4T, FL_WBUF,    fastmul)
+-ARM_CORE("arm720t",	arm720t, arm720t,	4T, FL_WBUF,    fastmul)
+-ARM_CORE("arm740t",	arm740t, arm740t,	4T, FL_WBUF,    fastmul)
+-ARM_CORE("arm9",	arm9, arm9,		4T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm9tdmi",	arm9tdmi, arm9tdmi,	4T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm920",	arm920, arm920,		4T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm920t",	arm920t, arm920t,	4T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm922t",	arm922t, arm922t,	4T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm940t",	arm940t, arm940t,	4T, FL_LDSCHED, fastmul)
+-ARM_CORE("ep9312",	ep9312, ep9312,		4T, FL_LDSCHED, fastmul)
++ARM_CORE("arm7tdmi",	arm7tdmi, arm7tdmi,	4T,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm7tdmi-s",	arm7tdmis, arm7tdmis,	4T,	ARM_FSET_MAKE_CPU1 (FL_CO_PROC | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm710t",	arm710t, arm710t,	4T,	ARM_FSET_MAKE_CPU1 (FL_WBUF | FL_FOR_ARCH4T),    fastmul)
++ARM_CORE("arm720t",	arm720t, arm720t,	4T,	ARM_FSET_MAKE_CPU1 (FL_WBUF | FL_FOR_ARCH4T),    fastmul)
++ARM_CORE("arm740t",	arm740t, arm740t,	4T,	ARM_FSET_MAKE_CPU1 (FL_WBUF | FL_FOR_ARCH4T),    fastmul)
++ARM_CORE("arm9",	arm9, arm9,		4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm9tdmi",	arm9tdmi, arm9tdmi,	4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm920",	arm920, arm920,		4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm920t",	arm920t, arm920t,	4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm922t",	arm922t, arm922t,	4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("arm940t",	arm940t, arm940t,	4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
++ARM_CORE("ep9312",	ep9312, ep9312,		4T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH4T), fastmul)
+ 
+ /* V5T Architecture Processors */
+-ARM_CORE("arm10tdmi",	arm10tdmi, arm10tdmi,	5T, FL_LDSCHED, fastmul)
+-ARM_CORE("arm1020t",	arm1020t, arm1020t,	5T, FL_LDSCHED, fastmul)
++ARM_CORE("arm10tdmi",	arm10tdmi, arm10tdmi,	5T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5T), fastmul)
++ARM_CORE("arm1020t",	arm1020t, arm1020t,	5T,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5T), fastmul)
+ 
+ /* V5TE Architecture Processors */
+-ARM_CORE("arm9e",	arm9e, arm9e,		5TE, FL_LDSCHED, 9e)
+-ARM_CORE("arm946e-s",	arm946es, arm946es,	5TE, FL_LDSCHED, 9e)
+-ARM_CORE("arm966e-s",	arm966es, arm966es,	5TE, FL_LDSCHED, 9e)
+-ARM_CORE("arm968e-s",	arm968es, arm968es,	5TE, FL_LDSCHED, 9e)
+-ARM_CORE("arm10e",	arm10e, arm10e,		5TE, FL_LDSCHED, fastmul)
+-ARM_CORE("arm1020e",	arm1020e, arm1020e,	5TE, FL_LDSCHED, fastmul)
+-ARM_CORE("arm1022e",	arm1022e, arm1022e,	5TE, FL_LDSCHED, fastmul)
+-ARM_CORE("xscale",	xscale, xscale,		5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE, xscale)
+-ARM_CORE("iwmmxt",	iwmmxt, iwmmxt,		5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT, xscale)
+-ARM_CORE("iwmmxt2",	iwmmxt2, iwmmxt2,	5TE, FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2, xscale)
+-ARM_CORE("fa606te",	fa606te, fa606te,	5TE, FL_LDSCHED, 9e)
+-ARM_CORE("fa626te",	fa626te, fa626te,	5TE, FL_LDSCHED, 9e)
+-ARM_CORE("fmp626",	fmp626, fmp626,		5TE, FL_LDSCHED, 9e)
+-ARM_CORE("fa726te",	fa726te, fa726te,	5TE, FL_LDSCHED, fa726te)
++ARM_CORE("arm9e",	arm9e, arm9e,		5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("arm946e-s",	arm946es, arm946es,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("arm966e-s",	arm966es, arm966es,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("arm968e-s",	arm968es, arm968es,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("arm10e",	arm10e, arm10e,		5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), fastmul)
++ARM_CORE("arm1020e",	arm1020e, arm1020e,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), fastmul)
++ARM_CORE("arm1022e",	arm1022e, arm1022e,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), fastmul)
++ARM_CORE("xscale",	xscale, xscale,		5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_FOR_ARCH5TE), xscale)
++ARM_CORE("iwmmxt",	iwmmxt, iwmmxt,		5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_FOR_ARCH5TE), xscale)
++ARM_CORE("iwmmxt2",	iwmmxt2, iwmmxt2,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_STRONG | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2 | FL_FOR_ARCH5TE), xscale)
++ARM_CORE("fa606te",	fa606te, fa606te,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("fa626te",	fa626te, fa626te,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("fmp626",	fmp626, fmp626,		5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), 9e)
++ARM_CORE("fa726te",	fa726te, fa726te,	5TE,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TE), fa726te)
+ 
+ /* V5TEJ Architecture Processors */
+-ARM_CORE("arm926ej-s",	arm926ejs, arm926ejs,	5TEJ, FL_LDSCHED, 9e)
+-ARM_CORE("arm1026ej-s",	arm1026ejs, arm1026ejs,	5TEJ, FL_LDSCHED, 9e)
++ARM_CORE("arm926ej-s",	arm926ejs, arm926ejs,	5TEJ,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TEJ), 9e)
++ARM_CORE("arm1026ej-s",	arm1026ejs, arm1026ejs,	5TEJ,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH5TEJ), 9e)
+ 
+ /* V6 Architecture Processors */
+-ARM_CORE("arm1136j-s",		arm1136js, arm1136js,		6J,  FL_LDSCHED, 9e)
+-ARM_CORE("arm1136jf-s",		arm1136jfs, arm1136jfs,		6J,  FL_LDSCHED | FL_VFPV2, 9e)
+-ARM_CORE("arm1176jz-s",		arm1176jzs, arm1176jzs,		6ZK, FL_LDSCHED, 9e)
+-ARM_CORE("arm1176jzf-s",	arm1176jzfs, arm1176jzfs,	6ZK, FL_LDSCHED | FL_VFPV2, 9e)
+-ARM_CORE("mpcorenovfp",		mpcorenovfp, mpcorenovfp,	6K,  FL_LDSCHED, 9e)
+-ARM_CORE("mpcore",		mpcore, mpcore,			6K,  FL_LDSCHED | FL_VFPV2, 9e)
+-ARM_CORE("arm1156t2-s",		arm1156t2s, arm1156t2s,		6T2, FL_LDSCHED, v6t2)
+-ARM_CORE("arm1156t2f-s",	arm1156t2fs, arm1156t2fs,	6T2, FL_LDSCHED | FL_VFPV2, v6t2)
++ARM_CORE("arm1136j-s",		arm1136js, arm1136js,		6J,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6J), 9e)
++ARM_CORE("arm1136jf-s",		arm1136jfs, arm1136jfs,		6J,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_VFPV2 | FL_FOR_ARCH6J), 9e)
++ARM_CORE("arm1176jz-s",		arm1176jzs, arm1176jzs,		6KZ,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6KZ), 9e)
++ARM_CORE("arm1176jzf-s",	arm1176jzfs, arm1176jzfs,	6KZ,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_VFPV2 | FL_FOR_ARCH6KZ), 9e)
++ARM_CORE("mpcorenovfp",		mpcorenovfp, mpcorenovfp,	6K,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6K), 9e)
++ARM_CORE("mpcore",		mpcore, mpcore,			6K,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_VFPV2 | FL_FOR_ARCH6K), 9e)
++ARM_CORE("arm1156t2-s",		arm1156t2s, arm1156t2s,		6T2,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6T2), v6t2)
++ARM_CORE("arm1156t2f-s",	arm1156t2fs, arm1156t2fs,	6T2,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_VFPV2 | FL_FOR_ARCH6T2), v6t2)
+ 
+ /* V6M Architecture Processors */
+-ARM_CORE("cortex-m1",		cortexm1, cortexm1,		6M, FL_LDSCHED, v6m)
+-ARM_CORE("cortex-m0",		cortexm0, cortexm0,		6M, FL_LDSCHED, v6m)
+-ARM_CORE("cortex-m0plus",	cortexm0plus, cortexm0plus,	6M, FL_LDSCHED, v6m)
++ARM_CORE("cortex-m1",		cortexm1, cortexm1,		6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6M), v6m)
++ARM_CORE("cortex-m0",		cortexm0, cortexm0,		6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6M), v6m)
++ARM_CORE("cortex-m0plus",	cortexm0plus, cortexm0plus,	6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH6M), v6m)
+ 
+ /* V6M Architecture Processors for small-multiply implementations.  */
+-ARM_CORE("cortex-m1.small-multiply",	cortexm1smallmultiply, cortexm1,	6M, FL_LDSCHED | FL_SMALLMUL, v6m)
+-ARM_CORE("cortex-m0.small-multiply",	cortexm0smallmultiply, cortexm0,	6M, FL_LDSCHED | FL_SMALLMUL, v6m)
+-ARM_CORE("cortex-m0plus.small-multiply",cortexm0plussmallmultiply, cortexm0plus,6M, FL_LDSCHED | FL_SMALLMUL, v6m)
++ARM_CORE("cortex-m1.small-multiply",	cortexm1smallmultiply, cortexm1,	6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_SMALLMUL | FL_FOR_ARCH6M), v6m)
++ARM_CORE("cortex-m0.small-multiply",	cortexm0smallmultiply, cortexm0,	6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_SMALLMUL | FL_FOR_ARCH6M), v6m)
++ARM_CORE("cortex-m0plus.small-multiply",cortexm0plussmallmultiply, cortexm0plus,6M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_SMALLMUL | FL_FOR_ARCH6M), v6m)
+ 
+ /* V7 Architecture Processors */
+-ARM_CORE("generic-armv7-a",	genericv7a, genericv7a,		7A,  FL_LDSCHED, cortex)
+-ARM_CORE("cortex-a5",		cortexa5, cortexa5,		7A,  FL_LDSCHED, cortex_a5)
+-ARM_CORE("cortex-a7",		cortexa7, cortexa7,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
+-ARM_CORE("cortex-a8",		cortexa8, cortexa8,		7A,  FL_LDSCHED, cortex_a8)
+-ARM_CORE("cortex-a9",		cortexa9, cortexa9,		7A,  FL_LDSCHED, cortex_a9)
+-ARM_CORE("cortex-a12",	  	cortexa12, cortexa17,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
+-ARM_CORE("cortex-a15",		cortexa15, cortexa15,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
+-ARM_CORE("cortex-a17",		cortexa17, cortexa17,		7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
+-ARM_CORE("cortex-r4",		cortexr4, cortexr4,		7R,  FL_LDSCHED, cortex)
+-ARM_CORE("cortex-r4f",		cortexr4f, cortexr4f,		7R,  FL_LDSCHED, cortex)
+-ARM_CORE("cortex-r5",		cortexr5, cortexr5,		7R,  FL_LDSCHED | FL_ARM_DIV, cortex)
+-ARM_CORE("cortex-r7",		cortexr7, cortexr7,		7R,  FL_LDSCHED | FL_ARM_DIV, cortex)
+-ARM_CORE("cortex-m7",		cortexm7, cortexm7,		7EM, FL_LDSCHED | FL_NO_VOLATILE_CE, cortex_m7)
+-ARM_CORE("cortex-m4",		cortexm4, cortexm4,		7EM, FL_LDSCHED, v7m)
+-ARM_CORE("cortex-m3",		cortexm3, cortexm3,		7M,  FL_LDSCHED, v7m)
+-ARM_CORE("marvell-pj4",		marvell_pj4, marvell_pj4,	7A,  FL_LDSCHED, 9e)
++ARM_CORE("generic-armv7-a",	genericv7a, genericv7a,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex)
++ARM_CORE("cortex-a5",		cortexa5, cortexa5,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a5)
++ARM_CORE("cortex-a7",		cortexa7, cortexa7,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a7)
++ARM_CORE("cortex-a8",		cortexa8, cortexa8,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a8)
++ARM_CORE("cortex-a9",		cortexa9, cortexa9,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), cortex_a9)
++ARM_CORE("cortex-a12",		cortexa12, cortexa17,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12)
++ARM_CORE("cortex-a15",		cortexa15, cortexa15,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a15)
++ARM_CORE("cortex-a17",		cortexa17, cortexa17,		7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12)
++ARM_CORE("cortex-r4",		cortexr4, cortexr4,		7R,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex)
++ARM_CORE("cortex-r4f",		cortexr4f, cortexr4f,		7R,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7R), cortex)
++ARM_CORE("cortex-r5",		cortexr5, cortexr5,		7R,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARM_DIV | FL_FOR_ARCH7R), cortex)
++ARM_CORE("cortex-r7",		cortexr7, cortexr7,		7R,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARM_DIV | FL_FOR_ARCH7R), cortex)
++ARM_CORE("cortex-r8",		cortexr8, cortexr7,		7R,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_ARM_DIV | FL_FOR_ARCH7R), cortex)
++ARM_CORE("cortex-m7",		cortexm7, cortexm7,		7EM,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_NO_VOLATILE_CE | FL_FOR_ARCH7EM), cortex_m7)
++ARM_CORE("cortex-m4",		cortexm4, cortexm4,		7EM,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7EM), v7m)
++ARM_CORE("cortex-m3",		cortexm3, cortexm3,		7M,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7M), v7m)
++ARM_CORE("marvell-pj4",		marvell_pj4, marvell_pj4,	7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH7A), marvell_pj4)
+ 
+ /* V7 big.LITTLE implementations */
+-ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,	7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
+-ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,	7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
++ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7,	7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a15)
++ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,	7A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV | FL_FOR_ARCH7A), cortex_a12)
+ 
+ /* V8 Architecture Processors */
+-ARM_CORE("cortex-a53",	cortexa53, cortexa53,	8A, FL_LDSCHED | FL_CRC32, cortex_a53)
+-ARM_CORE("cortex-a57",	cortexa57, cortexa57,	8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+-ARM_CORE("cortex-a72",	cortexa72, cortexa57,	8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+-ARM_CORE("exynos-m1",	exynosm1,  cortexa57,	8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+-ARM_CORE("xgene1",      xgene1,    xgene1,      8A, FL_LDSCHED,            xgene1)
++ARM_CORE("cortex-a32",	cortexa32, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35)
++ARM_CORE("cortex-a35",	cortexa35, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a35)
++ARM_CORE("cortex-a53",	cortexa53, cortexa53,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a53)
++ARM_CORE("cortex-a57",	cortexa57, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
++ARM_CORE("cortex-a72",	cortexa72, cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
++ARM_CORE("exynos-m1",	exynosm1,  cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
++ARM_CORE("qdf24xx",	qdf24xx,   cortexa57,	8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
++ARM_CORE("xgene1",      xgene1,    xgene1,      8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8A),            xgene1)
+ 
+ /* V8 big.LITTLE implementations */
+-ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,  FL_LDSCHED | FL_CRC32, cortex_a57)
+-ARM_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A,  FL_LDSCHED | FL_CRC32, cortex_a57)
++ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
++ARM_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A,	ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57)
+--- a/src/gcc/config/arm/arm-fpus.def
++++ b/src/gcc/config/arm/arm-fpus.def
+@@ -19,30 +19,30 @@
+ 
+ /* Before using #include to read this file, define a macro:
+ 
+-      ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO)
++      ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
+ 
+    The arguments are the fields of struct arm_fpu_desc.
+ 
+    genopt.sh assumes no whitespace up to the first "," in each entry.  */
+ 
+-ARM_FPU("vfp",		ARM_FP_MODEL_VFP, 2, VFP_REG_D16, false, false, false)
+-ARM_FPU("vfpv3",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
+-ARM_FPU("vfpv3-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, true, false)
+-ARM_FPU("vfpv3-d16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, false, false)
+-ARM_FPU("vfpv3-d16-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D16, false, true, false)
+-ARM_FPU("vfpv3xd",	ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, false, false)
+-ARM_FPU("vfpv3xd-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, false, true, false)
+-ARM_FPU("neon",		ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true , false, false)
+-ARM_FPU("neon-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false)
+-ARM_FPU("vfpv4",	ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false)
+-ARM_FPU("vfpv4-d16",	ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false)
+-ARM_FPU("fpv4-sp-d16",	ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false)
+-ARM_FPU("fpv5-sp-d16",	ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false)
+-ARM_FPU("fpv5-d16",	ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false)
+-ARM_FPU("neon-vfpv4",	ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false)
+-ARM_FPU("fp-armv8",	ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false)
+-ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false)
++ARM_FPU("vfp",		ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
++ARM_FPU("vfpv3",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
++ARM_FPU("vfpv3-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
++ARM_FPU("vfpv3-d16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
++ARM_FPU("vfpv3-d16-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
++ARM_FPU("vfpv3xd",	ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
++ARM_FPU("vfpv3xd-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
++ARM_FPU("neon",		ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
++ARM_FPU("neon-fp16",	ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
++ARM_FPU("vfpv4",	ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
++ARM_FPU("vfpv4-d16",	ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
++ARM_FPU("fpv4-sp-d16",	ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
++ARM_FPU("fpv5-sp-d16",	ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
++ARM_FPU("fpv5-d16",	ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
++ARM_FPU("neon-vfpv4",	ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
++ARM_FPU("fp-armv8",	ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
++ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
+ ARM_FPU("crypto-neon-fp-armv8",
+-			ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, true)
++			ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
+ /* Compatibility aliases.  */
+-ARM_FPU("vfp3",		ARM_FP_MODEL_VFP, 3, VFP_REG_D32, false, false, false)
++ARM_FPU("vfp3",		ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
+--- a/src/gcc/config/arm/arm-ldmstm.ml
++++ b/src/gcc/config/arm/arm-ldmstm.ml
+@@ -33,9 +33,20 @@ type amode = IA | IB | DA | DB
+ 
+ type optype = IN | OUT | INOUT
+ 
+-let rec string_of_addrmode addrmode =
++let rec string_of_addrmode addrmode thumb update =
++  if thumb || update
++then
+   match addrmode with
+-    IA -> "ia" | IB -> "ib" | DA -> "da" | DB -> "db"
++    IA -> "ia"
++  | IB -> "ib"
++  | DA -> "da"
++  | DB -> "db"
++else
++  match addrmode with
++    IA -> ""
++  | IB -> "ib"
++  | DA -> "da"
++  | DB -> "db"
+ 
+ let rec initial_offset addrmode nregs =
+   match addrmode with
+@@ -160,7 +171,7 @@ let target addrmode thumb =
+   | _, _ -> raise (InvalidAddrMode "ERROR: Invalid Addressing mode for Thumb1.")
+ 
+ let write_pattern_1 name ls addrmode nregs write_set_fn update thumb =
+-  let astr = string_of_addrmode addrmode in
++  let astr = string_of_addrmode addrmode thumb update in
+   Printf.printf "(define_insn \"*%s%s%d_%s%s\"\n"
+     (if thumb then "thumb_" else "") name nregs astr
+     (if update then "_update" else "");
+@@ -180,8 +191,10 @@ let write_pattern_1 name ls addrmode nregs write_set_fn update thumb =
+   Printf.printf ")]\n  \"%s && XVECLEN (operands[0], 0) == %d\"\n"
+     (target addrmode thumb)
+     (if update then nregs + 1 else nregs);
+-  Printf.printf "  \"%s%%(%s%%)\\t%%%d%s, {"
+-    name astr (nregs + 1) (if update then "!" else "");
++  if thumb then
++      Printf.printf "  \"%s%s\\t%%%d%s, {"   name astr (nregs + 1) (if update then "!" else "")
++   else
++      Printf.printf "  \"%s%s%%?\\t%%%d%s, {"  name astr (nregs + 1) (if update then "!" else "");
+   for n = 1 to nregs; do
+     Printf.printf "%%%d%s" n (if n < nregs then ", " else "")
+   done;
+--- a/src/gcc/config/arm/arm-protos.h
++++ b/src/gcc/config/arm/arm-protos.h
+@@ -30,6 +30,7 @@ extern void arm_load_pic_register (unsigned long);
+ extern int arm_volatile_func (void);
+ extern void arm_expand_prologue (void);
+ extern void arm_expand_epilogue (bool);
++extern void arm_declare_function_name (FILE *, const char *, tree);
+ extern void thumb2_expand_return (bool);
+ extern const char *arm_strip_name_encoding (const char *);
+ extern void arm_asm_output_labelref (FILE *, const char *);
+@@ -66,10 +67,6 @@ extern rtx legitimize_tls_address (rtx, rtx);
+ extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
+ extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
+ extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
+-extern bool arm_legitimize_reload_address (rtx *, machine_mode, int, int,
+-					   int);
+-extern rtx thumb_legitimize_reload_address (rtx *, machine_mode, int, int,
+-					    int);
+ extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
+ extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
+                                  bool, bool);
+@@ -89,10 +86,9 @@ extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
+ extern rtx neon_make_constant (rtx);
+ extern tree arm_builtin_vectorized_function (tree, tree, tree);
+ extern void neon_expand_vector_init (rtx, rtx);
+-extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
++extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
+ extern void neon_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+ extern HOST_WIDE_INT neon_element_bits (machine_mode);
+-extern void neon_reinterpret (rtx, rtx);
+ extern void neon_emit_pair_result_insn (machine_mode,
+ 					rtx (*) (rtx, rtx, rtx, rtx),
+ 					rtx, rtx, rtx);
+@@ -135,7 +131,6 @@ extern bool arm_const_double_by_parts (rtx);
+ extern bool arm_const_double_by_immediates (rtx);
+ extern void arm_emit_call_insn (rtx, rtx, bool);
+ extern const char *output_call (rtx *);
+-extern const char *output_call_mem (rtx *);
+ void arm_emit_movpair (rtx, rtx);
+ extern const char *output_mov_long_double_arm_from_arm (rtx *);
+ extern const char *output_move_double (rtx *, bool, int *count);
+@@ -185,9 +180,6 @@ extern const char *thumb1_unexpanded_epilogue (void);
+ extern void thumb1_expand_prologue (void);
+ extern void thumb1_expand_epilogue (void);
+ extern const char *thumb1_output_interwork (void);
+-#ifdef TREE_CODE
+-extern int is_called_in_ARM_mode (tree);
+-#endif
+ extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
+ #ifdef RTX_CODE
+ extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
+@@ -216,14 +208,15 @@ extern int arm_dllexport_p (tree);
+ extern int arm_dllimport_p (tree);
+ extern void arm_mark_dllexport (tree);
+ extern void arm_mark_dllimport (tree);
++extern bool arm_change_mode_p (tree);
+ #endif
+ 
++extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
++					     struct gcc_options *);
+ extern void arm_pr_long_calls (struct cpp_reader *);
+ extern void arm_pr_no_long_calls (struct cpp_reader *);
+ extern void arm_pr_long_calls_off (struct cpp_reader *);
+ 
+-extern void arm_lang_object_attributes_init(void);
+-
+ extern const char *arm_mangle_type (const_tree);
+ extern const char *arm_mangle_builtin_type (const_tree);
+ 
+@@ -257,13 +250,6 @@ struct cpu_vec_costs {
+ 
+ struct cpu_cost_table;
+ 
+-enum arm_sched_autopref
+-  {
+-    ARM_SCHED_AUTOPREF_OFF,
+-    ARM_SCHED_AUTOPREF_RANK,
+-    ARM_SCHED_AUTOPREF_FULL
+-  };
+-
+ /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
+    structure is modified.  */
+ 
+@@ -272,39 +258,59 @@ struct tune_params
+   bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool);
+   const struct cpu_cost_table *insn_extra_cost;
+   bool (*sched_adjust_cost) (rtx_insn *, rtx, rtx_insn *, int *);
++  int (*branch_cost) (bool, bool);
++  /* Vectorizer costs.  */
++  const struct cpu_vec_costs* vec_costs;
+   int constant_limit;
+   /* Maximum number of instructions to conditionalise.  */
+   int max_insns_skipped;
+-  int num_prefetch_slots;
+-  int l1_cache_size;
+-  int l1_cache_line_size;
+-  bool prefer_constant_pool;
+-  int (*branch_cost) (bool, bool);
++  /* Maximum number of instructions to inline calls to memset.  */
++  int max_insns_inline_memset;
++  /* Issue rate of the processor.  */
++  unsigned int issue_rate;
++  /* Explicit prefetch data.  */
++  struct
++    {
++      int num_slots;
++      int l1_cache_size;
++      int l1_cache_line_size;
++    } prefetch;
++  enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
++    prefer_constant_pool: 1;
+   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
+-  bool prefer_ldrd_strd;
++  enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
+   /* The preference for non short cirtcuit operation when optimizing for
+      performance. The first element covers Thumb state and the second one
+      is for ARM state.  */
+-  bool logical_op_non_short_circuit[2];
+-  /* Vectorizer costs.  */
+-  const struct cpu_vec_costs* vec_costs;
+-  /* Prefer Neon for 64-bit bitops.  */
+-  bool prefer_neon_for_64bits;
++  enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
++				 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
++  log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
++  log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
+   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
+-  bool disparage_flag_setting_t16_encodings;
+-  /* Prefer 32-bit encoding instead of 16-bit encoding where subset of flags
+-     would be set.  */
+-  bool disparage_partial_flag_setting_t16_encodings;
++  enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
++    disparage_flag_setting_t16_encodings: 2;
++  enum {PREF_NEON_64_FALSE, PREF_NEON_64_TRUE} prefer_neon_for_64bits: 1;
+   /* Prefer to inline string operations like memset by using Neon.  */
+-  bool string_ops_prefer_neon;
+-  /* Maximum number of instructions to inline calls to memset.  */
+-  int max_insns_inline_memset;
+-  /* Bitfield encoding the fuseable pairs of instructions.  */
+-  unsigned int fuseable_ops;
++  enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
++    string_ops_prefer_neon: 1;
++  /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
++     in an initializer if multiple fusion operations are supported on a
++     target.  */
++  enum fuse_ops
++  {
++    FUSE_NOTHING   = 0,
++    FUSE_MOVW_MOVT = 1 << 0,
++    FUSE_AES_AESMC = 1 << 1
++  } fusible_ops: 2;
+   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
+-  enum arm_sched_autopref sched_autopref;
++  enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
++    sched_autopref: 2;
+ };
+ 
++/* Smash multiple fusion operations into a type that can be used for an
++   initializer.  */
++#define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
++
+ extern const struct tune_params *current_tune;
+ extern int vfp3_const_double_for_fract_bits (rtx);
+ /* return power of two from operand, otherwise 0.  */
+@@ -324,14 +330,23 @@ extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
+ 
+ extern void arm_emit_eabi_attribute (const char *, int, int);
+ 
++extern void arm_reset_previous_fndecl (void);
++
+ /* Defined in gcc/common/config/arm-common.c.  */
+ extern const char *arm_rewrite_selected_cpu (const char *name);
+ 
++/* Defined in gcc/common/config/arm-c.c.  */
++extern void arm_lang_object_attributes_init (void);
++extern void arm_register_target_pragmas (void);
++extern void arm_cpu_cpp_builtins (struct cpp_reader *);
++
+ extern bool arm_is_constant_pool_ref (rtx);
+ 
+ /* Flags used to identify the presence of processor capabilities.  */
+ 
+ /* Bit values used to identify processor capabilities.  */
++#define FL_NONE	      (0)	      /* No flags.  */
++#define FL_ANY	      (0xffffffff)    /* All flags.  */
+ #define FL_CO_PROC    (1 << 0)        /* Has external co-processor bus */
+ #define FL_ARCH3M     (1 << 1)        /* Extended multiply */
+ #define FL_MODE26     (1 << 2)        /* 26-bit mode support */
+@@ -368,6 +383,9 @@ extern bool arm_is_constant_pool_ref (rtx);
+ 
+ #define FL_IWMMXT     (1 << 29)	      /* XScale v2 or "Intel Wireless MMX technology".  */
+ #define FL_IWMMXT2    (1 << 30)       /* "Intel Wireless MMX2 technology".  */
++#define FL_ARCH6KZ    (1 << 31)       /* ARMv6KZ architecture.  */
++
++#define FL2_ARCH8_1   (1 << 0)	      /* Architecture 8.1.  */
+ 
+ /* Flags that only effect tuning, not available instructions.  */
+ #define FL_TUNE		(FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
+@@ -387,7 +405,7 @@ extern bool arm_is_constant_pool_ref (rtx);
+ #define FL_FOR_ARCH6J	FL_FOR_ARCH6
+ #define FL_FOR_ARCH6K	(FL_FOR_ARCH6 | FL_ARCH6K)
+ #define FL_FOR_ARCH6Z	FL_FOR_ARCH6
+-#define FL_FOR_ARCH6ZK	FL_FOR_ARCH6K
++#define FL_FOR_ARCH6KZ	(FL_FOR_ARCH6K | FL_ARCH6KZ)
+ #define FL_FOR_ARCH6T2	(FL_FOR_ARCH6 | FL_THUMB2)
+ #define FL_FOR_ARCH6M	(FL_FOR_ARCH6 & ~FL_NOTM)
+ #define FL_FOR_ARCH7	((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
+@@ -397,14 +415,118 @@ extern bool arm_is_constant_pool_ref (rtx);
+ #define FL_FOR_ARCH7M	(FL_FOR_ARCH7 | FL_THUMB_DIV)
+ #define FL_FOR_ARCH7EM  (FL_FOR_ARCH7M | FL_ARCH7EM)
+ #define FL_FOR_ARCH8A	(FL_FOR_ARCH7VE | FL_ARCH8)
++#define FL2_FOR_ARCH8_1A	FL2_ARCH8_1
++
++/* There are too many feature bits to fit in a single word so the set of cpu and
++   fpu capabilities is a structure.  A feature set is created and manipulated
++   with the ARM_FSET macros.  */
++
++typedef struct
++{
++  unsigned long cpu[2];
++} arm_feature_set;
++
++
++/* Initialize a feature set.  */
++
++#define ARM_FSET_MAKE(CPU1,CPU2) { { (CPU1), (CPU2) } }
++
++#define ARM_FSET_MAKE_CPU1(CPU1) ARM_FSET_MAKE ((CPU1), (FL_NONE))
++#define ARM_FSET_MAKE_CPU2(CPU2) ARM_FSET_MAKE ((FL_NONE), (CPU2))
++
++/* Accessors.  */
++
++#define ARM_FSET_CPU1(S) ((S).cpu[0])
++#define ARM_FSET_CPU2(S) ((S).cpu[1])
++
++/* Useful combinations.  */
++
++#define ARM_FSET_EMPTY ARM_FSET_MAKE (FL_NONE, FL_NONE)
++#define ARM_FSET_ANY ARM_FSET_MAKE (FL_ANY, FL_ANY)
++
++/* Tests for a specific CPU feature.  */
++
++#define ARM_FSET_HAS_CPU1(A, F)  \
++  (((A).cpu[0] & ((unsigned long)(F))) == ((unsigned long)(F)))
++#define ARM_FSET_HAS_CPU2(A, F)  \
++  (((A).cpu[1] & ((unsigned long)(F))) == ((unsigned long)(F)))
++#define ARM_FSET_HAS_CPU(A, F1, F2)				\
++  (ARM_FSET_HAS_CPU1 ((A), (F1)) && ARM_FSET_HAS_CPU2 ((A), (F2)))
++
++/* Add a feature to a feature set.  */
++
++#define ARM_FSET_ADD_CPU1(DST, F)		\
++  do {						\
++    (DST).cpu[0] |= (F);			\
++  } while (0)
++
++#define ARM_FSET_ADD_CPU2(DST, F)		\
++  do {						\
++    (DST).cpu[1] |= (F);			\
++  } while (0)
++
++/* Remove a feature from a feature set.  */
++
++#define ARM_FSET_DEL_CPU1(DST, F)		\
++  do {						\
++    (DST).cpu[0] &= ~(F);			\
++  } while (0)
++
++#define ARM_FSET_DEL_CPU2(DST, F)		\
++  do {						\
++    (DST).cpu[1] &= ~(F);			\
++  } while (0)
++
++/* Union of feature sets.  */
++
++#define ARM_FSET_UNION(DST,F1,F2)		\
++  do {						\
++    (DST).cpu[0] = (F1).cpu[0] | (F2).cpu[0];	\
++    (DST).cpu[1] = (F1).cpu[1] | (F2).cpu[1];	\
++  } while (0)
++
++/* Intersection of feature sets.  */
++
++#define ARM_FSET_INTER(DST,F1,F2)		\
++  do {						\
++    (DST).cpu[0] = (F1).cpu[0] & (F2).cpu[0];	\
++    (DST).cpu[1] = (F1).cpu[1] & (F2).cpu[1];	\
++  } while (0)
++
++/* Exclusive disjunction.  */
++
++#define ARM_FSET_XOR(DST,F1,F2)				\
++  do {							\
++    (DST).cpu[0] = (F1).cpu[0] ^ (F2).cpu[0];		\
++    (DST).cpu[1] = (F1).cpu[1] ^ (F2).cpu[1];		\
++  } while (0)
++
++/* Difference of feature sets: F1 excluding the elements of F2.  */
++
++#define ARM_FSET_EXCLUDE(DST,F1,F2)		\
++  do {						\
++    (DST).cpu[0] = (F1).cpu[0] & ~(F2).cpu[0];	\
++    (DST).cpu[1] = (F1).cpu[1] & ~(F2).cpu[1];	\
++  } while (0)
++
++/* Test for an empty feature set.  */
++
++#define ARM_FSET_IS_EMPTY(A)		\
++  (!((A).cpu[0]) && !((A).cpu[1]))
++
++/* Tests whether the cpu features of A are a subset of B.  */
++
++#define ARM_FSET_CPU_SUBSET(A,B)					\
++  ((((A).cpu[0] & (B).cpu[0]) == (A).cpu[0])				\
++   && (((A).cpu[1] & (B).cpu[1]) == (A).cpu[1]))
+ 
+ /* The bits in this mask specify which
+    instructions we are allowed to generate.  */
+-extern unsigned long insn_flags;
++extern arm_feature_set insn_flags;
+ 
+ /* The bits in this mask specify which instruction scheduling options should
+    be used.  */
+-extern unsigned long tune_flags;
++extern arm_feature_set tune_flags;
+ 
+ /* Nonzero if this chip supports the ARM Architecture 3M extensions.  */
+ extern int arm_arch3m;
+@@ -427,6 +549,9 @@ extern int arm_arch6;
+ /* Nonzero if this chip supports the ARM 6K extensions.  */
+ extern int arm_arch6k;
+ 
++/* Nonzero if this chip supports the ARM 6KZ extensions.  */
++extern int arm_arch6kz;
++
+ /* Nonzero if instructions present in ARMv6-M can be used.  */
+ extern int arm_arch6m;
+ 
+@@ -467,12 +592,6 @@ extern int arm_tune_wbuf;
+ /* Nonzero if tuning for Cortex-A9.  */
+ extern int arm_tune_cortex_a9;
+ 
+-/* Nonzero if generating Thumb instructions.  */
+-extern int thumb_code;
+-
+-/* Nonzero if generating Thumb-1 instructions.  */
+-extern int thumb1_code;
+-
+ /* Nonzero if we should define __THUMB_INTERWORK__ in the
+    preprocessor.
+    XXX This is a bit of a hack, it's intended to help work around
+--- a/src/gcc/config/arm/arm-simd-builtin-types.def
++++ b/src/gcc/config/arm/arm-simd-builtin-types.def
+@@ -44,5 +44,7 @@
+ 
+   ENTRY (Float16x4_t, V4HF, none, 64, float16, 18)
+   ENTRY (Float32x2_t, V2SF, none, 64, float32, 18)
++
++  ENTRY (Float16x8_t, V8HF, none, 128, float16, 19)
+   ENTRY (Float32x4_t, V4SF, none, 128, float32, 19)
+ 
+--- a/src/gcc/config/arm/arm-tables.opt
++++ b/src/gcc/config/arm/arm-tables.opt
+@@ -286,6 +286,9 @@ EnumValue
+ Enum(processor_type) String(cortex-r7) Value(cortexr7)
+ 
+ EnumValue
++Enum(processor_type) String(cortex-r8) Value(cortexr8)
++
++EnumValue
+ Enum(processor_type) String(cortex-m7) Value(cortexm7)
+ 
+ EnumValue
+@@ -304,6 +307,12 @@ EnumValue
+ Enum(processor_type) String(cortex-a17.cortex-a7) Value(cortexa17cortexa7)
+ 
+ EnumValue
++Enum(processor_type) String(cortex-a32) Value(cortexa32)
++
++EnumValue
++Enum(processor_type) String(cortex-a35) Value(cortexa35)
++
++EnumValue
+ Enum(processor_type) String(cortex-a53) Value(cortexa53)
+ 
+ EnumValue
+@@ -316,6 +325,9 @@ EnumValue
+ Enum(processor_type) String(exynos-m1) Value(exynosm1)
+ 
+ EnumValue
++Enum(processor_type) String(qdf24xx) Value(qdf24xx)
++
++EnumValue
+ Enum(processor_type) String(xgene1) Value(xgene1)
+ 
+ EnumValue
+@@ -371,46 +383,55 @@ EnumValue
+ Enum(arm_arch) String(armv6z) Value(13)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv6zk) Value(14)
++Enum(arm_arch) String(armv6kz) Value(14)
++
++EnumValue
++Enum(arm_arch) String(armv6zk) Value(15)
++
++EnumValue
++Enum(arm_arch) String(armv6t2) Value(16)
++
++EnumValue
++Enum(arm_arch) String(armv6-m) Value(17)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv6t2) Value(15)
++Enum(arm_arch) String(armv6s-m) Value(18)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv6-m) Value(16)
++Enum(arm_arch) String(armv7) Value(19)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv6s-m) Value(17)
++Enum(arm_arch) String(armv7-a) Value(20)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7) Value(18)
++Enum(arm_arch) String(armv7ve) Value(21)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7-a) Value(19)
++Enum(arm_arch) String(armv7-r) Value(22)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7ve) Value(20)
++Enum(arm_arch) String(armv7-m) Value(23)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7-r) Value(21)
++Enum(arm_arch) String(armv7e-m) Value(24)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7-m) Value(22)
++Enum(arm_arch) String(armv8-a) Value(25)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv7e-m) Value(23)
++Enum(arm_arch) String(armv8-a+crc) Value(26)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv8-a) Value(24)
++Enum(arm_arch) String(armv8.1-a) Value(27)
+ 
+ EnumValue
+-Enum(arm_arch) String(armv8-a+crc) Value(25)
++Enum(arm_arch) String(armv8.1-a+crc) Value(28)
+ 
+ EnumValue
+-Enum(arm_arch) String(iwmmxt) Value(26)
++Enum(arm_arch) String(iwmmxt) Value(29)
+ 
+ EnumValue
+-Enum(arm_arch) String(iwmmxt2) Value(27)
++Enum(arm_arch) String(iwmmxt2) Value(30)
+ 
+ Enum
+ Name(arm_fpu) Type(int)
+--- a/src/gcc/config/arm/arm-tune.md
++++ b/src/gcc/config/arm/arm-tune.md
+@@ -30,9 +30,10 @@
+ 	cortexa8,cortexa9,cortexa12,
+ 	cortexa15,cortexa17,cortexr4,
+ 	cortexr4f,cortexr5,cortexr7,
+-	cortexm7,cortexm4,cortexm3,
+-	marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,
++	cortexr8,cortexm7,cortexm4,
++	cortexm3,marvell_pj4,cortexa15cortexa7,
++	cortexa17cortexa7,cortexa32,cortexa35,
+ 	cortexa53,cortexa57,cortexa72,
+-	exynosm1,xgene1,cortexa57cortexa53,
+-	cortexa72cortexa53"
++	exynosm1,qdf24xx,xgene1,
++	cortexa57cortexa53,cortexa72cortexa53"
+ 	(const (symbol_ref "((enum attr_tune) arm_tune)")))
+--- a/src/gcc/config/arm/arm.c
++++ b/src/gcc/config/arm/arm.c
+@@ -94,10 +94,12 @@
+ #include "opts.h"
+ #include "dumpfile.h"
+ #include "gimple-expr.h"
++#include "target-globals.h"
+ #include "builtins.h"
+ #include "tm-constrs.h"
+ #include "rtl-iter.h"
+ #include "sched-int.h"
++#include "tree.h"
+ 
+ /* Forward definitions of types.  */
+ typedef struct minipool_node    Mnode;
+@@ -117,10 +119,12 @@ static int arm_compute_static_chain_stack_bytes (void);
+ static arm_stack_offsets *arm_get_frame_offsets (void);
+ static void arm_add_gc_roots (void);
+ static int arm_gen_constant (enum rtx_code, machine_mode, rtx,
+-			     HOST_WIDE_INT, rtx, rtx, int, int);
++			     unsigned HOST_WIDE_INT, rtx, rtx, int, int);
+ static unsigned bit_count (unsigned long);
++static unsigned feature_count (const arm_feature_set*);
+ static int arm_address_register_rtx_p (rtx, int);
+ static int arm_legitimate_index_p (machine_mode, rtx, RTX_CODE, int);
++static bool is_called_in_ARM_mode (tree);
+ static int thumb2_legitimate_index_p (machine_mode, rtx, int);
+ static int thumb1_base_register_rtx_p (rtx, machine_mode, int);
+ static rtx arm_legitimize_address (rtx, rtx, machine_mode);
+@@ -231,6 +235,7 @@ static void arm_encode_section_info (tree, rtx, int);
+ 
+ static void arm_file_end (void);
+ static void arm_file_start (void);
++static void arm_insert_attributes (tree, tree *);
+ 
+ static void arm_setup_incoming_varargs (cumulative_args_t, machine_mode,
+ 					tree, int *, int);
+@@ -264,6 +269,10 @@ static tree arm_build_builtin_va_list (void);
+ static void arm_expand_builtin_va_start (tree, rtx);
+ static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *);
+ static void arm_option_override (void);
++static void arm_option_print (FILE *, int, struct cl_target_option *);
++static void arm_set_current_function (tree);
++static bool arm_can_inline_p (tree, tree);
++static bool arm_valid_target_attribute_p (tree, tree, tree, int);
+ static unsigned HOST_WIDE_INT arm_shift_truncation_mask (machine_mode);
+ static bool arm_macro_fusion_p (void);
+ static bool arm_cannot_copy_insn_p (rtx_insn *);
+@@ -386,6 +395,9 @@ static const struct attribute_spec arm_attribute_table[] =
+ #undef  TARGET_ATTRIBUTE_TABLE
+ #define TARGET_ATTRIBUTE_TABLE arm_attribute_table
+ 
++#undef  TARGET_INSERT_ATTRIBUTES
++#define TARGET_INSERT_ATTRIBUTES arm_insert_attributes
++
+ #undef TARGET_ASM_FILE_START
+ #define TARGET_ASM_FILE_START arm_file_start
+ #undef TARGET_ASM_FILE_END
+@@ -412,9 +424,15 @@ static const struct attribute_spec arm_attribute_table[] =
+ #undef  TARGET_ASM_FUNCTION_EPILOGUE
+ #define TARGET_ASM_FUNCTION_EPILOGUE arm_output_function_epilogue
+ 
++#undef TARGET_CAN_INLINE_P
++#define TARGET_CAN_INLINE_P arm_can_inline_p
++
+ #undef  TARGET_OPTION_OVERRIDE
+ #define TARGET_OPTION_OVERRIDE arm_option_override
+ 
++#undef TARGET_OPTION_PRINT
++#define TARGET_OPTION_PRINT arm_option_print
++
+ #undef  TARGET_COMP_TYPE_ATTRIBUTES
+ #define TARGET_COMP_TYPE_ATTRIBUTES arm_comp_type_attributes
+ 
+@@ -430,6 +448,12 @@ static const struct attribute_spec arm_attribute_table[] =
+ #undef  TARGET_SCHED_ADJUST_COST
+ #define TARGET_SCHED_ADJUST_COST arm_adjust_cost
+ 
++#undef TARGET_SET_CURRENT_FUNCTION
++#define TARGET_SET_CURRENT_FUNCTION arm_set_current_function
++
++#undef TARGET_OPTION_VALID_ATTRIBUTE_P
++#define TARGET_OPTION_VALID_ATTRIBUTE_P arm_valid_target_attribute_p
++
+ #undef TARGET_SCHED_REORDER
+ #define TARGET_SCHED_REORDER arm_sched_reorder
+ 
+@@ -772,11 +796,11 @@ static int thumb_call_reg_needed;
+ 
+ /* The bits in this mask specify which
+    instructions we are allowed to generate.  */
+-unsigned long insn_flags = 0;
++arm_feature_set insn_flags = ARM_FSET_EMPTY;
+ 
+ /* The bits in this mask specify which instruction scheduling options should
+    be used.  */
+-unsigned long tune_flags = 0;
++arm_feature_set tune_flags = ARM_FSET_EMPTY;
+ 
+ /* The highest ARM architecture version supported by the
+    target.  */
+@@ -806,6 +830,9 @@ int arm_arch6 = 0;
+ /* Nonzero if this chip supports the ARM 6K extensions.  */
+ int arm_arch6k = 0;
+ 
++/* Nonzero if this chip supports the ARM 6KZ extensions.  */
++int arm_arch6kz = 0;
++
+ /* Nonzero if instructions present in ARMv6-M can be used.  */
+ int arm_arch6m = 0;
+ 
+@@ -821,6 +848,9 @@ int arm_arch7em = 0;
+ /* Nonzero if instructions present in ARMv8 can be used.  */
+ int arm_arch8 = 0;
+ 
++/* Nonzero if this chip supports the ARMv8.1 extensions.  */
++int arm_arch8_1 = 0;
++
+ /* Nonzero if this chip can benefit from load scheduling.  */
+ int arm_ld_sched = 0;
+ 
+@@ -846,12 +876,6 @@ int arm_tune_wbuf = 0;
+ /* Nonzero if tuning for Cortex-A9.  */
+ int arm_tune_cortex_a9 = 0;
+ 
+-/* Nonzero if generating Thumb instructions.  */
+-int thumb_code = 0;
+-
+-/* Nonzero if generating Thumb-1 instructions.  */
+-int thumb1_code = 0;
+-
+ /* Nonzero if we should define __THUMB_INTERWORK__ in the
+    preprocessor.
+    XXX This is a bit of a hack, it's intended to help work around
+@@ -920,7 +944,7 @@ int arm_regs_in_sequence[] =
+   0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
+ };
+ 
+-#define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl")
++#define ARM_LSL_NAME "lsl"
+ #define streq(string1, string2) (strcmp (string1, string2) == 0)
+ 
+ #define THUMB2_WORK_REGS (0xff & ~(  (1 << THUMB_HARD_FRAME_POINTER_REGNUM) \
+@@ -935,16 +959,18 @@ struct processors
+   enum processor_type core;
+   const char *arch;
+   enum base_architecture base_arch;
+-  const unsigned long flags;
++  const arm_feature_set flags;
+   const struct tune_params *const tune;
+ };
+ 
+ 
+-#define ARM_PREFETCH_NOT_BENEFICIAL 0, -1, -1
+-#define ARM_PREFETCH_BENEFICIAL(prefetch_slots,l1_size,l1_line_size) \
+-  prefetch_slots, \
+-  l1_size, \
+-  l1_line_size
++#define ARM_PREFETCH_NOT_BENEFICIAL { 0, -1, -1 }
++#define ARM_PREFETCH_BENEFICIAL(num_slots,l1_size,l1_line_size) \
++  {								\
++    num_slots,							\
++    l1_size,							\
++    l1_line_size						\
++  }
+ 
+ /* arm generic vectorizer costs.  */
+ static const
+@@ -1027,7 +1053,9 @@ const struct cpu_cost_table cortexa9_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (1),	/* storef.  */
+     COSTS_N_INSNS (1),	/* stored.  */
+-    COSTS_N_INSNS (1)	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1128,7 +1156,9 @@ const struct cpu_cost_table cortexa8_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (1),	/* storef.  */
+     COSTS_N_INSNS (1),	/* stored.  */
+-    COSTS_N_INSNS (1)	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1230,7 +1260,9 @@ const struct cpu_cost_table cortexa5_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (2),	/* storef.  */
+     COSTS_N_INSNS (2),	/* stored.  */
+-    COSTS_N_INSNS (1)	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1333,7 +1365,9 @@ const struct cpu_cost_table cortexa7_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (2),	/* storef.  */
+     COSTS_N_INSNS (2),	/* stored.  */
+-    COSTS_N_INSNS (1)	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1434,7 +1468,9 @@ const struct cpu_cost_table cortexa12_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (2),	/* storef.  */
+     COSTS_N_INSNS (2),	/* stored.  */
+-    0			/* store_unaligned.  */
++    0,			/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1535,7 +1571,9 @@ const struct cpu_cost_table cortexa15_extra_costs =
+     2,			/* stm_regs_per_insn_subsequent.  */
+     0,			/* storef.  */
+     0,			/* stored.  */
+-    0			/* store_unaligned.  */
++    0,			/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1636,7 +1674,9 @@ const struct cpu_cost_table v7m_extra_costs =
+     1,			/* stm_regs_per_insn_subsequent.  */
+     COSTS_N_INSNS (2),	/* storef.  */
+     COSTS_N_INSNS (3),	/* stored.  */
+-    COSTS_N_INSNS (1)  /* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* store_unaligned.  */
++    COSTS_N_INSNS (1),	/* loadv.  */
++    COSTS_N_INSNS (1)	/* storev.  */
+   },
+   {
+     /* FP SFmode */
+@@ -1678,49 +1718,50 @@ const struct cpu_cost_table v7m_extra_costs =
+   }
+ };
+ 
+-#define ARM_FUSE_NOTHING	(0)
+-#define ARM_FUSE_MOVW_MOVT	(1 << 0)
+-
+ const struct tune_params arm_slowmul_tune =
+ {
+   arm_slowmul_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   3,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_fastmul_tune =
+ {
+   arm_fastmul_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ /* StrongARM has early execution of branches, so a sequence that is worth
+@@ -1729,233 +1770,302 @@ const struct tune_params arm_fastmul_tune =
+ const struct tune_params arm_strongarm_tune =
+ {
+   arm_fastmul_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   3,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_xscale_tune =
+ {
+   arm_xscale_rtx_costs,
+-  NULL,
++  NULL,					/* Insn extra costs.  */
+   xscale_sched_adjust_cost,
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   2,						/* Constant limit.  */
+   3,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_9e_tune =
+ {
+   arm_9e_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
++};
++
++const struct tune_params arm_marvell_pj4_tune =
++{
++  arm_9e_rtx_costs,
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
+   arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  &arm_default_vec_cost,
++  1,						/* Constant limit.  */
++  5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
++  ARM_PREFETCH_NOT_BENEFICIAL,
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_v6t2_tune =
+ {
+   arm_9e_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
++
+ /* Generic Cortex tuning.  Use more specific tunings if appropriate.  */
+ const struct tune_params arm_cortex_tune =
+ {
+   arm_9e_rtx_costs,
+   &generic_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a8_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa8_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a7_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa7_extra_costs,
+-  NULL,
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,			/* Vectorizer costs.  */
+-  false,					/* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a15_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa15_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   2,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  3,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_TRUE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_ALL,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_FULL
++};
++
++const struct tune_params arm_cortex_a35_tune =
++{
++  arm_9e_rtx_costs,
++  &cortexa53_extra_costs,
++  NULL,					/* Sched adj cost.  */
+   arm_default_branch_cost,
+-  true,						/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  true, true,                                   /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_FULL			/* Sched L2 autopref.  */
++  &arm_default_vec_cost,
++  1,						/* Constant limit.  */
++  5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
++  ARM_PREFETCH_NOT_BENEFICIAL,
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a53_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa53_extra_costs,
+-  NULL,						/* Scheduler cost adjustment.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,			/* Vectorizer costs.  */
+-  false,					/* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_MOVW_MOVT,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a57_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa57_extra_costs,
+-  NULL,                                         /* Scheduler cost adjustment.  */
+-  1,                                           /* Constant limit.  */
+-  2,                                           /* Max cond insns.  */
+-  ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,                                       /* Prefer constant pool.  */
++  NULL,					/* Sched adj cost.  */
+   arm_default_branch_cost,
+-  true,                                       /* Prefer LDRD/STRD.  */
+-  {true, true},                                /* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                       /* Vectorizer costs.  */
+-  false,                                       /* Prefer Neon for 64-bits bitops.  */
+-  true, true,                                  /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_MOVW_MOVT,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_FULL			/* Sched L2 autopref.  */
++  &arm_default_vec_cost,
++  1,						/* Constant limit.  */
++  2,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  3,						/* Issue rate.  */
++  ARM_PREFETCH_NOT_BENEFICIAL,
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_TRUE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_ALL,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  FUSE_OPS (tune_params::FUSE_MOVW_MOVT | tune_params::FUSE_AES_AESMC),
++  tune_params::SCHED_AUTOPREF_FULL
+ };
+ 
+ const struct tune_params arm_xgene1_tune =
+ {
+   arm_9e_rtx_costs,
+   &xgene1_extra_costs,
+-  NULL,                                        /* Scheduler cost adjustment.  */
+-  1,                                           /* Constant limit.  */
+-  2,                                           /* Max cond insns.  */
+-  ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,                                       /* Prefer constant pool.  */
++  NULL,					/* Sched adj cost.  */
+   arm_default_branch_cost,
+-  true,                                        /* Prefer LDRD/STRD.  */
+-  {true, true},                                /* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                       /* Vectorizer costs.  */
+-  false,                                       /* Prefer Neon for 64-bits bitops.  */
+-  true, true,                                  /* Prefer 32-bit encodings.  */
+-  false,				       /* Prefer Neon for stringops.  */
+-  32,					       /* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  &arm_default_vec_cost,
++  1,						/* Constant limit.  */
++  2,						/* Max cond insns.  */
++  32,						/* Memset max inline.  */
++  4,						/* Issue rate.  */
++  ARM_PREFETCH_NOT_BENEFICIAL,
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_TRUE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_ALL,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ /* Branches can be dual-issued on Cortex-A5, so conditional execution is
+@@ -1965,21 +2075,23 @@ const struct tune_params arm_cortex_a5_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa5_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_cortex_a5_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   1,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_cortex_a5_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {false, false},				/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a9_tune =
+@@ -1987,41 +2099,45 @@ const struct tune_params arm_cortex_a9_tune =
+   arm_9e_rtx_costs,
+   &cortexa9_extra_costs,
+   cortex_a9_sched_adjust_cost,
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_BENEFICIAL(4,32,32),
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_cortex_a12_tune =
+ {
+   arm_9e_rtx_costs,
+   &cortexa12_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+   1,						/* Constant limit.  */
+   2,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  true,						/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  true, true,                                   /* Prefer 32-bit encodings.  */
+-  true,						/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_MOVW_MOVT,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_TRUE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_ALL,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_TRUE,
++  FUSE_OPS (tune_params::FUSE_MOVW_MOVT),
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ /* armv7m tuning.  On Cortex-M4 cores for example, MOVW/MOVT take a single
+@@ -2035,21 +2151,23 @@ const struct tune_params arm_v7m_tune =
+ {
+   arm_9e_rtx_costs,
+   &v7m_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_cortex_m_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   2,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_cortex_m_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {false, false},				/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ /* Cortex-M7 tuning.  */
+@@ -2058,21 +2176,23 @@ const struct tune_params arm_cortex_m7_tune =
+ {
+   arm_9e_rtx_costs,
+   &v7m_extra_costs,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Sched adj cost.  */
++  arm_cortex_m7_branch_cost,
++  &arm_default_vec_cost,
+   0,						/* Constant limit.  */
+   1,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_cortex_m7_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ /* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than
+@@ -2080,43 +2200,47 @@ const struct tune_params arm_cortex_m7_tune =
+ const struct tune_params arm_v6m_tune =
+ {
+   arm_9e_rtx_costs,
+-  NULL,
+-  NULL,						/* Sched adj cost.  */
++  NULL,					/* Insn extra costs.  */
++  NULL,					/* Sched adj cost.  */
++  arm_default_branch_cost,
++  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  1,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  false,					/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {false, false},				/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_FALSE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_FALSE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ const struct tune_params arm_fa726te_tune =
+ {
+   arm_9e_rtx_costs,
+-  NULL,
++  NULL,					/* Insn extra costs.  */
+   fa726te_sched_adjust_cost,
++  arm_default_branch_cost,
++  &arm_default_vec_cost,
+   1,						/* Constant limit.  */
+   5,						/* Max cond insns.  */
++  8,						/* Memset max inline.  */
++  2,						/* Issue rate.  */
+   ARM_PREFETCH_NOT_BENEFICIAL,
+-  true,						/* Prefer constant pool.  */
+-  arm_default_branch_cost,
+-  false,					/* Prefer LDRD/STRD.  */
+-  {true, true},					/* Prefer non short circuit.  */
+-  &arm_default_vec_cost,                        /* Vectorizer costs.  */
+-  false,                                        /* Prefer Neon for 64-bits bitops.  */
+-  false, false,                                 /* Prefer 32-bit encodings.  */
+-  false,					/* Prefer Neon for stringops.  */
+-  8,						/* Maximum insns to inline memset.  */
+-  ARM_FUSE_NOTHING,				/* Fuseable pairs of instructions.  */
+-  ARM_SCHED_AUTOPREF_OFF			/* Sched L2 autopref.  */
++  tune_params::PREF_CONST_POOL_TRUE,
++  tune_params::PREF_LDRD_FALSE,
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* Thumb.  */
++  tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE,		/* ARM.  */
++  tune_params::DISPARAGE_FLAGS_NEITHER,
++  tune_params::PREF_NEON_64_FALSE,
++  tune_params::PREF_NEON_STRINGOPS_FALSE,
++  tune_params::FUSE_NOTHING,
++  tune_params::SCHED_AUTOPREF_OFF
+ };
+ 
+ 
+@@ -2127,10 +2251,10 @@ static const struct processors all_cores[] =
+   /* ARM Cores */
+ #define ARM_CORE(NAME, X, IDENT, ARCH, FLAGS, COSTS) \
+   {NAME, IDENT, #ARCH, BASE_ARCH_##ARCH,	  \
+-    FLAGS | FL_FOR_ARCH##ARCH, &arm_##COSTS##_tune},
++   FLAGS, &arm_##COSTS##_tune},
+ #include "arm-cores.def"
+ #undef ARM_CORE
+-  {NULL, arm_none, NULL, BASE_ARCH_0, 0, NULL}
++  {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
+ };
+ 
+ static const struct processors all_architectures[] =
+@@ -2143,7 +2267,7 @@ static const struct processors all_architectures[] =
+   {NAME, CORE, #ARCH, BASE_ARCH_##ARCH, FLAGS, NULL},
+ #include "arm-arches.def"
+ #undef ARM_ARCH
+-  {NULL, arm_none, NULL, BASE_ARCH_0, 0, NULL}
++  {NULL, arm_none, NULL, BASE_ARCH_0, ARM_FSET_EMPTY, NULL}
+ };
+ 
+ 
+@@ -2161,8 +2285,8 @@ char arm_arch_name[] = "__ARM_ARCH_0UNK__";
+ 
+ static const struct arm_fpu_desc all_fpus[] =
+ {
+-#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO) \
+-  { NAME, MODEL, REV, VFP_REGS, NEON, FP16, CRYPTO },
++#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
++  { NAME, MODEL, REV, VFP_REGS, FEATURES },
+ #include "arm-fpus.def"
+ #undef ARM_FPU
+ };
+@@ -2209,6 +2333,14 @@ bit_count (unsigned long value)
+   return count;
+ }
+ 
++/* Return the number of features in feature-set SET.  */
++static unsigned
++feature_count (const arm_feature_set * set)
++{
++  return (bit_count (ARM_FSET_CPU1 (*set))
++	  + bit_count (ARM_FSET_CPU2 (*set)));
++}
++
+ typedef struct
+ {
+   machine_mode mode;
+@@ -2626,6 +2758,180 @@ arm_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
+   return std_gimplify_va_arg_expr (valist, type, pre_p, post_p);
+ }
+ 
++/* Check any incompatible options that the user has specified.  */
++static void
++arm_option_check_internal (struct gcc_options *opts)
++{
++  int flags = opts->x_target_flags;
++
++  /* Make sure that the processor choice does not conflict with any of the
++     other command line choices.  */
++  if (TARGET_ARM_P (flags) && !ARM_FSET_HAS_CPU1 (insn_flags, FL_NOTM))
++    error ("target CPU does not support ARM mode");
++
++  /* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done
++     from here where no function is being compiled currently.  */
++  if ((TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) && TARGET_ARM_P (flags))
++    warning (0, "enabling backtrace support is only meaningful when compiling for the Thumb");
++
++  if (TARGET_ARM_P (flags) && TARGET_CALLEE_INTERWORKING)
++    warning (0, "enabling callee interworking support is only meaningful when compiling for the Thumb");
++
++  /* If this target is normally configured to use APCS frames, warn if they
++     are turned off and debugging is turned on.  */
++  if (TARGET_ARM_P (flags)
++      && write_symbols != NO_DEBUG
++      && !TARGET_APCS_FRAME
++      && (TARGET_DEFAULT & MASK_APCS_FRAME))
++    warning (0, "-g with -mno-apcs-frame may not give sensible debugging");
++
++  /* iWMMXt unsupported under Thumb mode.  */
++  if (TARGET_THUMB_P (flags) && TARGET_IWMMXT)
++    error ("iWMMXt unsupported under Thumb mode");
++
++  if (TARGET_HARD_TP && TARGET_THUMB1_P (flags))
++    error ("can not use -mtp=cp15 with 16-bit Thumb");
++
++  if (TARGET_THUMB_P (flags) && TARGET_VXWORKS_RTP && flag_pic)
++    {
++      error ("RTP PIC is incompatible with Thumb");
++      flag_pic = 0;
++    }
++
++  /* We only support -mslow-flash-data on armv7-m targets.  */
++  if (target_slow_flash_data
++      && ((!(arm_arch7 && !arm_arch_notm) && !arm_arch7em)
++	  || (TARGET_THUMB1_P (flags) || flag_pic || TARGET_NEON)))
++    error ("-mslow-flash-data only supports non-pic code on armv7-m targets");
++}
++
++/* Recompute the global settings depending on target attribute options.  */
++
++static void
++arm_option_params_internal (void)
++{
++  /* If we are not using the default (ARM mode) section anchor offset
++     ranges, then set the correct ranges now.  */
++  if (TARGET_THUMB1)
++    {
++      /* Thumb-1 LDR instructions cannot have negative offsets.
++         Permissible positive offset ranges are 5-bit (for byte loads),
++         6-bit (for halfword loads), or 7-bit (for word loads).
++         Empirical results suggest a 7-bit anchor range gives the best
++         overall code size.  */
++      targetm.min_anchor_offset = 0;
++      targetm.max_anchor_offset = 127;
++    }
++  else if (TARGET_THUMB2)
++    {
++      /* The minimum is set such that the total size of the block
++         for a particular anchor is 248 + 1 + 4095 bytes, which is
++         divisible by eight, ensuring natural spacing of anchors.  */
++      targetm.min_anchor_offset = -248;
++      targetm.max_anchor_offset = 4095;
++    }
++  else
++    {
++      targetm.min_anchor_offset = TARGET_MIN_ANCHOR_OFFSET;
++      targetm.max_anchor_offset = TARGET_MAX_ANCHOR_OFFSET;
++    }
++
++  if (optimize_size)
++    {
++      /* If optimizing for size, bump the number of instructions that we
++         are prepared to conditionally execute (even on a StrongARM).  */
++      max_insns_skipped = 6;
++
++      /* For THUMB2, we limit the conditional sequence to one IT block.  */
++      if (TARGET_THUMB2)
++        max_insns_skipped = arm_restrict_it ? 1 : 4;
++    }
++  else
++    /* When -mrestrict-it is in use tone down the if-conversion.  */
++    max_insns_skipped = (TARGET_THUMB2 && arm_restrict_it)
++      ? 1 : current_tune->max_insns_skipped;
++}
++
++/* True if -mflip-thumb should next add an attribute for the default
++   mode, false if it should next add an attribute for the opposite mode.  */
++static GTY(()) bool thumb_flipper;
++
++/* Options after initial target override.  */
++static GTY(()) tree init_optimize;
++
++/* Reset options between modes that the user has specified.  */
++static void
++arm_option_override_internal (struct gcc_options *opts,
++			      struct gcc_options *opts_set)
++{
++  if (TARGET_INTERWORK && !ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB))
++    {
++      /* The default is to enable interworking, so this warning message would
++	 be confusing to users who have just compiled with, eg, -march=armv3.  */
++      /* warning (0, "ignoring -minterwork because target CPU does not support THUMB"); */
++      opts->x_target_flags &= ~MASK_INTERWORK;
++    }
++
++  if (TARGET_THUMB_P (opts->x_target_flags)
++      && !(ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB)))
++    {
++      warning (0, "target CPU does not support THUMB instructions");
++      opts->x_target_flags &= ~MASK_THUMB;
++    }
++
++  if (TARGET_APCS_FRAME && TARGET_THUMB_P (opts->x_target_flags))
++    {
++      /* warning (0, "ignoring -mapcs-frame because -mthumb was used"); */
++      opts->x_target_flags &= ~MASK_APCS_FRAME;
++    }
++
++  /* Callee super interworking implies thumb interworking.  Adding
++     this to the flags here simplifies the logic elsewhere.  */
++  if (TARGET_THUMB_P (opts->x_target_flags) && TARGET_CALLEE_INTERWORKING)
++    opts->x_target_flags |= MASK_INTERWORK;
++
++  /* need to remember initial values so combinaisons of options like
++     -mflip-thumb -mthumb -fno-schedule-insns work for any attribute.  */
++  cl_optimization *to = TREE_OPTIMIZATION (init_optimize);
++
++  if (! opts_set->x_arm_restrict_it)
++    opts->x_arm_restrict_it = arm_arch8;
++
++  if (!TARGET_THUMB2_P (opts->x_target_flags))
++    opts->x_arm_restrict_it = 0;
++
++  /* Don't warn since it's on by default in -O2.  */
++  if (TARGET_THUMB1_P (opts->x_target_flags))
++    opts->x_flag_schedule_insns = 0;
++  else
++    opts->x_flag_schedule_insns = to->x_flag_schedule_insns;
++
++  /* Disable shrink-wrap when optimizing function for size, since it tends to
++     generate additional returns.  */
++  if (optimize_function_for_size_p (cfun)
++      && TARGET_THUMB2_P (opts->x_target_flags))
++    opts->x_flag_shrink_wrap = false;
++  else
++    opts->x_flag_shrink_wrap = to->x_flag_shrink_wrap;
++
++  /* In Thumb1 mode, we emit the epilogue in RTL, but the last insn
++     - epilogue_insns - does not accurately model the corresponding insns
++     emitted in the asm file.  In particular, see the comment in thumb_exit
++     'Find out how many of the (return) argument registers we can corrupt'.
++     As a consequence, the epilogue may clobber registers without fipa-ra
++     finding out about it.  Therefore, disable fipa-ra in Thumb1 mode.
++     TODO: Accurately model clobbers for epilogue_insns and reenable
++     fipa-ra.  */
++  if (TARGET_THUMB1_P (opts->x_target_flags))
++    opts->x_flag_ipa_ra = 0;
++  else
++    opts->x_flag_ipa_ra = to->x_flag_ipa_ra;
++
++  /* Thumb2 inline assembly code should always use unified syntax.
++     This will apply to ARM and Thumb1 eventually.  */
++  opts->x_inline_asm_unified = TARGET_THUMB2_P (opts->x_target_flags);
++}
++
+ /* Fix up any incompatible options that the user has specified.  */
+ static void
+ arm_option_override (void)
+@@ -2654,8 +2960,13 @@ arm_option_override (void)
+     {
+       if (arm_selected_cpu)
+ 	{
++	  const arm_feature_set tuning_flags = ARM_FSET_MAKE_CPU1 (FL_TUNE);
++	  arm_feature_set selected_flags;
++	  ARM_FSET_XOR (selected_flags, arm_selected_cpu->flags,
++			arm_selected_arch->flags);
++	  ARM_FSET_EXCLUDE (selected_flags, selected_flags, tuning_flags);
+ 	  /* Check for conflict between mcpu and march.  */
+-	  if ((arm_selected_cpu->flags ^ arm_selected_arch->flags) & ~FL_TUNE)
++	  if (!ARM_FSET_IS_EMPTY (selected_flags))
+ 	    {
+ 	      warning (0, "switch -mcpu=%s conflicts with -march=%s switch",
+ 		       arm_selected_cpu->name, arm_selected_arch->name);
+@@ -2679,7 +2990,7 @@ arm_option_override (void)
+   if (!arm_selected_cpu)
+     {
+       const struct processors * sel;
+-      unsigned int        sought;
++      arm_feature_set sought = ARM_FSET_EMPTY;;
+ 
+       arm_selected_cpu = &all_cores[TARGET_CPU_DEFAULT];
+       if (!arm_selected_cpu->name)
+@@ -2699,26 +3010,27 @@ arm_option_override (void)
+ 
+       /* Now check to see if the user has specified some command line
+ 	 switch that require certain abilities from the cpu.  */
+-      sought = 0;
+ 
+       if (TARGET_INTERWORK || TARGET_THUMB)
+ 	{
+-	  sought |= (FL_THUMB | FL_MODE32);
++	  ARM_FSET_ADD_CPU1 (sought, FL_THUMB);
++	  ARM_FSET_ADD_CPU1 (sought, FL_MODE32);
+ 
+ 	  /* There are no ARM processors that support both APCS-26 and
+ 	     interworking.  Therefore we force FL_MODE26 to be removed
+ 	     from insn_flags here (if it was set), so that the search
+ 	     below will always be able to find a compatible processor.  */
+-	  insn_flags &= ~FL_MODE26;
++	  ARM_FSET_DEL_CPU1 (insn_flags, FL_MODE26);
+ 	}
+ 
+-      if (sought != 0 && ((sought & insn_flags) != sought))
++      if (!ARM_FSET_IS_EMPTY (sought)
++	  && !(ARM_FSET_CPU_SUBSET (sought, insn_flags)))
+ 	{
+ 	  /* Try to locate a CPU type that supports all of the abilities
+ 	     of the default CPU, plus the extra abilities requested by
+ 	     the user.  */
+ 	  for (sel = all_cores; sel->name != NULL; sel++)
+-	    if ((sel->flags & sought) == (sought | insn_flags))
++	    if (ARM_FSET_CPU_SUBSET (sought, sel->flags))
+ 	      break;
+ 
+ 	  if (sel->name == NULL)
+@@ -2738,19 +3050,23 @@ arm_option_override (void)
+ 		 command line options we scan the array again looking
+ 		 for a best match.  */
+ 	      for (sel = all_cores; sel->name != NULL; sel++)
+-		if ((sel->flags & sought) == sought)
+-		  {
+-		    unsigned count;
+-
+-		    count = bit_count (sel->flags & insn_flags);
+-
+-		    if (count >= current_bit_count)
+-		      {
+-			best_fit = sel;
+-			current_bit_count = count;
+-		      }
+-		  }
++		{
++		  arm_feature_set required = ARM_FSET_EMPTY;
++		  ARM_FSET_UNION (required, sought, insn_flags);
++		  if (ARM_FSET_CPU_SUBSET (required, sel->flags))
++		    {
++		      unsigned count;
++		      arm_feature_set flags;
++		      ARM_FSET_INTER (flags, sel->flags, insn_flags);
++		      count = feature_count (&flags);
+ 
++		      if (count >= current_bit_count)
++			{
++			  best_fit = sel;
++			  current_bit_count = count;
++			}
++		    }
++		}
+ 	      gcc_assert (best_fit);
+ 	      sel = best_fit;
+ 	    }
+@@ -2772,44 +3088,19 @@ arm_option_override (void)
+   tune_flags = arm_selected_tune->flags;
+   current_tune = arm_selected_tune->tune;
+ 
+-  /* Make sure that the processor choice does not conflict with any of the
+-     other command line choices.  */
+-  if (TARGET_ARM && !(insn_flags & FL_NOTM))
+-    error ("target CPU does not support ARM mode");
++  /* TBD: Dwarf info for apcs frame is not handled yet.  */
++  if (TARGET_APCS_FRAME)
++    flag_shrink_wrap = false;
+ 
+   /* BPABI targets use linker tricks to allow interworking on cores
+      without thumb support.  */
+-  if (TARGET_INTERWORK && !((insn_flags & FL_THUMB) || TARGET_BPABI))
++  if (TARGET_INTERWORK
++      && !(ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB) || TARGET_BPABI))
+     {
+       warning (0, "target CPU does not support interworking" );
+       target_flags &= ~MASK_INTERWORK;
+     }
+ 
+-  if (TARGET_THUMB && !(insn_flags & FL_THUMB))
+-    {
+-      warning (0, "target CPU does not support THUMB instructions");
+-      target_flags &= ~MASK_THUMB;
+-    }
+-
+-  if (TARGET_APCS_FRAME && TARGET_THUMB)
+-    {
+-      /* warning (0, "ignoring -mapcs-frame because -mthumb was used"); */
+-      target_flags &= ~MASK_APCS_FRAME;
+-    }
+-
+-  /* Callee super interworking implies thumb interworking.  Adding
+-     this to the flags here simplifies the logic elsewhere.  */
+-  if (TARGET_THUMB && TARGET_CALLEE_INTERWORKING)
+-    target_flags |= MASK_INTERWORK;
+-
+-  /* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done
+-     from here where no function is being compiled currently.  */
+-  if ((TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) && TARGET_ARM)
+-    warning (0, "enabling backtrace support is only meaningful when compiling for the Thumb");
+-
+-  if (TARGET_ARM && TARGET_CALLEE_INTERWORKING)
+-    warning (0, "enabling callee interworking support is only meaningful when compiling for the Thumb");
+-
+   if (TARGET_APCS_STACK && !TARGET_APCS_FRAME)
+     {
+       warning (0, "-mapcs-stack-check incompatible with -mno-apcs-frame");
+@@ -2825,73 +3116,39 @@ arm_option_override (void)
+   if (TARGET_APCS_REENT)
+     warning (0, "APCS reentrant code not supported.  Ignored");
+ 
+-  /* If this target is normally configured to use APCS frames, warn if they
+-     are turned off and debugging is turned on.  */
+-  if (TARGET_ARM
+-      && write_symbols != NO_DEBUG
+-      && !TARGET_APCS_FRAME
+-      && (TARGET_DEFAULT & MASK_APCS_FRAME))
+-    warning (0, "-g with -mno-apcs-frame may not give sensible debugging");
+-
+   if (TARGET_APCS_FLOAT)
+     warning (0, "passing floating point arguments in fp regs not yet supported");
+ 
+   /* Initialize boolean versions of the flags, for use in the arm.md file.  */
+-  arm_arch3m = (insn_flags & FL_ARCH3M) != 0;
+-  arm_arch4 = (insn_flags & FL_ARCH4) != 0;
+-  arm_arch4t = arm_arch4 & ((insn_flags & FL_THUMB) != 0);
+-  arm_arch5 = (insn_flags & FL_ARCH5) != 0;
+-  arm_arch5e = (insn_flags & FL_ARCH5E) != 0;
+-  arm_arch6 = (insn_flags & FL_ARCH6) != 0;
+-  arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+-  arm_arch_notm = (insn_flags & FL_NOTM) != 0;
++  arm_arch3m = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH3M);
++  arm_arch4 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH4);
++  arm_arch4t = arm_arch4 && (ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB));
++  arm_arch5 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH5);
++  arm_arch5e = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH5E);
++  arm_arch6 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH6);
++  arm_arch6k = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH6K);
++  arm_arch6kz = arm_arch6k && ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH6KZ);
++  arm_arch_notm = ARM_FSET_HAS_CPU1 (insn_flags, FL_NOTM);
+   arm_arch6m = arm_arch6 && !arm_arch_notm;
+-  arm_arch7 = (insn_flags & FL_ARCH7) != 0;
+-  arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
+-  arm_arch8 = (insn_flags & FL_ARCH8) != 0;
+-  arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
+-  arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
+-
+-  arm_ld_sched = (tune_flags & FL_LDSCHED) != 0;
+-  arm_tune_strongarm = (tune_flags & FL_STRONG) != 0;
+-  thumb_code = TARGET_ARM == 0;
+-  thumb1_code = TARGET_THUMB1 != 0;
+-  arm_tune_wbuf = (tune_flags & FL_WBUF) != 0;
+-  arm_tune_xscale = (tune_flags & FL_XSCALE) != 0;
+-  arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0;
+-  arm_arch_iwmmxt2 = (insn_flags & FL_IWMMXT2) != 0;
+-  arm_arch_thumb_hwdiv = (insn_flags & FL_THUMB_DIV) != 0;
+-  arm_arch_arm_hwdiv = (insn_flags & FL_ARM_DIV) != 0;
+-  arm_arch_no_volatile_ce = (insn_flags & FL_NO_VOLATILE_CE) != 0;
++  arm_arch7 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7);
++  arm_arch7em = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7EM);
++  arm_arch8 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH8);
++  arm_arch8_1 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_1);
++  arm_arch_thumb2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB2);
++  arm_arch_xscale = ARM_FSET_HAS_CPU1 (insn_flags, FL_XSCALE);
++
++  arm_ld_sched = ARM_FSET_HAS_CPU1 (tune_flags, FL_LDSCHED);
++  arm_tune_strongarm = ARM_FSET_HAS_CPU1 (tune_flags, FL_STRONG);
++  arm_tune_wbuf = ARM_FSET_HAS_CPU1 (tune_flags, FL_WBUF);
++  arm_tune_xscale = ARM_FSET_HAS_CPU1 (tune_flags, FL_XSCALE);
++  arm_arch_iwmmxt = ARM_FSET_HAS_CPU1 (insn_flags, FL_IWMMXT);
++  arm_arch_iwmmxt2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_IWMMXT2);
++  arm_arch_thumb_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB_DIV);
++  arm_arch_arm_hwdiv = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARM_DIV);
++  arm_arch_no_volatile_ce = ARM_FSET_HAS_CPU1 (insn_flags, FL_NO_VOLATILE_CE);
+   arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
+-  arm_arch_crc = (insn_flags & FL_CRC32) != 0;
+-  arm_m_profile_small_mul = (insn_flags & FL_SMALLMUL) != 0;
+-  if (arm_restrict_it == 2)
+-    arm_restrict_it = arm_arch8 && TARGET_THUMB2;
+-
+-  if (!TARGET_THUMB2)
+-    arm_restrict_it = 0;
+-
+-  /* If we are not using the default (ARM mode) section anchor offset
+-     ranges, then set the correct ranges now.  */
+-  if (TARGET_THUMB1)
+-    {
+-      /* Thumb-1 LDR instructions cannot have negative offsets.
+-         Permissible positive offset ranges are 5-bit (for byte loads),
+-         6-bit (for halfword loads), or 7-bit (for word loads).
+-         Empirical results suggest a 7-bit anchor range gives the best
+-         overall code size.  */
+-      targetm.min_anchor_offset = 0;
+-      targetm.max_anchor_offset = 127;
+-    }
+-  else if (TARGET_THUMB2)
+-    {
+-      /* The minimum is set such that the total size of the block
+-         for a particular anchor is 248 + 1 + 4095 bytes, which is
+-         divisible by eight, ensuring natural spacing of anchors.  */
+-      targetm.min_anchor_offset = -248;
+-      targetm.max_anchor_offset = 4095;
+-    }
++  arm_arch_crc = ARM_FSET_HAS_CPU1 (insn_flags, FL_CRC32);
++  arm_m_profile_small_mul = ARM_FSET_HAS_CPU1 (insn_flags, FL_SMALLMUL);
+ 
+   /* V5 code we generate is completely interworking capable, so we turn off
+      TARGET_INTERWORK here to avoid many tests later on.  */
+@@ -2951,10 +3208,6 @@ arm_option_override (void)
+   if (TARGET_IWMMXT && TARGET_NEON)
+     error ("iWMMXt and NEON are incompatible");
+ 
+-  /* iWMMXt unsupported under Thumb mode.  */
+-  if (TARGET_THUMB && TARGET_IWMMXT)
+-    error ("iWMMXt unsupported under Thumb mode");
+-
+   /* __fp16 support currently assumes the core has ldrh.  */
+   if (!arm_arch4 && arm_fp16_format != ARM_FP16_FORMAT_NONE)
+     sorry ("__fp16 and no ldrh");
+@@ -2987,7 +3240,7 @@ arm_option_override (void)
+ 
+   /* For arm2/3 there is no need to do any scheduling if we are doing
+      software floating-point.  */
+-  if (TARGET_SOFT_FLOAT && (tune_flags & FL_MODE32) == 0)
++  if (TARGET_SOFT_FLOAT && !ARM_FSET_HAS_CPU1 (tune_flags, FL_MODE32))
+     flag_schedule_insns = flag_schedule_insns_after_reload = 0;
+ 
+   /* Use the cp15 method if it is available.  */
+@@ -2999,9 +3252,6 @@ arm_option_override (void)
+ 	target_thread_pointer = TP_SOFT;
+     }
+ 
+-  if (TARGET_HARD_TP && TARGET_THUMB1)
+-    error ("can not use -mtp=cp15 with 16-bit Thumb");
+-
+   /* Override the default structure alignment for AAPCS ABI.  */
+   if (!global_options_set.x_arm_structure_size_boundary)
+     {
+@@ -3024,12 +3274,6 @@ arm_option_override (void)
+ 	}
+     }
+ 
+-  if (!TARGET_ARM && TARGET_VXWORKS_RTP && flag_pic)
+-    {
+-      error ("RTP PIC is incompatible with Thumb");
+-      flag_pic = 0;
+-    }
+-
+   /* If stack checking is disabled, we can use r10 as the PIC register,
+      which keeps r9 available.  The EABI specifies r9 as the PIC register.  */
+   if (flag_pic && TARGET_SINGLE_PIC_BASE)
+@@ -3097,25 +3341,6 @@ arm_option_override (void)
+       unaligned_access = 0;
+     }
+ 
+-  if (TARGET_THUMB1 && flag_schedule_insns)
+-    {
+-      /* Don't warn since it's on by default in -O2.  */
+-      flag_schedule_insns = 0;
+-    }
+-
+-  if (optimize_size)
+-    {
+-      /* If optimizing for size, bump the number of instructions that we
+-         are prepared to conditionally execute (even on a StrongARM).  */
+-      max_insns_skipped = 6;
+-
+-      /* For THUMB2, we limit the conditional sequence to one IT block.  */
+-      if (TARGET_THUMB2)
+-	max_insns_skipped = MAX_INSN_PER_IT_BLOCK;
+-    }
+-  else
+-    max_insns_skipped = current_tune->max_insns_skipped;
+-
+   /* Hot/Cold partitioning is not currently supported, since we can't
+      handle literal pool placement in that case.  */
+   if (flag_reorder_blocks_and_partition)
+@@ -3140,31 +3365,33 @@ arm_option_override (void)
+       && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ 
+-  /* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed
+-     it beneficial (signified by setting num_prefetch_slots to 1 or more.)  */
++  /* Enable sw prefetching at -O3 for CPUS that have prefetch, and we
++     have deemed it beneficial (signified by setting
++     prefetch.num_slots to 1 or more).  */
+   if (flag_prefetch_loop_arrays < 0
+       && HAVE_prefetch
+       && optimize >= 3
+-      && current_tune->num_prefetch_slots > 0)
++      && current_tune->prefetch.num_slots > 0)
+     flag_prefetch_loop_arrays = 1;
+ 
+-  /* Set up parameters to be used in prefetching algorithm.  Do not override the
+-     defaults unless we are tuning for a core we have researched values for.  */
+-  if (current_tune->num_prefetch_slots > 0)
++  /* Set up parameters to be used in prefetching algorithm.  Do not
++     override the defaults unless we are tuning for a core we have
++     researched values for.  */
++  if (current_tune->prefetch.num_slots > 0)
+     maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
+-                           current_tune->num_prefetch_slots,
+-                           global_options.x_param_values,
+-                           global_options_set.x_param_values);
+-  if (current_tune->l1_cache_line_size >= 0)
++			   current_tune->prefetch.num_slots,
++			   global_options.x_param_values,
++			   global_options_set.x_param_values);
++  if (current_tune->prefetch.l1_cache_line_size >= 0)
+     maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
+-                           current_tune->l1_cache_line_size,
+-                           global_options.x_param_values,
+-                           global_options_set.x_param_values);
+-  if (current_tune->l1_cache_size >= 0)
++			   current_tune->prefetch.l1_cache_line_size,
++			   global_options.x_param_values,
++			   global_options_set.x_param_values);
++  if (current_tune->prefetch.l1_cache_size >= 0)
+     maybe_set_param_value (PARAM_L1_CACHE_SIZE,
+-                           current_tune->l1_cache_size,
+-                           global_options.x_param_values,
+-                           global_options_set.x_param_values);
++			   current_tune->prefetch.l1_cache_size,
++			   global_options.x_param_values,
++			   global_options_set.x_param_values);
+ 
+   /* Use Neon to perform 64-bits operations rather than core
+      registers.  */
+@@ -3174,67 +3401,63 @@ arm_option_override (void)
+ 
+   /* Use the alternative scheduling-pressure algorithm by default.  */
+   maybe_set_param_value (PARAM_SCHED_PRESSURE_ALGORITHM, SCHED_PRESSURE_MODEL,
+-                         global_options.x_param_values,
+-                         global_options_set.x_param_values);
++			 global_options.x_param_values,
++			 global_options_set.x_param_values);
+ 
+   /* Look through ready list and all of queue for instructions
+      relevant for L2 auto-prefetcher.  */
+   int param_sched_autopref_queue_depth;
+-  if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_OFF)
+-    param_sched_autopref_queue_depth = -1;
+-  else if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_RANK)
+-    param_sched_autopref_queue_depth = 0;
+-  else if (current_tune->sched_autopref == ARM_SCHED_AUTOPREF_FULL)
+-    param_sched_autopref_queue_depth = max_insn_queue_index + 1;
+-  else
+-    gcc_unreachable ();
+-  maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
+-			 param_sched_autopref_queue_depth,
+-                         global_options.x_param_values,
+-                         global_options_set.x_param_values);
+ 
+-  /* Disable shrink-wrap when optimizing function for size, since it tends to
+-     generate additional returns.  */
+-  if (optimize_function_for_size_p (cfun) && TARGET_THUMB2)
+-    flag_shrink_wrap = false;
+-  /* TBD: Dwarf info for apcs frame is not handled yet.  */
+-  if (TARGET_APCS_FRAME)
+-    flag_shrink_wrap = false;
++  switch (current_tune->sched_autopref)
++    {
++    case tune_params::SCHED_AUTOPREF_OFF:
++      param_sched_autopref_queue_depth = -1;
++      break;
+ 
+-  /* We only support -mslow-flash-data on armv7-m targets.  */
+-  if (target_slow_flash_data
+-      && ((!(arm_arch7 && !arm_arch_notm) && !arm_arch7em)
+-	  || (TARGET_THUMB1 || flag_pic || TARGET_NEON)))
+-    error ("-mslow-flash-data only supports non-pic code on armv7-m targets");
++    case tune_params::SCHED_AUTOPREF_RANK:
++      param_sched_autopref_queue_depth = 0;
++      break;
++
++    case tune_params::SCHED_AUTOPREF_FULL:
++      param_sched_autopref_queue_depth = max_insn_queue_index + 1;
++      break;
++
++    default:
++      gcc_unreachable ();
++    }
++
++  maybe_set_param_value (PARAM_SCHED_AUTOPREF_QUEUE_DEPTH,
++			 param_sched_autopref_queue_depth,
++			 global_options.x_param_values,
++			 global_options_set.x_param_values);
+ 
+   /* Currently, for slow flash data, we just disable literal pools.  */
+   if (target_slow_flash_data)
+     arm_disable_literal_pool = true;
+ 
+-  /* Thumb2 inline assembly code should always use unified syntax.
+-     This will apply to ARM and Thumb1 eventually.  */
+-  if (TARGET_THUMB2)
+-    inline_asm_unified = 1;
+-
+   /* Disable scheduling fusion by default if it's not armv7 processor
+      or doesn't prefer ldrd/strd.  */
+   if (flag_schedule_fusion == 2
+       && (!arm_arch7 || !current_tune->prefer_ldrd_strd))
+     flag_schedule_fusion = 0;
+ 
+-  /* In Thumb1 mode, we emit the epilogue in RTL, but the last insn
+-     - epilogue_insns - does not accurately model the corresponding insns
+-     emitted in the asm file.  In particular, see the comment in thumb_exit
+-     'Find out how many of the (return) argument registers we can corrupt'.
+-     As a consequence, the epilogue may clobber registers without fipa-ra
+-     finding out about it.  Therefore, disable fipa-ra in Thumb1 mode.
+-     TODO: Accurately model clobbers for epilogue_insns and reenable
+-     fipa-ra.  */
+-  if (TARGET_THUMB1)
+-    flag_ipa_ra = 0;
++  /* Need to remember initial options before they are overriden.  */
++  init_optimize = build_optimization_node (&global_options);
++
++  arm_option_override_internal (&global_options, &global_options_set);
++  arm_option_check_internal (&global_options);
++  arm_option_params_internal ();
+ 
+   /* Register global variables with the garbage collector.  */
+   arm_add_gc_roots ();
++
++  /* Save the initial options in case the user does function specific
++     options.  */
++  target_option_default_node = target_option_current_node
++    = build_target_option_node (&global_options);
++
++  /* Init initial mode for testing.  */
++  thumb_flipper = TARGET_THUMB;
+ }
+ 
+ static void
+@@ -3388,13 +3611,17 @@ arm_warn_func_return (tree decl)
+ static void
+ arm_asm_trampoline_template (FILE *f)
+ {
++  fprintf (f, "\t.syntax unified\n");
++
+   if (TARGET_ARM)
+     {
++      fprintf (f, "\t.arm\n");
+       asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
+       asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", PC_REGNUM, PC_REGNUM);
+     }
+   else if (TARGET_THUMB2)
+     {
++      fprintf (f, "\t.thumb\n");
+       /* The Thumb-2 trampoline is similar to the arm implementation.
+ 	 Unlike 16-bit Thumb, we enter the stub in thumb mode.  */
+       asm_fprintf (f, "\tldr.w\t%r, [%r, #4]\n",
+@@ -4058,8 +4285,8 @@ emit_constant_insn (rtx cond, rtx pattern)
+ 
+ static int
+ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
+-		  HOST_WIDE_INT val, rtx target, rtx source, int subtargets,
+-		  int generate)
++		  unsigned HOST_WIDE_INT val, rtx target, rtx source,
++		  int subtargets, int generate)
+ {
+   int can_invert = 0;
+   int can_negate = 0;
+@@ -4437,7 +4664,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
+ 	  mvn	r0, r0, asl #12
+ 	  mvn	r0, r0, lsr #12  */
+       if (set_sign_bit_copies > 8
+-	  && (val & (-1 << (32 - set_sign_bit_copies))) == val)
++	  && (val & (HOST_WIDE_INT_M1U << (32 - set_sign_bit_copies))) == val)
+ 	{
+ 	  if (generate)
+ 	    {
+@@ -6503,8 +6730,13 @@ arm_function_ok_for_sibcall (tree decl, tree exp)
+ 	 a VFP register but then need to transfer it to a core
+ 	 register.  */
+       rtx a, b;
++      tree decl_or_type = decl;
++
++      /* If it is an indirect function pointer, get the function type.  */
++      if (!decl)
++	decl_or_type = TREE_TYPE (TREE_TYPE (CALL_EXPR_FN (exp)));
+ 
+-      a = arm_function_value (TREE_TYPE (exp), decl, false);
++      a = arm_function_value (TREE_TYPE (exp), decl_or_type, false);
+       b = arm_function_value (TREE_TYPE (DECL_RESULT (cfun->decl)),
+ 			      cfun->decl, false);
+       if (!rtx_equal_p (a, b))
+@@ -7946,236 +8178,6 @@ thumb_legitimize_address (rtx x, rtx orig_x, machine_mode mode)
+   return x;
+ }
+ 
+-bool
+-arm_legitimize_reload_address (rtx *p,
+-			       machine_mode mode,
+-			       int opnum, int type,
+-			       int ind_levels ATTRIBUTE_UNUSED)
+-{
+-  /* We must recognize output that we have already generated ourselves.  */
+-  if (GET_CODE (*p) == PLUS
+-      && GET_CODE (XEXP (*p, 0)) == PLUS
+-      && REG_P (XEXP (XEXP (*p, 0), 0))
+-      && CONST_INT_P (XEXP (XEXP (*p, 0), 1))
+-      && CONST_INT_P (XEXP (*p, 1)))
+-    {
+-      push_reload (XEXP (*p, 0), NULL_RTX, &XEXP (*p, 0), NULL,
+-		   MODE_BASE_REG_CLASS (mode), GET_MODE (*p),
+-		   VOIDmode, 0, 0, opnum, (enum reload_type) type);
+-      return true;
+-    }
+-
+-  if (GET_CODE (*p) == PLUS
+-      && REG_P (XEXP (*p, 0))
+-      && ARM_REGNO_OK_FOR_BASE_P (REGNO (XEXP (*p, 0)))
+-      /* If the base register is equivalent to a constant, let the generic
+-	 code handle it.  Otherwise we will run into problems if a future
+-	 reload pass decides to rematerialize the constant.  */
+-      && !reg_equiv_constant (ORIGINAL_REGNO (XEXP (*p, 0)))
+-      && CONST_INT_P (XEXP (*p, 1)))
+-    {
+-      HOST_WIDE_INT val = INTVAL (XEXP (*p, 1));
+-      HOST_WIDE_INT low, high;
+-
+-      /* Detect coprocessor load/stores.  */
+-      bool coproc_p = ((TARGET_HARD_FLOAT
+-			&& TARGET_VFP
+-			&& (mode == SFmode || mode == DFmode))
+-		       || (TARGET_REALLY_IWMMXT
+-			   && VALID_IWMMXT_REG_MODE (mode))
+-		       || (TARGET_NEON
+-			   && (VALID_NEON_DREG_MODE (mode)
+-			       || VALID_NEON_QREG_MODE (mode))));
+-
+-      /* For some conditions, bail out when lower two bits are unaligned.  */
+-      if ((val & 0x3) != 0
+-	  /* Coprocessor load/store indexes are 8-bits + '00' appended.  */
+-	  && (coproc_p
+-	      /* For DI, and DF under soft-float: */
+-	      || ((mode == DImode || mode == DFmode)
+-		  /* Without ldrd, we use stm/ldm, which does not
+-		     fair well with unaligned bits.  */
+-		  && (! TARGET_LDRD
+-		      /* Thumb-2 ldrd/strd is [-1020,+1020] in steps of 4.  */
+-		      || TARGET_THUMB2))))
+-	return false;
+-
+-      /* When breaking down a [reg+index] reload address into [(reg+high)+low],
+-	 of which the (reg+high) gets turned into a reload add insn,
+-	 we try to decompose the index into high/low values that can often
+-	 also lead to better reload CSE.
+-	 For example:
+-	         ldr r0, [r2, #4100]  // Offset too large
+-		 ldr r1, [r2, #4104]  // Offset too large
+-
+-	 is best reloaded as:
+-	         add t1, r2, #4096
+-		 ldr r0, [t1, #4]
+-		 add t2, r2, #4096
+-		 ldr r1, [t2, #8]
+-
+-	 which post-reload CSE can simplify in most cases to eliminate the
+-	 second add instruction:
+-	         add t1, r2, #4096
+-		 ldr r0, [t1, #4]
+-		 ldr r1, [t1, #8]
+-
+-	 The idea here is that we want to split out the bits of the constant
+-	 as a mask, rather than as subtracting the maximum offset that the
+-	 respective type of load/store used can handle.
+-
+-	 When encountering negative offsets, we can still utilize it even if
+-	 the overall offset is positive; sometimes this may lead to an immediate
+-	 that can be constructed with fewer instructions.
+-	 For example:
+-	         ldr r0, [r2, #0x3FFFFC]
+-
+-	 This is best reloaded as:
+-	         add t1, r2, #0x400000
+-		 ldr r0, [t1, #-4]
+-
+-	 The trick for spotting this for a load insn with N bits of offset
+-	 (i.e. bits N-1:0) is to look at bit N; if it is set, then chose a
+-	 negative offset that is going to make bit N and all the bits below
+-	 it become zero in the remainder part.
+-
+-	 The SIGN_MAG_LOW_ADDR_BITS macro below implements this, with respect
+-	 to sign-magnitude addressing (i.e. separate +- bit, or 1's complement),
+-	 used in most cases of ARM load/store instructions.  */
+-
+-#define SIGN_MAG_LOW_ADDR_BITS(VAL, N)					\
+-      (((VAL) & ((1 << (N)) - 1))					\
+-       ? (((VAL) & ((1 << ((N) + 1)) - 1)) ^ (1 << (N))) - (1 << (N))	\
+-       : 0)
+-
+-      if (coproc_p)
+-	{
+-	  low = SIGN_MAG_LOW_ADDR_BITS (val, 10);
+-
+-	  /* NEON quad-word load/stores are made of two double-word accesses,
+-	     so the valid index range is reduced by 8. Treat as 9-bit range if
+-	     we go over it.  */
+-	  if (TARGET_NEON && VALID_NEON_QREG_MODE (mode) && low >= 1016)
+-	    low = SIGN_MAG_LOW_ADDR_BITS (val, 9);
+-	}
+-      else if (GET_MODE_SIZE (mode) == 8)
+-	{
+-	  if (TARGET_LDRD)
+-	    low = (TARGET_THUMB2
+-		   ? SIGN_MAG_LOW_ADDR_BITS (val, 10)
+-		   : SIGN_MAG_LOW_ADDR_BITS (val, 8));
+-	  else
+-	    /* For pre-ARMv5TE (without ldrd), we use ldm/stm(db/da/ib)
+-	       to access doublewords. The supported load/store offsets are
+-	       -8, -4, and 4, which we try to produce here.  */
+-	    low = ((val & 0xf) ^ 0x8) - 0x8;
+-	}
+-      else if (GET_MODE_SIZE (mode) < 8)
+-	{
+-	  /* NEON element load/stores do not have an offset.  */
+-	  if (TARGET_NEON_FP16 && mode == HFmode)
+-	    return false;
+-
+-	  if (TARGET_THUMB2)
+-	    {
+-	      /* Thumb-2 has an asymmetrical index range of (-256,4096).
+-		 Try the wider 12-bit range first, and re-try if the result
+-		 is out of range.  */
+-	      low = SIGN_MAG_LOW_ADDR_BITS (val, 12);
+-	      if (low < -255)
+-		low = SIGN_MAG_LOW_ADDR_BITS (val, 8);
+-	    }
+-	  else
+-	    {
+-	      if (mode == HImode || mode == HFmode)
+-		{
+-		  if (arm_arch4)
+-		    low = SIGN_MAG_LOW_ADDR_BITS (val, 8);
+-		  else
+-		    {
+-		      /* The storehi/movhi_bytes fallbacks can use only
+-			 [-4094,+4094] of the full ldrb/strb index range.  */
+-		      low = SIGN_MAG_LOW_ADDR_BITS (val, 12);
+-		      if (low == 4095 || low == -4095)
+-			return false;
+-		    }
+-		}
+-	      else
+-		low = SIGN_MAG_LOW_ADDR_BITS (val, 12);
+-	    }
+-	}
+-      else
+-	return false;
+-
+-      high = ((((val - low) & (unsigned HOST_WIDE_INT) 0xffffffff)
+-	       ^ (unsigned HOST_WIDE_INT) 0x80000000)
+-	      - (unsigned HOST_WIDE_INT) 0x80000000);
+-      /* Check for overflow or zero */
+-      if (low == 0 || high == 0 || (high + low != val))
+-	return false;
+-
+-      /* Reload the high part into a base reg; leave the low part
+-	 in the mem.
+-	 Note that replacing this gen_rtx_PLUS with plus_constant is
+-	 wrong in this case because we rely on the
+-	 (plus (plus reg c1) c2) structure being preserved so that
+-	 XEXP (*p, 0) in push_reload below uses the correct term.  */
+-      *p = gen_rtx_PLUS (GET_MODE (*p),
+-			 gen_rtx_PLUS (GET_MODE (*p), XEXP (*p, 0),
+-				       GEN_INT (high)),
+-			 GEN_INT (low));
+-      push_reload (XEXP (*p, 0), NULL_RTX, &XEXP (*p, 0), NULL,
+-		   MODE_BASE_REG_CLASS (mode), GET_MODE (*p),
+-		   VOIDmode, 0, 0, opnum, (enum reload_type) type);
+-      return true;
+-    }
+-
+-  return false;
+-}
+-
+-rtx
+-thumb_legitimize_reload_address (rtx *x_p,
+-				 machine_mode mode,
+-				 int opnum, int type,
+-				 int ind_levels ATTRIBUTE_UNUSED)
+-{
+-  rtx x = *x_p;
+-
+-  if (GET_CODE (x) == PLUS
+-      && GET_MODE_SIZE (mode) < 4
+-      && REG_P (XEXP (x, 0))
+-      && XEXP (x, 0) == stack_pointer_rtx
+-      && CONST_INT_P (XEXP (x, 1))
+-      && !thumb_legitimate_offset_p (mode, INTVAL (XEXP (x, 1))))
+-    {
+-      rtx orig_x = x;
+-
+-      x = copy_rtx (x);
+-      push_reload (orig_x, NULL_RTX, x_p, NULL, MODE_BASE_REG_CLASS (mode),
+-		   Pmode, VOIDmode, 0, 0, opnum, (enum reload_type) type);
+-      return x;
+-    }
+-
+-  /* If both registers are hi-regs, then it's better to reload the
+-     entire expression rather than each register individually.  That
+-     only requires one reload register rather than two.  */
+-  if (GET_CODE (x) == PLUS
+-      && REG_P (XEXP (x, 0))
+-      && REG_P (XEXP (x, 1))
+-      && !REG_MODE_OK_FOR_REG_BASE_P (XEXP (x, 0), mode)
+-      && !REG_MODE_OK_FOR_REG_BASE_P (XEXP (x, 1), mode))
+-    {
+-      rtx orig_x = x;
+-
+-      x = copy_rtx (x);
+-      push_reload (orig_x, NULL_RTX, x_p, NULL, MODE_BASE_REG_CLASS (mode),
+-		   Pmode, VOIDmode, 0, 0, opnum, (enum reload_type) type);
+-      return x;
+-    }
+-
+-  return NULL;
+-}
+-
+ /* Return TRUE if X contains any TLS symbol references.  */
+ 
+ bool
+@@ -9399,7 +9401,8 @@ static bool
+ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost)
+ {
+   const struct cpu_cost_table *extra_cost = current_tune->insn_extra_cost;
+-  gcc_assert (GET_CODE (x) == UNSPEC);
++  rtx_code code = GET_CODE (x);
++  gcc_assert (code == UNSPEC || code == UNSPEC_VOLATILE);
+ 
+   switch (XINT (x, 1))
+     {
+@@ -9436,7 +9439,6 @@ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost)
+     case UNSPEC_VRINTR:
+     case UNSPEC_VRINTX:
+     case UNSPEC_VRINTA:
+-      *cost = COSTS_N_INSNS (1);
+       if (speed_p)
+         *cost += extra_cost->fp[GET_MODE (x) == DFmode].roundint;
+ 
+@@ -9445,7 +9447,7 @@ arm_unspec_cost (rtx x, enum rtx_code /* outer_code */, bool speed_p, int *cost)
+       *cost = COSTS_N_INSNS (2);
+       break;
+     }
+-  return false;
++  return true;
+ }
+ 
+ /* Cost of a libcall.  We assume one insn per argument, an amount for the
+@@ -9496,6 +9498,8 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ {
+   machine_mode mode = GET_MODE (x);
+ 
++  *cost = COSTS_N_INSNS (1);
++
+   if (TARGET_THUMB1)
+     {
+       if (speed_p)
+@@ -9596,8 +9600,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       bool is_ldm = load_multiple_operation (x, SImode);
+       bool is_stm = store_multiple_operation (x, SImode);
+ 
+-      *cost = COSTS_N_INSNS (1);
+-
+       if (is_ldm || is_stm)
+         {
+ 	  if (speed_p)
+@@ -9624,15 +9626,33 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case UDIV:
+       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+ 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
+-	*cost = COSTS_N_INSNS (speed_p
+-			       ? extra_cost->fp[mode != SFmode].div : 1);
++	*cost += COSTS_N_INSNS (speed_p
++			       ? extra_cost->fp[mode != SFmode].div : 0);
+       else if (mode == SImode && TARGET_IDIV)
+-	*cost = COSTS_N_INSNS (speed_p ? extra_cost->mult[0].idiv : 1);
++	*cost += COSTS_N_INSNS (speed_p ? extra_cost->mult[0].idiv : 0);
+       else
+ 	*cost = LIBCALL_COST (2);
+       return false;	/* All arguments must be in registers.  */
+ 
+     case MOD:
++      /* MOD by a power of 2 can be expanded as:
++	 rsbs    r1, r0, #0
++	 and     r0, r0, #(n - 1)
++	 and     r1, r1, #(n - 1)
++	 rsbpl   r0, r1, #0.  */
++      if (CONST_INT_P (XEXP (x, 1))
++	  && exact_log2 (INTVAL (XEXP (x, 1))) > 0
++	  && mode == SImode)
++	{
++	  *cost += COSTS_N_INSNS (3);
++
++	  if (speed_p)
++	    *cost += 2 * extra_cost->alu.logical
++		     + extra_cost->alu.arith;
++	  return true;
++	}
++
++    /* Fall-through.  */
+     case UMOD:
+       *cost = LIBCALL_COST (2);
+       return false;	/* All arguments must be in registers.  */
+@@ -9640,7 +9660,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case ROTATE:
+       if (mode == SImode && REG_P (XEXP (x, 1)))
+ 	{
+-	  *cost = (COSTS_N_INSNS (2)
++	  *cost += (COSTS_N_INSNS (1)
+ 		   + rtx_cost (XEXP (x, 0), code, 0, speed_p));
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.shift_reg;
+@@ -9653,7 +9673,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case ASHIFTRT:
+       if (mode == DImode && CONST_INT_P (XEXP (x, 1)))
+ 	{
+-	  *cost = (COSTS_N_INSNS (3)
++	  *cost += (COSTS_N_INSNS (2)
+ 		   + rtx_cost (XEXP (x, 0), code, 0, speed_p));
+ 	  if (speed_p)
+ 	    *cost += 2 * extra_cost->alu.shift;
+@@ -9661,8 +9681,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	}
+       else if (mode == SImode)
+ 	{
+-	  *cost = (COSTS_N_INSNS (1)
+-		   + rtx_cost (XEXP (x, 0), code, 0, speed_p));
++	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	  /* Slightly disparage register shifts at -Os, but not by much.  */
+ 	  if (!CONST_INT_P (XEXP (x, 1)))
+ 	    *cost += (speed_p ? extra_cost->alu.shift_reg : 1
+@@ -9674,8 +9693,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  if (code == ASHIFT)
+ 	    {
+-	      *cost = (COSTS_N_INSNS (1)
+-		       + rtx_cost (XEXP (x, 0), code, 0, speed_p));
++	      *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	      /* Slightly disparage register shifts at -Os, but not by
+ 	         much.  */
+ 	      if (!CONST_INT_P (XEXP (x, 1)))
+@@ -9687,14 +9705,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	      if (arm_arch_thumb2 && CONST_INT_P (XEXP (x, 1)))
+ 		{
+ 		  /* Can use SBFX/UBFX.  */
+-		  *cost = COSTS_N_INSNS (1);
+ 		  if (speed_p)
+ 		    *cost += extra_cost->alu.bfx;
+ 		  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 		}
+ 	      else
+ 		{
+-		  *cost = COSTS_N_INSNS (2);
++		  *cost += COSTS_N_INSNS (1);
+ 		  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 		  if (speed_p)
+ 		    {
+@@ -9711,7 +9728,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	    }
+ 	  else /* Rotates.  */
+ 	    {
+-	      *cost = COSTS_N_INSNS (3 + !CONST_INT_P (XEXP (x, 1)));
++	      *cost = COSTS_N_INSNS (2 + !CONST_INT_P (XEXP (x, 1)));
+ 	      *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	      if (speed_p)
+ 		{
+@@ -9735,7 +9752,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+         {
+           if (mode == SImode)
+             {
+-              *cost = COSTS_N_INSNS (1);
+               if (speed_p)
+                 *cost += extra_cost->alu.rev;
+ 
+@@ -9748,7 +9764,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+            and thumb_legacy_rev for the form of RTL used then.  */
+           if (TARGET_THUMB)
+             {
+-              *cost = COSTS_N_INSNS (10);
++              *cost += COSTS_N_INSNS (9);
+ 
+               if (speed_p)
+                 {
+@@ -9758,7 +9774,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+             }
+           else
+             {
+-              *cost = COSTS_N_INSNS (5);
++              *cost += COSTS_N_INSNS (4);
+ 
+               if (speed_p)
+                 {
+@@ -9775,7 +9791,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+ 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (GET_CODE (XEXP (x, 0)) == MULT
+ 	      || GET_CODE (XEXP (x, 1)) == MULT)
+ 	    {
+@@ -9820,8 +9835,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  rtx shift_op;
+ 	  rtx non_shift_op;
+ 
+-	  *cost = COSTS_N_INSNS (1);
+-
+ 	  shift_op = shifter_op_p (XEXP (x, 0), &shift_by_reg);
+ 	  if (shift_op == NULL)
+ 	    {
+@@ -9889,7 +9902,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  HANDLE_NARROW_SHIFT_ARITH (MINUS, 1)
+ 
+ 	  /* Slightly disparage, as we might need to widen the result.  */
+-	  *cost = 1 + COSTS_N_INSNS (1);
++	  *cost += 1;
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.arith;
+ 
+@@ -9904,7 +9917,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+       if (mode == DImode)
+ 	{
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 
+ 	  if (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND)
+ 	    {
+@@ -9958,7 +9971,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+ 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (GET_CODE (XEXP (x, 0)) == MULT)
+ 	    {
+ 	      rtx mul_op0, mul_op1, add_op;
+@@ -10015,7 +10027,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+ 	  /* Slightly penalize a narrow operation as the result may
+ 	     need widening.  */
+-	  *cost = 1 + COSTS_N_INSNS (1);
++	  *cost += 1;
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.arith;
+ 
+@@ -10026,7 +10038,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  rtx shift_op, shift_reg;
+ 
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (TARGET_INT_SIMD
+ 	      && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
+ 		  || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND))
+@@ -10061,8 +10072,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	    {
+ 	      rtx mul_op = XEXP (x, 0);
+ 
+-	      *cost = COSTS_N_INSNS (1);
+-
+ 	      if (TARGET_DSP_MULTIPLY
+ 		  && ((GET_CODE (XEXP (mul_op, 0)) == SIGN_EXTEND
+ 		       && (GET_CODE (XEXP (mul_op, 1)) == SIGN_EXTEND
+@@ -10122,7 +10131,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		  || (GET_CODE (XEXP (XEXP (x, 0), 0)) == SIGN_EXTEND
+ 		      && GET_CODE (XEXP (XEXP (x, 0), 1)) == SIGN_EXTEND)))
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->mult[1].extend_add;
+ 	      *cost += (rtx_cost (XEXP (XEXP (XEXP (x, 0), 0), 0),
+@@ -10133,7 +10141,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	      return true;
+ 	    }
+ 
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 
+ 	  if (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
+ 	      || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
+@@ -10161,7 +10169,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case IOR:
+       if (mode == SImode && arm_arch6 && aarch_rev16_p (x))
+         {
+-          *cost = COSTS_N_INSNS (1);
+           if (speed_p)
+             *cost += extra_cost->alu.rev;
+ 
+@@ -10175,8 +10182,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  rtx op0 = XEXP (x, 0);
+ 	  rtx shift_op, shift_reg;
+ 
+-	  *cost = COSTS_N_INSNS (1);
+-
+ 	  if (subcode == NOT
+ 	      && (code == AND
+ 		  || (code == IOR && TARGET_THUMB2)))
+@@ -10225,7 +10230,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  rtx op0 = XEXP (x, 0);
+ 	  enum rtx_code subcode = GET_CODE (op0);
+ 
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 
+ 	  if (subcode == NOT
+ 	      && (code == AND
+@@ -10267,8 +10272,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  rtx op0 = XEXP (x, 0);
+ 
+-	  *cost = COSTS_N_INSNS (1);
+-
+ 	  if (GET_CODE (op0) == NEG && !flag_rounding_math)
+ 	    op0 = XEXP (op0, 0);
+ 
+@@ -10287,7 +10290,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+       if (mode == SImode)
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (TARGET_DSP_MULTIPLY
+ 	      && ((GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
+ 		   && (GET_CODE (XEXP (x, 1)) == SIGN_EXTEND
+@@ -10325,7 +10327,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		  || (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
+ 		      && GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)))
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->mult[1].extend;
+ 	      *cost += (rtx_cost (XEXP (XEXP (x, 0), 0),
+@@ -10354,7 +10355,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	      return true;
+ 	    }
+ 
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->fp[mode != SFmode].neg;
+ 
+@@ -10370,7 +10370,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  if (GET_CODE (XEXP (x, 0)) == ABS)
+ 	    {
+-	      *cost = COSTS_N_INSNS (2);
++	      *cost += COSTS_N_INSNS (1);
+ 	      /* Assume the non-flag-changing variant.  */
+ 	      if (speed_p)
+ 		*cost += (extra_cost->alu.log_shift
+@@ -10382,7 +10382,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  if (GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == RTX_COMPARE
+ 	      || GET_RTX_CLASS (GET_CODE (XEXP (x, 0))) == RTX_COMM_COMPARE)
+ 	    {
+-	      *cost = COSTS_N_INSNS (2);
++	      *cost += COSTS_N_INSNS (1);
+ 	      /* No extra cost for MOV imm and MVN imm.  */
+ 	      /* If the comparison op is using the flags, there's no further
+ 		 cost, otherwise we need to add the cost of the comparison.  */
+@@ -10400,7 +10400,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		}
+ 	      return true;
+ 	    }
+-	  *cost = COSTS_N_INSNS (1);
++
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.arith;
+ 	  return false;
+@@ -10410,7 +10410,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  && GET_MODE_SIZE (mode) < 4)
+ 	{
+ 	  /* Slightly disparage, as we might need an extend operation.  */
+-	  *cost = 1 + COSTS_N_INSNS (1);
++	  *cost += 1;
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.arith;
+ 	  return false;
+@@ -10418,7 +10418,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+       if (mode == DImode)
+ 	{
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += 2 * extra_cost->alu.arith;
+ 	  return false;
+@@ -10434,7 +10434,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  rtx shift_op;
+ 	  rtx shift_reg = NULL;
+ 
+-	  *cost = COSTS_N_INSNS (1);
+ 	  shift_op = shifter_op_p (XEXP (x, 0), &shift_reg);
+ 
+ 	  if (shift_op)
+@@ -10457,7 +10456,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	}
+       if (mode == DImode)
+ 	{
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 	  return false;
+ 	}
+ 
+@@ -10470,7 +10469,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       {
+         if (GET_CODE (XEXP (x, 1)) == PC || GET_CODE (XEXP (x, 2)) == PC)
+ 	  {
+-	    *cost = COSTS_N_INSNS (4);
++	    *cost += COSTS_N_INSNS (3);
+ 	    return true;
+ 	  }
+ 	int op1cost = rtx_cost (XEXP (x, 1), SET, 1, speed_p);
+@@ -10513,7 +10512,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  if (TARGET_HARD_FLOAT && GET_MODE_CLASS (op0mode) == MODE_FLOAT
+ 	      && (op0mode == SFmode || !TARGET_VFP_SINGLE))
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->fp[op0mode != SFmode].compare;
+ 
+@@ -10534,7 +10532,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  /* DImode compares normally take two insns.  */
+ 	  if (op0mode == DImode)
+ 	    {
+-	      *cost = COSTS_N_INSNS (2);
++	      *cost += COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += 2 * extra_cost->alu.arith;
+ 	      return false;
+@@ -10572,7 +10570,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	      shift_op = shifter_op_p (XEXP (x, 0), &shift_reg);
+ 	      if (shift_op != NULL)
+ 		{
+-		  *cost = COSTS_N_INSNS (1);
+ 		  if (shift_reg != NULL)
+ 		    {
+ 		      *cost += rtx_cost (shift_reg, ASHIFT, 1, speed_p);
+@@ -10586,7 +10583,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		  return true;
+ 		}
+ 
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->alu.arith;
+ 	      if (CONST_INT_P (XEXP (x, 1))
+@@ -10630,7 +10626,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	      && XEXP (x, 1) == const0_rtx)
+ 	    {
+ 	      /* Thumb also needs an IT insn.  */
+-	      *cost = COSTS_N_INSNS (TARGET_THUMB ? 3 : 2);
++	      *cost += COSTS_N_INSNS (TARGET_THUMB ? 2 : 1);
+ 	      return true;
+ 	    }
+ 	  if (XEXP (x, 1) == const0_rtx)
+@@ -10639,7 +10635,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		{
+ 		case LT:
+ 		  /* LSR Rd, Rn, #31.  */
+-		  *cost = COSTS_N_INSNS (1);
+ 		  if (speed_p)
+ 		    *cost += extra_cost->alu.shift;
+ 		  break;
+@@ -10651,13 +10646,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		case NE:
+ 		  /* SUBS T1, Rn, #1
+ 		     SBC  Rd, Rn, T1.  */
+-		  *cost = COSTS_N_INSNS (2);
++		  *cost += COSTS_N_INSNS (1);
+ 		  break;
+ 
+ 		case LE:
+ 		  /* RSBS T1, Rn, Rn, LSR #31
+ 		     ADC  Rd, Rn, T1. */
+-		  *cost = COSTS_N_INSNS (2);
++		  *cost += COSTS_N_INSNS (1);
+ 		  if (speed_p)
+ 		    *cost += extra_cost->alu.arith_shift;
+ 		  break;
+@@ -10665,7 +10660,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		case GT:
+ 		  /* RSB  Rd, Rn, Rn, ASR #1
+ 		     LSR  Rd, Rd, #31.  */
+-		  *cost = COSTS_N_INSNS (2);
++		  *cost += COSTS_N_INSNS (1);
+ 		  if (speed_p)
+ 		    *cost += (extra_cost->alu.arith_shift
+ 			      + extra_cost->alu.shift);
+@@ -10674,7 +10669,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		case GE:
+ 		  /* ASR  Rd, Rn, #31
+ 		     ADD  Rd, Rn, #1.  */
+-		  *cost = COSTS_N_INSNS (2);
++		  *cost += COSTS_N_INSNS (1);
+ 		  if (speed_p)
+ 		    *cost += extra_cost->alu.shift;
+ 		  break;
+@@ -10690,7 +10685,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	    }
+ 	  else
+ 	    {
+-	      *cost = COSTS_N_INSNS (TARGET_THUMB ? 4 : 3);
++	      *cost += COSTS_N_INSNS (TARGET_THUMB ? 3 : 2);
+ 	      if (CONST_INT_P (XEXP (x, 1))
+ 		  && const_ok_for_op (INTVAL (XEXP (x, 1)), COMPARE))
+ 		{
+@@ -10718,7 +10713,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
+ 	  && (mode == SFmode || !TARGET_VFP_SINGLE))
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->fp[mode != SFmode].neg;
+ 
+@@ -10732,7 +10726,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+       if (mode == SImode)
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.log_shift + extra_cost->alu.arith_shift;
+ 	  return false;
+@@ -10768,7 +10761,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       if (GET_MODE (XEXP (x, 0)) != SImode && arm_arch6)
+ 	{
+ 	  /* We have SXTB/SXTH.  */
+-	  *cost = COSTS_N_INSNS (1);
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.extend;
+@@ -10776,7 +10768,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       else if (GET_MODE (XEXP (x, 0)) != SImode)
+ 	{
+ 	  /* Needs two shifts.  */
+-	  *cost = COSTS_N_INSNS (2);
++	  *cost += COSTS_N_INSNS (1);
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	  if (speed_p)
+ 	    *cost += 2 * extra_cost->alu.shift;
+@@ -10814,14 +10806,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	     optimizing for speed it should never be slower to use
+ 	     AND, and we don't really model 16-bit vs 32-bit insns
+ 	     here.  */
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.logical;
+ 	}
+       else if (GET_MODE (XEXP (x, 0)) != SImode && arm_arch6)
+ 	{
+ 	  /* We have UXTB/UXTH.  */
+-	  *cost = COSTS_N_INSNS (1);
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.extend;
+@@ -10837,8 +10827,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  if (speed_p)
+ 	    *cost += 2 * extra_cost->alu.shift;
+ 	}
+-      else  /* GET_MODE (XEXP (x, 0)) == SImode.  */
+-        *cost = COSTS_N_INSNS (1);
+ 
+       /* Widening beyond 32-bits requires one more insn.  */
+       if (mode == DImode)
+@@ -10896,12 +10884,12 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       if (speed_p)
+ 	{
+ 	  if (arm_arch_thumb2 && !flag_pic)
+-	    *cost = COSTS_N_INSNS (2);
++	    *cost += COSTS_N_INSNS (1);
+ 	  else
+-	    *cost = COSTS_N_INSNS (1) + extra_cost->ldst.load;
++	    *cost += extra_cost->ldst.load;
+ 	}
+       else
+-	*cost = COSTS_N_INSNS (2);
++	*cost += COSTS_N_INSNS (1);
+ 
+       if (flag_pic)
+ 	{
+@@ -10923,7 +10911,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  if (vfp3_const_double_rtx (x))
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->fp[mode == DFmode].fpconst;
+ 	      return true;
+@@ -10931,14 +10918,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+ 	  if (speed_p)
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (mode == DFmode)
+ 		*cost += extra_cost->ldst.loadd;
+ 	      else
+ 		*cost += extra_cost->ldst.loadf;
+ 	    }
+ 	  else
+-	    *cost = COSTS_N_INSNS (2 + (mode == DFmode));
++	    *cost += COSTS_N_INSNS (1 + (mode == DFmode));
+ 
+ 	  return true;
+ 	}
+@@ -10958,7 +10944,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 
+     case HIGH:
+     case LO_SUM:
+-      *cost = COSTS_N_INSNS (1);
+       /* When optimizing for size, we prefer constant pool entries to
+ 	 MOVW/MOVT pairs, so bump the cost of these slightly.  */
+       if (!speed_p)
+@@ -10966,7 +10951,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       return true;
+ 
+     case CLZ:
+-      *cost = COSTS_N_INSNS (1);
+       if (speed_p)
+ 	*cost += extra_cost->alu.clz;
+       return false;
+@@ -10974,7 +10958,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case SMIN:
+       if (XEXP (x, 1) == const0_rtx)
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.log_shift;
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+@@ -10984,7 +10967,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case SMAX:
+     case UMIN:
+     case UMAX:
+-      *cost = COSTS_N_INSNS (2);
++      *cost += COSTS_N_INSNS (1);
+       return false;
+ 
+     case TRUNCATE:
+@@ -10998,7 +10981,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 		  && (GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1))
+ 		      == ZERO_EXTEND))))
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->mult[1].extend;
+ 	  *cost += (rtx_cost (XEXP (XEXP (XEXP (x, 0), 0), 0), ZERO_EXTEND, 0,
+@@ -11010,6 +10992,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       *cost = LIBCALL_COST (1);
+       return false;
+ 
++    case UNSPEC_VOLATILE:
+     case UNSPEC:
+       return arm_unspec_cost (x, outer_code, speed_p, cost);
+ 
+@@ -11028,14 +11011,13 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  && CONST_INT_P (XEXP (x, 1))
+ 	  && CONST_INT_P (XEXP (x, 2)))
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->alu.bfx;
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+ 	  return true;
+ 	}
+       /* Without UBFX/SBFX, need to resort to shift operations.  */
+-      *cost = COSTS_N_INSNS (2);
++      *cost += COSTS_N_INSNS (1);
+       if (speed_p)
+ 	*cost += 2 * extra_cost->alu.shift;
+       *cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed_p);
+@@ -11044,7 +11026,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case FLOAT_EXTEND:
+       if (TARGET_HARD_FLOAT)
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->fp[mode == DFmode].widen;
+ 	  if (!TARGET_FPU_ARMV8
+@@ -11066,7 +11047,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+     case FLOAT_TRUNCATE:
+       if (TARGET_HARD_FLOAT)
+ 	{
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->fp[mode == DFmode].narrow;
+ 	  *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p);
+@@ -11083,7 +11063,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+           rtx op1 = XEXP (x, 1);
+           rtx op2 = XEXP (x, 2);
+ 
+-          *cost = COSTS_N_INSNS (1);
+ 
+           /* vfms or vfnma.  */
+           if (GET_CODE (op0) == NEG)
+@@ -11112,7 +11091,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  if (GET_MODE_CLASS (mode) == MODE_INT)
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->fp[GET_MODE (XEXP (x, 0)) == DFmode].toint;
+ 	      /* Strip of the 'cost' of rounding towards zero.  */
+@@ -11127,7 +11105,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	  else if (GET_MODE_CLASS (mode) == MODE_FLOAT
+ 		   && TARGET_FPU_ARMV8)
+ 	    {
+-	      *cost = COSTS_N_INSNS (1);
+ 	      if (speed_p)
+ 		*cost += extra_cost->fp[mode == DFmode].roundint;
+ 	      return false;
+@@ -11143,7 +11120,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+ 	{
+ 	  /* ??? Increase the cost to deal with transferring from CORE
+ 	     -> FP registers?  */
+-	  *cost = COSTS_N_INSNS (1);
+ 	  if (speed_p)
+ 	    *cost += extra_cost->fp[mode == DFmode].fromint;
+ 	  return false;
+@@ -11152,7 +11128,6 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
+       return false;
+ 
+     case CALL:
+-      *cost = COSTS_N_INSNS (1);
+       return true;
+ 
+     case ASM_OPERANDS:
+@@ -11664,9 +11639,7 @@ cortex_a9_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost
+ 		       case. However this gets modeled as an true
+ 		       dependency and hence all these checks.  */
+ 		    if (REG_P (SET_DEST (PATTERN (insn)))
+-			&& REG_P (SET_DEST (PATTERN (dep)))
+-			&& reg_overlap_mentioned_p (SET_DEST (PATTERN (insn)),
+-						    SET_DEST (PATTERN (dep))))
++			&& reg_set_p (SET_DEST (PATTERN (insn)), dep))
+ 		      {
+ 			/* FMACS is a special case where the dependent
+ 			   instruction can be issued 3 cycles before
+@@ -12358,18 +12331,16 @@ neon_valid_immediate (rtx op, machine_mode mode, int inverse,
+   bool vector = GET_CODE (op) == CONST_VECTOR;
+ 
+   if (vector)
+-    {
+-      n_elts = CONST_VECTOR_NUNITS (op);
+-      innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
+-    }
++    n_elts = CONST_VECTOR_NUNITS (op);
+   else
+     {
+       n_elts = 1;
+       if (mode == VOIDmode)
+ 	mode = DImode;
+-      innersize = GET_MODE_SIZE (mode);
+     }
+ 
++  innersize = GET_MODE_UNIT_SIZE (mode);
++
+   /* Vectors of float constants.  */
+   if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+     {
+@@ -12409,32 +12380,15 @@ neon_valid_immediate (rtx op, machine_mode mode, int inverse,
+     {
+       rtx el = vector ? CONST_VECTOR_ELT (op, i) : op;
+       unsigned HOST_WIDE_INT elpart;
+-      unsigned int part, parts;
+ 
+-      if (CONST_INT_P (el))
+-        {
+-          elpart = INTVAL (el);
+-          parts = 1;
+-        }
+-      else if (CONST_DOUBLE_P (el))
+-        {
+-          elpart = CONST_DOUBLE_LOW (el);
+-          parts = 2;
+-        }
+-      else
+-        gcc_unreachable ();
++      gcc_assert (CONST_INT_P (el));
++      elpart = INTVAL (el);
+ 
+-      for (part = 0; part < parts; part++)
+-        {
+-          unsigned int byte;
+-          for (byte = 0; byte < innersize; byte++)
+-            {
+-              bytes[idx++] = (elpart & 0xff) ^ invmask;
+-              elpart >>= BITS_PER_UNIT;
+-            }
+-          if (CONST_DOUBLE_P (el))
+-            elpart = CONST_DOUBLE_HIGH (el);
+-        }
++      for (unsigned int byte = 0; byte < innersize; byte++)
++	{
++	  bytes[idx++] = (elpart & 0xff) ^ invmask;
++	  elpart >>= BITS_PER_UNIT;
++	}
+     }
+ 
+   /* Sanity check.  */
+@@ -12595,7 +12549,7 @@ neon_immediate_valid_for_shift (rtx op, machine_mode mode,
+ 				rtx *modconst, int *elementwidth,
+ 				bool isleftshift)
+ {
+-  unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
++  unsigned int innersize = GET_MODE_UNIT_SIZE (mode);
+   unsigned int n_elts = CONST_VECTOR_NUNITS (op), i;
+   unsigned HOST_WIDE_INT last_elt = 0;
+   unsigned HOST_WIDE_INT maxshift;
+@@ -12702,8 +12656,7 @@ void
+ neon_pairwise_reduce (rtx op0, rtx op1, machine_mode mode,
+ 		      rtx (*reduc) (rtx, rtx, rtx))
+ {
+-  machine_mode inner = GET_MODE_INNER (mode);
+-  unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (inner);
++  unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_UNIT_SIZE (mode);
+   rtx tmpsum = op1;
+ 
+   for (i = parts / 2; i >= 1; i /= 2)
+@@ -12910,12 +12863,12 @@ neon_expand_vector_init (rtx target, rtx vals)
+ }
+ 
+ /* Ensure OPERAND lies between LOW (inclusive) and HIGH (exclusive).  Raise
+-   ERR if it doesn't.  FIXME: NEON bounds checks occur late in compilation, so
+-   reported source locations are bogus.  */
++   ERR if it doesn't.  EXP indicates the source location, which includes the
++   inlining history for intrinsics.  */
+ 
+ static void
+ bounds_check (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+-	      const char *err)
++	      const_tree exp, const char *desc)
+ {
+   HOST_WIDE_INT lane;
+ 
+@@ -12924,15 +12877,22 @@ bounds_check (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+   lane = INTVAL (operand);
+ 
+   if (lane < low || lane >= high)
+-    error (err);
++    {
++      if (exp)
++	error ("%K%s %wd out of range %wd - %wd",
++	       exp, desc, lane, low, high - 1);
++      else
++	error ("%s %wd out of range %wd - %wd", desc, lane, low, high - 1);
++    }
+ }
+ 
+ /* Bounds-check lanes.  */
+ 
+ void
+-neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
++neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
++		  const_tree exp)
+ {
+-  bounds_check (operand, low, high, "lane out of range");
++  bounds_check (operand, low, high, exp, "lane");
+ }
+ 
+ /* Bounds-check constants.  */
+@@ -12940,16 +12900,13 @@ neon_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
+ void
+ neon_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
+ {
+-  bounds_check (operand, low, high, "constant out of range");
++  bounds_check (operand, low, high, NULL_TREE, "constant");
+ }
+ 
+ HOST_WIDE_INT
+ neon_element_bits (machine_mode mode)
+ {
+-  if (mode == DImode)
+-    return GET_MODE_BITSIZE (mode);
+-  else
+-    return GET_MODE_BITSIZE (GET_MODE_INNER (mode));
++  return GET_MODE_UNIT_BITSIZE (mode);
+ }
+ 
+ 
+@@ -13038,14 +12995,14 @@ neon_vector_mem_operand (rtx op, int type, bool strict)
+   rtx ind;
+ 
+   /* Reject eliminable registers.  */
+-  if (! (reload_in_progress || reload_completed)
+-      && (   reg_mentioned_p (frame_pointer_rtx, op)
++  if (strict && ! (reload_in_progress || reload_completed)
++      && (reg_mentioned_p (frame_pointer_rtx, op)
+ 	  || reg_mentioned_p (arg_pointer_rtx, op)
+ 	  || reg_mentioned_p (virtual_incoming_args_rtx, op)
+ 	  || reg_mentioned_p (virtual_outgoing_args_rtx, op)
+ 	  || reg_mentioned_p (virtual_stack_dynamic_rtx, op)
+ 	  || reg_mentioned_p (virtual_stack_vars_rtx, op)))
+-    return !strict;
++    return FALSE;
+ 
+   /* Constants are converted into offsets from labels.  */
+   if (!MEM_P (op))
+@@ -13276,7 +13233,11 @@ tls_mentioned_p (rtx x)
+     }
+ }
+ 
+-/* Must not copy any rtx that uses a pc-relative address.  */
++/* Must not copy any rtx that uses a pc-relative address.
++   Also, disallow copying of load-exclusive instructions that
++   may appear after splitting of compare-and-swap-style operations
++   so as to prevent those loops from being transformed away from their
++   canonical forms (see PR 69904).  */
+ 
+ static bool
+ arm_cannot_copy_insn_p (rtx_insn *insn)
+@@ -13295,6 +13256,20 @@ arm_cannot_copy_insn_p (rtx_insn *insn)
+ 	      || XINT (x, 1) == UNSPEC_PIC_UNIFIED))
+ 	return true;
+     }
++
++  rtx set = single_set (insn);
++  if (set)
++    {
++      rtx src = SET_SRC (set);
++      if (GET_CODE (src) == ZERO_EXTEND)
++	src = XEXP (src, 0);
++
++      /* Catch the load-exclusive and load-acquire operations.  */
++      if (GET_CODE (src) == UNSPEC_VOLATILE
++	  && (XINT (src, 1) == VUNSPEC_LL
++	      || XINT (src, 1) == VUNSPEC_LAX))
++	return true;
++    }
+   return false;
+ }
+ 
+@@ -14527,7 +14502,10 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
+ 				srcoffset + j * UNITS_PER_WORD - src_autoinc);
+ 	  mem = adjust_automodify_address (srcbase, SImode, addr,
+ 					   srcoffset + j * UNITS_PER_WORD);
+-	  emit_insn (gen_unaligned_loadsi (regs[j], mem));
++	  if (src_aligned)
++	    emit_move_insn (regs[j], mem);
++	  else
++	    emit_insn (gen_unaligned_loadsi (regs[j], mem));
+ 	}
+       srcoffset += words * UNITS_PER_WORD;
+     }
+@@ -14546,7 +14524,10 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
+ 				dstoffset + j * UNITS_PER_WORD - dst_autoinc);
+ 	  mem = adjust_automodify_address (dstbase, SImode, addr,
+ 					   dstoffset + j * UNITS_PER_WORD);
+-	  emit_insn (gen_unaligned_storesi (mem, regs[j]));
++	  if (dst_aligned)
++	    emit_move_insn (mem, regs[j]);
++	  else
++	    emit_insn (gen_unaligned_storesi (mem, regs[j]));
+ 	}
+       dstoffset += words * UNITS_PER_WORD;
+     }
+@@ -14951,21 +14932,41 @@ gen_movmem_ldrd_strd (rtx *operands)
+   if (!(dst_aligned || src_aligned))
+     return arm_gen_movmemqi (operands);
+ 
+-  src = adjust_address (src, DImode, 0);
+-  dst = adjust_address (dst, DImode, 0);
++  /* If the either src or dst is unaligned we'll be accessing it as pairs
++     of unaligned SImode accesses.  Otherwise we can generate DImode
++     ldrd/strd instructions.  */
++  src = adjust_address (src, src_aligned ? DImode : SImode, 0);
++  dst = adjust_address (dst, dst_aligned ? DImode : SImode, 0);
++
+   while (len >= 8)
+     {
+       len -= 8;
+       reg0 = gen_reg_rtx (DImode);
++      rtx low_reg = NULL_RTX;
++      rtx hi_reg = NULL_RTX;
++
++      if (!src_aligned || !dst_aligned)
++	{
++	  low_reg = gen_lowpart (SImode, reg0);
++	  hi_reg = gen_highpart_mode (SImode, DImode, reg0);
++	}
+       if (src_aligned)
+         emit_move_insn (reg0, src);
+       else
+-        emit_insn (gen_unaligned_loaddi (reg0, src));
++	{
++	  emit_insn (gen_unaligned_loadsi (low_reg, src));
++	  src = next_consecutive_mem (src);
++	  emit_insn (gen_unaligned_loadsi (hi_reg, src));
++	}
+ 
+       if (dst_aligned)
+         emit_move_insn (dst, reg0);
+       else
+-        emit_insn (gen_unaligned_storedi (dst, reg0));
++	{
++	  emit_insn (gen_unaligned_storesi (dst, low_reg));
++	  dst = next_consecutive_mem (dst);
++	  emit_insn (gen_unaligned_storesi (dst, hi_reg));
++	}
+ 
+       src = next_consecutive_mem (src);
+       dst = next_consecutive_mem (dst);
+@@ -15438,6 +15439,17 @@ arm_reload_in_hi (rtx *operands)
+       else
+ 	/* The slot is out of range, or was dressed up in a SUBREG.  */
+ 	base = reg_equiv_address (REGNO (ref));
++
++      /* PR 62554: If there is no equivalent memory location then just move
++	 the value as an SImode register move.  This happens when the target
++	 architecture variant does not have an HImode register move.  */
++      if (base == NULL)
++	{
++	  gcc_assert (REG_P (operands[0]));
++	  emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, operands[0], 0),
++				gen_rtx_SUBREG (SImode, ref, 0)));
++	  return;
++	}
+     }
+   else
+     base = find_replacement (&XEXP (ref, 0));
+@@ -15555,6 +15567,30 @@ arm_reload_out_hi (rtx *operands)
+       else
+ 	/* The slot is out of range, or was dressed up in a SUBREG.  */
+ 	base = reg_equiv_address (REGNO (ref));
++
++      /* PR 62254: If there is no equivalent memory location then just move
++	 the value as an SImode register move.  This happens when the target
++	 architecture variant does not have an HImode register move.  */
++      if (base == NULL)
++	{
++	  gcc_assert (REG_P (outval) || SUBREG_P (outval));
++
++	  if (REG_P (outval))
++	    {
++	      emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, ref, 0),
++				    gen_rtx_SUBREG (SImode, outval, 0)));
++	    }
++	  else /* SUBREG_P (outval)  */
++	    {
++	      if (GET_MODE (SUBREG_REG (outval)) == SImode)
++		emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, ref, 0),
++				      SUBREG_REG (outval)));
++	      else
++		/* FIXME: Handle other cases ?  */
++		gcc_unreachable ();
++	    }
++	  return;
++	}
+     }
+   else
+     base = find_replacement (&XEXP (ref, 0));
+@@ -17294,14 +17330,16 @@ thumb2_reorg (void)
+ 
+   FOR_EACH_BB_FN (bb, cfun)
+     {
+-      if (current_tune->disparage_flag_setting_t16_encodings
++      if ((current_tune->disparage_flag_setting_t16_encodings
++	   == tune_params::DISPARAGE_FLAGS_ALL)
+ 	  && optimize_bb_for_speed_p (bb))
+ 	continue;
+ 
+       rtx_insn *insn;
+       Convert_Action action = SKIP;
+       Convert_Action action_for_partial_flag_setting
+-	= (current_tune->disparage_partial_flag_setting_t16_encodings
++	= ((current_tune->disparage_flag_setting_t16_encodings
++	    != tune_params::DISPARAGE_FLAGS_NEITHER)
+ 	   && optimize_bb_for_speed_p (bb))
+ 	  ? SKIP : CONV;
+ 
+@@ -17706,10 +17744,8 @@ arm_output_multireg_pop (rtx *operands, bool return_pc, rtx cond, bool reverse,
+     }
+ 
+   conditional = reverse ? "%?%D0" : "%?%d0";
+-  if ((regno_base == SP_REGNUM) && TARGET_UNIFIED_ASM)
++  if ((regno_base == SP_REGNUM) && update)
+     {
+-      /* Output pop (not stmfd) because it has a shorter encoding.  */
+-      gcc_assert (update);
+       sprintf (pattern, "pop%s\t{", conditional);
+     }
+   else
+@@ -17717,11 +17753,14 @@ arm_output_multireg_pop (rtx *operands, bool return_pc, rtx cond, bool reverse,
+       /* Output ldmfd when the base register is SP, otherwise output ldmia.
+          It's just a convention, their semantics are identical.  */
+       if (regno_base == SP_REGNUM)
+-        sprintf (pattern, "ldm%sfd\t", conditional);
+-      else if (TARGET_UNIFIED_ASM)
+-        sprintf (pattern, "ldmia%s\t", conditional);
++	  /* update is never true here, hence there is no need to handle
++	     pop here.  */
++	sprintf (pattern, "ldmfd%s", conditional);
++
++      if (update)
++	sprintf (pattern, "ldmia%s\t", conditional);
+       else
+-        sprintf (pattern, "ldm%sia\t", conditional);
++	sprintf (pattern, "ldm%s\t", conditional);
+ 
+       strcat (pattern, reg_names[regno_base]);
+       if (update)
+@@ -17933,41 +17972,6 @@ output_call (rtx *operands)
+   return "";
+ }
+ 
+-/* Output a 'call' insn that is a reference in memory. This is
+-   disabled for ARMv5 and we prefer a blx instead because otherwise
+-   there's a significant performance overhead.  */
+-const char *
+-output_call_mem (rtx *operands)
+-{
+-  gcc_assert (!arm_arch5);
+-  if (TARGET_INTERWORK)
+-    {
+-      output_asm_insn ("ldr%?\t%|ip, %0", operands);
+-      output_asm_insn ("mov%?\t%|lr, %|pc", operands);
+-      output_asm_insn ("bx%?\t%|ip", operands);
+-    }
+-  else if (regno_use_in (LR_REGNUM, operands[0]))
+-    {
+-      /* LR is used in the memory address.  We load the address in the
+-	 first instruction.  It's safe to use IP as the target of the
+-	 load since the call will kill it anyway.  */
+-      output_asm_insn ("ldr%?\t%|ip, %0", operands);
+-      output_asm_insn ("mov%?\t%|lr, %|pc", operands);
+-      if (arm_arch4t)
+-	output_asm_insn ("bx%?\t%|ip", operands);
+-      else
+-	output_asm_insn ("mov%?\t%|pc, %|ip", operands);
+-    }
+-  else
+-    {
+-      output_asm_insn ("mov%?\t%|lr, %|pc", operands);
+-      output_asm_insn ("ldr%?\t%|pc, %0", operands);
+-    }
+-
+-  return "";
+-}
+-
+-
+ /* Output a move from arm registers to arm registers of a long double
+    OPERANDS[0] is the destination.
+    OPERANDS[1] is the source.  */
+@@ -18005,19 +18009,27 @@ output_mov_long_double_arm_from_arm (rtx *operands)
+ void
+ arm_emit_movpair (rtx dest, rtx src)
+  {
++  rtx insn;
++
+   /* If the src is an immediate, simplify it.  */
+   if (CONST_INT_P (src))
+     {
+       HOST_WIDE_INT val = INTVAL (src);
+       emit_set_insn (dest, GEN_INT (val & 0x0000ffff));
+       if ((val >> 16) & 0x0000ffff)
+-        emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
+-                                             GEN_INT (16)),
+-                       GEN_INT ((val >> 16) & 0x0000ffff));
++	{
++	  emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
++					       GEN_INT (16)),
++			 GEN_INT ((val >> 16) & 0x0000ffff));
++	  insn = get_last_insn ();
++	  set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
++	}
+       return;
+     }
+    emit_set_insn (dest, gen_rtx_HIGH (SImode, src));
+    emit_set_insn (dest, gen_rtx_LO_SUM (SImode, dest, src));
++   insn = get_last_insn ();
++   set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
+  }
+ 
+ /* Output a move between double words.  It must be REG<-MEM
+@@ -18057,25 +18069,25 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	    {
+ 	      if (TARGET_LDRD
+ 		  && !(fix_cm3_ldrd && reg0 == REGNO(XEXP (operands[1], 0))))
+-		output_asm_insn ("ldr%(d%)\t%0, [%m1]", operands);
++		output_asm_insn ("ldrd%?\t%0, [%m1]", operands);
+ 	      else
+-		output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
++		output_asm_insn ("ldmia%?\t%m1, %M0", operands);
+ 	    }
+ 	  break;
+ 
+ 	case PRE_INC:
+ 	  gcc_assert (TARGET_LDRD);
+ 	  if (emit)
+-	    output_asm_insn ("ldr%(d%)\t%0, [%m1, #8]!", operands);
++	    output_asm_insn ("ldrd%?\t%0, [%m1, #8]!", operands);
+ 	  break;
+ 
+ 	case PRE_DEC:
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("ldr%(d%)\t%0, [%m1, #-8]!", operands);
++		output_asm_insn ("ldrd%?\t%0, [%m1, #-8]!", operands);
+ 	      else
+-		output_asm_insn ("ldm%(db%)\t%m1!, %M0", operands);
++		output_asm_insn ("ldmdb%?\t%m1!, %M0", operands);
+ 	    }
+ 	  break;
+ 
+@@ -18083,16 +18095,16 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("ldr%(d%)\t%0, [%m1], #8", operands);
++		output_asm_insn ("ldrd%?\t%0, [%m1], #8", operands);
+ 	      else
+-		output_asm_insn ("ldm%(ia%)\t%m1!, %M0", operands);
++		output_asm_insn ("ldmia%?\t%m1!, %M0", operands);
+ 	    }
+ 	  break;
+ 
+ 	case POST_DEC:
+ 	  gcc_assert (TARGET_LDRD);
+ 	  if (emit)
+-	    output_asm_insn ("ldr%(d%)\t%0, [%m1], #-8", operands);
++	    output_asm_insn ("ldrd%?\t%0, [%m1], #-8", operands);
+ 	  break;
+ 
+ 	case PRE_MODIFY:
+@@ -18113,7 +18125,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 		  if (emit)
+ 		    {
+ 		      output_asm_insn ("add%?\t%1, %1, %2", otherops);
+-		      output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
++		      output_asm_insn ("ldrd%?\t%0, [%1] @split", otherops);
+ 		    }
+ 		  if (count)
+ 		    *count = 2;
+@@ -18129,7 +18141,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 			  && INTVAL (otherops[2]) < 256))
+ 		    {
+ 		      if (emit)
+-			output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
++			output_asm_insn ("ldrd%?\t%0, [%1, %2]!", otherops);
+ 		    }
+ 		  else
+ 		    {
+@@ -18155,7 +18167,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 		      && INTVAL (otherops[2]) < 256))
+ 		{
+ 		  if (emit)
+-		    output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
++		    output_asm_insn ("ldrd%?\t%0, [%1], %2", otherops);
+ 		}
+ 	      else
+ 		{
+@@ -18184,9 +18196,9 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
++		output_asm_insn ("ldrd%?\t%0, [%1]", operands);
+ 	      else
+-		output_asm_insn ("ldm%(ia%)\t%1, %M0", operands);
++		output_asm_insn ("ldmia%?\t%1, %M0", operands);
+ 	    }
+ 
+ 	  if (count)
+@@ -18210,19 +18222,19 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 			{
+ 			case -8:
+ 			  if (emit)
+-			    output_asm_insn ("ldm%(db%)\t%1, %M0", otherops);
++			    output_asm_insn ("ldmdb%?\t%1, %M0", otherops);
+ 			  return "";
+ 			case -4:
+ 			  if (TARGET_THUMB2)
+ 			    break;
+ 			  if (emit)
+-			    output_asm_insn ("ldm%(da%)\t%1, %M0", otherops);
++			    output_asm_insn ("ldmda%?\t%1, %M0", otherops);
+ 			  return "";
+ 			case 4:
+ 			  if (TARGET_THUMB2)
+ 			    break;
+ 			  if (emit)
+-			    output_asm_insn ("ldm%(ib%)\t%1, %M0", otherops);
++			    output_asm_insn ("ldmib%?\t%1, %M0", otherops);
+ 			  return "";
+ 			}
+ 		    }
+@@ -18250,7 +18262,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 			  if (emit)
+ 			    {
+ 			      output_asm_insn ("add%?\t%0, %1, %2", otherops);
+-			      output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
++			      output_asm_insn ("ldrd%?\t%0, [%1]", operands);
+ 			    }
+ 			  if (count)
+ 			    *count = 2;
+@@ -18259,7 +18271,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 			{
+ 			  otherops[0] = operands[0];
+ 			  if (emit)
+-			    output_asm_insn ("ldr%(d%)\t%0, [%1, %2]", otherops);
++			    output_asm_insn ("ldrd%?\t%0, [%1, %2]", otherops);
+ 			}
+ 		      return "";
+ 		    }
+@@ -18290,9 +18302,9 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 		*count = 2;
+ 
+ 	      if (TARGET_LDRD)
+-		return "ldr%(d%)\t%0, [%1]";
++		return "ldrd%?\t%0, [%1]";
+ 
+-	      return "ldm%(ia%)\t%1, %M0";
++	      return "ldmia%?\t%1, %M0";
+ 	    }
+ 	  else
+ 	    {
+@@ -18335,25 +18347,25 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("str%(d%)\t%1, [%m0]", operands);
++		output_asm_insn ("strd%?\t%1, [%m0]", operands);
+ 	      else
+-		output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
++		output_asm_insn ("stm%?\t%m0, %M1", operands);
+ 	    }
+ 	  break;
+ 
+         case PRE_INC:
+ 	  gcc_assert (TARGET_LDRD);
+ 	  if (emit)
+-	    output_asm_insn ("str%(d%)\t%1, [%m0, #8]!", operands);
++	    output_asm_insn ("strd%?\t%1, [%m0, #8]!", operands);
+ 	  break;
+ 
+         case PRE_DEC:
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("str%(d%)\t%1, [%m0, #-8]!", operands);
++		output_asm_insn ("strd%?\t%1, [%m0, #-8]!", operands);
+ 	      else
+-		output_asm_insn ("stm%(db%)\t%m0!, %M1", operands);
++		output_asm_insn ("stmdb%?\t%m0!, %M1", operands);
+ 	    }
+ 	  break;
+ 
+@@ -18361,16 +18373,16 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	  if (emit)
+ 	    {
+ 	      if (TARGET_LDRD)
+-		output_asm_insn ("str%(d%)\t%1, [%m0], #8", operands);
++		output_asm_insn ("strd%?\t%1, [%m0], #8", operands);
+ 	      else
+-		output_asm_insn ("stm%(ia%)\t%m0!, %M1", operands);
++		output_asm_insn ("stm%?\t%m0!, %M1", operands);
+ 	    }
+ 	  break;
+ 
+         case POST_DEC:
+ 	  gcc_assert (TARGET_LDRD);
+ 	  if (emit)
+-	    output_asm_insn ("str%(d%)\t%1, [%m0], #-8", operands);
++	    output_asm_insn ("strd%?\t%1, [%m0], #-8", operands);
+ 	  break;
+ 
+ 	case PRE_MODIFY:
+@@ -18410,12 +18422,12 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
+ 	    {
+ 	      if (emit)
+-		output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
++		output_asm_insn ("strd%?\t%0, [%1, %2]!", otherops);
+ 	    }
+ 	  else
+ 	    {
+ 	      if (emit)
+-		output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
++		output_asm_insn ("strd%?\t%0, [%1], %2", otherops);
+ 	    }
+ 	  break;
+ 
+@@ -18427,21 +18439,21 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 		{
+ 		case -8:
+ 		  if (emit)
+-		    output_asm_insn ("stm%(db%)\t%m0, %M1", operands);
++		    output_asm_insn ("stmdb%?\t%m0, %M1", operands);
+ 		  return "";
+ 
+ 		case -4:
+ 		  if (TARGET_THUMB2)
+ 		    break;
+ 		  if (emit)
+-		    output_asm_insn ("stm%(da%)\t%m0, %M1", operands);
++		    output_asm_insn ("stmda%?\t%m0, %M1", operands);
+ 		  return "";
+ 
+ 		case 4:
+ 		  if (TARGET_THUMB2)
+ 		    break;
+ 		  if (emit)
+-		    output_asm_insn ("stm%(ib%)\t%m0, %M1", operands);
++		    output_asm_insn ("stmib%?\t%m0, %M1", operands);
+ 		  return "";
+ 		}
+ 	    }
+@@ -18455,7 +18467,7 @@ output_move_double (rtx *operands, bool emit, int *count)
+ 	      otherops[0] = operands[1];
+ 	      otherops[1] = XEXP (XEXP (operands[0], 0), 0);
+ 	      if (emit)
+-		output_asm_insn ("str%(d%)\t%0, [%1, %2]", otherops);
++		output_asm_insn ("strd%?\t%0, [%1, %2]", otherops);
+ 	      return "";
+ 	    }
+ 	  /* Fall through */
+@@ -18491,13 +18503,13 @@ output_move_quad (rtx *operands)
+           switch (GET_CODE (XEXP (operands[1], 0)))
+             {
+             case REG:
+-              output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
++              output_asm_insn ("ldmia%?\t%m1, %M0", operands);
+               break;
+ 
+             case LABEL_REF:
+             case CONST:
+               output_asm_insn ("adr%?\t%0, %1", operands);
+-              output_asm_insn ("ldm%(ia%)\t%0, %M0", operands);
++              output_asm_insn ("ldmia%?\t%0, %M0", operands);
+               break;
+ 
+             default:
+@@ -18541,7 +18553,7 @@ output_move_quad (rtx *operands)
+       switch (GET_CODE (XEXP (operands[0], 0)))
+         {
+         case REG:
+-          output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
++          output_asm_insn ("stm%?\t%m0, %M1", operands);
+           break;
+ 
+         default:
+@@ -19574,10 +19586,7 @@ output_return_instruction (rtx operand, bool really_return, bool reverse,
+ 	      gcc_assert (stack_adjust == 0 || stack_adjust == 4);
+ 
+ 	      if (stack_adjust && arm_arch5 && TARGET_ARM)
+-		if (TARGET_UNIFIED_ASM)
+ 		  sprintf (instr, "ldmib%s\t%%|sp, {", conditional);
+-		else
+-		  sprintf (instr, "ldm%sib\t%%|sp, {", conditional);
+ 	      else
+ 		{
+ 		  /* If we can't use ldmib (SA110 bug),
+@@ -19585,17 +19594,11 @@ output_return_instruction (rtx operand, bool really_return, bool reverse,
+ 		  if (stack_adjust)
+ 		    live_regs_mask |= 1 << 3;
+ 
+-		  if (TARGET_UNIFIED_ASM)
+-		    sprintf (instr, "ldmfd%s\t%%|sp, {", conditional);
+-		  else
+-		    sprintf (instr, "ldm%sfd\t%%|sp, {", conditional);
++		  sprintf (instr, "ldmfd%s\t%%|sp, {", conditional);
+ 		}
+ 	    }
+ 	  else
+-	    if (TARGET_UNIFIED_ASM)
+ 	      sprintf (instr, "pop%s\t{", conditional);
+-	    else
+-	      sprintf (instr, "ldm%sfd\t%%|sp!, {", conditional);
+ 
+ 	  p = instr + strlen (instr);
+ 
+@@ -19653,6 +19656,7 @@ output_return_instruction (rtx operand, bool really_return, bool reverse,
+ 	  break;
+ 
+ 	case ARM_FT_INTERWORKED:
++	  gcc_assert (arm_arch5 || arm_arch4t);
+ 	  sprintf (instr, "bx%s\t%%|lr", conditional);
+ 	  break;
+ 
+@@ -21628,37 +21632,17 @@ arm_print_operand (FILE *stream, rtx x, int code)
+       arm_print_condition (stream);
+       return;
+ 
+-    case '(':
+-      /* Nothing in unified syntax, otherwise the current condition code.  */
+-      if (!TARGET_UNIFIED_ASM)
+-	arm_print_condition (stream);
+-      break;
+-
+-    case ')':
+-      /* The current condition code in unified syntax, otherwise nothing.  */
+-      if (TARGET_UNIFIED_ASM)
+-	arm_print_condition (stream);
+-      break;
+-
+     case '.':
+       /* The current condition code for a condition code setting instruction.
+ 	 Preceded by 's' in unified syntax, otherwise followed by 's'.  */
+-      if (TARGET_UNIFIED_ASM)
+-	{
+-	  fputc('s', stream);
+-	  arm_print_condition (stream);
+-	}
+-      else
+-	{
+-	  arm_print_condition (stream);
+-	  fputc('s', stream);
+-	}
++      fputc('s', stream);
++      arm_print_condition (stream);
+       return;
+ 
+     case '!':
+       /* If the instruction is conditionally executed then print
+ 	 the current condition code, otherwise print 's'.  */
+-      gcc_assert (TARGET_THUMB2 && TARGET_UNIFIED_ASM);
++      gcc_assert (TARGET_THUMB2);
+       if (current_insn_predicate)
+ 	arm_print_condition (stream);
+       else
+@@ -22457,7 +22441,7 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
+       gcc_assert (GET_CODE (x) == CONST_VECTOR);
+ 
+       units = CONST_VECTOR_NUNITS (x);
+-      size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++      size = GET_MODE_UNIT_SIZE (mode);
+ 
+       if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+         for (i = 0; i < units; i++)
+@@ -23427,13 +23411,6 @@ arm_scalar_mode_supported_p (machine_mode mode)
+     return default_scalar_mode_supported_p (mode);
+ }
+ 
+-/* Emit code to reinterpret one Neon type as another, without altering bits.  */
+-void
+-neon_reinterpret (rtx dest, rtx src)
+-{
+-  emit_move_insn (dest, gen_lowpart (GET_MODE (dest), src));
+-}
+-
+ /* Set up OPERANDS for a register copy from SRC to DEST, taking care
+    not to early-clobber SRC registers in the process.
+ 
+@@ -24088,19 +24065,19 @@ thumb_far_jump_used_p (void)
+ }
+ 
+ /* Return nonzero if FUNC must be entered in ARM mode.  */
+-int
++static bool
+ is_called_in_ARM_mode (tree func)
+ {
+   gcc_assert (TREE_CODE (func) == FUNCTION_DECL);
+ 
+   /* Ignore the problem about functions whose address is taken.  */
+   if (TARGET_CALLEE_INTERWORKING && TREE_PUBLIC (func))
+-    return TRUE;
++    return true;
+ 
+ #ifdef ARM_PE
+   return lookup_attribute ("interfacearm", DECL_ATTRIBUTES (func)) != NULL_TREE;
+ #else
+-  return FALSE;
++  return false;
+ #endif
+ }
+ 
+@@ -24386,6 +24363,24 @@ arm_init_expanders (void)
+     mark_reg_pointer (arg_pointer_rtx, PARM_BOUNDARY);
+ }
+ 
++/* Check that FUNC is called with a different mode.  */
++
++bool
++arm_change_mode_p (tree func)
++{
++  if (TREE_CODE (func) != FUNCTION_DECL)
++    return false;
++
++  tree callee_tree = DECL_FUNCTION_SPECIFIC_TARGET (func);
++
++  if (!callee_tree)
++    callee_tree = target_option_default_node;
++
++  struct cl_target_option *callee_opts = TREE_TARGET_OPTION (callee_tree);
++  int flags = callee_opts->x_target_flags;
++
++  return (TARGET_THUMB_P (flags) != TARGET_THUMB);
++}
+ 
+ /* Like arm_compute_initial_elimination offset.  Simpler because there
+    isn't an ABI specified frame pointer for Thumb.  Instead, we set it
+@@ -25675,12 +25670,12 @@ arm_print_tune_info (void)
+ 	       current_tune->constant_limit);
+   asm_fprintf (asm_out_file, "\t\t@max_insns_skipped:\t%d\n",
+ 	       current_tune->max_insns_skipped);
+-  asm_fprintf (asm_out_file, "\t\t@num_prefetch_slots:\t%d\n",
+-	       current_tune->num_prefetch_slots);
+-  asm_fprintf (asm_out_file, "\t\t@l1_cache_size:\t%d\n",
+-	       current_tune->l1_cache_size);
+-  asm_fprintf (asm_out_file, "\t\t@l1_cache_line_size:\t%d\n",
+-	       current_tune->l1_cache_line_size);
++  asm_fprintf (asm_out_file, "\t\t@prefetch.num_slots:\t%d\n",
++	       current_tune->prefetch.num_slots);
++  asm_fprintf (asm_out_file, "\t\t@prefetch.l1_cache_size:\t%d\n",
++	       current_tune->prefetch.l1_cache_size);
++  asm_fprintf (asm_out_file, "\t\t@prefetch.l1_cache_line_size:\t%d\n",
++	       current_tune->prefetch.l1_cache_line_size);
+   asm_fprintf (asm_out_file, "\t\t@prefer_constant_pool:\t%d\n",
+ 	       (int) current_tune->prefer_constant_pool);
+   asm_fprintf (asm_out_file, "\t\t@branch_cost:\t(s:speed, p:predictable)\n");
+@@ -25696,23 +25691,19 @@ arm_print_tune_info (void)
+   asm_fprintf (asm_out_file, "\t\t@prefer_ldrd_strd:\t%d\n",
+ 	       (int) current_tune->prefer_ldrd_strd);
+   asm_fprintf (asm_out_file, "\t\t@logical_op_non_short_circuit:\t[%d,%d]\n",
+-	       (int) current_tune->logical_op_non_short_circuit[0],
+-	       (int) current_tune->logical_op_non_short_circuit[1]);
++	       (int) current_tune->logical_op_non_short_circuit_thumb,
++	       (int) current_tune->logical_op_non_short_circuit_arm);
+   asm_fprintf (asm_out_file, "\t\t@prefer_neon_for_64bits:\t%d\n",
+ 	       (int) current_tune->prefer_neon_for_64bits);
+   asm_fprintf (asm_out_file,
+ 	       "\t\t@disparage_flag_setting_t16_encodings:\t%d\n",
+ 	       (int) current_tune->disparage_flag_setting_t16_encodings);
+-  asm_fprintf (asm_out_file,
+-	       "\t\t@disparage_partial_flag_setting_t16_encodings:\t%d\n",
+-	       (int) current_tune
+-	               ->disparage_partial_flag_setting_t16_encodings);
+   asm_fprintf (asm_out_file, "\t\t@string_ops_prefer_neon:\t%d\n",
+ 	       (int) current_tune->string_ops_prefer_neon);
+   asm_fprintf (asm_out_file, "\t\t@max_insns_inline_memset:\t%d\n",
+ 	       current_tune->max_insns_inline_memset);
+-  asm_fprintf (asm_out_file, "\t\t@fuseable_ops:\t%u\n",
+-	       current_tune->fuseable_ops);
++  asm_fprintf (asm_out_file, "\t\t@fusible_ops:\t%u\n",
++	       current_tune->fusible_ops);
+   asm_fprintf (asm_out_file, "\t\t@sched_autopref:\t%d\n",
+ 	       (int) current_tune->sched_autopref);
+ }
+@@ -25722,9 +25713,6 @@ arm_file_start (void)
+ {
+   int val;
+ 
+-  if (TARGET_UNIFIED_ASM)
+-    asm_fprintf (asm_out_file, "\t.syntax unified\n");
+-
+   if (TARGET_BPABI)
+     {
+       const char *fpu_name;
+@@ -26391,7 +26379,8 @@ arm_vector_mode_supported_p (machine_mode mode)
+ {
+   /* Neon also supports V2SImode, etc. listed in the clause below.  */
+   if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode
+-      || mode == V4HFmode || mode == V16QImode || mode == V4SFmode || mode == V2DImode))
++      || mode == V4HFmode || mode == V16QImode || mode == V4SFmode
++      || mode == V2DImode || mode == V8HFmode))
+     return true;
+ 
+   if ((TARGET_NEON || TARGET_IWMMXT)
+@@ -26524,7 +26513,7 @@ arm_dbx_register_number (unsigned int regno)
+   if (IS_IWMMXT_REGNUM (regno))
+     return 112 + regno - FIRST_IWMMXT_REGNUM;
+ 
+-  gcc_unreachable ();
++  return DWARF_FRAME_REGISTERS;
+ }
+ 
+ /* Dwarf models VFPv3 registers as 32 64-bit registers.
+@@ -27064,20 +27053,16 @@ arm_output_shift(rtx * operands, int set_flags)
+   char c;
+ 
+   c = flag_chars[set_flags];
+-  if (TARGET_UNIFIED_ASM)
++  shift = shift_op(operands[3], &val);
++  if (shift)
+     {
+-      shift = shift_op(operands[3], &val);
+-      if (shift)
+-	{
+-	  if (val != -1)
+-	    operands[2] = GEN_INT(val);
+-	  sprintf (pattern, "%s%%%c\t%%0, %%1, %%2", shift, c);
+-	}
+-      else
+-	sprintf (pattern, "mov%%%c\t%%0, %%1", c);
++      if (val != -1)
++	operands[2] = GEN_INT(val);
++      sprintf (pattern, "%s%%%c\t%%0, %%1, %%2", shift, c);
+     }
+   else
+-    sprintf (pattern, "mov%%%c\t%%0, %%1%%S3", c);
++    sprintf (pattern, "mov%%%c\t%%0, %%1", c);
++
+   output_asm_insn (pattern, operands);
+   return "";
+ }
+@@ -27228,40 +27213,12 @@ thumb2_output_casesi (rtx *operands)
+     }
+ }
+ 
+-/* Most ARM cores are single issue, but some newer ones can dual issue.
+-   The scheduler descriptions rely on this being correct.  */
++/* Implement TARGET_SCHED_ISSUE_RATE.  Lookup the issue rate in the
++   per-core tuning structs.  */
+ static int
+ arm_issue_rate (void)
+ {
+-  switch (arm_tune)
+-    {
+-    case xgene1:
+-      return 4;
+-
+-    case cortexa15:
+-    case cortexa57:
+-    case exynosm1:
+-      return 3;
+-
+-    case cortexm7:
+-    case cortexr4:
+-    case cortexr4f:
+-    case cortexr5:
+-    case genericv7a:
+-    case cortexa5:
+-    case cortexa7:
+-    case cortexa8:
+-    case cortexa9:
+-    case cortexa12:
+-    case cortexa17:
+-    case cortexa53:
+-    case fa726te:
+-    case marvell_pj4:
+-      return 2;
+-
+-    default:
+-      return 1;
+-    }
++  return current_tune->issue_rate;
+ }
+ 
+ /* Return how many instructions should scheduler lookahead to choose the
+@@ -29448,7 +29405,7 @@ arm_gen_setmem (rtx *operands)
+ static bool
+ arm_macro_fusion_p (void)
+ {
+-  return current_tune->fuseable_ops != ARM_FUSE_NOTHING;
++  return current_tune->fusible_ops != tune_params::FUSE_NOTHING;
+ }
+ 
+ 
+@@ -29469,44 +29426,48 @@ aarch_macro_fusion_pair_p (rtx_insn* prev, rtx_insn* curr)
+   if (!arm_macro_fusion_p ())
+     return false;
+ 
+-  if (current_tune->fuseable_ops & ARM_FUSE_MOVW_MOVT)
++  if (current_tune->fusible_ops & tune_params::FUSE_AES_AESMC
++      && aarch_crypto_can_dual_issue (prev, curr))
++    return true;
++
++  if (current_tune->fusible_ops & tune_params::FUSE_MOVW_MOVT)
+     {
+       /* We are trying to fuse
+-         movw imm / movt imm
+-         instructions as a group that gets scheduled together.  */
++	 movw imm / movt imm
++	 instructions as a group that gets scheduled together.  */
+ 
+       set_dest = SET_DEST (curr_set);
+ 
+       if (GET_MODE (set_dest) != SImode)
+-        return false;
++	return false;
+ 
+       /* We are trying to match:
+-         prev (movw)  == (set (reg r0) (const_int imm16))
+-         curr (movt) == (set (zero_extract (reg r0)
+-                                           (const_int 16)
+-                                           (const_int 16))
+-                             (const_int imm16_1))
+-         or
+-         prev (movw) == (set (reg r1)
+-                              (high (symbol_ref ("SYM"))))
+-         curr (movt) == (set (reg r0)
+-                             (lo_sum (reg r1)
+-                                     (symbol_ref ("SYM"))))  */
++	 prev (movw)  == (set (reg r0) (const_int imm16))
++	 curr (movt) == (set (zero_extract (reg r0)
++					  (const_int 16)
++					   (const_int 16))
++			     (const_int imm16_1))
++	 or
++	 prev (movw) == (set (reg r1)
++			      (high (symbol_ref ("SYM"))))
++	 curr (movt) == (set (reg r0)
++			     (lo_sum (reg r1)
++				     (symbol_ref ("SYM"))))  */
+       if (GET_CODE (set_dest) == ZERO_EXTRACT)
+-        {
+-          if (CONST_INT_P (SET_SRC (curr_set))
+-              && CONST_INT_P (SET_SRC (prev_set))
+-              && REG_P (XEXP (set_dest, 0))
+-              && REG_P (SET_DEST (prev_set))
+-              && REGNO (XEXP (set_dest, 0)) == REGNO (SET_DEST (prev_set)))
+-            return true;
+-        }
++	{
++	  if (CONST_INT_P (SET_SRC (curr_set))
++	      && CONST_INT_P (SET_SRC (prev_set))
++	      && REG_P (XEXP (set_dest, 0))
++	      && REG_P (SET_DEST (prev_set))
++	      && REGNO (XEXP (set_dest, 0)) == REGNO (SET_DEST (prev_set)))
++	    return true;
++	}
+       else if (GET_CODE (SET_SRC (curr_set)) == LO_SUM
+-               && REG_P (SET_DEST (curr_set))
+-               && REG_P (SET_DEST (prev_set))
+-               && GET_CODE (SET_SRC (prev_set)) == HIGH
+-               && REGNO (SET_DEST (curr_set)) == REGNO (SET_DEST (prev_set)))
+-             return true;
++	       && REG_P (SET_DEST (curr_set))
++	       && REG_P (SET_DEST (prev_set))
++	       && GET_CODE (SET_SRC (prev_set)) == HIGH
++	       && REGNO (SET_DEST (curr_set)) == REGNO (SET_DEST (prev_set)))
++	     return true;
+     }
+   return false;
+ }
+@@ -29570,6 +29531,273 @@ arm_is_constant_pool_ref (rtx x)
+ 	  && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
+ }
+ 
++/* Remember the last target of arm_set_current_function.  */
++static GTY(()) tree arm_previous_fndecl;
++
++/* Invalidate arm_previous_fndecl.  */
++void
++arm_reset_previous_fndecl (void)
++{
++  arm_previous_fndecl = NULL_TREE;
++}
++
++/* Establish appropriate back-end context for processing the function
++   FNDECL.  The argument might be NULL to indicate processing at top
++   level, outside of any function scope.  */
++static void
++arm_set_current_function (tree fndecl)
++{
++  if (!fndecl || fndecl == arm_previous_fndecl)
++    return;
++
++  tree old_tree = (arm_previous_fndecl
++		   ? DECL_FUNCTION_SPECIFIC_TARGET (arm_previous_fndecl)
++		   : NULL_TREE);
++
++  tree new_tree = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
++
++  arm_previous_fndecl = fndecl;
++  if (old_tree == new_tree)
++    return;
++
++  if (new_tree && new_tree != target_option_default_node)
++    {
++      cl_target_option_restore (&global_options,
++				TREE_TARGET_OPTION (new_tree));
++
++      if (TREE_TARGET_GLOBALS (new_tree))
++	restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
++      else
++	TREE_TARGET_GLOBALS (new_tree)
++	  = save_target_globals_default_opts ();
++    }
++
++  else if (old_tree && old_tree != target_option_default_node)
++    {
++      new_tree = target_option_current_node;
++
++      cl_target_option_restore (&global_options,
++				TREE_TARGET_OPTION (new_tree));
++      if (TREE_TARGET_GLOBALS (new_tree))
++	restore_target_globals (TREE_TARGET_GLOBALS (new_tree));
++      else if (new_tree == target_option_default_node)
++	restore_target_globals (&default_target_globals);
++      else
++	TREE_TARGET_GLOBALS (new_tree)
++	  = save_target_globals_default_opts ();
++    }
++
++  arm_option_params_internal ();
++}
++
++/* Implement TARGET_OPTION_PRINT.  */
++
++static void
++arm_option_print (FILE *file, int indent, struct cl_target_option *ptr)
++{
++  int flags = ptr->x_target_flags;
++
++  fprintf (file, "%*sselected arch %s\n", indent, "",
++	   TARGET_THUMB2_P (flags) ? "thumb2" :
++	   TARGET_THUMB_P (flags) ? "thumb1" :
++	   "arm");
++}
++
++/* Hook to determine if one function can safely inline another.  */
++
++static bool
++arm_can_inline_p (tree caller ATTRIBUTE_UNUSED, tree callee ATTRIBUTE_UNUSED)
++{
++  /* Overidde default hook: Always OK to inline between different modes. 
++     Function with mode specific instructions, e.g using asm, must be explicitely 
++     protected with noinline.  */
++  return true;
++}
++
++/* Inner function to process the attribute((target(...))), take an argument and
++   set the current options from the argument.  If we have a list, recursively
++   go over the list.  */
++
++static bool
++arm_valid_target_attribute_rec (tree args, struct gcc_options *opts)
++{
++  if (TREE_CODE (args) == TREE_LIST)
++    {
++      bool ret = true;
++      for (; args; args = TREE_CHAIN (args))
++	if (TREE_VALUE (args)
++	    && !arm_valid_target_attribute_rec (TREE_VALUE (args), opts))
++	  ret = false;
++      return ret;
++    }
++
++  else if (TREE_CODE (args) != STRING_CST)
++    {
++      error ("attribute %<target%> argument not a string");
++      return false;
++    }
++
++  char *argstr = ASTRDUP (TREE_STRING_POINTER (args));
++  while (argstr && *argstr != '\0')
++    {
++      while (ISSPACE (*argstr))
++	argstr++;
++
++      if (!strcmp (argstr, "thumb"))
++	{
++	  opts->x_target_flags |= MASK_THUMB;
++	  arm_option_check_internal (opts);
++	  return true;
++	}
++
++      if (!strcmp (argstr, "arm"))
++	{
++	  opts->x_target_flags &= ~MASK_THUMB;
++	  arm_option_check_internal (opts);
++	  return true;
++	}
++
++      warning (0, "attribute(target(\"%s\")) is unknown", argstr);
++      return false;
++    }
++
++  return false;
++}
++
++/* Return a TARGET_OPTION_NODE tree of the target options listed or NULL.  */
++
++tree
++arm_valid_target_attribute_tree (tree args, struct gcc_options *opts,
++				 struct gcc_options *opts_set)
++{
++  if (!arm_valid_target_attribute_rec (args, opts))
++    return NULL_TREE;
++
++  /* Do any overrides, such as global options arch=xxx.  */
++  arm_option_override_internal (opts, opts_set);
++
++  return build_target_option_node (opts);
++}
++
++static void 
++add_attribute  (const char * mode, tree *attributes)
++{
++  size_t len = strlen (mode);
++  tree value = build_string (len, mode);
++
++  TREE_TYPE (value) = build_array_type (char_type_node,
++					build_index_type (size_int (len)));
++
++  *attributes = tree_cons (get_identifier ("target"),
++			   build_tree_list (NULL_TREE, value),
++			   *attributes);
++}
++
++/* For testing. Insert thumb or arm modes alternatively on functions.  */
++
++static void
++arm_insert_attributes (tree fndecl, tree * attributes)
++{
++  const char *mode;
++
++  if (! TARGET_FLIP_THUMB)
++    return;
++
++  if (TREE_CODE (fndecl) != FUNCTION_DECL || DECL_EXTERNAL(fndecl)
++      || DECL_BUILT_IN (fndecl) || DECL_ARTIFICIAL (fndecl))
++   return;
++
++  /* Nested definitions must inherit mode.  */
++  if (current_function_decl)
++   {
++     mode = TARGET_THUMB ? "thumb" : "arm";      
++     add_attribute (mode, attributes);
++     return;
++   }
++
++  /* If there is already a setting don't change it.  */
++  if (lookup_attribute ("target", *attributes) != NULL)
++    return;
++
++  mode = thumb_flipper ? "thumb" : "arm";
++  add_attribute (mode, attributes);
++
++  thumb_flipper = !thumb_flipper;
++}
++
++/* Hook to validate attribute((target("string"))).  */
++
++static bool
++arm_valid_target_attribute_p (tree fndecl, tree ARG_UNUSED (name),
++			      tree args, int ARG_UNUSED (flags))
++{
++  bool ret = true;
++  struct gcc_options func_options;
++  tree cur_tree, new_optimize;
++  gcc_assert ((fndecl != NULL_TREE) && (args != NULL_TREE));
++
++  /* Get the optimization options of the current function.  */
++  tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
++
++  /* If the function changed the optimization levels as well as setting target
++     options, start with the optimizations specified.  */
++  if (!func_optimize)
++    func_optimize = optimization_default_node;
++
++  /* Init func_options.  */
++  memset (&func_options, 0, sizeof (func_options));
++  init_options_struct (&func_options, NULL);
++  lang_hooks.init_options_struct (&func_options);
++
++  /* Initialize func_options to the defaults.  */
++  cl_optimization_restore (&func_options,
++			   TREE_OPTIMIZATION (func_optimize));
++
++  cl_target_option_restore (&func_options,
++			    TREE_TARGET_OPTION (target_option_default_node));
++
++  /* Set func_options flags with new target mode.  */
++  cur_tree = arm_valid_target_attribute_tree (args, &func_options,
++					      &global_options_set);
++
++  if (cur_tree == NULL_TREE)
++    ret = false;
++
++  new_optimize = build_optimization_node (&func_options);
++
++  DECL_FUNCTION_SPECIFIC_TARGET (fndecl) = cur_tree;
++
++  DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl) = new_optimize;
++
++  finalize_options_struct (&func_options);
++
++  return ret;
++}
++
++void
++arm_declare_function_name (FILE *stream, const char *name, tree decl)
++{
++
++  fprintf (stream, "\t.syntax unified\n");
++
++  if (TARGET_THUMB)
++    {
++      if (is_called_in_ARM_mode (decl)
++	  || (TARGET_THUMB1 && !TARGET_THUMB1_ONLY
++	      && cfun->is_thunk))
++	fprintf (stream, "\t.code 32\n");
++      else if (TARGET_THUMB1)
++	fprintf (stream, "\t.code\t16\n\t.thumb_func\n");
++      else
++	fprintf (stream, "\t.thumb\n\t.thumb_func\n");
++    }
++  else
++    fprintf (stream, "\t.arm\n");
++
++  if (TARGET_POKE_FUNCTION_NAME)
++    arm_poke_function_name (stream, (const char *) name);
++}
++
+ /* If MEM is in the form of [base+offset], extract the two parts
+    of address and set to BASE and OFFSET, otherwise return false
+    after clearing BASE and OFFSET.  */
+@@ -29690,4 +29918,5 @@ arm_sched_fusion_priority (rtx_insn *insn, int max_pri,
+   *pri = tmp;
+   return;
+ }
++
+ #include "gt-arm.h"
+--- a/src/gcc/config/arm/arm.h
++++ b/src/gcc/config/arm/arm.h
+@@ -45,132 +45,7 @@
+ extern char arm_arch_name[];
+ 
+ /* Target CPU builtins.  */
+-#define TARGET_CPU_CPP_BUILTINS()			\
+-  do							\
+-    {							\
+-	if (TARGET_DSP_MULTIPLY)			\
+-	   builtin_define ("__ARM_FEATURE_DSP");	\
+-        if (TARGET_ARM_QBIT)				\
+-           builtin_define ("__ARM_FEATURE_QBIT");	\
+-        if (TARGET_ARM_SAT)				\
+-           builtin_define ("__ARM_FEATURE_SAT");	\
+-        if (TARGET_CRYPTO)				\
+-	   builtin_define ("__ARM_FEATURE_CRYPTO");	\
+-	if (unaligned_access)				\
+-	  builtin_define ("__ARM_FEATURE_UNALIGNED");	\
+-	if (TARGET_CRC32)				\
+-	  builtin_define ("__ARM_FEATURE_CRC32");	\
+-	if (TARGET_32BIT)				\
+-	  builtin_define ("__ARM_32BIT_STATE");		\
+-	if (TARGET_ARM_FEATURE_LDREX)				\
+-	  builtin_define_with_int_value (			\
+-	    "__ARM_FEATURE_LDREX", TARGET_ARM_FEATURE_LDREX);	\
+-	if ((TARGET_ARM_ARCH >= 5 && !TARGET_THUMB)		\
+-	     || TARGET_ARM_ARCH_ISA_THUMB >=2)			\
+-	  builtin_define ("__ARM_FEATURE_CLZ");			\
+-	if (TARGET_INT_SIMD)					\
+-	  builtin_define ("__ARM_FEATURE_SIMD32");		\
+-								\
+-	builtin_define_with_int_value (				\
+-	  "__ARM_SIZEOF_MINIMAL_ENUM",				\
+-	  flag_short_enums ? 1 : 4);				\
+-	builtin_define_type_sizeof ("__ARM_SIZEOF_WCHAR_T",	\
+-				    wchar_type_node);		\
+-	if (TARGET_ARM_ARCH_PROFILE)				\
+-	  builtin_define_with_int_value (			\
+-	    "__ARM_ARCH_PROFILE", TARGET_ARM_ARCH_PROFILE);	\
+-								\
+-	/* Define __arm__ even when in thumb mode, for	\
+-	   consistency with armcc.  */			\
+-	builtin_define ("__arm__");			\
+-	if (TARGET_ARM_ARCH)				\
+-	  builtin_define_with_int_value (		\
+-	    "__ARM_ARCH", TARGET_ARM_ARCH);		\
+-	if (arm_arch_notm)				\
+-	  builtin_define ("__ARM_ARCH_ISA_ARM");	\
+-	builtin_define ("__APCS_32__");			\
+-	if (TARGET_THUMB)				\
+-	  builtin_define ("__thumb__");			\
+-	if (TARGET_THUMB2)				\
+-	  builtin_define ("__thumb2__");		\
+-	if (TARGET_ARM_ARCH_ISA_THUMB)			\
+-	  builtin_define_with_int_value (		\
+-	    "__ARM_ARCH_ISA_THUMB",			\
+-	    TARGET_ARM_ARCH_ISA_THUMB);			\
+-							\
+-	if (TARGET_BIG_END)				\
+-	  {						\
+-	    builtin_define ("__ARMEB__");		\
+-	    builtin_define ("__ARM_BIG_ENDIAN");	\
+-	    if (TARGET_THUMB)				\
+-	      builtin_define ("__THUMBEB__");		\
+-	  }						\
+-        else						\
+-	  {						\
+-	    builtin_define ("__ARMEL__");		\
+-	    if (TARGET_THUMB)				\
+-	      builtin_define ("__THUMBEL__");		\
+-	  }						\
+-							\
+-	if (TARGET_SOFT_FLOAT)				\
+-	  builtin_define ("__SOFTFP__");		\
+-							\
+-	if (TARGET_VFP)					\
+-	  builtin_define ("__VFP_FP__");		\
+-							\
+-	if (TARGET_ARM_FP)				\
+-	  builtin_define_with_int_value (		\
+-	    "__ARM_FP", TARGET_ARM_FP);			\
+-	if (arm_fp16_format == ARM_FP16_FORMAT_IEEE)		\
+-	  builtin_define ("__ARM_FP16_FORMAT_IEEE");		\
+-	if (arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE)	\
+-	  builtin_define ("__ARM_FP16_FORMAT_ALTERNATIVE");	\
+-        if (TARGET_FMA)					\
+-          builtin_define ("__ARM_FEATURE_FMA");		\
+-							\
+-	if (TARGET_NEON)				\
+-	  {						\
+-	    builtin_define ("__ARM_NEON__");		\
+-	    builtin_define ("__ARM_NEON");		\
+-	  }						\
+-	if (TARGET_NEON_FP)				\
+-	  builtin_define_with_int_value (		\
+-	    "__ARM_NEON_FP", TARGET_NEON_FP);		\
+-							\
+-	/* Add a define for interworking.		\
+-	   Needed when building libgcc.a.  */		\
+-	if (arm_cpp_interwork)				\
+-	  builtin_define ("__THUMB_INTERWORK__");	\
+-							\
+-	builtin_assert ("cpu=arm");			\
+-	builtin_assert ("machine=arm");			\
+-							\
+-	builtin_define (arm_arch_name);			\
+-	if (arm_arch_xscale)				\
+-	  builtin_define ("__XSCALE__");		\
+-	if (arm_arch_iwmmxt)				\
+-          {						\
+-	    builtin_define ("__IWMMXT__");		\
+-	    builtin_define ("__ARM_WMMX");		\
+-	  }						\
+-	if (arm_arch_iwmmxt2)				\
+-	  builtin_define ("__IWMMXT2__");		\
+-	if (TARGET_AAPCS_BASED)				\
+-	  {						\
+-	    if (arm_pcs_default == ARM_PCS_AAPCS_VFP)	\
+-	      builtin_define ("__ARM_PCS_VFP");		\
+-	    else if (arm_pcs_default == ARM_PCS_AAPCS)	\
+-	      builtin_define ("__ARM_PCS");		\
+-	    builtin_define ("__ARM_EABI__");		\
+-	  }						\
+-	if (TARGET_IDIV)				\
+-         {						\
+-            builtin_define ("__ARM_ARCH_EXT_IDIV__");	\
+-            builtin_define ("__ARM_FEATURE_IDIV");	\
+-         }						\
+-	if (inline_asm_unified)				\
+-	  builtin_define ("__ARM_ASM_SYNTAX_UNIFIED__");\
+-    } while (0)
++#define TARGET_CPU_CPP_BUILTINS() arm_cpu_cpp_builtins (pfile)
+ 
+ #include "config/arm/arm-opts.h"
+ 
+@@ -252,6 +127,11 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ #define SUBTARGET_CPP_SPEC      ""
+ #endif
+ 
++/* Tree Target Specification.  */
++#define TARGET_ARM_P(flags)    (!TARGET_THUMB_P (flags))
++#define TARGET_THUMB1_P(flags) (TARGET_THUMB_P (flags) && !arm_arch_thumb2)
++#define TARGET_THUMB2_P(flags) (TARGET_THUMB_P (flags) && arm_arch_thumb2)
++
+ /* Run-time Target Specification.  */
+ #define TARGET_SOFT_FLOAT		(arm_float_abi == ARM_FLOAT_ABI_SOFT)
+ /* Use hardware floating point instructions. */
+@@ -311,11 +191,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ #define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE)
+ 
+ /* FPU supports half-precision floating-point with NEON element load/store.  */
+-#define TARGET_NEON_FP16 \
+-  (TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16)
++#define TARGET_NEON_FP16						\
++  (TARGET_VFP								\
++   && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16))
+ 
+ /* FPU supports VFP half-precision floating-point.  */
+-#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16)
++#define TARGET_FP16							\
++  (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16))
+ 
+ /* FPU supports fused-multiply-add operations.  */
+ #define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4)
+@@ -324,14 +206,21 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ #define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8)
+ 
+ /* FPU supports Crypto extensions.  */
+-#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto)
++#define TARGET_CRYPTO							\
++  (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO))
++
+ 
+ /* FPU supports Neon instructions.  The setting of this macro gets
+    revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
+    and TARGET_HARD_FLOAT to ensure that NEON instructions are
+    available.  */
+-#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \
+-		     && TARGET_VFP && arm_fpu_desc->neon)
++#define TARGET_NEON							\
++  (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP			\
++   && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON))
++
++
++/* FPU supports ARMv8.1 Adv.SIMD extensions.  */
++#define TARGET_NEON_RDMA (TARGET_NEON && arm_arch8_1)
+ 
+ /* Q-bit is present.  */
+ #define TARGET_ARM_QBIT \
+@@ -352,10 +241,6 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+    && (arm_disable_literal_pool \
+        || (!optimize_size && !current_tune->prefer_constant_pool)))
+ 
+-/* We could use unified syntax for arm mode, but for now we just use it
+-   for thumb mode.  */
+-#define TARGET_UNIFIED_ASM (TARGET_THUMB)
+-
+ /* Nonzero if this chip provides the DMB instruction.  */
+ #define TARGET_HAVE_DMB		(arm_arch6m || arm_arch7)
+ 
+@@ -367,25 +252,25 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)
+ 
+ /* Nonzero if this chip supports ldrex and strex */
+-#define TARGET_HAVE_LDREX	((arm_arch6 && TARGET_ARM) || arm_arch7)
++#define TARGET_HAVE_LDREX        ((arm_arch6 && TARGET_ARM) || arm_arch7)
+ 
+ /* Nonzero if this chip supports LPAE.  */
+ #define TARGET_HAVE_LPAE						\
+-  (arm_arch7 && ((insn_flags & FL_FOR_ARCH7VE) == FL_FOR_ARCH7VE))
++  (arm_arch7 && ARM_FSET_HAS_CPU1 (insn_flags, FL_FOR_ARCH7VE))
+ 
+ /* Nonzero if this chip supports ldrex{bh} and strex{bh}.  */
+-#define TARGET_HAVE_LDREXBH	((arm_arch6k && TARGET_ARM) || arm_arch7)
++#define TARGET_HAVE_LDREXBH ((arm_arch6k && TARGET_ARM) || arm_arch7)
+ 
+ /* Nonzero if this chip supports ldrexd and strexd.  */
+-#define TARGET_HAVE_LDREXD	(((arm_arch6k && TARGET_ARM) || arm_arch7) \
+-				 && arm_arch_notm)
++#define TARGET_HAVE_LDREXD (((arm_arch6k && TARGET_ARM) \
++			     || arm_arch7) && arm_arch_notm)
+ 
+ /* Nonzero if this chip supports load-acquire and store-release.  */
+ #define TARGET_HAVE_LDACQ	(TARGET_ARM_ARCH >= 8)
+ 
+ /* Nonzero if integer division instructions supported.  */
+-#define TARGET_IDIV		((TARGET_ARM && arm_arch_arm_hwdiv) \
+-				 || (TARGET_THUMB2 && arm_arch_thumb_hwdiv))
++#define TARGET_IDIV	((TARGET_ARM && arm_arch_arm_hwdiv)	\
++			 || (TARGET_THUMB2 && arm_arch_thumb_hwdiv))
+ 
+ /* Nonzero if disallow volatile memory access in IT block.  */
+ #define TARGET_NO_VOLATILE_CE		(arm_arch_no_volatile_ce)
+@@ -393,6 +278,12 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ /* Should NEON be used for 64-bits bitops.  */
+ #define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits)
+ 
++/* Should constant I be slplit for OP.  */
++#define DONT_EARLY_SPLIT_CONSTANT(i, op) \
++				((optimize >= 2) \
++				 && can_create_pseudo_p () \
++				 && !const_ok_for_op (i, op))
++
+ /* True iff the full BPABI is being used.  If TARGET_BPABI is true,
+    then TARGET_AAPCS_BASED must be true -- but the converse does not
+    hold.  TARGET_BPABI implies the use of the BPABI runtime library,
+@@ -401,6 +292,12 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+ #define TARGET_BPABI false
+ #endif
+ 
++/* Transform lane numbers on big endian targets. This is used to allow for the
++   endianness difference between NEON architectural lane numbers and those
++   used in RTL */
++#define NEON_ENDIAN_LANE_N(mode, n)  \
++  (BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (mode) - 1 - n : n)
++
+ /* Support for a compile-time default CPU, et cetera.  The rules are:
+    --with-arch is ignored if -march or -mcpu are specified.
+    --with-cpu is ignored if -march or -mcpu are specified, and is overridden
+@@ -421,6 +318,19 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
+   {"mode", "%{!marm:%{!mthumb:-m%(VALUE)}}"}, \
+   {"tls", "%{!mtls-dialect=*:-mtls-dialect=%(VALUE)}"},
+ 
++/* FPU feature sets.  */
++
++typedef unsigned long arm_fpu_feature_set;
++
++/* Test for an FPU feature.  */
++#define ARM_FPU_FSET_HAS(S,F) (((S) & (F)) == (F))
++
++/* FPU Features.  */
++#define FPU_FL_NONE	(0)
++#define FPU_FL_NEON	(1 << 0)	/* NEON instructions.  */
++#define FPU_FL_FP16	(1 << 1)	/* Half-precision.  */
++#define FPU_FL_CRYPTO	(1 << 2)	/* Crypto extensions.  */
++
+ /* Which floating point model to use.  */
+ enum arm_fp_model
+ {
+@@ -443,9 +353,7 @@ extern const struct arm_fpu_desc
+   enum arm_fp_model model;
+   int rev;
+   enum vfp_reg_type regs;
+-  int neon;
+-  int fp16;
+-  int crypto;
++  arm_fpu_feature_set features;
+ } *arm_fpu_desc;
+ 
+ /* Which floating point hardware to schedule for.  */
+@@ -477,7 +385,7 @@ enum base_architecture
+   BASE_ARCH_5TEJ = 5,
+   BASE_ARCH_6 = 6,
+   BASE_ARCH_6J = 6,
+-  BASE_ARCH_6ZK = 6,
++  BASE_ARCH_6KZ = 6,
+   BASE_ARCH_6K = 6,
+   BASE_ARCH_6T2 = 6,
+   BASE_ARCH_6M = 6,
+@@ -529,15 +437,12 @@ extern int arm_arch7em;
+ /* Nonzero if this chip supports the ARM Architecture 8 extensions.  */
+ extern int arm_arch8;
+ 
++/* Nonzero if this chip supports the ARM Architecture 8.1 extensions.  */
++extern int arm_arch8_1;
++
+ /* Nonzero if this chip can benefit from load scheduling.  */
+ extern int arm_ld_sched;
+ 
+-/* Nonzero if generating Thumb code, either Thumb-1 or Thumb-2.  */
+-extern int thumb_code;
+-
+-/* Nonzero if generating Thumb-1 code.  */
+-extern int thumb1_code;
+-
+ /* Nonzero if this chip is a StrongARM.  */
+ extern int arm_tune_strongarm;
+ 
+@@ -1102,7 +1007,7 @@ extern int arm_arch_crc;
+ /* Modes valid for Neon Q registers.  */
+ #define VALID_NEON_QREG_MODE(MODE) \
+   ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \
+-   || (MODE) == V4SFmode || (MODE) == V2DImode)
++   || (MODE) == V8HFmode || (MODE) == V4SFmode || (MODE) == V2DImode)
+ 
+ /* Structure modes valid for Neon registers.  */
+ #define VALID_NEON_STRUCT_MODE(MODE) \
+@@ -1358,46 +1263,6 @@ enum reg_class
+      ? GENERAL_REGS : NO_REGS)					\
+     : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)))
+ 
+-/* Try a machine-dependent way of reloading an illegitimate address
+-   operand.  If we find one, push the reload and jump to WIN.  This
+-   macro is used in only one place: `find_reloads_address' in reload.c.
+-
+-   For the ARM, we wish to handle large displacements off a base
+-   register by splitting the addend across a MOV and the mem insn.
+-   This can cut the number of reloads needed.  */
+-#define ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN)	   \
+-  do									   \
+-    {									   \
+-      if (arm_legitimize_reload_address (&X, MODE, OPNUM, TYPE, IND))	   \
+-	goto WIN;							   \
+-    }									   \
+-  while (0)
+-
+-/* XXX If an HImode FP+large_offset address is converted to an HImode
+-   SP+large_offset address, then reload won't know how to fix it.  It sees
+-   only that SP isn't valid for HImode, and so reloads the SP into an index
+-   register, but the resulting address is still invalid because the offset
+-   is too big.  We fix it here instead by reloading the entire address.  */
+-/* We could probably achieve better results by defining PROMOTE_MODE to help
+-   cope with the variances between the Thumb's signed and unsigned byte and
+-   halfword load instructions.  */
+-/* ??? This should be safe for thumb2, but we may be able to do better.  */
+-#define THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN)     \
+-do {									      \
+-  rtx new_x = thumb_legitimize_reload_address (&X, MODE, OPNUM, TYPE, IND_L); \
+-  if (new_x)								      \
+-    {									      \
+-      X = new_x;							      \
+-      goto WIN;								      \
+-    }									      \
+-} while (0)
+-
+-#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)   \
+-  if (TARGET_ARM)							   \
+-    ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \
+-  else									   \
+-    THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
+-
+ /* Return the maximum number of consecutive registers
+    needed to represent mode MODE in a register of class CLASS.
+    ARM regs are UNITS_PER_WORD bits.  
+@@ -2094,10 +1959,11 @@ enum arm_auto_incmodes
+   (current_tune->branch_cost (speed_p, predictable_p))
+ 
+ /* False if short circuit operation is preferred.  */
+-#define LOGICAL_OP_NON_SHORT_CIRCUIT				\
+-  ((optimize_size)						\
+-   ? (TARGET_THUMB ? false : true)				\
+-   : (current_tune->logical_op_non_short_circuit[TARGET_ARM]))
++#define LOGICAL_OP_NON_SHORT_CIRCUIT					\
++  ((optimize_size)							\
++   ? (TARGET_THUMB ? false : true)					\
++   : TARGET_THUMB ? static_cast<bool> (current_tune->logical_op_non_short_circuit_thumb) \
++   : static_cast<bool> (current_tune->logical_op_non_short_circuit_arm))
+ 
+ 
+ /* Position Independent Code.  */
+@@ -2133,7 +1999,8 @@ extern int making_const_table;
+   c_register_pragma (0, "long_calls", arm_pr_long_calls);		\
+   c_register_pragma (0, "no_long_calls", arm_pr_no_long_calls);		\
+   c_register_pragma (0, "long_calls_off", arm_pr_long_calls_off);	\
+-  arm_lang_object_attributes_init(); \
++  arm_lang_object_attributes_init();					\
++  arm_register_target_pragmas();                                       \
+ } while (0)
+ 
+ /* Condition code information.  */
+@@ -2162,7 +2029,7 @@ extern int making_const_table;
+ 		    "\t.syntax divided\n")
+ 
+ #undef  ASM_APP_OFF
+-#define ASM_APP_OFF (TARGET_ARM ? "\t.arm\n\t.syntax divided\n" : \
++#define ASM_APP_OFF (TARGET_ARM ? "\t.arm\n\t.syntax unified\n" : \
+ 		     "\t.thumb\n\t.syntax unified\n")
+ 
+ /* Output a push or a pop instruction (only used when profiling).
+@@ -2174,10 +2041,7 @@ extern int making_const_table;
+ #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)		\
+   do							\
+     {							\
+-      if (TARGET_ARM)					\
+-	asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n",	\
+-		     STACK_POINTER_REGNUM, REGNO);	\
+-      else if (TARGET_THUMB1				\
++      if (TARGET_THUMB1					\
+ 	       && (REGNO) == STATIC_CHAIN_REGNUM)	\
+ 	{						\
+ 	  asm_fprintf (STREAM, "\tpush\t{r7}\n");	\
+@@ -2193,11 +2057,8 @@ extern int making_const_table;
+ #define ASM_OUTPUT_REG_POP(STREAM, REGNO)		\
+   do							\
+     {							\
+-      if (TARGET_ARM)					\
+-	asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n",	\
+-		     STACK_POINTER_REGNUM, REGNO);	\
+-      else if (TARGET_THUMB1				\
+-	       && (REGNO) == STATIC_CHAIN_REGNUM)	\
++      if (TARGET_THUMB1					\
++	  && (REGNO) == STATIC_CHAIN_REGNUM)		\
+ 	{						\
+ 	  asm_fprintf (STREAM, "\tpop\t{r7}\n");	\
+ 	  asm_fprintf (STREAM, "\tmov\t%r, r7\n", REGNO);\
+@@ -2220,23 +2081,7 @@ extern int making_const_table;
+    ? 1 : 0)
+ 
+ #define ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) 	\
+-  do							\
+-    {							\
+-      if (TARGET_THUMB) 				\
+-        {						\
+-          if (is_called_in_ARM_mode (DECL)		\
+-	      || (TARGET_THUMB1 && !TARGET_THUMB1_ONLY	\
+-		  && cfun->is_thunk))	\
+-            fprintf (STREAM, "\t.code 32\n") ;		\
+-          else if (TARGET_THUMB1)			\
+-           fprintf (STREAM, "\t.code\t16\n\t.thumb_func\n") ;	\
+-          else						\
+-           fprintf (STREAM, "\t.thumb\n\t.thumb_func\n") ;	\
+-        }						\
+-      if (TARGET_POKE_FUNCTION_NAME)			\
+-        arm_poke_function_name (STREAM, (const char *) NAME);	\
+-    }							\
+-  while (0)
++  arm_declare_function_name ((STREAM), (NAME), (DECL));
+ 
+ /* For aliases of functions we use .thumb_set instead.  */
+ #define ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL1, DECL2)		\
+@@ -2411,4 +2256,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
+ 
+ #define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS
+ #define TARGET_SUPPORTS_WIDE_INT 1
++
++/* For switching between functions with different target attributes.  */
++#define SWITCHABLE_TARGET 1
++
+ #endif /* ! GCC_ARM_H */
+--- a/src/gcc/config/arm/arm.md
++++ b/src/gcc/config/arm/arm.md
+@@ -69,13 +69,17 @@
+ ; IS_THUMB is set to 'yes' when we are generating Thumb code, and 'no' when
+ ; generating ARM code.  This is used to control the length of some insn
+ ; patterns that share the same RTL in both ARM and Thumb code.
+-(define_attr "is_thumb" "no,yes" (const (symbol_ref "thumb_code")))
++(define_attr "is_thumb" "yes,no"
++  (const (if_then_else (symbol_ref "TARGET_THUMB")
++		       (const_string "yes") (const_string "no"))))
+ 
+ ; IS_ARCH6 is set to 'yes' when we are generating code form ARMv6.
+ (define_attr "is_arch6" "no,yes" (const (symbol_ref "arm_arch6")))
+ 
+ ; IS_THUMB1 is set to 'yes' iff we are generating Thumb-1 code.
+-(define_attr "is_thumb1" "no,yes" (const (symbol_ref "thumb1_code")))
++(define_attr "is_thumb1" "yes,no"
++  (const (if_then_else (symbol_ref "TARGET_THUMB1")
++		       (const_string "yes") (const_string "no"))))
+ 
+ ; We use this attribute to disable alternatives that can produce 32-bit
+ ; instructions inside an IT-block in Thumb2 state.  ARMv8 deprecates IT blocks
+@@ -101,6 +105,9 @@
+ (define_attr "fpu" "none,vfp"
+   (const (symbol_ref "arm_fpu_attr")))
+ 
++; Predicated means that the insn form is conditionally executed based on a
++; predicate.  We default to 'no' because no Thumb patterns match this rule
++; and not all ARM insns do.
+ (define_attr "predicated" "yes,no" (const_string "no"))
+ 
+ ; LENGTH of an instruction (in bytes)
+@@ -618,9 +625,9 @@
+ 	(plus:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_ARM"
+   "@
+-   add%.\\t%0, %1, %2
+-   sub%.\\t%0, %1, #%n2
+-   add%.\\t%0, %1, %2"
++   adds%?\\t%0, %1, %2
++   subs%?\\t%0, %1, #%n2
++   adds%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "alus_imm,alus_imm,alus_sreg")]
+ )
+@@ -668,8 +675,8 @@
+ 		 (match_operand:SI 3 "arm_addimm_operand" "I,L")))]
+   "TARGET_32BIT && INTVAL (operands[2]) == -INTVAL (operands[3])"
+   "@
+-   add%.\\t%0, %1, %3
+-   sub%.\\t%0, %1, #%n3"
++   adds%?\\t%0, %1, %3
++   subs%?\\t%0, %1, #%n3"
+   [(set_attr "conds" "set")
+    (set_attr "type" "alus_sreg")]
+ )
+@@ -725,9 +732,9 @@
+ 	(plus:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+-   add%.\\t%0, %1, %2
+-   sub%.\\t%0, %1, #%n2
+-   add%.\\t%0, %1, %2"
++   adds%?\\t%0, %1, %2
++   subs%?\\t%0, %1, #%n2
++   adds%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type"  "alus_imm,alus_imm,alus_sreg")]
+ )
+@@ -742,9 +749,9 @@
+ 	(plus:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+-   add%.\\t%0, %1, %2
+-   add%.\\t%0, %1, %2
+-   sub%.\\t%0, %1, #%n2"
++   adds%?\\t%0, %1, %2
++   subs%?\\t%0, %1, #%n2
++   adds%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "alus_imm,alus_imm,alus_sreg")]
+ )
+@@ -852,7 +859,7 @@
+ 		 (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))
+    (clobber (reg:CC CC_REGNUM))]
+    "TARGET_32BIT"
+-   "adc%.\\t%0, %1, %2"
++   "adcs%?\\t%0, %1, %2"
+    [(set_attr "conds" "set")
+     (set_attr "type" "adcs_reg")]
+ )
+@@ -1164,10 +1171,16 @@
+     {
+       if (TARGET_32BIT)
+         {
+-          arm_split_constant (MINUS, SImode, NULL_RTX,
+-	                      INTVAL (operands[1]), operands[0],
+-	  		      operands[2], optimize && can_create_pseudo_p ());
+-          DONE;
++	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), MINUS))
++	    operands[1] = force_reg (SImode, operands[1]);
++	  else
++	    {
++	      arm_split_constant (MINUS, SImode, NULL_RTX,
++				  INTVAL (operands[1]), operands[0],
++				  operands[2],
++				  optimize && can_create_pseudo_p ());
++	      DONE;
++	    }
+ 	}
+       else /* TARGET_THUMB1 */
+         operands[1] = force_reg (SImode, operands[1]);
+@@ -1177,9 +1190,9 @@
+ 
+ ; ??? Check Thumb-2 split length
+ (define_insn_and_split "*arm_subsi3_insn"
+-  [(set (match_operand:SI           0 "s_register_operand" "=l,l ,l ,l ,r ,r,r,rk,r")
+-	(minus:SI (match_operand:SI 1 "reg_or_int_operand" "l ,0 ,l ,Pz,rI,r,r,k ,?n")
+-		  (match_operand:SI 2 "reg_or_int_operand" "l ,Py,Pd,l ,r ,I,r,r ,r")))]
++  [(set (match_operand:SI           0 "s_register_operand" "=l,l ,l ,l ,r,r,r,rk,r")
++	(minus:SI (match_operand:SI 1 "reg_or_int_operand" "l ,0 ,l ,Pz,I,r,r,k ,?n")
++		  (match_operand:SI 2 "reg_or_int_operand" "l ,Py,Pd,l ,r,I,r,r ,r")))]
+   "TARGET_32BIT"
+   "@
+    sub%?\\t%0, %1, %2
+@@ -1219,7 +1232,7 @@
+   ""
+ )
+ 
+-(define_insn "*subsi3_compare0"
++(define_insn "subsi3_compare0"
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV
+ 	 (minus:SI (match_operand:SI 1 "arm_rhs_operand" "r,r,I")
+@@ -1229,9 +1242,9 @@
+ 	(minus:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+-   sub%.\\t%0, %1, %2
+-   sub%.\\t%0, %1, %2
+-   rsb%.\\t%0, %2, %1"
++   subs%?\\t%0, %1, %2
++   subs%?\\t%0, %1, %2
++   rsbs%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type"  "alus_imm,alus_sreg,alus_sreg")]
+ )
+@@ -1244,9 +1257,9 @@
+ 	(minus:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+-   sub%.\\t%0, %1, %2
+-   sub%.\\t%0, %1, %2
+-   rsb%.\\t%0, %2, %1"
++   subs%?\\t%0, %1, %2
++   subs%?\\t%0, %1, %2
++   rsbs%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "alus_imm,alus_sreg,alus_sreg")]
+ )
+@@ -1325,7 +1338,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=&r,&r")
+ 	(mult:SI (match_dup 2) (match_dup 1)))]
+   "TARGET_ARM && !arm_arch6"
+-  "mul%.\\t%0, %2, %1"
++  "muls%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "muls")]
+ )
+@@ -1339,7 +1352,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(mult:SI (match_dup 2) (match_dup 1)))]
+   "TARGET_ARM && arm_arch6 && optimize_size"
+-  "mul%.\\t%0, %2, %1"
++  "muls%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "muls")]
+ )
+@@ -1352,7 +1365,7 @@
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=&r,&r"))]
+   "TARGET_ARM && !arm_arch6"
+-  "mul%.\\t%0, %2, %1"
++  "muls%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "muls")]
+ )
+@@ -1365,7 +1378,7 @@
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_ARM && arm_arch6 && optimize_size"
+-  "mul%.\\t%0, %2, %1"
++  "muls%?\\t%0, %2, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "muls")]
+ )
+@@ -1409,7 +1422,7 @@
+ 	(plus:SI (mult:SI (match_dup 2) (match_dup 1))
+ 		 (match_dup 3)))]
+   "TARGET_ARM && arm_arch6"
+-  "mla%.\\t%0, %2, %1, %3"
++  "mlas%?\\t%0, %2, %1, %3"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mlas")]
+ )
+@@ -1426,7 +1439,7 @@
+ 	(plus:SI (mult:SI (match_dup 2) (match_dup 1))
+ 		 (match_dup 3)))]
+   "TARGET_ARM && arm_arch6 && optimize_size"
+-  "mla%.\\t%0, %2, %1, %3"
++  "mlas%?\\t%0, %2, %1, %3"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mlas")]
+ )
+@@ -1441,7 +1454,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=&r,&r,&r,&r"))]
+   "TARGET_ARM && !arm_arch6"
+-  "mla%.\\t%0, %2, %1, %3"
++  "mlas%?\\t%0, %2, %1, %3"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mlas")]
+ )
+@@ -1456,7 +1469,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_ARM && arm_arch6 && optimize_size"
+-  "mla%.\\t%0, %2, %1, %3"
++  "mlas%?\\t%0, %2, %1, %3"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mlas")]
+ )
+@@ -2078,14 +2091,19 @@
+ 	      operands[1] = convert_to_mode (QImode, operands[1], 1);
+ 	      emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0],
+ 							 operands[1]));
++	      DONE;
+ 	    }
++	  else if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), AND))
++	    operands[2] = force_reg (SImode, operands[2]);
+ 	  else
+-	    arm_split_constant (AND, SImode, NULL_RTX,
+-				INTVAL (operands[2]), operands[0],
+-				operands[1],
+-				optimize && can_create_pseudo_p ());
++	    {
++	      arm_split_constant (AND, SImode, NULL_RTX,
++				  INTVAL (operands[2]), operands[0],
++				  operands[1],
++				  optimize && can_create_pseudo_p ());
+ 
+-          DONE;
++	      DONE;
++	    }
+         }
+     }
+   else /* TARGET_THUMB1 */
+@@ -2180,9 +2198,9 @@
+ 	(and:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+   "@
+-   and%.\\t%0, %1, %2
+-   bic%.\\t%0, %1, #%B2
+-   and%.\\t%0, %1, %2"
++   ands%?\\t%0, %1, %2
++   bics%?\\t%0, %1, #%B2
++   ands%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_imm,logics_imm,logics_reg")]
+ )
+@@ -2197,7 +2215,7 @@
+   "TARGET_32BIT"
+   "@
+    tst%?\\t%0, %1
+-   bic%.\\t%2, %0, #%B1
++   bics%?\\t%2, %0, #%B1
+    tst%?\\t%0, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type"  "logics_imm,logics_imm,logics_reg")]
+@@ -2768,6 +2786,55 @@
+ 		      (const_string "logic_shift_reg")))]
+ )
+ 
++;; Shifted bics pattern used to set up CC status register and not reusing
++;; bics output.  Pattern restricts Thumb2 shift operand as bics for Thumb2
++;; does not support shift by register.
++(define_insn "andsi_not_shiftsi_si_scc_no_reuse"
++  [(set (reg:CC_NOOV CC_REGNUM)
++	(compare:CC_NOOV
++		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
++			[(match_operand:SI 1 "s_register_operand" "r")
++			 (match_operand:SI 2 "arm_rhs_operand" "rM")]))
++			(match_operand:SI 3 "s_register_operand" "r"))
++		(const_int 0)))
++   (clobber (match_scratch:SI 4 "=r"))]
++  "TARGET_ARM || (TARGET_THUMB2 && CONST_INT_P (operands[2]))"
++  "bics%?\\t%4, %3, %1%S0"
++  [(set_attr "predicable" "yes")
++   (set_attr "predicable_short_it" "no")
++   (set_attr "conds" "set")
++   (set_attr "shift" "1")
++   (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
++		      (const_string "logic_shift_imm")
++		      (const_string "logic_shift_reg")))]
++)
++
++;; Same as andsi_not_shiftsi_si_scc_no_reuse, but the bics result is also
++;; getting reused later.
++(define_insn "andsi_not_shiftsi_si_scc"
++  [(parallel [(set (reg:CC_NOOV CC_REGNUM)
++	(compare:CC_NOOV
++		(and:SI (not:SI (match_operator:SI 0 "shift_operator"
++			[(match_operand:SI 1 "s_register_operand" "r")
++			 (match_operand:SI 2 "arm_rhs_operand" "rM")]))
++			(match_operand:SI 3 "s_register_operand" "r"))
++		(const_int 0)))
++	(set (match_operand:SI 4 "s_register_operand" "=r")
++	     (and:SI (not:SI (match_op_dup 0
++		     [(match_dup 1)
++		      (match_dup 2)]))
++		     (match_dup 3)))])]
++  "TARGET_ARM || (TARGET_THUMB2 && CONST_INT_P (operands[2]))"
++  "bics%?\\t%4, %3, %1%S0"
++  [(set_attr "predicable" "yes")
++   (set_attr "predicable_short_it" "no")
++   (set_attr "conds" "set")
++   (set_attr "shift" "1")
++   (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "")
++		      (const_string "logic_shift_imm")
++		      (const_string "logic_shift_reg")))]
++)
++
+ (define_insn "*andsi_notsi_si_compare0"
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV
+@@ -2777,7 +2844,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(and:SI (not:SI (match_dup 2)) (match_dup 1)))]
+   "TARGET_32BIT"
+-  "bic%.\\t%0, %1, %2"
++  "bics\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_shift_reg")]
+ )
+@@ -2790,7 +2857,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_32BIT"
+-  "bic%.\\t%0, %1, %2"
++  "bics\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_shift_reg")]
+ )
+@@ -2884,10 +2951,16 @@
+     {
+       if (TARGET_32BIT)
+         {
+-          arm_split_constant (IOR, SImode, NULL_RTX,
+-	                      INTVAL (operands[2]), operands[0], operands[1],
+-			      optimize && can_create_pseudo_p ());
+-          DONE;
++	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), IOR))
++	    operands[2] = force_reg (SImode, operands[2]);
++	  else
++	    {
++	      arm_split_constant (IOR, SImode, NULL_RTX,
++				  INTVAL (operands[2]), operands[0],
++				  operands[1],
++				  optimize && can_create_pseudo_p ());
++	      DONE;
++	    }
+ 	}
+       else /* TARGET_THUMB1 */
+         {
+@@ -2953,7 +3026,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(ior:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+-  "orr%.\\t%0, %1, %2"
++  "orrs%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_imm,logics_reg")]
+ )
+@@ -2965,7 +3038,7 @@
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r,r"))]
+   "TARGET_32BIT"
+-  "orr%.\\t%0, %1, %2"
++  "orrs%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_imm,logics_reg")]
+ )
+@@ -3054,10 +3127,16 @@
+     {
+       if (TARGET_32BIT)
+         {
+-          arm_split_constant (XOR, SImode, NULL_RTX,
+-	                      INTVAL (operands[2]), operands[0], operands[1],
+-			      optimize && can_create_pseudo_p ());
+-          DONE;
++	  if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), XOR))
++	    operands[2] = force_reg (SImode, operands[2]);
++	  else
++	    {
++	      arm_split_constant (XOR, SImode, NULL_RTX,
++				  INTVAL (operands[2]), operands[0],
++				  operands[1],
++				  optimize && can_create_pseudo_p ());
++	      DONE;
++	    }
+ 	}
+       else /* TARGET_THUMB1 */
+         {
+@@ -3106,7 +3185,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(xor:SI (match_dup 1) (match_dup 2)))]
+   "TARGET_32BIT"
+-  "eor%.\\t%0, %1, %2"
++  "eors%?\\t%0, %1, %2"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_imm,logics_reg")]
+ )
+@@ -3966,7 +4045,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(not:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])))]
+   "TARGET_32BIT"
+-  "mvn%.\\t%0, %1%S3"
++  "mvns%?\\t%0, %1%S3"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "1")
+    (set_attr "arch" "32,a")
+@@ -3981,7 +4060,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r,r"))]
+   "TARGET_32BIT"
+-  "mvn%.\\t%0, %1%S3"
++  "mvns%?\\t%0, %1%S3"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "1")
+    (set_attr "arch" "32,a")
+@@ -4171,7 +4250,7 @@
+ 	  (unspec:HI [(match_operand:HI 1 "memory_operand" "Uw,Uh")]
+ 		     UNSPEC_UNALIGNED_LOAD)))]
+   "unaligned_access && TARGET_32BIT"
+-  "ldr%(sh%)\t%0, %1\t@ unaligned"
++  "ldrsh%?\t%0, %1\t@ unaligned"
+   [(set_attr "arch" "t2,any")
+    (set_attr "length" "2,4")
+    (set_attr "predicable" "yes")
+@@ -4184,7 +4263,7 @@
+ 	  (unspec:HI [(match_operand:HI 1 "memory_operand" "Uw,m")]
+ 		     UNSPEC_UNALIGNED_LOAD)))]
+   "unaligned_access && TARGET_32BIT"
+-  "ldr%(h%)\t%0, %1\t@ unaligned"
++  "ldrh%?\t%0, %1\t@ unaligned"
+   [(set_attr "arch" "t2,any")
+    (set_attr "length" "2,4")
+    (set_attr "predicable" "yes")
+@@ -4208,66 +4287,13 @@
+ 	(unspec:HI [(match_operand:HI 1 "s_register_operand" "l,r")]
+ 		   UNSPEC_UNALIGNED_STORE))]
+   "unaligned_access && TARGET_32BIT"
+-  "str%(h%)\t%1, %0\t@ unaligned"
++  "strh%?\t%1, %0\t@ unaligned"
+   [(set_attr "arch" "t2,any")
+    (set_attr "length" "2,4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "yes,no")
+    (set_attr "type" "store1")])
+ 
+-;; Unaligned double-word load and store.
+-;; Split after reload into two unaligned single-word accesses.
+-;; It prevents lower_subreg from splitting some other aligned
+-;; double-word accesses too early. Used for internal memcpy.
+-
+-(define_insn_and_split "unaligned_loaddi"
+-  [(set (match_operand:DI 0 "s_register_operand" "=l,r")
+-	(unspec:DI [(match_operand:DI 1 "memory_operand" "o,o")]
+-		   UNSPEC_UNALIGNED_LOAD))]
+-  "unaligned_access && TARGET_32BIT"
+-  "#"
+-  "&& reload_completed"
+-  [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_UNALIGNED_LOAD))
+-   (set (match_dup 2) (unspec:SI [(match_dup 3)] UNSPEC_UNALIGNED_LOAD))]
+-  {
+-    operands[2] = gen_highpart (SImode, operands[0]);
+-    operands[0] = gen_lowpart (SImode, operands[0]);
+-    operands[3] = gen_highpart (SImode, operands[1]);
+-    operands[1] = gen_lowpart (SImode, operands[1]);
+-
+-    /* If the first destination register overlaps with the base address,
+-       swap the order in which the loads are emitted.  */
+-    if (reg_overlap_mentioned_p (operands[0], operands[1]))
+-      {
+-        std::swap (operands[1], operands[3]);
+-        std::swap (operands[0], operands[2]);
+-      }
+-  }
+-  [(set_attr "arch" "t2,any")
+-   (set_attr "length" "4,8")
+-   (set_attr "predicable" "yes")
+-   (set_attr "type" "load2")])
+-
+-(define_insn_and_split "unaligned_storedi"
+-  [(set (match_operand:DI 0 "memory_operand" "=o,o")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "l,r")]
+-		   UNSPEC_UNALIGNED_STORE))]
+-  "unaligned_access && TARGET_32BIT"
+-  "#"
+-  "&& reload_completed"
+-  [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_UNALIGNED_STORE))
+-   (set (match_dup 2) (unspec:SI [(match_dup 3)] UNSPEC_UNALIGNED_STORE))]
+-  {
+-    operands[2] = gen_highpart (SImode, operands[0]);
+-    operands[0] = gen_lowpart (SImode, operands[0]);
+-    operands[3] = gen_highpart (SImode, operands[1]);
+-    operands[1] = gen_lowpart (SImode, operands[1]);
+-  }
+-  [(set_attr "arch" "t2,any")
+-   (set_attr "length" "4,8")
+-   (set_attr "predicable" "yes")
+-   (set_attr "type" "store2")])
+-
+ 
+ (define_insn "*extv_reg"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+@@ -4727,7 +4753,7 @@
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(not:SI (match_dup 1)))]
+   "TARGET_32BIT"
+-  "mvn%.\\t%0, %1"
++  "mvns%?\\t%0, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mvn_reg")]
+ )
+@@ -4738,7 +4764,7 @@
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_32BIT"
+-  "mvn%.\\t%0, %1"
++  "mvns%?\\t%0, %1"
+   [(set_attr "conds" "set")
+    (set_attr "type" "mvn_reg")]
+ )
+@@ -4969,7 +4995,7 @@
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+   "@
+    #
+-   ldr%(h%)\\t%0, %1"
++   ldrh%?\\t%0, %1"
+   [(set_attr "type" "alu_shift_reg,load_byte")
+    (set_attr "predicable" "yes")]
+ )
+@@ -4980,7 +5006,7 @@
+   "TARGET_ARM && arm_arch6"
+   "@
+    uxth%?\\t%0, %1
+-   ldr%(h%)\\t%0, %1"
++   ldrh%?\\t%0, %1"
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "extend,load_byte")]
+ )
+@@ -5039,7 +5065,7 @@
+   "TARGET_ARM && !arm_arch6"
+   "@
+    #
+-   ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
++   ldrb%?\\t%0, %1\\t%@ zero_extendqisi2"
+   [(set_attr "length" "8,4")
+    (set_attr "type" "alu_shift_reg,load_byte")
+    (set_attr "predicable" "yes")]
+@@ -5050,8 +5076,8 @@
+ 	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,Uh")))]
+   "TARGET_ARM && arm_arch6"
+   "@
+-   uxtb%(%)\\t%0, %1
+-   ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
++   uxtb%?\\t%0, %1
++   ldrb%?\\t%0, %1\\t%@ zero_extendqisi2"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")]
+ )
+@@ -5090,7 +5116,7 @@
+ 
+ (define_split
+   [(set (match_operand:SI 0 "s_register_operand" "")
+-	(ior_xor:SI (and:SI (ashift:SI
++	(IOR_XOR:SI (and:SI (ashift:SI
+ 			     (match_operand:SI 1 "s_register_operand" "")
+ 			     (match_operand:SI 2 "const_int_operand" ""))
+ 			    (match_operand:SI 3 "const_int_operand" ""))
+@@ -5102,7 +5128,7 @@
+        == (GET_MODE_MASK (GET_MODE (operands[5]))
+            & (GET_MODE_MASK (GET_MODE (operands[5]))
+ 	      << (INTVAL (operands[2])))))"
+-  [(set (match_dup 0) (ior_xor:SI (ashift:SI (match_dup 1) (match_dup 2))
++  [(set (match_dup 0) (IOR_XOR:SI (ashift:SI (match_dup 1) (match_dup 2))
+ 				  (match_dup 4)))
+    (set (match_dup 0) (zero_extend:SI (match_dup 5)))]
+   "operands[5] = gen_lowpart (GET_MODE (operands[5]), operands[0]);"
+@@ -5211,7 +5237,7 @@
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+   "@
+    #
+-   ldr%(sh%)\\t%0, %1"
++   ldrsh%?\\t%0, %1"
+   [(set_attr "length" "8,4")
+    (set_attr "type" "alu_shift_reg,load_byte")
+    (set_attr "predicable" "yes")]
+@@ -5224,7 +5250,7 @@
+   "TARGET_32BIT && arm_arch6"
+   "@
+    sxth%?\\t%0, %1
+-   ldr%(sh%)\\t%0, %1"
++   ldrsh%?\\t%0, %1"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")]
+@@ -5268,7 +5294,7 @@
+   [(set (match_operand:HI 0 "s_register_operand" "=r")
+ 	(sign_extend:HI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
+   "TARGET_ARM && arm_arch4"
+-  "ldr%(sb%)\\t%0, %1"
++  "ldrsb%?\\t%0, %1"
+   [(set_attr "type" "load_byte")
+    (set_attr "predicable" "yes")]
+ )
+@@ -5307,7 +5333,7 @@
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+   "@
+    #
+-   ldr%(sb%)\\t%0, %1"
++   ldrsb%?\\t%0, %1"
+   [(set_attr "length" "8,4")
+    (set_attr "type" "alu_shift_reg,load_byte")
+    (set_attr "predicable" "yes")]
+@@ -5320,7 +5346,7 @@
+   "TARGET_ARM && arm_arch6"
+   "@
+    sxtb%?\\t%0, %1
+-   ldr%(sb%)\\t%0, %1"
++   ldrsb%?\\t%0, %1"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")]
+ )
+@@ -5604,10 +5630,18 @@
+           && !(const_ok_for_arm (INTVAL (operands[1]))
+                || const_ok_for_arm (~INTVAL (operands[1]))))
+         {
+-           arm_split_constant (SET, SImode, NULL_RTX,
+-	                       INTVAL (operands[1]), operands[0], NULL_RTX,
+-			       optimize && can_create_pseudo_p ());
+-          DONE;
++	   if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), SET))
++	     {
++		emit_insn (gen_rtx_SET (SImode, operands[0], operands[1]));
++		DONE;
++	     }
++	  else
++	     {
++		arm_split_constant (SET, SImode, NULL_RTX,
++	                            INTVAL (operands[1]), operands[0], NULL_RTX,
++			            optimize && can_create_pseudo_p ());
++		DONE;
++	     }
+         }
+     }
+   else /* TARGET_THUMB1...  */
+@@ -5681,7 +5715,7 @@
+   [(set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")
+    (set_attr "length" "4")
+-   (set_attr "type" "mov_imm")]
++   (set_attr "type" "alu_sreg")]
+ )
+ 
+ (define_insn "*arm_movsi_insn"
+@@ -5967,7 +6001,7 @@
+   "TARGET_32BIT"
+   "@
+    cmp%?\\t%0, #0
+-   sub%.\\t%0, %1, #0"
++   subs%?\\t%0, %1, #0"
+   [(set_attr "conds" "set")
+    (set_attr "type" "alus_imm,alus_imm")]
+ )
+@@ -6343,8 +6377,8 @@
+    mov%?\\t%0, %1\\t%@ movhi
+    mvn%?\\t%0, #%B1\\t%@ movhi
+    movw%?\\t%0, %L1\\t%@ movhi
+-   str%(h%)\\t%1, %0\\t%@ movhi
+-   ldr%(h%)\\t%0, %1\\t%@ movhi"
++   strh%?\\t%1, %0\\t%@ movhi
++   ldrh%?\\t%0, %1\\t%@ movhi"
+   [(set_attr "predicable" "yes")
+    (set_attr "pool_range" "*,*,*,*,256")
+    (set_attr "neg_pool_range" "*,*,*,*,244")
+@@ -6486,10 +6520,10 @@
+    mov%?\\t%0, %1
+    mov%?\\t%0, %1
+    mvn%?\\t%0, #%B1
+-   ldr%(b%)\\t%0, %1
+-   str%(b%)\\t%1, %0
+-   ldr%(b%)\\t%0, %1
+-   str%(b%)\\t%1, %0"
++   ldrb%?\\t%0, %1
++   strb%?\\t%1, %0
++   ldrb%?\\t%0, %1
++   strb%?\\t%1, %0"
+   [(set_attr "type" "mov_reg,mov_reg,mov_imm,mov_imm,mvn_imm,load1,store1,load1,store1")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "yes,yes,yes,no,no,no,no,no,no")
+@@ -6529,9 +6563,9 @@
+   switch (which_alternative)
+     {
+     case 0:	/* ARM register from memory */
+-      return \"ldr%(h%)\\t%0, %1\\t%@ __fp16\";
++      return \"ldrh%?\\t%0, %1\\t%@ __fp16\";
+     case 1:	/* memory from ARM register */
+-      return \"str%(h%)\\t%1, %0\\t%@ __fp16\";
++      return \"strh%?\\t%1, %0\\t%@ __fp16\";
+     case 2:	/* ARM register from ARM register */
+       return \"mov%?\\t%0, %1\\t%@ __fp16\";
+     case 3:	/* ARM register from constant */
+@@ -6727,7 +6761,7 @@
+ 
+   /* Support only fixed point registers.  */
+   if (!CONST_INT_P (operands[2])
+-      || INTVAL (operands[2]) > 14
++      || INTVAL (operands[2]) > MAX_LDM_STM_OPS
+       || INTVAL (operands[2]) < 2
+       || !MEM_P (operands[1])
+       || !REG_P (operands[0])
+@@ -6752,7 +6786,7 @@
+ 
+   /* Support only fixed point registers.  */
+   if (!CONST_INT_P (operands[2])
+-      || INTVAL (operands[2]) > 14
++      || INTVAL (operands[2]) > MAX_LDM_STM_OPS
+       || INTVAL (operands[2]) < 2
+       || !REG_P (operands[1])
+       || !MEM_P (operands[0])
+@@ -6937,7 +6971,7 @@
+   [(set_attr "conds" "set")
+    (set_attr "shift" "1")
+    (set_attr "arch" "32,a,a")
+-   (set_attr "type" "alus_shift_imm,alu_shift_reg,alus_shift_imm")])
++   (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
+ 
+ (define_insn "*cmpsi_shiftsi_swp"
+   [(set (reg:CC_SWP CC_REGNUM)
+@@ -6950,7 +6984,7 @@
+   [(set_attr "conds" "set")
+    (set_attr "shift" "1")
+    (set_attr "arch" "32,a,a")
+-   (set_attr "type" "alus_shift_imm,alu_shift_reg,alus_shift_imm")])
++   (set_attr "type" "alus_shift_imm,alus_shift_reg,alus_shift_imm")])
+ 
+ (define_insn "*arm_cmpsi_negshiftsi_si"
+   [(set (reg:CC_Z CC_REGNUM)
+@@ -7045,7 +7079,7 @@
+ 		      (const_int 0)))
+    (clobber (match_scratch:SI 1 "=r"))]
+   "TARGET_32BIT"
+-  "orr%.\\t%1, %Q0, %R0"
++  "orrs%?\\t%1, %Q0, %R0"
+   [(set_attr "conds" "set")
+    (set_attr "type" "logics_reg")]
+ )
+@@ -7152,7 +7186,7 @@
+ 
+ (define_insn_and_split "*mov_scc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(match_operator:SI 1 "arm_comparison_operator"
++	(match_operator:SI 1 "arm_comparison_operator_mode"
+ 	 [(match_operand 2 "cc_register" "") (const_int 0)]))]
+   "TARGET_ARM"
+   "#"   ; "mov%D1\\t%0, #0\;mov%d1\\t%0, #1"
+@@ -7169,7 +7203,7 @@
+ 
+ (define_insn_and_split "*mov_negscc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(neg:SI (match_operator:SI 1 "arm_comparison_operator"
++	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
+ 		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
+   "TARGET_ARM"
+   "#"   ; "mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
+@@ -7543,10 +7577,10 @@
+                                         (const_string "mov_imm")
+                                         (const_string "mov_reg"))
+                           (const_string "mvn_imm")
+-                          (const_string "mov_reg")
+-                          (const_string "mov_reg")
+-                          (const_string "mov_reg")
+-                          (const_string "mov_reg")])]
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*movsfcc_soft_insn"
+@@ -7658,23 +7692,6 @@
+ )
+ 
+ 
+-;; Note: not used for armv5+ because the sequence used (ldr pc, ...) is not
+-;; considered a function call by the branch predictor of some cores (PR40887).
+-;; Falls back to blx rN (*call_reg_armv5).
+-
+-(define_insn "*call_mem"
+-  [(call (mem:SI (match_operand:SI 0 "call_memory_operand" "m"))
+-	 (match_operand 1 "" ""))
+-   (use (match_operand 2 "" ""))
+-   (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_ARM && !arm_arch5 && !SIBLING_CALL_P (insn)"
+-  "*
+-  return output_call_mem (operands);
+-  "
+-  [(set_attr "length" "12")
+-   (set_attr "type" "call")]
+-)
+-
+ (define_expand "call_value"
+   [(parallel [(set (match_operand       0 "" "")
+ 	           (call (match_operand 1 "memory_operand" "")
+@@ -7738,23 +7755,6 @@
+    (set_attr "type" "call")]
+ )
+ 
+-;; Note: see *call_mem
+-
+-(define_insn "*call_value_mem"
+-  [(set (match_operand 0 "" "")
+-	(call (mem:SI (match_operand:SI 1 "call_memory_operand" "m"))
+-	      (match_operand 2 "" "")))
+-   (use (match_operand 3 "" ""))
+-   (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_ARM && !arm_arch5 && (!CONSTANT_ADDRESS_P (XEXP (operands[1], 0)))
+-   && !SIBLING_CALL_P (insn)"
+-  "*
+-  return output_call_mem (&operands[1]);
+-  "
+-  [(set_attr "length" "12")
+-   (set_attr "type" "call")]
+-)
+-
+ ;; Allow calls to SYMBOL_REFs specially as they are not valid general addresses
+ ;; The 'a' causes the operand to be treated as an address, i.e. no '#' output.
+ 
+@@ -7769,6 +7769,13 @@
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))"
+   "*
+   {
++   rtx op = operands[0];
++
++   /* Switch mode now when possible.  */
++   if (SYMBOL_REF_DECL (op) && !TREE_PUBLIC (SYMBOL_REF_DECL (op))
++        && arm_arch5 && arm_change_mode_p (SYMBOL_REF_DECL (op)))
++      return NEED_PLT_RELOC ? \"blx%?\\t%a0(PLT)\" : \"blx%?\\t(%a0)\";
++
+     return NEED_PLT_RELOC ? \"bl%?\\t%a0(PLT)\" : \"bl%?\\t%a0\";
+   }"
+   [(set_attr "type" "call")]
+@@ -7786,6 +7793,13 @@
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))"
+   "*
+   {
++   rtx op = operands[1];
++
++   /* Switch mode now when possible.  */
++   if (SYMBOL_REF_DECL (op) && !TREE_PUBLIC (SYMBOL_REF_DECL (op))
++        && arm_arch5 && arm_change_mode_p (SYMBOL_REF_DECL (op)))
++      return NEED_PLT_RELOC ? \"blx%?\\t%a1(PLT)\" : \"blx%?\\t(%a1)\";
++
+     return NEED_PLT_RELOC ? \"bl%?\\t%a1(PLT)\" : \"bl%?\\t%a1\";
+   }"
+   [(set_attr "type" "call")]
+@@ -7899,7 +7913,7 @@
+ )
+ 
+ (define_expand "<return_str>return"
+-  [(returns)]
++  [(RETURNS)]
+   "(TARGET_ARM || (TARGET_THUMB2
+                    && ARM_FUNC_TYPE (arm_current_func_type ()) == ARM_FT_NORMAL
+                    && !IS_STACKALIGN (arm_current_func_type ())))
+@@ -7937,7 +7951,7 @@
+   [(set (pc)
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+-                      (returns)
++                      (RETURNS)
+                       (pc)))]
+   "TARGET_ARM  <return_cond_true>"
+   "*
+@@ -7960,7 +7974,7 @@
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+                       (pc)
+-		      (returns)))]
++		      (RETURNS)))]
+   "TARGET_ARM <return_cond_true>"
+   "*
+   {
+@@ -8258,13 +8272,7 @@
+ (define_insn "nop"
+   [(const_int 0)]
+   "TARGET_EITHER"
+-  "*
+-  if (TARGET_UNIFIED_ASM)
+-    return \"nop\";
+-  if (TARGET_ARM)
+-    return \"mov%?\\t%|r0, %|r0\\t%@ nop\";
+-  return  \"mov\\tr8, r8\";
+-  "
++  "nop"
+   [(set (attr "length")
+ 	(if_then_else (eq_attr "is_thumb" "yes")
+ 		      (const_int 2)
+@@ -8294,7 +8302,7 @@
+ 
+ (define_insn "*<arith_shift_insn>_multsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+-	(shiftable_ops:SI
++	(SHIFTABLE_OPS:SI
+ 	 (mult:SI (match_operand:SI 2 "s_register_operand" "r,r")
+ 		  (match_operand:SI 3 "power_of_two_operand" ""))
+ 	 (match_operand:SI 1 "s_register_operand" "rk,<t2_binop0>")))]
+@@ -8308,7 +8316,7 @@
+ 
+ (define_insn "*<arith_shift_insn>_shiftsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
+-	(shiftable_ops:SI
++	(SHIFTABLE_OPS:SI
+ 	 (match_operator:SI 2 "shift_nomul_operator"
+ 	  [(match_operand:SI 3 "s_register_operand" "r,r,r")
+ 	   (match_operand:SI 4 "shift_amount_operand" "M,M,r")])
+@@ -8352,7 +8360,7 @@
+ 	(match_op_dup 1 [(match_op_dup 3 [(match_dup 4) (match_dup 5)])
+ 			 (match_dup 2)]))]
+   "TARGET_32BIT"
+-  "%i1%.\\t%0, %2, %4%S3"
++  "%i1s%?\\t%0, %2, %4%S3"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "4")
+    (set_attr "arch" "32,a")
+@@ -8369,7 +8377,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r,r"))]
+   "TARGET_32BIT"
+-  "%i1%.\\t%0, %2, %4%S3"
++  "%i1s%?\\t%0, %2, %4%S3"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "4")
+    (set_attr "arch" "32,a")
+@@ -8400,7 +8408,7 @@
+ 	(minus:SI (match_dup 1)
+ 		  (match_op_dup 2 [(match_dup 3) (match_dup 4)])))]
+   "TARGET_32BIT"
+-  "sub%.\\t%0, %1, %3%S2"
++  "subs%?\\t%0, %1, %3%S2"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "3")
+    (set_attr "arch" "32,a,a")
+@@ -8416,7 +8424,7 @@
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r,r,r"))]
+   "TARGET_32BIT"
+-  "sub%.\\t%0, %1, %3%S2"
++  "subs%?\\t%0, %1, %3%S2"
+   [(set_attr "conds" "set")
+    (set_attr "shift" "3")
+    (set_attr "arch" "32,a,a")
+@@ -8704,7 +8712,14 @@
+     return \"\";
+   "
+   [(set_attr "conds" "use")
+-   (set_attr "type" "mov_reg,mov_reg,multiple")
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (if_then_else (match_operand 1 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (const_string "multiple")])
+    (set_attr "length" "4,4,8")]
+ )
+ 
+@@ -9500,8 +9515,8 @@
+                                         (const_string "alu_imm" )
+                                         (const_string "alu_sreg"))
+                           (const_string "alu_imm")
+-                          (const_string "alu_sreg")
+-                          (const_string "alu_sreg")])]
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_move_plus"
+@@ -9538,7 +9553,13 @@
+    sub%D4\\t%0, %2, #%n3\;mov%d4\\t%0, %1"
+   [(set_attr "conds" "use")
+    (set_attr "length" "4,4,8,8")
+-   (set_attr "type" "alu_sreg,alu_imm,multiple,multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 3 "const_int_operand" "")
++                                        (const_string "alu_imm" )
++                                        (const_string "alu_sreg"))
++                          (const_string "alu_imm")
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_arith_arith"
+@@ -9633,7 +9654,11 @@
+    %I5%d4\\t%0, %2, %3\;mov%D4\\t%0, %1"
+   [(set_attr "conds" "use")
+    (set_attr "length" "4,8")
+-   (set_attr "type" "alu_shift_reg,multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 3 "const_int_operand" "")
++                                        (const_string "alu_shift_imm" )
++                                        (const_string "alu_shift_reg"))
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_move_arith"
+@@ -9694,7 +9719,11 @@
+    %I5%D4\\t%0, %2, %3\;mov%d4\\t%0, %1"
+   [(set_attr "conds" "use")
+    (set_attr "length" "4,8")
+-   (set_attr "type" "alu_shift_reg,multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 3 "const_int_operand" "")
++                                        (const_string "alu_shift_imm" )
++                                        (const_string "alu_shift_reg"))
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_move_not"
+@@ -9801,7 +9830,12 @@
+   [(set_attr "conds" "use")
+    (set_attr "shift" "2")
+    (set_attr "length" "4,8,8")
+-   (set_attr "type" "mov_shift_reg,multiple,multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 3 "const_int_operand" "")
++                                        (const_string "mov_shift" )
++                                        (const_string "mov_shift_reg"))
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_move_shift"
+@@ -9839,7 +9873,12 @@
+   [(set_attr "conds" "use")
+    (set_attr "shift" "2")
+    (set_attr "length" "4,8,8")
+-   (set_attr "type" "mov_shift_reg,multiple,multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 3 "const_int_operand" "")
++                                        (const_string "mov_shift" )
++                                        (const_string "mov_shift_reg"))
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*ifcompare_shift_shift"
+@@ -9969,21 +10008,24 @@
+    (set_attr "type" "multiple")]
+ )
+ 
+-(define_insn "*if_neg_move"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
++(define_insn_and_split "*if_neg_move"
++  [(set (match_operand:SI 0 "s_register_operand" "=l,r")
+ 	(if_then_else:SI
+ 	 (match_operator 4 "arm_comparison_operator"
+ 	  [(match_operand 3 "cc_register" "") (const_int 0)])
+-	 (neg:SI (match_operand:SI 2 "s_register_operand" "r,r,r"))
+-	 (match_operand:SI 1 "arm_not_operand" "0,?rI,K")))]
+-  "TARGET_ARM"
+-  "@
+-   rsb%d4\\t%0, %2, #0
+-   mov%D4\\t%0, %1\;rsb%d4\\t%0, %2, #0
+-   mvn%D4\\t%0, #%B1\;rsb%d4\\t%0, %2, #0"
++	 (neg:SI (match_operand:SI 2 "s_register_operand" "l,r"))
++	 (match_operand:SI 1 "s_register_operand" "0,0")))]
++  "TARGET_32BIT"
++  "#"
++  "&& reload_completed"
++  [(cond_exec (match_op_dup 4 [(match_dup 3) (const_int 0)])
++	      (set (match_dup 0) (neg:SI (match_dup 2))))]
++  ""
+   [(set_attr "conds" "use")
+-   (set_attr "length" "4,8,8")
+-   (set_attr "type" "logic_shift_imm,multiple,multiple")]
++   (set_attr "length" "4")
++   (set_attr "arch" "t2,32")
++   (set_attr "enabled_for_depr_it" "yes,no")
++   (set_attr "type" "logic_shift_imm")]
+ )
+ 
+ (define_insn "*ifcompare_move_neg"
+@@ -10002,21 +10044,34 @@
+    (set_attr "type" "multiple")]
+ )
+ 
+-(define_insn "*if_move_neg"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
++(define_insn_and_split "*if_move_neg"
++  [(set (match_operand:SI 0 "s_register_operand" "=l,r")
+ 	(if_then_else:SI
+ 	 (match_operator 4 "arm_comparison_operator"
+ 	  [(match_operand 3 "cc_register" "") (const_int 0)])
+-	 (match_operand:SI 1 "arm_not_operand" "0,?rI,K")
+-	 (neg:SI (match_operand:SI 2 "s_register_operand" "r,r,r"))))]
+-  "TARGET_ARM"
+-  "@
+-   rsb%D4\\t%0, %2, #0
+-   mov%d4\\t%0, %1\;rsb%D4\\t%0, %2, #0
+-   mvn%d4\\t%0, #%B1\;rsb%D4\\t%0, %2, #0"
++	 (match_operand:SI 1 "s_register_operand" "0,0")
++	 (neg:SI (match_operand:SI 2 "s_register_operand" "l,r"))))]
++  "TARGET_32BIT"
++  "#"
++  "&& reload_completed"
++  [(cond_exec (match_dup 5)
++	      (set (match_dup 0) (neg:SI (match_dup 2))))]
++  {
++    machine_mode mode = GET_MODE (operands[3]);
++    rtx_code rc = GET_CODE (operands[4]);
++
++    if (mode == CCFPmode || mode == CCFPEmode)
++      rc = reverse_condition_maybe_unordered (rc);
++    else
++      rc = reverse_condition (rc);
++
++    operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, operands[3], const0_rtx);
++  }
+   [(set_attr "conds" "use")
+-   (set_attr "length" "4,8,8")
+-   (set_attr "type" "logic_shift_imm,multiple,multiple")]
++   (set_attr "length" "4")
++   (set_attr "arch" "t2,32")
++   (set_attr "enabled_for_depr_it" "yes,no")
++   (set_attr "type" "logic_shift_imm")]
+ )
+ 
+ (define_insn "*arith_adjacentmem"
+@@ -10077,7 +10132,7 @@
+ 	if (val1 == 4 || val2 == 4)
+ 	  /* Other val must be 8, since we know they are adjacent and neither
+ 	     is zero.  */
+-	  output_asm_insn (\"ldm%(ib%)\\t%0, {%1, %2}\", ldm);
++	  output_asm_insn (\"ldmib%?\\t%0, {%1, %2}\", ldm);
+ 	else if (const_ok_for_arm (val1) || const_ok_for_arm (-val1))
+ 	  {
+ 	    ldm[0] = ops[0] = operands[4];
+@@ -10085,9 +10140,9 @@
+ 	    ops[2] = GEN_INT (val1);
+ 	    output_add_immediate (ops);
+ 	    if (val1 < val2)
+-	      output_asm_insn (\"ldm%(ia%)\\t%0, {%1, %2}\", ldm);
++	      output_asm_insn (\"ldmia%?\\t%0, {%1, %2}\", ldm);
+ 	    else
+-	      output_asm_insn (\"ldm%(da%)\\t%0, {%1, %2}\", ldm);
++	      output_asm_insn (\"ldmda%?\\t%0, {%1, %2}\", ldm);
+ 	  }
+ 	else
+ 	  {
+@@ -10104,16 +10159,16 @@
+     else if (val1 != 0)
+       {
+ 	if (val1 < val2)
+-	  output_asm_insn (\"ldm%(da%)\\t%0, {%1, %2}\", ldm);
++	  output_asm_insn (\"ldmda%?\\t%0, {%1, %2}\", ldm);
+ 	else
+-	  output_asm_insn (\"ldm%(ia%)\\t%0, {%1, %2}\", ldm);
++	  output_asm_insn (\"ldmia%?\\t%0, {%1, %2}\", ldm);
+       }
+     else
+       {
+ 	if (val1 < val2)
+-	  output_asm_insn (\"ldm%(ia%)\\t%0, {%1, %2}\", ldm);
++	  output_asm_insn (\"ldmia%?\\t%0, {%1, %2}\", ldm);
+ 	else
+-	  output_asm_insn (\"ldm%(da%)\\t%0, {%1, %2}\", ldm);
++	  output_asm_insn (\"ldmda%?\\t%0, {%1, %2}\", ldm);
+       }
+     output_asm_insn (\"%I3%?\\t%0, %1, %2\", arith);
+     return \"\";
+@@ -10449,9 +10504,7 @@
+ 	int i;
+ 	char pattern[100];
+ 
+-	if (TARGET_ARM)
+-	    strcpy (pattern, \"stm%(fd%)\\t%m0!, {%1\");
+-	else if (TARGET_THUMB2)
++	if (TARGET_32BIT)
+ 	    strcpy (pattern, \"push%?\\t{%1\");
+ 	else
+ 	    strcpy (pattern, \"push\\t{%1\");
+@@ -10920,7 +10973,7 @@
+  [(set_attr "predicable" "yes")
+   (set_attr "predicable_short_it" "no")
+   (set_attr "length" "4")
+-  (set_attr "type" "mov_imm")]
++  (set_attr "type" "alu_sreg")]
+ )
+ 
+ (define_insn "*arm_rev"
+@@ -10994,6 +11047,75 @@
+   ""
+ )
+ 
++;; ARM-specific expansion of signed mod by power of 2
++;; using conditional negate.
++;; For r0 % n where n is a power of 2 produce:
++;; rsbs    r1, r0, #0
++;; and     r0, r0, #(n - 1)
++;; and     r1, r1, #(n - 1)
++;; rsbpl   r0, r1, #0
++
++(define_expand "modsi3"
++  [(match_operand:SI 0 "register_operand" "")
++   (match_operand:SI 1 "register_operand" "")
++   (match_operand:SI 2 "const_int_operand" "")]
++  "TARGET_32BIT"
++  {
++    HOST_WIDE_INT val = INTVAL (operands[2]);
++
++    if (val <= 0
++       || exact_log2 (val) <= 0)
++      FAIL;
++
++    rtx mask = GEN_INT (val - 1);
++
++    /* In the special case of x0 % 2 we can do the even shorter:
++	cmp     r0, #0
++	and     r0, r0, #1
++	rsblt   r0, r0, #0.  */
++
++    if (val == 2)
++      {
++	rtx cc_reg = arm_gen_compare_reg (LT,
++					  operands[1], const0_rtx, NULL_RTX);
++	rtx cond = gen_rtx_LT (SImode, cc_reg, const0_rtx);
++	rtx masked = gen_reg_rtx (SImode);
++
++	emit_insn (gen_andsi3 (masked, operands[1], mask));
++	emit_move_insn (operands[0],
++			gen_rtx_IF_THEN_ELSE (SImode, cond,
++					      gen_rtx_NEG (SImode,
++							   masked),
++					      masked));
++	DONE;
++      }
++
++    rtx neg_op = gen_reg_rtx (SImode);
++    rtx_insn *insn = emit_insn (gen_subsi3_compare0 (neg_op, const0_rtx,
++						      operands[1]));
++
++    /* Extract the condition register and mode.  */
++    rtx cmp = XVECEXP (PATTERN (insn), 0, 0);
++    rtx cc_reg = SET_DEST (cmp);
++    rtx cond = gen_rtx_GE (SImode, cc_reg, const0_rtx);
++
++    emit_insn (gen_andsi3 (operands[0], operands[1], mask));
++
++    rtx masked_neg = gen_reg_rtx (SImode);
++    emit_insn (gen_andsi3 (masked_neg, neg_op, mask));
++
++    /* We want a conditional negate here, but emitting COND_EXEC rtxes
++       during expand does not always work.  Do an IF_THEN_ELSE instead.  */
++    emit_move_insn (operands[0],
++		    gen_rtx_IF_THEN_ELSE (SImode, cond,
++					  gen_rtx_NEG (SImode, masked_neg),
++					  operands[0]));
++
++
++    DONE;
++  }
++)
++
+ (define_expand "bswapsi2"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+   	(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
+--- a/src/gcc/config/arm/arm.opt
++++ b/src/gcc/config/arm/arm.opt
+@@ -122,6 +122,10 @@ Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP)
+ EnumValue
+ Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD)
+ 
++mflip-thumb
++Target Report Var(TARGET_FLIP_THUMB) Undocumented
++Switch ARM/Thumb modes on alternating functions for compiler testing
++
+ mfp16-format=
+ Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE)
+ Specify the __fp16 floating-point format
+@@ -182,7 +186,7 @@ Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFA
+ Specify the minimum bit alignment of structures
+ 
+ mthumb
+-Target Report RejectNegative Mask(THUMB)
++Target Report RejectNegative Mask(THUMB) Save
+ Generate code for Thumb state
+ 
+ mthumb-interwork
+@@ -246,7 +250,7 @@ Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
+ Only generate absolute relocations on word sized values.
+ 
+ mrestrict-it
+-Target Report Var(arm_restrict_it) Init(2)
++Target Report Var(arm_restrict_it) Init(2) Save
+ Generate IT blocks appropriate for ARMv8.
+ 
+ mold-rtx-costs
+@@ -275,5 +279,5 @@ Target Report Var(target_slow_flash_data) Init(0)
+ Assume loading data from flash is slower than fetching instructions.
+ 
+ masm-syntax-unified
+-Target Report Var(inline_asm_unified) Init(0)
+-Assume unified syntax for Thumb inline assembly code.
++Target Report Var(inline_asm_unified) Init(0) Save
++Assume unified syntax for inline assembly code.
+--- a/src/gcc/config/arm/arm1020e.md
++++ b/src/gcc/config/arm/arm1020e.md
+@@ -246,13 +246,14 @@
+       (eq_attr "type" "branch"))
+  "1020a_e")
+ 
+-;; The latency for a call is not predictable.  Therefore, we use 32 as
+-;; roughly equivalent to positive infinity.
++;; The latency for a call is not predictable.  Therefore, we model as blocking
++;; execution for a number of cycles but we can't do anything more accurate
++;; than that.
+ 
+ (define_insn_reservation "1020call_op" 32
+  (and (eq_attr "tune" "arm1020e,arm1022e")
+       (eq_attr "type" "call"))
+- "1020a_e*32")
++ "1020a_e*4")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; VFP
+@@ -300,12 +301,12 @@
+ (define_insn_reservation "v10_fdivs" 18
+  (and (eq_attr "vfp10" "yes")
+       (eq_attr "type" "fdivs, fsqrts"))
+- "1020a_e+v10_ds*14")
++ "1020a_e+v10_ds*4")
+ 
+ (define_insn_reservation "v10_fdivd" 32
+  (and (eq_attr "vfp10" "yes")
+       (eq_attr "type" "fdivd, fsqrtd"))
+- "1020a_e+v10_fmac+v10_ds*28")
++ "1020a_e+v10_fmac+v10_ds*4")
+ 
+ (define_insn_reservation "v10_floads" 4
+  (and (eq_attr "vfp10" "yes")
+--- a/src/gcc/config/arm/arm_neon.h
++++ b/src/gcc/config/arm/arm_neon.h
+@@ -41,7 +41,10 @@ typedef __simd64_int8_t int8x8_t;
+ typedef __simd64_int16_t int16x4_t;
+ typedef __simd64_int32_t int32x2_t;
+ typedef __builtin_neon_di int64x1_t;
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef __fp16 float16_t;
+ typedef __simd64_float16_t float16x4_t;
++#endif
+ typedef __simd64_float32_t float32x2_t;
+ typedef __simd64_poly8_t poly8x8_t;
+ typedef __simd64_poly16_t poly16x4_t;
+@@ -57,6 +60,9 @@ typedef __simd128_int8_t int8x16_t;
+ typedef __simd128_int16_t int16x8_t;
+ typedef __simd128_int32_t int32x4_t;
+ typedef __simd128_int64_t int64x2_t;
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef __simd128_float16_t float16x8_t;
++#endif
+ typedef __simd128_float32_t float32x4_t;
+ typedef __simd128_poly8_t poly8x16_t;
+ typedef __simd128_poly16_t poly16x8_t;
+@@ -160,6 +166,20 @@ typedef struct uint64x2x2_t
+   uint64x2_t val[2];
+ } uint64x2x2_t;
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x4x2_t
++{
++  float16x4_t val[2];
++} float16x4x2_t;
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x8x2_t
++{
++  float16x8_t val[2];
++} float16x8x2_t;
++#endif
++
+ typedef struct float32x2x2_t
+ {
+   float32x2_t val[2];
+@@ -286,6 +306,20 @@ typedef struct uint64x2x3_t
+   uint64x2_t val[3];
+ } uint64x2x3_t;
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x4x3_t
++{
++  float16x4_t val[3];
++} float16x4x3_t;
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x8x3_t
++{
++  float16x8_t val[3];
++} float16x8x3_t;
++#endif
++
+ typedef struct float32x2x3_t
+ {
+   float32x2_t val[3];
+@@ -412,6 +446,20 @@ typedef struct uint64x2x4_t
+   uint64x2_t val[4];
+ } uint64x2x4_t;
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x4x4_t
++{
++  float16x4_t val[4];
++} float16x4x4_t;
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++typedef struct float16x8x4_t
++{
++  float16x8_t val[4];
++} float16x8x4_t;
++#endif
++
+ typedef struct float32x2x4_t
+ {
+   float32x2_t val[4];
+@@ -1111,6 +1159,56 @@ vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b)
+   return (int32x4_t)__builtin_neon_vqrdmulhv4si (__a, __b);
+ }
+ 
++#ifdef __ARM_FEATURE_QRDMX
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlah_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
++{
++  return (int16x4_t)__builtin_neon_vqrdmlahv4hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlah_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
++{
++  return (int32x2_t)__builtin_neon_vqrdmlahv2si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlahq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
++{
++  return (int16x8_t)__builtin_neon_vqrdmlahv8hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlahq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
++{
++  return (int32x4_t)__builtin_neon_vqrdmlahv4si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlsh_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c)
++{
++  return (int16x4_t)__builtin_neon_vqrdmlshv4hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlsh_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c)
++{
++  return (int32x2_t)__builtin_neon_vqrdmlshv2si (__a, __b, __c);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlshq_s16 (int16x8_t __a, int16x8_t __b, int16x8_t __c)
++{
++  return (int16x8_t)__builtin_neon_vqrdmlshv8hi (__a, __b, __c);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlshq_s32 (int32x4_t __a, int32x4_t __b, int32x4_t __c)
++{
++  return (int32x4_t)__builtin_neon_vqrdmlshv4si (__a, __b, __c);
++}
++#endif
++
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vmull_s8 (int8x8_t __a, int8x8_t __b)
+ {
+@@ -5201,6 +5299,21 @@ vget_lane_s32 (int32x2_t __a, const int __b)
+   return (int32_t)__builtin_neon_vget_lanev2si (__a, __b);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++/* Functions cannot accept or return __FP16 types.  Even if the function
++   were marked always-inline so there were no call sites, the declaration
++   would nonetheless raise an error.  Hence, we must use a macro instead.  */
++
++#define vget_lane_f16(__v, __idx)		\
++  __extension__					\
++    ({						\
++      float16x4_t __vec = (__v);		\
++      __builtin_arm_lane_check (4, __idx);	\
++      float16_t __res = __vec[__idx];		\
++      __res;					\
++    })
++#endif
++
+ __extension__ static __inline float32_t __attribute__ ((__always_inline__))
+ vget_lane_f32 (float32x2_t __a, const int __b)
+ {
+@@ -5267,6 +5380,17 @@ vgetq_lane_s32 (int32x4_t __a, const int __b)
+   return (int32_t)__builtin_neon_vget_lanev4si (__a, __b);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define vgetq_lane_f16(__v, __idx)		\
++  __extension__					\
++    ({						\
++      float16x8_t __vec = (__v);		\
++      __builtin_arm_lane_check (8, __idx);	\
++      float16_t __res = __vec[__idx];		\
++      __res;					\
++    })
++#endif
++
+ __extension__ static __inline float32_t __attribute__ ((__always_inline__))
+ vgetq_lane_f32 (float32x4_t __a, const int __b)
+ {
+@@ -5333,6 +5457,18 @@ vset_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
+   return (int32x2_t)__builtin_neon_vset_lanev2si ((__builtin_neon_si) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define vset_lane_f16(__e, __v, __idx)		\
++  __extension__					\
++    ({						\
++      float16_t __elem = (__e);			\
++      float16x4_t __vec = (__v);		\
++      __builtin_arm_lane_check (4, __idx);	\
++      __vec[__idx] = __elem;			\
++      __vec;					\
++    })
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vset_lane_f32 (float32_t __a, float32x2_t __b, const int __c)
+ {
+@@ -5399,6 +5535,18 @@ vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __c)
+   return (int32x4_t)__builtin_neon_vset_lanev4si ((__builtin_neon_si) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define vsetq_lane_f16(__e, __v, __idx)		\
++  __extension__					\
++    ({						\
++      float16_t __elem = (__e);			\
++      float16x8_t __vec = (__v);		\
++      __builtin_arm_lane_check (8, __idx);	\
++      __vec[__idx] = __elem;			\
++      __vec;					\
++    })
++#endif
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __c)
+ {
+@@ -5479,6 +5627,14 @@ vcreate_s64 (uint64_t __a)
+   return (int64x1_t)__builtin_neon_vcreatedi ((__builtin_neon_di) __a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vcreate_f16 (uint64_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vcreate_f32 (uint64_t __a)
+ {
+@@ -5981,6 +6137,14 @@ vcombine_s64 (int64x1_t __a, int64x1_t __b)
+   return (int64x2_t)__builtin_neon_vcombinedi (__a, __b);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vcombine_f16 (float16x4_t __a, float16x4_t __b)
++{
++  return __builtin_neon_vcombinev4hf (__a, __b);
++}
++#endif
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vcombine_f32 (float32x2_t __a, float32x2_t __b)
+ {
+@@ -6055,6 +6219,14 @@ vget_high_s64 (int64x2_t __a)
+   return (int64x1_t)__builtin_neon_vget_highv2di (__a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vget_high_f16 (float16x8_t __a)
++{
++  return __builtin_neon_vget_highv8hf (__a);
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vget_high_f32 (float32x4_t __a)
+ {
+@@ -6115,6 +6287,14 @@ vget_low_s32 (int32x4_t __a)
+   return (int32x2_t)__builtin_neon_vget_lowv4si (__a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vget_low_f16 (float16x8_t __a)
++{
++  return __builtin_neon_vget_lowv8hf (__a);
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vget_low_f32 (float32x4_t __a)
+ {
+@@ -6220,21 +6400,25 @@ vcvtq_u32_f32 (float32x4_t __a)
+ }
+ 
+ #if ((__ARM_FP & 0x2) != 0)
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
+ vcvt_f16_f32 (float32x4_t __a)
+ {
+   return (float16x4_t)__builtin_neon_vcvtv4hfv4sf (__a);
+ }
+-
+ #endif
++#endif
++
+ #if ((__ARM_FP & 0x2) != 0)
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vcvt_f32_f16 (float16x4_t __a)
+ {
+   return (float32x4_t)__builtin_neon_vcvtv4sfv4hf (__a);
+ }
+-
+ #endif
++#endif
++
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vcvt_n_s32_f32 (float32x2_t __a, const int __b)
+ {
+@@ -6907,6 +7091,56 @@ vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c)
+   return (int32x2_t)__builtin_neon_vqrdmulh_lanev2si (__a, __b, __c);
+ }
+ 
++#ifdef __ARM_FEATURE_QRDMX
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlahq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
++{
++  return (int16x8_t)__builtin_neon_vqrdmlah_lanev8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlahq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
++{
++  return (int32x4_t)__builtin_neon_vqrdmlah_lanev4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlah_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
++{
++  return (int16x4_t)__builtin_neon_vqrdmlah_lanev4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlah_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
++{
++  return (int32x2_t)__builtin_neon_vqrdmlah_lanev2si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vqrdmlshq_lane_s16 (int16x8_t __a, int16x8_t __b, int16x4_t __c, const int __d)
++{
++  return (int16x8_t)__builtin_neon_vqrdmlsh_lanev8hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vqrdmlshq_lane_s32 (int32x4_t __a, int32x4_t __b, int32x2_t __c, const int __d)
++{
++  return (int32x4_t)__builtin_neon_vqrdmlsh_lanev4si (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vqrdmlsh_lane_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c, const int __d)
++{
++  return (int16x4_t)__builtin_neon_vqrdmlsh_lanev4hi (__a, __b, __c, __d);
++}
++
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vqrdmlsh_lane_s32 (int32x2_t __a, int32x2_t __b, int32x2_t __c, const int __d)
++{
++  return (int32x2_t)__builtin_neon_vqrdmlsh_lanev2si (__a, __b, __c, __d);
++}
++#endif
++
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vmul_n_s16 (int16x4_t __a, int16_t __b)
+ {
+@@ -8662,6 +8896,14 @@ vld1_s64 (const int64_t * __a)
+   return (int64x1_t)__builtin_neon_vld1di ((const __builtin_neon_di *) __a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_f16 (const float16_t * __a)
++{
++  return __builtin_neon_vld1v4hf (__a);
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_f32 (const float32_t * __a)
+ {
+@@ -8736,6 +8978,14 @@ vld1q_s64 (const int64_t * __a)
+   return (int64x2_t)__builtin_neon_vld1v2di ((const __builtin_neon_di *) __a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_f16 (const float16_t * __a)
++{
++  return __builtin_neon_vld1v8hf (__a);
++}
++#endif
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_f32 (const float32_t * __a)
+ {
+@@ -8796,6 +9046,14 @@ vld1_lane_s32 (const int32_t * __a, int32x2_t __b, const int __c)
+   return (int32x2_t)__builtin_neon_vld1_lanev2si ((const __builtin_neon_si *) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_lane_f16 (const float16_t * __a, float16x4_t __b, const int __c)
++{
++  return vset_lane_f16 (*__a, __b, __c);
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_lane_f32 (const float32_t * __a, float32x2_t __b, const int __c)
+ {
+@@ -8870,6 +9128,14 @@ vld1q_lane_s32 (const int32_t * __a, int32x4_t __b, const int __c)
+   return (int32x4_t)__builtin_neon_vld1_lanev4si ((const __builtin_neon_si *) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_lane_f16 (const float16_t * __a, float16x8_t __b, const int __c)
++{
++  return vsetq_lane_f16 (*__a, __b, __c);
++}
++#endif
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_lane_f32 (const float32_t * __a, float32x4_t __b, const int __c)
+ {
+@@ -8944,6 +9210,15 @@ vld1_dup_s32 (const int32_t * __a)
+   return (int32x2_t)__builtin_neon_vld1_dupv2si ((const __builtin_neon_si *) __a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vld1_dup_f16 (const float16_t * __a)
++{
++  float16_t __f = *__a;
++  return (float16x4_t) { __f, __f, __f, __f };
++}
++#endif
++
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vld1_dup_f32 (const float32_t * __a)
+ {
+@@ -9018,6 +9293,15 @@ vld1q_dup_s32 (const int32_t * __a)
+   return (int32x4_t)__builtin_neon_vld1_dupv4si ((const __builtin_neon_si *) __a);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vld1q_dup_f16 (const float16_t * __a)
++{
++  float16_t __f = *__a;
++  return (float16x8_t) { __f, __f, __f, __f, __f, __f, __f, __f };
++}
++#endif
++
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vld1q_dup_f32 (const float32_t * __a)
+ {
+@@ -9106,6 +9390,14 @@ vst1_s64 (int64_t * __a, int64x1_t __b)
+   __builtin_neon_vst1di ((__builtin_neon_di *) __a, __b);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_f16 (float16_t * __a, float16x4_t __b)
++{
++  __builtin_neon_vst1v4hf (__a, __b);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1_f32 (float32_t * __a, float32x2_t __b)
+ {
+@@ -9180,6 +9472,14 @@ vst1q_s64 (int64_t * __a, int64x2_t __b)
+   __builtin_neon_vst1v2di ((__builtin_neon_di *) __a, __b);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_f16 (float16_t * __a, float16x8_t __b)
++{
++  __builtin_neon_vst1v8hf (__a, __b);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1q_f32 (float32_t * __a, float32x4_t __b)
+ {
+@@ -9240,6 +9540,14 @@ vst1_lane_s32 (int32_t * __a, int32x2_t __b, const int __c)
+   __builtin_neon_vst1_lanev2si ((__builtin_neon_si *) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1_lane_f16 (float16_t * __a, float16x4_t __b, const int __c)
++{
++  __builtin_neon_vst1_lanev4hf (__a, __b, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1_lane_f32 (float32_t * __a, float32x2_t __b, const int __c)
+ {
+@@ -9314,6 +9622,14 @@ vst1q_lane_s32 (int32_t * __a, int32x4_t __b, const int __c)
+   __builtin_neon_vst1_lanev4si ((__builtin_neon_si *) __a, __b, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst1q_lane_f16 (float16_t * __a, float16x8_t __b, const int __c)
++{
++  __builtin_neon_vst1_lanev8hf (__a, __b, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst1q_lane_f32 (float32_t * __a, float32x4_t __b, const int __c)
+ {
+@@ -9394,6 +9710,16 @@ vld2_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x2_t __attribute__ ((__always_inline__))
++vld2_f16 (const float16_t * __a)
++{
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __rv;
++  __rv.__o = __builtin_neon_vld2v4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+ vld2_f32 (const float32_t * __a)
+ {
+@@ -9492,6 +9818,16 @@ vld2q_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x2_t __attribute__ ((__always_inline__))
++vld2q_f16 (const float16_t * __a)
++{
++  union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv;
++  __rv.__o = __builtin_neon_vld2v8hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+ vld2q_f32 (const float32_t * __a)
+ {
+@@ -9567,6 +9903,17 @@ vld2_lane_s32 (const int32_t * __a, int32x2x2_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x2_t __attribute__ ((__always_inline__))
++vld2_lane_f16 (const float16_t * __a, float16x4x2_t __b, const int __c)
++{
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __rv;
++  __rv.__o = __builtin_neon_vld2_lanev4hf ( __a, __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+ vld2_lane_f32 (const float32_t * __a, float32x2x2_t __b, const int __c)
+ {
+@@ -9639,6 +9986,17 @@ vld2q_lane_s32 (const int32_t * __a, int32x4x2_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x2_t __attribute__ ((__always_inline__))
++vld2q_lane_f16 (const float16_t * __a, float16x8x2_t __b, const int __c)
++{
++  union { float16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  union { float16x8x2_t __i; __builtin_neon_oi __o; } __rv;
++  __rv.__o = __builtin_neon_vld2_lanev8hf (__a, __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__))
+ vld2q_lane_f32 (const float32_t * __a, float32x4x2_t __b, const int __c)
+ {
+@@ -9699,6 +10057,16 @@ vld2_dup_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x2_t __attribute__ ((__always_inline__))
++vld2_dup_f16 (const float16_t * __a)
++{
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __rv;
++  __rv.__o = __builtin_neon_vld2_dupv4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__))
+ vld2_dup_f32 (const float32_t * __a)
+ {
+@@ -9794,6 +10162,15 @@ vst2_s32 (int32_t * __a, int32x2x2_t __b)
+   __builtin_neon_vst2v2si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst2_f16 (float16_t * __a, float16x4x2_t __b)
++{
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
++  __builtin_neon_vst2v4hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2_f32 (float32_t * __a, float32x2x2_t __b)
+ {
+@@ -9880,6 +10257,15 @@ vst2q_s32 (int32_t * __a, int32x4x2_t __b)
+   __builtin_neon_vst2v4si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst2q_f16 (float16_t * __a, float16x8x2_t __b)
++{
++  union { float16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  __builtin_neon_vst2v8hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2q_f32 (float32_t * __a, float32x4x2_t __b)
+ {
+@@ -9943,6 +10329,15 @@ vst2_lane_s32 (int32_t * __a, int32x2x2_t __b, const int __c)
+   __builtin_neon_vst2_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst2_lane_f16 (float16_t * __a, float16x4x2_t __b, const int __c)
++{
++  union { float16x4x2_t __i; __builtin_neon_ti __o; } __bu = { __b };
++  __builtin_neon_vst2_lanev4hf (__a, __bu.__o, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2_lane_f32 (float32_t * __a, float32x2x2_t __b, const int __c)
+ {
+@@ -9999,6 +10394,15 @@ vst2q_lane_s32 (int32_t * __a, int32x4x2_t __b, const int __c)
+   __builtin_neon_vst2_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst2q_lane_f16 (float16_t * __a, float16x8x2_t __b, const int __c)
++{
++  union { float16x8x2_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  __builtin_neon_vst2_lanev8hf (__a, __bu.__o, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst2q_lane_f32 (float32_t * __a, float32x4x2_t __b, const int __c)
+ {
+@@ -10051,6 +10455,16 @@ vld3_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x3_t __attribute__ ((__always_inline__))
++vld3_f16 (const float16_t * __a)
++{
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __rv;
++  __rv.__o = __builtin_neon_vld3v4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+ vld3_f32 (const float32_t * __a)
+ {
+@@ -10149,6 +10563,16 @@ vld3q_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x3_t __attribute__ ((__always_inline__))
++vld3q_f16 (const float16_t * __a)
++{
++  union { float16x8x3_t __i; __builtin_neon_ci __o; } __rv;
++  __rv.__o = __builtin_neon_vld3v8hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+ vld3q_f32 (const float32_t * __a)
+ {
+@@ -10224,6 +10648,17 @@ vld3_lane_s32 (const int32_t * __a, int32x2x3_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x3_t __attribute__ ((__always_inline__))
++vld3_lane_f16 (const float16_t * __a, float16x4x3_t __b, const int __c)
++{
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __rv;
++  __rv.__o = __builtin_neon_vld3_lanev4hf (__a, __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+ vld3_lane_f32 (const float32_t * __a, float32x2x3_t __b, const int __c)
+ {
+@@ -10296,6 +10731,17 @@ vld3q_lane_s32 (const int32_t * __a, int32x4x3_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x3_t __attribute__ ((__always_inline__))
++vld3q_lane_f16 (const float16_t * __a, float16x8x3_t __b, const int __c)
++{
++  union { float16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
++  union { float16x8x3_t __i; __builtin_neon_ci __o; } __rv;
++  __rv.__o = __builtin_neon_vld3_lanev8hf (__a, __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__))
+ vld3q_lane_f32 (const float32_t * __a, float32x4x3_t __b, const int __c)
+ {
+@@ -10356,6 +10802,16 @@ vld3_dup_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x3_t __attribute__ ((__always_inline__))
++vld3_dup_f16 (const float16_t * __a)
++{
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __rv;
++  __rv.__o = __builtin_neon_vld3_dupv4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__))
+ vld3_dup_f32 (const float32_t * __a)
+ {
+@@ -10451,6 +10907,15 @@ vst3_s32 (int32_t * __a, int32x2x3_t __b)
+   __builtin_neon_vst3v2si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst3_f16 (float16_t * __a, float16x4x3_t __b)
++{
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
++  __builtin_neon_vst3v4hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst3_f32 (float32_t * __a, float32x2x3_t __b)
+ {
+@@ -10537,6 +11002,15 @@ vst3q_s32 (int32_t * __a, int32x4x3_t __b)
+   __builtin_neon_vst3v4si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst3q_f16 (float16_t * __a, float16x8x3_t __b)
++{
++  union { float16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
++  __builtin_neon_vst3v8hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst3q_f32 (float32_t * __a, float32x4x3_t __b)
+ {
+@@ -10600,6 +11074,15 @@ vst3_lane_s32 (int32_t * __a, int32x2x3_t __b, const int __c)
+   __builtin_neon_vst3_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst3_lane_f16 (float16_t * __a, float16x4x3_t __b, const int __c)
++{
++  union { float16x4x3_t __i; __builtin_neon_ei __o; } __bu = { __b };
++  __builtin_neon_vst3_lanev4hf (__a, __bu.__o, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst3_lane_f32 (float32_t * __a, float32x2x3_t __b, const int __c)
+ {
+@@ -10656,11 +11139,20 @@ vst3q_lane_s32 (int32_t * __a, int32x4x3_t __b, const int __c)
+   __builtin_neon_vst3_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+-vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c)
++vst3q_lane_f16 (float16_t * __a, float16x8x3_t __b, const int __c)
+ {
+-  union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
+-  __builtin_neon_vst3_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
++  union { float16x8x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
++  __builtin_neon_vst3_lanev8hf (__a, __bu.__o, __c);
++}
++#endif
++
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst3q_lane_f32 (float32_t * __a, float32x4x3_t __b, const int __c)
++{
++  union { float32x4x3_t __i; __builtin_neon_ci __o; } __bu = { __b };
++  __builtin_neon_vst3_lanev4sf ((__builtin_neon_sf *) __a, __bu.__o, __c);
+ }
+ 
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+@@ -10708,6 +11200,16 @@ vld4_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x4_t __attribute__ ((__always_inline__))
++vld4_f16 (const float16_t * __a)
++{
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __rv;
++  __rv.__o = __builtin_neon_vld4v4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+ vld4_f32 (const float32_t * __a)
+ {
+@@ -10806,6 +11308,16 @@ vld4q_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x4_t __attribute__ ((__always_inline__))
++vld4q_f16 (const float16_t * __a)
++{
++  union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv;
++  __rv.__o = __builtin_neon_vld4v8hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+ vld4q_f32 (const float32_t * __a)
+ {
+@@ -10881,6 +11393,18 @@ vld4_lane_s32 (const int32_t * __a, int32x2x4_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x4_t __attribute__ ((__always_inline__))
++vld4_lane_f16 (const float16_t * __a, float16x4x4_t __b, const int __c)
++{
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __rv;
++  __rv.__o = __builtin_neon_vld4_lanev4hf (__a,
++					   __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+ vld4_lane_f32 (const float32_t * __a, float32x2x4_t __b, const int __c)
+ {
+@@ -10953,6 +11477,18 @@ vld4q_lane_s32 (const int32_t * __a, int32x4x4_t __b, const int __c)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8x4_t __attribute__ ((__always_inline__))
++vld4q_lane_f16 (const float16_t * __a, float16x8x4_t __b, const int __c)
++{
++  union { float16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
++  union { float16x8x4_t __i; __builtin_neon_xi __o; } __rv;
++  __rv.__o = __builtin_neon_vld4_lanev8hf (__a,
++					   __bu.__o, __c);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__))
+ vld4q_lane_f32 (const float32_t * __a, float32x4x4_t __b, const int __c)
+ {
+@@ -11013,6 +11549,16 @@ vld4_dup_s32 (const int32_t * __a)
+   return __rv.__i;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4x4_t __attribute__ ((__always_inline__))
++vld4_dup_f16 (const float16_t * __a)
++{
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __rv;
++  __rv.__o = __builtin_neon_vld4_dupv4hf (__a);
++  return __rv.__i;
++}
++#endif
++
+ __extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__))
+ vld4_dup_f32 (const float32_t * __a)
+ {
+@@ -11108,6 +11654,15 @@ vst4_s32 (int32_t * __a, int32x2x4_t __b)
+   __builtin_neon_vst4v2si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst4_f16 (float16_t * __a, float16x4x4_t __b)
++{
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  __builtin_neon_vst4v4hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4_f32 (float32_t * __a, float32x2x4_t __b)
+ {
+@@ -11194,6 +11749,15 @@ vst4q_s32 (int32_t * __a, int32x4x4_t __b)
+   __builtin_neon_vst4v4si ((__builtin_neon_si *) __a, __bu.__o);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst4q_f16 (float16_t * __a, float16x8x4_t __b)
++{
++  union { float16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
++  __builtin_neon_vst4v8hf (__a, __bu.__o);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4q_f32 (float32_t * __a, float32x4x4_t __b)
+ {
+@@ -11257,6 +11821,15 @@ vst4_lane_s32 (int32_t * __a, int32x2x4_t __b, const int __c)
+   __builtin_neon_vst4_lanev2si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst4_lane_f16 (float16_t * __a, float16x4x4_t __b, const int __c)
++{
++  union { float16x4x4_t __i; __builtin_neon_oi __o; } __bu = { __b };
++  __builtin_neon_vst4_lanev4hf (__a, __bu.__o, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4_lane_f32 (float32_t * __a, float32x2x4_t __b, const int __c)
+ {
+@@ -11313,6 +11886,15 @@ vst4q_lane_s32 (int32_t * __a, int32x4x4_t __b, const int __c)
+   __builtin_neon_vst4_lanev4si ((__builtin_neon_si *) __a, __bu.__o, __c);
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline void __attribute__ ((__always_inline__))
++vst4q_lane_f16 (float16_t * __a, float16x8x4_t __b, const int __c)
++{
++  union { float16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
++  __builtin_neon_vst4_lanev8hf (__a, __bu.__o, __c);
++}
++#endif
++
+ __extension__ static __inline void __attribute__ ((__always_inline__))
+ vst4q_lane_f32 (float32_t * __a, float32x4x4_t __b, const int __c)
+ {
+@@ -11824,212 +12406,334 @@ vornq_u64 (uint64x2_t __a, uint64x2_t __b)
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_p16 (poly16x4_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (poly8x8_t) __a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
++vreinterpret_p8_f16 (float16x4_t __a)
++{
++  return (poly8x8_t) __a;
++}
++#endif
++
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_f32 (float32x2_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_p64 (poly64x1_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_s64 (int64x1_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_u64 (uint64x1_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_s8 (int8x8_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_s16 (int16x4_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_s32 (int32x2_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_u8 (uint8x8_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_u16 (uint16x4_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_p8_u32 (uint32x2_t __a)
+ {
+-  return (poly8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
++  return (poly8x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_p8 (poly8x8_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (poly16x4_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
++vreinterpret_p16_f16 (float16x4_t __a)
++{
++  return (poly16x4_t) __a;
++}
++#endif
++
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_f32 (float32x2_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_p64 (poly64x1_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_s64 (int64x1_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_u64 (uint64x1_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_s8 (int8x8_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_s16 (int16x4_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_s32 (int32x2_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_u8 (uint8x8_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_u16 (uint16x4_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
++  return (poly16x4_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_p16_u32 (uint32x2_t __a)
+ {
+-  return (poly16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
++  return (poly16x4_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_p8 (poly8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_p16 (poly16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_f32 (float32x2_t __a)
++{
++  return (float16x4_t) __a;
+ }
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_p64 (poly64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s64 (int64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u64 (uint64x1_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s8 (int8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s16 (int16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_s32 (int32x2_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u8 (uint8x8_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u16 (uint16x4_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
++vreinterpret_f16_u32 (uint32x2_t __a)
++{
++  return (float16x4_t) __a;
++}
++#endif
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_p8 (poly8x8_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_p16 (poly16x4_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
++vreinterpret_f32_f16 (float16x4_t __a)
++{
++  return (float32x2_t) __a;
++}
++#endif
++
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_p64 (poly64x1_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a);
++  return (float32x2_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_s64 (int64x1_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfdi (__a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_u64 (uint64x1_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfdi ((int64x1_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_s8 (int8x8_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi (__a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_s16 (int16x4_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi (__a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_s32 (int32x2_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si (__a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_u8 (uint8x8_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv8qi ((int8x8_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_u16 (uint16x4_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv4hi ((int16x4_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_f32_u32 (uint32x2_t __a)
+ {
+-  return (float32x2_t)__builtin_neon_vreinterpretv2sfv2si ((int32x2_t) __a);
++  return (float32x2_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_p8 (poly8x8_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12037,15 +12741,26 @@ vreinterpret_p64_p8 (poly8x8_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_p16 (poly16x4_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#ifdef __ARM_FEATURE_CRYPTO
++__extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
++vreinterpret_p64_f16 (float16x4_t __a)
++{
++  return (poly64x1_t) __a;
++}
++#endif
++#endif
++
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_f32 (float32x2_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12053,7 +12768,7 @@ vreinterpret_p64_f32 (float32x2_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_s64 (int64x1_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdidi (__a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12061,7 +12776,7 @@ vreinterpret_p64_s64 (int64x1_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_u64 (uint64x1_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12069,7 +12784,7 @@ vreinterpret_p64_u64 (uint64x1_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_s8 (int8x8_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12077,7 +12792,7 @@ vreinterpret_p64_s8 (int8x8_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_s16 (int16x4_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12085,7 +12800,7 @@ vreinterpret_p64_s16 (int16x4_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_s32 (int32x2_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12093,7 +12808,7 @@ vreinterpret_p64_s32 (int32x2_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_u8 (uint8x8_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12101,7 +12816,7 @@ vreinterpret_p64_u8 (uint8x8_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_u16 (uint16x4_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+@@ -12109,571 +12824,643 @@ vreinterpret_p64_u16 (uint16x4_t __a)
+ __extension__ static __inline poly64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_p64_u32 (uint32x2_t __a)
+ {
+-  return (poly64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
++  return (poly64x1_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_p8 (poly8x8_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_p16 (poly16x4_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (int64x1_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vreinterpret_s64_f16 (float16x4_t __a)
++{
++  return (int64x1_t) __a;
+ }
++#endif
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_f32 (float32x2_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
++  return (int64x1_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_p64 (poly64x1_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdidi (__a);
++  return (int64x1_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_u64 (uint64x1_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdidi ((int64x1_t) __a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_s8 (int8x8_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_s16 (int16x4_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_s32 (int32x2_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_u8 (uint8x8_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_u16 (uint16x4_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_s64_u32 (uint32x2_t __a)
+ {
+-  return (int64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
++  return (int64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_p8 (poly8x8_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_p16 (poly16x4_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (uint64x1_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vreinterpret_u64_f16 (float16x4_t __a)
++{
++  return (uint64x1_t) __a;
++}
++#endif
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_f32 (float32x2_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv2sf (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_p64 (poly64x1_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_s64 (int64x1_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdidi (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_s8 (int8x8_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_s16 (int16x4_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_s32 (int32x2_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv2si (__a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_u8 (uint8x8_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv8qi ((int8x8_t) __a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_u16 (uint16x4_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv4hi ((int16x4_t) __a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vreinterpret_u64_u32 (uint32x2_t __a)
+ {
+-  return (uint64x1_t)__builtin_neon_vreinterpretdiv2si ((int32x2_t) __a);
++  return (uint64x1_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_p8 (poly8x8_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_p16 (poly16x4_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
++vreinterpret_s8_f16 (float16x4_t __a)
++{
++  return (int8x8_t) __a;
++}
++#endif
++
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_f32 (float32x2_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
++  return (int8x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_p64 (poly64x1_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (int8x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_s64 (int64x1_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_u64 (uint64x1_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_s16 (int16x4_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_s32 (int32x2_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_u8 (uint8x8_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_u16 (uint16x4_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_s8_u32 (uint32x2_t __a)
+ {
+-  return (int8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
++  return (int8x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_p8 (poly8x8_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_p16 (poly16x4_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
++vreinterpret_s16_f16 (float16x4_t __a)
++{
++  return (int16x4_t) __a;
++}
++#endif
++
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_f32 (float32x2_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
++  return (int16x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_p64 (poly64x1_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (int16x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_s64 (int64x1_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_u64 (uint64x1_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_s8 (int8x8_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_s32 (int32x2_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_u8 (uint8x8_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_u16 (uint16x4_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_s16_u32 (uint32x2_t __a)
+ {
+-  return (int16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
++  return (int16x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_p8 (poly8x8_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_p16 (poly16x4_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
++vreinterpret_s32_f16 (float16x4_t __a)
++{
++  return (int32x2_t) __a;
++}
++#endif
++
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_f32 (float32x2_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
++  return (int32x2_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_p64 (poly64x1_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
++  return (int32x2_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_s64 (int64x1_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_u64 (uint64x1_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_s8 (int8x8_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_s16 (int16x4_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_u8 (uint8x8_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_u16 (uint16x4_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_s32_u32 (uint32x2_t __a)
+ {
+-  return (int32x2_t)__builtin_neon_vreinterpretv2siv2si ((int32x2_t) __a);
++  return (int32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_p8 (poly8x8_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi ((int8x8_t) __a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_p16 (poly16x4_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (uint8x8_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
++vreinterpret_u8_f16 (float16x4_t __a)
++{
++  return (uint8x8_t) __a;
++}
++#endif
++
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_f32 (float32x2_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2sf (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_p64 (poly64x1_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_s64 (int64x1_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qidi (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_u64 (uint64x1_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qidi ((int64x1_t) __a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_s8 (int8x8_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv8qi (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_s16 (int16x4_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_s32 (int32x2_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si (__a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_u16 (uint16x4_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv4hi ((int16x4_t) __a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vreinterpret_u8_u32 (uint32x2_t __a)
+ {
+-  return (uint8x8_t)__builtin_neon_vreinterpretv8qiv2si ((int32x2_t) __a);
++  return (uint8x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_p8 (poly8x8_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_p16 (poly16x4_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi ((int16x4_t) __a);
++  return (uint16x4_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
++vreinterpret_u16_f16 (float16x4_t __a)
++{
++  return (uint16x4_t) __a;
+ }
++#endif
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_f32 (float32x2_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2sf (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_p64 (poly64x1_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_s64 (int64x1_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hidi (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_u64 (uint64x1_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hidi ((int64x1_t) __a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_s8 (int8x8_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_s16 (int16x4_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv4hi (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_s32 (int32x2_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si (__a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_u8 (uint8x8_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv8qi ((int8x8_t) __a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
+ vreinterpret_u16_u32 (uint32x2_t __a)
+ {
+-  return (uint16x4_t)__builtin_neon_vreinterpretv4hiv2si ((int32x2_t) __a);
++  return (uint16x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_p8 (poly8x8_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_p16 (poly16x4_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
++  return (uint32x2_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
++vreinterpret_u32_f16 (float16x4_t __a)
++{
++  return (uint32x2_t) __a;
+ }
++#endif
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_f32 (float32x2_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv2sf (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_p64 (poly64x1_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_s64 (int64x1_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2sidi (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_u64 (uint64x1_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2sidi ((int64x1_t) __a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_s8 (int8x8_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_s16 (int16x4_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_s32 (int32x2_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv2si (__a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_u8 (uint8x8_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv8qi ((int8x8_t) __a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+ vreinterpret_u32_u16 (uint16x4_t __a)
+ {
+-  return (uint32x2_t)__builtin_neon_vreinterpretv2siv4hi ((int16x4_t) __a);
++  return (uint32x2_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_p16 (poly16x8_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_p8_f16 (float16x8_t __a)
++{
++  return (poly8x16_t) __a;
++}
++#endif
++
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_f32 (float32x4_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
++  return (poly8x16_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_p64 (poly64x2_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ #endif
+@@ -12681,75 +13468,83 @@ vreinterpretq_p8_p64 (poly64x2_t __a)
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_p128 (poly128_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_s64 (int64x2_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_u64 (uint64x2_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_s8 (int8x16_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_s16 (int16x8_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_s32 (int32x4_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_u8 (uint8x16_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_u16 (uint16x8_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_p8_u32 (uint32x4_t __a)
+ {
+-  return (poly8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
++  return (poly8x16_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_p8 (poly8x16_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (poly16x8_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_p16_f16 (float16x8_t __a)
++{
++  return (poly16x8_t) __a;
++}
++#endif
++
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_f32 (float32x4_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
++  return (poly16x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_p64 (poly64x2_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (poly16x8_t)__a;
+ }
+ 
+ #endif
+@@ -12757,75 +13552,191 @@ vreinterpretq_p16_p64 (poly64x2_t __a)
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_p128 (poly128_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a);
++  return (poly16x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_s64 (int64x2_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_u64 (uint64x2_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_s8 (int8x16_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_s16 (int16x8_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_s32 (int32x4_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_u8 (uint8x16_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_u16 (uint16x8_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
++  return (poly16x8_t)__a;
+ }
+ 
+ __extension__ static __inline poly16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_p16_u32 (uint32x4_t __a)
+ {
+-  return (poly16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
++  return (poly16x8_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p8 (poly8x16_t __a)
++{
++  return (float16x8_t) __a;
+ }
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p16 (poly16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_f32 (float32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#ifdef __ARM_FEATURE_CRYPTO
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p64 (poly64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#ifdef __ARM_FEATURE_CRYPTO
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_p128 (poly128_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s64 (int64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u64 (uint64x2_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s8 (int8x16_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s16 (int16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_s32 (int32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u8 (uint8x16_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u16 (uint16x8_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_f16_u32 (uint32x4_t __a)
++{
++  return (float16x8_t) __a;
++}
++#endif
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_p8 (poly8x16_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_p16 (poly16x8_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
++  return (float32x4_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_f32_f16 (float16x8_t __a)
++{
++  return (float32x4_t) __a;
+ }
++#endif
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_p64 (poly64x2_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ #endif
+@@ -12833,63 +13744,63 @@ vreinterpretq_f32_p64 (poly64x2_t __a)
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_p128 (poly128_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfti ((__builtin_neon_ti) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_s64 (int64x2_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di (__a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_u64 (uint64x2_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv2di ((int64x2_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_s8 (int8x16_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi (__a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_s16 (int16x8_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi (__a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_s32 (int32x4_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si (__a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_u8 (uint8x16_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv16qi ((int8x16_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_u16 (uint16x8_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv8hi ((int16x8_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ __extension__ static __inline float32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_f32_u32 (uint32x4_t __a)
+ {
+-  return (float32x4_t)__builtin_neon_vreinterpretv4sfv4si ((int32x4_t) __a);
++  return (float32x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_p8 (poly8x16_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12897,15 +13808,26 @@ vreinterpretq_p64_p8 (poly8x16_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_p16 (poly16x8_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
++vreinterpretq_p64_f16 (float16x8_t __a)
++{
++  return (poly64x2_t) __a;
++}
++#endif
++#endif
++
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_f32 (float32x4_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12913,7 +13835,7 @@ vreinterpretq_p64_f32 (float32x4_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_p128 (poly128_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12921,7 +13843,7 @@ vreinterpretq_p64_p128 (poly128_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_s64 (int64x2_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div2di (__a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12929,7 +13851,7 @@ vreinterpretq_p64_s64 (int64x2_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_u64 (uint64x2_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12937,7 +13859,7 @@ vreinterpretq_p64_u64 (uint64x2_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_s8 (int8x16_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12945,7 +13867,7 @@ vreinterpretq_p64_s8 (int8x16_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_s16 (int16x8_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12953,7 +13875,7 @@ vreinterpretq_p64_s16 (int16x8_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_s32 (int32x4_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12961,7 +13883,7 @@ vreinterpretq_p64_s32 (int32x4_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_u8 (uint8x16_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12969,7 +13891,7 @@ vreinterpretq_p64_u8 (uint8x16_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_u16 (uint16x8_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12977,7 +13899,7 @@ vreinterpretq_p64_u16 (uint16x8_t __a)
+ __extension__ static __inline poly64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_p64_u32 (uint32x4_t __a)
+ {
+-  return (poly64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
++  return (poly64x2_t)__a;
+ }
+ 
+ #endif
+@@ -12985,7 +13907,7 @@ vreinterpretq_p64_u32 (uint32x4_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_p8 (poly8x16_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv16qi ((int8x16_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -12993,15 +13915,25 @@ vreinterpretq_p128_p8 (poly8x16_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_p16 (poly16x8_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv8hi ((int16x8_t) __a);
++  return (poly128_t)__a;
+ }
++#endif
+ 
++#ifdef __ARM_FEATURE_CRYPTO
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
++vreinterpretq_p128_f16 (float16x8_t __a)
++{
++  return (poly128_t) __a;
++}
++#endif
+ #endif
++
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_f32 (float32x4_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv4sf (__a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13009,7 +13941,7 @@ vreinterpretq_p128_f32 (float32x4_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_p64 (poly64x2_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv2di ((int64x2_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13017,7 +13949,7 @@ vreinterpretq_p128_p64 (poly64x2_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_s64 (int64x2_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv2di (__a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13025,7 +13957,7 @@ vreinterpretq_p128_s64 (int64x2_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_u64 (uint64x2_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv2di ((int64x2_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13033,7 +13965,7 @@ vreinterpretq_p128_u64 (uint64x2_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_s8 (int8x16_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv16qi (__a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13041,7 +13973,7 @@ vreinterpretq_p128_s8 (int8x16_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_s16 (int16x8_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv8hi (__a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13049,7 +13981,7 @@ vreinterpretq_p128_s16 (int16x8_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_s32 (int32x4_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv4si (__a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13057,7 +13989,7 @@ vreinterpretq_p128_s32 (int32x4_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_u8 (uint8x16_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv16qi ((int8x16_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13065,7 +13997,7 @@ vreinterpretq_p128_u8 (uint8x16_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_u16 (uint16x8_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv8hi ((int16x8_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+@@ -13073,33 +14005,41 @@ vreinterpretq_p128_u16 (uint16x8_t __a)
+ __extension__ static __inline poly128_t __attribute__ ((__always_inline__))
+ vreinterpretq_p128_u32 (uint32x4_t __a)
+ {
+-  return (poly128_t)__builtin_neon_vreinterprettiv4si ((int32x4_t) __a);
++  return (poly128_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_p8 (poly8x16_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_p16 (poly16x8_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
++vreinterpretq_s64_f16 (float16x8_t __a)
++{
++  return (int64x2_t) __a;
++}
++#endif
++
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_f32 (float32x4_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
++  return (int64x2_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_p64 (poly64x2_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ #endif
+@@ -13107,75 +14047,83 @@ vreinterpretq_s64_p64 (poly64x2_t __a)
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_p128 (poly128_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_u64 (uint64x2_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_s8 (int8x16_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_s16 (int16x8_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_s32 (int32x4_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_u8 (uint8x16_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_u16 (uint16x8_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_s64_u32 (uint32x4_t __a)
+ {
+-  return (int64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
++  return (int64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_p8 (poly8x16_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_p16 (poly16x8_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (uint64x2_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
++vreinterpretq_u64_f16 (float16x8_t __a)
++{
++  return (uint64x2_t) __a;
+ }
++#endif
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_f32 (float32x4_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div4sf (__a);
++  return (uint64x2_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_p64 (poly64x2_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div2di ((int64x2_t) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ #endif
+@@ -13183,75 +14131,83 @@ vreinterpretq_u64_p64 (poly64x2_t __a)
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_p128 (poly128_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2diti ((__builtin_neon_ti) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_s64 (int64x2_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div2di (__a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_s8 (int8x16_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi (__a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_s16 (int16x8_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi (__a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_s32 (int32x4_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div4si (__a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_u8 (uint8x16_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div16qi ((int8x16_t) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_u16 (uint16x8_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div8hi ((int16x8_t) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline uint64x2_t __attribute__ ((__always_inline__))
+ vreinterpretq_u64_u32 (uint32x4_t __a)
+ {
+-  return (uint64x2_t)__builtin_neon_vreinterpretv2div4si ((int32x4_t) __a);
++  return (uint64x2_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_p8 (poly8x16_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_p16 (poly16x8_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_s8_f16 (float16x8_t __a)
++{
++  return (int8x16_t) __a;
++}
++#endif
++
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_f32 (float32x4_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
++  return (int8x16_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_p64 (poly64x2_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ #endif
+@@ -13259,75 +14215,83 @@ vreinterpretq_s8_p64 (poly64x2_t __a)
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_p128 (poly128_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_s64 (int64x2_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_u64 (uint64x2_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_s16 (int16x8_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_s32 (int32x4_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_u8 (uint8x16_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_u16 (uint16x8_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_s8_u32 (uint32x4_t __a)
+ {
+-  return (int8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
++  return (int8x16_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_p8 (poly8x16_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_p16 (poly16x8_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_s16_f16 (float16x8_t __a)
++{
++  return (int16x8_t) __a;
++}
++#endif
++
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_f32 (float32x4_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
++  return (int16x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_p64 (poly64x2_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ #endif
+@@ -13335,75 +14299,83 @@ vreinterpretq_s16_p64 (poly64x2_t __a)
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_p128 (poly128_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_s64 (int64x2_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_u64 (uint64x2_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_s8 (int8x16_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_s32 (int32x4_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_u8 (uint8x16_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_u16 (uint16x8_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_s16_u32 (uint32x4_t __a)
+ {
+-  return (int16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
++  return (int16x8_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_p8 (poly8x16_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_p16 (poly16x8_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_s32_f16 (float16x8_t __a)
++{
++  return (int32x4_t)__a;
++}
++#endif
++
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_f32 (float32x4_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
++  return (int32x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_p64 (poly64x2_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ #endif
+@@ -13411,75 +14383,83 @@ vreinterpretq_s32_p64 (poly64x2_t __a)
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_p128 (poly128_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siti ((__builtin_neon_ti) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_s64 (int64x2_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_u64 (uint64x2_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_s8 (int8x16_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_s16 (int16x8_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_u8 (uint8x16_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_u16 (uint16x8_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_s32_u32 (uint32x4_t __a)
+ {
+-  return (int32x4_t)__builtin_neon_vreinterpretv4siv4si ((int32x4_t) __a);
++  return (int32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_p8 (poly8x16_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi ((int8x16_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_p16 (poly16x8_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
++vreinterpretq_u8_f16 (float16x8_t __a)
++{
++  return (uint8x16_t) __a;
++}
++#endif
++
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_f32 (float32x4_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4sf (__a);
++  return (uint8x16_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_p64 (poly64x2_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ #endif
+@@ -13487,75 +14467,83 @@ vreinterpretq_u8_p64 (poly64x2_t __a)
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_p128 (poly128_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiti ((__builtin_neon_ti) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_s64 (int64x2_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di (__a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_u64 (uint64x2_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv2di ((int64x2_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_s8 (int8x16_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv16qi (__a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_s16 (int16x8_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi (__a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_s32 (int32x4_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si (__a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_u16 (uint16x8_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv8hi ((int16x8_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+ vreinterpretq_u8_u32 (uint32x4_t __a)
+ {
+-  return (uint8x16_t)__builtin_neon_vreinterpretv16qiv4si ((int32x4_t) __a);
++  return (uint8x16_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_p8 (poly8x16_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_p16 (poly16x8_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi ((int16x8_t) __a);
++  return (uint16x8_t)__a;
++}
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
++vreinterpretq_u16_f16 (float16x8_t __a)
++{
++  return (uint16x8_t) __a;
+ }
++#endif
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_f32 (float32x4_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4sf (__a);
++  return (uint16x8_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_p64 (poly64x2_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ #endif
+@@ -13563,75 +14551,83 @@ vreinterpretq_u16_p64 (poly64x2_t __a)
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_p128 (poly128_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiti ((__builtin_neon_ti) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_s64 (int64x2_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di (__a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_u64 (uint64x2_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv2di ((int64x2_t) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_s8 (int8x16_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi (__a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_s16 (int16x8_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv8hi (__a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_s32 (int32x4_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si (__a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_u8 (uint8x16_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv16qi ((int8x16_t) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint16x8_t __attribute__ ((__always_inline__))
+ vreinterpretq_u16_u32 (uint32x4_t __a)
+ {
+-  return (uint16x8_t)__builtin_neon_vreinterpretv8hiv4si ((int32x4_t) __a);
++  return (uint16x8_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_p8 (poly8x16_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_p16 (poly16x8_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
++vreinterpretq_u32_f16 (float16x8_t __a)
++{
++  return (uint32x4_t) __a;
++}
++#endif
++
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_f32 (float32x4_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv4sf (__a);
++  return (uint32x4_t)__a;
+ }
+ 
+ #ifdef __ARM_FEATURE_CRYPTO
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_p64 (poly64x2_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ #endif
+@@ -13639,50 +14635,50 @@ vreinterpretq_u32_p64 (poly64x2_t __a)
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_p128 (poly128_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siti ((__builtin_neon_ti) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ #endif
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_s64 (int64x2_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di (__a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_u64 (uint64x2_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv2di ((int64x2_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_s8 (int8x16_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi (__a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_s16 (int16x8_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi (__a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_s32 (int32x4_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv4si (__a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_u8 (uint8x16_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv16qi ((int8x16_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ __extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+ vreinterpretq_u32_u16 (uint16x8_t __a)
+ {
+-  return (uint32x4_t)__builtin_neon_vreinterpretv4siv8hi ((int16x8_t) __a);
++  return (uint32x4_t)__a;
+ }
+ 
+ 
+--- a/src/gcc/config/arm/arm_neon_builtins.def
++++ b/src/gcc/config/arm/arm_neon_builtins.def
+@@ -45,6 +45,8 @@ VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si)
+ VAR4 (BINOP, vqrdmulh, v4hi, v2si, v8hi, v4si)
+ VAR2 (TERNOP, vqdmlal, v4hi, v2si)
+ VAR2 (TERNOP, vqdmlsl, v4hi, v2si)
++VAR4 (TERNOP, vqrdmlah, v4hi, v2si, v8hi, v4si)
++VAR4 (TERNOP, vqrdmlsh, v4hi, v2si, v8hi, v4si)
+ VAR3 (BINOP, vmullp, v8qi, v4hi, v2si)
+ VAR3 (BINOP, vmulls, v8qi, v4hi, v2si)
+ VAR3 (BINOP, vmullu, v8qi, v4hi, v2si)
+@@ -58,6 +60,8 @@ VAR4 (BINOP, vqdmulh_n, v4hi, v2si, v8hi, v4si)
+ VAR4 (BINOP, vqrdmulh_n, v4hi, v2si, v8hi, v4si)
+ VAR4 (SETLANE, vqdmulh_lane, v4hi, v2si, v8hi, v4si)
+ VAR4 (SETLANE, vqrdmulh_lane, v4hi, v2si, v8hi, v4si)
++VAR4 (MAC_LANE, vqrdmlah_lane, v4hi, v2si, v8hi, v4si)
++VAR4 (MAC_LANE, vqrdmlsh_lane, v4hi, v2si, v8hi, v4si)
+ VAR2 (BINOP, vqdmull, v4hi, v2si)
+ VAR8 (BINOP, vshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR8 (BINOP, vshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+@@ -67,28 +71,28 @@ VAR8 (BINOP, vqshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR8 (BINOP, vqshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR8 (BINOP, vqrshls, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR8 (BINOP, vqrshlu, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vrshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vrshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vshrn_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vrshrn_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqshrns_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqshrnu_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqrshrns_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqrshrnu_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqshrun_n, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vqrshrun_n, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vqshl_s_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vqshl_u_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (GETLANE, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR3 (GETLANE, vshlls_n, v8qi, v4hi, v2si)
+-VAR3 (GETLANE, vshllu_n, v8qi, v4hi, v2si)
+-VAR8 (SETLANE, vsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (SETLANE, vsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (SETLANE, vrsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (SETLANE, vrsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vrshrs_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vrshru_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vshrn_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vrshrn_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqshrns_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqshrnu_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqrshrns_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqrshrnu_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqshrun_n, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vqrshrun_n, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vshl_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vqshl_s_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vqshl_u_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (BINOP_IMM, vqshlu_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR3 (BINOP_IMM, vshlls_n, v8qi, v4hi, v2si)
++VAR3 (BINOP_IMM, vshllu_n, v8qi, v4hi, v2si)
++VAR8 (TERNOP_IMM, vsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (TERNOP_IMM, vsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (TERNOP_IMM, vrsras_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (TERNOP_IMM, vrsrau_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR2 (BINOP, vsub, v2sf, v4sf)
+ VAR3 (BINOP, vsubls, v8qi, v4hi, v2si)
+ VAR3 (BINOP, vsublu, v8qi, v4hi, v2si)
+@@ -140,8 +144,8 @@ VAR6 (BINOP, vpadals, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
+ VAR6 (BINOP, vpadalu, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
+ VAR2 (BINOP, vrecps, v2sf, v4sf)
+ VAR2 (BINOP, vrsqrts, v2sf, v4sf)
+-VAR8 (SETLANE, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+-VAR8 (SETLANE, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (TERNOP_IMM, vsri_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
++VAR8 (TERNOP_IMM, vsli_n, v8qi, v4hi, v2si, di, v16qi, v8hi, v4si, v2di)
+ VAR8 (UNOP, vabs, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
+ VAR6 (UNOP, vqabs, v8qi, v4hi, v2si, v16qi, v8hi, v4si)
+ VAR8 (UNOP, vneg, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
+@@ -162,11 +166,11 @@ VAR10 (SETLANE, vset_lane,
+ VAR5 (UNOP, vcreate, v8qi, v4hi, v2si, v2sf, di)
+ VAR10 (UNOP, vdup_n,
+ 	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR10 (BINOP, vdup_lane,
++VAR10 (GETLANE, vdup_lane,
+ 	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR5 (COMBINE, vcombine, v8qi, v4hi, v2si, v2sf, di)
+-VAR5 (UNOP, vget_high, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR5 (UNOP, vget_low, v16qi, v8hi, v4si, v4sf, v2di)
++VAR6 (COMBINE, vcombine, v8qi, v4hi, v4hf, v2si, v2sf, di)
++VAR6 (UNOP, vget_high, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
++VAR6 (UNOP, vget_low, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
+ VAR3 (UNOP, vmovn, v8hi, v4si, v2di)
+ VAR3 (UNOP, vqmovns, v8hi, v4si, v2di)
+ VAR3 (UNOP, vqmovnu, v8hi, v4si, v2di)
+@@ -174,23 +178,23 @@ VAR3 (UNOP, vqmovun, v8hi, v4si, v2di)
+ VAR3 (UNOP, vmovls, v8qi, v4hi, v2si)
+ VAR3 (UNOP, vmovlu, v8qi, v4hi, v2si)
+ VAR6 (SETLANE, vmul_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR6 (LANEMAC, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR2 (LANEMAC, vmlals_lane, v4hi, v2si)
+-VAR2 (LANEMAC, vmlalu_lane, v4hi, v2si)
+-VAR2 (LANEMAC, vqdmlal_lane, v4hi, v2si)
+-VAR6 (LANEMAC, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR2 (LANEMAC, vmlsls_lane, v4hi, v2si)
+-VAR2 (LANEMAC, vmlslu_lane, v4hi, v2si)
+-VAR2 (LANEMAC, vqdmlsl_lane, v4hi, v2si)
++VAR6 (MAC_LANE, vmla_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
++VAR2 (MAC_LANE, vmlals_lane, v4hi, v2si)
++VAR2 (MAC_LANE, vmlalu_lane, v4hi, v2si)
++VAR2 (MAC_LANE, vqdmlal_lane, v4hi, v2si)
++VAR6 (MAC_LANE, vmls_lane, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
++VAR2 (MAC_LANE, vmlsls_lane, v4hi, v2si)
++VAR2 (MAC_LANE, vmlslu_lane, v4hi, v2si)
++VAR2 (MAC_LANE, vqdmlsl_lane, v4hi, v2si)
+ VAR6 (BINOP, vmul_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR6 (LANEMAC, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR2 (LANEMAC, vmlals_n, v4hi, v2si)
+-VAR2 (LANEMAC, vmlalu_n, v4hi, v2si)
+-VAR2 (LANEMAC, vqdmlal_n, v4hi, v2si)
+-VAR6 (LANEMAC, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR2 (LANEMAC, vmlsls_n, v4hi, v2si)
+-VAR2 (LANEMAC, vmlslu_n, v4hi, v2si)
+-VAR2 (LANEMAC, vqdmlsl_n, v4hi, v2si)
++VAR6 (MAC_N, vmla_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
++VAR2 (MAC_N, vmlals_n, v4hi, v2si)
++VAR2 (MAC_N, vmlalu_n, v4hi, v2si)
++VAR2 (MAC_N, vqdmlal_n, v4hi, v2si)
++VAR6 (MAC_N, vmls_n, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
++VAR2 (MAC_N, vmlsls_n, v4hi, v2si)
++VAR2 (MAC_N, vmlslu_n, v4hi, v2si)
++VAR2 (MAC_N, vqdmlsl_n, v4hi, v2si)
+ VAR10 (SETLANE, vext,
+ 	 v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+ VAR8 (UNOP, vrev64, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf)
+@@ -231,51 +235,40 @@ VAR1 (TERNOP, vtbx1, v8qi)
+ VAR1 (TERNOP, vtbx2, v8qi)
+ VAR1 (TERNOP, vtbx3, v8qi)
+ VAR1 (TERNOP, vtbx4, v8qi)
+-VAR5 (UNOP, vreinterpretv8qi, v8qi, v4hi, v2si, v2sf, di)
+-VAR5 (UNOP, vreinterpretv4hi, v8qi, v4hi, v2si, v2sf, di)
+-VAR5 (UNOP, vreinterpretv2si, v8qi, v4hi, v2si, v2sf, di)
+-VAR5 (UNOP, vreinterpretv2sf, v8qi, v4hi, v2si, v2sf, di)
+-VAR5 (UNOP, vreinterpretdi, v8qi, v4hi, v2si, v2sf, di)
+-VAR6 (UNOP, vreinterpretv16qi, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR6 (UNOP, vreinterpretv8hi, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR6 (UNOP, vreinterpretv4si, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR6 (UNOP, vreinterpretv4sf, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR6 (UNOP, vreinterpretv2di, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR6 (UNOP, vreinterpretti, v16qi, v8hi, v4si, v4sf, v2di, ti)
+-VAR10 (LOAD1, vld1,
+-        v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
++VAR12 (LOAD1, vld1,
++        v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
+ VAR10 (LOAD1LANE, vld1_lane,
+ 	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+ VAR10 (LOAD1, vld1_dup,
+ 	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR10 (STORE1, vst1,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR10 (STORE1LANE, vst1_lane,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf, v2di)
+-VAR9 (LOAD1, vld2,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (LOAD1LANE, vld2_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR5 (LOAD1, vld2_dup, v8qi, v4hi, v2si, v2sf, di)
+-VAR9 (STORE1, vst2,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (STORE1LANE, vst2_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR9 (LOAD1, vld3,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (LOAD1LANE, vld3_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR5 (LOAD1, vld3_dup, v8qi, v4hi, v2si, v2sf, di)
+-VAR9 (STORE1, vst3,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (STORE1LANE, vst3_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR9 (LOAD1, vld4,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (LOAD1LANE, vld4_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
+-VAR5 (LOAD1, vld4_dup, v8qi, v4hi, v2si, v2sf, di)
+-VAR9 (STORE1, vst4,
+-	v8qi, v4hi, v2si, v2sf, di, v16qi, v8hi, v4si, v4sf)
+-VAR7 (STORE1LANE, vst4_lane,
+-	v8qi, v4hi, v2si, v2sf, v8hi, v4si, v4sf)
++VAR12 (STORE1, vst1,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
++VAR12 (STORE1LANE, vst1_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di)
++VAR11 (LOAD1, vld2,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (LOAD1LANE, vld2_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
++VAR6 (LOAD1, vld2_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
++VAR11 (STORE1, vst2,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (STORE1LANE, vst2_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
++VAR11 (LOAD1, vld3,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (LOAD1LANE, vld3_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
++VAR6 (LOAD1, vld3_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
++VAR11 (STORE1, vst3,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (STORE1LANE, vst3_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
++VAR11 (LOAD1, vld4,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (LOAD1LANE, vld4_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
++VAR6 (LOAD1, vld4_dup, v8qi, v4hi, v4hf, v2si, v2sf, di)
++VAR11 (STORE1, vst4,
++	v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)
++VAR9 (STORE1LANE, vst4_lane,
++	v8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)
+--- a/src/gcc/config/arm/bpabi.h
++++ b/src/gcc/config/arm/bpabi.h
+@@ -68,12 +68,15 @@
+    |mcpu=cortex-a15.cortex-a7				\
+    |mcpu=cortex-a17.cortex-a7				\
+    |mcpu=marvell-pj4					\
++   |mcpu=cortex-a32					\
++   |mcpu=cortex-a35					\
+    |mcpu=cortex-a53					\
+    |mcpu=cortex-a57					\
+    |mcpu=cortex-a57.cortex-a53				\
+    |mcpu=cortex-a72					\
+    |mcpu=cortex-a72.cortex-a53				\
+    |mcpu=exynos-m1                                      \
++   |mcpu=qdf24xx					\
+    |mcpu=xgene1                                         \
+    |mcpu=cortex-m1.small-multiply                       \
+    |mcpu=cortex-m0.small-multiply                       \
+@@ -84,6 +87,9 @@
+    |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7        \
+    |march=armv6-m|mcpu=cortex-m0                        \
+    |march=armv8-a					\
++   |march=armv8-a+crc					\
++   |march=armv8.1-a					\
++   |march=armv8.1-a+crc					\
+    :%{!r:--be8}}}"
+ #else
+ #define BE8_LINK_SPEC \
+@@ -93,12 +99,14 @@
+    |mcpu=cortex-a12|mcpu=cortex-a17			\
+    |mcpu=cortex-a15.cortex-a7				\
+    |mcpu=cortex-a17.cortex-a7				\
++   |mcpu=cortex-a35					\
+    |mcpu=cortex-a53					\
+    |mcpu=cortex-a57					\
+    |mcpu=cortex-a57.cortex-a53				\
+    |mcpu=cortex-a72					\
+    |mcpu=cortex-a72.cortex-a53				\
+    |mcpu=exynos-m1                                      \
++   |mcpu=qdf24xx					\
+    |mcpu=xgene1                                         \
+    |mcpu=cortex-m1.small-multiply                       \
+    |mcpu=cortex-m0.small-multiply                       \
+@@ -110,6 +118,9 @@
+    |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7        \
+    |march=armv6-m|mcpu=cortex-m0                        \
+    |march=armv8-a					\
++   |march=armv8-a+crc					\
++   |march=armv8.1-a					\
++   |march=armv8.1-a+crc					\
+    :%{!r:--be8}}}"
+ #endif
+ 
+--- a/src/gcc/config/arm/cortex-a53.md
++++ b/src/gcc/config/arm/cortex-a53.md
+@@ -22,345 +22,700 @@
+ (define_automaton "cortex_a53")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Functional units.
++;; General-purpose functional units.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-;; There are two main integer execution pipelines, described as
+-;; slot 0 and issue slot 1.
++;; We use slot0 and slot1 to model constraints on which instructions may
++;; dual-issue.
+ 
+ (define_cpu_unit "cortex_a53_slot0" "cortex_a53")
+ (define_cpu_unit "cortex_a53_slot1" "cortex_a53")
+ 
+-(define_reservation "cortex_a53_slot_any" "cortex_a53_slot0|cortex_a53_slot1")
+-(define_reservation "cortex_a53_single_issue" "cortex_a53_slot0+cortex_a53_slot1")
++(define_reservation "cortex_a53_slot_any"
++		    "cortex_a53_slot0\
++		     |cortex_a53_slot1")
+ 
+-;; The load/store pipeline.  Load/store instructions can dual-issue from
+-;; either pipeline, but two load/stores cannot simultaneously issue.
++(define_reservation "cortex_a53_single_issue"
++		    "cortex_a53_slot0\
++		     +cortex_a53_slot1")
+ 
+-(define_cpu_unit "cortex_a53_ls" "cortex_a53")
+-
+-;; The store pipeline.  Shared between both execution pipelines.
++;; Used to model load and store pipelines.  Load/store instructions
++;; can dual-issue with other instructions, but two load/stores cannot
++;; simultaneously issue.
+ 
+ (define_cpu_unit "cortex_a53_store" "cortex_a53")
++(define_cpu_unit "cortex_a53_load" "cortex_a53")
++(define_cpu_unit "cortex_a53_ls_agen" "cortex_a53")
+ 
+-;; The branch pipeline.  Branches can dual-issue with other instructions
+-;; (except when those instructions take multiple cycles to issue).
++;; Used to model a branch pipeline.  Branches can dual-issue with other
++;; instructions (except when those instructions take multiple cycles
++;; to issue).
+ 
+ (define_cpu_unit "cortex_a53_branch" "cortex_a53")
+ 
+-;; The integer divider.
++;; Used to model an integer divide pipeline.
+ 
+ (define_cpu_unit "cortex_a53_idiv" "cortex_a53")
+ 
+-;; The floating-point add pipeline used to model the usage
+-;; of the add pipeline by fmac instructions.
+-
+-(define_cpu_unit "cortex_a53_fpadd_pipe" "cortex_a53")
++;; Used to model an integer multiply/multiply-accumulate pipeline.
+ 
+-;; Floating-point div/sqrt (long latency, out-of-order completion).
++(define_cpu_unit "cortex_a53_imul" "cortex_a53")
+ 
+-(define_cpu_unit "cortex_a53_fp_div_sqrt" "cortex_a53")
++;; Model general structural hazards, for wherever we need them.
+ 
+-;; The Advanced SIMD pipelines.
+-
+-(define_cpu_unit "cortex_a53_simd0" "cortex_a53")
+-(define_cpu_unit "cortex_a53_simd1" "cortex_a53")
++(define_cpu_unit "cortex_a53_hazard" "cortex_a53")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; ALU instructions.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_alu" 2
++(define_insn_reservation "cortex_a53_shift" 2
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,\
+-                        alu_sreg,alus_sreg,logic_reg,logics_reg,\
+-                        adc_imm,adcs_imm,adc_reg,adcs_reg,\
+-                        adr,bfm,csel,clz,rbit,rev,alu_dsp_reg,\
+-                        shift_imm,shift_reg,\
+-                        mov_imm,mov_reg,mvn_imm,mvn_reg,\
+-                        mrs,multiple,no_insn"))
++       (eq_attr "type" "adr,shift_imm,shift_reg,mov_imm,mvn_imm"))
+   "cortex_a53_slot_any")
+ 
+-(define_insn_reservation "cortex_a53_alu_shift" 2
++(define_insn_reservation "cortex_a53_alu_rotate_imm" 2
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "alu_shift_imm,alus_shift_imm,\
+-                        crc,logic_shift_imm,logics_shift_imm,\
+-                        alu_ext,alus_ext,alu_shift_reg,alus_shift_reg,\
+-                        logic_shift_reg,logics_shift_reg,\
+-                        extend,mov_shift,mov_shift_reg,\
+-                        mvn_shift,mvn_shift_reg"))
+-  "cortex_a53_slot_any")
++       (eq_attr "type" "rotate_imm"))
++  "(cortex_a53_slot1)
++   | (cortex_a53_single_issue)")
+ 
+-;; Forwarding path for unshifted operands.
+-
+-(define_bypass 1 "cortex_a53_alu,cortex_a53_alu_shift"
+-  "cortex_a53_alu")
++(define_insn_reservation "cortex_a53_alu" 3
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "type" "alu_imm,alus_imm,logic_imm,logics_imm,
++			alu_sreg,alus_sreg,logic_reg,logics_reg,
++			adc_imm,adcs_imm,adc_reg,adcs_reg,
++			bfm,csel,clz,rbit,rev,alu_dsp_reg,
++			mov_reg,mvn_reg,
++			mrs,multiple,no_insn"))
++  "cortex_a53_slot_any")
+ 
+-(define_bypass 1 "cortex_a53_alu,cortex_a53_alu_shift"
+-  "cortex_a53_alu_shift"
+-  "arm_no_early_alu_shift_dep")
++(define_insn_reservation "cortex_a53_alu_shift" 3
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "type" "alu_shift_imm,alus_shift_imm,
++			crc,logic_shift_imm,logics_shift_imm,
++			alu_ext,alus_ext,
++			extend,mov_shift,mvn_shift"))
++  "cortex_a53_slot_any")
+ 
+-;; The multiplier pipeline can forward results so there's no need to specify
+-;; bypasses. Multiplies can only single-issue currently.
++(define_insn_reservation "cortex_a53_alu_shift_reg" 3
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "type" "alu_shift_reg,alus_shift_reg,
++			logic_shift_reg,logics_shift_reg,
++			mov_shift_reg,mvn_shift_reg"))
++  "cortex_a53_slot_any+cortex_a53_hazard")
+ 
+ (define_insn_reservation "cortex_a53_mul" 3
+   (and (eq_attr "tune" "cortexa53")
+        (ior (eq_attr "mul32" "yes")
+-            (eq_attr "mul64" "yes")))
+-  "cortex_a53_single_issue")
+-
+-;; A multiply with a single-register result or an MLA, followed by an
+-;; MLA with an accumulator dependency, has its result forwarded so two
+-;; such instructions can issue back-to-back.
+-
+-(define_bypass 1 "cortex_a53_mul"
+-               "cortex_a53_mul"
+-               "arm_mac_accumulator_is_mul_result")
++	    (eq_attr "mul64" "yes")))
++  "cortex_a53_slot_any+cortex_a53_imul")
+ 
+-;; Punt with a high enough latency for divides.
+-(define_insn_reservation "cortex_a53_udiv" 8
+-  (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "udiv"))
+-  "(cortex_a53_slot0+cortex_a53_idiv),cortex_a53_idiv*7")
++;; From the perspective of the GCC scheduling state machine, if we wish to
++;; model an instruction as serialising other instructions, we are best to do
++;; so by modelling it as taking very few cycles.  Scheduling many other
++;; instructions underneath it at the cost of freedom to pick from the
++;; ready list is likely to hurt us more than it helps.  However, we do
++;; want to model some resource and latency cost for divide instructions in
++;; order to avoid divides ending up too lumpy.
+ 
+-(define_insn_reservation "cortex_a53_sdiv" 9
++(define_insn_reservation "cortex_a53_div" 4
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "sdiv"))
+-  "(cortex_a53_slot0+cortex_a53_idiv),cortex_a53_idiv*8")
+-
+-
+-(define_bypass 2 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv"
+-               "cortex_a53_alu")
+-(define_bypass 2 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv"
+-               "cortex_a53_alu_shift"
+-               "arm_no_early_alu_shift_dep")
++       (eq_attr "type" "udiv,sdiv"))
++  "cortex_a53_slot0,cortex_a53_idiv*2")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; Load/store instructions.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-;; Address-generation happens in the issue stage.
++;; TODO: load<n> is not prescriptive about how much data is to be loaded.
++;; This is most obvious for LDRD from AArch32 and LDP (X register) from
++;; AArch64, both are tagged load2 but LDP will load 128-bits compared to
++;; LDRD which is 64-bits.
++;;
++;; For the below, we assume AArch64 X-registers for load2, and AArch32
++;; registers for load3/load4.
+ 
+-(define_insn_reservation "cortex_a53_load1" 3
++(define_insn_reservation "cortex_a53_load1" 4
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "load_byte,load1,load_acq"))
+-  "cortex_a53_slot_any+cortex_a53_ls")
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_load")
+ 
+ (define_insn_reservation "cortex_a53_store1" 2
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "store1,store_rel"))
+-  "cortex_a53_slot_any+cortex_a53_ls+cortex_a53_store")
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_store")
+ 
+-(define_insn_reservation "cortex_a53_load2" 3
++;; Model AArch64-sized LDP Xm, Xn, [Xa]
++
++(define_insn_reservation "cortex_a53_load2" 4
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "load2"))
+-  "cortex_a53_single_issue+cortex_a53_ls")
++  "cortex_a53_single_issue+cortex_a53_ls_agen,
++   cortex_a53_load+cortex_a53_slot0,
++   cortex_a53_load")
+ 
+ (define_insn_reservation "cortex_a53_store2" 2
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "store2"))
+-  "cortex_a53_single_issue+cortex_a53_ls+cortex_a53_store")
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_store")
++
++;; Model AArch32-sized LDM Ra, {Rm, Rn, Ro}
+ 
+-(define_insn_reservation "cortex_a53_load3plus" 4
++(define_insn_reservation "cortex_a53_load3plus" 6
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "load3,load4"))
+-  "(cortex_a53_single_issue+cortex_a53_ls)*2")
++  "cortex_a53_single_issue+cortex_a53_ls_agen,
++   cortex_a53_load+cortex_a53_slot0,
++   cortex_a53_load")
+ 
+-(define_insn_reservation "cortex_a53_store3plus" 3
++(define_insn_reservation "cortex_a53_store3plus" 2
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "store3,store4"))
+-  "(cortex_a53_single_issue+cortex_a53_ls+cortex_a53_store)*2")
+-
+-;; Load/store addresses are required early in Issue.
+-(define_bypass 3 "cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus,cortex_a53_alu,cortex_a53_alu_shift"
+-                 "cortex_a53_load*"
+-                 "arm_early_load_addr_dep")
+-(define_bypass 3 "cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus,cortex_a53_alu,cortex_a53_alu_shift"
+-                 "cortex_a53_store*"
+-                 "arm_early_store_addr_dep")
+-
+-;; Load data can forward in the ALU pipeline
+-(define_bypass 2 "cortex_a53_load1,cortex_a53_load2"
+-               "cortex_a53_alu")
+-(define_bypass 2 "cortex_a53_load1,cortex_a53_load2"
+-               "cortex_a53_alu_shift"
+-               "arm_no_early_alu_shift_dep")
+-
+-;; ALU ops can forward to stores.
+-(define_bypass 0 "cortex_a53_alu,cortex_a53_alu_shift"
+-                 "cortex_a53_store1,cortex_a53_store2,cortex_a53_store3plus"
+-                 "arm_no_early_store_addr_dep")
+-
+-(define_bypass 1 "cortex_a53_mul,cortex_a53_udiv,cortex_a53_sdiv,cortex_a53_load1,cortex_a53_load2,cortex_a53_load3plus"
+-                 "cortex_a53_store1,cortex_a53_store2,cortex_a53_store3plus"
+-                 "arm_no_early_store_addr_dep")
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_store+cortex_a53_slot0,
++   cortex_a53_store")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; Branches.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-;; Currently models all branches as dual-issuable from either execution
+-;; slot, which isn't true for all cases. We still need to model indirect
+-;; branches.
++;; Model all branches as dual-issuable from either execution, which
++;; is not strictly true for all cases (indirect branches).
+ 
+ (define_insn_reservation "cortex_a53_branch" 0
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "branch,call"))
+-  "cortex_a53_slot_any+cortex_a53_branch")
++  "cortex_a53_slot_any,cortex_a53_branch")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; General-purpose register bypasses
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; Model bypasses for unshifted operands to ALU instructions.
++
++(define_bypass 1 "cortex_a53_shift"
++		 "cortex_a53_shift")
++
++(define_bypass 1 "cortex_a53_alu,
++		  cortex_a53_alu_shift*,
++		  cortex_a53_alu_rotate_imm,
++		  cortex_a53_shift"
++		 "cortex_a53_alu")
++
++(define_bypass 2 "cortex_a53_alu,
++		  cortex_a53_alu_shift*"
++		 "cortex_a53_alu_shift*"
++		 "aarch_forward_to_shift_is_not_shifted_reg")
++
++;; In our model, we allow any general-purpose register operation to
++;; bypass to the accumulator operand of an integer MADD-like operation.
++
++(define_bypass 1 "cortex_a53_alu*,
++		  cortex_a53_load*,
++		  cortex_a53_mul"
++		 "cortex_a53_mul"
++		 "aarch_accumulator_forwarding")
++
++;; Model a bypass from MLA/MUL to many ALU instructions.
++
++(define_bypass 2 "cortex_a53_mul"
++		 "cortex_a53_alu,
++		  cortex_a53_alu_shift*")
++
++;; We get neater schedules by allowing an MLA/MUL to feed an
++;; early load address dependency to a load.
++
++(define_bypass 2 "cortex_a53_mul"
++		 "cortex_a53_load*"
++		 "arm_early_load_addr_dep")
++
++;; Model bypasses for loads which are to be consumed by the ALU.
++
++(define_bypass 2 "cortex_a53_load1"
++		 "cortex_a53_alu")
++
++(define_bypass 3 "cortex_a53_load1"
++		 "cortex_a53_alu_shift*")
++
++;; Model a bypass for ALU instructions feeding stores.
++
++(define_bypass 1 "cortex_a53_alu*"
++		 "cortex_a53_store1,
++		  cortex_a53_store2,
++		  cortex_a53_store3plus"
++		 "arm_no_early_store_addr_dep")
++
++;; Model a bypass for load and multiply instructions feeding stores.
++
++(define_bypass 2 "cortex_a53_mul,
++		  cortex_a53_load1,
++		  cortex_a53_load2,
++		  cortex_a53_load3plus"
++		 "cortex_a53_store1,
++		  cortex_a53_store2,
++		  cortex_a53_store3plus"
++		 "arm_no_early_store_addr_dep")
++
++;; Model a GP->FP register move as similar to stores.
++
++(define_bypass 1 "cortex_a53_alu*"
++		 "cortex_a53_r2f")
++
++(define_bypass 2 "cortex_a53_mul,
++		  cortex_a53_load1,
++		  cortex_a53_load2,
++		  cortex_a53_load3plus"
++		 "cortex_a53_r2f")
++
++;; Shifts feeding Load/Store addresses may not be ready in time.
++
++(define_bypass 3 "cortex_a53_shift"
++		 "cortex_a53_load*"
++		 "arm_early_load_addr_dep")
++
++(define_bypass 3 "cortex_a53_shift"
++		 "cortex_a53_store*"
++		 "arm_early_store_addr_dep")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point/Advanced SIMD.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_automaton "cortex_a53_advsimd")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Broad Advanced SIMD type categorisation
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_attr "cortex_a53_advsimd_type"
++  "advsimd_alu, advsimd_alu_q,
++   advsimd_mul, advsimd_mul_q,
++   advsimd_div_s, advsimd_div_s_q,
++   advsimd_div_d, advsimd_div_d_q,
++   advsimd_load_64, advsimd_store_64,
++   advsimd_load_128, advsimd_store_128,
++   advsimd_load_lots, advsimd_store_lots,
++   unknown"
++  (cond [
++    (eq_attr "type" "neon_add, neon_qadd, neon_add_halve, neon_sub, neon_qsub,\
++		     neon_sub_halve, neon_abs, neon_neg, neon_qneg,\
++		     neon_qabs, neon_abd, neon_minmax, neon_compare,\
++		     neon_compare_zero, neon_arith_acc, neon_reduc_add,\
++		     neon_reduc_add_acc, neon_reduc_minmax,\
++		     neon_logic, neon_tst, neon_shift_imm,\
++		     neon_shift_reg, neon_shift_acc, neon_sat_shift_imm,\
++		     neon_sat_shift_reg, neon_ins, neon_move,\
++		     neon_permute, neon_zip, neon_tbl1,\
++		     neon_tbl2, neon_tbl3, neon_tbl4, neon_bsl,\
++		     neon_cls, neon_cnt, neon_dup,\
++		     neon_ext, neon_rbit, neon_rev,\
++		     neon_fp_abd_s, neon_fp_abd_d,\
++		     neon_fp_abs_s, neon_fp_abs_d,\
++		     neon_fp_addsub_s, neon_fp_addsub_d, neon_fp_compare_s,\
++		     neon_fp_compare_d, neon_fp_minmax_s,\
++		     neon_fp_minmax_d, neon_fp_neg_s, neon_fp_neg_d,\
++		     neon_fp_reduc_add_s, neon_fp_reduc_add_d,\
++		     neon_fp_reduc_minmax_s, neon_fp_reduc_minmax_d,\
++		     neon_fp_cvt_widen_h, neon_fp_to_int_s,neon_fp_to_int_d,\
++		     neon_int_to_fp_s, neon_int_to_fp_d, neon_fp_round_s,\
++		     neon_fp_recpe_s, neon_fp_recpe_d, neon_fp_recps_s,\
++		     neon_fp_recps_d, neon_fp_recpx_s, neon_fp_recpx_d,\
++		     neon_fp_rsqrte_s, neon_fp_rsqrte_d, neon_fp_rsqrts_s,\
++		     neon_fp_rsqrts_d")
++      (const_string "advsimd_alu")
++    (eq_attr "type" "neon_add_q, neon_add_widen, neon_add_long,\
++		     neon_qadd_q, neon_add_halve_q, neon_add_halve_narrow_q,\
++		     neon_sub_q, neon_sub_widen, neon_sub_long,\
++		     neon_qsub_q, neon_sub_halve_q, neon_sub_halve_narrow_q,\
++		     neon_abs_q, neon_neg_q, neon_qneg_q, neon_qabs_q,\
++		     neon_abd_q, neon_abd_long, neon_minmax_q,\
++		     neon_compare_q, neon_compare_zero_q,\
++		     neon_arith_acc_q, neon_reduc_add_q,\
++		     neon_reduc_add_long, neon_reduc_add_acc_q,\
++		     neon_reduc_minmax_q, neon_logic_q, neon_tst_q,\
++		     neon_shift_imm_q, neon_shift_imm_narrow_q,\
++		     neon_shift_imm_long, neon_shift_reg_q,\
++		     neon_shift_acc_q, neon_sat_shift_imm_q,\
++		     neon_sat_shift_imm_narrow_q, neon_sat_shift_reg_q,\
++		     neon_ins_q, neon_move_q, neon_move_narrow_q,\
++		     neon_permute_q, neon_zip_q,\
++		     neon_tbl1_q, neon_tbl2_q, neon_tbl3_q,\
++		     neon_tbl4_q, neon_bsl_q, neon_cls_q, neon_cnt_q,\
++		     neon_dup_q, neon_ext_q, neon_rbit_q,\
++		     neon_rev_q, neon_fp_abd_s_q, neon_fp_abd_d_q,\
++		     neon_fp_abs_s_q, neon_fp_abs_d_q,\
++		     neon_fp_addsub_s_q, neon_fp_addsub_d_q,\
++		     neon_fp_compare_s_q, neon_fp_compare_d_q,\
++		     neon_fp_minmax_s_q, neon_fp_minmax_d_q,\
++		     neon_fp_cvt_widen_s, neon_fp_neg_s_q, neon_fp_neg_d_q,\
++		     neon_fp_reduc_add_s_q, neon_fp_reduc_add_d_q,\
++		     neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d_q,\
++		     neon_fp_cvt_narrow_s_q, neon_fp_cvt_narrow_d_q,\
++		     neon_fp_to_int_s_q, neon_fp_to_int_d_q,\
++		     neon_int_to_fp_s_q, neon_int_to_fp_d_q,\
++		     neon_fp_round_s_q,\
++		     neon_fp_recpe_s_q, neon_fp_recpe_d_q,\
++		     neon_fp_recps_s_q, neon_fp_recps_d_q,\
++		     neon_fp_recpx_s_q, neon_fp_recpx_d_q,\
++		     neon_fp_rsqrte_s_q, neon_fp_rsqrte_d_q,\
++		     neon_fp_rsqrts_s_q, neon_fp_rsqrts_d_q")
++      (const_string "advsimd_alu_q")
++    (eq_attr "type" "neon_mul_b, neon_mul_h, neon_mul_s,\
++		     neon_mul_h_scalar, neon_mul_s_scalar,\
++		     neon_sat_mul_b, neon_sat_mul_h, neon_sat_mul_s,\
++		     neon_sat_mul_h_scalar, neon_sat_mul_s_scalar,\
++		     neon_mla_b, neon_mla_h, neon_mla_s,\
++		     neon_mla_h_scalar, neon_mla_s_scalar,\
++		     neon_fp_mul_s, neon_fp_mul_s_scalar,\
++		     neon_fp_mul_d, neon_fp_mla_s,\
++		     neon_fp_mla_s_scalar, neon_fp_mla_d")
++      (const_string "advsimd_mul")
++    (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\
++		     neon_mul_b_long, neon_mul_h_long, neon_mul_s_long,\
++		     neon_mul_d_long, neon_mul_h_scalar_q,\
++		     neon_mul_s_scalar_q, neon_mul_h_scalar_long,\
++		     neon_mul_s_scalar_long, neon_sat_mul_b_q,\
++		     neon_sat_mul_h_q, neon_sat_mul_s_q,\
++		     neon_sat_mul_b_long, neon_sat_mul_h_long,\
++		     neon_sat_mul_s_long, neon_sat_mul_h_scalar_q,\
++		     neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\
++		     neon_sat_mul_s_scalar_long, neon_mla_b_q,\
++		     neon_mla_h_q, neon_mla_s_q, neon_mla_b_long,\
++		     neon_mla_h_long, neon_mla_s_long,\
++		     neon_mla_h_scalar_q, neon_mla_s_scalar_q,\
++		     neon_mla_h_scalar_long, neon_mla_s_scalar_long,\
++		     neon_sat_mla_b_long, neon_sat_mla_h_long,\
++		     neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
++		     neon_sat_mla_s_scalar_long,\
++		     neon_fp_mul_s_q, neon_fp_mul_s_scalar_q,\
++		     neon_fp_mul_d_q, neon_fp_mul_d_scalar_q,\
++		     neon_fp_mla_s_q, neon_fp_mla_s_scalar_q,\
++		     neon_fp_mla_d_q, neon_fp_mla_d_scalar_q")
++      (const_string "advsimd_mul_q")
++    (eq_attr "type" "neon_fp_sqrt_s, neon_fp_div_s")
++      (const_string "advsimd_div_s")
++    (eq_attr "type" "neon_fp_sqrt_s_q, neon_fp_div_s_q")
++      (const_string "advsimd_div_s_q")
++    (eq_attr "type" "neon_fp_sqrt_d, neon_fp_div_d")
++      (const_string "advsimd_div_d")
++    (eq_attr "type" "neon_fp_sqrt_d_q, neon_fp_div_d_q")
++      (const_string "advsimd_div_d_q")
++    (eq_attr "type" "neon_ldr, neon_load1_1reg,\
++		     neon_load1_all_lanes, neon_load1_all_lanes_q,\
++		     neon_load1_one_lane, neon_load1_one_lane_q")
++      (const_string "advsimd_load_64")
++    (eq_attr "type" "neon_str, neon_store1_1reg,\
++		     neon_store1_one_lane,neon_store1_one_lane_q")
++      (const_string "advsimd_store_64")
++    (eq_attr "type" "neon_load1_1reg_q, neon_load1_2reg,\
++		     neon_load2_2reg,\
++		     neon_load2_all_lanes, neon_load2_all_lanes_q,\
++		     neon_load2_one_lane, neon_load2_one_lane_q")
++      (const_string "advsimd_load_128")
++    (eq_attr "type" "neon_store1_1reg_q, neon_store1_2reg,\
++		     neon_store2_2reg,\
++		     neon_store2_one_lane, neon_store2_one_lane_q")
++      (const_string "advsimd_store_128")
++    (eq_attr "type" "neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\
++		     neon_load1_4reg, neon_load1_4reg_q, \
++		     neon_load2_2reg_q, neon_load2_4reg,\
++		     neon_load2_4reg_q, neon_load3_3reg,\
++		     neon_load3_3reg_q, neon_load3_all_lanes,\
++		     neon_load3_all_lanes_q, neon_load3_one_lane,\
++		     neon_load3_one_lane_q, neon_load4_4reg,\
++		     neon_load4_4reg_q, neon_load4_all_lanes,\
++		     neon_load4_all_lanes_q, neon_load4_one_lane,\
++		     neon_load4_one_lane_q, neon_ldp, neon_ldp_q")
++      (const_string "advsimd_load_lots")
++    (eq_attr "type" "neon_store1_2reg_q, neon_store1_3reg,\
++		     neon_store1_3reg_q, neon_store1_4reg,\
++		     neon_store1_4reg_q, neon_store2_2reg_q,\
++		     neon_store2_4reg, neon_store2_4reg_q,\
++		     neon_store3_3reg, neon_store3_3reg_q,\
++		     neon_store3_one_lane, neon_store3_one_lane_q,\
++		     neon_store4_4reg, neon_store4_4reg_q,\
++		     neon_store4_one_lane, neon_store4_one_lane_q,\
++		     neon_stp, neon_stp_q")
++      (const_string "advsimd_store_lots")]
++      (const_string "unknown")))
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point/Advanced SIMD functional units.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; We model the Advanced SIMD unit as two 64-bit units, each with three
++;; pipes, FP_ALU, FP_MUL, FP_DIV.  We also give convenient reservations
++;; for 128-bit Advanced SIMD instructions, which use both units.
++
++;; The floating-point/Advanced SIMD ALU pipelines.
++
++(define_cpu_unit "cortex_a53_fp_alu_lo,\
++		  cortex_a53_fp_alu_hi"
++		 "cortex_a53_advsimd")
++
++(define_reservation "cortex_a53_fp_alu"
++		    "cortex_a53_fp_alu_lo\
++		     |cortex_a53_fp_alu_hi")
++
++(define_reservation "cortex_a53_fp_alu_q"
++		    "cortex_a53_fp_alu_lo\
++		     +cortex_a53_fp_alu_hi")
++
++;; The floating-point/Advanced SIMD multiply/multiply-accumulate
++;; pipelines.
++
++(define_cpu_unit "cortex_a53_fp_mul_lo,\
++		  cortex_a53_fp_mul_hi"
++		 "cortex_a53_advsimd")
++
++(define_reservation "cortex_a53_fp_mul"
++		    "cortex_a53_fp_mul_lo\
++		     |cortex_a53_fp_mul_hi")
++
++(define_reservation "cortex_a53_fp_mul_q"
++		    "cortex_a53_fp_mul_lo\
++		     +cortex_a53_fp_mul_hi")
++
++;; Floating-point/Advanced SIMD divide/square root.
++
++(define_cpu_unit "cortex_a53_fp_div_lo,\
++		  cortex_a53_fp_div_hi"
++		 "cortex_a53_advsimd")
++
++;; Once we choose a pipe, stick with it for three simulated cycles.
++
++(define_reservation "cortex_a53_fp_div"
++		    "(cortex_a53_fp_div_lo*3)\
++		     |(cortex_a53_fp_div_hi*3)")
++
++(define_reservation "cortex_a53_fp_div_q"
++		    "(cortex_a53_fp_div_lo*3)\
++		     +(cortex_a53_fp_div_hi*3)")
++
++;; Cryptographic extensions
++
++(define_cpu_unit "cortex_a53_crypto"
++		 "cortex_a53_advsimd")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ ;; Floating-point arithmetic.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_fpalu" 4
++(define_insn_reservation "cortex_a53_fpalu" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, fmuls,\
+-                        f_cvt,f_cvtf2i,f_cvti2f,\
+-                        fcmps, fcmpd, fcsel, f_rints, f_rintd, f_minmaxs,\
+-                        f_minmaxd"))
+-  "cortex_a53_slot0+cortex_a53_fpadd_pipe")
++	(eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov,
++			f_cvt, fcmps, fcmpd, fcsel, f_rints, f_rintd,
++			f_minmaxs, f_minmaxd"))
++  "cortex_a53_slot_any,cortex_a53_fp_alu")
+ 
+-(define_insn_reservation "cortex_a53_fconst" 2
++(define_insn_reservation "cortex_a53_fconst" 3
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "fconsts,fconstd"))
+-  "cortex_a53_slot0+cortex_a53_fpadd_pipe")
++  "cortex_a53_slot_any,cortex_a53_fp_alu")
+ 
+-(define_insn_reservation "cortex_a53_fpmul" 4
++(define_insn_reservation "cortex_a53_fpmul" 5
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "fmuls,fmuld"))
+-  "cortex_a53_slot0")
++  "cortex_a53_slot_any,cortex_a53_fp_mul")
+ 
+-;; For single-precision multiply-accumulate, the add (accumulate) is issued after
+-;; the multiply completes. Model that accordingly.
++;; For multiply-accumulate, model the add (accumulate) as being issued
++;; after the multiply completes.
+ 
+ (define_insn_reservation "cortex_a53_fpmac" 8
+   (and (eq_attr "tune" "cortexa53")
+        (eq_attr "type" "fmacs,fmacd,ffmas,ffmad"))
+-  "cortex_a53_slot0, nothing*3, cortex_a53_fpadd_pipe")
++  "cortex_a53_slot_any,cortex_a53_fp_mul,
++   nothing*3, cortex_a53_fp_alu")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Floating-point divide/square root instructions.
++;; Floating-point to/from core transfers.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; fsqrt really takes one cycle less, but that is not modelled.
+ 
+-(define_insn_reservation "cortex_a53_fdivs" 14
++(define_insn_reservation "cortex_a53_r2f" 6
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "fdivs, fsqrts"))
+-  "cortex_a53_slot0, cortex_a53_fp_div_sqrt * 5")
++       (eq_attr "type" "f_mcr,f_mcrr,f_cvti2f,
++			neon_from_gp, neon_from_gp_q"))
++  "cortex_a53_slot_any,cortex_a53_store,
++   nothing,cortex_a53_fp_alu")
+ 
+-(define_insn_reservation "cortex_a53_fdivd" 29
++(define_insn_reservation "cortex_a53_f2r" 6
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "fdivd, fsqrtd"))
+-  "cortex_a53_slot0, cortex_a53_fp_div_sqrt * 8")
++       (eq_attr "type" "f_mrc,f_mrrc,f_cvtf2i,
++			neon_to_gp, neon_to_gp_q"))
++  "cortex_a53_slot_any,cortex_a53_fp_alu,
++   nothing,cortex_a53_store")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; ARMv8-A Cryptographic extensions.
++;; Floating-point flag transfer.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_crypto_aese" 2
++(define_insn_reservation "cortex_a53_f_flags" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "crypto_aese"))
+-  "cortex_a53_simd0")
++       (eq_attr "type" "f_flag"))
++  "cortex_a53_slot_any")
+ 
+-(define_insn_reservation "cortex_a53_crypto_aesmc" 2
+-  (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "crypto_aesmc"))
+-  "cortex_a53_simd0 | cortex_a53_simd1")
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point load/store.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_crypto_sha1_fast" 2
++(define_insn_reservation "cortex_a53_f_load_64" 4
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "crypto_sha1_fast, crypto_sha256_fast"))
+-  "cortex_a53_simd0")
++       (ior (eq_attr "type" "f_loads,f_loadd")
++	    (eq_attr "cortex_a53_advsimd_type"
++		     "advsimd_load_64")))
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_load")
+ 
+-(define_insn_reservation "cortex_a53_crypto_sha1_xor" 3
++(define_insn_reservation "cortex_a53_f_load_many" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "crypto_sha1_xor"))
+-  "cortex_a53_simd0")
++       (eq_attr "cortex_a53_advsimd_type"
++		"advsimd_load_128,advsimd_load_lots"))
++  "cortex_a53_single_issue+cortex_a53_ls_agen,
++   cortex_a53_load+cortex_a53_slot0,
++   cortex_a53_load")
+ 
+-(define_insn_reservation "cortex_a53_crypto_sha_slow" 5
++(define_insn_reservation "cortex_a53_f_store_64" 0
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "crypto_sha1_slow, crypto_sha256_slow"))
+-  "cortex_a53_simd0")
++       (ior (eq_attr "type" "f_stores,f_stored")
++	    (eq_attr "cortex_a53_advsimd_type"
++		     "advsimd_store_64")))
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_store")
+ 
+-(define_bypass 0 "cortex_a53_crypto_aese"
+-                 "cortex_a53_crypto_aesmc"
+-                 "aarch_crypto_can_dual_issue")
++(define_insn_reservation "cortex_a53_f_store_many" 0
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "cortex_a53_advsimd_type"
++		"advsimd_store_128,advsimd_store_lots"))
++  "cortex_a53_slot_any+cortex_a53_ls_agen,
++   cortex_a53_store+cortex_a53_slot0,
++   cortex_a53_store")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP to/from core transfers.
++;; Advanced SIMD.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_r2f" 4
++;; Either we want to model use of the ALU pipe, the multiply pipe or the
++;; divide/sqrt pipe.  In all cases we need to check if we are a 64-bit
++;; operation (in which case we model dual-issue without penalty)
++;; or a 128-bit operation in which case we require in our model that we
++;; issue from slot 0.
++
++(define_insn_reservation "cortex_a53_advsimd_alu" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_mcr,f_mcrr"))
+-  "cortex_a53_slot0")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_alu"))
++  "cortex_a53_slot_any,cortex_a53_fp_alu")
+ 
+-(define_insn_reservation "cortex_a53_f2r" 2
++(define_insn_reservation "cortex_a53_advsimd_alu_q" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_mrc,f_mrrc"))
+-  "cortex_a53_slot0")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_alu_q"))
++  "cortex_a53_slot0,cortex_a53_fp_alu_q")
+ 
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP flag transfer.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++(define_insn_reservation "cortex_a53_advsimd_mul" 5
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_mul"))
++  "cortex_a53_slot_any,cortex_a53_fp_mul")
+ 
+-(define_insn_reservation "cortex_a53_f_flags" 4
++(define_insn_reservation "cortex_a53_advsimd_mul_q" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_flag"))
+-  "cortex_a53_slot0")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_mul_q"))
++  "cortex_a53_slot0,cortex_a53_fp_mul_q")
++
++;; SIMD Dividers.
++
++(define_insn_reservation "cortex_a53_advsimd_div_s" 14
++  (and (eq_attr "tune" "cortexa53")
++       (ior (eq_attr "type" "fdivs,fsqrts")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_div_s")))
++  "cortex_a53_slot0,cortex_a53_fp_mul,
++   cortex_a53_fp_div")
++
++(define_insn_reservation "cortex_a53_advsimd_div_d" 29
++  (and (eq_attr "tune" "cortexa53")
++       (ior (eq_attr "type" "fdivd,fsqrtd")
++	    (eq_attr "cortex_a53_advsimd_type" "advsimd_div_d")))
++  "cortex_a53_slot0,cortex_a53_fp_mul,
++   cortex_a53_fp_div")
++
++(define_insn_reservation "cortex_a53_advsimd_div_s_q" 14
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_div_s_q"))
++  "cortex_a53_single_issue,cortex_a53_fp_mul_q,
++   cortex_a53_fp_div_q")
++
++(define_insn_reservation "cortex_a53_advsimd_divd_q" 29
++  (and (eq_attr "tune" "cortexa53")
++       (eq_attr "cortex_a53_advsimd_type" "advsimd_div_d_q"))
++  "cortex_a53_single_issue,cortex_a53_fp_mul_q,
++   cortex_a53_fp_div_q")
+ 
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP load/store.
++;; ARMv8-A Cryptographic extensions.
+ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_insn_reservation "cortex_a53_f_loads" 4
++;; We want AESE and AESMC to end up consecutive to one another.
++
++(define_insn_reservation "cortex_a53_crypto_aese" 3
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_loads"))
++       (eq_attr "type" "crypto_aese"))
+   "cortex_a53_slot0")
+ 
+-(define_insn_reservation "cortex_a53_f_loadd" 5
++(define_insn_reservation "cortex_a53_crypto_aesmc" 3
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_loadd"))
+-  "cortex_a53_slot0")
++       (eq_attr "type" "crypto_aesmc"))
++  "cortex_a53_slot_any")
+ 
+-(define_insn_reservation "cortex_a53_f_load_2reg" 5
++;; SHA1H
++
++(define_insn_reservation "cortex_a53_crypto_sha1_fast" 3
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "neon_load2_2reg_q"))
+-  "(cortex_a53_slot_any+cortex_a53_ls)*2")
++       (eq_attr "type" "crypto_sha1_fast"))
++  "cortex_a53_slot_any,cortex_a53_crypto")
+ 
+-(define_insn_reservation "cortex_a53_f_loadq" 5
++(define_insn_reservation "cortex_a53_crypto_sha256_fast" 3
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "neon_load1_1reg_q"))
+-  "cortex_a53_slot_any+cortex_a53_ls")
++       (eq_attr "type" "crypto_sha256_fast"))
++  "cortex_a53_slot0,cortex_a53_crypto")
+ 
+-(define_insn_reservation "cortex_a53_f_stores" 0
++(define_insn_reservation "cortex_a53_crypto_sha1_xor" 4
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_stores"))
+-  "cortex_a53_slot0")
++       (eq_attr "type" "crypto_sha1_xor"))
++  "cortex_a53_slot0,cortex_a53_crypto")
+ 
+-(define_insn_reservation "cortex_a53_f_stored" 0
++(define_insn_reservation "cortex_a53_crypto_sha_slow" 5
+   (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "type" "f_stored"))
+-  "cortex_a53_slot0")
++       (eq_attr "type" "crypto_sha1_slow, crypto_sha256_slow"))
++  "cortex_a53_slot0,cortex_a53_crypto")
+ 
+-;; Load-to-use for floating-point values has a penalty of one cycle,
+-;; i.e. a latency of two.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point/Advanced SIMD register bypasses.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+ 
+-(define_bypass 2 "cortex_a53_f_loads"
+-                 "cortex_a53_fpalu, cortex_a53_fpmac, cortex_a53_fpmul,\
+-		  cortex_a53_fdivs, cortex_a53_fdivd,\
+-		  cortex_a53_f2r")
++;; Model the late use of the accumulator operand for floating-point
++;; multiply-accumulate operations as a bypass reducing the latency
++;; of producing instructions to near zero.
+ 
+-(define_bypass 2 "cortex_a53_f_loadd"
+-                 "cortex_a53_fpalu, cortex_a53_fpmac, cortex_a53_fpmul,\
+-		  cortex_a53_fdivs, cortex_a53_fdivd,\
+-		  cortex_a53_f2r")
++(define_bypass 1 "cortex_a53_fp*,
++		  cortex_a53_r2f,
++		  cortex_a53_f_load*"
++		 "cortex_a53_fpmac"
++		 "aarch_accumulator_forwarding")
+ 
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Crude Advanced SIMD approximation.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Model a bypass from the result of an FP operation to a use.
++
++(define_bypass 4 "cortex_a53_fpalu,
++		  cortex_a53_fpmul"
++		 "cortex_a53_fpalu,
++		  cortex_a53_fpmul,
++		  cortex_a53_fpmac,
++		  cortex_a53_advsimd_div*")
++
++;; We want AESE and AESMC to end up consecutive to one another.
++
++(define_bypass 0 "cortex_a53_crypto_aese"
++		 "cortex_a53_crypto_aesmc"
++		 "aarch_crypto_can_dual_issue")
+ 
+-(define_insn_reservation "cortex_53_advsimd" 4
+-  (and (eq_attr "tune" "cortexa53")
+-       (eq_attr "is_neon_type" "yes"))
+-  "cortex_a53_simd0")
+--- a/src/gcc/config/arm/cortex-a57.md
++++ b/src/gcc/config/arm/cortex-a57.md
+@@ -202,7 +202,8 @@
+ 	  (eq_attr "type" "neon_load1_3reg, neon_load1_3reg_q,\
+ 			   neon_load1_4reg, neon_load1_4reg_q")
+ 	    (const_string "neon_load_b")
+-	  (eq_attr "type" "neon_load1_one_lane, neon_load1_one_lane_q,\
++	  (eq_attr "type" "neon_ldp, neon_ldp_q,\
++			   neon_load1_one_lane, neon_load1_one_lane_q,\
+ 			   neon_load1_all_lanes, neon_load1_all_lanes_q,\
+ 			   neon_load2_2reg, neon_load2_2reg_q,\
+ 			   neon_load2_all_lanes, neon_load2_all_lanes_q")
+@@ -224,7 +225,8 @@
+ 	    (const_string "neon_store_a")
+ 	  (eq_attr "type" "neon_store1_2reg, neon_store1_1reg_q")
+ 	    (const_string "neon_store_b")
+-	  (eq_attr "type" "neon_store1_3reg, neon_store1_3reg_q,\
++	  (eq_attr "type" "neon_stp, neon_stp_q,\
++			   neon_store1_3reg, neon_store1_3reg_q,\
+ 			   neon_store3_3reg, neon_store3_3reg_q,\
+ 			   neon_store2_4reg, neon_store2_4reg_q,\
+ 			   neon_store4_4reg, neon_store4_4reg_q,\
+@@ -296,7 +298,7 @@
+ 			alu_sreg,alus_sreg,logic_reg,logics_reg,\
+ 			adc_imm,adcs_imm,adc_reg,adcs_reg,\
+ 			adr,bfm,clz,rbit,rev,alu_dsp_reg,\
+-			shift_imm,shift_reg,\
++			rotate_imm,shift_imm,shift_reg,\
+ 			mov_imm,mov_reg,\
+ 			mvn_imm,mvn_reg,\
+ 			mrs,multiple,no_insn"))
+@@ -745,20 +747,20 @@
+ 			 neon_fp_sqrt_s_q, neon_fp_sqrt_d_q"))
+   "ca57_cx2_block*3")
+ 
+-(define_insn_reservation "cortex_a57_crypto_simple" 4
++(define_insn_reservation "cortex_a57_crypto_simple" 3
+   (and (eq_attr "tune" "cortexa57")
+        (eq_attr "type" "crypto_aese,crypto_aesmc,crypto_sha1_fast,crypto_sha256_fast"))
+-  "ca57_cx2")
++  "ca57_cx1")
+ 
+-(define_insn_reservation "cortex_a57_crypto_complex" 7
++(define_insn_reservation "cortex_a57_crypto_complex" 6
+   (and (eq_attr "tune" "cortexa57")
+        (eq_attr "type" "crypto_sha1_slow,crypto_sha256_slow"))
+-  "ca57_cx2+(ca57_cx2_issue,ca57_cx2)")
++  "ca57_cx1*2")
+ 
+-(define_insn_reservation "cortex_a57_crypto_xor" 7
++(define_insn_reservation "cortex_a57_crypto_xor" 6
+   (and (eq_attr "tune" "cortexa57")
+        (eq_attr "type" "crypto_sha1_xor"))
+-  "(ca57_cx1+ca57_cx2)")
++  "(ca57_cx1*2)|(ca57_cx2*2)")
+ 
+ ;; We lie with calls.  They take up all issue slots, but are otherwise
+ ;; not harmful.
+@@ -795,3 +797,8 @@
+ (define_bypass 1 "cortex_a57_*"
+ 		 "cortex_a57_call,cortex_a57_branch")
+ 
++;; AESE+AESMC and AESD+AESIMC pairs forward with zero latency
++(define_bypass 0 "cortex_a57_crypto_simple"
++		 "cortex_a57_crypto_simple"
++		 "aarch_crypto_can_dual_issue")
++
+--- a/src/gcc/config/arm/driver-arm.c
++++ b/src/gcc/config/arm/driver-arm.c
+@@ -35,6 +35,9 @@ static struct vendor_cpu arm_cpu_table[] = {
+     {"0xb02", "armv6k", "mpcore"},
+     {"0xb36", "armv6j", "arm1136j-s"},
+     {"0xb56", "armv6t2", "arm1156t2-s"},
++    /* armv6kz is the correct spelling for ARMv6KZ but may not be supported in
++       the version of binutils used.  The incorrect spelling is supported in
++       legacy and current binutils so that is used instead.  */
+     {"0xb76", "armv6zk", "arm1176jz-s"},
+     {"0xc05", "armv7-a", "cortex-a5"},
+     {"0xc07", "armv7ve", "cortex-a7"},
+--- a/src/gcc/config/arm/elf.h
++++ b/src/gcc/config/arm/elf.h
+@@ -120,7 +120,6 @@
+   { "marm", "mlittle-endian", "mfloat-abi=soft", "mno-thumb-interwork", "fno-leading-underscore" }
+ #endif
+ 
+-#define TARGET_ASM_FILE_START_APP_OFF true
+ #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
+ 
+ 
+--- a/src/gcc/config/arm/iterators.md
++++ b/src/gcc/config/arm/iterators.md
+@@ -65,20 +65,32 @@
+ ;; Integer modes supported by Neon and IWMMXT, except V2DI
+ (define_mode_iterator VINTW [V2SI V4HI V8QI V4SI V8HI V16QI])
+ 
+-;; Double-width vector modes.
++;; Double-width vector modes, on which we support arithmetic (no HF!)
+ (define_mode_iterator VD [V8QI V4HI V2SI V2SF])
+ 
++;; Double-width vector modes plus 64-bit elements for vreinterpret + vcreate.
++(define_mode_iterator VD_RE [V8QI V4HI V2SI V2SF DI])
++
+ ;; Double-width vector modes plus 64-bit elements.
+-(define_mode_iterator VDX [V8QI V4HI V2SI V2SF DI])
++(define_mode_iterator VDX [V8QI V4HI V4HF V2SI V2SF DI])
++
++;; Double-width vector modes, with V4HF - for vldN_lane and vstN_lane.
++(define_mode_iterator VD_LANE [V8QI V4HI V4HF V2SI V2SF])
+ 
+ ;; Double-width vector modes without floating-point elements.
+ (define_mode_iterator VDI [V8QI V4HI V2SI])
+ 
+-;; Quad-width vector modes.
++;; Quad-width vector modes supporting arithmetic (no HF!).
+ (define_mode_iterator VQ [V16QI V8HI V4SI V4SF])
+ 
++;; Quad-width vector modes, including V8HF.
++(define_mode_iterator VQ2 [V16QI V8HI V8HF V4SI V4SF])
++
++;; Quad-width vector modes with 16- or 32-bit elements
++(define_mode_iterator VQ_HS [V8HI V8HF V4SI V4SF])
++
+ ;; Quad-width vector modes plus 64-bit elements.
+-(define_mode_iterator VQX [V16QI V8HI V4SI V4SF V2DI])
++(define_mode_iterator VQX [V16QI V8HI V8HF V4SI V4SF V2DI])
+ 
+ ;; Quad-width vector modes without floating-point elements.
+ (define_mode_iterator VQI [V16QI V8HI V4SI])
+@@ -111,7 +123,8 @@
+ (define_mode_iterator VDQI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI])
+ 
+ ;; Vector modes, including 64-bit integer elements.
+-(define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF DI V2DI])
++(define_mode_iterator VDQX [V8QI V16QI V4HI V8HI V2SI V4SI
++			    V4HF V8HF V2SF V4SF DI V2DI])
+ 
+ ;; Vector modes including 64-bit integer elements, but no floats.
+ (define_mode_iterator VDQIX [V8QI V16QI V4HI V8HI V2SI V4SI DI V2DI])
+@@ -181,39 +194,53 @@
+ ;; compare a second time.
+ (define_code_iterator LTUGEU [ltu geu])
+ 
++;; The signed gt, ge comparisons
++(define_code_iterator GTGE [gt ge])
++
++;; The unsigned gt, ge comparisons
++(define_code_iterator GTUGEU [gtu geu])
++
++;; Comparisons for vc<cmp>
++(define_code_iterator COMPARISONS [eq gt ge le lt])
++
+ ;; A list of ...
+-(define_code_iterator ior_xor [ior xor])
++(define_code_iterator IOR_XOR [ior xor])
+ 
+ ;; Operations on two halves of a quadword vector.
+-(define_code_iterator vqh_ops [plus smin smax umin umax])
++(define_code_iterator VQH_OPS [plus smin smax umin umax])
+ 
+ ;; Operations on two halves of a quadword vector,
+ ;; without unsigned variants (for use with *SFmode pattern).
+-(define_code_iterator vqhs_ops [plus smin smax])
++(define_code_iterator VQHS_OPS [plus smin smax])
+ 
+ ;; A list of widening operators
+ (define_code_iterator SE [sign_extend zero_extend])
+ 
+ ;; Right shifts
+-(define_code_iterator rshifts [ashiftrt lshiftrt])
++(define_code_iterator RSHIFTS [ashiftrt lshiftrt])
+ 
+ ;; Iterator for integer conversions
+ (define_code_iterator FIXUORS [fix unsigned_fix])
+ 
+ ;; Binary operators whose second operand can be shifted.
+-(define_code_iterator shiftable_ops [plus minus ior xor and])
++(define_code_iterator SHIFTABLE_OPS [plus minus ior xor and])
+ 
+-;; plus and minus are the only shiftable_ops for which Thumb2 allows
++;; plus and minus are the only SHIFTABLE_OPS for which Thumb2 allows
+ ;; a stack pointer opoerand.  The minus operation is a candidate for an rsub
+ ;; and hence only plus is supported.
+ (define_code_attr t2_binop0
+   [(plus "rk") (minus "r") (ior "r") (xor "r") (and "r")])
+ 
+-;; The instruction to use when a shiftable_ops has a shift operation as
++;; The instruction to use when a SHIFTABLE_OPS has a shift operation as
+ ;; its first operand.
+ (define_code_attr arith_shift_insn
+   [(plus "add") (minus "rsb") (ior "orr") (xor "eor") (and "and")])
+ 
++(define_code_attr cmp_op [(eq "eq") (gt "gt") (ge "ge") (lt "lt") (le "le")
++                          (gtu "gt") (geu "ge")])
++
++(define_code_attr cmp_type [(eq "i") (gt "s") (ge "s") (lt "s") (le "s")])
++
+ ;;----------------------------------------------------------------------------
+ ;; Int iterators
+ ;;----------------------------------------------------------------------------
+@@ -221,6 +248,10 @@
+ (define_int_iterator VRINT [UNSPEC_VRINTZ UNSPEC_VRINTP UNSPEC_VRINTM
+                             UNSPEC_VRINTR UNSPEC_VRINTX UNSPEC_VRINTA])
+ 
++(define_int_iterator NEON_VCMP [UNSPEC_VCEQ UNSPEC_VCGT UNSPEC_VCGE UNSPEC_VCLT UNSPEC_VCLE])
++
++(define_int_iterator NEON_VACMP [UNSPEC_VCAGE UNSPEC_VCAGT])
++
+ (define_int_iterator VCVT [UNSPEC_VRINTP UNSPEC_VRINTM UNSPEC_VRINTA])
+ 
+ (define_int_iterator NEON_VRINT [UNSPEC_NVRINTP UNSPEC_NVRINTZ UNSPEC_NVRINTM
+@@ -328,6 +359,8 @@
+ (define_int_iterator CRYPTO_SELECTING [UNSPEC_SHA1C UNSPEC_SHA1M
+                                        UNSPEC_SHA1P])
+ 
++(define_int_iterator VQRDMLH_AS [UNSPEC_VQRDMLAH UNSPEC_VQRDMLSH])
++
+ ;;----------------------------------------------------------------------------
+ ;; Mode attributes
+ ;;----------------------------------------------------------------------------
+@@ -348,7 +381,8 @@
+ 
+ ;; Define element mode for each vector mode.
+ (define_mode_attr V_elem [(V8QI "QI") (V16QI "QI")
+-              (V4HI "HI") (V8HI "HI")
++			  (V4HI "HI") (V8HI "HI")
++			  (V4HF "HF") (V8HF "HF")
+                           (V2SI "SI") (V4SI "SI")
+                           (V2SF "SF") (V4SF "SF")
+                           (DI "DI")   (V2DI "DI")])
+@@ -365,6 +399,7 @@
+ ;; size for structure lane/dup loads and stores.
+ (define_mode_attr V_two_elem [(V8QI "HI")   (V16QI "HI")
+                               (V4HI "SI")   (V8HI "SI")
++                              (V4HF "SF")   (V8HF "SF")
+                               (V2SI "V2SI") (V4SI "V2SI")
+                               (V2SF "V2SF") (V4SF "V2SF")
+                               (DI "V2DI")   (V2DI "V2DI")])
+@@ -372,6 +407,7 @@
+ ;; Similar, for three elements.
+ (define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK")
+                                 (V4HI "BLK") (V8HI "BLK")
++                                (V4HF "BLK") (V8HF "BLK")
+                                 (V2SI "BLK") (V4SI "BLK")
+                                 (V2SF "BLK") (V4SF "BLK")
+                                 (DI "EI")    (V2DI "EI")])
+@@ -379,6 +415,7 @@
+ ;; Similar, for four elements.
+ (define_mode_attr V_four_elem [(V8QI "SI")   (V16QI "SI")
+                                (V4HI "V4HI") (V8HI "V4HI")
++                               (V4HF "V4HF") (V8HF "V4HF")
+                                (V2SI "V4SI") (V4SI "V4SI")
+                                (V2SF "V4SF") (V4SF "V4SF")
+                                (DI "OI")     (V2DI "OI")])
+@@ -403,7 +440,8 @@
+ 
+ ;; Modes with half the number of equal-sized elements.
+ (define_mode_attr V_HALF [(V16QI "V8QI") (V8HI "V4HI")
+-              (V4SI  "V2SI") (V4SF "V2SF") (V2DF "DF")
++			  (V8HF "V4HF") (V4SI  "V2SI")
++			  (V4SF "V2SF") (V2DF "DF")
+                           (V2DI "DI")])
+ 
+ ;; Same, but lower-case.
+@@ -413,8 +451,9 @@
+ 
+ ;; Modes with twice the number of equal-sized elements.
+ (define_mode_attr V_DOUBLE [(V8QI "V16QI") (V4HI "V8HI")
+-                (V2SI "V4SI") (V2SF "V4SF") (DF "V2DF")
+-                            (DI "V2DI")])
++			    (V2SI "V4SI") (V4HF "V8HF")
++			    (V2SF "V4SF") (DF "V2DF")
++			    (DI "V2DI")])
+ 
+ ;; Same, but lower-case.
+ (define_mode_attr V_double [(V8QI "v16qi") (V4HI "v8hi")
+@@ -436,8 +475,9 @@
+ 
+ ;; Mode of result of comparison operations (and bit-select operand 1).
+ (define_mode_attr V_cmp_result [(V8QI "V8QI") (V16QI "V16QI")
+-                    (V4HI "V4HI") (V8HI  "V8HI")
++				(V4HI "V4HI") (V8HI  "V8HI")
+                                 (V2SI "V2SI") (V4SI  "V4SI")
++				(V4HF "V4HI") (V8HF  "V8HI")
+                                 (V2SF "V2SI") (V4SF  "V4SI")
+                                 (DI   "DI")   (V2DI  "V2DI")])
+ 
+@@ -474,12 +514,14 @@
+ (define_mode_attr V_uf_sclr [(V8QI "u8")  (V16QI "u8")
+                  (V4HI "u16") (V8HI "u16")
+                              (V2SI "32") (V4SI "32")
++                             (V4HF "u16") (V8HF "u16")
+                              (V2SF "32") (V4SF "32")])
+ 
+ (define_mode_attr V_sz_elem [(V8QI "8")  (V16QI "8")
+                  (V4HI "16") (V8HI  "16")
+                              (V2SI "32") (V4SI  "32")
+                              (DI   "64") (V2DI  "64")
++			     (V4HF "16") (V8HF "16")
+                  (V2SF "32") (V4SF  "32")])
+ 
+ (define_mode_attr V_elem_ch [(V8QI "b")  (V16QI "b")
+@@ -546,6 +588,7 @@
+                             (DI   "true") (V2DI  "false")])
+ 
+ (define_mode_attr V_mode_nunits [(V8QI "8") (V16QI "16")
++				 (V4HF "4") (V8HF "8")
+                                  (V4HI "4") (V8HI "8")
+                                  (V2SI "2") (V4SI "4")
+                                  (V2SF "2") (V4SF "4")
+@@ -589,6 +632,7 @@
+ (define_mode_attr q [(V8QI "") (V16QI "_q")
+                      (V4HI "") (V8HI "_q")
+                      (V2SI "") (V4SI "_q")
++		     (V4HF "") (V8HF "_q")
+                      (V2SF "") (V4SF "_q")
+                      (DI "")   (V2DI "_q")
+                      (DF "")   (V2DF "_q")])
+@@ -677,6 +721,11 @@
+ 
+ ])
+ 
++(define_int_attr cmp_op_unsp [(UNSPEC_VCEQ "eq") (UNSPEC_VCGT "gt")
++                              (UNSPEC_VCGE "ge") (UNSPEC_VCLE "le")
++                              (UNSPEC_VCLT "lt") (UNSPEC_VCAGE "ge")
++                              (UNSPEC_VCAGT "gt")])
++
+ (define_int_attr r [
+   (UNSPEC_VRHADD_S "r") (UNSPEC_VRHADD_U "r")
+   (UNSPEC_VHADD_S "") (UNSPEC_VHADD_U "")
+@@ -774,10 +823,13 @@
+                           (UNSPEC_SHA256H2 "V4SI") (UNSPEC_SHA256SU1 "V4SI")])
+ 
+ ;; Both kinds of return insn.
+-(define_code_iterator returns [return simple_return])
++(define_code_iterator RETURNS [return simple_return])
+ (define_code_attr return_str [(return "") (simple_return "simple_")])
+ (define_code_attr return_simple_p [(return "false") (simple_return "true")])
+ (define_code_attr return_cond_false [(return " && USE_RETURN_INSN (FALSE)")
+                                (simple_return " && use_simple_return_p ()")])
+ (define_code_attr return_cond_true [(return " && USE_RETURN_INSN (TRUE)")
+                                (simple_return " && use_simple_return_p ()")])
++
++;; Attributes for VQRDMLAH/VQRDMLSH
++(define_int_attr neon_rdma_as [(UNSPEC_VQRDMLAH "a") (UNSPEC_VQRDMLSH "s")])
+--- a/src/gcc/config/arm/iwmmxt.md
++++ b/src/gcc/config/arm/iwmmxt.md
+@@ -107,8 +107,8 @@
+ )
+ 
+ (define_insn "*iwmmxt_arm_movdi"
+-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,yr,y,yrUy,*w, r,*w,*w, *Uv")
+-        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,yr,y,yrUy,y, r,*w,*w,*Uvi,*w"))]
++  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,r, y,Uy,*w, r,*w,*w, *Uv")
++        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,r,y,Uy,y,  r,*w,*w,*Uvi,*w"))]
+   "TARGET_REALLY_IWMMXT
+    && (   register_operand (operands[0], DImode)
+        || register_operand (operands[1], DImode))"
+--- a/src/gcc/config/arm/ldmstm.md
++++ b/src/gcc/config/arm/ldmstm.md
+@@ -21,7 +21,7 @@
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+-(define_insn "*ldm4_ia"
++(define_insn "*ldm4_"
+   [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")
+           (mem:SI (match_operand:SI 5 "s_register_operand" "rk")))
+@@ -35,7 +35,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 12))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\t%5, {%1, %2, %3, %4}"
++  "ldm%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -54,7 +54,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 12))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\t%5, {%1, %2, %3, %4}"
++  "ldmia\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")])
+ 
+ (define_insn "*ldm4_ia_update"
+@@ -73,7 +73,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 12))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(ia%)\t%5!, {%1, %2, %3, %4}"
++  "ldmia%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -94,10 +94,10 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 12))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(ia%)\t%5!, {%1, %2, %3, %4}"
++  "ldmia\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")])
+ 
+-(define_insn "*stm4_ia"
++(define_insn "*stm4_"
+   [(match_parallel 0 "store_multiple_operation"
+     [(set (mem:SI (match_operand:SI 5 "s_register_operand" "rk"))
+           (match_operand:SI 1 "arm_hard_general_register_operand" ""))
+@@ -108,7 +108,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\t%5, {%1, %2, %3, %4}"
++  "stm%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -126,7 +126,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "stm%(ia%)\t%5!, {%1, %2, %3, %4}"
++  "stmia%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -144,7 +144,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int 12)))
+           (match_operand:SI 4 "low_register_operand" ""))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "stm%(ia%)\t%5!, {%1, %2, %3, %4}"
++  "stmia\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")])
+ 
+ (define_insn "*ldm4_ib"
+@@ -162,7 +162,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 16))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ib%)\t%5, {%1, %2, %3, %4}"
++  "ldmib%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -183,7 +183,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int 16))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(ib%)\t%5!, {%1, %2, %3, %4}"
++  "ldmib%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -198,7 +198,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int 16)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ib%)\t%5, {%1, %2, %3, %4}"
++  "stmib%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -215,7 +215,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int 16)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
+-  "stm%(ib%)\t%5!, {%1, %2, %3, %4}"
++  "stmib%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -233,7 +233,7 @@
+      (set (match_operand:SI 4 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 5)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(da%)\t%5, {%1, %2, %3, %4}"
++  "ldmda%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -253,7 +253,7 @@
+      (set (match_operand:SI 4 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 5)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(da%)\t%5!, {%1, %2, %3, %4}"
++  "ldmda%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -268,7 +268,7 @@
+      (set (mem:SI (match_dup 5))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "stm%(da%)\t%5, {%1, %2, %3, %4}"
++  "stmda%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -285,7 +285,7 @@
+      (set (mem:SI (match_dup 5))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
+-  "stm%(da%)\t%5!, {%1, %2, %3, %4}"
++  "stmda%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")])
+ 
+@@ -304,7 +304,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(db%)\t%5, {%1, %2, %3, %4}"
++  "ldmdb%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -326,7 +326,7 @@
+           (mem:SI (plus:SI (match_dup 5)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(db%)\t%5!, {%1, %2, %3, %4}"
++  "ldmdb%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "load4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -342,7 +342,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int -4)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(db%)\t%5, {%1, %2, %3, %4}"
++  "stmdb%?\t%5, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -360,7 +360,7 @@
+      (set (mem:SI (plus:SI (match_dup 5) (const_int -4)))
+           (match_operand:SI 4 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "stm%(db%)\t%5!, {%1, %2, %3, %4}"
++  "stmdb%?\t%5!, {%1, %2, %3, %4}"
+   [(set_attr "type" "store4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -472,7 +472,7 @@
+     FAIL;
+ })
+ 
+-(define_insn "*ldm3_ia"
++(define_insn "*ldm3_"
+   [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")
+           (mem:SI (match_operand:SI 4 "s_register_operand" "rk")))
+@@ -483,7 +483,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 8))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\t%4, {%1, %2, %3}"
++  "ldm%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -499,7 +499,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 8))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\t%4, {%1, %2, %3}"
++  "ldmia\t%4, {%1, %2, %3}"
+   [(set_attr "type" "load3")])
+ 
+ (define_insn "*ldm3_ia_update"
+@@ -515,7 +515,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 8))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\t%4!, {%1, %2, %3}"
++  "ldmia%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -533,10 +533,10 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 8))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\t%4!, {%1, %2, %3}"
++  "ldmia\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "load3")])
+ 
+-(define_insn "*stm3_ia"
++(define_insn "*stm3_"
+   [(match_parallel 0 "store_multiple_operation"
+     [(set (mem:SI (match_operand:SI 4 "s_register_operand" "rk"))
+           (match_operand:SI 1 "arm_hard_general_register_operand" ""))
+@@ -545,7 +545,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int 8)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\t%4, {%1, %2, %3}"
++  "stm%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -561,7 +561,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int 8)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\t%4!, {%1, %2, %3}"
++  "stmia%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -577,7 +577,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int 8)))
+           (match_operand:SI 3 "low_register_operand" ""))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\t%4!, {%1, %2, %3}"
++  "stmia\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "store3")])
+ 
+ (define_insn "*ldm3_ib"
+@@ -592,7 +592,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 12))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ib%)\t%4, {%1, %2, %3}"
++  "ldmib%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -610,7 +610,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int 12))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ib%)\t%4!, {%1, %2, %3}"
++  "ldmib%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -623,7 +623,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int 12)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ib%)\t%4, {%1, %2, %3}"
++  "stmib%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -638,7 +638,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int 12)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ib%)\t%4!, {%1, %2, %3}"
++  "stmib%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -653,7 +653,7 @@
+      (set (match_operand:SI 3 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 4)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(da%)\t%4, {%1, %2, %3}"
++  "ldmda%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -670,7 +670,7 @@
+      (set (match_operand:SI 3 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 4)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(da%)\t%4!, {%1, %2, %3}"
++  "ldmda%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -683,7 +683,7 @@
+      (set (mem:SI (match_dup 4))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "stm%(da%)\t%4, {%1, %2, %3}"
++  "stmda%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -698,7 +698,7 @@
+      (set (mem:SI (match_dup 4))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
+-  "stm%(da%)\t%4!, {%1, %2, %3}"
++  "stmda%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")])
+ 
+@@ -714,7 +714,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(db%)\t%4, {%1, %2, %3}"
++  "ldmdb%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -733,7 +733,7 @@
+           (mem:SI (plus:SI (match_dup 4)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(db%)\t%4!, {%1, %2, %3}"
++  "ldmdb%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "load3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -747,7 +747,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int -4)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(db%)\t%4, {%1, %2, %3}"
++  "stmdb%?\t%4, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -763,7 +763,7 @@
+      (set (mem:SI (plus:SI (match_dup 4) (const_int -4)))
+           (match_operand:SI 3 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(db%)\t%4!, {%1, %2, %3}"
++  "stmdb%?\t%4!, {%1, %2, %3}"
+   [(set_attr "type" "store3")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -861,7 +861,7 @@
+     FAIL;
+ })
+ 
+-(define_insn "*ldm2_ia"
++(define_insn "*ldm2_"
+   [(match_parallel 0 "load_multiple_operation"
+     [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")
+           (mem:SI (match_operand:SI 3 "s_register_operand" "rk")))
+@@ -869,7 +869,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(ia%)\t%3, {%1, %2}"
++  "ldm%?\t%3, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -882,7 +882,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 4))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(ia%)\t%3, {%1, %2}"
++  "ldmia\t%3, {%1, %2}"
+   [(set_attr "type" "load2")])
+ 
+ (define_insn "*ldm2_ia_update"
+@@ -895,7 +895,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\t%3!, {%1, %2}"
++  "ldmia%?\t%3!, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -910,17 +910,17 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 4))))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\t%3!, {%1, %2}"
++  "ldmia\t%3!, {%1, %2}"
+   [(set_attr "type" "load2")])
+ 
+-(define_insn "*stm2_ia"
++(define_insn "*stm2_"
+   [(match_parallel 0 "store_multiple_operation"
+     [(set (mem:SI (match_operand:SI 3 "s_register_operand" "rk"))
+           (match_operand:SI 1 "arm_hard_general_register_operand" ""))
+      (set (mem:SI (plus:SI (match_dup 3) (const_int 4)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "stm%(ia%)\t%3, {%1, %2}"
++  "stm%?\t%3, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -934,7 +934,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int 4)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\t%3!, {%1, %2}"
++  "stmia%?\t%3!, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -948,7 +948,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int 4)))
+           (match_operand:SI 2 "low_register_operand" ""))])]
+   "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\t%3!, {%1, %2}"
++  "stmia\t%3!, {%1, %2}"
+   [(set_attr "type" "store2")])
+ 
+ (define_insn "*ldm2_ib"
+@@ -960,7 +960,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 8))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(ib%)\t%3, {%1, %2}"
++  "ldmib%?\t%3, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -975,7 +975,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int 8))))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ib%)\t%3!, {%1, %2}"
++  "ldmib%?\t%3!, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -986,7 +986,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int 8)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
+-  "stm%(ib%)\t%3, {%1, %2}"
++  "stmib%?\t%3, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -999,7 +999,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int 8)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ib%)\t%3!, {%1, %2}"
++  "stmib%?\t%3!, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -1011,7 +1011,7 @@
+      (set (match_operand:SI 2 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 3)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(da%)\t%3, {%1, %2}"
++  "ldmda%?\t%3, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -1025,7 +1025,7 @@
+      (set (match_operand:SI 2 "arm_hard_general_register_operand" "")
+           (mem:SI (match_dup 3)))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(da%)\t%3!, {%1, %2}"
++  "ldmda%?\t%3!, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -1036,7 +1036,7 @@
+      (set (mem:SI (match_dup 3))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
+-  "stm%(da%)\t%3, {%1, %2}"
++  "stmda%?\t%3, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -1049,7 +1049,7 @@
+      (set (mem:SI (match_dup 3))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
+-  "stm%(da%)\t%3!, {%1, %2}"
++  "stmda%?\t%3!, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")])
+ 
+@@ -1062,7 +1062,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(db%)\t%3, {%1, %2}"
++  "ldmdb%?\t%3, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -1078,7 +1078,7 @@
+           (mem:SI (plus:SI (match_dup 3)
+                   (const_int -4))))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(db%)\t%3!, {%1, %2}"
++  "ldmdb%?\t%3!, {%1, %2}"
+   [(set_attr "type" "load2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -1090,7 +1090,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int -4)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "stm%(db%)\t%3, {%1, %2}"
++  "stmdb%?\t%3, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+@@ -1104,7 +1104,7 @@
+      (set (mem:SI (plus:SI (match_dup 3) (const_int -4)))
+           (match_operand:SI 2 "arm_hard_general_register_operand" ""))])]
+   "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(db%)\t%3!, {%1, %2}"
++  "stmdb%?\t%3!, {%1, %2}"
+   [(set_attr "type" "store2")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+--- a/src/gcc/config/arm/linux-eabi.h
++++ b/src/gcc/config/arm/linux-eabi.h
+@@ -77,6 +77,23 @@
+     %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \
+     %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}"
+ 
++/* For ARM musl currently supports four dynamic linkers:
++   - ld-musl-arm.so.1 - for the EABI-derived soft-float ABI
++   - ld-musl-armhf.so.1 - for the EABI-derived hard-float ABI
++   - ld-musl-armeb.so.1 - for the EABI-derived soft-float ABI, EB
++   - ld-musl-armebhf.so.1 - for the EABI-derived hard-float ABI, EB
++   musl does not support the legacy OABI mode.
++   All the dynamic linkers live in /lib.
++   We default to soft-float, EL. */
++#undef  MUSL_DYNAMIC_LINKER
++#if TARGET_BIG_ENDIAN_DEFAULT
++#define MUSL_DYNAMIC_LINKER_E "%{mlittle-endian:;:eb}"
++#else
++#define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}"
++#endif
++#define MUSL_DYNAMIC_LINKER \
++  "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1"
++
+ /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
+    use the GNU/Linux version, not the generic BPABI version.  */
+ #undef  LINK_SPEC
+@@ -107,6 +124,7 @@
+ 
+ #undef	ENDFILE_SPEC
+ #define ENDFILE_SPEC \
++  "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} "	\
+   LINUX_OR_ANDROID_LD (GNU_USER_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC)
+ 
+ /* Use the default LIBGCC_SPEC, not the version in linux-elf.h, as we
+--- a/src/gcc/config/arm/linux-elf.h
++++ b/src/gcc/config/arm/linux-elf.h
+@@ -85,17 +85,6 @@
+     }						\
+   while (0)
+ 
+-/* This is how we tell the assembler that two symbols have the same value.  */
+-#define ASM_OUTPUT_DEF(FILE, NAME1, NAME2) \
+-  do					   \
+-    {					   \
+-      assemble_name (FILE, NAME1); 	   \
+-      fputs (" = ", FILE);		   \
+-      assemble_name (FILE, NAME2);	   \
+-      fputc ('\n', FILE);		   \
+-    }					   \
+-  while (0)
+-
+ #undef  FPUTYPE_DEFAULT
+ #define FPUTYPE_DEFAULT "vfp"
+ 
+--- a/src/gcc/config/arm/neon-testgen.ml
++++ b/src/gcc/config/arm/neon-testgen.ml
+@@ -138,7 +138,6 @@ let emit_epilogue chan features regexps =
+      else
+        ()
+     );
+-    Printf.fprintf chan "/* { dg-final { cleanup-saved-temps } } */\n"
+ 
+ (* Check a list of C types to determine which ones are pointers and which
+    ones are const.  *)
+--- a/src/gcc/config/arm/neon.md
++++ b/src/gcc/config/arm/neon.md
+@@ -320,11 +320,11 @@
+   [(set_attr "type" "neon_load1_all_lanes<q>,neon_from_gp<q>")])
+ 
+ (define_insn "vec_set<mode>_internal"
+-  [(set (match_operand:VQ 0 "s_register_operand" "=w,w")
+-        (vec_merge:VQ
+-          (vec_duplicate:VQ
++  [(set (match_operand:VQ2 0 "s_register_operand" "=w,w")
++        (vec_merge:VQ2
++          (vec_duplicate:VQ2
+             (match_operand:<V_elem> 1 "nonimmediate_operand" "Um,r"))
+-          (match_operand:VQ 3 "s_register_operand" "0,0")
++          (match_operand:VQ2 3 "s_register_operand" "0,0")
+           (match_operand:SI 2 "immediate_operand" "i,i")))]
+   "TARGET_NEON"
+ {
+@@ -407,7 +407,7 @@
+ (define_insn "vec_extract<mode>"
+   [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=Um,r")
+ 	(vec_select:<V_elem>
+-          (match_operand:VQ 1 "s_register_operand" "w,w")
++          (match_operand:VQ2 1 "s_register_operand" "w,w")
+           (parallel [(match_operand:SI 2 "immediate_operand" "i,i")])))]
+   "TARGET_NEON"
+ {
+@@ -1114,7 +1114,7 @@
+ ;; lshrdi3_neon
+ (define_insn_and_split "<shift>di3_neon"
+   [(set (match_operand:DI 0 "s_register_operand"	     "= w, w,?&r,?r,?w,?w")
+-	(rshifts:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, r,0w, w")
++	(RSHIFTS:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, r,0w, w")
+ 		    (match_operand:SI 2 "reg_or_int_operand" "  r, i,  r, i, r, i")))
+    (clobber (match_scratch:SI 3				     "=2r, X, &r, X,2r, X"))
+    (clobber (match_scratch:SI 4				     "= X, X, &r, X, X, X"))
+@@ -1194,71 +1194,6 @@
+   [(set_attr "type" "neon_add_widen")]
+ )
+ 
+-;; VEXT can be used to synthesize coarse whole-vector shifts with 8-bit
+-;; shift-count granularity. That's good enough for the middle-end's current
+-;; needs.
+-
+-;; Note that it's not safe to perform such an operation in big-endian mode,
+-;; due to element-ordering issues.
+-
+-(define_expand "vec_shr_<mode>"
+-  [(match_operand:VDQ 0 "s_register_operand" "")
+-   (match_operand:VDQ 1 "s_register_operand" "")
+-   (match_operand:SI 2 "const_multiple_of_8_operand" "")]
+-  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+-{
+-  rtx zero_reg;
+-  HOST_WIDE_INT num_bits = INTVAL (operands[2]);
+-  const int width = GET_MODE_BITSIZE (<MODE>mode);
+-  const machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode;
+-  rtx (*gen_ext) (rtx, rtx, rtx, rtx) =
+-    (width == 128) ? gen_neon_vextv16qi : gen_neon_vextv8qi;
+-
+-  if (num_bits == width)
+-    {
+-      emit_move_insn (operands[0], operands[1]);
+-      DONE;
+-    }
+-
+-  zero_reg = force_reg (bvecmode, CONST0_RTX (bvecmode));
+-  operands[0] = gen_lowpart (bvecmode, operands[0]);
+-  operands[1] = gen_lowpart (bvecmode, operands[1]);
+-
+-  emit_insn (gen_ext (operands[0], operands[1], zero_reg,
+-		      GEN_INT (num_bits / BITS_PER_UNIT)));
+-  DONE;
+-})
+-
+-(define_expand "vec_shl_<mode>"
+-  [(match_operand:VDQ 0 "s_register_operand" "")
+-   (match_operand:VDQ 1 "s_register_operand" "")
+-   (match_operand:SI 2 "const_multiple_of_8_operand" "")]
+-  "TARGET_NEON && !BYTES_BIG_ENDIAN"
+-{
+-  rtx zero_reg;
+-  HOST_WIDE_INT num_bits = INTVAL (operands[2]);
+-  const int width = GET_MODE_BITSIZE (<MODE>mode);
+-  const machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode;
+-  rtx (*gen_ext) (rtx, rtx, rtx, rtx) =
+-    (width == 128) ? gen_neon_vextv16qi : gen_neon_vextv8qi;
+-
+-  if (num_bits == 0)
+-    {
+-      emit_move_insn (operands[0], CONST0_RTX (<MODE>mode));
+-      DONE;
+-    }
+-
+-  num_bits = width - num_bits;
+-
+-  zero_reg = force_reg (bvecmode, CONST0_RTX (bvecmode));
+-  operands[0] = gen_lowpart (bvecmode, operands[0]);
+-  operands[1] = gen_lowpart (bvecmode, operands[1]);
+-
+-  emit_insn (gen_ext (operands[0], zero_reg, operands[1],
+-		      GEN_INT (num_bits / BITS_PER_UNIT)));
+-  DONE;
+-})
+-
+ ;; Helpers for quad-word reduction operations
+ 
+ ; Add (or smin, smax...) the low N/2 elements of the N-element vector
+@@ -1267,7 +1202,7 @@
+ 
+ (define_insn "quad_halves_<code>v4si"
+   [(set (match_operand:V2SI 0 "s_register_operand" "=w")
+-        (vqh_ops:V2SI
++        (VQH_OPS:V2SI
+           (vec_select:V2SI (match_operand:V4SI 1 "s_register_operand" "w")
+                            (parallel [(const_int 0) (const_int 1)]))
+           (vec_select:V2SI (match_dup 1)
+@@ -1280,7 +1215,7 @@
+ 
+ (define_insn "quad_halves_<code>v4sf"
+   [(set (match_operand:V2SF 0 "s_register_operand" "=w")
+-        (vqhs_ops:V2SF
++        (VQHS_OPS:V2SF
+           (vec_select:V2SF (match_operand:V4SF 1 "s_register_operand" "w")
+                            (parallel [(const_int 0) (const_int 1)]))
+           (vec_select:V2SF (match_dup 1)
+@@ -1293,7 +1228,7 @@
+ 
+ (define_insn "quad_halves_<code>v8hi"
+   [(set (match_operand:V4HI 0 "s_register_operand" "+w")
+-        (vqh_ops:V4HI
++        (VQH_OPS:V4HI
+           (vec_select:V4HI (match_operand:V8HI 1 "s_register_operand" "w")
+                            (parallel [(const_int 0) (const_int 1)
+ 				      (const_int 2) (const_int 3)]))
+@@ -1308,7 +1243,7 @@
+ 
+ (define_insn "quad_halves_<code>v16qi"
+   [(set (match_operand:V8QI 0 "s_register_operand" "+w")
+-        (vqh_ops:V8QI
++        (VQH_OPS:V8QI
+           (vec_select:V8QI (match_operand:V16QI 1 "s_register_operand" "w")
+                            (parallel [(const_int 0) (const_int 1)
+ 				      (const_int 2) (const_int 3)
+@@ -2079,6 +2014,18 @@
+   [(set_attr "type" "neon_sat_mul_<V_elem_ch><q>")]
+ )
+ 
++;; vqrdmlah, vqrdmlsh
++(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h<mode>"
++  [(set (match_operand:VMDQI 0 "s_register_operand" "=w")
++	(unspec:VMDQI [(match_operand:VMDQI 1 "s_register_operand" "0")
++		       (match_operand:VMDQI 2 "s_register_operand" "w")
++		       (match_operand:VMDQI 3 "s_register_operand" "w")]
++		      VQRDMLH_AS))]
++  "TARGET_NEON_RDMA"
++  "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
++  [(set_attr "type" "neon_sat_mla_<V_elem_ch>_long")]
++)
++
+ (define_insn "neon_vqdmlal<mode>"
+   [(set (match_operand:<V_widen> 0 "s_register_operand" "=w")
+         (unspec:<V_widen> [(match_operand:<V_widen> 1 "s_register_operand" "0")
+@@ -2200,134 +2147,140 @@
+   [(set_attr "type" "neon_sub_halve_narrow_q")]
+ )
+ 
+-(define_insn "neon_vceq<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
+-	   (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz")]
+-          UNSPEC_VCEQ))]
++;; These may expand to an UNSPEC pattern when a floating point mode is used
++;; without unsafe math optimizations.
++(define_expand "neon_vc<cmp_op><mode>"
++  [(match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
++     (neg:<V_cmp_result>
++       (COMPARISONS:VDQW (match_operand:VDQW 1 "s_register_operand" "w,w")
++                         (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz")))]
+   "TARGET_NEON"
+-  "@
+-  vceq.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
+-  vceq.<V_if_elem>\t%<V_reg>0, %<V_reg>1, #0"
+-  [(set (attr "type")
+-      (if_then_else (match_test "<Is_float_mode>")
+-                    (const_string "neon_fp_compare_s<q>")
+-                    (if_then_else (match_operand 2 "zero_operand")
+-                      (const_string "neon_compare_zero<q>")
+-                      (const_string "neon_compare<q>"))))]
++  {
++    /* For FP comparisons use UNSPECS unless -funsafe-math-optimizations
++       are enabled.  */
++    if (GET_MODE_CLASS (<MODE>mode) == MODE_VECTOR_FLOAT
++        && !flag_unsafe_math_optimizations)
++      {
++        /* We don't just emit a gen_neon_vc<cmp_op><mode>_insn_unspec because
++           we define gen_neon_vceq<mode>_insn_unspec only for float modes
++           whereas this expander iterates over the integer modes as well,
++           but we will never expand to UNSPECs for the integer comparisons.  */
++        switch (<MODE>mode)
++          {
++            case V2SFmode:
++              emit_insn (gen_neon_vc<cmp_op>v2sf_insn_unspec (operands[0],
++                                                              operands[1],
++                                                              operands[2]));
++              break;
++            case V4SFmode:
++              emit_insn (gen_neon_vc<cmp_op>v4sf_insn_unspec (operands[0],
++                                                              operands[1],
++                                                              operands[2]));
++              break;
++            default:
++              gcc_unreachable ();
++          }
++      }
++    else
++      emit_insn (gen_neon_vc<cmp_op><mode>_insn (operands[0],
++                                                 operands[1],
++                                                 operands[2]));
++    DONE;
++  }
+ )
+ 
+-(define_insn "neon_vcge<mode>"
++(define_insn "neon_vc<cmp_op><mode>_insn"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
+-	   (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz")]
+-          UNSPEC_VCGE))]
+-  "TARGET_NEON"
+-  "@
+-  vcge.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
+-  vcge.<V_s_elem>\t%<V_reg>0, %<V_reg>1, #0"
++        (neg:<V_cmp_result>
++          (COMPARISONS:<V_cmp_result>
++            (match_operand:VDQW 1 "s_register_operand" "w,w")
++            (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz"))))]
++  "TARGET_NEON && !(GET_MODE_CLASS (<MODE>mode) == MODE_VECTOR_FLOAT
++                    && !flag_unsafe_math_optimizations)"
++  {
++    char pattern[100];
++    sprintf (pattern, "vc<cmp_op>.%s%%#<V_sz_elem>\t%%<V_reg>0,"
++                      " %%<V_reg>1, %s",
++                       GET_MODE_CLASS (<MODE>mode) == MODE_VECTOR_FLOAT
++                         ? "f" : "<cmp_type>",
++                       which_alternative == 0
++                         ? "%<V_reg>2" : "#0");
++    output_asm_insn (pattern, operands);
++    return "";
++  }
+   [(set (attr "type")
+-     (if_then_else (match_test "<Is_float_mode>")
+-                   (const_string "neon_fp_compare_s<q>")
+-                    (if_then_else (match_operand 2 "zero_operand")
++        (if_then_else (match_operand 2 "zero_operand")
+                       (const_string "neon_compare_zero<q>")
+-                      (const_string "neon_compare<q>"))))]
++                      (const_string "neon_compare<q>")))]
+ )
+ 
+-(define_insn "neon_vcgeu<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQIW 1 "s_register_operand" "w")
+-	   (match_operand:VDQIW 2 "s_register_operand" "w")]
+-          UNSPEC_VCGEU))]
+-  "TARGET_NEON"
+-  "vcge.u%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+-  [(set_attr "type" "neon_compare<q>")]
+-)
+-
+-(define_insn "neon_vcgt<mode>"
++(define_insn "neon_vc<cmp_op_unsp><mode>_insn_unspec"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
+         (unspec:<V_cmp_result>
+-	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
+-	   (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz")]
+-          UNSPEC_VCGT))]
++	  [(match_operand:VCVTF 1 "s_register_operand" "w,w")
++	   (match_operand:VCVTF 2 "reg_or_zero_operand" "w,Dz")]
++          NEON_VCMP))]
+   "TARGET_NEON"
+-  "@
+-  vcgt.<V_s_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
+-  vcgt.<V_s_elem>\t%<V_reg>0, %<V_reg>1, #0"
+-  [(set (attr "type")
+-     (if_then_else (match_test "<Is_float_mode>")
+-                   (const_string "neon_fp_compare_s<q>")
+-                    (if_then_else (match_operand 2 "zero_operand")
+-                      (const_string "neon_compare_zero<q>")
+-                      (const_string "neon_compare<q>"))))]
++  {
++    char pattern[100];
++    sprintf (pattern, "vc<cmp_op_unsp>.f%%#<V_sz_elem>\t%%<V_reg>0,"
++                       " %%<V_reg>1, %s",
++                       which_alternative == 0
++                         ? "%<V_reg>2" : "#0");
++    output_asm_insn (pattern, operands);
++    return "";
++}
++  [(set_attr "type" "neon_fp_compare_s<q>")]
+ )
+ 
+-(define_insn "neon_vcgtu<mode>"
++(define_insn "neon_vc<cmp_op>u<mode>"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQIW 1 "s_register_operand" "w")
+-	   (match_operand:VDQIW 2 "s_register_operand" "w")]
+-          UNSPEC_VCGTU))]
++        (neg:<V_cmp_result>
++          (GTUGEU:<V_cmp_result>
++	    (match_operand:VDQIW 1 "s_register_operand" "w")
++	    (match_operand:VDQIW 2 "s_register_operand" "w"))))]
+   "TARGET_NEON"
+-  "vcgt.u%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++  "vc<cmp_op>.u%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set_attr "type" "neon_compare<q>")]
+ )
+ 
+-;; VCLE and VCLT only support comparisons with immediate zero (register
+-;; variants are VCGE and VCGT with operands reversed).
+-
+-(define_insn "neon_vcle<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQW 1 "s_register_operand" "w")
+-	   (match_operand:VDQW 2 "zero_operand" "Dz")]
+-          UNSPEC_VCLE))]
+-  "TARGET_NEON"
+-  "vcle.<V_s_elem>\t%<V_reg>0, %<V_reg>1, #0"
+-  [(set (attr "type")
+-      (if_then_else (match_test "<Is_float_mode>")
+-                    (const_string "neon_fp_compare_s<q>")
+-                    (if_then_else (match_operand 2 "zero_operand")
+-                      (const_string "neon_compare_zero<q>")
+-                      (const_string "neon_compare<q>"))))]
+-)
+-
+-(define_insn "neon_vclt<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result>
+-	  [(match_operand:VDQW 1 "s_register_operand" "w")
+-	   (match_operand:VDQW 2 "zero_operand" "Dz")]
+-          UNSPEC_VCLT))]
++(define_expand "neon_vca<cmp_op><mode>"
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand")
++        (neg:<V_cmp_result>
++          (GTGE:<V_cmp_result>
++            (abs:VCVTF (match_operand:VCVTF 1 "s_register_operand"))
++            (abs:VCVTF (match_operand:VCVTF 2 "s_register_operand")))))]
+   "TARGET_NEON"
+-  "vclt.<V_s_elem>\t%<V_reg>0, %<V_reg>1, #0"
+-  [(set (attr "type")
+-      (if_then_else (match_test "<Is_float_mode>")
+-                    (const_string "neon_fp_compare_s<q>")
+-                    (if_then_else (match_operand 2 "zero_operand")
+-                      (const_string "neon_compare_zero<q>")
+-                      (const_string "neon_compare<q>"))))]
++  {
++    if (flag_unsafe_math_optimizations)
++      emit_insn (gen_neon_vca<cmp_op><mode>_insn (operands[0], operands[1],
++                                                  operands[2]));
++    else
++      emit_insn (gen_neon_vca<cmp_op><mode>_insn_unspec (operands[0],
++                                                         operands[1],
++                                                         operands[2]));
++    DONE;
++  }
+ )
+ 
+-(define_insn "neon_vcage<mode>"
++(define_insn "neon_vca<cmp_op><mode>_insn"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result> [(match_operand:VCVTF 1 "s_register_operand" "w")
+-		                (match_operand:VCVTF 2 "s_register_operand" "w")]
+-                               UNSPEC_VCAGE))]
+-  "TARGET_NEON"
+-  "vacge.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++        (neg:<V_cmp_result>
++          (GTGE:<V_cmp_result>
++            (abs:VCVTF (match_operand:VCVTF 1 "s_register_operand" "w"))
++            (abs:VCVTF (match_operand:VCVTF 2 "s_register_operand" "w")))))]
++  "TARGET_NEON && flag_unsafe_math_optimizations"
++  "vac<cmp_op>.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set_attr "type" "neon_fp_compare_s<q>")]
+ )
+ 
+-(define_insn "neon_vcagt<mode>"
++(define_insn "neon_vca<cmp_op_unsp><mode>_insn_unspec"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+         (unspec:<V_cmp_result> [(match_operand:VCVTF 1 "s_register_operand" "w")
+ 		                (match_operand:VCVTF 2 "s_register_operand" "w")]
+-                               UNSPEC_VCAGT))]
++                               NEON_VACMP))]
+   "TARGET_NEON"
+-  "vacgt.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++  "vac<cmp_op_unsp>.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set_attr "type" "neon_fp_compare_s<q>")]
+ )
+ 
+@@ -2666,7 +2619,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(sign_extend:SI
+ 	  (vec_select:<V_elem>
+-	    (match_operand:VQ 1 "s_register_operand" "w")
++	    (match_operand:VQ2 1 "s_register_operand" "w")
+ 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
+   "TARGET_NEON"
+ {
+@@ -2693,7 +2646,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(zero_extend:SI
+ 	  (vec_select:<V_elem>
+-	    (match_operand:VQ 1 "s_register_operand" "w")
++	    (match_operand:VQ2 1 "s_register_operand" "w")
+ 	    (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
+   "TARGET_NEON"
+ {
+@@ -2722,8 +2675,6 @@
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<MODE>mode));
+-
+   if (BYTES_BIG_ENDIAN)
+     {
+       /* The intrinsics are defined in terms of a model where the
+@@ -2733,12 +2684,12 @@
+ 	 to this model.  */
+       unsigned int elt = INTVAL (operands[2]);
+       unsigned int reg_nelts
+-	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
++	= 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
+       elt ^= reg_nelts - 1;
+       operands[2] = GEN_INT (elt);
+     }
+ 
+-  if (GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode)) == 32)
++  if (GET_MODE_UNIT_BITSIZE (<MODE>mode) == 32)
+     emit_insn (gen_vec_extract<mode> (operands[0], operands[1], operands[2]));
+   else
+     emit_insn (gen_neon_vget_lane<mode>_sext_internal (operands[0],
+@@ -2753,8 +2704,6 @@
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<MODE>mode));
+-
+   if (BYTES_BIG_ENDIAN)
+     {
+       /* The intrinsics are defined in terms of a model where the
+@@ -2764,12 +2713,12 @@
+ 	 to this model.  */
+       unsigned int elt = INTVAL (operands[2]);
+       unsigned int reg_nelts
+-	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
++	= 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
+       elt ^= reg_nelts - 1;
+       operands[2] = GEN_INT (elt);
+     }
+ 
+-  if (GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode)) == 32)
++  if (GET_MODE_UNIT_BITSIZE (<MODE>mode) == 32)
+     emit_insn (gen_vec_extract<mode> (operands[0], operands[1], operands[2]));
+   else
+     emit_insn (gen_neon_vget_lane<mode>_zext_internal (operands[0],
+@@ -2784,7 +2733,6 @@
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, 1);
+   emit_move_insn (operands[0], operands[1]);
+   DONE;
+ })
+@@ -2795,18 +2743,26 @@
+    (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON"
+ {
+-  switch (INTVAL (operands[2]))
++  int lane;
++
++if (BYTES_BIG_ENDIAN)
+     {
+-    case 0:
+-      emit_move_insn (operands[0], gen_lowpart (DImode, operands[1]));
+-      break;
+-    case 1:
+-      emit_move_insn (operands[0], gen_highpart (DImode, operands[1]));
+-      break;
+-    default:
+-      neon_lane_bounds (operands[2], 0, 1);
+-      FAIL;
++      /* The intrinsics are defined in terms of a model where the
++	 element ordering in memory is vldm order, whereas the generic
++	 RTL is defined in terms of a model where the element ordering
++	 in memory is array order.  Convert the lane number to conform
++	 to this model.  */
++      unsigned int elt = INTVAL (operands[2]);
++      unsigned int reg_nelts = 2;
++      elt ^= reg_nelts - 1;
++      operands[2] = GEN_INT (elt);
+     }
++
++  lane = INTVAL (operands[2]);
++  gcc_assert ((lane ==0) || (lane == 1));
++  emit_move_insn (operands[0], lane == 0
++				? gen_lowpart (DImode, operands[1])
++				: gen_highpart (DImode, operands[1]));
+   DONE;
+ })
+ 
+@@ -2818,12 +2774,11 @@
+   "TARGET_NEON"
+ {
+   unsigned int elt = INTVAL (operands[3]);
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+ 
+   if (BYTES_BIG_ENDIAN)
+     {
+       unsigned int reg_nelts
+-	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
++	= 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
+       elt ^= reg_nelts - 1;
+     }
+ 
+@@ -2841,13 +2796,12 @@
+    (match_operand:SI 3 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, 1);
+   emit_move_insn (operands[0], operands[1]);
+   DONE;
+ })
+ 
+ (define_expand "neon_vcreate<mode>"
+-  [(match_operand:VDX 0 "s_register_operand" "")
++  [(match_operand:VD_RE 0 "s_register_operand" "")
+    (match_operand:DI 1 "general_operand" "")]
+   "TARGET_NEON"
+ {
+@@ -2923,12 +2877,11 @@
+    (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<V_double_vector_mode>mode));
+   if (BYTES_BIG_ENDIAN)
+     {
+       unsigned int elt = INTVAL (operands[2]);
+       unsigned int reg_nelts
+-	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<V_double_vector_mode>mode));
++	= 64 / GET_MODE_UNIT_BITSIZE (<V_double_vector_mode>mode);
+       elt ^= reg_nelts - 1;
+       operands[2] = GEN_INT (elt);
+     }
+@@ -2944,7 +2897,6 @@
+    (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, 1);
+   emit_move_insn (operands[0], operands[1]);
+   DONE;
+ })
+@@ -2956,7 +2908,6 @@
+    (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, 1);
+   emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
+   DONE;
+ })
+@@ -3156,7 +3107,6 @@
+                     UNSPEC_VMUL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmul.<V_if_elem>\t%P0, %P1, %P2[%c3]";
+ }
+   [(set (attr "type")
+@@ -3174,7 +3124,6 @@
+                     UNSPEC_VMUL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<V_HALF>mode));
+   return "vmul.<V_if_elem>\t%q0, %q1, %P2[%c3]";
+ }
+   [(set (attr "type")
+@@ -3192,7 +3141,6 @@
+                           VMULL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmull.<sup>%#<V_sz_elem>\t%q0, %P1, %P2[%c3]";
+ }
+   [(set_attr "type" "neon_mul_<V_elem_ch>_scalar_long")]
+@@ -3207,7 +3155,6 @@
+                           UNSPEC_VQDMULL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vqdmull.<V_s_elem>\t%q0, %P1, %P2[%c3]";
+ }
+   [(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_long")]
+@@ -3222,7 +3169,6 @@
+                       VQDMULH_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vq<r>dmulh.<V_s_elem>\t%q0, %q1, %P2[%c3]";
+ }
+   [(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")]
+@@ -3237,12 +3183,44 @@
+                       VQDMULH_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vq<r>dmulh.<V_s_elem>\t%P0, %P1, %P2[%c3]";
+ }
+   [(set_attr "type" "neon_sat_mul_<V_elem_ch>_scalar_q")]
+ )
+ 
++;; vqrdmlah_lane, vqrdmlsh_lane
++(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>"
++  [(set (match_operand:VMQI 0 "s_register_operand" "=w")
++	(unspec:VMQI [(match_operand:VMQI 1 "s_register_operand" "0")
++		      (match_operand:VMQI 2 "s_register_operand" "w")
++		      (match_operand:<V_HALF> 3 "s_register_operand"
++					  "<scalar_mul_constraint>")
++		      (match_operand:SI 4 "immediate_operand" "i")]
++		     VQRDMLH_AS))]
++  "TARGET_NEON_RDMA"
++{
++  return
++   "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%q0, %q2, %P3[%c4]";
++}
++  [(set_attr "type" "neon_mla_<V_elem_ch>_scalar<q>")]
++)
++
++(define_insn "neon_vqrdml<VQRDMLH_AS:neon_rdma_as>h_lane<mode>"
++  [(set (match_operand:VMDI 0 "s_register_operand" "=w")
++	(unspec:VMDI [(match_operand:VMDI 1 "s_register_operand" "0")
++		      (match_operand:VMDI 2 "s_register_operand" "w")
++		      (match_operand:VMDI 3 "s_register_operand"
++					  "<scalar_mul_constraint>")
++		      (match_operand:SI 4 "immediate_operand" "i")]
++		     VQRDMLH_AS))]
++  "TARGET_NEON_RDMA"
++{
++  return
++   "vqrdml<VQRDMLH_AS:neon_rdma_as>h.<V_s_elem>\t%P0, %P2, %P3[%c4]";
++}
++  [(set_attr "type" "neon_mla_<V_elem_ch>_scalar")]
++)
++
+ (define_insn "neon_vmla_lane<mode>"
+   [(set (match_operand:VMD 0 "s_register_operand" "=w")
+ 	(unspec:VMD [(match_operand:VMD 1 "s_register_operand" "0")
+@@ -3253,7 +3231,6 @@
+                      UNSPEC_VMLA_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmla.<V_if_elem>\t%P0, %P2, %P3[%c4]";
+ }
+   [(set (attr "type")
+@@ -3272,7 +3249,6 @@
+                      UNSPEC_VMLA_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmla.<V_if_elem>\t%q0, %q2, %P3[%c4]";
+ }
+   [(set (attr "type")
+@@ -3291,7 +3267,6 @@
+                           VMLAL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmlal.<sup>%#<V_sz_elem>\t%q0, %P2, %P3[%c4]";
+ }
+   [(set_attr "type" "neon_mla_<V_elem_ch>_scalar_long")]
+@@ -3307,7 +3282,6 @@
+                           UNSPEC_VQDMLAL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vqdmlal.<V_s_elem>\t%q0, %P2, %P3[%c4]";
+ }
+   [(set_attr "type" "neon_sat_mla_<V_elem_ch>_scalar_long")]
+@@ -3323,7 +3297,6 @@
+                     UNSPEC_VMLS_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmls.<V_if_elem>\t%P0, %P2, %P3[%c4]";
+ }
+   [(set (attr "type")
+@@ -3342,7 +3315,6 @@
+                     UNSPEC_VMLS_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmls.<V_if_elem>\t%q0, %q2, %P3[%c4]";
+ }
+   [(set (attr "type")
+@@ -3361,7 +3333,6 @@
+                           VMLSL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vmlsl.<sup>%#<V_sz_elem>\t%q0, %P2, %P3[%c4]";
+ }
+   [(set_attr "type" "neon_mla_<V_elem_ch>_scalar_long")]
+@@ -3377,7 +3348,6 @@
+                           UNSPEC_VQDMLSL_LANE))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[4], 0, GET_MODE_NUNITS (<MODE>mode));
+   return "vqdmlsl.<V_s_elem>\t%q0, %P2, %P3[%c4]";
+ }
+   [(set_attr "type" "neon_sat_mla_<V_elem_ch>_scalar_long")]
+@@ -4149,11 +4119,11 @@
+ 
+ ;; Note: Different operand numbering to handle tied registers correctly.
+ (define_insn "*neon_vtrn<mode>_insn"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
++  [(set (match_operand:VDQW 0 "s_register_operand" "=&w")
+         (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
+                       (match_operand:VDQW 3 "s_register_operand" "2")]
+                      UNSPEC_VTRN1))
+-   (set (match_operand:VDQW 2 "s_register_operand" "=w")
++   (set (match_operand:VDQW 2 "s_register_operand" "=&w")
+          (unspec:VDQW [(match_dup 1) (match_dup 3)]
+                      UNSPEC_VTRN2))]
+   "TARGET_NEON"
+@@ -4175,11 +4145,11 @@
+ 
+ ;; Note: Different operand numbering to handle tied registers correctly.
+ (define_insn "*neon_vzip<mode>_insn"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
++  [(set (match_operand:VDQW 0 "s_register_operand" "=&w")
+         (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
+                       (match_operand:VDQW 3 "s_register_operand" "2")]
+                      UNSPEC_VZIP1))
+-   (set (match_operand:VDQW 2 "s_register_operand" "=w")
++   (set (match_operand:VDQW 2 "s_register_operand" "=&w")
+         (unspec:VDQW [(match_dup 1) (match_dup 3)]
+                      UNSPEC_VZIP2))]
+   "TARGET_NEON"
+@@ -4201,11 +4171,11 @@
+ 
+ ;; Note: Different operand numbering to handle tied registers correctly.
+ (define_insn "*neon_vuzp<mode>_insn"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
++  [(set (match_operand:VDQW 0 "s_register_operand" "=&w")
+         (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
+                       (match_operand:VDQW 3 "s_register_operand" "2")]
+                      UNSPEC_VUZP1))
+-   (set (match_operand:VDQW 2 "s_register_operand" "=w")
++   (set (match_operand:VDQW 2 "s_register_operand" "=&w")
+         (unspec:VDQW [(match_dup 1) (match_dup 3)]
+                      UNSPEC_VUZP2))]
+   "TARGET_NEON"
+@@ -4213,106 +4183,6 @@
+   [(set_attr "type" "neon_zip<q>")]
+ )
+ 
+-(define_expand "neon_vreinterpretv8qi<mode>"
+-  [(match_operand:V8QI 0 "s_register_operand" "")
+-   (match_operand:VDX 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv4hi<mode>"
+-  [(match_operand:V4HI 0 "s_register_operand" "")
+-   (match_operand:VDX 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv2si<mode>"
+-  [(match_operand:V2SI 0 "s_register_operand" "")
+-   (match_operand:VDX 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv2sf<mode>"
+-  [(match_operand:V2SF 0 "s_register_operand" "")
+-   (match_operand:VDX 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretdi<mode>"
+-  [(match_operand:DI 0 "s_register_operand" "")
+-   (match_operand:VDX 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretti<mode>"
+-  [(match_operand:TI 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-
+-(define_expand "neon_vreinterpretv16qi<mode>"
+-  [(match_operand:V16QI 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv8hi<mode>"
+-  [(match_operand:V8HI 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv4si<mode>"
+-  [(match_operand:V4SI 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv4sf<mode>"
+-  [(match_operand:V4SF 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+-(define_expand "neon_vreinterpretv2di<mode>"
+-  [(match_operand:V2DI 0 "s_register_operand" "")
+-   (match_operand:VQXMOV 1 "s_register_operand" "")]
+-  "TARGET_NEON"
+-{
+-  neon_reinterpret (operands[0], operands[1]);
+-  DONE;
+-})
+-
+ (define_expand "vec_load_lanes<mode><mode>"
+   [(set (match_operand:VDQX 0 "s_register_operand")
+         (unspec:VDQX [(match_operand:VDQX 1 "neon_struct_operand")]
+@@ -4328,6 +4198,9 @@
+   [(set_attr "type" "neon_load1_1reg<q>")]
+ )
+ 
++;; The lane numbers in the RTL are in GCC lane order, having been flipped
++;; in arm_expand_neon_args. The lane numbers are restored to architectural
++;; lane order here.
+ (define_insn "neon_vld1_lane<mode>"
+   [(set (match_operand:VDX 0 "s_register_operand" "=w")
+         (unspec:VDX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
+@@ -4336,10 +4209,9 @@
+                     UNSPEC_VLD1_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
++  operands[3] = GEN_INT (lane);
+   if (max == 1)
+     return "vld1.<V_sz_elem>\t%P0, %A1";
+   else
+@@ -4348,6 +4220,8 @@
+   [(set_attr "type" "neon_load1_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld1_lane<mode>"
+   [(set (match_operand:VQX 0 "s_register_operand" "=w")
+         (unspec:VQX [(match_operand:<V_elem> 1 "neon_struct_operand" "Um")
+@@ -4356,12 +4230,11 @@
+                     UNSPEC_VLD1_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  operands[3] = GEN_INT (lane);
+   int regno = REGNO (operands[0]);
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -4434,6 +4307,8 @@
+   "vst1.<V_sz_elem>\t%h1, %A0"
+   [(set_attr "type" "neon_store1_1reg<q>")])
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst1_lane<mode>"
+   [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
+ 	(unspec:<V_elem>
+@@ -4442,10 +4317,9 @@
+ 	  UNSPEC_VST1_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
++  operands[2] = GEN_INT (lane);
+   if (max == 1)
+     return "vst1.<V_sz_elem>\t{%P1}, %A0";
+   else
+@@ -4454,6 +4328,8 @@
+   [(set_attr "type" "neon_store1_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst1_lane<mode>"
+   [(set (match_operand:<V_elem> 0 "neon_struct_operand" "=Um")
+ 	(unspec:<V_elem>
+@@ -4462,17 +4338,15 @@
+ 	  UNSPEC_VST1_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[1]);
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+-      operands[2] = GEN_INT (lane);
+     }
++  operands[2] = GEN_INT (lane);
+   operands[1] = gen_rtx_REG (<V_HALF>mode, regno);
+   if (max == 2)
+     return "vst1.<V_sz_elem>\t{%P1}, %A0";
+@@ -4510,60 +4384,59 @@
+ (define_expand "vec_load_lanesoi<mode>"
+   [(set (match_operand:OI 0 "s_register_operand")
+         (unspec:OI [(match_operand:OI 1 "neon_struct_operand")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 		   UNSPEC_VLD2))]
+   "TARGET_NEON")
+ 
+ (define_insn "neon_vld2<mode>"
+   [(set (match_operand:OI 0 "s_register_operand" "=w")
+         (unspec:OI [(match_operand:OI 1 "neon_struct_operand" "Um")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2))]
+   "TARGET_NEON"
+   "vld2.<V_sz_elem>\t%h0, %A1"
+   [(set_attr "type" "neon_load2_2reg_q")])
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld2_lane<mode>"
+   [(set (match_operand:TI 0 "s_register_operand" "=w")
+         (unspec:TI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:TI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   int regno = REGNO (operands[0]);
+   rtx ops[4];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = gen_rtx_REG (DImode, regno);
+   ops[1] = gen_rtx_REG (DImode, regno + 2);
+   ops[2] = operands[1];
+-  ops[3] = operands[3];
++  ops[3] = GEN_INT (lane);
+   output_asm_insn ("vld2.<V_sz_elem>\t{%P0[%c3], %P1[%c3]}, %A2", ops);
+   return "";
+ }
+   [(set_attr "type" "neon_load2_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld2_lane<mode>"
+   [(set (match_operand:OI 0 "s_register_operand" "=w")
+         (unspec:OI [(match_operand:<V_two_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:OI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD2_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[0]);
+   rtx ops[4];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -4624,61 +4497,60 @@
+ (define_expand "vec_store_lanesoi<mode>"
+   [(set (match_operand:OI 0 "neon_struct_operand")
+ 	(unspec:OI [(match_operand:OI 1 "s_register_operand")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VST2))]
+   "TARGET_NEON")
+ 
+ (define_insn "neon_vst2<mode>"
+   [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+ 	(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
+-		    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++		    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 		   UNSPEC_VST2))]
+   "TARGET_NEON"
+   "vst2.<V_sz_elem>\t%h1, %A0"
+   [(set_attr "type" "neon_store2_4reg<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst2_lane<mode>"
+   [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
+ 	(unspec:<V_two_elem>
+ 	  [(match_operand:TI 1 "s_register_operand" "w")
+ 	   (match_operand:SI 2 "immediate_operand" "i")
+-	   (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++	   (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+ 	  UNSPEC_VST2_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   int regno = REGNO (operands[1]);
+   rtx ops[4];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = operands[0];
+   ops[1] = gen_rtx_REG (DImode, regno);
+   ops[2] = gen_rtx_REG (DImode, regno + 2);
+-  ops[3] = operands[2];
++  ops[3] = GEN_INT (lane);
+   output_asm_insn ("vst2.<V_sz_elem>\t{%P1[%c3], %P2[%c3]}, %A0", ops);
+   return "";
+ }
+   [(set_attr "type" "neon_store2_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst2_lane<mode>"
+   [(set (match_operand:<V_two_elem> 0 "neon_struct_operand" "=Um")
+         (unspec:<V_two_elem>
+            [(match_operand:OI 1 "s_register_operand" "w")
+             (match_operand:SI 2 "immediate_operand" "i")
+-            (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++            (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+            UNSPEC_VST2_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[1]);
+   rtx ops[4];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -4721,7 +4593,7 @@
+ (define_expand "vec_load_lanesci<mode>"
+   [(match_operand:CI 0 "s_register_operand")
+    (match_operand:CI 1 "neon_struct_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   emit_insn (gen_neon_vld3<mode> (operands[0], operands[1]));
+@@ -4731,7 +4603,7 @@
+ (define_expand "neon_vld3<mode>"
+   [(match_operand:CI 0 "s_register_operand")
+    (match_operand:CI 1 "neon_struct_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   rtx mem;
+@@ -4746,7 +4618,7 @@
+ (define_insn "neon_vld3qa<mode>"
+   [(set (match_operand:CI 0 "s_register_operand" "=w")
+         (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD3A))]
+   "TARGET_NEON"
+ {
+@@ -4766,7 +4638,7 @@
+   [(set (match_operand:CI 0 "s_register_operand" "=w")
+         (unspec:CI [(match_operand:EI 1 "neon_struct_operand" "Um")
+                     (match_operand:CI 2 "s_register_operand" "0")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD3B))]
+   "TARGET_NEON"
+ {
+@@ -4782,26 +4654,25 @@
+   [(set_attr "type" "neon_load3_3reg<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld3_lane<mode>"
+   [(set (match_operand:EI 0 "s_register_operand" "=w")
+         (unspec:EI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:EI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD3_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[3]));
+   int regno = REGNO (operands[0]);
+   rtx ops[5];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = gen_rtx_REG (DImode, regno);
+   ops[1] = gen_rtx_REG (DImode, regno + 2);
+   ops[2] = gen_rtx_REG (DImode, regno + 4);
+   ops[3] = operands[1];
+-  ops[4] = operands[3];
++  ops[4] = GEN_INT (lane);
+   output_asm_insn ("vld3.<V_sz_elem>\t{%P0[%c4], %P1[%c4], %P2[%c4]}, %3",
+                    ops);
+   return "";
+@@ -4809,22 +4680,22 @@
+   [(set_attr "type" "neon_load3_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld3_lane<mode>"
+   [(set (match_operand:CI 0 "s_register_operand" "=w")
+         (unspec:CI [(match_operand:<V_three_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:CI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD3_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[0]);
+   rtx ops[5];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -4894,7 +4765,7 @@
+ (define_expand "vec_store_lanesci<mode>"
+   [(match_operand:CI 0 "neon_struct_operand")
+    (match_operand:CI 1 "s_register_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   emit_insn (gen_neon_vst3<mode> (operands[0], operands[1]));
+@@ -4904,7 +4775,7 @@
+ (define_expand "neon_vst3<mode>"
+   [(match_operand:CI 0 "neon_struct_operand")
+    (match_operand:CI 1 "s_register_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   rtx mem;
+@@ -4919,7 +4790,7 @@
+ (define_insn "neon_vst3qa<mode>"
+   [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
+         (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VST3A))]
+   "TARGET_NEON"
+ {
+@@ -4938,7 +4809,7 @@
+ (define_insn "neon_vst3qb<mode>"
+   [(set (match_operand:EI 0 "neon_struct_operand" "=Um")
+         (unspec:EI [(match_operand:CI 1 "s_register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VST3B))]
+   "TARGET_NEON"
+ {
+@@ -4954,26 +4825,25 @@
+   [(set_attr "type" "neon_store3_3reg<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst3_lane<mode>"
+   [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
+         (unspec:<V_three_elem>
+            [(match_operand:EI 1 "s_register_operand" "w")
+             (match_operand:SI 2 "immediate_operand" "i")
+-            (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++            (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+            UNSPEC_VST3_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   int regno = REGNO (operands[1]);
+   rtx ops[5];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = operands[0];
+   ops[1] = gen_rtx_REG (DImode, regno);
+   ops[2] = gen_rtx_REG (DImode, regno + 2);
+   ops[3] = gen_rtx_REG (DImode, regno + 4);
+-  ops[4] = operands[2];
++  ops[4] = GEN_INT (lane);
+   output_asm_insn ("vst3.<V_sz_elem>\t{%P1[%c4], %P2[%c4], %P3[%c4]}, %0",
+                    ops);
+   return "";
+@@ -4981,22 +4851,22 @@
+   [(set_attr "type" "neon_store3_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst3_lane<mode>"
+   [(set (match_operand:<V_three_elem> 0 "neon_struct_operand" "=Um")
+         (unspec:<V_three_elem>
+            [(match_operand:CI 1 "s_register_operand" "w")
+             (match_operand:SI 2 "immediate_operand" "i")
+-            (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++            (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+            UNSPEC_VST3_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[1]);
+   rtx ops[5];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -5041,7 +4911,7 @@
+ (define_expand "vec_load_lanesxi<mode>"
+   [(match_operand:XI 0 "s_register_operand")
+    (match_operand:XI 1 "neon_struct_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   emit_insn (gen_neon_vld4<mode> (operands[0], operands[1]));
+@@ -5051,7 +4921,7 @@
+ (define_expand "neon_vld4<mode>"
+   [(match_operand:XI 0 "s_register_operand")
+    (match_operand:XI 1 "neon_struct_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   rtx mem;
+@@ -5066,7 +4936,7 @@
+ (define_insn "neon_vld4qa<mode>"
+   [(set (match_operand:XI 0 "s_register_operand" "=w")
+         (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD4A))]
+   "TARGET_NEON"
+ {
+@@ -5087,7 +4957,7 @@
+   [(set (match_operand:XI 0 "s_register_operand" "=w")
+         (unspec:XI [(match_operand:OI 1 "neon_struct_operand" "Um")
+                     (match_operand:XI 2 "s_register_operand" "0")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD4B))]
+   "TARGET_NEON"
+ {
+@@ -5104,27 +4974,26 @@
+   [(set_attr "type" "neon_load4_4reg<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld4_lane<mode>"
+   [(set (match_operand:OI 0 "s_register_operand" "=w")
+         (unspec:OI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:OI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD4_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   int regno = REGNO (operands[0]);
+   rtx ops[6];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = gen_rtx_REG (DImode, regno);
+   ops[1] = gen_rtx_REG (DImode, regno + 2);
+   ops[2] = gen_rtx_REG (DImode, regno + 4);
+   ops[3] = gen_rtx_REG (DImode, regno + 6);
+   ops[4] = operands[1];
+-  ops[5] = operands[3];
++  ops[5] = GEN_INT (lane);
+   output_asm_insn ("vld4.<V_sz_elem>\t{%P0[%c5], %P1[%c5], %P2[%c5], %P3[%c5]}, %A4",
+                    ops);
+   return "";
+@@ -5132,22 +5001,22 @@
+   [(set_attr "type" "neon_load4_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vld4_lane<mode>"
+   [(set (match_operand:XI 0 "s_register_operand" "=w")
+         (unspec:XI [(match_operand:<V_four_elem> 1 "neon_struct_operand" "Um")
+                     (match_operand:XI 2 "s_register_operand" "0")
+                     (match_operand:SI 3 "immediate_operand" "i")
+-                    (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VLD4_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[3]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[3]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[0]);
+   rtx ops[6];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+@@ -5222,7 +5091,7 @@
+ (define_expand "vec_store_lanesxi<mode>"
+   [(match_operand:XI 0 "neon_struct_operand")
+    (match_operand:XI 1 "s_register_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   emit_insn (gen_neon_vst4<mode> (operands[0], operands[1]));
+@@ -5232,7 +5101,7 @@
+ (define_expand "neon_vst4<mode>"
+   [(match_operand:XI 0 "neon_struct_operand")
+    (match_operand:XI 1 "s_register_operand")
+-   (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++   (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+   "TARGET_NEON"
+ {
+   rtx mem;
+@@ -5247,7 +5116,7 @@
+ (define_insn "neon_vst4qa<mode>"
+   [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+         (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VST4A))]
+   "TARGET_NEON"
+ {
+@@ -5267,7 +5136,7 @@
+ (define_insn "neon_vst4qb<mode>"
+   [(set (match_operand:OI 0 "neon_struct_operand" "=Um")
+         (unspec:OI [(match_operand:XI 1 "s_register_operand" "w")
+-                    (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++                    (unspec:VQ2 [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+                    UNSPEC_VST4B))]
+   "TARGET_NEON"
+ {
+@@ -5284,27 +5153,26 @@
+   [(set_attr "type" "neon_store4_4reg<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst4_lane<mode>"
+   [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
+         (unspec:<V_four_elem>
+            [(match_operand:OI 1 "s_register_operand" "w")
+             (match_operand:SI 2 "immediate_operand" "i")
+-            (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++            (unspec:VD_LANE [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+            UNSPEC_VST4_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
+-  HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   int regno = REGNO (operands[1]);
+   rtx ops[6];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+   ops[0] = operands[0];
+   ops[1] = gen_rtx_REG (DImode, regno);
+   ops[2] = gen_rtx_REG (DImode, regno + 2);
+   ops[3] = gen_rtx_REG (DImode, regno + 4);
+   ops[4] = gen_rtx_REG (DImode, regno + 6);
+-  ops[5] = operands[2];
++  ops[5] = GEN_INT (lane);
+   output_asm_insn ("vst4.<V_sz_elem>\t{%P1[%c5], %P2[%c5], %P3[%c5], %P4[%c5]}, %A0",
+                    ops);
+   return "";
+@@ -5312,22 +5180,22 @@
+   [(set_attr "type" "neon_store4_one_lane<q>")]
+ )
+ 
++;; see comment on neon_vld1_lane for reason why the lane numbers are reversed
++;; here on big endian targets.
+ (define_insn "neon_vst4_lane<mode>"
+   [(set (match_operand:<V_four_elem> 0 "neon_struct_operand" "=Um")
+         (unspec:<V_four_elem>
+            [(match_operand:XI 1 "s_register_operand" "w")
+             (match_operand:SI 2 "immediate_operand" "i")
+-            (unspec:VMQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
++            (unspec:VQ_HS [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
+            UNSPEC_VST4_LANE))]
+   "TARGET_NEON"
+ {
+-  HOST_WIDE_INT lane = INTVAL (operands[2]);
++  HOST_WIDE_INT lane = NEON_ENDIAN_LANE_N(<MODE>mode, INTVAL (operands[2]));
+   HOST_WIDE_INT max = GET_MODE_NUNITS (<MODE>mode);
+   int regno = REGNO (operands[1]);
+   rtx ops[6];
+-  if (lane < 0 || lane >= max)
+-    error ("lane out of range");
+-  else if (lane >= max / 2)
++  if (lane >= max / 2)
+     {
+       lane -= max / 2;
+       regno += 2;
+--- a/src/gcc/config/arm/predicates.md
++++ b/src/gcc/config/arm/predicates.md
+@@ -333,6 +333,13 @@
+   (and (match_operand 0 "expandable_comparison_operator")
+        (match_test "maybe_get_arm_condition_code (op) != ARM_NV")))
+ 
++;; Likewise, but don't ignore the mode.
++;; RTL SET operations require their operands source and destination have
++;; the same modes, so we can't ignore the modes there.  See PR target/69161.
++(define_predicate "arm_comparison_operator_mode"
++  (and (match_operand 0 "expandable_comparison_operator")
++       (match_test "maybe_get_arm_condition_code (op) != ARM_NV")))
++
+ (define_special_predicate "lt_ge_comparison_operator"
+   (match_code "lt,ge"))
+ 
+--- a/src/gcc/config/arm/sync.md
++++ b/src/gcc/config/arm/sync.md
+@@ -50,14 +50,11 @@
+   {
+     if (TARGET_HAVE_DMB)
+       {
+-	/* Note we issue a system level barrier. We should consider issuing
+-	   a inner shareabilty zone barrier here instead, ie. "DMB ISH".  */
+-	/* ??? Differentiate based on SEQ_CST vs less strict?  */
+-	return "dmb\tsy";
++	return "dmb\\tish";
+       }
+ 
+     if (TARGET_HAVE_DMB_MCR)
+-      return "mcr\tp15, 0, r0, c7, c10, 5";
++      return "mcr\\tp15, 0, r0, c7, c10, 5";
+ 
+     gcc_unreachable ();
+   }
+@@ -75,7 +72,7 @@
+   {
+     enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
+     if (is_mm_relaxed (model) || is_mm_consume (model) || is_mm_release (model))
+-      return \"ldr%(<sync_sfx>%)\\t%0, %1\";
++      return \"ldr<sync_sfx>%?\\t%0, %1\";
+     else
+       return \"lda<sync_sfx>%?\\t%0, %1\";
+   }
+@@ -92,7 +89,7 @@
+   {
+     enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
+     if (is_mm_relaxed (model) || is_mm_consume (model) || is_mm_acquire (model))
+-      return \"str%(<sync_sfx>%)\t%1, %0\";
++      return \"str<sync_sfx>%?\t%1, %0\";
+     else
+       return \"stl<sync_sfx>%?\t%1, %0\";
+   }
+@@ -107,7 +104,7 @@
+ 	  [(match_operand:DI 1 "arm_sync_memory_operand" "Q")]
+ 	    VUNSPEC_LDRD_ATOMIC))]
+   "ARM_DOUBLEWORD_ALIGN && TARGET_HAVE_LPAE"
+-  "ldr%(d%)\t%0, %H0, %C1"
++  "ldrd%?\t%0, %H0, %C1"
+   [(set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")])
+ 
+--- a/src/gcc/config/arm/t-aprofile
++++ b/src/gcc/config/arm/t-aprofile
+@@ -86,14 +86,21 @@ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a12
+ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a17
+ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a15.cortex-a7
+ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a17.cortex-a7
++MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a32
++MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a35
+ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a53
+ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a57
+ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a57.cortex-a53
+ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a72
+ MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a72.cortex-a53
++MULTILIB_MATCHES       += march?armv8-a=mcpu?exynos-m1
++MULTILIB_MATCHES       += march?armv8-a=mcpu?qdf24xx
++MULTILIB_MATCHES       += march?armv8-a=mcpu?xgene1
+ 
+ # Arch Matches
+ MULTILIB_MATCHES       += march?armv8-a=march?armv8-a+crc
++MULTILIB_MATCHES       += march?armv8-a=march?armv8.1-a
++MULTILIB_MATCHES       += march?armv8-a=march?armv8.1-a+crc
+ 
+ # FPU matches
+ MULTILIB_MATCHES       += mfpu?vfpv3-d16=mfpu?vfpv3
+--- a/src/gcc/config/arm/t-rtems
++++ b/src/gcc/config/arm/t-rtems
+@@ -1,7 +1,7 @@
+ # Custom RTEMS multilibs for ARM
+ 
+-MULTILIB_OPTIONS  = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard
+-MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard
++MULTILIB_OPTIONS  = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m/mcpu=cortex-m7 mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-d16 mfloat-abi=hard
++MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m cortex-m7 neon vfpv3-d16 fpv4-sp-d16 fpv5-d16 hard
+ 
+ # Enumeration of multilibs
+ 
+@@ -16,5 +16,6 @@ MULTILIB_REQUIRED += mthumb/march=armv7-a
+ MULTILIB_REQUIRED += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
+ MULTILIB_REQUIRED += mthumb/march=armv7-r
+ MULTILIB_REQUIRED += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
++MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfpu=fpv5-d16/mfloat-abi=hard
+ MULTILIB_REQUIRED += mthumb/march=armv7-m
+ MULTILIB_REQUIRED += mthumb
+--- a/src/gcc/config/arm/thumb2.md
++++ b/src/gcc/config/arm/thumb2.md
+@@ -300,7 +300,7 @@
+    ldr%?\\t%0, %1
+    str%?\\t%1, %0
+    str%?\\t%1, %0"
+-  [(set_attr "type" "mov_reg,alu_imm,alu_imm,alu_imm,mov_imm,load1,load1,store1,store1")
++  [(set_attr "type" "mov_reg,mov_imm,mov_imm,mvn_imm,mov_imm,load1,load1,store1,store1")
+    (set_attr "length" "2,4,2,4,4,4,4,4,4")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no")
+@@ -338,8 +338,8 @@
+    mov%?\\t%0, %1\\t%@ movhi
+    mov%?\\t%0, %1\\t%@ movhi
+    movw%?\\t%0, %L1\\t%@ movhi
+-   str%(h%)\\t%1, %0\\t%@ movhi
+-   ldr%(h%)\\t%0, %1\\t%@ movhi"
++   strh%?\\t%1, %0\\t%@ movhi
++   ldrh%?\\t%0, %1\\t%@ movhi"
+   [(set_attr "type" "mov_reg,mov_imm,mov_imm,mov_imm,store1,load1")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "yes,no,yes,no,no,no")
+@@ -378,7 +378,7 @@
+ 
+ (define_insn_and_split "*thumb2_mov_scc"
+   [(set (match_operand:SI 0 "s_register_operand" "=l,r")
+-	(match_operator:SI 1 "arm_comparison_operator"
++	(match_operator:SI 1 "arm_comparison_operator_mode"
+ 	 [(match_operand 2 "cc_register" "") (const_int 0)]))]
+   "TARGET_THUMB2"
+   "#"   ; "ite\\t%D1\;mov%D1\\t%0, #0\;mov%d1\\t%0, #1"
+@@ -396,7 +396,7 @@
+ 
+ (define_insn_and_split "*thumb2_mov_negscc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(neg:SI (match_operator:SI 1 "arm_comparison_operator"
++	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
+ 		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
+   "TARGET_THUMB2 && !arm_restrict_it"
+   "#"   ; "ite\\t%D1\;mov%D1\\t%0, #0\;mvn%d1\\t%0, #0"
+@@ -415,7 +415,7 @@
+ 
+ (define_insn_and_split "*thumb2_mov_negscc_strict_it"
+   [(set (match_operand:SI 0 "low_register_operand" "=l")
+-	(neg:SI (match_operator:SI 1 "arm_comparison_operator"
++	(neg:SI (match_operator:SI 1 "arm_comparison_operator_mode"
+ 		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
+   "TARGET_THUMB2 && arm_restrict_it"
+   "#"   ; ";mvn\\t%0, #0 ;it\\t%D1\;mov%D1\\t%0, #0\"
+@@ -444,7 +444,7 @@
+ 
+ (define_insn_and_split "*thumb2_mov_notscc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(not:SI (match_operator:SI 1 "arm_comparison_operator"
++	(not:SI (match_operator:SI 1 "arm_comparison_operator_mode"
+ 		 [(match_operand 2 "cc_register" "") (const_int 0)])))]
+   "TARGET_THUMB2 && !arm_restrict_it"
+   "#"   ; "ite\\t%D1\;mvn%D1\\t%0, #0\;mvn%d1\\t%0, #1"
+@@ -464,7 +464,7 @@
+ 
+ (define_insn_and_split "*thumb2_mov_notscc_strict_it"
+   [(set (match_operand:SI 0 "low_register_operand" "=l")
+-        (not:SI (match_operator:SI 1 "arm_comparison_operator"
++	(not:SI (match_operator:SI 1 "arm_comparison_operator_mode"
+                  [(match_operand 2 "cc_register" "") (const_int 0)])))]
+   "TARGET_THUMB2 && arm_restrict_it"
+   "#"   ; "mvn %0, #0 ; it%d1 ; lsl%d1 %0, %0, #1"
+@@ -486,12 +486,12 @@
+ )
+ 
+ (define_insn_and_split "*thumb2_movsicc_insn"
+-  [(set (match_operand:SI 0 "s_register_operand" "=l,l,r,r,r,r,r,r,r,r,r")
++  [(set (match_operand:SI 0 "s_register_operand" "=l,l,r,r,r,r,r,r,r,r,r,r")
+ 	(if_then_else:SI
+ 	 (match_operator 3 "arm_comparison_operator"
+ 	  [(match_operand 4 "cc_register" "") (const_int 0)])
+-	 (match_operand:SI 1 "arm_not_operand" "0 ,lPy,0 ,0,rI,K,rI,rI,K ,K,r")
+-	 (match_operand:SI 2 "arm_not_operand" "lPy,0 ,rI,K,0 ,0,rI,K ,rI,K,r")))]
++	 (match_operand:SI 1 "arm_not_operand" "0 ,lPy,0 ,0,rI,K,I ,r,rI,K ,K,r")
++	 (match_operand:SI 2 "arm_not_operand" "lPy,0 ,rI,K,0 ,0,rI,I,K ,rI,K,r")))]
+   "TARGET_THUMB2"
+   "@
+    it\\t%D3\;mov%D3\\t%0, %2
+@@ -504,12 +504,14 @@
+    #
+    #
+    #
++   #
+    #"
+    ; alt 6: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2
+-   ; alt 7: ite\\t%d3\;mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2
+-   ; alt 8: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2
+-   ; alt 9: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2
+-   ; alt 10: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2
++   ; alt 7: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2
++   ; alt 8: ite\\t%d3\;mov%d3\\t%0, %1\;mvn%D3\\t%0, #%B2
++   ; alt 9: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mov%D3\\t%0, %2
++   ; alt 10: ite\\t%d3\;mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2
++   ; alt 11: ite\\t%d3\;mov%d3\\t%0, %1\;mov%D3\\t%0, %2
+   "&& reload_completed"
+   [(const_int 0)]
+   {
+@@ -540,10 +542,30 @@
+                                                operands[2])));
+     DONE;
+   }
+-  [(set_attr "length" "4,4,6,6,6,6,10,10,10,10,6")
+-   (set_attr "enabled_for_depr_it" "yes,yes,no,no,no,no,no,no,no,no,yes")
++  [(set_attr "length" "4,4,6,6,6,6,10,8,10,10,10,6")
++   (set_attr "enabled_for_depr_it" "yes,yes,no,no,no,no,no,no,no,no,no,yes")
+    (set_attr "conds" "use")
+-   (set_attr "type" "multiple")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (if_then_else (match_operand 1 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (const_string "mvn_imm")
++                          (if_then_else (match_operand 1 "const_int_operand" "")
++                                        (const_string "mov_imm")
++                                        (const_string "mov_reg"))
++                          (const_string "mvn_imm")
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")
++                          (const_string "multiple")])]
+ )
+ 
+ (define_insn "*thumb2_movsfcc_soft_insn"
+@@ -1032,7 +1054,7 @@
+   "TARGET_THUMB2 && arm_arch6"
+   "@
+    sxtb%?\\t%0, %1
+-   ldr%(sb%)\\t%0, %1"
++   ldrsb%?\\t%0, %1"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")
+@@ -1046,7 +1068,7 @@
+   "TARGET_THUMB2 && arm_arch6"
+   "@
+    uxth%?\\t%0, %1
+-   ldr%(h%)\\t%0, %1"
++   ldrh%?\\t%0, %1"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")
+@@ -1059,8 +1081,8 @@
+ 	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
+   "TARGET_THUMB2 && arm_arch6"
+   "@
+-   uxtb%(%)\\t%0, %1
+-   ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
++   uxtb%?\\t%0, %1
++   ldrb%?\\t%0, %1\\t%@ zero_extendqisi2"
+   [(set_attr "type" "extend,load_byte")
+    (set_attr "predicable" "yes")
+    (set_attr "predicable_short_it" "no")
+@@ -1194,7 +1216,11 @@
+   "
+   [(set_attr "predicable" "yes")
+    (set_attr "length" "2")
+-   (set_attr "type" "alu_sreg")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "alu_imm")
++                                        (const_string "alu_sreg"))
++                          (const_string "alu_imm")])]
+ )
+ 
+ (define_insn "*thumb2_subsi_short"
+@@ -1259,14 +1285,21 @@
+   "
+   [(set_attr "conds" "set")
+    (set_attr "length" "2,2,4")
+-   (set_attr "type" "alu_sreg")]
++   (set_attr_alternative "type"
++                         [(if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "alus_imm")
++                                        (const_string "alus_sreg"))
++                          (const_string "alus_imm")
++                          (if_then_else (match_operand 2 "const_int_operand" "")
++                                        (const_string "alus_imm")
++                                        (const_string "alus_sreg"))])]
+ )
+ 
+ (define_insn "*thumb2_addsi3_compare0_scratch"
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV
+-	  (plus:SI (match_operand:SI 0 "s_register_operand" "l,l,  r,r")
+-		   (match_operand:SI 1 "arm_add_operand"    "Pv,l,IL,r"))
++	  (plus:SI (match_operand:SI 0 "s_register_operand" "l,  r")
++		   (match_operand:SI 1 "arm_add_operand"    "lPv,rIL"))
+ 	  (const_int 0)))]
+   "TARGET_THUMB2"
+   "*
+@@ -1283,8 +1316,10 @@
+       return \"cmn\\t%0, %1\";
+   "
+   [(set_attr "conds" "set")
+-   (set_attr "length" "2,2,4,4")
+-   (set_attr "type" "alus_imm,alus_sreg,alus_imm,alus_sreg")]
++   (set_attr "length" "2,4")
++   (set (attr "type") (if_then_else (match_operand 1 "const_int_operand" "")
++                                    (const_string "alus_imm")
++                                    (const_string "alus_sreg")))]
+ )
+ 
+ (define_insn "*thumb2_mulsi_short"
+--- a/src/gcc/config/arm/types.md
++++ b/src/gcc/config/arm/types.md
+@@ -120,6 +120,7 @@
+ ;                    final output, thus having no impact on scheduling.
+ ; rbit               reverse bits.
+ ; rev                reverse bytes.
++; rotate_imm         rotate by immediate.
+ ; sdiv               signed division.
+ ; shift_imm          simple shift operation (LSL, LSR, ASR, ROR) with an
+ ;                    immediate.
+@@ -375,6 +376,8 @@
+ ; neon_from_gp
+ ; neon_from_gp_q
+ ; neon_ldr
++; neon_ldp
++; neon_ldp_q
+ ; neon_load1_1reg
+ ; neon_load1_1reg_q
+ ; neon_load1_2reg
+@@ -408,6 +411,8 @@
+ ; neon_load4_one_lane
+ ; neon_load4_one_lane_q
+ ; neon_str
++; neon_stp
++; neon_stp_q
+ ; neon_store1_1reg
+ ; neon_store1_1reg_q
+ ; neon_store1_2reg
+@@ -627,6 +632,7 @@
+   nop,\
+   rbit,\
+   rev,\
++  rotate_imm,\
+   sdiv,\
+   shift_imm,\
+   shift_reg,\
+@@ -887,6 +893,8 @@
+   neon_from_gp_q,\
+ \
+   neon_ldr,\
++  neon_ldp,\
++  neon_ldp_q,\
+   neon_load1_1reg,\
+   neon_load1_1reg_q,\
+   neon_load1_2reg,\
+@@ -924,6 +932,8 @@
+   neon_load4_one_lane_q,\
+ \
+   neon_str,\
++  neon_stp,\
++  neon_stp_q,\
+   neon_store1_1reg,\
+   neon_store1_1reg_q,\
+   neon_store1_2reg,\
+@@ -1126,7 +1136,8 @@
+           neon_sat_mla_s_long, neon_sat_mla_h_scalar_long,\
+           neon_sat_mla_s_scalar_long,\
+           neon_to_gp, neon_to_gp_q, neon_from_gp, neon_from_gp_q,\
+-          neon_ldr, neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
++	   neon_ldr, neon_ldp, neon_ldp_q,\
++	   neon_load1_1reg, neon_load1_1reg_q, neon_load1_2reg,\
+           neon_load1_2reg_q, neon_load1_3reg, neon_load1_3reg_q,\
+           neon_load1_4reg, neon_load1_4reg_q, neon_load1_all_lanes,\
+           neon_load1_all_lanes_q, neon_load1_one_lane, neon_load1_one_lane_q,\
+@@ -1137,7 +1148,8 @@
+           neon_load3_all_lanes_q, neon_load3_one_lane, neon_load3_one_lane_q,\
+           neon_load4_4reg, neon_load4_4reg_q, neon_load4_all_lanes,\
+           neon_load4_all_lanes_q, neon_load4_one_lane, neon_load4_one_lane_q,\
+-          neon_str, neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
++	   neon_str, neon_stp, neon_stp_q,\
++	   neon_store1_1reg, neon_store1_1reg_q, neon_store1_2reg,\
+           neon_store1_2reg_q, neon_store1_3reg, neon_store1_3reg_q,\
+           neon_store1_4reg, neon_store1_4reg_q, neon_store1_one_lane,\
+           neon_store1_one_lane_q, neon_store2_2reg, neon_store2_2reg_q,\
+@@ -1146,10 +1158,12 @@
+           neon_store3_one_lane, neon_store3_one_lane_q, neon_store4_4reg,\
+           neon_store4_4reg_q, neon_store4_one_lane, neon_store4_one_lane_q,\
+           neon_fp_abd_s, neon_fp_abd_s_q, neon_fp_abd_d, neon_fp_abd_d_q,\
++          neon_fp_abs_s, neon_fp_abs_s_q, neon_fp_abs_d, neon_fp_abs_d_q,\
+           neon_fp_addsub_s, neon_fp_addsub_s_q, neon_fp_addsub_d,\
+           neon_fp_addsub_d_q, neon_fp_compare_s, neon_fp_compare_s_q,\
+           neon_fp_compare_d, neon_fp_compare_d_q, neon_fp_minmax_s,\
+           neon_fp_minmax_s_q, neon_fp_minmax_d, neon_fp_minmax_d_q,\
++          neon_fp_neg_s, neon_fp_neg_s_q, neon_fp_neg_d, neon_fp_neg_d_q,\
+           neon_fp_reduc_add_s, neon_fp_reduc_add_s_q, neon_fp_reduc_add_d,\
+           neon_fp_reduc_add_d_q, neon_fp_reduc_minmax_s,
+           neon_fp_reduc_minmax_s_q, neon_fp_reduc_minmax_d,\
+@@ -1157,6 +1171,8 @@
+           neon_fp_cvt_narrow_s_q, neon_fp_cvt_narrow_d_q,\
+           neon_fp_cvt_widen_h, neon_fp_cvt_widen_s, neon_fp_to_int_s,\
+           neon_fp_to_int_s_q, neon_int_to_fp_s, neon_int_to_fp_s_q,\
++          neon_fp_to_int_d, neon_fp_to_int_d_q,\
++          neon_int_to_fp_d, neon_int_to_fp_d_q,\
+           neon_fp_round_s, neon_fp_round_s_q, neon_fp_recpe_s,\
+           neon_fp_recpe_s_q,\
+           neon_fp_recpe_d, neon_fp_recpe_d_q, neon_fp_recps_s,\
+--- a/src/gcc/config/arm/unknown-elf.h
++++ b/src/gcc/config/arm/unknown-elf.h
+@@ -32,7 +32,9 @@
+ #define UNKNOWN_ELF_STARTFILE_SPEC	" crti%O%s crtbegin%O%s crt0%O%s"
+ 
+ #undef  STARTFILE_SPEC
+-#define STARTFILE_SPEC	UNKNOWN_ELF_STARTFILE_SPEC
++#define STARTFILE_SPEC	\
++  "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} "	\
++  UNKNOWN_ELF_STARTFILE_SPEC
+ 
+ #define UNKNOWN_ELF_ENDFILE_SPEC	"crtend%O%s crtn%O%s"
+ 
+@@ -80,7 +82,9 @@
+ 									\
+       ASM_OUTPUT_ALIGN (FILE, floor_log2 (ALIGN / BITS_PER_UNIT));	\
+       ASM_OUTPUT_LABEL (FILE, NAME);					\
+-      fprintf (FILE, "\t.space\t%d\n", SIZE ? (int)(SIZE) : 1);		\
++      fprintf (FILE, "\t.space\t%d\n", SIZE ? (int) SIZE : 1);		\
++      fprintf (FILE, "\t.size\t%s, %d\n",				\
++	       NAME, SIZE ? (int) SIZE : 1);				\
+     }									\
+   while (0)
+ 
+--- a/src/gcc/config/arm/unspecs.md
++++ b/src/gcc/config/arm/unspecs.md
+@@ -359,5 +359,7 @@
+   UNSPEC_NVRINTX
+   UNSPEC_NVRINTA
+   UNSPEC_NVRINTN
++  UNSPEC_VQRDMLAH
++  UNSPEC_VQRDMLSH
+ ])
+ 
+--- a/src/gcc/config/arm/vxworks.h
++++ b/src/gcc/config/arm/vxworks.h
+@@ -40,7 +40,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+       builtin_define ("CPU=ARMARCH5");		\
+     else if (arm_arch4)				\
+       {						\
+-	if (thumb_code)				\
++	if (TARGET_THUMB)			\
+ 	  builtin_define ("CPU=ARMARCH4_T");	\
+ 	else					\
+ 	  builtin_define ("CPU=ARMARCH4");	\
+--- a/src/gcc/config/c6x/c6x.c
++++ b/src/gcc/config/c6x/c6x.c
+@@ -3532,7 +3532,7 @@ try_rename_operands (rtx_insn *head, rtx_insn *tail, unit_req_table reqs,
+   best_reg =
+     find_rename_reg (this_head, super_class, &unavailable, old_reg, true);
+ 
+-  regrename_do_replace (this_head, best_reg);
++  gcc_assert (regrename_do_replace (this_head, best_reg));
+ 
+   count_unit_reqs (new_reqs, head, PREV_INSN (tail));
+   merge_unit_reqs (new_reqs);
+@@ -3545,7 +3545,7 @@ try_rename_operands (rtx_insn *head, rtx_insn *tail, unit_req_table reqs,
+ 	       unit_req_imbalance (reqs), unit_req_imbalance (new_reqs));
+     }
+   if (unit_req_imbalance (new_reqs) > unit_req_imbalance (reqs))
+-    regrename_do_replace (this_head, old_reg);
++    gcc_assert (regrename_do_replace (this_head, old_reg));
+   else
+     memcpy (reqs, new_reqs, sizeof (unit_req_table));
+ 
+--- a/src/gcc/config/c6x/t-c6x
++++ b/src/gcc/config/c6x/t-c6x
+@@ -23,6 +23,8 @@ MD_INCLUDES= 	$(srcdir)/config/c6x/constraints.md \
+ 		$(srcdir)/config/c6x/c6x-mult.md \
+ 		$(srcdir)/config/c6x/c6x-sched.md
+ 
++OPTIONS_H_EXTRA += $(srcdir)/config/c6x/c6x-isas.def
++
+ s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \
+ 	s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES)
+ 
+--- a/src/gcc/config/glibc-stdint.h
++++ b/src/gcc/config/glibc-stdint.h
+@@ -22,6 +22,12 @@ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ <http://www.gnu.org/licenses/>.  */
+ 
++/* Systems using musl libc should use this header and make sure
++   OPTION_MUSL is defined correctly before using the TYPE macros. */
++#ifndef OPTION_MUSL
++#define OPTION_MUSL 0
++#endif
++
+ #define SIG_ATOMIC_TYPE "int"
+ 
+ #define INT8_TYPE "signed char"
+@@ -43,12 +49,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define UINT_LEAST64_TYPE (LONG_TYPE_SIZE == 64 ? "long unsigned int" : "long long unsigned int")
+ 
+ #define INT_FAST8_TYPE "signed char"
+-#define INT_FAST16_TYPE (LONG_TYPE_SIZE == 64 ? "long int" : "int")
+-#define INT_FAST32_TYPE (LONG_TYPE_SIZE == 64 ? "long int" : "int")
++#define INT_FAST16_TYPE (LONG_TYPE_SIZE == 64 && !OPTION_MUSL ? "long int" : "int")
++#define INT_FAST32_TYPE (LONG_TYPE_SIZE == 64 && !OPTION_MUSL ? "long int" : "int")
+ #define INT_FAST64_TYPE (LONG_TYPE_SIZE == 64 ? "long int" : "long long int")
+ #define UINT_FAST8_TYPE "unsigned char"
+-#define UINT_FAST16_TYPE (LONG_TYPE_SIZE == 64 ? "long unsigned int" : "unsigned int")
+-#define UINT_FAST32_TYPE (LONG_TYPE_SIZE == 64 ? "long unsigned int" : "unsigned int")
++#define UINT_FAST16_TYPE (LONG_TYPE_SIZE == 64 && !OPTION_MUSL ? "long unsigned int" : "unsigned int")
++#define UINT_FAST32_TYPE (LONG_TYPE_SIZE == 64 && !OPTION_MUSL ? "long unsigned int" : "unsigned int")
+ #define UINT_FAST64_TYPE (LONG_TYPE_SIZE == 64 ? "long unsigned int" : "long long unsigned int")
+ 
+ #define INTPTR_TYPE (LONG_TYPE_SIZE == 64 ? "long int" : "int")
+--- a/src/gcc/config/i386/i386.c
++++ b/src/gcc/config/i386/i386.c
+@@ -7004,7 +7004,7 @@ classify_argument (machine_mode mode, const_tree type,
+ 
+   /* for V1xx modes, just use the base mode */
+   if (VECTOR_MODE_P (mode) && mode != V1DImode && mode != V1TImode
+-      && GET_MODE_SIZE (GET_MODE_INNER (mode)) == bytes)
++      && GET_MODE_UNIT_SIZE (mode) == bytes)
+     mode = GET_MODE_INNER (mode);
+ 
+   /* Classification of atomic types.  */
+@@ -13185,7 +13185,7 @@ ix86_legitimate_constant_p (machine_mode, rtx x)
+ #endif
+       break;
+ 
+-    case CONST_DOUBLE:
++    case CONST_WIDE_INT:
+       if (GET_MODE (x) == TImode
+ 	  && x != CONST0_RTX (TImode)
+           && !TARGET_64BIT)
+@@ -13215,6 +13215,7 @@ ix86_cannot_force_const_mem (machine_mode mode, rtx x)
+   switch (GET_CODE (x))
+     {
+     case CONST_INT:
++    case CONST_WIDE_INT:
+     case CONST_DOUBLE:
+     case CONST_VECTOR:
+       return false;
+@@ -13241,7 +13242,7 @@ is_imported_p (rtx x)
+ 
+ /* Nonzero if the constant value X is a legitimate general operand
+    when generating PIC code.  It is given that flag_pic is on and
+-   that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
++   that X satisfies CONSTANT_P.  */
+ 
+ bool
+ legitimate_pic_operand_p (rtx x)
+@@ -14767,20 +14768,9 @@ output_pic_addr_const (FILE *file, rtx x, int code)
+       break;
+ 
+     case CONST_DOUBLE:
+-      if (GET_MODE (x) == VOIDmode)
+-	{
+-	  /* We can use %d if the number is <32 bits and positive.  */
+-	  if (CONST_DOUBLE_HIGH (x) || CONST_DOUBLE_LOW (x) < 0)
+-	    fprintf (file, "0x%lx%08lx",
+-		     (unsigned long) CONST_DOUBLE_HIGH (x),
+-		     (unsigned long) CONST_DOUBLE_LOW (x));
+-	  else
+-	    fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
+-	}
+-      else
+-	/* We can't handle floating point constants;
+-	   TARGET_PRINT_OPERAND must handle them.  */
+-	output_operand_lossage ("floating constant misused");
++      /* We can't handle floating point constants;
++	 TARGET_PRINT_OPERAND must handle them.  */
++      output_operand_lossage ("floating constant misused");
+       break;
+ 
+     case PLUS:
+@@ -15140,8 +15130,7 @@ ix86_find_base_term (rtx x)
+ 	return x;
+       term = XEXP (x, 0);
+       if (GET_CODE (term) == PLUS
+-	  && (CONST_INT_P (XEXP (term, 1))
+-	      || GET_CODE (XEXP (term, 1)) == CONST_DOUBLE))
++	  && CONST_INT_P (XEXP (term, 1)))
+ 	term = XEXP (term, 0);
+       if (GET_CODE (term) != UNSPEC
+ 	  || (XINT (term, 1) != UNSPEC_GOTPCREL
+@@ -16154,7 +16143,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
+ 
+       if (code != 'P' && code != 'p')
+ 	{
+-	  if (CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE)
++	  if (CONST_INT_P (x))
+ 	    {
+ 	      if (ASSEMBLER_DIALECT == ASM_ATT)
+ 		putc ('$', file);
+@@ -19643,12 +19632,9 @@ rtx
+ ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
+ {
+   machine_mode vec_mode, imode;
+-  HOST_WIDE_INT hi, lo;
+-  int shift = 63;
+-  rtx v;
+-  rtx mask;
++  wide_int w;
++  rtx mask, v;
+ 
+-  /* Find the sign bit, sign extended to 2*HWI.  */
+   switch (mode)
+     {
+     case V16SImode:
+@@ -19658,9 +19644,7 @@ ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
+     case V8SFmode:
+     case V4SFmode:
+       vec_mode = mode;
+-      mode = GET_MODE_INNER (mode);
+       imode = SImode;
+-      lo = 0x80000000, hi = lo < 0;
+       break;
+ 
+     case V8DImode:
+@@ -19670,60 +19654,31 @@ ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
+     case V4DFmode:
+     case V2DFmode:
+       vec_mode = mode;
+-      mode = GET_MODE_INNER (mode);
+       imode = DImode;
+-      if (HOST_BITS_PER_WIDE_INT >= 64)
+-	lo = (HOST_WIDE_INT)1 << shift, hi = -1;
+-      else
+-	lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT);
+       break;
+ 
+     case TImode:
+     case TFmode:
+       vec_mode = VOIDmode;
+-      if (HOST_BITS_PER_WIDE_INT >= 64)
+-	{
+-	  imode = TImode;
+-	  lo = 0, hi = (HOST_WIDE_INT)1 << shift;
+-	}
+-      else
+-	{
+-	  rtvec vec;
+-
+-	  imode = DImode;
+-	  lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT);
+-
+-	  if (invert)
+-	    {
+-	      lo = ~lo, hi = ~hi;
+-	      v = constm1_rtx;
+-	    }
+-	  else
+-	    v = const0_rtx;
+-
+-	  mask = immed_double_const (lo, hi, imode);
+-
+-	  vec = gen_rtvec (2, v, mask);
+-	  v = gen_rtx_CONST_VECTOR (V2DImode, vec);
+-	  v = copy_to_mode_reg (mode, gen_lowpart (mode, v));
+-
+-	  return v;
+-	}
+-     break;
++      imode = TImode;
++      break;
+ 
+     default:
+       gcc_unreachable ();
+     }
+ 
++  machine_mode inner_mode = GET_MODE_INNER (mode);
++  w = wi::set_bit_in_zero (GET_MODE_BITSIZE (inner_mode) - 1,
++			   GET_MODE_BITSIZE (inner_mode));
+   if (invert)
+-    lo = ~lo, hi = ~hi;
++    w = wi::bit_not (w);
+ 
+   /* Force this value into the low part of a fp vector constant.  */
+-  mask = immed_double_const (lo, hi, imode);
+-  mask = gen_lowpart (mode, mask);
++  mask = immed_wide_int_const (w, imode);
++  mask = gen_lowpart (inner_mode, mask);
+ 
+   if (vec_mode == VOIDmode)
+-    return force_reg (mode, mask);
++    return force_reg (inner_mode, mask);
+ 
+   v = ix86_build_const_vector (vec_mode, vect, mask);
+   return force_reg (vec_mode, v);
+@@ -21870,13 +21825,13 @@ ix86_expand_int_vcond (rtx operands[])
+       && data_mode == mode
+       && cop1 == CONST0_RTX (mode)
+       && operands[1 + (code == LT)] == CONST0_RTX (data_mode)
+-      && GET_MODE_SIZE (GET_MODE_INNER (data_mode)) > 1
+-      && GET_MODE_SIZE (GET_MODE_INNER (data_mode)) <= 8
++      && GET_MODE_UNIT_SIZE (data_mode) > 1
++      && GET_MODE_UNIT_SIZE (data_mode) <= 8
+       && (GET_MODE_SIZE (data_mode) == 16
+ 	  || (TARGET_AVX2 && GET_MODE_SIZE (data_mode) == 32)))
+     {
+       rtx negop = operands[2 - (code == LT)];
+-      int shift = GET_MODE_BITSIZE (GET_MODE_INNER (data_mode)) - 1;
++      int shift = GET_MODE_UNIT_BITSIZE (data_mode) - 1;
+       if (negop == CONST1_RTX (data_mode))
+ 	{
+ 	  rtx res = expand_simple_binop (mode, LSHIFTRT, cop0, GEN_INT (shift),
+@@ -22934,26 +22889,21 @@ ix86_split_to_parts (rtx operand, rtx *parts, machine_mode mode)
+ 	      REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
+ 	      real_to_target (l, &r, mode);
+ 
+-	      /* Do not use shift by 32 to avoid warning on 32bit systems.  */
+-	      if (HOST_BITS_PER_WIDE_INT >= 64)
+-	        parts[0]
+-		  = gen_int_mode
+-		      ((l[0] & (((HOST_WIDE_INT) 2 << 31) - 1))
+-		       + ((((HOST_WIDE_INT) l[1]) << 31) << 1),
+-		       DImode);
+-	      else
+-	        parts[0] = immed_double_const (l[0], l[1], DImode);
++	      /* real_to_target puts 32-bit pieces in each long.  */
++	      parts[0] =
++		gen_int_mode
++		  ((l[0] & (HOST_WIDE_INT) 0xffffffff)
++		   | ((l[1] & (HOST_WIDE_INT) 0xffffffff) << 32),
++		   DImode);
+ 
+ 	      if (upper_mode == SImode)
+ 	        parts[1] = gen_int_mode (l[2], SImode);
+-	      else if (HOST_BITS_PER_WIDE_INT >= 64)
+-	        parts[1]
+-		  = gen_int_mode
+-		      ((l[2] & (((HOST_WIDE_INT) 2 << 31) - 1))
+-		       + ((((HOST_WIDE_INT) l[3]) << 31) << 1),
+-		       DImode);
+ 	      else
+-	        parts[1] = immed_double_const (l[2], l[3], DImode);
++	        parts[1] =
++		  gen_int_mode
++		    ((l[2] & (HOST_WIDE_INT) 0xffffffff)
++		     | ((l[3] & (HOST_WIDE_INT) 0xffffffff) << 32),
++		     DImode);
+ 	    }
+ 	  else
+ 	    gcc_unreachable ();
+@@ -25748,13 +25698,19 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
+     }
+   else
+     {
+-      /* Static functions and indirect calls don't need the pic register.  */
++      /* Static functions and indirect calls don't need the pic register.  Also,
++	 check if PLT was explicitly avoided via no-plt or "noplt" attribute, making
++	 it an indirect call.  */
+       if (flag_pic
+ 	  && (!TARGET_64BIT
+ 	      || (ix86_cmodel == CM_LARGE_PIC
+ 		  && DEFAULT_ABI != MS_ABI))
+ 	  && GET_CODE (XEXP (fnaddr, 0)) == SYMBOL_REF
+-	  && ! SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0)))
++	  && !SYMBOL_REF_LOCAL_P (XEXP (fnaddr, 0))
++	  && flag_plt
++	  && (SYMBOL_REF_DECL ((XEXP (fnaddr, 0))) == NULL_TREE
++	      || !lookup_attribute ("noplt",
++		     DECL_ATTRIBUTES (SYMBOL_REF_DECL (XEXP (fnaddr, 0))))))
+ 	{
+ 	  use_reg (&use, gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM));
+ 	  if (ix86_use_pseudo_pic_reg ())
+@@ -25850,6 +25806,31 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1,
+   return call;
+ }
+ 
++/* Return true if the function being called was marked with attribute "noplt"
++   or using -fno-plt and we are compiling for non-PIC and x86_64.  We need to
++   handle the non-PIC case in the backend because there is no easy interface
++   for the front-end to force non-PLT calls to use the GOT.  This is currently
++   used only with 64-bit ELF targets to call the function marked "noplt"
++   indirectly.  */
++
++static bool
++ix86_nopic_noplt_attribute_p (rtx call_op)
++{
++  if (flag_pic || ix86_cmodel == CM_LARGE
++      || !TARGET_64BIT || TARGET_MACHO || TARGET_SEH || TARGET_PECOFF
++      || SYMBOL_REF_LOCAL_P (call_op))
++    return false;
++
++  tree symbol_decl = SYMBOL_REF_DECL (call_op);
++
++  if (!flag_plt
++      || (symbol_decl != NULL_TREE
++          && lookup_attribute ("noplt", DECL_ATTRIBUTES (symbol_decl))))
++    return true;
++
++  return false;
++}
++
+ /* Output the assembly for a call instruction.  */
+ 
+ const char *
+@@ -25861,7 +25842,9 @@ ix86_output_call_insn (rtx_insn *insn, rtx call_op)
+ 
+   if (SIBLING_CALL_P (insn))
+     {
+-      if (direct_p)
++      if (direct_p && ix86_nopic_noplt_attribute_p (call_op))
++	xasm = "%!jmp\t*%p0@GOTPCREL(%%rip)";
++      else if (direct_p)
+ 	xasm = "%!jmp\t%P0";
+       /* SEH epilogue detection requires the indirect branch case
+ 	 to include REX.W.  */
+@@ -25904,7 +25887,9 @@ ix86_output_call_insn (rtx_insn *insn, rtx call_op)
+ 	seh_nop_p = true;
+     }
+ 
+-  if (direct_p)
++  if (direct_p && ix86_nopic_noplt_attribute_p (call_op))
++    xasm = "%!call\t*%p0@GOTPCREL(%%rip)";
++  else if (direct_p)
+     xasm = "%!call\t%P0";
+   else
+     xasm = "%!call\t%A0";
+@@ -36255,7 +36240,7 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target,
+ 		xop_rotl:
+ 		  if (CONST_INT_P (op))
+ 		    {
+-		      int mask = GET_MODE_BITSIZE (GET_MODE_INNER (tmode)) - 1;
++		      int mask = GET_MODE_UNIT_BITSIZE (tmode) - 1;
+ 		      op = GEN_INT (INTVAL (op) & mask);
+ 		      gcc_checking_assert
+ 			(insn_data[icode].operand[i + 1].predicate (op, mode));
+@@ -42319,12 +42304,11 @@ ix86_rtx_costs (rtx x, int code_i, int outer_code_i, int opno, int *total,
+ 	*total = 0;
+       return true;
+ 
++    case CONST_WIDE_INT:
++      *total = 0;
++      return true;
++
+     case CONST_DOUBLE:
+-      if (mode == VOIDmode)
+-	{
+-	  *total = 0;
+-	  return true;
+-	}
+       switch (standard_80387_constant_p (x))
+ 	{
+ 	case 1: /* 0.0 */
+@@ -45673,12 +45657,12 @@ ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in)
+     }
+ 
+   for (i = GET_MODE_BITSIZE (mode);
+-       i > GET_MODE_BITSIZE (GET_MODE_INNER (mode));
++       i > GET_MODE_UNIT_BITSIZE (mode);
+        i >>= 1)
+     {
+       half = gen_reg_rtx (mode);
+       emit_reduc_half (half, vec, i);
+-      if (i == GET_MODE_BITSIZE (GET_MODE_INNER (mode)) * 2)
++      if (i == GET_MODE_UNIT_BITSIZE (mode) * 2)
+ 	dst = dest;
+       else
+ 	dst = gen_reg_rtx (mode);
+@@ -47119,7 +47103,7 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
+     return false;
+   if (TARGET_AVX512F && GET_MODE_SIZE (vmode) == 64
+       && (TARGET_AVX512BW
+-	  || GET_MODE_SIZE (GET_MODE_INNER (vmode)) >= 4))
++	  || GET_MODE_UNIT_SIZE (vmode) >= 4))
+     ;
+   else if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
+     ;
+@@ -47566,7 +47550,7 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
+       rperm[i] = GEN_INT ((d->perm[i * nelt / 16] * 16 / nelt) & 15);
+   else
+     {
+-      eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
++      eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+       if (!d->one_operand_p)
+ 	mask = 2 * nelt - 1;
+       else if (vmode == V16QImode)
+@@ -47938,7 +47922,7 @@ expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool single_insn_only_p)
+       return expand_vec_perm_1 (&dcopy);
+     }
+ 
+-  shift = GEN_INT (min * GET_MODE_BITSIZE (GET_MODE_INNER (d->vmode)));
++  shift = GEN_INT (min * GET_MODE_UNIT_BITSIZE (d->vmode));
+   if (GET_MODE_SIZE (d->vmode) == 16)
+     {
+       target = gen_reg_rtx (TImode);
+@@ -48743,7 +48727,7 @@ expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
+     return true;
+ 
+   nelt = d->nelt;
+-  eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
++  eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  If the required element is within
+      the given vector it is shuffled into the proper lane.  If the required
+@@ -48807,7 +48791,7 @@ expand_vec_perm_vpshufb2_vpermq (struct expand_vec_perm_d *d)
+     return true;
+ 
+   nelt = d->nelt;
+-  eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
++  eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  If the required element is within
+      the same lane, it is shuffled in.  If the required element from the
+@@ -48883,7 +48867,7 @@ expand_vec_perm_vpshufb2_vpermq_even_odd (struct expand_vec_perm_d *d)
+     return true;
+ 
+   nelt = d->nelt;
+-  eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
++  eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate two permutation masks.  In the first permutation mask
+      the first quarter will contain indexes for the first half
+@@ -49534,7 +49518,7 @@ expand_vec_perm_vpshufb4_vpermq2 (struct expand_vec_perm_d *d)
+     return true;
+ 
+   nelt = d->nelt;
+-  eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
++  eltsz = GET_MODE_UNIT_SIZE (d->vmode);
+ 
+   /* Generate 4 permutation masks.  If the required element is within
+      the same lane, it is shuffled in.  If the required element from the
+@@ -50459,8 +50443,7 @@ ix86_expand_sse2_abs (rtx target, rtx input)
+ 	 value of X is (((signed) X >> (W-1)) ^ X) - ((signed) X >> (W-1)).  */
+       case V4SImode:
+ 	tmp0 = expand_simple_binop (mode, ASHIFTRT, input,
+-				    GEN_INT (GET_MODE_BITSIZE
+-					     (GET_MODE_INNER (mode)) - 1),
++				    GEN_INT (GET_MODE_UNIT_BITSIZE (mode) - 1),
+ 				    NULL, 0, OPTAB_DIRECT);
+ 	tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
+ 				    NULL, 0, OPTAB_DIRECT);
+@@ -51048,6 +51031,7 @@ find_constant (rtx in_rtx, imm_info *imm_values)
+ 	  break;
+ 
+ 	case CONST_DOUBLE:
++	case CONST_WIDE_INT:
+ 	  (imm_values->imm)++;
+ 	  (imm_values->imm64)++;
+ 	  break;
+--- a/src/gcc/config/i386/i386.h
++++ b/src/gcc/config/i386/i386.h
+@@ -2573,6 +2573,8 @@ extern void debug_dispatch_window (int);
+ /* For switching between functions with different target attributes.  */
+ #define SWITCHABLE_TARGET 1
+ 
++#define TARGET_SUPPORTS_WIDE_INT 1
++
+ /*
+ Local variables:
+ version-control: t
+--- a/src/gcc/config/i386/i386.md
++++ b/src/gcc/config/i386/i386.md
+@@ -10749,17 +10749,10 @@
+   "TARGET_64BIT && !TARGET_USE_BT"
+   [(const_int 0)]
+ {
+-  HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
+-  rtx op1;
++  int i = INTVAL (operands[1]);
+ 
+-  if (HOST_BITS_PER_WIDE_INT >= 64)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else if (i < HOST_BITS_PER_WIDE_INT)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else
+-    lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
++  rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
+ 
+-  op1 = immed_double_const (lo, hi, DImode);
+   if (i >= 31)
+     {
+       emit_move_insn (operands[2], op1);
+@@ -10781,17 +10774,10 @@
+   "TARGET_64BIT && !TARGET_USE_BT"
+   [(const_int 0)]
+ {
+-  HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
+-  rtx op1;
+-
+-  if (HOST_BITS_PER_WIDE_INT >= 64)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else if (i < HOST_BITS_PER_WIDE_INT)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else
+-    lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
++  int i = INTVAL (operands[1]);
+ 
+-  op1 = immed_double_const (~lo, ~hi, DImode);
++  rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
++ 
+   if (i >= 32)
+     {
+       emit_move_insn (operands[2], op1);
+@@ -10814,17 +10800,10 @@
+   "TARGET_64BIT && !TARGET_USE_BT"
+   [(const_int 0)]
+ {
+-  HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
+-  rtx op1;
++  int i = INTVAL (operands[1]);
+ 
+-  if (HOST_BITS_PER_WIDE_INT >= 64)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else if (i < HOST_BITS_PER_WIDE_INT)
+-    lo = (HOST_WIDE_INT)1 << i, hi = 0;
+-  else
+-    lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
++  rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
+ 
+-  op1 = immed_double_const (lo, hi, DImode);
+   if (i >= 31)
+     {
+       emit_move_insn (operands[2], op1);
+--- a/src/gcc/config/i386/predicates.md
++++ b/src/gcc/config/i386/predicates.md
+@@ -144,18 +144,10 @@
+   switch (GET_CODE (op))
+     {
+     case CONST_INT:
+-      /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
+-         to be at least 32 and this all acceptable constants are
+-	 represented as CONST_INT.  */
+-      if (HOST_BITS_PER_WIDE_INT == 32)
+-	return true;
+-      else
+-	{
+-	  HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
+-	  return trunc_int_for_mode (val, SImode) == val;
+-	}
+-      break;
+-
++      {
++        HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
++        return trunc_int_for_mode (val, SImode) == val;
++      }
+     case SYMBOL_REF:
+       /* For certain code models, the symbolic references are known to fit.
+ 	 in CM_SMALL_PIC model we know it fits if it is local to the shared
+@@ -262,21 +254,12 @@
+ 
+ ;; Return true if VALUE can be stored in the zero extended immediate field.
+ (define_predicate "x86_64_zext_immediate_operand"
+-  (match_code "const_double,const_int,symbol_ref,label_ref,const")
++  (match_code "const_int,symbol_ref,label_ref,const")
+ {
+   switch (GET_CODE (op))
+     {
+-    case CONST_DOUBLE:
+-      if (HOST_BITS_PER_WIDE_INT == 32)
+-	return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
+-      else
+-	return false;
+-
+     case CONST_INT:
+-      if (HOST_BITS_PER_WIDE_INT == 32)
+-	return INTVAL (op) >= 0;
+-      else
+-	return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
++      return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
+ 
+     case SYMBOL_REF:
+       /* For certain code models, the symbolic references are known to fit.  */
+@@ -629,7 +612,7 @@
+ 
+ ;; Match exactly zero.
+ (define_predicate "const0_operand"
+-  (match_code "const_int,const_double,const_vector")
++  (match_code "const_int,const_wide_int,const_double,const_vector")
+ {
+   if (mode == VOIDmode)
+     mode = GET_MODE (op);
+@@ -638,7 +621,7 @@
+ 
+ ;; Match -1.
+ (define_predicate "constm1_operand"
+-  (match_code "const_int,const_double,const_vector")
++  (match_code "const_int,const_wide_int,const_double,const_vector")
+ {
+   if (mode == VOIDmode)
+     mode = GET_MODE (op);
+@@ -647,7 +630,7 @@
+ 
+ ;; Match one or vector filled with ones.
+ (define_predicate "const1_operand"
+-  (match_code "const_int,const_double,const_vector")
++  (match_code "const_int,const_wide_int,const_double,const_vector")
+ {
+   if (mode == VOIDmode)
+     mode = GET_MODE (op);
+--- a/src/gcc/config/i386/sse.md
++++ b/src/gcc/config/i386/sse.md
+@@ -11793,7 +11793,7 @@
+ {
+   int mask,selector;
+   mask = INTVAL (operands[3]);
+-  selector = GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4 ?
++  selector = GET_MODE_UNIT_SIZE (<MODE>mode) == 4 ?
+     0xFFFF ^ (0xF000 >> mask * 4)
+     : 0xFF ^ (0xC0 >> mask * 2);
+   emit_insn (gen_<extract_type>_vinsert<shuffletype><extract_suf>_1_mask
+@@ -17468,8 +17468,8 @@
+ 	  [(match_operand 3 "const_int_operand" "n, n")])))]
+   "TARGET_SSSE3"
+ {
+-  machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0]));
+-  operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode));
++  operands[2] =
++   GEN_INT (INTVAL (operands[3]) * GET_MODE_UNIT_SIZE (GET_MODE (operands[0])));
+ 
+   switch (which_alternative)
+     {
+--- a/src/gcc/config/linux.h
++++ b/src/gcc/config/linux.h
+@@ -32,10 +32,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define OPTION_GLIBC  (DEFAULT_LIBC == LIBC_GLIBC)
+ #define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC)
+ #define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (DEFAULT_LIBC == LIBC_MUSL)
+ #else
+ #define OPTION_GLIBC  (linux_libc == LIBC_GLIBC)
+ #define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC)
+ #define OPTION_BIONIC (linux_libc == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (linux_libc == LIBC_MUSL)
+ #endif
+ 
+ #define GNU_USER_TARGET_OS_CPP_BUILTINS()			\
+@@ -50,21 +54,25 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+     } while (0)
+ 
+ /* Determine which dynamic linker to use depending on whether GLIBC or
+-   uClibc or Bionic is the default C library and whether
+-   -muclibc or -mglibc or -mbionic has been passed to change the default.  */
++   uClibc or Bionic or musl is the default C library and whether
++   -muclibc or -mglibc or -mbionic or -mmusl has been passed to change
++   the default.  */
+ 
+-#define CHOOSE_DYNAMIC_LINKER1(LIBC1, LIBC2, LIBC3, LD1, LD2, LD3)	\
+-  "%{" LIBC2 ":" LD2 ";:%{" LIBC3 ":" LD3 ";:" LD1 "}}"
++#define CHOOSE_DYNAMIC_LINKER1(LIBC1, LIBC2, LIBC3, LIBC4, LD1, LD2, LD3, LD4)	\
++  "%{" LIBC2 ":" LD2 ";:%{" LIBC3 ":" LD3 ";:%{" LIBC4 ":" LD4 ";:" LD1 "}}}"
+ 
+ #if DEFAULT_LIBC == LIBC_GLIBC
+-#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+-  CHOOSE_DYNAMIC_LINKER1 ("mglibc", "muclibc", "mbionic", G, U, B)
++#define CHOOSE_DYNAMIC_LINKER(G, U, B, M) \
++  CHOOSE_DYNAMIC_LINKER1 ("mglibc", "muclibc", "mbionic", "mmusl", G, U, B, M)
+ #elif DEFAULT_LIBC == LIBC_UCLIBC
+-#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+-  CHOOSE_DYNAMIC_LINKER1 ("muclibc", "mglibc", "mbionic", U, G, B)
++#define CHOOSE_DYNAMIC_LINKER(G, U, B, M) \
++  CHOOSE_DYNAMIC_LINKER1 ("muclibc", "mglibc", "mbionic", "mmusl", U, G, B, M)
+ #elif DEFAULT_LIBC == LIBC_BIONIC
+-#define CHOOSE_DYNAMIC_LINKER(G, U, B) \
+-  CHOOSE_DYNAMIC_LINKER1 ("mbionic", "mglibc", "muclibc", B, G, U)
++#define CHOOSE_DYNAMIC_LINKER(G, U, B, M) \
++  CHOOSE_DYNAMIC_LINKER1 ("mbionic", "mglibc", "muclibc", "mmusl", B, G, U, M)
++#elif DEFAULT_LIBC == LIBC_MUSL
++#define CHOOSE_DYNAMIC_LINKER(G, U, B, M) \
++  CHOOSE_DYNAMIC_LINKER1 ("mmusl", "mglibc", "muclibc", "mbionic", M, G, U, B)
+ #else
+ #error "Unsupported DEFAULT_LIBC"
+ #endif /* DEFAULT_LIBC */
+@@ -81,24 +89,100 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
+ #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
+ #define BIONIC_DYNAMIC_LINKERX32 "/system/bin/linkerx32"
++/* Should be redefined for each target that supports musl.  */
++#define MUSL_DYNAMIC_LINKER "/dev/null"
++#define MUSL_DYNAMIC_LINKER32 "/dev/null"
++#define MUSL_DYNAMIC_LINKER64 "/dev/null"
++#define MUSL_DYNAMIC_LINKERX32 "/dev/null"
+ 
+ #define GNU_USER_DYNAMIC_LINKER						\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER,	\
+-			 BIONIC_DYNAMIC_LINKER)
++			 BIONIC_DYNAMIC_LINKER, MUSL_DYNAMIC_LINKER)
+ #define GNU_USER_DYNAMIC_LINKER32					\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER32, UCLIBC_DYNAMIC_LINKER32, \
+-			 BIONIC_DYNAMIC_LINKER32)
++			 BIONIC_DYNAMIC_LINKER32, MUSL_DYNAMIC_LINKER32)
+ #define GNU_USER_DYNAMIC_LINKER64					\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64, \
+-			 BIONIC_DYNAMIC_LINKER64)
++			 BIONIC_DYNAMIC_LINKER64, MUSL_DYNAMIC_LINKER64)
+ #define GNU_USER_DYNAMIC_LINKERX32					\
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKERX32, UCLIBC_DYNAMIC_LINKERX32, \
+-			 BIONIC_DYNAMIC_LINKERX32)
++			 BIONIC_DYNAMIC_LINKERX32, MUSL_DYNAMIC_LINKERX32)
+ 
+ /* Whether we have Bionic libc runtime */
+ #undef TARGET_HAS_BIONIC
+ #define TARGET_HAS_BIONIC (OPTION_BIONIC)
+ 
++/* musl avoids problematic includes by rearranging the include directories.
++ * Unfortunately, this is mostly duplicated from cppdefault.c */
++#if DEFAULT_LIBC == LIBC_MUSL
++#define INCLUDE_DEFAULTS_MUSL_GPP			\
++    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1,		\
++      GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 },		\
++    { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1,		\
++      GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 },		\
++    { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1,	\
++      GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 },
++
++#ifdef LOCAL_INCLUDE_DIR
++#define INCLUDE_DEFAULTS_MUSL_LOCAL			\
++    { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 },		\
++    { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 },
++#else
++#define INCLUDE_DEFAULTS_MUSL_LOCAL
++#endif
++
++#ifdef PREFIX_INCLUDE_DIR
++#define INCLUDE_DEFAULTS_MUSL_PREFIX			\
++    { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0},
++#else
++#define INCLUDE_DEFAULTS_MUSL_PREFIX
++#endif
++
++#ifdef CROSS_INCLUDE_DIR
++#define INCLUDE_DEFAULTS_MUSL_CROSS			\
++    { CROSS_INCLUDE_DIR, "GCC", 0, 0, 0, 0},
++#else
++#define INCLUDE_DEFAULTS_MUSL_CROSS
++#endif
++
++#ifdef TOOL_INCLUDE_DIR
++#define INCLUDE_DEFAULTS_MUSL_TOOL			\
++    { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 0, 0},
++#else
++#define INCLUDE_DEFAULTS_MUSL_TOOL
++#endif
++
++#ifdef NATIVE_SYSTEM_HEADER_DIR
++#define INCLUDE_DEFAULTS_MUSL_NATIVE			\
++    { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 },	\
++    { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 0 },
++#else
++#define INCLUDE_DEFAULTS_MUSL_NATIVE
++#endif
++
++#if defined (CROSS_DIRECTORY_STRUCTURE) && !defined (TARGET_SYSTEM_ROOT)
++# undef INCLUDE_DEFAULTS_MUSL_LOCAL
++# define INCLUDE_DEFAULTS_MUSL_LOCAL
++# undef INCLUDE_DEFAULTS_MUSL_NATIVE
++# define INCLUDE_DEFAULTS_MUSL_NATIVE
++#else
++# undef INCLUDE_DEFAULTS_MUSL_CROSS
++# define INCLUDE_DEFAULTS_MUSL_CROSS
++#endif
++
++#undef INCLUDE_DEFAULTS
++#define INCLUDE_DEFAULTS				\
++  {							\
++    INCLUDE_DEFAULTS_MUSL_GPP				\
++    INCLUDE_DEFAULTS_MUSL_PREFIX			\
++    INCLUDE_DEFAULTS_MUSL_CROSS				\
++    INCLUDE_DEFAULTS_MUSL_TOOL				\
++    INCLUDE_DEFAULTS_MUSL_NATIVE			\
++    { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 },		\
++    { 0, 0, 0, 0, 0, 0 }				\
++  }
++#endif
++
+ #if (DEFAULT_LIBC == LIBC_UCLIBC) && defined (SINGLE_LIBC) /* uClinux */
+ /* This is a *uclinux* target.  We don't define below macros to normal linux
+    versions, because doing so would require *uclinux* targets to include
+--- a/src/gcc/config/linux.opt
++++ b/src/gcc/config/linux.opt
+@@ -28,5 +28,9 @@ Target Report RejectNegative Var(linux_libc,LIBC_GLIBC) Negative(muclibc)
+ Use GNU C library
+ 
+ muclibc
+-Target Report RejectNegative Var(linux_libc,LIBC_UCLIBC) Negative(mbionic)
++Target Report RejectNegative Var(linux_libc,LIBC_UCLIBC) Negative(mmusl)
+ Use uClibc C library
++
++mmusl
++Target Report RejectNegative Var(linux_libc,LIBC_MUSL) Negative(mbionic)
++Use musl C library
+--- a/src/gcc/config/m68k/t-opts
++++ b/src/gcc/config/m68k/t-opts
+@@ -1,3 +1,6 @@
++OPTIONS_H_EXTRA += $(srcdir)/config/m68k/m68k-microarchs.def \
++		   $(srcdir)/config/m68k/m68k-devices.def
++
+ $(srcdir)/config/m68k/m68k-tables.opt: $(srcdir)/config/m68k/genopt.sh \
+   $(srcdir)/config/m68k/m68k-devices.def $(srcdir)/config/m68k/m68k-isas.def \
+   $(srcdir)/config/m68k/m68k-microarchs.def
+--- a/src/gcc/config/mips/linux.h
++++ b/src/gcc/config/mips/linux.h
+@@ -37,7 +37,13 @@ along with GCC; see the file COPYING3.  If not see
+ #define UCLIBC_DYNAMIC_LINKERN32 \
+   "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
+ 
++#undef MUSL_DYNAMIC_LINKER32
++#define MUSL_DYNAMIC_LINKER32 "/lib/ld-musl-mips%{EL:el}%{msoft-float:-sf}.so.1"
++#undef MUSL_DYNAMIC_LINKER64
++#define MUSL_DYNAMIC_LINKER64 "/lib/ld-musl-mips64%{EL:el}%{msoft-float:-sf}.so.1"
++#define MUSL_DYNAMIC_LINKERN32 "/lib/ld-musl-mipsn32%{EL:el}%{msoft-float:-sf}.so.1"
++
+ #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
+ #define GNU_USER_DYNAMIC_LINKERN32 \
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKERN32, UCLIBC_DYNAMIC_LINKERN32, \
+-                         BIONIC_DYNAMIC_LINKERN32)
++                         BIONIC_DYNAMIC_LINKERN32, MUSL_DYNAMIC_LINKERN32)
+--- a/src/gcc/config/rs6000/linux.h
++++ b/src/gcc/config/rs6000/linux.h
+@@ -30,10 +30,14 @@
+ #define OPTION_GLIBC  (DEFAULT_LIBC == LIBC_GLIBC)
+ #define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC)
+ #define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (DEFAULT_LIBC == LIBC_MUSL)
+ #else
+ #define OPTION_GLIBC  (linux_libc == LIBC_GLIBC)
+ #define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC)
+ #define OPTION_BIONIC (linux_libc == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (linux_libc == LIBC_MUSL)
+ #endif
+ 
+ /* Determine what functions are present at the runtime;
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -299,10 +299,14 @@ extern int dot_symbols;
+ #define OPTION_GLIBC  (DEFAULT_LIBC == LIBC_GLIBC)
+ #define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC)
+ #define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (DEFAULT_LIBC == LIBC_MUSL)
+ #else
+ #define OPTION_GLIBC  (linux_libc == LIBC_GLIBC)
+ #define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC)
+ #define OPTION_BIONIC (linux_libc == LIBC_BIONIC)
++#undef OPTION_MUSL
++#define OPTION_MUSL   (linux_libc == LIBC_MUSL)
+ #endif
+ 
+ /* Determine what functions are present at the runtime;
+--- a/src/gcc/config/rs6000/rs6000.c
++++ b/src/gcc/config/rs6000/rs6000.c
+@@ -31749,8 +31749,7 @@ rs6000_do_expand_vec_perm (rtx target, rtx op0, rtx op1,
+   imode = vmode;
+   if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)
+     {
+-      imode = GET_MODE_INNER (vmode);
+-      imode = mode_for_size (GET_MODE_BITSIZE (imode), MODE_INT, 0);
++      imode = mode_for_size (GET_MODE_UNIT_BITSIZE (vmode), MODE_INT, 0);
+       imode = mode_for_vector (imode, nelt);
+     }
+ 
+@@ -31819,7 +31818,7 @@ rs6000_complex_function_value (machine_mode mode)
+   unsigned int regno;
+   rtx r1, r2;
+   machine_mode inner = GET_MODE_INNER (mode);
+-  unsigned int inner_bytes = GET_MODE_SIZE (inner);
++  unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
+ 
+   if (FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
+     regno = FP_ARG_RETURN;
+--- a/src/gcc/config/spu/spu.c
++++ b/src/gcc/config/spu/spu.c
+@@ -3415,11 +3415,8 @@ arith_immediate_p (rtx op, machine_mode mode,
+ 
+   constant_to_array (mode, op, arr);
+ 
+-  if (VECTOR_MODE_P (mode))
+-    mode = GET_MODE_INNER (mode);
+-
+-  bytes = GET_MODE_SIZE (mode);
+-  mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0);
++  bytes = GET_MODE_UNIT_SIZE (mode);
++  mode = mode_for_size (GET_MODE_UNIT_BITSIZE (mode), MODE_INT, 0);
+ 
+   /* Check that bytes are repeated. */
+   for (i = bytes; i < 16; i += bytes)
+@@ -3459,8 +3456,7 @@ exp2_immediate_p (rtx op, machine_mode mode, int low, int high)
+ 
+   constant_to_array (mode, op, arr);
+ 
+-  if (VECTOR_MODE_P (mode))
+-    mode = GET_MODE_INNER (mode);
++  mode = GET_MODE_INNER (mode);
+ 
+   bytes = GET_MODE_SIZE (mode);
+   int_mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0);
+--- a/src/gcc/configure
++++ b/src/gcc/configure
+@@ -767,10 +767,6 @@ REPORT_BUGS_TEXI
+ REPORT_BUGS_TO
+ PKGVERSION
+ CONFIGURE_SPECS
+-CROSS_SYSTEM_HEADER_DIR
+-TARGET_SYSTEM_ROOT_DEFINE
+-TARGET_SYSTEM_ROOT
+-SYSROOT_CFLAGS_FOR_TARGET
+ enable_shared
+ enable_fixed_point
+ enable_decimal_float
+@@ -809,6 +805,10 @@ LDFLAGS
+ CFLAGS
+ CC
+ GENINSRC
++CROSS_SYSTEM_HEADER_DIR
++TARGET_SYSTEM_ROOT_DEFINE
++TARGET_SYSTEM_ROOT
++SYSROOT_CFLAGS_FOR_TARGET
+ target_subdir
+ host_subdir
+ build_subdir
+@@ -870,6 +870,9 @@ ac_user_opts='
+ enable_option_checking
+ with_build_libsubdir
+ with_local_prefix
++with_native_system_header_dir
++with_build_sysroot
++with_sysroot
+ with_gxx_include_dir
+ with_cpp_install_dir
+ enable_generated_files_in_srcdir
+@@ -896,9 +899,6 @@ enable_tls
+ enable_objc_gc
+ with_dwarf2
+ enable_shared
+-with_native_system_header_dir
+-with_build_sysroot
+-with_sysroot
+ with_specs
+ with_pkgversion
+ with_bugurl
+@@ -1680,6 +1680,12 @@ Optional Packages:
+   --without-PACKAGE       do not use PACKAGE (same as --with-PACKAGE=no)
+   --with-build-libsubdir=DIR  Directory where to find libraries for build system
+   --with-local-prefix=DIR specifies directory to put local include
++  --with-native-system-header-dir=dir
++                          use dir as the directory to look for standard
++                          system header files in.  Defaults to /usr/include.
++  --with-build-sysroot=sysroot
++                          use sysroot as the system root during the build
++  --with-sysroot[=DIR]    search for usr/lib, usr/include, et al, within DIR
+   --with-gxx-include-dir=DIR
+                           specifies directory to put g++ header files
+   --with-cpp-install-dir=DIR
+@@ -1692,14 +1698,9 @@ Optional Packages:
+   --with-as               arrange to use the specified as (full pathname)
+   --with-stabs            arrange to use stabs instead of host debug format
+   --with-dwarf2           force the default debug format to be DWARF 2
+-  --with-native-system-header-dir=dir
+-                          use dir as the directory to look for standard
+-                          system header files in.  Defaults to /usr/include.
+-  --with-build-sysroot=sysroot
+-                          use sysroot as the system root during the build
+-  --with-sysroot[=DIR]    search for usr/lib, usr/include, et al, within DIR
+   --with-specs=SPECS      add SPECS to driver command-line processing
+-  --with-pkgversion=PKG   Use PKG in the version string in place of "GCC"
++  --with-pkgversion=PKG   Use PKG in the version string in place of "Linaro
++                          GCC `cat $srcdir/LINARO-VERSION`"
+   --with-bugurl=URL       Direct users to URL to report a bug
+   --with-multilib-list    select multilibs (AArch64, SH and x86-64 only)
+   --with-gnu-ld           assume the C compiler uses GNU ld default=no
+@@ -3339,6 +3340,83 @@ if test x$local_prefix = x; then
+ 	local_prefix=/usr/local
+ fi
+ 
++
++# Check whether --with-native-system-header-dir was given.
++if test "${with_native_system_header_dir+set}" = set; then :
++  withval=$with_native_system_header_dir;
++ case ${with_native_system_header_dir} in
++ yes|no) as_fn_error "bad value ${withval} given for --with-native-system-header-dir" "$LINENO" 5 ;;
++ /* | [A-Za-z]:[\\/]*) ;;
++ *) as_fn_error "--with-native-system-header-dir argument ${withval} must be an absolute directory" "$LINENO" 5 ;;
++ esac
++ configured_native_system_header_dir="${withval}"
++
++else
++  configured_native_system_header_dir=
++fi
++
++
++
++# Check whether --with-build-sysroot was given.
++if test "${with_build_sysroot+set}" = set; then :
++  withval=$with_build_sysroot; if test x"$withval" != x ; then
++     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
++   fi
++else
++  SYSROOT_CFLAGS_FOR_TARGET=
++fi
++
++
++
++if test "x$prefix" = xNONE; then
++ test_prefix=/usr/local
++else
++ test_prefix=$prefix
++fi
++if test "x$exec_prefix" = xNONE; then
++ test_exec_prefix=$test_prefix
++else
++ test_exec_prefix=$exec_prefix
++fi
++
++
++# Check whether --with-sysroot was given.
++if test "${with_sysroot+set}" = set; then :
++  withval=$with_sysroot;
++ case ${with_sysroot} in
++ /) ;;
++ */) with_sysroot=`echo $with_sysroot | sed 's,/$,,'` ;;
++ esac
++ case ${with_sysroot} in
++ yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
++ *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
++ esac
++
++ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
++ CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
++
++ case ${TARGET_SYSTEM_ROOT} in
++ "${test_prefix}"|"${test_prefix}/"*|\
++ "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
++ '${prefix}'|'${prefix}/'*|\
++ '${exec_prefix}'|'${exec_prefix}/'*)
++   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
++   TARGET_SYSTEM_ROOT_DEFINE="$t"
++   ;;
++ esac
++
++else
++
++ TARGET_SYSTEM_ROOT=
++ TARGET_SYSTEM_ROOT_DEFINE=
++ CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
++
++fi
++
++
++
++
++
+ # Don't set gcc_gxx_include_dir to gxx_include_dir since that's only
+ # passed in by the toplevel make and thus we'd get different behavior
+ # depending on where we built the sources.
+@@ -3372,7 +3450,9 @@ gcc_gxx_include_dir_add_sysroot=0
+ if test "${with_sysroot+set}" = set; then
+   gcc_gxx_without_sysroot=`expr "${gcc_gxx_include_dir}" : "${with_sysroot}"'\(.*\)'`
+   if test "${gcc_gxx_without_sysroot}"; then
+-    gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    if test x${with_sysroot} != x/; then
++      gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    fi
+     gcc_gxx_include_dir_add_sysroot=1
+   fi
+ fi
+@@ -7269,79 +7349,6 @@ fi
+ 
+ 
+ 
+-# Check whether --with-native-system-header-dir was given.
+-if test "${with_native_system_header_dir+set}" = set; then :
+-  withval=$with_native_system_header_dir;
+- case ${with_native_system_header_dir} in
+- yes|no) as_fn_error "bad value ${withval} given for --with-native-system-header-dir" "$LINENO" 5 ;;
+- /* | [A-Za-z]:[\\/]*) ;;
+- *) as_fn_error "--with-native-system-header-dir argument ${withval} must be an absolute directory" "$LINENO" 5 ;;
+- esac
+- configured_native_system_header_dir="${withval}"
+-
+-else
+-  configured_native_system_header_dir=
+-fi
+-
+-
+-
+-# Check whether --with-build-sysroot was given.
+-if test "${with_build_sysroot+set}" = set; then :
+-  withval=$with_build_sysroot; if test x"$withval" != x ; then
+-     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
+-   fi
+-else
+-  SYSROOT_CFLAGS_FOR_TARGET=
+-fi
+-
+-
+-
+-if test "x$prefix" = xNONE; then
+- test_prefix=/usr/local
+-else
+- test_prefix=$prefix
+-fi
+-if test "x$exec_prefix" = xNONE; then
+- test_exec_prefix=$test_prefix
+-else
+- test_exec_prefix=$exec_prefix
+-fi
+-
+-
+-# Check whether --with-sysroot was given.
+-if test "${with_sysroot+set}" = set; then :
+-  withval=$with_sysroot;
+- case ${with_sysroot} in
+- yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
+- *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
+- esac
+-
+- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
+- CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
+-
+- case ${TARGET_SYSTEM_ROOT} in
+- "${test_prefix}"|"${test_prefix}/"*|\
+- "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
+- '${prefix}'|'${prefix}/'*|\
+- '${exec_prefix}'|'${exec_prefix}/'*)
+-   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
+-   TARGET_SYSTEM_ROOT_DEFINE="$t"
+-   ;;
+- esac
+-
+-else
+-
+- TARGET_SYSTEM_ROOT=
+- TARGET_SYSTEM_ROOT_DEFINE=
+- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
+-
+-fi
+-
+-
+-
+-
+-
+-
+ # Check whether --with-specs was given.
+ if test "${with_specs+set}" = set; then :
+   withval=$with_specs; CONFIGURE_SPECS=$withval
+@@ -7362,7 +7369,7 @@ if test "${with_pkgversion+set}" = set; then :
+       *)   PKGVERSION="($withval) " ;;
+      esac
+ else
+-  PKGVERSION="(GCC) "
++  PKGVERSION="(Linaro GCC `cat $srcdir/LINARO-VERSION`) "
+ 
+ fi
+ 
+@@ -18162,7 +18169,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 18165 "configure"
++#line 18172 "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -18268,7 +18275,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 18271 "configure"
++#line 18278 "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -24123,6 +24130,40 @@ $as_echo "#define HAVE_AS_MABI_OPTION 1" >>confdefs.h
+         done
+       fi
+     fi
++    # Check if we have binutils support for relocations types needed by -fpic
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -fpic relocs" >&5
++$as_echo_n "checking assembler for -fpic relocs... " >&6; }
++if test "${gcc_cv_as_aarch64_picreloc+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  gcc_cv_as_aarch64_picreloc=no
++  if test x$gcc_cv_as != x; then
++    $as_echo '
++	.text
++	ldr     x0, [x2, #:gotpage_lo15:globalsym]
++    ' > conftest.s
++    if { ac_try='$gcc_cv_as $gcc_cv_as_flags  -o conftest.o conftest.s >&5'
++  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
++  (eval $ac_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }; }
++    then
++	gcc_cv_as_aarch64_picreloc=yes
++    else
++      echo "configure: failed program was" >&5
++      cat conftest.s >&5
++    fi
++    rm -f conftest.o conftest.s
++  fi
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_aarch64_picreloc" >&5
++$as_echo "$gcc_cv_as_aarch64_picreloc" >&6; }
++if test $gcc_cv_as_aarch64_picreloc = yes; then
++
++$as_echo "#define HAVE_AS_SMALL_PIC_RELOCS 1" >>confdefs.h
++
++fi
+     # Enable default workaround for AArch64 Cortex-A53 erratum 835769.
+     # Check whether --enable-fix-cortex-a53-835769 was given.
+ if test "${enable_fix_cortex_a53_835769+set}" = set; then :
+@@ -27833,6 +27874,9 @@ if test "${gcc_cv_libc_provides_ssp+set}" = set; then :
+ else
+   gcc_cv_libc_provides_ssp=no
+     case "$target" in
++       *-*-musl*)
++	 # All versions of musl provide stack protector
++	 gcc_cv_libc_provides_ssp=yes;;
+        *-*-linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu)
+       # glibc 2.4 and later provides __stack_chk_fail and
+       # either __stack_chk_guard, or TLS access to stack guard canary.
+@@ -27865,6 +27909,7 @@ fi
+ 	 # <http://gcc.gnu.org/ml/gcc/2008-10/msg00130.html>) and for now
+ 	 # simply assert that glibc does provide this, which is true for all
+ 	 # realistically usable GNU/Hurd configurations.
++	 # All supported versions of musl provide it as well
+ 	 gcc_cv_libc_provides_ssp=yes;;
+        *-*-darwin* | *-*-freebsd*)
+ 	 ac_fn_c_check_func "$LINENO" "__stack_chk_fail" "ac_cv_func___stack_chk_fail"
+@@ -27961,6 +28006,9 @@ case "$target" in
+       gcc_cv_target_dl_iterate_phdr=no
+     fi
+     ;;
++  *-linux-musl*)
++    gcc_cv_target_dl_iterate_phdr=yes
++    ;;
+ esac
+ 
+ if test x$gcc_cv_target_dl_iterate_phdr = xyes; then
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -121,6 +121,73 @@ if test x$local_prefix = x; then
+ 	local_prefix=/usr/local
+ fi
+ 
++AC_ARG_WITH([native-system-header-dir],
++  [  --with-native-system-header-dir=dir
++                          use dir as the directory to look for standard
++                          system header files in.  Defaults to /usr/include.],
++[
++ case ${with_native_system_header_dir} in
++ yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;;
++ /* | [[A-Za-z]]:[[\\/]]*) ;;
++ *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;;
++ esac
++ configured_native_system_header_dir="${withval}"
++], [configured_native_system_header_dir=])
++
++AC_ARG_WITH(build-sysroot, 
++  [AS_HELP_STRING([--with-build-sysroot=sysroot],
++                  [use sysroot as the system root during the build])],
++  [if test x"$withval" != x ; then
++     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
++   fi],
++  [SYSROOT_CFLAGS_FOR_TARGET=])
++AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)
++
++if test "x$prefix" = xNONE; then
++ test_prefix=/usr/local
++else
++ test_prefix=$prefix
++fi
++if test "x$exec_prefix" = xNONE; then
++ test_exec_prefix=$test_prefix
++else
++ test_exec_prefix=$exec_prefix
++fi
++
++AC_ARG_WITH(sysroot,
++[AS_HELP_STRING([[--with-sysroot[=DIR]]],
++		[search for usr/lib, usr/include, et al, within DIR])],
++[
++ case ${with_sysroot} in
++ /) ;;
++ */) with_sysroot=`echo $with_sysroot | sed 's,/$,,'` ;;
++ esac
++ case ${with_sysroot} in
++ yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
++ *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
++ esac
++   
++ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
++ CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
++	
++ case ${TARGET_SYSTEM_ROOT} in
++ "${test_prefix}"|"${test_prefix}/"*|\
++ "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
++ '${prefix}'|'${prefix}/'*|\
++ '${exec_prefix}'|'${exec_prefix}/'*)
++   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
++   TARGET_SYSTEM_ROOT_DEFINE="$t"
++   ;;
++ esac
++], [
++ TARGET_SYSTEM_ROOT=
++ TARGET_SYSTEM_ROOT_DEFINE=
++ CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
++])
++AC_SUBST(TARGET_SYSTEM_ROOT)
++AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
++AC_SUBST(CROSS_SYSTEM_HEADER_DIR)
++
+ # Don't set gcc_gxx_include_dir to gxx_include_dir since that's only
+ # passed in by the toplevel make and thus we'd get different behavior
+ # depending on where we built the sources.
+@@ -152,7 +219,9 @@ gcc_gxx_include_dir_add_sysroot=0
+ if test "${with_sysroot+set}" = set; then
+   gcc_gxx_without_sysroot=`expr "${gcc_gxx_include_dir}" : "${with_sysroot}"'\(.*\)'`
+   if test "${gcc_gxx_without_sysroot}"; then
+-    gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    if test x${with_sysroot} != x/; then
++      gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    fi
+     gcc_gxx_include_dir_add_sysroot=1
+   fi
+ fi
+@@ -791,69 +860,6 @@ AC_ARG_ENABLE(shared,
+ ], [enable_shared=yes])
+ AC_SUBST(enable_shared)
+ 
+-AC_ARG_WITH([native-system-header-dir],
+-  [  --with-native-system-header-dir=dir
+-                          use dir as the directory to look for standard
+-                          system header files in.  Defaults to /usr/include.],
+-[
+- case ${with_native_system_header_dir} in
+- yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;;
+- /* | [[A-Za-z]]:[[\\/]]*) ;;
+- *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;;
+- esac
+- configured_native_system_header_dir="${withval}"
+-], [configured_native_system_header_dir=])
+-
+-AC_ARG_WITH(build-sysroot, 
+-  [AS_HELP_STRING([--with-build-sysroot=sysroot],
+-                  [use sysroot as the system root during the build])],
+-  [if test x"$withval" != x ; then
+-     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
+-   fi],
+-  [SYSROOT_CFLAGS_FOR_TARGET=])
+-AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)
+-
+-if test "x$prefix" = xNONE; then
+- test_prefix=/usr/local
+-else
+- test_prefix=$prefix
+-fi
+-if test "x$exec_prefix" = xNONE; then
+- test_exec_prefix=$test_prefix
+-else
+- test_exec_prefix=$exec_prefix
+-fi
+-
+-AC_ARG_WITH(sysroot,
+-[AS_HELP_STRING([[--with-sysroot[=DIR]]],
+-		[search for usr/lib, usr/include, et al, within DIR])],
+-[
+- case ${with_sysroot} in
+- yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
+- *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
+- esac
+-   
+- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
+- CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
+-	
+- case ${TARGET_SYSTEM_ROOT} in
+- "${test_prefix}"|"${test_prefix}/"*|\
+- "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
+- '${prefix}'|'${prefix}/'*|\
+- '${exec_prefix}'|'${exec_prefix}/'*)
+-   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
+-   TARGET_SYSTEM_ROOT_DEFINE="$t"
+-   ;;
+- esac
+-], [
+- TARGET_SYSTEM_ROOT=
+- TARGET_SYSTEM_ROOT_DEFINE=
+- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
+-])
+-AC_SUBST(TARGET_SYSTEM_ROOT)
+-AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
+-AC_SUBST(CROSS_SYSTEM_HEADER_DIR)
+-
+ AC_ARG_WITH(specs,
+   [AS_HELP_STRING([--with-specs=SPECS],
+                   [add SPECS to driver command-line processing])],
+@@ -862,7 +868,7 @@ AC_ARG_WITH(specs,
+ )
+ AC_SUBST(CONFIGURE_SPECS)
+ 
+-ACX_PKGVERSION([GCC])
++ACX_PKGVERSION([Linaro GCC `cat $srcdir/LINARO-VERSION`])
+ ACX_BUGURL([http://gcc.gnu.org/bugs.html])
+ 
+ # Sanity check enable_languages in case someone does not run the toplevel
+@@ -3574,6 +3580,13 @@ case "$target" in
+         done
+       fi
+     fi
++    # Check if we have binutils support for relocations types needed by -fpic
++    gcc_GAS_CHECK_FEATURE([-fpic relocs], gcc_cv_as_aarch64_picreloc,,,
++    [
++	.text
++	ldr     x0, [[x2, #:gotpage_lo15:globalsym]]
++    ],,[AC_DEFINE(HAVE_AS_SMALL_PIC_RELOCS, 1,
++	[Define if your assembler supports relocs needed by -fpic.])])
+     # Enable default workaround for AArch64 Cortex-A53 erratum 835769.
+     AC_ARG_ENABLE(fix-cortex-a53-835769,
+     [
+@@ -5287,6 +5300,9 @@ AC_CACHE_CHECK(__stack_chk_fail in target C library,
+       gcc_cv_libc_provides_ssp,
+       [gcc_cv_libc_provides_ssp=no
+     case "$target" in
++       *-*-musl*)
++	 # All versions of musl provide stack protector
++	 gcc_cv_libc_provides_ssp=yes;;
+        *-*-linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu)
+       # glibc 2.4 and later provides __stack_chk_fail and
+       # either __stack_chk_guard, or TLS access to stack guard canary.
+@@ -5313,6 +5329,7 @@ AC_CACHE_CHECK(__stack_chk_fail in target C library,
+ 	 # <http://gcc.gnu.org/ml/gcc/2008-10/msg00130.html>) and for now
+ 	 # simply assert that glibc does provide this, which is true for all
+ 	 # realistically usable GNU/Hurd configurations.
++	 # All supported versions of musl provide it as well
+ 	 gcc_cv_libc_provides_ssp=yes;;
+        *-*-darwin* | *-*-freebsd*)
+ 	 AC_CHECK_FUNC(__stack_chk_fail,[gcc_cv_libc_provides_ssp=yes],
+@@ -5386,6 +5403,9 @@ case "$target" in
+       gcc_cv_target_dl_iterate_phdr=no
+     fi
+     ;;
++  *-linux-musl*)
++    gcc_cv_target_dl_iterate_phdr=yes
++    ;;
+ esac
+ GCC_TARGET_TEMPLATE([TARGET_DL_ITERATE_PHDR])
+ if test x$gcc_cv_target_dl_iterate_phdr = xyes; then
+--- a/src/gcc/cp/Make-lang.in
++++ b/src/gcc/cp/Make-lang.in
+@@ -155,7 +155,7 @@ check-c++-subtargets : check-g++-subtargets
+ # List of targets that can use the generic check- rule and its // variant.
+ lang_checks += check-g++
+ lang_checks_parallelized += check-g++
+-# For description see comment above check_gcc_parallelize in gcc/Makefile.in.
++# For description see the check_$lang_parallelize comment in gcc/Makefile.in.
+ check_g++_parallelize = 10000
+ #
+ # Install hooks:
+@@ -221,6 +221,7 @@ c++.mostlyclean:
+ 	-rm -f doc/g++.1
+ 	-rm -f cp/*$(objext)
+ 	-rm -f cp/*$(coverageexts)
++	-rm -f xg++$(exeext) g++-cross$(exeext) cc1plus$(exeext)
+ c++.clean:
+ c++.distclean:
+ 	-rm -f cp/config.status cp/Makefile
+--- a/src/gcc/cppbuiltin.c
++++ b/src/gcc/cppbuiltin.c
+@@ -62,18 +62,41 @@ parse_basever (int *major, int *minor, int *patchlevel)
+     *patchlevel = s_patchlevel;
+ }
+ 
++/* Parse a LINAROVER version string of the format "M.m-year.month[-spin][~dev]"
++   to create Linaro release number YYYYMM and spin version.  */
++static void
++parse_linarover (int *release, int *spin)
++{
++  static int s_year = -1, s_month, s_spin;
++
++  if (s_year == -1)
++    if (sscanf (LINAROVER, "%*[^-]-%d.%d-%d", &s_year, &s_month, &s_spin) != 3)
++      {
++	sscanf (LINAROVER, "%*[^-]-%d.%d", &s_year, &s_month);
++	s_spin = 0;
++      }
++
++  if (release)
++    *release = s_year * 100 + s_month;
++
++  if (spin)
++    *spin = s_spin;
++}
+ 
+ /* Define __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__ and __VERSION__.  */
+ static void
+ define__GNUC__ (cpp_reader *pfile)
+ {
+-  int major, minor, patchlevel;
++  int major, minor, patchlevel, linaro_release, linaro_spin;
+ 
+   parse_basever (&major, &minor, &patchlevel);
++  parse_linarover (&linaro_release, &linaro_spin);
+   cpp_define_formatted (pfile, "__GNUC__=%d", major);
+   cpp_define_formatted (pfile, "__GNUC_MINOR__=%d", minor);
+   cpp_define_formatted (pfile, "__GNUC_PATCHLEVEL__=%d", patchlevel);
+   cpp_define_formatted (pfile, "__VERSION__=\"%s\"", version_string);
++  cpp_define_formatted (pfile, "__LINARO_RELEASE__=%d", linaro_release);
++  cpp_define_formatted (pfile, "__LINARO_SPIN__=%d", linaro_spin);
+   cpp_define_formatted (pfile, "__ATOMIC_RELAXED=%d", MEMMODEL_RELAXED);
+   cpp_define_formatted (pfile, "__ATOMIC_SEQ_CST=%d", MEMMODEL_SEQ_CST);
+   cpp_define_formatted (pfile, "__ATOMIC_ACQUIRE=%d", MEMMODEL_ACQUIRE);
+--- a/src/gcc/cprop.c
++++ b/src/gcc/cprop.c
+@@ -285,6 +285,15 @@ cprop_constant_p (const_rtx x)
+   return CONSTANT_P (x) && (GET_CODE (x) != CONST || shared_const_p (x));
+ }
+ 
++/* Determine whether the rtx X should be treated as a register that can
++   be propagated.  Any pseudo-register is fine.  */
++
++static bool
++cprop_reg_p (const_rtx x)
++{
++  return REG_P (x) && !HARD_REGISTER_P (x);
++}
++
+ /* Scan SET present in INSN and add an entry to the hash TABLE.
+    IMPLICIT is true if it's an implicit set, false otherwise.  */
+ 
+@@ -295,8 +304,7 @@ hash_scan_set (rtx set, rtx_insn *insn, struct hash_table_d *table,
+   rtx src = SET_SRC (set);
+   rtx dest = SET_DEST (set);
+ 
+-  if (REG_P (dest)
+-      && ! HARD_REGISTER_P (dest)
++  if (cprop_reg_p (dest)
+       && reg_available_p (dest, insn)
+       && can_copy_p (GET_MODE (dest)))
+     {
+@@ -321,9 +329,8 @@ hash_scan_set (rtx set, rtx_insn *insn, struct hash_table_d *table,
+ 	src = XEXP (note, 0), set = gen_rtx_SET (VOIDmode, dest, src);
+ 
+       /* Record sets for constant/copy propagation.  */
+-      if ((REG_P (src)
++      if ((cprop_reg_p (src)
+ 	   && src != dest
+-	   && ! HARD_REGISTER_P (src)
+ 	   && reg_available_p (src, insn))
+ 	  || cprop_constant_p (src))
+ 	insert_set_in_table (dest, src, insn, table, implicit);
+@@ -758,12 +765,37 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
+   int success = 0;
+   rtx set = single_set (insn);
+ 
++  bool check_rtx_costs = true;
++  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
++  int old_cost = set ? set_rtx_cost (set, speed) : 0;
++
++  if ((note != 0
++      && REG_NOTE_KIND (note) == REG_EQUAL
++      && (GET_CODE (XEXP (note, 0)) == CONST
++	  || CONSTANT_P (XEXP (note, 0))))
++      || (set && CONSTANT_P (SET_SRC (set))))
++    check_rtx_costs = false;
++
+   /* Usually we substitute easy stuff, so we won't copy everything.
+      We however need to take care to not duplicate non-trivial CONST
+      expressions.  */
+   to = copy_rtx (to);
+ 
+   validate_replace_src_group (from, to, insn);
++
++  /* If TO is a constant, check the cost of the set after propagation
++     to the cost of the set before the propagation.  If the cost is
++     higher, then do not replace FROM with TO.  */
++
++  if (check_rtx_costs
++      && CONSTANT_P (to)
++      && (set_rtx_cost (set, speed) > old_cost))
++    {
++      cancel_changes (0);
++      return false;
++    }
++
++
+   if (num_changes_pending () && apply_change_group ())
+     success = 1;
+ 
+@@ -821,15 +853,15 @@ try_replace_reg (rtx from, rtx to, rtx_insn *insn)
+   return success;
+ }
+ 
+-/* Find a set of REGNOs that are available on entry to INSN's block.  Return
+-   NULL no such set is found.  */
++/* Find a set of REGNOs that are available on entry to INSN's block.  If found,
++   SET_RET[0] will be assigned a set with a register source and SET_RET[1] a
++   set with a constant source.  If not found the corresponding entry is set to
++   NULL.  */
+ 
+-static struct cprop_expr *
+-find_avail_set (int regno, rtx_insn *insn)
++static void
++find_avail_set (int regno, rtx_insn *insn, struct cprop_expr *set_ret[2])
+ {
+-  /* SET1 contains the last set found that can be returned to the caller for
+-     use in a substitution.  */
+-  struct cprop_expr *set1 = 0;
++  set_ret[0] = set_ret[1] = NULL;
+ 
+   /* Loops are not possible here.  To get a loop we would need two sets
+      available at the start of the block containing INSN.  i.e. we would
+@@ -869,8 +901,10 @@ find_avail_set (int regno, rtx_insn *insn)
+          If the source operand changed, we may still use it for the next
+          iteration of this loop, but we may not use it for substitutions.  */
+ 
+-      if (cprop_constant_p (src) || reg_not_set_p (src, insn))
+-	set1 = set;
++      if (cprop_constant_p (src))
++	set_ret[1] = set;
++      else if (reg_not_set_p (src, insn))
++	set_ret[0] = set;
+ 
+       /* If the source of the set is anything except a register, then
+ 	 we have reached the end of the copy chain.  */
+@@ -881,10 +915,6 @@ find_avail_set (int regno, rtx_insn *insn)
+ 	 and see if we have an available copy into SRC.  */
+       regno = REGNO (src);
+     }
+-
+-  /* SET1 holds the last set that was available and anticipatable at
+-     INSN.  */
+-  return set1;
+ }
+ 
+ /* Subroutine of cprop_insn that tries to propagate constants into
+@@ -1050,40 +1080,40 @@ cprop_insn (rtx_insn *insn)
+   int changed = 0, changed_this_round;
+   rtx note;
+ 
+-retry:
+-  changed_this_round = 0;
+-  reg_use_count = 0;
+-  note_uses (&PATTERN (insn), find_used_regs, NULL);
+-
+-  /* We may win even when propagating constants into notes.  */
+-  note = find_reg_equal_equiv_note (insn);
+-  if (note)
+-    find_used_regs (&XEXP (note, 0), NULL);
+-
+-  for (i = 0; i < reg_use_count; i++)
++  do
+     {
+-      rtx reg_used = reg_use_table[i];
+-      unsigned int regno = REGNO (reg_used);
+-      rtx src;
+-      struct cprop_expr *set;
++      changed_this_round = 0;
++      reg_use_count = 0;
++      note_uses (&PATTERN (insn), find_used_regs, NULL);
+ 
+-      /* If the register has already been set in this block, there's
+-	 nothing we can do.  */
+-      if (! reg_not_set_p (reg_used, insn))
+-	continue;
++      /* We may win even when propagating constants into notes.  */
++      note = find_reg_equal_equiv_note (insn);
++      if (note)
++	find_used_regs (&XEXP (note, 0), NULL);
+ 
+-      /* Find an assignment that sets reg_used and is available
+-	 at the start of the block.  */
+-      set = find_avail_set (regno, insn);
+-      if (! set)
+-	continue;
++      for (i = 0; i < reg_use_count; i++)
++	{
++	  rtx reg_used = reg_use_table[i];
++	  unsigned int regno = REGNO (reg_used);
++	  rtx src_cst = NULL, src_reg = NULL;
++	  struct cprop_expr *set[2];
+ 
+-      src = set->src;
++	  /* If the register has already been set in this block, there's
++	     nothing we can do.  */
++	  if (! reg_not_set_p (reg_used, insn))
++	    continue;
+ 
+-      /* Constant propagation.  */
+-      if (cprop_constant_p (src))
+-	{
+-          if (constprop_register (reg_used, src, insn))
++	  /* Find an assignment that sets reg_used and is available
++	     at the start of the block.  */
++	  find_avail_set (regno, insn, set);
++	  if (set[0])
++	    src_reg = set[0]->src;
++	  if (set[1])
++	    src_cst = set[1]->src;
++
++	  /* Constant propagation.  */
++	  if (src_cst && cprop_constant_p (src_cst)
++	      && constprop_register (reg_used, src_cst, insn))
+ 	    {
+ 	      changed_this_round = changed = 1;
+ 	      global_const_prop_count++;
+@@ -1093,18 +1123,16 @@ retry:
+ 			   "GLOBAL CONST-PROP: Replacing reg %d in ", regno);
+ 		  fprintf (dump_file, "insn %d with constant ",
+ 			   INSN_UID (insn));
+-		  print_rtl (dump_file, src);
++		  print_rtl (dump_file, src_cst);
+ 		  fprintf (dump_file, "\n");
+ 		}
+ 	      if (insn->deleted ())
+ 		return 1;
+ 	    }
+-	}
+-      else if (REG_P (src)
+-	       && REGNO (src) >= FIRST_PSEUDO_REGISTER
+-	       && REGNO (src) != regno)
+-	{
+-	  if (try_replace_reg (reg_used, src, insn))
++	  /* Copy propagation.  */
++	  else if (src_reg && cprop_reg_p (src_reg)
++		   && REGNO (src_reg) != regno
++		   && try_replace_reg (reg_used, src_reg, insn))
+ 	    {
+ 	      changed_this_round = changed = 1;
+ 	      global_copy_prop_count++;
+@@ -1113,7 +1141,7 @@ retry:
+ 		  fprintf (dump_file,
+ 			   "GLOBAL COPY-PROP: Replacing reg %d in insn %d",
+ 			   regno, INSN_UID (insn));
+-		  fprintf (dump_file, " with reg %d\n", REGNO (src));
++		  fprintf (dump_file, " with reg %d\n", REGNO (src_reg));
+ 		}
+ 
+ 	      /* The original insn setting reg_used may or may not now be
+@@ -1123,12 +1151,10 @@ retry:
+ 		 and made things worse.  */
+ 	    }
+ 	}
+-
+-      /* If try_replace_reg simplified the insn, the regs found
+-	 by find_used_regs may not be valid anymore.  Start over.  */
+-      if (changed_this_round)
+-	goto retry;
+     }
++  /* If try_replace_reg simplified the insn, the regs found by find_used_regs
++     may not be valid anymore.  Start over.  */
++  while (changed_this_round);
+ 
+   if (changed && DEBUG_INSN_P (insn))
+     return 0;
+@@ -1191,7 +1217,7 @@ do_local_cprop (rtx x, rtx_insn *insn)
+   /* Rule out USE instructions and ASM statements as we don't want to
+      change the hard registers mentioned.  */
+   if (REG_P (x)
+-      && (REGNO (x) >= FIRST_PSEUDO_REGISTER
++      && (cprop_reg_p (x)
+           || (GET_CODE (PATTERN (insn)) != USE
+ 	      && asm_noperands (PATTERN (insn)) < 0)))
+     {
+@@ -1207,7 +1233,7 @@ do_local_cprop (rtx x, rtx_insn *insn)
+ 
+ 	  if (cprop_constant_p (this_rtx))
+ 	    newcnst = this_rtx;
+-	  if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER
++	  if (cprop_reg_p (this_rtx)
+ 	      /* Don't copy propagate if it has attached REG_EQUIV note.
+ 		 At this point this only function parameters should have
+ 		 REG_EQUIV notes and if the argument slot is used somewhere
+@@ -1328,9 +1354,8 @@ implicit_set_cond_p (const_rtx cond)
+   if (GET_CODE (cond) != EQ && GET_CODE (cond) != NE)
+     return false;
+ 
+-  /* The first operand of COND must be a pseudo-reg.  */
+-  if (! REG_P (XEXP (cond, 0))
+-      || HARD_REGISTER_P (XEXP (cond, 0)))
++  /* The first operand of COND must be a register we can propagate.  */
++  if (!cprop_reg_p (XEXP (cond, 0)))
+     return false;
+ 
+   /* The second operand of COND must be a suitable constant.  */
+--- a/src/gcc/cse.c
++++ b/src/gcc/cse.c
+@@ -4540,14 +4540,50 @@ cse_insn (rtx_insn *insn)
+   canonicalize_insn (insn, &sets, n_sets);
+ 
+   /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
+-     if different, or if the DEST is a STRICT_LOW_PART.  The latter condition
+-     is necessary because SRC_EQV is handled specially for this case, and if
+-     it isn't set, then there will be no equivalence for the destination.  */
++     if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT.  The
++     latter condition is necessary because SRC_EQV is handled specially for
++     this case, and if it isn't set, then there will be no equivalence
++     for the destination.  */
+   if (n_sets == 1 && REG_NOTES (insn) != 0
+-      && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
+-      && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
+-	  || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
+-    src_eqv = copy_rtx (XEXP (tem, 0));
++      && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0)
++    {
++
++      if (GET_CODE (SET_DEST (sets[0].rtl)) != ZERO_EXTRACT
++	  && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
++	      || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
++	src_eqv = copy_rtx (XEXP (tem, 0));
++      /* If DEST is of the form ZERO_EXTACT, as in:
++	 (set (zero_extract:SI (reg:SI 119)
++		  (const_int 16 [0x10])
++		  (const_int 16 [0x10]))
++	      (const_int 51154 [0xc7d2]))
++	 REG_EQUAL note will specify the value of register (reg:SI 119) at this
++	 point.  Note that this is different from SRC_EQV. We can however
++	 calculate SRC_EQV with the position and width of ZERO_EXTRACT.  */
++      else if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
++	       && CONST_INT_P (XEXP (tem, 0))
++	       && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
++	       && CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
++	{
++	  rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
++	  rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
++	  rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
++	  HOST_WIDE_INT val = INTVAL (XEXP (tem, 0));
++	  HOST_WIDE_INT mask;
++	  unsigned int shift;
++	  if (BITS_BIG_ENDIAN)
++	    shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
++	      - INTVAL (pos) - INTVAL (width);
++	  else
++	    shift = INTVAL (pos);
++	  if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
++	    mask = ~(HOST_WIDE_INT) 0;
++	  else
++	    mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
++	  val = (val >> shift) & mask;
++	  src_eqv = GEN_INT (val);
++	}
++    }
+ 
+   /* Set sets[i].src_elt to the class each source belongs to.
+      Detect assignments from or to volatile things
+--- a/src/gcc/df-core.c
++++ b/src/gcc/df-core.c
+@@ -642,7 +642,6 @@ void
+ df_finish_pass (bool verify ATTRIBUTE_UNUSED)
+ {
+   int i;
+-  int removed = 0;
+ 
+ #ifdef ENABLE_DF_CHECKING
+   int saved_flags;
+@@ -658,21 +657,15 @@ df_finish_pass (bool verify ATTRIBUTE_UNUSED)
+   saved_flags = df->changeable_flags;
+ #endif
+ 
+-  for (i = 0; i < df->num_problems_defined; i++)
++  /* We iterate over problems by index as each problem removed will
++     lead to problems_in_order to be reordered.  */
++  for (i = 0; i < DF_LAST_PROBLEM_PLUS1; i++)
+     {
+-      struct dataflow *dflow = df->problems_in_order[i];
+-      struct df_problem *problem = dflow->problem;
++      struct dataflow *dflow = df->problems_by_index[i];
+ 
+-      if (dflow->optional_p)
+-	{
+-	  gcc_assert (problem->remove_problem_fun);
+-	  (problem->remove_problem_fun) ();
+-	  df->problems_in_order[i] = NULL;
+-	  df->problems_by_index[problem->id] = NULL;
+-	  removed++;
+-	}
++      if (dflow && dflow->optional_p)
++	df_remove_problem (dflow);
+     }
+-  df->num_problems_defined -= removed;
+ 
+   /* Clear all of the flags.  */
+   df->changeable_flags = 0;
+--- a/src/gcc/emit-rtl.c
++++ b/src/gcc/emit-rtl.c
+@@ -5234,7 +5234,8 @@ set_for_reg_notes (rtx insn)
+   reg = SET_DEST (pat);
+ 
+   /* Notes apply to the contents of a STRICT_LOW_PART.  */
+-  if (GET_CODE (reg) == STRICT_LOW_PART)
++  if (GET_CODE (reg) == STRICT_LOW_PART
++      || GET_CODE (reg) == ZERO_EXTRACT)
+     reg = XEXP (reg, 0);
+ 
+   /* Check that we have a register.  */
+--- a/src/gcc/expmed.c
++++ b/src/gcc/expmed.c
+@@ -691,8 +691,8 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
+       && !MEM_P (op0)
+       && optab_handler (vec_set_optab, GET_MODE (op0)) != CODE_FOR_nothing
+       && fieldmode == GET_MODE_INNER (GET_MODE (op0))
+-      && bitsize == GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
+-      && !(bitnum % GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
++      && bitsize == GET_MODE_UNIT_BITSIZE (GET_MODE (op0))
++      && !(bitnum % GET_MODE_UNIT_BITSIZE (GET_MODE (op0))))
+     {
+       struct expand_operand ops[3];
+       machine_mode outermode = GET_MODE (op0);
+@@ -1502,8 +1502,8 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
+   if (VECTOR_MODE_P (GET_MODE (op0))
+       && !MEM_P (op0)
+       && optab_handler (vec_extract_optab, GET_MODE (op0)) != CODE_FOR_nothing
+-      && ((bitnum + bitsize - 1) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
+-	  == bitnum / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
++      && ((bitnum + bitsize - 1) / GET_MODE_UNIT_BITSIZE (GET_MODE (op0))
++	  == bitnum / GET_MODE_UNIT_BITSIZE (GET_MODE (op0))))
+     {
+       struct expand_operand ops[3];
+       machine_mode outermode = GET_MODE (op0);
+@@ -2433,8 +2433,6 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
+ 
+   /* Be prepared for vector modes.  */
+   imode = GET_MODE_INNER (mode);
+-  if (imode == VOIDmode)
+-    imode = mode;
+ 
+   maxm = MIN (BITS_PER_WORD, GET_MODE_BITSIZE (imode));
+ 
+@@ -2664,14 +2662,28 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
+       m = exact_log2 (-orig_t + 1);
+       if (m >= 0 && m < maxm)
+ 	{
+-	  op_cost = shiftsub1_cost (speed, mode, m);
++	  op_cost = add_cost (speed, mode) + shift_cost (speed, mode, m);
++	  /* If the target has a cheap shift-and-subtract insn use
++	     that in preference to a shift insn followed by a sub insn.
++	     Assume that the shift-and-sub is "atomic" with a latency
++	     equal to it's cost, otherwise assume that on superscalar
++	     hardware the shift may be executed concurrently with the
++	     earlier steps in the algorithm.  */
++	  if (shiftsub1_cost (speed, mode, m) <= op_cost)
++	    {
++	      op_cost = shiftsub1_cost (speed, mode, m);
++	      op_latency = op_cost;
++	    }
++	  else
++	    op_latency = add_cost (speed, mode);
++
+ 	  new_limit.cost = best_cost.cost - op_cost;
+-	  new_limit.latency = best_cost.latency - op_cost;
++	  new_limit.latency = best_cost.latency - op_latency;
+ 	  synth_mult (alg_in, (unsigned HOST_WIDE_INT) (-orig_t + 1) >> m,
+ 		      &new_limit, mode);
+ 
+ 	  alg_in->cost.cost += op_cost;
+-	  alg_in->cost.latency += op_cost;
++	  alg_in->cost.latency += op_latency;
+ 	  if (CHEAPER_MULT_COST (&alg_in->cost, &best_cost))
+ 	    {
+ 	      best_cost = alg_in->cost;
+@@ -2704,20 +2716,12 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
+       if (t % d == 0 && t > d && m < maxm
+ 	  && (!cache_hit || cache_alg == alg_add_factor))
+ 	{
+-	  /* If the target has a cheap shift-and-add instruction use
+-	     that in preference to a shift insn followed by an add insn.
+-	     Assume that the shift-and-add is "atomic" with a latency
+-	     equal to its cost, otherwise assume that on superscalar
+-	     hardware the shift may be executed concurrently with the
+-	     earlier steps in the algorithm.  */
+ 	  op_cost = add_cost (speed, mode) + shift_cost (speed, mode, m);
+-	  if (shiftadd_cost (speed, mode, m) < op_cost)
+-	    {
+-	      op_cost = shiftadd_cost (speed, mode, m);
+-	      op_latency = op_cost;
+-	    }
+-	  else
+-	    op_latency = add_cost (speed, mode);
++	  if (shiftadd_cost (speed, mode, m) <= op_cost)
++	    op_cost = shiftadd_cost (speed, mode, m);
++
++	  op_latency = op_cost;
++
+ 
+ 	  new_limit.cost = best_cost.cost - op_cost;
+ 	  new_limit.latency = best_cost.latency - op_latency;
+@@ -2742,20 +2746,11 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
+       if (t % d == 0 && t > d && m < maxm
+ 	  && (!cache_hit || cache_alg == alg_sub_factor))
+ 	{
+-	  /* If the target has a cheap shift-and-subtract insn use
+-	     that in preference to a shift insn followed by a sub insn.
+-	     Assume that the shift-and-sub is "atomic" with a latency
+-	     equal to it's cost, otherwise assume that on superscalar
+-	     hardware the shift may be executed concurrently with the
+-	     earlier steps in the algorithm.  */
+ 	  op_cost = add_cost (speed, mode) + shift_cost (speed, mode, m);
+-	  if (shiftsub0_cost (speed, mode, m) < op_cost)
+-	    {
+-	      op_cost = shiftsub0_cost (speed, mode, m);
+-	      op_latency = op_cost;
+-	    }
+-	  else
+-	    op_latency = add_cost (speed, mode);
++	  if (shiftsub0_cost (speed, mode, m) <= op_cost)
++	    op_cost = shiftsub0_cost (speed, mode, m);
++
++	  op_latency = op_cost;
+ 
+ 	  new_limit.cost = best_cost.cost - op_cost;
+ 	  new_limit.latency = best_cost.latency - op_latency;
+@@ -3097,8 +3092,6 @@ expand_mult_const (machine_mode mode, rtx op0, HOST_WIDE_INT val,
+   /* Compare only the bits of val and val_so_far that are significant
+      in the result mode, to avoid sign-/zero-extension confusion.  */
+   nmode = GET_MODE_INNER (mode);
+-  if (nmode == VOIDmode)
+-    nmode = mode;
+   val &= GET_MODE_MASK (nmode);
+   val_so_far &= GET_MODE_MASK (nmode);
+   gcc_assert (val == val_so_far);
+--- a/src/gcc/expr.c
++++ b/src/gcc/expr.c
+@@ -7725,15 +7725,7 @@ expand_expr_addr_expr_1 (tree exp, rtx target, machine_mode tmode,
+ 	     marked TREE_ADDRESSABLE, which will be either a front-end
+ 	     or a tree optimizer bug.  */
+ 
+-	  if (TREE_ADDRESSABLE (exp)
+-	      && ! MEM_P (result)
+-	      && ! targetm.calls.allocate_stack_slots_for_args ())
+-	    {
+-	      error ("local frame unavailable (naked function?)");
+-	      return result;
+-	    }
+-	  else
+-	    gcc_assert (MEM_P (result));
++	  gcc_assert (MEM_P (result));
+ 	  result = XEXP (result, 0);
+ 
+ 	  /* ??? Is this needed anymore?  */
+@@ -8985,23 +8977,134 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
+ 
+     case LSHIFT_EXPR:
+     case RSHIFT_EXPR:
+-      /* If this is a fixed-point operation, then we cannot use the code
+-	 below because "expand_shift" doesn't support sat/no-sat fixed-point
+-         shifts.   */
+-      if (ALL_FIXED_POINT_MODE_P (mode))
+-	goto binop;
++      {
++	/* If this is a fixed-point operation, then we cannot use the code
++	   below because "expand_shift" doesn't support sat/no-sat fixed-point
++	   shifts.  */
++	if (ALL_FIXED_POINT_MODE_P (mode))
++	  goto binop;
++
++	if (! safe_from_p (subtarget, treeop1, 1))
++	  subtarget = 0;
++	if (modifier == EXPAND_STACK_PARM)
++	  target = 0;
++	op0 = expand_expr (treeop0, subtarget,
++			   VOIDmode, EXPAND_NORMAL);
++
++	/* Left shift optimization when shifting across word_size boundary.
++
++	   If mode == GET_MODE_WIDER_MODE (word_mode), then normally there isn't
++	   native instruction to support this wide mode left shift.  Given below
++	   scenario:
++
++	    Type A = (Type) B  << C
++
++	    |<		 T	    >|
++	    | dest_high  |  dest_low |
++
++			 | word_size |
++
++	   If the shift amount C caused we shift B to across the word size
++	   boundary, i.e part of B shifted into high half of destination
++	   register, and part of B remains in the low half, then GCC will use
++	   the following left shift expand logic:
++
++	   1. Initialize dest_low to B.
++	   2. Initialize every bit of dest_high to the sign bit of B.
++	   3. Logic left shift dest_low by C bit to finalize dest_low.
++	      The value of dest_low before this shift is kept in a temp D.
++	   4. Logic left shift dest_high by C.
++	   5. Logic right shift D by (word_size - C).
++	   6. Or the result of 4 and 5 to finalize dest_high.
++
++	   While, by checking gimple statements, if operand B is coming from
++	   signed extension, then we can simplify above expand logic into:
++
++	      1. dest_high = src_low >> (word_size - C).
++	      2. dest_low = src_low << C.
++
++	   We can use one arithmetic right shift to finish all the purpose of
++	   steps 2, 4, 5, 6, thus we reduce the steps needed from 6 into 2.  */
++
++	temp = NULL_RTX;
++	if (code == LSHIFT_EXPR
++	    && target
++	    && REG_P (target)
++	    && ! unsignedp
++	    && mode == GET_MODE_WIDER_MODE (word_mode)
++	    && GET_MODE_SIZE (mode) == 2 * GET_MODE_SIZE (word_mode)
++	    && TREE_CONSTANT (treeop1)
++	    && TREE_CODE (treeop0) == SSA_NAME)
++	  {
++	    gimple def = SSA_NAME_DEF_STMT (treeop0);
++	    if (is_gimple_assign (def)
++		&& gimple_assign_rhs_code (def) == NOP_EXPR)
++	      {
++		machine_mode rmode = TYPE_MODE
++		  (TREE_TYPE (gimple_assign_rhs1 (def)));
+ 
+-      if (! safe_from_p (subtarget, treeop1, 1))
+-	subtarget = 0;
+-      if (modifier == EXPAND_STACK_PARM)
+-	target = 0;
+-      op0 = expand_expr (treeop0, subtarget,
+-			 VOIDmode, EXPAND_NORMAL);
+-      temp = expand_variable_shift (code, mode, op0, treeop1, target,
+-				    unsignedp);
+-      if (code == LSHIFT_EXPR)
+-	temp = REDUCE_BIT_FIELD (temp);
+-      return temp;
++		if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (mode)
++		    && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
++		    && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
++			>= GET_MODE_BITSIZE (word_mode)))
++		  {
++		    rtx_insn *seq, *seq_old;
++		    unsigned int high_off = subreg_highpart_offset (word_mode,
++								    mode);
++		    rtx low = lowpart_subreg (word_mode, op0, mode);
++		    rtx dest_low = lowpart_subreg (word_mode, target, mode);
++		    rtx dest_high = simplify_gen_subreg (word_mode, target,
++							 mode, high_off);
++		    HOST_WIDE_INT ramount = (BITS_PER_WORD
++					     - TREE_INT_CST_LOW (treeop1));
++		    tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
++
++		    start_sequence ();
++		    /* dest_high = src_low >> (word_size - C).  */
++		    temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
++						  rshift, dest_high, unsignedp);
++		    if (temp != dest_high)
++		      emit_move_insn (dest_high, temp);
++
++		    /* dest_low = src_low << C.  */
++		    temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
++						  treeop1, dest_low, unsignedp);
++		    if (temp != dest_low)
++		      emit_move_insn (dest_low, temp);
++
++		    seq = get_insns ();
++		    end_sequence ();
++		    temp = target ;
++
++		    if (have_insn_for (ASHIFT, mode))
++		      {
++			bool speed_p = optimize_insn_for_speed_p ();
++			start_sequence ();
++			rtx ret_old = expand_variable_shift (code, mode, op0,
++							     treeop1, target,
++							     unsignedp);
++
++			seq_old = get_insns ();
++			end_sequence ();
++			if (seq_cost (seq, speed_p)
++			    >= seq_cost (seq_old, speed_p))
++			  {
++			    seq = seq_old;
++			    temp = ret_old;
++			  }
++		      }
++		      emit_insn (seq);
++		  }
++	      }
++	  }
++
++	if (temp == NULL_RTX)
++	  temp = expand_variable_shift (code, mode, op0, treeop1, target,
++					unsignedp);
++	if (code == LSHIFT_EXPR)
++	  temp = REDUCE_BIT_FIELD (temp);
++	return temp;
++      }
+ 
+       /* Could determine the answer when only additive constants differ.  Also,
+ 	 the addition of one can be handled by changing the condition.  */
+@@ -9156,7 +9259,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
+            little-endian, or element N-1 if big-endian.  So pull the scalar
+            result out of that element.  */
+         int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
+-        int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
++	int bitsize = GET_MODE_UNIT_BITSIZE (vec_mode);
+         temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
+ 				  target, mode, mode);
+         gcc_assert (temp);
+--- a/src/gcc/fold-const.c
++++ b/src/gcc/fold-const.c
+@@ -7635,7 +7635,6 @@ native_interpret_real (tree type, const unsigned char *ptr, int len)
+ {
+   machine_mode mode = TYPE_MODE (type);
+   int total_bytes = GET_MODE_SIZE (mode);
+-  int byte, offset, word, words, bitpos;
+   unsigned char value;
+   /* There are always 32 bits in each long, no matter the size of
+      the hosts long.  We handle floating point representations with
+@@ -7646,16 +7645,18 @@ native_interpret_real (tree type, const unsigned char *ptr, int len)
+   total_bytes = GET_MODE_SIZE (TYPE_MODE (type));
+   if (total_bytes > len || total_bytes > 24)
+     return NULL_TREE;
+-  words = (32 / BITS_PER_UNIT) / UNITS_PER_WORD;
++  int words = (32 / BITS_PER_UNIT) / UNITS_PER_WORD;
+ 
+   memset (tmp, 0, sizeof (tmp));
+-  for (bitpos = 0; bitpos < total_bytes * BITS_PER_UNIT;
++  for (int bitpos = 0; bitpos < total_bytes * BITS_PER_UNIT;
+        bitpos += BITS_PER_UNIT)
+     {
+-      byte = (bitpos / BITS_PER_UNIT) & 3;
++      /* Both OFFSET and BYTE index within a long;
++	 bitpos indexes the whole float.  */
++      int offset, byte = (bitpos / BITS_PER_UNIT) & 3;
+       if (UNITS_PER_WORD < 4)
+ 	{
+-	  word = byte / UNITS_PER_WORD;
++	  int word = byte / UNITS_PER_WORD;
+ 	  if (WORDS_BIG_ENDIAN)
+ 	    word = (words - 1) - word;
+ 	  offset = word * UNITS_PER_WORD;
+@@ -7665,7 +7666,16 @@ native_interpret_real (tree type, const unsigned char *ptr, int len)
+ 	    offset += byte % UNITS_PER_WORD;
+ 	}
+       else
+-	offset = BYTES_BIG_ENDIAN ? 3 - byte : byte;
++	{
++	  offset = byte;
++	  if (BYTES_BIG_ENDIAN)
++	    {
++	      /* Reverse bytes within each long, or within the entire float
++		 if it's smaller than a long (for HFmode).  */
++	      offset = MIN (3, total_bytes - 1) - offset;
++	      gcc_assert (offset >= 0);
++	    }
++	}
+       value = ptr[offset + ((bitpos / BITS_PER_UNIT) & ~3)];
+ 
+       tmp[bitpos / 32] |= (unsigned long)value << (bitpos & 31);
+@@ -10303,7 +10313,7 @@ fold_binary_loc (location_t loc,
+ 	    /* Only create rotates in complete modes.  Other cases are not
+ 	       expanded properly.  */
+ 	    && (element_precision (rtype)
+-		== element_precision (TYPE_MODE (rtype))))
++		== GET_MODE_UNIT_PRECISION (TYPE_MODE (rtype))))
+ 	  {
+ 	    tree tree01, tree11;
+ 	    enum tree_code code01, code11;
+--- a/src/gcc/fortran/Make-lang.in
++++ b/src/gcc/fortran/Make-lang.in
+@@ -167,7 +167,7 @@ check-f95-subtargets : check-gfortran-subtargets
+ check-fortran-subtargets : check-gfortran-subtargets
+ lang_checks += check-gfortran
+ lang_checks_parallelized += check-gfortran
+-# For description see comment above check_gcc_parallelize in gcc/Makefile.in.
++# For description see the check_$lang_parallelize comment in gcc/Makefile.in.
+ check_gfortran_parallelize = 10000
+ 
+ # GFORTRAN documentation.
+@@ -275,7 +275,7 @@ fortran.uninstall:
+ # We just have to delete files specific to us.
+ 
+ fortran.mostlyclean:
+-	-rm -f f951$(exeext)
++	-rm -f gfortran$(exeext) gfortran-cross$(exeext) f951$(exeext)
+ 	-rm -f fortran/*.o
+ 
+ fortran.clean:
+--- a/src/gcc/function.c
++++ b/src/gcc/function.c
+@@ -227,6 +227,7 @@ free_after_compilation (struct function *f)
+   f->eh = NULL;
+   f->machine = NULL;
+   f->cfg = NULL;
++  f->curr_properties &= ~PROP_cfg;
+ 
+   regno_reg_rtx = NULL;
+ }
+@@ -2121,9 +2122,6 @@ aggregate_value_p (const_tree exp, const_tree fntype)
+ bool
+ use_register_for_decl (const_tree decl)
+ {
+-  if (!targetm.calls.allocate_stack_slots_for_args ())
+-    return true;
+-
+   /* Honor volatile.  */
+   if (TREE_SIDE_EFFECTS (decl))
+     return false;
+@@ -2151,6 +2149,9 @@ use_register_for_decl (const_tree decl)
+   if (flag_float_store && FLOAT_TYPE_P (TREE_TYPE (decl)))
+     return false;
+ 
++  if (!targetm.calls.allocate_stack_slots_for_args ())
++    return true;
++
+   /* If we're not interested in tracking debugging information for
+      this decl, then we can certainly put it in a register.  */
+   if (DECL_IGNORED_P (decl))
+--- a/src/gcc/genmatch.c
++++ b/src/gcc/genmatch.c
+@@ -2922,7 +2922,12 @@ parser::parse_operation ()
+ 
+   user_id *p = dyn_cast<user_id *> (op);
+   if (p && p->is_oper_list)
+-    record_operlist (id_tok->src_loc, p);
++    {
++      if (active_fors.length() == 0)
++	record_operlist (id_tok->src_loc, p);
++      else
++	fatal_at (id_tok, "operator-list %s cannot be exapnded inside 'for'", id);
++    }
+   return op;
+ }
+ 
+@@ -3338,8 +3343,13 @@ parser::parse_for (source_location)
+ 		      "others with arity %d", oper, idb->nargs, arity);
+ 
+ 	  user_id *p = dyn_cast<user_id *> (idb);
+-	  if (p && p->is_oper_list)
+-	    op->substitutes.safe_splice (p->substitutes);
++	  if (p)
++	    {
++	      if (p->is_oper_list)
++		op->substitutes.safe_splice (p->substitutes);
++	      else
++		fatal_at (token, "iterator cannot be used as operator-list");
++	    }
+ 	  else 
+ 	    op->substitutes.safe_push (idb);
+ 	}
+@@ -3436,6 +3446,11 @@ parser::parse_operator_list (source_location)
+ 	op->substitutes.safe_push (idb);
+     }
+ 
++  // Check that there is no junk after id-list
++  token = peek();
++  if (token->type != CPP_CLOSE_PAREN)
++    fatal_at (token, "expected identifier got %s", cpp_type2name (token->type, 0));
++
+   if (op->substitutes.length () == 0)
+     fatal_at (token, "operator-list cannot be empty");
+ 
+--- a/src/gcc/genmodes.c
++++ b/src/gcc/genmodes.c
+@@ -1040,7 +1040,7 @@ mode_inner_inline (machine_mode mode)\n\
+   for_all_modes (c, m)
+     printf ("    case %smode: return %smode;\n", m->name,
+ 	    c != MODE_PARTIAL_INT && m->component
+-	    ? m->component->name : void_mode->name);
++	    ? m->component->name : m->name);
+ 
+   puts ("\
+     default: return mode_inner[mode];\n\
+@@ -1048,6 +1048,80 @@ mode_inner_inline (machine_mode mode)\n\
+ }\n");
+ }
+ 
++/* Emit mode_unit_size_inline routine into insn-modes.h header.  */
++static void
++emit_mode_unit_size_inline (void)
++{
++  int c;
++  struct mode_data *m;
++
++  puts ("\
++#ifdef __cplusplus\n\
++inline __attribute__((__always_inline__))\n\
++#else\n\
++extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
++#endif\n\
++unsigned char\n\
++mode_unit_size_inline (machine_mode mode)\n\
++{\n\
++  extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];\
++\n\
++  switch (mode)\n\
++    {");
++
++  for_all_modes (c, m)
++    {
++      const char *name = m->name;
++      struct mode_data *m2 = m;
++      if (c != MODE_PARTIAL_INT && m2->component)
++	m2 = m2->component;
++      if (!m2->need_bytesize_adj)
++	printf ("    case %smode: return %u;\n", name, m2->bytesize);
++    }
++
++  puts ("\
++    default: return mode_unit_size[mode];\n\
++    }\n\
++}\n");
++}
++
++/* Emit mode_unit_precision_inline routine into insn-modes.h header.  */
++static void
++emit_mode_unit_precision_inline (void)
++{
++  int c;
++  struct mode_data *m;
++
++  puts ("\
++#ifdef __cplusplus\n\
++inline __attribute__((__always_inline__))\n\
++#else\n\
++extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
++#endif\n\
++unsigned short\n\
++mode_unit_precision_inline (machine_mode mode)\n\
++{\n\
++  extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];\n\
++  switch (mode)\n\
++    {");
++
++  for_all_modes (c, m)
++    {
++      struct mode_data *m2
++	= (c != MODE_PARTIAL_INT && m->component) ? m->component : m;
++      if (m2->precision != (unsigned int)-1)
++	printf ("    case %smode: return %u;\n", m->name, m2->precision);
++      else
++	printf ("    case %smode: return %u*BITS_PER_UNIT;\n",
++		m->name, m2->bytesize);
++    }
++
++  puts ("\
++    default: return mode_unit_precision[mode];\n\
++    }\n\
++}\n");
++}
++
+ static void
+ emit_insn_modes_h (void)
+ {
+@@ -1108,6 +1182,7 @@ enum machine_mode\n{");
+ 
+   /* I can't think of a better idea, can you?  */
+   printf ("#define CONST_MODE_SIZE%s\n", adj_bytesize ? "" : " const");
++  printf ("#define CONST_MODE_UNIT_SIZE%s\n", adj_bytesize ? "" : " const");
+   printf ("#define CONST_MODE_BASE_ALIGN%s\n", adj_alignment ? "" : " const");
+ #if 0 /* disabled for backward compatibility, temporary */
+   printf ("#define CONST_REAL_FORMAT_FOR_MODE%s\n", adj_format ? "" :" const");
+@@ -1126,6 +1201,8 @@ enum machine_mode\n{");
+   emit_mode_size_inline ();
+   emit_mode_nunits_inline ();
+   emit_mode_inner_inline ();
++  emit_mode_unit_size_inline ();
++  emit_mode_unit_precision_inline ();
+   puts ("#endif /* GCC_VERSION >= 4001 */");
+ 
+   puts ("\
+@@ -1339,12 +1416,53 @@ emit_mode_inner (void)
+   for_all_modes (c, m)
+     tagged_printf ("%smode",
+ 		   c != MODE_PARTIAL_INT && m->component
+-		   ? m->component->name : void_mode->name,
++		   ? m->component->name : m->name,
+ 		   m->name);
+ 
+   print_closer ();
+ }
+ 
++/* Emit mode_unit_size array into insn-modes.c file.  */
++static void
++emit_mode_unit_size (void)
++{
++  int c;
++  struct mode_data *m;
++
++  print_maybe_const_decl ("%sunsigned char", "mode_unit_size",
++			  "NUM_MACHINE_MODES", bytesize);
++
++  for_all_modes (c, m)
++    tagged_printf ("%u",
++		   c != MODE_PARTIAL_INT && m->component
++		   ? m->component->bytesize : m->bytesize, m->name);
++
++  print_closer ();
++}
++
++/* Emit mode_unit_precision array into insn-modes.c file.  */
++static void
++emit_mode_unit_precision (void)
++{
++  int c;
++  struct mode_data *m;
++
++  print_decl ("unsigned short", "mode_unit_precision", "NUM_MACHINE_MODES");
++
++  for_all_modes (c, m)
++    {
++      struct mode_data *m2 = (c != MODE_PARTIAL_INT && m->component) ?
++			     m->component : m;
++      if (m2->precision != (unsigned int)-1)
++	tagged_printf ("%u", m2->precision, m->name);
++      else
++	tagged_printf ("%u*BITS_PER_UNIT", m2->bytesize, m->name);
++    }
++
++  print_closer ();
++}
++
++
+ static void
+ emit_mode_base_align (void)
+ {
+@@ -1440,6 +1558,7 @@ emit_mode_adjustments (void)
+       printf ("\n  /* %s:%d */\n  s = %s;\n",
+ 	      a->file, a->line, a->adjustment);
+       printf ("  mode_size[%smode] = s;\n", a->mode->name);
++      printf ("  mode_unit_size[%smode] = s;\n", a->mode->name);
+       printf ("  mode_base_align[%smode] = s & (~s + 1);\n",
+ 	      a->mode->name);
+ 
+@@ -1450,6 +1569,7 @@ emit_mode_adjustments (void)
+ 	    case MODE_COMPLEX_INT:
+ 	    case MODE_COMPLEX_FLOAT:
+ 	      printf ("  mode_size[%smode] = 2*s;\n", m->name);
++	      printf ("  mode_unit_size[%smode] = s;\n", m->name);
+ 	      printf ("  mode_base_align[%smode] = s & (~s + 1);\n",
+ 		      m->name);
+ 	      break;
+@@ -1462,6 +1582,7 @@ emit_mode_adjustments (void)
+ 	    case MODE_VECTOR_UACCUM:
+ 	      printf ("  mode_size[%smode] = %d*s;\n",
+ 		      m->name, m->ncomponents);
++	      printf ("  mode_unit_size[%smode] = s;\n", m->name);
+ 	      printf ("  mode_base_align[%smode] = (%d*s) & (~(%d*s)+1);\n",
+ 		      m->name, m->ncomponents, m->ncomponents);
+ 	      break;
+@@ -1631,6 +1752,8 @@ emit_insn_modes_c (void)
+   emit_mode_wider ();
+   emit_mode_mask ();
+   emit_mode_inner ();
++  emit_mode_unit_size ();
++  emit_mode_unit_precision ();
+   emit_mode_base_align ();
+   emit_class_narrowest_mode ();
+   emit_real_format_for_mode ();
+--- a/src/gcc/gimplify.c
++++ b/src/gcc/gimplify.c
+@@ -5079,6 +5079,32 @@ gimplify_asm_expr (tree *expr_p, gimple_seq *pre_p, gimple_seq *post_p)
+ 	  ret = tret;
+ 	}
+ 
++      /* If the constraint does not allow memory make sure we gimplify
++         it to a register if it is not already but its base is.  This
++	 happens for complex and vector components.  */
++      if (!allows_mem)
++	{
++	  tree op = TREE_VALUE (link);
++	  if (! is_gimple_val (op)
++	      && is_gimple_reg_type (TREE_TYPE (op))
++	      && is_gimple_reg (get_base_address (op)))
++	    {
++	      tree tem = create_tmp_reg (TREE_TYPE (op));
++	      tree ass;
++	      if (is_inout)
++		{
++		  ass = build2 (MODIFY_EXPR, TREE_TYPE (tem),
++				tem, unshare_expr (op));
++		  gimplify_and_add (ass, pre_p);
++		}
++	      ass = build2 (MODIFY_EXPR, TREE_TYPE (tem), op, tem);
++	      gimplify_and_add (ass, post_p);
++
++	      TREE_VALUE (link) = tem;
++	      tret = GS_OK;
++	    }
++	}
++
+       vec_safe_push (outputs, link);
+       TREE_CHAIN (link) = NULL_TREE;
+ 
+--- a/src/gcc/go/Make-lang.in
++++ b/src/gcc/go/Make-lang.in
+@@ -197,6 +197,7 @@ go.uninstall:
+ go.mostlyclean:
+ 	-rm -f go/*$(objext)
+ 	-rm -f go/*$(coverageexts)
++	-rm -f gccgo$(exeext) gccgo-cross$(exeext) go1$(exeext)
+ go.clean:
+ go.distclean:
+ go.maintainer-clean:
+--- a/src/gcc/haifa-sched.c
++++ b/src/gcc/haifa-sched.c
+@@ -5553,6 +5553,35 @@ insn_finishes_cycle_p (rtx_insn *insn)
+   return false;
+ }
+ 
++/* Helper for autopref_multipass_init.  Given a SET in PAT and whether
++   we're expecting a memory WRITE or not, check that the insn is relevant to
++   the autoprefetcher modelling code.  Return true iff that is the case.
++   If it is relevant, record the base register of the memory op in BASE and
++   the offset in OFFSET.  */
++
++static bool
++analyze_set_insn_for_autopref (rtx pat, bool write, rtx *base, int *offset)
++{
++  if (GET_CODE (pat) != SET)
++    return false;
++
++  rtx mem = write ? SET_DEST (pat) : SET_SRC (pat);
++  if (!MEM_P (mem))
++    return false;
++
++  struct address_info info;
++  decompose_mem_address (&info, mem);
++
++  /* TODO: Currently only (base+const) addressing is supported.  */
++  if (info.base == NULL || !REG_P (*info.base)
++      || (info.disp != NULL && !CONST_INT_P (*info.disp)))
++    return false;
++
++  *base = *info.base;
++  *offset = info.disp ? INTVAL (*info.disp) : 0;
++  return true;
++}
++
+ /* Functions to model cache auto-prefetcher.
+ 
+    Some of the CPUs have cache auto-prefetcher, which /seems/ to initiate
+@@ -5577,30 +5606,139 @@ autopref_multipass_init (const rtx_insn *insn, int write)
+ 
+   gcc_assert (data->status == AUTOPREF_MULTIPASS_DATA_UNINITIALIZED);
+   data->base = NULL_RTX;
+-  data->offset = 0;
++  data->min_offset = 0;
++  data->max_offset = 0;
++  data->multi_mem_insn_p = false;
+   /* Set insn entry initialized, but not relevant for auto-prefetcher.  */
+   data->status = AUTOPREF_MULTIPASS_DATA_IRRELEVANT;
+ 
++  rtx pat = PATTERN (insn);
++
++  /* We have a multi-set insn like a load-multiple or store-multiple.
++     We care about these as long as all the memory ops inside the PARALLEL
++     have the same base register.  We care about the minimum and maximum
++     offsets from that base but don't check for the order of those offsets
++     within the PARALLEL insn itself.  */
++  if (GET_CODE (pat) == PARALLEL)
++    {
++      int n_elems = XVECLEN (pat, 0);
++
++      int i = 0;
++      rtx prev_base = NULL_RTX;
++      int min_offset;
++      int max_offset;
++
++      for (i = 0; i < n_elems; i++)
++	{
++	  rtx set = XVECEXP (pat, 0, i);
++	  if (GET_CODE (set) != SET)
++	    return;
++
++	  rtx base = NULL_RTX;
++	  int offset = 0;
++	  if (!analyze_set_insn_for_autopref (set, write, &base, &offset))
++	    return;
++
++	  if (i == 0)
++	    {
++	      prev_base = base;
++	      min_offset = offset;
++	      max_offset = offset;
++	    }
++	  /* Ensure that all memory operations in the PARALLEL use the same
++	     base register.  */
++	  else if (REGNO (base) != REGNO (prev_base))
++	    return;
++	  else
++	    {
++	      min_offset = MIN (min_offset, offset);
++	      max_offset = MAX (max_offset, offset);
++	    }
++	}
++
++      /* If we reached here then we have a valid PARALLEL of multiple memory
++	 ops with prev_base as the base and min_offset and max_offset
++	 containing the offsets range.  */
++      gcc_assert (prev_base);
++      data->base = prev_base;
++      data->min_offset = min_offset;
++      data->max_offset = max_offset;
++      data->multi_mem_insn_p = true;
++      data->status = AUTOPREF_MULTIPASS_DATA_NORMAL;
++
++      return;
++    }
++
++  /* Otherwise this is a single set memory operation.  */
+   rtx set = single_set (insn);
+   if (set == NULL_RTX)
+     return;
+ 
+-  rtx mem = write ? SET_DEST (set) : SET_SRC (set);
+-  if (!MEM_P (mem))
++  if (!analyze_set_insn_for_autopref (set, write, &data->base,
++				       &data->min_offset))
+     return;
+ 
+-  struct address_info info;
+-  decompose_mem_address (&info, mem);
++  /* This insn is relevant for the auto-prefetcher.
++     The base and offset fields will have been filled in the
++     analyze_set_insn_for_autopref call above.  */
++  data->status = AUTOPREF_MULTIPASS_DATA_NORMAL;
++}
+ 
+-  /* TODO: Currently only (base+const) addressing is supported.  */
+-  if (info.base == NULL || !REG_P (*info.base)
+-      || (info.disp != NULL && !CONST_INT_P (*info.disp)))
+-    return;
+ 
+-  /* This insn is relevant for auto-prefetcher.  */
+-  data->base = *info.base;
+-  data->offset = info.disp ? INTVAL (*info.disp) : 0;
+-  data->status = AUTOPREF_MULTIPASS_DATA_NORMAL;
++/* Helper for autopref_rank_for_schedule.  Given the data of two
++   insns relevant to the auto-prefetcher modelling code DATA1 and DATA2
++   return their comparison result.  Return 0 if there is no sensible
++   ranking order for the two insns.  */
++
++static int
++autopref_rank_data (autopref_multipass_data_t data1,
++		     autopref_multipass_data_t data2)
++{
++  /* Simple case when both insns are simple single memory ops.  */
++  if (!data1->multi_mem_insn_p && !data2->multi_mem_insn_p)
++    return data1->min_offset - data2->min_offset;
++
++  /* Two load/store multiple insns.  Return 0 if the offset ranges
++     overlap and the difference between the minimum offsets otherwise.  */
++  else if (data1->multi_mem_insn_p && data2->multi_mem_insn_p)
++    {
++      int min1 = data1->min_offset;
++      int max1 = data1->max_offset;
++      int min2 = data2->min_offset;
++      int max2 = data2->max_offset;
++
++      if (max1 < min2 || min1 > max2)
++	return min1 - min2;
++      else
++	return 0;
++    }
++
++  /* The other two cases is a pair of a load/store multiple and
++     a simple memory op.  Return 0 if the single op's offset is within the
++     range of the multi-op insn and the difference between the single offset
++     and the minimum offset of the multi-set insn otherwise.  */
++  else if (data1->multi_mem_insn_p && !data2->multi_mem_insn_p)
++    {
++      int max1 = data1->max_offset;
++      int min1 = data1->min_offset;
++
++      if (data2->min_offset >= min1
++	  && data2->min_offset <= max1)
++	return 0;
++      else
++	return min1 - data2->min_offset;
++    }
++  else
++    {
++      int max2 = data2->max_offset;
++      int min2 = data2->min_offset;
++
++      if (data1->min_offset >= min2
++	  && data1->min_offset <= max2)
++	return 0;
++      else
++	return data1->min_offset - min2;
++    }
+ }
+ 
+ /* Helper function for rank_for_schedule sorting.  */
+@@ -5627,7 +5765,7 @@ autopref_rank_for_schedule (const rtx_insn *insn1, const rtx_insn *insn2)
+       if (!rtx_equal_p (data1->base, data2->base))
+ 	continue;
+ 
+-      return data1->offset - data2->offset;
++      return autopref_rank_data (data1, data2);
+     }
+ 
+   return 0;
+@@ -5653,7 +5791,7 @@ autopref_multipass_dfa_lookahead_guard_1 (const rtx_insn *insn1,
+     return 0;
+ 
+   if (rtx_equal_p (data1->base, data2->base)
+-      && data1->offset > data2->offset)
++      && autopref_rank_data (data1, data2) > 0)
+     {
+       if (sched_verbose >= 2)
+ 	{
+--- a/src/gcc/ifcvt.c
++++ b/src/gcc/ifcvt.c
+@@ -780,7 +780,7 @@ cond_exec_process_if_block (ce_if_block * ce_info,
+       rtx_insn *from = then_first_tail;
+       if (!INSN_P (from))
+ 	from = find_active_insn_after (then_bb, from);
+-      delete_insn_chain (from, BB_END (then_bb), false);
++      delete_insn_chain (from, get_last_bb_insn (then_bb), false);
+     }
+   if (else_last_head)
+     delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
+@@ -1046,7 +1046,7 @@ cc_in_cond (rtx cond)
+ 
+ /* Return sequence of instructions generated by if conversion.  This
+    function calls end_sequence() to end the current stream, ensures
+-   that are instructions are unshared, recognizable non-jump insns.
++   that the instructions are unshared, recognizable non-jump insns.
+    On failure, this function returns a NULL_RTX.  */
+ 
+ static rtx_insn *
+@@ -1175,24 +1175,45 @@ noce_try_store_flag (struct noce_if_info *if_info)
+     }
+ }
+ 
+-/* Convert "if (test) x = a; else x = b", for A and B constant.  */
++/* Convert "if (test) x = a; else x = b", for A and B constant.
++   Also allow A = y + c1, B = y + c2, with a common y between A
++   and B.  */
+ 
+ static int
+ noce_try_store_flag_constants (struct noce_if_info *if_info)
+ {
+   rtx target;
+   rtx_insn *seq;
+-  int reversep;
++  bool reversep;
+   HOST_WIDE_INT itrue, ifalse, diff, tmp;
+-  int normalize, can_reverse;
+-  machine_mode mode;
++  int normalize;
++  bool can_reverse;
++  machine_mode mode = GET_MODE (if_info->x);;
++  rtx common = NULL_RTX;
++
++  rtx a = if_info->a;
++  rtx b = if_info->b;
+ 
+-  if (CONST_INT_P (if_info->a)
+-      && CONST_INT_P (if_info->b))
++  /* Handle cases like x := test ? y + 3 : y + 4.  */
++  if (GET_CODE (a) == PLUS
++      && GET_CODE (b) == PLUS
++      && CONST_INT_P (XEXP (a, 1))
++      && CONST_INT_P (XEXP (b, 1))
++      && rtx_equal_p (XEXP (a, 0), XEXP (b, 0))
++      && noce_operand_ok (XEXP (a, 0))
++      && if_info->branch_cost >= 2)
+     {
+-      mode = GET_MODE (if_info->x);
+-      ifalse = INTVAL (if_info->a);
+-      itrue = INTVAL (if_info->b);
++      common = XEXP (a, 0);
++      a = XEXP (a, 1);
++      b = XEXP (b, 1);
++    }
++
++  if (CONST_INT_P (a)
++      && CONST_INT_P (b))
++    {
++      ifalse = INTVAL (a);
++      itrue = INTVAL (b);
++      bool subtract_flag_p = false;
+ 
+       diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
+       /* Make sure we can represent the difference between the two values.  */
+@@ -1205,26 +1226,71 @@ noce_try_store_flag_constants (struct noce_if_info *if_info)
+       can_reverse = (reversed_comparison_code (if_info->cond, if_info->jump)
+ 		     != UNKNOWN);
+ 
+-      reversep = 0;
++      reversep = false;
+       if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
+-	normalize = 0;
++	{
++	  normalize = 0;
++	  /* We could collapse these cases but it is easier to follow the
++	     diff/STORE_FLAG_VALUE combinations when they are listed
++	     explicitly.  */
++
++	  /* test ? 3 : 4
++	     => 4 + (test != 0).  */
++	  if (diff < 0 && STORE_FLAG_VALUE < 0)
++	      reversep = false;
++	  /* test ? 4 : 3
++	     => can_reverse  | 4 + (test == 0)
++		!can_reverse | 3 - (test != 0).  */
++	  else if (diff > 0 && STORE_FLAG_VALUE < 0)
++	    {
++	      reversep = can_reverse;
++	      subtract_flag_p = !can_reverse;
++	      /* If we need to subtract the flag and we have PLUS-immediate
++		 A and B then it is unlikely to be beneficial to play tricks
++		 here.  */
++	      if (subtract_flag_p && common)
++		return FALSE;
++	    }
++	  /* test ? 3 : 4
++	     => can_reverse  | 3 + (test == 0)
++		!can_reverse | 4 - (test != 0).  */
++	  else if (diff < 0 && STORE_FLAG_VALUE > 0)
++	    {
++	      reversep = can_reverse;
++	      subtract_flag_p = !can_reverse;
++	      /* If we need to subtract the flag and we have PLUS-immediate
++		 A and B then it is unlikely to be beneficial to play tricks
++		 here.  */
++	      if (subtract_flag_p && common)
++		return FALSE;
++	    }
++	  /* test ? 4 : 3
++	     => 4 + (test != 0).  */
++	  else if (diff > 0 && STORE_FLAG_VALUE > 0)
++	    reversep = false;
++	  else
++	    gcc_unreachable ();
++	}
+       else if (ifalse == 0 && exact_log2 (itrue) >= 0
+ 	       && (STORE_FLAG_VALUE == 1
+ 		   || if_info->branch_cost >= 2))
+ 	normalize = 1;
+       else if (itrue == 0 && exact_log2 (ifalse) >= 0 && can_reverse
+ 	       && (STORE_FLAG_VALUE == 1 || if_info->branch_cost >= 2))
+-	normalize = 1, reversep = 1;
++	{
++	  normalize = 1;
++	  reversep = true;
++	}
+       else if (itrue == -1
+ 	       && (STORE_FLAG_VALUE == -1
+ 		   || if_info->branch_cost >= 2))
+ 	normalize = -1;
+       else if (ifalse == -1 && can_reverse
+ 	       && (STORE_FLAG_VALUE == -1 || if_info->branch_cost >= 2))
+-	normalize = -1, reversep = 1;
+-      else if ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
+-	       || if_info->branch_cost >= 3)
+-	normalize = -1;
++	{
++	  normalize = -1;
++	  reversep = true;
++	}
+       else
+ 	return FALSE;
+ 
+@@ -1235,6 +1301,15 @@ noce_try_store_flag_constants (struct noce_if_info *if_info)
+ 	}
+ 
+       start_sequence ();
++
++      /* If we have x := test ? x + 3 : x + 4 then move the original
++	 x out of the way while we store flags.  */
++      if (common && rtx_equal_p (common, if_info->x))
++	{
++	  common = gen_reg_rtx (mode);
++	  noce_emit_move_insn (common, if_info->x);
++	}
++
+       target = noce_emit_store_flag (if_info, if_info->x, reversep, normalize);
+       if (! target)
+ 	{
+@@ -1246,13 +1321,27 @@ noce_try_store_flag_constants (struct noce_if_info *if_info)
+ 	 =>   x = 3 + (test == 0);  */
+       if (diff == STORE_FLAG_VALUE || diff == -STORE_FLAG_VALUE)
+ 	{
+-	  target = expand_simple_binop (mode,
+-					(diff == STORE_FLAG_VALUE
+-					 ? PLUS : MINUS),
++	  /* Add the common part now.  This may allow combine to merge this
++	     with the store flag operation earlier into some sort of conditional
++	     increment/decrement if the target allows it.  */
++	  if (common)
++	    target = expand_simple_binop (mode, PLUS,
++					   target, common,
++					   target, 0, OPTAB_WIDEN);
++
++	  /* Always use ifalse here.  It should have been swapped with itrue
++	     when appropriate when reversep is true.  */
++	  target = expand_simple_binop (mode, subtract_flag_p ? MINUS : PLUS,
+ 					gen_int_mode (ifalse, mode), target,
+ 					if_info->x, 0, OPTAB_WIDEN);
+ 	}
+-
++      /* Other cases are not beneficial when the original A and B are PLUS
++	 expressions.  */
++      else if (common)
++	{
++	  end_sequence ();
++	  return FALSE;
++	}
+       /* if (test) x = 8; else x = 0;
+ 	 =>   x = (test != 0) << 3;  */
+       else if (ifalse == 0 && (tmp = exact_log2 (itrue)) >= 0)
+@@ -1270,18 +1359,10 @@ noce_try_store_flag_constants (struct noce_if_info *if_info)
+ 					target, gen_int_mode (ifalse, mode),
+ 					if_info->x, 0, OPTAB_WIDEN);
+ 	}
+-
+-      /* if (test) x = a; else x = b;
+-	 =>   x = (-(test != 0) & (b - a)) + a;  */
+       else
+ 	{
+-	  target = expand_simple_binop (mode, AND,
+-					target, gen_int_mode (diff, mode),
+-					if_info->x, 0, OPTAB_WIDEN);
+-	  if (target)
+-	    target = expand_simple_binop (mode, PLUS,
+-					  target, gen_int_mode (ifalse, mode),
+-					  if_info->x, 0, OPTAB_WIDEN);
++	  end_sequence ();
++	  return FALSE;
+ 	}
+ 
+       if (! target)
+@@ -1606,11 +1687,67 @@ noce_try_cmove (struct noce_if_info *if_info)
+ 				   INSN_LOCATION (if_info->insn_a));
+ 	  return TRUE;
+ 	}
+-      else
++      /* If both a and b are constants try a last-ditch transformation:
++	 if (test) x = a; else x = b;
++	 =>   x = (-(test != 0) & (b - a)) + a;
++	 Try this only if the target-specific expansion above has failed.
++	 The target-specific expander may want to generate sequences that
++	 we don't know about, so give them a chance before trying this
++	 approach.  */
++      else if (!targetm.have_conditional_execution ()
++		&& CONST_INT_P (if_info->a) && CONST_INT_P (if_info->b)
++		&& ((if_info->branch_cost >= 2 && STORE_FLAG_VALUE == -1)
++		    || if_info->branch_cost >= 3))
+ 	{
+-	  end_sequence ();
+-	  return FALSE;
++	  machine_mode mode = GET_MODE (if_info->x);
++	  HOST_WIDE_INT ifalse = INTVAL (if_info->a);
++	  HOST_WIDE_INT itrue = INTVAL (if_info->b);
++	  rtx target = noce_emit_store_flag (if_info, if_info->x, false, -1);
++	  if (!target)
++	    {
++	      end_sequence ();
++	      return FALSE;
++	    }
++
++	  HOST_WIDE_INT diff = (unsigned HOST_WIDE_INT) itrue - ifalse;
++	  /* Make sure we can represent the difference
++	     between the two values.  */
++	  if ((diff > 0)
++	      != ((ifalse < 0) != (itrue < 0) ? ifalse < 0 : ifalse < itrue))
++	    {
++	      end_sequence ();
++	      return FALSE;
++	    }
++
++	  diff = trunc_int_for_mode (diff, mode);
++	  target = expand_simple_binop (mode, AND,
++					target, gen_int_mode (diff, mode),
++					if_info->x, 0, OPTAB_WIDEN);
++	  if (target)
++	    target = expand_simple_binop (mode, PLUS,
++					  target, gen_int_mode (ifalse, mode),
++					  if_info->x, 0, OPTAB_WIDEN);
++	  if (target)
++	    {
++	      if (target != if_info->x)
++		noce_emit_move_insn (if_info->x, target);
++
++	      seq = end_ifcvt_sequence (if_info);
++	      if (!seq)
++		return FALSE;
++
++	      emit_insn_before_setloc (seq, if_info->jump,
++				   INSN_LOCATION (if_info->insn_a));
++	      return TRUE;
++	    }
++	  else
++	    {
++	      end_sequence ();
++	      return FALSE;
++	    }
+ 	}
++      else
++	end_sequence ();
+     }
+ 
+   return FALSE;
+@@ -2780,13 +2917,14 @@ noce_process_if_block (struct noce_if_info *if_info)
+     goto success;
+   if (noce_try_abs (if_info))
+     goto success;
++  if (!targetm.have_conditional_execution ()
++      && noce_try_store_flag_constants (if_info))
++    goto success;
+   if (HAVE_conditional_move
+       && noce_try_cmove (if_info))
+     goto success;
+   if (! targetm.have_conditional_execution ())
+     {
+-      if (noce_try_store_flag_constants (if_info))
+-	goto success;
+       if (noce_try_addcc (if_info))
+ 	goto success;
+       if (noce_try_store_flag_mask (if_info))
+--- a/src/gcc/ira-color.c
++++ b/src/gcc/ira-color.c
+@@ -1331,10 +1331,12 @@ get_next_update_cost (ira_allocno_t *allocno, ira_allocno_t *from, int *divisor)
+   return true;
+ }
+ 
+-/* Increase costs of HARD_REGNO by UPDATE_COST for ALLOCNO.  Return
+-   true if we really modified the cost.  */
++/* Increase costs of HARD_REGNO by UPDATE_COST and conflict cost by
++   UPDATE_CONFLICT_COST for ALLOCNO.  Return true if we really
++   modified the cost.  */
+ static bool
+-update_allocno_cost (ira_allocno_t allocno, int hard_regno, int update_cost)
++update_allocno_cost (ira_allocno_t allocno, int hard_regno,
++		     int update_cost, int update_conflict_cost)
+ {
+   int i;
+   enum reg_class aclass = ALLOCNO_CLASS (allocno);
+@@ -1350,7 +1352,7 @@ update_allocno_cost (ira_allocno_t allocno, int hard_regno, int update_cost)
+     (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno),
+      aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (allocno));
+   ALLOCNO_UPDATED_HARD_REG_COSTS (allocno)[i] += update_cost;
+-  ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_cost;
++  ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_conflict_cost;
+   return true;
+ }
+ 
+@@ -1362,7 +1364,7 @@ static void
+ update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
+ 			   int divisor, bool decr_p, bool record_p)
+ {
+-  int cost, update_cost;
++  int cost, update_cost, update_conflict_cost;
+   machine_mode mode;
+   enum reg_class rclass, aclass;
+   ira_allocno_t another_allocno, from = NULL;
+@@ -1403,11 +1405,20 @@ update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
+ 	  if (decr_p)
+ 	    cost = -cost;
+ 
+-	  update_cost = cp->freq * cost / divisor;
++	  update_conflict_cost = update_cost = cp->freq * cost / divisor;
++
++	  if (ALLOCNO_COLOR_DATA (another_allocno) != NULL
++	      && (ALLOCNO_COLOR_DATA (allocno)->first_thread_allocno
++		  != ALLOCNO_COLOR_DATA (another_allocno)->first_thread_allocno))
++	    /* Decrease conflict cost of ANOTHER_ALLOCNO if it is not
++	       in the same allocation thread.  */
++	    update_conflict_cost /= COST_HOP_DIVISOR;
++
+ 	  if (update_cost == 0)
+ 	    continue;
+ 
+-	  if (! update_allocno_cost (another_allocno, hard_regno, update_cost))
++	  if (! update_allocno_cost (another_allocno, hard_regno,
++				     update_cost, update_conflict_cost))
+ 	    continue;
+ 	  queue_update_cost (another_allocno, allocno, divisor * COST_HOP_DIVISOR);
+ 	  if (record_p && ALLOCNO_COLOR_DATA (another_allocno) != NULL)
+--- a/src/gcc/ira-costs.c
++++ b/src/gcc/ira-costs.c
+@@ -1380,8 +1380,6 @@ record_operand_costs (rtx_insn *insn, enum reg_class *pref)
+       rtx dest = SET_DEST (set);
+       rtx src = SET_SRC (set);
+ 
+-      dest = SET_DEST (set);
+-      src = SET_SRC (set);
+       if (GET_CODE (dest) == SUBREG
+ 	  && (GET_MODE_SIZE (GET_MODE (dest))
+ 	      == GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))
+--- a/src/gcc/jit/Make-lang.in
++++ b/src/gcc/jit/Make-lang.in
+@@ -285,6 +285,10 @@ jit.uninstall:
+ # We just have to delete files specific to us.
+ 
+ jit.mostlyclean:
++	-rm -f $(LIBGCCJIT_FILENAME) $(LIBGCCJIT_SYMLINK)
++	-rm -f $(LIBGCCJIT_LINKER_NAME_SYMLINK) $(FULL_DRIVER_NAME)
++	-rm -f $(LIBGCCJIT_SONAME)
++	-rm -f $(jit_OBJS)
+ 
+ jit.clean:
+ 
+--- a/src/gcc/loop-invariant.c
++++ b/src/gcc/loop-invariant.c
+@@ -118,6 +118,8 @@ struct def
+   unsigned n_uses;		/* Number of such uses.  */
+   unsigned n_addr_uses;		/* Number of uses in addresses.  */
+   unsigned invno;		/* The corresponding invariant.  */
++  bool can_prop_to_addr_uses;	/* True if the corresponding inv can be
++				   propagated into its address uses.  */
+ };
+ 
+ /* The data stored for each invariant.  */
+@@ -696,6 +698,8 @@ find_defs (struct loop *loop)
+   df_remove_problem (df_chain);
+   df_process_deferred_rescans ();
+   df_chain_add_problem (DF_UD_CHAIN);
++  df_live_add_problem ();
++  df_live_set_all_dirty ();
+   df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
+   df_analyze_loop (loop);
+   check_invariant_table_size ();
+@@ -740,8 +744,11 @@ create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
+ 	 enough to not regress 410.bwaves either (by still moving reg+reg
+ 	 invariants).
+ 	 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html .  */
+-      inv->cheap_address = address_cost (SET_SRC (set), word_mode,
+-					 ADDR_SPACE_GENERIC, speed) < 3;
++      if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set))))
++	inv->cheap_address = address_cost (SET_SRC (set), word_mode,
++					   ADDR_SPACE_GENERIC, speed) < 3;
++      else
++	inv->cheap_address = false;
+     }
+   else
+     {
+@@ -776,6 +783,34 @@ create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
+   return inv;
+ }
+ 
++/* Given invariant DEF and its address USE, check if the corresponding
++   invariant expr can be propagated into the use or not.  */
++
++static bool
++inv_can_prop_to_addr_use (struct def *def, df_ref use)
++{
++  struct invariant *inv;
++  rtx *pos = DF_REF_REAL_LOC (use), def_set;
++  rtx_insn *use_insn = DF_REF_INSN (use);
++  rtx_insn *def_insn;
++  bool ok;
++
++  inv = invariants[def->invno];
++  /* No need to check if address expression is expensive.  */
++  if (!inv->cheap_address)
++    return false;
++
++  def_insn = inv->insn;
++  def_set = single_set (def_insn);
++  if (!def_set)
++    return false;
++
++  validate_unshare_change (use_insn, pos, SET_SRC (def_set), true);
++  ok = verify_changes (0);
++  cancel_changes (0);
++  return ok;
++}
++
+ /* Record USE at DEF.  */
+ 
+ static void
+@@ -791,7 +826,16 @@ record_use (struct def *def, df_ref use)
+   def->uses = u;
+   def->n_uses++;
+   if (u->addr_use_p)
+-    def->n_addr_uses++;
++    {
++      /* Initialize propagation information if this is the first addr
++	 use of the inv def.  */
++      if (def->n_addr_uses == 0)
++	def->can_prop_to_addr_uses = true;
++
++      def->n_addr_uses++;
++      if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use))
++	def->can_prop_to_addr_uses = false;
++    }
+ }
+ 
+ /* Finds the invariants USE depends on and store them to the DEPENDS_ON
+@@ -1174,7 +1218,10 @@ get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed,
+     }
+ 
+   if (!inv->cheap_address
+-      || inv->def->n_addr_uses < inv->def->n_uses)
++      || inv->def->n_uses == 0
++      || inv->def->n_addr_uses < inv->def->n_uses
++      /* Count cost if the inv can't be propagated into address uses.  */
++      || !inv->def->can_prop_to_addr_uses)
+     (*comp_cost) += inv->cost * inv->eqno;
+ 
+ #ifdef STACK_REGS
+@@ -1512,6 +1559,79 @@ replace_uses (struct invariant *inv, rtx reg, bool in_group)
+   return 1;
+ }
+ 
++/* Whether invariant INV setting REG can be moved out of LOOP, at the end of
++   the block preceding its header.  */
++
++static bool
++can_move_invariant_reg (struct loop *loop, struct invariant *inv, rtx reg)
++{
++  df_ref def, use;
++  unsigned int dest_regno, defs_in_loop_count = 0;
++  rtx_insn *insn = inv->insn;
++  basic_block bb = BLOCK_FOR_INSN (inv->insn);
++
++  /* We ignore hard register and memory access for cost and complexity reasons.
++     Hard register are few at this stage and expensive to consider as they
++     require building a separate data flow.  Memory access would require using
++     df_simulate_* and can_move_insns_across functions and is more complex.  */
++  if (!REG_P (reg) || HARD_REGISTER_P (reg))
++    return false;
++
++  /* Check whether the set is always executed.  We could omit this condition if
++     we know that the register is unused outside of the loop, but it does not
++     seem worth finding out.  */
++  if (!inv->always_executed)
++    return false;
++
++  /* Check that all uses that would be dominated by def are already dominated
++     by it.  */
++  dest_regno = REGNO (reg);
++  for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use))
++    {
++      rtx_insn *use_insn;
++      basic_block use_bb;
++
++      use_insn = DF_REF_INSN (use);
++      use_bb = BLOCK_FOR_INSN (use_insn);
++
++      /* Ignore instruction considered for moving.  */
++      if (use_insn == insn)
++	continue;
++
++      /* Don't consider uses outside loop.  */
++      if (!flow_bb_inside_loop_p (loop, use_bb))
++	continue;
++
++      /* Don't move if a use is not dominated by def in insn.  */
++      if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn))
++	return false;
++      if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb))
++	return false;
++    }
++
++  /* Check for other defs.  Any other def in the loop might reach a use
++     currently reached by the def in insn.  */
++  for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def))
++    {
++      basic_block def_bb = DF_REF_BB (def);
++
++      /* Defs in exit block cannot reach a use they weren't already.  */
++      if (single_succ_p (def_bb))
++	{
++	  basic_block def_bb_succ;
++
++	  def_bb_succ = single_succ (def_bb);
++	  if (!flow_bb_inside_loop_p (loop, def_bb_succ))
++	    continue;
++	}
++
++      if (++defs_in_loop_count > 1)
++	return false;
++    }
++
++  return true;
++}
++
+ /* Move invariant INVNO out of the LOOP.  Returns true if this succeeds, false
+    otherwise.  */
+ 
+@@ -1545,11 +1665,8 @@ move_invariant_reg (struct loop *loop, unsigned invno)
+ 	    }
+ 	}
+ 
+-      /* Move the set out of the loop.  If the set is always executed (we could
+-	 omit this condition if we know that the register is unused outside of
+-	 the loop, but it does not seem worth finding out) and it has no uses
+-	 that would not be dominated by it, we may just move it (TODO).
+-	 Otherwise we need to create a temporary register.  */
++      /* If possible, just move the set out of the loop.  Otherwise, we
++	 need to create a temporary register.  */
+       set = single_set (inv->insn);
+       reg = dest = SET_DEST (set);
+       if (GET_CODE (reg) == SUBREG)
+@@ -1557,20 +1674,27 @@ move_invariant_reg (struct loop *loop, unsigned invno)
+       if (REG_P (reg))
+ 	regno = REGNO (reg);
+ 
+-      reg = gen_reg_rtx_and_attrs (dest);
++      if (!can_move_invariant_reg (loop, inv, dest))
++	{
++	  reg = gen_reg_rtx_and_attrs (dest);
+ 
+-      /* Try replacing the destination by a new pseudoregister.  */
+-      validate_change (inv->insn, &SET_DEST (set), reg, true);
++	  /* Try replacing the destination by a new pseudoregister.  */
++	  validate_change (inv->insn, &SET_DEST (set), reg, true);
+ 
+-      /* As well as all the dominated uses.  */
+-      replace_uses (inv, reg, true);
++	  /* As well as all the dominated uses.  */
++	  replace_uses (inv, reg, true);
+ 
+-      /* And validate all the changes.  */
+-      if (!apply_change_group ())
+-	goto fail;
++	  /* And validate all the changes.  */
++	  if (!apply_change_group ())
++	    goto fail;
+ 
+-      emit_insn_after (gen_move_insn (dest, reg), inv->insn);
++	  emit_insn_after (gen_move_insn (dest, reg), inv->insn);
++	}
++      else if (dump_file)
++	fprintf (dump_file, "Invariant %d moved without introducing a new "
++			    "temporary register\n", invno);
+       reorder_insns (inv->insn, inv->insn, BB_END (preheader));
++      df_recompute_luids (preheader);
+ 
+       /* If there is a REG_EQUAL note on the insn we just moved, and the
+ 	 insn is in a basic block that is not always executed or the note
+--- a/src/gcc/lra-constraints.c
++++ b/src/gcc/lra-constraints.c
+@@ -867,10 +867,11 @@ narrow_reload_pseudo_class (rtx reg, enum reg_class cl)
+    numbers with end marker -1) with reg class GOAL_CLASS.  Add input
+    and output reloads correspondingly to the lists *BEFORE and *AFTER.
+    OUT might be negative.  In this case we generate input reloads for
+-   matched input operands INS.  */
++   matched input operands INS.  EARLY_CLOBBER_P is a flag that the
++   output operand is early clobbered for chosen alternative.  */
+ static void
+ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
+-	      rtx_insn **before, rtx_insn **after)
++	      rtx_insn **before, rtx_insn **after, bool early_clobber_p)
+ {
+   int i, in;
+   rtx new_in_reg, new_out_reg, reg, clobber;
+@@ -940,20 +941,34 @@ match_reload (signed char out, signed char *ins, enum reg_class goal_class,
+ 	 they live in the same place.  When we create a pseudo we
+ 	 assign value of original pseudo (if any) from which we
+ 	 created the new pseudo.  If we create the pseudo from the
+-	 input pseudo, the new pseudo will no conflict with the input
+-	 pseudo which is wrong when the input pseudo lives after the
+-	 insn and as the new pseudo value is changed by the insn
+-	 output.  Therefore we create the new pseudo from the output.
++	 input pseudo, the new pseudo will have no conflict with the
++	 input pseudo which is wrong when the input pseudo lives after
++	 the insn and as the new pseudo value is changed by the insn
++	 output.  Therefore we create the new pseudo from the output
++	 except the case when we have single matched dying input
++	 pseudo.
+ 
+ 	 We cannot reuse the current output register because we might
+ 	 have a situation like "a <- a op b", where the constraints
+ 	 force the second input operand ("b") to match the output
+ 	 operand ("a").  "b" must then be copied into a new register
+-	 so that it doesn't clobber the current value of "a".  */
++	 so that it doesn't clobber the current value of "a".
++
++	 We can not use the same value if the output pseudo is
++	 early clobbered or the input pseudo is mentioned in the
++	 output, e.g. as an address part in memory, because
++	 output reload will actually extend the pseudo liveness.
++	 We don't care about eliminable hard regs here as we are
++	 interesting only in pseudos.  */
+ 
+       new_in_reg = new_out_reg
+-	= lra_create_new_reg_with_unique_value (outmode, out_rtx,
+-						goal_class, "");
++	= (! early_clobber_p && ins[1] < 0 && REG_P (in_rtx)
++	   && (int) REGNO (in_rtx) < lra_new_regno_start
++	   && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
++	   && (out < 0 || regno_use_in (REGNO (in_rtx), out_rtx) == NULL_RTX)
++	   ? lra_create_new_reg (inmode, in_rtx, goal_class, "")
++	   : lra_create_new_reg_with_unique_value (outmode, out_rtx,
++						   goal_class, ""));
+     }
+   /* In operand can be got from transformations before processing insn
+      constraints.  One example of such transformations is subreg
+@@ -1656,8 +1671,7 @@ prohibited_class_reg_set_mode_p (enum reg_class rclass,
+ {
+   HARD_REG_SET temp;
+   
+-  // ??? Is this assert right
+-  // lra_assert (hard_reg_set_subset_p (set, reg_class_contents[rclass]));
++  lra_assert (hard_reg_set_subset_p (reg_class_contents[rclass], set));
+   COPY_HARD_REG_SET (temp, set);
+   AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs);
+   return (hard_reg_set_subset_p
+@@ -2870,6 +2884,7 @@ process_address_1 (int nop, bool check_only_p,
+ {
+   struct address_info ad;
+   rtx new_reg;
++  HOST_WIDE_INT scale;
+   rtx op = *curr_id->operand_loc[nop];
+   const char *constraint = curr_static_id->operand[nop].constraint;
+   enum constraint_num cn = lookup_constraint (constraint);
+@@ -3099,14 +3114,14 @@ process_address_1 (int nop, bool check_only_p,
+       *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
+ 				       new_reg, *ad.index);
+     }
+-  else if (get_index_scale (&ad) == 1)
++  else if ((scale = get_index_scale (&ad)) == 1)
+     {
+       /* The last transformation to one reg will be made in
+ 	 curr_insn_transform function.  */
+       end_sequence ();
+       return false;
+     }
+-  else
++  else if (scale != 0)
+     {
+       /* base + scale * index => base + new_reg,
+ 	 case (1) above.
+@@ -3118,6 +3133,17 @@ process_address_1 (int nop, bool check_only_p,
+       *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
+ 				       *ad.base_term, new_reg);
+     }
++  else
++    {
++      enum reg_class cl = base_reg_class (ad.mode, ad.as,
++					  SCRATCH, SCRATCH);
++      rtx addr = *ad.inner;
++      
++      new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr");
++      /* addr => new_base.  */
++      lra_emit_move (new_reg, addr);
++      *ad.inner = new_reg;
++    }
+   *before = get_insns ();
+   end_sequence ();
+   return true;
+@@ -3880,13 +3906,18 @@ curr_insn_transform (bool check_only_p)
+ 	  match_inputs[0] = i;
+ 	  match_inputs[1] = -1;
+ 	  match_reload (goal_alt_matched[i][0], match_inputs,
+-			goal_alt[i], &before, &after);
++			goal_alt[i], &before, &after,
++			curr_static_id->operand_alternative
++			[goal_alt_number * n_operands + goal_alt_matched[i][0]]
++			.earlyclobber);
+ 	}
+       else if (curr_static_id->operand[i].type == OP_OUT
+ 	       && (curr_static_id->operand[goal_alt_matched[i][0]].type
+ 		   == OP_IN))
+ 	/* Generate reloads for output and matched inputs.  */
+-	match_reload (i, goal_alt_matched[i], goal_alt[i], &before, &after);
++	match_reload (i, goal_alt_matched[i], goal_alt[i], &before, &after,
++		      curr_static_id->operand_alternative
++		      [goal_alt_number * n_operands + i].earlyclobber);
+       else if (curr_static_id->operand[i].type == OP_IN
+ 	       && (curr_static_id->operand[goal_alt_matched[i][0]].type
+ 		   == OP_IN))
+@@ -3896,7 +3927,7 @@ curr_insn_transform (bool check_only_p)
+ 	  for (j = 0; (k = goal_alt_matched[i][j]) >= 0; j++)
+ 	    match_inputs[j + 1] = k;
+ 	  match_inputs[j + 1] = -1;
+-	  match_reload (-1, match_inputs, goal_alt[i], &before, &after);
++	  match_reload (-1, match_inputs, goal_alt[i], &before, &after, false);
+ 	}
+       else
+ 	/* We must generate code in any case when function
+--- a/src/gcc/lra-lives.c
++++ b/src/gcc/lra-lives.c
+@@ -777,28 +777,33 @@ process_bb_lives (basic_block bb, int &curr_point, bool dead_insn_p)
+ 	  lra_hard_reg_usage[reg->regno] += freq;
+ 
+       call_p = CALL_P (curr_insn);
++      src_regno = (set != NULL_RTX && REG_P (SET_SRC (set))
++		   ? REGNO (SET_SRC (set)) : -1);
++      dst_regno = (set != NULL_RTX && REG_P (SET_DEST (set))
++		   ? REGNO (SET_DEST (set)) : -1);
+       if (complete_info_p
+-	  && set != NULL_RTX
+-	  && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))
++	  && src_regno >= 0 && dst_regno >= 0
+ 	  /* Check that source regno does not conflict with
+ 	     destination regno to exclude most impossible
+ 	     preferences.  */
+-	  && ((((src_regno = REGNO (SET_SRC (set))) >= FIRST_PSEUDO_REGISTER
+-		&& ! sparseset_bit_p (pseudos_live, src_regno))
++	  && (((src_regno >= FIRST_PSEUDO_REGISTER
++		&& (! sparseset_bit_p (pseudos_live, src_regno)
++		    || (dst_regno >= FIRST_PSEUDO_REGISTER
++			&& lra_reg_val_equal_p (src_regno,
++						lra_reg_info[dst_regno].val,
++						lra_reg_info[dst_regno].offset))))
+ 	       || (src_regno < FIRST_PSEUDO_REGISTER
+ 		   && ! TEST_HARD_REG_BIT (hard_regs_live, src_regno)))
+ 	      /* It might be 'inheritance pseudo <- reload pseudo'.  */
+ 	      || (src_regno >= lra_constraint_new_regno_start
+-		  && ((int) REGNO (SET_DEST (set))
+-		      >= lra_constraint_new_regno_start)
++		  && dst_regno >= lra_constraint_new_regno_start
+ 		  /* Remember to skip special cases where src/dest regnos are
+ 		     the same, e.g. insn SET pattern has matching constraints
+ 		     like =r,0.  */
+-		  && src_regno != (int) REGNO (SET_DEST (set)))))
++		  && src_regno != dst_regno)))
+ 	{
+ 	  int hard_regno = -1, regno = -1;
+ 
+-	  dst_regno = REGNO (SET_DEST (set));
+ 	  if (dst_regno >= lra_constraint_new_regno_start
+ 	      && src_regno >= lra_constraint_new_regno_start)
+ 	    {
+--- a/src/gcc/lto-streamer-out.c
++++ b/src/gcc/lto-streamer-out.c
+@@ -2703,7 +2703,7 @@ lto_write_mode_table (void)
+     if (streamer_mode_table[i])
+       {
+ 	machine_mode m = (machine_mode) i;
+-	if (GET_MODE_INNER (m) != VOIDmode)
++	if (GET_MODE_INNER (m) != m)
+ 	  streamer_mode_table[(int) GET_MODE_INNER (m)] = 1;
+       }
+   /* First stream modes that have GET_MODE_INNER (m) == VOIDmode,
+@@ -2713,7 +2713,7 @@ lto_write_mode_table (void)
+       if (streamer_mode_table[i] && i != (int) VOIDmode && i != (int) BLKmode)
+ 	{
+ 	  machine_mode m = (machine_mode) i;
+-	  if ((GET_MODE_INNER (m) == VOIDmode) ^ (pass == 0))
++	  if ((GET_MODE_INNER (m) == m) ^ (pass == 0))
+ 	    continue;
+ 	  bp_pack_value (&bp, m, 8);
+ 	  bp_pack_enum (&bp, mode_class, MAX_MODE_CLASS, GET_MODE_CLASS (m));
+--- a/src/gcc/machmode.h
++++ b/src/gcc/machmode.h
+@@ -209,7 +209,9 @@ extern const unsigned HOST_WIDE_INT mode_mask_array[NUM_MACHINE_MODES];
+ 
+ #define GET_MODE_MASK(MODE) mode_mask_array[MODE]
+ 
+-/* Return the mode of the inner elements in a vector.  */
++/* Return the mode of the basic parts of MODE.  For vector modes this is the
++   mode of the vector elements.  For complex modes it is the mode of the real
++   and imaginary parts.  For other modes it is MODE itself.  */
+ 
+ extern const unsigned char mode_inner[NUM_MACHINE_MODES];
+ #if GCC_VERSION >= 4001
+@@ -220,21 +222,31 @@ extern const unsigned char mode_inner[NUM_MACHINE_MODES];
+ #define GET_MODE_INNER(MODE) ((machine_mode) mode_inner[MODE])
+ #endif
+ 
+-/* Get the size in bytes or bites of the basic parts of an
++/* Get the size in bytes or bits of the basic parts of an
+    object of mode MODE.  */
+ 
+-#define GET_MODE_UNIT_SIZE(MODE)		\
+-  (GET_MODE_INNER (MODE) == VOIDmode		\
+-   ? GET_MODE_SIZE (MODE)			\
+-   : GET_MODE_SIZE (GET_MODE_INNER (MODE)))
++extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
++#if GCC_VERSION >= 4001
++#define GET_MODE_UNIT_SIZE(MODE) \
++  ((unsigned char) (__builtin_constant_p (MODE) \
++		   ? mode_unit_size_inline (MODE) : mode_unit_size[MODE]))
++#else
++#define GET_MODE_UNIT_SIZE(MODE) mode_unit_size[MODE]
++#endif
+ 
+ #define GET_MODE_UNIT_BITSIZE(MODE) \
+   ((unsigned short) (GET_MODE_UNIT_SIZE (MODE) * BITS_PER_UNIT))
+ 
+-#define GET_MODE_UNIT_PRECISION(MODE)		\
+-  (GET_MODE_INNER (MODE) == VOIDmode		\
+-   ? GET_MODE_PRECISION (MODE)			\
+-   : GET_MODE_PRECISION (GET_MODE_INNER (MODE)))
++extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
++#if GCC_VERSION >= 4001
++#define GET_MODE_UNIT_PRECISION(MODE) \
++  ((unsigned short) (__builtin_constant_p (MODE) \
++		    ? mode_unit_precision_inline (MODE)\
++		    : mode_unit_precision[MODE]))
++#else
++#define GET_MODE_UNIT_PRECISION(MODE) mode_unit_precision[MODE]
++#endif
++
+ 
+ /* Get the number of units in the object.  */
+ 
+@@ -320,10 +332,6 @@ extern unsigned get_mode_alignment (machine_mode);
+ 
+ #define GET_MODE_ALIGNMENT(MODE) get_mode_alignment (MODE)
+ 
+-/* Get the precision of the mode or its inner mode if it has one.  */
+-
+-extern unsigned int element_precision (machine_mode);
+-
+ /* For each class, get the narrowest mode in that class.  */
+ 
+ extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS];
+--- a/src/gcc/objc/Make-lang.in
++++ b/src/gcc/objc/Make-lang.in
+@@ -114,6 +114,7 @@ objc.uninstall:
+ objc.mostlyclean:
+ 	-rm -f objc/*$(objext) objc/xforward objc/fflags
+ 	-rm -f objc/*$(coverageexts)
++	-rm -f cc1obj$(exeext)
+ objc.clean: objc.mostlyclean
+ 	-rm -rf objc-headers
+ objc.distclean:
+--- a/src/gcc/objcp/Make-lang.in
++++ b/src/gcc/objcp/Make-lang.in
+@@ -142,6 +142,7 @@ obj-c++.uninstall:
+ obj-c++.mostlyclean:
+ 	-rm -f objcp/*$(objext)
+ 	-rm -f objcp/*$(coverageexts)
++	-rm -f cc1objplus$(exeext)
+ obj-c++.clean: obj-c++.mostlyclean
+ obj-c++.distclean:
+ 	-rm -f objcp/config.status objcp/Makefile
+--- a/src/gcc/optabs.c
++++ b/src/gcc/optabs.c
+@@ -6563,18 +6563,28 @@ vector_compare_rtx (enum tree_code tcode, tree t_op0, tree t_op1,
+ {
+   struct expand_operand ops[2];
+   rtx rtx_op0, rtx_op1;
++  machine_mode m0, m1;
+   enum rtx_code rcode = get_rtx_code (tcode, unsignedp);
+ 
+   gcc_assert (TREE_CODE_CLASS (tcode) == tcc_comparison);
+ 
+-  /* Expand operands.  */
++  /* Expand operands.  For vector types with scalar modes, e.g. where int64x1_t
++     has mode DImode, this can produce a constant RTX of mode VOIDmode; in such
++     cases, use the original mode.  */
+   rtx_op0 = expand_expr (t_op0, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op0)),
+ 			 EXPAND_STACK_PARM);
++  m0 = GET_MODE (rtx_op0);
++  if (m0 == VOIDmode)
++    m0 = TYPE_MODE (TREE_TYPE (t_op0));
++
+   rtx_op1 = expand_expr (t_op1, NULL_RTX, TYPE_MODE (TREE_TYPE (t_op1)),
+ 			 EXPAND_STACK_PARM);
++  m1 = GET_MODE (rtx_op1);
++  if (m1 == VOIDmode)
++    m1 = TYPE_MODE (TREE_TYPE (t_op1));
+ 
+-  create_input_operand (&ops[0], rtx_op0, GET_MODE (rtx_op0));
+-  create_input_operand (&ops[1], rtx_op1, GET_MODE (rtx_op1));
++  create_input_operand (&ops[0], rtx_op0, m0);
++  create_input_operand (&ops[1], rtx_op1, m1);
+   if (!maybe_legitimize_operands (icode, 4, 2, ops))
+     gcc_unreachable ();
+   return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
+@@ -6645,7 +6655,7 @@ static rtx
+ shift_amt_for_vec_perm_mask (rtx sel)
+ {
+   unsigned int i, first, nelt = GET_MODE_NUNITS (GET_MODE (sel));
+-  unsigned int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (sel)));
++  unsigned int bitsize = GET_MODE_UNIT_BITSIZE (GET_MODE (sel));
+ 
+   if (GET_CODE (sel) != CONST_VECTOR)
+     return NULL_RTX;
+--- a/src/gcc/params.def
++++ b/src/gcc/params.def
+@@ -262,6 +262,14 @@ DEFPARAM(PARAM_MAX_HOIST_DEPTH,
+ 	 "Maximum depth of search in the dominator tree for expressions to hoist",
+ 	 30, 0, 0)
+ 
++
++/* When synthesizing expnonentiation by a real constant operations using square
++   roots, this controls how deep sqrt chains we are willing to generate.  */
++DEFPARAM(PARAM_MAX_POW_SQRT_DEPTH,
++	 "max-pow-sqrt-depth",
++	 "Maximum depth of sqrt chains to use when synthesizing exponentiation by a real constant",
++	 5, 1, 32)
++
+ /* This parameter limits the number of insns in a loop that will be unrolled,
+    and by how much the loop is unrolled.
+ 
+--- a/src/gcc/passes.def
++++ b/src/gcc/passes.def
+@@ -247,6 +247,7 @@ along with GCC; see the file COPYING3.  If not see
+ 	  PUSH_INSERT_PASSES_WITHIN (pass_parallelize_loops)
+ 	      NEXT_PASS (pass_expand_omp_ssa);
+ 	  POP_INSERT_PASSES ()
++	  NEXT_PASS (pass_ch_vect);
+ 	  NEXT_PASS (pass_if_conversion);
+ 	  /* pass_vectorize must immediately follow pass_if_conversion.
+ 	     Please do not add any other passes in between.  */
+--- a/src/gcc/read-md.c
++++ b/src/gcc/read-md.c
+@@ -388,20 +388,31 @@ read_name (struct md_name *name)
+ {
+   int c;
+   size_t i;
++  int angle_bracket_depth;
+ 
+   c = read_skip_spaces ();
+ 
+   i = 0;
++  angle_bracket_depth = 0;
+   while (1)
+     {
++      if (c == '<')
++	angle_bracket_depth++;
++
++      if ((c == '>') && (angle_bracket_depth > 0))
++	  angle_bracket_depth--;
++
+       if (c == ' ' || c == '\n' || c == '\t' || c == '\f' || c == '\r'
+ 	  || c == EOF)
+ 	break;
+-      if (c == ':' || c == ')' || c == ']' || c == '"' || c == '/'
+-	  || c == '(' || c == '[')
++      if (angle_bracket_depth == 0)
+ 	{
+-	  unread_char (c);
+-	  break;
++	  if (c == ':' || c == ')' || c == ']'
++	      || c == '"' || c == '/' || c == '(' || c == '[')
++	    {
++	      unread_char (c);
++	      break;
++	    }
+ 	}
+ 
+       if (i == sizeof (name->buffer) - 1)
+--- a/src/gcc/regrename.c
++++ b/src/gcc/regrename.c
+@@ -505,12 +505,20 @@ rename_chains (void)
+ 	  continue;
+ 	}
+ 
+-      if (dump_file)
+-	fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
+-
+-      regrename_do_replace (this_head, best_new_reg);
+-      tick[best_new_reg] = ++this_tick;
+-      df_set_regs_ever_live (best_new_reg, true);
++      if (regrename_do_replace (this_head, best_new_reg))
++	{
++	  if (dump_file)
++	    fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
++	  tick[best_new_reg] = ++this_tick;
++	  df_set_regs_ever_live (best_new_reg, true);
++	}
++      else
++	{
++	  if (dump_file)
++	    fprintf (dump_file, ", renaming as %s failed\n",
++		     reg_names[best_new_reg]);
++	  tick[reg] = ++this_tick;
++	}
+     }
+ }
+ 
+@@ -936,7 +944,13 @@ regrename_analyze (bitmap bb_mask)
+     bb->aux = NULL;
+ }
+ 
+-void
++/* Attempt to replace all uses of the register in the chain beginning with
++   HEAD with REG.  Returns true on success and false if the replacement is
++   rejected because the insns would not validate.  The latter can happen
++   e.g. if a match_parallel predicate enforces restrictions on register
++   numbering in its subpatterns.  */
++
++bool
+ regrename_do_replace (struct du_head *head, int reg)
+ {
+   struct du_chain *chain;
+@@ -950,22 +964,26 @@ regrename_do_replace (struct du_head *head, int reg)
+       int reg_ptr = REG_POINTER (*chain->loc);
+ 
+       if (DEBUG_INSN_P (chain->insn) && REGNO (*chain->loc) != base_regno)
+-	INSN_VAR_LOCATION_LOC (chain->insn) = gen_rtx_UNKNOWN_VAR_LOC ();
++	validate_change (chain->insn, &(INSN_VAR_LOCATION_LOC (chain->insn)),
++			 gen_rtx_UNKNOWN_VAR_LOC (), true);
+       else
+ 	{
+-	  *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg);
++	  validate_change (chain->insn, chain->loc, 
++			   gen_raw_REG (GET_MODE (*chain->loc), reg), true);
+ 	  if (regno >= FIRST_PSEUDO_REGISTER)
+ 	    ORIGINAL_REGNO (*chain->loc) = regno;
+ 	  REG_ATTRS (*chain->loc) = attr;
+ 	  REG_POINTER (*chain->loc) = reg_ptr;
+ 	}
+-
+-      df_insn_rescan (chain->insn);
+     }
+ 
++  if (!apply_change_group ())
++    return false;
++
+   mode = GET_MODE (*head->first->loc);
+   head->regno = reg;
+   head->nregs = hard_regno_nregs[reg][mode];
++  return true;
+ }
+ 
+ 
+--- a/src/gcc/regrename.h
++++ b/src/gcc/regrename.h
+@@ -91,6 +91,6 @@ extern void regrename_analyze (bitmap);
+ extern du_head_p regrename_chain_from_id (unsigned int);
+ extern int find_rename_reg (du_head_p, enum reg_class, HARD_REG_SET *, int,
+ 			    bool);
+-extern void regrename_do_replace (du_head_p, int);
++extern bool regrename_do_replace (du_head_p, int);
+ 
+ #endif
+--- a/src/gcc/rtlanal.c
++++ b/src/gcc/rtlanal.c
+@@ -104,7 +104,10 @@ generic_subrtx_iterator <T>::add_single_to_queue (array_type &array,
+ 	  return base;
+ 	}
+       gcc_checking_assert (i == LOCAL_ELEMS);
+-      vec_safe_grow (array.heap, i + 1);
++      /* A previous iteration might also have moved from the stack to the
++	 heap, in which case the heap array will already be big enough.  */
++      if (vec_safe_length (array.heap) <= i)
++	vec_safe_grow (array.heap, i + 1);
+       base = array.heap->address ();
+       memcpy (base, array.stack, sizeof (array.stack));
+       base[LOCAL_ELEMS] = x;
+@@ -3361,10 +3364,7 @@ subreg_get_info (unsigned int xregno, machine_mode xmode,
+       machine_mode xmode_unit;
+ 
+       nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
+-      if (GET_MODE_INNER (xmode) == VOIDmode)
+-	xmode_unit = xmode;
+-      else
+-	xmode_unit = GET_MODE_INNER (xmode);
++      xmode_unit = GET_MODE_INNER (xmode);
+       gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
+       gcc_assert (nregs_xmode
+ 		  == (GET_MODE_NUNITS (xmode)
+--- a/src/gcc/sched-deps.c
++++ b/src/gcc/sched-deps.c
+@@ -2859,7 +2859,7 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx_insn *insn)
+     sched_deps_info->finish_rhs ();
+ }
+ 
+-/* Try to group two fuseable insns together to prevent scheduler
++/* Try to group two fusible insns together to prevent scheduler
+    from scheduling them apart.  */
+ 
+ static void
+--- a/src/gcc/sched-int.h
++++ b/src/gcc/sched-int.h
+@@ -811,8 +811,17 @@ struct autopref_multipass_data_
+ {
+   /* Base part of memory address.  */
+   rtx base;
+-  /* Memory offset.  */
+-  int offset;
++
++  /* Memory offsets from the base.  For single simple sets
++     only min_offset is valid.  For multi-set insns min_offset
++     and max_offset record the minimum and maximum offsets from the same
++     base among the sets inside the PARALLEL.  */
++  int min_offset;
++  int max_offset;
++
++  /* True if this is a load/store-multiple instruction.  */
++  bool multi_mem_insn_p;
++
+   /* Entry status.  */
+   enum autopref_multipass_data_status status;
+ };
+--- a/src/gcc/simplify-rtx.c
++++ b/src/gcc/simplify-rtx.c
+@@ -847,6 +847,32 @@ simplify_unary_operation (enum rtx_code code, machine_mode mode,
+   return simplify_unary_operation_1 (code, mode, op);
+ }
+ 
++/* Return true if FLOAT or UNSIGNED_FLOAT operation OP is known
++   to be exact.  */
++
++static bool
++exact_int_to_float_conversion_p (const_rtx op)
++{
++  int out_bits = significand_size (GET_MODE_INNER (GET_MODE (op)));
++  machine_mode op0_mode = GET_MODE (XEXP (op, 0));
++  /* Constants shouldn't reach here.  */
++  gcc_assert (op0_mode != VOIDmode);
++  int in_prec = GET_MODE_UNIT_PRECISION (op0_mode);
++  int in_bits = in_prec;
++  if (HWI_COMPUTABLE_MODE_P (op0_mode))
++    {
++      unsigned HOST_WIDE_INT nonzero = nonzero_bits (XEXP (op, 0), op0_mode);
++      if (GET_CODE (op) == FLOAT)
++	in_bits -= num_sign_bit_copies (XEXP (op, 0), op0_mode);
++      else if (GET_CODE (op) == UNSIGNED_FLOAT)
++	in_bits = wi::min_precision (wi::uhwi (nonzero, in_prec), UNSIGNED);
++      else
++	gcc_unreachable ();
++      in_bits -= wi::ctz (wi::uhwi (nonzero, in_prec));
++    }
++  return in_bits <= out_bits;
++}
++
+ /* Perform some simplifications we can do even if the operands
+    aren't constant.  */
+ static rtx
+@@ -978,6 +1004,32 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
+       if (GET_CODE (op) == NEG)
+ 	return XEXP (op, 0);
+ 
++      /* (neg (x ? (neg y) : y)) == !x ? (neg y) : y.
++	 If comparison is not reversible use
++	 x ? y : (neg y).  */
++      if (GET_CODE (op) == IF_THEN_ELSE)
++	{
++	  rtx cond = XEXP (op, 0);
++	  rtx true_rtx = XEXP (op, 1);
++	  rtx false_rtx = XEXP (op, 2);
++
++	  if ((GET_CODE (true_rtx) == NEG
++	       && rtx_equal_p (XEXP (true_rtx, 0), false_rtx))
++	       || (GET_CODE (false_rtx) == NEG
++		   && rtx_equal_p (XEXP (false_rtx, 0), true_rtx)))
++	    {
++	      if (reversed_comparison_code (cond, NULL_RTX) != UNKNOWN)
++		temp = reversed_comparison (cond, mode);
++	      else
++		{
++		  temp = cond;
++		  std::swap (true_rtx, false_rtx);
++		}
++	      return simplify_gen_ternary (IF_THEN_ELSE, mode,
++					    mode, temp, true_rtx, false_rtx);
++	    }
++	}
++
+       /* (neg (plus X 1)) can become (not X).  */
+       if (GET_CODE (op) == PLUS
+ 	  && XEXP (op, 1) == const1_rtx)
+@@ -1171,7 +1223,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
+          = (float_truncate:SF foo:DF).
+ 
+          (float_truncate:DF (float_extend:XF foo:SF))
+-         = (float_extend:SF foo:DF).  */
++         = (float_extend:DF foo:SF).  */
+       if ((GET_CODE (op) == FLOAT_TRUNCATE
+ 	   && flag_unsafe_math_optimizations)
+ 	  || GET_CODE (op) == FLOAT_EXTEND)
+@@ -1183,14 +1235,10 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
+ 				   XEXP (op, 0), mode);
+ 
+       /*  (float_truncate (float x)) is (float x)  */
+-      if (GET_CODE (op) == FLOAT
++      if ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT)
+ 	  && (flag_unsafe_math_optimizations
+-	      || (SCALAR_FLOAT_MODE_P (GET_MODE (op))
+-		  && ((unsigned)significand_size (GET_MODE (op))
+-		      >= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0)))
+-			  - num_sign_bit_copies (XEXP (op, 0),
+-						 GET_MODE (XEXP (op, 0))))))))
+-	return simplify_gen_unary (FLOAT, mode,
++	      || exact_int_to_float_conversion_p (op)))
++	return simplify_gen_unary (GET_CODE (op), mode,
+ 				   XEXP (op, 0),
+ 				   GET_MODE (XEXP (op, 0)));
+ 
+@@ -1221,12 +1269,8 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
+ 	  rounding can't happen.
+           */
+       if (GET_CODE (op) == FLOAT_EXTEND
+-	  || (GET_CODE (op) == FLOAT
+-	      && SCALAR_FLOAT_MODE_P (GET_MODE (op))
+-	      && ((unsigned)significand_size (GET_MODE (op))
+-		  >= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0)))
+-		      - num_sign_bit_copies (XEXP (op, 0),
+-					     GET_MODE (XEXP (op, 0)))))))
++	  || ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT)
++	      && exact_int_to_float_conversion_p (op)))
+ 	return simplify_gen_unary (GET_CODE (op), mode,
+ 				   XEXP (op, 0),
+ 				   GET_MODE (XEXP (op, 0)));
+@@ -1593,7 +1637,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
+       if (CONST_SCALAR_INT_P (op) || CONST_DOUBLE_AS_FLOAT_P (op)
+ 	  || GET_CODE (op) == CONST_VECTOR)
+ 	{
+-          int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++	  int elt_size = GET_MODE_UNIT_SIZE (mode);
+           unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ 	  rtvec v = rtvec_alloc (n_elts);
+ 	  unsigned int i;
+@@ -1604,7 +1648,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
+ 	  else
+ 	    {
+ 	      machine_mode inmode = GET_MODE (op);
+-              int in_elt_size = GET_MODE_SIZE (GET_MODE_INNER (inmode));
++	      int in_elt_size = GET_MODE_UNIT_SIZE (inmode);
+               unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
+ 
+ 	      gcc_assert (in_n_elts < n_elts);
+@@ -1618,10 +1662,10 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
+ 
+   if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)
+     {
+-      int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++      int elt_size = GET_MODE_UNIT_SIZE (mode);
+       unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+       machine_mode opmode = GET_MODE (op);
+-      int op_elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
++      int op_elt_size = GET_MODE_UNIT_SIZE (opmode);
+       unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
+       rtvec v = rtvec_alloc (n_elts);
+       unsigned int i;
+@@ -3347,7 +3391,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 	      rtx op1 = XEXP (trueop0, 1);
+ 
+ 	      machine_mode opmode = GET_MODE (op0);
+-	      int elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
++	      int elt_size = GET_MODE_UNIT_SIZE (opmode);
+ 	      int n_elts = GET_MODE_SIZE (opmode) / elt_size;
+ 
+ 	      int i = INTVAL (XVECEXP (trueop1, 0, 0));
+@@ -3377,7 +3421,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 		  /* Find out number of elements of each operand.  */
+ 		  if (VECTOR_MODE_P (mode00))
+ 		    {
+-		      elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode00));
++		      elt_size = GET_MODE_UNIT_SIZE (mode00);
+ 		      n_elts00 = GET_MODE_SIZE (mode00) / elt_size;
+ 		    }
+ 		  else
+@@ -3385,7 +3429,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 
+ 		  if (VECTOR_MODE_P (mode01))
+ 		    {
+-		      elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode01));
++		      elt_size = GET_MODE_UNIT_SIZE (mode01);
+ 		      n_elts01 = GET_MODE_SIZE (mode01) / elt_size;
+ 		    }
+ 		  else
+@@ -3426,7 +3470,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 
+ 	  if (GET_CODE (trueop0) == CONST_VECTOR)
+ 	    {
+-	      int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++	      int elt_size = GET_MODE_UNIT_SIZE (mode);
+ 	      unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ 	      rtvec v = rtvec_alloc (n_elts);
+ 	      unsigned int i;
+@@ -3507,7 +3551,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 	      rtx subop1 = XEXP (trueop0, 1);
+ 	      machine_mode mode0 = GET_MODE (subop0);
+ 	      machine_mode mode1 = GET_MODE (subop1);
+-	      int li = GET_MODE_SIZE (GET_MODE_INNER (mode0));
++	      int li = GET_MODE_UNIT_SIZE (mode0);
+ 	      int l0 = GET_MODE_SIZE (mode0) / li;
+ 	      int l1 = GET_MODE_SIZE (mode1) / li;
+ 	      int i0 = INTVAL (XVECEXP (trueop1, 0, 0));
+@@ -3667,7 +3711,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
+ 		|| CONST_SCALAR_INT_P (trueop1) 
+ 		|| CONST_DOUBLE_AS_FLOAT_P (trueop1)))
+ 	  {
+-	    int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++	    int elt_size = GET_MODE_UNIT_SIZE (mode);
+ 	    unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ 	    rtvec v = rtvec_alloc (n_elts);
+ 	    unsigned int i;
+@@ -5304,7 +5348,7 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode,
+       trueop2 = avoid_constant_pool_reference (op2);
+       if (CONST_INT_P (trueop2))
+ 	{
+-	  int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
++	  int elt_size = GET_MODE_UNIT_SIZE (mode);
+ 	  unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ 	  unsigned HOST_WIDE_INT sel = UINTVAL (trueop2);
+ 	  unsigned HOST_WIDE_INT mask;
+@@ -5442,7 +5486,7 @@ simplify_immed_subreg (machine_mode outermode, rtx op,
+     {
+       num_elem = CONST_VECTOR_NUNITS (op);
+       elems = &CONST_VECTOR_ELT (op, 0);
+-      elem_bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (innermode));
++      elem_bitsize = GET_MODE_UNIT_BITSIZE (innermode);
+     }
+   else
+     {
+@@ -5599,21 +5643,17 @@ simplify_immed_subreg (machine_mode outermode, rtx op,
+   value_start = byte * (BITS_PER_UNIT / value_bit);
+ 
+   /* Re-pack the value.  */
++  num_elem = GET_MODE_NUNITS (outermode);
+ 
+   if (VECTOR_MODE_P (outermode))
+     {
+-      num_elem = GET_MODE_NUNITS (outermode);
+       result_v = rtvec_alloc (num_elem);
+       elems = &RTVEC_ELT (result_v, 0);
+-      outer_submode = GET_MODE_INNER (outermode);
+     }
+   else
+-    {
+-      num_elem = 1;
+-      elems = &result_s;
+-      outer_submode = outermode;
+-    }
++    elems = &result_s;
+ 
++  outer_submode = GET_MODE_INNER (outermode);
+   outer_class = GET_MODE_CLASS (outer_submode);
+   elem_bitsize = GET_MODE_BITSIZE (outer_submode);
+ 
+--- a/src/gcc/stor-layout.c
++++ b/src/gcc/stor-layout.c
+@@ -506,7 +506,7 @@ bitwise_type_for_mode (machine_mode mode)
+   if (COMPLEX_MODE_P (mode))
+     return build_complex_type (inner_type);
+ 
+-  gcc_checking_assert (GET_MODE_INNER (mode) == VOIDmode);
++  gcc_checking_assert (GET_MODE_INNER (mode) == mode);
+   return inner_type;
+ }
+ 
+@@ -563,18 +563,6 @@ get_mode_alignment (machine_mode mode)
+   return MIN (BIGGEST_ALIGNMENT, MAX (1, mode_base_align[mode]*BITS_PER_UNIT));
+ }
+ 
+-/* Return the precision of the mode, or for a complex or vector mode the
+-   precision of the mode of its elements.  */
+-
+-unsigned int
+-element_precision (machine_mode mode)
+-{
+-  if (COMPLEX_MODE_P (mode) || VECTOR_MODE_P (mode))
+-    mode = GET_MODE_INNER (mode);
+-
+-  return GET_MODE_PRECISION (mode);
+-}
+-
+ /* Return the natural mode of an array, given that it is SIZE bytes in
+    total and has elements of type ELEM_TYPE.  */
+ 
+--- a/src/gcc/target.def
++++ b/src/gcc/target.def
+@@ -1975,7 +1975,7 @@ merging.",
+ DEFHOOKPOD
+ (attribute_table,
+  "If defined, this target hook points to an array of @samp{struct\n\
+-attribute_spec} (defined in @file{tree.h}) specifying the machine\n\
++attribute_spec} (defined in @file{tree-core.h}) specifying the machine\n\
+ specific attributes for this target and some of the restrictions on the\n\
+ entities to which these attributes are applied and the arguments they\n\
+ take.",
+--- a/src/gcc/testsuite/ChangeLog
++++ b/src/gcc/testsuite/ChangeLog
+@@ -469,10 +469,6 @@
+ 	PR c++/70393
+ 	* g++.dg/cpp0x/constexpr-virtual6.C: New.
+ 
+-2016-03-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+-
+-	* gcc.target/arm/atomic_loaddi_relaxed_cond.c: New test.
+-
+ 2016-03-31  Kirill Yukhin  <kirill.yukhin@intel.com>
+ 
+ 	PR target/70453
+--- a/src/gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess1.c
++++ b/src/gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess1.c
+@@ -1,6 +1,7 @@
+ /* Test -Wsizeof-pointer-memaccess warnings.  */
+ /* { dg-do compile } */
+ /* { dg-options "-Wall -Wno-sizeof-array-argument" } */
++/* { dg-options "-Wall -Wno-sizeof-array-argument -Wno-c++-compat" { target c } } */
+ 
+ typedef __SIZE_TYPE__ size_t;
+ #ifdef __cplusplus
+--- a/src/gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess2.c
++++ b/src/gcc/testsuite/c-c++-common/Wsizeof-pointer-memaccess2.c
+@@ -1,6 +1,7 @@
+ /* Test -Wsizeof-pointer-memaccess warnings.  */
+ /* { dg-do compile } */
+ /* { dg-options "-Wall -O2 -Wno-sizeof-array-argument" } */
++/* { dg-options "-Wall -O2 -Wno-sizeof-array-argument -Wno-c++-compat" {target c} } */
+ 
+ #define bos(ptr) __builtin_object_size (ptr, 1)
+ #define bos0(ptr) __builtin_object_size (ptr, 0)
+--- a/src/gcc/testsuite/c-c++-common/asan/aggressive-opts.c
++++ b/src/gcc/testsuite/c-c++-common/asan/aggressive-opts.c
+@@ -25,4 +25,3 @@ Perl_do_sv_dump()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ASAN_CHECK" 2 "asan1" } } */
+-/* { dg-final { cleanup-tree-dump "asan1" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/inc.c
++++ b/src/gcc/testsuite/c-c++-common/asan/inc.c
+@@ -18,4 +18,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-times "ASAN_" 1 "asan0" } }  */
+ /* { dg-final { scan-tree-dump "ASAN_CHECK \\(.*, 4\\);" "asan0" } }  */
+-/* { dg-final { cleanup-tree-dump "asan0" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-asan-check-glob.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-asan-check-glob.c
+@@ -10,4 +10,3 @@ int foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ASAN_CHECK" 0 "asan1" } } */
+-/* { dg-final { cleanup-tree-dump "asan1" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-1.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-1.c
+@@ -57,4 +57,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store1" 3 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-not "__builtin___asan_report_load1" "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-10.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-10.c
+@@ -15,4 +15,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store4" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-11.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-11.c
+@@ -17,4 +17,3 @@ foo ()
+ 
+ /* { dg-final { scan-tree-dump-not "& 7" "sanopt" } } */
+ /* { dg-final { scan-tree-dump-not "__builtin___asan_report_store" "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-12.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-12.c
+@@ -13,4 +13,3 @@ foo (char *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store1" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-13.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-13.c
+@@ -12,4 +12,3 @@ foo (char *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store1" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-14.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-14.c
+@@ -12,4 +12,3 @@ foo (char *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "__builtin___asan_report_store1" "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-15.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-15.c
+@@ -13,4 +13,3 @@ foo (char *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store1" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-3.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-3.c
+@@ -15,4 +15,3 @@ foo (__INT32_TYPE__ *p)
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report" 2 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load1" 1 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_store" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-4.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-4.c
+@@ -14,4 +14,3 @@ foo  (int *a, char *b, char *c)
+ /* { dg-final { scan-tree-dump-times "& 7" 2 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load1" 1 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load4" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-5.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-5.c
+@@ -13,4 +13,3 @@ foo  (int *a, char *b, char *c)
+ 
+ /* { dg-final { scan-tree-dump-times "& 7" 1 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load4" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-6.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-6.c
+@@ -16,4 +16,3 @@ foo  (int *a, char *b, char *c)
+ /* { dg-final { scan-tree-dump-times "& 7" 4 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load1" 2 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load4" 2 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-7.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-7.c
+@@ -20,4 +20,3 @@ foo  (int *a, char *b, char *c)
+ 
+ /* { dg-final { scan-tree-dump-not "& 7" "sanopt" } } */
+ /* { dg-final { scan-tree-dump-not "__builtin___asan_report_load4" "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-8.c
++++ b/src/gcc/testsuite/c-c++-common/asan/no-redundant-instrumentation-8.c
+@@ -17,4 +17,3 @@ foo  (int *a, char *b, char *c)
+ /* { dg-final { scan-tree-dump-times "& 7" 4 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load1" 2 "sanopt" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin___asan_report_load4" 2 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/red-align-1.c
++++ b/src/gcc/testsuite/c-c++-common/asan/red-align-1.c
+@@ -17,4 +17,3 @@ int foo (struct st * s_p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "& 7" 0 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/red-align-2.c
++++ b/src/gcc/testsuite/c-c++-common/asan/red-align-2.c
+@@ -17,4 +17,3 @@ int foo (struct st * s_p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "& 7" 1 "sanopt" } } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/shadow-offset-1.c
++++ b/src/gcc/testsuite/c-c++-common/asan/shadow-offset-1.c
+@@ -8,4 +8,3 @@ int f (int *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "12345" "sanopt" }  } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/asan/swapcontext-test-1.c
++++ b/src/gcc/testsuite/c-c++-common/asan/swapcontext-test-1.c
+@@ -52,9 +52,9 @@ volatile int zero = 0;
+ int main(int argc, char **argv) {
+   int ret = 0;
+   ret += Run(zero, 0);
+-  printf("Test1 passed\n");
++  fprintf(stderr, "Test1 passed\n");
+   ret += Run(zero, 1);
+-  printf("Test2 passed\n");
++  fprintf(stderr, "Test2 passed\n");
+   return ret;
+ }
+ 
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/PS/clauses2.c
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/PS/clauses2.c
+@@ -15,4 +15,3 @@ void foo()
+ /* { dg-final { scan-tree-dump-times "linear\\(j:4\\)" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "linear\\(k:1\\)" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "safelen\\(4\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/PS/safelen.c
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/PS/safelen.c
+@@ -11,4 +11,3 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "safelen\\(8\\)" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/PS/vectorlength-3.c
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/PS/vectorlength-3.c
+@@ -11,4 +11,3 @@ foo (int *a, int *b, int *c)
+     a[i] = b[i] * c[i];
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/c-c++-common/cpp/pr63831-2.c
++++ b/src/gcc/testsuite/c-c++-common/cpp/pr63831-2.c
+@@ -4,4 +4,3 @@
+ 
+ #include "pr63831-1.c"
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/c-c++-common/fold-bitand-4.c
++++ b/src/gcc/testsuite/c-c++-common/fold-bitand-4.c
+@@ -42,4 +42,3 @@ int f5 (int i)
+ /* { dg-final { scan-tree-dump-times "\& 15" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return \[^\n0-9\]*0;" 2 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\& 7" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/fold-divmul-1.c
++++ b/src/gcc/testsuite/c-c++-common/fold-divmul-1.c
+@@ -8,4 +8,3 @@ fx (int *b, int *e)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "/\\\[ex\\\]" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/acc_on_device-2-off.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/acc_on_device-2-off.c
+@@ -22,4 +22,3 @@ f (void)
+ /* Without -fopenacc, we're expecting one call.
+    { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 1 "expand" } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/acc_on_device-2.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/acc_on_device-2.c
+@@ -34,4 +34,3 @@ f (void)
+ 
+    { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 0 "expand" { xfail { c || c++ } } } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/loop-private-1.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/loop-private-1.c
+@@ -11,4 +11,3 @@ f (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc loop collapse\\(2\\) private\\(j\\) private\\(i\\)" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/pcopy.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/pcopy.c
+@@ -8,4 +8,3 @@ f (char *cp)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(tofrom:\\*\\(cp \\+ 3\\) \\\[len: 5]\\) map\\(alloc:cp \\\[pointer assign, bias: 3]\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/pcopyin.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/pcopyin.c
+@@ -8,4 +8,3 @@ f (char *cp)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(to:\\*\\(cp \\+ 4\\) \\\[len: 6]\\) map\\(alloc:cp \\\[pointer assign, bias: 4]\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/pcopyout.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/pcopyout.c
+@@ -8,4 +8,3 @@ f (char *cp)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(from:\\*\\(cp \\+ 5\\) \\\[len: 7]\\) map\\(alloc:cp \\\[pointer assign, bias: 5]\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/pcreate.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/pcreate.c
+@@ -8,4 +8,3 @@ f (char *cp)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(alloc:\\*\\(cp \\+ 6\\) \\\[len: 8]\\) map\\(alloc:cp \\\[pointer assign, bias: 6]\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/goacc/present-1.c
++++ b/src/gcc/testsuite/c-c++-common/goacc/present-1.c
+@@ -8,4 +8,3 @@ f (char *cp)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(force_present:\\*\\(cp \\+ 7\\) \\\[len: 9]\\) map\\(alloc:cp \\\[pointer assign, bias: 7]\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/c-c++-common/gomp/atomic-10.c
++++ b/src/gcc/testsuite/c-c++-common/gomp/atomic-10.c
+@@ -22,4 +22,3 @@ foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__atomic_fetch_add" 4 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/c-c++-common/gomp/atomic-12.c
++++ b/src/gcc/testsuite/c-c++-common/gomp/atomic-12.c
+@@ -4,7 +4,6 @@
+ /* atomicvar should never be referenced in between the barrier and
+    following #pragma omp atomic_load.  */
+ /* { dg-final { scan-tree-dump-not "barrier\[^#\]*atomicvar" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+ #ifdef __cplusplus
+ bool atomicvar, c;
+--- a/src/gcc/testsuite/c-c++-common/gomp/atomic-13.c
++++ b/src/gcc/testsuite/c-c++-common/gomp/atomic-13.c
+@@ -4,6 +4,5 @@
+ /* atomicvar should never be referenced in between the barrier and
+    following #pragma omp atomic_load.  */
+ /* { dg-final { scan-tree-dump-not "barrier\[^#\]*atomicvar" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+ #include "atomic-12.c"
+--- a/src/gcc/testsuite/c-c++-common/gomp/atomic-3.c
++++ b/src/gcc/testsuite/c-c++-common/gomp/atomic-3.c
+@@ -11,4 +11,3 @@ void f1(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "xyzzy, 4" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/c-c++-common/gomp/atomic-9.c
++++ b/src/gcc/testsuite/c-c++-common/gomp/atomic-9.c
+@@ -11,4 +11,3 @@ void f1(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__atomic_fetch_add" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/c-c++-common/pr46562-2.c
++++ b/src/gcc/testsuite/c-c++-common/pr46562-2.c
+@@ -10,4 +10,3 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/c-c++-common/pr46562.c
++++ b/src/gcc/testsuite/c-c++-common/pr46562.c
+@@ -10,4 +10,3 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/c-c++-common/pr56493.c
++++ b/src/gcc/testsuite/c-c++-common/pr56493.c
+@@ -13,4 +13,3 @@ foo (void)
+ 
+ /* Verify we narrow the addition from unsigned long long to unsigned int type.  */
+ /* { dg-final { scan-tree-dump "  (\[a-zA-Z._0-9]*) = \\(unsigned int\\) \[^;\n\r]*;.*  (\[a-zA-Z._0-9]*) = \\(unsigned int\\) \[^;\n\r]*;.* = \\1 \\+ \\2;" "gimple" { target { ilp32 || lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/c-c++-common/pr58346-1.c
++++ b/src/gcc/testsuite/c-c++-common/pr58346-1.c
+@@ -1,5 +1,6 @@
+ /* PR c/58346 */
+ /* { dg-do compile } */
++/* { dg-options "-Wno-c++-compat" { target c } } */
+ 
+ struct U {
+ #ifdef __cplusplus
+--- a/src/gcc/testsuite/c-c++-common/raw-string-11.c
++++ b/src/gcc/testsuite/c-c++-common/raw-string-11.c
+@@ -10,4 +10,3 @@ int main ()
+ 			   sizeof ("foo%sbar%sfred%sbob?""?""?""?""?"));
+ }
+ 
+-// { dg-final { cleanup-saved-temps } }
+--- a/src/gcc/testsuite/c-c++-common/raw-string-18.c
++++ b/src/gcc/testsuite/c-c++-common/raw-string-18.c
+@@ -18,4 +18,3 @@ main ()
+ 
+ /* Verify call to foo is on line 15.  */
+ /* { dg-final { scan-tree-dump "c:15:\[^\n\r\]*foo" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/raw-string-19.c
++++ b/src/gcc/testsuite/c-c++-common/raw-string-19.c
+@@ -18,5 +18,3 @@ main ()
+ 
+ /* Verify call to foo is on line 15.  */
+ /* { dg-final { scan-tree-dump "c:15:\[^\n\r\]*foo" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/c-c++-common/restrict-1.c
++++ b/src/gcc/testsuite/c-c++-common/restrict-1.c
+@@ -17,4 +17,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/restrict-2.c
++++ b/src/gcc/testsuite/c-c++-common/restrict-2.c
+@@ -11,4 +11,3 @@ void foo (float * __restrict__ a, float * __restrict__ b, int n, int j)
+ /* We should move the RHS of the store out of the loop.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Moving statement" 11 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/c-c++-common/restrict-4.c
++++ b/src/gcc/testsuite/c-c++-common/restrict-4.c
+@@ -16,4 +16,3 @@ void bar(struct Foo f, int * __restrict__ q)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/c-c++-common/rotate-1.c
++++ b/src/gcc/testsuite/c-c++-common/rotate-1.c
+@@ -2,7 +2,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-ipa-icf -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "r\[<>]\[<>]" 96 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ unsigned int
+ f1 (unsigned int x, unsigned int y)
+--- a/src/gcc/testsuite/c-c++-common/rotate-2.c
++++ b/src/gcc/testsuite/c-c++-common/rotate-2.c
+@@ -4,7 +4,6 @@
+ /* Rotates should be recognized only in functions with | instead of + or ^,
+    or in functions that have constant shift counts (unused attribute on y).  */
+ /* { dg-final { scan-tree-dump-times "r\[<>]\[<>]" 48 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ unsigned int
+ f1 (unsigned int x, unsigned int y)
+--- a/src/gcc/testsuite/c-c++-common/rotate-3.c
++++ b/src/gcc/testsuite/c-c++-common/rotate-3.c
+@@ -2,7 +2,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fno-ipa-icf -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "r\[<>]\[<>]" 96 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ unsigned int
+ f1 (unsigned int x, int y)
+--- a/src/gcc/testsuite/c-c++-common/rotate-4.c
++++ b/src/gcc/testsuite/c-c++-common/rotate-4.c
+@@ -4,7 +4,6 @@
+ /* Rotates should be recognized only in functions with | instead of + or ^,
+    or in functions that have constant shift counts (unused attribute on y).  */
+ /* { dg-final { scan-tree-dump-times "r\[<>]\[<>]" 48 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ unsigned int
+ f1 (unsigned int x, int y)
+--- a/src/gcc/testsuite/c-c++-common/tm/20100127.c
++++ b/src/gcc/testsuite/c-c++-common/tm/20100127.c
+@@ -33,4 +33,3 @@ void test(void *data)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "_ITM_W.*nontrxn" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/ipa-1.c
++++ b/src/gcc/testsuite/c-c++-common/tm/ipa-1.c
+@@ -20,4 +20,3 @@ int set_remove(void)
+ 
+ 
+ /* { dg-final { scan-ipa-dump-not "getTMCloneOrIrrevocable" "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/malloc.c
++++ b/src/gcc/testsuite/c-c++-common/tm/malloc.c
+@@ -23,4 +23,3 @@ void foobar(void)
+ /* { dg-final { scan-tree-dump-times "__builtin__ITM_malloc" 1 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin__ITM_calloc" 1 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin__ITM_free" 2 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/pr54893.c
++++ b/src/gcc/testsuite/c-c++-common/tm/pr54893.c
+@@ -13,4 +13,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "GTMA_DOES_GO_IRREVOCABLE" "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/trxn-expr-3.c
++++ b/src/gcc/testsuite/c-c++-common/tm/trxn-expr-3.c
+@@ -11,4 +11,3 @@ int f2()
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 2 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_commitTransaction" 4 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/trxn-expr.c
++++ b/src/gcc/testsuite/c-c++-common/tm/trxn-expr.c
+@@ -10,4 +10,3 @@ void foobar(void)
+ 
+ /* { dg-final { scan-tree-dump-times "_ITM_RU.*york" 1 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "_ITM_RU" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/c-c++-common/tm/wrap-1.c
++++ b/src/gcc/testsuite/c-c++-common/tm/wrap-1.c
+@@ -7,4 +7,3 @@ void xyzzy(void) __attribute__((transaction_wrap (orig)));
+ void foo() { __transaction_relaxed { orig (); } }
+ 
+ /* { dg-final { scan-tree-dump-times "xyzzy" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/transparent-union-1.c
++++ b/src/gcc/testsuite/c-c++-common/transparent-union-1.c
+@@ -1,4 +1,5 @@
+ /* PR c++/51228 */
++/* { dg-options "-Wno-c++-compat" { target c } } */
+ 
+ typedef union {} U __attribute__((transparent_union)); /* { dg-warning "ignored" } */
+ 
+--- a/src/gcc/testsuite/c-c++-common/tsan/thread_leak.c
++++ b/src/gcc/testsuite/c-c++-common/tsan/thread_leak.c
+@@ -9,7 +9,7 @@ int main() {
+   pthread_t t;
+   pthread_create(&t, 0, Thread, 0);
+   pthread_join(t, 0);
+-  printf("PASS\n");
++  fprintf(stderr, "PASS\n");
+   return 0;
+ }
+ 
+--- a/src/gcc/testsuite/c-c++-common/ubsan/align-7.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/align-7.c
+@@ -30,4 +30,3 @@ main ()
+ 
+ /* { dg-output "\.c:16:\[0-9]*: \[^\n\r]*member access within misaligned address 0x\[0-9a-fA-F]* for type 'struct S', which requires \[48] byte alignment.*" } */
+ /* { dg-final { scan-tree-dump-times "Optimizing" 4 "sanopt"} } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/ubsan/align-8.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/align-8.c
+@@ -29,4 +29,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing" 4 "sanopt"} } */
+-/* { dg-final { cleanup-tree-dump "sanopt" } } */
+--- a/src/gcc/testsuite/c-c++-common/ubsan/pr63866.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/pr63866.c
+@@ -8,4 +8,3 @@ foo (int x, int y)
+   return x + y;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "cgraph" } } */
+--- a/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-2.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-2.c
+@@ -38,4 +38,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-not "__ubsan_" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "UBSAN_CHECK_" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-3.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-3.c
+@@ -39,4 +39,3 @@ main ()
+ /* { dg-final { scan-tree-dump "__ubsan_" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "__ubsan_\[a-z_\]*_abort" "optimized" } } */
+ /* { dg-final { scan-tree-dump "UBSAN_CHECK_" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-4.c
++++ b/src/gcc/testsuite/c-c++-common/ubsan/sanitize-all-4.c
+@@ -39,4 +39,3 @@ main ()
+ /* { dg-final { scan-tree-dump "__ubsan_\[a-z_\]*_abort" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "__ubsan_\[a-z_\]*\[^et\] " "optimized" } } */
+ /* { dg-final { scan-tree-dump "UBSAN_CHECK_" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/c-c++-common/vector-scalar-2.c
++++ b/src/gcc/testsuite/c-c++-common/vector-scalar-2.c
+@@ -11,4 +11,3 @@ void f (veci *a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\\+ 1" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
++++ b/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
+@@ -13,4 +13,3 @@ int *foo ()
+ }
+ 
+ // { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } }
+-// { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C
++++ b/src/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C
+@@ -13,6 +13,7 @@ void f3 (uint8x8_t a) {}
+ void f4 (uint16x4_t a) {}
+ void f5 (uint32x2_t a) {}
+ void f23 (uint64x1_t a) {}
++void f61 (float16x4_t a) {}
+ void f6 (float32x2_t a) {}
+ void f7 (poly8x8_t a) {}
+ void f8 (poly16x4_t a) {}
+@@ -25,6 +26,7 @@ void f13 (uint8x16_t a) {}
+ void f14 (uint16x8_t a) {}
+ void f15 (uint32x4_t a) {}
+ void f16 (uint64x2_t a) {}
++void f171 (float16x8_t a) {}
+ void f17 (float32x4_t a) {}
+ void f18 (float64x2_t a) {}
+ void f19 (poly8x16_t a) {}
+@@ -42,6 +44,7 @@ void g1 (int8x16_t, int8x16_t) {}
+ // { dg-final { scan-assembler "_Z2f412__Uint16x4_t:" } }
+ // { dg-final { scan-assembler "_Z2f512__Uint32x2_t:" } }
+ // { dg-final { scan-assembler "_Z3f2312__Uint64x1_t:" } }
++// { dg-final { scan-assembler "_Z3f6113__Float16x4_t:" } }
+ // { dg-final { scan-assembler "_Z2f613__Float32x2_t:" } }
+ // { dg-final { scan-assembler "_Z2f711__Poly8x8_t:" } }
+ // { dg-final { scan-assembler "_Z2f812__Poly16x4_t:" } }
+@@ -53,6 +56,7 @@ void g1 (int8x16_t, int8x16_t) {}
+ // { dg-final { scan-assembler "_Z3f1412__Uint16x8_t:" } }
+ // { dg-final { scan-assembler "_Z3f1512__Uint32x4_t:" } }
+ // { dg-final { scan-assembler "_Z3f1612__Uint64x2_t:" } }
++// { dg-final { scan-assembler "_Z4f17113__Float16x8_t:" } }
+ // { dg-final { scan-assembler "_Z3f1713__Float32x4_t:" } }
+ // { dg-final { scan-assembler "_Z3f1813__Float64x2_t:" } }
+ // { dg-final { scan-assembler "_Z3f1912__Poly8x16_t:" } }
+--- a/src/gcc/testsuite/g++.dg/cdce3.C
++++ b/src/gcc/testsuite/g++.dg/cdce3.C
+@@ -4,8 +4,9 @@
+ /* { dg-additional-options "-DLARGE_LONG_DOUBLE" { target large_long_double } } */
+ /* { dg-additional-options "-DGNU_EXTENSION" { target pow10 } } */
+ /* { dg-add-options ieee } */
++/* { dg-final { scan-tree-dump  "cdce3.C:91: note: function call is shrink-wrapped into error conditions\." "cdce" { target pow10 } } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:92: note: function call is shrink-wrapped into error conditions\." "cdce" { target pow10 } } } */
+-/* { dg-final { scan-tree-dump  "cdce3.C:93: note: function call is shrink-wrapped into error conditions\." "cdce" { target pow10 } } } */
++/* { dg-final { scan-tree-dump  "cdce3.C:94: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:95: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:96: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:97: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+@@ -19,8 +20,6 @@
+ /* { dg-final { scan-tree-dump  "cdce3.C:105: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:106: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+ /* { dg-final { scan-tree-dump  "cdce3.C:107: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+-/* { dg-final { scan-tree-dump  "cdce3.C:108: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+-/* { dg-final { cleanup-tree-dump "cdce" } } */
+ 
+ #include <stdlib.h>
+ #include <math.h>
+--- a/src/gcc/testsuite/g++.dg/compat/compat.exp
++++ b/src/gcc/testsuite/g++.dg/compat/compat.exp
+@@ -78,6 +78,7 @@ proc compat-use-tst-compiler { } {
+ 	set ALWAYS_CXXFLAGS $save_always_cxxflags
+ 	set ld_library_path $save_ld_library_path
+ 	set_ld_library_path_env_vars
++	clear_effective_target_cache
+     }
+ }
+ 
+--- a/src/gcc/testsuite/g++.dg/compat/struct-layout-1.exp
++++ b/src/gcc/testsuite/g++.dg/compat/struct-layout-1.exp
+@@ -61,6 +61,7 @@ proc compat-use-alt-compiler { } {
+ 	set ld_library_path $alt_ld_library_path
+ 	set_ld_library_path_env_vars
+ 	restore_gcc_exec_prefix_env_var
++	clear_effective_target_cache
+     }
+ }
+ 
+--- a/src/gcc/testsuite/g++.dg/cpp/paste2.C
++++ b/src/gcc/testsuite/g++.dg/cpp/paste2.C
+@@ -1,7 +1,6 @@
+ // PR preprocessor/57757
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-save-temps" }
+-// { dg-final cleanup-saved-temps }
+ 
+ #define S(x) x
+ extern S("C")void exit (int);
+--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-static.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-static.C
+@@ -12,7 +12,6 @@ struct A
+ A a(42);	    // constexpr constructor allows constant initialization
+ A ar[3] = { { 1 }, { 2 }, { 3 } };
+ // { dg-final { scan-assembler-not "static_initialization" } }
+-// { dg-final cleanup-saved-temps }
+ 
+ int main()
+ {
+--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-static3.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-static3.C
+@@ -1,7 +1,6 @@
+ // Test for constant initialization of class with vtable
+ // { dg-options "-save-temps" }
+ // { dg-final { scan-assembler-not "static_initialization" } }
+-// { dg-final cleanup-saved-temps }
+ // { dg-do run { target c++11 } }
+ 
+ int r = 1;
+--- a/src/gcc/testsuite/g++.dg/cpp0x/gen-attrs-34.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/gen-attrs-34.C
+@@ -16,4 +16,3 @@ unsigned int f4 ()
+ // { dg-final { scan-tree-dump-times "= f1 \\(\\)" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "= f2 \\(\\)" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "= f3 \\(\\)" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist-opt.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist-opt.C
+@@ -2,7 +2,6 @@
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-O2 -fdump-tree-optimized" }
+ // { dg-final { scan-tree-dump-not "_0" "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+ 
+ #include <initializer_list>
+ 
+--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype1.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-decltype1.C
+@@ -2,7 +2,6 @@
+ // We force the gimple dump to trigger use of lang_decl_name.
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-fdump-tree-gimple" }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+ 
+ template < class T > void
+ f (T t)
+--- a/src/gcc/testsuite/g++.dg/cpp0x/stdint.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/stdint.C
+@@ -1,6 +1,6 @@
+ // PR c++/52764
+-// { dg-require-effective-target stdint_types }
+ // { dg-do compile { target c++11 } }
++// { dg-require-effective-target stdint_types }
+ 
+ #include <stdint.h>
+ 
+--- a/src/gcc/testsuite/g++.dg/eh/array1.C
++++ b/src/gcc/testsuite/g++.dg/eh/array1.C
+@@ -14,4 +14,3 @@ void f()
+ }
+ 
+ // { dg-final { scan-tree-dump-times "catch" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/eh/builtin1.C
++++ b/src/gcc/testsuite/g++.dg/eh/builtin1.C
+@@ -29,4 +29,3 @@ bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "resx" 2 "eh" } } */
+-/* { dg-final { cleanup-tree-dump "eh" } } */
+--- a/src/gcc/testsuite/g++.dg/eh/builtin2.C
++++ b/src/gcc/testsuite/g++.dg/eh/builtin2.C
+@@ -28,4 +28,3 @@ bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "resx" 0 "eh" } } */
+-/* { dg-final { cleanup-tree-dump "eh" } } */
+--- a/src/gcc/testsuite/g++.dg/eh/builtin3.C
++++ b/src/gcc/testsuite/g++.dg/eh/builtin3.C
+@@ -16,4 +16,3 @@ bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "resx" 1 "eh" } } */
+-/* { dg-final { cleanup-tree-dump "eh" } } */
+--- a/src/gcc/testsuite/g++.dg/ext/altivec-10.C
++++ b/src/gcc/testsuite/g++.dg/ext/altivec-10.C
+@@ -19,4 +19,3 @@ vector_float f1 = { 1.0, 2.0, 3.0, 4.0 };
+ vector_float_foo = { 3.0, 4.0, 5.0, 6.0 };
+ vector_float_bar_eq { 8.0, 7.0, 6.0, 5.0 };
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/g++.dg/ext/attrib34.C
++++ b/src/gcc/testsuite/g++.dg/ext/attrib34.C
+@@ -16,4 +16,3 @@ unsigned int f4 ()
+ // { dg-final { scan-tree-dump-times "= f1 \\(\\)" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "= f2 \\(\\)" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "= f3 \\(\\)" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/ext/builtin10.C
++++ b/src/gcc/testsuite/g++.dg/ext/builtin10.C
+@@ -53,4 +53,3 @@ f4 (void)
+ // { dg-final { scan-tree-dump-not "strrchr" "optimized" } }
+ // { dg-final { scan-tree-dump-not "strpbrk" "optimized" } }
+ // { dg-final { scan-tree-dump-not "strstr" "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/ext/label13a.C
++++ b/src/gcc/testsuite/g++.dg/ext/label13a.C
+@@ -2,7 +2,6 @@
+ // { dg-do run }
+ // { dg-options "-save-temps" }
+ // { dg-final { scan-assembler "_ZN1CC4Ev" } }
+-// { dg-final cleanup-saved-temps }
+ 
+ int i;
+ struct A { A() {} };
+--- a/src/gcc/testsuite/g++.dg/ext/pr56790-1.C
++++ b/src/gcc/testsuite/g++.dg/ext/pr56790-1.C
+@@ -14,4 +14,3 @@ vec f (void)
+ 
+ /* { dg-final { scan-tree-dump "{ 5, 13 }" "ccp1" } } */
+ /* { dg-final { scan-tree-dump-not "VEC_COND_EXPR" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/ext/vector21.C
++++ b/src/gcc/testsuite/g++.dg/ext/vector21.C
+@@ -36,4 +36,3 @@ void j (vec *x, vec *y)
+ /* { dg-final { scan-tree-dump "MIN_EXPR" "gimple" } } */
+ /* { dg-final { scan-tree-dump "MAX_EXPR" "gimple" } } */
+ /* { dg-final { scan-tree-dump-not "VEC_COND_EXPR" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/ext/vector22.C
++++ b/src/gcc/testsuite/g++.dg/ext/vector22.C
+@@ -19,4 +19,3 @@ void h(vec*a){
+ 
+ /* { dg-final { scan-tree-dump-not "~" "gimple" } } */
+ /* { dg-final { scan-tree-dump-not "VEC_COND_EXPR" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/barrier-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/barrier-1.C
+@@ -15,4 +15,3 @@ void f2(bool p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_barrier" 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/block-0.C
++++ b/src/gcc/testsuite/g++.dg/gomp/block-0.C
+@@ -32,4 +32,3 @@ void foo()
+ }
+ 
+ // { dg-final { scan-tree-dump-times "terminate" 10 "omplower" } }
+-// { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/g++.dg/gomp/critical-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/critical-1.C
+@@ -25,4 +25,3 @@ void foo (void)
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_end" 2 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_name_start" 2 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_name_end" 2 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/flush-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/flush-1.C
+@@ -22,4 +22,3 @@ void f2(bool p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__sync_synchronize" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-10.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-10.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_runtime_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_runtime_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-13.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-13.C
+@@ -15,4 +15,3 @@ void foo(void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "omp_data_o" 0 "lower" } }
+-// { dg-final { cleanup-tree-dump "lower" } }
+--- a/src/gcc/testsuite/g++.dg/gomp/for-4.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-4.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_dynamic_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_dynamic_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-5.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-5.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_guided_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_guided_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-6.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-6.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_runtime_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_runtime_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-7.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-7.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_static_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_static_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-8.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-8.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_dynamic_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_dynamic_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/for-9.C
++++ b/src/gcc/testsuite/g++.dg/gomp/for-9.C
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_guided_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_guided_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/macro-3.C
++++ b/src/gcc/testsuite/g++.dg/gomp/macro-3.C
+@@ -23,4 +23,3 @@ foo (void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "#pragma omp parallel" 4 "omplower" } }
+-// { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/g++.dg/gomp/master-3.C
++++ b/src/gcc/testsuite/g++.dg/gomp/master-3.C
+@@ -10,4 +10,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "omp_get_thread_num" 1 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/openmp-simd-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/openmp-simd-1.C
+@@ -44,4 +44,3 @@ void foo(int n, float *a, float *b)
+ /* { dg-final { scan-tree-dump-not "omp teams" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp target" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp parallel" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/openmp-simd-2.C
++++ b/src/gcc/testsuite/g++.dg/gomp/openmp-simd-2.C
+@@ -42,4 +42,3 @@ void bar(int n, float *a, float *b)
+ /* { dg-final { scan-tree-dump-times "pragma omp simd safelen\\(64\\)" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp parallel" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp for" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/openmp-simd-3.C
++++ b/src/gcc/testsuite/g++.dg/gomp/openmp-simd-3.C
+@@ -12,4 +12,3 @@ int main() {
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "omp" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/ordered-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/ordered-1.C
+@@ -17,4 +17,3 @@ void foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_ordered_start" 2 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_ordered_end" 2 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/g++.dg/gomp/tls-wrap4.C
++++ b/src/gcc/testsuite/g++.dg/gomp/tls-wrap4.C
+@@ -1,8 +1,8 @@
+ // We don't need to call the wrapper through the PLT; we can use a separate
+ // copy per shared object.
+ 
+-// { dg-require-effective-target tls }
+ // { dg-do compile { target c++11 } }
++// { dg-require-effective-target tls }
+ // { dg-options "-fPIC" }
+ // { dg-final { scan-assembler-not "_ZTW1i@PLT" { target i?86-*-* x86_64-*-* } } }
+ 
+--- a/src/gcc/testsuite/g++.dg/gomp/tpl-barrier-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/tpl-barrier-1.C
+@@ -22,4 +22,3 @@ void f3 ()
+ }
+ 
+ // { dg-final { scan-tree-dump-times "GOMP_barrier" 2 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/gomp/tpl-master-1.C
++++ b/src/gcc/testsuite/g++.dg/gomp/tpl-master-1.C
+@@ -27,4 +27,3 @@ void f3 ()
+ 
+ // { dg-final { scan-tree-dump-times "#pragma omp ordered" 1 "gimple" } }
+ // { dg-final { scan-tree-dump-times "#pragma omp master" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/inherit/covariant7.C
++++ b/src/gcc/testsuite/g++.dg/inherit/covariant7.C
+@@ -48,4 +48,3 @@ struct c6 : c0, c3, c4
+ // { dg-final { scan-tree-dump "84    .*c6::_ZTv0_n16_NV2c62f2Ev" "class" { target ilp32 } } }
+ // { dg-final { scan-tree-dump "168   .*c6::_ZTv0_n32_NV2c62f2Ev" "class" { target lp64 } } }
+ 
+-// { dg-final { cleanup-tree-dump "class" } }
+--- a/src/gcc/testsuite/g++.dg/inherit/virtual11.C
++++ b/src/gcc/testsuite/g++.dg/inherit/virtual11.C
+@@ -14,4 +14,3 @@ int foo (int a, int b) {
+   return d.add(a, b);
+ }
+ // { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/init/array34.C
++++ b/src/gcc/testsuite/g++.dg/init/array34.C
+@@ -3,7 +3,6 @@
+ // that need extending.
+ // { dg-options "-fdump-tree-gimple" }
+ // { dg-final { scan-tree-dump-times "Class::Class" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+ 
+ struct Class {
+   Class();
+--- a/src/gcc/testsuite/g++.dg/init/const7.C
++++ b/src/gcc/testsuite/g++.dg/init/const7.C
+@@ -10,4 +10,3 @@ short offsets[1] = {
+ void fn() { }
+ 
+ // { dg-final { scan-tree-dump-not "initialization"  "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/init/new17.C
++++ b/src/gcc/testsuite/g++.dg/init/new17.C
+@@ -34,4 +34,3 @@ void foo(Vector<float, 3> *m)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "= 0\.0" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/init/new19.C
++++ b/src/gcc/testsuite/g++.dg/init/new19.C
+@@ -70,4 +70,3 @@ int c::foo(int f1, int f2, int f3)
+ }
+ 
+ // { dg-final { scan-tree-dump "Replaced.*->ai\\\[0\\\]" "pre" } }
+-// { dg-final { cleanup-tree-dump "pre" } }
+--- a/src/gcc/testsuite/g++.dg/init/pr42556.C
++++ b/src/gcc/testsuite/g++.dg/init/pr42556.C
+@@ -7,4 +7,3 @@ void foo (int a, int b, int c, int d)
+ }
+ 
+ // { dg-final { scan-tree-dump-not "v = {}"  "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/ipa/comdat.C
++++ b/src/gcc/testsuite/g++.dg/ipa/comdat.C
+@@ -12,4 +12,3 @@ inline int t(void)
+ }
+ int (*f)()=t;
+ /* { dg-final { scan-ipa-dump-times "Localizing symbol" 1 "comdats"  } } */
+-/* { dg-final { cleanup-ipa-dump "comdats" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-1.C
+@@ -58,5 +58,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-10.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-10.C
+@@ -28,5 +28,3 @@ void  OnPaint(wxPaintEvent & event) {
+   wxBufferedPaintDC dc;
+ }
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 2 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-11.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-11.C
+@@ -43,4 +43,3 @@ bar ()
+   c + d;
+ }
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-12.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-12.C
+@@ -19,4 +19,3 @@ int main()
+ }
+ 
+ // { dg-final { scan-ipa-dump "Inlined 1 calls, eliminated 1 functions" "inline" } }
+-// { dg-final { cleanup-ipa-dump "inline" } }
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-13.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-13.C
+@@ -17,4 +17,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "ssa"} } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-14.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-14.C
+@@ -31,4 +31,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "A::foo" "ssa"} } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-15.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-15.C
+@@ -36,7 +36,5 @@ main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "speculatively devirtualizing call" "devirt"} } */
+-/* { dg-final { cleanup-ipa-dump "devirt" } } */
+ /* Match if (PROF_6 == foo) to verify that the speculation survived.  */
+ /* { dg-final { scan-tree-dump "== foo" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-16.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-16.C
+@@ -35,4 +35,3 @@ main()
+ /* { dg-final { scan-ipa-dump "builtin_unreachable" "whole-program"} } */
+ /* { dg-final { scan-ipa-dump-not "A::foo" "whole-program"} } */
+ /* { dg-final { scan-ipa-dump-not "A::foo" "whole-program"} } */
+-/* { dg-final { cleanup-ipa-dump "whole-program" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-17.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-17.C
+@@ -40,4 +40,3 @@ main()
+ /* { dg-final { scan-ipa-dump-not "builtin_unreachable" "whole-program"} } */
+ /* { dg-final { scan-ipa-dump "B::foo" "whole-program"} } */
+ /* { dg-final { scan-ipa-dump-not "A::foo" "whole-program"} } */
+-/* { dg-final { cleanup-ipa-dump "whole-program" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-18.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-18.C
+@@ -34,4 +34,3 @@ main()
+ /* { dg-final { scan-tree-dump-not "A::foo" "ssa"} } */
+ /* { dg-final { scan-tree-dump-not "B::foo" "ssa"} } */
+ /* { dg-final { scan-tree-dump "builtin_unreachable" "ssa"} } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-19.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-19.C
+@@ -28,5 +28,4 @@ template <typename T, typename M> const M &C<T, M>::m_fn2(const T &) {
+ 
+ void fn1() { b.m_fn2(0); }
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-2.C
+@@ -59,4 +59,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-20.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-20.C
+@@ -28,4 +28,3 @@ main(void)
+   return 0;
+ }
+ /* { dg-final { scan-tree-dump-not "abort" "release_ssa"  } } */
+-/* { dg-final { cleanup-tree-dump "release_ssa" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-21.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-21.C
+@@ -38,4 +38,3 @@ main()
+   class C c;
+ }
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to" "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-22.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-22.C
+@@ -38,4 +38,3 @@ void update_sources() {
+    vtbl store in destructor.  
+    Previously we devirtualized to C::m_fn1 instead of B::m_fn1.  */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-23.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-23.C
+@@ -46,4 +46,3 @@ main()
+   class C c;
+ }
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to" "cp" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-24.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-24.C
+@@ -37,6 +37,4 @@ C *b = new (C);
+   }
+ }
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "inline" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate passed by reference" 1 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-25.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-25.C
+@@ -24,4 +24,3 @@ void dpr_run(ebs_Object& objectA) {
+   dpr_run(jobL);
+ }
+ /* { dg-final { scan-ipa-dump "Type inconsistent devirtualization" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-26.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-26.C
+@@ -25,4 +25,3 @@ int test(void)
+ /* The call to b->foo() is perfectly devirtualizable because C can not be in construction
+    when &c was used.  */
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "ccp1"  } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-27.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-27.C
+@@ -24,4 +24,3 @@ int test(void)
+   return d->foo()+b->foo();
+ }
+ /* { dg-final { scan-tree-dump "OBJ_TYPE_REF" "optimized"  } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-28.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-28.C
+@@ -14,4 +14,3 @@ void fn1(B* b) {
+ // { dg-final { scan-assembler-not "_ZN1AD2Ev" } }
+ // { dg-final { scan-assembler-not "_ZN1BD0Ev" } }
+ // { dg-final { scan-ipa-dump "Target is artificial" "devirt" } }
+-// { dg-final { cleanup-ipa-dump "devirt" } }
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-3.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-3.C
+@@ -66,5 +66,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-30.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-30.C
+@@ -22,4 +22,3 @@ void f(B* b)
+ }
+ 
+ // { dg-final { scan-ipa-dump-not "Speculatively devirtualizing" "devirt" } }
+-// { dg-final { cleanup-ipa-dump "devirt" } }
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-31.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-31.C
+@@ -13,4 +13,3 @@ m()
+   t();
+ }
+ // { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "ssa" } }
+-// { dg-final { cleanup-tree-dump "ssa" } }
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-32.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-32.C
+@@ -20,4 +20,3 @@ int main()
+   __builtin_printf("%d\n", o.obj()->val());
+ }
+ /* { dg-final { scan-ipa-dump-not "__builtin_unreachable"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-34.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-34.C
+@@ -17,4 +17,3 @@ t(struct B *b)
+ 
+ /* { dg-final { scan-ipa-dump "Speculative targets"  "devirt"  } } */
+ /* { dg-final { scan-ipa-dump "1 speculatively devirtualized"  "devirt"  } } */
+-/* { dg-final { cleanup-ipa-dump "devirt" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-35.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-35.C
+@@ -18,6 +18,4 @@ m(struct B *b)
+ /* { dg-final { scan-tree-dump "converting indirect call to function virtual int B::t"  "fre1"  } } */
+ /* { dg-final { scan-ipa-dump "to virtual int B::t"  "devirt"  } } */
+ /* { dg-final { scan-ipa-dump "1 speculatively devirtualized"  "devirt"  } } */
+-/* { dg-final { cleanup-ipa-dump "devirt" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-36.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-36.C
+@@ -20,6 +20,4 @@ m(struct B *b)
+ /* { dg-final { scan-tree-dump "converting indirect call to function virtual int B::t"  "fre1"  } } */
+ /* { dg-final { scan-ipa-dump "to virtual int B::t"  "devirt"  } } */
+ /* { dg-final { scan-ipa-dump "1 speculatively devirtualized"  "devirt"  } } */
+-/* { dg-final { cleanup-ipa-dump "devirt" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-37.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-37.C
+@@ -34,4 +34,3 @@ t()
+ /* { dg-final { scan-tree-dump "Checking vtbl store:"  "fre2"  } } */
+ /* { dg-final { scan-tree-dump "Function call may change dynamic type:extcall"  "fre2"  } } */
+ /* { dg-final { scan-tree-dump "converting indirect call to function virtual void"  "fre2"  } } */
+-/* { dg-final { cleanup-tree-dump "fre2" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-38.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-38.C
+@@ -28,4 +28,3 @@ void fn1 ()
+       }
+ }
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "ccp1"  } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-39.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-39.C
+@@ -26,4 +26,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "optimized"  } } */
+ /* { dg-final { scan-assembler-not "_ZN3Foo5cloneEv" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-4.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-4.C
+@@ -64,5 +64,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-40.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-40.C
+@@ -20,4 +20,3 @@ A::m_fn1 (UnicodeString &, int &p2, UErrorCode &) const
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "\\n  OBJ_TYPE_REF" "fre2"  } } */
+-/* { dg-final { cleanup-tree-dump "fre2" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-41.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-41.C
+@@ -28,4 +28,3 @@ main()
+    and from callstack we can tell that is is not in construction/destruction.  */
+ /* { dg-final { scan-ipa-dump "Second type is base of first" "inline"  } } */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 1 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-42.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-42.C
+@@ -34,5 +34,3 @@ main()
+ /* { dg-final { scan-tree-dump-times "return 2" 3 "optimized"  } } */
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "optimized"  } } */
+ 
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-43.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-43.C
+@@ -24,4 +24,3 @@ t(struct B *b)
+    FIXME: We could most probably can devirtualize unconditonally because dereference of b in
+    &b->a makes the type known.  GIMPLE does not represent this.  */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a speculative target" 1 "inline" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-44.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-44.C
+@@ -29,4 +29,3 @@ main()
+ /* { dg-final { scan-ipa-dump "Second type is base of first" "inline"  } } */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*A::foo" 1 "inline"  } } */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*B::foo" 1 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-45.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-45.C
+@@ -39,4 +39,3 @@ main()
+ /* One invocation is A::foo () other is B::foo () even though the type is destroyed and rebuilt in test() */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*A::foo" 1 "inline"  } } */
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*B::foo" 1 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-46.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-46.C
+@@ -23,5 +23,3 @@ m()
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*B::foo" 1 "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "optimized"  } } */
+ /* { dg-final { scan-tree-dump-not "abort" "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-47.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-47.C
+@@ -27,5 +27,3 @@ m()
+ /* { dg-final { scan-tree-dump-not "OBJ_TYPE_REF" "optimized"  } } */
+ /* FIXME: We ought to inline thunk.  */
+ /* { dg-final { scan-tree-dump "C::_ZThn" "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-48.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-48.C
+@@ -29,4 +29,3 @@ m()
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target\[^\\n\]*__builtin_unreachable" 1 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-5.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-5.C
+@@ -75,5 +75,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-7.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-7.C
+@@ -85,4 +85,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::foo"  "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-9.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-9.C
+@@ -30,4 +30,3 @@ bar ()
+ /* We optimize out this call just after early passes.  Unfortunately
+    this unreachable removal is not logged in dump file.  */
+ /* { dg-final { scan-ipa-dump-not "OBJ_TYPE_REF" "whole-program" } } */
+-/* { dg-final { cleanup-ipa-dump "whole-program" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-c-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-c-1.C
+@@ -72,5 +72,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*A::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-c-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-c-2.C
+@@ -80,5 +80,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*A::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-c-8.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-c-8.C
+@@ -78,5 +78,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*A::foo"  "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/devirt-g-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/devirt-g-1.C
+@@ -20,5 +20,3 @@ void bah() {foh(&r.s); }
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*S::xyzzy" "cp"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 0 "optimized"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/iinline-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/iinline-1.C
+@@ -46,4 +46,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "String::funcOne\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/iinline-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/iinline-2.C
+@@ -58,4 +58,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "String::funcOne\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/imm-devirt-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/imm-devirt-1.C
+@@ -64,4 +64,3 @@ int main (int argc, char *argv[])
+ /* { dg-final { scan-tree-dump "Inlining int middleman_2" "einline"  } } */
+ /* { dg-final { scan-tree-dump "B::foo \\(" "einline"  } } */
+ /* { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 2 "einline"  } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/imm-devirt-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/imm-devirt-2.C
+@@ -93,4 +93,3 @@ int main (int argc, char *argv[])
+ 
+ /* We fold into thunk of C. Eventually we should inline the thunk.  */
+ /* { dg-final { scan-tree-dump "C::_ZThn\[0-9\]+_N1C3fooEi \\(" "einline"  } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/inline-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/inline-1.C
+@@ -33,4 +33,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me\\(" 1 "inline"} } */
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me_too\\(" 1 "inline"} } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/inline-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/inline-2.C
+@@ -33,4 +33,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me\\(" 1 "inline"} } */
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me_too\\(" 1 "inline"} } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/inline-3.C
++++ b/src/gcc/testsuite/g++.dg/ipa/inline-3.C
+@@ -26,4 +26,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me\\(" 1 "inline"} } */
+ /* { dg-final { scan-ipa-dump-times "Considering void inline_me_too\\(" 1 "inline"} } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-1.C
+@@ -40,4 +40,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-2.C
+@@ -37,4 +37,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-3.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-3.C
+@@ -33,4 +33,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:.*bar.*->.*foo.*" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:.*nula.*->.*zero.*" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 2" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-4.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-4.C
+@@ -45,4 +45,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "\(Unified; Variable alias has been created\)|\(Symbol aliases are not supported by target\)" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: \[67\]" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-5.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-5.C
+@@ -22,4 +22,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ipa-icf-6.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ipa-icf-6.C
+@@ -34,4 +34,3 @@ main()
+   return 0;
+ }
+ /* { dg-final { scan-ipa-dump-times "Unified; Wrapper has been created" 1 "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-1.C
+@@ -61,4 +61,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-2.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-2.C
+@@ -60,4 +60,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-3.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-3.C
+@@ -61,4 +61,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-4.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-4.C
+@@ -67,4 +67,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-5.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-5.C
+@@ -52,4 +52,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "A::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-7.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-7.C
+@@ -77,4 +77,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::.*foo"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-8.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-8.C
+@@ -74,4 +74,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main" "inline"  } } */
+ /* { dg-final { scan-ipa-dump "B::bar\[^\\n\]*inline copy in int main" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/ivinline-9.C
++++ b/src/gcc/testsuite/g++.dg/ipa/ivinline-9.C
+@@ -91,4 +91,3 @@ int main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target.*B::.*foo"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "B::foo\[^\\n\]*inline copy in int main"  "inline"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr60600.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr60600.C
+@@ -32,4 +32,3 @@ void test(top& t)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Type inconsistent devirtualization" "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr60640-4.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr60640-4.C
+@@ -82,4 +82,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "Thunk fixed offset" 2 "cp"} } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr63580.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr63580.C
+@@ -23,4 +23,3 @@ foo (int p1, char p2, int p3, double p4)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr63595.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr63595.C
+@@ -77,4 +77,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr63838.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr63838.C
+@@ -3,7 +3,6 @@
+ // { dg-options "-O2 -fdump-ipa-pure-const" }
+ // { dg-final { scan-ipa-dump-not "Function found to be nothrow: void foo" "pure-const" } }
+ // { dg-final { scan-ipa-dump-not "Function found to be nothrow: void bar" "pure-const" } }
+-// { dg-final { cleanup-ipa-dump "pure-const" } }
+ 
+ __attribute__((noinline, noclone)) static void bar (int);
+ volatile int v;
+--- a/src/gcc/testsuite/g++.dg/ipa/pr64049-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr64049-1.C
+@@ -34,4 +34,3 @@ LocalizedTextSet (LocalizedTextStruct* pTarget, LocalizedTextStruct* pSource)
+ }
+ 
+ /* { dg-final { scan-ipa-dump-not "__builtin_unreachable" "inline" } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/pr64146.C
++++ b/src/gcc/testsuite/g++.dg/ipa/pr64146.C
+@@ -36,4 +36,3 @@ int main (int argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/g++.dg/ipa/type-inheritance-1.C
++++ b/src/gcc/testsuite/g++.dg/ipa/type-inheritance-1.C
+@@ -25,4 +25,3 @@ int t(class A *a)
+ }
+ /* { dg-final { scan-ipa-dump "A::foo"  "visibility"  } } */
+ /* { dg-final { scan-ipa-dump-not "A::bar"  "visibility"  } } */
+-/* { dg-final { cleanup-ipa-dump "visibility" } } */
+--- a/src/gcc/testsuite/g++.dg/opt/nothrow1.C
++++ b/src/gcc/testsuite/g++.dg/opt/nothrow1.C
+@@ -22,4 +22,3 @@ int main()
+ 
+ // The catch block should be optimized away.
+ // { dg-final { scan-tree-dump-times "-42" 0 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/opt/nrv12.C
++++ b/src/gcc/testsuite/g++.dg/opt/nrv12.C
+@@ -21,4 +21,3 @@ P foo (P x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return slot optimization" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/opt/pr23372.C
++++ b/src/gcc/testsuite/g++.dg/opt/pr23372.C
+@@ -12,4 +12,3 @@ struct A {
+ void f(A);
+ void g(A *a) { f(*a); }
+ 
+-// { dg-final { cleanup-tree-dump gimple } }
+--- a/src/gcc/testsuite/g++.dg/opt/pr30965.C
++++ b/src/gcc/testsuite/g++.dg/opt/pr30965.C
+@@ -17,4 +17,3 @@ extern void assign( long& variable, long v )
+ 
+ /* { dg-final { scan-tree-dump-times ";; Function" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "variable_..D. = v_..D." 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/g++.dg/opt/pr69175.C
+@@ -0,0 +1,29 @@
++// PR target/69175
++// { dg-do compile }
++// { dg-options "-O2" }
++// { dg-additional-options "-march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16 -mthumb" { target { arm_hard_vfp_ok && arm_thumb2_ok } } }
++
++struct A { A *c, *d; } a;
++struct B { A *e; A *f; void foo (); };
++void *b;
++
++void
++B::foo ()
++{
++  if (b) 
++    {
++      A *n = (A *) b;
++      if (b == e)
++	if (n == f)
++	  e = __null;
++	else
++	  e->c = __null;
++      else
++	n->d->c = &a;
++      n->d = e;
++      if (e == __null)
++	e = f = n;
++      else
++	e = n;
++    }
++}
+--- a/src/gcc/testsuite/g++.dg/opt/value-init1.C
++++ b/src/gcc/testsuite/g++.dg/opt/value-init1.C
+@@ -2,7 +2,6 @@
+ // { dg-do compile { target c++11 } }
+ // { dg-options "-fdump-tree-gimple" }
+ // { dg-final { scan-tree-dump-times "i = 0" 0 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+ 
+ struct S { S () = default; S (int i); int i; };
+ struct A { S s[100]; };
+--- a/src/gcc/testsuite/g++.dg/other/empty-class.C
++++ b/src/gcc/testsuite/g++.dg/other/empty-class.C
+@@ -14,4 +14,3 @@ obj funky(){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return <retval>;" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/other/final1.C
++++ b/src/gcc/testsuite/g++.dg/other/final1.C
+@@ -24,4 +24,3 @@ void fun(A* a, B* b)
+ 
+ /* { dg-final { scan-tree-dump-times "A::foo" 2 "original"  } } */
+ /* { dg-final { scan-tree-dump-times "B::foo" 2 "original"  } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/g++.dg/other/final2.C
++++ b/src/gcc/testsuite/g++.dg/other/final2.C
+@@ -25,4 +25,3 @@ void fooF2(F2& a) { a(); int m = a; ++a; }
+ // { dg-final { scan-tree-dump-times "F2::operator\\(\\)" 1 "original" } }
+ // { dg-final { scan-tree-dump-times "F2::operator int" 1 "original" } }
+ // { dg-final { scan-tree-dump-times "F2::operator\\+\\+" 1 "original" } }
+-// { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/g++.dg/other/pr47218.C
++++ b/src/gcc/testsuite/g++.dg/other/pr47218.C
+@@ -18,4 +18,3 @@ int main ()
+   return 0;
+ }
+ 
+-// { dg-final { cleanup-saved-temps } }
+--- a/src/gcc/testsuite/g++.dg/other/static11.C
++++ b/src/gcc/testsuite/g++.dg/other/static11.C
+@@ -31,4 +31,3 @@ int main()
+   return r;
+ }
+ 
+-// { dg-final { cleanup-rtl-dump "*" } }
+--- a/src/gcc/testsuite/g++.dg/pch/pch.C
++++ b/src/gcc/testsuite/g++.dg/pch/pch.C
+@@ -5,5 +5,4 @@ int main()
+ {
+   return 0;
+ }
+-
+-// { dg-final { cleanup-saved-temps ".s" } }
++// { dg-keep-saved-temps ".s" }
+--- a/src/gcc/testsuite/g++.dg/pr55513.C
++++ b/src/gcc/testsuite/g++.dg/pr55513.C
+@@ -9,4 +9,3 @@ main ()
+ }
+ 
+ // { dg-final { scan-tree-dump-times "memcpy" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/pr55604.C
++++ b/src/gcc/testsuite/g++.dg/pr55604.C
+@@ -8,4 +8,3 @@ main ()
+   __builtin_printf ("%d %s\n", t, s);
+ }
+ 
+-/* { dg-final { cleanup-rtl-dump "reload" } } */
+--- a/src/gcc/testsuite/g++.dg/pr58123.C
++++ b/src/gcc/testsuite/g++.dg/pr58123.C
+@@ -15,4 +15,3 @@ int main() {
+ }
+ 
+ // { dg-final { scan-tree-dump-times "pr58123.C:13\.6\] try" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/pr64191.C
++++ b/src/gcc/testsuite/g++.dg/pr64191.C
+@@ -22,4 +22,3 @@ void bar_dtor_loop(Bar* p, unsigned int n)
+ 
+ // { dg-final { scan-tree-dump-times "CLOBBER" 1 "cddce1" } }
+ // { dg-final { scan-tree-dump-times "if" 0 "cddce1" } }
+-// { dg-final { cleanup-tree-dump "cddce1" } }
+--- a/src/gcc/testsuite/g++.dg/pr67989.C
++++ b/src/gcc/testsuite/g++.dg/pr67989.C
+@@ -1,6 +1,5 @@
+ /* { dg-do compile } */
+ /* { dg-options "-std=c++11 -O2" } */
+-/* { dg-additional-options "-marm -march=armv4t" { target arm*-*-* } } */
+ 
+ __extension__ typedef unsigned long long int uint64_t;
+ namespace std __attribute__ ((__visibility__ ("default")))
+--- a/src/gcc/testsuite/g++.dg/predict-loop-exit-1.C
++++ b/src/gcc/testsuite/g++.dg/predict-loop-exit-1.C
+@@ -10,4 +10,3 @@ void test() {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop exit heuristics:" 3 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/g++.dg/predict-loop-exit-2.C
++++ b/src/gcc/testsuite/g++.dg/predict-loop-exit-2.C
+@@ -10,4 +10,3 @@ void test() {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop exit heuristics:" 2 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/g++.dg/predict-loop-exit-3.C
++++ b/src/gcc/testsuite/g++.dg/predict-loop-exit-3.C
+@@ -10,4 +10,3 @@ void test() {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop exit heuristics:" 3 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/g++.dg/tls/thread_local-cse.C
++++ b/src/gcc/testsuite/g++.dg/tls/thread_local-cse.C
+@@ -5,7 +5,6 @@
+ // { dg-add-options tls }
+ // { dg-require-effective-target tls_runtime }
+ // { dg-final { scan-assembler-times "call *_ZTW2ir" 1 { xfail *-*-* } } }
+-// { dg-final cleanup-saved-temps }
+ 
+ // XFAILed until the back end supports a way to mark a function as cseable
+ // though not pure.
+--- a/src/gcc/testsuite/g++.dg/tm/attrib-2.C
++++ b/src/gcc/testsuite/g++.dg/tm/attrib-2.C
+@@ -19,4 +19,3 @@ void Tcall::f() { }
+ // { dg-final { scan-tree-dump-times "_ZN5Tcall1fEv" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "_ZGTtN5Tsafe1fEv" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "_ZGTtN5Tcall1fEv" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tm/attrib-3.C
++++ b/src/gcc/testsuite/g++.dg/tm/attrib-3.C
+@@ -30,4 +30,3 @@ void E::f() { }
+ // { dg-final { scan-tree-dump-times "_ZGTtN1B1fEv" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "_ZN1E1fEv" 1 "optimized" } }
+ // { dg-final { scan-tree-dump-times "_ZGTtN1E1fEv" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tm/noexcept-1.C
++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-1.C
+@@ -34,5 +34,3 @@ int f3()
+ 
+ /* { dg-final { scan-tree-dump-times "eh_must_not_throw" 6 "tmlower" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 6 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/noexcept-3.C
++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-3.C
+@@ -36,5 +36,3 @@ int f3()
+ 
+ /* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 6 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/noexcept-4.C
++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-4.C
+@@ -31,5 +31,3 @@ int f3()
+ 
+ /* { dg-final { scan-tree-dump-times "eh_must_not_throw" 6 "tmlower" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 6 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/noexcept-5.C
++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-5.C
+@@ -17,5 +17,3 @@ void f2(int x)
+ }
+ /* { dg-final { scan-tree-dump-times "eh_must_not_throw" 1 "tmlower" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/noexcept-6.C
++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-6.C
+@@ -20,4 +20,3 @@ int f1()
+ 
+ /* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */
+ /* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/pr47530-2.C
++++ b/src/gcc/testsuite/g++.dg/tm/pr47530-2.C
+@@ -36,4 +36,3 @@ void bench_test()
+ // The one in the instrumented code path is not.
+ // { dg-final { scan-tree-dump-times "ITM_commitTransaction.*tail call" 1 "tmedge" } }
+ 
+-// { dg-final { cleanup-tree-dump "tmedge" } }
+--- a/src/gcc/testsuite/g++.dg/tm/pr47530.C
++++ b/src/gcc/testsuite/g++.dg/tm/pr47530.C
+@@ -76,5 +76,4 @@ void LinkedList::insert(int val)
+ // Make sure we don't do tail optimization on the commit, except on
+ // the uninstrumented code path.
+ // { dg-final { scan-tree-dump-times "commitTransaction...; .tail call" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+ 
+--- a/src/gcc/testsuite/g++.dg/tm/pr51516.C
++++ b/src/gcc/testsuite/g++.dg/tm/pr51516.C
+@@ -18,4 +18,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-assembler-not "_ITM_getTMCloneOrIrrevocable" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/template-1.C
++++ b/src/gcc/testsuite/g++.dg/tm/template-1.C
+@@ -33,4 +33,3 @@ int f1()
+ /* 4 transactions overall, two of them write to global:  */
+ /* { dg-final { scan-tree-dump-times "ITM_RU4\\s*\\(&global" 4 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_WU4\\s*\\(&global" 2 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/g++.dg/tm/template-2.C
++++ b/src/gcc/testsuite/g++.dg/tm/template-2.C
+@@ -19,4 +19,3 @@ int f1()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_RU" 2 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/g++.dg/torture/pr53085.C
++++ b/src/gcc/testsuite/g++.dg/torture/pr53085.C
+@@ -14,4 +14,3 @@ void aa::f(){
+ }
+ 
+ // { dg-final { scan-tree-dump-times "a ={v} 1;" 2 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-prof/indir-call-prof.C
++++ b/src/gcc/testsuite/g++.dg/tree-prof/indir-call-prof.C
+@@ -35,5 +35,3 @@ main (void)
+ 
+ /* { dg-final-use { scan-ipa-dump "Indirect call -> direct call.* AA transformation on insn" "profile" } } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized" } } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-prof/inline_mismatch_args.C
++++ b/src/gcc/testsuite/g++.dg/tree-prof/inline_mismatch_args.C
+@@ -33,4 +33,3 @@ int main(void)
+ }
+ /* { dg-final-use { scan-tree-dump "Inlining .*Super::Foo" "einline" } } */
+ /* { dg-final-use { scan-tree-dump-not "mismatched arguments" "einline" } } */
+-/* { dg-final-use { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-prof/morefunc.C
++++ b/src/gcc/testsuite/g++.dg/tree-prof/morefunc.C
+@@ -52,4 +52,3 @@ int main()
+ }
+ 
+ /* { dg-final-use { scan-ipa-dump-times "Indirect call -> direct call" 2 "profile" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-prof/pr35545.C
++++ b/src/gcc/testsuite/g++.dg/tree-prof/pr35545.C
+@@ -47,6 +47,4 @@ int main()
+ 
+ }
+ /* { dg-final-use { scan-ipa-dump "Indirect call -> direct call" "profile_estimate" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile_estimate" } } */
+ /* { dg-final-use { scan-tree-dump-not "OBJ_TYPE_REF" "optimized" } } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-prof/reorder.C
++++ b/src/gcc/testsuite/g++.dg/tree-prof/reorder.C
+@@ -45,4 +45,3 @@ int main()
+ }
+ 
+ /* { dg-final-use { scan-ipa-dump-times "Indirect call -> direct call" 2 "profile" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/block1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/block1.C
+@@ -8,4 +8,3 @@ void bar (void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "\{" 1 "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/calloc.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/calloc.C
+@@ -47,4 +47,3 @@ void f (void *p, int n)
+ /* { dg-final { scan-tree-dump-times "calloc" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "malloc" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "memset" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/copyprop-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/copyprop-1.C
+@@ -28,4 +28,3 @@ int foo(Object&o)
+ /* Remaining should be two loads.  */
+ 
+ /* { dg-final { scan-tree-dump-times " = \[^\n\]*;" 2 "dce2" } } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/deleted-label1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/deleted-label1.C
+@@ -1,7 +1,6 @@
+ // PR debug/58315
+ // { dg-options "-O -g -fdump-tree-einline" }
+ // { dg-final { scan-tree-dump-not "DEBUG <L0>" "einline" } }
+-// { dg-final { cleanup-tree-dump "einline" } }
+ 
+ // We used to emit useless NOTE_INSN_DELETED_DEBUG_LABELs for the
+ // artificial cdtor_label.
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ehcleanup-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ehcleanup-1.C
+@@ -28,4 +28,3 @@ t (void)
+ // And as a result also contained control flow.
+ // { dg-final { scan-tree-dump-times "Removing unreachable" 4 "ehcleanup1" } }
+ //
+-// { dg-final { cleanup-tree-dump "ehcleanup1" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/empty-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/empty-1.C
+@@ -11,4 +11,3 @@ S bar (const S &a)
+ 
+ /* Test whether memcpy call has been optimized out.  */
+ /* { dg-final { scan-tree-dump-times "memcpy" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/empty-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/empty-2.C
+@@ -11,5 +11,3 @@ void t(void)
+ // { dg-final { scan-tree-dump-not "fallible" "gimple" } }
+ // Whole constructor should be optimized away.
+ // { dg-final { scan-tree-dump-not "int" "optimized" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/fold-compare.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/fold-compare.C
+@@ -24,5 +24,4 @@ int f(const ExtentsBase &e1) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "&my_extents" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/forwprop-switch.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/forwprop-switch.C
+@@ -21,4 +21,3 @@ int Test(Scale s)
+ 
+ // { dg-final { scan-tree-dump-not "\\\(int\\\)" "cddce1" } }
+ // { dg-final { scan-tree-dump "switch \\\(s_.\\\(D\\\)\\\)" "cddce1" } }
+-// { dg-final { cleanup-tree-dump "cddce1" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/fwprop-align.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/fwprop-align.C
+@@ -17,4 +17,3 @@ int main()
+ 
+ /* We should eliminate the check if p points to a virtual function. */
+ /* { dg-final { scan-tree-dump-times "& 1" 0 "forwprop2" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop2" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/inline-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/inline-1.C
+@@ -33,4 +33,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me\\(" 1 "einline"} } */
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me_too\\(" 1 "einline"} } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/inline-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/inline-2.C
+@@ -33,4 +33,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me\\(" 1 "einline"} } */
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me_too\\(" 1 "einline"} } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/inline-3.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/inline-3.C
+@@ -26,4 +26,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me\\(" 1 "einline"} } */
+ /* { dg-final { scan-tree-dump-times "Inlining void inline_me_too\\(" 1 "einline"} } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-1.C
+@@ -15,4 +15,3 @@ void bar(void)
+ /* { dg-final { scan-tree-dump-not "-&x" "ivopts" } } */
+ /* { dg-final { scan-tree-dump-not "offset: (4294967292|0x0f+fc)" "ivopts" } } */
+ /* { dg-final { scan-tree-dump-not "&x\\\[5\\\]" "ivopts" } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C
+@@ -8,4 +8,3 @@ void test (int *b, int *e, int stride)
+   }
+ 
+ /* { dg-final { scan-tree-dump-times "PHI <\[pb\]" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-3.C
+@@ -73,4 +73,3 @@ int main ( int , char** ) {
+ // Verify that on x86_64 and i?86 we use a single IV for the innermost loop
+ 
+ // { dg-final { scan-tree-dump "Selected IV set for loop \[0-9\]* at \[^ \]*:64, 1 IVs" "ivopts" { target x86_64-*-* i?86-*-* } } }
+-// { dg-final { cleanup-tree-dump "ivopts" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/new1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/new1.C
+@@ -39,4 +39,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "= .* \\+ -" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/nonzero-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/nonzero-1.C
+@@ -9,4 +9,3 @@ int m()
+   return q != 0;
+ }
+ /* { dg-final { scan-tree-dump "return 1" "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/nonzero-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/nonzero-2.C
+@@ -13,4 +13,3 @@ int m()
+   return q != 0;
+ }
+ /* { dg-final { scan-tree-dump "return 1" "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/nothrow-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/nothrow-1.C
+@@ -19,4 +19,3 @@ void q()
+ }
+ /* We shouldnotice nothrow attribute.  */
+ /* { dg-final { scan-tree-dump-times "exception" 0 "cfg"} } */
+-/* { dg-final { cleanup-tree-dump "cfg" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pointer-reference-alias.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pointer-reference-alias.C
+@@ -10,4 +10,3 @@ int f(int *a)
+ 
+ /* There should be only one dereferencing of a. */
+ /* { dg-final { scan-tree-dump-times "\\*a" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr13954.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr13954.C
+@@ -26,4 +26,3 @@ copystruct1 (teststruct param)
+ 
+ /* There should be no reference to link_error. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr14703.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr14703.C
+@@ -46,4 +46,3 @@ int main()
+    ::std::cerr << "fibcst<90>() == " << fibconst<90>() << "\n";
+ }
+ // { dg-final { scan-tree-dump-not "fibconst" "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr14814.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr14814.C
+@@ -16,5 +16,4 @@ int foo(XX& r) {
+ 
+ /* { dg-final { scan-tree-dump-times "&this" 0 "forwprop2" } } */
+ /* { dg-final { scan-tree-dump-times "&r" 0 "forwprop2" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop2" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-3.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-3.C
+@@ -10,4 +10,3 @@ int f(int i, unsigned j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-4.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-4.C
+@@ -10,4 +10,3 @@ int f(int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-5.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr15791-5.C
+@@ -10,4 +10,3 @@ int foo(int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr18178.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr18178.C
+@@ -44,4 +44,3 @@ void doit (array *a)
+ /* VRP should remove all but 1 if() in the loop.  */
+ 
+ /* { dg-final { scan-tree-dump-times "if " 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-1.C
+@@ -13,4 +13,3 @@ int g(){
+ 
+ /* { dg-final { scan-tree-dump     "return 42" "ccp1" } } */
+ /* { dg-final { scan-tree-dump-not "return 33" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-2.C
+@@ -14,4 +14,3 @@ int g(){
+ 
+ /* { dg-final { scan-tree-dump     "return 42" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "return 33" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-3.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-3.C
+@@ -8,4 +8,3 @@ int g(){
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "return 42" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-4.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-4.C
+@@ -8,4 +8,3 @@ int g(){
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "return 42" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-5.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19476-5.C
+@@ -8,4 +8,3 @@ int g(){
+ }
+ 
+ /* { dg-final { scan-tree-dump     "return 42" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19637.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19637.C
+@@ -30,4 +30,3 @@ int foo_void_offset(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1;" 3 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr19807.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr19807.C
+@@ -24,4 +24,3 @@ void bar(int i)
+ /* We can't get &a[i +- 1] in the final code and it is not clear we
+    want this.  Instead we get to see &a[i] and pointer offsetting
+    by 4 and -4U.  */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr21463.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr21463.C
+@@ -17,4 +17,3 @@ template struct foo_t<int>;
+ 
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 2 "phiopt1" } } */
+ /* { dg-final { scan-tree-dump-times "MAX_EXPR" 2 "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr23948.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr23948.C
+@@ -16,4 +16,3 @@ int make_scheduler_request(double a, double b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " / " 1 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr26406.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr26406.C
+@@ -11,4 +11,3 @@ int *f(int *b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "if" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr27090.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr27090.C
+@@ -18,4 +18,3 @@ int foo(Foo& f)
+ }
+ 
+ /* { dg-final { scan-tree-dump "f_..D.->x;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr30738.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr30738.C
+@@ -14,4 +14,3 @@ int test_min_ref (int x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump "MIN_EXPR" "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr31146-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr31146-2.C
+@@ -21,4 +21,3 @@ double foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced .* != 0B. with .1" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr31146.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr31146.C
+@@ -13,4 +13,3 @@ void foo (int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump "MEM\\\[.*&i\\\]\\\[j.*\\\] =.* 1;" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop?" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr31307.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr31307.C
+@@ -37,4 +37,3 @@ int test(unsigned char *d)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "r.dst" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr33593.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr33593.C
+@@ -16,4 +16,3 @@ main (void)
+ // The expression 1 / 0 should not be propagated into the call to foo() if it
+ // may trap.
+ // { dg-final { scan-tree-dump-times "foo \\(1 \\/ 0\\)" 0 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr33604.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr33604.C
+@@ -46,4 +46,3 @@ int main(int argc, char *argv[])
+    after optimization.  */
+ 
+ /* { dg-final { scan-tree-dump-times ".MEM_\[0-9\]*\\\(D\\\)" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr33615-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr33615-2.C
+@@ -17,4 +17,3 @@ foo (double a, int x)
+ // The expression 1.0 / 0.0 should not be treated as a loop invariant
+ // if it may throw an exception.
+ // { dg-final { scan-tree-dump-times "Replaced 1\\\.0e\\\+0 / 0\\\.0" 0 "pre" } }
+-// { dg-final { cleanup-tree-dump "pre" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr33615.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr33615.C
+@@ -17,4 +17,3 @@ foo (double a, int x)
+ // The expression 1.0 / 0.0 should not be treated as a loop invariant
+ // if it may throw an exception.
+ // { dg-final { scan-tree-dump-times "invariant up to" 0 "lim1" } }
+-// { dg-final { cleanup-tree-dump "lim1" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr40874.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr40874.C
+@@ -22,4 +22,3 @@ int main(int argc, char* argv[])
+ }
+ 
+ // { dg-final { scan-tree-dump "return 0" "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr41186.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr41186.C
+@@ -32,4 +32,3 @@ int main()
+ /* { dg-final { scan-tree-dump "Replaced b1.b with 1" "fre1" } } */
+ /* { dg-final { scan-tree-dump "Replaced b1.D.\[0-9\]*.i with 0" "fre1" } } */
+ /* { dg-final { scan-tree-dump "Replaced b1.D.\[0-9\]*.f with 1" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr41428.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr41428.C
+@@ -12,4 +12,3 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Folded into: if \\\(1 != 0\\\)" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr43411.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr43411.C
+@@ -26,4 +26,3 @@ void testInlinePsub() {
+ }
+ 
+ // { dg-final { scan-tree-dump-not "function_to_inline" "release_ssa" { xfail *-*-* } } }
+-// { dg-final { cleanup-tree-dump "release_ssa" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr44706.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr44706.C
+@@ -43,4 +43,3 @@ XMLExcepts::AttrList_BadIndex, getMemoryManager());
+ /* Mistake in branch prediction caused us to split away real body of the function keeping
+    only throw () invokation.   This is bad idea.  */
+ /* { dg-final { scan-tree-dump-not "Splitting function" "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr45453.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr45453.C
+@@ -16,4 +16,3 @@ B ()
+ }
+ /* We should inline foo and devirtualize call to foo in the inlined version.  */
+ // { dg-final { scan-tree-dump-times "OBJ_TYPE_REF" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr45605.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr45605.C
+@@ -34,4 +34,3 @@ int main() {
+ 
+ /* We should devirtualize call to D::Run */
+ /* { dg-final { scan-tree-dump-times "D::Run \\(" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr46228.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr46228.C
+@@ -20,4 +20,3 @@ int main()
+ 
+ // This function is small enough to be inlined even at -Os.
+ // { dg-final { scan-tree-dump-not "_ZNSt8_Rb_treeIiiSt9_IdentityIiESt4lessIiESaIiEED2Ev" "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr49911.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr49911.C
+@@ -38,4 +38,3 @@ void jsop_setelem(bool y, int z) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*45" 0 "vrp2"} } */
+-/* { dg-final { cleanup-tree-dump "vrp2" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr53844.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr53844.C
+@@ -75,4 +75,3 @@ void test(const Vector<>& in, Vector<>& out, int i)
+ // dead stores to unused temporaries should have been removed.
+ 
+ // { dg-final { scan-tree-dump-times "VDEF" 1 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr57380.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr57380.C
+@@ -19,4 +19,3 @@ int f(my_array a, my_array b) {
+ }
+ 
+ /* { dg-final { scan-tree-dump "MAX_EXPR" "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr58404.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr58404.C
+@@ -17,4 +17,3 @@ foo ()
+ // We should propagate the reference into both memory accesses
+ // during the first forwprop pass
+ // { dg-final { scan-tree-dump-times "= &a" 0 "cddce1" } }
+-// { dg-final { cleanup-tree-dump "cddce1" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr61009.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr61009.C
+@@ -50,4 +50,3 @@ bool  Test(void) {
+ // there should be a single == 0 comparison in the dump file.
+ 
+ // { dg-final { scan-tree-dump-times "== 0" 1 "dom1" } }
+-// { dg-final { cleanup-tree-dump "dom1" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr61034.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr61034.C
+@@ -44,4 +44,3 @@ bool f(I a, I b, I c, I d) {
+ // { dg-final { scan-tree-dump-times ";; Function" 1 "fre2" } }
+ // { dg-final { scan-tree-dump-times "free" 19 "fre2" } }
+ // { dg-final { scan-tree-dump-times "unreachable" 11 "fre2" } }
+-// { dg-final { cleanup-tree-dump "fre2" } }
+--- /dev/null
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr66726.c
+@@ -0,0 +1,36 @@
++
++/* { dg-do run } */
++/* { dg-options "-O2" } */
++
++/* Execution test for converting VIEW_CONVERT_EXPR.  */
++
++struct cpp_num {
++  bool f;
++};
++
++extern cpp_num  __attribute__((noinline))
++foo (cpp_num lhs,
++     cpp_num rhs)
++{
++  lhs.f = lhs.f || rhs.f;
++  return lhs;
++}
++
++cpp_num lhs, rhs, r;
++
++int main ()
++{
++
++  lhs.f = false;
++  rhs.f = false;
++  r = foo (lhs, rhs);
++  if (r.f)
++    __builtin_abort ();
++
++
++  lhs.f = false;
++  rhs.f = true;
++  r = foo (lhs, rhs);
++  if (!r.f)
++    __builtin_abort ();
++}
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/pr8781.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/pr8781.C
+@@ -25,4 +25,3 @@ int x()
+ /* We should optimize this to a direct call.  */
+ 
+ /* { dg-final { scan-tree-dump-times "= f \\(\\);" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ptrmemfield.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ptrmemfield.C
+@@ -23,5 +23,4 @@ int h(void)
+ /* { dg-final { scan-tree-dump-times "offset_type" 0 "optimized"} } */
+ // And we should optimized this code to just return 0
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/restrict1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/restrict1.C
+@@ -17,4 +17,3 @@ void bar(Foo f, int * __restrict__ q)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/restrict2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/restrict2.C
+@@ -59,4 +59,3 @@ f6 (S *x, S *y)
+   return x->p[0];
+ }
+ 
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ssa-cast-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ssa-cast-1.C
+@@ -9,4 +9,3 @@ int &f(int *a)
+ /* There should be no cast as pointer and references are
+    considered the same type. */
+ /* { dg-final { scan-tree-dump-times "\\(int &\\)" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ssa-dom.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ssa-dom.C
+@@ -100,5 +100,4 @@ gimple_return_set_retval (gimple gs, tree retval)
+   gimple_set_op (gs, 0, retval);
+ }
+ /* { dg-final { scan-tree-dump-times "gss_for_code_.10." 1 "dom1"} } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ssa-sra-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ssa-sra-1.C
+@@ -58,4 +58,3 @@ void temp()
+ /* We should have removed the casts from pointers to references and caused SRA to happen.  */
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ssa-sra-2.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ssa-sra-2.C
+@@ -49,4 +49,3 @@ void test()
+ 
+ /* We should have removed the casts from pointers to references and caused SRA to happen.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/ssa-store-ccp-1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ssa-store-ccp-1.C
+@@ -16,4 +16,3 @@ int f(void)
+ /* There should be a reference to conststaticvariable since it may
+    be overriden at link time.  */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/g++.dg/tree-ssa/stabilize1.C
++++ b/src/gcc/testsuite/g++.dg/tree-ssa/stabilize1.C
+@@ -1,7 +1,6 @@
+ // PR c++/53356
+ // { dg-options "-fdump-tree-gimple" }
+ // { dg-final { scan-tree-dump-not "= 0" "gimple" } }
+-// { dg-final { cleanup-tree-dump "gimple" } }
+ 
+ class A {};
+ 
+--- a/src/gcc/testsuite/g++.dg/tsan/aligned_vs_unaligned_race.C
++++ b/src/gcc/testsuite/g++.dg/tsan/aligned_vs_unaligned_race.C
+@@ -31,7 +31,7 @@ int main() {
+   pthread_create(&t[1], NULL, Thread2, NULL);
+   pthread_join(t[0], NULL);
+   pthread_join(t[1], NULL);
+-  printf("Pass\n");
++  fprintf(stderr, "Pass\n");
+   /* { dg-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+   /* { dg-output "Pass.*" } */
+   return 0;
+--- a/src/gcc/testsuite/g++.dg/tsan/benign_race.C
++++ b/src/gcc/testsuite/g++.dg/tsan/benign_race.C
+@@ -32,7 +32,7 @@ int main() {
+   Global = 43;
+   WTFGlobal = 143;
+   pthread_join(t, 0);
+-  printf("OK\n");
++  fprintf(stderr, "OK\n");
+ }
+ 
+ /* { dg-prune-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+--- a/src/gcc/testsuite/g++.dg/tsan/fd_close_norace.C
++++ b/src/gcc/testsuite/g++.dg/tsan/fd_close_norace.C
+@@ -24,7 +24,7 @@ int main() {
+   pthread_create(&t[1], NULL, Thread2, NULL);
+   pthread_join(t[0], NULL);
+   pthread_join(t[1], NULL);
+-  printf("OK\n");
++  fprintf(stderr, "OK\n");
+ }
+ 
+ /* { dg-prune-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+--- a/src/gcc/testsuite/g++.dg/tsan/fd_close_norace2.C
++++ b/src/gcc/testsuite/g++.dg/tsan/fd_close_norace2.C
+@@ -22,7 +22,7 @@ int main() {
+   while (write(pipes[1], &t, 1) != 1) {
+   }
+   pthread_join(t, 0);
+-  printf("OK\n");
++  fprintf(stderr, "OK\n");
+ }
+ 
+ /* { dg-prune-output "WARNING: ThreadSanitizer: data race.*(\n|\r\n|\r)" } */
+--- a/src/gcc/testsuite/g++.dg/ubsan/null-4.C
++++ b/src/gcc/testsuite/g++.dg/ubsan/null-4.C
+@@ -17,4 +17,3 @@ main (void)
+ 
+ // { dg-output "reference binding to null pointer of type 'int'(\n|\r\n|\r)" }
+ // { dg-final { scan-tree-dump-times "Optimizing" 4 "sanopt"} }
+-// { dg-final { cleanup-tree-dump "sanopt" } }
+--- a/src/gcc/testsuite/g++.dg/ubsan/null-5.C
++++ b/src/gcc/testsuite/g++.dg/ubsan/null-5.C
+@@ -16,4 +16,3 @@ main (void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "Optimizing" 4 "sanopt"} }
+-// { dg-final { cleanup-tree-dump "sanopt" } }
+--- a/src/gcc/testsuite/g++.dg/ubsan/vptr-6.C
++++ b/src/gcc/testsuite/g++.dg/ubsan/vptr-6.C
+@@ -29,4 +29,3 @@ f4 (S &p, S &q)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "__ubsan_handle_dynamic_type_cache_miss" 5 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/ubsan/vptr-7.C
++++ b/src/gcc/testsuite/g++.dg/ubsan/vptr-7.C
+@@ -23,4 +23,3 @@ f3 (S *p)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "__ubsan_handle_dynamic_type_cache_miss" 0 "optimized" } }
+-// { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/g++.dg/vect/param-max-aliased-pr26197.cc
++++ b/src/gcc/testsuite/g++.dg/vect/param-max-aliased-pr26197.cc
+@@ -21,4 +21,3 @@ void bar()
+   g(&b);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr19951.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr19951.cc
+@@ -16,4 +16,3 @@ void bar()
+         foo();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr21218.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr21218.cc
+@@ -14,5 +14,4 @@ void bar(B& b)
+         b.d[i] = b.foo(i);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/vect/pr21734_1.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr21734_1.cc
+@@ -17,4 +17,3 @@ void foo(B &b)
+     b[i] = 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr21734_2.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr21734_2.cc
+@@ -13,4 +13,3 @@ void foo(A a1, A &a2)
+     a2.a[i]=0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr22543.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr22543.cc
+@@ -35,4 +35,3 @@ C::C()
+     int j = B().foo();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-2.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-2.cc
+@@ -30,9 +30,6 @@ void bar(int n, int *a, int *b, int *c) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ /* { dg-final { scan-tree-dump-times "ANNOTATE_EXPR " 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ /* { dg-final { scan-tree-dump-times "ANNOTATE " 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-3.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-3.cc
+@@ -17,9 +17,6 @@ void foo(int *a) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ /* { dg-final { scan-tree-dump-times "ANNOTATE_EXPR " 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ /* { dg-final { scan-tree-dump-times "ANNOTATE " 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-4.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep-4.cc
+@@ -22,9 +22,6 @@ void foo(std::vector<int> *ar, int *b) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* FIXME:     dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0  */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ /* { dg-final { scan-tree-dump-times "ANNOTATE_EXPR " 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ /* { dg-final { scan-tree-dump-times "ANNOTATE " 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33426-ivdep.cc
+@@ -15,4 +15,3 @@ void foo(int n, int *a, int *b, int *c, int *d, int *e) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33834_1.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33834_1.cc
+@@ -47,4 +47,3 @@ internals::compute_s (void)
+ {
+   bend.compute_s ();
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33834_2.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33834_2.cc
+@@ -29,4 +29,3 @@ LoadPAT (char *filename)
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33835.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33835.cc
+@@ -47,4 +47,3 @@ internals::compute_s (void)
+   bend.compute_s ();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33860.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33860.cc
+@@ -22,4 +22,3 @@ Matrix Matrix::operator* (const Matrix matrix) const
+   return ret;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr33860a.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr33860a.cc
+@@ -24,4 +24,3 @@ Matrix Matrix::operator* (const Matrix matrix) const
+   return ret;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr36648.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr36648.cc
+@@ -19,6 +19,5 @@ int main() { }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { !  vect_no_align } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! vect_no_align } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/g++.dg/vect/pr37143.C
++++ b/src/gcc/testsuite/g++.dg/vect/pr37143.C
+@@ -18,4 +18,3 @@ f(int NumberOfSideSets, int *ssNumDFperSide, float *ssDF)
+     newssDF[nextDF++] = ssDF[i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr37174.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr37174.cc
+@@ -19,5 +19,4 @@ Bar::Bar() {
+         }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/vect/pr43771.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr43771.cc
+@@ -11,4 +11,3 @@ void KWayNodeRefine__(int nparts, int *gpwgts, int *badminpwgt, int
+    }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr44861.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr44861.cc
+@@ -31,4 +31,3 @@ void g() {
+     new Bar(*foo, foo);
+ }
+ 
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr45470-a.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr45470-a.cc
+@@ -21,4 +21,3 @@ B::B ()
+ {
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr45470-b.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr45470-b.cc
+@@ -49,4 +49,3 @@ struct LoadGraph
+ LoadGraph::LoadGraph (int)
+ {}
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr50698.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr50698.cc
+@@ -24,4 +24,3 @@ void sumS() {
+ }
+ 
+ // { dg-final { scan-tree-dump-not "run-time aliasing" "vect" } }
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr51485.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr51485.cc
+@@ -11,4 +11,3 @@ foo (unsigned int x, double *y, A *z)
+     y[i] = bar (z[i]);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr58513.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr58513.cc
+@@ -10,4 +10,3 @@ void foo(int* a)
+ }
+ 
+ // { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } }
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr60000.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr60000.cc
+@@ -10,4 +10,3 @@ void foo (bool* a, int* b)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/pr60023.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr60023.cc
+@@ -77,4 +77,3 @@ f8 (int *p, int *q)
+     p[i] = q[i] + 1;
+ }
+ 
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr60559.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr60559.cc
+@@ -5,4 +5,3 @@
+ 
+ #include "pr60023.cc"
+ 
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr60729.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr60729.cc
+@@ -7,4 +7,3 @@ void doSomething(int dim, double *Y, double *A)
+     Y[k] += __builtin_fabs (A[k]);
+ }
+ 
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr60836.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr60836.cc
+@@ -36,4 +36,3 @@ norm ()
+   f = 0;
+ }
+ 
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/pr64410.cc
++++ b/src/gcc/testsuite/g++.dg/vect/pr64410.cc
+@@ -50,4 +50,3 @@ main(int argc, char** argv)
+ }
+ 
+ // { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" } }
+-// { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/g++.dg/vect/slp-pr50413.cc
++++ b/src/gcc/testsuite/g++.dg/vect/slp-pr50413.cc
+@@ -161,5 +161,4 @@ void shift(unsigned char t)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 0 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/g++.dg/vect/slp-pr50819.cc
++++ b/src/gcc/testsuite/g++.dg/vect/slp-pr50819.cc
+@@ -50,4 +50,3 @@ const & v2) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 2 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/g++.dg/vect/slp-pr56812.cc
++++ b/src/gcc/testsuite/g++.dg/vect/slp-pr56812.cc
+@@ -18,4 +18,3 @@ void mydata::Set (float x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/compile/20151204.c
+@@ -0,0 +1,19 @@
++typedef __SIZE_TYPE__ size_t;
++
++int strcmp (const char*, const char*);
++void *memchr (const void *, int, size_t);
++char* strncpy (char *, const char *, size_t);
++
++int
++main (int argc, char** argv)
++{
++  char target[32753] = "A";
++  char buffer[32753];
++  char *x;
++  x = buffer;
++
++  if (strcmp (target, "A")
++      || memchr (target, 'A', 0) != ((void *) 0))
++    if (strncpy (x, "", 4) != x);
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/compile/pr66168.c
+@@ -0,0 +1,15 @@
++int a, b;
++
++void
++fn1 ()
++{
++  for (;;)
++    {
++      for (b = 0; b < 3; b++)
++	{
++	  char e[2];
++	  char f = e[1];
++	  a ^= f ? 1 / f : 0;
++	}
++    }
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/ieee/pr67218.c
+@@ -0,0 +1,15 @@
++extern void abort (void) __attribute__ ((noreturn));
++
++double __attribute__ ((noinline, noclone))
++foo (unsigned int x)
++{
++  return (double) (float) (x | 0xffff0000);
++}
++
++int
++main ()
++{
++  if (foo (1) != 0x1.fffep31)
++    abort ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr65648.c
+@@ -0,0 +1,34 @@
++/* PR target/65648 */
++
++int a = 0, *b = 0, c = 0;
++static int d = 0;
++short e = 1;
++static long long f = 0;
++long long *i = &f;
++unsigned char j = 0;
++
++__attribute__((noinline, noclone)) void
++foo (int x, int *y)
++{
++  asm volatile ("" : : "r" (x), "r" (y) : "memory");
++}
++
++__attribute__((noinline, noclone)) void
++bar (const char *x, long long y)
++{
++  asm volatile ("" : : "r" (x), "r" (&y) : "memory");
++  if (y != 0)
++    __builtin_abort ();
++}
++
++int
++main ()
++{
++  int k = 0;
++  b = &k;
++  j = (!a) - (c <= e);
++  *i = j;
++  foo (a, &k);
++  bar ("", f);
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr68381.c
+@@ -0,0 +1,22 @@
++/* { dg-options "-O -fexpensive-optimizations -fno-tree-bit-ccp" } */
++
++__attribute__ ((noinline, noclone))
++int
++foo (unsigned short x, unsigned short y)
++{
++  int r;
++  if (__builtin_mul_overflow (x, y, &r))
++    __builtin_abort ();
++  return r;
++}
++
++int
++main (void)
++{
++  int x = 1;
++  int y = 2;
++  if (foo (x, y) != x * y)
++    __builtin_abort ();
++  return 0;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr68390.c
+@@ -0,0 +1,27 @@
++/* { dg-do run }  */
++/* { dg-options "-O2" } */
++
++__attribute__ ((noinline))
++double direct(int x, ...)
++{
++  return x*x;
++}
++
++__attribute__ ((noinline))
++double broken(double (*indirect)(int x, ...), int v)
++{
++  return indirect(v);
++}
++
++int main ()
++{
++  double d1, d2;
++  int i = 2;
++  d1 = broken (direct, i);
++  if (d1 != i*i)
++    {
++      __builtin_abort ();
++    }
++  return 0;
++}
++
+--- a/src/gcc/testsuite/gcc.dg/20050811-1.c
++++ b/src/gcc/testsuite/gcc.dg/20050811-1.c
+@@ -17,4 +17,3 @@ int bar (int x)
+     return foo ();
+ }
+ 
+-// { dg-final { cleanup-rtl-dump "*" } }
+--- a/src/gcc/testsuite/gcc.dg/20050811-2.c
++++ b/src/gcc/testsuite/gcc.dg/20050811-2.c
+@@ -17,4 +17,3 @@ int bar (int x)
+     return foo ();
+ }
+ 
+-/* { dg-final { cleanup-rtl-dump "postreload*" } } */
+--- a/src/gcc/testsuite/gcc.dg/20101013-1.c
++++ b/src/gcc/testsuite/gcc.dg/20101013-1.c
+@@ -8,4 +8,3 @@ int foo(int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump ">>" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/20111227-2.c
++++ b/src/gcc/testsuite/gcc.dg/20111227-2.c
+@@ -43,4 +43,3 @@ int main(void)
+   return 0;
+ }
+ /* { dg-final { scan-rtl-dump "Elimination opportunities = 3 realized = 3" "ree" } }  */
+-/* { dg-final { cleanup-rtl-dump "ree" } }  */
+--- a/src/gcc/testsuite/gcc.dg/20111227-3.c
++++ b/src/gcc/testsuite/gcc.dg/20111227-3.c
+@@ -43,4 +43,3 @@ int main(void)
+   return 0;
+ }
+ /* { dg-final { scan-rtl-dump "Elimination opportunities = 3 realized = 3" "ree" } }  */
+-/* { dg-final { cleanup-rtl-dump "ree" } }  */
+--- a/src/gcc/testsuite/gcc.dg/20141029-1.c
++++ b/src/gcc/testsuite/gcc.dg/20141029-1.c
+@@ -25,4 +25,3 @@ foo()
+     }
+ }
+ /* { dg-final { scan-rtl-dump-times "mem/v(/.)*:HI" 4 "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/Wcxx-compat-22.c
+@@ -0,0 +1,8 @@
++/* { dg-do compile } */
++/* { dg-options "-Wc++-compat" } */
++struct A {}; /* { dg-warning "empty struct has size 0 in C" } */
++union B {}; /* { dg-warning "empty union has size 0 in C" } */
++struct C { struct D {}; int x; }; /* { dg-warning "empty struct has size 0 in C|declaration does not declare anything" } */
++struct E { union F {}; int x; }; /* { dg-warning "empty union has size 0 in C|declaration does not declare anything" } */
++union G { union H {}; int x; }; /* { dg-warning "empty union has size 0 in C|declaration does not declare anything" } */
++union I { struct J {}; int x; }; /* { dg-warning "empty struct has size 0 in C|declaration does not declare anything" } */
+--- a/src/gcc/testsuite/gcc.dg/alias-10.c
++++ b/src/gcc/testsuite/gcc.dg/alias-10.c
+@@ -29,4 +29,3 @@ void foo (bitmap head, bitmap_element *elt)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "Unswitching" 1 "unswitch"} } */
+-/* { dg-final { cleanup-tree-dump "unswitch" } } */
+--- a/src/gcc/testsuite/gcc.dg/asr_div1.c
++++ b/src/gcc/testsuite/gcc.dg/asr_div1.c
+@@ -53,4 +53,3 @@ main ()
+ 
+ /* { dg-final { scan-rtl-dump "\\(const_int 36 " "combine" { target aarch64*-*-* } } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/atomic-op-optimize.c
++++ b/src/gcc/testsuite/gcc.dg/atomic-op-optimize.c
+@@ -2,8 +2,8 @@
+    Test that it at happens on x86 by making sure there are 2 xchg's and no
+    compare_exchange loop.  */
+ 
+-/* { dg-require-effective-target sync_int_long } */
+ /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
++/* { dg-require-effective-target sync_int_long } */
+ /* { dg-final { scan-assembler-times "cmpxchg" 0 } } */
+ /* { dg-final { scan-assembler-times "xchg" 2 } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/attr-alloc_align-3.c
++++ b/src/gcc/testsuite/gcc.dg/attr-alloc_align-3.c
+@@ -53,4 +53,3 @@ test6 (int len, int align)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/attr-assume_aligned-3.c
++++ b/src/gcc/testsuite/gcc.dg/attr-assume_aligned-3.c
+@@ -21,4 +21,3 @@ test2 (int len)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-1.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-1.c
+@@ -29,5 +29,3 @@ int main(void)
+ /* Check that outer loop is parallelized.  */
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-2.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-2.c
+@@ -29,5 +29,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-3.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-3.c
+@@ -29,5 +29,3 @@ int main(void)
+ /* Check that outer loop is parallelized.  */
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-4.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-4.c
+@@ -33,5 +33,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-5.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-5.c
+@@ -46,5 +46,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/outer-6.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/outer-6.c
+@@ -47,5 +47,3 @@ int main(void)
+ /* { dg-final { scan-tree-dump-times "parallelizing outer loop" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "parallelizing inner loop" 0 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/parallelization-1.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/parallelization-1.c
+@@ -29,5 +29,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr39500-1.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr39500-1.c
+@@ -25,4 +25,3 @@ int main (void)
+ /* Check that the first loop in parloop got parallelized.  */
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 1 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr39500-2.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr39500-2.c
+@@ -17,4 +17,3 @@ int main (void)
+ /* This loop cannot be parallelized due to a dependence.  */
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 0 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr46194.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr46194.c
+@@ -21,4 +21,3 @@ int foo (void)
+ /* This loop cannot be parallelized due to a dependence.  */
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 0 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr49580.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr49580.c
+@@ -34,5 +34,4 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 1 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr49960-1.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr49960-1.c
+@@ -32,5 +32,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 0 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/pr49960.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/pr49960.c
+@@ -52,5 +52,3 @@ void main ()
+ 
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 0 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-1.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-1.c
+@@ -68,6 +68,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 3 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 4 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-1char.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-1char.c
+@@ -62,6 +62,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 3 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 4 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-1short.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-1short.c
+@@ -61,6 +61,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 3 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 4 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-2.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-2.c
+@@ -65,6 +65,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 3 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 4 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-2char.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-2char.c
+@@ -62,7 +62,5 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 2 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-2short.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-2short.c
+@@ -61,6 +61,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 2 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-3.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-3.c
+@@ -52,6 +52,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 2 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-6.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-6.c
+@@ -59,5 +59,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 0 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 1 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "FAILED: it is not a part of reduction" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-7.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-7.c
+@@ -86,6 +86,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 2 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-8.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-8.c
+@@ -86,5 +86,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 2 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/autopar/reduc-9.c
++++ b/src/gcc/testsuite/gcc.dg/autopar/reduc-9.c
+@@ -86,5 +86,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Detected reduction" 2 "parloops" } } */
+ /* { dg-final { scan-tree-dump-times "SUCCESS: may be parallelized" 3 "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand1.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand1.c
+@@ -8,4 +8,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand1a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand1a.c
+@@ -10,4 +10,3 @@ foo (char a, unsigned short b)
+ /* As long as comparisons aren't boolified and casts from boolean-types
+    aren't preserved, the folding of  X & !X to zero fails.  */
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand2.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand2.c
+@@ -8,4 +8,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand2a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand2a.c
+@@ -8,4 +8,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand3.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand3.c
+@@ -8,4 +8,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand3a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand3a.c
+@@ -8,4 +8,3 @@ foo (short a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand4.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand4.c
+@@ -8,4 +8,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand4a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand4a.c
+@@ -10,4 +10,3 @@ foo (unsigned char a, _Bool b)
+ /* As long as comparisons aren't boolified and casts from boolean-types
+    aren't preserved, the folding of  X & !X to zero fails.  */
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand5.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand5.c
+@@ -8,4 +8,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand5a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand5a.c
+@@ -8,4 +8,3 @@ foo (long a, unsigned long b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand6.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand6.c
+@@ -8,4 +8,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notand6a.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notand6a.c
+@@ -8,4 +8,3 @@ foo (unsigned long a, long b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notor1.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notor1.c
+@@ -8,4 +8,3 @@ foo (_Bool a, _Bool b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notor2.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notor2.c
+@@ -8,4 +8,3 @@ foo (_Bool a, _Bool b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notxor1.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notxor1.c
+@@ -8,4 +8,3 @@ foo (_Bool a, _Bool b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-notxor2.c
++++ b/src/gcc/testsuite/gcc.dg/binop-notxor2.c
+@@ -8,4 +8,3 @@ foo (_Bool a, _Bool b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-xor1.c
++++ b/src/gcc/testsuite/gcc.dg/binop-xor1.c
+@@ -8,4 +8,3 @@ foo (int a, int b, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" { xfail logical_op_short_circuit } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-xor2.c
++++ b/src/gcc/testsuite/gcc.dg/binop-xor2.c
+@@ -11,4 +11,3 @@ foo (int a, int b)
+    it in the real test.  */
+ /* { dg-final { scan-tree-dump-times "<bb\[^>\]*>" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-xor3.c
++++ b/src/gcc/testsuite/gcc.dg/binop-xor3.c
+@@ -8,4 +8,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-xor4.c
++++ b/src/gcc/testsuite/gcc.dg/binop-xor4.c
+@@ -11,4 +11,3 @@ foo (int a, int b, int c)
+    it in the real test.  */
+ /* { dg-final { scan-tree-dump-times "<bb\[^>\]*>" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/binop-xor5.c
++++ b/src/gcc/testsuite/gcc.dg/binop-xor5.c
+@@ -12,4 +12,3 @@ foo (int a, int b, int c)
+ /* { dg-final { scan-tree-dump-times "<bb\[^>\]*>" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\\\^" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\&" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-arith-overflow-1.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-arith-overflow-1.c
+@@ -129,4 +129,3 @@ main ()
+ /* { dg-final { scan-tree-dump-not "ADD_OVERFLOW" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "SUB_OVERFLOW" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "MUL_OVERFLOW" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-arith-overflow-2.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-arith-overflow-2.c
+@@ -107,4 +107,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "ADD_OVERFLOW" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "SUB_OVERFLOW" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "MUL_OVERFLOW" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-assume-aligned-1.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-assume-aligned-1.c
+@@ -38,4 +38,3 @@ test2 (double *out1, double *out2, double *out3, double *in1,
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "__builtin_assume_aligned" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-6.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-6.c
+@@ -39,4 +39,3 @@ int foo4 (uint32_t a, uint32_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapsi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-6a.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-6a.c
+@@ -41,4 +41,3 @@ int foo4 (uint32_t a, uint32_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapsi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-7.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-7.c
+@@ -40,4 +40,3 @@ int foo4 (uint64_t a, uint64_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapdi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-7a.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-7a.c
+@@ -41,4 +41,3 @@ int foo4 (uint64_t a, uint64_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapdi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-8.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-8.c
+@@ -43,4 +43,3 @@ uint32_t foo7 (uint32_t a, uint32_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapsi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-9.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-9.c
+@@ -43,4 +43,3 @@ uint64_t foo7 (uint64_t a, uint64_t b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "bswapdi" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-object-size-10.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-object-size-10.c
+@@ -24,4 +24,3 @@ foo(char *x)
+ 
+ /* { dg-final { scan-tree-dump "maximum object size 21" "objsz1" } } */
+ /* { dg-final { scan-tree-dump "maximum subobject size 16" "objsz1" } } */
+-/* { dg-final { cleanup-tree-dump "objsz1" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-unreachable-2.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-unreachable-2.c
+@@ -16,5 +16,3 @@ f (int i)
+ }
+ /* { dg-final { scan-tree-dump-not "foo" "optimized" } } */
+ /* { dg-final { scan-rtl-dump-not "\\(if_then_else" "cse1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+-/* { dg-final { cleanup-rtl-dump "cse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-unreachable-5.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-unreachable-5.c
+@@ -20,4 +20,3 @@ foo (int a)
+ /* { dg-final { scan-tree-dump-times "goto" 0 "fab1" } } */
+ /* { dg-final { scan-tree-dump-times "L1:" 0 "fab1" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin_unreachable" 0 "fab1" } } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtin-unreachable-6.c
++++ b/src/gcc/testsuite/gcc.dg/builtin-unreachable-6.c
+@@ -18,4 +18,3 @@ lab2:
+ 
+ /* { dg-final { scan-tree-dump-times "lab:" 1 "fab1" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin_unreachable" 1 "fab1" } } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-20.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-20.c
+@@ -122,7 +122,7 @@ void test2(double x, double y)
+   if (cos((y*=3, -x)) != cos((y*=3,x)))
+     link_error ();
+ 
+-  if (cos((y*=2, -fabs(tan(x/-y)))) != cos((y*=2,tan(x/y))))
++  if (cos(-fabs(tan(x/-y))) != cos(tan(x/y)))
+     link_error ();
+ 
+   if (cos(copysign(x,y)) != cos(x))
+@@ -350,7 +350,7 @@ void test2f(float x, float y)
+   if (cosf((y*=3, -x)) != cosf((y*=3,x)))
+     link_error ();
+ 
+-  if (cosf((y*=2, -fabsf(tanf(x/-y)))) != cosf((y*=2,tanf(x/y))))
++  if (cosf(-fabsf(tanf(x/-y))) != cosf(tanf(x/y)))
+     link_error ();
+ 
+   if (cosf(copysignf(x,y)) != cosf(x))
+@@ -577,7 +577,7 @@ void test2l(long double x, long double y)
+   if (cosl((y*=3, -x)) != cosl((y*=3,x)))
+     link_error ();
+ 
+-  if (cosl((y*=2, -fabsl(tanl(x/-y)))) != cosl((y*=2,tanl(x/y))))
++  if (cosl(-fabsl(tanl(x/-y))) != cosl(tanl(x/y)))
+     link_error ();
+ 
+   if (cosl(copysignl(x,y)) != cosl(x))
+--- a/src/gcc/testsuite/gcc.dg/builtins-43.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-43.c
+@@ -52,8 +52,6 @@ main ()
+ 
+ /* Check that all instances of __builtin_isnan were folded.  */
+ /* { dg-final { scan-tree-dump-times "isnan" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+ /* Check that all instances of link_error were subject to DCE.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-44.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-44.c
+@@ -55,4 +55,3 @@ main ()
+ 
+ /* Check that all instances of link_error were subject to DCE.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-45.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-45.c
+@@ -54,4 +54,3 @@ main ()
+ 
+ /* Check that all instances of link_error were subject to DCE.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-47.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-47.c
+@@ -17,4 +17,3 @@ int main ()
+ 
+ /* { dg-final { scan-tree-dump-times "sqrt" 0 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "pow" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-59.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-59.c
+@@ -12,4 +12,3 @@ double test (double x)
+ 
+ /* { dg-final { scan-tree-dump "__builtin_cexpi" "gimple" } } */
+ /* { dg-final { scan-tree-dump-not "sincos" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-60.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-60.c
+@@ -13,4 +13,3 @@ double test2 (double x)
+ 
+ /* { dg-final { scan-tree-dump "cos" "gimple" } } */
+ /* { dg-final { scan-tree-dump "sin" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-61.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-61.c
+@@ -30,4 +30,3 @@ double test4(double x, double y)
+ /* { dg-final { scan-tree-dump "sin" "optimized" } } */
+ /* { dg-final { scan-tree-dump "cos" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 0.0" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/builtins-62.c
++++ b/src/gcc/testsuite/gcc.dg/builtins-62.c
+@@ -38,4 +38,3 @@ double test4 (double x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "cexpi" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/cdce1.c
++++ b/src/gcc/testsuite/gcc.dg/cdce1.c
+@@ -1,8 +1,7 @@
+ /* { dg-do  run  } */
+ /* { dg-options "-O2 -fmath-errno -fdump-tree-cdce-details  -lm" } */
+ /* { dg-require-effective-target int32plus } */
+-/* { dg-final { scan-tree-dump  "cdce1.c:17: note: function call is shrink-wrapped into error conditions\."  "cdce" } } */
+-/* { dg-final { cleanup-tree-dump "cdce" } } */
++/* { dg-final { scan-tree-dump  "cdce1.c:16: note: function call is shrink-wrapped into error conditions\."  "cdce" } } */
+ /* { dg-require-effective-target large_double } */
+ 
+ #include <stdlib.h>
+--- a/src/gcc/testsuite/gcc.dg/cdce2.c
++++ b/src/gcc/testsuite/gcc.dg/cdce2.c
+@@ -1,8 +1,7 @@
+ /* { dg-do  run  } */
+ /* { dg-skip-if "doubles are floats" { "avr-*-*" } { "*" } { "" } } */
+ /* { dg-options "-O2 -fmath-errno -fdump-tree-cdce-details  -lm" } */
+-/* { dg-final { scan-tree-dump  "cdce2.c:16: note: function call is shrink-wrapped into error conditions\." "cdce" } }*/
+-/* { dg-final { cleanup-tree-dump "cdce" } } */
++/* { dg-final { scan-tree-dump  "cdce2.c:15: note: function call is shrink-wrapped into error conditions\." "cdce" } } */
+  
+ #include <stdlib.h>
+ #include <math.h>
+--- a/src/gcc/testsuite/gcc.dg/combine-clobber.c
++++ b/src/gcc/testsuite/gcc.dg/combine-clobber.c
+@@ -19,4 +19,3 @@ int f(int a, int b) { return -(a == b); }
+ 
+ /* This regexp works for reg parameters as well as mem parameters.  */
+ /* { dg-final { scan-rtl-dump {neg:SI[^:]*eq:SI[^:]*:SI} "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/combine_ashiftrt_1.c
++++ b/src/gcc/testsuite/gcc.dg/combine_ashiftrt_1.c
+@@ -18,4 +18,3 @@ foo (int64_t a)
+    the *attempt* to match this RTL pattern, regardless of whether an
+    actual insn may be found on the platform.  */
+ /* { dg-final { scan-rtl-dump "\\(neg:DI \\(ge:DI" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/combine_ashiftrt_2.c
++++ b/src/gcc/testsuite/gcc.dg/combine_ashiftrt_2.c
+@@ -18,4 +18,3 @@ foo (int32_t a)
+    the *attempt* to match this RTL pattern, regardless of whether an
+    actual insn may be found on the platform.  */
+ /* { dg-final { scan-rtl-dump "\\(neg:SI \\(ge:SI" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/const-uniq-1.c
++++ b/src/gcc/testsuite/gcc.dg/const-uniq-1.c
+@@ -21,4 +21,3 @@ int lookup2 (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "L\\\$?C\\\.*0" 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/cpp/direct2s.c
++++ b/src/gcc/testsuite/gcc.dg/cpp/direct2s.c
+@@ -41,4 +41,3 @@ void f ()
+   int j = Y;    /* { dg-error "undeclared|for each" "no macro Y" } */
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/cpp/paste4.c
++++ b/src/gcc/testsuite/gcc.dg/cpp/paste4.c
+@@ -15,4 +15,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/cpp/separate-1.c
++++ b/src/gcc/testsuite/gcc.dg/cpp/separate-1.c
+@@ -14,4 +14,3 @@ int FOO(
+ int baz FOO /* { dg-error "parse error|syntax error|expected" "error on this line" } */
+ ;
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
+@@ -15,4 +15,3 @@ int varj;
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c
+@@ -15,4 +15,3 @@ int varj;
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varh\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0x)?8\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xc|12)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xd|13)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c
+@@ -14,4 +14,3 @@ int A(B) ;
+ 
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"vari\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xa|10)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+ /* { dg-final { scan-assembler "DW_TAG_variable\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\"varj\[^\\r\\n\]*DW_AT_name(\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_)*\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*\[^0-9a-fA-FxX](0xa|10)\[^0-9a-fA-FxX]\[^\\r\\n\]*DW_AT_decl_line" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41543.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr41543.c
+@@ -11,4 +11,3 @@ foo (va_list ap)
+ }
+ 
+ /* { dg-final { scan-assembler-not "DW_AT_decl_file\[^\\r\\n\]*\(pr41543\.i\)" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-1.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-1.c
+@@ -5,4 +5,3 @@ typedef struct _Harry { int dummy; } Harry_t;
+ Harry_t harry;
+ 
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*(DW_AT_name: \"Harry_t\"|\"Harry_t..\"\[^\\r\\n\]*DW_AT_name)" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-2.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-2.c
+@@ -5,4 +5,3 @@ typedef const struct _Harry { int dummy; } Harry_t;
+ Harry_t harry;
+ 
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*(DW_AT_name: \"Harry_t\"|\"Harry_t..\"\[^\\r\\n\]*DW_AT_name)" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-3.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-3.c
+@@ -5,4 +5,3 @@ typedef struct _Harry { int dummy; } Harry_t;
+ const Harry_t harry[5];
+ 
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*(DW_AT_name: \"Harry_t\"|\"Harry_t..\"\[^\\r\\n\]*DW_AT_name)" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-4.c
++++ b/src/gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-4.c
+@@ -5,4 +5,3 @@ typedef const struct _Harry { int dummy; } Harry_t;
+ Harry_t harry[10];
+ 
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*(DW_AT_name: \"Harry_t\"|\"Harry_t..\"\[^\\r\\n\]*DW_AT_name)" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/debug/pr66068.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++
++struct S a;
++const struct S b;
++struct S
++{
++};
++
++union U c;
++const union U d;
++union U
++{
++};
+--- a/src/gcc/testsuite/gcc.dg/dse.c
++++ b/src/gcc/testsuite/gcc.dg/dse.c
+@@ -28,5 +28,4 @@ foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse*" } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/dx-test.c
+@@ -0,0 +1,5 @@
++/* { dg-do compile } */
++/* { dg-options "-dx" } */
++
++void f(void)
++{}
+--- a/src/gcc/testsuite/gcc.dg/fold-abs-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-abs-3.c
+@@ -6,4 +6,3 @@ int f (int a) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ABS" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-abs-4.c
++++ b/src/gcc/testsuite/gcc.dg/fold-abs-4.c
+@@ -12,4 +12,3 @@ int g (_Complex float a) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ABS" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-abs-5.c
++++ b/src/gcc/testsuite/gcc.dg/fold-abs-5.c
+@@ -8,4 +8,3 @@ int test (int a, int b, int sum)
+ }
+ 
+ /* { dg-final { scan-tree-dump "ABS" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-addr-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-addr-1.c
+@@ -7,4 +7,3 @@ int bar(char p1, char p2)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-alloca-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-alloca-1.c
+@@ -11,4 +11,3 @@ int main (int argc, char *argv[]) {
+ 	return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "cfg" } } */
+-/* { dg-final { cleanup-tree-dump "cfg" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-andxor-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-andxor-1.c
+@@ -25,5 +25,4 @@ int test4(int g, int h)
+ /* { dg-final { scan-tree-dump-times "~c \& d" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "~f \& e" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "~h \& g" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-bitand-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-bitand-1.c
+@@ -30,4 +30,3 @@ unsigned f4(void)
+ /* { dg-final { scan-tree-dump-times "\&c4 \& 3" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\&c8 \& 3" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 0" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-bitand-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-bitand-2.c
+@@ -39,4 +39,3 @@ unsigned f5 (void)
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 2" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 3" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-bitand-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-bitand-3.c
+@@ -22,4 +22,3 @@ int f2 (void)
+ 
+ /* { dg-final { scan-tree-dump-times "\& 3" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 1" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-bitand-4.c
++++ b/src/gcc/testsuite/gcc.dg/fold-bitand-4.c
+@@ -13,4 +13,3 @@ unsigned bar (unsigned i)
+ 
+ /* { dg-final { scan-tree-dump-times "\\\&" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\\& 4;" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-1.c
+@@ -49,5 +49,4 @@ int test8(int l)
+ /* { dg-final { scan-tree-dump-times "j >= i" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "k >= -3" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "l < -2" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-2.c
+@@ -16,5 +16,4 @@ main(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Removing basic block" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-3.c
+@@ -156,4 +156,3 @@ void bla4ge (int var)
+ /* { dg-final { scan-tree-dump-times "this_comparison_is_not_decidable" 12 "cfg" } } */
+ /* { dg-final { scan-tree-dump-times "if " 12 "cfg" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "cfg" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-4.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-4.c
+@@ -20,4 +20,3 @@ int test4 (int a)
+ 
+ /* { dg-final { scan-tree-dump-times "b == 0" 2 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 0" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-5.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-5.c
+@@ -17,4 +17,3 @@ int test3 (int a)
+ /* { dg-final { scan-tree-dump-times "return 2 - a == a" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return 1" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-6.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-6.c
+@@ -9,4 +9,3 @@ int foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "xlcbug = 1;" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-compare-8.c
++++ b/src/gcc/testsuite/gcc.dg/fold-compare-8.c
+@@ -8,4 +8,3 @@ foo (int x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump "x < y" "original"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-complex-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-complex-1.c
+@@ -8,4 +8,3 @@ foo (_Complex float x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "COMPLEX_EXPR" 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-cond-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-cond-1.c
+@@ -26,4 +26,3 @@ _Bool test4(int g, int h)
+ /* { dg-final { scan-tree-dump-times "e == 0 \&\& f != 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "g == 0 \\? h != 0 : 1" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "g != 0 \\? 1 : h != 0" 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-convnotconv-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-convnotconv-1.c
+@@ -13,5 +13,4 @@ unsigned int test2(unsigned int b)
+ 
+ /* { dg-final { scan-tree-dump-times "~a" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "~b" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-convround-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-convround-1.c
+@@ -26,5 +26,4 @@ unsigned long long test3(double x)
+ /* { dg-final { scan-tree-dump-times "__builtin_llfloor" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin_lceil" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "__builtin_llceil" 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-cstvecshift.c
++++ b/src/gcc/testsuite/gcc.dg/fold-cstvecshift.c
+@@ -10,4 +10,3 @@ void f (vec *r)
+ }
+ 
+ /* { dg-final { scan-tree-dump "{ 4, 6, 8, 10 }" "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-div-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-div-1.c
+@@ -26,5 +26,4 @@ float i(float x)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 2 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times " / " 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-div-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-div-2.c
+@@ -9,5 +9,4 @@ double f(double x)
+ /* Division should be turned into 1.0.  */
+ 
+ /* { dg-final { scan-tree-dump-not " / " "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-div-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-div-3.c
+@@ -12,4 +12,3 @@ apply_frontend_param (unsigned int spi_bias)
+ /* Make sure we perform the division in the narrower type.  */
+ 
+ /* { dg-final { scan-tree-dump "spi_bias = spi_bias / 1008;" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqand-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqand-1.c
+@@ -14,4 +14,3 @@ unsigned bar (unsigned c, unsigned d)
+ 
+ /* { dg-final { scan-tree-dump-times "a \\^ b" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "c \\^ d" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqandnot-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqandnot-1.c
+@@ -30,4 +30,3 @@ int test5(int e)
+ /* { dg-final { scan-tree-dump-times "\\(c \& 4\\) == 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(d \& 4\\) == 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(e \& 4\\) == 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqandshift-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqandshift-1.c
+@@ -53,4 +53,3 @@ void test6(unsigned int f)
+ /* { dg-final { scan-tree-dump-times "d >> 3 \& 4" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "e < 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "if \\(0\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqandshift-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqandshift-2.c
+@@ -18,5 +18,4 @@ void baz (unsigned int b)
+ 
+ /* { dg-final { scan-tree-dump-times "\\(a \& 4\\) != 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(b \& 4\\) == 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-eqandshift-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqandshift-3.c
+@@ -26,4 +26,3 @@ int test2 (unsigned long b)
+ 
+ /* { dg-final { scan-tree-dump-times "\\(a \& 1073741824\\) != 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(b \& 1073741824\\) != 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqcmplx-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqcmplx-1.c
+@@ -7,4 +7,3 @@ int foo(float x, float y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "x == y" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqxor-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqxor-1.c
+@@ -25,4 +25,3 @@ unsigned int test4(unsigned int g, unsigned int h)
+ /* { dg-final { scan-tree-dump-times "c != d" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "e == f" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "g != h" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqxor-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqxor-2.c
+@@ -25,4 +25,3 @@ int test4(int g, int h)
+ /* { dg-final { scan-tree-dump-times "d != 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "e == 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "g != 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqxor-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqxor-3.c
+@@ -25,4 +25,3 @@ int test4(int g, int h)
+ /* { dg-final { scan-tree-dump-times "c != 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "e == 4" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "g != 2" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-eqxor-4.c
++++ b/src/gcc/testsuite/gcc.dg/fold-eqxor-4.c
+@@ -19,4 +19,3 @@ int test3(int e, int f)
+ /* { dg-final { scan-tree-dump-times "a == 4" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "b == c" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "e \\^ 2" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-even-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-even-1.c
+@@ -30,4 +30,3 @@ int test5(int e)
+ /* { dg-final { scan-tree-dump-times "\\(c \& 1\\) == 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(d \& 1\\) == 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\(e \& 1\\) == 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-minus-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-minus-1.c
+@@ -17,4 +17,3 @@ void g(vec*x,vec*y,vec*z){
+ /* { dg-final { scan-tree-dump-not "/" "gimple"} } */
+ /* { dg-final { scan-tree-dump-not "\\\+" "gimple"} } */
+ /* { dg-final { scan-tree-dump "{ -13, -13 }" "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-mod-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-mod-1.c
+@@ -23,4 +23,3 @@ unsigned int k (unsigned int d) {
+ 
+ /* { dg-final { scan-tree-dump "a % (4294967288|0x0fffffff8)" "gimple" } } */
+ /* { dg-final { scan-tree-dump-times " & 7" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-mulconj-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-mulconj-1.c
+@@ -13,4 +13,3 @@ _Complex int bar(_Complex int z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "CONJ_EXPR" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-notunord.c
++++ b/src/gcc/testsuite/gcc.dg/fold-notunord.c
+@@ -7,4 +7,3 @@ int f (double d)
+ }
+ 
+ /* { dg-final { scan-tree-dump " ord " "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-perm.c
++++ b/src/gcc/testsuite/gcc.dg/fold-perm.c
+@@ -17,4 +17,3 @@ void fun (veci *f, veci *g, veci *h, veci *i)
+ /* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 3, 3, 0, 2 }" "ccp1" } } */
+ /* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 1, 1, 3, 2 }" "ccp1" } } */
+ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 2 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-plusmult-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-plusmult-2.c
+@@ -17,4 +17,3 @@ int bar (int i)
+ 
+ /* { dg-final { scan-tree-dump "i \\\* 4 \\\+ 2" "original" } } */
+ /* { dg-final { scan-tree-dump "\\\(i \\\+ 2\\\) \\\* 2" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-plusmult.c
++++ b/src/gcc/testsuite/gcc.dg/fold-plusmult.c
+@@ -12,4 +12,3 @@ int test2 (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "<a> \\\* 4" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-plusnot-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-plusnot-1.c
+@@ -26,5 +26,4 @@ unsigned int test4(unsigned int d)
+ /* { dg-final { scan-tree-dump-times "\\+ b" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\+ c" 0 "original" } } */
+ /* { dg-final { scan-tree-dump-times "\\+ d" 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-reassoc-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-reassoc-1.c
+@@ -7,4 +7,3 @@ double foo (double x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0.0;" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-reassoc-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-reassoc-2.c
+@@ -11,4 +11,3 @@ int bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-reassoc-3.c
++++ b/src/gcc/testsuite/gcc.dg/fold-reassoc-3.c
+@@ -14,4 +14,3 @@ foo (void)
+ 
+ /* { dg-final { scan-tree-dump-not " - " "original" } } */
+ /* { dg-final { scan-tree-dump-not " \\+ " "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-rotate-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-rotate-1.c
+@@ -71,4 +71,3 @@ g3 (unsigned int a)
+ int i;
+ 
+ /* { dg-final { scan-tree-dump-times "&" 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-sub.c
++++ b/src/gcc/testsuite/gcc.dg/fold-sub.c
+@@ -9,4 +9,3 @@ float f(float x)
+ /* Substraction should be turned into 0.  */
+ 
+ /* { dg-final { scan-tree-dump-not " - " "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-xor-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-xor-1.c
+@@ -9,4 +9,3 @@ unsigned int g (unsigned int a, unsigned int b) {
+   return ~a ^ ~b;
+ }
+ /* { dg-final { scan-tree-dump-times "a \\^ b" 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-xor-2.c
++++ b/src/gcc/testsuite/gcc.dg/fold-xor-2.c
+@@ -13,4 +13,3 @@ unsigned int h (unsigned int a, unsigned int b) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "b \\^ a" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/fold-xorand-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-xorand-1.c
+@@ -25,5 +25,4 @@ int test4(int g, int h)
+ /* { dg-final { scan-tree-dump-times "~c \& d" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "~f \& e" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "~h \& g" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/fold-xornot-1.c
++++ b/src/gcc/testsuite/gcc.dg/fold-xornot-1.c
+@@ -13,4 +13,3 @@ int bar(int y)
+ 
+ /* { dg-final { scan-tree-dump-times "x \\^ -5" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "y \\^ -5" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/goacc/acc_on_device-1.c
++++ b/src/gcc/testsuite/gcc.dg/goacc/acc_on_device-1.c
+@@ -17,4 +17,3 @@ f (void)
+ /* Unsuitable to be handled as a builtin, so we're expecting four calls.
+    { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 4 "expand" } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/barrier-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/barrier-1.c
+@@ -15,4 +15,3 @@ void f2(_Bool p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_barrier" 2 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/combined-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/combined-1.c
+@@ -21,4 +21,3 @@ int foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_loop_runtime" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/critical-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/critical-1.c
+@@ -25,4 +25,3 @@ void foo (void)
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_end" 2 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_name_start" 2 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_critical_name_end" 2 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/critical-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/critical-3.c
+@@ -9,4 +9,3 @@ void foo(void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "\\&\\.gomp_critical_user_xyzzy" 2 "ompexp" } }
+-// { dg-final { cleanup-tree-dump "ompexp" } }
+--- a/src/gcc/testsuite/gcc.dg/gomp/empty.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/empty.c
+@@ -10,4 +10,3 @@ main()
+ 
+ /* There should not be a GOMP_parallel_start call.  */
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_start" 0 "ompexp"} } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/flush-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/flush-1.c
+@@ -21,4 +21,3 @@ void f2(_Bool p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__sync_synchronize" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-10.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-10.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_runtime_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_runtime_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-13.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-13.c
+@@ -15,4 +15,3 @@ void foo(void)
+ }
+ 
+ // { dg-final { scan-tree-dump-times "omp_data_o" 0 "ompexp" } }
+-// { dg-final { cleanup-tree-dump "ompexp" } }
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-18.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-18.c
+@@ -39,4 +39,3 @@ bar (int *a, int i)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_loop_dynamic_start" 4 "ompexp" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_loop_guided_start" 4 "ompexp" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-19.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-19.c
+@@ -18,4 +18,3 @@ void foo (int *a, int i, int j, int k, int l, int m)
+ /* { dg-final { scan-tree-dump-times "shared\\(k\\)" 0 "gimple" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "shared\\(l\\)" 0 "gimple" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "shared\\(m\\)" 0 "gimple" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-4.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-4.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_dynamic_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_dynamic_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-5.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-5.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_guided_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_guided_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-6.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-6.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_runtime_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_runtime_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-7.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-7.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_static_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_static_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-8.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-8.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_dynamic_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_dynamic_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/for-9.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/for-9.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_guided_start" 1 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_loop_ordered_guided_next" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/macro-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/macro-3.c
+@@ -23,4 +23,3 @@ foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "#pragma omp parallel" 4 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/master-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/master-3.c
+@@ -10,4 +10,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "omp_get_thread_num" 1 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-1.c
+@@ -44,4 +44,3 @@ void foo(int n, float *a, float *b)
+ /* { dg-final { scan-tree-dump-not "omp teams" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp target" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp parallel" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-2.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-2.c
+@@ -40,4 +40,3 @@ void bar(int n, float *a, float *b)
+ /* { dg-final { scan-tree-dump-times "pragma omp simd safelen\\(64\\)" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp parallel" "original" } } */
+ /* { dg-final { scan-tree-dump-not "omp for" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/openmp-simd-3.c
+@@ -12,4 +12,3 @@ int main() {
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "omp" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/ordered-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/ordered-1.c
+@@ -17,4 +17,3 @@ void foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "GOMP_ordered_start" 2 "ompexp" } } */
+ /* { dg-final { scan-tree-dump-times "GOMP_ordered_end" 2 "ompexp" } } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/pr27388-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/pr27388-1.c
+@@ -20,4 +20,3 @@ foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "shared\\\(i\\\)" 0 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "private\\\(i\\\)" 1 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/pr27388-2.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/pr27388-2.c
+@@ -32,4 +32,3 @@ bar (void)
+ /* { dg-final { scan-tree-dump-times "shared\\\(j\\\)\[^\\n\]*private\\\(j\\\)" 0 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "private\\\(j\\\)\[^\\n\]*shared\\\(j\\\)" 0 "omplower" } } */
+ /* { dg-final { scan-tree-dump-times "omp for\[^\\n\]*private\\\(j\\\)" 1 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/pr27388-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/pr27388-3.c
+@@ -20,4 +20,3 @@ foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "omp for\[^\\n\]*private" 2 "omplower" } } */
+-/* { dg-final { cleanup-tree-dump "omplower" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/pr32468-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/pr32468-1.c
+@@ -97,4 +97,3 @@ f6 (void)
+ /* There should not be a GOMP_parallel_{loop,sections}* call.  */
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_loop" 0 "ompexp"} } */
+ /* { dg-final { scan-tree-dump-times "GOMP_parallel_sections" 0 "ompexp"} } */
+-/* { dg-final { cleanup-tree-dump "ompexp" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/pr34692.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/pr34692.c
+@@ -25,4 +25,3 @@ cde f g h);
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/simd-clones-1.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/simd-clones-1.c
+@@ -30,4 +30,3 @@ void fillit(int *tot)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "special_add.constprop" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/simd-clones-2.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/simd-clones-2.c
+@@ -23,4 +23,3 @@ float setArray(float *a, float x, int k)
+ /* { dg-final { scan-tree-dump "_ZGVdN8ua32vl_setArray" "optimized" { target i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump "_ZGVdN8vvva32_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump "_ZGVdM8vl66u_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/gomp/simd-clones-3.c
++++ b/src/gcc/testsuite/gcc.dg/gomp/simd-clones-3.c
+@@ -15,4 +15,3 @@ int addit(int a, int b, int c)
+ /* { dg-final { scan-tree-dump "_ZGVcM4vvv_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump "_ZGVdN8vvv_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump "_ZGVdM8vvv_addit" "optimized" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-0.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-0.c
+@@ -43,4 +43,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "will be loop blocked" "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-1.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-1.c
+@@ -46,4 +46,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 3 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-3.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-3.c
+@@ -59,4 +59,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-4.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-4.c
+@@ -58,4 +58,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-5.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-5.c
+@@ -54,4 +54,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-6.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-6.c
+@@ -49,4 +49,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 0 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-7.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-7.c
+@@ -55,4 +55,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-8.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-8.c
+@@ -56,4 +56,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/block-pr47654.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/block-pr47654.c
+@@ -22,4 +22,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "will be loop blocked" "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-0.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-0.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-1.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-1.c
+@@ -50,4 +50,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-10.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-10.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 2 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-11.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-11.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-12.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-12.c
+@@ -54,4 +54,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-13.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-13.c
+@@ -51,4 +51,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-14.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-14.c
+@@ -56,4 +56,3 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-15.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-15.c
+@@ -50,5 +50,4 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-16.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-16.c
+@@ -19,4 +19,3 @@ void spread_i1 (int *rptr, int *sptr, int ncopies, int *extent, int rdelta, int
+ 
+ int main() { return 0; }
+ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-2.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-2.c
+@@ -53,4 +53,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-3.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-3.c
+@@ -48,4 +48,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-4.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-4.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-5.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-5.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-6.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-6.c
+@@ -48,4 +48,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-7.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-7.c
+@@ -47,4 +47,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-8.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-8.c
+@@ -83,4 +83,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 2 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-9.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-9.c
+@@ -45,4 +45,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/interchange-mvt.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/interchange-mvt.c
+@@ -60,5 +60,4 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/isl-codegen-loop-dumping.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/isl-codegen-loop-dumping.c
+@@ -13,4 +13,3 @@ main (int n, int *a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ISL AST generated by ISL: \nfor \\(int c1 = 0; c1 < n - 1; c1 \\+= 1\\) {\n  S_10\\(c1\\);\n  for \\(int c3 = 0; c3 < n; c3 \\+= 1\\)\n    S_4\\(c1, c3\\);\n}" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr35356-1.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr35356-1.c
+@@ -23,4 +23,3 @@ foo (int bar, int n, int k)
+ */
+ 
+ /* { dg-final { scan-tree-dump-times "loop_1" 0 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr35356-2.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr35356-2.c
+@@ -39,4 +39,3 @@ foo (int bar, int n, int k)
+ */
+ 
+ /* { dg-final { scan-tree-dump-times "for\[^\n\]+\n\[^\n\]+if" 0 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr35356-3.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr35356-3.c
+@@ -37,4 +37,3 @@ match (void)
+    for such cases.  */
+ 
+ /* { dg-final { scan-tree-dump-times "loop_1" 0 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr37485.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr37485.c
+@@ -31,4 +31,3 @@ void fallbackSort ( UInt32* fmap,
+    AssertH ( j < 256, 1005 );
+ }
+ /* { dg-final { scan-tree-dump-times "Loop blocked" 1 "graphite" { xfail *-*-* }} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr37684.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr37684.c
+@@ -64,4 +64,3 @@ int BZ2_bzCompressInit
+    prepare_new_block ( s );
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/pr37943.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/pr37943.c
+@@ -29,5 +29,4 @@ unsigned char compress(test *in)
+    }
+    return p_in || p_out;
+ }
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-0.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-0.c
+@@ -18,5 +18,4 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-1.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-1.c
+@@ -28,4 +28,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-10.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-10.c
+@@ -28,4 +28,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-11.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-11.c
+@@ -29,4 +29,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-12.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-12.c
+@@ -33,4 +33,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 5" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-13.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-13.c
+@@ -38,4 +38,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-14.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-14.c
+@@ -22,4 +22,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 0" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-15.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-15.c
+@@ -48,4 +48,3 @@ int longest_match(IPos cur_match)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 0" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-16.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-16.c
+@@ -22,4 +22,3 @@ int test ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-17.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-17.c
+@@ -21,4 +21,3 @@ int test ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-18.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-18.c
+@@ -23,4 +23,3 @@ void test (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-19.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-19.c
+@@ -33,5 +33,4 @@ d_growable_string_append_buffer (struct d_growable_string *dgs,
+ }
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 0" 2 "graphite" { target nonpic } } } */
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 0" 1 "graphite" { target { ! nonpic } } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-2.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-2.c
+@@ -36,4 +36,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 4" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-20.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-20.c
+@@ -24,4 +24,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-21.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-21.c
+@@ -28,4 +28,3 @@ int test ()
+   return a[20];
+ }
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-22.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-22.c
+@@ -18,4 +18,3 @@ void foo(int N, int *res)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-3.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-3.c
+@@ -25,4 +25,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-4.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-4.c
+@@ -26,4 +26,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-5.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-5.c
+@@ -32,4 +32,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-6.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-6.c
+@@ -28,4 +28,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-7.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-7.c
+@@ -28,4 +28,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 3" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-8.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-8.c
+@@ -28,4 +28,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-9.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-9.c
+@@ -24,4 +24,3 @@ int toto()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite"} } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-dsyr2k.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-dsyr2k.c
+@@ -17,5 +17,4 @@ void dsyr2k(long N) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite"} } */ 
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-dsyrk.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-dsyrk.c
+@@ -19,4 +19,3 @@ void dsyrk(long N)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-matmult.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-matmult.c
+@@ -17,4 +17,3 @@ void matmult (int n)
+ /* This one fails because the number of iterations cannot be
+    determined anymore for the outermost loop.  */
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-mvt.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-mvt.c
+@@ -20,5 +20,4 @@ void mvt(long N) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/graphite/scop-sor.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/scop-sor.c
+@@ -15,4 +15,3 @@ void sor(int N1, int N2){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-block-1.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-block-1.c
+@@ -46,4 +46,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be loop blocked" 3 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-12.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-12.c
+@@ -55,4 +55,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-14.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-14.c
+@@ -57,4 +57,3 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-15.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-15.c
+@@ -51,5 +51,3 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+-
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-9.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-9.c
+@@ -46,4 +46,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+--- a/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-mvt.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/uns-interchange-mvt.c
+@@ -61,5 +61,3 @@ main (void)
+ 
+ /* PRE destroys the perfect nest and we can't cope with that yet.  */
+ /* { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+-
+--- a/src/gcc/testsuite/gcc.dg/graphite/vect-pr43423.c
++++ b/src/gcc/testsuite/gcc.dg/graphite/vect-pr43423.c
+@@ -16,4 +16,3 @@ void foo(int n, int mid)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/guality/guality.h
++++ b/src/gcc/testsuite/gcc.dg/guality/guality.h
+@@ -252,6 +252,10 @@ main (int argc, char *argv[])
+       if (!guality_gdb_input
+ 	  || fprintf (guality_gdb_input, "\
+ set height 0\n\
++handle SIGINT pass nostop\n\
++handle SIGTERM pass nostop\n\
++handle SIGSEGV pass nostop\n\
++handle SIGBUS pass nostop\n\
+ attach %i\n\
+ set guality_attached = 1\n\
+ b %i\n\
+--- a/src/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c
++++ b/src/gcc/testsuite/gcc.dg/hoist-register-pressure-1.c
+@@ -4,7 +4,6 @@
+    requires a load address instruction which is fine on 64 bit but
+    cannot be used on 31 bit since it does a 31 bit add only.  */
+ /* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { { !s390*-*-* || lp64 } && nonpic } } } } */
+-/* { dg-final { cleanup-rtl-dump "hoist" } } */
+ 
+ #define BUF 100
+ long a[BUF];
+--- a/src/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c
++++ b/src/gcc/testsuite/gcc.dg/hoist-register-pressure-2.c
+@@ -4,7 +4,6 @@
+    requires a load address instruction which is fine on 64 bit but
+    cannot be used on 31 bit since it does a 31 bit add only.  */
+ /* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { !s390*-*-* || lp64 } } } } */
+-/* { dg-final { cleanup-rtl-dump "hoist" } } */
+ 
+ #define BUF 100
+ long a[BUF];
+--- a/src/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c
++++ b/src/gcc/testsuite/gcc.dg/hoist-register-pressure-3.c
+@@ -4,7 +4,6 @@
+    requires a load address instruction which is fine on 64 bit but
+    cannot be used on 31 bit since it does a 31 bit add only.  */
+ /* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" { target { !s390*-*-* || lp64 } } } } */
+-/* { dg-final { cleanup-rtl-dump "hoist" } } */
+ 
+ #define BUF 100
+ long a[BUF];
+--- a/src/gcc/testsuite/gcc.dg/inline-33.c
++++ b/src/gcc/testsuite/gcc.dg/inline-33.c
+@@ -20,4 +20,3 @@ int foo (i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar"  2 "optimized"  } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/inline-36.c
++++ b/src/gcc/testsuite/gcc.dg/inline-36.c
+@@ -19,4 +19,3 @@ int foo2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar" 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/inline-37.c
++++ b/src/gcc/testsuite/gcc.dg/inline-37.c
+@@ -19,4 +19,3 @@ int foo2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar" 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/inline-38.c
++++ b/src/gcc/testsuite/gcc.dg/inline-38.c
+@@ -19,4 +19,3 @@ int foo2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar" 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/inline-39.c
++++ b/src/gcc/testsuite/gcc.dg/inline-39.c
+@@ -20,4 +20,3 @@ int foo2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/PR64550.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/PR64550.c
+@@ -72,4 +72,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/PR65282.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/PR65282.c
+@@ -17,4 +17,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ctor-empty-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ctor-empty-1.c
+@@ -5,4 +5,3 @@ void empty_constructor()
+ {
+ }
+ /* { dg-final { scan-ipa-dump "Reclaiming functions: empty_constructor"  "free-inline-summary"  } } */
+-/* { dg-final { cleanup-ipa-dump "free-inline-summary" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-1.c
+@@ -24,4 +24,3 @@ int test (void)
+ 
+ /* { dg-final { scan-ipa-dump "indirect_call"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "hooray\[^\\n\]*inline copy in test"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-2.c
+@@ -38,4 +38,3 @@ int main (int argc, int *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "hooray\[^\\n\]*inline copy in main" "inline"  } } */
+ /* { dg-final { scan-ipa-dump "hip2\[^\\n\]*inline copy in main" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-4.c
+@@ -218,4 +218,3 @@ int test7 (void)
+ /* { dg-final { scan-ipa-dump "hooray5\[^\\n\]*inline copy in test5"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "hooray6\[^\\n\]*inline copy in test6"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "hooray7\[^\\n\]*inline copy in test7"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-5.c
+@@ -121,4 +121,3 @@ int main (int argc, char **argv)
+ 
+ 
+ /* { dg-final { scan-ipa-dump-not "wrong_target\[^\\n\]*inline copy in" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-6.c
+@@ -69,4 +69,3 @@ int main (int argc, char **argv)
+ 
+ 
+ /* { dg-final { scan-ipa-dump-not "wrong_target\[^\\n\]*inline copy in" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/iinline-7.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/iinline-7.c
+@@ -154,4 +154,3 @@ int main (int argc, char **argv)
+ 
+ 
+ /* { dg-final { scan-ipa-dump-not "wrong_target\[^\\n\]*inline copy in" "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-1.c
+@@ -34,4 +34,3 @@ void foo (int invariant, struct bah invariant2)
+ /* op7 change.  */
+ /* { dg-final { scan-ipa-dump-not "op7 is compile time invariant"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump-not "op7 change"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-2.c
+@@ -31,4 +31,3 @@ void foo (int invariant)
+ /* { dg-final { scan-ipa-dump "op2 change 10.000000. of time"  "inline"  } } */
+ /* After inlining bar into foo, op3 is invariant within both loops.  */
+ /* { dg-final { scan-ipa-dump "op3 change 1.000000. of time"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-3.c
+@@ -22,4 +22,3 @@ int foo (int invariant)
+ 
+ 
+ /* { dg-final { scan-ipa-dump "Scaling time by probability:0.100000"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-4.c
+@@ -29,4 +29,3 @@ int foo (int invariant)
+ /* { dg-final { scan-ipa-dump "Inlined 1 calls, eliminated 0 functions"  "inline"  } } */
+ /* Call to work_hard should be detected as optimized out.  */
+ /* { dg-final { scan-ipa-dump-times "predicate: .false." 8 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-5.c
+@@ -36,4 +36,3 @@ accessreference (struct a *a)
+ 
+ /* { dg-final { scan-ipa-dump-times "Will be eliminated" 4 "inline" { xfail { { hppa*-*-* } && { ! lp64 } } } } } */
+ /* { dg-final { scan-ipa-dump-times "50. will be eliminated" 1 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-6.c
+@@ -45,4 +45,3 @@ main()
+ } 
+ /* Even if function is huge, inlining it will save code.  */
+ /* { dg-final { scan-ipa-dump-times "Inlined into" 2 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inline-7.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inline-7.c
+@@ -22,4 +22,3 @@ m()
+  a(0);
+ }
+ /* { dg-final { scan-tree-dump-times "Inlining a into m" 1 "einline"  } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inlinehint-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inlinehint-1.c
+@@ -18,4 +18,3 @@ m()
+   test (10);
+ }
+ /* { dg-final { scan-ipa-dump "loop_iterations"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inlinehint-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inlinehint-2.c
+@@ -14,4 +14,3 @@ m(void **p)
+   t (10, p);
+ }
+ /* { dg-final { scan-ipa-dump "loop_stride"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inlinehint-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inlinehint-3.c
+@@ -38,4 +38,3 @@ main()
+ /* { dg-final { scan-ipa-dump "same_scc"  "inline"  } } */
+ /* Main is not in scc, the two functions are.  */
+ /* { dg-final { scan-ipa-dump-times "In SCC" 2 "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/inlinehint-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/inlinehint-4.c
+@@ -37,4 +37,3 @@ test (int i)
+ /* { dg-final { scan-ipa-dump "Wrapper penalty"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump-not "Inlining lookup_slow to lookup"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump "Inlining lookup to test"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-1.c
+@@ -26,6 +26,5 @@ int main ()
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of f" "cp" } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 7" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-2.c
+@@ -24,4 +24,3 @@ int main ()
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of f" "cp" } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 7" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-3.c
+@@ -33,4 +33,3 @@ int main ()
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of g" "cp" } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 b with const 7" "cp"  } } */
+ /* { dg-final { scan-ipa-dump "replacing param .1 c with const 3" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-4.c
+@@ -27,4 +27,3 @@ int main ()
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of f" "cp"  } } */
+ /* { dg-final { scan-ipa-dump-times "replacing param .0 a with const 7" 1 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-5.c
+@@ -30,4 +30,3 @@ int main ()
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node" 3 "cp"  } } */
+ /* { dg-final { scan-ipa-dump "replacing param .1 c with const 3" "cp"  } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 7" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-7.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-7.c
+@@ -28,6 +28,5 @@ int main ()
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of f" "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "replacing param .. . with const 7" 1 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-8.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-8.c
+@@ -26,6 +26,5 @@ int main ()
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 7" "cp"  } } */
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of g" "cp" } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 b with const 7" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-clone-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-clone-1.c
+@@ -17,4 +17,3 @@ bar (int arg)
+ 
+ /* { dg-final { scan-assembler "test_section" } } */
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of foo" "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-1.c
+@@ -58,4 +58,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:x2->x1" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-10.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-10.c
+@@ -31,4 +31,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:funkce->ferda" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-11.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-11.c
+@@ -26,4 +26,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f1->f0" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-12.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-12.c
+@@ -75,4 +75,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:nsd->gcd" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-13.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-13.c
+@@ -191,4 +191,3 @@ int main(int argc, char **argv)
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:nsd_different_result2->nsd_different_result" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:nsd->gcd" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 3" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-14.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-14.c
+@@ -44,4 +44,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-15.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-15.c
+@@ -43,4 +43,3 @@ int main(int argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-16.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-16.c
+@@ -24,4 +24,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-17.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-17.c
+@@ -34,4 +34,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-18.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-18.c
+@@ -34,4 +34,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-19.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-19.c
+@@ -34,4 +34,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-2.c
+@@ -66,4 +66,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f2->f1" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-20.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-20.c
+@@ -25,4 +25,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-21.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-21.c
+@@ -24,4 +24,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-22.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-22.c
+@@ -34,4 +34,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-23.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-23.c
+@@ -26,4 +26,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-24.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-24.c
+@@ -33,4 +33,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-25.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-25.c
+@@ -49,4 +49,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:zap->zip" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 2" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-26.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-26.c
+@@ -40,4 +40,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:remove->destroy" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-27.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-27.c
+@@ -27,4 +27,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:remove->destroy" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-28.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-28.c
+@@ -21,4 +21,3 @@ int main()
+ }
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "attribute values are different" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-29.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-29.c
+@@ -27,4 +27,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-3.c
+@@ -33,4 +33,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:bar->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-30.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-30.c
+@@ -27,4 +27,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-32.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-32.c
+@@ -21,4 +21,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "optimization flags are different" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-33.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-33.c
+@@ -23,4 +23,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-34.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-34.c
+@@ -26,4 +26,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-35.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-35.c
+@@ -28,4 +28,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f2->f1" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:d->c" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:b->a" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-36.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-36.c
+@@ -34,4 +34,3 @@ int t(int tt)
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f->e" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:h->g" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:k->i" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-37.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-37.c
+@@ -34,4 +34,3 @@ int t(int tt)
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f->e" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:h->g" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:j->i" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-4.c
+@@ -29,4 +29,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-5.c
+@@ -53,4 +53,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:f2->f1" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-6.c
+@@ -33,4 +33,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-7.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-7.c
+@@ -70,4 +70,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:foo2->foo" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-8.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-8.c
+@@ -42,4 +42,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:fce2->fce1" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-9.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-icf-9.c
+@@ -30,4 +30,3 @@ int main(int argc, char **argv)
+ 
+ /* { dg-final { scan-ipa-dump-not "Semantic equality hit:" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-1.c
+@@ -47,4 +47,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "bar.arg1 = { a }" "pta" } } */
+ /* { dg-final { scan-ipa-dump "foo.arg0 = { a }" "pta" } } */
+ /* { dg-final { scan-ipa-dump "foo.arg1 = { a }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-10.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-10.c
+@@ -27,4 +27,3 @@ int main()
+    stuff through it.  */
+ 
+ /* { dg-final { scan-ipa-dump "ESCAPED = { (ESCAPED )?(NONLOCAL )?}" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-11.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-11.c
+@@ -33,4 +33,3 @@ int main()
+    we should have i, r and s in ESCAPED as well.  */
+ 
+ /* { dg-final { scan-ipa-dump "ESCAPED = { ESCAPED NONLOCAL l k }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-13.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-13.c
+@@ -58,5 +58,3 @@ int main()
+   return x;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+-/* { dg-final { cleanup-tree-dump "fre2" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-14.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-14.c
+@@ -29,4 +29,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-16.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-16.c
+@@ -30,4 +30,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "y.\[0-9\]*\\\+\[0-9\]* = { i }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-2.c
+@@ -22,4 +22,3 @@ int main()
+    are properly adjusted.  */
+ 
+ /* { dg-final { scan-ipa-dump "foo.arg0 = { ESCAPED NONLOCAL }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-3.c
+@@ -24,5 +24,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "foo.arg0 = &a" "pta" } } */
+ /* { dg-final { scan-ipa-dump "foo.arg1 = &b" "pta" } } */
+ /* { dg-final { scan-tree-dump "Replaced \\\*p_2\\\(D\\\) with 1" "fre2" } } */
+-/* { dg-final { cleanup-tree-dump "fre2" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-4.c
+@@ -29,5 +29,3 @@ int main()
+ /* { dg-final { scan-ipa-dump "foo.arg0 = &a" "pta" } } */
+ /* { dg-final { scan-ipa-dump "foo.arg1 = &b" "pta" } } */
+ /* { dg-final { scan-tree-dump "Replaced \\\*p_2\\\(D\\\) with 1" "fre2" } } */
+-/* { dg-final { cleanup-tree-dump "fre2" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-5.c
+@@ -23,4 +23,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-pta-6.c
+@@ -22,4 +22,3 @@ int main()
+    still properly account for the store via *p in foo.  */
+ 
+ /* { dg-final { scan-ipa-dump "ESCAPED = { }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c
+@@ -37,4 +37,3 @@ main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "About to replace expr" 2 "eipa_sra" } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-2.c
+@@ -49,4 +49,3 @@ int main (int argc, char *argv[])
+ /* { dg-final { scan-tree-dump "About to replace expr cow_.*D.->green with ISRA" "eipa_sra"  } } */
+ /* { dg-final { scan-tree-dump "About to replace expr calf_.*D.->red with \\*ISRA" "eipa_sra"  } } */
+ /* { dg-final { scan-tree-dump "About to replace expr calf_.*D.->green with ISRA" "eipa_sra"  } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-3.c
+@@ -36,4 +36,3 @@ void caller (void)
+ 
+ /* { dg-final { scan-tree-dump "base: z, remove_param" "eipa_sra"  } } */
+ /* { dg-final { scan-tree-dump "base: calf, remove_param" "eipa_sra"  } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-4.c
+@@ -65,4 +65,3 @@ void caller (void)
+ /* { dg-final { scan-tree-dump "About to replace expr \\*l_.*D. with ISRA" "eipa_sra"  } } */
+ /* { dg-final { scan-tree-dump-times "About to replace expr \*j_.*D. with ISRA" 0 "eipa_sra"  } } */
+ /* { dg-final { scan-tree-dump-times "About to replace expr \*k_.*D. with ISRA" 0 "eipa_sra"  } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-5.c
+@@ -17,4 +17,3 @@ int *caller (void)
+   return ox (&a, &b);
+ }
+ /* { dg-final { scan-tree-dump-times "base: j, remove_param" 0 "eipa_sra"  } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-6.c
+@@ -31,4 +31,3 @@ int main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "foo " 1 "eipa_sra"  } } */
+-/* { dg-final { cleanup-tree-dump "eipa_sra" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipacost-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipacost-1.c
+@@ -58,5 +58,3 @@ main()
+ /* { dg-final { scan-ipa-dump-not "Creating a specialized node of i_can_not_be_propagated_fully/" "cp"  } } */
+ /* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully " "optimized"  } } */
+ /* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully2 " "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipacost-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipacost-2.c
+@@ -77,5 +77,3 @@ main()
+ /* { dg-final { scan-ipa-dump-not "Creating a specialized node of i_can_not_be_propagated_fully/" "cp"  } } */
+ /* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully \\(" "optimized"  } } */
+ /* { dg-final { scan-tree-dump-not "i_can_be_propagated_fully2 \\(" "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-1.c
+@@ -47,6 +47,5 @@ main (int argc, char *argv[])
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of f.*for all known contexts" "cp" } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 7" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-2.c
+@@ -96,4 +96,3 @@ top2 (int q)
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of foo" 1 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "replacing param .. p with const 0" 3 "cp"  } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 s with const 4" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-3.c
+@@ -66,5 +66,4 @@ int main()
+ 
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of mark_cell" "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-4.c
+@@ -63,6 +63,5 @@ main (int argc, char *argv[])
+ /* { dg-final { scan-ipa-dump-not "Creating a specialized node of h.*for all known contexts" "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "replacing param .0 a with const 7" 2 "cp"  } } */
+ /* { dg-final { scan-ipa-dump "replacing param .0 a with const 11" "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-1.c
+@@ -32,6 +32,4 @@ entry (void)
+ 
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of foo.*for all known contexts" "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements:" 2 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-2.c
+@@ -38,6 +38,4 @@ entry (int c)
+ }
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of foo/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements:" 4 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-3.c
+@@ -39,6 +39,4 @@ entry (int c)
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of foo/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements: 1" 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements: 0" 2 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-4.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-4.c
+@@ -57,6 +57,4 @@ entry2 (int c)
+ 
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of foo/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements:" 4 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-5.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-5.c
+@@ -63,6 +63,4 @@ entry2 (int c)
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of foo/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of bar/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements:" 8 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-6.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-6.c
+@@ -70,6 +70,4 @@ entry2 (int c)
+ /* { dg-final { scan-ipa-dump-times "Creating a specialized node of bar/\[0-9\]*\\." 2 "cp" } } */
+ /* { dg-final { scan-ipa-dump "Creating a specialized node of bar_2.*for all known contexts" "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Aggregate replacements:" 10 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-7.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-7.c
+@@ -49,6 +49,4 @@ entry (int c)
+ }
+ /* { dg-final { scan-ipa-dump-times "Clone of bar" 1 "cp" } } */
+ /* { dg-final { scan-ipa-dump-times "Clone of foo" 1 "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+ /* { dg-final { scan-tree-dump-not "->c;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-8.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-8.c
+@@ -49,4 +49,3 @@ entry (int c)
+     }
+ }
+ /* { dg-final { scan-tree-dump "->b;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-9.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-agg-9.c
+@@ -41,5 +41,3 @@ int test1 (void)
+ 
+ /* { dg-final { scan-ipa-dump "ipa-prop: Discovered an indirect call to a known target"  "cp"  } } */
+ /* { dg-final { scan-ipa-dump "hooray1\[^\\n\]*inline copy in hiphip1"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipcp-ii-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipcp-ii-1.c
+@@ -31,4 +31,3 @@ int main (int argc, int *argv[])
+ }
+ 
+ /* { dg-final { scan-ipa-dump "hooray\[^\\n\]*inline copy in hiphip.constprop"  "inline"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/noclone-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/noclone-1.c
+@@ -26,4 +26,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-ipa-dump-times "versioned function" 0 "cp"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr63569.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr63569.c
+@@ -28,4 +28,3 @@ int h(int t, int *a)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr63595.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr63595.c
+@@ -62,4 +62,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "PHI results are different" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr63747.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr63747.c
+@@ -37,4 +37,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr64307.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr64307.c
+@@ -29,4 +29,3 @@ int main()
+ 
+ /* { dg-final { scan-ipa-dump "Semantic equality hit:real_part_2->real_part" "icf"  } } */
+ /* { dg-final { scan-ipa-dump "Equal symbols: 1" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr65318.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr65318.c
+@@ -15,4 +15,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pr68790.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pr68790.c
+@@ -38,4 +38,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "Equal symbols: 0" "icf"  } } */
+-/* { dg-final { cleanup-ipa-dump "icf" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/propalign-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/propalign-1.c
+@@ -28,5 +28,3 @@ bar (void)
+ 
+ /* { dg-final { scan-ipa-dump "Adjusting alignment of param" "cp" } } */
+ /* { dg-final { scan-tree-dump-not "fail_the_test" "optimized" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/propalign-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/propalign-2.c
+@@ -54,5 +54,3 @@ bar2 (void)
+ 
+ /* { dg-final { scan-ipa-dump "Adjusting alignment of param" "cp" } } */
+ /* { dg-final { scan-tree-dump-not "fail_the_test" "optimized" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/propalign-3.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/propalign-3.c
+@@ -54,5 +54,3 @@ bar2 (void)
+ 
+ /* { dg-final { scan-ipa-dump-not "Adjusting alignment of param" "cp" } } */
+ /* { dg-final { scan-tree-dump "fail_the_test" "optimized" } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pure-const-1.c
+@@ -75,7 +75,4 @@ test()
+ /* { dg-final { scan-tree-dump "found to be looping pure: i_am_pure4" "local-pure-const1"} } */
+ /* { dg-final { scan-ipa-dump "found to be const: i_am_const2" "pure-const"} } */
+ /* { dg-final { scan-ipa-dump "found to be const: i_am_const3" "pure-const"} } */
+-/* { dg-final { cleanup-tree-dump "local-pure-const1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+-/* { dg-final { cleanup-ipa-dump "pure-const" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/ipa/pure-const-2.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/pure-const-2.c
+@@ -26,5 +26,3 @@ main(void)
+ }
+ /* { dg-final { scan-tree-dump "found to be pure: i_am_pure" "local-pure-const1"} } */
+ /* { dg-final { scan-tree-dump-not "i_am_pure" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "local-pure-const1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/remref-0.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/remref-0.c
+@@ -26,5 +26,3 @@ int main (void)
+ 
+ /* { dg-final { scan-ipa-dump "ipa-prop: Removed a reference"  "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "hooray"  "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/remref-1a.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/remref-1a.c
+@@ -30,5 +30,3 @@ int main (void)
+ 
+ /* { dg-final { scan-ipa-dump "ipa-prop: Removed a reference"  "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "hooray"  "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/remref-1b.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/remref-1b.c
+@@ -32,6 +32,3 @@ int main (void)
+ /* { dg-final { scan-ipa-dump "removing its cloning-created reference"  "cp"  } } */
+ /* { dg-final { scan-ipa-dump "ipa-prop: Removed a reference"  "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "hooray"  "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/remref-2a.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/remref-2a.c
+@@ -86,5 +86,3 @@ main (int argc, int *argv[])
+ 
+ /* { dg-final { scan-ipa-dump-times "ipa-prop: Removed a reference" 2 "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "hooray"  "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ipa/remref-2b.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/remref-2b.c
+@@ -89,6 +89,3 @@ main (int argc, int *argv[])
+ /* { dg-final { scan-ipa-dump "ipa-prop: Removed a reference"  "inline"  } } */
+ /* { dg-final { scan-ipa-dump-times "ipa-prop: Removing cloning-created reference" 2 "inline"  } } */
+ /* { dg-final { scan-tree-dump-not "hooray"  "optimized"  } } */
+-/* { dg-final { cleanup-ipa-dump "cp" } } */
+-/* { dg-final { cleanup-ipa-dump "inline" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ira-loop-pressure.c
++++ b/src/gcc/testsuite/gcc.dg/ira-loop-pressure.c
+@@ -28,5 +28,4 @@ int foo (int a, int b, int c, int d)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Decided to move invariant" "loop2_invariant"  } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_invariant" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c
++++ b/src/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-1.c
+@@ -27,5 +27,3 @@ bar (long a)
+ /* { dg-final { scan-rtl-dump "Will split live ranges of parameters" "ira"  } } */
+ /* { dg-final { scan-rtl-dump "Split live-range of register" "ira"  } } */
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "ira" } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c
++++ b/src/gcc/testsuite/gcc.dg/ira-shrinkwrap-prep-2.c
+@@ -32,5 +32,3 @@ bar (long a)
+ /* { dg-final { scan-rtl-dump "Will split live ranges of parameters" "ira"  } } */
+ /* { dg-final { scan-rtl-dump "Split live-range of register" "ira"  } } */
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "ira" } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.dg/loop-7.c
++++ b/src/gcc/testsuite/gcc.dg/loop-7.c
+@@ -12,5 +12,4 @@ void f(int *a)
+ 
+ /* Load of 0 is moved out of the loop.  */
+ /* { dg-final { scan-rtl-dump-times "Decided" 1 "loop2_invariant" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_invariant" } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/loop-8.c
+@@ -0,0 +1,23 @@
++/* { dg-do compile } */
++/* { dg-options "-O1 -fdump-rtl-loop2_invariant" } */
++
++void
++f (int *a, int *b)
++{
++  int i;
++
++  for (i = 0; i < 100; i++)
++    {
++      int d = 42;
++
++      a[i] = d;
++      if (i % 2)
++	d = i;
++      b[i] = d;
++    }
++}
++
++/* Load of 42 is moved out of the loop, introducing a new pseudo register.  */
++/* { dg-final { scan-rtl-dump-times "Decided" 1 "loop2_invariant" } } */
++/* { dg-final { scan-rtl-dump-not "without introducing a new temporary register" "loop2_invariant" } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/loop-9.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options "-O1 -fdump-rtl-loop2_invariant" } */
++
++void
++f (double *a)
++{
++  int i;
++  for (i = 0; i < 100; i++)
++    a[i] = 18.4242;
++}
++
++/* Load of x is moved out of the loop.  */
++/* { dg-final { scan-rtl-dump "Decided" "loop2_invariant" } } */
++/* { dg-final { scan-rtl-dump "without introducing a new temporary register" "loop2_invariant" } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/loop-invariant.c
+@@ -0,0 +1,42 @@
++/* { dg-do compile { target x86_64-*-* } } */
++/* { dg-options "-O2 -fdump-rtl-loop2_invariant" } */
++/* NOTE: The target list above could be extended to other targets that have
++         conditional moves, but don't have zero registers.  */
++
++enum test_type
++{
++  TYPE0,
++  TYPE1
++};
++
++struct type_node
++{
++  enum test_type type;
++};
++
++struct test_ref
++{
++  struct type_node *referring;
++};
++
++struct test_node
++{
++  struct test_node *next;
++};
++
++int iterate (struct test_node *, unsigned, struct test_ref **);
++
++int
++loop_invar (struct test_node *node)
++{
++  struct test_ref *ref;
++
++  for (unsigned i = 0; iterate (node, i, &ref); i++)
++    if (loop_invar ((ref->referring && ref->referring->type == TYPE0)
++                    ? ((struct test_node *) (ref->referring)) : 0))
++      return 1;
++
++  return 0;
++}
++
++/* { dg-final { scan-rtl-dump "Decided to move invariant" "loop2_invariant" } } */
+--- a/src/gcc/testsuite/gcc.dg/lower-subreg-1.c
++++ b/src/gcc/testsuite/gcc.dg/lower-subreg-1.c
+@@ -6,4 +6,3 @@
+ long long test (long long a, long long b) { return a | b; }
+ 
+ /* { dg-final { scan-rtl-dump "Splitting reg" "subreg1" } } */
+-/* { dg-final { cleanup-rtl-dump "subreg1" } } */
+--- a/src/gcc/testsuite/gcc.dg/macro-fusion-1.c
++++ b/src/gcc/testsuite/gcc.dg/macro-fusion-1.c
+@@ -12,4 +12,3 @@ double bar (double sum)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "compare.*insn.*jump_insn.*jump_insn" "sched2" } } */
+-/* { dg-final { cleanup-rtl-dump "sched2" } } */
+--- a/src/gcc/testsuite/gcc.dg/macro-fusion-2.c
++++ b/src/gcc/testsuite/gcc.dg/macro-fusion-2.c
+@@ -15,4 +15,3 @@ double bar (double sum)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "compare.*insn.*jump_insn.*jump_insn" "sched2" } } */
+-/* { dg-final { cleanup-rtl-dump "sched2" } } */
+--- a/src/gcc/testsuite/gcc.dg/memcpy-1.c
++++ b/src/gcc/testsuite/gcc.dg/memcpy-1.c
+@@ -2,7 +2,6 @@
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* PR36598 AVR fail maybe due to cost metrics */
+ /* { dg-final { scan-tree-dump-times "nasty_local\\." 0 "optimized" { xfail { "avr-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ struct a {int a,b,c;} a;
+ int test(struct a a)
+ {
+--- a/src/gcc/testsuite/gcc.dg/memcpy-3.c
++++ b/src/gcc/testsuite/gcc.dg/memcpy-3.c
+@@ -11,4 +11,3 @@ int get_int(const void *p)
+ 
+ /* { dg-final { scan-tree-dump-not "memcpy" "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "MEM" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/memcpy-4.c
++++ b/src/gcc/testsuite/gcc.dg/memcpy-4.c
+@@ -11,4 +11,3 @@ f1 (char *p)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "mem/u.*mem/u" "expand" { target mips*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/memcpy-5.c
++++ b/src/gcc/testsuite/gcc.dg/memcpy-5.c
+@@ -25,4 +25,3 @@ TEST (d64d, double __attribute__((vector_size (64))));
+ TEST (d128d, double __attribute__((vector_size (128))));
+ 
+ /* { dg-final { scan-tree-dump-not "memcpy" "optimized" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/memmove-1.c
++++ b/src/gcc/testsuite/gcc.dg/memmove-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "memmove" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ static const char a[100]={1,2,3,4};
+ char b[1000];
+ int i,i1;
+--- a/src/gcc/testsuite/gcc.dg/memmove-2.c
++++ b/src/gcc/testsuite/gcc.dg/memmove-2.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "memmove" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ char a[40];
+ extern void bar (char *);
+--- a/src/gcc/testsuite/gcc.dg/memmove-3.c
++++ b/src/gcc/testsuite/gcc.dg/memmove-3.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "memmove" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ char a[40];
+ struct A { char a[30]; };
+--- a/src/gcc/testsuite/gcc.dg/memmove-4.c
++++ b/src/gcc/testsuite/gcc.dg/memmove-4.c
+@@ -9,4 +9,3 @@ void b(char *a, char *b, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "memmove" "optimized" { xfail { ! non_strict_align } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/minmax-1.c
++++ b/src/gcc/testsuite/gcc.dg/minmax-1.c
+@@ -80,4 +80,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "MIN_EXPR" 0 "original"} } */
+ /* { dg-final { scan-tree-dump-times "MAX_EXPR" 0 "original"} } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/nested-func-7.c
++++ b/src/gcc/testsuite/gcc.dg/nested-func-7.c
+@@ -12,4 +12,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "bar" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-1.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-1.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "-[ ]*5" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-2.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-2.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "100" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-3.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-3.c
+@@ -13,4 +13,3 @@ foo (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump "1000" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-4.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-4.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\[^ \]*_.(\\\(D\\\))? (>|<) \[^ \]*_." "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-5.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-5.c
+@@ -17,4 +17,3 @@ int foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "r = 3" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-6.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-6.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "return bits" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-7.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-7.c
+@@ -13,4 +13,3 @@ foo (char* p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\[+\]\[ \]*1000" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/no-strict-overflow-8.c
++++ b/src/gcc/testsuite/gcc.dg/no-strict-overflow-8.c
+@@ -22,4 +22,3 @@ foo (struct c *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "i_.* > 0" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/nrv3.c
++++ b/src/gcc/testsuite/gcc.dg/nrv3.c
+@@ -32,4 +32,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return slot optimization" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/nrv4.c
++++ b/src/gcc/testsuite/gcc.dg/nrv4.c
+@@ -29,5 +29,4 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return slot optimization" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/nrv5.c
++++ b/src/gcc/testsuite/gcc.dg/nrv5.c
+@@ -25,4 +25,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return slot optimization" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapdi-1.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapdi-1.c
+@@ -58,4 +58,3 @@ swap64_c (uint64_t x)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "64 bit bswap implementation found at" 3 "bswap" } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapdi-2.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapdi-2.c
+@@ -23,4 +23,3 @@ swap64_c (uint64_t x)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "64 bit bswap implementation found at" 1 "bswap" } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapdi-3.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapdi-3.c
+@@ -61,4 +61,3 @@ uint64_t read_be64_3 (unsigned char *data)
+ 
+ /* { dg-final { scan-tree-dump-times "64 bit load in target endianness found at" 3 "bswap" } } */
+ /* { dg-final { scan-tree-dump-times "64 bit bswap implementation found at" 3 "bswap" { xfail alpha*-*-* arm*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswaphi-1.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswaphi-1.c
+@@ -57,4 +57,3 @@ swap16 (HItype in)
+ /* { dg-final { scan-tree-dump-times "16 bit load in target endianness found at" 3 "bswap" } } */
+ /* { dg-final { scan-tree-dump-times "16 bit bswap implementation found at" 1 "bswap" { target alpha*-*-* arm*-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "16 bit bswap implementation found at" 4 "bswap" { xfail alpha*-*-* arm*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapsi-1.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapsi-1.c
+@@ -90,4 +90,3 @@ swap32_f (unsigned in)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "32 bit bswap implementation found at" 6 "bswap" } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapsi-2.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapsi-2.c
+@@ -46,4 +46,3 @@ uint32_t read_be32_3 (unsigned char *data)
+ 
+ /* { dg-final { scan-tree-dump-times "32 bit load in target endianness found at" 3 "bswap" } } */
+ /* { dg-final { scan-tree-dump-times "32 bit bswap implementation found at" 3 "bswap" { xfail alpha*-*-* arm*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/optimize-bswapsi-3.c
++++ b/src/gcc/testsuite/gcc.dg/optimize-bswapsi-3.c
+@@ -21,4 +21,3 @@ swap32 (SItype in)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "32 bit bswap implementation found at" "bswap" } } */
+-/* { dg-final { cleanup-tree-dump "bswap" } } */
+--- a/src/gcc/testsuite/gcc.dg/opts-4.c
++++ b/src/gcc/testsuite/gcc.dg/opts-4.c
+@@ -6,4 +6,3 @@ void f (void)
+ {
+ }
+ 
+-/* { dg-final { cleanup-rtl-dump "*" } } */
+--- a/src/gcc/testsuite/gcc.dg/pch/save-temps-1.c
++++ b/src/gcc/testsuite/gcc.dg/pch/save-temps-1.c
+@@ -5,5 +5,4 @@
+ #endif
+ #include <stddef.h>
+ int x;
+-
+-/* { dg-final { cleanup-saved-temps ".s" } } */
++/* { dg-keep-saved-temps ".s" } */
+--- a/src/gcc/testsuite/gcc.dg/pointer-arith-10.c
++++ b/src/gcc/testsuite/gcc.dg/pointer-arith-10.c
+@@ -7,4 +7,3 @@ char *foo(char *p, __UINTPTR_TYPE__ i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "p +" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pow-sqrt-1.c
+@@ -0,0 +1,6 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -ffast-math --param max-pow-sqrt-depth=5" } */
++
++#define EXPN (-6 * (0.5*0.5*0.5*0.5))
++
++#include "pow-sqrt.x"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pow-sqrt-2.c
+@@ -0,0 +1,5 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -ffast-math --param max-pow-sqrt-depth=5" } */
++
++#define EXPN (-5.875)
++#include "pow-sqrt.x"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pow-sqrt-3.c
+@@ -0,0 +1,5 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -ffast-math --param max-pow-sqrt-depth=3" } */
++
++#define EXPN (1.25)
++#include "pow-sqrt.x"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c
+@@ -0,0 +1,37 @@
++/* { dg-do compile { target sqrt_insn } } */
++/* { dg-options "-fdump-tree-sincos -Ofast --param max-pow-sqrt-depth=8" } */
++/* { dg-additional-options "-mfloat-abi=softfp -mfpu=neon-vfpv4" { target arm*-*-* } } */
++
++double
++foo (double a)
++{
++  return __builtin_pow (a, -5.875);
++}
++
++double
++foof (double a)
++{
++  return __builtin_pow (a, 0.75f);
++}
++
++double
++bar (double a)
++{
++  return __builtin_pow (a, 1.0 + 0.00390625);
++}
++
++double
++baz (double a)
++{
++  return __builtin_pow (a, -1.25) + __builtin_pow (a, 5.75) - __builtin_pow (a, 3.375);
++}
++
++#define N 256
++void
++vecfoo (double *a)
++{
++  for (int i = 0; i < N; i++)
++    a[i] = __builtin_pow (a[i], 1.25);
++}
++
++/* { dg-final { scan-tree-dump-times "synthesizing" 7 "sincos" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pow-sqrt.x
+@@ -0,0 +1,30 @@
++
++extern void abort (void);
++
++
++__attribute__((noinline)) double
++real_pow (double x, double pow_exp)
++{
++  return __builtin_pow (x, pow_exp);
++}
++
++#define EPS (0.000000000000000000001)
++
++#define SYNTH_POW(X, Y) __builtin_pow (X, Y)
++volatile double arg;
++
++int
++main (void)
++{
++  double i_arg = 0.1;
++
++  for (arg = i_arg; arg < 100.0; arg += 1.0)
++    {
++      double synth_res = SYNTH_POW (arg, EXPN);
++      double real_res = real_pow (arg, EXPN);
++
++      if (__builtin_abs (SYNTH_POW (arg, EXPN) - real_pow (arg, EXPN)) > EPS)
++	abort ();
++    }
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.dg/pr10474.c
++++ b/src/gcc/testsuite/gcc.dg/pr10474.c
+@@ -13,4 +13,3 @@ void f(int *i)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr14796-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr14796-1.c
+@@ -21,4 +21,3 @@ int l (int d) {
+ /* { dg-final { scan-tree-dump "b & -32" "gimple" } } */
+ /* { dg-final { scan-tree-dump "c & 15" "gimple" } } */
+ /* { dg-final { scan-tree-dump "d << 6" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr14796-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr14796-2.c
+@@ -20,4 +20,3 @@ long long j (long long c) {
+ /* { dg-final { scan-tree-dump-times "= 0" 2 "gimple" } } */
+ /* { dg-final { scan-tree-dump "b >> 31" "gimple" } } */
+ /* { dg-final { scan-tree-dump "c & -(34359738368|0x800000000)" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr15784-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr15784-1.c
+@@ -40,4 +40,3 @@ int i (float x) {
+ 	return fabs(x) == -0.0;
+ }
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr15784-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr15784-2.c
+@@ -9,4 +9,3 @@ int a (float x) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr15784-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr15784-3.c
+@@ -11,4 +11,3 @@ int a (float x) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr15784-4.c
++++ b/src/gcc/testsuite/gcc.dg/pr15784-4.c
+@@ -10,4 +10,3 @@ int b (int x) {
+ 
+ /* { dg-final { scan-tree-dump "~x_..D.;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "-x_..D.;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr19105.c
++++ b/src/gcc/testsuite/gcc.dg/pr19105.c
+@@ -18,5 +18,4 @@ int range2 (enum e v, int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests v_\[0-9\]*.D. -.2, 2. and -.3, 4.\[\n\r\]* into|Optimizing range tests v_\[0-9\]*.D. -.2, 2. and -.3, 3. and -.4, 4.\[\n\r\]* into" 1 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr19988.c
++++ b/src/gcc/testsuite/gcc.dg/pr19988.c
+@@ -10,5 +10,3 @@ double foo(double x, double y)
+ /* { dg-final { scan-tree-dump-times " 1.23" 2 "original" } } */
+ /* CSE one multiplication.  */
+ /* { dg-final { scan-tree-dump-times " \\\* " 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20115-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr20115-1.c
+@@ -12,4 +12,3 @@ int bar()
+ 
+ /* Check that we only have one call to foo.  */
+ /* { dg-final { scan-tree-dump-times "foo" 1 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20130-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr20130-1.c
+@@ -12,4 +12,3 @@ int y (int a) {
+ 	return -(-1 * -a);
+ }
+ /* { dg-final { scan-tree-dump-times "-a" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-1.c
+@@ -35,4 +35,3 @@ int z(double i)
+   return (i + (-2.0)) > i;
+ }
+ /* { dg-final { scan-tree-dump-times " = 0" 7 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-2.c
+@@ -15,4 +15,3 @@ int h (double i)
+   return (i + 2.0) <= i;
+ }
+ /* { dg-final { scan-tree-dump-times " = 0" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-3.c
+@@ -30,4 +30,3 @@ int z(double i)
+   return (i + (-2.0)) <= i;
+ }
+ /* { dg-final { scan-tree-dump-times " = 1" 6 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-4.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-4.c
+@@ -35,4 +35,3 @@ int z(double i)
+   return i < (i + (-2.0));
+ }
+ /* { dg-final { scan-tree-dump-times " = 0" 7 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-5.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-5.c
+@@ -20,4 +20,3 @@ int j (double i)
+   return i > i + 2.0;
+ }
+ /* { dg-final { scan-tree-dump-times " = 0" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr20922-6.c
++++ b/src/gcc/testsuite/gcc.dg/pr20922-6.c
+@@ -30,4 +30,3 @@ int z(double i)
+   return i >= (i + (-2.0));
+ }
+ /* { dg-final { scan-tree-dump-times " = 1" 6 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr21032.c
++++ b/src/gcc/testsuite/gcc.dg/pr21032.c
+@@ -8,4 +8,3 @@ void foo(double x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "-\\(float\\)" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr21643.c
++++ b/src/gcc/testsuite/gcc.dg/pr21643.c
+@@ -87,4 +87,3 @@ f9 (unsigned char c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests c_\[0-9\]*.D. -.0, 31. and -.32, 32.\[\n\r\]* into" 6 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr23295.c
++++ b/src/gcc/testsuite/gcc.dg/pr23295.c
+@@ -7,4 +7,3 @@ int foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "-5 - i" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr23470-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr23470-1.c
+@@ -11,4 +11,3 @@ int f(double a, double b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "if \\(0\\)" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr23584.c
++++ b/src/gcc/testsuite/gcc.dg/pr23584.c
+@@ -18,4 +18,3 @@ int test2 (void)
+ 
+ /* { dg-final { scan-ipa-dump-not "found to be pure: test1" "pure-const" } } */
+ /* { dg-final { scan-ipa-dump-not "found to be pure: test2" "pure-const" } } */
+-/* { dg-final { cleanup-ipa-dump "pure-const" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr23623.c
++++ b/src/gcc/testsuite/gcc.dg/pr23623.c
+@@ -45,4 +45,3 @@ void readb(void)
+    the parenthesized subexpression in the regexp introduces an extra match
+    variable, we need to give a count of 12 instead of 6 here.  */
+ /* { dg-final { scan-rtl-dump-times "mem/v(/.)*:SI" 12 "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr23911.c
++++ b/src/gcc/testsuite/gcc.dg/pr23911.c
+@@ -18,4 +18,3 @@ test (void)
+    constant folded.  There should be no loads from b left.  */
+ /* { dg-final { scan-tree-dump-times "__complex__ \\\(1.0e\\\+0, 0.0\\\)" 2 "dce2" } } */
+ /* { dg-final { scan-tree-dump-times "= b" 0 "dce2" } } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr27132.c
++++ b/src/gcc/testsuite/gcc.dg/pr27132.c
+@@ -7,4 +7,3 @@ int foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "i \\+ 1" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr28685-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr28685-1.c
+@@ -47,4 +47,3 @@ int test5 (int a, int b)
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not " < " "optimized" } } */
+ /* { dg-final { scan-tree-dump-not " == " "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr29215.c
++++ b/src/gcc/testsuite/gcc.dg/pr29215.c
+@@ -30,4 +30,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "memcpy" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr29801.c
++++ b/src/gcc/testsuite/gcc.dg/pr29801.c
+@@ -21,4 +21,3 @@ int test (int param)
+ /* { dg-final { scan-tree-dump-times "return 2" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "return 5" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr30137-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr30137-1.c
+@@ -20,4 +20,3 @@ int foo13 (void) { return *p != &p; }
+ 
+ /* { dg-final { scan-tree-dump-not "= 0;" "gimple" } } */
+ /* { dg-final { scan-tree-dump-not "= 1;" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr30137-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr30137-2.c
+@@ -17,4 +17,3 @@ int foo8 (void) { return &x.u.i == &x.u.s; }
+ 
+ /* { dg-final { scan-tree-dump-times "= 0" 1 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "= 1" 7 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr30172-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr30172-1.c
+@@ -12,4 +12,3 @@ _Complex double test5 (double x, double y) { return (x + y * 1.i) * -1.i; }
+ /* { dg-final { scan-tree-dump "COMPLEX_EXPR <x, y>" "gimple" } } */
+ /* { dg-final { scan-tree-dump "D.* = -y;\n.*COMPLEX_EXPR <D.*, x>" "gimple" } } */
+ /* { dg-final { scan-tree-dump "D.* = -x;\n.*COMPLEX_EXPR <y, D.*>" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr30904.c
++++ b/src/gcc/testsuite/gcc.dg/pr30904.c
+@@ -15,4 +15,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"  } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr30957-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr30957-1.c
+@@ -34,4 +34,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Expanding Accumulator" "loop2_unroll" } } */
+-/* { dg-final { cleanup-rtl-dump "loop*" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr31847.c
++++ b/src/gcc/testsuite/gcc.dg/pr31847.c
+@@ -12,4 +12,3 @@ int foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Created value  for " "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr32328.c
++++ b/src/gcc/testsuite/gcc.dg/pr32328.c
+@@ -14,4 +14,3 @@ void baz()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Everything OK" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr32721.c
++++ b/src/gcc/testsuite/gcc.dg/pr32721.c
+@@ -16,4 +16,3 @@ spinlock1 = &spinlock[1];
+ 
+ /* { dg-final { scan-tree-dump "={v} .*spinlock" "optimized" } } */
+ /* { dg-final { scan-tree-dump "spinlock.* ={v}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr32912-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr32912-3.c
+@@ -11,4 +11,3 @@ bar (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "~\{" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr33653.c
++++ b/src/gcc/testsuite/gcc.dg/pr33653.c
+@@ -7,4 +7,3 @@ void f (volatile char *p)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "mem/v" "shorten" } } */
+-/* { dg-final { cleanup-rtl-dump "shorten" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr33826.c
++++ b/src/gcc/testsuite/gcc.dg/pr33826.c
+@@ -48,5 +48,3 @@ int norecurse1b (int i)
+ /* { dg-final { scan-ipa-dump-not "found to be const: recurse1" "pure-const" } } */
+ /* { dg-final { scan-ipa-dump-not "found to be const: recurse2a" "pure-const" } } */
+ /* { dg-final { scan-ipa-dump-not "found to be const: recurse2b" "pure-const" } } */
+-/* { dg-final { cleanup-ipa-dump "pure-const" } } */
+-/* { dg-final { cleanup-tree-dump "local-pure-const1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr34027-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr34027-1.c
+@@ -13,4 +13,3 @@ unsigned long foobar(unsigned long ns)
+    that anymore.  */
+ /* { dg-final { scan-tree-dump-times "%" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "/" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr34027-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr34027-2.c
+@@ -7,4 +7,3 @@ long foo(long n, long m)
+ }
+ 
+ /* { dg-final { scan-tree-dump "n % m" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr34263.c
++++ b/src/gcc/testsuite/gcc.dg/pr34263.c
+@@ -56,5 +56,4 @@ int look( struct s *p, struct s **pp )
+ }
+ 
+ /* { dg-final { scan-tree-dump "Cleaned-up latch block of loop with single BB" "optimized" { xfail { *-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr35729.c
++++ b/src/gcc/testsuite/gcc.dg/pr35729.c
+@@ -15,4 +15,3 @@ void func_1 (void)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "Decided to move invariant" 0 "loop2_invariant" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_invariant" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr37171.c
++++ b/src/gcc/testsuite/gcc.dg/pr37171.c
+@@ -16,4 +16,3 @@ unsigned int f4 (void)
+ /* { dg-final { scan-tree-dump-times "= f1 \\(\\)" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= f2 \\(\\)" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= f3 \\(\\)" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr37261.c
++++ b/src/gcc/testsuite/gcc.dg/pr37261.c
+@@ -12,4 +12,3 @@ foo (int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr37289.c
++++ b/src/gcc/testsuite/gcc.dg/pr37289.c
+@@ -11,4 +11,3 @@ void g(long x)
+ /* Make sure we do not lose the conversion.  */
+ 
+ /* { dg-final { scan-tree-dump "-\\\(long unsigned int\\\) x" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr37858.c
++++ b/src/gcc/testsuite/gcc.dg/pr37858.c
+@@ -9,4 +9,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "build_ssa_passes" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr38245-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr38245-1.c
+@@ -33,4 +33,3 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-not "% 2123" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "0 / " "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr38245-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr38245-2.c
+@@ -107,4 +107,3 @@ f13 (unsigned int a, unsigned int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr38645.c
++++ b/src/gcc/testsuite/gcc.dg/pr38645.c
+@@ -14,4 +14,3 @@ int foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump "a.0. ={v} 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr38984.c
++++ b/src/gcc/testsuite/gcc.dg/pr38984.c
+@@ -12,6 +12,5 @@ int f(int *p)
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*p" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "return 1" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr39874.c
++++ b/src/gcc/testsuite/gcc.dg/pr39874.c
+@@ -24,6 +24,5 @@ void test2(char *signature)
+ 
+ /* { dg-final { scan-tree-dump-times " == 15" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not " == 3" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr41488.c
++++ b/src/gcc/testsuite/gcc.dg/pr41488.c
+@@ -15,4 +15,3 @@ void foo (struct struct_t* sp, int start, int end)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Simplify PEELED_CHREC into POLYNOMIAL_CHREC" 1 "sccp" } } */
+-/* { dg-final { cleanup-tree-dump "sccp" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr41574.c
++++ b/src/gcc/testsuite/gcc.dg/pr41574.c
+@@ -12,4 +12,3 @@ f(double x)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "\\(plus:DF \\(mult:DF" "combine" } } */
+-/* { dg-final { cleanup-rtl-dump "combine*" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr41783.c
++++ b/src/gcc/testsuite/gcc.dg/pr41783.c
+@@ -17,4 +17,3 @@ int main()
+    and we want that load to be into a PRE temporary.  */
+ /* { dg-final { scan-tree-dump-times "= a_global_var;" 1 "pre" } } */
+ /* { dg-final { scan-tree-dump "pretmp\[^\\n\]* = a_global_var;" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr42963.c
++++ b/src/gcc/testsuite/gcc.dg/pr42963.c
+@@ -25,4 +25,3 @@ bar (void)
+     }
+ }
+ /* { dg-final { scan-tree-dump-times "case 1:" 0 "cfg" } } */
+-/* { dg-final { cleanup-tree-dump "cfg" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr43513.c
++++ b/src/gcc/testsuite/gcc.dg/pr43513.c
+@@ -16,4 +16,3 @@ foo3 ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "alloca" 0 "ccp2"} } */
+-/* { dg-final { cleanup-tree-dump "ccp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr43864-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr43864-2.c
+@@ -20,4 +20,3 @@ f (int c, int b, int d)
+ /* { dg-final { scan-tree-dump-times "if " 0 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "(?n)_.*\\+.*_" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr43864-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr43864-3.c
+@@ -21,4 +21,3 @@ int f(int c, int b, int d)
+ /* { dg-final { scan-tree-dump-times "if " 0 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "(?n)_.*\\+.*_" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr43864-4.c
++++ b/src/gcc/testsuite/gcc.dg/pr43864-4.c
+@@ -26,4 +26,3 @@ int f(int c, int b, int d)
+ /* { dg-final { scan-tree-dump-times "(?n)_.*\\+.*_" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "(?n)_.*-.*_" 2 "pre"} } */
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr43864.c
++++ b/src/gcc/testsuite/gcc.dg/pr43864.c
+@@ -33,4 +33,3 @@ hprofStartupp (char *outputFileName, char *ctx)
+ 
+ /* { dg-final { scan-tree-dump-times "myfree \\(" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44024.c
++++ b/src/gcc/testsuite/gcc.dg/pr44024.c
+@@ -12,4 +12,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "if \\(foo" "ccp1" { target { ! avr*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44194-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr44194-1.c
+@@ -13,11 +13,9 @@ void func() {
+ }
+ 
+ /* { dg-final { scan-rtl-dump "global deletions = (2|3)" "dse1" } } */
+-/* { dg-final { cleanup-rtl-dump "dse1" } } */
+ 
+ /* Here we want to ignore frame-related instructions, marked as insn/f,
+    that do things like store the link register to the stack.  We also want
+    to treat insns the same regardless of whether they have a scheduling
+    :TI marker, so match both "insn " and "insn:".  */
+ /* { dg-final { scan-rtl-dump-not "insn\[: \]\[^\n\]*set \\(mem(?!\[^\n\]*scratch)" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44194-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr44194-2.c
+@@ -9,4 +9,3 @@ void func() {
+   bar(s.a, s.b);
+ }
+ /* { dg-final { scan-rtl-dump "global deletions = 0"  "dse1" } } */
+-/* { dg-final { cleanup-rtl-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44214-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr44214-1.c
+@@ -15,4 +15,3 @@ void do_div (v2df *a, v2df *b)
+ 
+ /* { dg-final { scan-tree-dump-times " \\\* " 3 "ccp1" } } */
+ /* { dg-final { scan-tree-dump-times " / " 0 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44214-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr44214-2.c
+@@ -11,4 +11,3 @@ void do_div (_Complex double *a, _Complex double *b)
+ 
+ /* { dg-final { scan-tree-dump-times " \\\* " 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times " / " 0 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44214-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr44214-3.c
+@@ -16,4 +16,3 @@ void do_div (v2df *a, v2df *b)
+ 
+ /* { dg-final { scan-tree-dump-times " \\\* " 3 "ccp1" } } */
+ /* { dg-final { scan-tree-dump-times " / " 0 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44290-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr44290-1.c
+@@ -15,4 +15,3 @@ void fum(void *to)
+ }
+ 
+ /* { dg-final { scan-tree-dump "foo \\\(void \\\* from, void \\\* to\\\)" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr44290-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr44290-2.c
+@@ -21,4 +21,3 @@ bar (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "foo \\\(long unsigned int base\\\)" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr45819.c
++++ b/src/gcc/testsuite/gcc.dg/pr45819.c
+@@ -17,4 +17,3 @@ int ehci_hub_control (struct ehci_hcd *ehci, int wIndex)
+ }
+ 
+ /* { dg-final { scan-tree-dump "={v}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr46217.c
++++ b/src/gcc/testsuite/gcc.dg/pr46217.c
+@@ -8,4 +8,3 @@ int foo(int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "={v}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr46309-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr46309-2.c
+@@ -143,5 +143,3 @@ f10 (int a)
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.128, 159. and -.192, 223.\[\n\r\]* into" 1 "reassoc1" } } */
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.1, 1. and -.2, 2. and -.3, 3. and -.4, 4. and -.5, 5. and -.6, 6. and -.7, 7. and -.8, 8.\[\n\r\]* into" 7 "reassoc1" } } */
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 31. and -.128, 159.\[\n\r\]* into" 1 "reassoc2" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc2" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr46309.c
++++ b/src/gcc/testsuite/gcc.dg/pr46309.c
+@@ -66,5 +66,3 @@ f6 (unsigned int a)
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.0, 31. and -.64, 95.\[\n\r\]* into" 2 "reassoc1" } } */
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.128, 159. and -.192, 223.\[\n\r\]* into" 1 "reassoc1" } } */
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 31. and -.128, 159.\[\n\r\]* into" 1 "reassoc2" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc2" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr46647.c
++++ b/src/gcc/testsuite/gcc.dg/pr46647.c
+@@ -27,4 +27,3 @@ func3 (void)
+ 
+ /* The xfail for avr, cris-* and crisv32-* is due to PR53535.  */
+ /* { dg-final { scan-tree-dump-not "memset" "optimized" { xfail avr-*-* cris-*-* crisv32-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr46909.c
++++ b/src/gcc/testsuite/gcc.dg/pr46909.c
+@@ -17,4 +17,3 @@ foo (unsigned int x)
+ /* { dg-final { scan-tree-dump-times "x_\[0-9\]+\\(D\\) != 6" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "x_\[0-9\]+\\(D\\) == 2" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "x_\[0-9\]+\\(D\\) == 6" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr47391.c
++++ b/src/gcc/testsuite/gcc.dg/pr47391.c
+@@ -19,4 +19,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "i = 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr47763.c
++++ b/src/gcc/testsuite/gcc.dg/pr47763.c
+@@ -7,4 +7,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "Web oldreg" "web" } } */
+-/* { dg-final { cleanup-rtl-dump "web" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr47917.c
++++ b/src/gcc/testsuite/gcc.dg/pr47917.c
+@@ -35,4 +35,3 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "snprintf" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "sprintf" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pr49551.c
+@@ -0,0 +1,7 @@
++/* { dg-do compile } */
++/* { dg-options "-O -fdata-sections" } */
++
++int x = 1;
++int x;
++
++/* { dg-final { scan-assembler-not {comm[\t ]+x} } } */
+--- a/src/gcc/testsuite/gcc.dg/pr50717-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr50717-1.c
+@@ -23,4 +23,3 @@ h (char a, char b, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "WIDEN_MULT_PLUS_EXPR" 0 "widening_mul" } } */
+-/* { dg-final { cleanup-tree-dump "widening_mul" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr50763.c
++++ b/src/gcc/testsuite/gcc.dg/pr50763.c
+@@ -13,4 +13,3 @@ foo (int c, int d)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "== 33" 2 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51491-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr51491-2.c
+@@ -31,4 +31,3 @@ f (int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "CLOBBER" 2 "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51491.c
++++ b/src/gcc/testsuite/gcc.dg/pr51491.c
+@@ -22,4 +22,3 @@ int f(void)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "Partition" 1 "expand"} } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51683.c
++++ b/src/gcc/testsuite/gcc.dg/pr51683.c
+@@ -15,4 +15,3 @@ foo (void *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "memcpy" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51867.c
++++ b/src/gcc/testsuite/gcc.dg/pr51867.c
+@@ -14,4 +14,3 @@ float b(float x)
+ /* Here the calls to sqrtf should be expanded into CALL_INSNs, rather than
+    fpu sqrtf rtl patterns.  */
+ /* { dg-final { scan-rtl-dump-times "call_insn" 2 "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-12.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-12.c
+@@ -26,4 +26,3 @@ foo (int y)
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 1 "pre" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "bar2 \\(" 1 "pre" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-16.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-16.c
+@@ -29,4 +29,3 @@ int bar (int c) {
+ 
+ /* { dg-final { scan-tree-dump-times "foo \\(" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "foo2 \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-17.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-17.c
+@@ -29,4 +29,3 @@ int bar (int c) {
+ 
+ /* { dg-final { scan-tree-dump-times "foo \\(" 2 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "foo2 \\(" 2 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-18.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-18.c
+@@ -14,4 +14,3 @@ void bar (int c, int *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "foo \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-2.c
+@@ -16,4 +16,3 @@ foo (int y)
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "baz \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-3.c
+@@ -16,4 +16,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-4.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-4.c
+@@ -13,4 +13,3 @@ int foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 2 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-6.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-6.c
+@@ -24,4 +24,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879-7.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879-7.c
+@@ -13,4 +13,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "z = 5" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr51879.c
++++ b/src/gcc/testsuite/gcc.dg/pr51879.c
+@@ -16,4 +16,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar \\(" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52134.c
++++ b/src/gcc/testsuite/gcc.dg/pr52134.c
+@@ -11,4 +11,3 @@ int f1(int t)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "\\\&" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52267.c
++++ b/src/gcc/testsuite/gcc.dg/pr52267.c
+@@ -21,4 +21,3 @@ bar (int a)
+ 
+ /* { dg-final { scan-tree-dump-not "& 3" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "& -4" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52445.c
++++ b/src/gcc/testsuite/gcc.dg/pr52445.c
+@@ -12,4 +12,3 @@ foo (char *buf, unsigned long len)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "cstore\." "cselim" } } */
+-/* { dg-final { cleanup-tree-dump "cselim" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52448.c
++++ b/src/gcc/testsuite/gcc.dg/pr52448.c
+@@ -27,4 +27,3 @@ void f2 (int *p, int a, int b, int *cond, int *cond2)
+ 
+ /* None of the above conditional stores might be made unconditional.  */
+ /* { dg-final { scan-tree-dump-not "cstore" "cselim" } } */
+-/* { dg-final { cleanup-tree-dump "cselim" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52578.c
++++ b/src/gcc/testsuite/gcc.dg/pr52578.c
+@@ -11,4 +11,3 @@ long foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 2;" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr52691.c
++++ b/src/gcc/testsuite/gcc.dg/pr52691.c
+@@ -21,4 +21,3 @@ foo (int a, ...)
+ /* { dg-final { scan-tree-dump "__builtin_next_arg" "optimized" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "__builtin_next_arg" "optimized" { target { powerpc*-*-darwin* powerpc*-*-aix* } } } } */
+ /* { dg-final { scan-tree-dump "__builtin_next_arg" "optimized" { target { powerpc*-*-linux* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr54087.c
++++ b/src/gcc/testsuite/gcc.dg/pr54087.c
+@@ -1,7 +1,7 @@
+ /* PR54087.  Verify __atomic_sub (val) uses __atomic_add (-val) if there is no
+              atomic_aub.  */
+-/* { dg-require-effective-target sync_int_long } */
+ /* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */
++/* { dg-require-effective-target sync_int_long } */
+ /* { dg-final { scan-assembler-times "xadd" 2 } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr55027.c
++++ b/src/gcc/testsuite/gcc.dg/pr55027.c
+@@ -9,4 +9,3 @@ void f (v2df *x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "gimple_assign" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr56094.c
++++ b/src/gcc/testsuite/gcc.dg/pr56094.c
+@@ -78,4 +78,3 @@ foo ()
+ 
+ /* Verify no statements get the location of the foo () decl.  */
+ /* { dg-final { scan-tree-dump-not " : 65:1\\\]" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr56098-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr56098-1.c
+@@ -13,4 +13,3 @@ foo (int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "=\[^\n\r]*\\*p" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr56098-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr56098-2.c
+@@ -16,4 +16,3 @@ bar (struct S *x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "r_\[0-9]* =.v. \[^\n\r]*;\[\n\r]*  r_\[0-9]* =.v. " "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr56837.c
++++ b/src/gcc/testsuite/gcc.dg/pr56837.c
+@@ -64,4 +64,3 @@ fv (void)
+ /* { dg-final { scan-tree-dump-times "memset ..b, 1, 1024.;" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "memset ..c, 68, 16384.;" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "memset ..v, 18, 16384.;" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr56997-4.c
++++ b/src/gcc/testsuite/gcc.dg/pr56997-4.c
+@@ -20,4 +20,3 @@ foo (test_type u)
+ /* The C++ memory model forbids data store race conditions outside the
+    unaligned data member, therefore only QI or HI access is allowed, no SI.  */
+ /* { dg-final { scan-rtl-dump-not "mem/v(/.)*:SI" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr57518.c
++++ b/src/gcc/testsuite/gcc.dg/pr57518.c
+@@ -14,4 +14,3 @@ void foo() {
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "REG_EQUIV\[^\n\]*mem\[^\n\]*\"ip\".*subreg" "ira" } } */
+-/* { dg-final { cleanup-rtl-dump "ira" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58145-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr58145-1.c
+@@ -34,4 +34,3 @@ f4 (int val)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58145-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr58145-2.c
+@@ -48,4 +48,3 @@ f5 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " ={v} " 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58463.c
++++ b/src/gcc/testsuite/gcc.dg/pr58463.c
+@@ -12,4 +12,3 @@ fn1 (list_data * p1)
+     p1->data16 = p1->data16 & 1 & p1->data16 >> 1;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58742-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr58742-1.c
+@@ -10,4 +10,3 @@ fx (int *b, int *e)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return e" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58742-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr58742-2.c
+@@ -10,4 +10,3 @@ fx (char *a, __SIZE_TYPE__ sz)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return sz" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58742-3.c
++++ b/src/gcc/testsuite/gcc.dg/pr58742-3.c
+@@ -11,4 +11,3 @@ fx (int *a, int sz)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return a" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr58805.c
++++ b/src/gcc/testsuite/gcc.dg/pr58805.c
+@@ -21,4 +21,3 @@ foo (int n, TYPE *x, TYPE *y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__asm__" 2 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr59643.c
++++ b/src/gcc/testsuite/gcc.dg/pr59643.c
+@@ -12,4 +12,3 @@ foo (double *a, double *b, double *c, double d, double e, int n)
+ 
+ /* { dg-final { scan-tree-dump-times "Before commoning:" 1 "pcom" } } */
+ /* { dg-final { scan-tree-dump-times "Unrolling 2 times" 1 "pcom" } } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr60267.c
++++ b/src/gcc/testsuite/gcc.dg/pr60267.c
+@@ -11,4 +11,3 @@ foo (int *a, int *b, int *c)
+     a[i] = b[i] * c[i];
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/pr61158.c
++++ b/src/gcc/testsuite/gcc.dg/pr61158.c
+@@ -9,4 +9,3 @@ foo (unsigned int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "original" { target { ilp32 || lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr61762.c
++++ b/src/gcc/testsuite/gcc.dg/pr61762.c
+@@ -16,4 +16,3 @@ unsigned int f()
+    the unused local static is removed.  */
+ 
+ /* { dg-final { scan-tree-dump-not "Private" "release_ssa" } } */
+-/* { dg-final { cleanup-tree-dump "release_ssa" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr62167.c
++++ b/src/gcc/testsuite/gcc.dg/pr62167.c
+@@ -47,4 +47,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Removing basic block" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr63568.c
++++ b/src/gcc/testsuite/gcc.dg/pr63568.c
+@@ -67,4 +67,3 @@ fn8 (int a, int b, int m)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not " \\| " "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr63743.c
++++ b/src/gcc/testsuite/gcc.dg/pr63743.c
+@@ -8,4 +8,3 @@ libcall_dep (double x, double y)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "Swap operands" 1 "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr64277.c
++++ b/src/gcc/testsuite/gcc.dg/pr64277.c
+@@ -3,7 +3,6 @@
+ /* { dg-options "-O3 -Wall -Werror -fdump-tree-cunroll-details" } */
+ /* { dg-final { scan-tree-dump "loop with 5 iterations completely unrolled" "cunroll" } } */
+ /* { dg-final { scan-tree-dump "loop with 6 iterations completely unrolled" "cunroll" } } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+ 
+ int f1[10];
+ void test1 (short a[], short m, unsigned short l)
+--- a/src/gcc/testsuite/gcc.dg/pr64309.c
++++ b/src/gcc/testsuite/gcc.dg/pr64309.c
+@@ -63,4 +63,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "(<<|>>)" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr64434.c
++++ b/src/gcc/testsuite/gcc.dg/pr64434.c
+@@ -17,6 +17,5 @@ void foo ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "Swap operands" 1 "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/pr64454.c
++++ b/src/gcc/testsuite/gcc.dg/pr64454.c
+@@ -40,4 +40,3 @@ f6 (int x)
+ 
+ /* { dg-final { scan-tree-dump-times "% 5" 6 "vrp1" } } */
+ /* { dg-final { scan-tree-dump-times "% 6" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr64715-1.c
++++ b/src/gcc/testsuite/gcc.dg/pr64715-1.c
+@@ -20,4 +20,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "__builtin___strcpy_chk\[^;\n\r\]*, 5\\\);" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/pr64715-2.c
++++ b/src/gcc/testsuite/gcc.dg/pr64715-2.c
+@@ -16,4 +16,3 @@ foo (int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "__builtin_memcpy \\\(\[^;\n\r\]*, \"abcdefghijkl\", 13\\\);" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pr67043.c
+@@ -0,0 +1,32 @@
++/* { dg-do compile } */
++/* { dg-options "-O3 -fcompare-debug -w" } */
++
++extern void rt_mutex_owner (void);
++extern void rt_mutex_deadlock_account_lock (int);
++extern void signal_pending (void);
++__typeof__ (int *) a;
++int b;
++
++int
++try_to_take_rt_mutex (int p1) {
++  rt_mutex_owner ();
++  if (b)
++    return 0;
++  rt_mutex_deadlock_account_lock (p1);
++  return 1;
++}
++
++void
++__rt_mutex_slowlock (int p1) {
++  int c;
++  for (;;) {
++    c = ({
++      asm ("" : "=r"(a));
++      a;
++    });
++    if (try_to_take_rt_mutex (c))
++      break;
++    if (__builtin_expect (p1 == 0, 0))
++      signal_pending ();
++  }
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pr68088_1.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void bar (unsigned long);
++
++void
++foo (unsigned long aul, unsigned m, unsigned i)
++{
++  while (1)
++    {
++      aul += i;
++      i = aul % m;
++      bar (aul);
++    }
++}
+--- a/src/gcc/testsuite/gcc.dg/predict-1.c
++++ b/src/gcc/testsuite/gcc.dg/predict-1.c
+@@ -24,4 +24,3 @@ void foo (int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop iv compare heuristics: 0.0%" 5 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-2.c
++++ b/src/gcc/testsuite/gcc.dg/predict-2.c
+@@ -24,4 +24,3 @@ void foo (int base, int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "loop iv compare heuristics" "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-3.c
++++ b/src/gcc/testsuite/gcc.dg/predict-3.c
+@@ -22,4 +22,3 @@ void foo (int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop iv compare heuristics: 100.0%" 4 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-4.c
++++ b/src/gcc/testsuite/gcc.dg/predict-4.c
+@@ -16,4 +16,3 @@ void foo (int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump "loop iv compare heuristics: 50.0%" "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-5.c
++++ b/src/gcc/testsuite/gcc.dg/predict-5.c
+@@ -22,4 +22,3 @@ void foo (int base, int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop iv compare heuristics: 100.0%" 4 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-6.c
++++ b/src/gcc/testsuite/gcc.dg/predict-6.c
+@@ -22,4 +22,3 @@ void foo (int base, int bound)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop iv compare heuristics: 0.0%" 4 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-7.c
++++ b/src/gcc/testsuite/gcc.dg/predict-7.c
+@@ -14,4 +14,3 @@ void foo (int base)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop branch heuristics" 0 "profile_estimate"} } */
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/predict-8.c
++++ b/src/gcc/testsuite/gcc.dg/predict-8.c
+@@ -9,4 +9,3 @@ int foo(float a, float b) {
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "REG_BR_PROB 100" 1 "expand"} } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/profile-dir-1.c
++++ b/src/gcc/testsuite/gcc.dg/profile-dir-1.c
+@@ -9,4 +9,3 @@ main(void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "cgraph" } } */
+--- a/src/gcc/testsuite/gcc.dg/profile-dir-2.c
++++ b/src/gcc/testsuite/gcc.dg/profile-dir-2.c
+@@ -9,4 +9,3 @@ main(void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "cgraph" } } */
+--- a/src/gcc/testsuite/gcc.dg/profile-dir-3.c
++++ b/src/gcc/testsuite/gcc.dg/profile-dir-3.c
+@@ -9,4 +9,3 @@ main(void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-ipa-dump "cgraph" } } */
+--- a/src/gcc/testsuite/gcc.dg/pure-1.c
++++ b/src/gcc/testsuite/gcc.dg/pure-1.c
+@@ -13,4 +13,3 @@ int func_a(struct test_a *a)
+ }
+ 
+ /* { dg-final { scan-ipa-dump-not "found to be pure: func_a" "pure-const" } } */
+-/* { dg-final { cleanup-ipa-dump "pure-const" } } */
+--- a/src/gcc/testsuite/gcc.dg/shrink-wrap-loop.c
++++ b/src/gcc/testsuite/gcc.dg/shrink-wrap-loop.c
+@@ -17,4 +17,3 @@ test (int *p1, int *p2)
+   return 1;
+ }
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.dg/sms-1.c
++++ b/src/gcc/testsuite/gcc.dg/sms-1.c
+@@ -41,5 +41,4 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms"  { target powerpc*-*-* spu-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-10.c
++++ b/src/gcc/testsuite/gcc.dg/sms-10.c
+@@ -115,5 +115,4 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-11.c
++++ b/src/gcc/testsuite/gcc.dg/sms-11.c
+@@ -34,4 +34,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+--- a/src/gcc/testsuite/gcc.dg/sms-12.c
++++ b/src/gcc/testsuite/gcc.dg/sms-12.c
+@@ -39,5 +39,4 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-2.c
++++ b/src/gcc/testsuite/gcc.dg/sms-2.c
+@@ -33,4 +33,3 @@ fun (nb)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS loop many exits" 1 "sms" { target spu-*-* powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+--- a/src/gcc/testsuite/gcc.dg/sms-3.c
++++ b/src/gcc/testsuite/gcc.dg/sms-3.c
+@@ -39,5 +39,4 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target spu-*-* powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-4.c
++++ b/src/gcc/testsuite/gcc.dg/sms-4.c
+@@ -36,5 +36,4 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target spu-*-* powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-5.c
++++ b/src/gcc/testsuite/gcc.dg/sms-5.c
+@@ -48,5 +48,4 @@ int main ()
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target spu-*-* } } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-6.c
++++ b/src/gcc/testsuite/gcc.dg/sms-6.c
+@@ -44,4 +44,3 @@ int main()
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target spu-*-* } } } */
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 3 "sms" { target powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+--- a/src/gcc/testsuite/gcc.dg/sms-7.c
++++ b/src/gcc/testsuite/gcc.dg/sms-7.c
+@@ -45,5 +45,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 1 "sms" { target spu-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/sms-8.c
++++ b/src/gcc/testsuite/gcc.dg/sms-8.c
+@@ -37,6 +37,5 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "SMS succeeded" 0 "sms" { target powerpc*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "sms" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/stack-layout-1.c
++++ b/src/gcc/testsuite/gcc.dg/stack-layout-1.c
+@@ -22,4 +22,3 @@ void foo ()
+   }
+ 
+ /* { dg-final { scan-rtl-dump-times "Partition" 1 "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/stack-layout-2.c
++++ b/src/gcc/testsuite/gcc.dg/stack-layout-2.c
+@@ -21,4 +21,3 @@ int foo()
+ }
+ /* { dg-final { scan-rtl-dump "size 8192" "expand" } } */
+ /* { dg-final { scan-rtl-dump "size 32" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/store-motion-fgcse-sm.c
++++ b/src/gcc/testsuite/gcc.dg/store-motion-fgcse-sm.c
+@@ -30,5 +30,4 @@ main ()
+ 
+ /* Check that -fgcse-sm did something for f.  */
+ /* { dg-final { scan-rtl-dump "STORE_MOTION of f, .* basic blocks, 1 insns deleted, 1 insns created" "store_motion" } } */
+-/* { dg-final { cleanup-rtl-dump "store_motion" } } */
+  
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-1.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-1.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "-\[ \]*5" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-2.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-2.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "100" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-3.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-3.c
+@@ -13,4 +13,3 @@ foo (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "1000" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-4.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-4.c
+@@ -13,4 +13,3 @@ foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-5.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-5.c
+@@ -15,5 +15,4 @@ int foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 3" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/strict-overflow-6.c
++++ b/src/gcc/testsuite/gcc.dg/strict-overflow-6.c
+@@ -13,4 +13,3 @@ foo (char* p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "\[+\]\[ \]*1000" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-1.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-1.c
+@@ -42,4 +42,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-10.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-10.c
+@@ -80,4 +80,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "\\*q_\[0-9\]* = 32;" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "memcpy \\(\[^\n\r\]*, 1\\)" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-11.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-11.c
+@@ -73,4 +73,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;\[\n\r\]*  l.6. = " 1 "strlen" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;\[\n\r\]*  l.9. = " 1 "strlen" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;" 3 "strlen" { target { avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-13.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-13.c
+@@ -71,4 +71,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;\[\n\r\]*  l.5. = " 1 "strlen" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;\[\n\r\]*  l.6. = " 1 "strlen" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "  _\[0-9\]* = strlen \\(\[^\n\r\]*;" 4 "strlen" { target { avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-14g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-14g.c
+@@ -114,4 +114,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 2 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-14gf.c
+@@ -23,4 +23,3 @@
+ /* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 2 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-15.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-15.c
+@@ -57,4 +57,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-16g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-16g.c
+@@ -31,4 +31,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-17g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-17g.c
+@@ -54,4 +54,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-18g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-18g.c
+@@ -79,4 +79,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 2 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-19.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-19.c
+@@ -78,4 +78,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-1f.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-1f.c
+@@ -15,4 +15,3 @@
+ /* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-2.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-2.c
+@@ -46,4 +46,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-20.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-20.c
+@@ -92,4 +92,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-21.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-21.c
+@@ -63,4 +63,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-22.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-22.c
+@@ -36,5 +36,4 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 1 "strlen" } } */
+-/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } *
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
++/* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-22g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-22g.c
+@@ -11,4 +11,3 @@
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-24.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-24.c
+@@ -13,5 +13,4 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } *
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
++/* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-25.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-25.c
+@@ -15,4 +15,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-26.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-26.c
+@@ -22,4 +22,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "strlen \\(" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-27.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-27.c
+@@ -20,4 +20,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "strlen \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-2f.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-2f.c
+@@ -15,4 +15,3 @@
+ /* { dg-final { scan-tree-dump-times "strcpy \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-3.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-3.c
+@@ -59,8 +59,6 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "return 0" 3 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "return 4" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "return 3" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-4.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-4.c
+@@ -72,4 +72,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 3 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-4g.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-4g.c
+@@ -11,4 +11,3 @@
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 5 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-4gf.c
+@@ -16,4 +16,3 @@
+ /* { dg-final { scan-tree-dump-times "strcpy \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 5 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-5.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-5.c
+@@ -54,4 +54,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 2 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-6.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-6.c
+@@ -83,4 +83,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-7.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-7.c
+@@ -47,7 +47,5 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 1 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "\\*r_\[0-9\]* = 0;" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "return 3;" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "return 0;" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-8.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-8.c
+@@ -54,4 +54,3 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+--- a/src/gcc/testsuite/gcc.dg/strlenopt-9.c
++++ b/src/gcc/testsuite/gcc.dg/strlenopt-9.c
+@@ -104,6 +104,4 @@ main ()
+ /* { dg-final { scan-tree-dump-times "strcat \\(" 0 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "strchr \\(" 3 "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "stpcpy \\(" 0 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ /* { dg-final { scan-tree-dump-times "return 4;" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/superblock.c
++++ b/src/gcc/testsuite/gcc.dg/superblock.c
+@@ -19,6 +19,4 @@ foo (void)
+ 
+ /* { dg-final { scan-rtl-dump-times "0 uses" 0 "bbro"} } */
+ /* { dg-final { scan-rtl-dump-times "ADVANCING TO" 2 "sched2"} } */
+-/* { dg-final { cleanup-rtl-dump "bbro" } } */
+-/* { dg-final { cleanup-rtl-dump "sched2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tail-merge-store.c
++++ b/src/gcc/testsuite/gcc.dg/tail-merge-store.c
+@@ -19,4 +19,3 @@ f (int c, int d)
+ 
+ /* { dg-final { scan-tree-dump-times "duplicate of" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "z = 5" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tls/section-2.c
++++ b/src/gcc/testsuite/gcc.dg/tls/section-2.c
+@@ -1,7 +1,7 @@
+ /* Verify that we get errors for trying to put TLS data in 
+    sections which can't work.  */
+-/* { dg-require-effective-target tls } */
+ /* { dg-do compile { target *-*-vxworks } } */
++/* { dg-require-effective-target tls } */
+ 
+ #define A(X)	__attribute__((section(X)))
+ 
+--- a/src/gcc/testsuite/gcc.dg/tm/20091221.c
++++ b/src/gcc/testsuite/gcc.dg/tm/20091221.c
+@@ -13,4 +13,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "readOnly" 1 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/20100125.c
++++ b/src/gcc/testsuite/gcc.dg/tm/20100125.c
+@@ -15,4 +15,3 @@ void set_remove(int * val)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "getTMCloneOrIrrevocable" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/20100603.c
++++ b/src/gcc/testsuite/gcc.dg/tm/20100603.c
+@@ -18,4 +18,3 @@ void TMlist_free ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Function poof ._ZGTt4poof" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/alias-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/alias-1.c
+@@ -37,4 +37,3 @@ void f(void)
+ /* { dg-final { scan-tree-dump-times "someptr = .*same as mystruct" 1 "ealias" } } */
+ /* { dg-final { scan-tree-dump-times "ui\..* = .*same as mystruct" 1 "ealias" } } */
+ /* { dg-final { scan-tree-dump-times "pp\..* = .*same as mystruct" 1 "ealias" } } */
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/alias-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/alias-2.c
+@@ -39,4 +39,3 @@ void foo()
+ /* { dg-final { scan-tree-dump-times "ui\..* = .*same as mystruct" 1 "ealias" } } */
+ /* { dg-final { scan-tree-dump-times "mystruct.*ESCAPED" 1 "ealias" } } */
+ /* { dg-final { scan-tree-dump-times "pp = .*same as mystruct" 1 "ealias" } } */
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/clone-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/clone-1.c
+@@ -10,4 +10,3 @@ void cloneme()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_WU.*foo" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/debug-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/debug-1.c
+@@ -23,4 +23,3 @@ int main() {
+ /* { dg-final { scan-tree-dump-times ":14:.*_ITM_beginTransaction" 1 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times ":15:.*ITM_WU. \\(&z" 1 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times ":16:.*ITM_WU. \\(&a" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/instrumented-mask.c
++++ b/src/gcc/testsuite/gcc.dg/tm/instrumented-mask.c
+@@ -13,4 +13,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " instrumentedCode" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/ipa-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/ipa-1.c
+@@ -11,4 +11,3 @@ void bar(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "_ZGTt3foo" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/ipa-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/ipa-2.c
+@@ -11,4 +11,3 @@ void bar(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "_ZGTt3foo" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-2.c
+@@ -19,4 +19,3 @@ foo()
+ 
+ /* { dg-final { scan-tree-dump-times "doesGoIrrevocable" 1 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "hasNoIrrevocable" 0 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-3.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-3.c
+@@ -12,4 +12,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "doesGoIrrevocable" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-4.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-4.c
+@@ -13,4 +13,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "hasNoIrrevocable" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-5.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-5.c
+@@ -24,4 +24,3 @@ void wildthing()
+ /* { dg-final { scan-ipa-dump-times "bb 4 goes irr" 1 "tmipa" } } */
+ /* { dg-final { scan-ipa-dump-times "bb 5 goes irr" 1 "tmipa" } } */
+ /* { dg-final { scan-ipa-dump-times "bb 6 goes irr" 1 "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-6.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-6.c
+@@ -31,4 +31,3 @@ void wildthing()
+ /* { dg-final { scan-ipa-dump-times "bb 7 goes irr" 1 "tmipa" } } */
+ /* { dg-final { scan-ipa-dump-times "bb 8 goes irr" 1 "tmipa" } } */
+ /* { dg-final { scan-ipa-dump-times "bb 9 goes irr" 1 "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/irrevocable-7.c
++++ b/src/gcc/testsuite/gcc.dg/tm/irrevocable-7.c
+@@ -10,4 +10,3 @@ int foo()
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "changeTransactionMode \\(0\\)" 1 "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-1.c
+@@ -27,4 +27,3 @@ f()
+ /* { dg-final { scan-tree-dump-times "transforming: .*_ITM_WaRU4 \\(&i," 1 "tmmemopt" } } */
+ /* { dg-final { scan-tree-dump-times "transforming: .*_ITM_RaWU4 \\(&i\\);" 1 "tmmemopt" } } */
+ /* { dg-final { scan-tree-dump-times "transforming: .*_ITM_WaWU4 \\(&i," 1 "tmmemopt" } } */
+-/* { dg-final { cleanup-tree-dump "tmmemopt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-10.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-10.c
+@@ -25,4 +25,3 @@ int f()
+ /* { dg-final { scan-tree-dump-times "ITM_LU" 0 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 0 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "int tm_save" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-11.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-11.c
+@@ -27,4 +27,3 @@ int f()
+ /* { dg-final { scan-tree-dump-times "ITM_LU" 0 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 0 "tmmark" } } */
+ /* { dg-final { scan-tree-dump-times "int tm_save" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-12.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-12.c
+@@ -32,4 +32,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-13.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-13.c
+@@ -13,4 +13,3 @@ void f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "memmoveRtWt \\\(&large_global," 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-16.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-16.c
+@@ -41,4 +41,3 @@ int f(int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-2.c
+@@ -12,4 +12,3 @@ void f(void)
+ 
+ /* { dg-final { scan-tree-dump-times "transforming.*RfWU1 \\(&c" 1 "tmmemopt" } } */
+ /* { dg-final { scan-tree-dump-times "transforming.*WaWU1 \\(&c" 1 "tmmemopt" } } */
+-/* { dg-final { cleanup-tree-dump "tmmemopt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-3.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-3.c
+@@ -18,4 +18,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "logging: lala.x\\\[i_4\\\]" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-4.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-4.c
+@@ -22,4 +22,3 @@ int f()
+ 
+ /* { dg-final { scan-tree-dump-times "tm_save.\[0-9_\]+ = lala.x\\\[55\\\]" 1 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "lala.x\\\[55\\\] = tm_save" 1 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-5.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-5.c
+@@ -21,4 +21,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_LU\[0-9\] \\\(&lala.x\\\[55\\\]" 1 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-6.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-6.c
+@@ -19,4 +19,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "memmoveRtWt \\\(.*, &lacopy" 1 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-7.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-7.c
+@@ -19,4 +19,3 @@ int f()
+ 
+ /* { dg-final { scan-tree-dump-times "tm_save.\[0-9_\]+ = lala" 1 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "lala = tm_save" 1 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-8.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-8.c
+@@ -23,4 +23,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 1 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memopt-9.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memopt-9.c
+@@ -26,4 +26,3 @@ int f()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ITM_WU" 0 "tmmark" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/memset-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/memset-2.c
+@@ -14,4 +14,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "GTMA_HAVE_STORE" 1 "tmlower" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/pr55401.c
++++ b/src/gcc/testsuite/gcc.dg/tm/pr55401.c
+@@ -19,4 +19,3 @@ void foo()
+    FOO.  */
+ /* { dg-final { scan-tree-dump-times "ITM_WU\[0-9\] \\(&george," 2 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/props-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/props-1.c
+@@ -16,5 +16,3 @@ foo(int local)
+ /* { dg-final { scan-tree-dump-times " instrumentedCode" 1 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "hasNoAbort" 0 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "GTMA_HAVE_ABORT" 1 "tmlower" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmlower" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/props-2.c
++++ b/src/gcc/testsuite/gcc.dg/tm/props-2.c
+@@ -18,4 +18,3 @@ foo(){
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "GTMA_MAY_ENTER_IRREVOCABLE" 1 "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/props-3.c
++++ b/src/gcc/testsuite/gcc.dg/tm/props-3.c
+@@ -13,4 +13,3 @@ foo(){
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "GTMA_MAY_ENTER_IRREVOCABLE" 1 "tmipa" } } */
+-/* { dg-final { cleanup-ipa-dump "tmipa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/props-4.c
++++ b/src/gcc/testsuite/gcc.dg/tm/props-4.c
+@@ -22,5 +22,3 @@ foo(void)
+ 
+ /* { dg-final { scan-tree-dump-times " instrumentedCode" 1 "tmedge" } } */
+ /* { dg-final { scan-tree-dump-times "hasNoAbort" 0 "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmedge" } } */
+-/* { dg-final { cleanup-tree-dump "tmmark" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/pub-safety-1.c
++++ b/src/gcc/testsuite/gcc.dg/tm/pub-safety-1.c
+@@ -21,4 +21,3 @@ void reader()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Cannot hoist.*DATA_DATA because it is in a transaction" 1 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/reg-promotion.c
++++ b/src/gcc/testsuite/gcc.dg/tm/reg-promotion.c
+@@ -21,4 +21,3 @@ void func()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Cannot hoist conditional load of count because it is in a transaction" 1 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/wrap-3.c
++++ b/src/gcc/testsuite/gcc.dg/tm/wrap-3.c
+@@ -14,4 +14,3 @@ void foo()
+    everything is as usual.  */
+ /* { dg-final { scan-tree-dump-times "free" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tm/wrap-4.c
++++ b/src/gcc/testsuite/gcc.dg/tm/wrap-4.c
+@@ -17,4 +17,3 @@ void foo()
+    everything is as usual.  */
+ /* { dg-final { scan-tree-dump-times "candy \\(\\);" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/builtin-convert-4.c
++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-convert-4.c
+@@ -33,4 +33,3 @@ int main()
+ /* { dg-final { scan-tree-dump-times "nearbyint " 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "nearbyintf" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "nearbyintl" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/builtin-math-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-math-2.c
+@@ -382,4 +382,3 @@ void bar()
+ /* { dg-final { scan-tree-dump-times "_gamma_r " 6 "original" } } */
+ /* { dg-final { scan-tree-dump-times "_gammaf_r" 6 "original" } } */
+ /* { dg-final { scan-tree-dump-times "_gammal_r" 6 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/builtin-math-5.c
++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-math-5.c
+@@ -120,4 +120,3 @@ void bar()
+ /* { dg-final { scan-tree-dump-times "cpowf" 12 "original" { target { spu*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "cpow " 18 "original" } } */
+ /* { dg-final { scan-tree-dump-times "cpowl" 18 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/builtin-pow-mpfr-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-pow-mpfr-1.c
+@@ -16,4 +16,3 @@ extern double testit()
+ }
+ 
+ /* { dg-final { scan-tree-dump "pow" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/builtins-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/builtins-1.c
+@@ -1,6 +1,5 @@
+ /* { dg-do compile } */
+ /* { dg-options "-fdump-rtl-expand-all" */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+ int isdigit(int c)
+ {
+         return c >= 0;
+--- a/src/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/ipa-pta-1.c
+@@ -43,4 +43,3 @@ void test4 (int a4, char b, char c, char d, char e, char f, char g, char h)
+ }
+ 
+ /* { dg-final { scan-ipa-dump "bar.arg0 = { test4.arg0 test3.arg0 test2.arg0 test1.arg0 }" "pta" } } */
+-/* { dg-final { cleanup-ipa-dump "pta" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/ldist-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/ldist-1.c
+@@ -9,4 +9,3 @@ void foo (volatile int *p, int n)
+ }
+ 
+ /* { dg-final { scan-assembler-not "memset" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr23821.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr23821.c
+@@ -26,4 +26,3 @@ main ()
+    induction variable increment.  */
+ 
+ /* { dg-final { scan-tree-dump "Added canonical iv" "ivcanon" } } */
+-/* { dg-final { cleanup-tree-dump "ivcanon" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr39074-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr39074-2.c
+@@ -32,4 +32,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "y.._. = { i }" "alias" } } */
+ /* { dg-final { scan-tree-dump "y.._., points-to vars: { D..... }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr39074.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr39074.c
+@@ -31,4 +31,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "y.._. = { i }" "alias" } } */
+ /* { dg-final { scan-tree-dump "y.._., points-to vars: { D..... }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr42898-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr42898-2.c
+@@ -23,4 +23,3 @@ void f1(volatile struct hardware *ptr)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\*ptr" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr42898.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr42898.c
+@@ -21,4 +21,3 @@ void f1(volatile struct hardware *ptr)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\*ptr" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr45704.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr45704.c
+@@ -13,4 +13,3 @@ int foo(struct st *st)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "={v}" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr50472.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr50472.c
+@@ -10,4 +10,3 @@ unsigned int test( void )
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "return 1" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr55018.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr55018.c
+@@ -20,4 +20,3 @@ lab:
+ }
+ 
+ /* { dg-final { scan-tree-dump "printf" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr57147-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr57147-1.c
+@@ -18,4 +18,3 @@ void TestSyscall(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "builtin_unreachable" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pr57147-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pr57147-2.c
+@@ -20,4 +20,3 @@ void TestSyscall(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "setjmp" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/torture/pr66076.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "" } */
++/* { dg-options "-mno-prefer-avx128 -march=bdver4" { target i?86-*-* x86_64-*-* } } */
++
++void
++f0a (char *result, char *arg1, char *arg4, char temp_6)
++{
++  int idx = 0;
++  for (idx = 0; idx < 416; idx += 1)
++    result[idx] = (arg1[idx] + arg4[idx]) * temp_6;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/torture/pr70370.c
+@@ -0,0 +1,45 @@
++/* { dg-do compile } */
++
++_Complex float
++test1 (_Complex float f)
++{
++  __asm__ ("" : "+r" (__real f));
++  return f;
++}
++
++_Complex float
++test2 (_Complex float f)
++{
++  __asm__ ("" : "=r" (__real f));
++  return f;
++}
++
++struct X { int i; };
++
++struct X 
++test3 (struct X x)
++{
++  __asm__ ("" : "=r" (x.i));
++  return x;
++}
++
++struct X
++test4 (struct X x)
++{
++  __asm__ ("" : "+r" (x.i));
++  return x;
++}
++
++struct X 
++test5 (struct X x)
++{
++  __asm__ ("" : "=r" (x));
++  return x;
++}
++
++struct X
++test6 (struct X x)
++{
++  __asm__ ("" : "+r" (x));
++  return x;
++}
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-callused-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-callused-1.c
+@@ -22,4 +22,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "p.._. = { i j }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-escape-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-escape-1.c
+@@ -31,4 +31,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "ESCAPED = {\[^\n\}\]* i \[^\n\}\]*}" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-1.c
+@@ -30,4 +30,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "ESCAPED = {\[^\n\}\]* i f \[^\n\}\]*}" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-2.c
+@@ -33,4 +33,3 @@ int main()
+ /* In theory = { i } is the correct solution.  But it's not easy to scan
+    for that reliably, so just use what we create now.  */
+ /* { dg-final { scan-tree-dump "= { i j }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-3.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-ptrarith-3.c
+@@ -34,4 +34,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "q_. = { i j k }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/pta-structcopy-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/pta-structcopy-1.c
+@@ -33,4 +33,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "y.* = { i }" "ealias" } } */
+ /* { dg-final { scan-tree-dump "y.*, points-to vars: { D..... }" "ealias" } } */
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/ssa-pta-fn-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/ssa-pta-fn-1.c
+@@ -59,4 +59,3 @@ int main()
+ /* { dg-final { scan-tree-dump "q_const_. = { NONLOCAL i }" "alias" } } */
+ /* { dg-final { scan-tree-dump "q_pure_. = { ESCAPED NONLOCAL i }" "alias" } } */
+ /* { dg-final { scan-tree-dump "q_normal_. = { ESCAPED NONLOCAL }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/torture/stackalign/builtin-return-1.c
++++ b/src/gcc/testsuite/gcc.dg/torture/stackalign/builtin-return-1.c
+@@ -26,15 +26,13 @@ int bar(int n)
+ 				   STACK_ARGUMENTS_SIZE));
+ }
+ 
+-char *g;
+-
+ int main(void)
+ {
+   /* Allocate 64 bytes on the stack to make sure that __builtin_apply
+      can read at least 64 bytes above the return address.  */
+   char dummy[64];
+ 
+-  g = dummy;
++  __asm__ ("" : : "" (dummy));
+ 
+   if (bar(1) != 2)
+     abort();
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/20050826-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/20050826-2.c
+@@ -73,4 +73,3 @@ main (void)
+ }
+ 
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "dom1"} } */
+-/* { dg-final-use { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/cmpsf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/cmpsf-1.c
+@@ -182,4 +182,3 @@ main (void)
+ }
+ 
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "dom1"} } */
+-/* { dg-final-use { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/cold_partition_label.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/cold_partition_label.c
+@@ -35,4 +35,3 @@ main (int argc, char *argv[])
+   return 0;
+ }
+ 
+-/* { dg-final-use { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/ic-misattribution-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/ic-misattribution-1.c
+@@ -16,4 +16,3 @@ caller(void (*func) (void))
+ }
+ 
+ /* { dg-final-use { scan-ipa-dump "hist->count 1 hist->all 1" "profile" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/ic-misattribution-1a.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/ic-misattribution-1a.c
+@@ -19,4 +19,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/indir-call-prof.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/indir-call-prof.c
+@@ -39,5 +39,3 @@ main (void)
+ 
+ /* { dg-final-use { scan-ipa-dump "Indirect call -> direct call.* a1 transformation on insn" "profile"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/inliner-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/inliner-1.c
+@@ -40,4 +40,3 @@ main ()
+    declaration or other appearances of the string in dump.  */
+ /* { dg-final-use { scan-tree-dump "cold_function ..;" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "hot_function ..;" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/merge_block.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/merge_block.c
+@@ -19,4 +19,3 @@ main ()
+   return 0;
+ }
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/peel-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/peel-1.c
+@@ -23,4 +23,3 @@ main()
+ /* { dg-final-use { scan-tree-dump "Peeled loop ., 2 times" "cunroll" } } */
+ /* In fact one peeling is enough; we however mispredict number of iterations of the loop
+    at least until loop_ch is schedule ahead of profiling pass.  */
+-/* { dg-final-use { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/stringop-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/stringop-1.c
+@@ -19,5 +19,3 @@ main()
+ /* a[0] = b[0] is what we fold the resulting memcpy into.  */
+ /* { dg-final-use { scan-tree-dump " = MEM.*&b" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump "MEM.*&a\\\] = " "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/stringop-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/stringop-2.c
+@@ -21,5 +21,3 @@ main()
+ /* { dg-final-use { scan-ipa-dump "Single value 4 stringop" "profile"} } */
+ /* The versioned memset of size 4 should be optimized to an assignment.  */
+ /* { dg-final-use { scan-tree-dump "MEM\\\[\\(void .\\)&a\\\] = 168430090" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/switch-case-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/switch-case-1.c
+@@ -37,4 +37,3 @@ int main ()
+ }
+ /* { dg-final-use { scan-rtl-dump-times ";; basic block\[^\\n\]*count 4000" 2 "expand"} } */
+ /* { dg-final-use { scan-rtl-dump-times ";; basic block\[^\\n\]*count 2000" 1 "expand"} } */
+-/* { dg-final-use { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/switch-case-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/switch-case-2.c
+@@ -37,4 +37,3 @@ int main ()
+ }
+ /* { dg-final-use { scan-rtl-dump-times ";; basic block\[^\\n\]*count 4000" 2 "expand"} } */
+ /* { dg-final-use { scan-rtl-dump-times ";; basic block\[^\\n\]*count 2000" 1 "expand"} } */
+-/* { dg-final-use { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/time-profiler-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/time-profiler-1.c
+@@ -19,4 +19,3 @@ int main ()
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 0" 1 "profile"} } */
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 1" 1 "profile"} } */
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 2" 1 "profile"} } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/time-profiler-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/time-profiler-2.c
+@@ -47,4 +47,3 @@ int main ()
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 1" 1 "profile"} } */
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 2" 1 "profile"} } */
+ /* { dg-final-use { scan-ipa-dump-times "Read tp_first_run: 3" 1 "profile"} } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/tracer-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/tracer-1.c
+@@ -15,4 +15,3 @@ int main ()
+ }
+ /* Superblock formation should produce two copies of the increment of c */
+ /* { dg-final-generate { scan-tree-dump-times "c =" 2 "tracer" } } */
+-/* { dg-final-use { cleanup-tree-dump "tracer" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/unroll-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/unroll-1.c
+@@ -21,4 +21,3 @@ main()
+   return 0;
+ }
+ /* { dg-final-use { scan-rtl-dump "Considering unrolling loop with constant number of iterations" "loop2_unroll" } } */
+-/* { dg-final-use { cleanup-rtl-dump "loop2_unroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/update-cunroll-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/update-cunroll-2.c
+@@ -19,4 +19,3 @@ main ()
+   return 0;
+ }
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/update-loopch.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/update-loopch.c
+@@ -19,5 +19,3 @@ main ()
+ /* { dg-final-use { scan-tree-dump-not "loop depth 1, count 33332" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump "Removing basic block" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/update-tailcall.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/update-tailcall.c
+@@ -16,5 +16,3 @@ main()
+ }
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "tailc"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "tailc" } } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-1.c
+@@ -19,5 +19,3 @@ main ()
+ /* { dg-final-use { scan-ipa-dump "Div.mod by constant n_\[0-9\]*=257 transformation on insn" "profile"} } */
+ /* { dg-final-use { scan-tree-dump "if \\(n_\[0-9\]* != 257\\)" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-2.c
+@@ -29,5 +29,3 @@ main ()
+    didn't get optimized out.  */
+ /* { dg-final-use { scan-tree-dump "n_\[0-9\]* \\+ (4294967295|0x0*ffffffff)" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-3.c
+@@ -29,5 +29,3 @@ main ()
+    didn't get optimized out.  */
+ /* { dg-final-use { scan-tree-dump "if \\(n_\[0-9\]* \\>" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-4.c
+@@ -29,5 +29,3 @@ main ()
+    didn't get optimized out.  */
+ /* { dg-final-use { scan-tree-dump "if \\(n_\[0-9\]* \\>" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-5.c
+@@ -14,5 +14,3 @@ main()
+ }
+ /* { dg-final-use { scan-ipa-dump "Div.mod by constant b.*=997 transformation on insn" "profile" } } */
+ /* { dg-final-use { scan-tree-dump-not "Invalid sum" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-6.c
+@@ -17,4 +17,3 @@ main()
+ }
+ /* { dg-final-use { scan-tree-dump "Average value sum:499500" "optimized"} } */
+ /* { dg-final-use { scan-tree-dump "IOR value" "optimized"} } */
+-/* { dg-final-use { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c
+@@ -23,4 +23,3 @@ int main() {
+ }
+ 
+ /* { dg-final-use { scan-ipa-dump "Single value 8 stringop transformation on bzero" "profile" } } */
+-/* { dg-final-use { cleanup-ipa-dump "profile" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030530-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030530-2.c
+@@ -24,5 +24,4 @@ rs6000_emit_prologue (int i, rs6000_stack_t *info)
+    commutative operands correctly.  */
+ /* { dg-final { scan-tree-dump-times "\\+" 1 "dom2"} } */
+  
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030611-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030611-1.c
+@@ -12,4 +12,3 @@ shit(int a)
+ /* There should be precisely one call to square.   If there is more than one,
+    then the dominator optimizations failed to remove the redundant call.  */
+ /* { dg-final { scan-tree-dump-times "square" 1 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030703-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030703-1.c
+@@ -20,4 +20,3 @@ foo(int index)
+ /* There should be exactly one IF conditional.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030703-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030703-2.c
+@@ -41,4 +41,3 @@ get_alias_set (t)
+    if() to disappear.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030708-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030708-1.c
+@@ -42,4 +42,3 @@ nonlocal_mentioned_p (x)
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2"} } */
+                                                                                 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-1.c
+@@ -14,4 +14,3 @@ foo ()
+ 
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-2.c
+@@ -52,4 +52,3 @@ get_alias_set (t)
+    collapse down to a simple return 0 without any conditionals).  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "cddce2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "cddce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030709-3.c
+@@ -45,4 +45,3 @@ record_component_aliases (type)
+ /* There should be one IF conditional.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030710-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030710-1.c
+@@ -53,4 +53,3 @@ record_component_aliases (type)
+ /* There should be two loads of vec.length.  */
+ /* { dg-final { scan-tree-dump-times "vec.length" 2 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-1.c
+@@ -53,4 +53,3 @@ record_component_aliases (type)
+ /* There should be four loads of vec.length.  */
+ /* { dg-final { scan-tree-dump-times "vec.length" 4 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-2.c
+@@ -67,4 +67,3 @@ get_alias_set (t,z)
+ /* There should be one load of alias.  */
+ /* { dg-final { scan-tree-dump-times "->alias" 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030711-3.c
+@@ -59,4 +59,3 @@ get_alias_set (t)
+ /* There should be one load of alias.  */
+ /* { dg-final { scan-tree-dump-times "->alias" 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030714-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030714-1.c
+@@ -43,4 +43,3 @@ find_base_value_wrapper (src)
+ /* There should be no casts to short unsigned int.  */
+ /* { dg-final { scan-tree-dump-times "\\(short unsigned int\\)" 0 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030714-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030714-2.c
+@@ -36,4 +36,3 @@ get_alias_set (t)
+    properly.  */
+ /* { dg-final { scan-tree-dump-times "if " 3 "dom2"} } */
+  
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030728-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030728-1.c
+@@ -42,4 +42,3 @@ objects_must_conflict_p (t1, t2)
+    second to be propagated into all its uses and eliminated.   */
+ /* { dg-final { scan-rtl-dump-times "PART.. = 0" 1 "expand"} } */
+  
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030729-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030729-1.c
+@@ -51,4 +51,3 @@ readonly_fields_p (type)
+    because we load from ->common.code using different types.  */
+ /* { dg-final { scan-tree-dump-times "common\.code" 1 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030730-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030730-1.c
+@@ -22,4 +22,3 @@ foo (int attr_kind, unsigned long offset)
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump "if " "dom2" { target { keeps_null_pointer_checks } } } } */
+      
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030730-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030730-2.c
+@@ -22,4 +22,3 @@ foo (int attr_kind, unsigned long offset)
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump "if " "dom2" { target { keeps_null_pointer_checks } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030731-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030731-1.c
+@@ -64,4 +64,3 @@ store_expr (exp, target, want_value)
+    immediately dominates the comparison in question.  We need something
+    stronger.  */
+ /* { dg-final { scan-tree-dump-times "target.*!= 0" 0 "dom2" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030731-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030731-2.c
+@@ -16,4 +16,3 @@ bar (int i, int partial, int args_addr)
+ /* There should be only one IF conditional since the first does nothing
+    useful.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dce1"} } */
+-/* { dg-final { cleanup-tree-dump "dce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-1.c
+@@ -43,4 +43,3 @@ bar (rtx r)
+    which combines the result of those two tests into a new test
+    must always be true and it is optimized appropriately.  */
+ /* { dg-final { scan-tree-dump-times "if " 2 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-10.c
+@@ -23,4 +23,3 @@ subreg_highpart_offset (outermode, innermode)
+ /* There should be one right shift by 2 places.  */
+ /* { dg-final { scan-tree-dump-times " >> 2" 1 "vrp1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-11.c
+@@ -19,4 +19,3 @@ foo (reg)
+                                                                                 
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-2.c
+@@ -29,4 +29,3 @@ foo(int n)
+                                                                                
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-3.c
+@@ -26,4 +26,3 @@ cpp_parse_escape (pstr, limit, wide)
+ /* There should be precisely three IF statements.  If there is
+    more than two, then the dominator optimizations failed.  */
+ /* { dg-final { scan-tree-dump-times "if " 3 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-5.c
+@@ -36,4 +36,3 @@ foo ()
+    The other one for '(EXPR)->unchanging'.  */
+ /* { dg-final { scan-tree-dump-times "if " 2 "dom2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-6.c
+@@ -40,4 +40,3 @@ foo4 (distance, i, j)
+ 
+ /* There should be no ABS_EXPR.  */
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR " 0 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-7.c
+@@ -35,4 +35,3 @@ simplify_condition (cond_p)
+ 
+ /* There should be exactly one IF conditional.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-8.c
+@@ -52,4 +52,3 @@ output_location_lists (die)
+ 
+ /* There should be exactly one IF conditional, in output_location_lists.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030807-9.c
+@@ -20,4 +20,3 @@ ooof ()
+ 
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030808-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030808-1.c
+@@ -38,4 +38,3 @@ delete_dead_jumptables ()
+ /* There should be no IF statements.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "cddce2"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "cddce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-1.c
+@@ -20,4 +20,3 @@ com(int *blah)
+    more than one, then the dominator optimizations failed.  */
+ /* { dg-final { scan-tree-dump-times "\\*blah" 1 "dom2"} } */
+   
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-2.c
+@@ -20,4 +20,3 @@ foo (int value)
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2"} } */
+  
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-3.c
+@@ -21,4 +21,3 @@ foo (int value)
+ /* There should be one IF conditional.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom2"} } */
+  
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-4.c
+@@ -36,9 +36,7 @@ blah (decl, set)
+ /* There should be precisely one reference to pointer_alias_set.  If there is
+    more than one, then the dominator optimizations failed.  */
+ /* { dg-final { scan-tree-dump-times "pointer_alias_set" 1 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+ 
+ /* The assignment set = -1 in the ELSE clause of the last IF
+    statement should be removed by the final cleanup phase.  */
+ /* { dg-final { scan-tree-dump-times "set = -1" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-5.c
+@@ -37,9 +37,7 @@ blah (decl, set)
+ /* There should be precisely one reference to pointer_alias_set.  If there is
+    more than one, then the dominator optimizations failed.  */
+ /* { dg-final { scan-tree-dump-times "pointer_alias_set" 1 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+ 
+ /* The assignment set = -1 in the ELSE clause of the last IF
+    statement should be removed by the final cleanup phase.  */
+ /* { dg-final { scan-tree-dump-times "set = -1" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-6.c
+@@ -42,4 +42,3 @@ foo (t, set)
+ /* ??? Will fail until we properly distinguish member stores.  At
+    present the write to type.alias_set kills the previous load.  */
+ /* { dg-final { scan-tree-dump-times "common.code" 1 "dom2" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030814-7.c
+@@ -39,4 +39,3 @@ mark_constant_function (void)
+    This if we find current_function_decl used as an argument, then
+    we have failed.  */
+ /* { dg-final { scan-tree-dump-times "\\(current_function_decl\\)" 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030821-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030821-1.c
+@@ -26,5 +26,3 @@ y: ;
+ 
+ /* We should have folded away the goto &x  */
+ /* { dg-final { scan-tree-dump-times "goto &x" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030824-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030824-1.c
+@@ -20,4 +20,3 @@ int foo (int x, int y)
+ 
+ /* The addition should be optimized into 'y+x'.  */
+ /* { dg-final { scan-tree-dump-times "\[xy\]_..D. \\+ \[xy]_..D." 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030824-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030824-2.c
+@@ -20,4 +20,3 @@ int foo (int x, int y)
+ 
+ /* This function should be optimized into 'return y+x'.  */
+ /* { dg-final { scan-tree-dump-times "\[xy\]_..D. \\+ \[xy]_..D." 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030825-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030825-1.c
+@@ -26,4 +26,3 @@ xxx:;
+ 
+ /* Bla should not be optimized away.  */
+ /* { dg-final { scan-tree-dump-times "bla" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030907-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030907-1.c
+@@ -27,4 +27,3 @@ int main()
+ 
+ /* The abort() call clearly is unreachable.  */
+ /* { dg-final { scan-tree-dump-times "abort" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030917-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030917-1.c
+@@ -16,4 +16,3 @@ findbestextension (int blah, int blah2)
+ 
+ /* The argument to "foo" should be a variable, not a constant.  */
+ /* { dg-final { scan-tree-dump-times "foo .defval" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030917-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030917-3.c
+@@ -22,4 +22,3 @@ main ()
+ 
+ /* The argument to "printf" should be a constant, not a variable.  */
+ /* { dg-final { scan-tree-dump-times "printf.*, 0" 1 "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030922-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030922-1.c
+@@ -31,4 +31,3 @@ voidify_wrapper_expr (tree wrapper)
+ 
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20030922-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20030922-2.c
+@@ -21,4 +21,3 @@ rgn_rank (rtx insn1, rtx insn2)
+ 
+ /* There should be two IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 2 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031015-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031015-1.c
+@@ -15,4 +15,3 @@ main(void)
+ 
+ /* The VDEF comes from the initial assignment, the asm, and the clobber.  */
+ /* { dg-final { scan-tree-dump-times "DEF" 3 "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031021-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031021-1.c
+@@ -18,4 +18,3 @@ int main()
+ 
+ /* We should only store to a.i, not load from it.  */
+ /* { dg-final { scan-tree-dump-not "= a.i" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031022-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031022-1.c
+@@ -27,4 +27,3 @@ blah (int arf)
+ 
+ /* There should be one load from entry_exit_blocks[1].pred.  */
+ /* { dg-final { scan-tree-dump-times "entry_exit_blocks.1..pred" 1 "dom1"} } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-1.c
+@@ -18,4 +18,3 @@ void foo (int testarray[])
+ 
+ /* There should be no link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-2.c
+@@ -26,4 +26,3 @@ void foo (struct s* teststruct)
+ /* There should be no link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-3.c
+@@ -19,4 +19,3 @@ void foo (int testarray[])
+ 
+ /* There should be no link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-4.c
+@@ -27,4 +27,3 @@ void foo (struct s*  r)
+ 
+ /* There should be no link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-5.c
+@@ -26,4 +26,3 @@ void foo2 (struct s*  r, struct s*  p)
+ 
+ /* There should be no link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031106-6.c
+@@ -26,4 +26,3 @@ struct s foo (struct s r)
+ /* There should be no references to any of "temp_struct*"
+    temporaries.  */
+ /* { dg-final { scan-tree-dump-times "temp_struct" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20031216-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20031216-1.c
+@@ -17,4 +17,3 @@ foo (int b)
+ /* The comparison should be eliminated, there should be no reference
+    to link_error.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040204-1.c
+@@ -34,4 +34,3 @@ void test55 (int x, int y)
+    by teaching dom to look through && and register all components
+    as true.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail { ! "alpha*-*-* arm*-*-* aarch64*-*-* powerpc*-*-* cris-*-* crisv32-*-* hppa*-*-* i?86-*-* mmix-*-* mips*-*-* m68k*-*-* moxie-*-* nds32*-*-* sh*-*-* sparc*-*-* spu-*-* visium-*-* x86_64-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040210-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040210-1.c
+@@ -30,4 +30,3 @@ main(){
+ 
+ /* Should have no more than two ifs left after straightening.  */
+ /* { dg-final { scan-tree-dump-times "if " 2 "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040211-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040211-1.c
+@@ -36,4 +36,3 @@ com (rtx insn, int blah)
+ /* Cddce cannot remove possibly infinite loops and there is no way how to
+    determine whether the loop in can_move_up ends.  */
+ /* { dg-final { scan-tree-dump "if " "cddce2"} } */
+-/* { dg-final { cleanup-tree-dump "cddce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040216-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040216-1.c
+@@ -16,4 +16,3 @@ foo(int *z, int *y, int xx)
+ 
+ /* We should convert two COND_EXPRs into straightline code.  */
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1"} } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040305-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040305-1.c
+@@ -24,9 +24,7 @@ void foo(int edx, int eax)
+ 
+ /* Verify that we did a forward propagation.  */
+ /* { dg-final { scan-tree-dump-times "Replaced" 1 "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+ 
+ /* After cddce we should have two IF statements remaining as the other
+    two tests can be threaded.  */
+ /* { dg-final { scan-tree-dump-times "if " 2 "cddce2"} } */
+-/* { dg-final { cleanup-tree-dump "cddce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040430-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040430-1.c
+@@ -23,4 +23,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "if " 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040513-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040513-1.c
+@@ -14,4 +14,3 @@ foo (unsigned int a)
+ /* There should be no casts to a _Bool since we can use the temporary
+    holding (a>>5)&1 directly.  */
+ /* { dg-final { scan-tree-dump-times "\\(_Bool\\)" 0 "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040513-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040513-2.c
+@@ -22,4 +22,3 @@ int t(int i)
+ /* There should be no link_error calls, if there is any, the
+    optimization has failed */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040514-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040514-1.c
+@@ -16,4 +16,3 @@ end:
+ 
+ /* Should have no ifs left after straightening.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040514-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040514-2.c
+@@ -14,5 +14,4 @@ foo2 (distance, i, j)
+ /* There should be one ABS_EXPR and no conditionals.  */
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR " 1 "phiopt1"} } */
+ /* { dg-final { scan-tree-dump-times "if " 0 "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040517-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040517-1.c
+@@ -19,4 +19,3 @@ void bar (void)
+    Hence, we must have a VDEF for a before and after the call to foo().
+    And one after the call to abort().  */
+ /* { dg-final { scan-tree-dump-times "VDEF" 3 "alias"} } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040518-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040518-1.c
+@@ -10,4 +10,3 @@ int f(int a, int b)
+ 
+ /* Should have no ifs left after straightening.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040518-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040518-2.c
+@@ -14,4 +14,3 @@ int t( int i)
+ /* We should convert one COND_EXPRs into straightline code with ABS.  */
+ /* { dg-final { scan-tree-dump-times "straightline" 1 "phiopt1"} } */
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR" 1 "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040615-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040615-1.c
+@@ -14,4 +14,3 @@ foo (unsigned int a, unsigned int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bar2" 0 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040624-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040624-1.c
+@@ -18,4 +18,3 @@ foo (unsigned int a, unsigned int b)
+    conditional.  */
+ 
+ /* { dg-final { scan-tree-dump-times "if " 1 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040703-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040703-1.c
+@@ -10,4 +10,3 @@ float foo(float x)
+ 
+ /* We should *not* fold the arithmetic.  */
+ /* { dg-final { scan-tree-dump-times "0\\.0" 0 "dom2"} } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040729-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040729-1.c
+@@ -17,4 +17,3 @@ foo ()
+    operands.  But 'p' itself is not volatile and taking the address of
+    a volatile does not constitute a volatile operand.  */
+ /* { dg-final { scan-tree-dump-times "&x" 0 "dce2"} } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20040911-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20040911-1.c
+@@ -19,4 +19,3 @@ int foo (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "VUSE <c" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20041002-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20041002-1.c
+@@ -21,4 +21,3 @@ bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "if" 0 "ssa" } } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20041122-1.c
+@@ -35,4 +35,3 @@ find_unreachable_blocks (void)
+    modify e or e->dest if we can assert strict-aliasing rules.
+    The net result is that we only need one load of e->dest.  */
+ /* { dg-final { scan-tree-dump-times "->dest" 1 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20050128-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20050128-1.c
+@@ -11,4 +11,3 @@ foo (int align)
+ /* We should have optimized away the mod operator before we gimpleized
+    the code.  */
+ /* { dg-final { scan-tree-dump-times "%" 0 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20050215-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20050215-1.c
+@@ -11,4 +11,3 @@ int foo (void)
+ /* Make sure the optimizers don't introduce overflow where one
+    did not exist in the original.  */
+ /* { dg-final { scan-tree-dump-times "-0+4" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20050314-1.c
+@@ -18,4 +18,3 @@ void xxx (void)
+    cannot read nor write the memory.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Moving statement" 1 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20050412-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20050412-1.c
+@@ -13,4 +13,3 @@ void foo (int a) {
+ /* Make sure we do not have an assignment a = 0 in the resulting
+    optimized dump.  */
+ /* { dg-final { scan-tree-dump-times "a.* = 0;" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/20080530.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/20080530.c
+@@ -19,4 +19,3 @@ baz (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Inlining foo into baz" 0 "einline"} } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-10.c
+@@ -16,5 +16,4 @@ int foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 3;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-11.c
+@@ -18,4 +18,3 @@ int bar(void)
+    the latter is an ssa temporary.  */
+ /* { dg-final { scan-tree-dump "= a.0.;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "= \\*\[^\r\n\]*_.;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-12.c
+@@ -14,5 +14,4 @@ int foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "VDEF" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-17.c
+@@ -15,4 +15,3 @@ int foo(int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "NOTE: no flow-sensitive alias info for" "ccp2" } } */
+-/* { dg-final { cleanup-tree-dump "ccp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-18.c
+@@ -86,5 +86,3 @@ int test8 (struct A *p, int *q)
+ /* { dg-final { scan-tree-dump-not "return 6;" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "return 7;" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "return -1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-19.c
+@@ -26,4 +26,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "q_. = { a b }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-2.c
+@@ -25,4 +25,3 @@ int foo()
+ /* We should have removed the link_error on the tree level as GCC can tell that
+    a is not touched by the calling bar at all. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-20.c
+@@ -21,4 +21,3 @@ int foo(struct S *s, struct R *r)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-21.c
+@@ -11,5 +11,4 @@ int f(int *r)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-22.c
+@@ -11,5 +11,4 @@ int f(int *r)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-23.c
+@@ -14,5 +14,4 @@ void f1 (const char *c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "abort" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-24.c
+@@ -18,5 +18,4 @@ void g (const char *c, int *i)
+ 
+ /* { dg-final { scan-tree-dump-not "abort" "optimized" } } */
+ /* { dg-final { scan-tree-dump "keepit" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-25.c
+@@ -8,5 +8,4 @@ void f (long *p) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "= 42" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-26.c
+@@ -9,5 +9,4 @@ void f (const char *c, int *i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "abort" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-27.c
+@@ -8,4 +8,3 @@ void f (long *p) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "= 42" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-29.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-29.c
+@@ -25,4 +25,3 @@ void foo (union X *x)
+    baz makes sure that ystruct has its address taken.  */
+ 
+ /* { dg-final { scan-tree-dump-not "ystruct" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-3.c
+@@ -16,5 +16,4 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c
+@@ -19,4 +19,3 @@ int foo (float *p)
+ /* We should be able to CSE the load from *p in the return stmt.  */
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\*p" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-31.c
+@@ -21,4 +21,3 @@ int foo (float *p)
+    other loads should be removed.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*\[^ \]" 1 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-32.c
+@@ -17,4 +17,3 @@ int bar (short *p)
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*\[^ \]" 1 "cddce1" } } */
+ /* { dg-final { scan-tree-dump-not "aligned_alloc" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-33.c
+@@ -17,4 +17,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced j with 0" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-4.c
+@@ -17,5 +17,4 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-5.c
+@@ -19,5 +19,4 @@ int foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias-6.c
+@@ -18,4 +18,3 @@ int bar(void)
+    the latter is an ssa temporary.  */
+ /* { dg-final { scan-tree-dump "= a.0.;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "= \\*\[^\r\n\]*_.;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/alias_bug.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/alias_bug.c
+@@ -58,4 +58,3 @@ void keyboard_set_repeat(void)
+ 
+ /* { dg-final { scan-tree-dump-times "ireg.*ax" 1 "optimized"} } */
+  
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/andor-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/andor-1.c
+@@ -61,5 +61,4 @@ int test10(int j)
+ /* { dg-final { scan-tree-dump-times "h \\| 1" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "i \& 2 \\| 1" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "j \& 2 \\| 1" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/andor-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/andor-2.c
+@@ -49,4 +49,3 @@ int test8(int o, int p)
+ /* { dg-final { scan-tree-dump-times "return k;" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return m;" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "return o;" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/andor-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/andor-3.c
+@@ -21,4 +21,3 @@ int f3(int y, int x)
+ 
+ /* { dg-final { scan-tree-dump-times "~x" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "x_..D. \& y_..D." 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/andor-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/andor-4.c
+@@ -21,4 +21,3 @@ int f3(int y, int x)
+ 
+ /* { dg-final { scan-tree-dump-times "~x" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "x_..D. \\\| y_..D." 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/andor-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/andor-5.c
+@@ -47,4 +47,3 @@ int f7(int y, int x)
+ /* { dg-final { scan-tree-dump-times "\\\|" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\&" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "return x_..D.;" 8 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/asm-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/asm-1.c
+@@ -14,4 +14,3 @@ void f()
+ 
+ /* { dg-final { scan-tree-dump-times "42" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "63" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/asm-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/asm-2.c
+@@ -18,4 +18,3 @@ void baz(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "asm\[^\\r\\n\]*xyzzy" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/asm-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/asm-3.c
+@@ -36,4 +36,3 @@ void test(void)
+ /* In particular, hardreg should *not* appear in the call to bar.  */
+ /* { dg-final { scan-tree-dump-times "bar \[(\]\[^\n\r\]*_.\[)\]" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/asmgoto-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/asmgoto-1.c
+@@ -92,4 +92,3 @@ bad:
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "XYZZY" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/assign-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/assign-1.c
+@@ -9,4 +9,3 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "count =" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/assign-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/assign-2.c
+@@ -9,5 +9,4 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "count =" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/assign-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/assign-3.c
+@@ -21,4 +21,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " = count;" 3 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/attr-alias-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/attr-alias-2.c
+@@ -9,4 +9,3 @@ main()
+    return b+a;
+ }
+ /* { dg-final { scan-tree-dump "return 8" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/attr-alias.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/attr-alias.c
+@@ -25,4 +25,3 @@ main()
+ /* { dg-final { scan-tree-dump-times "  test4 " 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "  test1 " "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "  test2 " "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c
+@@ -25,4 +25,3 @@ void f(int x, int y)
+    the testcase around too much.  */
+ /* { dg-final { scan-ipa-dump-times "block 5, loop depth 0, count 0, freq \[6-9\]\[0-9\]\[0-9\]\[0-9\]" 1 "profile_estimate" } } */
+ 
+-/* { dg-final { cleanup-ipa-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bitwise-sink.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bitwise-sink.c
+@@ -8,4 +8,3 @@ foo (_Bool x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "~x" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-1.c
+@@ -16,4 +16,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-10.c
+@@ -11,4 +11,3 @@ int f(_Bool x)
+ /* { dg-final { scan-tree-dump-times "!= 1" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "~x" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-11.c
+@@ -11,4 +11,3 @@ int f(_Bool x)
+ /* { dg-final { scan-tree-dump-times "== 0" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "~x" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-2.c
+@@ -19,4 +19,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-3.c
+@@ -15,4 +15,3 @@ int f(_Bool x)
+    fold its tree forwprop is able to clean up the mess.  */
+ /* { dg-final { scan-tree-dump-times "== 0" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-4.c
+@@ -14,4 +14,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-5.c
+@@ -16,4 +16,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-6.c
+@@ -19,4 +19,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-7.c
+@@ -14,4 +14,3 @@ int f(_Bool x)
+ /* There should be no != 1. Fold changes x != 1 to ! x.  */
+ /* { dg-final { scan-tree-dump-times "!= 1" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-8.c
+@@ -14,4 +14,3 @@ int f(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "adde" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/bool-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/bool-9.c
+@@ -14,4 +14,3 @@ _Bool f1(_Bool x)
+    away the comparison.  */
+ /* { dg-final { scan-assembler-times "subfe" 0 { target powerpc*-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-1.c
+@@ -11,4 +11,3 @@ f (int i, float j, int i2, float j2)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times {builtin_expect[^\n]*, 0\);\n[^\n]*if} 2 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-2.c
+@@ -13,4 +13,3 @@ f (int i, float j, int i2, float j2)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times {builtin_expect[^\n]*, 0\);\n[^\n]*if} 2 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-3.c
+@@ -14,4 +14,3 @@ f (int i, float j, int i2, float j2)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times {builtin_expect[^\n]*, 0\);\n[^\n]*if} 2 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-4.c
+@@ -14,4 +14,3 @@ f (int i, float j, int i2, float j2)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times {builtin_expect[^\n]*, 0\);\n[^\n]*if} 2 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-expect-5.c
+@@ -16,4 +16,3 @@ f (int i, float j, int i2, float j2)
+ /* { dg-final { scan-tree-dump-times { if } 2 "forwprop1"} } */
+ /* { dg-final { scan-tree-dump {builtin_expect[^\n]*, 0\);\n[^\n]*if} "forwprop1"} } */
+ /* { dg-final { scan-tree-dump {builtin_expect[^\n]*, 1\);\n[^\n]*if} "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop?" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
+@@ -38,4 +38,3 @@ void test (void)
+ /* { dg-final { scan-tree-dump "vi6.*fputc.*fp.*vi7" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi7.*fputc.*fp.*vi8" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi8.*fprintf.*fp.*\"%d%d\".*vi9" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
+@@ -38,4 +38,3 @@ void test (void)
+ /* { dg-final { scan-tree-dump "vi6.*fputc.*fp.*vi7" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi7.*fputc.*fp.*vi8" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi8.*__fprintf_chk.*fp.*1.*\"%d%d\".*vi9" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-free.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-free.c
+@@ -17,4 +17,3 @@ void foo(unsigned n)
+ /* We should remove the redundant call to free.  */
+ 
+ /* { dg-final { scan-tree-dump-times "free" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
+@@ -39,4 +39,3 @@ void test (void)
+ /* { dg-final { scan-tree-dump "vi7 ={v} 0\[^\(\)\]*vi8 ={v} 0" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi8.*putchar.*vi9" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi9.*puts.*\"hello\\\\n\".*via" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
+@@ -39,4 +39,3 @@ void test (void)
+ /* { dg-final { scan-tree-dump "vi7 ={v} 0\[^\(\)\]*vi8 ={v} 0" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi8.*putchar.*vi9" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi9.*puts.*\"hello\\\\n\".*via" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
+@@ -36,4 +36,3 @@ test (va_list ap1, va_list ap2, va_list ap3, va_list ap4, va_list ap5,
+ /* { dg-final { scan-tree-dump "vi4.*vfprintf.*\"%s\".*vi5" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi5.*vfprintf.*\"%c\".*vi6" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi6.*vfprintf.*\"%s\\\\n\".*vi7" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
+@@ -36,4 +36,3 @@ test (va_list ap1, va_list ap2, va_list ap3, va_list ap4, va_list ap5,
+ /* { dg-final { scan-tree-dump "vi4.*__vfprintf_chk.*fp.*1.*\"%s\".*vi5" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi5.*__vfprintf_chk.*fp.*1.*\"%c\".*vi6" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi6.*__vfprintf_chk.*fp.*1.*\"%s\\\\n\".*vi7" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
+@@ -34,4 +34,3 @@ test (va_list ap1, va_list ap2, va_list ap3, va_list ap4, va_list ap5,
+ /* { dg-final { scan-tree-dump "vi4.*vprintf.*\"%s\".*vi5" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi5.*vprintf.*\"%c\".*vi6" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi6.*vprintf.*\"%s\\\\n\".*vi7" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
+@@ -34,4 +34,3 @@ test (va_list ap1, va_list ap2, va_list ap3, va_list ap4, va_list ap5,
+ /* { dg-final { scan-tree-dump "vi4.*__vprintf_chk.*1.*\"%s\".*vi5" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi5.*__vprintf_chk.*1.*\"%c\".*vi6" "fab1"} } */
+ /* { dg-final { scan-tree-dump "vi6.*__vprintf_chk.*1.*\"%s\\\\n\".*vi7" "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-1.c
+@@ -26,4 +26,3 @@ void* g(void)
+ /* { dg-final { scan-tree-dump-times "calloc" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "malloc" "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "memset" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-2.c
+@@ -24,4 +24,3 @@ void* g(int m1, int m2)
+ /* { dg-final { scan-tree-dump-times "malloc" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "calloc" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "memset" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/calloc-3.c
+@@ -11,4 +11,3 @@ void*f(){
+ /* { dg-final { scan-tree-dump-not "malloc" "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "calloc" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "memset" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cfgcleanup-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cfgcleanup-1.c
+@@ -16,4 +16,3 @@ cleanup (int a, int b)
+ }
+ /* Dce should get rid of the initializers and cfgcleanup should elliminate ifs  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dce1"} } */
+-/* { dg-final { cleanup-tree-dump "dce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-1.c
+@@ -196,5 +196,4 @@ process_switch (gimple swtch)
+    any partition copies inserted.  */
+ 
+ /* { dg-final { scan-rtl-dump-not "partition copy" "expand"} } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/coalesce-2.c
+@@ -13,4 +13,3 @@ void foo(int n)
+    any partition copies inserted.  */
+ 
+ /* { dg-final { scan-rtl-dump-not "partition copy" "expand"} } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/col-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/col-1.c
+@@ -14,4 +14,3 @@ m(int x)
+ /* { dg-final { scan-tree-dump-times "10:9.*c = 5" 1 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "10:14.*c . 16" 1 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "10:4.*a =" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-1.c
+@@ -10,4 +10,3 @@ C foo(C x, float y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__mul" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-2.c
+@@ -10,4 +10,3 @@ C foo(C x, float y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__div" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-3.c
+@@ -23,5 +23,4 @@ float imag_part(COMPLEX_FLOAT a)
+ 
+ /* { dg-final { scan-tree-dump-times "REALPART_EXPR" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "IMAGPART_EXPR" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-4.c
+@@ -11,4 +11,3 @@ int f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__complex__" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-5.c
+@@ -9,4 +9,3 @@ int f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "__complex__" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/complex-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/complex-6.c
+@@ -22,4 +22,3 @@ quantum_foo(float _Complex a)
+ 
+ /* { dg-final { scan-tree-dump-times "REALPART_EXPR" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "IMAGPART_EXPR" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/copy-headers.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/copy-headers.c
+@@ -13,4 +13,3 @@ void bla (void)
+ 
+ /* There should be a header duplicated.  */
+ /* { dg-final { scan-tree-dump-times "Duplicating header" 1 "ch"} } */
+-/* { dg-final { cleanup-tree-dump "ch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cswtch-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cswtch-2.c
+@@ -18,4 +18,3 @@ int h1 (X x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "CSWTCH" 0 "switchconv" } } */
+-/* { dg-final { cleanup-tree-dump "switchconv" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cswtch.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cswtch.c
+@@ -78,4 +78,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Switch converted" "switchconv" } } */
+-/* { dg-final { cleanup-tree-dump "switchconv" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-1.c
+@@ -11,4 +11,3 @@ test(int c)
+ /* Array bounds says the loop will not roll much.  */
+ /* { dg-final { scan-tree-dump "loop with 3 iterations completely unrolled" "cunrolli"} } */
+ /* { dg-final { scan-tree-dump "Last iteration exit edge was proved true." "cunrolli"} } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-10.c
+@@ -11,4 +11,3 @@ foo (int n)
+      a[i]++;
+ }
+ /* { dg-final { scan-tree-dump-times "Forced statement unreachable" 2 "cunroll" } } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-11.c
+@@ -15,4 +15,3 @@ extern void foo (s1 *x1, s1 *x2, int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Loop 1 iterates at most 3 times" "cunroll" } } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-2.c
+@@ -15,4 +15,3 @@ test(int c)
+ }
+ /* We are not able to get rid of the final conditional because the loop has two exits.  */
+ /* { dg-final { scan-tree-dump "loop with 2 iterations completely unrolled" "cunroll"} } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-3.c
+@@ -13,4 +13,3 @@ test(int c)
+ /* If we start duplicating headers prior curoll, this loop will have 0 iterations.  */
+ 
+ /* { dg-final { scan-tree-dump "loop with 2 iterations completely unrolled" "cunrolli"} } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-4.c
+@@ -20,4 +20,3 @@ test(int c)
+    from the last iteration.  */
+ /* { dg-final { scan-tree-dump "loop turned into non-loop; it never loops." "ivcanon"} } */
+ /* { dg-final { scan-tree-dump "Last iteration exit edge was proved true." "ivcanon"} } */
+-/* { dg-final { cleanup-tree-dump "ivcanon" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-5.c
+@@ -12,4 +12,3 @@ test(int c)
+ /* { dg-final { scan-tree-dump "loop with 6 iterations completely unrolled" "cunroll"} } */
+ /* { dg-final { scan-tree-dump "Exit condition of peeled iterations was eliminated." "cunroll"} } */
+ /* { dg-final { scan-tree-dump "Last iteration exit edge was proved true." "cunroll"} } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/cunroll-9.c
+@@ -21,4 +21,3 @@ t (int n)
+   return sum;
+ }
+ /* { dg-final { scan-tree-dump-times "Removed pointless exit:" 1 "cunrolli" } } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/dce-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/dce-1.c
+@@ -15,5 +15,4 @@ int foo (int b, int j)
+    the exit condition after the loop.  */
+ /* { dg-final { scan-tree-dump-not "999" "cddce1"} } */
+ /* { dg-final { scan-tree-dump-not "1000" "cddce1"} } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/divide-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/divide-1.c
+@@ -10,5 +10,4 @@ int f(int a)
+ /* { dg-final { scan-tree-dump-times "-a" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "a_..D. / -10" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/divide-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/divide-2.c
+@@ -10,5 +10,4 @@ int f(int a)
+ /* { dg-final { scan-tree-dump-times "10 / -a" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "-10 / a" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/divide-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/divide-3.c
+@@ -9,6 +9,5 @@ int f(int a)
+ /* { dg-final { scan-tree-dump-times "a_\[0-9()D\]* / 10" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "a_..D. / -10" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/divide-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/divide-4.c
+@@ -9,6 +9,5 @@ int f(int a)
+ /* { dg-final { scan-tree-dump-times "-a" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "a_..D. / 10" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/dump-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/dump-1.c
+@@ -6,4 +6,3 @@ int f(void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/fnsplit-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/fnsplit-1.c
+@@ -20,4 +20,3 @@ main(void)
+ }
+ /* { dg-final { scan-tree-dump-times "Splitting function at:" 1 "fnsplit"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldaddr-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldaddr-1.c
+@@ -12,5 +12,4 @@ int foo(char *b)
+    not identical and thus collapsed the function into a trivial
+    "return 0".  */
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldcast-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldcast-1.c
+@@ -13,4 +13,3 @@ char *bar (char *x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return x;" 2 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-1.c
+@@ -23,4 +23,3 @@ foo (void)
+ /* The switch should be switch converted and later constant propagated.  */
+ /* { dg-final { scan-tree-dump-not "CSWTCH" "optimized"} } */
+ /* { dg-final { scan-tree-dump-not "switch" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-2.c
+@@ -57,4 +57,3 @@ emit_support_tinfos (void)
+ /* We should copy loop header to fundamentals[0] and then fold it way into
+    known value.  */
+ /* { dg-final { scan-tree-dump-not "fundamentals.0" "ch"} } */
+-/* { dg-final { cleanup-tree-dump "ch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-3.c
+@@ -75,4 +75,3 @@ int_fits_type_p (const_tree c, const_tree type)
+ }
+ /* The switch should be switch converted and later constant propagated.  */
+ /* { dg-final { scan-tree-dump-not "tree_code_type" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-4.c
+@@ -11,4 +11,3 @@ test()
+   return a.a+b[c];
+ }
+ /* { dg-final { scan-tree-dump "return 0;" "ccp2" } } */
+-/* { dg-final { cleanup-tree-dump "ccp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-5.c
+@@ -11,5 +11,4 @@ test()
+   return a[2]+b[1]+b[3]+c.b;
+ }
+ /* { dg-final { scan-tree-dump "return 11;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldconst-6.c
+@@ -11,4 +11,3 @@ void f (vec *r)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "2, 666" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/foldstring-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/foldstring-1.c
+@@ -10,4 +10,3 @@ arf ()
+     blah ();
+ }
+ /* { dg-final { scan-tree-dump-times "= 0;" 1 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-1.c
+@@ -15,4 +15,3 @@ void f(struct a * b, __SIZE_TYPE__ i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\[\[^\n\r\]*\\\] = 1;" 0 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-10.c
+@@ -19,4 +19,3 @@ void test2(void)
+    the rhs of the store to b by 1.  */
+ 
+ /* { dg-final { scan-tree-dump "Replaced\[^\\n\]*with 1" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-11.c
+@@ -17,4 +17,3 @@ int g(int *p, int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "= MEM\\\[\\\(int \\\*\\\)\[ap\]_.. \\\+ 4B\\\];" 2 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-12.c
+@@ -19,4 +19,3 @@ int bar(struct X *p, int i)
+    address arithmetic into the memory access as an array access.  */
+ 
+ /* { dg-final { scan-tree-dump-times "->a\\\[D\\\." 2 "forwprop1" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-13.c
+@@ -13,4 +13,3 @@ foo (struct B *b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "\\\(unsigned" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-14.c
+@@ -15,4 +15,3 @@ foo (unsigned int eax)
+ 
+ /* { dg-final { scan-tree-dump-times " & " 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\\| " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-15.c
+@@ -11,4 +11,3 @@ foo (_Bool a, _Bool b, _Bool c)
+ 
+ /* { dg-final { scan-tree-dump-times " == " 0 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-times " != " 0 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-16.c
+@@ -11,4 +11,3 @@ int foo (double xx, double xy)
+ }
+ 
+ /* { dg-final { scan-tree-dump "if \\\(x" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-17.c
+@@ -9,4 +9,3 @@ int foo (int xx, int xy)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " & 1" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-18.c
+@@ -21,4 +21,3 @@ signed char g2(unsigned long long n)
+ 
+ /* { dg-final { scan-tree-dump-times "\\\(float\\\)" 2 "cddce1" } } */
+ /* { dg-final { scan-tree-dump-not "\\\(long double\\\)" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-19.c
+@@ -12,4 +12,3 @@ void f (vec *x1, vec *x2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-2.c
+@@ -17,4 +17,3 @@ void f(__SIZE_TYPE__ i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\[\[^\n\r\]*\\\] = 1;" 0 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop?" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-20.c
+@@ -67,4 +67,3 @@ void l (double d, vecf* r)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-21.c
+@@ -13,4 +13,3 @@ test (v4si *x, v4si *y)
+ /* Optimization in forwprop1, cleanup in cddce1.  */
+ 
+ /* { dg-final { scan-tree-dump-not "VEC_PERM_EXPR" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-23.c
+@@ -12,4 +12,3 @@ long f (long d, long e)
+ 
+ 
+ /* { dg-final { scan-tree-dump-not "BIT_FIELD_REF" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-24.c
+@@ -15,4 +15,3 @@ foo (unsigned char x, unsigned short y)
+    as in (x ^ (char) y) & 1.  */
+ 
+ /* { dg-final { scan-tree-dump-times " & " 1 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-25.c
+@@ -38,7 +38,6 @@ convert_move (rtx to, rtx from, int unsignedp)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced.*!=.*with.*!=.* " "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+ 
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-26.c
+@@ -63,4 +63,3 @@ function_and_variable_visibility (unsigned char whole_program)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "& 255" "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-27.c
+@@ -36,5 +36,4 @@ void i (V *v1, V *v2){
+ /* { dg-final { scan-tree-dump-not "\\\+" "forwprop1"} } */
+ /* { dg-final { scan-tree-dump "{ 0, 4 }" "forwprop1"} } */
+ /* { dg-final { scan-tree-dump "{ 37, -5 }" "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
+@@ -85,5 +85,4 @@ test_8 (int code)
+    we do that we even generate better code on x86 at least.  */
+ 
+ /* { dg-final { scan-tree-dump-times "simplified to if \\\(\[^ ]* <" 4 "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-3.c
+@@ -15,4 +15,3 @@ int foo(struct bar *x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced .p_. < q_.. with .1." "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-30.c
+@@ -12,4 +12,3 @@ int *foo (int *q, int i, int j)
+    need q + i as well.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\+" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-31.c
+@@ -13,4 +13,3 @@ int foo (int x)
+ /* { dg-final { scan-tree-dump-times "= 0;" 2 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-times "-" 0 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-times "\\+" 1 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-32.c
+@@ -14,5 +14,3 @@ int bar (int x)
+ 
+ /* { dg-final { scan-tree-dump "x_.\\(D\\) / 15" "forwprop1" } } */
+ /* { dg-final { scan-tree-dump "return 0;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-4.c
+@@ -15,4 +15,3 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
+@@ -17,4 +17,3 @@ vector float foo( vector float v )
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "disappear" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-6.c
+@@ -25,4 +25,3 @@ void f(void)
+    value-numbering, removing the load altogether.
+    ???  We now do this after CPP re-writes a into SSA form.  */
+ /* { dg-final { scan-tree-dump-times "VIEW_CONVERT_EXPR" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-7.c
+@@ -13,4 +13,3 @@ int foo(void)
+ 
+ /* { dg-final { scan-tree-dump-times "VIEW_CONVERT_EXPR" 0 "forwprop1"} } */
+ /* { dg-final { scan-tree-dump-times "={v}" 2 "forwprop1"} } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-8.c
+@@ -12,4 +12,3 @@ int foo(struct X *q)
+ 
+ /* We should have propragated &q->a into (*pointer).  */
+ /* { dg-final { scan-tree-dump "q_.\\\(D\\\)\\\]\\\[0\\\];" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-9.c
+@@ -17,5 +17,3 @@ void f(void)
+ 
+ /* { dg-final { scan-tree-dump-times " = 1" 2 "optimized"} } */
+ /* { dg-final { scan-tree-dump-not " = a;" "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
+@@ -34,4 +34,3 @@ void a2 (struct s1 sv, int i)
+ 
+ /* { dg-final { scan-tree-dump-times "sv_\[0-9\]\\\(D\\\)->i" 2 "fre1" } } */
+ /* { dg-final { scan-tree-dump-times "sv.i" 2 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
+@@ -31,4 +31,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
+@@ -39,4 +39,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
+@@ -32,4 +32,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
+@@ -40,4 +40,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
+@@ -38,4 +38,3 @@ int main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
+@@ -56,4 +56,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
+@@ -32,4 +32,3 @@ int main ()
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
+@@ -40,4 +40,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
+@@ -31,4 +31,3 @@ int main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { ! avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-20040816-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-20040816-1.c
+@@ -33,4 +33,3 @@ int main1 ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "Applying if-conversion" 1 "ifcvt" } } */
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-20040816-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-20040816-2.c
+@@ -37,4 +37,3 @@ void foo(const int * __restrict__ zr_in,
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "Applying if-conversion" 1 "ifcvt" } } */
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-4.c
+@@ -51,4 +51,3 @@ create_iso_definition (cpp_reader *pfile, cpp_macro *macro)
+ 
+ /* This cannot be if-converted because the stores are to aggregate types.  */
+ /* { dg-final { scan-tree-dump-times "Applying if-conversion" 0 "ifcvt" } } */
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-5.c
+@@ -21,4 +21,3 @@ dct_unquantize_h263_inter_c (short *block, int n, int qscale, int nCoeffs)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Applying if-conversion" 1 "ifcvt" } } */
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-cd.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ifc-cd.c
+@@ -26,4 +26,3 @@ void foo (int *x1, int *x2, int *x3, int *x4, int *y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Use predicate of bb" 8 "ifcvt" } } */
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-1.c
+@@ -21,5 +21,4 @@ interval foo (interval a, interval b, interval c)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "\\(struct interval\\)" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-10.c
+@@ -36,4 +36,3 @@ main()
+ /* { dg-final { scan-tree-dump-times "do_something3" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "do_something \\(5\\)" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "do_something \\(70\\)" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-11.c
+@@ -11,4 +11,3 @@ void foo()
+   bar();
+ }
+ /* { dg-final { scan-tree-dump-times "function body can be overwritten at link time" 1 "einline" } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-3.c
+@@ -29,4 +29,3 @@ inline_me_too (void)
+ }
+ /* { dg-final { scan-tree-dump-times "Inlining inline_me " 1 "einline"} } */
+ /* { dg-final { scan-tree-dump-times "Inlining inline_me_too " 1 "einline"} } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-4.c
+@@ -24,4 +24,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Inlining get_data_for into main" "einline" } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-5.c
+@@ -36,4 +36,3 @@ test(struct a *a)
+   do_something (a);
+ }
+ /* { dg-final { scan-tree-dump-times "do_inc" 12 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-6.c
+@@ -40,4 +40,3 @@ test(struct a *a)
+   do_something (a);
+ }
+ /* { dg-final { scan-tree-dump-times "do_inc" 12 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-7.c
+@@ -6,4 +6,3 @@ inline void bar0() { foo0(); }
+ void foobar() { bar0(); bar0(); bar0(); }
+ 
+ /* { dg-final { scan-tree-dump "Iterations: 1" "einline" } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-8.c
+@@ -28,4 +28,3 @@ int bar5() { return 0; }
+ int foobar5() { return bar5(); }
+ 
+ /* { dg-final { scan-tree-dump-times "Inlining" 5 "einline" } } */
+-/* { dg-final { cleanup-tree-dump "einline" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline-9.c
+@@ -22,4 +22,3 @@ main()
+ }
+ /* { dg-final { scan-tree-dump-times "q \\(15\\)" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "t \\(20\\)" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline_asm-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline_asm-1.c
+@@ -13,8 +13,6 @@ char f(char *a)
+ 
+ /* test_function should be called twice as the inline-asm changes memory. */
+ /* { dg-final { scan-tree-dump-times "test_function" 2 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ /* There should a VDEF for the inline-asm.  */
+ /* { dg-final { scan-tree-dump-times "VDEF" 1 "alias"} } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/inline_asm-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/inline_asm-2.c
+@@ -15,4 +15,3 @@ void f(char *a)
+ 
+ /* There should a VDEF for the inline-asm and one for the link_error.  */
+ /* { dg-final { scan-tree-dump-times "VDEF" 2 "alias"} } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/integer-addr.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/integer-addr.c
+@@ -26,4 +26,3 @@ int foobar(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "= func" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/interposition.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/interposition.c
+@@ -10,4 +10,3 @@ int q(void)
+   return t();
+ }
+ /* { dg-final { scan-tree-dump-times "return 1" 2 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-cp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-cp-1.c
+@@ -18,4 +18,3 @@ blah ()
+ }
+ /* One appearance for dump, one self recursive call and one call from main.  */
+ /* { dg-final { scan-tree-dump-times "very_long_function.constprop \\(\\)" 3 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-reference-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-reference-1.c
+@@ -12,4 +12,3 @@ int f(void)
+    inlined the 0 as IPA reference should have marked the variable as a const
+    as it is not set in the IR.  */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-1.c
+@@ -30,4 +30,3 @@ test()
+   test2(20);
+ }
+ /* { dg-final { scan-tree-dump-times "Splitting function" 1 "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-2.c
+@@ -41,4 +41,3 @@ main()
+   split_me (5);
+ }
+ /* { dg-final { scan-tree-dump-times "Splitting function" 1 "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-4.c
+@@ -26,4 +26,3 @@ test(void)
+   return split_me (0)+split_me(1)+split_me(2);
+ }
+ /* { dg-final { scan-tree-dump-times "Splitting function" 1 "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
+@@ -33,6 +33,4 @@ test()
+   split_me (val);
+ }
+ /* { dg-final { scan-tree-dump-times "Splitting function" 1 "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+ /* { dg-final { scan-tree-dump "part" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-6.c
+@@ -5,6 +5,4 @@
+ #include "ipa-split-5.c"
+ 
+ /* { dg-final { scan-tree-dump-times "Splitting function" 1 "fnsplit"} } */
+-/* { dg-final { cleanup-tree-dump "fnsplit" } } */
+ /* { dg-final { scan-tree-dump "part" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-1.c
+@@ -53,7 +53,6 @@ d_type (struct d_info *di)
+ /* { dg-final { scan-tree-dump-times "->type = 42" 1 "isolate-paths"} } */
+ /* { dg-final { scan-tree-dump-times "->type ={v} 0" 1 "isolate-paths"} } */
+ /* { dg-final { scan-tree-dump-times "->zzz" 1 "isolate-paths"} } */
+-/* { dg-final { cleanup-tree-dump "isolate-paths" } } */
+ 
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-2.c
+@@ -38,7 +38,5 @@ bar (void)
+    return statement so that it returns &z directly.
+ /* { dg-final { scan-tree-dump-times "__builtin_trap" 2 "isolate-paths"} } */
+ /* { dg-final { scan-tree-dump-times "return &z;" 1 "phicprop1"} } */
+-/* { dg-final { cleanup-tree-dump "isolate-paths" } } */
+-/* { dg-final { cleanup-tree-dump "phicprop1" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-3.c
+@@ -63,6 +63,5 @@ init_alias_analysis (void)
+    started with a PHI, but by the time the path isolation code runs
+    its explicit in the IL.  */
+ /* { dg-final { scan-tree-dump-times "__builtin_trap" 1 "isolate-paths"} } */
+-/* { dg-final { cleanup-tree-dump "isolate-paths" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c
+@@ -27,7 +27,5 @@ bar (void)
+    return statement so that it returns &z directly.
+ /* { dg-final { scan-tree-dump-times "__builtin_trap" 2 "isolate-paths"} } */
+ /* { dg-final { scan-tree-dump-times "foo .&z.;" 1 "phicprop1"} } */
+-/* { dg-final { cleanup-tree-dump "isolate-paths" } } */
+-/* { dg-final { cleanup-tree-dump "phicprop1" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-5.c
+@@ -52,5 +52,3 @@ d_type (struct d_info *di)
+ /* { dg-final { scan-tree-dump-times "->type" 1 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "\\.type" 1 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "->zzz" 1 "isolate-paths"} } */
+-/* { dg-final { cleanup-tree-dump "isolate-paths" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_1.c
+@@ -15,4 +15,3 @@ void foo (int i_width, TYPE dst, TYPE src1, TYPE src2)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "ivtmp.\[0-9_\]* = PHI <" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_2.c
+@@ -14,4 +14,3 @@ void foo (int i_width, TYPE dst, TYPE src1, TYPE src2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ivtmp.\[0-9_\]* = PHI <" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_3.c
+@@ -17,4 +17,3 @@ void foo (int i_width, char* dst, char* src1, char* src2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ivtmp.\[0-9_\]* = PHI <" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_4.c
+@@ -16,4 +16,3 @@ void foo (int i_width, TYPE dst, TYPE src1, TYPE src2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ivtmp.\[0-9_\]* = PHI <" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_infer_1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_infer_1.c
+@@ -22,4 +22,3 @@ void foo (int i_width, TYPE dst, TYPE src1, TYPE src2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_infer_2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_infer_2.c
+@@ -23,4 +23,3 @@ void foo (unsigned int i_width, TYPE dst)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\[^:\]*if \\(.*j_\[0-9\]+.*\\)" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_1.c
+@@ -21,4 +21,3 @@ long foo(long* p, long* p2, int N1, int N2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_2.c
+@@ -22,4 +22,3 @@ long foo(long* p, long* p2, int N1, int N2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing" 2 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_3.c
+@@ -19,4 +19,3 @@ long foo(long* p, long* p2, int N1, int N2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing exit test: if \\(.*p2.*\\)" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopt_mult_4.c
+@@ -22,4 +22,3 @@ long foo(long* p, long* p2, int N1, int N2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing" 0 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-2.c
+@@ -23,4 +23,3 @@ f ()
+ 
+ /* We should only have two IVs.  */
+ /* { dg-final { scan-tree-dump-not "\\n  candidates \\d+, \\d+,\[^\\n\]*\\n\[^\\n\]*\\nFinal cost" "ivopts" } }  */
+-/* { dg-final { cleanup-tree-dump "ivopts" } }  */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-3.c
+@@ -11,4 +11,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "!= 0" 5 "ivopts" } }  */
+-/* { dg-final { cleanup-tree-dump "ivopts" } }  */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lower_base.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lower_base.c
+@@ -58,4 +58,3 @@ sort_pointers (size_t n, void **pointers, void **work)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "base \[^\\n\]*&MEM\\\[" "ivopts" } }  */
+-/* { dg-final { cleanup-tree-dump "ivopts" } }  */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c
+@@ -18,4 +18,3 @@ f1 (int *p, unsigned int i)
+ /* { dg-final { scan-tree-dump-times "PHI" 1 "ivopts" } } */
+ /* { dg-final { scan-tree-dump-times "PHI <p_" 1 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times "p_\[0-9\]* <" 1 "ivopts" } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt.c
+@@ -20,4 +20,3 @@ f1 (char *p, uintptr_t i, uintptr_t n)
+ /* { dg-final { scan-tree-dump-times "PHI" 1 "ivopts" } } */
+ /* { dg-final { scan-tree-dump-times "PHI <p_" 1 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times "p_\[0-9\]* <" 1 "ivopts" } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-1.c
+@@ -35,4 +35,3 @@ void foo (int * __restrict__ ia,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-10.c
+@@ -21,4 +21,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-11.c
+@@ -30,4 +30,3 @@ void foo (int * __restrict__ ia,
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 1 loops and 1 library calls" 1 "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memset zero" 1 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-12.c
+@@ -19,4 +19,3 @@ int foo (int * __restrict__ ia,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 1 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-13.c
+@@ -19,4 +19,3 @@ float foo (int n)
+ /* We should apply loop distribution.  */
+ 
+ /* { dg-final { scan-tree-dump "Loop 1 distributed: split to 2 loops" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-14.c
+@@ -24,4 +24,3 @@ float foo (int n)
+ /* We should apply loop distribution.  */
+ 
+ /* { dg-final { scan-tree-dump "Loop 1 distributed: split to 2 loops" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-15.c
+@@ -20,4 +20,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-not "distributed: split to" "ldist" } } */
+ /* { dg-final { scan-tree-dump-not "__builtin_memset" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-16.c
+@@ -18,4 +18,3 @@ void foo (int n)
+ 
+ /* { dg-final { scan-tree-dump "Loop 1 is the same" "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memset zero" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-17.c
+@@ -47,4 +47,3 @@ mad_synth_mute (struct mad_synth *synth)
+ 
+ /* { dg-final { scan-tree-dump "distributed: split to 0 loops and 4 library calls" "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memset zero" 4 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-18.c
+@@ -9,4 +9,3 @@ void foo (int *p, int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump "generated memset zero" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-19.c
+@@ -68,4 +68,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump-times "generated memset zero" 1 "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memset" 5 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-1a.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-1a.c
+@@ -19,4 +19,3 @@ int foo (int * __restrict__ ia,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-2.c
+@@ -28,4 +28,3 @@ void foo (int * __restrict__ a,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-20.c
+@@ -34,4 +34,3 @@ void my_memmove (unsigned int n)
+ 
+ /* { dg-final { scan-tree-dump-times "generated memcpy" 2 "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memmove" 1 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-21.c
+@@ -9,4 +9,3 @@ void bar(char *p, int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump "generated memmove" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-22.c
+@@ -29,4 +29,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "generated memset zero" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-23.c
+@@ -31,4 +31,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "split to 1 loops and 1 library call" "ldist" } } */
+ /* { dg-final { scan-tree-dump "generated memcpy" "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-3.c
+@@ -31,4 +31,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 3 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-4.c
+@@ -24,4 +24,3 @@ int loop1 (int k)
+    similar memory accesses.  */
+ /* { dg-final { scan-tree-dump "similar memory accesses" "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-5.c
+@@ -30,4 +30,3 @@ int loop1 (int k)
+    problem: the dependence test fails with a "don't know" relation.  */
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 1 "ldist" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-6.c
+@@ -35,4 +35,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-7.c
+@@ -29,4 +29,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-8.c
+@@ -31,4 +31,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-9.c
+@@ -23,4 +23,3 @@ int loop1 (int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "distributed: split to 2 loops" 0 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-pr45948.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ldist-pr45948.c
+@@ -20,4 +20,3 @@ foo (int i, int n)
+ 
+ /* { dg-final { scan-tree-dump "distributed: split to 0 loops and 2 library calls" "ldist" } } */
+ /* { dg-final { scan-tree-dump-times "generated memset zero" 2 "ldist" } } */
+-/* { dg-final { cleanup-tree-dump "ldist" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/leaf.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/leaf.c
+@@ -17,4 +17,3 @@ test (void)
+ }
+ /* { dg-final { scan-tree-dump-times "return 9" 1 "optimized"} } */
+  
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre1.c
+@@ -15,4 +15,3 @@ int foo(int *a, int argc)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre10.c
+@@ -45,5 +45,4 @@ L23:
+   return expr; 
+ } 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre11.c
+@@ -10,5 +10,4 @@ int f(int tt)
+     return g(*t1);
+ } 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre12.c
+@@ -12,4 +12,3 @@ int f(int tt)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre13.c
+@@ -10,4 +10,3 @@ int f(int tt)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre14.c
+@@ -16,4 +16,3 @@ int foo(type *a, int argc)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre15.c
+@@ -16,4 +16,3 @@ int foo(type *a, int argc, int t)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre16.c
+@@ -13,4 +13,3 @@ int foo(type *a, int argc)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre17.c
+@@ -13,4 +13,3 @@ int foo(type *a, int argc)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre18.c
+@@ -13,4 +13,3 @@ int main(type *a, int argc)
+   return d + e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre19.c
+@@ -13,4 +13,3 @@ int foo(type *a, int argc)
+   return e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"  } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre2.c
+@@ -15,4 +15,3 @@ int main(int *a, int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre20.c
+@@ -13,4 +13,3 @@ int foo(type *a, int argc)
+   return e;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"  } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre21.c
+@@ -16,4 +16,3 @@ int main(type *a, int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre22.c
+@@ -16,4 +16,3 @@ int main(type *a, int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre23.c
+@@ -22,4 +22,3 @@ int foo(int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"  } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre24.c
+@@ -21,4 +21,3 @@ int foo(int argc)
+ /* We will move the load of a out of the loop.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre25.c
+@@ -17,4 +17,3 @@ int foo(struct X *a, int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"  } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre3.c
+@@ -21,4 +21,3 @@ int foo(int **a,int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre4.c
+@@ -16,4 +16,3 @@ int main(int *a, int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"  } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre5.c
+@@ -21,4 +21,3 @@ int foo(int argc)
+   return q + a();
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre6.c
+@@ -76,5 +76,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-not "= unexpanded_var_list;" "fre1" } } */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+ /* { dg-final { scan-tree-dump-times "Insertions: 2" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre7.c
+@@ -17,4 +17,3 @@ enormlz (x)
+     }
+ }
+ /* { dg-final { scan-tree-dump-not "Eliminated:" "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loadpre8.c
+@@ -94,4 +94,3 @@ rewrite_add_phi_arguments (basic_block bb)
+     }
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/local-pure-const.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/local-pure-const.c
+@@ -14,4 +14,3 @@ t(int a, int b, int c)
+ }
+ /* { dg-final { scan-tree-dump-times "local memory is OK" 1 "local-pure-const1"} } */
+ /* { dg-final { scan-tree-dump-times "found to be const" 1 "local-pure-const1"} } */
+-/* { dg-final { cleanup-tree-dump "local-pure-const1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-1.c
+@@ -34,11 +34,8 @@ int xxx(void)
+ /* We should be able to find out that the loop iterates four times and unroll it completely.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Added canonical iv to loop 1, 4 iterations" 1 "ivcanon"} } */
+-/* { dg-final { cleanup-tree-dump "ivcanon" } } */
+ /* { dg-final { scan-tree-dump-times "loop with 5 iterations completely unrolled" 1 "cunroll"} } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+ /* { dg-final { scan-tree-dump-times "foo" 5 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ /* Because hppa, ia64 and Windows targets include an external declaration
+    for foo as well as the calls we need to look for something more specific
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-10.c
+@@ -30,4 +30,3 @@ void foo (void)
+ /* { dg-final { scan-tree-dump-times "if " 3 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "bar " 2 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-11.c
+@@ -24,5 +24,4 @@ void foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "if " 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-14.c
+@@ -16,4 +16,3 @@ int bla(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\+ 100" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-15.c
+@@ -24,4 +24,3 @@ int bla(void)
+ 
+ /* The if from the loop header copying remains in the code.  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-16.c
+@@ -21,4 +21,3 @@ void foo(unsigned n)
+ /* { dg-final { scan-tree-dump-times "MEM" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\[^\\n\\r\]*= \\* " 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-17.c
+@@ -16,4 +16,3 @@ int foo (int *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "# of iterations 1, bounded by 1" "sccp" } } */
+-/* { dg-final { cleanup-tree-dump "sccp" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-18.c
+@@ -21,4 +21,3 @@ void foo(unsigned *p, unsigned n)
+ /* { dg-final { scan-tree-dump-times "MEM" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\[^\\n\\r\]*= \\* " 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-19.c
+@@ -25,4 +25,3 @@ void tuned_STREAM_Copy()
+ /* { dg-final { scan-tree-dump-times "MEM.(base: &|symbol: )a," 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "MEM.(base: &|symbol: )c," 2 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-2.c
+@@ -41,4 +41,3 @@ void xxx(void)
+ /* { dg-final { scan-tree-dump-times "= 99" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "< 100" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-20.c
+@@ -24,4 +24,3 @@ gfc_conv_array_transpose (gfc_se * se) {
+ /* Ivopts should not produce multiplication by a pointer constant.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\* \[0-9\]*B;" 0 "ivopts" } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-21.c
+@@ -14,4 +14,3 @@ void foo(int f0, int f1, int e0, int e1)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "~" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-22.c
+@@ -14,4 +14,3 @@ void test (int n)
+    correct, this transformation is obviously harmful.  */
+ 
+ /* { dg-final { scan-tree-dump-times "/" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-23.c
+@@ -26,4 +26,3 @@ int foo(void)
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 4 iterations completely unrolled" 1 "cunroll" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-24.c
+@@ -14,4 +14,3 @@ void foo4(int*a, int*b)
+ { for(;a!=b;a++); }
+ 
+ /* { dg-final { scan-tree-dump-not "if" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-25.c
+@@ -126,4 +126,3 @@ void test5 (void)
+ /* { dg-final { scan-tree-dump-times "3 loops found" 2 "profile_estimate" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "2 loops found" 1 "profile_estimate" { xfail *-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "profile_estimate" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-26.c
+@@ -26,4 +26,3 @@ int foo0(int i0, int i1)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "if" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-28.c
+@@ -19,5 +19,3 @@ void foo(int n)
+ /* There should be no i_a = i_b assignments.  */
+ /* { dg-final { scan-tree-dump-times "i_.*= i_\[0-9\]*;" 0 "aprefetch" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-29.c
+@@ -18,4 +18,3 @@ foo (struct s *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "if" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-3.c
+@@ -27,4 +27,3 @@ void xxx(void)
+ 
+ /* { dg-final { scan-tree-dump-times "int iter" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-31.c
+@@ -18,4 +18,3 @@ short foo (int len, int v)
+ /* { dg-final { scan-tree-dump-times " \\+ 2;" 1 "optimized" { target arm*-*-* } } } */
+ /* { dg-final { scan-tree-dump-times " \\+ 2;" 1 "optimized" { target { ia64-*-* && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump-times " \\+ 2;" 2 "optimized" { target { ia64-*-* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-32.c
+@@ -43,4 +43,3 @@ void test3(struct a *A)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Executing store motion of" 3 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-33.c
+@@ -37,4 +37,3 @@ void test5(struct a *A, unsigned b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Executing store motion of" 4 "lim1" { xfail { lp64 || llp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-34.c
+@@ -18,4 +18,3 @@ void f (int n)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "Executing store motion of r" 6 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-35.c
+@@ -69,4 +69,3 @@ void test4(struct a *A, unsigned LONG b)
+ /* long index not hoisted for avr target PR 36561 */
+ /* { dg-final { scan-tree-dump-times "Executing store motion of" 8 "lim1" { xfail { "avr-*-*" } } } } */
+ /* { dg-final { scan-tree-dump-times "Executing store motion of" 6 "lim1" { target { "avr-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-36.c
+@@ -19,4 +19,3 @@ float foobar () {
+ /* The temporary structure should have been promoted to registers
+    by FRE after the loops have been unrolled by the early unrolling pass.  */
+ /* { dg-final { scan-tree-dump-not "c\.array" "dce2" } } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-37.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-37.c
+@@ -24,4 +24,3 @@ int f1 (int a [])
+ int main() { }
+ 
+ /* { dg-final { scan-tree-dump-not "my_array" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-38.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-38.c
+@@ -16,4 +16,3 @@ t(int n)
+   return sum;
+ }
+ /* { dg-final { scan-tree-dump "Loop 1 iterates at most 11 times" "cunrolli" } } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-39.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-39.c
+@@ -23,4 +23,3 @@ foo (unsigned int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump "# of iterations \[^\n\r]*, bounded by 8" "sccp" } } */
+-/* { dg-final { cleanup-tree-dump "sccp" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-4.c
+@@ -43,4 +43,3 @@ void xxx(void)
+ 
+ /* { dg-final { scan-tree-dump-times "iter" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-40.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-40.c
+@@ -11,4 +11,3 @@ int mymax2(int *it, int *end)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Duplicating header" "ch" } } */
+-/* { dg-final { cleanup-tree-dump "ch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-5.c
+@@ -27,4 +27,3 @@ void xxx(void)
+ 
+ /* { dg-final { scan-tree-dump-times " \\+ 2" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-6.c
+@@ -20,9 +20,7 @@ void xxx(void)
+ /* Loop should be unswitched.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Unswitching loop" 1 "unswitch" } } */
+-/* { dg-final { cleanup-tree-dump "unswitch" } } */
+ 
+ /* In effect there should be exactly three conditional jumps in the final program.  */
+ 
+ /* { dg-final { scan-tree-dump-times "else" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-7.c
+@@ -32,4 +32,3 @@ int xxx (void)
+    with k = 0 may be invalid.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Moving statement" 2 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/loop-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-8.c
+@@ -22,4 +22,3 @@ void xxx (void)
+ /* { dg-final { scan-tree-dump-times "step \\* \[^0-9\]" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\[^0-9\] \\* step" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-bound-1.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
++
++int *a;
++
++int
++foo (unsigned char s, unsigned char l)
++{
++  unsigned char i;
++  int sum = 0;
++
++  for (i = s; i < l; i += 1)
++    {
++      sum += a[i];
++    }
++
++  return sum;
++}
++
++/* Check loop niter bound information.  */
++/* { dg-final { scan-tree-dump "bounded by 254" "ivopts" } } */
++/* { dg-final { scan-tree-dump-not "bounded by 255" "ivopts" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-bound-3.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
++
++int *a;
++
++int
++foo (unsigned char s, unsigned char l)
++{
++  unsigned char i;
++  int sum = 0;
++
++  for (i = s; i > l; i -= 1)
++    {
++      sum += a[i];
++    }
++
++  return sum;
++}
++
++/* Check loop niter bound information.  */
++/* { dg-final { scan-tree-dump "bounded by 254" "ivopts" } } */
++/* { dg-final { scan-tree-dump-not "bounded by 255" "ivopts" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/loop-bound-5.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
++
++int *a;
++
++int
++foo (unsigned char s)
++{
++  unsigned char i;
++  int sum = 0;
++
++  for (i = s; i > 0; i -= 1)
++    {
++      sum += a[i];
++    }
++
++  return sum;
++}
++
++/* Check loop niter bound information.  */
++/* { dg-final { scan-tree-dump "bounded by 254" "ivopts" } } */
++/* { dg-final { scan-tree-dump-not "bounded by 255" "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/negate.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/negate.c
+@@ -24,4 +24,3 @@ int g (int a, int b)
+ 
+ /* There should be an addition now.  */
+ /* { dg-final { scan-tree-dump-times "\\+" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-1.c
+@@ -16,4 +16,3 @@ temp:
+    optimize this before because PHI-OPT did not look at 
+    PHIs which have more than two arguments.  */
+ /* { dg-final { scan-tree-dump-times "if" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-10.c
+@@ -8,4 +8,3 @@ int spaceship1 (long a) { return a > 0 ? 1 : a < 0 ? -1 : 0; }
+ int spaceship2 (long a) { return a > 0 ? 1 : a == 0 ? 0 : -1; }
+ 
+ /* { dg-final { scan-tree-dump-times " = -\[^\r\n\]*_.;" 4 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-11.c
+@@ -22,4 +22,3 @@ int h(int a, int b, int c, int d)
+  return a;
+ }
+ /* { dg-final { scan-tree-dump-times "if" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-12.c
+@@ -20,4 +20,3 @@ unsigned m(unsigned a, unsigned b) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "goto" 2 "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-13.c
+@@ -8,4 +8,3 @@ long f(long a, long b) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "goto " 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-2.c
+@@ -22,4 +22,3 @@ _Bool f1(_Bool a, _Bool b)
+    Test this only when known to be !LOGICAL_OP_NON_SHORT_CIRCUIT,
+    otherwise ifcombine may convert this into return a & b;.  */
+ /* { dg-final { scan-tree-dump-times "if" 1 "optimized" { target { i?86-*-* x86_64-*-* mips*-*-* s390*-*-* avr*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-3.c
+@@ -14,4 +14,3 @@ int f(int a, int b)
+    optimize this before because PHI-OPT did not look at 
+    PHIs which have more than two arguments.  */
+ /* { dg-final { scan-tree-dump-times "if" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-4.c
+@@ -14,4 +14,3 @@ _Bool f1()
+    value of b (except that we don't fold ! (b != 0) into b
+    which means that we miss a sib calling opportunity).  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-5.c
+@@ -56,4 +56,3 @@ float repl3 (float varz, float vara, float varb)
+ 
+ /* { dg-final { scan-tree-dump "if .*varz" "phiopt1"} } */
+ /* { dg-final { scan-tree-dump "vara.*MAX_EXPR" "phiopt1"} } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-6.c
+@@ -10,4 +10,3 @@ int *g(struct C *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "if" "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-7.c
+@@ -19,5 +19,4 @@ int f(int t, int c)
+    a conditional and the other should be there still.  */
+ /* { dg-final { scan-tree-dump-times "if" 1 "optimized" }  }*/
+ /* { dg-final { scan-tree-dump-times "\[^\r\n\]*_. = c_\[0-9\]*.D. != 0" 1 "optimized"  } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-8.c
+@@ -22,5 +22,3 @@ int f(int t, int c)
+ /* { dg-final { scan-tree-dump-not "if" "phiopt1" } } */
+ /* { dg-final { scan-tree-dump "g .t_\[0-9\]*.D.," "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "PHI" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/phi-opt-9.c
+@@ -19,4 +19,3 @@ int f(int t, int c)
+ /* The value e should have been replaced with t and there should be only one PHI. */
+ /* { dg-final { scan-tree-dump "g .t_\[0-9\]*.D.," "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "PHI" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr13146.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr13146.c
+@@ -19,4 +19,3 @@ int foo (struct A *p, struct B *q)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14341.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14341.c
+@@ -14,4 +14,3 @@ void t()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "fn_call \\(1\\)" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-1.c
+@@ -7,5 +7,4 @@ int g(int x)
+ /* There should be only x <= 9 and no x - 10. */
+ /* { dg-final { scan-tree-dump-times "<= 9" 1 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "\\+ -10" 0 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-2.c
+@@ -7,4 +7,3 @@ int g(int x)
+ /* There should be no x >= 9 and one x - 10. */
+ /* { dg-final { scan-tree-dump-times "<= 9" 0 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "\\+ -10" 1 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-3.c
+@@ -7,4 +7,3 @@ int g(int x)
+ /* There should be only x < -10 and no x + 10. */
+ /* { dg-final { scan-tree-dump-times "< -10" 1 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "\\+ 10" 0 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14490-4.c
+@@ -7,4 +7,3 @@ int g(int x)
+ /* There should be no x < -10 and one x + 10. */
+ /* { dg-final { scan-tree-dump-times "< -10" 0 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "\\+ 10" 1 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr14814.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr14814.c
+@@ -19,4 +19,3 @@ int foo(const struct XX* r) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "= &" 0 "forwprop2" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr15349.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr15349.c
+@@ -23,4 +23,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "PHI" 1 "mergephi2"} } */
+-/* { dg-final { cleanup-tree-dump "mergephi2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-3.c
+@@ -10,4 +10,3 @@ int f(int i, unsigned j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-4.c
+@@ -10,4 +10,3 @@ int f(int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 0 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr15791-5.c
+@@ -10,4 +10,3 @@ int foo(int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "i == j" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr16721.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr16721.c
+@@ -13,4 +13,3 @@ int test()
+ 
+ /* The load from p->addr should not disappear.  */
+ /* { dg-final { scan-tree-dump-times "\->addr" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr17141-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr17141-1.c
+@@ -14,4 +14,3 @@ foo(struct A *locp, int str)
+ /* We should have propagated &locp->i into its dereference.  */
+ 
+ /* { dg-final { scan-tree-dump "locp_\[^\\n\]* =" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr17141-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr17141-2.c
+@@ -27,4 +27,3 @@ l2:
+ 
+ /* { dg-final { scan-tree-dump-times "&" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "abort" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr17598.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr17598.c
+@@ -39,4 +39,3 @@ int foobar2(struct g *x)
+ /* { dg-final { scan-tree-dump-times "x == &y" 2 "gimple" } } */
+ /* { dg-final { scan-tree-dump "x->k" "gimple" } } */
+ /* { dg-final { scan-tree-dump "yy.k" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18133-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18133-1.c
+@@ -25,4 +25,3 @@ return;
+    scan for 3 instances of "FALLTHRU".  */
+ 
+ /* { dg-final { scan-tree-dump-times "FALLTHRU" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18133-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18133-2.c
+@@ -40,4 +40,3 @@ bar (int a)
+    computed goto.  */
+ 
+ /* { dg-final { scan-tree-dump-times "ab" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18134.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18134.c
+@@ -23,4 +23,3 @@ return 0;
+    computed gotos.  */
+ 
+ /* { dg-final { scan-tree-dump-times "ab" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-1.c
+@@ -7,4 +7,3 @@ double baz (double x, double y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-10.c
+@@ -8,4 +8,3 @@ double baz (double x, double y, double z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-2.c
+@@ -7,4 +7,3 @@ double baz (double x, double y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-3.c
+@@ -7,4 +7,3 @@ double baz (double x, double y, double z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-4.c
+@@ -7,4 +7,3 @@ double baz (double x, double y, double z, double u)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 6 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-5.c
+@@ -7,4 +7,3 @@ double baz (double x, double y, double z, double u)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 6 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-6.c
+@@ -7,4 +7,3 @@ double baz (double x, double y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-7.c
+@@ -7,4 +7,3 @@ float baz (float x, float y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-8.c
+@@ -7,4 +7,3 @@ long double baz (long double x, long double y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18589-9.c
+@@ -8,4 +8,3 @@ double baz (double x, double y, double z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 6 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr18908.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr18908.c
+@@ -6,4 +6,3 @@ _Bool f3(_Bool *p) { *p ^= 1; }
+ /* We should be able to canonicalize the above to use bitwise not.  */
+ /* { dg-final { scan-tree-dump "~\[^\n\r\]*_.;" "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-not "\\\^ 1" "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19055-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19055-2.c
+@@ -24,4 +24,3 @@ int f4(int a,int b,int c,int d)
+ /* { dg-final { scan-tree-dump-times "\\^" 0 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "~" 4 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "&" 12 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19055.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19055.c
+@@ -20,4 +20,3 @@ int f4(int a,int b)
+ /* { dg-final { scan-tree-dump-times "\\^" 0 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "~" 4 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "&" 4 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19431.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19431.c
+@@ -25,4 +25,3 @@ int f(int k, int i1, int j1)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\[^\r\n\]*_. = PHI <i1_\[^,\]*, j1_\[^>\]*>" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19590.c
+@@ -34,4 +34,3 @@ void vnum_test8(int *data)
+ 
+ /* { dg-final { scan-tree-dump-times "= 0;" 1 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times "= 2;" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } }  */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19633.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19633.c
+@@ -23,4 +23,3 @@ foo (int a, struct T b)
+ /* Make sure that .GLOBAL_VAR is not created when there are no
+    clobbering calls.  */
+ /* { dg-final { scan-tree-dump-times "GLOBAL_VAR" 0 "ssa"} } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-1.c
+@@ -29,4 +29,3 @@ void test4(int b)
+ 
+ /* { dg-final { scan-tree-dump-times "free" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "malloc" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-2.c
+@@ -12,4 +12,3 @@ void test1(void)
+ 
+ /* { dg-final { scan-tree-dump-times "free" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "malloc" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr19831-3.c
+@@ -36,4 +36,3 @@ void test6(void)
+ 
+ /* { dg-final { scan-tree-dump-times "free" 3 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "malloc" 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20139.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20139.c
+@@ -20,4 +20,3 @@ foo (double x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20318.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20318.c
+@@ -15,5 +15,3 @@ void h () {
+ 
+ /* { dg-final { scan-tree-dump-times "== 0" 1 "original" } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate\[^\\n\]*to 0" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20470.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20470.c
+@@ -12,4 +12,3 @@ void f1()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "ABS_EXPR" 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20657.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20657.c
+@@ -15,4 +15,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20701.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20701.c
+@@ -38,4 +38,3 @@ can_combine_p (rtx insn, rtx elt)
+ /* Target with fno-delete-null-pointer-checks should not fold checks */
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 0" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 0" 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr20702.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr20702.c
+@@ -28,4 +28,3 @@ foo (int *p, int b)
+ /* Target with fno-delete-null-pointer-checks should not fold checks */
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21001.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21001.c
+@@ -18,4 +18,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21031.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21031.c
+@@ -17,4 +17,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replaced" 2 "forwprop1" } } */
+-/* { dg-final { cleanup-tree-dump "forwprop1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21086.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21086.c
+@@ -20,5 +20,3 @@ foo (int *p)
+ /* { dg-final { scan-tree-dump-times "Folding predicate " 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-not "b_. =" "dce1" { target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump "b_. =" "dce1" { target { avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "dce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21090.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21090.c
+@@ -20,4 +20,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 1" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21171.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21171.c
+@@ -26,4 +26,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "SVR" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21294.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21294.c
+@@ -20,4 +20,3 @@ foo (struct f *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21417.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21417.c
+@@ -50,5 +50,4 @@ L23:
+    execute the if (expr->common.code != 142) test once per loop
+    iteration.  */
+ /* { dg-final { scan-tree-dump-times "Threaded jump" 1 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21458.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21458.c
+@@ -17,4 +17,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21463.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21463.c
+@@ -17,4 +17,3 @@ int g(int i, int c, struct f *ff, int g)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Inserting PHI for result of load" 1 "phiprop" } } */
+-/* { dg-final { cleanup-tree-dump "phiprop" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21559.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21559.c
+@@ -41,5 +41,4 @@ void foo (void)
+    entering while loop and thread over it.  */
+ /* { dg-final { scan-tree-dump-times "Threaded jump" 3 "vrp1" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21563.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21563.c
+@@ -14,4 +14,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21574.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21574.c
+@@ -10,4 +10,3 @@ foo (int *p)
+ 
+ /* The store to *p should be propagated to the load statement.  */
+ /* { dg-final { scan-tree-dump "Replaced \\\*p_.\\\(D\\\) with 0" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21582.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21582.c
+@@ -28,4 +28,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21658.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21658.c
+@@ -18,4 +18,3 @@ f (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folded into: if " 1 "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21829.c
+@@ -19,4 +19,3 @@ int test(int v)
+ /* This should be unrolled and optimized into conditional set of return value "v < 0".  */
+ 
+ /* { dg-final { scan-tree-dump-not "if \\(" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21959.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21959.c
+@@ -17,4 +17,3 @@ void f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate " 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr21985.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr21985.c
+@@ -31,4 +31,3 @@ main (void)
+ /* Two of the calls to foo should be folded to just foo(constant).  */
+ 
+ /* { dg-final { scan-tree-dump-times "foo \\(\[0-9\]*\\)" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr22026.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr22026.c
+@@ -46,4 +46,3 @@ mult (unsigned x, unsigned y)
+ 
+ /* None of the predicates can be folded in these functions.  */
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr22051-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr22051-1.c
+@@ -18,6 +18,5 @@ foo()
+    are complete so that function pointer canonicalization works on those
+    targets which require it.  */
+ /* { dg-final { scan-tree-dump-times "= \\(void \\(\\*<.*>\\) \\(void\\)\\) p_" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr22051-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr22051-2.c
+@@ -21,5 +21,4 @@ foo()
+    so that we do not try to canonicalize a function pointer for the
+    comparison when no such canonicalization is wanted.  */
+ /* { dg-final { scan-tree-dump-times "r_. = \\(int\\) q" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr22117.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr22117.c
+@@ -22,4 +22,3 @@ foo (int *p, int q)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate r_.* != 0B to 0" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr22321.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr22321.c
+@@ -16,5 +16,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23086.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23086.c
+@@ -32,4 +32,3 @@ int main(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23109.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23109.c
+@@ -31,6 +31,4 @@ int main()
+    this is not wrongly optimized.  */
+ /* { dg-final { scan-tree-dump-not "reciptmp" "lim1" } } */
+ /* { dg-final { scan-tree-dump-not "reciptmp" "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23294.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23294.c
+@@ -34,4 +34,3 @@ int f6(int a, int b)
+ /* { dg-final { scan-tree-dump-times "a_..D. \\\* 5" 3 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\\* 2" 3 "optimized" } } */
+ /* { dg-final { scan-tree-dump-not "\\\* 6" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23401.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23401.c
+@@ -21,4 +21,3 @@ int ffff(int i)
+ 
+ /* { dg-final { scan-tree-dump-times "int" 5 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "int D\\\." 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23455.c
+@@ -27,4 +27,3 @@ bi_windup(unsigned int *outbuf, unsigned int bi_buf)
+    one add involving outcnt and outbuf.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "pre" {target { ! avr-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 4" 1 "pre" {target {   avr-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23744.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23744.c
+@@ -18,4 +18,3 @@ int g (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23777.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23777.c
+@@ -16,4 +16,3 @@ void g (char **o)
+     multilib_exclusions_raw.  */
+ 
+ /* { dg-final { scan-tree-dump-not "multilib_exclusions_raw" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-1.c
+@@ -29,4 +29,3 @@ void foo2 (int size)
+ 
+ /* { dg-final { scan-tree-dump-not "__builtin_stack_save" "optimized"} } */
+ /* { dg-final { scan-tree-dump-not "__builtin_stack_restore" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-2.c
+@@ -22,4 +22,3 @@ void foo (int size)
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_save" 1 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_restore" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-3.c
+@@ -25,4 +25,3 @@ void foo (int size)
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_save" 1 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_restore" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr23848-4.c
+@@ -22,4 +22,3 @@ void foo (int size)
+ 
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_save" 1 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "__builtin_stack_restore" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr24117.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr24117.c
+@@ -23,4 +23,3 @@ void foo(void)
+     link_error ();
+ }
+ /* { dg-final { scan-tree-dump-times "link_error" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr24287.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr24287.c
+@@ -26,4 +26,3 @@ int g(void)
+ }
+ /* We are allowed to optimize the first two link_error calls.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr24689.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr24689.c
+@@ -21,4 +21,3 @@ foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr24990-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr24990-1.c
+@@ -17,5 +17,4 @@ int f1(int x)
+ /* { dg-final { scan-tree-dump-times "== 0" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "== -1" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr25382.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr25382.c
+@@ -16,4 +16,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate b_.* > 300 to 0" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr25485.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr25485.c
+@@ -14,4 +14,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "if" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr25501.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr25501.c
+@@ -33,4 +33,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Removing basic block" 0 "mergephi1"} } */
+-/* { dg-final { cleanup-tree-dump "mergephi1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr26421.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr26421.c
+@@ -19,4 +19,3 @@ int foo(void)
+ /* Verify the call clobbers all of a.  */
+ 
+ /* { dg-final { scan-tree-dump-not "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr26899.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr26899.c
+@@ -6,5 +6,4 @@ int foo (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump "j >= i" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr27236.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr27236.c
+@@ -17,4 +17,3 @@ unsigned int foo(volatile int *mem)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "foo_read" 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr27498.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr27498.c
+@@ -14,4 +14,3 @@ void zconfdump(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "goto" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr27781.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr27781.c
+@@ -14,4 +14,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "func \\(\\);" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr27810.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr27810.c
+@@ -15,4 +15,3 @@ int qqq (int a)
+ 
+ /* { dg-final { scan-tree-dump-times "int" 3 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times "int D\\\." 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr30375.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr30375.c
+@@ -23,4 +23,3 @@ void test_signed_msg_encoding(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "signInfo = {}" 1 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse*" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr30978.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr30978.c
+@@ -14,4 +14,3 @@ int foo(int a)
+ /* One comparison and one extension to int.  */
+ /* { dg-final { scan-tree-dump " = a_..D. > 0;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "e_. = \\\(int\\\)" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr31261.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr31261.c
+@@ -38,4 +38,3 @@ f5 (int e)
+ /* { dg-final { scan-tree-dump-times "return \\(int\\) \\(12 - \\(unsigned int\\) d\\) \& 7;" 1 "original" { target { ! int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "return \\(int\\) \\(12 - \\(unsigned short\\) d\\) \& 7;" 1 "original" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "return 12 - \\(e \& 7\\) \& 15;" 1 "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr31521.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr31521.c
+@@ -17,4 +17,3 @@ int foo(int x) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " = i_.* >> 2" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr32044.c
+@@ -51,4 +51,3 @@ int baz (int n)
+ /* { dg-final { scan-tree-dump-times "/" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "%" 0 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr32821.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr32821.c
+@@ -12,4 +12,3 @@ main1 (int *arr, int n, int a, int b)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "ifcvt" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr32901.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr32901.c
+@@ -27,4 +27,3 @@ void setup_foo(void)
+ /* { dg-final { scan-tree-dump-times "thefoo.* = 1" 1 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "thefoo.* = 5" 1 "gimple"} } */
+ /* { dg-final { scan-tree-dump-times "theotherfoo = volinit" 1 "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr32964.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr32964.c
+@@ -23,4 +23,3 @@ float t(float a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "union" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr33172.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr33172.c
+@@ -39,4 +39,3 @@ void func(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "call_func" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr33723.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr33723.c
+@@ -71,4 +71,3 @@ baz3 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "t = D" "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr34146-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr34146-2.c
+@@ -52,4 +52,3 @@ baz (void)
+ /* { dg-final { scan-tree-dump-not "t = D" "gimple"} } */
+ /* { dg-final { scan-tree-dump-not "t\.c\.h\[12\] = D" "gimple"} } */
+ /* { dg-final { scan-tree-dump-not "\.g\[12\] = D" "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr34146.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr34146.c
+@@ -52,4 +52,3 @@ baz (void)
+ /* { dg-final { scan-tree-dump-not "t = D" "gimple"} } */
+ /* { dg-final { scan-tree-dump-not "t\.c\.h\[12\] = D" "gimple"} } */
+ /* { dg-final { scan-tree-dump-not "\.g\[12\] = D" "gimple"} } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr35286.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr35286.c
+@@ -20,4 +20,3 @@ int foo(int a, int b)
+ /* We will eliminate the g1.a from the return statement as fully redundant,
+    and remove one calculation of a + b. */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr35287.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr35287.c
+@@ -12,4 +12,3 @@ int foo(int p)
+ 
+ /* We will eliminate one load of gp and one indirect load of *gp. */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr36326.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr36326.c
+@@ -10,4 +10,3 @@ int foo (union X *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "x.0" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr36881.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr36881.c
+@@ -23,4 +23,3 @@ const char *foo (int i)
+ 
+ /* { dg-final { scan-assembler-not "CSWTCH" } } */
+ /* { dg-final { scan-tree-dump "need runtime relocations" "switchconv" } } */
+-/* { dg-final { cleanup-tree-dump "switchconv" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr37508.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr37508.c
+@@ -45,4 +45,3 @@ int test4 (struct foo2 *x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding" 3 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr38533.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr38533.c
+@@ -27,4 +27,3 @@ main (void)
+    be exactly 2 (first) __asm__ stmts with no intervening stmts,
+    all others should have some bitwise or in between.  */
+ /* { dg-final { scan-tree-dump-times "__asm__\[^;\n]*;\n *__asm__" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr38699.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr38699.c
+@@ -78,4 +78,3 @@ void makeUseOfTimerWait( unsigned char val ) {
+ /* We should not inline the delay loops.  */
+ /* { dg-final { scan-tree-dump "delay_wait_us" "optimized"} } */
+ /* { dg-final { scan-tree-dump "delay_wait_us_ms" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr38895.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr38895.c
+@@ -21,4 +21,3 @@ int foo(struct C *c, struct B *b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr41469-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr41469-1.c
+@@ -13,4 +13,3 @@ bf (void)
+ 
+ /* { dg-final { scan-tree-dump-not "__builtin_stack_save" "optimized"} } */
+ /* { dg-final { scan-tree-dump-not "__builtin_stack_restore" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr42585.c
+@@ -37,4 +37,3 @@ Cyc_string_ungetc (int ignore, struct _fat_ptr *sptr)
+    not take place when using small values for MOVE_RATIO.  */
+ /* { dg-final { scan-tree-dump-times "struct _fat_ptr _ans" 0 "optimized" { target { ! "aarch64*-*-* alpha*-*-* arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+ /* { dg-final { scan-tree-dump-times "struct _fat_ptr _T2" 0 "optimized" { target { ! "aarch64*-*-* alpha*-*-* arm*-*-* avr-*-* nds32*-*-* powerpc*-*-* s390*-*-* sh*-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr42893.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr42893.c
+@@ -26,5 +26,4 @@ tui_registers_changed_hook (void)
+ /* No references to tui_refreshing_registers should remain.  */
+ /* { dg-final { scan-tree-dump-not "tui_refreshing_registers" "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr43378.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr43378.c
+@@ -14,4 +14,3 @@ void foo (int left, int rite, int element)
+ 
+ /* { dg-final { scan-tree-dump-times "rite_\[0-9\]* = rite_\[0-9\]* - element" 1 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times "left_\[0-9\]* = left_\[0-9\]* \\+ element|left_\[0-9\]* = element_\[0-9\]*\\(D\\) \\+ left" 1 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr43491.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr43491.c
+@@ -39,4 +39,3 @@ long foo(long data, long v)
+    a single assignment.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre" { target { arm*-*-* i?86-*-* mips*-*-* x86_64-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "pre" { target { ! { arm*-*-* i?86-*-* mips*-*-* x86_64-*-* } } } } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr44258.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr44258.c
+@@ -42,4 +42,3 @@ int foo (int b)
+ /* Epiphany has struct alignment/padding that avoids the overlap of
+    str.b1 and val.b2.  */
+ /* { dg-final { scan-tree-dump-times "Created a replacement" 0 "esra" { target { ! "epiphany-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr44423.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr44423.c
+@@ -44,4 +44,3 @@ int main()
+   }
+ 
+ /* { dg-final { scan-tree-dump-times "Created a replacement" 0 "esra"} } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr45144.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr45144.c
+@@ -44,4 +44,3 @@ bar (unsigned orig, unsigned *new)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "unnamed-unsigned:19" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr45427.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr45427.c
+@@ -26,4 +26,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "bounded by 0x0\[^0-9a-f\]" 0 "cunrolli"} } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c
+@@ -17,4 +17,3 @@ void testcase(void)
+    to globals and thus the store not optimized away.  */
+ 
+ /* { dg-final { scan-tree-dump "->preempt_count =" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr47392.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr47392.c
+@@ -39,4 +39,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Eliminated: 1" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr47477.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr47477.c
+@@ -17,6 +17,5 @@ toto_t add (toto_t a, toto_t b) {
+ /* { dg-final { scan-tree-dump-times "= \\(int\\)" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= \\(unsigned int\\)" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= \\(struct toto_s \\*\\)" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49039.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49039.c
+@@ -28,4 +28,3 @@ foo (unsigned int x, unsigned int y)
+ /* { dg-final { scan-tree-dump "Folding predicate minv_\[0-9\]* == 6 to 0" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "Folding predicate maxv_\[0-9\]* == 5 to 0" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "Folding predicate maxv_\[0-9\]* == 6 to 0" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642-1.c
+@@ -48,4 +48,3 @@ int y(struct ehca_shca *shca)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "____ilog2_NaN" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49642-2.c
+@@ -50,4 +50,3 @@ int y(struct ehca_shca *shca)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "____ilog2_NaN" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49671-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49671-1.c
+@@ -12,6 +12,5 @@ void f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\{v\}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr49671-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr49671-2.c
+@@ -12,6 +12,5 @@ void f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\{v\}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr52631.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr52631.c
+@@ -14,5 +14,4 @@ unsigned f(unsigned a)
+ /* We want to verify that we replace the b & 1 with b.  */
+ /* { dg-final { scan-tree-dump-times "Replaced b_\[0-9\]+ & 1 with b_\[0-9\]+ in" 1 "fre1"} } */
+  
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr54245.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr54245.c
+@@ -46,4 +46,3 @@ int main(void)
+    take place in a smaller type than originally.  This test may be deleted
+    in future when this case is handled more precisely.  */
+ /* { dg-final { scan-tree-dump-times "Inserting initializer" 0 "slsr" { target { ! int16 } } } } */
+-/* { dg-final { cleanup-tree-dump "slsr" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr55579.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr55579.c
+@@ -12,4 +12,3 @@ foo (int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Created a debug-only replacement for s" "esra" } } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr57361.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr57361.c
+@@ -7,4 +7,3 @@ void f (struct A *a) {
+ }
+ 
+ /* { dg-final { scan-tree-dump "Deleted dead store" "dse1"} } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr58480.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr58480.c
+@@ -16,4 +16,3 @@ void g2 (void*p, void*q){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate\[^\\n\]*to 0" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr58958.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr58958.c
+@@ -9,4 +9,3 @@ int f(int n){
+ }
+ 
+ /* { dg-final { scan-tree-dump " == 9" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr59597.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr59597.c
+@@ -55,5 +55,4 @@ main (int argc, char argv[])
+ }
+ 
+ /* { dg-final { scan-tree-dump "Cancelling" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr61144.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr61144.c
+@@ -6,4 +6,3 @@ static int dummy = 0;
+ extern int foo __attribute__((__weak__, __alias__("dummy")));
+ int bar() { if (foo) return 1; return 0; }
+ /* { dg-final { scan-tree-dump-not "return 0" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr61607.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr61607.c
+@@ -25,5 +25,4 @@ void f2(int dst[3], int R)
+    the second conditional after the loop.  */
+ /* { dg-final { scan-tree-dump-times "if" 2 "dom1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr61743-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr61743-1.c
+@@ -50,4 +50,3 @@ int foo1 (e_u8 a[4][N], int b1, int b2, e_u8 b[M+1][4][N])
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 4 iterations completely unrolled" 2 "cunroll" } } */
+ /* { dg-final { scan-tree-dump-times "loop with 8 iterations completely unrolled" 2 "cunroll" } } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr61743-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr61743-2.c
+@@ -50,4 +50,3 @@ int foo1 (e_u8 a[4][N], int b1, int b2, e_u8 b[M+1][4][N])
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 4 iterations completely unrolled" 2 "cunroll" } } */
+ /* { dg-final { scan-tree-dump-times "loop with 8 iterations completely unrolled" 2 "cunroll" } } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr62112-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr62112-1.c
+@@ -20,4 +20,3 @@ char*i(){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead call" 4 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr62112-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr62112-2.c
+@@ -14,4 +14,3 @@ void h(){
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "Deleted dead" "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr64130.c
+@@ -0,0 +1,18 @@
++
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-vrp1" } */
++
++int funsigned (unsigned a)
++{
++  return 0x1ffffffffL / a == 0;
++}
++
++int funsigned2 (unsigned a)
++{
++  if (a < 1) return 1;
++  return (-1 * 0x1ffffffffL) / a == 0;
++}
++
++/* { dg-final { scan-tree-dump ": \\\[2, 8589934591\\\]" "vrp1" } } */
++/* { dg-final { scan-tree-dump ": \\\[-8589934591, -2\\\]" "vrp1" } } */
++
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr64183.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr64183.c
+@@ -18,4 +18,3 @@ test ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Loop 2 iterates at most 4 times" "cunroll"} } */
+-/* { dg-final { cleanup-tree-dump "cunroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr64705.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr64705.c
+@@ -24,4 +24,3 @@ int foo(char *flags, long len, long i, long steps)
+ /* Don't expand iv {base+step, step}_loop into {base+x+y, step}_loop
+    even if "step == x + y".  */
+ /* { dg-final { scan-tree-dump "base step_\[0-9\]* \\+ iter|base iter_\[0-9\]* \\+ step" "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr64801.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr64801.c
+@@ -18,4 +18,3 @@ psmouse_extensions (void)
+   a = b ();
+ }
+ /* { dg-final { scan-tree-dump-not "fsp_detect" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pr65136.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr65136.c
+@@ -13,4 +13,3 @@ int foo(unsigned int cc )
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "_\[0-9\]* = 1;" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr65447.c
+@@ -0,0 +1,53 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-ivopts-details" } */
++
++void foo (double *p)
++{
++  int i;
++  for (i = -20000; i < 200000; i+= 40)
++    {
++      p[i+0] = 1.0;
++      p[i+1] = 1.0;
++      p[i+2] = 1.0;
++      p[i+3] = 1.0;
++      p[i+4] = 1.0;
++      p[i+5] = 1.0;
++      p[i+6] = 1.0;
++      p[i+7] = 1.0;
++      p[i+8] = 1.0;
++      p[i+9] = 1.0;
++      p[i+10] = 1.0;
++      p[i+11] = 1.0;
++      p[i+12] = 1.0;
++      p[i+13] = 1.0;
++      p[i+14] = 1.0;
++      p[i+15] = 1.0;
++      p[i+16] = 1.0;
++      p[i+17] = 1.0;
++      p[i+18] = 1.0;
++      p[i+19] = 1.0;
++      p[i+20] = 1.0;
++      p[i+21] = 1.0;
++      p[i+22] = 1.0;
++      p[i+23] = 1.0;
++      p[i+24] = 1.0;
++      p[i+25] = 1.0;
++      p[i+26] = 1.0;
++      p[i+27] = 1.0;
++      p[i+28] = 1.0;
++      p[i+29] = 1.0;
++      p[i+30] = 1.0;
++      p[i+31] = 1.0;
++      p[i+32] = 1.0;
++      p[i+33] = 1.0;
++      p[i+34] = 1.0;
++      p[i+35] = 1.0;
++      p[i+36] = 1.0;
++      p[i+37] = 1.0;
++      p[i+38] = 1.0;
++      p[i+39] = 1.0;
++    }
++}
++
++/* We should groups address type IV uses.  */
++/* { dg-final { scan-tree-dump-not "\\nuse 2\\n" "ivopts" } }  */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr66726-2.c
+@@ -0,0 +1,19 @@
++
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-phiopt1-details" } */
++
++extern void bar (char, char);
++int
++foo (char b)
++{
++  char a;
++  a = b;
++  b = 'b';
++  bar (a, b);
++  b = a;
++  if (b == 0)
++    a++;
++  return a + b;
++}
++
++/* { dg-final { scan-tree-dump-times "factor conversion out" 0 "phiopt1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pr66726.c
+@@ -0,0 +1,15 @@
++
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-phiopt1-details" } */
++
++extern unsigned short mode_size[];
++
++int
++oof (int mode)
++{
++  return (64 < mode_size[mode] ? 64 : mode_size[mode]);
++}
++
++/* { dg-final { scan-tree-dump-times "factor conversion out" 1 "phiopt1" } } */
++/* { dg-final { scan-tree-dump-times "MIN_EXPR" 1 "phiopt1" } } */
++
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-1.c
+@@ -48,4 +48,3 @@ int main(void)
+ /* Also check that we undid the transformation previously made by PRE.  */
+ /* { dg-final { scan-tree-dump-times "looparound ref" 1 "pcom"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c
+@@ -44,4 +44,3 @@ int main(void)
+ 
+ /* Verify that both loops were transformed and unrolled.  */
+ /* { dg-final { scan-tree-dump-times "Unrolling 2 times." 2 "pcom"} } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-3.c
+@@ -13,4 +13,3 @@ void test(void)
+ 
+ /* Verify that we used 3 temporary variables for the loop.  */
+ /* { dg-final { scan-tree-dump-times "Unrolling 3 times." 1 "pcom"} } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c
+@@ -27,4 +27,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "Combination" 1 "pcom"} } */
+ /* { dg-final { scan-tree-dump-times "Unrolling 3 times." 1 "pcom"} } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c
+@@ -27,4 +27,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "Combination" 2 "pcom"} } */
+ /* { dg-final { scan-tree-dump-times "Unrolling 3 times." 1 "pcom"} } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/predcom-7.c
+@@ -15,4 +15,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } } */
+-/* { dg-final { cleanup-tree-dump "pcom" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-3.c
+@@ -19,4 +19,3 @@ double test(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "unroll factor 4" 1 "aprefetch" } } */
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-4.c
+@@ -14,4 +14,3 @@ void foo (int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "prefetch" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-5.c
+@@ -56,4 +56,3 @@ int loop5 (int n, struct tail5 *x)
+ 
+ /* { dg-final { scan-tree-dump-times "Issued prefetch" 2 "aprefetch" } } */
+ /* { dg-final { scan-tree-dump-times "Not prefetching" 1 "aprefetch" } } */
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-6.c
+@@ -51,4 +51,3 @@ double test(void)
+ /* { dg-final { scan-assembler-times "prefetcht" 5 } } */
+ /* { dg-final { scan-assembler-times "prefetchnta" 3 } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-7.c
+@@ -44,5 +44,3 @@ void test(int *p)
+ /* { dg-final { scan-assembler-times "prefetcht" 1 } } */
+ /* { dg-final { scan-assembler-times "prefetchnta" 1 } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-8.c
+@@ -23,5 +23,3 @@ void test()
+ /* { dg-final { scan-assembler "movnti" } } */
+ /* { dg-final { scan-assembler-times "mfence" 1 } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/prefetch-9.c
+@@ -27,5 +27,3 @@ void test()
+ /* { dg-final { scan-assembler "movnti" } } */
+ /* { dg-final { scan-assembler-times "mfence" 1 } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-callused.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-callused.c
+@@ -23,5 +23,4 @@ int bar (int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "CALLUSED = { ESCAPED NONLOCAL f.* i q }" "alias" } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-1.c
+@@ -35,4 +35,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "ESCAPED = { NULL ESCAPED NONLOCAL x }" "alias" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump "ESCAPED = { ESCAPED NONLOCAL x }" "alias" { target { keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-2.c
+@@ -36,4 +36,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "ESCAPED = { NULL ESCAPED NONLOCAL x }" "alias" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump "ESCAPED = { ESCAPED NONLOCAL x }" "alias" { target { keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-escape-3.c
+@@ -40,4 +40,3 @@ int main()
+ 
+ /* { dg-final { scan-tree-dump "ESCAPED = { NULL ESCAPED NONLOCAL x }" "alias" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump "ESCAPED = { ESCAPED NONLOCAL x }" "alias" { target { keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-fp.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-fp.c
+@@ -23,4 +23,3 @@ double f(double a)
+ /* The points-to set of the final function pointer should be "sin cos" */
+ 
+ /* { dg-final { scan-tree-dump-times "{ sin cos }" 1 "alias"} } */
+-/* { dg-final { cleanup-tree-dump "alias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-ptrarith-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-ptrarith-1.c
+@@ -23,4 +23,3 @@ foo(int i, int j, int k, int off)
+ }
+ 
+ /* { dg-final { scan-tree-dump "q_. = { k }" "ealias" } } */
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/pta-ptrarith-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/pta-ptrarith-2.c
+@@ -23,4 +23,3 @@ foo(int i, int j, int k, int off)
+ }
+ 
+ /* { dg-final { scan-tree-dump "q_. = { i }" "ealias" } } */
+-/* { dg-final { cleanup-tree-dump "ealias" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-1.c
+@@ -21,4 +21,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "b.._. \\\+ a.._." 1 "optimized" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times " \\\+ " 2 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-10.c
+@@ -8,4 +8,3 @@ int main(int a, int b, int c, int d)
+   return e & f;
+ }
+ /* { dg-final { scan-tree-dump-times "\\\& " 3 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-11.c
+@@ -8,4 +8,3 @@ int main(int a, int b, int c, int d)
+   return e ^ f;
+ }
+ /* { dg-final { scan-tree-dump-times "= 0" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-12.c
+@@ -8,4 +8,3 @@ int f(int a, int b)
+   return d;
+ }
+ /* { dg-final { scan-tree-dump-times "Equivalence:" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-13.c
+@@ -11,5 +11,3 @@ double foo(double a)
+ 
+ /* { dg-final { scan-tree-dump-not "\\\+ 0.0" "reassoc1" } } */
+ /* { dg-final { scan-tree-dump "return a_..D.;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-14.c
+@@ -22,4 +22,3 @@ unsigned int test2 (unsigned int x, unsigned int y, unsigned int z,
+ /* There should be one multiplication left in test1 and three in test2.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*" 4 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-15.c
+@@ -18,4 +18,3 @@ unsigned int test3 (unsigned int x, unsigned int y, unsigned int z,
+    ???  This pattern is not recognized currently.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*" 4 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-16.c
+@@ -13,4 +13,3 @@ double test1 (double x, double y, double z, double weight)
+    be gone.  */
+ 
+ /* { dg-final { scan-tree-dump-times "/" 1 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-17.c
+@@ -13,4 +13,3 @@ double test2 (double x, double y, double ddj, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "/" 1 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-18.c
+@@ -9,4 +9,3 @@ ETree_nFactorEntriesInFront (unsigned int b, unsigned int m)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*" 2 "reassoc1" } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-19.c
+@@ -19,4 +19,3 @@ void foo(char* left, char* rite, int element)
+ /* { dg-final { scan-tree-dump-times "= \\\(sizetype\\\) element" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= -" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\\+ " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-2.c
+@@ -17,4 +17,3 @@ int b0, b1, b2, b3, b4,e;
+ /* We can't reassociate the expressions due to undefined signed overflow.  */
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-20.c
+@@ -17,4 +17,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "\[ab\].._. \\\+ \[ab\].._." 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\\+ " 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-21.c
+@@ -16,4 +16,3 @@ unsigned int f (unsigned int a0, unsigned int a1, unsigned int a2,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-22.c
+@@ -10,4 +10,3 @@ unsigned int foo(unsigned int a, unsigned int b, unsigned int c, unsigned int d)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\+ 8" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-23.c
+@@ -14,4 +14,3 @@ foo(unsigned int a, unsigned int b, unsigned int c, unsigned int d,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "= 20" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-24.c
+@@ -22,4 +22,3 @@ foo (void)
+ /* Verify there are two pairs of __asm__ statements with no
+    intervening stmts.  */
+ /* { dg-final { scan-tree-dump-times "__asm__\[^;\n]*;\n *__asm__" 2 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-25.c
+@@ -16,4 +16,3 @@ foo (int a, int b, int c, int d)
+ 
+ /* Verify reassociation width was chosen to be 2.  */
+ /* { dg-final { scan-tree-dump-times "Width = 2" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-27.c
+@@ -8,4 +8,3 @@ double baz (double foo, double bar)
+ 
+ /* We should re-associate this as (foo * bar)**3.  */
+ /* { dg-final { scan-tree-dump-times " \\\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
+@@ -26,4 +26,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests .* 26" 1 "reassoc1"} }*/
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
+@@ -24,4 +24,3 @@ main ()
+   return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests" 3 "reassoc1"} }*/
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
+@@ -21,4 +21,3 @@ int main ()
+   return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
+@@ -23,4 +23,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
+@@ -22,4 +22,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Optimizing range tests" 1 "reassoc1"} }*/
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-37.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-37.c
+@@ -14,4 +14,3 @@ foo (int x)
+ /* Check if the tests have been folded into a bit test.  */
+ /* { dg-final { scan-tree-dump "(8784908|0x0*860c0c)" "optimized" { target i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump "(<<|>>)" "optimized" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-38.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-38.c
+@@ -15,4 +15,3 @@ foo (int x)
+ /* Check if the tests have been folded into a bit test.  */
+ /* { dg-final { scan-tree-dump "(614180323407|0x0*8f0000004f)" "optimized" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+ /* { dg-final { scan-tree-dump "(<<|>>)" "optimized" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 } } } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-4.c
+@@ -15,4 +15,3 @@ int main(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\+" 2 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-5.c
+@@ -14,4 +14,3 @@ int main(int argc, int b)
+     }
+ }
+ /* { dg-final { scan-tree-dump-times "a - i" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-6.c
+@@ -12,4 +12,3 @@ int main(int a, int b, int c, int d)
+ /* We cannot re-associate the additions due to undefined signed overflow.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\\+ 8" 1 "reassoc1" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-7.c
+@@ -13,4 +13,3 @@ foo(unsigned int a, unsigned int b, unsigned int c, unsigned int d,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\+ 15" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-8.c
+@@ -10,4 +10,3 @@ int main(int a, int b, int c, int d, int e, int f, int g, int h)
+   return e;
+ }
+ /* { dg-final { scan-tree-dump-times "= 0" 1 "reassoc1"} } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/reassoc-9.c
+@@ -15,4 +15,3 @@ int main(int a, int b, int c, int d, int e, int f, int g, int h)
+    implementation does not allow easy roll-back without IL changes.  */
+ 
+ /* { dg-final { scan-tree-dump-times "= 20" 1 "reassoc1" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "reassoc1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-1.c
+@@ -11,4 +11,3 @@ float e(float *x, float *y, float *z)
+ 
+ /* Look for only one division.  */
+ /* { dg-final { scan-tree-dump-times "= .* /" 1 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-2.c
+@@ -32,4 +32,3 @@ void e(float a, float b, float c, float d, float e, float f)
+ 
+ /* { dg-final { scan-tree-dump-times " / " 2 "recip" } } */
+ /* { dg-final { scan-tree-dump-times " \\* " 5 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-3.c
+@@ -24,4 +24,3 @@ float h ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " / " 1 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-4.c
+@@ -42,4 +42,3 @@ float g ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "reciptmp" "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-5.c
+@@ -27,6 +27,4 @@ double f1(double y, double z, double w, double j, double k)
+ 
+ /* { dg-final { scan-tree-dump-times " / " 3 "recip" } } */
+ /* { dg-final { scan-tree-dump-times " / " 2 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-6.c
+@@ -26,5 +26,4 @@ void f1(double y, double z, double w)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " / " 1 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/recip-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/recip-7.c
+@@ -27,5 +27,4 @@ void f(int x, double z, double w)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " / " 1 "recip" } } */
+-/* { dg-final { cleanup-tree-dump "recip" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-3.c
+@@ -15,4 +15,3 @@ void f(int * __restrict__ r,
+ /* We should apply store motion to the store to *r.  */
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion of \\\*r" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-4.c
+@@ -23,4 +23,3 @@ bar (int *x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1;" 2 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/restrict-5.c
+@@ -21,4 +21,3 @@ void g(int *r, int a[16][16], int b[16][16], int i, int j)
+ /* We should apply store motion to the store to *r.  */
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion of \\\*r" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sccp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sccp-1.c
+@@ -12,4 +12,3 @@ int main(int argc, char* argv[])
+ /* There should be no loop left.  */
+ 
+ /* { dg-final { scan-tree-dump-times "goto" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-3.c
+@@ -16,4 +16,3 @@ f(int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "&a" 1 "optimized" { xfail { lp64 || llp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-4.c
+@@ -21,4 +21,3 @@ f(int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "&a" 1 "optimized" { xfail { lp64 || llp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-5.c
+@@ -16,4 +16,3 @@ f(int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "&a" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-6.c
+@@ -20,4 +20,3 @@ int main()
+    of the loop.  */
+ 
+ /* { dg-final { scan-tree-dump-not "abort" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-7.c
+@@ -15,4 +15,3 @@ void foo (struct struct_t* sp, int start, int end)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Simplify PEELED_CHREC into POLYNOMIAL_CHREC" 1 "sccp" } } */
+-/* { dg-final { cleanup-tree-dump "sccp" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/scev-cast.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/scev-cast.c
+@@ -25,4 +25,3 @@ void tst(void)
+ /* { dg-final { scan-tree-dump-times "& 255" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "= \\(signed char\\)" 1 "optimized" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-1.c
+@@ -19,4 +19,3 @@ f (int *p, unsigned int n)
+ /* { dg-final { scan-tree-dump-times "\\+ 32|\\, 32>" 1 "optimized" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 192|\\, 192>" 1 "optimized" { target { int32 } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 96|\\, 96>" 1 "optimized" { target { int16 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-10.c
+@@ -20,4 +20,3 @@ f (int s, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-11.c
+@@ -21,4 +21,3 @@ f (int s, long c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-12.c
+@@ -27,4 +27,3 @@ f (int s, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-13.c
+@@ -22,4 +22,3 @@ f (int s, int c)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* 4" 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 5" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-14.c
+@@ -29,4 +29,3 @@ f (int n, int c, int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-15.c
+@@ -24,4 +24,3 @@ f (int n, int c, int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-16.c
+@@ -25,4 +25,3 @@ f (int n, int c, int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-17.c
+@@ -28,4 +28,3 @@ f (int n, int c, int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-18.c
+@@ -29,4 +29,3 @@ f (int n, int c, int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-19.c
+@@ -18,5 +18,4 @@ f (int c, int s)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 2 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 2;" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-2.c
+@@ -15,4 +15,3 @@ f (int *p, int n)
+ /* { dg-final { scan-tree-dump-times "\\+ 72|\\, 72>" 1 "optimized" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 96|\\, 96>" 1 "optimized" { target { int32 } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 48|\\, 48>" 1 "optimized" { target { int16 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-20.c
+@@ -18,4 +18,3 @@ f (int c, int s)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* s" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 2" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-21.c
+@@ -29,4 +29,3 @@ f (int n, int x, int stride)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* stride" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 3" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-22.c
+@@ -26,4 +26,3 @@ f (int n, int x, int stride)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* stride" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 3" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-23.c
+@@ -26,4 +26,3 @@ f (int n, int x, int stride)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* stride" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 3" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-24.c
+@@ -28,4 +28,3 @@ f (int n, int x, int stride)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-25.c
+@@ -28,4 +28,3 @@ f (int n, int x, int stride)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-26.c
+@@ -29,4 +29,3 @@ f (int n, int x, int stride)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* stride" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 3" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-27.c
+@@ -20,4 +20,3 @@ f (struct x *p, unsigned int n)
+ /* { dg-final { scan-tree-dump-times "\\* 2;" 1 "dom2" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "p_\\d\+\\(D\\) \\+ \[^\r\n\]*_\\d\+;" 1 "dom2" } } */
+ /* { dg-final { scan-tree-dump-times "MEM\\\[\\(struct x \\*\\)\[^\r\n\]*_\\d\+" 3 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-28.c
+@@ -24,4 +24,3 @@ f (struct x *p, unsigned int n)
+ /* { dg-final { scan-tree-dump-times "\\* 2;" 1 "dom2" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "p_\\d\+\\(D\\) \\+ \[^\r\n\]*_\\d\+" 1 "dom2" } } */
+ /* { dg-final { scan-tree-dump-times "MEM\\\[\\(struct x \\*\\)\[^\r\n\]*_\\d\+" 9 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-29.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-29.c
+@@ -26,4 +26,3 @@ f (struct x *p, unsigned int n)
+ /* { dg-final { scan-tree-dump-times "\\* 2;" 1 "dom2" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "p_\\d\+\\(D\\) \\+ \[^\r\n\]*_\\d\+" 1 "dom2" } } */
+ /* { dg-final { scan-tree-dump-times "MEM\\\[\\(struct x \\*\\)\[^\r\n\]*_\\d\+" 9 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-3.c
+@@ -22,4 +22,3 @@ foo (int a[], int b[], int i)
+ /* { dg-final { scan-tree-dump-times "\\+ 8|\\, 8>" 1 "optimized" { target { int32plus } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 6|\\, 6>" 1 "optimized" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 12|\\, 12>" 1 "optimized" { target { int32 } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-30.c
+@@ -21,4 +21,3 @@ f (int s, long c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 3 "dom2" } } */
+-/* { dg-final { cleanup-tree-dump "dom2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-31.c
+@@ -24,4 +24,3 @@ f (int s, int c)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* 2" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* -2" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-32.c
+@@ -29,4 +29,3 @@ f (int s, int c, int i)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* s" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 2" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-33.c
+@@ -28,4 +28,3 @@ f (int c, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-34.c
+@@ -40,4 +40,3 @@ f (int c, int i)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "PHI" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-35.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-35.c
+@@ -25,4 +25,3 @@ f (int c, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-36.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-36.c
+@@ -26,4 +26,3 @@ f (int s, int c, int i)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* s" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 2" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-37.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-37.c
+@@ -30,4 +30,3 @@ f (int s, int c, int i)
+ 
+ /* { dg-final { scan-tree-dump-times " \\* s" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times " \\* 2" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-38.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-38.c
+@@ -29,4 +29,3 @@ f (int c, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-39.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-39.c
+@@ -23,4 +23,3 @@ void foo (arr_2 a2, int v1)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing reference: " 4 "slsr" } } */
+-/* { dg-final { cleanup-tree-dump "slsr" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-4.c
+@@ -33,5 +33,3 @@ f (int i)
+ /* { dg-final { scan-tree-dump-times "\\* 10" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 200" 1 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "\\+ 40" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "slsr" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-41.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-41.c
+@@ -21,4 +21,3 @@ void foo (arr_2 a2, int v1)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Replacing reference: " 5 "slsr" } } */
+-/* { dg-final { cleanup-tree-dump "slsr" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-5.c
+@@ -19,4 +19,3 @@ f (int s, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-6.c
+@@ -22,4 +22,3 @@ f (int s, char *c, char *x1, char *x2, char *x3)
+ 
+ /* There will be four ' * ' instances for the parms, one in the code.  */
+ /* { dg-final { scan-tree-dump-times " \\* " 5 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-7.c
+@@ -19,4 +19,3 @@ f (int s, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-8.c
+@@ -21,4 +21,3 @@ f (int s, int *c)
+    added), 1 parm, 2 in the code.  The second one in the code can be
+    a widening mult.  */
+ /* { dg-final { scan-tree-dump-times " w?\\* " 7 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/slsr-9.c
+@@ -20,4 +20,3 @@ f (int s, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " \\* " 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-1.c
+@@ -72,4 +72,3 @@ copystruct111111 (teststruct param)
+ 
+ /* There should be no referenc to link_error. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-10.c
+@@ -16,4 +16,3 @@ void foo (struct S *s, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "disappear" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-11.c
+@@ -30,4 +30,3 @@ int foo2 (void)
+ 
+ /* { dg-final { scan-tree-dump-times "Created a replacement for s1" 0 "esra"} } */
+ /* { dg-final { scan-tree-dump-times "Created a replacement for s2" 1 "esra"} } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-12.c
+@@ -1,7 +1,6 @@
+ /* Verify that SRA total scalarization will not be confused by padding.  */
+-/* Test skipped for targets with small (often default) MOVE_RATIO.  */
+ /* { dg-do compile } */
+-/* { dg-options "-O1 -fdump-tree-release_ssa" } */
++/* { dg-options "-O1 --param sra-max-scalarization-size-Ospeed=16 -fdump-tree-release_ssa" } */
+ 
+ struct S
+ {
+@@ -21,5 +20,4 @@ int foo (struct S *p)
+   *p = l;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" { target { ! "aarch64*-*-* avr*-*-* nds32*-*-* sh*-*-*" } } } } */
+-/* { dg-final { cleanup-tree-dump "release_ssa" } } */
++/* { dg-final { scan-tree-dump-times "l;" 0 "release_ssa" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-2.c
+@@ -25,4 +25,3 @@ copystruct11 (teststruct *param)
+ 
+ /* There should be no reference to link_error. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-3.c
+@@ -25,4 +25,3 @@ copystruct1 (void)
+ 
+ /* There should be no reference to link_error. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
+@@ -22,4 +22,3 @@ vector int f(vector int t1, vector int t2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "st" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-5.c
+@@ -72,4 +72,3 @@ copyunion111111 (testunion param)
+ 
+ /* There should be no reference to link_error. */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-6.c
+@@ -34,8 +34,6 @@ void cow (int i)
+ /* { dg-final { scan-tree-dump "expr = b.i1"  "esra"} } */
+ /* { dg-final { scan-tree-dump "expr = c.d"  "esra"} } */
+ /* { dg-final { scan-tree-dump "expr = c.i1"  "esra"} } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+ 
+ /* There should be no reference to link_error.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-7.c
+@@ -10,4 +10,3 @@ void a(s *s1, s *s2)
+ 
+ /* Struct copies should not be split into members.  */
+ /* { dg-final { scan-tree-dump "\\\*s1_.\\\(D\\\) = \\\*s2"  "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-8.c
+@@ -32,4 +32,3 @@ void bar2(int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Created a replacement" 0 "esra"} } */
+-/* { dg-final { cleanup-tree-dump "esra" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/sra-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/sra-9.c
+@@ -17,4 +17,3 @@ int foo (int d)
+ 
+ /* There should be no reference to s.b.  */
+ /* { dg-final { scan-tree-dump-times "= s\.b" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-1.c
+@@ -72,4 +72,3 @@ void test11111 (int p, int q, int r)
+ /* There should be not link_error calls, if there is any the
+    optimization has failed */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "ccp1"} } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-10.c
+@@ -33,4 +33,3 @@ middle:
+ 
+ /* There should be no calls to strlen.  */
+ /* { dg-final { scan-tree-dump-times "strlen" 0 "fab1"} } */
+-/* { dg-final { cleanup-tree-dump "fab1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-11.c
+@@ -39,4 +39,3 @@ int test1111 (int param)
+ 
+ /* All ifs should be eliminated. */
+ /* { dg-final { scan-tree-dump-times "if " 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-13.c
+@@ -10,5 +10,4 @@ int foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-14.c
+@@ -18,4 +18,3 @@ void bar (void)
+ 
+ /* Everything except for the "i = 0" assignment should get removed.  */
+ /* { dg-final { scan-tree-dump-times "if" 0 "optimized" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-15.c
+@@ -46,4 +46,3 @@ void test3 (int param1, int param2)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-16.c
+@@ -19,4 +19,3 @@ int test2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 2 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-17.c
+@@ -29,4 +29,3 @@ int foobar(void)
+ /* { dg-final { scan-tree-dump "= i_.;" "ccp1" } } */
+ /* { dg-final { scan-tree-dump "= f.i;" "ccp1" } } */
+ /* { dg-final { scan-tree-dump "= g.i;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-18.c
+@@ -17,4 +17,3 @@ void func2(int* val)
+ 
+ /* { dg-final { scan-tree-dump-not "a \\\(" "ccp1" } } */
+ /* { dg-final { scan-tree-dump-not "b \\\(" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-19.c
+@@ -13,4 +13,3 @@ int g()
+ }
+ 
+ /* { dg-final { scan-tree-dump "= MEM\\\[\\\(int \\\*\\\)&a\\\];" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-2.c
+@@ -169,4 +169,3 @@ int test99999 (void)
+ /* There should be not link_error calls, if there is any the
+    optimization has failed */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-20.c
+@@ -12,4 +12,3 @@ int foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 10;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-21.c
+@@ -26,4 +26,3 @@ int bar (void)
+ 
+ /* { dg-final { scan-tree-dump-times "a.b.i" 1 "ccp1" } } */
+ /* { dg-final { scan-tree-dump-times "MEM\\\[\\\(struct B \\\*\\\)&a\\\].i" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-22.c
+@@ -12,4 +12,3 @@ int foo (unsigned b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-23.c
+@@ -17,4 +17,3 @@ int foo (void)
+ 
+ /* { dg-final { scan-tree-dump "MEM\\\[\\\(int \\\*\\\)&a \\\+ 2B\\\]" "ccp1" { target { int16 } } } } */
+ /* { dg-final { scan-tree-dump "MEM\\\[\\\(int \\\*\\\)&a \\\+ 4B\\\]" "ccp1" { target { int32 } } } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-24.c
+@@ -19,5 +19,4 @@ int bar()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1;" 2 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-27.c
+@@ -21,4 +21,3 @@ f2 ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "memcpy\[^\n\]*123456" 2 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-28.c
+@@ -23,4 +23,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "= p;" 0 "ccp1" } } */
+ /* { dg-final { scan-tree-dump-times "= q;" 0 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-29.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-29.c
+@@ -8,4 +8,3 @@ int foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "ccp2" } } */
+-/* { dg-final { cleanup-tree-dump "ccp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-3.c
+@@ -134,4 +134,3 @@ int* test666 (int * __restrict__ rp1, int * __restrict__ rp2, int *p1)
+ /* ??? While we indeed don't handle some of these, a couple of the
+    restrict tests are incorrect.  */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "ccp2" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "ccp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-30.c
+@@ -12,4 +12,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate b_.* > 300 to 0" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-31.c
+@@ -18,4 +18,3 @@ int g (int i, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 1" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-34.c
+@@ -9,4 +9,3 @@ int foo (int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\+" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-7.c
+@@ -24,4 +24,3 @@ int test7 (int a)
+ /* There should be not link_error calls, if there is any the
+    optimization has failed */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ccp-9.c
+@@ -52,4 +52,3 @@ test99999 (int *arr, int j)
+ /* There should be no link_error calls, if there is any, the
+    optimization has failed */
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-copyprop-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-copyprop-1.c
+@@ -9,4 +9,3 @@ int foo(A *a, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return i" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-copyprop-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-copyprop-2.c
+@@ -10,4 +10,3 @@ f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "PHI" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-1.c
+@@ -11,4 +11,3 @@ q()
+ }
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dce2"} } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-2.c
+@@ -14,4 +14,3 @@ void q(void)
+ }
+ /* There should be no IF conditionals.  */
+ /* { dg-final { scan-tree-dump-times "if " 0 "dce2"} } */
+-/* { dg-final { cleanup-tree-dump "dce2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-3.c
+@@ -32,4 +32,3 @@ int main(void)
+ /* And one if (for the exit condition of the loop):  */
+ /* { dg-final { scan-tree-dump-times "if " 1 "cddce1" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-4.c
+@@ -17,4 +17,3 @@ int foo(int b)
+ /* Verify DCE removes all accesses to a but the last store and the
+    read from a[2].  */
+ /* { dg-final { scan-tree-dump-times "a\\\[\[^\n\]\\\]" 2 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-5.c
+@@ -12,4 +12,3 @@ struct X foo(int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "x.i =" 1 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-6.c
+@@ -21,4 +21,3 @@ void t(int x)
+ /* The global store should not prevent deleting the store to p->field.  */
+ 
+ /* { dg-final { scan-tree-dump-not "p_.->field" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-7.c
+@@ -30,4 +30,3 @@ int main()
+    to the allocated memory.  */
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*D" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dce-8.c
+@@ -9,4 +9,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "malloc" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-ccp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-ccp-1.c
+@@ -15,4 +15,3 @@ ccp(int b)
+ }
+ /* We should propagate constant 4 into return.  */
+ /* { dg-final { scan-tree-dump-times "return 4" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-1.c
+@@ -13,4 +13,3 @@ threading(int a,int b)
+ }
+ /* We should thread the jump twice and eliminate it.  */
+ /* { dg-final { scan-tree-dump-times "Replaced.* t " 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-2.c
+@@ -21,4 +21,3 @@ foo ()
+    DOM is not able to perform this optimization.  */
+ 
+ /* { dg-final { scan-tree-dump "return 28;" "optimized" { xfail aarch64*-*-* alpha*-*-* hppa*-*-* powerpc*-*-* sparc*-*-* s390*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-cse-3.c
+@@ -28,4 +28,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump "= PHI <\[01\]\\\(.\\\), \[01\]\\\(.\\\)>" "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-dse-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-dse-1.c
+@@ -16,4 +16,3 @@ bar (int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "x =" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-1.c
+@@ -15,4 +15,3 @@ threading(int a,int b)
+ }
+ /* We should thread the jump twice and elliminate it.  */
+ /* { dg-final { scan-tree-dump-times "Threaded" 2 "dom1"} } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-2.c
+@@ -115,5 +115,3 @@ void dont_thread_4 (int a, int nfirst)
+ /* { dg-final { scan-tree-dump-times "Jumps threaded: 2" 0 "vrp1"} } */
+ /* { dg-final { scan-tree-dump-times "Jumps threaded: 1" 0 "dom1"} } */
+ /* { dg-final { scan-tree-dump-times "Jumps threaded: 2" 1 "dom1"} } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-4.c
+@@ -76,5 +76,4 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b,
+ 	 skipping the known-true "b_elt && kill_elt" in the second
+ 	 condition.  */
+ /* { dg-final { scan-tree-dump-times "Threaded" 4 "dom1" { target logical_op_short_circuit } } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-5.c
+@@ -20,4 +20,3 @@ void f2(int dst[3], int R)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Threaded jump" "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-6.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-dom1-details" } */
+ /* { dg-final { scan-tree-dump-times "FSM" 6 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+ 
+ int sum0, sum1, sum2, sum3;
+ int foo (char *s, char **ret)
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dom-thread-7.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-dom1-details" } */
+ /* { dg-final { scan-tree-dump-times "FSM" 19 "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+ 
+ enum STATE {
+   S0=0,
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-1.c
+@@ -23,4 +23,3 @@ foo (int a, int b, int c)
+ /* The return *p should be turned into return 4.  */
+ /* { dg-final { scan-tree-dump-times " return 4" 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-10.c
+@@ -1520,4 +1520,3 @@ void func_encode(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times " xxxinfo = {}" 1 "dse1"} } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-11.c
+@@ -18,4 +18,3 @@ void bar(int *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-12.c
+@@ -9,4 +9,3 @@ void foo (int *p, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\\*p" 1 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-13.c
+@@ -18,4 +18,3 @@ f2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-14.c
+@@ -18,4 +18,3 @@ f2 (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-15.c
+@@ -21,4 +21,3 @@ void bar (int *i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleted dead store" 2 "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-16.c
+@@ -15,4 +15,3 @@ void foo (struct X *x, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Deleted dead store" "dse1" } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-2.c
+@@ -21,4 +21,3 @@ foo ()
+ /* { dg-final { scan-tree-dump-times " = 3" 0 "dse1"} } */
+ /* { dg-final { scan-tree-dump-times " = 4" 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-3.c
+@@ -12,5 +12,4 @@ void f(void)
+ /* { dg-final { scan-tree-dump-times "Bool_Glob = 0" 0 "dse1"} } */
+ /* { dg-final { scan-tree-dump-times "Bool_Glob = 1" 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-4.c
+@@ -12,4 +12,3 @@ foo( int *a)
+ /* { dg-final { scan-tree-dump-times "= 5" 0 "dse1"} } */
+ /* { dg-final { scan-tree-dump-times "= 3" 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-5.c
+@@ -29,5 +29,4 @@ f1 (int i, int j, int k)
+ /* { dg-final { scan-tree-dump-times "i = 5" 1 "optimized" { xfail *-*-* }} } */
+ /* { dg-final { scan-tree-dump-times "<L.*>:;\[\n\t \]*\\*p = 5" 1 "optimized" { xfail *-*-*}} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-6.c
+@@ -16,4 +16,3 @@ int foo11 (int c)
+ /* { dg-final { scan-tree-dump-times "local1 = " 1 "dse1"} } */
+ /* { dg-final { scan-tree-dump-times "local2 = " 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-7.c
+@@ -20,4 +20,3 @@ int foo1 (void)
+ /* { dg-final { scan-tree-dump-times "glob2 = " 1 "dse1"} } */
+ /* { dg-final { scan-tree-dump-times "return 5" 1 "dse1"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-9.c
+@@ -12,4 +12,3 @@ foo ()
+ 
+ /* We should eliminate the first assignment.  */
+ /* { dg-final { scan-tree-dump-times "VDEF" 2 "dse1" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "dse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-1.c
+@@ -12,4 +12,3 @@ int f(int *a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\*\[ac\]_\[^\n\].*with t_" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-10.c
+@@ -23,4 +23,3 @@ void __frame_state_for (volatile char *state_in, int x)
+    first store.  Thus, this is XFAILed.  */
+ 
+ /* { dg-final { scan-tree-dump "Insertions: 2" "pre" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-11.c
+@@ -23,4 +23,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced S\\\[5\\\].x with 4" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-12.c
+@@ -23,4 +23,3 @@ foo (int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced S\\\[5\\\].x with 4" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-13.c
+@@ -24,4 +24,3 @@ void foo(double (*q)[4], struct Foo *tmp1)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced tmp1_.\\\(D\\\)->data with &a" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-14.c
+@@ -28,4 +28,3 @@ void foo(double (*q)[4])
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced tmp1.data with &a" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-15.c
+@@ -27,4 +27,3 @@ void foo(double (*q)[4])
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-16.c
+@@ -15,4 +15,3 @@ int foo(int b, int c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-17.c
+@@ -19,5 +19,4 @@ int foo(int i, int j, int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced f.doms\\\[0\\\].dom with i_" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-18.c
+@@ -25,4 +25,3 @@ int f(struct a *c)
+ /* We should have CSEd the load from c->a.  */
+ 
+ /* { dg-final { scan-tree-dump-times "c_.*\\\.a" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-19.c
+@@ -28,4 +28,3 @@ int f(struct a *c)
+ /* We should have CSEd the load from c->a.  */
+ 
+ /* { dg-final { scan-tree-dump-times "c_.*\\\.a" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-2.c
+@@ -15,4 +15,3 @@ foo (long a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\(short int\\\) c_.*with b_" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-20.c
+@@ -17,4 +17,3 @@ L2:
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-21.c
+@@ -23,4 +23,3 @@ void g(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "a\\\.? = " "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-22.c
+@@ -12,4 +12,3 @@ int foo (void)
+ /* We should eliminate the redundant load of i.  */
+ 
+ /* { dg-final { scan-tree-dump-not "= i;" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-23.c
+@@ -18,4 +18,3 @@ int f(int t, int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "PHI" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-24.c
+@@ -31,4 +31,3 @@ int bazzoo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 4 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-25.c
+@@ -15,4 +15,3 @@ int foo (struct X *p)
+ /* We should optimize this to return 0.  */
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-26.c
+@@ -16,4 +16,3 @@ int foo (union U *p)
+ 
+ /* avr has 16 bit int and 32 bit float */
+ /* { dg-final { scan-tree-dump "Replaced u.i with 0 in" "fre1" {xfail avr-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-27.c
+@@ -22,4 +22,3 @@ int foo(int which_p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced x with 0" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-3.c
+@@ -19,4 +19,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\(int\\\) aa_.*with a_" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-30.c
+@@ -9,4 +9,3 @@ float foo(float x, float y, float z)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-31.c
+@@ -44,4 +44,3 @@ void test4 (unsigned char x)
+ 
+ /* { dg-final { scan-tree-dump-times "Replaced \{" 4 "fre1" } } */
+ /* { dg-final { scan-tree-dump-times "Deleted redundant store" 4 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-32.c
+@@ -27,4 +27,3 @@ bar (_Complex float x)
+ 
+ /* We should CSE all the way to replace the stored value with x.  */
+ /* { dg-final { scan-tree-dump-times "m = x_\\d\+\\(D\\);" 2 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-33.c
+@@ -19,4 +19,3 @@ int main(int argc)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced BIT_FIELD_REF.*with 2" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-34.c
+@@ -16,4 +16,3 @@ float foo(float f)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced BIT_FIELD_REF.*with f" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-35.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-35.c
+@@ -14,4 +14,3 @@ float a1 (float dd)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced REALPART_EXPR.*with dd" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-36.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-36.c
+@@ -23,4 +23,3 @@ void PreEvaluate(int wtm)
+ /* We should be able to CSE the second load of opening.  */
+ 
+ /* { dg-final { scan-tree-dump "Replaced opening" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-37.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-37.c
+@@ -12,4 +12,3 @@ void foo (int i, int j)
+ /* We should remove the redundant address computation.  */
+ 
+ /* { dg-final { scan-tree-dump-times " = &a" 1 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-38.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-38.c
+@@ -18,4 +18,3 @@ int foo (int n, int i, int j)
+ /* We should remove the redundant load.  */
+ 
+ /* { dg-final { scan-tree-dump-not "= u.a\\\[n_2\\(D\\)\\\].i" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-39.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-39.c
+@@ -16,4 +16,3 @@ int foo (int i)
+ /* We should be able to value-number the final assignment to k to 1.  */
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-4.c
+@@ -12,4 +12,3 @@ char bar(char f)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\(char\\\) .*with " "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-40.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-40.c
+@@ -14,4 +14,3 @@ int foo (int *p)
+    aliasing store via *p is not reachable.  */
+ 
+ /* { dg-final { scan-tree-dump-not "= x;" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-41.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-41.c
+@@ -9,4 +9,3 @@ int foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "ffs" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-42.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-42.c
+@@ -31,4 +31,3 @@ int main()
+ /* { dg-final { scan-tree-dump "b = A;" "fre1" } } */
+ /* Verify we have propagated the element read all the way to the return.  */
+ /* { dg-final { scan-tree-dump "return 2" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-43.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-43.c
+@@ -26,4 +26,3 @@ L10:
+ 
+ /* { dg-final { scan-tree-dump-times "Removing dead stmt" 15 "fre1" } } */
+ /* { dg-final { scan-tree-dump-not "Not changing value number" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-5.c
+@@ -11,4 +11,3 @@ bar (unsigned int t)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced \\\(unsigned int\\\) a_.*with t_" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-6.c
+@@ -3,4 +3,3 @@
+ 
+  int i; int foo(void) { i = 2; int j = i * 2; int k = i + 2; return j == k; }
+ /* { dg-final { scan-tree-dump-times "Replaced " 6 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-7.c
+@@ -34,5 +34,3 @@ intflt foo(intflt j)
+ /* { dg-final { scan-tree-dump-times "Replaced a.u.k with j" 1 "fre1" } } */
+ /* { dg-final { scan-tree-dump "= VIEW_CONVERT_EXPR<float>\\\(j_" "fre1" } } */
+ /* { dg-final { scan-tree-dump "return j" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-8.c
+@@ -30,4 +30,3 @@ intflt foo(int i, int b)
+ 
+ /* { dg-final { scan-tree-dump-times "Replaced u.f with pretmp" 2 "fre1" } } */
+ /* { dg-final { scan-tree-dump-times "Inserted pretmp" 2 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-9.c
+@@ -25,4 +25,3 @@ void __frame_state_for1 (volatile char *state_in)
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 2 "fre1" } } */
+ /* { dg-final { scan-tree-dump-times "Insertions: 1" 2 "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-1.c
+@@ -14,4 +14,3 @@ int foo (int x, int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "\\|" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-10.c
+@@ -17,4 +17,3 @@ int f(int x, int a, int b)
+   return t;
+ }
+ /* { dg-final { scan-tree-dump "& 5" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-11.c
+@@ -18,4 +18,3 @@ int f(int x, int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "& 5" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-12.c
+@@ -17,4 +17,3 @@ int f(int x, int a, int b)
+   return t;
+ }
+ /* { dg-final { scan-tree-dump "& 5" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-13.c
+@@ -18,4 +18,3 @@ _Bool f1(_Bool a, _Bool b)
+ /* For LOGICAL_OP_NON_SHORT_CIRCUIT, this should be optimized
+    into return a & b;, with no ifs.  */
+ /* { dg-final { scan-tree-dump-not "if" "optimized" { target { i?86-*-* x86_64-*-* s390*-*-* avr*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-2.c
+@@ -20,4 +20,3 @@ doit:
+ }
+ 
+ /* { dg-final { scan-tree-dump "\\|" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-3.c
+@@ -20,4 +20,3 @@ doit:
+ }
+ 
+ /* { dg-final { scan-tree-dump ">=" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-4.c
+@@ -18,4 +18,3 @@ void foo (int x, int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "!=" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-5.c
+@@ -17,4 +17,3 @@ int f(int *i, int *j)
+ }
+ 
+ /* { dg-final { scan-tree-dump ">=" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-6.c
+@@ -34,4 +34,3 @@ foo2 (unsigned int a)
+ 
+ /* { dg-final { scan-tree-dump "optimizing bits or bits test" "ifcombine" } } */
+ /* { dg-final { scan-tree-dump "optimizing double bit test" "ifcombine" } } */
+-/* { dg-final { cleanup-tree-dump "ifcombine" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-7.c
+@@ -12,4 +12,3 @@ int test1 (int i, int j)
+ /* The above should be optimized to a i > j test by ifcombine.  */
+ 
+ /* { dg-final { scan-tree-dump " > " "ifcombine" } } */
+-/* { dg-final { cleanup-tree-dump "ifcombine" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-8.c
+@@ -22,4 +22,3 @@ plouf:
+    Instead we get u<=, which is acceptable with -fno-trapping-math.  */
+ 
+ /* { dg-final { scan-tree-dump " u<= " "ifcombine" } } */
+-/* { dg-final { cleanup-tree-dump "ifcombine" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-9.c
+@@ -19,4 +19,3 @@ void g (double x)
+    The transformation would also be legal with -ftrapping-math.  */
+ 
+ /* { dg-final { scan-tree-dump "optimizing.* < " "ifcombine" } } */
+-/* { dg-final { cleanup-tree-dump "ifcombine" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
+@@ -11,4 +11,3 @@ int t (int a, int b)
+   return 1;
+ }
+ /* { dg-final { scan-tree-dump "\&" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-2.c
+@@ -14,4 +14,3 @@ L1:
+   return 1;
+ }
+ /* { dg-final { scan-tree-dump "\|" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-3.c
+@@ -17,4 +17,3 @@ L2:
+   return 6;
+ }
+ /* { dg-final { scan-tree-dump "\|" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
+@@ -15,4 +15,3 @@ L2:
+   return 1;
+ }
+ /* { dg-final { scan-tree-dump "\&" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
+@@ -10,4 +10,3 @@ int t (int a, int b, int c)
+   return 1;
+ }
+ /* { dg-final { scan-tree-dump-times "\&" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
+@@ -10,4 +10,3 @@ int t (int a, int b, int c)
+   return 1;
+ }
+ /* { dg-final { scan-tree-dump-times "\\|" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-1.c
+@@ -19,4 +19,3 @@ quantum_toffoli (int control1, int control2, int target,
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "1 <<" 3 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-10.c
+@@ -28,4 +28,3 @@ int test_func(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion of pos" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c
+@@ -22,4 +22,3 @@ void access_buf(struct thread_param* p)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Executing store motion of __gcov0.access_buf\\\[\[01\]\\\] from loop 1" 2 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-12.c
+@@ -24,4 +24,3 @@ void bar (int x, int z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "!= 0 ? " 2 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-2.c
+@@ -19,4 +19,3 @@ int size)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "1 <<" 3 "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-3.c
+@@ -11,4 +11,3 @@ void foo(int n)
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion of global.y" "lim1" } } */
+ /* { dg-final { scan-tree-dump "Moving statement.*global.x.*out of loop 1" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-6.c
+@@ -11,4 +11,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Executing store motion of y" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-7.c
+@@ -12,4 +12,3 @@ void foo (int *srcdata, int *dstdata)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Moving statement" "lim1" } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-8.c
+@@ -17,4 +17,3 @@ void foo (int n, int m)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Moving PHI node" 1 "lim1"  } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-9.c
+@@ -17,4 +17,3 @@ void foo (int n, int m)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Moving PHI node" 1 "lim1"  } } */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-1.c
+@@ -18,4 +18,3 @@ int foo(int argc, char **argv)
+ /* We should eliminate one evaluation of b + c along the main path,
+    causing one reload. */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-10.c
+@@ -12,4 +12,3 @@ void f(double a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-11.c
+@@ -18,4 +18,3 @@ double f(double a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-12.c
+@@ -24,4 +24,3 @@ double f(double a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-13.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-13.c
+@@ -23,4 +23,3 @@ double f(double a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-14.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-14.c
+@@ -12,4 +12,3 @@ foo (const char *str)
+     link_error ();
+ }
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-15.c
+@@ -13,4 +13,3 @@ __SIZE_TYPE__ mystrlen (const char *s)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "PART.. = 0" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-16.c
+@@ -12,4 +12,3 @@ int foo(int k, int *x)
+   return res;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-17.c
+@@ -15,4 +15,3 @@ int foo(U *u, int b, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Eliminated: 1" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-18.c
+@@ -18,4 +18,3 @@ int bar (int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced foo \\(f.y\\)" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-19.c
+@@ -36,4 +36,3 @@ int foo (int i, int j, int k, int b)
+ 
+ /* All three loads should be eliminated.  */
+ /* { dg-final { scan-tree-dump "Eliminated: 3" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-2.c
+@@ -21,4 +21,3 @@ int motion_test1(int data, int data_0, int data_3, int v)
+    the main path. */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-20.c
+@@ -32,4 +32,3 @@ bb18:
+ 
+ /* { dg-final { scan-tree-dump "New PHIs: 2" "pre" } } */
+ /* { dg-final { scan-tree-dump "PHI <.*0\\\.0" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-21.c
+@@ -12,4 +12,3 @@ NumSift (long *array, unsigned long k)
+ /* There should be only two loads left.  */
+ 
+ /* { dg-final { scan-tree-dump-times "= \\\*\[^\n;\]*;" 2 "pre" { xfail { ! size32plus } } } } */ /* xfail: PR tree-optimization/58169 */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-22.c
+@@ -10,4 +10,3 @@ int foo (int i, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Eliminated: 1" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-23.c
+@@ -10,4 +10,3 @@ void foo(int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Eliminated: 3" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-24.c
+@@ -12,4 +12,3 @@ void foo(int *p, double *x, int n)
+    _not_ end up using the phi result for replacement *p.  */
+ 
+ /* { dg-final { scan-tree-dump-not "= prephitmp" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-25.c
+@@ -20,4 +20,3 @@ int foo (int x)
+ /* We should eliminate the load from p for a PHI node with values 1 and 2.  */
+ 
+ /* { dg-final { scan-tree-dump "Eliminated: 1" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-26.c
+@@ -24,4 +24,3 @@ void foo(SA* pResult, SB* method, SC* self)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Deleted redundant store" "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-27.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-27.c
+@@ -25,4 +25,3 @@ int foo2 (int i, int j, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "# prephitmp" 2 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-28.c
+@@ -18,4 +18,3 @@ int foo (int i, int b, int result)
+    i + 1 & -2 expression.  And do replacement with two PHI temps.  */
+ 
+ /* { dg-final { scan-tree-dump-times "with prephitmp" 2 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-29.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-29.c
+@@ -19,4 +19,3 @@ foo (void)
+    about bark () possibly clobbering hoist.  */
+ 
+ /* { dg-final { scan-tree-dump "Replaced hoist" "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-3.c
+@@ -12,4 +12,3 @@ unsigned foo1 (unsigned a, unsigned b)
+ }
+ /* We should eliminate both 4*b and 4*a from the main body of the loop */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 2" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-30.c
+@@ -25,4 +25,3 @@ bar (int b, int x)
+    are using different types (of the same size).  */
+ 
+ /* { dg-final { scan-tree-dump-times "Replaced MEM" 2 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-31.c
+@@ -44,4 +44,3 @@ int foo (S1 *root, int N)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "key" 4 "pre" } } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-4.c
+@@ -12,4 +12,3 @@ int foo(void)
+ /* We should eliminate the x+1 computation from this routine, replacing
+    it with a phi of 3, 4 */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-5.c
+@@ -14,4 +14,3 @@ foo (int i)
+    5  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+ /* { dg-final { scan-tree-dump-times "Insertions" 0 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-6.c
+@@ -11,4 +11,3 @@ int foo(int x)
+ /* We should eliminate one evaluation of x + 1 along the x = 2 path,
+    causing one elimination.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "pre"} } */
+-/* { dg-final { cleanup-tree-dump "pre" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-7.c
+@@ -9,4 +9,3 @@ foo (int *array)
+ }
+ /* We should eliminate one load.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-8.c
+@@ -22,4 +22,3 @@ foo (__SIZE_TYPE__ i, struct s *array)
+ /* We used to eliminate a cast but that was before POINTER_PLUS_EXPR
+    was added.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 4" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-pre-9.c
+@@ -10,4 +10,3 @@ foo (unsigned long a)
+   return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "return 0;" 0 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-1.c
+@@ -18,4 +18,3 @@ void vnum_test8(int *data)
+ } 
+ /* We should eliminate m - n, and set n = n + k into n = m. */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 3" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-2.c
+@@ -22,4 +22,3 @@ int vnum_test8(int *data)
+ /* We should eliminate m - n, and set n = n + k into n = m, and
+    set p to 0 */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 4" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-3.c
+@@ -12,4 +12,3 @@ int main(int argc, char **argv)
+ }
+ /* We should eliminate result = *p by saying it has the value 2.  */
+ /* { dg-final { scan-tree-dump-times "Eliminated: 1" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sccvn-4.c
+@@ -24,4 +24,3 @@ int vnum_test8(int *data)
+ /* We should eliminate m - n, n + k, set data[5] = 0, eliminate the
+    address arithmetic for data[5], and set p = 0.
+ /* { dg-final { scan-tree-dump-times "Eliminated: 5" 1 "fre1"} } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-1.c
+@@ -8,4 +8,3 @@ foo (int a, int b, int c)
+ }
+ /* We should sink the x = a * b calculation into the branch that returns x. */
+ /* { dg-final { scan-tree-dump-times "Sunk statements: 1" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-10.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-10.c
+@@ -17,4 +17,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Sinking # VUSE" 4 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-11.c
+@@ -14,4 +14,3 @@ int foo (int v[], int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "MEM\\\[.* \\+ 252B\\\]" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-12.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-12.c
+@@ -15,4 +15,3 @@ int foo (int v1[], int v2[])
+ }
+ 
+ /* { dg-final { scan-tree-dump "MEM\\\[.* \\+ 252B\\\]" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-2.c
+@@ -10,4 +10,3 @@ bar (int a, int b, int c)
+ }
+ /* We should sink the x = a * b calculation into the else branch  */
+ /* { dg-final { scan-tree-dump-times "Sunk statements: 1" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-3.c
+@@ -13,4 +13,3 @@ main (int argc)
+ }
+ /* We should sink the a = argc + 1 calculation into the if branch  */
+ /* { dg-final { scan-tree-dump-times "Sunk statements: 1" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-4.c
+@@ -18,4 +18,3 @@ main (int argc)
+ }
+ /* We should sink the first a = b + c calculation into the else branch  */
+ /* { dg-final { scan-tree-dump-times "Sunk statements: 1" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-5.c
+@@ -45,4 +45,3 @@ void foo(int16_t runs[], uint8_t alpha[], int x, int count)
+ 
+ /* We should not sink the next_runs = runs + x calculation after the loop.  */
+ /* { dg-final { scan-tree-dump-times "Sunk statements:" 0 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-6.c
+@@ -15,4 +15,3 @@ int foo(int *a, int r)
+ /* *a = 1 should be sunk to the else block.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Sinking" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-7.c
+@@ -16,4 +16,3 @@ int foo(int *a, int r, short *b)
+ /* *a = 1 should be sunk to the else block.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Sinking" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-8.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-8.c
+@@ -25,4 +25,3 @@ int foo(int *a, int r, short *b)
+ /* *a = 1 should be sunk into the default case.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Sinking" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-9.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-9.c
+@@ -16,4 +16,3 @@ int foo(int *a, int r, int *b)
+ /* *a = 1 should be sunk to the else block.  */
+ 
+ /* { dg-final { scan-tree-dump-times "Sinking" 1 "sink" } } */
+-/* { dg-final { cleanup-tree-dump "sink" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-1.c
+@@ -11,4 +11,3 @@ int f(void)
+ /* There should be no reference to conststaticvariable as we should have
+    inlined the 0. */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-2.c
+@@ -11,4 +11,3 @@ int f(void)
+ /* There should be a reference to conststaticvariable since it may
+    may be overriden at link time.  */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 1 "optimized" { xfail { *-*-mingw* *-*-cygwin* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c
+@@ -15,4 +15,3 @@ int f(void)
+    conststaticvariable as we should have inlined the 0. */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 0 "optimized" { target { pie_enabled || nonpic } } } } */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 1 "optimized" { target { { ! pie_enabled } && { ! nonpic } } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c
+@@ -13,4 +13,3 @@ int f(void)
+ /* There should be a reference to conststaticvariable since it may
+    may be overriden at run time.  */
+ /* { dg-final { scan-tree-dump-times "conststaticvariable" 1 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-vrp-thread-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-vrp-thread-1.c
+@@ -29,5 +29,4 @@ build_omp_regions_1 (basic_block bb, struct omp_region *parent,
+ /* ARM Cortex-M defined LOGICAL_OP_NON_SHORT_CIRCUIT to false,
+    so skip below test.  */
+ /* { dg-final { scan-tree-dump-times "Threaded" 1 "vrp1" { target { ! arm_cortex_m } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-1.c
+@@ -10,4 +10,3 @@ f1 (int i, ...)
+ {
+ }
+ /* { dg-final { scan-tree-dump "f1: va_list escapes 0, needs to save 0 GPR units and 0 FPR units" "stdarg" } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-2.c
+@@ -295,4 +295,3 @@ f15 (int i, ...)
+ /* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump-not "f15: va_list escapes 0, needs to save 0 GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-3.c
+@@ -190,4 +190,3 @@ f12 (int i, ...)
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f12: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-4.c
+@@ -91,4 +91,3 @@ f4 (int i, ...)
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "f4: va_list escapes 0, needs to save \[148\] GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-5.c
+@@ -116,4 +116,3 @@ f7 (int i, ...)
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 0 GPR units and 64 FPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && { ! { ia32 || llp64 } } } } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 32 GPR units and 2" "stdarg" { target alpha*-*-linux* } } } */
+ /* { dg-final { scan-tree-dump "f7: va_list escapes 0, needs to save 2 GPR units and 0 FPR units" "stdarg" { target s390*-*-linux* } } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-6.c
+@@ -33,4 +33,3 @@ bar (int x, char const *y, ...)
+ /* { dg-final { scan-tree-dump "bar: va_list escapes 1, needs to save all GPR units" "stdarg" { target { { i?86-*-* x86_64-*-* } && ia32 } } } } */
+ /* { dg-final { scan-tree-dump "bar: va_list escapes 1, needs to save all GPR units" "stdarg" { target ia64-*-* } } } */
+ /* { dg-final { scan-tree-dump "bar: va_list escapes 1, needs to save all GPR units" "stdarg" { target { powerpc*-*-* && lp64 } } } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/stdarg-7.c
+@@ -19,4 +19,3 @@ foo (int x, ...)
+ }
+ 
+ /* { dg-final { scan-tree-dump "foo: va_list escapes 1, needs to save all GPR units and all FPR units" "stdarg" } } */
+-/* { dg-final { cleanup-tree-dump "stdarg" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/strlen-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/strlen-1.c
+@@ -14,4 +14,3 @@ void wreg_twice(void)
+ 
+ /* We should not remove the second null character store to (base+42) address. */
+ /* { dg-final { scan-tree-dump-times " ={v} 0;" 2 "optimized" } }  */
+-/* { dg-final { cleanup-tree-dump "optimized" } }  */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/struct-aliasing-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/struct-aliasing-1.c
+@@ -12,4 +12,3 @@ foo (float *r, struct S *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Replaced\[^\n\]*with i_." "fre1" } } */
+-/* { dg-final { cleanup-tree-dump "fre1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/struct-aliasing-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/struct-aliasing-2.c
+@@ -15,5 +15,4 @@ foo ( struct S *p)
+ /* There should only be one load of p->f because FRE removes the redundancy
+    by realizing it can cast the result of either to the other.  */
+ /* { dg-final { scan-tree-dump-times "= \[^\n\]*p_.\\\(D\\\)" 1 "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-1.c
+@@ -12,4 +12,3 @@ int foo() {
+ 
+ /* { dg-final { scan-tree-dump-times "Executing store motion of global.y" 1 "lim1" } } */
+ /* XXX: We should also check for the load motion of global.x, but there is no easy way to do this.  */
+-/* { dg-final { cleanup-tree-dump "lim1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-2.c
+@@ -43,4 +43,3 @@ int main(void)
+ /* { dg-final { scan-tree-dump-times "a.f" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "a.g" 0 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "b.e" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/structopt-3.c
+@@ -14,4 +14,3 @@ int main(void)
+ 	return temp.a + temp.b;
+ }
+ /* { dg-final { scan-tree-dump-times "return 11" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-1.c
+@@ -17,4 +17,3 @@ t(int a)
+ 	return r;
+ }
+ /* { dg-final { scan-tree-dump-times "Found tail call" 1 "tailc"} } */
+-/* { dg-final { cleanup-tree-dump "tailc" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-2.c
+@@ -21,4 +21,3 @@ foo (int *x)
+    variables, they ought to be ignored.  There should be two tail
+    calls here.  */
+ /* { dg-final { scan-tree-dump-times "Found tail call" 2 "tailc"} } */
+-/* { dg-final { cleanup-tree-dump "tailc" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-4.c
+@@ -12,5 +12,4 @@ longValue ()
+ 
+ /* We should not tail call doubleValue in longValue as the mode changes. */
+ /* { dg-final { scan-tree-dump-times "Found tail call" 0 "tailc"} } */
+-/* { dg-final { cleanup-tree-dump "tailc" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailcall-5.c
+@@ -9,4 +9,3 @@ set_integer (void *dest, int value, int length)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "tail call" "tailc" } } */
+-/* { dg-final { cleanup-tree-dump "tailc" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-1.c
+@@ -9,4 +9,3 @@ t(int a)
+ 		return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated tail recursion" 1 "tailr1"} } */
+-/* { dg-final { cleanup-tree-dump "tailr1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-2.c
+@@ -10,4 +10,3 @@ t(char *a)
+ 		return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated tail recursion" 1 "tailr1"} } */
+-/* { dg-final { cleanup-tree-dump "tailr1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-3.c
+@@ -13,4 +13,3 @@ t(int a)
+ 	return r;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated tail recursion" 1 "tailr1"} } */
+-/* { dg-final { cleanup-tree-dump "tailr1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-4.c
+@@ -15,4 +15,3 @@ t(int a)
+ 	return r;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated tail recursion" 2 "tailr1"} } */
+-/* { dg-final { cleanup-tree-dump "tailr1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-5.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-5.c
+@@ -74,4 +74,3 @@ int main(void)
+ /* There is one recursive call to fib.  */
+ /* { dg-final { scan-tree-dump-times "\\mfib\\M" 5 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-6.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-6.c
+@@ -9,4 +9,3 @@ foo (int a)
+ 		return 0;
+ }
+ /* { dg-final { scan-tree-dump-times "Eliminated tail recursion" 1 "tailr1"} } */
+-/* { dg-final { cleanup-tree-dump "tailr1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-7.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/tailrecursion-7.c
+@@ -37,4 +37,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "\\mbar\\M" 4 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "\\mbaz\\M" 4 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/unreachable.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/unreachable.c
+@@ -12,4 +12,3 @@ main()
+   return 0;
+ }
+ /* { dg-final { scan-tree-dump-not "bad_boy" "optimized" { target { ! keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/upcast-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/upcast-1.c
+@@ -9,4 +9,3 @@ Foo *bar(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "&foo;" "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/update-cunroll.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/update-cunroll.c
+@@ -10,4 +10,3 @@ int t()
+ 	return i;
+ }
+ /* { dg-final { scan-tree-dump-times "Invalid sum" 0 "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/update-threading.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/update-threading.c
+@@ -21,4 +21,3 @@ main (int argc, char **argv)
+   exit (0);
+ }
+ /* { dg-final { scan-tree-dump-times "Invalid sum" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/update-unroll-1.c
+@@ -18,4 +18,3 @@ int foo(unsigned n)
+ 
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "aprefetch"} } */
+ /* { dg-final { scan-tree-dump-not "SUCC: 7 .100.0%" "aprefetch"} } */
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/update-unswitch-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/update-unswitch-1.c
+@@ -21,4 +21,3 @@ int bla(int p)
+ 
+ /* { dg-final { scan-tree-dump-not "Invalid sum" "unswitch"} } */
+ /* { dg-final { scan-tree-dump-not "SUCC: 3 .100.0%" "unswitch"} } */
+-/* { dg-final { cleanup-tree-dump "unswitch" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/useless-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/useless-1.c
+@@ -14,4 +14,3 @@ foo (void)
+    GIMPLE lowering, at the cost of an extra statement, label,
+    and basic block.  */
+ /* { dg-final { scan-tree-dump-times "goto" 3 "gimple"} } */ 
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
+@@ -28,6 +28,5 @@ float f3(vector float t)
+ 
+ /* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 4 "gimple"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
+@@ -20,4 +20,3 @@ float f(vector float a, int b, vector float c)
+ /* { dg-final { scan-tree-dump-not "BIT_FIELD_REF" "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "return 0.0" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vector-3.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vector-3.c
+@@ -16,5 +16,4 @@ float f(float b)
+ /* { dg-final { scan-tree-dump-times "BIT_FIELD_REF" 0 "optimized"} } */
+ /* { dg-final { scan-tree-dump-times "0\\\.0" 1 "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vector-4.c
+@@ -13,4 +13,3 @@ v4si vs (v4si a, v4si b)
+ /* Test is xfailed on 32-bit hppa*-*-* because target-callee-copies.  */
+ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR <a, b, { 0, 4, 1, 5 }>;" 1 "gimple" { xfail { hppa*-*-* && { ! lp64 } } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp01.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp01.c
+@@ -26,4 +26,3 @@ foo (int *p, int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp02.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp02.c
+@@ -23,4 +23,3 @@ foo (struct A *p, struct A *q)
+ /* Target with fno-delete-null-pointer-checks should not fold check */
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*to 1" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*to 1" 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp03.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp03.c
+@@ -33,4 +33,3 @@ foo (struct A *p, struct A *q)
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate q_.*to 1" 1 "vrp1" } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate r_.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp04.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp04.c
+@@ -11,4 +11,3 @@ foo (int a, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate a_.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp05.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp05.c
+@@ -28,4 +28,3 @@ foo (int k, int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate j_.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp06.c
+@@ -31,4 +31,3 @@ foo (int i, int j, int a)
+ /* { dg-final { scan-tree-dump-times "Folding predicate i_\[0-9\]+.*0 to 0" 1 "vrp1" } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate j_\[0-9\]+.*0 to 1" 1 "vrp1" } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate i_\[0-9]+.*j_\[0-9\]+.* to 0" 1 "vrp1" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp07.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp07.c
+@@ -37,4 +37,3 @@ foo (int i, int *p)
+ 
+ /* { dg-final { scan-tree-dump-times "PREDICATE: p_\[0-9\]" 2 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "PREDICATE: p_\[0-9\]" 1 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp08.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp08.c
+@@ -22,4 +22,3 @@ foo (int a, int *p)
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*to 1" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "PREDICATE: p_.* ne_expr 0" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.*to 1" 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp09.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp09.c
+@@ -28,4 +28,3 @@ L78:
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate p_.. != 0B to 1" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp11.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp11.c
+@@ -24,4 +24,3 @@ foo (int k, int j, int z)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate.*to 1" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp15.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp15.c
+@@ -30,5 +30,4 @@ blah (tree t)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "tree_code_length.42." 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp16.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp16.c
+@@ -19,5 +19,4 @@ nonlocal_mentioned_p (rtx x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate .*to 0" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp17.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp17.c
+@@ -28,5 +28,4 @@ gimplify_for_stmt (tree stmt)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Simplified relational" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp18.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp18.c
+@@ -31,4 +31,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Simplified relational" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp19.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp19.c
+@@ -24,4 +24,3 @@ int g (int b) {
+ }
+ /* { dg-final { scan-tree-dump "Folding predicate a_. < 0 to 0" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "Folding predicate b_. >= 0 to 1" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp20.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp20.c
+@@ -25,4 +25,3 @@ int g (int b) {
+ 
+ /* { dg-final { scan-tree-dump "Folding predicate a_. == 0 to 0" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "Folding predicate b_. != 0 to 1" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp21.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp21.c
+@@ -24,4 +24,3 @@ void test02(unsigned int a, unsigned int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp22.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp22.c
+@@ -14,4 +14,3 @@ void test02(unsigned int a, unsigned int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp23.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp23.c
+@@ -46,5 +46,4 @@ L8:
+    only way to reach the test is when n_sets <= 1, and the only value
+    which satisfies both conditions is n_sets == 1.  */
+ /* { dg-final { scan-tree-dump-times "Simplified relational" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp24.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp24.c
+@@ -92,5 +92,4 @@ L7:
+    as the only way to reach the tests is when n_sets <= 1 and the only
+    value which satisfies both conditions is n_sets == 1.  */
+ /* { dg-final { scan-tree-dump-times "Simplified relational" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp25.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp25.c
+@@ -50,5 +50,4 @@ L9:
+    both totally subsumed by earlier tests and thus should be folded
+    away using VRP.  */
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp26.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp26.c
+@@ -9,8 +9,7 @@ foo(int a)
+ }
+ 
+ /* VRP should optimize this to a trivial "return 1".   */
+-/* { dg-final { scan-tree-dump-times "return 1" 1 "vrp1" } } * /
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
++/* { dg-final { scan-tree-dump-times "return 1" 1 "vrp1" } } */
+ 
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp28.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp28.c
+@@ -26,7 +26,6 @@ int f3 (unsigned char c)
+     return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "if " 0 "vrp1" } } * /
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
++/* { dg-final { scan-tree-dump-times "if " 0 "vrp1" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp31.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp31.c
+@@ -10,5 +10,4 @@ int f(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp32.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp32.c
+@@ -10,5 +10,4 @@ int f(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp33.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp33.c
+@@ -6,4 +6,3 @@
+ int f2(int x) { return x == 1 || x == 3 || x == 1; }
+ 
+ /* { dg-final { scan-tree-dump "Folding predicate.*== 1 to 0" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp34.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp34.c
+@@ -17,4 +17,3 @@ foo (int a)
+ 
+ /* { dg-final { scan-tree-dump "Folding predicate a_. > 2 to 1" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "Folding predicate a_. <= 5 to 1" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp35.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp35.c
+@@ -12,4 +12,3 @@ int test1(int i, int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Folding predicate j_.* == 10 to 0" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp36.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp36.c
+@@ -9,4 +9,3 @@ int foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Folding predicate i_.* == 1 to 0" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp40.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp40.c
+@@ -15,4 +15,3 @@ int f(int a) {
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 3;" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp41.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp41.c
+@@ -24,4 +24,3 @@ foo (int a)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "case 99:" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp46.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp46.c
+@@ -28,4 +28,3 @@ func_18 ( int t )
+ /* There should be a single if left.  */
+ 
+ /* { dg-final { scan-tree-dump-times "if" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp47.c
+@@ -44,6 +44,3 @@ int f(int x)
+    either 0 or 1.  */
+ /* { dg-final { scan-tree-dump-times " & 1;" 0 "vrp2" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "dom1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp50.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp50.c
+@@ -31,4 +31,3 @@ int baz (int x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1;" 3 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp52.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp52.c
+@@ -13,4 +13,3 @@ foo (unsigned int i, unsigned int j)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 1;" 1 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp53.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp53.c
+@@ -21,4 +21,3 @@ f2 (int x)
+ 
+ /* { dg-final { scan-tree-dump-not "\& (2047|0x7ff)" "vrp1" } } */
+ /* { dg-final { scan-tree-dump-not "\\| (17408|0x4400)" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp54.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp54.c
+@@ -31,4 +31,3 @@ void bar (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp55.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp55.c
+@@ -14,5 +14,4 @@ fu (char *p, int x)
+ 
+ /* { dg-final { scan-tree-dump-times "Threaded jump" 1 "vrp1" { target { ! keeps_null_pointer_checks } } } } */
+ /* { dg-final { scan-tree-dump-times "Threaded jump" 0 "vrp1" { target {   keeps_null_pointer_checks } } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp56.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp56.c
+@@ -39,5 +39,4 @@ cleanup_empty_eh (basic_block bb)
+     }
+ }
+ /* { dg-final { scan-tree-dump-times "Threaded" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp57.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp57.c
+@@ -14,4 +14,3 @@ int bar(_Bool b)
+ 
+ /* { dg-final { scan-tree-dump "return 0;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp58.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp58.c
+@@ -10,4 +10,3 @@ foo (long long a, signed char b, signed char c)
+ 
+ /* { dg-final { scan-tree-dump "Folded into" "vrp1" { target int32plus } } } */
+ /* { dg-final { scan-tree-dump "Folding statement: _\[0-9\]\* = \\(long long int\\) bc_\[0-9\]\*;" "vrp1" { target int16 } } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp59.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp59.c
+@@ -32,4 +32,3 @@ int h(int x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not " & 3;" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp60.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp60.c
+@@ -28,4 +28,3 @@ int bar (int x, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "12345" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp61.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp61.c
+@@ -13,4 +13,3 @@ int f (int x, int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "1234" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp67.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp67.c
+@@ -37,4 +37,3 @@ unsigned baz (unsigned i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Folding predicate" 3 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp68.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp68.c
+@@ -15,4 +15,3 @@ int main() { }
+ /* VRP will arbitrarily choose ~[1, 1] when merging [2, 6] with ~[1, 7].  */
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp69.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp69.c
+@@ -35,4 +35,3 @@ void test5(unsigned int i)
+ int main() {}
+ 
+ /* { dg-final { scan-tree-dump-times "link_error" 0 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp70.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp70.c
+@@ -25,4 +25,3 @@ bar (unsigned int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp71.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp71.c
+@@ -19,4 +19,3 @@ int bar(char c)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return 0;" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp77.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp77.c
+@@ -44,4 +44,3 @@ void g(unsigned T x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "impossible" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp79.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp79.c
+@@ -20,4 +20,3 @@ void f (NT x, NT y)
+ }
+ 
+ /* { dg-final { scan-tree-dump "do_not_go_away" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp81.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp81.c
+@@ -33,6 +33,5 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vrp_keep \\(" 2 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp83.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp83.c
+@@ -57,4 +57,3 @@ f4 (unsigned int s, unsigned int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vrp_keep \\(" 6 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp84.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp84.c
+@@ -18,4 +18,3 @@ f2 (int s, int b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vrp_keep \\(" 1 "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp85.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp85.c
+@@ -37,4 +37,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp86.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp86.c
+@@ -25,4 +25,3 @@ foo (unsigned T x)
+ 
+ /* { dg-final { scan-tree-dump "fn1call" "vrp1"} } */
+ /* { dg-final { scan-tree-dump "fn2call" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
+@@ -79,6 +79,4 @@ bitmap_ior_into (bitmap a, const_bitmap b)
+ /* Verify that DCE after VRP2 eliminates a dead conversion
+    to a (Bool).  */
+ /* { dg-final { scan-tree-dump "Deleting.*_Bool.*;" "cddce2"} } */
+-/* { dg-final { cleanup-tree-dump "vrp2" } } */
+-/* { dg-final { cleanup-tree-dump "cddce2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp88.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp88.c
+@@ -34,6 +34,5 @@ bitmap_single_bit_set_p (const_bitmap a)
+ 
+ /* Verify that VRP simplified an "if" statement.  */
+ /* { dg-final { scan-tree-dump "Folded into: if.*" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp89.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp89.c
+@@ -2,7 +2,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-vrp1" } */
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+ #define A(fn, arg, min, max) \
+   if (__builtin_##fn (arg) < min || __builtin_##fn (arg) > max) \
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp90.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp90.c
+@@ -1,7 +1,6 @@
+ /* { dg-do link } */
+ /* { dg-options "-O2 -fdump-tree-vrp1" } */
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+ extern void link_error (void);
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp91.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp91.c
+@@ -19,4 +19,3 @@ void foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump "\\\[0, 7\\\]" "vrp2" } } */
+-/* { dg-final { cleanup-tree-dump "vrp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp92.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp92.c
+@@ -20,4 +20,3 @@ int foo (int i, int j)
+ 
+ /* { dg-final { scan-tree-dump "res_.: \\\[1, 1\\\]" "vrp1" } } */
+ /* { dg-final { scan-tree-dump-not "Threaded" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp93.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp93.c
+@@ -3,7 +3,6 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-vrp1" } */
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1"} } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+ 
+ #define A(fn, arg, min, max) \
+   if (__builtin_##fn (arg) < min || __builtin_##fn (arg) > max) \
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp94.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp94.c
+@@ -34,4 +34,3 @@ foo2 (unsigned int x, unsigned int y)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "abort" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp95.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp95.c
+@@ -47,4 +47,3 @@ range (unsigned long long int x, int y)
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1" } } */
+ /* { dg-final { scan-tree-dump "required_check" "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/vrp96.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp96.c
+@@ -50,4 +50,3 @@ baz (T b, T c)
+ 
+ /* { dg-final { scan-tree-dump-not "link_error" "vrp1" } } */
+ /* { dg-final { scan-tree-dump-times "required_check" 2 "vrp1" } } */
+-/* { dg-final { cleanup-tree-dump "vrp1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/vrp97.c
+@@ -0,0 +1,18 @@
++/* PR tree-optimization/64454 */
++/* { dg-options "-O2 -fdump-tree-vrp1" } */
++
++int f(int a, int b)
++{
++    if (a < -3 || a > 13) __builtin_unreachable();
++    if (b < -6 || b > 9) __builtin_unreachable();
++    int c = a % b;
++    return c >= -3 && c <= 8;
++}
++
++int g(int a, int b)
++{
++  int c = a % b;
++  return c != -__INT_MAX__ - 1;
++}
++
++/* { dg-final { scan-tree-dump-times "return 1;" 2 "vrp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/wholeprogram-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/wholeprogram-1.c
+@@ -20,5 +20,4 @@ main ()
+ /* Function should be inlined as called once.  */
+ /* { dg-final { scan-tree-dump-not "large_function" "optimized"} } */
+ 
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/wholeprogram-2.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/wholeprogram-2.c
+@@ -5,4 +5,3 @@ externally_visible_function ()
+ {
+ }
+ /* { dg-final { scan-tree-dump "externally_visible_function" "optimized"} } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/writeonly.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/writeonly.c
+@@ -18,4 +18,3 @@ t()
+ /* { dg-final { scan-tree-dump "magic2" "optimized"} } */
+ /* { dg-final { scan-tree-dump "foo" "optimized"} } */
+  
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/ucnid-6.c
++++ b/src/gcc/testsuite/gcc.dg/ucnid-6.c
+@@ -26,4 +26,3 @@ int main (void)
+   
+   return 0;
+ }
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.dg/union-4.c
++++ b/src/gcc/testsuite/gcc.dg/union-4.c
+@@ -20,4 +20,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "abort" "cse1" { target i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "cse1" } } */
+--- a/src/gcc/testsuite/gcc.dg/unroll-3.c
++++ b/src/gcc/testsuite/gcc.dg/unroll-3.c
+@@ -29,4 +29,3 @@ int foo2(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 3 iterations completely unrolled" 1 "cunrolli" } } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/unroll-4.c
++++ b/src/gcc/testsuite/gcc.dg/unroll-4.c
+@@ -29,4 +29,3 @@ int foo2(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 3 iterations completely unrolled" 1 "cunrolli" } } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/unroll-5.c
++++ b/src/gcc/testsuite/gcc.dg/unroll-5.c
+@@ -29,4 +29,3 @@ int foo2(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "loop with 3 iterations completely unrolled" 1 "cunrolli" } } */
+-/* { dg-final { cleanup-tree-dump "cunrolli" } } */
+--- a/src/gcc/testsuite/gcc.dg/unroll-6.c
++++ b/src/gcc/testsuite/gcc.dg/unroll-6.c
+@@ -32,4 +32,3 @@ int t2()
+ /* { dg-final { scan-rtl-dump-not "realistic bound: 999999" "loop2_unroll" } } */
+ /* { dg-final { scan-rtl-dump-times "upper bound: 2999999" 1 "loop2_unroll" } } */
+ /* { dg-final { scan-rtl-dump-times "realistic bound: 2999999" 1 "loop2_unroll" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_unroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/var-expand1.c
++++ b/src/gcc/testsuite/gcc.dg/var-expand1.c
+@@ -26,4 +26,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Expanding Accumulator" "loop2_unroll" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_unroll" } } */
+--- a/src/gcc/testsuite/gcc.dg/var-expand3.c
++++ b/src/gcc/testsuite/gcc.dg/var-expand3.c
+@@ -51,7 +51,6 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Expanding Accumulator" "loop2_unroll" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_unroll" } } */
+ 
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/O-pr46167.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O-pr46167.c
+@@ -8,4 +8,3 @@ int foo (char c, int i)
+   return s;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O1-pr33854.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O1-pr33854.c
+@@ -18,5 +18,4 @@ void uniform_correlation_matrix (VMatrix * v)
+     xbar[i] /= m;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/O1-pr41008.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O1-pr41008.c
+@@ -19,5 +19,4 @@ void map_do()
+   foo (jsav, ksav);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr36098.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr36098.c
+@@ -18,4 +18,3 @@ void foo (int ncons, t_sortblock *sb, int *iatom)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c
+@@ -28,5 +28,4 @@ foo ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided4 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr41881.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr41881.c
+@@ -26,5 +26,4 @@ TYPE fun2(TYPE *x, TYPE *y, unsigned int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_int_mult && {! vect_no_align } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr45971.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr45971.c
+@@ -9,5 +9,4 @@ foo (int *x, int *y)
+     y[i] = (x[i] == 1) ? i + 1 : -(i + 1);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr46077.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr46077.c
+@@ -7,4 +7,3 @@ void intf_pcmPlayEffect(int *src, int *dst, int size) {
+   *dst++ = *src & 0x80 ? (*src++ & 0x7f) : -*src++;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr49087.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr49087.c
+@@ -34,4 +34,3 @@ foo (int arg)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-slp-reduc-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-slp-reduc-10.c
+@@ -40,4 +40,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_int_mult && {! vect_no_align } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr32243.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr32243.c
+@@ -24,4 +24,3 @@ put_mono_values_s8 (GLcontext * ctx, struct gl_renderbuffer *s8rb,
+   dsrb->PutValues (ctx, dsrb, count, x, y, temp, mask);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr34223.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr34223.c
+@@ -30,4 +30,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr61917.c
++++ b/src/gcc/testsuite/gcc.dg/vect/O3-vect-pr61917.c
+@@ -11,4 +11,3 @@ fn1 ()
+   return d; 
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/Os-vect-95.c
++++ b/src/gcc/testsuite/gcc.dg/vect/Os-vect-95.c
+@@ -57,4 +57,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 2 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-nest-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/aligned-section-anchors-nest-1.c
+@@ -31,4 +31,3 @@ int *foo(void)
+ }
+ 
+ /* { dg-final { scan-ipa-dump-times "Increasing alignment of decl" 3 "increase_alignment" } } */
+-/* { dg-final { cleanup-ipa-dump "increase_alignment" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-1.c
+@@ -57,6 +57,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-10.c
+@@ -51,5 +51,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump "unsupported alignment in basic block." "slp2" { xfail vect_element_align } } } */
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_element_align } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c
+@@ -50,5 +50,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect64 } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-13.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-14.c
+@@ -48,5 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 0 "slp2"  } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+-  
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-15.c
+@@ -52,5 +52,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-16.c
+@@ -66,6 +66,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-17.c
+@@ -58,5 +58,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-18.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-18.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-19.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-19.c
+@@ -54,5 +54,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { xfail *-*-* }  } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-2.c
+@@ -54,6 +54,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-20.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-20.c
+@@ -65,5 +65,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-21.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-21.c
+@@ -66,5 +66,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp2" { target { ! {vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-22.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-22.c
+@@ -65,5 +65,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { target { ! {vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 2 "slp2"  { target vect_int_mult  } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-23.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-23.c
+@@ -52,5 +52,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-24.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-24.c
+@@ -57,6 +57,4 @@ int main (void)
+ /* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
+    because loops have vectorized before SLP gets a shot.  */
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" { target { vect_element_align && { ! powerpc*-*-* } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-25.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-25.c
+@@ -57,6 +57,4 @@ int main (void)
+ /* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
+    because loops have vectorized before SLP gets a shot.  */
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" { target { vect_element_align && { ! powerpc*-*-* } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-26.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-26.c
+@@ -57,6 +57,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" { target { vect64 && vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-27.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-27.c
+@@ -45,6 +45,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target { vect_int_mult && { vect_unpack && vect_pack_trunc } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-28.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-28.c
+@@ -67,6 +67,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target { vect_int_mult &&  { vect_pack_trunc && vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-29.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-29.c
+@@ -57,6 +57,4 @@ int main (void)
+ /* Exclude POWER8 (only POWER cpu for which vect_element_align is true)
+    because loops have vectorized before SLP gets a shot.  */
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1"  { target { { vect_int_mult && vect_element_align } && { ! powerpc*-*-* } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-3.c
+@@ -43,5 +43,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-30.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-30.c
+@@ -44,4 +44,3 @@ test1(void)
+ int main() { test1(); return a[21]; }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-31.c
+@@ -10,4 +10,3 @@ void f(){
+ }
+ 
+ /* { dg-final { scan-tree-dump "basic block vectorized" "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-32.c
+@@ -20,4 +20,3 @@ int foo (int *p)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorization is not profitable" "slp2" { xfail  { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-4.c
+@@ -39,5 +39,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 0 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-5.c
+@@ -48,5 +48,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-6.c
+@@ -46,5 +46,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-7.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 0 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-8.c
+@@ -49,5 +49,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { target vect_hw_misalign } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-8a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-8a.c
+@@ -48,5 +48,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 0 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-8b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-8b.c
+@@ -50,5 +50,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { target vect_hw_misalign } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-9.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { xfail  { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c
+@@ -42,6 +42,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" { target vect_element_align } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c
+@@ -51,5 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp2" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 8 "slp2" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 8 "slp2" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c
+@@ -49,5 +49,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp1" { target { vect_element_align && vect_pack_trunc } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-fast-math-vect-pr29925.c
+@@ -36,5 +36,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-31.c
+@@ -87,4 +87,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-33.c
+@@ -37,4 +37,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-68.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-68.c
+@@ -85,4 +85,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-reduc-1char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/i386/costmodel-vect-reduc-1char.c
+@@ -49,4 +49,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target vect_int } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target vect_int } */
+ 
+ #define N 16 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2"  { xfail  { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-fast-math-vect-pr29925.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-fast-math-vect-pr29925.c
+@@ -36,5 +36,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target vect_float } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target vect_float } */
+ 
+ #include <stdlib.h>
+ #include "../../tree-vect.h"
+@@ -24,5 +24,4 @@ ggSpectrum_Set20(float * data, float d)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-12.c
+@@ -115,5 +115,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  {target { vect_strided8 && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target { vect_strided8 && vect_int_mult } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-33.c
+@@ -41,4 +41,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c
+@@ -72,4 +72,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31a.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 1 "vect" { target { ! vect_hw_misalign } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31b.c
+@@ -47,4 +47,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-31c.c
+@@ -47,4 +47,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-33.c
+@@ -40,4 +40,3 @@ int main (void)
+ 
+ /* Versioning to align the store is used. Overhead of versioning is not too high.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target {! vector_alignment_reachable} } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68a.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68b.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-68c.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76a.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76b.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* Versioning to align the store is used. Overhead of versioning is not too high.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_no_align || {! vector_alignment_reachable} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-76c.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-outer-fir.c
+@@ -68,4 +68,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-reduc-1char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-vect-reduc-1char.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-fast-math-vect-pr29925.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-fast-math-vect-pr29925.c
+@@ -36,5 +36,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31a.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31b.c
+@@ -47,4 +47,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31c.c
+@@ -47,4 +47,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31d.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-31d.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-33.c
+@@ -40,4 +40,3 @@ int main (void)
+ 
+ /* Versioning to align the store is used. Overhead of versioning is not too high.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target {! vector_alignment_reachable} } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68a.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68b.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68c.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68d.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-68d.c
+@@ -47,4 +47,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76a.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76b.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-76c.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-iv-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/spu/costmodel-vect-iv-9.c
+@@ -35,4 +35,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target {! vect_int_mult } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-fast-math-vect-pr29925.c
+@@ -36,5 +36,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr30843.c
+@@ -22,5 +22,4 @@ void dacP98FillRGBMap (unsigned char *pBuffer)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 1 "vect" { target vect_interleave
+ } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr64909.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-pr64909.c
+@@ -12,4 +12,3 @@ void t()
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-31.c
+@@ -87,4 +87,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-33.c
+@@ -37,4 +37,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-68.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-68.c
+@@ -85,4 +85,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-reduc-1char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/costmodel/x86_64/costmodel-vect-reduc-1char.c
+@@ -49,4 +49,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorization not profitable" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-1.c
+@@ -46,5 +46,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target { vect_call_copysignf && vect_call_sqrtf } } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-2.c
+@@ -64,5 +64,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 2 "slp2" { target vect_call_lrint } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-bb-slp-call-3.c
+@@ -65,5 +65,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-ifcvt-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-ifcvt-1.c
+@@ -15,4 +15,3 @@ bestseries9 (float * __restrict__ arr, int len)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-pr35982.c
+@@ -22,4 +22,3 @@ float method2_int16 (struct mem *mem)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_extract_even_odd || vect_strided2 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_extract_even_odd || vect_strided2 } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-pr43074.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-pr43074.c
+@@ -13,4 +13,3 @@ pvslockprocess(float *fout, float *fin, int framesize)
+   return mag;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-pr44152.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-pr44152.c
+@@ -34,4 +34,3 @@ foo (int x)
+ }
+ 
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-pr55281.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-pr55281.c
+@@ -27,4 +27,3 @@ foo (int *a, int b, float *d, float *e, int *f)
+       f[i] = e[i] + bar (a[i], d[i]);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-27.c
+@@ -14,4 +14,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-slp-38.c
+@@ -19,4 +19,3 @@ foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-call-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-call-1.c
+@@ -96,4 +96,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" { target { vect_call_copysignf && vect_call_sqrtf } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" { target { vect_call_copysignf && vect_call_sqrtf } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-call-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-call-2.c
+@@ -127,4 +127,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 6 "vect" { target vect_call_lrint } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" { target vect_call_lrint } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c
+@@ -57,4 +57,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-outer-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-outer-7.c
+@@ -20,4 +20,3 @@ void test2 (float x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-1.c
+@@ -11,4 +11,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pow-2.c
+@@ -29,5 +29,4 @@ main (void)
+ {
+   d_type tmp = main1 ();
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pr25911.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pr25911.c
+@@ -12,4 +12,3 @@ float bessel_Kn_scaled_small_x(int n)
+   return sum1;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pr29925.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-pr29925.c
+@@ -36,5 +36,4 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-5.c
+@@ -52,4 +52,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-7.c
+@@ -52,4 +52,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-8.c
+@@ -20,4 +20,3 @@ float f (unsigned n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/fast-math-vect-reduc-9.c
+@@ -27,4 +27,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/ggc-pr37574.c
++++ b/src/gcc/testsuite/gcc.dg/vect/ggc-pr37574.c
+@@ -19,4 +19,3 @@ int main (void) {
+    return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
++++ b/src/gcc/testsuite/gcc.dg/vect/if-cvt-stores-vect-ifcvt-18.c
+@@ -66,4 +66,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-fast-math-vect16.c
+@@ -35,4 +35,3 @@ int main (void)
+ 
+ /* Requires fast-math.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-fre-pre-pr50208.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-fre-pre-pr50208.c
+@@ -14,4 +14,3 @@ void foo (int j)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-math-errno-slp-32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-math-errno-slp-32.c
+@@ -14,4 +14,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "pattern recognized" "vect" { xfail spu*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-math-errno-vect-pow-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-math-errno-vect-pow-1.c
+@@ -11,4 +11,3 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "pattern recognized" "vect" { xfail spu*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-1.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-2.c
+@@ -46,4 +46,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-3.c
+@@ -45,4 +45,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-4.c
+@@ -54,4 +54,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-outer-5.c
+@@ -51,4 +51,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-slp-reduc-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-noreassoc-slp-reduc-7.c
+@@ -38,5 +38,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-1.c
+@@ -20,4 +20,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10.c
+@@ -51,4 +51,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10a.c
+@@ -55,4 +55,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-10b.c
+@@ -54,4 +54,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-11.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-12.c
+@@ -47,4 +47,3 @@ int main (void)
+ 
+ /* Until we support multiple types in the inner loop  */
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-13.c
+@@ -64,4 +64,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-14.c
+@@ -58,4 +58,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-15.c
+@@ -45,4 +45,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-16.c
+@@ -59,4 +59,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! {vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-17.c
+@@ -65,4 +65,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! {vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-18.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-18.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target { vect_interleave || vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-19.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-19.c
+@@ -49,4 +49,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! {vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-2.c
+@@ -17,4 +17,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-20.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-20.c
+@@ -51,4 +51,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-21.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-21.c
+@@ -59,4 +59,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_pack_trunc } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-22.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-22.c
+@@ -51,4 +51,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-3.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-4.c
+@@ -52,4 +52,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-5.c
+@@ -50,4 +50,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6-global.c
+@@ -53,4 +53,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-6.c
+@@ -53,4 +53,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { unaligned_stack || { vect_no_align && { ! vect_hw_misalign } } } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-7.c
+@@ -72,4 +72,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_element_align } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9a.c
+@@ -51,4 +51,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-9b.c
+@@ -50,4 +50,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-pr49199.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-pr49199.c
+@@ -15,4 +15,3 @@ int foo (void)
+   return x;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-slp-30.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-slp-30.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-slp-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-slp-31.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-1.c
+@@ -31,4 +31,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-2.c
+@@ -47,4 +47,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-scevccp-vect-iv-3.c
+@@ -25,4 +25,3 @@ unsigned int main1 ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-31.c
+@@ -90,4 +90,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-34.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-34.c
+@@ -40,4 +40,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-36.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-36.c
+@@ -47,4 +47,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-64.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-64.c
+@@ -86,4 +86,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-65.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-65.c
+@@ -83,4 +83,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-66.c
+@@ -81,4 +81,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target { {! vect_aligned_arrays} && {vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {vect_aligned_arrays} && {! vect_sizes_32B_16B} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c
+@@ -92,4 +92,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 4 "vect" { target { {! vect_aligned_arrays} && {vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target { {vect_aligned_arrays} && {! vect_sizes_32B_16B} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-69.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-69.c
+@@ -118,4 +118,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { {! vector_alignment_reachable} || { vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-outer-4h.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-outer-4h.c
+@@ -45,4 +45,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-1.c
+@@ -9,4 +9,3 @@ foo (float a[32], float b[2][32])
+     a[i] = (b[0][i] > b[1][i]) ? b[0][i] : b[1][i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-2.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_condition } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-111.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-111.c
+@@ -36,4 +36,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target powerpc*-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target i?86-*-* x86_64-*-* ia64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-11.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-12.c
+@@ -30,4 +30,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-13.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-14.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-trapping-math-vect-ifcvt-15.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-dom-vect-bug.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-dom-vect-bug.c
+@@ -27,4 +27,3 @@ int main ()
+ 
+   return 0;
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-fre-pr50039.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-fre-pr50039.c
+@@ -11,5 +11,4 @@ int main(void) {
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c
+@@ -17,4 +17,3 @@ foo (short x)
+   return sum;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-pre-slp-29.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-pre-slp-29.c
+@@ -74,5 +74,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-reassoc-bb-slp-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-reassoc-bb-slp-12.c
+@@ -48,6 +48,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "basic block vectorized" 1 "slp2" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "slp1" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c
+@@ -14,4 +14,3 @@ A sum(A a,A b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "not vectorized: more than one data ref in stmt" 0 "slp2" } } */
+-/* { dg-final { cleanup-tree-dump "slp2" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c
+@@ -50,4 +50,3 @@ int main(void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 2 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-101.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-101.c
+@@ -47,5 +47,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c
+@@ -55,5 +55,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c
+@@ -55,5 +55,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-37.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-37.c
+@@ -60,4 +60,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 4 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-43.c
+@@ -91,4 +91,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 2 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-45.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-45.c
+@@ -57,4 +57,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-49.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-49.c
+@@ -59,4 +59,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-51.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-51.c
+@@ -57,4 +57,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-53.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-53.c
+@@ -60,4 +60,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-57.c
+@@ -72,4 +72,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-61.c
+@@ -74,4 +74,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-79.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-79.c
+@@ -48,4 +48,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-1.c
+@@ -52,5 +52,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "dependence distance negative" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-2.c
+@@ -52,4 +52,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "dependence distance negative" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-depend-3.c
+@@ -184,4 +184,3 @@ int main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "dependence distance negative" 4 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-dv-2.c
+@@ -76,4 +76,3 @@ int main ()
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "accesses have the same alignment." 2 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "accesses have the same alignment." 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/nodump-forwprop-22.c
++++ b/src/gcc/testsuite/gcc.dg/vect/nodump-forwprop-22.c
+@@ -17,4 +17,3 @@ void f (vec *px, vec *y, vec *z)
+ 
+ /* { dg-final { scan-tree-dump-times "VEC_PERM_EXPR" 1 "cddce1" } } */
+ /* { dg-final { scan-tree-dump-not "BIT_FIELD_REF" "cddce1" } } */
+-/* { dg-final { cleanup-tree-dump "cddce1" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr16105.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr16105.c
+@@ -19,4 +19,3 @@ void square(const float * __restrict__ a,
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr18308.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr18308.c
+@@ -11,4 +11,3 @@ void bar(int j)
+   if (k) foo();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr18400.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr18400.c
+@@ -36,4 +36,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr18425.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr18425.c
+@@ -14,4 +14,3 @@ _M_fill_insert(unsigned int __n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr18536.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr18536.c
+@@ -32,4 +32,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr20122.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr20122.c
+@@ -53,4 +53,3 @@ int main (int argc, char **argv)
+    The loop in main is aligned.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" } } */
+ /*  { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr21591.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr21591.c
+@@ -34,5 +34,4 @@ void f(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr22480.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr22480.c
+@@ -29,4 +29,3 @@ test_3 (void)
+    bm[j] <<= am[j];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr22506.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr22506.c
+@@ -11,4 +11,3 @@ void foo()
+     for (i=0; i<2; ++i) ;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr23816-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr23816-1.c
+@@ -9,4 +9,3 @@ foo (float a[32], float b[2][32])
+     a[i] = (b[0][i] > b[1][i]) ? b[0][i] : b[1][i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr23816-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr23816-2.c
+@@ -9,4 +9,3 @@ foo (double a[32], double b[2][32])
+     a[i] = (b[0][i] > b[1][i]) ? b[0][i] : b[1][i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr23831.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr23831.c
+@@ -9,4 +9,3 @@ void foo (void)
+     bm[j] = bm[j] * 8;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr24059.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr24059.c
+@@ -13,4 +13,3 @@ void compute_predicate_codes (char *codes, struct pred_data *p)
+     codes[i] = p->codes[i] ? 2 : 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr24300.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr24300.c
+@@ -34,4 +34,3 @@ foo (int Fc)
+   return (tc);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr25371.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr25371.c
+@@ -10,4 +10,3 @@ void slow_close(int n)
+       *(mm+i*2*n+i) = 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr25413.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr25413.c
+@@ -36,4 +36,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
+ /* { dg-final { scan-tree-dump-times "vector alignment may not be reachable" 1 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
+ /* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 1 "vect" { target { {! vector_alignment_reachable_for_64bit} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr25413a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr25413a.c
+@@ -126,4 +126,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vector alignment may not be reachable" 1 "vect" { target { ! vector_alignment_reachable  } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { ! vector_alignment_reachable } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr26359.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr26359.c
+@@ -14,5 +14,3 @@ foo () {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Deleting : vect_" 0 "dce5" } } */
+-/* { dg-final { cleanup-tree-dump "dce5" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr27151.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr27151.c
+@@ -13,4 +13,3 @@ void vis_clear_data ()
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr28952.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr28952.c
+@@ -30,4 +30,3 @@ send_spaceship_info (void)
+   lsend_packet_spaceship_info (&info);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr30771.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr30771.c
+@@ -15,4 +15,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr30784.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr30784.c
+@@ -27,4 +27,3 @@ int main ()
+ 
+   return 0;
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr30795.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr30795.c
+@@ -16,4 +16,3 @@ main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr30843.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr30843.c
+@@ -21,5 +21,4 @@ void dacP98FillRGBMap (unsigned char *pBuffer)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided4 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr30858.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr30858.c
+@@ -12,4 +12,3 @@ foo (int ko)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump "Unknown def-use cycle pattern." "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr31041.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr31041.c
+@@ -24,4 +24,3 @@ utrie_open_3_4 ()
+       while (i < 5);
+     }
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr31343.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr31343.c
+@@ -32,4 +32,3 @@ main1 ()
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr31699.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr31699.c
+@@ -36,4 +36,3 @@ int main()
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_intfloat_cvt } } } */
+ /* { dg-final { scan-tree-dump-times "vector alignment may not be reachable" 1 "vect" { target { ! vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { ! vector_alignment_reachable } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32216.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32216.c
+@@ -12,4 +12,3 @@ SetSoundVariables (int x)
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32224.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32224.c
+@@ -15,4 +15,3 @@ gmpz_export (void *data)
+     __src++;
+   }
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32230.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32230.c
+@@ -19,6 +19,5 @@ const_f (filter_buffer_t *buf)
+     ((float*) (&((sbuf_header_t *) (__PTRDIFF_TYPE__)((buf) == (filter_buffer_t *)&(buf)->buf[0]))->buf[0]))[i] = val;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32366.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32366.c
+@@ -12,4 +12,3 @@ stream_test (void)
+     input[k] = k * 1.0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32421.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32421.c
+@@ -8,5 +8,4 @@ int f(int **__restrict a, int ** __restrict b)
+     a[i] = b[i] + 1;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr32824.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr32824.c
+@@ -11,5 +11,4 @@ void foo(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33369.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33369.c
+@@ -19,4 +19,3 @@ f (POINT * ptBuf)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33373.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33373.c
+@@ -5,4 +5,3 @@ void DOSMEM_FillIsrTable(int*isr) {
+     for (i=0; i<256; i++)
+         isr[i]=(((short)((i*4) & 0xFFFF)) | (0xf000 & 0xFFFF) << 16);
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33373b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33373b.c
+@@ -5,4 +5,3 @@ void f (unsigned int *d, unsigned int *s, int w)
+   for (i = 0; i < w; ++i)
+     d [i] = s [i] * (unsigned short) (~d [i] >> 24);
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33597.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33597.c
+@@ -21,4 +21,3 @@ rgb15to24_C (const uint8_t * src, uint8_t * dst, long src_size)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33804.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33804.c
+@@ -13,4 +13,3 @@ void f(unsigned char *s, unsigned char *d, int n) {
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33833.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33833.c
+@@ -32,4 +32,3 @@ void sched_init (uintptr_t __ptr)
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33846.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33846.c
+@@ -21,4 +21,3 @@ void _mix_some_samples (intptr_t buf, int *mix_buffer, int mix_size)
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33866.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33866.c
+@@ -28,5 +28,4 @@ void test_select_fill_hyper_simple (long *offset)
+ 
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr33953.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr33953.c
+@@ -30,6 +30,5 @@ void blockmove_NtoN_blend_noremap32 (const UINT32 *srcdata, int srcwidth,
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr34005.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr34005.c
+@@ -13,4 +13,3 @@ void XdmcpUnwrap (unsigned char *output, int k)
+     output[i] = blocks[k][i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr34407.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr34407.c
+@@ -13,4 +13,3 @@ void ReadRLEImage (unsigned char *p)
+     *p++ = background_color[j];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr34591.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr34591.c
+@@ -9,4 +9,3 @@ int av_resample(int filter_length, short *src, short *filter)
+     return val;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr36228.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr36228.c
+@@ -28,4 +28,3 @@ t_run_test()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "versioning for alias required" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr36493.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr36493.c
+@@ -21,5 +21,4 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr36630.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr36630.c
+@@ -14,4 +14,3 @@ foo (unsigned char *x, short y)
+     }
+ }
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37027.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37027.c
+@@ -33,5 +33,4 @@ foo (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_add } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37385.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37385.c
+@@ -17,4 +17,3 @@ bar ()
+       fun_tab[i] = foo;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37474.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37474.c
+@@ -34,5 +34,4 @@ void foo (unsigned int *__restrict__ pInput, unsigned int *__restrict__ pOutput)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37482.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37482.c
+@@ -17,5 +17,4 @@ void SexiALI_Convert(void *vdest, void *vsrc, unsigned int frames)
+   *dest++ = tmp;
+  }
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37539.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37539.c
+@@ -41,7 +41,6 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_strided4 && vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr37730.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr37730.c
+@@ -15,4 +15,3 @@ add_opush (void)
+   sdp_seq_alloc (dtds);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr38529.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr38529.c
+@@ -13,6 +13,5 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr39529.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr39529.c
+@@ -16,6 +16,5 @@ foo (void)
+     } while (p < p2);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr40074.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr40074.c
+@@ -50,5 +50,4 @@ int main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/pr40238.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr40238.c
+@@ -31,5 +31,4 @@ int xgp_ahd_interpolate (int tile)
+  return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr40254.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr40254.c
+@@ -35,5 +35,4 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr40542.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr40542.c
+@@ -10,5 +10,4 @@ volarr_cpy(char *d, volatile char *s)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr41956.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr41956.c
+@@ -10,4 +10,3 @@ void K (int *gpwgts, int *badminpwgt, int *badmaxpwgt)
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr42193.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr42193.c
+@@ -24,5 +24,4 @@ void foo ()
+   out[5] = 17 * a + 15 * b + 13  * c + 14 * d + 11 * e + 9 * f;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr42604.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr42604.c
+@@ -32,4 +32,3 @@ test (unsigned short *b)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr42709.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr42709.c
+@@ -24,5 +24,4 @@ main1 (int *a, int *b, int *c, int *d, int dummy)
+     } 
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/pr43430-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr43430-1.c
+@@ -36,4 +36,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_condition } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr43430-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr43430-2.c
+@@ -14,4 +14,3 @@ vsad16_c (void *c, uint8_t * s1, uint8_t * s2, int stride, int h)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_condition } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr43432.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr43432.c
+@@ -11,4 +11,3 @@ int len){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_perm && vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr43842.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr43842.c
+@@ -53,5 +53,4 @@ int81 (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr44507.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr44507.c
+@@ -51,5 +51,4 @@ int main(int argc, char** argv)
+   return seeIf256ByteArrayIsConstant(&array1[0]);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr45633.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr45633.c
+@@ -12,4 +12,3 @@ foo (void)
+     t[i] -= s[i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr45752.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr45752.c
+@@ -104,5 +104,4 @@ int main (int argc, const char* argv[])
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect"  } } */
+ /* { dg-final { scan-tree-dump "permutation requires at least three vectors" "vect" { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr45847.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr45847.c
+@@ -11,5 +11,4 @@ long long foo (long long *__restrict a,  int *__restrict b, int *__restrict c )
+   return sum;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr45902.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr45902.c
+@@ -40,4 +40,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr46009.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr46009.c
+@@ -71,4 +71,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr46049.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr46049.c
+@@ -18,4 +18,3 @@ void foo (int16_t i, int16_t *p, int16_t x)
+       p++;
+     }
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr46052.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr46052.c
+@@ -30,4 +30,3 @@ void foo1 (int n)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr46126.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr46126.c
+@@ -22,4 +22,3 @@ EvTab[(((uintptr_t)(((TypHandle*)((hdCall)->ptr))[1]) & 1) ? 1 :
+      ptApp[2] = ((TypHandle) (uintptr_t) (((long)(lc) << 2) + 1));
+  }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr46663.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr46663.c
+@@ -11,4 +11,3 @@ int foo (bart bar, int m)
+   return j;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr47001.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr47001.c
+@@ -24,4 +24,3 @@ int main1 (int res0, int res1)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr47139.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr47139.c
+@@ -14,5 +14,4 @@ foo ()
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr48172.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr48172.c
+@@ -28,4 +28,3 @@ int main() {
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr48377.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr48377.c
+@@ -22,4 +22,3 @@ main (void)
+   return foo (buf + 1, 26) != 26;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr48765.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr48765.c
+@@ -82,4 +82,3 @@ stupid_find_reg (call_preserved, class, mode, born_insn, dead_insn,
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49038.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49038.c
+@@ -41,4 +41,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49093.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49093.c
+@@ -19,4 +19,3 @@ lbl_473:
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49318.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49318.c
+@@ -19,4 +19,3 @@ void gl_GetDoublev( GLcontext *ctx, GLenum pname, GLdouble *params ) {
+     params[i] = (GLint) ctx->TextureMatrix[i];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49478.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49478.c
+@@ -20,5 +20,4 @@ foo (int len) {
+   return result;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49610.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49610.c
+@@ -9,4 +9,3 @@ void func_13(int p_17) {
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49771.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49771.c
+@@ -23,4 +23,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr49926.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr49926.c
+@@ -20,4 +20,3 @@ foo (unsigned int x, int y, int z, int *w)
+   while (1);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr50014.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr50014.c
+@@ -12,5 +12,4 @@ int f(unsigned char *s, int n)
+   return sum;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr50451.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr50451.c
+@@ -14,5 +14,4 @@ foo (int integral, int decimal, int power_ten)
+   return integral+decimal;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr50635.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr50635.c
+@@ -17,5 +17,4 @@ void f0a(int32_t * result, int32_t * arg1, int8_t * arg2, int32_t temp_3)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr50727.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr50727.c
+@@ -17,5 +17,4 @@ f0a (uint32_t * __restrict__ result, uint32_t * arg2,
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51000.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51000.c
+@@ -16,4 +16,3 @@ foo ()
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51015.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51015.c
+@@ -16,4 +16,3 @@ void e2fsck_pass1()
+  }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51074.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51074.c
+@@ -21,4 +21,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51301.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51301.c
+@@ -12,4 +12,3 @@ f0a (int8_t * __restrict__ arg1)
+   return result;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51581-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51581-1.c
+@@ -15,4 +15,3 @@ main ()
+   return main1 ();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51581-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51581-2.c
+@@ -15,4 +15,3 @@ main ()
+   return main1 ();
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51581-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51581-3.c
+@@ -115,4 +115,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51581-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51581-4.c
+@@ -163,4 +163,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51590.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51590.c
+@@ -32,4 +32,3 @@ foo (const char *x, struct S *y)
+   bar (&d);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr51799.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr51799.c
+@@ -15,4 +15,3 @@ f0a (uint32_t * __restrict__ result, int8_t * __restrict__ arg1,
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr52091.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr52091.c
+@@ -27,5 +27,4 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr52252-ld.c
+@@ -26,4 +26,3 @@ matrix_mul (byte *in, byte *out, int size)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { i?86-*-* x86_64-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr52252-st.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr52252-st.c
+@@ -18,4 +18,3 @@ matrix_mul (byte *in, byte *out, int size)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { i?86-*-* x86_64-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr53185-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr53185-2.c
+@@ -24,4 +24,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr53773.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr53773.c
+@@ -15,6 +15,4 @@ foo (int integral, int decimal, int power_ten)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "\\* 10" 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/pr55857-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr55857-1.c
+@@ -14,4 +14,3 @@ foo (int *data, unsigned len, const int qlp_coeff[], int lp, int residual[])
+     }    
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr55857-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr55857-2.c
+@@ -18,4 +18,3 @@ void foo (int *data, unsigned len, const int qlp_coeff[],
+       residual[i] = data[i] - ((qlp_coeff[0] * data[i-1]) >> lp);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56695.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56695.c
+@@ -11,4 +11,3 @@ f (void)
+     a |= !(i |= b %= 1);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56787.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56787.c
+@@ -32,4 +32,3 @@ foo (unsigned long n, const float *__restrict u0,
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56826.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56826.c
+@@ -38,4 +38,3 @@ int main()
+   return 0;
+ } 
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56918.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56918.c
+@@ -28,4 +28,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56920.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56920.c
+@@ -18,4 +18,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr56933.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr56933.c
+@@ -42,4 +42,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr57705.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr57705.c
+@@ -63,4 +63,3 @@ main ()
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 3 "vect" { target vect_pack_trunc } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 2 "vect" { target { ! vect_pack_trunc } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr57741-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr57741-1.c
+@@ -18,4 +18,3 @@ foo (float *p, float *q, float x)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr57741-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr57741-2.c
+@@ -41,4 +41,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loop" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr57741-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr57741-3.c
+@@ -40,4 +40,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr58508.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr58508.c
+@@ -68,4 +68,3 @@ void test5 (int* a, int* b)
+ 
+ /* { dg-final { scan-tree-dump-times "hoist" 8 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "hoist" 3 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59354.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59354.c
+@@ -1,4 +1,3 @@
+-/* { dg-do run } */
+ /* { dg-additional-options "-O3" } */
+ 
+ #include "tree-vect.h"
+@@ -38,4 +37,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loop" "vect" { target { vect_pack_trunc } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59519-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59519-1.c
+@@ -16,4 +16,3 @@ foo (void)
+       }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59519-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59519-2.c
+@@ -17,4 +17,3 @@ foo (void)
+       }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59591-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59591-1.c
+@@ -51,4 +51,3 @@ main ()
+ }
+ #endif
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59591-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59591-2.c
+@@ -52,4 +52,3 @@ main ()
+ }
+ #endif
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59594.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59594.c
+@@ -28,4 +28,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59651.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59651.c
+@@ -1,4 +1,3 @@
+ /* PR tree-optimization/59561 */
+ #include "../torture/pr59651.c"
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr59984.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr59984.c
+@@ -62,4 +62,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60012.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60012.c
+@@ -19,4 +19,3 @@ libvector_AccSquareNorm_ref (unsigned int *acc,
+ }
+ 
+ /* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { target { vect_extract_even_odd } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60092-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60092-2.c
+@@ -25,4 +25,3 @@ int *foo (int n)
+ /* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "Peeling for alignment will be applied" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "Vectorizing an unaligned access" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60092.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60092.c
+@@ -17,4 +17,3 @@ int *foo (int n)
+ /* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "Peeling for alignment will be applied" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "Vectorizing an unaligned access" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60196-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60196-1.c
+@@ -30,4 +30,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60196-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60196-2.c
+@@ -29,4 +29,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60276.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60276.c
+@@ -48,4 +48,3 @@ int main(void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60382.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60382.c
+@@ -29,4 +29,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60482.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60482.c
+@@ -17,4 +17,3 @@ foo (double *x, int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "epilog loop required" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60505.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60505.c
+@@ -11,4 +11,3 @@ void foo(char *in, char *out, int num)
+   out[num] = ovec[num/2];
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60656.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60656.c
+@@ -44,4 +44,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_si_to_di_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr60841.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr60841.c
+@@ -180,4 +180,3 @@ foo (struct T *p, struct T *q, int x, int w)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr61194.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr61194.c
+@@ -39,4 +39,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr61634.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr61634.c
+@@ -21,4 +21,3 @@ void fn1 (int p1[], int p2, int p3[], int p4[], int p5[], int *p6)
+     ;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr61680.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr61680.c
+@@ -49,4 +49,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr62021.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr62021.c
+@@ -27,4 +27,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr62073.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr62073.c
+@@ -37,4 +37,3 @@ int foo (long long p_56, int * p_57)
+   return *l_77;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr62075.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr62075.c
+@@ -19,4 +19,3 @@ foo (struct A *x)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63148.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63148.c
+@@ -89,4 +89,3 @@ int main(int argc, char *argv[])
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63189.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63189.c
+@@ -22,4 +22,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63341-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63341-1.c
+@@ -28,4 +28,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63341-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63341-2.c
+@@ -31,4 +31,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63379.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63379.c
+@@ -39,4 +39,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr63605.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr63605.c
+@@ -19,4 +19,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64252.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64252.c
+@@ -1,6 +1,5 @@
+ /* PR target/64252 */
+ /* Test correctness of size 3 store groups permutation.  */
+-/* { dg-do run } */
+ /* { dg-additional-options "-O3" } */
+ /* { dg-additional-options "-mavx" { target avx_runtime } } */
+ 
+@@ -63,4 +62,3 @@ int main()
+       abort ();
+   return 0;
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64404.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64404.c
+@@ -1,4 +1,3 @@
+-/* { dg-do run } */
+ /* { dg-additional-options "--param=sccvn-max-alias-queries-per-access=1" } */
+ 
+ #include "tree-vect.h"
+@@ -56,4 +55,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64421.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64421.c
+@@ -33,4 +33,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64493.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64493.c
+@@ -1,5 +1,3 @@
+-/* { dg-do run } */
+-
+ #include "tree-vect.h"
+ 
+ int a, b, c, d, e, f, g, h;
+@@ -28,4 +26,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64495.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64495.c
+@@ -1,5 +1,3 @@
+-/* { dg-do run } */
+-
+ #include <assert.h>
+ #include "tree-vect.h"
+ 
+@@ -32,4 +30,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64829.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64829.c
+@@ -63,4 +63,3 @@ int fail ( const RMColorData * pInColor,
+   return (0);
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr64844.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr64844.c
+@@ -1,4 +1,3 @@
+-/* { dg-do run } */
+ /* { dg-require-effective-target vect_double } */
+ /* { dg-additional-options "-ffast-math" } */
+ 
+@@ -49,4 +48,3 @@ main()
+    dealing with the known misalignment in loop 2.  */
+ 
+ /* { dg-final { scan-tree-dump-times "loop vectorized" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr65310.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr65310.c
+@@ -20,4 +20,3 @@ int t(b *a)
+ 
+ /* { dg-final { scan-tree-dump "can't force alignment" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "misalign = 0" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr65494.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr65494.c
+@@ -25,4 +25,3 @@ void foo(int n)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" { target { vect_float && vect_intfloat_cvt } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr65518.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr65518.c
+@@ -1,5 +1,3 @@
+-/* { dg-do run } */
+-
+ extern void abort (void);
+ 
+ typedef struct giga
+@@ -40,4 +38,3 @@ int main ()
+    should reject that in the end).  */
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops in function" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/pr66251.c
++++ b/src/gcc/testsuite/gcc.dg/vect/pr66251.c
+@@ -75,4 +75,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/section-anchors-pr27770.c
++++ b/src/gcc/testsuite/gcc.dg/vect/section-anchors-pr27770.c
+@@ -28,4 +28,3 @@ int main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/section-anchors-vect-69.c
++++ b/src/gcc/testsuite/gcc.dg/vect/section-anchors-vect-69.c
+@@ -117,4 +117,3 @@ int main (void)
+   is extended to handle structs.  */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target {vect_int && vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target {vect_int && {! vector_alignment_reachable} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-1.c
+@@ -119,5 +119,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-10.c
+@@ -109,5 +109,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_uintfloat_cvt}} && { ! {vect_int_mult}}} } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-11a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11a.c
+@@ -72,4 +72,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-11b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11b.c
+@@ -46,4 +46,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided4 && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided4 && vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-11c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11c.c
+@@ -43,4 +43,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0  "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-12a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-12a.c
+@@ -77,4 +77,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-12b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-12b.c
+@@ -47,5 +47,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  { target { ! { vect_strided2 && vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target { vect_strided2 && vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  { target { ! { vect_strided2 && vect_int_mult } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-12c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-12c.c
+@@ -50,4 +50,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  { target { ! vect_int_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_int_mult } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-13-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-13-big-array.c
+@@ -137,5 +137,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" { xfail *-*-* }  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-13.c
+@@ -129,5 +129,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" { xfail *-*-* }  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-14.c
+@@ -112,5 +112,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } }  */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-15.c
+@@ -114,5 +114,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  {target  { ! { vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" {target { ! { vect_int_mult } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-16.c
+@@ -67,5 +67,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_int_mult } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-17.c
+@@ -52,5 +52,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-18.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-18.c
+@@ -93,5 +93,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-19a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-19a.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided8 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided8 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided8} } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-19b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-19b.c
+@@ -55,4 +55,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided4 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided4 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-19c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-19c.c
+@@ -92,4 +92,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-2.c
+@@ -141,5 +141,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-20.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-20.c
+@@ -111,5 +111,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-21.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-21.c
+@@ -203,5 +203,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target  { ! { vect_strided4 || vect_extract_even_odd } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided4 }  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  { target { ! { vect_strided4 } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-22.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-22.c
+@@ -130,5 +130,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 6 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-23.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-23.c
+@@ -109,5 +109,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_strided8 && { ! { vect_no_align} } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! { vect_strided8 || vect_no_align } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-24-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-24-big-array.c
+@@ -96,4 +96,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { xfail { vect_no_align && ilp32 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-24.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-24.c
+@@ -81,4 +81,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && ilp32 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { xfail { vect_no_align && ilp32 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-25.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-25.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_natural_alignment } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-26.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-26.c
+@@ -48,5 +48,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-28.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-28.c
+@@ -82,5 +82,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-3-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-3-big-array.c
+@@ -151,5 +151,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 4 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-3.c
+@@ -143,5 +143,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-33.c
+@@ -107,5 +107,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target {vect_uintfloat_cvt && vect_int_mult} } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  {target {{! { vect_uintfloat_cvt}} && vect_int_mult} } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  {target {{! { vect_uintfloat_cvt}} && {! {vect_int_mult}}} } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-34-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-34-big-array.c
+@@ -65,5 +65,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-34.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-34.c
+@@ -57,5 +57,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-35.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-35.c
+@@ -69,5 +69,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-36.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-36.c
+@@ -73,4 +73,3 @@ test_3 (void)
+ 
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-37.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-37.c
+@@ -63,5 +63,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-38.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-38.c
+@@ -21,4 +21,3 @@ void Compute(void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 1 "vect" { target { vect_float && vect_perm } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-39.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-39.c
+@@ -22,4 +22,3 @@ void bar (double w)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-4-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-4-big-array.c
+@@ -131,5 +131,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-4.c
+@@ -123,5 +123,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-5.c
+@@ -122,5 +122,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-6.c
+@@ -118,5 +118,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  {target  { ! { vect_int_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" {target vect_int_mult  } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" {target  { ! { vect_int_mult } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-7.c
+@@ -124,5 +124,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { target { ! { vect_short_mult } } } } }*/
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect"  { target vect_short_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  { target { ! { vect_short_mult } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+  
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-8.c
+@@ -43,4 +43,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target powerpc*-*-* i?86-*-* x86_64-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target powerpc*-*-* i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-9.c
+@@ -45,5 +45,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } }*/
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-1.c
+@@ -123,4 +123,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-2-big-array.c
+@@ -124,4 +124,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-2.c
+@@ -124,4 +124,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-3.c
+@@ -80,5 +80,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-4.c
+@@ -83,4 +83,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-1.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-10.c
+@@ -47,5 +47,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_pack_trunc } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-11-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-11-big-array.c
+@@ -58,5 +58,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c
+@@ -50,5 +50,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-12.c
+@@ -63,5 +63,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-2.c
+@@ -78,5 +78,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-3.c
+@@ -89,4 +89,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail sparc*-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { xfail sparc*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-4.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-5.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-6.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_pack_trunc } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-7.c
+@@ -53,5 +53,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-8.c
+@@ -41,5 +41,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-multitypes-9.c
+@@ -41,5 +41,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_pack_trunc } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect"  { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-1.c
+@@ -59,5 +59,4 @@ int main (int argc, const char* argv[])
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-2.c
+@@ -55,5 +55,4 @@ int main (int argc, const char* argv[])
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-3.c
+@@ -68,6 +68,5 @@ int main (int argc, const char* argv[])
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-4.c
+@@ -83,5 +83,4 @@ int main (int argc, const char* argv[])
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect"  } } */
+ /* { dg-final { scan-tree-dump "permutation requires at least three vectors" "vect" { target vect_perm} } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-5.c
+@@ -74,6 +74,5 @@ int main (int argc, const char* argv[])
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-6.c
+@@ -73,5 +73,4 @@ int main (int argc, const char* argv[])
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-7.c
+@@ -70,8 +70,7 @@ int main (int argc, const char* argv[])
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_perm } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect"  { target vect_perm } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-8.c
+@@ -55,5 +55,4 @@ int main (int argc, const char* argv[])
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_perm_byte && vect_char_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_perm_byte && {! vect_char_mult } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm_byte } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-9.c
+@@ -58,5 +58,4 @@ int main (int argc, const char* argv[])
+ /* { dg-final { scan-tree-dump-times "permutation requires at least three vectors" 1 "vect" { target vect_perm_short } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { {! vect_perm } || {! vect_sizes_32B_16B } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { { vect_perm } && { vect_sizes_32B_16B } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-1.c
+@@ -44,5 +44,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_add } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-2.c
+@@ -39,5 +39,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_add } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-3.c
+@@ -59,4 +59,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_short_mult && { vect_widen_sum_hi_to_si  && vect_unpack } } } } } */ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail { vect_widen_sum_hi_to_si_pattern ||  { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-4.c
+@@ -58,5 +58,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-5.c
+@@ -44,5 +44,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-reduc-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-reduc-6.c
+@@ -45,5 +45,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_int_add || { ! { vect_unpack || vect_strided2 } } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "different interleaving chains in one node" 1 "vect" { target { ! vect_no_int_add } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-half.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-half.c
+@@ -48,5 +48,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-s16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-s16.c
+@@ -39,5 +39,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-u8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/slp-widen-mult-u8.c
+@@ -39,5 +39,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target vect_int } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target vect_int } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/unswitch-loops-pr26969.c
++++ b/src/gcc/testsuite/gcc.dg/vect/unswitch-loops-pr26969.c
+@@ -12,4 +12,3 @@ ruby_re_compile_fastmap (char *fastmap, int options)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt.c
+@@ -20,4 +20,3 @@ int main (int argc, char *argv[]) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times ">> k.\[0-9_\]*" 1 "veclower21" } } */
+-/* { dg-final { cleanup-tree-dump "veclower21" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt1.c
+@@ -18,4 +18,3 @@ int main (int argc, char *argv[]) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times ">> 2" 1 "veclower21" } } */
+-/* { dg-final { cleanup-tree-dump "veclower21" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vec-scal-opt2.c
+@@ -17,4 +17,3 @@ int main (int argc, char *argv[]) {
+ }
+ 
+ /* { dg-final { scan-tree-dump-times ">> 2" 1 "veclower21" } } */
+-/* { dg-final { cleanup-tree-dump "veclower21" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-1-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-1-big-array.c
+@@ -88,4 +88,3 @@ foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_strided2 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-1.c
+@@ -88,4 +88,3 @@ foo (int n)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_strided2 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-10-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-10-big-array.c
+@@ -35,4 +35,3 @@ int foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-10.c
+@@ -23,4 +23,3 @@ int foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-100.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-100.c
+@@ -76,5 +76,4 @@ int main (void)
+ 
+ /* Requires versioning.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-103.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-103.c
+@@ -56,5 +56,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "dependence distance modulo vf == 0" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-104.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-104.c
+@@ -66,5 +66,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-105-big-array.c
+@@ -102,5 +102,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-105.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-105.c
+@@ -68,5 +68,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-106.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-106.c
+@@ -69,5 +69,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-107.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-107.c
+@@ -42,4 +42,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-108.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-108.c
+@@ -37,5 +37,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-109.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-109.c
+@@ -77,5 +77,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_element_align } } } */
+ /* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 2 "vect" { xfail vect_element_align } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" { target vect_element_align } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-11.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-110.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-110.c
+@@ -35,6 +35,5 @@ int main (void)
+ }
+      
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-112-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-112-big-array.c
+@@ -45,6 +45,5 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-112.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-112.c
+@@ -34,6 +34,5 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-113.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-113.c
+@@ -33,4 +33,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target powerpc*-*-* i?86-*-* x86_64-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-114.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-114.c
+@@ -36,5 +36,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_perm  } } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_perm } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-115.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-115.c
+@@ -72,6 +72,5 @@ int main (void)
+ }
+           
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-116.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-116.c
+@@ -30,4 +30,3 @@ int main()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-117.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-117.c
+@@ -62,5 +62,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-118.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-118.c
+@@ -9,4 +9,3 @@ void f(short * __restrict__ a, short * __restrict__ b, short * __restrict__ x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-119.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-119.c
+@@ -26,4 +26,3 @@ unsigned int foo (const unsigned int x[OUTER][INNER][2])
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Detected interleaving of size 2" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-11a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-11a.c
+@@ -62,4 +62,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-12.c
+@@ -41,4 +41,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-120.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-120.c
+@@ -34,4 +34,3 @@ tV()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-121.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-121.c
+@@ -15,4 +15,3 @@ test (int start, int end)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-122.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-122.c
+@@ -56,4 +56,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-123.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-123.c
+@@ -12,4 +12,3 @@ void foo (int s)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-124.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-124.c
+@@ -27,4 +27,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-13.c
+@@ -40,4 +40,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_max } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-14.c
+@@ -34,4 +34,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-15-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-15-big-array.c
+@@ -45,4 +45,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_perm && vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-15.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_perm && vect_hw_misalign } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-17.c
+@@ -127,4 +127,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_bitwise } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-18.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-18.c
+@@ -126,4 +126,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_bitwise } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-19.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-19.c
+@@ -126,4 +126,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_bitwise } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-2-big-array.c
+@@ -48,4 +48,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-2.c
+@@ -38,4 +38,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-20.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-20.c
+@@ -98,4 +98,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_bitwise } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-21.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-21.c
+@@ -127,4 +127,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { target vect_condition } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-22.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-22.c
+@@ -124,4 +124,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-23.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-23.c
+@@ -125,4 +125,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-24.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-24.c
+@@ -125,4 +125,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-25.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-25.c
+@@ -52,4 +52,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-26.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-26.c
+@@ -38,4 +38,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-27.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-27.c
+@@ -48,4 +48,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-28.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-28.c
+@@ -42,4 +42,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-29.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-29.c
+@@ -54,4 +54,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" {target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-3.c
+@@ -49,4 +49,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-30.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-30.c
+@@ -62,4 +62,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-31-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-31-big-array.c
+@@ -87,4 +87,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-31.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-31.c
+@@ -87,4 +87,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-32-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-32-big-array.c
+@@ -37,4 +37,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-32.c
+@@ -37,4 +37,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-33-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-33-big-array.c
+@@ -41,4 +41,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target vector_alignment_reachable } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-33.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-33.c
+@@ -40,4 +40,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump "Vectorizing an unaligned access" "vect" { target { { { ! powerpc*-*-* } && vect_hw_misalign } && { { ! vect64 } || vect_multiple_sizes } } } } }  */
+ /* { dg-final { scan-tree-dump "Alignment of access forced using peeling" "vect" { target { vector_alignment_reachable && { vect64 && {! vect_multiple_sizes} } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { {! vector_alignment_reachable} || {! vect64} } && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-34-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-34-big-array.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-34.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-34.c
+@@ -38,4 +38,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-35-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-35-big-array.c
+@@ -47,4 +47,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { xfail { ia64-*-* sparc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "can't determine dependence between" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-35.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-35.c
+@@ -47,4 +47,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"  { xfail { ia64-*-* sparc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump "can't determine dependence between" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-36-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-36-big-array.c
+@@ -44,4 +44,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-36.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-36.c
+@@ -44,4 +44,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-38.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-38.c
+@@ -37,4 +37,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-4.c
+@@ -39,4 +39,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-40.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-40.c
+@@ -60,4 +60,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"} } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-42.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-42.c
+@@ -69,4 +69,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || { { !  vector_alignment_reachable } || vect_element_align  } } } } }  */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" { target vect_element_align } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || { { ! vector_alignment_reachable } || vect_element_align } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-44.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-44.c
+@@ -69,4 +69,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && {{! vect_no_align} && {! vect_hw_misalign} } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-46.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-46.c
+@@ -62,4 +62,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-48.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-48.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-5.c
+@@ -56,4 +56,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-50.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-50.c
+@@ -66,4 +66,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && { {! vect_no_align } && {! vect_hw_misalign } } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-52.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-52.c
+@@ -59,4 +59,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-54.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-54.c
+@@ -62,4 +62,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-56.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-56.c
+@@ -72,4 +72,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { vect_element_align } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-58.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-58.c
+@@ -60,4 +60,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-6-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-6-big-array.c
+@@ -77,4 +77,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-6.c
+@@ -56,4 +56,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-60.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-60.c
+@@ -73,4 +73,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { vect_element_align } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-62.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-62.c
+@@ -67,4 +67,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-63.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-63.c
+@@ -43,4 +43,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-64.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-64.c
+@@ -83,4 +83,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-65.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-65.c
+@@ -80,4 +80,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-66.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-66.c
+@@ -93,4 +93,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-67.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-67.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-68.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-68.c
+@@ -86,4 +86,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-7.c
+@@ -50,4 +50,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-70.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-70.c
+@@ -66,4 +66,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" {target { vector_alignment_reachable} } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" {target {{! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-71.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-71.c
+@@ -37,4 +37,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-72.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-72.c
+@@ -49,4 +49,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-73-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-73-big-array.c
+@@ -49,4 +49,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-73.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-73.c
+@@ -40,4 +40,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-74-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-74-big-array.c
+@@ -65,4 +65,3 @@ int main (void)
+  dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail vect_no_align } }
+  dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } }
+ */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-74.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-74.c
+@@ -49,4 +49,3 @@ int main (void)
+  dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail vect_no_align } } 
+  dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } }  
+ */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-75-big-array.c
+@@ -54,4 +54,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /*  { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-75.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-75.c
+@@ -46,4 +46,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-76-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-76-big-array.c
+@@ -80,4 +80,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-76.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-76.c
+@@ -71,4 +71,3 @@ int main (void)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-77-alignchecks.c
+@@ -53,4 +53,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {! vect_no_align} && { unaligned_stack && vector_alignment_reachable } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && { vect_no_align && { ! vect_hw_misalign } } } || {unaligned_stack && { {! vector_alignment_reachable} && {! vect_no_align } } } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { { unaligned_stack && { vector_alignment_reachable && vect_no_align } } || {unaligned_stack && { {! vector_alignment_reachable} && vect_no_align } } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-77-global.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-77-global.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-77.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-77.c
+@@ -43,4 +43,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-78-alignchecks.c
+@@ -54,4 +54,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { {! vect_no_align} && { unaligned_stack && vector_alignment_reachable } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { {! unaligned_stack} && { vect_no_align && { ! vect_hw_misalign } } } || {unaligned_stack && { {! vector_alignment_reachable} && { ! vect_no_align } } } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { { unaligned_stack && { vector_alignment_reachable && vect_no_align } } || {unaligned_stack && { {! vector_alignment_reachable} && vect_no_align } } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-78-global.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-78-global.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-78.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-78.c
+@@ -43,4 +43,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-8.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-80-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-80-big-array.c
+@@ -68,4 +68,3 @@ int main (void)
+  dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } }
+  dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target vect_no_align } }
+ */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-80.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-80.c
+@@ -53,4 +53,3 @@ int main (void)
+  dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } } 
+  dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target vect_no_align } } 
+ */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-82.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-82.c
+@@ -34,4 +34,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-82_64.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-82_64.c
+@@ -37,4 +37,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-83.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-83.c
+@@ -34,4 +34,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-83_64.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-83_64.c
+@@ -37,4 +37,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-85-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-85-big-array.c
+@@ -46,4 +46,3 @@ int main (void)
+ 
+ /* Fails for targets that don't vectorize PLUS (e.g alpha).  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-85.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-85.c
+@@ -46,4 +46,3 @@ int main (void)
+ 
+ /* Fails for targets that don't vectorize PLUS (e.g alpha).  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-86.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-86.c
+@@ -53,4 +53,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-87.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-87.c
+@@ -53,4 +53,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" {target vector_alignment_reachable} } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" {target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-88.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-88.c
+@@ -53,4 +53,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" {target vector_alignment_reachable } } }  */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" {target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-89-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-89-big-array.c
+@@ -47,4 +47,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-89.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-89.c
+@@ -47,4 +47,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-9.c
+@@ -37,4 +37,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-91.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-91.c
+@@ -62,4 +62,3 @@ main3 ()
+ /* { dg-final { scan-tree-dump-times "accesses have the same alignment." 2 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 3 "vect" {target { vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" {target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-92.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-92.c
+@@ -93,4 +93,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-93.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-93.c
+@@ -82,4 +82,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-95.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-95.c
+@@ -66,4 +66,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /*  { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /*  { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-96.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-96.c
+@@ -47,4 +47,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_no_align} && vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || { { ! vector_alignment_reachable} || vect_element_align } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { { vect_no_align && { ! vect_hw_misalign } } || { {! vector_alignment_reachable} && {! vect_element_align} } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-97-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-97-big-array.c
+@@ -70,4 +70,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-97.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-97.c
+@@ -62,4 +62,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-98-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-98-big-array.c
+@@ -54,4 +54,3 @@ int main (void)
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail  vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-98.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-98.c
+@@ -40,4 +40,3 @@ int main (void)
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail  vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-99.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-99.c
+@@ -30,4 +30,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-aggressive-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-aggressive-1.c
+@@ -1,4 +1,3 @@
+-/* { dg-do run } */
+ /* { dg-require-effective-target vect_condition } */
+ /* { dg-require-effective-target vect_simd_clones } */
+ /* { dg-additional-options "-fopenmp-simd" } */
+@@ -60,4 +59,3 @@ default:
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-alias-check.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-alias-check.c
+@@ -15,4 +15,3 @@ void foo (int *a, int *b)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-align-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-align-1.c
+@@ -50,4 +50,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_hw_misalign } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { xfail vect_hw_misalign} } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-align-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-align-2.c
+@@ -45,4 +45,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { xfail vect_hw_misalign} } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-align-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-align-3.c
+@@ -52,4 +52,3 @@ f4 (int x, int y)
+ 
+ /* { dg-final { scan-tree-dump-not "vect_do_peeling_for_loop_bound" "vect" } } */
+ /* { dg-final { scan-tree-dump-not "loop peeled for vectorization" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-all-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-all-big-array.c
+@@ -253,4 +253,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-all.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-all.c
+@@ -219,4 +219,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target { { vect_aligned_arrays } && {! vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_aligned_arrays } && {vect_sizes_32B_16B} } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-bool-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-bool-1.c
+@@ -12,4 +12,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-bswap16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-bswap16.c
+@@ -41,4 +41,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-bswap32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-bswap32.c
+@@ -41,4 +41,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-bswap64.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-bswap64.c
+@@ -41,4 +41,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-complex-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-complex-1.c
+@@ -52,4 +52,3 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-complex-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-complex-2.c
+@@ -52,4 +52,3 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-complex-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-complex-4.c
+@@ -105,4 +105,3 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-complex-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-complex-5.c
+@@ -41,4 +41,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-1.c
+@@ -52,6 +52,5 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-10.c
+@@ -163,4 +163,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 8 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-11.c
+@@ -113,4 +113,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-2.c
+@@ -43,6 +43,5 @@ int main (void)
+ /* The order of computation should not be changed for cond_expr, therefore, 
+    it cannot be vectorized in reduction.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-3.c
+@@ -60,6 +60,5 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-4.c
+@@ -57,6 +57,5 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-5.c
+@@ -57,5 +57,4 @@ int main ()
+    of computation is the same, but vector results should be reduced to scalar
+    result, which can'be done for cond_expr.  */
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-6.c
+@@ -55,5 +55,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-7.c
+@@ -65,4 +65,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-8.c
+@@ -119,4 +119,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 5 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-9.c
+@@ -198,4 +198,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 10 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-1.c
+@@ -16,5 +16,4 @@ int foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cond-reduc-2.c
+@@ -15,5 +15,4 @@ void foo(int k)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cselim-1.c
+@@ -83,4 +83,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vect_strided2 } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-cselim-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-cselim-2.c
+@@ -62,4 +62,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-1.c
+@@ -51,5 +51,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-2.c
+@@ -51,5 +51,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-3.c
+@@ -62,5 +62,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-4.c
+@@ -51,5 +51,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-5.c
+@@ -53,5 +53,4 @@ int main ()
+ /* Vectorization of loops with multiple types and double reduction is not 
+    supported yet.  */       
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-6-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-6-big-array.c
+@@ -61,5 +61,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-6.c
+@@ -45,5 +45,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-double-reduc-7.c
+@@ -60,5 +60,4 @@ int main ()
+ }
+         
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 3 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+       
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-dv-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-dv-1.c
+@@ -19,4 +19,3 @@ void foo()
+ 	x[j-63]=x[j-3]-x[j];
+       }
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-float-extend-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-float-extend-1.c
+@@ -38,4 +38,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail spu*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-float-truncate-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-float-truncate-1.c
+@@ -37,4 +37,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail spu*-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-floatint-conversion-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-floatint-conversion-1.c
+@@ -38,4 +38,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_floatint_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-floatint-conversion-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-floatint-conversion-2.c
+@@ -37,4 +37,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_floatint_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-fold-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-fold-1.c
+@@ -13,4 +13,3 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "c =.* { 6, 8, 10, 12 }" 1 "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-10.c
+@@ -9,4 +9,3 @@ foo (int j, double *v, double x)
+       x = v[i];
+   return x;
+ }
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-11.c
+@@ -0,0 +1,36 @@
++/* { dg-require-effective-target vect_condition } */
++/* { dg-require-effective-target vect_int } */
++
++#include "tree-vect.h"
++
++#define N 16
++
++extern void abort (void);
++
++int A[N] = {36, 39, 42, 45, 43, 32, 21, 12, 23, 34, 45, 56, 67, 78, 81, 11};
++int B[N] = {144,195,210,225,172,128,105,60, 92, 136,225,280,268,390,324,55};
++
++__attribute__((noinline))
++void foo ()
++{
++  for (int i = 0; i < N; i++)
++    {
++      int m = (A[i] & i) ? 5 : 4;
++      A[i] = A[i] * m;
++    }
++}
++
++int main ()
++{
++
++  check_vect ();
++  foo ();
++  /* check results:  */
++  for (int i = 0; i < N; i++)
++    if (A[i] != B[i])
++      abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-16.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-17.c
+@@ -31,4 +31,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-2.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-3.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-4.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-5.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-6.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-7.c
+@@ -33,4 +33,3 @@ int main ()
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ifcvt-9.c
+@@ -36,4 +36,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-1.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-2.c
+@@ -38,4 +38,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-3.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-4a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-4a.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-4b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-intfloat-conversion-4b.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-1.c
+@@ -39,4 +39,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-10.c
+@@ -33,4 +33,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-11.c
+@@ -29,4 +29,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-2.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-3.c
+@@ -41,4 +41,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-4.c
+@@ -41,4 +41,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-5.c
+@@ -37,4 +37,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail {! arm_neon_ok } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-6.c
+@@ -46,4 +46,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-7.c
+@@ -39,4 +39,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-8-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-8-big-array.c
+@@ -40,4 +40,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_pack_trunc && vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-8.c
+@@ -40,4 +40,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_pack_trunc && vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-8a-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-8a-big-array.c
+@@ -40,4 +40,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_pack_trunc && vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-8a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-8a.c
+@@ -40,4 +40,3 @@ int main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_pack_trunc && vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-iv-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-iv-9.c
+@@ -35,4 +35,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_int_mult } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target {! vect_int_mult } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ivdep-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ivdep-1.c
+@@ -15,4 +15,3 @@ void foo(int n, int *a, int *b, int *c, int *d, int *e) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-ivdep-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-ivdep-2.c
+@@ -31,4 +31,3 @@ void bar(int n, int *a, int *b, int *c) {
+ 
+ /* { dg-message "loop vectorized" "" { target *-*-* } 0 } */
+ /* { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-mask-load-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-mask-load-1.c
+@@ -48,4 +48,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 1 "vect" { target avx_runtime } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-mask-loadstore-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-mask-loadstore-1.c
+@@ -46,4 +46,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops" 1 "vect" { target avx_runtime } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c
+@@ -84,5 +84,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {{ vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B }}} } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail {{ vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B }}} } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-10.c
+@@ -64,5 +64,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-11.c
+@@ -40,5 +40,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-12.c
+@@ -42,5 +42,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target sparc*-*-* xfail ilp32 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { ! sparc*-*-* }  && { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-13.c
+@@ -60,5 +60,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-14.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-15.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-15.c
+@@ -46,5 +46,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_sdot_hi  || vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-16.c
+@@ -36,5 +36,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_unpack } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-17.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-17.c
+@@ -41,5 +41,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-2.c
+@@ -45,5 +45,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-3.c
+@@ -56,5 +56,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c
+@@ -97,5 +97,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 8 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { target { vect_element_align  } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-5.c
+@@ -49,5 +49,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { sparc*-*-* && ilp32 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-6.c
+@@ -63,5 +63,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { sparc*-*-* && ilp32 } }} } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 6 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 6 "vect" {xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-7.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot_hi } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-8.c
+@@ -47,5 +47,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-9.c
+@@ -60,5 +60,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-neg-store-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-neg-store-1.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-neg-store-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-neg-store-2.c
+@@ -36,4 +36,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-1.c
+@@ -44,5 +44,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-2.c
+@@ -43,5 +43,4 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-nest-cycle-3.c
+@@ -53,4 +53,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-nop-move.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-nop-move.c
+@@ -78,5 +78,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-rtl-dump "deleting noop move" "combine" { target aarch64*-*-* } } } */
+-/* { dg-final { cleanup-rtl-dump "combine" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1-big-array.c
+@@ -24,4 +24,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c
+@@ -24,4 +24,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a-big-array.c
+@@ -22,4 +22,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c
+@@ -22,4 +22,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b-big-array.c
+@@ -24,4 +24,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c
+@@ -24,4 +24,3 @@ foo (){
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2-big-array.c
+@@ -38,4 +38,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2.c
+@@ -38,4 +38,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2a-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2a-big-array.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2a.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2b.c
+@@ -39,4 +39,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 1 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2c-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2c-big-array.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2c.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-2d.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-2d.c
+@@ -38,4 +38,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3-big-array.c
+@@ -49,4 +49,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3.c
+@@ -49,4 +49,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a-big-array.c
+@@ -50,4 +50,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3a.c
+@@ -50,4 +50,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "step doesn't divide the vector-size" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3b.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 2 "vect" { target { ! vect_multiple_sizes } } } } */
+ /* { dg-final { scan-tree-dump-times "grouped access in outer loop" 4 "vect" { target vect_multiple_sizes } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-3c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-3c.c
+@@ -49,4 +49,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4.c
+@@ -52,4 +52,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "zero step in outer loop." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4a-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4a-big-array.c
+@@ -23,4 +23,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target { vect_widen_mult_hi_to_si && vect_pack_trunc } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4a.c
+@@ -23,4 +23,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target { vect_widen_mult_hi_to_si && vect_pack_trunc } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4b-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4b-big-array.c
+@@ -23,4 +23,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4b.c
+@@ -23,4 +23,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4c-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4c-big-array.c
+@@ -25,4 +25,3 @@ foo (){
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target { vect_short_mult && { ! vect_no_align } } } } } */
+ /* { dg-final { scan-tree-dump-times "zero step in outer loop." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4c.c
+@@ -25,4 +25,3 @@ foo (){
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target { vect_short_mult && { ! vect_no_align } } } } } */
+ /* { dg-final { scan-tree-dump "zero step in outer loop." "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4d-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4d-big-array.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4d.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4d.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4e.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4e.c
+@@ -24,4 +24,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4f.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4f.c
+@@ -66,4 +66,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4g.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4g.c
+@@ -66,4 +66,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4i.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4i.c
+@@ -46,4 +46,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4j.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4j.c
+@@ -22,4 +22,3 @@ foo (){
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4k.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4k.c
+@@ -66,4 +66,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4l.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4l.c
+@@ -66,4 +66,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4m-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4m-big-array.c
+@@ -55,4 +55,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-4m.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-4m.c
+@@ -55,4 +55,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect"  { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-5.c
+@@ -79,4 +79,3 @@ int main ()
+ /* { dg-final { scan-tree-dump-times "not vectorized: possible dependence between data-refs" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump "zero step in outer loop." "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-6.c
+@@ -63,4 +63,3 @@ int main ()
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "zero step in outer loop." 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-big-array.c
+@@ -71,4 +71,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb-big-array.c
+@@ -75,4 +75,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir-lb.c
+@@ -75,4 +75,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-fir.c
+@@ -71,4 +71,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1-big-array.c
+@@ -62,5 +62,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 2 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" { target { ! vect_widen_shift } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-1.c
+@@ -63,5 +63,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" { target { { ! vect_sizes_32B_16B } && { ! vect_widen_shift } } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 8 "vect" { target vect_sizes_32B_16B } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2-big-array.c
+@@ -61,5 +61,4 @@ int main (void)
+ /* Final value stays in int, so no over-widening is detected at the moment.  */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-2.c
+@@ -61,5 +61,4 @@ int main (void)
+ /* Final value stays in int, so no over-widening is detected at the moment.  */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3-big-array.c
+@@ -60,5 +60,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-3.c
+@@ -60,5 +60,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump "vect_recog_over_widening_pattern: detected" "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4-big-array.c
+@@ -66,5 +66,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 2 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" { target { ! vect_widen_shift } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-over-widen-4.c
+@@ -67,5 +67,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 4 "vect" { target { { ! vect_sizes_32B_16B } && { ! vect_widen_shift } } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_over_widening_pattern: detected" 8 "vect" { target vect_sizes_32B_16B } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c
+@@ -50,4 +50,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-3.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect"  { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c
+@@ -48,4 +48,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect"  { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-pre-interact.c
+@@ -13,4 +13,3 @@ void foo (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-recip.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-recip.c
+@@ -17,4 +17,3 @@ void f(float *__restrict__ qa, float *__restrict__ qb,
+   }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1.c
+@@ -53,4 +53,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail { vect_no_int_add || vect_no_int_max } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-10.c
+@@ -48,4 +48,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1char-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1char-big-array.c
+@@ -68,4 +68,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1char.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-1short.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2.c
+@@ -50,4 +50,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail { vect_no_int_add || vect_no_int_max } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2char-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2char-big-array.c
+@@ -66,4 +66,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2char.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2short.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-2short.c
+@@ -46,4 +46,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail *-*-* } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-3.c
+@@ -39,4 +39,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_int_add } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-6.c
+@@ -51,4 +51,3 @@ int main (void)
+ /* need -ffast-math to vectorizer these loops.  */
+ /* ARM NEON passes -ffast-math to these tests, so expect this to fail.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail arm_neon_ok } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-7.c
+@@ -75,4 +75,3 @@ int main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-8.c
+@@ -75,4 +75,3 @@ int main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-9.c
+@@ -75,4 +75,3 @@ int main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16a.c
+@@ -52,5 +52,4 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot_hi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16b.c
+@@ -53,5 +53,4 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_short_mult } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_hi_to_si } && { ! vect_unpack } } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s16c.c
+@@ -69,5 +69,4 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8a.c
+@@ -55,4 +55,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot_qi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi && vect_widen_sum_hi_to_si } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8b.c
+@@ -63,4 +63,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-s8c.c
+@@ -43,4 +43,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_unpack } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u16a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u16a.c
+@@ -49,4 +49,3 @@ int main (void)
+ /* The initialization loop in main also gets vectorized.  */
+ /* { dg-final { scan-tree-dump-times "vect_recog_dot_prod_pattern: detected" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_short_mult && vect_widen_sum_hi_to_si } } } } */ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u16b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u16b.c
+@@ -56,4 +56,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail *-*-* } } } */ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_pack_trunc } } } */ 
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8a.c
+@@ -52,5 +52,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_udot_qi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi && vect_widen_sum_qi_to_si } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-dot-u8b.c
+@@ -51,5 +51,4 @@ dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_udot
+ */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" {target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-mul_1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-mul_1.c
+@@ -32,5 +32,4 @@ main (unsigned char argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Reduce using vector shifts" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-mul_2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-mul_2.c
+@@ -28,5 +28,4 @@ main (unsigned char argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Reduce using vector shifts" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-or_1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-or_1.c
+@@ -31,5 +31,4 @@ main (unsigned char argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Reduce using vector shifts" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-or_2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-or_2.c
+@@ -27,5 +27,4 @@ main (unsigned char argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Reduce using vector shifts" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1a.c
+@@ -37,4 +37,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_hi_to_si } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1b-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1b-big-array.c
+@@ -46,4 +46,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1b.c
+@@ -37,4 +37,3 @@ main (void)
+ /* { dg-final { scan-tree-dump "vect_recog_widen_sum_pattern: detected" "vect"} } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1c-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1c-big-array.c
+@@ -46,4 +46,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_qi_to_hi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_qi_to_hi } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-1c.c
+@@ -37,4 +37,3 @@ main (void)
+ /* { dg-final { scan-tree-dump "vect_recog_widen_sum_pattern: detected" "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_qi_to_hi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_qi_to_hi } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2a.c
+@@ -37,4 +37,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_hi_to_si } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2b-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2b-big-array.c
+@@ -47,4 +47,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si && vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2b.c
+@@ -37,4 +37,3 @@ main (void)
+ /* { dg-final { scan-tree-dump "vect_recog_widen_sum_pattern: detected" "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_sum_qi_to_si && vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { { ! vect_widen_sum_qi_to_si } && { ! vect_unpack } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-2c.c
+@@ -45,4 +45,3 @@ main (void)
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_sum_pattern: detected" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail *-*-* } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_qi_to_hi } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-pattern-3.c
+@@ -37,5 +37,4 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c
+@@ -51,5 +51,4 @@ main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_sad_pattern: detected" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btrunc.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btrunc.c
+@@ -14,4 +14,3 @@ foo (double *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btrunc } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btruncf.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btruncf.c
+@@ -14,4 +14,3 @@ foo (float *output, float *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btruncf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceil.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceil.c
+@@ -14,4 +14,3 @@ foo (double *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceil } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceilf.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceilf.c
+@@ -14,4 +14,3 @@ foo (float *output, float *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceilf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floor.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floor.c
+@@ -14,4 +14,3 @@ foo (double *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floor } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floorf.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floorf.c
+@@ -14,4 +14,3 @@ foo (float *output, float *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floorf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lceil.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lceil.c
+@@ -14,4 +14,3 @@ foo (long *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_lceil } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lfloor.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lfloor.c
+@@ -14,4 +14,3 @@ foo (long *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_lfloor } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyint.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyint.c
+@@ -14,4 +14,3 @@ foo (double *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_nearbyint } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyintf.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyintf.c
+@@ -14,4 +14,3 @@ foo (float *output, float *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_nearbyintf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-round.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-round.c
+@@ -14,4 +14,3 @@ foo (double *output, double *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_round } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-roundf.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-roundf.c
+@@ -14,4 +14,3 @@ foo (float *output, float *input)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_roundf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-sdivmod-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-sdivmod-1.c
+@@ -95,4 +95,3 @@ main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" { target vect_condition } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-1.c
+@@ -29,4 +29,3 @@ int main ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c
+@@ -187,4 +187,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-2.c
+@@ -187,4 +187,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-3.c
+@@ -34,4 +34,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-shift-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-shift-4.c
+@@ -34,4 +34,3 @@ int main()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-1.c
+@@ -56,4 +56,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10.c
+@@ -81,4 +81,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-10a.c
+@@ -16,4 +16,3 @@ bar (int a, int b, long int c)
+   return a + b + c;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-11.c
+@@ -64,4 +64,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12.c
+@@ -5,4 +5,3 @@
+ 
+ #include "vect-simd-clone-10.c"
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12a.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-12a.c
+@@ -16,4 +16,3 @@ bar (int a, int b, long int c)
+   return a + b + c;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-13.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-13.c
+@@ -4,4 +4,3 @@
+ 
+ #include "vect-simd-clone-6.c"
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-14.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-14.c
+@@ -4,4 +4,3 @@
+ 
+ #include "vect-simd-clone-11.c"
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-2.c
+@@ -50,4 +50,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-3.c
+@@ -43,4 +43,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-4.c
+@@ -46,4 +46,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-5.c
+@@ -41,4 +41,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-6.c
+@@ -72,4 +72,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-7.c
+@@ -72,4 +72,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-8.c
+@@ -92,4 +92,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-simd-clone-9.c
+@@ -92,4 +92,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-mult.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-mult.c
+@@ -74,5 +74,4 @@ int main (void)
+ }   
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i2.c
+@@ -58,5 +58,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-i4.c
+@@ -21,7 +21,6 @@ main1 ()
+   s *ptr = arr;
+   s res[N];
+   int i;
+-  unsigned short x, y, z, w;
+ 
+   for (i = 0; i < N; i++)
+     {
+@@ -35,6 +34,7 @@ main1 ()
+ 
+   for (i = 0; i < N; i++)
+     {
++      unsigned short x, y, z, w;
+       x = ptr->b - ptr->a;
+       y = ptr->d - ptr->c;
+       res[i].c = x + y;
+@@ -71,5 +71,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-mult.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u16-mult.c
+@@ -65,5 +65,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u32-mult.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u32-mult.c
+@@ -62,5 +62,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i2-gap.c
+@@ -72,5 +72,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2-big-array.c
+@@ -90,5 +90,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap2.c
+@@ -79,5 +79,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7-big-array.c
+@@ -99,5 +99,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-a-u8-i8-gap7.c
+@@ -84,5 +84,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-float.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-float.c
+@@ -41,5 +41,4 @@ int main (void)
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c
+@@ -74,5 +74,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c
+@@ -74,5 +74,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c
+@@ -75,4 +75,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-a-u8-i2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-a-u8-i2.c
+@@ -56,5 +56,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target { vect_interleave || vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u16-i4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u16-i4.c
+@@ -67,6 +67,5 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect"  { target { { vect_interleave || vect_strided4 } && vect_pack_trunc } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target { { ! { vect_interleave || vect_strided4 } } && { vect_pack_trunc } } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u32-i2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-store-u32-i2.c
+@@ -41,5 +41,4 @@ int main (void)
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave || vect_strided2 } } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail { vect_interleave || vect_strided2 } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i2.c
+@@ -58,5 +58,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i3.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i3.c
+@@ -109,4 +109,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 4 loops" 1 "vect"  { target vect_strided3 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u16-i4.c
+@@ -71,5 +71,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i4.c
+@@ -66,5 +66,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided4 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-i8.c
+@@ -80,5 +80,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-mult.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u32-mult.c
+@@ -61,5 +61,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c
+@@ -74,5 +74,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c
+@@ -57,5 +57,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+    
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2-big-array.c
+@@ -93,5 +93,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c
+@@ -81,5 +81,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-big-array.c
+@@ -114,5 +114,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c
+@@ -114,5 +114,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap4.c
+@@ -101,5 +101,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7-big-array.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7-big-array.c
+@@ -103,5 +103,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap7.c
+@@ -86,5 +86,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c
+@@ -88,5 +88,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+   
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-01.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-01.c
+@@ -36,4 +36,3 @@ main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-02.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-02.c
+@@ -44,4 +44,3 @@ main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c
+@@ -55,4 +55,3 @@ main (void)
+ /* Needs interleaving support.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { xfail  vect_strided2 } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-04.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-04.c
+@@ -35,4 +35,3 @@ main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-slp.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-slp.c
+@@ -53,4 +53,3 @@ main (void)
+ } 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-s16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-s16.c
+@@ -57,5 +57,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-u16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-const-u16.c
+@@ -74,4 +74,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 3 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c
+@@ -56,5 +56,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c
+@@ -45,5 +45,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-s16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-s16.c
+@@ -42,5 +42,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-s8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-s8.c
+@@ -42,5 +42,4 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_qi_to_hi } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-sum.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-sum.c
+@@ -44,4 +44,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u16.c
+@@ -44,5 +44,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8-s16-s32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8-s16-s32.c
+@@ -44,5 +44,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8-u32.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8-u32.c
+@@ -44,5 +44,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u8.c
+@@ -44,5 +44,4 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */
+ /* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_qi_to_hi_pattern } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s16.c
+@@ -103,5 +103,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 8 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-s8.c
+@@ -54,5 +54,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u16.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u16.c
+@@ -54,5 +54,4 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c
++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-shift-u8.c
+@@ -61,4 +61,3 @@ int main (void)
+ 
+ /* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 2 "vect" { target vect_widen_shift } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-7.c
++++ b/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-7.c
+@@ -50,4 +50,3 @@ int main (void)
+ /* Fails for 32-bit targets that don't vectorize PLUS.  */
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-2char.c
++++ b/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-2char.c
+@@ -48,4 +48,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-2short.c
++++ b/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-2short.c
+@@ -47,4 +47,3 @@ int main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" { xfail vect_no_int_max } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c
++++ b/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c
+@@ -54,4 +54,3 @@ dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_sdot
+ /* In the meantime expect: */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_widen_mult_qi_to_hi || vect_unpack } } } } */
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-pattern-2c.c
++++ b/src/gcc/testsuite/gcc.dg/vect/wrapv-vect-reduc-pattern-2c.c
+@@ -38,4 +38,3 @@ main (void)
+ /* { dg-final { scan-tree-dump "vect_recog_widen_sum_pattern: detected" "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_sum_qi_to_hi } } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" { target { ! vect_widen_sum_qi_to_hi } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.dg/vector-shift-2.c
++++ b/src/gcc/testsuite/gcc.dg/vector-shift-2.c
+@@ -10,4 +10,3 @@ f (vec *a)
+ }
+ 
+ /* { dg-final { scan-tree-dump "<< 5" "ccp1" } } */
+-/* { dg-final { cleanup-tree-dump "ccp1" } } */
+--- a/src/gcc/testsuite/gcc.dg/vector-shift.c
++++ b/src/gcc/testsuite/gcc.dg/vector-shift.c
+@@ -10,4 +10,3 @@ f (vec *x)
+ }
+ 
+ /* { dg-final { scan-tree-dump "<< 7" "original" } } */
+-/* { dg-final { cleanup-tree-dump "original" } } */
+--- a/src/gcc/testsuite/gcc.dg/volatile2.c
++++ b/src/gcc/testsuite/gcc.dg/volatile2.c
+@@ -19,4 +19,3 @@ void foo(struct GTeth_softc *sc)
+ }
+ 
+ /* { dg-final { scan-tree-dump "{v}" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.dg/volatile3.c
++++ b/src/gcc/testsuite/gcc.dg/volatile3.c
+@@ -10,4 +10,3 @@ void foo(int i)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "{v}" "ssa" } } */
+-/* { dg-final { cleanup-tree-dump "ssa" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/wide-shift-128.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile { target aarch64*-*-* mips64*-*-* sparc64*-*-* } } */
++/* { dg-require-effective-target int128 } */
++/* { dg-options "-O2 -fdump-rtl-combine" } */
++
++__int128_t
++load2 (int data)
++{
++    return (__int128_t) data << 50;
++}
++
++/* { dg-final { scan-rtl-dump-not "ior" "combine" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/wide-shift-64.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target mips*-*-* sparc*-*-* } } */
++/* { dg-options "-O2 -fdump-rtl-combine" } */
++
++long long
++load1 (int data)
++{
++    return (long long) data << 12;
++}
++
++/* { dg-final { scan-rtl-dump-not "ior" "combine" } } */
+--- a/src/gcc/testsuite/gcc.dg/wmul-1.c
++++ b/src/gcc/testsuite/gcc.dg/wmul-1.c
+@@ -16,4 +16,3 @@ foo (ArrT Arr, int Idx)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "WIDEN_MULT_PLUS_EXPR" "widening_mul" } } */
+-/* { dg-final { cleanup-tree-dump "widening_mul" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c
+@@ -12,6 +12,8 @@
+ 
+ vf2_t vf2 = (vf2_t){ 17.f, 18.f };
+ vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead };
++vlf1_t vlf1 = (vlf1_t) { 17.0 };
++
+ union int128_t qword;
+ 
+ int *int_ptr = (int *)0xabcdef0123456789ULL;
+@@ -41,4 +43,5 @@ FUNC_VAL_CHECK (11,   long double, 98765432123456789.987654321L, Q0, flat)
+ FUNC_VAL_CHECK (12,         vf2_t,        vf2, D0, f32in64)
+ FUNC_VAL_CHECK (13,         vi4_t,        vi4, Q0, i32in128)
+ FUNC_VAL_CHECK (14,         int *,    int_ptr, X0, flat)
++FUNC_VAL_CHECK (15,         vlf1_t,    vlf1, Q0, flat)
+ #endif
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h
+@@ -10,6 +10,9 @@ typedef float vf4_t __attribute__((vector_size (16)));
+ /* 128-bit vector of 4 ints.  */
+ typedef int vi4_t __attribute__((vector_size (16)));
+ 
++/* 128-bit vector of 1 quad precision float.  */
++typedef long double vlf1_t __attribute__((vector_size (16)));
++
+ /* signed quad-word (in an union for the convenience of initialization).  */
+ union int128_t
+ {
+--- a/src/gcc/testsuite/gcc.target/aarch64/abs_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/abs_1.c
+@@ -7,15 +7,14 @@ extern void abort (void);
+ long long
+ abs64 (long long a)
+ {
+-  /* { dg-final { scan-assembler "eor\t" } } */
+-  /* { dg-final { scan-assembler "sub\t" } } */
++  /* { dg-final { scan-assembler "csneg\t" } } */
+   return llabs (a);
+ }
+ 
+ long long
+ abs64_in_dreg (long long a)
+ {
+-  /* { dg-final { scan-assembler "abs\td\[0-9\]+, d\[0-9\]+" } } */
++  /* { dg-final { scan-assembler "csneg\t" } } */
+   register long long x asm ("d8") = a;
+   register long long y asm ("d9");
+   asm volatile ("" : : "w" (x));
+@@ -50,4 +49,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/abs_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/abs_2.c
+@@ -28,4 +28,3 @@ main (int argc, char **argv)
+ 
+ 
+ /* { dg-final { scan-assembler-not "sabd" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32b.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32b.c
+@@ -12,4 +12,3 @@ test_crc32b (uint32_t arg0, uint8_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32b\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cb.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cb.c
+@@ -12,4 +12,3 @@ test_crc32cb (uint32_t arg0, uint8_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32cb\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cd.c
+@@ -12,4 +12,3 @@ test_crc32cd (uint32_t arg0, uint64_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32cx\tw..?, w..?, x..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32ch.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32ch.c
+@@ -12,4 +12,3 @@ test_crc32ch (uint32_t arg0, uint16_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32ch\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cw.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32cw.c
+@@ -12,4 +12,3 @@ test_crc32cw (uint32_t arg0, uint32_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32cw\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32d.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32d.c
+@@ -12,4 +12,3 @@ test_crc32d (uint32_t arg0, uint64_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32x\tw..?, w..?, x..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32h.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32h.c
+@@ -12,4 +12,3 @@ test_crc32h (uint32_t arg0, uint16_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32h\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/acle/crc32w.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/acle/crc32w.c
+@@ -12,4 +12,3 @@ test_crc32w (uint32_t arg0, uint32_t arg1)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32w\tw..?, w..?, w..?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/adds1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/adds1.c
+@@ -12,7 +12,7 @@ adds_si_test1 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -24,7 +24,7 @@ adds_si_test2 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -36,7 +36,7 @@ adds_si_test3 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ typedef long long s64;
+@@ -50,7 +50,7 @@ adds_di_test1 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -62,7 +62,7 @@ adds_di_test2 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -74,7 +74,7 @@ adds_di_test3 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int main ()
+@@ -83,67 +83,66 @@ int main ()
+   s64 y;
+ 
+   x = adds_si_test1 (29, 4, 5);
+-  if (x != 42)
++  if (x != (29 + 4))
+     abort ();
+ 
+-  x = adds_si_test1 (5, 2, 20);
+-  if (x != 29)
++  x = adds_si_test1 (5, 2, -5);
++  if (x != 7)
+     abort ();
+ 
+   x = adds_si_test2 (29, 4, 5);
+-  if (x != 293)
++  if (x != (29 + 0xff))
+     abort ();
+ 
+-  x = adds_si_test2 (1024, 2, 20);
+-  if (x != 1301)
++  x = adds_si_test2 (-255, 2, 20);
++  if (x != -235)
+     abort ();
+ 
+   x = adds_si_test3 (35, 4, 5);
+-  if (x != 76)
++  if (x != (35 + (4 << 3)))
+     abort ();
+ 
+-  x = adds_si_test3 (5, 2, 20);
+-  if (x != 43)
++  x = adds_si_test3 (-(2 << 3), 2, 20);
++  if (x != (20 - (2 << 3)))
+     abort ();
+ 
+   y = adds_di_test1 (0x130000029ll,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+ 
+-  if (y != 0xc75050536)
++  if (y != (0x130000029ll + 0x320000004ll))
+     abort ();
+ 
+   y = adds_di_test1 (0x5000500050005ll,
+-		     0x2111211121112ll,
++		     -0x5000500050005ll,
+ 		     0x0000000002020ll);
+-  if (y != 0x9222922294249)
++  if (y != (0x5000500050005ll + 0x0000000002020ll))
+     abort ();
+ 
+   y = adds_di_test2 (0x130000029ll,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+-  if (y != 0x955050631)
++  if (y != (0x130000029ll + 0xff))
+     abort ();
+ 
+-  y = adds_di_test2 (0x130002900ll,
++  y = adds_di_test2 (-0xff,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+-  if (y != 0x955052f08)
++  if (y != (0x505050505ll - 0xff))
+     abort ();
+ 
+   y = adds_di_test3 (0x130000029ll,
+ 		     0x064000008ll,
+ 		     0x505050505ll);
+-  if (y != 0x9b9050576)
++  if (y != (0x130000029ll + (0x064000008ll << 3)))
+     abort ();
+ 
+   y = adds_di_test3 (0x130002900ll,
+-		     0x088000008ll,
++		     -(0x130002900ll >> 3),
+ 		     0x505050505ll);
+-  if (y != 0xafd052e4d)
++  if (y != (0x130002900ll + 0x505050505ll))
+     abort ();
+ 
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/adds2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/adds2.c
+@@ -152,4 +152,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/adds3.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/adds3.c
+@@ -12,7 +12,7 @@ adds_ext (s64 a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -23,7 +23,7 @@ adds_shift_ext (s64 a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int main ()
+@@ -32,27 +32,27 @@ int main ()
+   s64 y;
+ 
+   x = adds_ext (0x13000002ll, 41, 15);
+-  if (x != 318767203)
++  if (x != (int)(0x13000002ll + 41))
+     abort ();
+ 
+-  x = adds_ext (0x50505050ll, 29, 4);
+-  if (x != 1347440782)
++  x = adds_ext (0x50505050ll, -0x50505050ll, 4);
++  if (x != (int)(0x50505050ll + 4))
+     abort ();
+ 
+   x = adds_ext (0x12121212121ll, 2, 14);
+-  if (x != 555819315)
++  if (x != (int)(0x12121212121ll + 2))
+     abort ();
+ 
+   x = adds_shift_ext (0x123456789ll, 4, 12);
+-  if (x != 591751097)
++  if (x != (int)(0x123456789ll + (4 << 3)))
+     abort ();
+ 
+-  x = adds_shift_ext (0x02020202ll, 9, 8);
+-  if (x != 33686107)
++  x = adds_shift_ext (-(0x02020202ll << 3), 0x02020202ll, 8);
++  if (x != (int)(8 - (0x02020202ll << 3)))
+     abort ();
+ 
+   x = adds_shift_ext (0x987987987987ll, 23, 41);
+-  if (x != -2020050305)
++  if (x != (int)(0x987987987987ll + (23 << 3)))
+     abort ();
+ 
+   return 0;
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp
+@@ -27,39 +27,43 @@ load_lib gcc-dg.exp
+ 
+ # Initialize `dg'.
+ load_lib c-torture.exp
+-load_lib target-supports.exp
+-load_lib torture-options.exp
+ 
+ dg-init
+ 
+-if {[istarget arm*-*-*]
+-    && ![check_effective_target_arm_neon_ok]} then {
+-  return
++# The default action for a test is 'run'.  Save current default.
++global dg-do-what-default
++set save-dg-do-what-default ${dg-do-what-default}
++
++# For ARM, make sure that we have a target compatible with NEON, and do
++# not attempt to run execution tests if the hardware doesn't support it.
++if {[istarget arm*-*-*]} then {
++    if {![check_effective_target_arm_neon_ok]} then {
++      return
++    }
++    if {![is-effective-target arm_neon_hw]} then {
++        set dg-do-what-default compile
++    } else {
++        set dg-do-what-default run
++    }
++} else {
++    set dg-do-what-default run
+ }
+ 
+ torture-init
+ set-torture-options $C_TORTURE_OPTIONS {{}} $LTO_TORTURE_OPTIONS
+ 
+-# Make sure Neon flags are provided, if necessary.
+-set additional_flags [add_options_for_arm_neon ""]
++# Make sure Neon flags are provided, if necessary.  Use fp16 if we can.
++if {[check_effective_target_arm_neon_fp16_ok]} then {
++  set additional_flags [add_options_for_arm_neon_fp16 ""]
++} else {
++  set additional_flags [add_options_for_arm_neon ""]
++}
+ 
+ # Main loop.
+-foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.c]] {
+-    # If we're only testing specific files and this isn't one of them, skip it.
+-    if ![runtest_file_p $runtests $src] then {
+-	continue
+-    }
+-
+-    # runtest_file_p is already run above, and the code below can run
+-    # runtest_file_p again, make sure everything for this test is
+-    # performed if the above runtest_file_p decided this runtest
+-    # instance should execute the test
+-    gcc_parallel_test_enable 0
+-    c-torture-execute $src $additional_flags
+-    gcc-dg-runtest $src "" $additional_flags
+-    gcc_parallel_test_enable 1
+-}
++gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c]] \
++	       "" ${additional_flags}
+ 
+ # All done.
++set dg-do-what-default ${save-dg-do-what-default}
+ torture-finish
+ dg-finish
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+@@ -7,6 +7,7 @@
+ #include <inttypes.h>
+ 
+ /* helper type, to help write floating point results in integer form.  */
++typedef uint16_t hfloat16_t;
+ typedef uint32_t hfloat32_t;
+ typedef uint64_t hfloat64_t;
+ 
+@@ -132,6 +133,9 @@ static ARRAY(result, uint, 32, 2);
+ static ARRAY(result, uint, 64, 1);
+ static ARRAY(result, poly, 8, 8);
+ static ARRAY(result, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++static ARRAY(result, float, 16, 4);
++#endif
+ static ARRAY(result, float, 32, 2);
+ static ARRAY(result, int, 8, 16);
+ static ARRAY(result, int, 16, 8);
+@@ -143,6 +147,9 @@ static ARRAY(result, uint, 32, 4);
+ static ARRAY(result, uint, 64, 2);
+ static ARRAY(result, poly, 8, 16);
+ static ARRAY(result, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++static ARRAY(result, float, 16, 8);
++#endif
+ static ARRAY(result, float, 32, 4);
+ #ifdef __aarch64__
+ static ARRAY(result, float, 64, 2);
+@@ -160,6 +167,7 @@ extern ARRAY(expected, uint, 32, 2);
+ extern ARRAY(expected, uint, 64, 1);
+ extern ARRAY(expected, poly, 8, 8);
+ extern ARRAY(expected, poly, 16, 4);
++extern ARRAY(expected, hfloat, 16, 4);
+ extern ARRAY(expected, hfloat, 32, 2);
+ extern ARRAY(expected, int, 8, 16);
+ extern ARRAY(expected, int, 16, 8);
+@@ -171,38 +179,11 @@ extern ARRAY(expected, uint, 32, 4);
+ extern ARRAY(expected, uint, 64, 2);
+ extern ARRAY(expected, poly, 8, 16);
+ extern ARRAY(expected, poly, 16, 8);
++extern ARRAY(expected, hfloat, 16, 8);
+ extern ARRAY(expected, hfloat, 32, 4);
+ extern ARRAY(expected, hfloat, 64, 2);
+ 
+-/* Check results. Operates on all possible vector types.  */
+-#define CHECK_RESULTS(test_name,comment)				\
+-  {									\
+-    CHECK(test_name, int, 8, 8, PRIx8, expected, comment);		\
+-    CHECK(test_name, int, 16, 4, PRIx16, expected, comment);		\
+-    CHECK(test_name, int, 32, 2, PRIx32, expected, comment);		\
+-    CHECK(test_name, int, 64, 1, PRIx64, expected, comment);		\
+-    CHECK(test_name, uint, 8, 8, PRIx8, expected, comment);		\
+-    CHECK(test_name, uint, 16, 4, PRIx16, expected, comment);		\
+-    CHECK(test_name, uint, 32, 2, PRIx32, expected, comment);		\
+-    CHECK(test_name, uint, 64, 1, PRIx64, expected, comment);		\
+-    CHECK(test_name, poly, 8, 8, PRIx8, expected, comment);		\
+-    CHECK(test_name, poly, 16, 4, PRIx16, expected, comment);		\
+-    CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment);	\
+-									\
+-    CHECK(test_name, int, 8, 16, PRIx8, expected, comment);		\
+-    CHECK(test_name, int, 16, 8, PRIx16, expected, comment);		\
+-    CHECK(test_name, int, 32, 4, PRIx32, expected, comment);		\
+-    CHECK(test_name, int, 64, 2, PRIx64, expected, comment);		\
+-    CHECK(test_name, uint, 8, 16, PRIx8, expected, comment);		\
+-    CHECK(test_name, uint, 16, 8, PRIx16, expected, comment);		\
+-    CHECK(test_name, uint, 32, 4, PRIx32, expected, comment);		\
+-    CHECK(test_name, uint, 64, 2, PRIx64, expected, comment);		\
+-    CHECK(test_name, poly, 8, 16, PRIx8, expected, comment);		\
+-    CHECK(test_name, poly, 16, 8, PRIx16, expected, comment);		\
+-    CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment);	\
+-  }									\
+-
+-#define CHECK_RESULTS_NAMED(test_name,EXPECTED,comment)			\
++#define CHECK_RESULTS_NAMED_NO_FP16(test_name,EXPECTED,comment)		\
+   {									\
+     CHECK(test_name, int, 8, 8, PRIx8, EXPECTED, comment);		\
+     CHECK(test_name, int, 16, 4, PRIx16, EXPECTED, comment);		\
+@@ -229,13 +210,32 @@ extern ARRAY(expected, hfloat, 64, 2);
+     CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment);	\
+   }									\
+ 
++/* Check results against EXPECTED.  Operates on all possible vector types.  */
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define CHECK_RESULTS_NAMED(test_name,EXPECTED,comment)			\
++  {									\
++    CHECK_RESULTS_NAMED_NO_FP16(test_name, EXPECTED, comment)		\
++    CHECK_FP(test_name, float, 16, 4, PRIx16, EXPECTED, comment);	\
++    CHECK_FP(test_name, float, 16, 8, PRIx16, EXPECTED, comment);	\
++  }
++#else
++#define CHECK_RESULTS_NAMED(test_name,EXPECTED,comment)		\
++  CHECK_RESULTS_NAMED_NO_FP16(test_name, EXPECTED, comment)
++#endif
++
++#define CHECK_RESULTS_NO_FP16(test_name,comment)			\
++  CHECK_RESULTS_NAMED_NO_FP16(test_name, expected, comment)
++
++#define CHECK_RESULTS(test_name,comment)		\
++  CHECK_RESULTS_NAMED(test_name, expected, comment)
+ 
+ 
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ 
+ typedef union {
+   struct {
+-    int _xxx:25;
++    int _xxx:24;
++    unsigned int FZ:1;
+     unsigned int DN:1;
+     unsigned int AHP:1;
+     unsigned int QC:1;
+@@ -258,7 +258,8 @@ typedef union {
+     unsigned int QC:1;
+     unsigned int AHP:1;
+     unsigned int DN:1;
+-    int _dnm:25;
++    unsigned int FZ:1;
++    int _dnm:24;
+   } b;
+   unsigned int word;
+ } _ARM_FPSCR;
+@@ -378,6 +379,9 @@ static void clean_results (void)
+   CLEAN(result, uint, 64, 1);
+   CLEAN(result, poly, 8, 8);
+   CLEAN(result, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  CLEAN(result, float, 16, 4);
++#endif
+   CLEAN(result, float, 32, 2);
+ 
+   CLEAN(result, int, 8, 16);
+@@ -390,15 +394,23 @@ static void clean_results (void)
+   CLEAN(result, uint, 64, 2);
+   CLEAN(result, poly, 8, 16);
+   CLEAN(result, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  CLEAN(result, float, 16, 8);
++#endif
+   CLEAN(result, float, 32, 4);
+ 
+ #if defined(__aarch64__)
+   /* On AArch64, make sure to return DefaultNaN to have the same
+      results as on AArch32.  */
+-  _ARM_FPSCR _afpscr_for_dn;
+-  asm volatile ("mrs %0,fpcr" : "=r" (_afpscr_for_dn));
+-  _afpscr_for_dn.b.DN = 1;
+-  asm volatile ("msr fpcr,%0" : : "r" (_afpscr_for_dn));
++  _ARM_FPSCR _afpscr;
++  asm volatile ("mrs %0,fpcr" : "=r" (_afpscr));
++  _afpscr.b.DN = 1;
++
++  /* On AArch64, make sure to flush to zero by default, as on
++     AArch32. */
++  _afpscr.b.FZ = 1;
++
++  asm volatile ("msr fpcr,%0" : : "r" (_afpscr));
+ #endif
+ }
+ 
+@@ -436,21 +448,40 @@ static void clean_results (void)
+   DECL_VARIABLE(VAR, uint, 64, 2)
+ 
+ /* Declare all 64 bits variants.  */
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ #define DECL_VARIABLE_64BITS_VARIANTS(VAR)	\
+   DECL_VARIABLE_64BITS_SIGNED_VARIANTS(VAR);	\
+   DECL_VARIABLE_64BITS_UNSIGNED_VARIANTS(VAR);	\
+   DECL_VARIABLE(VAR, poly, 8, 8);		\
+   DECL_VARIABLE(VAR, poly, 16, 4);		\
++  DECL_VARIABLE(VAR, float, 16, 4);		\
+   DECL_VARIABLE(VAR, float, 32, 2)
++#else
++#define DECL_VARIABLE_64BITS_VARIANTS(VAR)	\
++  DECL_VARIABLE_64BITS_SIGNED_VARIANTS(VAR);	\
++  DECL_VARIABLE_64BITS_UNSIGNED_VARIANTS(VAR);	\
++  DECL_VARIABLE(VAR, poly, 8, 8);		\
++  DECL_VARIABLE(VAR, poly, 16, 4);		\
++  DECL_VARIABLE(VAR, float, 32, 2)
++#endif
+ 
+ /* Declare all 128 bits variants.  */
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
+ #define DECL_VARIABLE_128BITS_VARIANTS(VAR)	\
+   DECL_VARIABLE_128BITS_SIGNED_VARIANTS(VAR);	\
+   DECL_VARIABLE_128BITS_UNSIGNED_VARIANTS(VAR);	\
+   DECL_VARIABLE(VAR, poly, 8, 16);		\
+   DECL_VARIABLE(VAR, poly, 16, 8);		\
++  DECL_VARIABLE(VAR, float, 16, 8);		\
+   DECL_VARIABLE(VAR, float, 32, 4)
+-
++#else
++#define DECL_VARIABLE_128BITS_VARIANTS(VAR)	\
++  DECL_VARIABLE_128BITS_SIGNED_VARIANTS(VAR);	\
++  DECL_VARIABLE_128BITS_UNSIGNED_VARIANTS(VAR);	\
++  DECL_VARIABLE(VAR, poly, 8, 16);		\
++  DECL_VARIABLE(VAR, poly, 16, 8);		\
++  DECL_VARIABLE(VAR, float, 32, 4)
++#endif
+ /* Declare all variants.  */
+ #define DECL_VARIABLE_ALL_VARIANTS(VAR)		\
+   DECL_VARIABLE_64BITS_VARIANTS(VAR);		\
+@@ -469,6 +500,15 @@ static void clean_results (void)
+ /* Helpers to initialize vectors.  */
+ #define VDUP(VAR, Q, T1, T2, W, N, V)			\
+   VECT_VAR(VAR, T1, W, N) = vdup##Q##_n_##T2##W(V)
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++/* Work around that there is no vdup_n_f16 intrinsic.  */
++#define vdup_n_f16(VAL)		\
++  __extension__			\
++    ({				\
++      float16_t f = VAL;	\
++      vld1_dup_f16(&f);		\
++    })
++#endif
+ 
+ #define VSET_LANE(VAR, Q, T1, T2, W, N, L, V)				\
+   VECT_VAR(VAR, T1, W, N) = vset##Q##_lane_##T2##W(V,			\
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_op.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_op.inc
+@@ -55,7 +55,22 @@ void FNNAME (INSN_NAME) (void)
+   /* Apply a binary operator named INSN_NAME.  */
+   TEST_MACRO_ALL_VARIANTS_1_5(TEST_BINARY_OP, INSN_NAME);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ 
+ #ifdef EXTRA_TESTS
+   EXTRA_TESTS();
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc
+@@ -76,7 +76,22 @@ void FNNAME (INSN_NAME) (void)
+   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 32, 4, expected_cumulative_sat, "");
+   TEST_BINARY_SAT_OP(INSN_NAME, q, uint, u, 64, 2, expected_cumulative_sat, "");
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ 
+ #ifdef EXTRA_TESTS
+   EXTRA_TESTS();
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h
+@@ -118,6 +118,10 @@ VECT_VAR_DECL_INIT(buffer, uint, 32, 2);
+ PAD(buffer_pad, uint, 32, 2);
+ VECT_VAR_DECL_INIT(buffer, uint, 64, 1);
+ PAD(buffer_pad, uint, 64, 1);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer, float, 16, 4);
++PAD(buffer_pad, float, 16, 4);
++#endif
+ VECT_VAR_DECL_INIT(buffer, float, 32, 2);
+ PAD(buffer_pad, float, 32, 2);
+ VECT_VAR_DECL_INIT(buffer, int, 8, 16);
+@@ -140,6 +144,10 @@ VECT_VAR_DECL_INIT(buffer, poly, 8, 16);
+ PAD(buffer_pad, poly, 8, 16);
+ VECT_VAR_DECL_INIT(buffer, poly, 16, 8);
+ PAD(buffer_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer, float, 16, 8);
++PAD(buffer_pad, float, 16, 8);
++#endif
+ VECT_VAR_DECL_INIT(buffer, float, 32, 4);
+ PAD(buffer_pad, float, 32, 4);
+ #ifdef __aarch64__
+@@ -170,6 +178,10 @@ VECT_VAR_DECL_INIT(buffer_dup, poly, 8, 8);
+ VECT_VAR_DECL(buffer_dup_pad, poly, 8, 8);
+ VECT_VAR_DECL_INIT(buffer_dup, poly, 16, 4);
+ VECT_VAR_DECL(buffer_dup_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT4(buffer_dup, float, 16, 4);
++VECT_VAR_DECL(buffer_dup_pad, float, 16, 4);
++#endif
+ VECT_VAR_DECL_INIT4(buffer_dup, float, 32, 2);
+ VECT_VAR_DECL(buffer_dup_pad, float, 32, 2);
+ 
+@@ -193,5 +205,9 @@ VECT_VAR_DECL_INIT(buffer_dup, poly, 8, 16);
+ VECT_VAR_DECL(buffer_dup_pad, poly, 8, 16);
+ VECT_VAR_DECL_INIT(buffer_dup, poly, 16, 8);
+ VECT_VAR_DECL(buffer_dup_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer_dup, float, 16, 8);
++VECT_VAR_DECL(buffer_dup_pad, float, 16, 8);
++#endif
+ VECT_VAR_DECL_INIT(buffer_dup, float, 32, 4);
+ VECT_VAR_DECL(buffer_dup_pad, float, 32, 4);
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_op.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/unary_op.inc
+@@ -57,7 +57,12 @@ void FNNAME (INSN_NAME) (void)
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
+ 
+ #ifdef EXTRA_TESTS
+   EXTRA_TESTS();
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXl.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXl.inc
+@@ -60,7 +60,12 @@ void FNNAME (INSN_NAME) (void)
+   TEST_VADDL(INSN_NAME, uint, u, 16, 32, 4);
+   TEST_VADDL(INSN_NAME, uint, u, 32, 64, 2);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXw.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXw.inc
+@@ -60,7 +60,12 @@ void FNNAME (INSN_NAME) (void)
+   TEST_VADDW(INSN_NAME, uint, u, 16, 32, 4);
+   TEST_VADDW(INSN_NAME, uint, u, 32, 64, 2);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaba.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaba.c
+@@ -7,16 +7,10 @@ VECT_VAR_DECL(expected,int,8,8) [] = { 0xf6, 0xf7, 0xf8, 0xf9,
+ 				       0xfa, 0xfb, 0xfc, 0xfd };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x16, 0x17, 0x18, 0x19 };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x20, 0x21 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x53, 0x54, 0x55, 0x56,
+ 					0x57, 0x58, 0x59, 0x5a };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x907, 0x908, 0x909, 0x90a };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffe7, 0xffffffe8 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x5e, 0x5f, 0x60, 0x61,
+ 					0x62, 0x63, 0x64, 0x65,
+ 					0x66, 0x67, 0x68, 0x69,
+@@ -24,8 +18,6 @@ VECT_VAR_DECL(expected,int,8,16) [] = { 0x5e, 0x5f, 0x60, 0x61,
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0xb9c, 0xb9d, 0xb9e, 0xb9f,
+ 					0xba0, 0xba1, 0xba2, 0xba3 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x26e0, 0x26e1, 0x26e2, 0x26e3 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ 					 0xfc, 0xfd, 0xfe, 0xff,
+ 					 0x0, 0x1, 0x2, 0x3,
+@@ -33,16 +25,6 @@ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff9, 0xfffa, 0xfffb, 0xfffc,
+ 					 0xfffd, 0xfffe, 0xffff, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xc, 0xd, 0xe, 0xf };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define TEST_MSG "VABA/VABAQ"
+ void exec_vaba (void)
+@@ -132,7 +114,18 @@ void exec_vaba (void)
+   TEST_VABA(q, uint, u, 16, 8);
+   TEST_VABA(q, uint, u, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabal.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabal.c
+@@ -3,45 +3,15 @@
+ #include "compute-ref-data.h"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff6, 0xfff7, 0xfff8, 0xfff9,
+ 					0xfffa, 0xfffb, 0xfffc, 0xfffd };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x16, 0x17, 0x18, 0x19 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0x20, 0x21 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x53, 0x54, 0x55, 0x56,
+ 					 0x57, 0x58, 0x59, 0x5a };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x907, 0x908, 0x909, 0x90a };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffe7,
+ 					 0xffffffe8 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results for cases with input values chosen to test
+    possible intermediate overflow.  */
+@@ -121,7 +91,12 @@ void exec_vabal (void)
+   TEST_VABAL(uint, u, 16, 32, 4);
+   TEST_VABAL(uint, u, 32, 64, 2);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ 
+   /* Use values that could lead to overflow intermediate
+    * calculations.  */
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabd.c
+@@ -8,15 +8,10 @@ VECT_VAR_DECL(expected,int,8,8) [] = { 0x11, 0x10, 0xf, 0xe,
+ 				       0xd, 0xc, 0xb, 0xa };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x3, 0x2, 0x1, 0x0 };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x18, 0x17 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xef, 0xf0, 0xf1, 0xf2,
+ 					0xf3, 0xf4, 0xf5, 0xf6 };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffe3, 0xffe4, 0xffe5, 0xffe6 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffe8, 0xffffffe9 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x41c26666, 0x41ba6666 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x1a, 0x19, 0x18, 0x17,
+ 					0x16, 0x15, 0x14, 0x13,
+@@ -25,8 +20,6 @@ VECT_VAR_DECL(expected,int,8,16) [] = { 0x1a, 0x19, 0x18, 0x17,
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x4, 0x3, 0x2, 0x1,
+ 					0x0, 0x1, 0x2, 0x3 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x30, 0x2f, 0x2e, 0x2d };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xe6, 0xe7, 0xe8, 0xe9,
+ 					 0xea, 0xeb, 0xec, 0xed,
+ 					 0xee, 0xef, 0xf0, 0xf1,
+@@ -35,14 +28,6 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffe4, 0xffe5, 0xffe6, 0xffe7,
+ 					 0xffe8, 0xffe9, 0xffea, 0xffeb };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffd0, 0xffffffd1,
+ 					 0xffffffd2, 0xffffffd3 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x42407ae1, 0x423c7ae1,
+ 					   0x42387ae1, 0x42347ae1 };
+ 
+@@ -130,7 +115,20 @@ void exec_vabd (void)
+   TEST_VABD(q, uint, u, 32, 4);
+   TEST_VABD(q, float, f, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
+ 
+ 
+   /* Extra FP tests with special values (-0.0, ....) */
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdl.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdl.c
+@@ -3,45 +3,15 @@
+ #include "compute-ref-data.h"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x11, 0x10, 0xf, 0xe,
+ 					0xd, 0xc, 0xb, 0xa };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x3, 0x2, 0x1, 0x0 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0x18, 0x17 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xef, 0xf0, 0xf1, 0xf2,
+ 					 0xf3, 0xf4, 0xf5, 0xf6 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffe3, 0xffe4, 0xffe5, 0xffe6 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffe8,
+ 					 0xffffffe9 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define TEST_MSG "VABDL"
+ void exec_vabdl (void)
+@@ -99,7 +69,12 @@ void exec_vabdl (void)
+   TEST_VABDL(uint, u, 16, 32, 4);
+   TEST_VABDL(uint, u, 32, 64, 2);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabs.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabs.c
+@@ -12,41 +12,11 @@ VECT_VAR_DECL(expected,int,8,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 				       0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x10, 0xf, 0xe, 0xd };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x10, 0xf };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9,
+ 					0x8, 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0xf, 0xe, 0xd };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					  0x33333333, 0x33333333 };
+ 
+ /* Expected results for float32 variants. Needs to be separated since
+    the generic test function does not test floating-point
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vadd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vadd.c
+@@ -18,10 +18,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x4, 0x5, 0x6, 0x7,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xe, 0xf, 0x10, 0x11 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x18, 0x19 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff2 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xe6, 0xe7, 0xe8, 0xe9,
+ 					0xea, 0xeb, 0xec, 0xed,
+ 					0xee, 0xef, 0xf0, 0xf1,
+@@ -40,14 +36,6 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff3, 0xfff4, 0xfff5, 0xfff6,
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x27, 0x28, 0x29, 0x2a };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff3,
+ 					 0xfffffffffffffff4 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results for float32 variants. Needs to be separated since
+    the generic test function does not test floating-point
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddl.c
+@@ -6,46 +6,16 @@
+ #define TEST_MSG "VADDL"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = {  0xffe3, 0xffe4, 0xffe5, 0xffe6,
+ 					 0xffe7, 0xffe8, 0xffe9, 0xffea };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffe2, 0xffffffe3,
+ 					0xffffffe4, 0xffffffe5 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffe0,
+ 					0xffffffffffffffe1 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x1e3, 0x1e4, 0x1e5, 0x1e6,
+ 					 0x1e7, 0x1e8, 0x1e9, 0x1ea };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x1ffe1, 0x1ffe2,
+ 					 0x1ffe3, 0x1ffe4 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0x1ffffffe0, 0x1ffffffe1 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #include "vXXXl.inc"
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddw.c
+@@ -6,46 +6,16 @@
+ #define TEST_MSG "VADDW"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = {  0xffe3, 0xffe4, 0xffe5, 0xffe6,
+ 					 0xffe7, 0xffe8, 0xffe9, 0xffea };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffe2, 0xffffffe3,
+ 					0xffffffe4, 0xffffffe5 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffe0,
+ 					0xffffffffffffffe1 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xe3, 0xe4, 0xe5, 0xe6,
+ 					 0xe7, 0xe8, 0xe9, 0xea };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffe1, 0xffe2,
+ 					 0xffe3, 0xffe4 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffe0, 0xffffffe1 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #include "vXXXw.inc"
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vand.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vand.c
+@@ -14,10 +14,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x10, 0x10, 0x12, 0x12 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x20, 0x20 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0x0 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf0, 0xf2, 0xf2,
+ 					0xf4, 0xf4, 0xf6, 0xf6,
+ 					0xf0, 0xf0, 0xf2, 0xf2,
+@@ -35,11 +31,3 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					 0x0, 0x1, 0x2, 0x3 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x30, 0x31, 0x32, 0x33 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0x0, 0x1 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vbic.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vbic.c
+@@ -14,10 +14,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe0, 0xe1, 0xe2, 0xe3,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffe0, 0xffe1, 0xffe0, 0xffe1 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffd0, 0xffffffd1 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x1, 0x0, 0x1,
+ 					0x0, 0x1, 0x0, 0x1,
+ 					0x8, 0x9, 0x8, 0x9,
+@@ -36,11 +32,3 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffc0, 0xffffffc0,
+ 					 0xffffffc0, 0xffffffc0 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
+ 					 0xfffffffffffffff0 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vbsl.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vbsl.c
+@@ -114,7 +114,7 @@ void exec_vbsl (void)
+   TEST_VBSL(uint, , float, f, 32, 2);
+   TEST_VBSL(uint, q, float, f, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK_RESULTS_NO_FP16 (TEST_MSG, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcage.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcage.c
+@@ -4,48 +4,9 @@
+ #include "cmp_fp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+ 					 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected2,uint,32,2) [] = { 0xffffffff, 0xffffffff };
+ VECT_VAR_DECL(expected2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagt.c
+@@ -4,47 +4,9 @@
+ #include "cmp_fp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x0, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffff, 0xffffffff, 0x0, 0x0 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+ 					 0x0, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected2,uint,32,2) [] = { 0xffffffff, 0xffffffff };
+ VECT_VAR_DECL(expected2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcale.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcale.c
+@@ -4,46 +4,8 @@
+ #include "cmp_fp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffff, 0xffffffff, 0x0, 0x0 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0xffffffff, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected2,uint,32,2) [] = { 0x0, 0x0 };
+ VECT_VAR_DECL(expected2,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalt.c
+@@ -4,46 +4,8 @@
+ #include "cmp_fp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x0, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffff, 0xffffffff, 0x0, 0x0 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					 0x333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0x0, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected2,uint,32,2) [] = { 0x0, 0x0 };
+ VECT_VAR_DECL(expected2,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceq.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceq.c
+@@ -8,29 +8,9 @@ void exec_vceq_p8(void);
+ #include "cmp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xff, 0x0 };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0xffff, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+@@ -38,16 +18,6 @@ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0xffff, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected_uint,uint,8,8) [] = { 0x0, 0x0, 0x0, 0xff,
+ 					     0x0, 0x0, 0x0, 0x0 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcge.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcge.c
+@@ -4,29 +4,9 @@
+ #include "cmp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xff, 0xff };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0xffff, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+@@ -34,16 +14,6 @@ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0xffff, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0xffffffff, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected_uint,uint,8,8) [] = { 0x0, 0x0, 0x0, 0xff,
+ 					     0xff, 0xff, 0xff, 0xff };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgt.c
+@@ -4,29 +4,9 @@
+ #include "cmp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xff };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0x0, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x0, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0x0,
+@@ -34,16 +14,6 @@ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					 0x0, 0x0, 0x0, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0x0, 0xffffffff };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected_uint,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ 					     0xff, 0xff, 0xff, 0xff };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcle.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcle.c
+@@ -4,30 +4,10 @@
+ #include "cmp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
+ 					0xff, 0xff, 0xff, 0x0 };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
+ 					 0xff, 0xff, 0xff, 0xff,
+ 					 0xff, 0xff, 0xff, 0xff,
+@@ -36,16 +16,6 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
+ 					 0xffff, 0xffff, 0xffff, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+ 					 0xffffffff, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected_uint,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
+ 					     0x0, 0x0, 0x0, 0x0 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcls.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcls.c
+@@ -6,16 +6,6 @@
+ VECT_VAR_DECL(expected,int,8,8) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x2, 0x2, 0x2, 0x2 };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x19, 0x19 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x7, 0x7, 0x7, 0x7,
+ 					0x7, 0x7, 0x7, 0x7,
+ 					0x7, 0x7, 0x7, 0x7,
+@@ -23,45 +13,12 @@ VECT_VAR_DECL(expected,int,8,16) [] = { 0x7, 0x7, 0x7, 0x7,
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x2, 0x2, 0x2, 0x2,
+ 					0x2, 0x2, 0x2, 0x2 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x14, 0x14, 0x14, 0x14 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results with negative input.  */
+ VECT_VAR_DECL(expected_with_negative,int,8,8) [] = { 0x7, 0x7, 0x7, 0x7,
+ 						     0x7, 0x7, 0x7, 0x7 };
+ VECT_VAR_DECL(expected_with_negative,int,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
+ VECT_VAR_DECL(expected_with_negative,int,32,2) [] = { 0x1, 0x1 };
+-VECT_VAR_DECL(expected_with_negative,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_negative,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-						      0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_negative,uint,16,4) [] = { 0x3333, 0x3333,
+-						       0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_negative,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_with_negative,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_negative,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-						      0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_negative,poly,16,4) [] = { 0x3333, 0x3333,
+-						       0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_negative,hfloat,32,2) [] = { 0x33333333,
+-							 0x33333333 };
+ VECT_VAR_DECL(expected_with_negative,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ 						      0x0, 0x0, 0x0, 0x0,
+ 						      0x0, 0x0, 0x0, 0x0,
+@@ -69,32 +26,6 @@ VECT_VAR_DECL(expected_with_negative,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ VECT_VAR_DECL(expected_with_negative,int,16,8) [] = { 0x2, 0x2, 0x2, 0x2,
+ 						      0x2, 0x2, 0x2, 0x2 };
+ VECT_VAR_DECL(expected_with_negative,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+-VECT_VAR_DECL(expected_with_negative,int,64,2) [] = { 0x3333333333333333,
+-						      0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_negative,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_negative,uint,16,8) [] = { 0x3333, 0x3333,
+-						       0x3333, 0x3333,
+-						       0x3333, 0x3333,
+-						       0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_negative,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_with_negative,uint,64,2) [] = { 0x3333333333333333,
+-						       0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_negative,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_negative,poly,16,8) [] = { 0x3333, 0x3333,
+-						       0x3333, 0x3333,
+-						       0x3333, 0x3333,
+-						       0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_negative,hfloat,32,4) [] = { 0x33333333,
+-							 0x33333333,
+-							 0x33333333,
+-							 0x33333333 };
+ 
+ #define INSN_NAME vcls
+ #define TEST_MSG "VCLS/VCLSQ"
+@@ -146,7 +77,13 @@ FNNAME (INSN_NAME)
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, " (positive input)");
++#define MSG_POSITIVE " (positive input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, MSG_POSITIVE);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, MSG_POSITIVE);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, MSG_POSITIVE);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, MSG_POSITIVE);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, MSG_POSITIVE);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, MSG_POSITIVE);
+ 
+   /* Fill input vector with arbitrary values (negative).  */
+   VDUP(vector, , int, s, 8, 8, 0xFF);
+@@ -164,7 +101,13 @@ FNNAME (INSN_NAME)
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 16, 8);
+   TEST_UNARY_OP(INSN_NAME, q, int, s, 32, 4);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_with_negative, " (negative input)");
++#define MSG_NEGATIVE " (negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_with_negative, MSG_NEGATIVE);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_with_negative, MSG_NEGATIVE);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_with_negative, MSG_NEGATIVE);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_with_negative, MSG_NEGATIVE);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_with_negative, MSG_NEGATIVE);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_with_negative, MSG_NEGATIVE);
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclt.c
+@@ -4,30 +4,10 @@
+ #include "cmp_op.inc"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
+ 					0xff, 0xff, 0x0, 0x0 };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0x0, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x0, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x333, 0x3333, 0x3333, 0x3333,
+-					0x333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
+ 					 0xff, 0xff, 0xff, 0xff,
+ 					 0xff, 0xff, 0xff, 0xff,
+@@ -35,16 +15,6 @@ VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
+ 					 0xffff, 0xffff, 0x0, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff, 0x0, 0x0 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ VECT_VAR_DECL(expected_uint,uint,8,8) [] = { 0xff, 0xff, 0xff, 0x0,
+ 					     0x0, 0x0, 0x0, 0x0 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclz.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclz.c
+@@ -6,36 +6,18 @@
+ VECT_VAR_DECL(expected,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x3, 0x3, 0x3, 0x3 };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x11, 0x11 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0x5, 0x5 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2,
+ 					0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x3, 0x3, 0x3, 0x3 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3,
+ 					 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xd, 0xd, 0xd, 0xd,
+ 					 0xd, 0xd, 0xd, 0xd };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x1f, 0x1f, 0x1f, 0x1f };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ 
+ /* Expected results with input=0.  */
+@@ -43,16 +25,10 @@ VECT_VAR_DECL(expected_with_0,int,8,8) [] = { 0x8, 0x8, 0x8, 0x8,
+ 					      0x8, 0x8, 0x8, 0x8 };
+ VECT_VAR_DECL(expected_with_0,int,16,4) [] = { 0x10, 0x10, 0x10, 0x10 };
+ VECT_VAR_DECL(expected_with_0,int,32,2) [] = { 0x20, 0x20 };
+-VECT_VAR_DECL(expected_with_0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_with_0,uint,8,8) [] = { 0x8, 0x8, 0x8, 0x8,
+ 					       0x8, 0x8, 0x8, 0x8 };
+ VECT_VAR_DECL(expected_with_0,uint,16,4) [] = { 0x10, 0x10, 0x10, 0x10 };
+ VECT_VAR_DECL(expected_with_0,uint,32,2) [] = { 0x20, 0x20 };
+-VECT_VAR_DECL(expected_with_0,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_0,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_0,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_0,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected_with_0,int,8,16) [] = { 0x8, 0x8, 0x8, 0x8,
+ 					       0x8, 0x8, 0x8, 0x8,
+ 					       0x8, 0x8, 0x8, 0x8,
+@@ -60,8 +36,6 @@ VECT_VAR_DECL(expected_with_0,int,8,16) [] = { 0x8, 0x8, 0x8, 0x8,
+ VECT_VAR_DECL(expected_with_0,int,16,8) [] = { 0x10, 0x10, 0x10, 0x10,
+ 					       0x10, 0x10, 0x10, 0x10 };
+ VECT_VAR_DECL(expected_with_0,int,32,4) [] = { 0x20, 0x20, 0x20, 0x20 };
+-VECT_VAR_DECL(expected_with_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_with_0,uint,8,16) [] = { 0x8, 0x8, 0x8, 0x8,
+ 						0x8, 0x8, 0x8, 0x8,
+ 						0x8, 0x8, 0x8, 0x8,
+@@ -69,16 +43,6 @@ VECT_VAR_DECL(expected_with_0,uint,8,16) [] = { 0x8, 0x8, 0x8, 0x8,
+ VECT_VAR_DECL(expected_with_0,uint,16,8) [] = { 0x10, 0x10, 0x10, 0x10,
+ 						0x10, 0x10, 0x10, 0x10 };
+ VECT_VAR_DECL(expected_with_0,uint,32,4) [] = { 0x20, 0x20, 0x20, 0x20 };
+-VECT_VAR_DECL(expected_with_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_with_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_with_0,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_with_0,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ #define INSN_NAME vclz
+ #define TEST_MSG "VCLZ/VCLZQ"
+@@ -154,7 +118,18 @@ FNNAME (INSN_NAME)
+   TEST_UNARY_OP(INSN_NAME, q, uint, u, 16, 8);
+   TEST_UNARY_OP(INSN_NAME, q, uint, u, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
+ 
+   /* Test with zero as input.  */
+   VDUP(vector, , int, s, 8, 8, 0);
+@@ -184,7 +159,19 @@ FNNAME (INSN_NAME)
+   TEST_UNARY_OP(INSN_NAME, q, uint, u, 16, 8);
+   TEST_UNARY_OP(INSN_NAME, q, uint, u, 32, 4);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_with_0, " (input=0)");
++#define MSG_ZERO " (input=0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_with_0, MSG_ZERO);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_with_0, MSG_ZERO);
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcnt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcnt.c
+@@ -4,37 +4,14 @@
+ 
+ /* Expected results.  */
+ VECT_VAR_DECL(expected,int,8,8) [] = { 0x8, 0x8, 0x8, 0x8, 0x8, 0x8, 0x8, 0x8 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 					0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6,
+ 					 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected,poly,8,16) [] = { 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6,
+ 					 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6, 0x6 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define INSN_NAME vcnt
+ #define TEST_MSG "VCNT/VCNTQ"
+@@ -86,7 +63,12 @@ FNNAME (INSN_NAME)
+   TEST_UNARY_OP(INSN_NAME, q, uint, u, 8, 16);
+   TEST_UNARY_OP(INSN_NAME, q, poly, p, 8, 16);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcombine.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcombine.c
+@@ -3,20 +3,6 @@
+ #include "compute-ref-data.h"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					0xf4, 0xf5, 0xf6, 0xf7,
+ 					0x11, 0x11, 0x11, 0x11,
+@@ -41,6 +27,8 @@ VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					 0x66, 0x66, 0x66, 0x66 };
+ VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 					   0x40533333, 0x40533333 };
++VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++					   0x4080, 0x4080, 0x4080, 0x4080 };
+ 
+ #define TEST_MSG "VCOMBINE"
+ void exec_vcombine (void)
+@@ -58,6 +46,9 @@ void exec_vcombine (void)
+ 
+   /* Initialize input "vector64_a" from "buffer".  */
+   TEST_MACRO_64BITS_VARIANTS_2_5(VLOAD, vector64_a, buffer);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VLOAD(vector64_a, buffer, , float, f, 16, 4);
++#endif
+   VLOAD(vector64_a, buffer, , float, f, 32, 2);
+ 
+   /* Choose init value arbitrarily.  */
+@@ -71,6 +62,9 @@ void exec_vcombine (void)
+   VDUP(vector64_b, , uint, u, 64, 1, 0x88);
+   VDUP(vector64_b, , poly, p, 8, 8, 0x55);
+   VDUP(vector64_b, , poly, p, 16, 4, 0x66);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VDUP(vector64_b, , float, f, 16, 4, 2.25);
++#endif
+   VDUP(vector64_b, , float, f, 32, 2, 3.3f);
+ 
+   clean_results ();
+@@ -86,9 +80,25 @@ void exec_vcombine (void)
+   TEST_VCOMBINE(uint, u, 64, 1, 2);
+   TEST_VCOMBINE(poly, p, 8, 8, 16);
+   TEST_VCOMBINE(poly, p, 16, 4, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VCOMBINE(float, f, 16, 4, 8);
++#endif
+   TEST_VCOMBINE(float, f, 32, 2, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  CHECK_FP(TEST_MSG, float, 16, 8, PRIx16, expected, "");
++#endif
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcreate.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcreate.c
+@@ -16,35 +16,8 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0x123456789abcdef0 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xde, 0xbc, 0x9a,
+ 					0x78, 0x56, 0x34, 0x12 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xdef0, 0x9abc, 0x5678, 0x1234 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xdef0, 0x9abc, 0x5678, 0x1234 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x9abcdef0, 0x12345678 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define INSN_NAME vcreate
+ #define TEST_MSG "VCREATE"
+@@ -66,6 +39,9 @@ FNNAME (INSN_NAME)
+   DECL_VAL(val, int, 16, 4);
+   DECL_VAL(val, int, 32, 2);
+   DECL_VAL(val, int, 64, 1);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  DECL_VAL(val, float, 16, 4);
++#endif
+   DECL_VAL(val, float, 32, 2);
+   DECL_VAL(val, uint, 8, 8);
+   DECL_VAL(val, uint, 16, 4);
+@@ -78,6 +54,9 @@ FNNAME (INSN_NAME)
+   DECL_VARIABLE(vector_res, int, 16, 4);
+   DECL_VARIABLE(vector_res, int, 32, 2);
+   DECL_VARIABLE(vector_res, int, 64, 1);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  DECL_VARIABLE(vector_res, float, 16, 4);
++#endif
+   DECL_VARIABLE(vector_res, float, 32, 2);
+   DECL_VARIABLE(vector_res, uint, 8, 8);
+   DECL_VARIABLE(vector_res, uint, 16, 4);
+@@ -93,6 +72,9 @@ FNNAME (INSN_NAME)
+   VECT_VAR(val, int, 16, 4) = 0x123456789abcdef0LL;
+   VECT_VAR(val, int, 32, 2) = 0x123456789abcdef0LL;
+   VECT_VAR(val, int, 64, 1) = 0x123456789abcdef0LL;
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_VAR(val, float, 16, 4) = 0x123456789abcdef0LL;
++#endif
+   VECT_VAR(val, float, 32, 2) = 0x123456789abcdef0LL;
+   VECT_VAR(val, uint, 8, 8) = 0x123456789abcdef0ULL;
+   VECT_VAR(val, uint, 16, 4) = 0x123456789abcdef0ULL;
+@@ -104,6 +86,9 @@ FNNAME (INSN_NAME)
+   TEST_VCREATE(int, s, 8, 8);
+   TEST_VCREATE(int, s, 16, 4);
+   TEST_VCREATE(int, s, 32, 2);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VCREATE(float, f, 16, 4);
++#endif
+   TEST_VCREATE(float, f, 32, 2);
+   TEST_VCREATE(int, s, 64, 1);
+   TEST_VCREATE(uint, u, 8, 8);
+@@ -113,7 +98,20 @@ FNNAME (INSN_NAME)
+   TEST_VCREATE(poly, p, 8, 8);
+   TEST_VCREATE(poly, p, 16, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
++#endif
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvt_f16.c
+@@ -0,0 +1,100 @@
++/* { dg-require-effective-target arm_neon_fp16_hw { target { arm*-*-* } } } */
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++#include <math.h>
++
++/* Expected results for vcvt.  */
++VECT_VAR_DECL (expected,hfloat,32,4) [] = { 0x41800000, 0x41700000,
++					    0x41600000, 0x41500000 };
++VECT_VAR_DECL (expected,hfloat,16,4) [] = { 0x3e00, 0x4100, 0x4300, 0x4480 };
++
++/* Expected results for vcvt_high_f32_f16.  */
++VECT_VAR_DECL (expected_high,hfloat,32,4) [] = { 0xc1400000, 0xc1300000,
++						 0xc1200000, 0xc1100000 };
++/* Expected results for vcvt_high_f16_f32.  */
++VECT_VAR_DECL (expected_high,hfloat,16,8) [] = { 0x4000, 0x4000, 0x4000, 0x4000,
++						 0xcc00, 0xcb80, 0xcb00, 0xca80 };
++
++void
++exec_vcvt (void)
++{
++  clean_results ();
++
++#define TEST_MSG "vcvt_f32_f16"
++  {
++    VECT_VAR_DECL (buffer_src, float, 16, 4) [] = { 16.0, 15.0, 14.0, 13.0 };
++
++    DECL_VARIABLE (vector_src, float, 16, 4);
++
++    VLOAD (vector_src, buffer_src, , float, f, 16, 4);
++    DECL_VARIABLE (vector_res, float, 32, 4) =
++	vcvt_f32_f16 (VECT_VAR (vector_src, float, 16, 4));
++    vst1q_f32 (VECT_VAR (result, float, 32, 4),
++	       VECT_VAR (vector_res, float, 32, 4));
++
++    CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected, "");
++  }
++#undef TEST_MSG
++
++  clean_results ();
++
++#define TEST_MSG "vcvt_f16_f32"
++  {
++    VECT_VAR_DECL (buffer_src, float, 32, 4) [] = { 1.5, 2.5, 3.5, 4.5 };
++    DECL_VARIABLE (vector_src, float, 32, 4);
++
++    VLOAD (vector_src, buffer_src, q, float, f, 32, 4);
++    DECL_VARIABLE (vector_res, float, 16, 4) =
++      vcvt_f16_f32 (VECT_VAR (vector_src, float, 32, 4));
++    vst1_f16 (VECT_VAR (result, float, 16, 4),
++	      VECT_VAR (vector_res, float, 16 ,4));
++
++    CHECK_FP (TEST_MSG, float, 16, 4, PRIx16, expected, "");
++  }
++#undef TEST_MSG
++
++  /* We run more tests for AArch64 as the relevant intrinsics
++     do not exist on AArch32.  */
++#if defined (__aarch64__)
++  clean_results ();
++
++#define TEST_MSG "vcvt_high_f32_f16"
++  {
++    DECL_VARIABLE (vector_src, float, 16, 8);
++    VLOAD (vector_src, buffer, q, float, f, 16, 8);
++    DECL_VARIABLE (vector_res, float, 32, 4);
++    VECT_VAR (vector_res, float, 32, 4) =
++      vcvt_high_f32_f16 (VECT_VAR (vector_src, float, 16, 8));
++    vst1q_f32 (VECT_VAR (result, float, 32, 4),
++	       VECT_VAR (vector_res, float, 32, 4));
++    CHECK_FP (TEST_MSG, float, 32, 4, PRIx32, expected_high, "");
++  }
++#undef TEST_MSG
++  clean_results ();
++
++#define TEST_MSG "vcvt_high_f16_f32"
++  {
++    DECL_VARIABLE (vector_low, float, 16, 4);
++    VDUP (vector_low, , float, f, 16, 4, 2.0);
++
++    DECL_VARIABLE (vector_src, float, 32, 4);
++    VLOAD (vector_src, buffer, q, float, f, 32, 4);
++
++    DECL_VARIABLE (vector_res, float, 16, 8) =
++      vcvt_high_f16_f32 (VECT_VAR (vector_low, float, 16, 4),
++			 VECT_VAR (vector_src, float, 32, 4));
++    vst1q_f16 (VECT_VAR (result, float, 16, 8),
++	       VECT_VAR (vector_res, float, 16, 8));
++
++    CHECK_FP (TEST_MSG, float, 16, 8, PRIx16, expected_high, "");
++  }
++#endif
++}
++
++int
++main (void)
++{
++  exec_vcvt ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvt_high_1.c
+@@ -0,0 +1,98 @@
++/* { dg-skip-if "" { arm*-*-* } } */
++
++#include "arm_neon.h"
++
++void abort (void);
++
++void
++foo (void)
++{
++  /* Test vcvt_high_f32_f64.  */
++  float32x2_t arg1;
++  float64x2_t arg2;
++  float32x4_t result;
++  arg1 = vcreate_f32 (UINT64_C (0x3f0db5793f6e1892));
++  arg2 = vcombine_f64 (vcreate_f64 (UINT64_C (0x3fe8e49d23fb575d)),
++		       vcreate_f64 (UINT64_C (0x3fd921291b3df73e)));
++  //  Expect: "result" = 3ec909483f4724e93f0db5793f6e1892
++  result = vcvt_high_f32_f64 (arg1, arg2);
++  float32_t got;
++  float32_t exp;
++
++  /* Lane 0.  */
++  got = vgetq_lane_f32 (result, 0);
++  exp = ((float32_t) 0.9300624132156372);
++  if (((((exp / got) < ((float32_t) 0.999))
++	 || ((exp / got) > ((float32_t) 1.001)))
++     && (((exp - got) < ((float32_t) -1.0e-4))
++	 || ((exp - got) > ((float32_t) 1.0e-4)))))
++    abort ();
++
++  /* Lane 1.  */
++  got = vgetq_lane_f32 (result, 1);
++  exp = ((float32_t) 0.5535503029823303);
++  if (((((exp / got) < ((float32_t) 0.999))
++	  || ((exp / got) > ((float32_t) 1.001)))
++     && (((exp - got) < ((float32_t) -1.0e-4))
++	   || ((exp - got) > ((float32_t) 1.0e-4)))))
++    abort ();
++
++  /* Lane 2.  */
++  got = vgetq_lane_f32 (result, 2);
++  exp = ((float32_t) 0.7779069617051665);
++  if (((((exp / got) < ((float32_t) 0.999))
++	  || ((exp / got) > ((float32_t) 1.001)))
++      && (((exp - got) < ((float32_t) -1.0e-4))
++	  || ((exp - got) > ((float32_t) 1.0e-4)))))
++    abort ();
++
++  /* Lane 3.  */
++  got = vgetq_lane_f32 (result, 3);
++  exp = ((float32_t) 0.3926489606891329);
++  if (((((exp / got) < ((float32_t) 0.999))
++	  || ((exp / got) > ((float32_t) 1.001)))
++      && (((exp - got) < ((float32_t) -1.0e-4))
++	  || ((exp - got) > ((float32_t) 1.0e-4)))))
++    abort ();
++}
++
++void
++bar (void)
++{
++  /* Test vcvt_high_f64_f32.  */
++  float32x4_t arg1;
++  float64x2_t result;
++  arg1 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3f7c5cf13f261f74)),
++		       vcreate_f32 (UINT64_C (0x3e3a7bc03f6ccc1d)));
++  //  Expect: "result" = 3fc74f78000000003fed9983a0000000
++  result = vcvt_high_f64_f32 (arg1);
++
++  float64_t got;
++  float64_t exp;
++
++  /* Lane 0.  */
++  got = vgetq_lane_f64 (result, 0);
++  exp = 0.9249895215034485;
++  if (((((exp / got) < 0.999)
++	 || ((exp / got) > 1.001))
++     && (((exp - got) < -1.0e-4)
++	 || ((exp - got) > 1.0e-4))))
++    abort ();
++
++  /* Lane 1.  */
++  got = vgetq_lane_f64 (result, 1);
++  exp = 0.1821126937866211;
++  if (((((exp / got) < 0.999)
++	  || ((exp / got) > 1.001))
++      && (((exp - got) < -1.0e-4)
++	  || ((exp - got) > 1.0e-4))))
++    abort ();
++}
++
++int
++main (int argc, char **argv)
++{
++  foo ();
++  bar ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c
+@@ -187,13 +187,13 @@ void exec_vdup_vmov (void)
+ 
+     switch (i) {
+     case 0:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected0, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected0, "");
+       break;
+     case 1:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected1, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected1, "");
+       break;
+     case 2:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected2, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected2, "");
+       break;
+     default:
+       abort();
+@@ -232,13 +232,13 @@ void exec_vdup_vmov (void)
+ 
+     switch (i) {
+     case 0:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected0, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected0, "");
+       break;
+     case 1:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected1, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected1, "");
+       break;
+     case 2:
+-      CHECK_RESULTS_NAMED (TEST_MSG, expected2, "");
++      CHECK_RESULTS_NAMED_NO_FP16 (TEST_MSG, expected2, "");
+       break;
+     default:
+       abort();
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c
+@@ -90,7 +90,7 @@ void exec_vdup_lane (void)
+   TEST_VDUP_LANE(q, poly, p, 16, 8, 4, 1);
+   TEST_VDUP_LANE(q, float, f, 32, 4, 2, 1);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK_RESULTS_NO_FP16 (TEST_MSG, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/veor.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/veor.c
+@@ -14,10 +14,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe4, 0xe5, 0xe6, 0xe7,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffee, 0xffef, 0xffec, 0xffed };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffd8, 0xffffffd9 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff2 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x6, 0x7, 0x4, 0x5,
+ 					0x2, 0x3, 0x0, 0x1,
+ 					0xe, 0xf, 0xc, 0xd,
+@@ -37,11 +33,3 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffc7, 0xffffffc6,
+ 					 0xffffffc5, 0xffffffc4 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff3,
+ 					 0xfffffffffffffff2 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vext.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vext.c
+@@ -113,7 +113,7 @@ void exec_vext (void)
+   TEST_VEXT(q, poly, p, 16, 8, 6);
+   TEST_VEXT(q, float, f, 32, 4, 3);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK_RESULTS_NO_FP16 (TEST_MSG, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_high.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_high.c
+@@ -16,35 +16,8 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ 					0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define TEST_MSG "VGET_HIGH"
+ void exec_vget_high (void)
+@@ -59,6 +32,9 @@ void exec_vget_high (void)
+   DECL_VARIABLE_128BITS_VARIANTS(vector128);
+ 
+   TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vector128, buffer);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VLOAD(vector128, buffer, q, float, f, 16, 8);
++#endif
+   VLOAD(vector128, buffer, q, float, f, 32, 4);
+ 
+   clean_results ();
+@@ -74,9 +50,22 @@ void exec_vget_high (void)
+   TEST_VGET_HIGH(uint, u, 64, 1, 2);
+   TEST_VGET_HIGH(poly, p, 8, 8, 16);
+   TEST_VGET_HIGH(poly, p, 16, 4, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VGET_HIGH(float, f, 16, 4, 8);
++#endif
+   TEST_VGET_HIGH(float, f, 32, 2, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_lane.c
+@@ -0,0 +1,125 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++int8_t     expected_s8   = 0xf7;
++int16_t    expected_s16  = 0xfff3;
++int32_t    expected_s32  = 0xfffffff1;
++int64_t    expected_s64  = 0xfffffffffffffff0;
++uint8_t    expected_u8   = 0xf6;
++uint16_t   expected_u16  = 0xfff2;
++uint32_t   expected_u32  = 0xfffffff1;
++uint64_t   expected_u64  = 0xfffffffffffffff0;
++poly8_t    expected_p8   = 0xf6;
++poly16_t   expected_p16  = 0xfff2;
++hfloat32_t expected_f32  = 0xc1700000;
++
++int8_t     expectedq_s8  = 0xff;
++int16_t    expectedq_s16 = 0xfff5;
++int32_t    expectedq_s32 = 0xfffffff3;
++int64_t    expectedq_s64 = 0xfffffffffffffff1;
++uint8_t    expectedq_u8  = 0xfe;
++uint16_t   expectedq_u16 = 0xfff6;
++uint32_t   expectedq_u32 = 0xfffffff2;
++uint64_t   expectedq_u64 = 0xfffffffffffffff1;
++poly8_t    expectedq_p8  = 0xfe;
++poly16_t   expectedq_p16 = 0xfff6;
++hfloat32_t expectedq_f32 = 0xc1500000;
++
++int error_found = 0;
++
++#define TEST_MSG "VGET_LANE"
++void exec_vget_lane (void)
++{
++  /* vec=vget_lane(vec, lane), then store the result.  */
++#define TEST_VGET_LANE(Q, T1, T2, W, N, L)				   \
++  VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
++  if (VAR(var, T1, W) != expected##Q##_##T2##W) {			   \
++    fprintf(stderr,							   \
++	    "ERROR in %s (%s line %d in result '%s') at type %s "	   \
++	    "got 0x%" PRIx##W " != 0x%" PRIx##W "\n",			   \
++	    TEST_MSG, __FILE__, __LINE__,				   \
++	    STR(expected##Q##_##T2##W),					   \
++	    STR(VECT_NAME(T1, W, N)),					   \
++	    VAR(var, T1, W),						   \
++	    expected##Q##_##T2##W);					   \
++    error_found = 1;							   \
++  }
++
++  /* Special variant for floating-point.  */
++  union {
++    uint32_t var_int32;
++    float32_t var_float32;
++  } var_int32_float32;
++
++#define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L)				   \
++  VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
++  var_int##W##_float##W.var_float##W = VAR(var, T1, W);			   \
++  if (var_int##W##_float##W.var_int##W != expected##Q##_##T2##W) {	   \
++    fprintf(stderr,							   \
++	    "ERROR in %s (%s line %d in result '%s') at type %s "	   \
++	    "got 0x%" PRIx##W " != 0x%" PRIx##W "\n",			   \
++	    TEST_MSG, __FILE__, __LINE__,				   \
++	    STR(expected##Q##_##T2##W),					   \
++	    STR(VECT_NAME(T1, W, N)),					   \
++	    var_int##W##_float##W.var_int##W,				   \
++	    expected##Q##_##T2##W);					   \
++    error_found = 1;							   \
++  }
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++
++  /* Scalar variables.  */
++  VAR_DECL(var, int, 8);
++  VAR_DECL(var, int, 16);
++  VAR_DECL(var, int, 32);
++  VAR_DECL(var, int, 64);
++  VAR_DECL(var, uint, 8);
++  VAR_DECL(var, uint, 16);
++  VAR_DECL(var, uint, 32);
++  VAR_DECL(var, uint, 64);
++  VAR_DECL(var, poly, 8);
++  VAR_DECL(var, poly, 16);
++  VAR_DECL(var, float, 32);
++
++  /* Initialize input values.  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++  VLOAD(vector, buffer, , float, f, 32, 2);
++  VLOAD(vector, buffer, q, float, f, 32, 4);
++
++  /* Choose lane arbitrarily.  */
++  TEST_VGET_LANE(, int, s, 8, 8, 7);
++  TEST_VGET_LANE(, int, s, 16, 4, 3);
++  TEST_VGET_LANE(, int, s, 32, 2, 1);
++  TEST_VGET_LANE(, int, s, 64, 1, 0);
++  TEST_VGET_LANE(, uint, u, 8, 8, 6);
++  TEST_VGET_LANE(, uint, u, 16, 4, 2);
++  TEST_VGET_LANE(, uint, u, 32, 2, 1);
++  TEST_VGET_LANE(, uint, u, 64, 1, 0);
++  TEST_VGET_LANE(, poly, p, 8, 8, 6);
++  TEST_VGET_LANE(, poly, p, 16, 4, 2);
++  TEST_VGET_LANE_FP(, float, f, 32, 2, 1);
++
++  TEST_VGET_LANE(q, int, s, 8, 16, 15);
++  TEST_VGET_LANE(q, int, s, 16, 8, 5);
++  TEST_VGET_LANE(q, int, s, 32, 4, 3);
++  TEST_VGET_LANE(q, int, s, 64, 2, 1);
++  TEST_VGET_LANE(q, uint, u, 8, 16, 14);
++  TEST_VGET_LANE(q, uint, u, 16, 8, 6);
++  TEST_VGET_LANE(q, uint, u, 32, 4, 2);
++  TEST_VGET_LANE(q, uint, u, 64, 2, 1);
++  TEST_VGET_LANE(q, poly, p, 8, 16, 14);
++  TEST_VGET_LANE(q, poly, p, 16, 8, 6);
++  TEST_VGET_LANE_FP(q, float, f, 32, 4, 3);
++}
++
++int main (void)
++{
++  exec_vget_lane ();
++
++  if (error_found)
++    abort();
++
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_low.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vget_low.c
+@@ -16,35 +16,8 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #define TEST_MSG "VGET_LOW"
+ void exec_vget_low (void)
+@@ -59,6 +32,9 @@ void exec_vget_low (void)
+   DECL_VARIABLE_128BITS_VARIANTS(vector128);
+ 
+   TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vector128, buffer);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VLOAD(vector128, buffer, q, float, f, 16, 8);
++#endif
+   VLOAD(vector128, buffer, q, float, f, 32, 4);
+ 
+   clean_results ();
+@@ -74,9 +50,25 @@ void exec_vget_low (void)
+   TEST_VGET_LOW(uint, u, 64, 1, 2);
+   TEST_VGET_LOW(poly, p, 8, 8, 16);
+   TEST_VGET_LOW(poly, p, 16, 4, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VGET_LOW(float, f, 16, 4, 8);
++#endif
+   TEST_VGET_LOW(float, f, 32, 2, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  CHECK_FP(TEST_MSG, float, 16, 4, PRIx16, expected, "");
++#endif
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1.c
+@@ -16,6 +16,7 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					0xf4, 0xf5, 0xf6, 0xf7,
+@@ -44,6 +45,8 @@ VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					 0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++					   0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 					   0xc1600000, 0xc1500000 };
+ 
+@@ -62,6 +65,10 @@ void exec_vld1 (void)
+ 
+   TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLD1, vector, buffer);
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VLD1(vector, buffer, , float, f, 16, 4);
++  TEST_VLD1(vector, buffer, q, float, f, 16, 8);
++#endif
+   TEST_VLD1(vector, buffer, , float, f, 32, 2);
+   TEST_VLD1(vector, buffer, q, float, f, 32, 4);
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1_dup.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1_dup.c
+@@ -17,6 +17,7 @@ VECT_VAR_DECL(expected0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected0,poly,8,8) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
+ 					 0xf0, 0xf0, 0xf0, 0xf0 };
+ VECT_VAR_DECL(expected0,poly,16,4) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0 };
++VECT_VAR_DECL(expected0,hfloat,16,4) [] = { 0xcc00, 0xcc00, 0xcc00, 0xcc00 };
+ VECT_VAR_DECL(expected0,hfloat,32,2) [] = { 0xc1800000, 0xc1800000 };
+ VECT_VAR_DECL(expected0,int,8,16) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
+ 					 0xf0, 0xf0, 0xf0, 0xf0,
+@@ -44,6 +45,8 @@ VECT_VAR_DECL(expected0,poly,8,16) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
+ 					  0xf0, 0xf0, 0xf0, 0xf0 };
+ VECT_VAR_DECL(expected0,poly,16,8) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0,
+ 					  0xfff0, 0xfff0, 0xfff0, 0xfff0 };
++VECT_VAR_DECL(expected0,hfloat,16,8) [] = { 0xcc00, 0xcc00, 0xcc00, 0xcc00,
++					    0xcc00, 0xcc00, 0xcc00, 0xcc00 };
+ VECT_VAR_DECL(expected0,hfloat,32,4) [] = { 0xc1800000, 0xc1800000,
+ 					    0xc1800000, 0xc1800000 };
+ 
+@@ -61,6 +64,7 @@ VECT_VAR_DECL(expected1,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected1,poly,8,8) [] = { 0xf1, 0xf1, 0xf1, 0xf1,
+ 					 0xf1, 0xf1, 0xf1, 0xf1 };
+ VECT_VAR_DECL(expected1,poly,16,4) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1 };
++VECT_VAR_DECL(expected1,hfloat,16,4) [] = { 0xcb80, 0xcb80, 0xcb80, 0xcb80 };
+ VECT_VAR_DECL(expected1,hfloat,32,2) [] = { 0xc1700000, 0xc1700000 };
+ VECT_VAR_DECL(expected1,int,8,16) [] = { 0xf1, 0xf1, 0xf1, 0xf1,
+ 					 0xf1, 0xf1, 0xf1, 0xf1,
+@@ -88,6 +92,8 @@ VECT_VAR_DECL(expected1,poly,8,16) [] = { 0xf1, 0xf1, 0xf1, 0xf1,
+ 					  0xf1, 0xf1, 0xf1, 0xf1 };
+ VECT_VAR_DECL(expected1,poly,16,8) [] = { 0xfff1, 0xfff1, 0xfff1, 0xfff1,
+ 					  0xfff1, 0xfff1, 0xfff1, 0xfff1 };
++VECT_VAR_DECL(expected1,hfloat,16,8) [] = { 0xcb80, 0xcb80, 0xcb80, 0xcb80,
++					    0xcb80, 0xcb80, 0xcb80, 0xcb80 };
+ VECT_VAR_DECL(expected1,hfloat,32,4) [] = { 0xc1700000, 0xc1700000,
+ 					    0xc1700000, 0xc1700000 };
+ 
+@@ -105,6 +111,7 @@ VECT_VAR_DECL(expected2,uint,64,1) [] = { 0xfffffffffffffff2 };
+ VECT_VAR_DECL(expected2,poly,8,8) [] = { 0xf2, 0xf2, 0xf2, 0xf2,
+ 					 0xf2, 0xf2, 0xf2, 0xf2 };
+ VECT_VAR_DECL(expected2,poly,16,4) [] = { 0xfff2, 0xfff2, 0xfff2, 0xfff2 };
++VECT_VAR_DECL(expected2,hfloat,16,4) [] = { 0xcb00, 0xcb00, 0xcb00, 0xcb00 };
+ VECT_VAR_DECL(expected2,hfloat,32,2) [] = { 0xc1600000, 0xc1600000 };
+ VECT_VAR_DECL(expected2,int,8,16) [] = { 0xf2, 0xf2, 0xf2, 0xf2,
+ 					 0xf2, 0xf2, 0xf2, 0xf2,
+@@ -132,6 +139,8 @@ VECT_VAR_DECL(expected2,poly,8,16) [] = { 0xf2, 0xf2, 0xf2, 0xf2,
+ 					  0xf2, 0xf2, 0xf2, 0xf2 };
+ VECT_VAR_DECL(expected2,poly,16,8) [] = { 0xfff2, 0xfff2, 0xfff2, 0xfff2,
+ 					  0xfff2, 0xfff2, 0xfff2, 0xfff2 };
++VECT_VAR_DECL(expected2,hfloat,16,8) [] = { 0xcb00, 0xcb00, 0xcb00, 0xcb00,
++					    0xcb00, 0xcb00, 0xcb00, 0xcb00 };
+ VECT_VAR_DECL(expected2,hfloat,32,4) [] = { 0xc1600000, 0xc1600000,
+ 					    0xc1600000, 0xc1600000 };
+ 
+@@ -154,6 +163,10 @@ void exec_vld1_dup (void)
+ 
+     TEST_MACRO_ALL_VARIANTS_2_5(TEST_VLD1_DUP, vector, buffer_dup);
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++    TEST_VLD1_DUP(vector, buffer_dup, , float, f, 16, 4);
++    TEST_VLD1_DUP(vector, buffer_dup, q, float, f, 16, 8);
++#endif
+     TEST_VLD1_DUP(vector, buffer_dup, , float, f, 32, 2);
+     TEST_VLD1_DUP(vector, buffer_dup, q, float, f, 32, 4);
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c
+@@ -16,6 +16,7 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					0xaa, 0xaa, 0xaa, 0xf0 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xfff0 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xcc00, 0xaaaa };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xaaaaaaaa, 0xc1800000 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					0xaa, 0xaa, 0xaa, 0xaa,
+@@ -43,6 +44,8 @@ VECT_VAR_DECL(expected,poly,8,16) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					 0xf0, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					 0xaaaa, 0xaaaa, 0xfff0, 0xaaaa };
++VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++					   0xaaaa, 0xcc00, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					   0xc1800000, 0xaaaaaaaa };
+ 
+@@ -72,6 +75,9 @@ void exec_vld1_lane (void)
+   ARRAY(buffer_src, uint, 64, 1);
+   ARRAY(buffer_src, poly, 8, 8);
+   ARRAY(buffer_src, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  ARRAY(buffer_src, float, 16, 4);
++#endif
+   ARRAY(buffer_src, float, 32, 2);
+ 
+   ARRAY(buffer_src, int, 8, 16);
+@@ -84,6 +90,9 @@ void exec_vld1_lane (void)
+   ARRAY(buffer_src, uint, 64, 2);
+   ARRAY(buffer_src, poly, 8, 16);
+   ARRAY(buffer_src, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  ARRAY(buffer_src, float, 16, 8);
++#endif
+   ARRAY(buffer_src, float, 32, 4);
+ 
+   clean_results ();
+@@ -99,6 +108,9 @@ void exec_vld1_lane (void)
+   TEST_VLD1_LANE(, uint, u, 64, 1, 0);
+   TEST_VLD1_LANE(, poly, p, 8, 8, 7);
+   TEST_VLD1_LANE(, poly, p, 16, 4, 3);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VLD1_LANE(, float, f, 16, 4, 2);
++#endif
+   TEST_VLD1_LANE(, float, f, 32, 2, 1);
+ 
+   TEST_VLD1_LANE(q, int, s, 8, 16, 15);
+@@ -111,6 +123,9 @@ void exec_vld1_lane (void)
+   TEST_VLD1_LANE(q, uint, u, 64, 2, 0);
+   TEST_VLD1_LANE(q, poly, p, 8, 16, 12);
+   TEST_VLD1_LANE(q, poly, p, 16, 8, 6);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VLD1_LANE(q, float, f, 16, 8, 5);
++#endif
+   TEST_VLD1_LANE(q, float, f, 32, 4, 2);
+ 
+   CHECK_RESULTS (TEST_MSG, "");
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x4x2_t
++f_vld2_lane_f16 (float16_t * p, float16x4x2_t v)
++{
++  float16x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x2x2_t
++f_vld2_lane_f32 (float32_t * p, float32x2x2_t v)
++{
++  float32x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x1x2_t
++f_vld2_lane_f64 (float64_t * p, float64x1x2_t v)
++{
++  float64x1x2_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++poly8x8x2_t
++f_vld2_lane_p8 (poly8_t * p, poly8x8x2_t v)
++{
++  poly8x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x4x2_t
++f_vld2_lane_s16 (int16_t * p, int16x4x2_t v)
++{
++  int16x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x2x2_t
++f_vld2_lane_s32 (int32_t * p, int32x2x2_t v)
++{
++  int32x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x1x2_t
++f_vld2_lane_s64 (int64_t * p, int64x1x2_t v)
++{
++  int64x1x2_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int8x8x2_t
++f_vld2_lane_s8 (int8_t * p, int8x8x2_t v)
++{
++  int8x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x4x2_t
++f_vld2_lane_u16 (uint16_t * p, uint16x4x2_t v)
++{
++  uint16x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x2x2_t
++f_vld2_lane_u32 (uint32_t * p, uint32x2x2_t v)
++{
++  uint32x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x1x2_t
++f_vld2_lane_u64 (uint64_t * p, uint64x1x2_t v)
++{
++  uint64x1x2_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld2_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint8x8x2_t
++f_vld2_lane_u8 (uint8_t * p, uint8x8x2_t v)
++{
++  uint8x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2_lane_u8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x8x2_t
++f_vld2q_lane_f16 (float16_t * p, float16x8x2_t v)
++{
++  float16x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x4x2_t
++f_vld2q_lane_f32 (float32_t * p, float32x4x2_t v)
++{
++  float32x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x2x2_t
++f_vld2q_lane_f64 (float64_t * p, float64x2x2_t v)
++{
++  float64x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_p8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++poly8x16x2_t
++f_vld2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
++{
++  poly8x16x2_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x8x2_t
++f_vld2q_lane_s16 (int16_t * p, int16x8x2_t v)
++{
++  int16x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x4x2_t
++f_vld2q_lane_s32 (int32_t * p, int32x4x2_t v)
++{
++  int32x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x2x2_t
++f_vld2q_lane_s64 (int64_t * p, int64x2x2_t v)
++{
++  int64x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_s8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int8x16x2_t
++f_vld2q_lane_s8 (int8_t * p, int8x16x2_t v)
++{
++  int8x16x2_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x8x2_t
++f_vld2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
++{
++  uint16x8x2_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x4x2_t
++f_vld2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
++{
++  uint32x4x2_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x2x2_t
++f_vld2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
++{
++  uint64x2x2_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_u8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint8x16x2_t
++f_vld2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
++{
++  uint8x16x2_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld2q_lane_u8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x4x3_t
++f_vld3_lane_f16 (float16_t * p, float16x4x3_t v)
++{
++  float16x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x2x3_t
++f_vld3_lane_f32 (float32_t * p, float32x2x3_t v)
++{
++  float32x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x1x3_t
++f_vld3_lane_f64 (float64_t * p, float64x1x3_t v)
++{
++  float64x1x3_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++poly8x8x3_t
++f_vld3_lane_p8 (poly8_t * p, poly8x8x3_t v)
++{
++  poly8x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x4x3_t
++f_vld3_lane_s16 (int16_t * p, int16x4x3_t v)
++{
++  int16x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x2x3_t
++f_vld3_lane_s32 (int32_t * p, int32x2x3_t v)
++{
++  int32x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x1x3_t
++f_vld3_lane_s64 (int64_t * p, int64x1x3_t v)
++{
++  int64x1x3_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int8x8x3_t
++f_vld3_lane_s8 (int8_t * p, int8x8x3_t v)
++{
++  int8x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x4x3_t
++f_vld3_lane_u16 (uint16_t * p, uint16x4x3_t v)
++{
++  uint16x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x2x3_t
++f_vld3_lane_u32 (uint32_t * p, uint32x2x3_t v)
++{
++  uint32x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x1x3_t
++f_vld3_lane_u64 (uint64_t * p, uint64x1x3_t v)
++{
++  uint64x1x3_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld3_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint8x8x3_t
++f_vld3_lane_u8 (uint8_t * p, uint8x8x3_t v)
++{
++  uint8x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3_lane_u8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x8x3_t
++f_vld3q_lane_f16 (float16_t * p, float16x8x3_t v)
++{
++  float16x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x4x3_t
++f_vld3q_lane_f32 (float32_t * p, float32x4x3_t v)
++{
++  float32x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x2x3_t
++f_vld3q_lane_f64 (float64_t * p, float64x2x3_t v)
++{
++  float64x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_p8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++poly8x16x3_t
++f_vld3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
++{
++  poly8x16x3_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x8x3_t
++f_vld3q_lane_s16 (int16_t * p, int16x8x3_t v)
++{
++  int16x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x4x3_t
++f_vld3q_lane_s32 (int32_t * p, int32x4x3_t v)
++{
++  int32x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x2x3_t
++f_vld3q_lane_s64 (int64_t * p, int64x2x3_t v)
++{
++  int64x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_s8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int8x16x3_t
++f_vld3q_lane_s8 (int8_t * p, int8x16x3_t v)
++{
++  int8x16x3_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x8x3_t
++f_vld3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
++{
++  uint16x8x3_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x4x3_t
++f_vld3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
++{
++  uint32x4x3_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x2x3_t
++f_vld3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
++{
++  uint64x2x3_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_u8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint8x16x3_t
++f_vld3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
++{
++  uint8x16x3_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld3q_lane_u8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x4x4_t
++f_vld4_lane_f16 (float16_t * p, float16x4x4_t v)
++{
++  float16x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x2x4_t
++f_vld4_lane_f32 (float32_t * p, float32x2x4_t v)
++{
++  float32x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x1x4_t
++f_vld4_lane_f64 (float64_t * p, float64x1x4_t v)
++{
++  float64x1x4_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++poly8x8x4_t
++f_vld4_lane_p8 (poly8_t * p, poly8x8x4_t v)
++{
++  poly8x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x4x4_t
++f_vld4_lane_s16 (int16_t * p, int16x4x4_t v)
++{
++  int16x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x2x4_t
++f_vld4_lane_s32 (int32_t * p, int32x2x4_t v)
++{
++  int32x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x1x4_t
++f_vld4_lane_s64 (int64_t * p, int64x1x4_t v)
++{
++  int64x1x4_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int8x8x4_t
++f_vld4_lane_s8 (int8_t * p, int8x8x4_t v)
++{
++  int8x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x4x4_t
++f_vld4_lane_u16 (uint16_t * p, uint16x4x4_t v)
++{
++  uint16x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x2x4_t
++f_vld4_lane_u32 (uint32_t * p, uint32x2x4_t v)
++{
++  uint32x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x1x4_t
++f_vld4_lane_u64 (uint64_t * p, uint64x1x4_t v)
++{
++  uint64x1x4_t res;
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  res = vld4_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint8x8x4_t
++f_vld4_lane_u8 (uint8_t * p, uint8x8x4_t v)
++{
++  uint8x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4_lane_u8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float16x8x4_t
++f_vld4q_lane_f16 (float16_t * p, float16x8x4_t v)
++{
++  float16x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++float32x4x4_t
++f_vld4q_lane_f32 (float32_t * p, float32x4x4_t v)
++{
++  float32x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++float64x2x4_t
++f_vld4q_lane_f64 (float64_t * p, float64x2x4_t v)
++{
++  float64x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_f64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_p8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++poly8x16x4_t
++f_vld4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
++{
++  poly8x16x4_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_p8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int16x8x4_t
++f_vld4q_lane_s16 (int16_t * p, int16x8x4_t v)
++{
++  int16x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++int32x4x4_t
++f_vld4q_lane_s32 (int32_t * p, int32x4x4_t v)
++{
++  int32x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int64x2x4_t
++f_vld4q_lane_s64 (int64_t * p, int64x2x4_t v)
++{
++  int64x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_s8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++int8x16x4_t
++f_vld4q_lane_s8 (int8_t * p, int8x16x4_t v)
++{
++  int8x16x4_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_s8 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u16_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint16x8x4_t
++f_vld4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
++{
++  uint16x8x4_t res;
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u16 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u32_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++uint32x4x4_t
++f_vld4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
++{
++  uint32x4x4_t res;
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u32 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u64_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint64x2x4_t
++f_vld4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
++{
++  uint64x2x4_t res;
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u64 (p, v, -1);
++  return res;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_u8_indices_1.c
+@@ -0,0 +1,16 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++uint8x16x4_t
++f_vld4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
++{
++  uint8x16x4_t res;
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  res = vld4q_lane_u8 (p, v, -1);
++  return res;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX.c
+@@ -18,6 +18,7 @@ VECT_VAR_DECL(expected_vld2_0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected_vld2_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected_vld2_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld2_0,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld2_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+ VECT_VAR_DECL(expected_vld2_0,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7,
+@@ -27,8 +28,6 @@ VECT_VAR_DECL(expected_vld2_0,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					       0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld2_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					       0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld2_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_0,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+@@ -37,14 +36,14 @@ VECT_VAR_DECL(expected_vld2_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld2_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld2_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_0,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+ 						0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld2_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld2_0,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++						  0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld2_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 						  0xc1600000, 0xc1500000 };
+ 
+@@ -62,6 +61,7 @@ VECT_VAR_DECL(expected_vld2_1,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected_vld2_1,poly,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ 					       0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld2_1,poly,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld2_1,hfloat,16,4) [] = { 0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld2_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+ VECT_VAR_DECL(expected_vld2_1,int,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7,
+@@ -71,8 +71,6 @@ VECT_VAR_DECL(expected_vld2_1,int,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 					       0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld2_1,int,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 					       0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld2_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_1,uint,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+@@ -81,14 +79,14 @@ VECT_VAR_DECL(expected_vld2_1,uint,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld2_1,uint,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 						0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld2_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_1,poly,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+ 						0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld2_1,poly,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
++VECT_VAR_DECL(expected_vld2_1,hfloat,16,8) [] = { 0xc800, 0xc700, 0xc600, 0xc500,
++						  0xc400, 0xc200, 0xc000, 0xbc00 };
+ VECT_VAR_DECL(expected_vld2_1,hfloat,32,4) [] = { 0xc1400000, 0xc1300000,
+ 						  0xc1200000, 0xc1100000 };
+ 
+@@ -106,6 +104,7 @@ VECT_VAR_DECL(expected_vld3_0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected_vld3_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected_vld3_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld3_0,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld3_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+ VECT_VAR_DECL(expected_vld3_0,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7,
+@@ -115,8 +114,6 @@ VECT_VAR_DECL(expected_vld3_0,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					       0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld3_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					       0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld3_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_0,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+@@ -125,14 +122,14 @@ VECT_VAR_DECL(expected_vld3_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld3_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld3_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_0,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+ 						0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld3_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld3_0,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++						  0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld3_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 						  0xc1600000, 0xc1500000 };
+ 
+@@ -150,6 +147,7 @@ VECT_VAR_DECL(expected_vld3_1,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected_vld3_1,poly,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ 					       0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld3_1,poly,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld3_1,hfloat,16,4) [] = { 0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld3_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+ VECT_VAR_DECL(expected_vld3_1,int,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7,
+@@ -159,8 +157,6 @@ VECT_VAR_DECL(expected_vld3_1,int,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 					       0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld3_1,int,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 					       0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld3_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_1,uint,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+@@ -169,14 +165,14 @@ VECT_VAR_DECL(expected_vld3_1,uint,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld3_1,uint,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 						0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld3_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_1,poly,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+ 						0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld3_1,poly,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
++VECT_VAR_DECL(expected_vld3_1,hfloat,16,8) [] = { 0xc800, 0xc700, 0xc600, 0xc500,
++						  0xc400, 0xc200, 0xc000, 0xbc00 };
+ VECT_VAR_DECL(expected_vld3_1,hfloat,32,4) [] = { 0xc1400000, 0xc1300000,
+ 						  0xc1200000, 0xc1100000 };
+ 
+@@ -197,6 +193,7 @@ VECT_VAR_DECL(expected_vld3_2,poly,8,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld3_2,poly,16,4) [] = { 0xfff8, 0xfff9,
+ 						0xfffa, 0xfffb };
++VECT_VAR_DECL(expected_vld3_2,hfloat,16,4) [] = { 0xc800, 0xc700, 0xc600, 0xc500 };
+ VECT_VAR_DECL(expected_vld3_2,hfloat,32,2) [] = { 0xc1400000, 0xc1300000 };
+ VECT_VAR_DECL(expected_vld3_2,int,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 					       0x14, 0x15, 0x16, 0x17,
+@@ -206,8 +203,6 @@ VECT_VAR_DECL(expected_vld3_2,int,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld3_2,int,32,4) [] = { 0xfffffff8, 0xfffffff9,
+ 					       0xfffffffa, 0xfffffffb };
+-VECT_VAR_DECL(expected_vld3_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_2,uint,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 						0x14, 0x15, 0x16, 0x17,
+ 						0x18, 0x19, 0x1a, 0x1b,
+@@ -216,14 +211,14 @@ VECT_VAR_DECL(expected_vld3_2,uint,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld3_2,uint,32,4) [] = { 0xfffffff8, 0xfffffff9,
+ 						0xfffffffa, 0xfffffffb };
+-VECT_VAR_DECL(expected_vld3_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_2,poly,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 						0x14, 0x15, 0x16, 0x17,
+ 						0x18, 0x19, 0x1a, 0x1b,
+ 						0x1c, 0x1d, 0x1e, 0x1f };
+ VECT_VAR_DECL(expected_vld3_2,poly,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7 };
++VECT_VAR_DECL(expected_vld3_2,hfloat,16,8) [] = { 0x0000, 0x3c00, 0x4000, 0x4200,
++						  0x4400, 0x4500, 0x4600, 0x4700 };
+ VECT_VAR_DECL(expected_vld3_2,hfloat,32,4) [] = { 0xc1000000, 0xc0e00000,
+ 						  0xc0c00000, 0xc0a00000 };
+ 
+@@ -243,6 +238,7 @@ VECT_VAR_DECL(expected_vld4_0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected_vld4_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected_vld4_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_0,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+ VECT_VAR_DECL(expected_vld4_0,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf4, 0xf5, 0xf6, 0xf7,
+@@ -252,8 +248,6 @@ VECT_VAR_DECL(expected_vld4_0,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					       0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld4_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					       0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_0,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+@@ -262,14 +256,14 @@ VECT_VAR_DECL(expected_vld4_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected_vld4_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_0,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						0xf4, 0xf5, 0xf6, 0xf7,
+ 						0xf8, 0xf9, 0xfa, 0xfb,
+ 						0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld4_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld4_0,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++						  0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld4_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 						  0xc1600000, 0xc1500000 };
+ 
+@@ -287,6 +281,7 @@ VECT_VAR_DECL(expected_vld4_1,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected_vld4_1,poly,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
+ 					       0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_vld4_1,poly,16,4) [] = { 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_vld4_1,hfloat,16,4) [] = { 0xca00, 0xc980, 0xc900, 0xc880 };
+ VECT_VAR_DECL(expected_vld4_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+ VECT_VAR_DECL(expected_vld4_1,int,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7,
+@@ -296,8 +291,6 @@ VECT_VAR_DECL(expected_vld4_1,int,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 					       0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld4_1,int,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 					       0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld4_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_1,uint,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+@@ -306,14 +299,14 @@ VECT_VAR_DECL(expected_vld4_1,uint,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected_vld4_1,uint,32,4) [] = { 0xfffffff4, 0xfffffff5,
+ 						0xfffffff6, 0xfffffff7 };
+-VECT_VAR_DECL(expected_vld4_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_1,poly,8,16) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7,
+ 						0x8, 0x9, 0xa, 0xb,
+ 						0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld4_1,poly,16,8) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb,
+ 						0xfffc, 0xfffd, 0xfffe, 0xffff };
++VECT_VAR_DECL(expected_vld4_1,hfloat,16,8) [] = { 0xc800, 0xc700, 0xc600, 0xc500,
++						  0xc400, 0xc200, 0xc000, 0xbc00 };
+ VECT_VAR_DECL(expected_vld4_1,hfloat,32,4) [] = { 0xc1400000, 0xc1300000,
+ 						  0xc1200000, 0xc1100000 };
+ 
+@@ -331,6 +324,7 @@ VECT_VAR_DECL(expected_vld4_2,uint,64,1) [] = { 0xfffffffffffffff2 };
+ VECT_VAR_DECL(expected_vld4_2,poly,8,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld4_2,poly,16,4) [] = { 0xfff8, 0xfff9, 0xfffa, 0xfffb };
++VECT_VAR_DECL(expected_vld4_2,hfloat,16,4) [] = { 0xc800, 0xc700, 0xc600, 0xc500 };
+ VECT_VAR_DECL(expected_vld4_2,hfloat,32,2) [] = { 0xc1400000, 0xc1300000 };
+ VECT_VAR_DECL(expected_vld4_2,int,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 					       0x14, 0x15, 0x16, 0x17,
+@@ -340,8 +334,6 @@ VECT_VAR_DECL(expected_vld4_2,int,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 					       0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld4_2,int,32,4) [] = { 0xfffffff8, 0xfffffff9,
+ 					       0xfffffffa, 0xfffffffb };
+-VECT_VAR_DECL(expected_vld4_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_2,uint,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 						0x14, 0x15, 0x16, 0x17,
+ 						0x18, 0x19, 0x1a, 0x1b,
+@@ -350,14 +342,14 @@ VECT_VAR_DECL(expected_vld4_2,uint,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7 };
+ VECT_VAR_DECL(expected_vld4_2,uint,32,4) [] = { 0xfffffff8, 0xfffffff9,
+ 						0xfffffffa, 0xfffffffb };
+-VECT_VAR_DECL(expected_vld4_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_2,poly,8,16) [] = { 0x10, 0x11, 0x12, 0x13,
+ 						0x14, 0x15, 0x16, 0x17,
+ 						0x18, 0x19, 0x1a, 0x1b,
+ 						0x1c, 0x1d, 0x1e, 0x1f };
+ VECT_VAR_DECL(expected_vld4_2,poly,16,8) [] = { 0x0, 0x1, 0x2, 0x3,
+ 						0x4, 0x5, 0x6, 0x7 };
++VECT_VAR_DECL(expected_vld4_2,hfloat,16,8) [] = { 0x0000, 0x3c00, 0x4000, 0x4200,
++						  0x4400, 0x4500, 0x4600, 0x4700 };
+ VECT_VAR_DECL(expected_vld4_2,hfloat,32,4) [] = { 0xc1000000, 0xc0e00000,
+ 						  0xc0c00000, 0xc0a00000 };
+ 
+@@ -375,6 +367,7 @@ VECT_VAR_DECL(expected_vld4_3,uint,64,1) [] = { 0xfffffffffffffff3 };
+ VECT_VAR_DECL(expected_vld4_3,poly,8,8) [] = { 0x8, 0x9, 0xa, 0xb,
+ 					       0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld4_3,poly,16,4) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff };
++VECT_VAR_DECL(expected_vld4_3,hfloat,16,4) [] = { 0xc400, 0xc200, 0xc000, 0xbc00 };
+ VECT_VAR_DECL(expected_vld4_3,hfloat,32,2) [] = { 0xc1200000, 0xc1100000 };
+ VECT_VAR_DECL(expected_vld4_3,int,8,16) [] = { 0x20, 0x21, 0x22, 0x23,
+ 					       0x24, 0x25, 0x26, 0x27,
+@@ -384,8 +377,6 @@ VECT_VAR_DECL(expected_vld4_3,int,16,8) [] = { 0x8, 0x9, 0xa, 0xb,
+ 					       0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld4_3,int,32,4) [] = { 0xfffffffc, 0xfffffffd,
+ 					       0xfffffffe, 0xffffffff };
+-VECT_VAR_DECL(expected_vld4_3,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_3,uint,8,16) [] = { 0x20, 0x21, 0x22, 0x23,
+ 						0x24, 0x25, 0x26, 0x27,
+ 						0x28, 0x29, 0x2a, 0x2b,
+@@ -394,14 +385,14 @@ VECT_VAR_DECL(expected_vld4_3,uint,16,8) [] = { 0x8, 0x9, 0xa, 0xb,
+ 						0xc, 0xd, 0xe, 0xf };
+ VECT_VAR_DECL(expected_vld4_3,uint,32,4) [] = { 0xfffffffc, 0xfffffffd,
+ 						0xfffffffe, 0xffffffff };
+-VECT_VAR_DECL(expected_vld4_3,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_3,poly,8,16) [] = { 0x20, 0x21, 0x22, 0x23,
+ 						0x24, 0x25, 0x26, 0x27,
+ 						0x28, 0x29, 0x2a, 0x2b,
+ 						0x2c, 0x2d, 0x2e, 0x2f };
+ VECT_VAR_DECL(expected_vld4_3,poly,16,8) [] = { 0x8, 0x9, 0xa, 0xb,
+ 						0xc, 0xd, 0xe, 0xf };
++VECT_VAR_DECL(expected_vld4_3,hfloat,16,8) [] = { 0x4800, 0x4880, 0x4900, 0x4980,
++						  0x4a00, 0x4a80, 0x4b00, 0x4b80 };
+ VECT_VAR_DECL(expected_vld4_3,hfloat,32,4) [] = { 0xc0800000, 0xc0400000,
+ 						  0xc0000000, 0xbf800000 };
+ 
+@@ -434,7 +425,7 @@ void exec_vldX (void)
+ 	 sizeof(VECT_VAR(result, T1, W, N)));
+ 
+   /* We need all variants in 64 bits, but there is no 64x2 variant.  */
+-#define DECL_ALL_VLDX(X)			\
++#define DECL_ALL_VLDX_NO_FP16(X)		\
+   DECL_VLDX(int, 8, 8, X);			\
+   DECL_VLDX(int, 16, 4, X);			\
+   DECL_VLDX(int, 32, 2, X);			\
+@@ -456,7 +447,16 @@ void exec_vldX (void)
+   DECL_VLDX(poly, 16, 8, X);			\
+   DECL_VLDX(float, 32, 4, X)
+ 
+-#define TEST_ALL_VLDX(X)			\
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define DECL_ALL_VLDX(X)	\
++  DECL_ALL_VLDX_NO_FP16(X);	\
++  DECL_VLDX(float, 16, 4, X);	\
++  DECL_VLDX(float, 16, 8, X)
++#else
++#define DECL_ALL_VLDX(X) DECL_ALL_VLDX_NO_FP16(X)
++#endif
++
++#define TEST_ALL_VLDX_NO_FP16(X)		\
+   TEST_VLDX(, int, s, 8, 8, X);			\
+   TEST_VLDX(, int, s, 16, 4, X);		\
+   TEST_VLDX(, int, s, 32, 2, X);		\
+@@ -478,7 +478,16 @@ void exec_vldX (void)
+   TEST_VLDX(q, poly, p, 16, 8, X);		\
+   TEST_VLDX(q, float, f, 32, 4, X)
+ 
+-#define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_VLDX(X)		\
++  TEST_ALL_VLDX_NO_FP16(X);		\
++  TEST_VLDX(, float, f, 16, 4, X);	\
++  TEST_VLDX(q, float, f, 16, 8, X)
++#else
++#define TEST_ALL_VLDX(X) TEST_ALL_VLDX_NO_FP16(X)
++#endif
++
++#define TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)	\
+   TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
+@@ -500,6 +509,51 @@ void exec_vldX (void)
+   TEST_EXTRA_CHUNK(poly, 16, 8, X, Y);		\
+   TEST_EXTRA_CHUNK(float, 32, 4, X, Y)
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
++  TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)		\
++  TEST_EXTRA_CHUNK(float, 16, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(float, 16, 8, X, Y);
++#else
++#define TEST_ALL_EXTRA_CHUNKS(X, Y) TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)
++#endif
++
++  /* vldX supports all vector types except [u]int64x2.  */
++#define CHECK_RESULTS_VLDX_NO_FP16(test_name,EXPECTED,comment)		\
++    CHECK(test_name, int, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, int, 64, 1, PRIx64, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment);	\
++									\
++    CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment)
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define CHECK_RESULTS_VLDX(test_name,EXPECTED,comment)			\
++  {									\
++    CHECK_RESULTS_VLDX_NO_FP16(test_name, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 16, 4, PRIx16, EXPECTED, comment);	\
++    CHECK_FP(test_name, float, 16, 8, PRIx16, EXPECTED, comment);	\
++  }
++#else
++#define CHECK_RESULTS_VLDX(test_name, EXPECTED, comment)		\
++  { CHECK_RESULTS_VLDX_NO_FP16(test_name, EXPECTED, comment); }
++#endif
++
+   DECL_ALL_VLDX(2);
+   DECL_ALL_VLDX(3);
+   DECL_ALL_VLDX(4);
+@@ -526,6 +580,10 @@ void exec_vldX (void)
+   PAD(buffer_vld2_pad, poly, 8, 8);
+   VECT_ARRAY_INIT2(buffer_vld2, poly, 16, 4);
+   PAD(buffer_vld2_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT2(buffer_vld2, float, 16, 4);
++  PAD(buffer_vld2_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT2(buffer_vld2, float, 32, 2);
+   PAD(buffer_vld2_pad, float, 32, 2);
+ 
+@@ -549,6 +607,10 @@ void exec_vldX (void)
+   PAD(buffer_vld2_pad, poly, 8, 16);
+   VECT_ARRAY_INIT2(buffer_vld2, poly, 16, 8);
+   PAD(buffer_vld2_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT2(buffer_vld2, float, 16, 8);
++  PAD(buffer_vld2_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT2(buffer_vld2, float, 32, 4);
+   PAD(buffer_vld2_pad, float, 32, 4);
+ 
+@@ -573,6 +635,10 @@ void exec_vldX (void)
+   PAD(buffer_vld3_pad, poly, 8, 8);
+   VECT_ARRAY_INIT3(buffer_vld3, poly, 16, 4);
+   PAD(buffer_vld3_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT3(buffer_vld3, float, 16, 4);
++  PAD(buffer_vld3_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT3(buffer_vld3, float, 32, 2);
+   PAD(buffer_vld3_pad, float, 32, 2);
+ 
+@@ -596,6 +662,10 @@ void exec_vldX (void)
+   PAD(buffer_vld3_pad, poly, 8, 16);
+   VECT_ARRAY_INIT3(buffer_vld3, poly, 16, 8);
+   PAD(buffer_vld3_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT3(buffer_vld3, float, 16, 8);
++  PAD(buffer_vld3_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT3(buffer_vld3, float, 32, 4);
+   PAD(buffer_vld3_pad, float, 32, 4);
+ 
+@@ -620,6 +690,10 @@ void exec_vldX (void)
+   PAD(buffer_vld4_pad, poly, 8, 8);
+   VECT_ARRAY_INIT4(buffer_vld4, poly, 16, 4);
+   PAD(buffer_vld4_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT4(buffer_vld4, float, 16, 4);
++  PAD(buffer_vld4_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT4(buffer_vld4, float, 32, 2);
+   PAD(buffer_vld4_pad, float, 32, 2);
+ 
+@@ -643,6 +717,10 @@ void exec_vldX (void)
+   PAD(buffer_vld4_pad, poly, 8, 16);
+   VECT_ARRAY_INIT4(buffer_vld4, poly, 16, 8);
+   PAD(buffer_vld4_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT4(buffer_vld4, float, 16, 8);
++  PAD(buffer_vld4_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT4(buffer_vld4, float, 32, 4);
+   PAD(buffer_vld4_pad, float, 32, 4);
+ 
+@@ -650,39 +728,39 @@ void exec_vldX (void)
+   clean_results ();
+ #define TEST_MSG "VLD2/VLD2Q"
+   TEST_ALL_VLDX(2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_0, "chunk 0");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld2_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(2, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_1, "chunk 1");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld2_1, "chunk 1");
+ 
+   /* Check vld3/vld3q.  */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD3/VLD3Q"
+   TEST_ALL_VLDX(3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_0, "chunk 0");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld3_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_1, "chunk 1");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld3_1, "chunk 1");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_2, "chunk 2");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld3_2, "chunk 2");
+ 
+   /* Check vld4/vld4q.  */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD4/VLD4Q"
+   TEST_ALL_VLDX(4);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_0, "chunk 0");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld4_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_1, "chunk 1");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld4_1, "chunk 1");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_2, "chunk 2");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld4_2, "chunk 2");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_3, "chunk 3");
++  CHECK_RESULTS_VLDX (TEST_MSG, expected_vld4_3, "chunk 3");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c
+@@ -18,35 +18,8 @@ VECT_VAR_DECL(expected_vld2_0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected_vld2_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf0, 0xf1,
+ 					0xf0, 0xf1, 0xf0, 0xf1 };
+ VECT_VAR_DECL(expected_vld2_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff0, 0xfff1 };
++VECT_VAR_DECL(expected_vld2_0,hfloat,16,4) [] = {0xcc00, 0xcb80, 0xcc00, 0xcb80 };
+ VECT_VAR_DECL(expected_vld2_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld2_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_0,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_0,int,32,4) [] = { 0x33333333, 0x33333333,
+-					0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld2_0,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_0,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_0,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld2_0,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_0,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_0,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* vld2_dup/chunk 1.  */
+ VECT_VAR_DECL(expected_vld2_1,int,8,8) [] = { 0xf0, 0xf1, 0xf0, 0xf1,
+@@ -63,35 +36,8 @@ VECT_VAR_DECL(expected_vld2_1,poly,8,8) [] = { 0xf0, 0xf1, 0xf0, 0xf1,
+ 					       0xf0, 0xf1, 0xf0, 0xf1 };
+ VECT_VAR_DECL(expected_vld2_1,poly,16,4) [] = { 0xfff0, 0xfff1,
+ 						0xfff0, 0xfff1 };
++VECT_VAR_DECL(expected_vld2_1,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcc00, 0xcb80 };
+ VECT_VAR_DECL(expected_vld2_1,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld2_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_1,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_1,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld2_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_1,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_1,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld2_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld2_1,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld2_1,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld3_dup/chunk 0.  */
+ VECT_VAR_DECL(expected_vld3_0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf0,
+@@ -110,35 +56,8 @@ VECT_VAR_DECL(expected_vld3_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf0,
+ 					       0xf1, 0xf2, 0xf0, 0xf1 };
+ VECT_VAR_DECL(expected_vld3_0,poly,16,4) [] = { 0xfff0, 0xfff1,
+ 						0xfff2, 0xfff0 };
++VECT_VAR_DECL(expected_vld3_0,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xcc00 };
+ VECT_VAR_DECL(expected_vld3_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld3_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_0,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_0,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_0,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_0,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_0,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_0,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld3_dup/chunk 1.  */
+ VECT_VAR_DECL(expected_vld3_1,int,8,8) [] = { 0xf2, 0xf0, 0xf1, 0xf2,
+@@ -157,35 +76,8 @@ VECT_VAR_DECL(expected_vld3_1,poly,8,8) [] = { 0xf2, 0xf0, 0xf1, 0xf2,
+ 					       0xf0, 0xf1, 0xf2, 0xf0 };
+ VECT_VAR_DECL(expected_vld3_1,poly,16,4) [] = { 0xfff1, 0xfff2,
+ 						0xfff0, 0xfff1 };
++VECT_VAR_DECL(expected_vld3_1,hfloat,16,4) [] = { 0xcb80, 0xcb00, 0xcc00, 0xcb80 };
+ VECT_VAR_DECL(expected_vld3_1,hfloat,32,2) [] = { 0xc1600000, 0xc1800000 };
+-VECT_VAR_DECL(expected_vld3_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_1,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_1,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_1,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_1,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_1,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_1,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld3_dup/chunk 2.  */
+ VECT_VAR_DECL(expected_vld3_2,int,8,8) [] = { 0xf1, 0xf2, 0xf0, 0xf1,
+@@ -204,35 +96,8 @@ VECT_VAR_DECL(expected_vld3_2,poly,8,8) [] = { 0xf1, 0xf2, 0xf0, 0xf1,
+ 					       0xf2, 0xf0, 0xf1, 0xf2 };
+ VECT_VAR_DECL(expected_vld3_2,poly,16,4) [] = { 0xfff2, 0xfff0,
+ 						0xfff1, 0xfff2 };
++VECT_VAR_DECL(expected_vld3_2,hfloat,16,4) [] = { 0xcb00, 0xcc00, 0xcb80, 0xcb00 };
+ VECT_VAR_DECL(expected_vld3_2,hfloat,32,2) [] = { 0xc1700000, 0xc1600000 };
+-VECT_VAR_DECL(expected_vld3_2,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_2,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_2,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_2,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_2,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_2,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld3_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_2,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld3_2,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld3_2,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld4_dup/chunk 0.  */
+ VECT_VAR_DECL(expected_vld4_0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+@@ -249,35 +114,8 @@ VECT_VAR_DECL(expected_vld4_0,uint,64,1) [] = { 0xfffffffffffffff0 };
+ VECT_VAR_DECL(expected_vld4_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf0, 0xf1, 0xf2, 0xf3 };
+ VECT_VAR_DECL(expected_vld4_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_0,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld4_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_0,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_0,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_0,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_0,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_0,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_0,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld4_dup/chunk 1.  */
+ VECT_VAR_DECL(expected_vld4_1,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+@@ -293,35 +131,8 @@ VECT_VAR_DECL(expected_vld4_1,uint,64,1) [] = { 0xfffffffffffffff1 };
+ VECT_VAR_DECL(expected_vld4_1,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf0, 0xf1, 0xf2, 0xf3 };
+ VECT_VAR_DECL(expected_vld4_1,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_1,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+-VECT_VAR_DECL(expected_vld4_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_1,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_1,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_1,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_1,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_1,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_1,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld4_dup/chunk 2.  */
+ VECT_VAR_DECL(expected_vld4_2,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+@@ -337,35 +148,8 @@ VECT_VAR_DECL(expected_vld4_2,uint,64,1) [] = { 0xfffffffffffffff2 };
+ VECT_VAR_DECL(expected_vld4_2,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf0, 0xf1, 0xf2, 0xf3 };
+ VECT_VAR_DECL(expected_vld4_2,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_2,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_2,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld4_2,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_2,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_2,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_2,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_2,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_2,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_2,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_2,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_2,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ /* vld4_dup/chunk3.  */
+ VECT_VAR_DECL(expected_vld4_3,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+@@ -381,34 +165,8 @@ VECT_VAR_DECL(expected_vld4_3,uint,64,1) [] = { 0xfffffffffffffff3 };
+ VECT_VAR_DECL(expected_vld4_3,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xf0, 0xf1, 0xf2, 0xf3 };
+ VECT_VAR_DECL(expected_vld4_3,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_3,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_3,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+-VECT_VAR_DECL(expected_vld4_3,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_3,int,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					       0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_3,int,32,4) [] = { 0x33333333, 0x33333333,
+-					       0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_3,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_3,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_3,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_3,uint,32,4) [] = { 0x33333333, 0x33333333,
+-						0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected_vld4_3,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_3,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_vld4_3,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-						0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_vld4_3,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						  0x33333333, 0x33333333 };
+ 
+ void exec_vldX_dup (void)
+ {
+@@ -439,7 +197,7 @@ void exec_vldX_dup (void)
+ 	 &(VECT_VAR(result_bis_##X, T1, W, N)[Y*N]),	\
+ 	 sizeof(VECT_VAR(result, T1, W, N)));
+ 
+-#define DECL_ALL_VLDX_DUP(X)			\
++#define DECL_ALL_VLDX_DUP_NO_FP16(X)		\
+   DECL_VLDX_DUP(int, 8, 8, X);			\
+   DECL_VLDX_DUP(int, 16, 4, X);			\
+   DECL_VLDX_DUP(int, 32, 2, X);			\
+@@ -452,7 +210,15 @@ void exec_vldX_dup (void)
+   DECL_VLDX_DUP(poly, 16, 4, X);		\
+   DECL_VLDX_DUP(float, 32, 2, X)
+ 
+-#define TEST_ALL_VLDX_DUP(X)			\
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define DECL_ALL_VLDX_DUP(X)		\
++  DECL_ALL_VLDX_DUP_NO_FP16(X);		\
++  DECL_VLDX_DUP(float, 16, 4, X)
++#else
++#define DECL_ALL_VLDX_DUP(X) DECL_ALL_VLDX_DUP_NO_FP16(X)
++#endif
++
++#define TEST_ALL_VLDX_DUP_NO_FP16(X)		\
+   TEST_VLDX_DUP(, int, s, 8, 8, X);		\
+   TEST_VLDX_DUP(, int, s, 16, 4, X);		\
+   TEST_VLDX_DUP(, int, s, 32, 2, X);		\
+@@ -465,7 +231,15 @@ void exec_vldX_dup (void)
+   TEST_VLDX_DUP(, poly, p, 16, 4, X);		\
+   TEST_VLDX_DUP(, float, f, 32, 2, X)
+ 
+-#define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_VLDX_DUP(X)		\
++  TEST_ALL_VLDX_DUP_NO_FP16(X);		\
++  TEST_VLDX_DUP(, float, f, 16, 4, X)
++#else
++#define TEST_ALL_VLDX_DUP(X) TEST_ALL_VLDX_DUP_NO_FP16(X)
++#endif
++
++#define TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)	\
+   TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
+@@ -478,6 +252,40 @@ void exec_vldX_dup (void)
+   TEST_EXTRA_CHUNK(poly, 16, 4, X, Y);		\
+   TEST_EXTRA_CHUNK(float, 32, 2, X, Y)
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_EXTRA_CHUNKS(X, Y)	\
++  TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y);	\
++  TEST_EXTRA_CHUNK(float, 16, 4, X, Y)
++#else
++#define TEST_ALL_EXTRA_CHUNKS(X, Y) TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)
++#endif
++
++  /* vldX_dup supports only 64-bit inputs.  */
++#define CHECK_RESULTS_VLDX_DUP_NO_FP16(test_name,EXPECTED,comment)	\
++    CHECK(test_name, int, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, int, 64, 1, PRIx64, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment)
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define CHECK_RESULTS_VLDX_DUP(test_name,EXPECTED,comment)		\
++  {									\
++    CHECK_RESULTS_VLDX_DUP_NO_FP16(test_name,EXPECTED,comment);		\
++    CHECK_FP(test_name, float, 16, 4, PRIx16, EXPECTED, comment);	\
++  }
++#else
++#define CHECK_RESULTS_VLDX_DUP(test_name,EXPECTED,comment)		\
++  {									\
++    CHECK_RESULTS_VLDX_DUP_NO_FP16(test_name,EXPECTED,comment);		\
++  }
++#endif
+ 
+   DECL_ALL_VLDX_DUP(2);
+   DECL_ALL_VLDX_DUP(3);
+@@ -505,6 +313,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld2_pad, poly, 8, 8);
+   VECT_ARRAY_INIT2(buffer_vld2, poly, 16, 4);
+   PAD(buffer_vld2_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT2(buffer_vld2, float, 16, 4);
++  PAD(buffer_vld2_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT2(buffer_vld2, float, 32, 2);
+   PAD(buffer_vld2_pad, float, 32, 2);
+ 
+@@ -528,6 +340,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld2_pad, poly, 8, 16);
+   VECT_ARRAY_INIT2(buffer_vld2, poly, 16, 8);
+   PAD(buffer_vld2_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT2(buffer_vld2, float, 16, 8);
++  PAD(buffer_vld2_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT2(buffer_vld2, float, 32, 4);
+   PAD(buffer_vld2_pad, float, 32, 4);
+ 
+@@ -552,6 +368,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld3_pad, poly, 8, 8);
+   VECT_ARRAY_INIT3(buffer_vld3, poly, 16, 4);
+   PAD(buffer_vld3_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT3(buffer_vld3, float, 16, 4);
++  PAD(buffer_vld3_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT3(buffer_vld3, float, 32, 2);
+   PAD(buffer_vld3_pad, float, 32, 2);
+ 
+@@ -575,6 +395,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld3_pad, poly, 8, 16);
+   VECT_ARRAY_INIT3(buffer_vld3, poly, 16, 8);
+   PAD(buffer_vld3_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT3(buffer_vld3, float, 16, 8);
++  PAD(buffer_vld3_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT3(buffer_vld3, float, 32, 4);
+   PAD(buffer_vld3_pad, float, 32, 4);
+ 
+@@ -599,6 +423,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld4_pad, poly, 8, 8);
+   VECT_ARRAY_INIT4(buffer_vld4, poly, 16, 4);
+   PAD(buffer_vld4_pad, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT4(buffer_vld4, float, 16, 4);
++  PAD(buffer_vld4_pad, float, 16, 4);
++#endif
+   VECT_ARRAY_INIT4(buffer_vld4, float, 32, 2);
+   PAD(buffer_vld4_pad, float, 32, 2);
+ 
+@@ -622,6 +450,10 @@ void exec_vldX_dup (void)
+   PAD(buffer_vld4_pad, poly, 8, 16);
+   VECT_ARRAY_INIT4(buffer_vld4, poly, 16, 8);
+   PAD(buffer_vld4_pad, poly, 16, 8);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VECT_ARRAY_INIT4(buffer_vld4, float, 16, 8);
++  PAD(buffer_vld4_pad, float, 16, 8);
++#endif
+   VECT_ARRAY_INIT4(buffer_vld4, float, 32, 4);
+   PAD(buffer_vld4_pad, float, 32, 4);
+ 
+@@ -629,39 +461,39 @@ void exec_vldX_dup (void)
+   clean_results ();
+ #define TEST_MSG "VLD2_DUP/VLD2Q_DUP"
+   TEST_ALL_VLDX_DUP(2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_0, "chunk 0");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld2_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(2, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_1, "chunk 1");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld2_1, "chunk 1");
+ 
+   /* Check vld3_dup/vld3q_dup.  */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD3_DUP/VLD3Q_DUP"
+   TEST_ALL_VLDX_DUP(3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_0, "chunk 0");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld3_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_1, "chunk 1");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld3_1, "chunk 1");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_2, "chunk 2");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld3_2, "chunk 2");
+ 
+   /* Check vld4_dup/vld4q_dup */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD4_DUP/VLD4Q_DUP"
+   TEST_ALL_VLDX_DUP(4);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_0, "chunk 0");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld4_0, "chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_1, "chunk 1");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld4_1, "chunk 1");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_2, "chunk 2");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld4_2, "chunk 2");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_3, "chunk 3");
++  CHECK_RESULTS_VLDX_DUP (TEST_MSG, expected_vld4_3, "chunk 3");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c
+@@ -9,44 +9,29 @@ VECT_VAR_DECL(expected_vld2_0,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld2_0,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld2_0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_0,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld2_0,uint,16,4) [] = { 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_0,uint,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_0,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld2_0,poly,16,4) [] = { 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld2_0,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld2_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_0,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_0,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_0,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_0,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld2_0,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa } ;
+ VECT_VAR_DECL(expected_vld2_0,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -55,42 +40,27 @@ VECT_VAR_DECL(expected_vld2_1,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xf0, 0xf1 };
+ VECT_VAR_DECL(expected_vld2_1,int,16,4) [] = { 0xfff0, 0xfff1, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_1,int,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_1,uint,8,8) [] = { 0xf0, 0xf1, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld2_1,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1 };
+ VECT_VAR_DECL(expected_vld2_1,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld2_1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld2_1,poly,8,8) [] = { 0xf0, 0xf1, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld2_1,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1 };
++VECT_VAR_DECL(expected_vld2_1,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_1,hfloat,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_1,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xfff0, 0xfff1, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_1,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_1,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_1,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld2_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld2_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld2_1,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld2_1,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xcc00, 0xcb80, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld2_1,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -99,42 +69,27 @@ VECT_VAR_DECL(expected_vld3_0,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_0,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld3_0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_0,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_0,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,uint,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_0,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_0,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld3_0,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld3_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_0,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_0,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xfffffff2, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_0,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld3_0,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_0,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -143,42 +98,27 @@ VECT_VAR_DECL(expected_vld3_1,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_1,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1 };
+ VECT_VAR_DECL(expected_vld3_1,int,32,2) [] = { 0xfffffff2, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_1,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xf0, 0xf1, 0xf2, 0xaa };
+ VECT_VAR_DECL(expected_vld3_1,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_1,uint,32,2) [] = { 0xaaaaaaaa, 0xfffffff0 };
+-VECT_VAR_DECL(expected_vld3_1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_1,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xf0, 0xf1, 0xf2, 0xaa };
+ VECT_VAR_DECL(expected_vld3_1,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld3_1,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xcc00, 0xcb80 };
+ VECT_VAR_DECL(expected_vld3_1,hfloat,32,2) [] = { 0xc1600000, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_1,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_1,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld3_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_1,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xfff0 };
+ VECT_VAR_DECL(expected_vld3_1,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_1,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xfff0 };
++VECT_VAR_DECL(expected_vld3_1,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_1,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xc1800000, 0xc1700000 };
+ 
+@@ -187,42 +127,27 @@ VECT_VAR_DECL(expected_vld3_2,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xf0, 0xf1, 0xf2 };
+ VECT_VAR_DECL(expected_vld3_2,int,16,4) [] = { 0xfff2, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_2,int,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_2,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_2,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_2,uint,16,4) [] = { 0xaaaa, 0xfff0, 0xfff1, 0xfff2 };
+ VECT_VAR_DECL(expected_vld3_2,uint,32,2) [] = { 0xfffffff1, 0xfffffff2 };
+-VECT_VAR_DECL(expected_vld3_2,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld3_2,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld3_2,poly,16,4) [] = { 0xaaaa, 0xfff0, 0xfff1, 0xfff2 };
++VECT_VAR_DECL(expected_vld3_2,hfloat,16,4) [] = { 0xcb00, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_2,hfloat,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_2,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_2,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xfff0, 0xfff1,
+ 					       0xfff2, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_2,int,32,4) [] = { 0xfffffff2, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_2,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_2,uint,16,8) [] = { 0xfff1, 0xfff2, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_2,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld3_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld3_2,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld3_2,poly,16,8) [] = { 0xfff1, 0xfff2, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld3_2,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xcc00, 0xcb80,
++						  0xcb00, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld3_2,hfloat,32,4) [] = { 0xc1600000, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -231,42 +156,27 @@ VECT_VAR_DECL(expected_vld4_0,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_0,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld4_0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_0,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_0,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,uint,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_0,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_0,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_0,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
+-VECT_VAR_DECL(expected_vld4_0,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_0,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_0,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_0,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_0,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 						0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_0,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_0,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_0,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_0,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_0,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -275,42 +185,27 @@ VECT_VAR_DECL(expected_vld4_1,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_1,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,int,32,2) [] = { 0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_1,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_1,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,uint,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_1,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_1,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_1,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
+-VECT_VAR_DECL(expected_vld4_1,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_1,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_1,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_1,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_1,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_1,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_1,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_1,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_1,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_1,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -319,42 +214,27 @@ VECT_VAR_DECL(expected_vld4_2,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_2,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
+ VECT_VAR_DECL(expected_vld4_2,int,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_2,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_2,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_2,uint,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_2,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected_vld4_2,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_2,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_2,poly,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_2,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80 };
+ VECT_VAR_DECL(expected_vld4_2,hfloat,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_2,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_2,int,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_2,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					       0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_2,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_2,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_2,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xfff0, 0xfff1, 0xfff2, 0xfff3 };
+ VECT_VAR_DECL(expected_vld4_2,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_2,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_2,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_2,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_2,hfloat,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_2,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
+ 						  0xc1600000, 0xc1500000 };
+ 
+@@ -363,42 +243,27 @@ VECT_VAR_DECL(expected_vld4_3,int,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					      0xf0, 0xf1, 0xf2, 0xf3 };
+ VECT_VAR_DECL(expected_vld4_3,int,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_3,int,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_3,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_3,uint,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_3,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
+ VECT_VAR_DECL(expected_vld4_3,uint,32,2) [] = { 0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected_vld4_3,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected_vld4_3,poly,8,8) [] = { 0xaa, 0xaa, 0xaa, 0xaa,
+ 					       0xaa, 0xaa, 0xaa, 0xaa };
+ VECT_VAR_DECL(expected_vld4_3,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_vld4_3,hfloat,16,4) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_3,hfloat,32,2) [] = { 0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_3,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33,
+-					       0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_3,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 					       0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_3,int,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 					       0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_3,int,64,2) [] = { 0x3333333333333333,
+-					       0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_3,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_3,uint,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_3,uint,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						0xaaaaaaaa, 0xaaaaaaaa };
+-VECT_VAR_DECL(expected_vld4_3,uint,64,2) [] = { 0x3333333333333333,
+-						0x3333333333333333 };
+-VECT_VAR_DECL(expected_vld4_3,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33,
+-						0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected_vld4_3,poly,16,8) [] = { 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
+ 						0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
++VECT_VAR_DECL(expected_vld4_3,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++						  0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa };
+ VECT_VAR_DECL(expected_vld4_3,hfloat,32,4) [] = { 0xaaaaaaaa, 0xaaaaaaaa,
+ 						  0xaaaaaaaa, 0xaaaaaaaa };
+ 
+@@ -414,6 +279,9 @@ VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 32, 2);
+ VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 64, 2);
+ VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 8, 2);
+ VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 16, 2);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer_vld2_lane, float, 16, 2);
++#endif
+ VECT_VAR_DECL_INIT(buffer_vld2_lane, float, 32, 2);
+ 
+ /* Input buffers for vld3_lane */
+@@ -427,6 +295,9 @@ VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 32, 3);
+ VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 64, 3);
+ VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 8, 3);
+ VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 16, 3);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer_vld3_lane, float, 16, 3);
++#endif
+ VECT_VAR_DECL_INIT(buffer_vld3_lane, float, 32, 3);
+ 
+ /* Input buffers for vld4_lane */
+@@ -440,6 +311,9 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 32, 4);
+ VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 64, 4);
+ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 8, 4);
+ VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 16, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++VECT_VAR_DECL_INIT(buffer_vld4_lane, float, 16, 4);
++#endif
+ VECT_VAR_DECL_INIT(buffer_vld4_lane, float, 32, 4);
+ 
+ void exec_vldX_lane (void)
+@@ -483,7 +357,7 @@ void exec_vldX_lane (void)
+ 	 sizeof(VECT_VAR(result, T1, W, N)));
+ 
+   /* We need all variants in 64 bits, but there is no 64x2 variant.  */
+-#define DECL_ALL_VLDX_LANE(X)			\
++#define DECL_ALL_VLDX_LANE_NO_FP16(X)		\
+   DECL_VLDX_LANE(int, 8, 8, X);			\
+   DECL_VLDX_LANE(int, 16, 4, X);		\
+   DECL_VLDX_LANE(int, 32, 2, X);		\
+@@ -500,6 +374,15 @@ void exec_vldX_lane (void)
+   DECL_VLDX_LANE(float, 32, 2, X);		\
+   DECL_VLDX_LANE(float, 32, 4, X)
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define DECL_ALL_VLDX_LANE(X)		\
++  DECL_ALL_VLDX_LANE_NO_FP16(X);	\
++  DECL_VLDX_LANE(float, 16, 4, X);	\
++  DECL_VLDX_LANE(float, 16, 8, X)
++#else
++#define DECL_ALL_VLDX_LANE(X) DECL_ALL_VLDX_LANE_NO_FP16(X)
++#endif
++
+   /* Add some padding to try to catch out of bound accesses.  */
+ #define ARRAY1(V, T, W, N) VECT_VAR_DECL(V,T,W,N)[1]={42}
+ #define DUMMY_ARRAY(V, T, W, N, L) \
+@@ -508,7 +391,7 @@ void exec_vldX_lane (void)
+ 
+   /* Use the same lanes regardless of the size of the array (X), for
+      simplicity.  */
+-#define TEST_ALL_VLDX_LANE(X)			\
++#define TEST_ALL_VLDX_LANE_NO_FP16(X)		\
+   TEST_VLDX_LANE(, int, s, 8, 8, X, 7);		\
+   TEST_VLDX_LANE(, int, s, 16, 4, X, 2);	\
+   TEST_VLDX_LANE(, int, s, 32, 2, X, 0);	\
+@@ -525,7 +408,16 @@ void exec_vldX_lane (void)
+   TEST_VLDX_LANE(, float, f, 32, 2, X, 0);	\
+   TEST_VLDX_LANE(q, float, f, 32, 4, X, 2)
+ 
+-#define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_VLDX_LANE(X)			\
++  TEST_ALL_VLDX_LANE_NO_FP16(X);		\
++  TEST_VLDX_LANE(, float, f, 16, 4, X, 2);	\
++  TEST_VLDX_LANE(q, float, f, 16, 8, X, 6)
++#else
++#define TEST_ALL_VLDX_LANE(X) TEST_ALL_VLDX_LANE_NO_FP16(X)
++#endif
++
++#define TEST_ALL_EXTRA_CHUNKS_NO_FP16(X,Y)	\
+   TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
+   TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
+@@ -542,6 +434,47 @@ void exec_vldX_lane (void)
+   TEST_EXTRA_CHUNK(float, 32, 2, X, Y);		\
+   TEST_EXTRA_CHUNK(float, 32, 4, X, Y)
+ 
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define TEST_ALL_EXTRA_CHUNKS(X,Y)		\
++  TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y);		\
++  TEST_EXTRA_CHUNK(float, 16, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(float, 16, 8, X, Y)
++#else
++#define TEST_ALL_EXTRA_CHUNKS(X,Y) TEST_ALL_EXTRA_CHUNKS_NO_FP16(X, Y)
++#endif
++
++  /* vldX_lane supports only a subset of all variants.  */
++#define CHECK_RESULTS_VLDX_LANE_NO_FP16(test_name,EXPECTED,comment)	\
++    CHECK(test_name, int, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment);	\
++    CHECK(test_name, int, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment)
++
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++#define CHECK_RESULTS_VLDX_LANE(test_name,EXPECTED,comment)		\
++  {									\
++    CHECK_RESULTS_VLDX_LANE_NO_FP16(test_name,EXPECTED,comment);	\
++    CHECK_FP(test_name, float, 16, 4, PRIx16, EXPECTED, comment);	\
++    CHECK_FP(test_name, float, 16, 8, PRIx16, EXPECTED, comment);	\
++  }
++#else
++#define CHECK_RESULTS_VLDX_LANE(test_name,EXPECTED,comment)		\
++  {									\
++    CHECK_RESULTS_VLDX_LANE_NO_FP16(test_name,EXPECTED,comment);	\
++  }
++#endif
++
+   /* Declare the temporary buffers / variables.  */
+   DECL_ALL_VLDX_LANE(2);
+   DECL_ALL_VLDX_LANE(3);
+@@ -561,6 +494,10 @@ void exec_vldX_lane (void)
+   DUMMY_ARRAY(buffer_src, uint, 16, 8, 4);
+   DUMMY_ARRAY(buffer_src, uint, 32, 4, 4);
+   DUMMY_ARRAY(buffer_src, poly, 16, 8, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  DUMMY_ARRAY(buffer_src, float, 16, 4, 4);
++  DUMMY_ARRAY(buffer_src, float, 16, 8, 4);
++#endif
+   DUMMY_ARRAY(buffer_src, float, 32, 2, 4);
+   DUMMY_ARRAY(buffer_src, float, 32, 4, 4);
+ 
+@@ -568,39 +505,39 @@ void exec_vldX_lane (void)
+   clean_results ();
+ #define TEST_MSG "VLD2_LANE/VLD2Q_LANE"
+   TEST_ALL_VLDX_LANE(2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_0, " chunk 0");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld2_0, " chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(2, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld2_1, " chunk 1");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld2_1, " chunk 1");
+ 
+   /* Check vld3_lane/vld3q_lane.  */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD3_LANE/VLD3Q_LANE"
+   TEST_ALL_VLDX_LANE(3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_0, " chunk 0");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld3_0, " chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_1, " chunk 1");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld3_1, " chunk 1");
+ 
+   TEST_ALL_EXTRA_CHUNKS(3, 2);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld3_2, " chunk 2");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld3_2, " chunk 2");
+ 
+   /* Check vld4_lane/vld4q_lane.  */
+   clean_results ();
+ #undef TEST_MSG
+ #define TEST_MSG "VLD4_LANE/VLD4Q_LANE"
+   TEST_ALL_VLDX_LANE(4);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_0, " chunk 0");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld4_0, " chunk 0");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 1);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_1, " chunk 1");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld4_1, " chunk 1");
+   TEST_ALL_EXTRA_CHUNKS(4, 2);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_2, " chunk 2");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld4_2, " chunk 2");
+ 
+   TEST_ALL_EXTRA_CHUNKS(4, 3);
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_vld4_3, " chunk 3");
++  CHECK_RESULTS_VLDX_LANE (TEST_MSG, expected_vld4_3, " chunk 3");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul.c
+@@ -7,15 +7,12 @@ VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0x1, 0x12, 0x23,
+ 				       0x34, 0x45, 0x56, 0x67 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0xfde0, 0xfe02, 0xfe24, 0xfe46 };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffcd0, 0xfffffd03 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xc0, 0x4, 0x48, 0x8c,
+ 					0xd0, 0x14, 0x58, 0x9c };
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfab0, 0xfb05, 0xfb5a, 0xfbaf };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffff9a0, 0xfffffa06 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xc0, 0x84, 0x48, 0xc,
+ 					0xd0, 0x94, 0x58, 0x1c };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc4053333, 0xc3f9c000 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x90, 0x7, 0x7e, 0xf5,
+ 					0x6c, 0xe3, 0x5a, 0xd1,
+@@ -25,8 +22,6 @@ VECT_VAR_DECL(expected,int,16,8) [] = { 0xf780, 0xf808, 0xf890, 0xf918,
+ 					0xf9a0, 0xfa28, 0xfab0, 0xfb38 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffff670, 0xfffff709,
+ 					0xfffff7a2, 0xfffff83b };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+ VECT_VAR_DECL(expected,uint,8,16) [] = { 0x60, 0xa, 0xb4, 0x5e,
+ 					 0x8, 0xb2, 0x5c, 0x6,
+ 					 0xb0, 0x5a, 0x4, 0xae,
+@@ -35,14 +30,10 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xf450, 0xf50b, 0xf5c6, 0xf681,
+ 					 0xf73c, 0xf7f7, 0xf8b2, 0xf96d };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffff340, 0xfffff40c,
+ 					 0xfffff4d8, 0xfffff5a4 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected,poly,8,16) [] = { 0x60, 0xca, 0x34, 0x9e,
+ 					 0xc8, 0x62, 0x9c, 0x36,
+ 					 0x30, 0x9a, 0x64, 0xce,
+ 					 0x98, 0x32, 0xcc, 0x66 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+ VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc4c73333, 0xc4bac000,
+ 					   0xc4ae4ccd, 0xc4a1d999 };
+ 
+@@ -145,7 +136,22 @@ void FNNAME (INSN_NAME) (void)
+   TEST_VMUL(INSN_NAME, q, poly, p, 8, 16);
+   TEST_VMUL(INSN_NAME, q, float, f, 32, 4);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, "");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vneg.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vneg.c
+@@ -12,41 +12,11 @@ VECT_VAR_DECL(expected,int,8,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 				       0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x10, 0xf, 0xe, 0xd };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x10, 0xf };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9,
+ 					0x8, 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0xf, 0xe, 0xd };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333,
+-					0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results for float32 variants. Needs to be separated since
+    the generic test function does not test floating-point
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vorn.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vorn.c
+@@ -14,10 +14,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xfb, 0xfb, 0xfb, 0xfb,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff1, 0xfff1, 0xfff3, 0xfff3 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff7, 0xfffffff7 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffffd };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf9, 0xf9, 0xfb, 0xfb,
+ 					0xfd, 0xfd, 0xff, 0xff,
+ 					0xf9, 0xf9, 0xfb, 0xfb,
+@@ -38,11 +34,3 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff8, 0xfffffff9,
+ 					 0xfffffffa, 0xfffffffb };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffffc,
+ 					 0xfffffffffffffffd };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vorr.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vorr.c
+@@ -14,10 +14,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf4, 0xf5, 0xf6, 0xf7,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xffff, 0xfffe, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff8, 0xfffffff9 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff2 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf6, 0xf7, 0xf6, 0xf7,
+ 					0xf6, 0xf7, 0xf6, 0xf7,
+ 					0xfe, 0xff, 0xfe, 0xff,
+@@ -38,11 +34,3 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff7, 0xfffffff7,
+ 					 0xfffffff7, 0xfffffff7 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff3,
+ 					 0xfffffffffffffff3 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqabs.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqabs.c
+@@ -11,16 +11,6 @@ void vqabs_extra(void);
+ VECT_VAR_DECL(expected,int,8,8) [] = { 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x10, 0xf, 0xe, 0xd };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x10, 0xf };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9,
+ 					0x8, 0x7, 0x6, 0x5,
+@@ -28,25 +18,6 @@ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd,
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0xf, 0xe, 0xd };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected values of cumulative_saturation flag.  */
+ int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqadd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqadd.c
+@@ -39,10 +39,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffff };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x1, 0x2, 0x3, 0x4,
+ 					0x5, 0x6, 0x7, 0x8,
+ 					0x9, 0xa, 0xb, 0xc,
+@@ -61,14 +57,6 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
+ 					 0xffffffff, 0xffffffff };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffff,
+ 					 0xffffffffffffffff };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ 
+ /* 64-bits types, with 0 as second input.  */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqmovn.c
+@@ -0,0 +1,134 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,32,2) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0x12, 0x12, 0x12, 0x12,
++				       0x12, 0x12, 0x12, 0x12 };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0x1278, 0x1278, 0x1278, 0x1278 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0x12345678, 0x12345678 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x82, 0x82, 0x82, 0x82,
++					0x82, 0x82, 0x82, 0x82 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x8765, 0x8765, 0x8765, 0x8765 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0x87654321, 0x87654321 };
++
++/* Expected values of cumulative_saturation flag when saturation occurs.  */
++int VECT_VAR(expected_cumulative_sat1,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat1,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat1,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat1,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat1,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat1,uint,32,2) = 1;
++
++/* Expected results when saturation occurs.  */
++VECT_VAR_DECL(expected1,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected1,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected1,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected1,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected1,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected1,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++#define INSN_NAME vqmovn
++#define TEST_MSG "VQMOVN"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN_NAME)
++{
++  /* Basic test: y=OP(x), then store the result.  */
++#define TEST_UNARY_OP1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##_##T2##W2(VECT_VAR(vector, T1, W2, N));			\
++  vst1##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		 VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_UNARY_OP(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_UNARY_OP1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* No need for 64 bits variants.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++  DECL_VARIABLE(vector, uint, 16, 8);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, uint, 64, 2);
++
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  /* Fill input vector with arbitrary values.  */
++  VDUP(vector, q, int, s, 16, 8, 0x12);
++  VDUP(vector, q, int, s, 32, 4, 0x1278);
++  VDUP(vector, q, int, s, 64, 2, 0x12345678);
++  VDUP(vector, q, uint, u, 16, 8, 0x82);
++  VDUP(vector, q, uint, u, 32, 4, 0x8765);
++  VDUP(vector, q, uint, u, 64, 2, 0x87654321);
++
++  /* Apply a unary operator named INSN_NAME.  */
++#define CMT ""
++  TEST_UNARY_OP(INSN_NAME, int, s, 8, 16, 8, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, int, s, 16, 32, 4, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, int, s, 32, 64, 2, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 8, 16, 8, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 16, 32, 4, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 32, 64, 2, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++
++
++  /* Fill input vector with arbitrary values which cause cumulative
++     saturation.  */
++  VDUP(vector, q, int, s, 16, 8, 0x1234);
++  VDUP(vector, q, int, s, 32, 4, 0x12345678);
++  VDUP(vector, q, int, s, 64, 2, 0x1234567890ABLL);
++  VDUP(vector, q, uint, u, 16, 8, 0x8234);
++  VDUP(vector, q, uint, u, 32, 4, 0x87654321);
++  VDUP(vector, q, uint, u, 64, 2, 0x8765432187654321ULL);
++
++  /* Apply a unary operator named INSN_NAME.  */
++#undef CMT
++#define CMT " (with saturation)"
++  TEST_UNARY_OP(INSN_NAME, int, s, 8, 16, 8, expected_cumulative_sat1, CMT);
++  TEST_UNARY_OP(INSN_NAME, int, s, 16, 32, 4, expected_cumulative_sat1, CMT);
++  TEST_UNARY_OP(INSN_NAME, int, s, 32, 64, 2, expected_cumulative_sat1, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 8, 16, 8, expected_cumulative_sat1, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 16, 32, 4, expected_cumulative_sat1, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 32, 64, 2, expected_cumulative_sat1, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected1, CMT);
++}
++
++int main (void)
++{
++  exec_vqmovn ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqmovun.c
+@@ -0,0 +1,93 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,32,2) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x34, 0x34, 0x34, 0x34,
++					0x34, 0x34, 0x34, 0x34 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x5678, 0x5678, 0x5678, 0x5678 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0x12345678, 0x12345678 };
++
++/* Expected values of cumulative_saturation flag with negative input.  */
++int VECT_VAR(expected_cumulative_sat_neg,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,uint,32,2) = 1;
++
++/* Expected results with negative input.  */
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
++
++#define INSN_NAME vqmovun
++#define TEST_MSG "VQMOVUN"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN_NAME)
++{
++  /* Basic test: y=OP(x), then store the result.  */
++#define TEST_UNARY_OP1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##_s##W2(VECT_VAR(vector, int, W2, N));				\
++  vst1##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		 VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_UNARY_OP(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_UNARY_OP1(INSN, T1, T2, W, W2, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  /* Fill input vector with arbitrary values.  */
++  VDUP(vector, q, int, s, 16, 8, 0x34);
++  VDUP(vector, q, int, s, 32, 4, 0x5678);
++  VDUP(vector, q, int, s, 64, 2, 0x12345678);
++
++  /* Apply a unary operator named INSN_NAME.  */
++#define CMT ""
++  TEST_UNARY_OP(INSN_NAME, uint, u, 8, 16, 8, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 16, 32, 4, expected_cumulative_sat, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 32, 64, 2, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++
++  /* Fill input vector with negative values.  */
++  VDUP(vector, q, int, s, 16, 8, 0x8234);
++  VDUP(vector, q, int, s, 32, 4, 0x87654321);
++  VDUP(vector, q, int, s, 64, 2, 0x8765432187654321LL);
++
++  /* Apply a unary operator named INSN_NAME.  */
++#undef CMT
++#define CMT " (negative input)"
++  TEST_UNARY_OP(INSN_NAME, uint, u, 8, 16, 8, expected_cumulative_sat_neg, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 16, 32, 4, expected_cumulative_sat_neg, CMT);
++  TEST_UNARY_OP(INSN_NAME, uint, u, 32, 64, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++}
++
++int main (void)
++{
++  exec_vqmovun ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqneg.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqneg.c
+@@ -11,16 +11,6 @@ void vqneg_extra(void);
+ VECT_VAR_DECL(expected,int,8,8) [] = { 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,16,4) [] = { 0x10, 0xf, 0xe, 0xd };
+ VECT_VAR_DECL(expected,int,32,2) [] = { 0x10, 0xf };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9,
+ 					0x8, 0x7, 0x6, 0x5,
+@@ -28,25 +18,6 @@ VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd,
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0xf, 0xe, 0xd,
+ 					0xc, 0xb, 0xa, 0x9 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0xf, 0xe, 0xd };
+-VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
+-					 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected values of cumulative_saturation flag.  */
+ int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc
+@@ -0,0 +1,138 @@
++#define FNNAME1(NAME) exec_ ## NAME
++#define FNNAME(NAME) FNNAME1 (NAME)
++
++void FNNAME (INSN) (void)
++{
++  /* vector_res = vqrdmlah (vector, vector2, vector3, vector4),
++     then store the result.  */
++#define TEST_VQRDMLAH2(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat (0, VECT_VAR (vector_res, T1, W, N));		\
++  VECT_VAR (vector_res, T1, W, N) =					\
++    INSN##Q##_##T2##W (VECT_VAR (vector, T1, W, N),			\
++		       VECT_VAR (vector2, T1, W, N),			\
++		       VECT_VAR (vector3, T1, W, N));			\
++  vst1##Q##_##T2##W (VECT_VAR (result, T1, W, N),			\
++		     VECT_VAR (vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT (TEST_MSG, T1, W, N,				\
++			EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN.  */
++#define TEST_VQRDMLAH1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMLAH2 (INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRDMLAH(Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQRDMLAH1 (INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  DECL_VARIABLE (vector, int, 16, 4);
++  DECL_VARIABLE (vector, int, 32, 2);
++  DECL_VARIABLE (vector, int, 16, 8);
++  DECL_VARIABLE (vector, int, 32, 4);
++
++  DECL_VARIABLE (vector_res, int, 16, 4);
++  DECL_VARIABLE (vector_res, int, 32, 2);
++  DECL_VARIABLE (vector_res, int, 16, 8);
++  DECL_VARIABLE (vector_res, int, 32, 4);
++
++  DECL_VARIABLE (vector2, int, 16, 4);
++  DECL_VARIABLE (vector2, int, 32, 2);
++  DECL_VARIABLE (vector2, int, 16, 8);
++  DECL_VARIABLE (vector2, int, 32, 4);
++
++  DECL_VARIABLE (vector3, int, 16, 4);
++  DECL_VARIABLE (vector3, int, 32, 2);
++  DECL_VARIABLE (vector3, int, 16, 8);
++  DECL_VARIABLE (vector3, int, 32, 4);
++
++  clean_results ();
++
++  VLOAD (vector, buffer, , int, s, 16, 4);
++  VLOAD (vector, buffer, , int, s, 32, 2);
++  VLOAD (vector, buffer, q, int, s, 16, 8);
++  VLOAD (vector, buffer, q, int, s, 32, 4);
++
++  /* Initialize vector2.  */
++  VDUP (vector2, , int, s, 16, 4, 0x5555);
++  VDUP (vector2, , int, s, 32, 2, 0xBB);
++  VDUP (vector2, q, int, s, 16, 8, 0xBB);
++  VDUP (vector2, q, int, s, 32, 4, 0x22);
++
++  /* Initialize vector3.  */
++  VDUP (vector3, , int, s, 16, 4, 0x5555);
++  VDUP (vector3, , int, s, 32, 2, 0xBB);
++  VDUP (vector3, q, int, s, 16, 8, 0x33);
++  VDUP (vector3, q, int, s, 32, 4, 0x22);
++
++#define CMT ""
++  TEST_VQRDMLAH ( , int, s, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQRDMLAH ( , int, s, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQRDMLAH (q, int, s, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQRDMLAH (q, int, s, 32, 4, expected_cumulative_sat, CMT);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++
++  /* Now use input values such that the multiplication causes
++     saturation.  */
++#define TEST_MSG_MUL " (check mul cumulative saturation)"
++  VDUP (vector, , int, s, 16, 4, 0x8000);
++  VDUP (vector, , int, s, 32, 2, 0x80000000);
++  VDUP (vector, q, int, s, 16, 8, 0x8000);
++  VDUP (vector, q, int, s, 32, 4, 0x80000000);
++  VDUP (vector2, , int, s, 16, 4, 0x8000);
++  VDUP (vector2, , int, s, 32, 2, 0x80000000);
++  VDUP (vector2, q, int, s, 16, 8, 0x8000);
++  VDUP (vector2, q, int, s, 32, 4, 0x80000000);
++  VDUP (vector3, , int, s, 16, 4, 0x8000);
++  VDUP (vector3, , int, s, 32, 2, 0x80000000);
++  VDUP (vector3, q, int, s, 16, 8, 0x8000);
++  VDUP (vector3, q, int, s, 32, 4, 0x80000000);
++
++  TEST_VQRDMLAH ( , int, s, 16, 4, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMLAH ( , int, s, 32, 2, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMLAH (q, int, s, 16, 8, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMLAH (q, int, s, 32, 4, expected_cumulative_sat_mul, TEST_MSG_MUL);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
++
++  /* Use input values where rounding produces a result equal to the
++     saturation value, but does not set the saturation flag.  */
++#define TEST_MSG_ROUND " (check rounding)"
++  VDUP (vector, , int, s, 16, 4, 0x8000);
++  VDUP (vector, , int, s, 32, 2, 0x80000000);
++  VDUP (vector, q, int, s, 16, 8, 0x8000);
++  VDUP (vector, q, int, s, 32, 4, 0x80000000);
++  VDUP (vector2, , int, s, 16, 4, 0x8001);
++  VDUP (vector2, , int, s, 32, 2, 0x80000001);
++  VDUP (vector2, q, int, s, 16, 8, 0x8001);
++  VDUP (vector2, q, int, s, 32, 4, 0x80000001);
++  VDUP (vector3, , int, s, 16, 4, 0x8001);
++  VDUP (vector3, , int, s, 32, 2, 0x80000001);
++  VDUP (vector3, q, int, s, 16, 8, 0x8001);
++  VDUP (vector3, q, int, s, 32, 4, 0x80000001);
++
++  TEST_VQRDMLAH ( , int, s, 16, 4, expected_cumulative_sat_round, \
++		 TEST_MSG_ROUND);
++  TEST_VQRDMLAH ( , int, s, 32, 2, expected_cumulative_sat_round, \
++		 TEST_MSG_ROUND);
++  TEST_VQRDMLAH (q, int, s, 16, 8, expected_cumulative_sat_round, \
++		 TEST_MSG_ROUND);
++  TEST_VQRDMLAH (q, int, s, 32, 4, expected_cumulative_sat_round, \
++		 TEST_MSG_ROUND);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
++}
++
++int
++main (void)
++{
++  FNNAME (INSN) ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc
+@@ -0,0 +1,154 @@
++#define FNNAME1(NAME) exec_ ## NAME ## _lane
++#define FNNAME(NAME) FNNAME1 (NAME)
++
++void FNNAME (INSN) (void)
++{
++  /* vector_res = vqrdmlXh_lane (vector, vector2, vector3, lane),
++     then store the result.  */
++#define TEST_VQRDMLXH_LANE2(INSN, Q, T1, T2, W, N, N2, L,		\
++			    EXPECTED_CUMULATIVE_SAT, CMT)		\
++  Set_Neon_Cumulative_Sat (0, VECT_VAR (vector_res, T1, W, N));		\
++  VECT_VAR (vector_res, T1, W, N) =					\
++    INSN##Q##_lane_##T2##W (VECT_VAR (vector, T1, W, N),		\
++			    VECT_VAR (vector2, T1, W, N),		\
++			    VECT_VAR (vector3, T1, W, N2),		\
++			    L);						\
++  vst1##Q##_##T2##W (VECT_VAR (result, T1, W, N),			\
++		     VECT_VAR (vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT (TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN.  */
++#define TEST_VQRDMLXH_LANE1(INSN, Q, T1, T2, W, N, N2, L,	\
++			    EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQRDMLXH_LANE2 (INSN, Q, T1, T2, W, N, N2, L,		\
++		       EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRDMLXH_LANE(Q, T1, T2, W, N, N2, L,		\
++			   EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQRDMLXH_LANE1 (INSN, Q, T1, T2, W, N, N2, L,		\
++		       EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE (vector, int, 16, 4);
++  DECL_VARIABLE (vector, int, 32, 2);
++  DECL_VARIABLE (vector, int, 16, 8);
++  DECL_VARIABLE (vector, int, 32, 4);
++
++  DECL_VARIABLE (vector_res, int, 16, 4);
++  DECL_VARIABLE (vector_res, int, 32, 2);
++  DECL_VARIABLE (vector_res, int, 16, 8);
++  DECL_VARIABLE (vector_res, int, 32, 4);
++
++  DECL_VARIABLE (vector2, int, 16, 4);
++  DECL_VARIABLE (vector2, int, 32, 2);
++  DECL_VARIABLE (vector2, int, 16, 8);
++  DECL_VARIABLE (vector2, int, 32, 4);
++
++  DECL_VARIABLE (vector3, int, 16, 4);
++  DECL_VARIABLE (vector3, int, 32, 2);
++  DECL_VARIABLE (vector3, int, 16, 8);
++  DECL_VARIABLE (vector3, int, 32, 4);
++
++  clean_results ();
++
++  VLOAD (vector, buffer, , int, s, 16, 4);
++  VLOAD (vector, buffer, , int, s, 32, 2);
++
++  VLOAD (vector, buffer, q, int, s, 16, 8);
++  VLOAD (vector, buffer, q, int, s, 32, 4);
++
++  /* Initialize vector2.  */
++  VDUP (vector2, , int, s, 16, 4, 0x5555);
++  VDUP (vector2, , int, s, 32, 2, 0xBB);
++  VDUP (vector2, q, int, s, 16, 8, 0xBB);
++  VDUP (vector2, q, int, s, 32, 4, 0x22);
++
++  /* Initialize vector3.  */
++  VDUP (vector3, , int, s, 16, 4, 0x5555);
++  VDUP (vector3, , int, s, 32, 2, 0xBB);
++  VDUP (vector3, q, int, s, 16, 8, 0x33);
++  VDUP (vector3, q, int, s, 32, 4, 0x22);
++
++  /* Choose lane arbitrarily.  */
++#define CMT ""
++  TEST_VQRDMLXH_LANE (, int, s, 16, 4, 4, 2, expected_cumulative_sat, CMT);
++  TEST_VQRDMLXH_LANE (, int, s, 32, 2, 2, 1, expected_cumulative_sat, CMT);
++  TEST_VQRDMLXH_LANE (q, int, s, 16, 8, 4, 3, expected_cumulative_sat, CMT);
++  TEST_VQRDMLXH_LANE (q, int, s, 32, 4, 2, 0, expected_cumulative_sat, CMT);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++
++  /* Now use input values such that the multiplication causes
++     saturation.  */
++#define TEST_MSG_MUL " (check mul cumulative saturation)"
++  VDUP (vector, , int, s, 16, 4, 0x8000);
++  VDUP (vector, , int, s, 32, 2, 0x80000000);
++  VDUP (vector, q, int, s, 16, 8, 0x8000);
++  VDUP (vector, q, int, s, 32, 4, 0x80000000);
++
++  VDUP (vector2, , int, s, 16, 4, 0x8000);
++  VDUP (vector2, , int, s, 32, 2, 0x80000000);
++  VDUP (vector2, q, int, s, 16, 8, 0x8000);
++  VDUP (vector2, q, int, s, 32, 4, 0x80000000);
++
++  VDUP (vector3, , int, s, 16, 4, 0x8000);
++  VDUP (vector3, , int, s, 32, 2, 0x80000000);
++  VDUP (vector3, q, int, s, 16, 8, 0x8000);
++  VDUP (vector3, q, int, s, 32, 4, 0x80000000);
++
++  TEST_VQRDMLXH_LANE (, int, s, 16, 4, 4, 2, expected_cumulative_sat_mul,
++		      TEST_MSG_MUL);
++  TEST_VQRDMLXH_LANE (, int, s, 32, 2, 2, 1, expected_cumulative_sat_mul,
++		      TEST_MSG_MUL);
++  TEST_VQRDMLXH_LANE (q, int, s, 16, 8, 4, 3, expected_cumulative_sat_mul,
++		      TEST_MSG_MUL);
++  TEST_VQRDMLXH_LANE (q, int, s, 32, 4, 2, 0, expected_cumulative_sat_mul,
++		      TEST_MSG_MUL);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
++
++  VDUP (vector, , int, s, 16, 4, 0x8000);
++  VDUP (vector, , int, s, 32, 2, 0x80000000);
++  VDUP (vector, q, int, s, 16, 8, 0x8000);
++  VDUP (vector, q, int, s, 32, 4, 0x80000000);
++
++  VDUP (vector2, , int, s, 16, 4, 0x8001);
++  VDUP (vector2, , int, s, 32, 2, 0x80000001);
++  VDUP (vector2, q, int, s, 16, 8, 0x8001);
++  VDUP (vector2, q, int, s, 32, 4, 0x80000001);
++
++  VDUP (vector3, , int, s, 16, 4, 0x8001);
++  VDUP (vector3, , int, s, 32, 2, 0x80000001);
++  VDUP (vector3, q, int, s, 16, 8, 0x8001);
++  VDUP (vector3, q, int, s, 32, 4, 0x80000001);
++
++  /* Use input values where rounding produces a result equal to the
++     saturation value, but does not set the saturation flag.  */
++#define TEST_MSG_ROUND " (check rounding)"
++  TEST_VQRDMLXH_LANE (, int, s, 16, 4, 4, 2, expected_cumulative_sat_round,
++		      TEST_MSG_ROUND);
++  TEST_VQRDMLXH_LANE (, int, s, 32, 2, 2, 1, expected_cumulative_sat_round,
++		      TEST_MSG_ROUND);
++  TEST_VQRDMLXH_LANE (q, int, s, 16, 8, 4, 3, expected_cumulative_sat_round,
++		      TEST_MSG_ROUND);
++  TEST_VQRDMLXH_LANE (q, int, s, 32, 4, 2, 0, expected_cumulative_sat_round,
++		      TEST_MSG_ROUND);
++
++  CHECK (TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK (TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
++}
++
++int
++main (void)
++{
++  FNNAME (INSN) ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c
+@@ -0,0 +1,57 @@
++/* { dg-require-effective-target arm_v8_1a_neon_hw } */
++/* { dg-add-options arm_v8_1a_neon } */
++
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR (expected_cumulative_sat, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL (expected, int, 16, 4) [] = { 0x38d3, 0x38d4, 0x38d5, 0x38d6 };
++VECT_VAR_DECL (expected, int, 32, 2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL (expected, int, 16, 8) [] = { 0xfff0,  0xfff1, 0xfff2,  0xfff3,
++					    0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL (expected, int, 32, 4) [] = { 0xfffffff0, 0xfffffff1,
++					    0xfffffff2, 0xfffffff3 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 4) = 0;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL (expected_mul, int, 16, 4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 32, 2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 16, 8) [] = { 0x0, 0x0, 0x0, 0x0,
++						0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 32, 4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 4) = 0;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL (expected_round, int, 16, 4) [] = { 0xfffe, 0xfffe,
++						  0xfffe, 0xfffe };
++VECT_VAR_DECL (expected_round, int, 32, 2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL (expected_round, int, 16, 8) [] = { 0xfffe, 0xfffe,
++						  0xfffe, 0xfffe,
++						  0xfffe, 0xfffe,
++						  0xfffe, 0xfffe };
++VECT_VAR_DECL (expected_round, int, 32, 4) [] = { 0xfffffffe, 0xfffffffe,
++						  0xfffffffe, 0xfffffffe };
++
++#define INSN vqrdmlah
++#define TEST_MSG "VQRDMLAH"
++
++#include "vqrdmlXh.inc"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c
+@@ -0,0 +1,57 @@
++/* { dg-require-effective-target arm_v8_1a_neon_hw } */
++/* { dg-add-options arm_v8_1a_neon } */
++
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR (expected_cumulative_sat, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL (expected, int, 16, 4) [] = { 0x38d3, 0x38d4, 0x38d5, 0x38d6 };
++VECT_VAR_DECL (expected, int, 32, 2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL (expected, int, 16, 8) [] = { 0x006d, 0x006e, 0x006f, 0x0070,
++					    0x0071, 0x0072, 0x0073, 0x0074 };
++VECT_VAR_DECL (expected, int, 32, 4) [] = { 0xfffffff0, 0xfffffff1,
++					    0xfffffff2, 0xfffffff3 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 4) = 0;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL (expected_mul, int, 16, 4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 32, 2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 16, 8) [] = { 0x0, 0x0, 0x0, 0x0,
++						0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL (expected_mul, int, 32, 4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 4) = 0;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL (expected_round, int, 16, 4) [] = { 0xfffe, 0xfffe,
++						  0xfffe, 0xfffe };
++VECT_VAR_DECL (expected_round, int, 32, 2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL (expected_round,int, 16, 8) [] = { 0xfffe, 0xfffe,
++						 0xfffe, 0xfffe,
++						 0xfffe, 0xfffe,
++						 0xfffe, 0xfffe };
++VECT_VAR_DECL (expected_round, int, 32, 4) [] = { 0xfffffffe, 0xfffffffe,
++						  0xfffffffe, 0xfffffffe };
++
++#define INSN vqrdmlah
++#define TEST_MSG "VQRDMLAH_LANE"
++
++#include "vqrdmlXh_lane.inc"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c
+@@ -0,0 +1,61 @@
++/* { dg-require-effective-target arm_v8_1a_neon_hw } */
++/* { dg-add-options arm_v8_1a_neon } */
++
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR (expected_cumulative_sat, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL (expected, int, 16, 4) [] = { 0xc70d, 0xc70e, 0xc70f, 0xc710 };
++VECT_VAR_DECL (expected, int, 32, 2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL (expected, int, 16, 8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					    0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL (expected, int, 32, 4) [] = { 0xfffffff0, 0xfffffff1,
++					    0xfffffff2, 0xfffffff3 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 4) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 2) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 8) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 4) = 1;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL (expected_mul, int, 16, 4) [] = { 0x8000, 0x8000,
++						0x8000, 0x8000 };
++VECT_VAR_DECL (expected_mul, int, 32, 2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL (expected_mul, int, 16, 8) [] = { 0x8000, 0x8000,
++						0x8000, 0x8000,
++						0x8000, 0x8000,
++						0x8000, 0x8000 };
++VECT_VAR_DECL (expected_mul, int, 32, 4) [] = { 0x80000000, 0x80000000,
++						0x80000000, 0x80000000 };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 4) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 2) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 8) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 4) = 1;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL (expected_round, int, 16, 4) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL (expected_round, int, 32, 2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL (expected_round, int, 16, 8) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL (expected_round, int, 32, 4) [] = { 0x80000000, 0x80000000,
++						  0x80000000, 0x80000000 };
++
++#define INSN vqrdmlsh
++#define TEST_MSG "VQRDMLSH"
++
++#include "vqrdmlXh.inc"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c
+@@ -0,0 +1,61 @@
++/* { dg-require-effective-target arm_v8_1a_neon_hw } */
++/* { dg-add-options arm_v8_1a_neon } */
++
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR (expected_cumulative_sat, int, 16, 4) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 2) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 16, 8) = 0;
++int VECT_VAR (expected_cumulative_sat, int, 32, 4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL (expected, int, 16, 4) [] = { 0xc70d, 0xc70e, 0xc70f, 0xc710 };
++VECT_VAR_DECL (expected, int, 32, 2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL (expected, int, 16, 8) [] = { 0xff73, 0xff74, 0xff75, 0xff76,
++					    0xff77, 0xff78, 0xff79, 0xff7a };
++VECT_VAR_DECL (expected, int, 32, 4) [] = { 0xfffffff0, 0xfffffff1,
++					    0xfffffff2, 0xfffffff3 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 4) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 2) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 16, 8) = 1;
++int VECT_VAR (expected_cumulative_sat_mul, int, 32, 4) = 1;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL (expected_mul, int, 16, 4) [] = { 0x8000, 0x8000,
++						0x8000, 0x8000 };
++VECT_VAR_DECL (expected_mul, int, 32, 2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL (expected_mul, int, 16, 8) [] = { 0x8000, 0x8000,
++						0x8000, 0x8000,
++						0x8000, 0x8000,
++						0x8000, 0x8000 };
++VECT_VAR_DECL (expected_mul, int, 32, 4) [] = { 0x80000000, 0x80000000,
++						0x80000000, 0x80000000 };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 4) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 2) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 16, 8) = 1;
++int VECT_VAR (expected_cumulative_sat_round, int, 32, 4) = 1;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL (expected_round, int, 16, 4) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL (expected_round, int, 32, 2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL (expected_round, int, 16, 8) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL (expected_round, int, 32, 4) [] = { 0x80000000, 0x80000000,
++						  0x80000000, 0x80000000 };
++
++#define INSN vqrdmlsh
++#define TEST_MSG "VQRDMLSH_LANE"
++
++#include "vqrdmlXh_lane.inc"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh.c
+@@ -0,0 +1,161 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff5, 0xfff6, 0xfff7, 0xfff7 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR(expected_cumulative_sat_mul,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,4) = 1;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL(expected_mul,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_mul,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					    0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					    0x7fffffff, 0x7fffffff };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR(expected_cumulative_sat_round,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,4) = 0;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL(expected_round,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_round,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					      0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					      0x7fffffff, 0x7fffffff };
++
++#define INSN vqrdmulh
++#define TEST_MSG "VQRDMULH"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* vector_res = vqrdmulh(vector,vector2), then store the result.  */
++#define TEST_VQRDMULH2(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		      VECT_VAR(vector2, T1, W, N));			\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRDMULH1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMULH2(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRDMULH(Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQRDMULH1(INSN, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE(vector, int, 16, 4);
++  DECL_VARIABLE(vector, int, 32, 2);
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, int, 16, 8);
++  DECL_VARIABLE(vector_res, int, 32, 4);
++
++  DECL_VARIABLE(vector2, int, 16, 4);
++  DECL_VARIABLE(vector2, int, 32, 2);
++  DECL_VARIABLE(vector2, int, 16, 8);
++  DECL_VARIABLE(vector2, int, 32, 4);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, , int, s, 16, 4);
++  VLOAD(vector, buffer, , int, s, 32, 2);
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++
++  /* Initialize vector2.  */
++  VDUP(vector2, , int, s, 16, 4, 0x5555);
++  VDUP(vector2, , int, s, 32, 2, 0xBB);
++  VDUP(vector2, q, int, s, 16, 8, 0x33);
++  VDUP(vector2, q, int, s, 32, 4, 0x22);
++
++#define CMT ""
++  TEST_VQRDMULH(, int, s, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH(, int, s, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH(q, int, s, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH(q, int, s, 32, 4, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++
++  /* Now use input values such that the multiplication causes
++     saturation.  */
++#define TEST_MSG_MUL " (check mul cumulative saturation)"
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector2, , int, s, 16, 4, 0x8000);
++  VDUP(vector2, , int, s, 32, 2, 0x80000000);
++  VDUP(vector2, q, int, s, 16, 8, 0x8000);
++  VDUP(vector2, q, int, s, 32, 4, 0x80000000);
++
++  TEST_VQRDMULH(, int, s, 16, 4, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMULH(, int, s, 32, 2, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMULH(q, int, s, 16, 8, expected_cumulative_sat_mul, TEST_MSG_MUL);
++  TEST_VQRDMULH(q, int, s, 32, 4, expected_cumulative_sat_mul, TEST_MSG_MUL);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
++
++  /* Use input values where rounding produces a result equal to the
++     saturation value, but does not set the saturation flag.  */
++#define TEST_MSG_ROUND " (check rounding)"
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector2, , int, s, 16, 4, 0x8001);
++  VDUP(vector2, , int, s, 32, 2, 0x80000001);
++  VDUP(vector2, q, int, s, 16, 8, 0x8001);
++  VDUP(vector2, q, int, s, 32, 4, 0x80000001);
++
++  TEST_VQRDMULH(, int, s, 16, 4, expected_cumulative_sat_round, TEST_MSG_ROUND);
++  TEST_VQRDMULH(, int, s, 32, 2, expected_cumulative_sat_round, TEST_MSG_ROUND);
++  TEST_VQRDMULH(q, int, s, 16, 8, expected_cumulative_sat_round, TEST_MSG_ROUND);
++  TEST_VQRDMULH(q, int, s, 32, 4, expected_cumulative_sat_round, TEST_MSG_ROUND);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
++}
++
++int main (void)
++{
++  exec_vqrdmulh ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_lane.c
+@@ -0,0 +1,169 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR(expected_cumulative_sat_mul,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,4) = 1;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL(expected_mul,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_mul,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					    0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					    0x7fffffff, 0x7fffffff };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR(expected_cumulative_sat_round,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,4) = 0;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL(expected_round,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_round,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					      0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					      0x7fffffff, 0x7fffffff };
++
++#define INSN vqrdmulh
++#define TEST_MSG "VQRDMULH_LANE"
++
++#define FNNAME1(NAME) void exec_ ## NAME ## _lane (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* vector_res = vqrdmulh_lane(vector,vector2,lane), then store the result.  */
++#define TEST_VQRDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			   VECT_VAR(vector2, T1, W, N2),		\
++			   L);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMULH_LANE2(INSN, Q, T1, T2, W, N, N2, L, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRDMULH_LANE(Q, T1, T2, W, N, N2, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMULH_LANE1(INSN, Q, T1, T2, W, N, N2, L, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE(vector, int, 16, 4);
++  DECL_VARIABLE(vector, int, 32, 2);
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, int, 16, 8);
++  DECL_VARIABLE(vector_res, int, 32, 4);
++
++  /* vector2: vqrdmulh_lane and vqrdmulhq_lane have a 2nd argument with
++     the same number of elements, so we need only one variable of each
++     type.  */
++  DECL_VARIABLE(vector2, int, 16, 4);
++  DECL_VARIABLE(vector2, int, 32, 2);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, , int, s, 16, 4);
++  VLOAD(vector, buffer, , int, s, 32, 2);
++
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++
++  /* Initialize vector2.  */
++  VDUP(vector2, , int, s, 16, 4, 0x55);
++  VDUP(vector2, , int, s, 32, 2, 0xBB);
++
++  /* Choose lane arbitrarily.  */
++#define CMT ""
++  TEST_VQRDMULH_LANE(, int, s, 16, 4, 4, 2, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_LANE(, int, s, 32, 2, 2, 1, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_LANE(q, int, s, 16, 8, 4, 3, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_LANE(q, int, s, 32, 4, 2, 0, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++
++  /* Now use input values such that the multiplication causes
++     saturation.  */
++#define TEST_MSG_MUL " (check mul cumulative saturation)"
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector2, , int, s, 16, 4, 0x8000);
++  VDUP(vector2, , int, s, 32, 2, 0x80000000);
++
++  TEST_VQRDMULH_LANE(, int, s, 16, 4, 4, 2, expected_cumulative_sat_mul,
++		     TEST_MSG_MUL);
++  TEST_VQRDMULH_LANE(, int, s, 32, 2, 2, 1, expected_cumulative_sat_mul,
++		     TEST_MSG_MUL);
++  TEST_VQRDMULH_LANE(q, int, s, 16, 8, 4, 3, expected_cumulative_sat_mul,
++		     TEST_MSG_MUL);
++  TEST_VQRDMULH_LANE(q, int, s, 32, 4, 2, 0, expected_cumulative_sat_mul,
++		     TEST_MSG_MUL);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
++
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector2, , int, s, 16, 4, 0x8001);
++  VDUP(vector2, , int, s, 32, 2, 0x80000001);
++
++  /* Use input values where rounding produces a result equal to the
++     saturation value, but does not set the saturation flag.  */
++#define TEST_MSG_ROUND " (check rounding)"
++  TEST_VQRDMULH_LANE(, int, s, 16, 4, 4, 2, expected_cumulative_sat_round,
++		     TEST_MSG_ROUND);
++  TEST_VQRDMULH_LANE(, int, s, 32, 2, 2, 1, expected_cumulative_sat_round,
++		     TEST_MSG_ROUND);
++  TEST_VQRDMULH_LANE(q, int, s, 16, 8, 4, 3, expected_cumulative_sat_round,
++		     TEST_MSG_ROUND);
++  TEST_VQRDMULH_LANE(q, int, s, 32, 4, 2, 0, expected_cumulative_sat_round,
++		     TEST_MSG_ROUND);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
++}
++
++int main (void)
++{
++  exec_vqrdmulh_lane ();
++  return 0;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmulh_n.c
+@@ -0,0 +1,155 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffc, 0xfffd };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x6, 0x6, 0x6, 0x5,
++					0x5, 0x4, 0x4, 0x4 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffe, 0xfffffffe,
++					0xfffffffe, 0xfffffffe };
++
++/* Expected values of cumulative_saturation flag when multiplication
++   saturates.  */
++int VECT_VAR(expected_cumulative_sat_mul,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_mul,int,32,4) = 1;
++
++/* Expected results when multiplication saturates.  */
++VECT_VAR_DECL(expected_mul,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_mul,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					    0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_mul,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					    0x7fffffff, 0x7fffffff };
++
++/* Expected values of cumulative_saturation flag when rounding
++   should not cause saturation.  */
++int VECT_VAR(expected_cumulative_sat_round,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_round,int,32,4) = 0;
++
++/* Expected results when rounding should not cause saturation.  */
++VECT_VAR_DECL(expected_round,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_round,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					      0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_round,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					      0x7fffffff, 0x7fffffff };
++
++#define INSN vqrdmulh
++#define TEST_MSG "VQRDMULH_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME ## _n (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  int i;
++
++  /* vector_res = vqrdmulh_n(vector,val), then store the result.  */
++#define TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			L);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMULH_N2(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRDMULH_N(Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRDMULH_N1(INSN, Q, T1, T2, W, N, L, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE(vector, int, 16, 4);
++  DECL_VARIABLE(vector, int, 32, 2);
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, int, 16, 8);
++  DECL_VARIABLE(vector_res, int, 32, 4);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, , int, s, 16, 4);
++  VLOAD(vector, buffer, , int, s, 32, 2);
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++
++  /* Choose multiplier arbitrarily.  */
++#define CMT ""
++  TEST_VQRDMULH_N(, int, s, 16, 4, 0x2233, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_N(, int, s, 32, 2, 0x12345678, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_N(q, int, s, 16, 8, 0xCD12, expected_cumulative_sat, CMT);
++  TEST_VQRDMULH_N(q, int, s, 32, 4, 0xFA23456, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++
++  /* Now use input values such that the multiplication causes
++     saturation.  */
++#define TEST_MSG_MUL " (check mul cumulative saturation)"
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++
++  TEST_VQRDMULH_N(, int, s, 16, 4, 0x8000, expected_cumulative_sat_mul,
++		  TEST_MSG_MUL);
++  TEST_VQRDMULH_N(, int, s, 32, 2, 0x80000000, expected_cumulative_sat_mul,
++		  TEST_MSG_MUL);
++  TEST_VQRDMULH_N(q, int, s, 16, 8, 0x8000, expected_cumulative_sat_mul,
++		  TEST_MSG_MUL);
++  TEST_VQRDMULH_N(q, int, s, 32, 4, 0x80000000, expected_cumulative_sat_mul,
++		  TEST_MSG_MUL);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_mul, TEST_MSG_MUL);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_mul, TEST_MSG_MUL);
++
++  /* Use input values where rounding produces a result equal to the
++     saturation value, but does not set the saturation flag.  */
++#define TEST_MSG_ROUND " (check rounding)"
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++
++  TEST_VQRDMULH_N(, int, s, 16, 4, 0x8001, expected_cumulative_sat_round,
++		  TEST_MSG_ROUND);
++  TEST_VQRDMULH_N(, int, s, 32, 2, 0x80000001, expected_cumulative_sat_round,
++		  TEST_MSG_ROUND);
++  TEST_VQRDMULH_N(q, int, s, 16, 8, 0x8001, expected_cumulative_sat_round,
++		  TEST_MSG_ROUND);
++  TEST_VQRDMULH_N(q, int, s, 32, 4, 0x80000001, expected_cumulative_sat_round,
++		  TEST_MSG_ROUND);
++
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_round, TEST_MSG_ROUND);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_round, TEST_MSG_ROUND);
++}
++
++int main (void)
++{
++  exec_vqrdmulh_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshl.c
+@@ -0,0 +1,1090 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag with input=0.  */
++int VECT_VAR(expected_cumulative_sat_0,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,64,2) = 0;
++
++/* Expected results with input=0.  */
++VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with input=0 and
++   negative shift amount.  */
++int VECT_VAR(expected_cumulative_sat_0_neg,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,64,2) = 0;
++
++/* Expected results with input=0 and negative shift amount.  */
++VECT_VAR_DECL(expected_0_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
++				       0xe8, 0xea, 0xec, 0xee };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffff000, 0xfffff100 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffff80 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x8000, 0x8000, 0x8000, 0x8000,
++					0x8000, 0x8000, 0x8000, 0x8000 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0x80000000, 0x80000000,
++					0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0x8000000000000000, 0x8000000000000000 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++					 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffff,
++					 0xffffffffffffffff };
++
++/* Expected values of cumulative_saturation flag with negative shift
++   amount.  */
++int VECT_VAR(expected_cumulative_sat_neg,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,64,2) = 0;
++
++/* Expected results with negative shift amount.  */
++VECT_VAR_DECL(expected_neg,int,8,8) [] = { 0xfc, 0xfc, 0xfd, 0xfd,
++					   0xfd, 0xfd, 0xfe, 0xfe };
++VECT_VAR_DECL(expected_neg,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffd, 0xfffd };
++VECT_VAR_DECL(expected_neg,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected_neg,int,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x3c, 0x3c, 0x3d, 0x3d,
++					    0x3d, 0x3d, 0x3e, 0x3e };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x3ffc, 0x3ffc, 0x3ffd, 0x3ffd };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x1ffffffe, 0x1ffffffe };
++VECT_VAR_DECL(expected_neg,uint,64,1) [] = { 0xfffffffffffffff };
++VECT_VAR_DECL(expected_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0x2, 0x2, 0x2, 0x2,
++					     0x2, 0x2, 0x2, 0x2,
++					     0x2, 0x2, 0x2, 0x2,
++					     0x2, 0x2, 0x2, 0x2 };
++VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0x20, 0x20, 0x20, 0x20,
++					     0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0x80000, 0x80000,
++					     0x80000, 0x80000 };
++VECT_VAR_DECL(expected_neg,uint,64,2) [] = { 0x100000000000, 0x100000000000 };
++
++/* Expected values of cumulative_saturation flag with input=max and
++   shift by -1.  */
++int VECT_VAR(expected_cumulative_sat_minus1,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus1,uint,64,2) = 0;
++
++/* Expected results with input=max and shift by -1.  */
++VECT_VAR_DECL(expected_minus1,int,8,8) [] = { 0x40, 0x40, 0x40, 0x40,
++					      0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_minus1,int,16,4) [] = { 0x4000, 0x4000, 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_minus1,int,32,2) [] = { 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_minus1,int,64,1) [] = { 0x4000000000000000 };
++VECT_VAR_DECL(expected_minus1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++					       0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_minus1,uint,16,4) [] = { 0x8000, 0x8000, 0x8000, 0x8000 };
++VECT_VAR_DECL(expected_minus1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_minus1,uint,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_minus1,int,8,16) [] = { 0x40, 0x40, 0x40, 0x40,
++					       0x40, 0x40, 0x40, 0x40,
++					       0x40, 0x40, 0x40, 0x40,
++					       0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_minus1,int,16,8) [] = { 0x4000, 0x4000, 0x4000, 0x4000,
++					       0x4000, 0x4000, 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_minus1,int,32,4) [] = { 0x40000000, 0x40000000,
++					       0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_minus1,int,64,2) [] = { 0x4000000000000000,
++					       0x4000000000000000 };
++VECT_VAR_DECL(expected_minus1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						0x80, 0x80, 0x80, 0x80,
++						0x80, 0x80, 0x80, 0x80,
++						0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_minus1,uint,16,8) [] = { 0x8000, 0x8000, 0x8000, 0x8000,
++						0x8000, 0x8000, 0x8000, 0x8000 };
++VECT_VAR_DECL(expected_minus1,uint,32,4) [] = { 0x80000000, 0x80000000,
++						0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_minus1,uint,64,2) [] = { 0x8000000000000000,
++						0x8000000000000000 };
++
++/* Expected values of cumulative_saturation flag with input=max and
++   shift by -3.  */
++int VECT_VAR(expected_cumulative_sat_minus3,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_minus3,uint,64,2) = 0;
++
++/* Expected results with input=max and shift by -3.  */
++VECT_VAR_DECL(expected_minus3,int,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
++					      0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_minus3,int,16,4) [] = { 0x1000, 0x1000, 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_minus3,int,32,2) [] = { 0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_minus3,int,64,1) [] = { 0x1000000000000000 };
++VECT_VAR_DECL(expected_minus3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
++					       0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_minus3,uint,16,4) [] = { 0x2000, 0x2000, 0x2000, 0x2000 };
++VECT_VAR_DECL(expected_minus3,uint,32,2) [] = { 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_minus3,uint,64,1) [] = { 0x2000000000000000 };
++VECT_VAR_DECL(expected_minus3,int,8,16) [] = { 0x10, 0x10, 0x10, 0x10,
++					       0x10, 0x10, 0x10, 0x10,
++					       0x10, 0x10, 0x10, 0x10,
++					       0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_minus3,int,16,8) [] = { 0x1000, 0x1000, 0x1000, 0x1000,
++					       0x1000, 0x1000, 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_minus3,int,32,4) [] = { 0x10000000, 0x10000000,
++					       0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_minus3,int,64,2) [] = { 0x1000000000000000,
++					       0x1000000000000000 };
++VECT_VAR_DECL(expected_minus3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
++						0x20, 0x20, 0x20, 0x20,
++						0x20, 0x20, 0x20, 0x20,
++						0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_minus3,uint,16,8) [] = { 0x2000, 0x2000, 0x2000, 0x2000,
++						0x2000, 0x2000, 0x2000, 0x2000 };
++VECT_VAR_DECL(expected_minus3,uint,32,4) [] = { 0x20000000, 0x20000000,
++						0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_minus3,uint,64,2) [] = { 0x2000000000000000,
++						0x2000000000000000 };
++
++/* Expected values of cumulative_saturation flag with input=max and
++   large shift amount.  */
++int VECT_VAR(expected_cumulative_sat_large_sh,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_large_sh,uint,64,2) = 1;
++
++/* Expected results with input=max and large shift amount.  */
++VECT_VAR_DECL(expected_large_sh,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_large_sh,int,16,4) [] = { 0x7fff, 0x7fff,
++						 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_large_sh,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_large_sh,int,64,1) [] = { 0x7fffffffffffffff };
++VECT_VAR_DECL(expected_large_sh,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_large_sh,uint,16,4) [] = { 0xffff, 0xffff,
++						  0xffff, 0xffff };
++VECT_VAR_DECL(expected_large_sh,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_large_sh,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_large_sh,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						 0x7f, 0x7f, 0x7f, 0x7f,
++						 0x7f, 0x7f, 0x7f, 0x7f,
++						 0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_large_sh,int,16,8) [] = { 0x7fff, 0x7fff,
++						 0x7fff, 0x7fff,
++						 0x7fff, 0x7fff,
++						 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_large_sh,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++						 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_large_sh,int,64,2) [] = { 0x7fffffffffffffff,
++						 0x7fffffffffffffff };
++VECT_VAR_DECL(expected_large_sh,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_large_sh,uint,16,8) [] = { 0xffff, 0xffff,
++						  0xffff, 0xffff,
++						  0xffff, 0xffff,
++						  0xffff, 0xffff };
++VECT_VAR_DECL(expected_large_sh,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++						  0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_large_sh,uint,64,2) [] = { 0xffffffffffffffff,
++						  0xffffffffffffffff };
++
++/* Expected values of cumulative_saturation flag with negative input and
++   large shift amount.  */
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large_sh,uint,64,2) = 1;
++
++/* Expected results with negative input and large shift amount.  */
++VECT_VAR_DECL(expected_neg_large_sh,int,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						    0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_neg_large_sh,int,16,4) [] = { 0x8000, 0x8000,
++						     0x8000, 0x8000 };
++VECT_VAR_DECL(expected_neg_large_sh,int,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_neg_large_sh,int,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_neg_large_sh,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,16,4) [] = { 0xffff, 0xffff,
++						      0xffff, 0xffff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,32,2) [] = { 0xffffffff,
++						      0xffffffff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_neg_large_sh,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						     0x80, 0x80, 0x80, 0x80,
++						     0x80, 0x80, 0x80, 0x80,
++						     0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_neg_large_sh,int,16,8) [] = { 0x8000, 0x8000,
++						     0x8000, 0x8000,
++						     0x8000, 0x8000,
++						     0x8000, 0x8000 };
++VECT_VAR_DECL(expected_neg_large_sh,int,32,4) [] = { 0x80000000, 0x80000000,
++						     0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_neg_large_sh,int,64,2) [] = { 0x8000000000000000,
++						     0x8000000000000000 };
++VECT_VAR_DECL(expected_neg_large_sh,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++						      0xff, 0xff, 0xff, 0xff,
++						      0xff, 0xff, 0xff, 0xff,
++						      0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,16,8) [] = { 0xffff, 0xffff,
++						      0xffff, 0xffff,
++						      0xffff, 0xffff,
++						      0xffff, 0xffff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,32,4) [] = { 0xffffffff,
++						      0xffffffff,
++						      0xffffffff,
++						      0xffffffff };
++VECT_VAR_DECL(expected_neg_large_sh,uint,64,2) [] = { 0xffffffffffffffff,
++						      0xffffffffffffffff };
++
++/* Expected values of cumulative_saturation flag with max/min input and
++   large negative shift amount.  */
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_large_neg_sh,uint,64,2) = 0;
++
++/* Expected results with max/min input and large negative shift amount.  */
++VECT_VAR_DECL(expected_large_neg_sh,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_large_neg_sh,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with input=0 and
++   large negative shift amount.  */
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_large_neg_sh,uint,64,2) = 0;
++
++/* Expected results with input=0 and large negative shift amount.  */
++VECT_VAR_DECL(expected_0_large_neg_sh,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						       0x0, 0x0, 0x0, 0x0,
++						       0x0, 0x0, 0x0, 0x0,
++						       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++							0x0, 0x0, 0x0, 0x0,
++							0x0, 0x0, 0x0, 0x0,
++							0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_large_neg_sh,uint,64,2) [] = { 0x0, 0x0 };
++
++#define INSN vqrshl
++#define TEST_MSG "VQRSHL/VQRSHLQ"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: v3=vqrshl(v1,v2), then store the result.  */
++#define TEST_VQRSHL2(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		      VECT_VAR(vector_shift, T3, W, N));		\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRSHL1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRSHL2(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRSHL(T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQRSHL1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
++
++  clean_results ();
++
++  /* Fill input vector with 0, to check saturation on limits.  */
++  VDUP(vector, , int, s, 8, 8, 0);
++  VDUP(vector, , int, s, 16, 4, 0);
++  VDUP(vector, , int, s, 32, 2, 0);
++  VDUP(vector, , int, s, 64, 1, 0);
++  VDUP(vector, , uint, u, 8, 8, 0);
++  VDUP(vector, , uint, u, 16, 4, 0);
++  VDUP(vector, , uint, u, 32, 2, 0);
++  VDUP(vector, , uint, u, 64, 1, 0);
++  VDUP(vector, q, int, s, 8, 16, 0);
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 8, 16, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0);
++  VDUP(vector, q, uint, u, 32, 4, 0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Choose init value arbitrarily, will be used as shift amount */
++  /* Use values equal to or one-less-than the type width to check
++     behaviour on limits.  */
++  VDUP(vector_shift, , int, s, 8, 8, 7);
++  VDUP(vector_shift, , int, s, 16, 4, 15);
++  VDUP(vector_shift, , int, s, 32, 2, 31);
++  VDUP(vector_shift, , int, s, 64, 1, 63);
++  VDUP(vector_shift, q, int, s, 8, 16, 8);
++  VDUP(vector_shift, q, int, s, 16, 8, 16);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++
++#define CMT " (with input = 0)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_0, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0, CMT);
++
++
++  /* Use negative shift amounts.  */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++#undef CMT
++#define CMT " (input 0 and negative shift amount)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_0_neg, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0_neg, CMT);
++
++
++  /* Test again, with predefined input values.  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose init value arbitrarily, will be used as shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 1);
++  VDUP(vector_shift, , int, s, 16, 4, 3);
++  VDUP(vector_shift, , int, s, 32, 2, 8);
++  VDUP(vector_shift, , int, s, 64, 1, 3);
++  VDUP(vector_shift, q, int, s, 8, 16, 10);
++  VDUP(vector_shift, q, int, s, 16, 8, 12);
++  VDUP(vector_shift, q, int, s, 32, 4, 31);
++  VDUP(vector_shift, q, int, s, 64, 2, 63);
++
++#undef CMT
++#define CMT ""
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Use negative shift amounts.  */
++  VDUP(vector_shift, , int, s, 8, 8, -2);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++#undef CMT
++#define CMT " (negative shift amount)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg, CMT);
++
++
++  /* Fill input vector with max value, to check saturation on
++     limits.  */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++  /* Use -1 shift amount to check cumulative saturation with
++     round_const.  */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -1);
++  VDUP(vector_shift, , int, s, 32, 2, -1);
++  VDUP(vector_shift, , int, s, 64, 1, -1);
++  VDUP(vector_shift, q, int, s, 8, 16, -1);
++  VDUP(vector_shift, q, int, s, 16, 8, -1);
++  VDUP(vector_shift, q, int, s, 32, 4, -1);
++  VDUP(vector_shift, q, int, s, 64, 2, -1);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: shift by -1)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_minus1, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_minus1, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_minus1, CMT);
++
++
++  /* Use -3 shift amount to check cumulative saturation with
++     round_const. */
++  VDUP(vector_shift, , int, s, 8, 8, -3);
++  VDUP(vector_shift, , int, s, 16, 4, -3);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -3);
++  VDUP(vector_shift, q, int, s, 8, 16, -3);
++  VDUP(vector_shift, q, int, s, 16, 8, -3);
++  VDUP(vector_shift, q, int, s, 32, 4, -3);
++  VDUP(vector_shift, q, int, s, 64, 2, -3);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: shift by -3)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_minus3, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_minus3, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_minus3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_minus3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_minus3, CMT);
++
++
++  /* Use large shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 10);
++  VDUP(vector_shift, , int, s, 16, 4, 20);
++  VDUP(vector_shift, , int, s, 32, 2, 40);
++  VDUP(vector_shift, , int, s, 64, 1, 70);
++  VDUP(vector_shift, q, int, s, 8, 16, 10);
++  VDUP(vector_shift, q, int, s, 16, 8, 20);
++  VDUP(vector_shift, q, int, s, 32, 4, 40);
++  VDUP(vector_shift, q, int, s, 64, 2, 70);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: large shift amount)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_large_sh, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_large_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_large_sh, CMT);
++
++
++  /* Fill input vector with negative values, to check saturation on
++     limits.  */
++  VDUP(vector, , int, s, 8, 8, 0x80);
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, , int, s, 64, 1, 0x8000000000000000LL);
++  VDUP(vector, q, int, s, 8, 16, 0x80);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector, q, int, s, 64, 2, 0x8000000000000000LL);
++
++  /* Use large shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 10);
++  VDUP(vector_shift, , int, s, 16, 4, 20);
++  VDUP(vector_shift, , int, s, 32, 2, 40);
++  VDUP(vector_shift, , int, s, 64, 1, 70);
++  VDUP(vector_shift, q, int, s, 8, 16, 10);
++  VDUP(vector_shift, q, int, s, 16, 8, 20);
++  VDUP(vector_shift, q, int, s, 32, 4, 40);
++  VDUP(vector_shift, q, int, s, 64, 2, 70);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: large shift amount with negative input)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_neg_large_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_neg_large_sh, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg_large_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg_large_sh, CMT);
++
++
++  /* Fill input vector with negative and positive values, to check
++   * saturation on limits */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, int, s, 8, 16, 0x80);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector, q, int, s, 64, 2, 0x8000000000000000LL);
++
++  /* Use large negative shift amount  */
++  VDUP(vector_shift, , int, s, 8, 8, -10);
++  VDUP(vector_shift, , int, s, 16, 4, -20);
++  VDUP(vector_shift, , int, s, 32, 2, -40);
++  VDUP(vector_shift, , int, s, 64, 1, -70);
++  VDUP(vector_shift, q, int, s, 8, 16, -10);
++  VDUP(vector_shift, q, int, s, 16, 8, -20);
++  VDUP(vector_shift, q, int, s, 32, 4, -40);
++  VDUP(vector_shift, q, int, s, 64, 2, -70);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: large negative shift amount)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_large_neg_sh, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_large_neg_sh, CMT);
++
++
++  /* Fill input vector with 0, to check saturation in case of large
++   * shift amount */
++  VDUP(vector, , int, s, 8, 8, 0);
++  VDUP(vector, , int, s, 16, 4, 0);
++  VDUP(vector, , int, s, 32, 2, 0);
++  VDUP(vector, , int, s, 64, 1, 0);
++  VDUP(vector, q, int, s, 8, 16, 0);
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++
++  /* Use large shift amount  */
++  VDUP(vector_shift, , int, s, 8, 8, -10);
++  VDUP(vector_shift, , int, s, 16, 4, -20);
++  VDUP(vector_shift, , int, s, 32, 2, -40);
++  VDUP(vector_shift, , int, s, 64, 1, -70);
++  VDUP(vector_shift, q, int, s, 8, 16, -10);
++  VDUP(vector_shift, q, int, s, 16, 8, -20);
++  VDUP(vector_shift, q, int, s, 32, 4, -40);
++  VDUP(vector_shift, q, int, s, 64, 2, -70);
++
++#undef CMT
++#define CMT " (checking cumulative saturation: large negative shift amount with 0 input)"
++  TEST_VQRSHL(int, , int, s, 8, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 16, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 32, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , int, s, 64, 1, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 8, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 16, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 32, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, , uint, u, 64, 1, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 8, 16, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 16, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 32, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, int, s, 64, 2, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_large_neg_sh, CMT);
++  TEST_VQRSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_large_neg_sh, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_large_neg_sh, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_large_neg_sh, CMT);
++}
++
++int main (void)
++{
++  exec_vqrshl ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_n.c
+@@ -0,0 +1,174 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
++				       0xfa, 0xfb, 0xfb, 0xfc };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff9, 0xfff9, 0xfffa };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++/* Expected values of cumulative_saturation flag with shift by 3.  */
++int VECT_VAR(expected_cumulative_sat_sh3,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_sh3,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_sh3,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_sh3,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_sh3,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_sh3,uint,64,2) = 1;
++
++/* Expected results with shift by 3.  */
++VECT_VAR_DECL(expected_sh3,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					   0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_sh3,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_sh3,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_sh3,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_sh3,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_sh3,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++/* Expected values of cumulative_saturation flag with shift by max
++   amount.  */
++int VECT_VAR(expected_cumulative_sat_shmax,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_shmax,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_shmax,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_shmax,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_shmax,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_shmax,uint,64,2) = 1;
++
++/* Expected results with shift by max amount.  */
++VECT_VAR_DECL(expected_shmax,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					     0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_shmax,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_shmax,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_shmax,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					      0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_shmax,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_shmax,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++#define INSN vqrshrn_n
++#define TEST_MSG "VQRSHRN_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: y=vqrshrn_n(x,v), then store the result.  */
++#define TEST_VQRSHRN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W2, N));		\
++  VECT_VAR(vector_res, T1, W2, N) =					\
++    INSN##_##T2##W(VECT_VAR(vector, T1, W, N),				\
++		   V);							\
++  vst1_##T2##W2(VECT_VAR(result, T1, W2, N),				\
++		VECT_VAR(vector_res, T1, W2, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRSHRN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRSHRN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRSHRN_N(T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRSHRN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++  DECL_VARIABLE(vector, uint, 16, 8);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, uint, 64, 2);
++
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++  VLOAD(vector, buffer, q, int, s, 64, 2);
++  VLOAD(vector, buffer, q, uint, u, 16, 8);
++  VLOAD(vector, buffer, q, uint, u, 32, 4);
++  VLOAD(vector, buffer, q, uint, u, 64, 2);
++
++  /* Choose shift amount arbitrarily.  */
++#define CMT ""
++  TEST_VQRSHRN_N(int, s, 16, 8, 8, 1, expected_cumulative_sat, CMT);
++  TEST_VQRSHRN_N(int, s, 32, 16, 4, 1, expected_cumulative_sat, CMT);
++  TEST_VQRSHRN_N(int, s, 64, 32, 2, 2, expected_cumulative_sat, CMT);
++  TEST_VQRSHRN_N(uint, u, 16, 8, 8, 2, expected_cumulative_sat, CMT);
++  TEST_VQRSHRN_N(uint, u, 32, 16, 4, 3, expected_cumulative_sat, CMT);
++  TEST_VQRSHRN_N(uint, u, 64, 32, 2, 3, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++
++
++  /* Another set of tests, shifting max value by 3.  */
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++#undef CMT
++#define CMT " (check saturation: shift by 3)"
++  TEST_VQRSHRN_N(int, s, 16, 8, 8, 3, expected_cumulative_sat_sh3, CMT);
++  TEST_VQRSHRN_N(int, s, 32, 16, 4, 3, expected_cumulative_sat_sh3, CMT);
++  TEST_VQRSHRN_N(int, s, 64, 32, 2, 3, expected_cumulative_sat_sh3, CMT);
++  TEST_VQRSHRN_N(uint, u, 16, 8, 8, 3, expected_cumulative_sat_sh3, CMT);
++  TEST_VQRSHRN_N(uint, u, 32, 16, 4, 3, expected_cumulative_sat_sh3, CMT);
++  TEST_VQRSHRN_N(uint, u, 64, 32, 2, 3, expected_cumulative_sat_sh3, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh3, CMT);
++
++
++  /* Shift by max amount.  */
++#undef CMT
++#define CMT " (check saturation: shift by max)"
++  TEST_VQRSHRN_N(int, s, 16, 8, 8, 8, expected_cumulative_sat_shmax, CMT);
++  TEST_VQRSHRN_N(int, s, 32, 16, 4, 16, expected_cumulative_sat_shmax, CMT);
++  TEST_VQRSHRN_N(int, s, 64, 32, 2, 32, expected_cumulative_sat_shmax, CMT);
++  TEST_VQRSHRN_N(uint, u, 16, 8, 8, 8, expected_cumulative_sat_shmax, CMT);
++  TEST_VQRSHRN_N(uint, u, 32, 16, 4, 16, expected_cumulative_sat_shmax, CMT);
++  TEST_VQRSHRN_N(uint, u, 64, 32, 2, 32, expected_cumulative_sat_shmax, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_shmax, CMT);
++}
++
++int main (void)
++{
++  exec_vqrshrn_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_n.c
+@@ -0,0 +1,189 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag with negative unput.  */
++int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 1;
++
++/* Expected results with negative input.  */
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with max input value
++   shifted by 1.  */
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,64,2) = 1;
++
++/* Expected results with max input value shifted by 1.  */
++VECT_VAR_DECL(expected_max_sh1,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_sh1,uint,16,4) [] = { 0xffff, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_sh1,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max_sh1,uint,64,1) [] = { 0x3333333333333333 };
++
++/* Expected values of cumulative_saturation flag with max input value
++   shifted by max amount.  */
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,64,2) = 0;
++
++/* Expected results with max input value shifted by max amount.  */
++VECT_VAR_DECL(expected_max_shmax,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_shmax,uint,16,4) [] = { 0x8000, 0x8000,
++						   0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_shmax,uint,32,2) [] = { 0x80000000, 0x80000000 };
++
++/* Expected values of cumulative_saturation flag with min input value
++   shifted by max amount.  */
++int VECT_VAR(expected_cumulative_sat_min_shmax,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_min_shmax,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_min_shmax,int,64,2) = 1;
++
++/* Expected results with min input value shifted by max amount.  */
++VECT_VAR_DECL(expected_min_shmax,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,uint,32,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with inputs in usual
++   range.  */
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++
++/* Expected results with inputs in usual range.  */
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x49, 0x49, 0x49, 0x49,
++					0x49, 0x49, 0x49, 0x49 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xdeadbf, 0xdeadbf };
++
++#define INSN vqrshrun_n
++#define TEST_MSG "VQRSHRUN_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: y=vqrshrun_n(x,v), then store the result.  */
++#define TEST_VQRSHRUN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, uint, W2, N));	\
++  VECT_VAR(vector_res, uint, W2, N) =					\
++    INSN##_##T2##W(VECT_VAR(vector, T1, W, N),				\
++		   V);							\
++  vst1_u##W2(VECT_VAR(result, uint, W2, N),				\
++	     VECT_VAR(vector_res, uint, W2, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQRSHRUN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRSHRUN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQRSHRUN_N(T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQRSHRUN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  /* Fill input vector with negative values, to check saturation on
++     limits.  */
++  VDUP(vector, q, int, s, 16, 8, -2);
++  VDUP(vector, q, int, s, 32, 4, -3);
++  VDUP(vector, q, int, s, 64, 2, -4);
++
++  /* Choose shift amount arbitrarily.   */
++#define CMT " (negative input)"
++  TEST_VQRSHRUN_N(int, s, 16, 8, 8, 3, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHRUN_N(int, s, 32, 16, 4, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQRSHRUN_N(int, s, 64, 32, 2, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++
++
++  /* Fill input vector with max value, to check saturation on
++     limits.  */
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++
++  /* shift by 1.  */
++#undef CMT
++#define CMT " (check cumulative saturation: shift by 1)"
++  TEST_VQRSHRUN_N(int, s, 16, 8, 8, 1, expected_cumulative_sat_max_sh1, CMT);
++  TEST_VQRSHRUN_N(int, s, 32, 16, 4, 1, expected_cumulative_sat_max_sh1, CMT);
++  TEST_VQRSHRUN_N(int, s, 64, 32, 2, 1, expected_cumulative_sat_max_sh1, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh1, CMT);
++
++
++  /* shift by max.  */
++#undef CMT
++#define CMT " (check cumulative saturation: shift by max, positive input)"
++  TEST_VQRSHRUN_N(int, s, 16, 8, 8, 8, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQRSHRUN_N(int, s, 32, 16, 4, 16, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQRSHRUN_N(int, s, 64, 32, 2, 32, expected_cumulative_sat_max_shmax, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shmax, CMT);
++
++
++  /* Fill input vector with min value, to check saturation on limits.  */
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector, q, int, s, 64, 2, 0x8000000000000000LL);
++
++  /* shift by max  */
++#undef CMT
++#define CMT " (check cumulative saturation: shift by max, negative input)"
++  TEST_VQRSHRUN_N(int, s, 16, 8, 8, 8, expected_cumulative_sat_min_shmax, CMT);
++  TEST_VQRSHRUN_N(int, s, 32, 16, 4, 16, expected_cumulative_sat_min_shmax, CMT);
++  TEST_VQRSHRUN_N(int, s, 64, 32, 2, 32, expected_cumulative_sat_min_shmax, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_min_shmax, CMT);
++
++
++  /* Fill input vector with positive values, to check normal case.  */
++  VDUP(vector, q, int, s, 16, 8, 0x1234);
++  VDUP(vector, q, int, s, 32, 4, 0x87654321);
++  VDUP(vector, q, int, s, 64, 2, 0xDEADBEEF);
++
++  /* shift arbitrary amount.  */
++#undef CMT
++#define CMT ""
++  TEST_VQRSHRUN_N(int, s, 16, 8, 8, 6, expected_cumulative_sat, CMT);
++  TEST_VQRSHRUN_N(int, s, 32, 16, 4, 7, expected_cumulative_sat, CMT);
++  TEST_VQRSHRUN_N(int, s, 64, 32, 2, 8, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vqrshrun_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshl.c
+@@ -0,0 +1,829 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag with input=0.  */
++int VECT_VAR(expected_cumulative_sat_0,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0,uint,64,2) = 0;
++
++/* Expected results with input=0.  */
++VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with input=0 and
++   negative shift amount.  */
++int VECT_VAR(expected_cumulative_sat_0_neg,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_0_neg,uint,64,2) = 0;
++
++/* Expected results with input=0 and negative shift amount.  */
++VECT_VAR_DECL(expected_0_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_neg,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
++				       0xe8, 0xea, 0xec, 0xee };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffff000, 0xfffff100 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffffe };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x1ffffffffffffffe };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80,
++					0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x8000, 0x8000, 0x8000, 0x8000,
++					0x8000, 0x8000, 0x8000, 0x8000 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0x80000000, 0x80000000,
++					0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0x8000000000000000,
++					0x8000000000000000 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++					 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffff,
++					 0xffffffffffffffff };
++
++/* Expected values of cumulative_sat_saturation flag with negative shift
++   amount.  */
++int VECT_VAR(expected_cumulative_sat_neg,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_neg,uint,64,2) = 0;
++
++/* Expected results with negative shift amount.  */
++VECT_VAR_DECL(expected_neg,int,8,8) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
++					   0xfa, 0xfa, 0xfb, 0xfb };
++VECT_VAR_DECL(expected_neg,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffc, 0xfffc };
++VECT_VAR_DECL(expected_neg,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected_neg,int,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x78, 0x78, 0x79, 0x79,
++					    0x7a, 0x7a, 0x7b, 0x7b };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x3ffc, 0x3ffc, 0x3ffc, 0x3ffc };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x1ffffffe, 0x1ffffffe };
++VECT_VAR_DECL(expected_neg,uint,64,1) [] = { 0xfffffffffffffff };
++VECT_VAR_DECL(expected_neg,int,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_neg,int,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					    0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_neg,int,32,4) [] = { 0xffffffff, 0xffffffff,
++					    0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_neg,int,64,2) [] = { 0xffffffffffffffff,
++					    0xffffffffffffffff };
++VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++					     0x1, 0x1, 0x1, 0x1,
++					     0x1, 0x1, 0x1, 0x1,
++					     0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0x1f, 0x1f, 0x1f, 0x1f,
++					     0x1f, 0x1f, 0x1f, 0x1f };
++VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0x7ffff, 0x7ffff,
++					     0x7ffff, 0x7ffff };
++VECT_VAR_DECL(expected_neg,uint,64,2) [] = { 0xfffffffffff, 0xfffffffffff };
++
++/* Expected values of cumulative_sat_saturation flag with negative
++   input and large shift amount.  */
++int VECT_VAR(expected_cumulative_sat_neg_large,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg_large,uint,64,2) = 1;
++
++/* Expected results with negative input and large shift amount.  */
++VECT_VAR_DECL(expected_neg_large,int,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						 0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_neg_large,int,16,4) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL(expected_neg_large,int,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_neg_large,int,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_neg_large,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_neg_large,uint,16,4) [] = { 0xffff, 0xffff,
++						   0xffff, 0xffff };
++VECT_VAR_DECL(expected_neg_large,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_neg_large,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_neg_large,int,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_neg_large,int,16,8) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL(expected_neg_large,int,32,4) [] = { 0x80000000, 0x80000000,
++						  0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_neg_large,int,64,2) [] = { 0x8000000000000000,
++						  0x8000000000000000 };
++VECT_VAR_DECL(expected_neg_large,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++						   0xff, 0xff, 0xff, 0xff,
++						   0xff, 0xff, 0xff, 0xff,
++						   0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_neg_large,uint,16,8) [] = { 0xffff, 0xffff,
++						   0xffff, 0xffff,
++						   0xffff, 0xffff,
++						   0xffff, 0xffff };
++VECT_VAR_DECL(expected_neg_large,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++						   0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_neg_large,uint,64,2) [] = { 0xffffffffffffffff,
++						   0xffffffffffffffff };
++
++/* Expected values of cumulative_sat_saturation flag with max input
++   and shift by -1.  */
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_minus1,uint,64,2) = 0;
++
++/* Expected results with max input and shift by -1.  */
++VECT_VAR_DECL(expected_max_minus1,int,8,8) [] = { 0x3f, 0x3f, 0x3f, 0x3f,
++						  0x3f, 0x3f, 0x3f, 0x3f };
++VECT_VAR_DECL(expected_max_minus1,int,16,4) [] = { 0x3fff, 0x3fff,
++						   0x3fff, 0x3fff };
++VECT_VAR_DECL(expected_max_minus1,int,32,2) [] = { 0x3fffffff, 0x3fffffff };
++VECT_VAR_DECL(expected_max_minus1,int,64,1) [] = { 0x3fffffffffffffff };
++VECT_VAR_DECL(expected_max_minus1,uint,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						   0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_minus1,uint,16,4) [] = { 0x7fff, 0x7fff,
++						    0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_minus1,uint,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_minus1,uint,64,1) [] = { 0x7fffffffffffffff };
++VECT_VAR_DECL(expected_max_minus1,int,8,16) [] = { 0x3f, 0x3f, 0x3f, 0x3f,
++						   0x3f, 0x3f, 0x3f, 0x3f,
++						   0x3f, 0x3f, 0x3f, 0x3f,
++						   0x3f, 0x3f, 0x3f, 0x3f };
++VECT_VAR_DECL(expected_max_minus1,int,16,8) [] = { 0x3fff, 0x3fff,
++						   0x3fff, 0x3fff,
++						   0x3fff, 0x3fff,
++						   0x3fff, 0x3fff };
++VECT_VAR_DECL(expected_max_minus1,int,32,4) [] = { 0x3fffffff, 0x3fffffff,
++						   0x3fffffff, 0x3fffffff };
++VECT_VAR_DECL(expected_max_minus1,int,64,2) [] = { 0x3fffffffffffffff,
++						   0x3fffffffffffffff };
++VECT_VAR_DECL(expected_max_minus1,uint,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						    0x7f, 0x7f, 0x7f, 0x7f,
++						    0x7f, 0x7f, 0x7f, 0x7f,
++						    0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_minus1,uint,16,8) [] = { 0x7fff, 0x7fff,
++						    0x7fff, 0x7fff,
++						    0x7fff, 0x7fff,
++						    0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_minus1,uint,32,4) [] = { 0x7fffffff, 0x7fffffff,
++						    0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_minus1,uint,64,2) [] = { 0x7fffffffffffffff,
++						    0x7fffffffffffffff };
++
++/* Expected values of cumulative_sat_saturation flag with max input
++   and large shift amount.  */
++int VECT_VAR(expected_cumulative_sat_max_large,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_large,uint,64,2) = 1;
++
++/* Expected results with max input and large shift amount.  */
++VECT_VAR_DECL(expected_max_large,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					       0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_large,int,16,4) [] = { 0x7fff, 0x7fff,
++						0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_large,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_large,int,64,1) [] = { 0x7fffffffffffffff };
++VECT_VAR_DECL(expected_max_large,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_large,uint,16,4) [] = { 0xffff, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_large,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max_large,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_max_large,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						0x7f, 0x7f, 0x7f, 0x7f,
++						0x7f, 0x7f, 0x7f, 0x7f,
++						0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_large,int,16,8) [] = { 0x7fff, 0x7fff,
++						0x7fff, 0x7fff,
++						0x7fff, 0x7fff,
++						0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_large,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++						0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_large,int,64,2) [] = { 0x7fffffffffffffff,
++						0x7fffffffffffffff };
++VECT_VAR_DECL(expected_max_large,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++						 0xff, 0xff, 0xff, 0xff,
++						 0xff, 0xff, 0xff, 0xff,
++						 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_large,uint,16,8) [] = { 0xffff, 0xffff,
++						 0xffff, 0xffff,
++						 0xffff, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_large,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++						 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max_large,uint,64,2) [] = { 0xffffffffffffffff,
++						 0xffffffffffffffff };
++
++/* Expected values of cumulative_sat_saturation flag with saturation
++   on 64-bits values.  */
++int VECT_VAR(expected_cumulative_sat_64,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_64,int,64,2) = 1;
++
++/* Expected results with saturation on 64-bits values..  */
++VECT_VAR_DECL(expected_64,int,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_64,int,64,2) [] = { 0x7fffffffffffffff,
++					   0x7fffffffffffffff };
++
++#define INSN vqshl
++#define TEST_MSG "VQSHL/VQSHLQ"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: v3=vqshl(v1,v2), then store the result.  */
++#define TEST_VQSHL2(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		      VECT_VAR(vector_shift, T3, W, N));		\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQSHL1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHL2(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQSHL(T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQSHL1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
++
++  clean_results ();
++
++  /* Fill input vector with 0, to check saturation on limits.  */
++  VDUP(vector, , int, s, 8, 8, 0);
++  VDUP(vector, , int, s, 16, 4, 0);
++  VDUP(vector, , int, s, 32, 2, 0);
++  VDUP(vector, , int, s, 64, 1, 0);
++  VDUP(vector, , uint, u, 8, 8, 0);
++  VDUP(vector, , uint, u, 16, 4, 0);
++  VDUP(vector, , uint, u, 32, 2, 0);
++  VDUP(vector, , uint, u, 64, 1, 0);
++  VDUP(vector, q, int, s, 8, 16, 0);
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 8, 16, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0);
++  VDUP(vector, q, uint, u, 32, 4, 0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Choose init value arbitrarily, will be used as shift amount */
++  /* Use values equal or one-less-than the type width to check
++     behaviour on limits.  */
++
++  /* 64-bits vectors first.  */
++  /* Shift 8-bits lanes by 7...  */
++  VDUP(vector_shift, , int, s, 8, 8, 7);
++  /* ... except: lane 0 (by 6), lane 1 (by 8) and lane 2 (by 9).  */
++  VSET_LANE(vector_shift, , int, s, 8, 8, 0, 6);
++  VSET_LANE(vector_shift, , int, s, 8, 8, 1, 8);
++  VSET_LANE(vector_shift, , int, s, 8, 8, 2, 9);
++
++  /* Shift 16-bits lanes by 15... */
++  VDUP(vector_shift, , int, s, 16, 4, 15);
++  /* ... except: lane 0 (by 14), lane 1 (by 16), and lane 2 (by 17).  */
++  VSET_LANE(vector_shift, , int, s, 16, 4, 0, 14);
++  VSET_LANE(vector_shift, , int, s, 16, 4, 1, 16);
++  VSET_LANE(vector_shift, , int, s, 16, 4, 2, 17);
++
++  /* Shift 32-bits lanes by 31... */
++  VDUP(vector_shift, , int, s, 32, 2, 31);
++  /* ... except lane 1 (by 30).  */
++  VSET_LANE(vector_shift, , int, s, 32, 2, 1, 30);
++
++  /* Shift 64 bits lane by 63.  */
++  VDUP(vector_shift, , int, s, 64, 1, 63);
++
++  /* 128-bits vectors.  */
++  /* Shift 8-bits lanes by 8.  */
++  VDUP(vector_shift, q, int, s, 8, 16, 8);
++  /* Shift 16-bits lanes by 16.  */
++  VDUP(vector_shift, q, int, s, 16, 8, 16);
++  /* Shift 32-bits lanes by 32...  */
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  /* ... except lane 1 (by 33).  */
++  VSET_LANE(vector_shift, q, int, s, 32, 4, 1, 33);
++
++  /* Shift 64-bits lanes by 64... */
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++  /* ... except lane 1 (by 62).  */
++  VSET_LANE(vector_shift, q, int, s, 64, 2, 1, 62);
++
++#define CMT " (with input = 0)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_0, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_0, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0, CMT);
++
++
++  /* Use negative shift amounts */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++#undef CMT
++#define CMT " (input 0 and negative shift amount)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_0_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_0_neg, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0_neg, CMT);
++
++  /* Test again, with predefined input values.  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose init value arbitrarily, will be used as shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 1);
++  VDUP(vector_shift, , int, s, 16, 4, 3);
++  VDUP(vector_shift, , int, s, 32, 2, 8);
++  VDUP(vector_shift, , int, s, 64, 1, -3);
++  VDUP(vector_shift, q, int, s, 8, 16, 10);
++  VDUP(vector_shift, q, int, s, 16, 8, 12);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 63);
++
++#undef CMT
++#define CMT ""
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Use negative shift amounts */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++#undef CMT
++#define CMT " (negative shift amount)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg, CMT);
++
++
++  /* Use large shift amounts.  */
++  VDUP(vector_shift, , int, s, 8, 8, 8);
++  VDUP(vector_shift, , int, s, 16, 4, 16);
++  VDUP(vector_shift, , int, s, 32, 2, 32);
++  VDUP(vector_shift, , int, s, 64, 1, 64);
++  VDUP(vector_shift, q, int, s, 8, 16, 8);
++  VDUP(vector_shift, q, int, s, 16, 8, 16);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++
++#undef CMT
++#define CMT " (large shift amount, negative input)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_neg_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_neg_large, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_neg_large, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg_large, CMT);
++
++
++  /* Fill input vector with max value, to check saturation on limits */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++  /* Shift by -1 */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -1);
++  VDUP(vector_shift, , int, s, 32, 2, -1);
++  VDUP(vector_shift, , int, s, 64, 1, -1);
++  VDUP(vector_shift, q, int, s, 8, 16, -1);
++  VDUP(vector_shift, q, int, s, 16, 8, -1);
++  VDUP(vector_shift, q, int, s, 32, 4, -1);
++  VDUP(vector_shift, q, int, s, 64, 2, -1);
++
++#undef CMT
++#define CMT " (max input, shift by -1)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_max_minus1, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_max_minus1, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_minus1, CMT);
++
++
++  /* Use large shift amounts */
++  VDUP(vector_shift, , int, s, 8, 8, 8);
++  VDUP(vector_shift, , int, s, 16, 4, 16);
++  VDUP(vector_shift, , int, s, 32, 2, 32);
++  VDUP(vector_shift, , int, s, 64, 1, 64);
++  VDUP(vector_shift, q, int, s, 8, 16, 8);
++  VDUP(vector_shift, q, int, s, 16, 8, 16);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++
++#undef CMT
++#define CMT " (max input, large shift amount)"
++  TEST_VQSHL(int, , int, s, 8, 8, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , int, s, 16, 4, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , int, s, 32, 2, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , uint, u, 8, 8, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , uint, u, 16, 4, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , uint, u, 32, 2, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, , uint, u, 64, 1, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, int, s, 8, 16, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, int, s, 16, 8, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, int, s, 32, 4, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 8, 16, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 16, 8, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 32, 4, expected_cumulative_sat_max_large, CMT);
++  TEST_VQSHL(int, q, uint, u, 64, 2, expected_cumulative_sat_max_large, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_large, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_large, CMT);
++
++
++  /* Check 64 bits saturation.  */
++  VDUP(vector, , int, s, 64, 1, -10);
++  VDUP(vector_shift, , int, s, 64, 1, 64);
++  VDUP(vector, q, int, s, 64, 2, 10);
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++
++#undef CMT
++#define CMT " (check saturation on 64 bits)"
++  TEST_VQSHL(int, , int, s, 64, 1, expected_cumulative_sat_64, CMT);
++  TEST_VQSHL(int, q, int, s, 64, 2, expected_cumulative_sat_64, CMT);
++
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_64, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_64, CMT);
++}
++
++int main (void)
++{
++  exec_vqshl ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshl_n.c
+@@ -0,0 +1,234 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
++				       0xd0, 0xd4, 0xd8, 0xdc };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffffe0, 0xffffffe2 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffffc0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
++					0xd0, 0xd4, 0xd8, 0xdc,
++					0xe0, 0xe4, 0xe8, 0xec,
++					0xf0, 0xf4, 0xf8, 0xfc };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6,
++					0xffe8, 0xffea, 0xffec, 0xffee };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffe0, 0xffffffe2,
++					0xffffffe4, 0xffffffe6 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffc0, 0xffffffffffffffc4 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff,
++					 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++					 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffff,
++					 0xffffffffffffffff };
++
++/* Expected values of cumulative_saturation flag with max positive input.  */
++int VECT_VAR(expected_cumulative_sat_max,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max,uint,64,2) = 1;
++
++/* Expected results with max positive input.  */
++VECT_VAR_DECL(expected_max,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					   0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max,int,64,1) [] = { 0x7fffffffffffffff };
++VECT_VAR_DECL(expected_max,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_max,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					    0x7f, 0x7f, 0x7f, 0x7f,
++					    0x7f, 0x7f, 0x7f, 0x7f,
++					    0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max,int,16,8) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff,
++					    0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
++					    0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max,int,64,2) [] = { 0x7fffffffffffffff,
++					    0x7fffffffffffffff };
++VECT_VAR_DECL(expected_max,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					     0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++					     0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max,uint,64,2) [] = { 0xffffffffffffffff,
++					     0xffffffffffffffff };
++
++#define INSN vqshl
++#define TEST_MSG "VQSHL_N/VQSHLQ_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME ##_n (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: v2=vqshl_n(v1,v), then store the result.  */
++#define TEST_VQSHL_N2(INSN, Q, T1, T2, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W, N));		\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQSHL_N1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHL_N2(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQSHL_N(T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)	\
++  TEST_VQSHL_N1(INSN, T3, Q, T1, T2, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose shift amount arbitrarily.  */
++#define CMT ""
++  TEST_VQSHL_N(, int, s, 8, 8, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, int, s, 16, 4, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, int, s, 32, 2, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, int, s, 64, 1, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, uint, u, 8, 8, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, uint, u, 16, 4, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, uint, u, 32, 2, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(, uint, u, 64, 1, 3, expected_cumulative_sat, CMT);
++
++  TEST_VQSHL_N(q, int, s, 8, 16, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, int, s, 16, 8, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, int, s, 32, 4, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, int, s, 64, 2, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, uint, u, 8, 16, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, uint, u, 16, 8, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, uint, u, 32, 4, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHL_N(q, uint, u, 64, 2, 3, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Fill input vector with max value, to check saturation on limits.  */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++#undef CMT
++#define CMT " (with max input)"
++  TEST_VQSHL_N(, int, s, 8, 8, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, int, s, 16, 4, 1, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, int, s, 32, 2, 1, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, int, s, 64, 1, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, uint, u, 8, 8, 3, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, uint, u, 16, 4, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, uint, u, 32, 2, 3, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(, uint, u, 64, 1, 3, expected_cumulative_sat_max, CMT);
++
++  TEST_VQSHL_N(q, int, s, 8, 16, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, int, s, 16, 8, 1, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, int, s, 32, 4, 1, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, int, s, 64, 2, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, uint, u, 8, 16, 3, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, uint, u, 16, 8, 2, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, uint, u, 32, 4, 3, expected_cumulative_sat_max, CMT);
++  TEST_VQSHL_N(q, uint, u, 64, 2, 3, expected_cumulative_sat_max, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max, CMT);
++}
++
++int main (void)
++{
++  exec_vqshl_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshlu_n.c
+@@ -0,0 +1,263 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag with negative
++   input.  */
++int VECT_VAR(expected_cumulative_sat_neg,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 1;
++
++/* Expected results with negative input.  */
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with shift by 1.  */
++int VECT_VAR(expected_cumulative_sat_sh1,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_sh1,int,64,2) = 0;
++
++/* Expected results with shift by 1.  */
++VECT_VAR_DECL(expected_sh1,uint,8,8) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
++					    0xfe, 0xfe, 0xfe, 0xfe };
++VECT_VAR_DECL(expected_sh1,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe };
++VECT_VAR_DECL(expected_sh1,uint,32,2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected_sh1,uint,64,1) [] = { 0xfffffffffffffffe };
++VECT_VAR_DECL(expected_sh1,uint,8,16) [] = { 0xfe, 0xfe, 0xfe, 0xfe,
++					     0xfe, 0xfe, 0xfe, 0xfe,
++					     0xfe, 0xfe, 0xfe, 0xfe,
++					     0xfe, 0xfe, 0xfe, 0xfe };
++VECT_VAR_DECL(expected_sh1,uint,16,8) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe,
++					     0xfffe, 0xfffe, 0xfffe, 0xfffe };
++VECT_VAR_DECL(expected_sh1,uint,32,4) [] = { 0xfffffffe, 0xfffffffe,
++					     0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected_sh1,uint,64,2) [] = { 0xfffffffffffffffe,
++					     0xfffffffffffffffe };
++
++/* Expected values of cumulative_saturation flag with shift by 2.  */
++int VECT_VAR(expected_cumulative_sat_sh2,int,8,8) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,16,4) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,32,2) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,64,1) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,8,16) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_sh2,int,64,2) = 1;
++
++/* Expected results with shift by 2.  */
++VECT_VAR_DECL(expected_sh2,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_sh2,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_sh2,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_sh2,uint,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_sh2,uint,8,16) [] = { 0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_sh2,uint,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					     0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_sh2,uint,32,4) [] = { 0xffffffff, 0xffffffff,
++					     0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_sh2,uint,64,2) [] = { 0xffffffffffffffff,
++					     0xffffffffffffffff };
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,1) = 0;
++int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x8, 0x8, 0x8, 0x8 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0x18, 0x18 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x40 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xa0, 0xa0, 0xa0, 0xa0,
++					 0xa0, 0xa0, 0xa0, 0xa0,
++					 0xa0, 0xa0, 0xa0, 0xa0,
++					 0xa0, 0xa0, 0xa0, 0xa0 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0x180, 0x180, 0x180, 0x180,
++					 0x180, 0x180, 0x180, 0x180 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0x380, 0x380, 0x380, 0x380 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0x800, 0x800 };
++
++
++#define INSN vqshlu
++#define TEST_MSG "VQSHLU_N/VQSHLUQ_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME ## _n(void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: v2=vqshlu_n(v1,v), then store the result.  */
++#define TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T3, W, N));		\
++  VECT_VAR(vector_res, T3, W, N) =					\
++    INSN##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			V);						\
++  vst1##Q##_##T4##W(VECT_VAR(result, T3, W, N),				\
++		    VECT_VAR(vector_res, T3, W, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHLU_N2(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQSHLU_N(Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHLU_N1(INSN, Q, T1, T2, T3, T4, W, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Fill input vector with negative values, to check saturation on
++     limits.  */
++  VDUP(vector, , int, s, 8, 8, -1);
++  VDUP(vector, , int, s, 16, 4, -2);
++  VDUP(vector, , int, s, 32, 2, -3);
++  VDUP(vector, , int, s, 64, 1, -4);
++  VDUP(vector, q, int, s, 8, 16, -1);
++  VDUP(vector, q, int, s, 16, 8, -2);
++  VDUP(vector, q, int, s, 32, 4, -3);
++  VDUP(vector, q, int, s, 64, 2, -4);
++
++  /* Choose shift amount arbitrarily.  */
++#define CMT " (negative input)"
++  TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_neg, CMT);
++
++  
++  /* Fill input vector with max value, to check saturation on
++     limits.  */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFULL);
++
++  /* shift by 1.  */
++#undef CMT
++#define CMT " (shift by 1)"
++  TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 1, expected_cumulative_sat_sh1, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 1, expected_cumulative_sat_sh1, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh1, CMT);
++
++  /* shift by 2 to force saturation.  */
++#undef CMT
++#define CMT " (shift by 2)"
++  TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 2, expected_cumulative_sat_sh2, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 2, expected_cumulative_sat_sh2, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh2, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh2, CMT);
++
++  
++  /* Fill input vector with positive values, to check normal case.  */
++  VDUP(vector, , int, s, 8, 8, 1);
++  VDUP(vector, , int, s, 16, 4, 2);
++  VDUP(vector, , int, s, 32, 2, 3);
++  VDUP(vector, , int, s, 64, 1, 4);
++  VDUP(vector, q, int, s, 8, 16, 5);
++  VDUP(vector, q, int, s, 16, 8, 6);
++  VDUP(vector, q, int, s, 32, 4, 7);
++  VDUP(vector, q, int, s, 64, 2, 8);
++
++  /* Arbitrary shift amount.  */
++#undef CMT
++#define CMT ""
++  TEST_VQSHLU_N(, int, s, uint, u, 8, 8, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 16, 4, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 32, 2, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(, int, s, uint, u, 64, 1, 4, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 8, 16, 5, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 16, 8, 6, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 32, 4, 7, expected_cumulative_sat, CMT);
++  TEST_VQSHLU_N(q, int, s, uint, u, 64, 2, 8, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vqshlu_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_n.c
+@@ -0,0 +1,177 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,uint,64,2) = 1;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
++				       0xfa, 0xfa, 0xfb, 0xfb };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff8, 0xfff9, 0xfff9 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++					0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++/* Expected values of cumulative_saturation flag with max input value
++   shifted by 3.  */
++int VECT_VAR(expected_cumulative_sat_max_sh3,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh3,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh3,int,64,2) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh3,uint,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh3,uint,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh3,uint,64,2) = 1;
++
++/* Expected results with max input value shifted by 3.  */
++VECT_VAR_DECL(expected_max_sh3,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++					       0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_sh3,int,16,4) [] = { 0x7fff, 0x7fff, 0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_sh3,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_sh3,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_sh3,uint,16,4) [] = { 0xffff, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_sh3,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++/* Expected values of cumulative_saturation flag with max input value
++   shifted by type size.  */
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,int,64,2) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,uint,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,uint,32,4) = 0;
++int VECT_VAR(expected_cumulative_sat_max_shmax,uint,64,2) = 0;
++
++/* Expected results with max input value shifted by type size.  */
++VECT_VAR_DECL(expected_max_shmax,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
++						 0x7f, 0x7f, 0x7f, 0x7f };
++VECT_VAR_DECL(expected_max_shmax,int,16,4) [] = { 0x7fff, 0x7fff,
++						  0x7fff, 0x7fff };
++VECT_VAR_DECL(expected_max_shmax,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
++VECT_VAR_DECL(expected_max_shmax,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_shmax,uint,16,4) [] = { 0xffff, 0xffff,
++						   0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_shmax,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++
++#define INSN vqshrn_n
++#define TEST_MSG "VQSHRN_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: y=vqshrn_n(x,v), then store the result.  */
++#define TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, T1, W2, N));		\
++  VECT_VAR(vector_res, T1, W2, N) =					\
++    INSN##_##T2##W(VECT_VAR(vector, T1, W, N),				\
++		   V);							\
++  vst1_##T2##W2(VECT_VAR(result, T1, W2, N),				\
++		VECT_VAR(vector_res, T1, W2, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHRN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQSHRN_N(T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHRN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++  DECL_VARIABLE(vector, uint, 16, 8);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, uint, 64, 2);
++
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++  VLOAD(vector, buffer, q, int, s, 64, 2);
++  VLOAD(vector, buffer, q, uint, u, 16, 8);
++  VLOAD(vector, buffer, q, uint, u, 32, 4);
++  VLOAD(vector, buffer, q, uint, u, 64, 2);
++
++  /* Choose shift amount arbitrarily.  */
++#define CMT ""
++  TEST_VQSHRN_N(int, s, 16, 8, 8, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHRN_N(int, s, 32, 16, 4, 1, expected_cumulative_sat, CMT);
++  TEST_VQSHRN_N(int, s, 64, 32, 2, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHRN_N(uint, u, 16, 8, 8, 2, expected_cumulative_sat, CMT);
++  TEST_VQSHRN_N(uint, u, 32, 16, 4, 3, expected_cumulative_sat, CMT);
++  TEST_VQSHRN_N(uint, u, 64, 32, 2, 3, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++
++
++  /* Use max possible value as input.  */
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++#undef CMT
++#define CMT " (check saturation: shift by 3)"
++  TEST_VQSHRN_N(int, s, 16, 8, 8, 3, expected_cumulative_sat_max_sh3, CMT);
++  TEST_VQSHRN_N(int, s, 32, 16, 4, 3, expected_cumulative_sat_max_sh3, CMT);
++  TEST_VQSHRN_N(int, s, 64, 32, 2, 3, expected_cumulative_sat_max_sh3, CMT);
++  TEST_VQSHRN_N(uint, u, 16, 8, 8, 3, expected_cumulative_sat_max_sh3, CMT);
++  TEST_VQSHRN_N(uint, u, 32, 16, 4, 3, expected_cumulative_sat_max_sh3, CMT);
++  TEST_VQSHRN_N(uint, u, 64, 32, 2, 3, expected_cumulative_sat_max_sh3, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh3, CMT);
++
++
++#undef CMT
++#define CMT " (check saturation: shift by max)"
++  TEST_VQSHRN_N(int, s, 16, 8, 8, 8, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQSHRN_N(int, s, 32, 16, 4, 16, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQSHRN_N(int, s, 64, 32, 2, 32, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQSHRN_N(uint, u, 16, 8, 8, 8, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQSHRN_N(uint, u, 32, 16, 4, 16, expected_cumulative_sat_max_shmax, CMT);
++  TEST_VQSHRN_N(uint, u, 64, 32, 2, 32, expected_cumulative_sat_max_shmax, CMT);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shmax, CMT);
++}
++
++int main (void)
++{
++  exec_vqshrn_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_n.c
+@@ -0,0 +1,133 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected values of cumulative_saturation flag with negative input.  */
++int VECT_VAR(expected_cumulative_sat_neg,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_neg,int,64,2) = 1;
++
++/* Expected results with negative input.  */
++VECT_VAR_DECL(expected_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_neg,uint,32,2) [] = { 0x0, 0x0 };
++
++/* Expected values of cumulative_saturation flag with max input value
++   shifted by 1.  */
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,16,8) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat_max_sh1,int,64,2) = 1;
++
++/* Expected results with max input value shifted by 1.  */
++VECT_VAR_DECL(expected_max_sh1,uint,8,8) [] = { 0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_max_sh1,uint,16,4) [] = { 0xffff, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_max_sh1,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_max_sh1,uint,64,1) [] = { 0x3333333333333333 };
++
++/* Expected values of cumulative_saturation flag.  */
++int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
++int VECT_VAR(expected_cumulative_sat,int,32,4) = 1;
++int VECT_VAR(expected_cumulative_sat,int,64,2) = 0;
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x48, 0x48, 0x48, 0x48,
++					0x48, 0x48, 0x48, 0x48 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xdeadbe, 0xdeadbe };
++
++
++#define INSN vqshrun_n
++#define TEST_MSG "VQSHRUN_N"
++
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN)
++{
++  /* Basic test: y=vqshrun_n(x,v), then store the result.  */
++#define TEST_VQSHRUN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  Set_Neon_Cumulative_Sat(0, VECT_VAR(vector_res, uint, W2, N));	\
++  VECT_VAR(vector_res, uint, W2, N) =					\
++    INSN##_##T2##W(VECT_VAR(vector, T1, W, N),				\
++		   V);							\
++  vst1_u##W2(VECT_VAR(result, uint, W2, N),				\
++	     VECT_VAR(vector_res, uint, W2, N));			\
++  CHECK_CUMULATIVE_SAT(TEST_MSG, T1, W, N, EXPECTED_CUMULATIVE_SAT, CMT)
++
++  /* Two auxliary macros are necessary to expand INSN */
++#define TEST_VQSHRUN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHRUN_N2(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++#define TEST_VQSHRUN_N(T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT) \
++  TEST_VQSHRUN_N1(INSN, T1, T2, W, W2, N, V, EXPECTED_CUMULATIVE_SAT, CMT)
++
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  /* Fill input vector with negative values, to check saturation on
++     limits.  */
++  VDUP(vector, q, int, s, 16, 8, -2);
++  VDUP(vector, q, int, s, 32, 4, -3);
++  VDUP(vector, q, int, s, 64, 2, -4);
++
++  /* Choose shift amount arbitrarily.  */
++#define CMT " (negative input)"
++  TEST_VQSHRUN_N(int, s, 16, 8, 8, 3, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHRUN_N(int, s, 32, 16, 4, 4, expected_cumulative_sat_neg, CMT);
++  TEST_VQSHRUN_N(int, s, 64, 32, 2, 2, expected_cumulative_sat_neg, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_neg, CMT);
++
++  
++  /* Fill input vector with max value, to check saturation on
++     limits.  */
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++
++#undef CMT
++#define CMT " (check cumulative saturation)"
++  TEST_VQSHRUN_N(int, s, 16, 8, 8, 1, expected_cumulative_sat_max_sh1, CMT);
++  TEST_VQSHRUN_N(int, s, 32, 16, 4, 1, expected_cumulative_sat_max_sh1, CMT);
++  TEST_VQSHRUN_N(int, s, 64, 32, 2, 1, expected_cumulative_sat_max_sh1, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh1, CMT);
++
++  
++  /* Fill input vector with positive values, to check normal case.  */
++  VDUP(vector, q, int, s, 16, 8, 0x1234);
++  VDUP(vector, q, int, s, 32, 4, 0x87654321);
++  VDUP(vector, q, int, s, 64, 2, 0xDEADBEEF);
++
++#undef CMT
++#define CMT ""
++  TEST_VQSHRUN_N(int, s, 16, 8, 8, 6, expected_cumulative_sat, CMT);
++  TEST_VQSHRUN_N(int, s, 32, 16, 4, 7, expected_cumulative_sat, CMT);
++  TEST_VQSHRUN_N(int, s, 64, 32, 2, 8, expected_cumulative_sat, CMT);
++
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vqshrun_n ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqsub.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqsub.c
+@@ -25,10 +25,6 @@ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff8a, 0xff8b,
+ 					 0xff8c, 0xff8d };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffff79, 0xffffff7a };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffff68 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xdf, 0xe0, 0xe1, 0xe2,
+ 					0xe3, 0xe4, 0xe5, 0xe6,
+ 					0xe7, 0xe8, 0xe9, 0xea,
+@@ -49,14 +45,6 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffff79, 0xffffff7a,
+ 					 0xffffff7b, 0xffffff7c };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffff68,
+ 					 0xffffffffffffff69 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected values of cumulative saturation flag.  */
+ int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpe.c
+@@ -0,0 +1,154 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++#include <math.h>
++
++/* Expected results with positive input.  */
++VECT_VAR_DECL(expected_positive,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected_positive,uint,32,4) [] = { 0xbf000000, 0xbf000000,
++						  0xbf000000, 0xbf000000 };
++VECT_VAR_DECL(expected_positive,hfloat,32,2) [] = { 0x3f068000, 0x3f068000 };
++VECT_VAR_DECL(expected_positive,hfloat,32,4) [] = { 0x3c030000, 0x3c030000,
++						    0x3c030000, 0x3c030000 };
++
++/* Expected results with negative input.  */
++VECT_VAR_DECL(expected_negative,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_negative,uint,32,4) [] = { 0xee800000, 0xee800000,
++						  0xee800000, 0xee800000 };
++VECT_VAR_DECL(expected_negative,hfloat,32,2) [] = { 0xbdcc8000, 0xbdcc8000 };
++VECT_VAR_DECL(expected_negative,hfloat,32,4) [] = { 0xbc030000, 0xbc030000,
++						    0xbc030000, 0xbc030000 };
++
++/* Expected results with FP special values (NaN, infinity).  */
++VECT_VAR_DECL(expected_fp1,hfloat,32,2) [] = { 0x7fc00000, 0x7fc00000 };
++VECT_VAR_DECL(expected_fp1,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results with FP special values (zero, large value).  */
++VECT_VAR_DECL(expected_fp2,hfloat,32,2) [] = { 0x7f800000, 0x7f800000 };
++VECT_VAR_DECL(expected_fp2,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results with FP special values (-0, -infinity).  */
++VECT_VAR_DECL(expected_fp3,hfloat,32,2) [] = { 0xff800000, 0xff800000 };
++VECT_VAR_DECL(expected_fp3,hfloat,32,4) [] = { 0x80000000, 0x80000000,
++					       0x80000000, 0x80000000 };
++
++/* Expected results with FP special large negative value.  */
++VECT_VAR_DECL(expected_fp4,hfloat,32,2) [] = { 0x80000000, 0x80000000 };
++
++#define TEST_MSG "VRECPE/VRECPEQ"
++void exec_vrecpe(void)
++{
++  int i;
++
++  /* Basic test: y=vrecpe(x), then store the result.  */
++#define TEST_VRECPE(Q, T1, T2, W, N)			\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vrecpe##Q##_##T2##W(VECT_VAR(vector, T1, W, N));	\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),		\
++		    VECT_VAR(vector_res, T1, W, N))
++
++  /* No need for 64 bits variants.  */
++  DECL_VARIABLE(vector, uint, 32, 2);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, float, 32, 2);
++  DECL_VARIABLE(vector, float, 32, 4);
++
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 32, 4);
++  DECL_VARIABLE(vector_res, float, 32, 2);
++  DECL_VARIABLE(vector_res, float, 32, 4);
++
++  clean_results ();
++
++  /* Choose init value arbitrarily, positive.  */
++  VDUP(vector, , uint, u, 32, 2, 0x12345678);
++  VDUP(vector, , float, f, 32, 2, 1.9f);
++  VDUP(vector, q, uint, u, 32, 4, 0xABCDEF10);
++  VDUP(vector, q, float, f, 32, 4, 125.0f);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, uint, u, 32, 2);
++  TEST_VRECPE(, float, f, 32, 2);
++  TEST_VRECPE(q, uint, u, 32, 4);
++  TEST_VRECPE(q, float, f, 32, 4);
++
++#define CMT " (positive input)"
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_positive, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_positive, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_positive, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_positive, CMT);
++
++  /* Choose init value arbitrarily,negative.  */
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , float, f, 32, 2, -10.0f);
++  VDUP(vector, q, uint, u, 32, 4, 0x89081234);
++  VDUP(vector, q, float, f, 32, 4, -125.0f);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, uint, u, 32, 2);
++  TEST_VRECPE(, float, f, 32, 2);
++  TEST_VRECPE(q, uint, u, 32, 4);
++  TEST_VRECPE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " (negative input)"
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_negative, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_negative, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_negative, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_negative, CMT);
++
++  /* Test FP variants with special input values (NaN, infinity).  */
++  VDUP(vector, , float, f, 32, 2, NAN);
++  VDUP(vector, q, float, f, 32, 4, HUGE_VALF);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, float, f, 32, 2);
++  TEST_VRECPE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (NaN, infinity)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp1, CMT);
++
++  /* Test FP variants with special input values (zero, large value).  */
++  VDUP(vector, , float, f, 32, 2, 0.0f);
++  VDUP(vector, q, float, f, 32, 4, 8.97229e37f /*9.0e37f*/);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, float, f, 32, 2);
++  TEST_VRECPE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (zero, large value)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp2, CMT);
++
++  /* Test FP variants with special input values (-0, -infinity).  */
++  VDUP(vector, , float, f, 32, 2, -0.0f);
++  VDUP(vector, q, float, f, 32, 4, -HUGE_VALF);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, float, f, 32, 2);
++  TEST_VRECPE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (-0, -infinity)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp3, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp3, CMT);
++
++  /* Test FP variants with special input values (large negative value).  */
++  VDUP(vector, , float, f, 32, 2, -9.0e37f);
++
++  /* Apply the operator.  */
++  TEST_VRECPE(, float, f, 32, 2);
++
++#undef CMT
++#define CMT " FP special (large negative value)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp4, CMT);
++}
++
++int main (void)
++{
++  exec_vrecpe ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecps.c
+@@ -0,0 +1,117 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++#include <math.h>
++
++/* Expected results with positive input.  */
++VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc2e19eb7, 0xc2e19eb7 };
++VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1db851f, 0xc1db851f,
++					   0xc1db851f, 0xc1db851f };
++
++/* Expected results with FP special values (NaN).  */
++VECT_VAR_DECL(expected_fp1,hfloat,32,2) [] = { 0x7fc00000, 0x7fc00000 };
++VECT_VAR_DECL(expected_fp1,hfloat,32,4) [] = { 0x7fc00000, 0x7fc00000,
++					       0x7fc00000, 0x7fc00000 };
++
++/* Expected results with FP special values (infinity, 0) and normal
++   values.  */
++VECT_VAR_DECL(expected_fp2,hfloat,32,2) [] = { 0xff800000, 0xff800000 };
++VECT_VAR_DECL(expected_fp2,hfloat,32,4) [] = { 0x40000000, 0x40000000,
++					       0x40000000, 0x40000000 };
++
++/* Expected results with FP special values (infinity, 0).  */
++VECT_VAR_DECL(expected_fp3,hfloat,32,2) [] = { 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_fp3,hfloat,32,4) [] = { 0x40000000, 0x40000000,
++					       0x40000000, 0x40000000 };
++
++#define TEST_MSG "VRECPS/VRECPSQ"
++void exec_vrecps(void)
++{
++  int i;
++
++  /* Basic test: y=vrecps(x), then store the result.  */
++#define TEST_VRECPS(Q, T1, T2, W, N)			\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vrecps##Q##_##T2##W(VECT_VAR(vector, T1, W, N),	\
++			VECT_VAR(vector2, T1, W, N));	\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),		\
++		    VECT_VAR(vector_res, T1, W, N))
++
++  /* No need for integer variants.  */
++  DECL_VARIABLE(vector, float, 32, 2);
++  DECL_VARIABLE(vector, float, 32, 4);
++
++  DECL_VARIABLE(vector2, float, 32, 2);
++  DECL_VARIABLE(vector2, float, 32, 4);
++
++  DECL_VARIABLE(vector_res, float, 32, 2);
++  DECL_VARIABLE(vector_res, float, 32, 4);
++
++  clean_results ();
++
++  /* Choose init value arbitrarily.  */
++  VDUP(vector, , float, f, 32, 2, 12.9f);
++  VDUP(vector, q, float, f, 32, 4, 9.2f);
++
++  VDUP(vector2, , float, f, 32, 2, 8.9f);
++  VDUP(vector2, q, float, f, 32, 4, 3.2f);
++
++  /* Apply the operator.  */
++  TEST_VRECPS(, float, f, 32, 2);
++  TEST_VRECPS(q, float, f, 32, 4);
++
++#define CMT " (positive input)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, CMT);
++
++
++  /* Test FP variants with special input values (NaN).  */
++  VDUP(vector, , float, f, 32, 2, NAN);
++  VDUP(vector2, q, float, f, 32, 4, NAN);
++
++  /* Apply the operator.  */
++  TEST_VRECPS(, float, f, 32, 2);
++  TEST_VRECPS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (NaN)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp1, CMT);
++
++
++  /* Test FP variants with special input values (infinity, 0).  */
++  VDUP(vector, , float, f, 32, 2, HUGE_VALF);
++  VDUP(vector, q, float, f, 32, 4, 0.0f);
++  VDUP(vector2, q, float, f, 32, 4, 3.2f); /* Restore a normal value.  */
++
++  /* Apply the operator.  */
++  TEST_VRECPS(, float, f, 32, 2);
++  TEST_VRECPS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (infinity, 0) and normal value"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp2, CMT);
++
++
++  /* Test FP variants with only special input values (infinity, 0).  */
++  VDUP(vector, , float, f, 32, 2, HUGE_VALF);
++  VDUP(vector, q, float, f, 32, 4, 0.0f);
++  VDUP(vector2, , float, f, 32, 2, 0.0f);
++  VDUP(vector2, q, float, f, 32, 4, HUGE_VALF);
++
++  /* Apply the operator */
++  TEST_VRECPS(, float, f, 32, 2);
++  TEST_VRECPS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (infinity, 0)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp3, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp3, CMT);
++}
++
++int main (void)
++{
++  exec_vrecps ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c
+@@ -0,0 +1,741 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results for vreinterpret_s8_xx.  */
++VECT_VAR_DECL(expected_s8_1,int,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					    0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_s8_2,int,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					    0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_s8_3,int,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_s8_4,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					    0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_s8_5,int,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					    0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_s8_6,int,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					    0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_s8_7,int,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					    0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_s8_8,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					    0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_s8_9,int,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					    0xf2, 0xff, 0xf3, 0xff };
++
++/* Expected results for vreinterpret_s16_xx.  */
++VECT_VAR_DECL(expected_s16_1,int,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_s16_2,int,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_s16_3,int,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_s16_4,int,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_s16_5,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_s16_6,int,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_s16_7,int,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_s16_8,int,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_s16_9,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++
++/* Expected results for vreinterpret_s32_xx.  */
++VECT_VAR_DECL(expected_s32_1,int,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_s32_2,int,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_s32_3,int,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_s32_4,int,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_s32_5,int,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_s32_6,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_s32_7,int,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_s32_8,int,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_s32_9,int,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++
++/* Expected results for vreinterpret_s64_xx.  */
++VECT_VAR_DECL(expected_s64_1,int,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_s64_2,int,64,1) [] = { 0xfff3fff2fff1fff0 };
++VECT_VAR_DECL(expected_s64_3,int,64,1) [] = { 0xfffffff1fffffff0 };
++VECT_VAR_DECL(expected_s64_4,int,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_s64_5,int,64,1) [] = { 0xfff3fff2fff1fff0 };
++VECT_VAR_DECL(expected_s64_6,int,64,1) [] = { 0xfffffff1fffffff0 };
++VECT_VAR_DECL(expected_s64_7,int,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected_s64_8,int,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_s64_9,int,64,1) [] = { 0xfff3fff2fff1fff0 };
++
++/* Expected results for vreinterpret_u8_xx.  */
++VECT_VAR_DECL(expected_u8_1,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					     0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_u8_2,uint,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_u8_3,uint,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_u8_4,uint,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_u8_5,uint,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_u8_6,uint,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_u8_7,uint,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_u8_8,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					     0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_u8_9,uint,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++
++/* Expected results for vreinterpret_u16_xx.  */
++VECT_VAR_DECL(expected_u16_1,uint,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_u16_2,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_u16_3,uint,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_u16_4,uint,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_u16_5,uint,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_u16_6,uint,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_u16_7,uint,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_u16_8,uint,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_u16_9,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++
++/* Expected results for vreinterpret_u32_xx.  */
++VECT_VAR_DECL(expected_u32_1,uint,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_u32_2,uint,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_u32_3,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_u32_4,uint,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_u32_5,uint,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_u32_6,uint,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_u32_7,uint,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_u32_8,uint,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_u32_9,uint,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++
++/* Expected results for vreinterpret_u64_xx.  */
++VECT_VAR_DECL(expected_u64_1,uint,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_u64_2,uint,64,1) [] = { 0xfff3fff2fff1fff0 };
++VECT_VAR_DECL(expected_u64_3,uint,64,1) [] = { 0xfffffff1fffffff0 };
++VECT_VAR_DECL(expected_u64_4,uint,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected_u64_5,uint,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_u64_6,uint,64,1) [] = { 0xfff3fff2fff1fff0 };
++VECT_VAR_DECL(expected_u64_7,uint,64,1) [] = { 0xfffffff1fffffff0 };
++VECT_VAR_DECL(expected_u64_8,uint,64,1) [] = { 0xf7f6f5f4f3f2f1f0 };
++VECT_VAR_DECL(expected_u64_9,uint,64,1) [] = { 0xfff3fff2fff1fff0 };
++
++/* Expected results for vreinterpret_p8_xx.  */
++VECT_VAR_DECL(expected_p8_1,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					     0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_p8_2,poly,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_p8_3,poly,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_p8_4,poly,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_p8_5,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					     0xf4, 0xf5, 0xf6, 0xf7 };
++VECT_VAR_DECL(expected_p8_6,poly,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++VECT_VAR_DECL(expected_p8_7,poly,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xf1, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_p8_8,poly,8,8) [] = { 0xf0, 0xff, 0xff, 0xff,
++					     0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_p8_9,poly,8,8) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					     0xf2, 0xff, 0xf3, 0xff };
++
++/* Expected results for vreinterpret_p16_xx.  */
++VECT_VAR_DECL(expected_p16_1,poly,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_p16_2,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_p16_3,poly,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_p16_4,poly,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_p16_5,poly,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++VECT_VAR_DECL(expected_p16_6,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_p16_7,poly,16,4) [] = { 0xfff0, 0xffff, 0xfff1, 0xffff };
++VECT_VAR_DECL(expected_p16_8,poly,16,4) [] = { 0xfff0, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_p16_9,poly,16,4) [] = { 0xf1f0, 0xf3f2, 0xf5f4, 0xf7f6 };
++
++/* Expected results for vreinterpretq_s8_xx.  */
++VECT_VAR_DECL(expected_q_s8_1,int,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					       0xf2, 0xff, 0xf3, 0xff,
++					       0xf4, 0xff, 0xf5, 0xff,
++					       0xf6, 0xff, 0xf7, 0xff };
++VECT_VAR_DECL(expected_q_s8_2,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++					       0xf1, 0xff, 0xff, 0xff,
++					       0xf2, 0xff, 0xff, 0xff,
++					       0xf3, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_s8_3,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++					       0xff, 0xff, 0xff, 0xff,
++					       0xf1, 0xff, 0xff, 0xff,
++					       0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_s8_4,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					       0xf4, 0xf5, 0xf6, 0xf7,
++					       0xf8, 0xf9, 0xfa, 0xfb,
++					       0xfc, 0xfd, 0xfe, 0xff };
++VECT_VAR_DECL(expected_q_s8_5,int,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					       0xf2, 0xff, 0xf3, 0xff,
++					       0xf4, 0xff, 0xf5, 0xff,
++					       0xf6, 0xff, 0xf7, 0xff };
++VECT_VAR_DECL(expected_q_s8_6,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++					       0xf1, 0xff, 0xff, 0xff,
++					       0xf2, 0xff, 0xff, 0xff,
++					       0xf3, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_s8_7,int,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++					       0xff, 0xff, 0xff, 0xff,
++					       0xf1, 0xff, 0xff, 0xff,
++					       0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_s8_8,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					       0xf4, 0xf5, 0xf6, 0xf7,
++					       0xf8, 0xf9, 0xfa, 0xfb,
++					       0xfc, 0xfd, 0xfe, 0xff };
++VECT_VAR_DECL(expected_q_s8_9,int,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++					       0xf2, 0xff, 0xf3, 0xff,
++					       0xf4, 0xff, 0xf5, 0xff,
++					       0xf6, 0xff, 0xf7, 0xff };
++
++/* Expected results for vreinterpretq_s16_xx.  */
++VECT_VAR_DECL(expected_q_s16_1,int,16,8) [] = { 0xf1f0, 0xf3f2,
++						0xf5f4, 0xf7f6,
++						0xf9f8, 0xfbfa,
++						0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_s16_2,int,16,8) [] = { 0xfff0, 0xffff,
++						0xfff1, 0xffff,
++						0xfff2, 0xffff,
++						0xfff3, 0xffff };
++VECT_VAR_DECL(expected_q_s16_3,int,16,8) [] = { 0xfff0, 0xffff,
++						0xffff, 0xffff,
++						0xfff1, 0xffff,
++						0xffff, 0xffff };
++VECT_VAR_DECL(expected_q_s16_4,int,16,8) [] = { 0xf1f0, 0xf3f2,
++						0xf5f4, 0xf7f6,
++						0xf9f8, 0xfbfa,
++						0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_s16_5,int,16,8) [] = { 0xfff0, 0xfff1,
++						0xfff2, 0xfff3,
++						0xfff4, 0xfff5,
++						0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_q_s16_6,int,16,8) [] = { 0xfff0, 0xffff,
++						0xfff1, 0xffff,
++						0xfff2, 0xffff,
++						0xfff3, 0xffff };
++VECT_VAR_DECL(expected_q_s16_7,int,16,8) [] = { 0xfff0, 0xffff,
++						0xffff, 0xffff,
++						0xfff1, 0xffff,
++						0xffff, 0xffff };
++VECT_VAR_DECL(expected_q_s16_8,int,16,8) [] = { 0xf1f0, 0xf3f2,
++						0xf5f4, 0xf7f6,
++						0xf9f8, 0xfbfa,
++						0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_s16_9,int,16,8) [] = { 0xfff0, 0xfff1,
++						0xfff2, 0xfff3,
++						0xfff4, 0xfff5,
++						0xfff6, 0xfff7 };
++
++/* Expected results for vreinterpretq_s32_xx.  */
++VECT_VAR_DECL(expected_q_s32_1,int,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_s32_2,int,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_s32_3,int,32,4) [] = { 0xfffffff0, 0xffffffff,
++						0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_s32_4,int,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_s32_5,int,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_s32_6,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
++						0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_q_s32_7,int,32,4) [] = { 0xfffffff0, 0xffffffff,
++						0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_s32_8,int,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_s32_9,int,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						0xfff5fff4, 0xfff7fff6 };
++
++/* Expected results for vreinterpretq_s64_xx.  */
++VECT_VAR_DECL(expected_q_s64_1,int,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_s64_2,int,64,2) [] = { 0xfff3fff2fff1fff0,
++						0xfff7fff6fff5fff4 };
++VECT_VAR_DECL(expected_q_s64_3,int,64,2) [] = { 0xfffffff1fffffff0,
++						0xfffffff3fffffff2 };
++VECT_VAR_DECL(expected_q_s64_4,int,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_s64_5,int,64,2) [] = { 0xfff3fff2fff1fff0,
++						0xfff7fff6fff5fff4 };
++VECT_VAR_DECL(expected_q_s64_6,int,64,2) [] = { 0xfffffff1fffffff0,
++						0xfffffff3fffffff2 };
++VECT_VAR_DECL(expected_q_s64_7,int,64,2) [] = { 0xfffffffffffffff0,
++						0xfffffffffffffff1 };
++VECT_VAR_DECL(expected_q_s64_8,int,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_s64_9,int,64,2) [] = { 0xfff3fff2fff1fff0,
++						0xfff7fff6fff5fff4 };
++
++/* Expected results for vreinterpretq_u8_xx.  */
++VECT_VAR_DECL(expected_q_u8_1,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++						0xf4, 0xf5, 0xf6, 0xf7,
++						0xf8, 0xf9, 0xfa, 0xfb,
++						0xfc, 0xfd, 0xfe, 0xff };
++VECT_VAR_DECL(expected_q_u8_2,uint,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++						0xf2, 0xff, 0xf3, 0xff,
++						0xf4, 0xff, 0xf5, 0xff,
++						0xf6, 0xff, 0xf7, 0xff };
++VECT_VAR_DECL(expected_q_u8_3,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++						0xf1, 0xff, 0xff, 0xff,
++						0xf2, 0xff, 0xff, 0xff,
++						0xf3, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_u8_4,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff,
++						0xf1, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_u8_5,uint,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++						0xf2, 0xff, 0xf3, 0xff,
++						0xf4, 0xff, 0xf5, 0xff,
++						0xf6, 0xff, 0xf7, 0xff };
++VECT_VAR_DECL(expected_q_u8_6,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++						0xf1, 0xff, 0xff, 0xff,
++						0xf2, 0xff, 0xff, 0xff,
++						0xf3, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_u8_7,uint,8,16) [] = { 0xf0, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff,
++						0xf1, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_q_u8_8,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++						0xf4, 0xf5, 0xf6, 0xf7,
++						0xf8, 0xf9, 0xfa, 0xfb,
++						0xfc, 0xfd, 0xfe, 0xff };
++VECT_VAR_DECL(expected_q_u8_9,uint,8,16) [] = { 0xf0, 0xff, 0xf1, 0xff,
++						0xf2, 0xff, 0xf3, 0xff,
++						0xf4, 0xff, 0xf5, 0xff,
++						0xf6, 0xff, 0xf7, 0xff };
++
++/* Expected results for vreinterpretq_u16_xx.  */
++VECT_VAR_DECL(expected_q_u16_1,uint,16,8) [] = { 0xf1f0, 0xf3f2,
++						 0xf5f4, 0xf7f6,
++						 0xf9f8, 0xfbfa,
++						 0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_u16_2,uint,16,8) [] = { 0xfff0, 0xfff1,
++						 0xfff2, 0xfff3,
++						 0xfff4, 0xfff5,
++						 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected_q_u16_3,uint,16,8) [] = { 0xfff0, 0xffff,
++						 0xfff1, 0xffff,
++						 0xfff2, 0xffff,
++						 0xfff3, 0xffff };
++VECT_VAR_DECL(expected_q_u16_4,uint,16,8) [] = { 0xfff0, 0xffff,
++						 0xffff, 0xffff,
++						 0xfff1, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_q_u16_5,uint,16,8) [] = { 0xf1f0, 0xf3f2,
++						 0xf5f4, 0xf7f6,
++						 0xf9f8, 0xfbfa,
++						 0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_u16_6,uint,16,8) [] = { 0xfff0, 0xffff,
++						 0xfff1, 0xffff,
++						 0xfff2, 0xffff,
++						 0xfff3, 0xffff };
++VECT_VAR_DECL(expected_q_u16_7,uint,16,8) [] = { 0xfff0, 0xffff,
++						 0xffff, 0xffff,
++						 0xfff1, 0xffff,
++						 0xffff, 0xffff };
++VECT_VAR_DECL(expected_q_u16_8,uint,16,8) [] = { 0xf1f0, 0xf3f2,
++						 0xf5f4, 0xf7f6,
++						 0xf9f8, 0xfbfa,
++						 0xfdfc, 0xfffe };
++VECT_VAR_DECL(expected_q_u16_9,uint,16,8) [] = { 0xfff0, 0xfff1,
++						 0xfff2, 0xfff3,
++						 0xfff4, 0xfff5,
++						 0xfff6, 0xfff7 };
++
++/* Expected results for vreinterpretq_u32_xx.  */
++VECT_VAR_DECL(expected_q_u32_1,uint,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						 0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_u32_2,uint,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						 0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_u32_3,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
++						 0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_q_u32_4,uint,32,4) [] = { 0xfffffff0, 0xffffffff,
++						 0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_u32_5,uint,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						 0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_u32_6,uint,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						 0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_u32_7,uint,32,4) [] = { 0xfffffff0, 0xffffffff,
++						 0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_u32_8,uint,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						 0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_u32_9,uint,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						 0xfff5fff4, 0xfff7fff6 };
++
++/* Expected results for vreinterpretq_u64_xx.  */
++VECT_VAR_DECL(expected_q_u64_1,uint,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_u64_2,uint,64,2) [] = { 0xfff3fff2fff1fff0,
++						0xfff7fff6fff5fff4 };
++VECT_VAR_DECL(expected_q_u64_3,uint,64,2) [] = { 0xfffffff1fffffff0,
++						0xfffffff3fffffff2 };
++VECT_VAR_DECL(expected_q_u64_4,uint,64,2) [] = { 0xfffffffffffffff0,
++						0xfffffffffffffff1 };
++VECT_VAR_DECL(expected_q_u64_5,uint,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_u64_6,uint,64,2) [] = { 0xfff3fff2fff1fff0,
++						0xfff7fff6fff5fff4 };
++VECT_VAR_DECL(expected_q_u64_7,uint,64,2) [] = { 0xfffffff1fffffff0,
++						0xfffffff3fffffff2 };
++VECT_VAR_DECL(expected_q_u64_8,uint,64,2) [] = { 0xf7f6f5f4f3f2f1f0,
++						0xfffefdfcfbfaf9f8 };
++VECT_VAR_DECL(expected_q_u64_9,uint,64,2) [] = { 0xfff3fff2fff1fff0,
++						 0xfff7fff6fff5fff4 };
++
++/* Expected results for vreinterpret_f32_xx.  */
++VECT_VAR_DECL(expected_f32_1,hfloat,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_f32_2,hfloat,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_f32_3,hfloat,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_f32_4,hfloat,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_f32_5,hfloat,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_f32_6,hfloat,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++VECT_VAR_DECL(expected_f32_7,hfloat,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_f32_8,hfloat,32,2) [] = { 0xfffffff0, 0xffffffff };
++VECT_VAR_DECL(expected_f32_9,hfloat,32,2) [] = { 0xf3f2f1f0, 0xf7f6f5f4 };
++VECT_VAR_DECL(expected_f32_10,hfloat,32,2) [] = { 0xfff1fff0, 0xfff3fff2 };
++
++/* Expected results for vreinterpretq_f32_xx.  */
++VECT_VAR_DECL(expected_q_f32_1,hfloat,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						   0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_f32_2,hfloat,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						   0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_f32_3,hfloat,32,4) [] = { 0xfffffff0, 0xfffffff1,
++						   0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_q_f32_4,hfloat,32,4) [] = { 0xfffffff0, 0xffffffff,
++						   0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_f32_5,hfloat,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						   0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_f32_6,hfloat,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						   0xfff5fff4, 0xfff7fff6 };
++VECT_VAR_DECL(expected_q_f32_7,hfloat,32,4) [] = { 0xfffffff0, 0xfffffff1,
++						   0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_q_f32_8,hfloat,32,4) [] = { 0xfffffff0, 0xffffffff,
++						   0xfffffff1, 0xffffffff };
++VECT_VAR_DECL(expected_q_f32_9,hfloat,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
++						   0xfbfaf9f8, 0xfffefdfc };
++VECT_VAR_DECL(expected_q_f32_10,hfloat,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
++						    0xfff5fff4, 0xfff7fff6 };
++
++/* Expected results for vreinterpretq_xx_f32.  */
++VECT_VAR_DECL(expected_xx_f32_1,int,8,8) [] = { 0x0, 0x0, 0x80, 0xc1,
++						0x0, 0x0, 0x70, 0xc1 };
++VECT_VAR_DECL(expected_xx_f32_2,int,16,4) [] = { 0x0, 0xc180, 0x0, 0xc170 };
++VECT_VAR_DECL(expected_xx_f32_3,int,32,2) [] = { 0xc1800000, 0xc1700000 };
++VECT_VAR_DECL(expected_xx_f32_4,int,64,1) [] = { 0xc1700000c1800000 };
++VECT_VAR_DECL(expected_xx_f32_5,uint,8,8) [] = { 0x0, 0x0, 0x80, 0xc1,
++						 0x0, 0x0, 0x70, 0xc1 };
++VECT_VAR_DECL(expected_xx_f32_6,uint,16,4) [] = { 0x0, 0xc180, 0x0, 0xc170 };
++VECT_VAR_DECL(expected_xx_f32_7,uint,32,2) [] = { 0xc1800000, 0xc1700000 };
++VECT_VAR_DECL(expected_xx_f32_8,uint,64,1) [] = { 0xc1700000c1800000 };
++VECT_VAR_DECL(expected_xx_f32_9,poly,8,8) [] = { 0x0, 0x0, 0x80, 0xc1,
++						 0x0, 0x0, 0x70, 0xc1 };
++VECT_VAR_DECL(expected_xx_f32_10,poly,16,4) [] = { 0x0, 0xc180, 0x0, 0xc170 };
++
++/* Expected results for vreinterpretq_xx_f32.  */
++VECT_VAR_DECL(expected_q_xx_f32_1,int,8,16) [] = { 0x0, 0x0, 0x80, 0xc1,
++						   0x0, 0x0, 0x70, 0xc1,
++						   0x0, 0x0, 0x60, 0xc1,
++						   0x0, 0x0, 0x50, 0xc1 };
++VECT_VAR_DECL(expected_q_xx_f32_2,int,16,8) [] = { 0x0, 0xc180, 0x0, 0xc170,
++						   0x0, 0xc160, 0x0, 0xc150 };
++VECT_VAR_DECL(expected_q_xx_f32_3,int,32,4) [] = { 0xc1800000, 0xc1700000,
++						   0xc1600000, 0xc1500000 };
++VECT_VAR_DECL(expected_q_xx_f32_4,int,64,2) [] = { 0xc1700000c1800000,
++						   0xc1500000c1600000 };
++VECT_VAR_DECL(expected_q_xx_f32_5,uint,8,16) [] = { 0x0, 0x0, 0x80, 0xc1,
++						    0x0, 0x0, 0x70, 0xc1,
++						    0x0, 0x0, 0x60, 0xc1,
++						    0x0, 0x0, 0x50, 0xc1 };
++VECT_VAR_DECL(expected_q_xx_f32_6,uint,16,8) [] = { 0x0, 0xc180, 0x0, 0xc170,
++						    0x0, 0xc160, 0x0, 0xc150 };
++VECT_VAR_DECL(expected_q_xx_f32_7,uint,32,4) [] = { 0xc1800000, 0xc1700000,
++						    0xc1600000, 0xc1500000 };
++VECT_VAR_DECL(expected_q_xx_f32_8,uint,64,2) [] = { 0xc1700000c1800000,
++						    0xc1500000c1600000 };
++VECT_VAR_DECL(expected_q_xx_f32_9,poly,8,16) [] = { 0x0, 0x0, 0x80, 0xc1,
++						    0x0, 0x0, 0x70, 0xc1,
++						    0x0, 0x0, 0x60, 0xc1,
++						    0x0, 0x0, 0x50, 0xc1 };
++VECT_VAR_DECL(expected_q_xx_f32_10,poly,16,8) [] = { 0x0, 0xc180, 0x0, 0xc170,
++						     0x0, 0xc160, 0x0, 0xc150 };
++
++#define TEST_MSG "VREINTERPRET/VREINTERPRETQ"
++
++void exec_vreinterpret (void)
++{
++  int i;
++
++  /* Basic test: y=vreinterpret(x), then store the result.  */
++#define TEST_VREINTERPRET(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED)	\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vector, TS1, WS, NS)); \
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
++
++#define TEST_VREINTERPRET_POLY(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vector, TS1, WS, NS)); \
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
++
++#define TEST_VREINTERPRET_FP(Q, T1, T2, W, N, TS1, TS2, WS, NS, EXPECTED) \
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vreinterpret##Q##_##T2##W##_##TS2##WS(VECT_VAR(vector, TS1, WS, NS)); \
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),				\
++		    VECT_VAR(vector_res, T1, W, N));			\
++  CHECK_FP(TEST_MSG, T1, W, N, PRIx##W, EXPECTED, "");
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++  VLOAD(vector, buffer, , float, f, 32, 2);
++  VLOAD(vector, buffer, q, float, f, 32, 4);
++
++  /* vreinterpret_s8_xx.  */
++  TEST_VREINTERPRET(, int, s, 8, 8, int, s, 16, 4, expected_s8_1);
++  TEST_VREINTERPRET(, int, s, 8, 8, int, s, 32, 2, expected_s8_2);
++  TEST_VREINTERPRET(, int, s, 8, 8, int, s, 64, 1, expected_s8_3);
++  TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 8, 8, expected_s8_4);
++  TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 16, 4, expected_s8_5);
++  TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 32, 2, expected_s8_6);
++  TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 64, 1, expected_s8_7);
++  TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 8, 8, expected_s8_8);
++  TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 16, 4, expected_s8_9);
++
++  /* vreinterpret_s16_xx.  */
++  TEST_VREINTERPRET(, int, s, 16, 4, int, s, 8, 8, expected_s16_1);
++  TEST_VREINTERPRET(, int, s, 16, 4, int, s, 32, 2, expected_s16_2);
++  TEST_VREINTERPRET(, int, s, 16, 4, int, s, 64, 1, expected_s16_3);
++  TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 8, 8, expected_s16_4);
++  TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 16, 4, expected_s16_5);
++  TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 32, 2, expected_s16_6);
++  TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 64, 1, expected_s16_7);
++  TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 8, 8, expected_s16_8);
++  TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 16, 4, expected_s16_9);
++
++  /* vreinterpret_s32_xx.  */
++  TEST_VREINTERPRET(, int, s, 32, 2, int, s, 8, 8, expected_s32_1);
++  TEST_VREINTERPRET(, int, s, 32, 2, int, s, 16, 4, expected_s32_2);
++  TEST_VREINTERPRET(, int, s, 32, 2, int, s, 64, 1, expected_s32_3);
++  TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 8, 8, expected_s32_4);
++  TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 16, 4, expected_s32_5);
++  TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 32, 2, expected_s32_6);
++  TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 64, 1, expected_s32_7);
++  TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 8, 8, expected_s32_8);
++  TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 16, 4, expected_s32_9);
++
++  /* vreinterpret_s64_xx.  */
++  TEST_VREINTERPRET(, int, s, 64, 1, int, s, 8, 8, expected_s64_1);
++  TEST_VREINTERPRET(, int, s, 64, 1, int, s, 16, 4, expected_s64_2);
++  TEST_VREINTERPRET(, int, s, 64, 1, int, s, 32, 2, expected_s64_3);
++  TEST_VREINTERPRET(, int, s, 64, 1, uint, u, 8, 8, expected_s64_4);
++  TEST_VREINTERPRET(, int, s, 64, 1, uint, u, 16, 4, expected_s64_5);
++  TEST_VREINTERPRET(, int, s, 64, 1, uint, u, 32, 2, expected_s64_6);
++  TEST_VREINTERPRET(, int, s, 64, 1, uint, u, 64, 1, expected_s64_7);
++  TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 8, 8, expected_s64_8);
++  TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 16, 4, expected_s64_9);
++
++  /* vreinterpret_u8_xx.  */
++  TEST_VREINTERPRET(, uint, u, 8, 8, int, s, 8, 8, expected_u8_1);
++  TEST_VREINTERPRET(, uint, u, 8, 8, int, s, 16, 4, expected_u8_2);
++  TEST_VREINTERPRET(, uint, u, 8, 8, int, s, 32, 2, expected_u8_3);
++  TEST_VREINTERPRET(, uint, u, 8, 8, int, s, 64, 1, expected_u8_4);
++  TEST_VREINTERPRET(, uint, u, 8, 8, uint, u, 16, 4, expected_u8_5);
++  TEST_VREINTERPRET(, uint, u, 8, 8, uint, u, 32, 2, expected_u8_6);
++  TEST_VREINTERPRET(, uint, u, 8, 8, uint, u, 64, 1, expected_u8_7);
++  TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 8, 8, expected_u8_8);
++  TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 16, 4, expected_u8_9);
++
++  /* vreinterpret_u16_xx.  */
++  TEST_VREINTERPRET(, uint, u, 16, 4, int, s, 8, 8, expected_u16_1);
++  TEST_VREINTERPRET(, uint, u, 16, 4, int, s, 16, 4, expected_u16_2);
++  TEST_VREINTERPRET(, uint, u, 16, 4, int, s, 32, 2, expected_u16_3);
++  TEST_VREINTERPRET(, uint, u, 16, 4, int, s, 64, 1, expected_u16_4);
++  TEST_VREINTERPRET(, uint, u, 16, 4, uint, u, 8, 8, expected_u16_5);
++  TEST_VREINTERPRET(, uint, u, 16, 4, uint, u, 32, 2, expected_u16_6);
++  TEST_VREINTERPRET(, uint, u, 16, 4, uint, u, 64, 1, expected_u16_7);
++  TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 8, 8, expected_u16_8);
++  TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 16, 4, expected_u16_9);
++
++  /* vreinterpret_u32_xx.  */
++  TEST_VREINTERPRET(, uint, u, 32, 2, int, s, 8, 8, expected_u32_1);
++  TEST_VREINTERPRET(, uint, u, 32, 2, int, s, 16, 4, expected_u32_2);
++  TEST_VREINTERPRET(, uint, u, 32, 2, int, s, 32, 2, expected_u32_3);
++  TEST_VREINTERPRET(, uint, u, 32, 2, int, s, 64, 1, expected_u32_4);
++  TEST_VREINTERPRET(, uint, u, 32, 2, uint, u, 8, 8, expected_u32_5);
++  TEST_VREINTERPRET(, uint, u, 32, 2, uint, u, 16, 4, expected_u32_6);
++  TEST_VREINTERPRET(, uint, u, 32, 2, uint, u, 64, 1, expected_u32_7);
++  TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 8, 8, expected_u32_8);
++  TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 16, 4, expected_u32_9);
++
++  /* vreinterpret_u64_xx.  */
++  TEST_VREINTERPRET(, uint, u, 64, 1, int, s, 8, 8, expected_u64_1);
++  TEST_VREINTERPRET(, uint, u, 64, 1, int, s, 16, 4, expected_u64_2);
++  TEST_VREINTERPRET(, uint, u, 64, 1, int, s, 32, 2, expected_u64_3);
++  TEST_VREINTERPRET(, uint, u, 64, 1, int, s, 64, 1, expected_u64_4);
++  TEST_VREINTERPRET(, uint, u, 64, 1, uint, u, 8, 8, expected_u64_5);
++  TEST_VREINTERPRET(, uint, u, 64, 1, uint, u, 16, 4, expected_u64_6);
++  TEST_VREINTERPRET(, uint, u, 64, 1, uint, u, 32, 2, expected_u64_7);
++  TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 8, 8, expected_u64_8);
++  TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 16, 4, expected_u64_9);
++
++  /* vreinterpret_p8_xx.  */
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, int, s, 8, 8, expected_p8_1);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, int, s, 16, 4, expected_p8_2);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, int, s, 32, 2, expected_p8_3);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, int, s, 64, 1, expected_p8_4);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 8, 8, expected_p8_5);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 16, 4, expected_p8_6);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 32, 2, expected_p8_7);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 64, 1, expected_p8_8);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, poly, p, 16, 4, expected_p8_9);
++
++  /* vreinterpret_p16_xx.  */
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, int, s, 8, 8, expected_p16_1);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, int, s, 16, 4, expected_p16_2);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, int, s, 32, 2, expected_p16_3);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, int, s, 64, 1, expected_p16_4);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 8, 8, expected_p16_5);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 16, 4, expected_p16_6);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 32, 2, expected_p16_7);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 64, 1, expected_p16_8);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, poly, p, 8, 8, expected_p16_9);
++
++  /* vreinterpretq_s8_xx.  */
++  TEST_VREINTERPRET(q, int, s, 8, 16, int, s, 16, 8, expected_q_s8_1);
++  TEST_VREINTERPRET(q, int, s, 8, 16, int, s, 32, 4, expected_q_s8_2);
++  TEST_VREINTERPRET(q, int, s, 8, 16, int, s, 64, 2, expected_q_s8_3);
++  TEST_VREINTERPRET(q, int, s, 8, 16, uint, u, 8, 16, expected_q_s8_4);
++  TEST_VREINTERPRET(q, int, s, 8, 16, uint, u, 16, 8, expected_q_s8_5);
++  TEST_VREINTERPRET(q, int, s, 8, 16, uint, u, 32, 4, expected_q_s8_6);
++  TEST_VREINTERPRET(q, int, s, 8, 16, uint, u, 64, 2, expected_q_s8_7);
++  TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 8, 16, expected_q_s8_8);
++  TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 16, 8, expected_q_s8_9);
++
++  /* vreinterpretq_s16_xx.  */
++  TEST_VREINTERPRET(q, int, s, 16, 8, int, s, 8, 16, expected_q_s16_1);
++  TEST_VREINTERPRET(q, int, s, 16, 8, int, s, 32, 4, expected_q_s16_2);
++  TEST_VREINTERPRET(q, int, s, 16, 8, int, s, 64, 2, expected_q_s16_3);
++  TEST_VREINTERPRET(q, int, s, 16, 8, uint, u, 8, 16, expected_q_s16_4);
++  TEST_VREINTERPRET(q, int, s, 16, 8, uint, u, 16, 8, expected_q_s16_5);
++  TEST_VREINTERPRET(q, int, s, 16, 8, uint, u, 32, 4, expected_q_s16_6);
++  TEST_VREINTERPRET(q, int, s, 16, 8, uint, u, 64, 2, expected_q_s16_7);
++  TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 8, 16, expected_q_s16_8);
++  TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 16, 8, expected_q_s16_9);
++
++  /* vreinterpretq_s32_xx.  */
++  TEST_VREINTERPRET(q, int, s, 32, 4, int, s, 8, 16, expected_q_s32_1);
++  TEST_VREINTERPRET(q, int, s, 32, 4, int, s, 16, 8, expected_q_s32_2);
++  TEST_VREINTERPRET(q, int, s, 32, 4, int, s, 64, 2, expected_q_s32_3);
++  TEST_VREINTERPRET(q, int, s, 32, 4, uint, u, 8, 16, expected_q_s32_4);
++  TEST_VREINTERPRET(q, int, s, 32, 4, uint, u, 16, 8, expected_q_s32_5);
++  TEST_VREINTERPRET(q, int, s, 32, 4, uint, u, 32, 4, expected_q_s32_6);
++  TEST_VREINTERPRET(q, int, s, 32, 4, uint, u, 64, 2, expected_q_s32_7);
++  TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 8, 16, expected_q_s32_8);
++  TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 16, 8, expected_q_s32_9);
++
++  /* vreinterpretq_s64_xx.  */
++  TEST_VREINTERPRET(q, int, s, 64, 2, int, s, 8, 16, expected_q_s64_1);
++  TEST_VREINTERPRET(q, int, s, 64, 2, int, s, 16, 8, expected_q_s64_2);
++  TEST_VREINTERPRET(q, int, s, 64, 2, int, s, 32, 4, expected_q_s64_3);
++  TEST_VREINTERPRET(q, int, s, 64, 2, uint, u, 8, 16, expected_q_s64_4);
++  TEST_VREINTERPRET(q, int, s, 64, 2, uint, u, 16, 8, expected_q_s64_5);
++  TEST_VREINTERPRET(q, int, s, 64, 2, uint, u, 32, 4, expected_q_s64_6);
++  TEST_VREINTERPRET(q, int, s, 64, 2, uint, u, 64, 2, expected_q_s64_7);
++  TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 8, 16, expected_q_s64_8);
++  TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 16, 8, expected_q_s64_9);
++
++  /* vreinterpretq_u8_xx.  */
++  TEST_VREINTERPRET(q, uint, u, 8, 16, int, s, 8, 16, expected_q_u8_1);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, int, s, 16, 8, expected_q_u8_2);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, int, s, 32, 4, expected_q_u8_3);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, int, s, 64, 2, expected_q_u8_4);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, uint, u, 16, 8, expected_q_u8_5);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, uint, u, 32, 4, expected_q_u8_6);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, uint, u, 64, 2, expected_q_u8_7);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 8, 16, expected_q_u8_8);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 16, 8, expected_q_u8_9);
++
++  /* vreinterpretq_u16_xx.  */
++  TEST_VREINTERPRET(q, uint, u, 16, 8, int, s, 8, 16, expected_q_u16_1);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, int, s, 16, 8, expected_q_u16_2);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, int, s, 32, 4, expected_q_u16_3);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, int, s, 64, 2, expected_q_u16_4);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, uint, u, 8, 16, expected_q_u16_5);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, uint, u, 32, 4, expected_q_u16_6);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, uint, u, 64, 2, expected_q_u16_7);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 8, 16, expected_q_u16_8);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 16, 8, expected_q_u16_9);
++
++  /* vreinterpretq_u32_xx.  */
++  TEST_VREINTERPRET(q, uint, u, 32, 4, int, s, 8, 16, expected_q_u32_1);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, int, s, 16, 8, expected_q_u32_2);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, int, s, 32, 4, expected_q_u32_3);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, int, s, 64, 2, expected_q_u32_4);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, uint, u, 8, 16, expected_q_u32_5);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, uint, u, 16, 8, expected_q_u32_6);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, uint, u, 64, 2, expected_q_u32_7);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 8, 16, expected_q_u32_8);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 16, 8, expected_q_u32_9);
++
++  /* vreinterpretq_u64_xx.  */
++  TEST_VREINTERPRET(q, uint, u, 64, 2, int, s, 8, 16, expected_q_u64_1);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, int, s, 16, 8, expected_q_u64_2);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, int, s, 32, 4, expected_q_u64_3);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, int, s, 64, 2, expected_q_u64_4);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, uint, u, 8, 16, expected_q_u64_5);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, uint, u, 16, 8, expected_q_u64_6);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, uint, u, 32, 4, expected_q_u64_7);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 8, 16, expected_q_u64_8);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 16, 8, expected_q_u64_9);
++
++  /* vreinterpret_f32_xx.  */
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 8, 8, expected_f32_1);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 16, 4, expected_f32_2);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 32, 2, expected_f32_3);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 64, 1, expected_f32_4);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, uint, u, 8, 8, expected_f32_5);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, uint, u, 16, 4, expected_f32_6);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, uint, u, 32, 2, expected_f32_7);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, uint, u, 64, 1, expected_f32_8);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 8, 8, expected_f32_9);
++  TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 16, 4, expected_f32_10);
++
++  /* vreinterpretq_f32_xx.  */
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, int, s, 8, 16, expected_q_f32_1);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, int, s, 16, 8, expected_q_f32_2);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, int, s, 32, 4, expected_q_f32_3);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, int, s, 64, 2, expected_q_f32_4);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, uint, u, 8, 16, expected_q_f32_5);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, uint, u, 16, 8, expected_q_f32_6);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, uint, u, 32, 4, expected_q_f32_7);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, uint, u, 64, 2, expected_q_f32_8);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 8, 16, expected_q_f32_9);
++  TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 16, 8, expected_q_f32_10);
++
++  /* vreinterpret_xx_f32.  */
++  TEST_VREINTERPRET(, int, s, 8, 8, float, f, 32, 2, expected_xx_f32_1);
++  TEST_VREINTERPRET(, int, s, 16, 4, float, f, 32, 2, expected_xx_f32_2);
++  TEST_VREINTERPRET(, int, s, 32, 2, float, f, 32, 2, expected_xx_f32_3);
++  TEST_VREINTERPRET(, int, s, 64, 1, float, f, 32, 2, expected_xx_f32_4);
++  TEST_VREINTERPRET(, uint, u, 8, 8, float, f, 32, 2, expected_xx_f32_5);
++  TEST_VREINTERPRET(, uint, u, 16, 4, float, f, 32, 2, expected_xx_f32_6);
++  TEST_VREINTERPRET(, uint, u, 32, 2, float, f, 32, 2, expected_xx_f32_7);
++  TEST_VREINTERPRET(, uint, u, 64, 1, float, f, 32, 2, expected_xx_f32_8);
++  TEST_VREINTERPRET_POLY(, poly, p, 8, 8, float, f, 32, 2, expected_xx_f32_9);
++  TEST_VREINTERPRET_POLY(, poly, p, 16, 4, float, f, 32, 2, expected_xx_f32_10);
++
++  /* vreinterpretq_xx_f32.  */
++  TEST_VREINTERPRET(q, int, s, 8, 16, float, f, 32, 4, expected_q_xx_f32_1);
++  TEST_VREINTERPRET(q, int, s, 16, 8, float, f, 32, 4, expected_q_xx_f32_2);
++  TEST_VREINTERPRET(q, int, s, 32, 4, float, f, 32, 4, expected_q_xx_f32_3);
++  TEST_VREINTERPRET(q, int, s, 64, 2, float, f, 32, 4, expected_q_xx_f32_4);
++  TEST_VREINTERPRET(q, uint, u, 8, 16, float, f, 32, 4, expected_q_xx_f32_5);
++  TEST_VREINTERPRET(q, uint, u, 16, 8, float, f, 32, 4, expected_q_xx_f32_6);
++  TEST_VREINTERPRET(q, uint, u, 32, 4, float, f, 32, 4, expected_q_xx_f32_7);
++  TEST_VREINTERPRET(q, uint, u, 64, 2, float, f, 32, 4, expected_q_xx_f32_8);
++  TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, float, f, 32, 4, expected_q_xx_f32_9);
++  TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, float, f, 32, 4, expected_q_xx_f32_10);
++}
++
++int main (void)
++{
++  exec_vreinterpret ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrev.c
+@@ -0,0 +1,200 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results for vrev16.  */
++VECT_VAR_DECL(expected_vrev16,int,8,8) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++					      0xf5, 0xf4, 0xf7, 0xf6 };
++VECT_VAR_DECL(expected_vrev16,uint,8,8) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++					       0xf5, 0xf4, 0xf7, 0xf6 };
++VECT_VAR_DECL(expected_vrev16,poly,8,8) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++					       0xf5, 0xf4, 0xf7, 0xf6 };
++VECT_VAR_DECL(expected_vrev16,int,8,16) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++					       0xf5, 0xf4, 0xf7, 0xf6,
++					       0xf9, 0xf8, 0xfb, 0xfa,
++					       0xfd, 0xfc, 0xff, 0xfe };
++VECT_VAR_DECL(expected_vrev16,uint,8,16) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++						0xf5, 0xf4, 0xf7, 0xf6,
++						0xf9, 0xf8, 0xfb, 0xfa,
++						0xfd, 0xfc, 0xff, 0xfe };
++VECT_VAR_DECL(expected_vrev16,poly,8,16) [] = { 0xf1, 0xf0, 0xf3, 0xf2,
++						0xf5, 0xf4, 0xf7, 0xf6,
++						0xf9, 0xf8, 0xfb, 0xfa,
++						0xfd, 0xfc, 0xff, 0xfe };
++
++/* Expected results for vrev32.  */
++VECT_VAR_DECL(expected_vrev32,int,8,8) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++					      0xf7, 0xf6, 0xf5, 0xf4 };
++VECT_VAR_DECL(expected_vrev32,int,16,4) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2 };
++VECT_VAR_DECL(expected_vrev32,uint,8,8) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++					       0xf7, 0xf6, 0xf5, 0xf4 };
++VECT_VAR_DECL(expected_vrev32,uint,16,4) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2 };
++VECT_VAR_DECL(expected_vrev32,poly,8,8) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++					       0xf7, 0xf6, 0xf5, 0xf4 };
++VECT_VAR_DECL(expected_vrev32,poly,16,4) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2 };
++VECT_VAR_DECL(expected_vrev32,int,8,16) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++					       0xf7, 0xf6, 0xf5, 0xf4,
++					       0xfb, 0xfa, 0xf9, 0xf8,
++					       0xff, 0xfe, 0xfd, 0xfc };
++VECT_VAR_DECL(expected_vrev32,int,16,8) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2,
++					       0xfff5, 0xfff4, 0xfff7, 0xfff6 };
++VECT_VAR_DECL(expected_vrev32,uint,8,16) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++						0xf7, 0xf6, 0xf5, 0xf4,
++						0xfb, 0xfa, 0xf9, 0xf8,
++						0xff, 0xfe, 0xfd, 0xfc };
++VECT_VAR_DECL(expected_vrev32,uint,16,8) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2,
++						0xfff5, 0xfff4, 0xfff7, 0xfff6 };
++VECT_VAR_DECL(expected_vrev32,poly,8,16) [] = { 0xf3, 0xf2, 0xf1, 0xf0,
++						0xf7, 0xf6, 0xf5, 0xf4,
++						0xfb, 0xfa, 0xf9, 0xf8,
++						0xff, 0xfe, 0xfd, 0xfc };
++VECT_VAR_DECL(expected_vrev32,poly,16,8) [] = { 0xfff1, 0xfff0, 0xfff3, 0xfff2,
++						0xfff5, 0xfff4, 0xfff7, 0xfff6 };
++
++/* Expected results for vrev64.  */
++VECT_VAR_DECL(expected_vrev64,int,8,8) [] = { 0xf7, 0xf6, 0xf5, 0xf4,
++					      0xf3, 0xf2, 0xf1, 0xf0 };
++VECT_VAR_DECL(expected_vrev64,int,16,4) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0 };
++VECT_VAR_DECL(expected_vrev64,int,32,2) [] = { 0xfffffff1, 0xfffffff0 };
++VECT_VAR_DECL(expected_vrev64,uint,8,8) [] = { 0xf7, 0xf6, 0xf5, 0xf4, 0xf3,
++					       0xf2, 0xf1, 0xf0 };
++VECT_VAR_DECL(expected_vrev64,uint,16,4) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0 };
++VECT_VAR_DECL(expected_vrev64,uint,32,2) [] = { 0xfffffff1, 0xfffffff0 };
++VECT_VAR_DECL(expected_vrev64,poly,8,8) [] = { 0xf7, 0xf6, 0xf5, 0xf4,
++					       0xf3, 0xf2, 0xf1, 0xf0 };
++VECT_VAR_DECL(expected_vrev64,poly,16,4) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0 };
++VECT_VAR_DECL(expected_vrev64,hfloat,32,2) [] = { 0xc1700000, 0xc1800000 };
++VECT_VAR_DECL(expected_vrev64,int,8,16) [] = { 0xf7, 0xf6, 0xf5, 0xf4,
++					       0xf3, 0xf2, 0xf1, 0xf0,
++					       0xff, 0xfe, 0xfd, 0xfc,
++					       0xfb, 0xfa, 0xf9, 0xf8 };
++VECT_VAR_DECL(expected_vrev64,int,16,8) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0,
++					       0xfff7, 0xfff6, 0xfff5, 0xfff4 };
++VECT_VAR_DECL(expected_vrev64,int,32,4) [] = { 0xfffffff1, 0xfffffff0,
++					       0xfffffff3, 0xfffffff2 };
++VECT_VAR_DECL(expected_vrev64,uint,8,16) [] = { 0xf7, 0xf6, 0xf5, 0xf4,
++						0xf3, 0xf2, 0xf1, 0xf0,
++						0xff, 0xfe, 0xfd, 0xfc,
++						0xfb, 0xfa, 0xf9, 0xf8 };
++VECT_VAR_DECL(expected_vrev64,uint,16,8) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0,
++						0xfff7, 0xfff6, 0xfff5, 0xfff4 };
++VECT_VAR_DECL(expected_vrev64,uint,32,4) [] = { 0xfffffff1, 0xfffffff0,
++						0xfffffff3, 0xfffffff2 };
++VECT_VAR_DECL(expected_vrev64,poly,8,16) [] = { 0xf7, 0xf6, 0xf5, 0xf4,
++						0xf3, 0xf2, 0xf1, 0xf0,
++						0xff, 0xfe, 0xfd, 0xfc,
++						0xfb, 0xfa, 0xf9, 0xf8 };
++VECT_VAR_DECL(expected_vrev64,poly,16,8) [] = { 0xfff3, 0xfff2, 0xfff1, 0xfff0,
++						0xfff7, 0xfff6, 0xfff5, 0xfff4 };
++VECT_VAR_DECL(expected_vrev64,hfloat,32,4) [] = { 0xc1700000, 0xc1800000,
++						  0xc1500000, 0xc1600000 };
++
++void exec_vrev (void)
++{
++  /* Basic test: y=vrev(x), then store the result.  */
++#define TEST_VREV(Q, T1, T2, W, N, W2)					\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vrev##W2##Q##_##T2##W(VECT_VAR(vector, T1, W, N));			\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++  VLOAD(vector, buffer, , float, f, 32, 2);
++  VLOAD(vector, buffer, q, float, f, 32, 4);
++
++  /* Check vrev in each of the existing combinations.  */
++#define TEST_MSG "VREV16"
++  TEST_VREV(, int, s, 8, 8, 16);
++  TEST_VREV(, uint, u, 8, 8, 16);
++  TEST_VREV(, poly, p, 8, 8, 16);
++  TEST_VREV(q, int, s, 8, 16, 16);
++  TEST_VREV(q, uint, u, 8, 16, 16);
++  TEST_VREV(q, poly, p, 8, 16, 16);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vrev16, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev16, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev16, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev16, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev16, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev16, "");
++
++#undef TEST_MSG
++#define TEST_MSG "VREV32"
++  TEST_VREV(, int, s, 8, 8, 32);
++  TEST_VREV(, int, s, 16, 4, 32);
++  TEST_VREV(, uint, u, 8, 8, 32);
++  TEST_VREV(, uint, u, 16, 4, 32);
++  TEST_VREV(, poly, p, 8, 8, 32);
++  TEST_VREV(, poly, p, 16, 4, 32);
++  TEST_VREV(q, int, s, 8, 16, 32);
++  TEST_VREV(q, int, s, 16, 8, 32);
++  TEST_VREV(q, uint, u, 8, 16, 32);
++  TEST_VREV(q, uint, u, 16, 8, 32);
++  TEST_VREV(q, poly, p, 8, 16, 32);
++  TEST_VREV(q, poly, p, 16, 8, 32);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_vrev32, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev32, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev32, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev32, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev32, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev32, "");
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev32, "");
++
++#undef TEST_MSG
++#define TEST_MSG "VREV64"
++  TEST_VREV(, int, s, 8, 8, 64);
++  TEST_VREV(, int, s, 16, 4, 64);
++  TEST_VREV(, int, s, 32, 2, 64);
++  TEST_VREV(, uint, u, 8, 8, 64);
++  TEST_VREV(, uint, u, 16, 4, 64);
++  TEST_VREV(, uint, u, 32, 2, 64);
++  TEST_VREV(, poly, p, 8, 8, 64);
++  TEST_VREV(, poly, p, 16, 4, 64);
++  TEST_VREV(q, int, s, 8, 16, 64);
++  TEST_VREV(q, int, s, 16, 8, 64);
++  TEST_VREV(q, int, s, 32, 4, 64);
++  TEST_VREV(q, uint, u, 8, 16, 64);
++  TEST_VREV(q, uint, u, 16, 8, 64);
++  TEST_VREV(q, uint, u, 32, 4, 64);
++  TEST_VREV(q, poly, p, 8, 16, 64);
++  TEST_VREV(q, poly, p, 16, 8, 64);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_vrev64, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_vrev64, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_vrev64, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_vrev64, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_vrev64, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_vrev64, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_vrev64, "");
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_vrev64, "");
++
++  TEST_VREV(, float, f, 32, 2, 64);
++  TEST_VREV(q, float, f, 32, 4, 64);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_vrev64, "");
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_vrev64, "");
++}
++
++int main (void)
++{
++  exec_vrev ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshl.c
+@@ -0,0 +1,627 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results with input=0.  */
++VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected results with input=0 and negative shift amount.  */
++VECT_VAR_DECL(expected_0_sh_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0_sh_neg,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
++				       0xe8, 0xea, 0xec, 0xee };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffff000, 0xfffff100 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffffe };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
++					0xe8, 0xea, 0xec, 0xee };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffff000, 0xfffff100 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x1ffffffffffffffe };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					0x0, 0x0, 0x0, 0x0,
++					0x0, 0x0, 0x0, 0x0,
++					0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x0, 0x1000, 0x2000, 0x3000,
++					0x4000, 0x5000, 0x6000, 0x7000 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0x0, 0x8000000000000000 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x1000, 0x2000, 0x3000,
++					 0x4000, 0x5000, 0x6000, 0x7000 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0x0, 0x8000000000000000 };
++
++/* Expected results with negative shift amount.  */
++VECT_VAR_DECL(expected_sh_neg,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
++					      0xfa, 0xfb, 0xfb, 0xfc };
++VECT_VAR_DECL(expected_sh_neg,int,16,4) [] = { 0xfffc, 0xfffc, 0xfffd, 0xfffd };
++VECT_VAR_DECL(expected_sh_neg,int,32,2) [] = { 0xfffffffe, 0xfffffffe };
++VECT_VAR_DECL(expected_sh_neg,int,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected_sh_neg,uint,8,8) [] = { 0x78, 0x79, 0x79, 0x7a,
++					       0x7a, 0x7b, 0x7b, 0x7c };
++VECT_VAR_DECL(expected_sh_neg,uint,16,4) [] = { 0x3ffc, 0x3ffc, 0x3ffd, 0x3ffd };
++VECT_VAR_DECL(expected_sh_neg,uint,32,2) [] = { 0x1ffffffe, 0x1ffffffe };
++VECT_VAR_DECL(expected_sh_neg,uint,64,1) [] = { 0xfffffffffffffff };
++VECT_VAR_DECL(expected_sh_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_neg,uint,8,16) [] = { 0x2, 0x2, 0x2, 0x2,
++						0x2, 0x2, 0x2, 0x2,
++						0x2, 0x2, 0x2, 0x2,
++						0x2, 0x2, 0x2, 0x2 };
++VECT_VAR_DECL(expected_sh_neg,uint,16,8) [] = { 0x20, 0x20, 0x20, 0x20,
++						0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_sh_neg,uint,32,4) [] = { 0x80000, 0x80000,
++						0x80000, 0x80000 };
++VECT_VAR_DECL(expected_sh_neg,uint,64,2) [] = { 0x100000000000, 0x100000000000 };
++
++/* Expected results with max input value shifted by -1 to test
++   round_const.  */
++VECT_VAR_DECL(expected_max_sh_minus1,int,8,8) [] = { 0x40, 0x40, 0x40, 0x40,
++						     0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,16,4) [] = { 0x4000, 0x4000,
++						      0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,32,2) [] = { 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,64,1) [] = { 0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						      0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,16,4) [] = { 0x8000, 0x8000,
++						       0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,8,16) [] = { 0x40, 0x40, 0x40, 0x40,
++						      0x40, 0x40, 0x40, 0x40,
++						      0x40, 0x40, 0x40, 0x40,
++						      0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,16,8) [] = { 0x4000, 0x4000,
++						      0x4000, 0x4000,
++						      0x4000, 0x4000,
++						      0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,32,4) [] = { 0x40000000, 0x40000000,
++						      0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,int,64,2) [] = { 0x4000000000000000,
++						      0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						       0x80, 0x80, 0x80, 0x80,
++						       0x80, 0x80, 0x80, 0x80,
++						       0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,16,8) [] = { 0x8000, 0x8000,
++						       0x8000, 0x8000,
++						       0x8000, 0x8000,
++						       0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,32,4) [] = { 0x80000000, 0x80000000,
++						       0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh_minus1,uint,64,2) [] = { 0x8000000000000000,
++						       0x8000000000000000 };
++
++/* Expected results with max input value shifted by -3 to test
++   round_const.  */
++VECT_VAR_DECL(expected_max_sh_minus3,int,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
++						     0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,16,4) [] = { 0x1000, 0x1000,
++						      0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,32,2) [] = { 0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,64,1) [] = { 0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
++						      0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,16,4) [] = { 0x2000, 0x2000,
++						       0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,32,2) [] = { 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,64,1) [] = { 0x2000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,8,16) [] = { 0x10, 0x10, 0x10, 0x10,
++						      0x10, 0x10, 0x10, 0x10,
++						      0x10, 0x10, 0x10, 0x10,
++						      0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,16,8) [] = { 0x1000, 0x1000,
++						      0x1000, 0x1000,
++						      0x1000, 0x1000,
++						      0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,32,4) [] = { 0x10000000, 0x10000000,
++						      0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,int,64,2) [] = { 0x1000000000000000,
++						      0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
++						       0x20, 0x20, 0x20, 0x20,
++						       0x20, 0x20, 0x20, 0x20,
++						       0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,16,8) [] = { 0x2000, 0x2000,
++						       0x2000, 0x2000,
++						       0x2000, 0x2000,
++						       0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,32,4) [] = { 0x20000000, 0x20000000,
++						       0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh_minus3,uint,64,2) [] = { 0x2000000000000000,
++						       0x2000000000000000 };
++
++/* Expected results with negative shift by vector width.  */
++VECT_VAR_DECL(expected_max_sh_minus_width,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++							   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++							   0x0, 0x0, 0x0, 0x0,
++							   0x0, 0x0, 0x0, 0x0,
++							   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++							    0x1, 0x1, 0x1, 0x1,
++							    0x1, 0x1, 0x1, 0x1,
++							    0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++							    0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_minus_width,uint,64,2) [] = { 0x1, 0x1 };
++
++/* Expected results with large shift amount.  */
++VECT_VAR_DECL(expected_max_sh_large,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						    0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large,uint,64,2) [] = { 0x0, 0x0 };
++
++/* Expected results with large negative shift amount.  */
++VECT_VAR_DECL(expected_max_sh_large_neg,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++							 0x0, 0x0, 0x0, 0x0,
++							 0x0, 0x0, 0x0, 0x0,
++							 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++							 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++							  0x0, 0x0, 0x0, 0x0,
++							  0x0, 0x0, 0x0, 0x0,
++							  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++							  0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_large_neg,uint,64,2) [] = { 0x1, 0x1 };
++
++#define TEST_MSG "VRSHL/VRSHLQ"
++void exec_vrshl (void)
++{
++  /* Basic test: v3=vrshl(v1,v2), then store the result.  */
++#define TEST_VRSHL(T3, Q, T1, T2, W, N)					\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		       VECT_VAR(vector_shift, T3, W, N));		\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
++
++  clean_results ();
++
++  /* Fill input vector with 0, to check behavior on limits.  */
++  VDUP(vector, , int, s, 8, 8, 0);
++  VDUP(vector, , int, s, 16, 4, 0);
++  VDUP(vector, , int, s, 32, 2, 0);
++  VDUP(vector, , int, s, 64, 1, 0);
++  VDUP(vector, , uint, u, 8, 8, 0);
++  VDUP(vector, , uint, u, 16, 4, 0);
++  VDUP(vector, , uint, u, 32, 2, 0);
++  VDUP(vector, , uint, u, 64, 1, 0);
++  VDUP(vector, q, int, s, 8, 16, 0);
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 8, 16, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0);
++  VDUP(vector, q, uint, u, 32, 4, 0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Choose init value arbitrarily, will be used as shift amount.  */
++  /* Use values equal to one-less-than the type width to check
++     behaviour on limits.  */
++  VDUP(vector_shift, , int, s, 8, 8, 7);
++  VDUP(vector_shift, , int, s, 16, 4, 15);
++  VDUP(vector_shift, , int, s, 32, 2, 31);
++  VDUP(vector_shift, , int, s, 64, 1, 63);
++  VDUP(vector_shift, q, int, s, 8, 16, 7);
++  VDUP(vector_shift, q, int, s, 16, 8, 15);
++  VDUP(vector_shift, q, int, s, 32, 4, 31);
++  VDUP(vector_shift, q, int, s, 64, 2, 63);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#define CMT " (with input = 0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0, CMT);
++
++
++  /* Use negative shift amounts.  */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (input 0 and negative shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_0_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_0_sh_neg, CMT);
++
++
++  /* Test again, with predefined input values.  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose init value arbitrarily, will be used as shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 1);
++  VDUP(vector_shift, , int, s, 16, 4, 3);
++  VDUP(vector_shift, , int, s, 32, 2, 8);
++  VDUP(vector_shift, , int, s, 64, 1, -3);
++  VDUP(vector_shift, q, int, s, 8, 16, 10);
++  VDUP(vector_shift, q, int, s, 16, 8, 12);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 63);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Use negative shift amounts.  */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -2);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -4);
++  VDUP(vector_shift, q, int, s, 8, 16, -7);
++  VDUP(vector_shift, q, int, s, 16, 8, -11);
++  VDUP(vector_shift, q, int, s, 32, 4, -13);
++  VDUP(vector_shift, q, int, s, 64, 2, -20);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (negative shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_sh_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_sh_neg, CMT);
++
++  /* Fill input vector with max value, to check behavior on limits.  */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++  /* Use -1 shift amount to check overflow with round_const.  */
++  VDUP(vector_shift, , int, s, 8, 8, -1);
++  VDUP(vector_shift, , int, s, 16, 4, -1);
++  VDUP(vector_shift, , int, s, 32, 2, -1);
++  VDUP(vector_shift, , int, s, 64, 1, -1);
++  VDUP(vector_shift, q, int, s, 8, 16, -1);
++  VDUP(vector_shift, q, int, s, 16, 8, -1);
++  VDUP(vector_shift, q, int, s, 32, 4, -1);
++  VDUP(vector_shift, q, int, s, 64, 2, -1);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (max input, shift by -1)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus1, CMT);
++
++  /* Use -3 shift amount to check overflow with round_const.  */
++  VDUP(vector_shift, , int, s, 8, 8, -3);
++  VDUP(vector_shift, , int, s, 16, 4, -3);
++  VDUP(vector_shift, , int, s, 32, 2, -3);
++  VDUP(vector_shift, , int, s, 64, 1, -3);
++  VDUP(vector_shift, q, int, s, 8, 16, -3);
++  VDUP(vector_shift, q, int, s, 16, 8, -3);
++  VDUP(vector_shift, q, int, s, 32, 4, -3);
++  VDUP(vector_shift, q, int, s, 64, 2, -3);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (check rounding constant: max input, shift by -3)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus3, CMT);
++
++
++  /* Use negative shift amount as large as input vector width.  */
++  VDUP(vector_shift, , int, s, 8, 8, -8);
++  VDUP(vector_shift, , int, s, 16, 4, -16);
++  VDUP(vector_shift, , int, s, 32, 2, -32);
++  VDUP(vector_shift, , int, s, 64, 1, -64);
++  VDUP(vector_shift, q, int, s, 8, 16, -8);
++  VDUP(vector_shift, q, int, s, 16, 8, -16);
++  VDUP(vector_shift, q, int, s, 32, 4, -32);
++  VDUP(vector_shift, q, int, s, 64, 2, -64);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (max input, right shift by vector width)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_minus_width, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_minus_width, CMT);
++
++
++  /* Test large shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, 10);
++  VDUP(vector_shift, , int, s, 16, 4, 20);
++  VDUP(vector_shift, , int, s, 32, 2, 33);
++  VDUP(vector_shift, , int, s, 64, 1, 65);
++  VDUP(vector_shift, q, int, s, 8, 16, 9);
++  VDUP(vector_shift, q, int, s, 16, 8, 16);
++  VDUP(vector_shift, q, int, s, 32, 4, 32);
++  VDUP(vector_shift, q, int, s, 64, 2, 64);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (max input, large shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large, CMT);
++
++  
++  /* Test large negative shift amount.  */
++  VDUP(vector_shift, , int, s, 8, 8, -10);
++  VDUP(vector_shift, , int, s, 16, 4, -20);
++  VDUP(vector_shift, , int, s, 32, 2, -33);
++  VDUP(vector_shift, , int, s, 64, 1, -65);
++  VDUP(vector_shift, q, int, s, 8, 16, -9);
++  VDUP(vector_shift, q, int, s, 16, 8, -16);
++  VDUP(vector_shift, q, int, s, 32, 4, -32);
++  VDUP(vector_shift, q, int, s, 64, 2, -64);
++
++  TEST_MACRO_ALL_VARIANTS_1_5(TEST_VRSHL, int);
++
++#undef CMT
++#define CMT " (max input, large negative shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_large_neg, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_large_neg, CMT);
++}
++
++int main (void)
++{
++  exec_vrshl ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c
+@@ -0,0 +1,504 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
++				       0xfa, 0xfb, 0xfb, 0xfc };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3c, 0x3c, 0x3d, 0x3d,
++					0x3d, 0x3d, 0x3e, 0x3e };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x1ffe, 0x1ffe, 0x1ffe, 0x1ffe };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0x8000000, 0x8000000 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x80000000 };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
++					0xfa, 0xfb, 0xfb, 0xfc,
++					0xfc, 0xfd, 0xfd, 0xfe,
++					0xfe, 0xff, 0xff, 0x0 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffc, 0xfffffffc,
++					0xfffffffd, 0xfffffffd };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0x3c, 0x3c, 0x3d, 0x3d,
++					 0x3d, 0x3d, 0x3e, 0x3e,
++					 0x3e, 0x3e, 0x3f, 0x3f,
++					 0x3f, 0x3f, 0x40, 0x40 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0x1ffe, 0x1ffe, 0x1ffe, 0x1ffe,
++					 0x1fff, 0x1fff, 0x1fff, 0x1fff };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0x8000000, 0x8000000,
++					 0x8000000, 0x8000000 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0x80000000, 0x80000000 };
++
++/* Expected results with maximum input and max shift amount.  */
++VECT_VAR_DECL(expected_max_sh_max,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						   0x0, 0x0, 0x0, 0x0,
++						   0x0, 0x0, 0x0, 0x0,
++						   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						   0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_sh_max,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++						    0x1, 0x1, 0x1, 0x1,
++						    0x1, 0x1, 0x1, 0x1,
++						    0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						    0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_sh_max,uint,64,2) [] = { 0x1, 0x1 };
++
++/* Expected results with maximum input and shift by 1.  */
++VECT_VAR_DECL(expected_max_sh_1,int,8,8) [] = { 0x40, 0x40, 0x40, 0x40,
++						0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh_1,int,16,4) [] = { 0x4000, 0x4000,
++						 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh_1,int,32,2) [] = { 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh_1,int,64,1) [] = { 0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						 0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh_1,uint,16,4) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_max_sh_1,int,8,16) [] = { 0x40, 0x40, 0x40, 0x40,
++						 0x40, 0x40, 0x40, 0x40,
++						 0x40, 0x40, 0x40, 0x40,
++						 0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh_1,int,16,8) [] = { 0x4000, 0x4000,
++						 0x4000, 0x4000,
++						 0x4000, 0x4000,
++						 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh_1,int,32,4) [] = { 0x40000000, 0x40000000,
++						 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh_1,int,64,2) [] = { 0x4000000000000000,
++						 0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80,
++						  0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh_1,uint,16,8) [] = { 0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000,
++						  0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,32,4) [] = { 0x80000000, 0x80000000,
++						  0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh_1,uint,64,2) [] = { 0x8000000000000000,
++						  0x8000000000000000 };
++
++/* Expected results with maximum input and shift by 3.  */
++VECT_VAR_DECL(expected_max_sh_3,int,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
++						0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh_3,int,16,4) [] = { 0x1000, 0x1000,
++						 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh_3,int,32,2) [] = { 0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh_3,int,64,1) [] = { 0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
++						 0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh_3,uint,16,4) [] = { 0x2000, 0x2000,
++						  0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,32,2) [] = { 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,64,1) [] = { 0x2000000000000000 };
++VECT_VAR_DECL(expected_max_sh_3,int,8,16) [] = { 0x10, 0x10, 0x10, 0x10,
++						 0x10, 0x10, 0x10, 0x10,
++						 0x10, 0x10, 0x10, 0x10,
++						 0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh_3,int,16,8) [] = { 0x1000, 0x1000,
++						 0x1000, 0x1000,
++						 0x1000, 0x1000,
++						 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh_3,int,32,4) [] = { 0x10000000, 0x10000000,
++						 0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh_3,int,64,2) [] = { 0x1000000000000000,
++						 0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
++						  0x20, 0x20, 0x20, 0x20,
++						  0x20, 0x20, 0x20, 0x20,
++						  0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh_3,uint,16,8) [] = { 0x2000, 0x2000,
++						  0x2000, 0x2000,
++						  0x2000, 0x2000,
++						  0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,32,4) [] = { 0x20000000, 0x20000000,
++						  0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh_3,uint,64,2) [] = { 0x2000000000000000,
++						  0x2000000000000000 };
++
++/* Expected results with max negative input (for signed types, shift
++   by 1.  */
++VECT_VAR_DECL(expected_max_neg_sh_1,int,8,8) [] = { 0xc0, 0xc0, 0xc0, 0xc0,
++						    0xc0, 0xc0, 0xc0, 0xc0 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,16,4) [] = { 0xc000, 0xc000,
++						     0xc000, 0xc000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,32,2) [] = { 0xc0000000, 0xc0000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,64,1) [] = { 0xc000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						     0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,16,4) [] = { 0x8000, 0x8000,
++						      0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,8,16) [] = { 0xc0, 0xc0, 0xc0, 0xc0,
++						     0xc0, 0xc0, 0xc0, 0xc0,
++						     0xc0, 0xc0, 0xc0, 0xc0,
++						     0xc0, 0xc0, 0xc0, 0xc0 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,16,8) [] = { 0xc000, 0xc000,
++						     0xc000, 0xc000,
++						     0xc000, 0xc000,
++						     0xc000, 0xc000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,32,4) [] = { 0xc0000000, 0xc0000000,
++						     0xc0000000, 0xc0000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,int,64,2) [] = { 0xc000000000000000,
++						     0xc000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						      0x80, 0x80, 0x80, 0x80,
++						      0x80, 0x80, 0x80, 0x80,
++						      0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,16,8) [] = { 0x8000, 0x8000,
++						      0x8000, 0x8000,
++						      0x8000, 0x8000,
++						      0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,32,4) [] = { 0x80000000, 0x80000000,
++						      0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_neg_sh_1,uint,64,2) [] = { 0x8000000000000000,
++						      0x8000000000000000 };
++
++/* Expected results with max negative input (for signed types, shift
++   by 3.  */
++VECT_VAR_DECL(expected_max_neg_sh_3,int,8,8) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
++						    0xf0, 0xf0, 0xf0, 0xf0 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,16,4) [] = { 0xf000, 0xf000,
++						     0xf000, 0xf000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,32,2) [] = { 0xf0000000, 0xf0000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,64,1) [] = { 0xf000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
++						     0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,16,4) [] = { 0x2000, 0x2000,
++						      0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,32,2) [] = { 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,64,1) [] = { 0x2000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,8,16) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
++						     0xf0, 0xf0, 0xf0, 0xf0,
++						     0xf0, 0xf0, 0xf0, 0xf0,
++						     0xf0, 0xf0, 0xf0, 0xf0 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,16,8) [] = { 0xf000, 0xf000,
++						     0xf000, 0xf000,
++						     0xf000, 0xf000,
++						     0xf000, 0xf000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,32,4) [] = { 0xf0000000, 0xf0000000,
++						     0xf0000000, 0xf0000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,int,64,2) [] = { 0xf000000000000000,
++						     0xf000000000000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
++						      0x20, 0x20, 0x20, 0x20,
++						      0x20, 0x20, 0x20, 0x20,
++						      0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,16,8) [] = { 0x2000, 0x2000,
++						      0x2000, 0x2000,
++						      0x2000, 0x2000,
++						      0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,32,4) [] = { 0x20000000, 0x20000000,
++						      0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_neg_sh_3,uint,64,2) [] = { 0x2000000000000000,
++						      0x2000000000000000 };
++
++#define TEST_MSG "VRSHR_N"
++void exec_vrshr_n (void)
++{
++  /* Basic test: y=vrshr_n(x,v), then store the result.  */
++#define TEST_VRSHR_N(Q, T1, T2, W, N, V)				\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vrshr##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			 V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 1);
++  TEST_VRSHR_N(, int, s, 16, 4, 12);
++  TEST_VRSHR_N(, int, s, 32, 2, 2);
++  TEST_VRSHR_N(, int, s, 64, 1, 32);
++  TEST_VRSHR_N(, uint, u, 8, 8, 2);
++  TEST_VRSHR_N(, uint, u, 16, 4, 3);
++  TEST_VRSHR_N(, uint, u, 32, 2, 5);
++  TEST_VRSHR_N(, uint, u, 64, 1, 33);
++
++  TEST_VRSHR_N(q, int, s, 8, 16, 1);
++  TEST_VRSHR_N(q, int, s, 16, 8, 12);
++  TEST_VRSHR_N(q, int, s, 32, 4, 2);
++  TEST_VRSHR_N(q, int, s, 64, 2, 32);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 2);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 3);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 5);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 33);
++
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Use maximum positive input value.  */
++  VDUP(vector, , int, s, 8, 8, 0x7F);
++  VDUP(vector, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x7F);
++  VDUP(vector, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++  /* Use max shift amount, to exercise saturation.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 8);
++  TEST_VRSHR_N(, int, s, 16, 4, 16);
++  TEST_VRSHR_N(, int, s, 32, 2, 32);
++  TEST_VRSHR_N(, int, s, 64, 1, 64);
++  TEST_VRSHR_N(, uint, u, 8, 8, 8);
++  TEST_VRSHR_N(, uint, u, 16, 4, 16);
++  TEST_VRSHR_N(, uint, u, 32, 2, 32);
++  TEST_VRSHR_N(, uint, u, 64, 1, 64);
++  TEST_VRSHR_N(q, int, s, 8, 16, 8);
++  TEST_VRSHR_N(q, int, s, 16, 8, 16);
++  TEST_VRSHR_N(q, int, s, 32, 4, 32);
++  TEST_VRSHR_N(q, int, s, 64, 2, 64);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 8);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 16);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 32);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 64);
++
++#undef CMT
++#define CMT " (overflow test: max shift amount, max positive input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_max, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_max, CMT);
++
++
++  /* Use 1 as shift amount, to exercise saturation.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 1);
++  TEST_VRSHR_N(, int, s, 16, 4, 1);
++  TEST_VRSHR_N(, int, s, 32, 2, 1);
++  TEST_VRSHR_N(, int, s, 64, 1, 1);
++  TEST_VRSHR_N(, uint, u, 8, 8, 1);
++  TEST_VRSHR_N(, uint, u, 16, 4, 1);
++  TEST_VRSHR_N(, uint, u, 32, 2, 1);
++  TEST_VRSHR_N(, uint, u, 64, 1, 1);
++  TEST_VRSHR_N(q, int, s, 8, 16, 1);
++  TEST_VRSHR_N(q, int, s, 16, 8, 1);
++  TEST_VRSHR_N(q, int, s, 32, 4, 1);
++  TEST_VRSHR_N(q, int, s, 64, 2, 1);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 1);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 1);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 1);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 1);
++
++#undef CMT
++#define CMT " (overflow test: shift by 1, with max input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_1, CMT);
++
++
++  /* Use 3 as shift amount, to exercise saturation.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 3);
++  TEST_VRSHR_N(, int, s, 16, 4, 3);
++  TEST_VRSHR_N(, int, s, 32, 2, 3);
++  TEST_VRSHR_N(, int, s, 64, 1, 3);
++  TEST_VRSHR_N(, uint, u, 8, 8, 3);
++  TEST_VRSHR_N(, uint, u, 16, 4, 3);
++  TEST_VRSHR_N(, uint, u, 32, 2, 3);
++  TEST_VRSHR_N(, uint, u, 64, 1, 3);
++  TEST_VRSHR_N(q, int, s, 8, 16, 3);
++  TEST_VRSHR_N(q, int, s, 16, 8, 3);
++  TEST_VRSHR_N(q, int, s, 32, 4, 3);
++  TEST_VRSHR_N(q, int, s, 64, 2, 3);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 3);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 3);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 3);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 3);
++
++#undef CMT
++#define CMT " (overflow test: shift by 3, with max input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh_3, CMT);
++
++
++  /* Use minimum negative input for signed types.  */
++  VDUP(vector, , int, s, 8, 8, 0x80);
++  VDUP(vector, , int, s, 16, 4, 0x8000);
++  VDUP(vector, , int, s, 32, 2, 0x80000000);
++  VDUP(vector, , int, s, 64, 1, 0x8000000000000000LL);
++  VDUP(vector, , uint, u, 8, 8, 0xFF);
++  VDUP(vector, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector, q, int, s, 8, 16, 0x80);
++  VDUP(vector, q, int, s, 16, 8, 0x8000);
++  VDUP(vector, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector, q, int, s, 64, 2, 0x8000000000000000LL);
++  VDUP(vector, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++
++  /* Use 1 as shift amount, to exercise saturation code.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 1);
++  TEST_VRSHR_N(, int, s, 16, 4, 1);
++  TEST_VRSHR_N(, int, s, 32, 2, 1);
++  TEST_VRSHR_N(, int, s, 64, 1, 1);
++  TEST_VRSHR_N(, uint, u, 8, 8, 1);
++  TEST_VRSHR_N(, uint, u, 16, 4, 1);
++  TEST_VRSHR_N(, uint, u, 32, 2, 1);
++  TEST_VRSHR_N(, uint, u, 64, 1, 1);
++  TEST_VRSHR_N(q, int, s, 8, 16, 1);
++  TEST_VRSHR_N(q, int, s, 16, 8, 1);
++  TEST_VRSHR_N(q, int, s, 32, 4, 1);
++  TEST_VRSHR_N(q, int, s, 64, 2, 1);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 1);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 1);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 1);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 1);
++
++#undef CMT
++#define CMT " (overflow test: shift by 1, with negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_neg_sh_1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_neg_sh_1, CMT);
++
++
++  /* Use 3 as shift amount, to exercise saturation code.  */
++  TEST_VRSHR_N(, int, s, 8, 8, 3);
++  TEST_VRSHR_N(, int, s, 16, 4, 3);
++  TEST_VRSHR_N(, int, s, 32, 2, 3);
++  TEST_VRSHR_N(, int, s, 64, 1, 3);
++  TEST_VRSHR_N(, uint, u, 8, 8, 3);
++  TEST_VRSHR_N(, uint, u, 16, 4, 3);
++  TEST_VRSHR_N(, uint, u, 32, 2, 3);
++  TEST_VRSHR_N(, uint, u, 64, 1, 3);
++  TEST_VRSHR_N(q, int, s, 8, 16, 3);
++  TEST_VRSHR_N(q, int, s, 16, 8, 3);
++  TEST_VRSHR_N(q, int, s, 32, 4, 3);
++  TEST_VRSHR_N(q, int, s, 64, 2, 3);
++  TEST_VRSHR_N(q, uint, u, 8, 16, 3);
++  TEST_VRSHR_N(q, uint, u, 16, 8, 3);
++  TEST_VRSHR_N(q, uint, u, 32, 4, 3);
++  TEST_VRSHR_N(q, uint, u, 64, 2, 3);
++
++#undef CMT
++#define CMT " (overflow test: shift by 3, with negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_neg_sh_3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_neg_sh_3, CMT);
++}
++
++int main (void)
++{
++  exec_vrshr_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c
+@@ -0,0 +1,143 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results with input=0.  */
++VECT_VAR_DECL(expected_0,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_0,uint,32,2) [] = { 0x0, 0x0 };
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xf9, 0xfa,
++				       0xfa, 0xfb, 0xfb, 0xfc };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff9, 0xfff9, 0xfffa };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xfc, 0xfc, 0xfd, 0xfd,
++					0xfd, 0xfd, 0xfe, 0xfe };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffffe, 0xfffffffe };
++
++/* Expected results with large shift amount.  */
++VECT_VAR_DECL(expected_sh_large,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_large,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_large,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_large,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_large,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_sh_large,uint,32,2) [] = { 0x0, 0x0 };
++
++#define TEST_MSG "VRSHRN_N"
++void exec_vrshrn_n (void)
++{
++  /* Basic test: v2=vrshrn_n(v1,v), then store the result.  */
++#define TEST_VRSHRN_N(T1, T2, W, N, W2, V)				\
++  VECT_VAR(vector_res, T1, W2, N) =					\
++    vrshrn_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		     V);						\
++  vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector_res, T1, W2, N))
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++  DECL_VARIABLE(vector, uint, 16, 8);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, uint, 64, 2);
++
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  /* Fill input vector with 0, to check behavior on limits.  */
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0);
++  VDUP(vector, q, uint, u, 32, 4, 0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VRSHRN_N(int, s, 16, 8, 8, 1);
++  TEST_VRSHRN_N(int, s, 32, 4, 16, 1);
++  TEST_VRSHRN_N(int, s, 64, 2, 32, 2);
++  TEST_VRSHRN_N(uint, u, 16, 8, 8, 2);
++  TEST_VRSHRN_N(uint, u, 32, 4, 16, 3);
++  TEST_VRSHRN_N(uint, u, 64, 2, 32, 3);
++
++#define CMT " (with input = 0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_0, CMT);
++
++
++  /* Test again, with predefined input values.  */
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++  VLOAD(vector, buffer, q, int, s, 64, 2);
++  VLOAD(vector, buffer, q, uint, u, 16, 8);
++  VLOAD(vector, buffer, q, uint, u, 32, 4);
++  VLOAD(vector, buffer, q, uint, u, 64, 2);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VRSHRN_N(int, s, 16, 8, 8, 1);
++  TEST_VRSHRN_N(int, s, 32, 4, 16, 1);
++  TEST_VRSHRN_N(int, s, 64, 2, 32, 2);
++  TEST_VRSHRN_N(uint, u, 16, 8, 8, 2);
++  TEST_VRSHRN_N(uint, u, 32, 4, 16, 3);
++  TEST_VRSHRN_N(uint, u, 64, 2, 32, 3);
++
++#undef CMT
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++
++
++  /* Fill input arbitrary values.  */
++  VDUP(vector, q, int, s, 16, 8, 30);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0xFFF0);
++  VDUP(vector, q, uint, u, 32, 4, 0xFFFFFFF0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Choose large shift amount arbitrarily.  */
++  TEST_VRSHRN_N(int, s, 16, 8, 8, 7);
++  TEST_VRSHRN_N(int, s, 32, 4, 16, 14);
++  TEST_VRSHRN_N(int, s, 64, 2, 32, 31);
++  TEST_VRSHRN_N(uint, u, 16, 8, 8, 7);
++  TEST_VRSHRN_N(uint, u, 32, 4, 16, 16);
++  TEST_VRSHRN_N(uint, u, 64, 2, 32, 3);
++
++#undef CMT
++#define CMT " (with large shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_sh_large, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_sh_large, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_sh_large, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_sh_large, CMT);
++}
++
++int main (void)
++{
++  exec_vrshrn_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c
+@@ -0,0 +1,157 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++#include <math.h>
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffff, 0xffffffff };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0x9c800000, 0x9c800000,
++					 0x9c800000, 0x9c800000 };
++VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x3e498000, 0x3e498000 };
++VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x3e700000, 0x3e700000,
++					   0x3e700000, 0x3e700000 };
++
++/* Expected results with large uint #1.  */
++VECT_VAR_DECL(expected_1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_1,uint,32,4) [] = { 0xae800000, 0xae800000,
++					   0xae800000, 0xae800000 };
++
++/* Expected results with large uint #2.  */
++VECT_VAR_DECL(expected_2,uint,32,2) [] = { 0xb4800000, 0xb4800000 };
++VECT_VAR_DECL(expected_2,uint,32,4) [] = { 0xed000000, 0xed000000,
++					   0xed000000, 0xed000000 };
++
++/* Expected results with FP special inputs values (NaNs, ...).  */
++VECT_VAR_DECL(expected_fp1,hfloat,32,2) [] = { 0x7fc00000, 0x7fc00000 };
++VECT_VAR_DECL(expected_fp1,hfloat,32,4) [] = { 0x7f800000, 0x7f800000,
++					       0x7f800000, 0x7f800000 };
++
++/* Expected results with FP special inputs values
++   (negative, infinity).  */
++VECT_VAR_DECL(expected_fp2,hfloat,32,2) [] = { 0x7fc00000, 0x7fc00000 };
++VECT_VAR_DECL(expected_fp2,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results with FP special inputs values
++   (-0, -infinity).  */
++VECT_VAR_DECL(expected_fp3,hfloat,32,2) [] = { 0xff800000, 0xff800000 };
++VECT_VAR_DECL(expected_fp3,hfloat,32,4) [] = { 0x7fc00000, 0x7fc00000,
++					       0x7fc00000, 0x7fc00000 };
++
++#define TEST_MSG "VRSQRTE/VRSQRTEQ"
++void exec_vrsqrte(void)
++{
++  int i;
++
++  /* Basic test: y=vrsqrte(x), then store the result.  */
++#define TEST_VRSQRTE(Q, T1, T2, W, N)			\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vrsqrte##Q##_##T2##W(VECT_VAR(vector, T1, W, N));	\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),		\
++		    VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE(vector, uint, 32, 2);
++  DECL_VARIABLE(vector, float, 32, 2);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, float, 32, 4);
++
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++  DECL_VARIABLE(vector_res, float, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 32, 4);
++  DECL_VARIABLE(vector_res, float, 32, 4);
++
++  clean_results ();
++
++  /* Choose init value arbitrarily.  */
++  VDUP(vector, , uint, u, 32, 2, 0x12345678);
++  VDUP(vector, , float, f, 32, 2, 25.799999f);
++  VDUP(vector, q, uint, u, 32, 4, 0xABCDEF10);
++  VDUP(vector, q, float, f, 32, 4, 18.2f);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, uint, u, 32, 2);
++  TEST_VRSQRTE(, float, f, 32, 2);
++  TEST_VRSQRTE(q, uint, u, 32, 4);
++  TEST_VRSQRTE(q, float, f, 32, 4);
++
++#define CMT ""
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, CMT);
++
++
++  /* Don't test FP variants with negative inputs.  */
++  /* Use input with various values of bits 30 and 31.  */
++  VDUP(vector, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector, q, uint, u, 32, 4, 0x89081234);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, uint, u, 32, 2);
++  TEST_VRSQRTE(q, uint, u, 32, 4);
++
++#undef CMT
++#define CMT " (large uint #1)"
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_1, CMT);
++
++
++  /* Choose init value arbitrarily.  */
++  VDUP(vector, , uint, u, 32, 2, 0x80000000);
++  VDUP(vector, q, uint, u, 32, 4, 0x4ABCDEF0);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, uint, u, 32, 2);
++  TEST_VRSQRTE(q, uint, u, 32, 4);
++
++#undef CMT
++#define CMT " (large uint #2)"
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_2, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_2, CMT);
++
++
++  /* Test FP variants with special input values (NaNs, ...).  */
++  VDUP(vector, , float, f, 32, 2, NAN);
++  VDUP(vector, q, float, f, 32, 4, 0.0f);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, float, f, 32, 2);
++  TEST_VRSQRTE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (NaN, 0)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp1, CMT);
++
++
++  /* Test FP variants with special input values (negative, infinity).  */
++  VDUP(vector, , float, f, 32, 2, -1.0f);
++  VDUP(vector, q, float, f, 32, 4, HUGE_VALF);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, float, f, 32, 2);
++  TEST_VRSQRTE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (negative, infinity)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp2, CMT);
++
++  /* Test FP variants with special input values (-0, -infinity).  */
++  VDUP(vector, , float, f, 32, 2, -0.0f);
++  VDUP(vector, q, float, f, 32, 4, -HUGE_VALF);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTE(, float, f, 32, 2);
++  TEST_VRSQRTE(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (-0, -infinity)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp3, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp3, CMT);
++}
++
++int main (void)
++{
++  exec_vrsqrte ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c
+@@ -0,0 +1,118 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++#include <math.h>
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc2796b84, 0xc2796b84 };
++VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc0e4a3d8, 0xc0e4a3d8,
++					   0xc0e4a3d8, 0xc0e4a3d8 };
++
++/* Expected results with input=NaN.  */
++VECT_VAR_DECL(expected_nan,hfloat,32,2) [] = { 0x7fc00000, 0x7fc00000 };
++VECT_VAR_DECL(expected_nan,hfloat,32,4) [] = { 0x7fc00000, 0x7fc00000,
++					       0x7fc00000, 0x7fc00000 };
++
++/* Expected results with FP special inputs values (infinity, 0).  */
++VECT_VAR_DECL(expected_fp1,hfloat,32,2) [] = { 0xff800000, 0xff800000 };
++VECT_VAR_DECL(expected_fp1,hfloat,32,4) [] = { 0x3fc00000, 0x3fc00000,
++					       0x3fc00000, 0x3fc00000 };
++
++/* Expected results with only FP special inputs values (infinity,
++   0).  */
++VECT_VAR_DECL(expected_fp2,hfloat,32,2) [] = { 0x3fc00000, 0x3fc00000 };
++VECT_VAR_DECL(expected_fp2,hfloat,32,4) [] = { 0x3fc00000, 0x3fc00000,
++					       0x3fc00000, 0x3fc00000 };
++
++#define TEST_MSG "VRSQRTS/VRSQRTSQ"
++void exec_vrsqrts(void)
++{
++  int i;
++
++  /* Basic test: y=vrsqrts(x), then store the result.  */
++#define TEST_VRSQRTS(Q, T1, T2, W, N)			\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vrsqrts##Q##_##T2##W(VECT_VAR(vector, T1, W, N),	\
++			 VECT_VAR(vector2, T1, W, N));	\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N),		\
++		    VECT_VAR(vector_res, T1, W, N))
++
++  /* No need for integer variants.  */
++  DECL_VARIABLE(vector, float, 32, 2);
++  DECL_VARIABLE(vector, float, 32, 4);
++
++  DECL_VARIABLE(vector2, float, 32, 2);
++  DECL_VARIABLE(vector2, float, 32, 4);
++
++  DECL_VARIABLE(vector_res, float, 32, 2);
++  DECL_VARIABLE(vector_res, float, 32, 4);
++
++  clean_results ();
++
++  /* Choose init value arbitrarily.  */
++  VDUP(vector, , float, f, 32, 2, 12.9f);
++  VDUP(vector, q, float, f, 32, 4, 9.1f);
++
++  VDUP(vector2, , float, f, 32, 2, 9.9f);
++  VDUP(vector2, q, float, f, 32, 4, 1.9f);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTS(, float, f, 32, 2);
++  TEST_VRSQRTS(q, float, f, 32, 4);
++
++#define CMT ""
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected, CMT);
++
++
++  /* Test FP variants with special input values (NaN).  */
++  VDUP(vector, , float, f, 32, 2, NAN);
++  VDUP(vector2, q, float, f, 32, 4, NAN);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTS(, float, f, 32, 2);
++  TEST_VRSQRTS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (NAN) and normal values"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_nan, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_nan, CMT);
++
++
++  /* Test FP variants with special input values (infinity, 0).  */
++  VDUP(vector, , float, f, 32, 2, HUGE_VALF);
++  VDUP(vector, q, float, f, 32, 4, 0.0f);
++  /* Restore a normal value in vector2.  */
++  VDUP(vector2, q, float, f, 32, 4, 3.2f);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTS(, float, f, 32, 2);
++  TEST_VRSQRTS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " FP special (infinity, 0) and normal values"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp1, CMT);
++
++
++  /* Test FP variants with only special input values (infinity, 0).  */
++  VDUP(vector, , float, f, 32, 2, HUGE_VALF);
++  VDUP(vector, q, float, f, 32, 4, 0.0f);
++  VDUP(vector2, , float, f, 32, 2, -0.0f);
++  VDUP(vector2, q, float, f, 32, 4, HUGE_VALF);
++
++  /* Apply the operator.  */
++  TEST_VRSQRTS(, float, f, 32, 2);
++  TEST_VRSQRTS(q, float, f, 32, 4);
++
++#undef CMT
++#define CMT " only FP special (infinity, 0)"
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_fp2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_fp2, CMT);
++}
++
++int main (void)
++{
++  exec_vrsqrts ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c
+@@ -0,0 +1,553 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf9, 0xfa, 0xfb, 0xfc,
++				       0xfd, 0xfe, 0xff, 0x0 };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffd, 0xfffffffe };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x5, 0x6, 0x7, 0x8,
++					0x9, 0xa, 0xb, 0xc };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffd, 0xfffe, 0xffff, 0x0 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff4, 0xfffffff5 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xf9, 0xfa, 0xfb, 0xfc,
++					0xfd, 0xfe, 0xff, 0x0,
++					0x1, 0x2, 0x3, 0x4,
++					0x5, 0x6, 0x7, 0x8 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffd, 0xfffffffe,
++					0xffffffff, 0x0 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0, 0xfffffffffffffff1 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0x5, 0x6, 0x7, 0x8,
++					 0x9, 0xa, 0xb, 0xc,
++					 0xd, 0xe, 0xf, 0x10,
++					 0x11, 0x12, 0x13, 0x14 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfffd, 0xfffe, 0xffff, 0x0,
++					 0x1, 0x2, 0x3, 0x4 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff4, 0xfffffff5,
++					 0xfffffff6, 0xfffffff7 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
++					 0xfffffffffffffff1 };
++
++/* Expected results with max input and shift by 1.  */
++VECT_VAR_DECL(expected_max_sh1,int,8,8) [] = { 0x40, 0x40, 0x40, 0x40,
++					       0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh1,int,16,4) [] = { 0x4000, 0x4000, 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh1,int,32,2) [] = { 0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh1,int,64,1) [] = { 0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh1,uint,8,8) [] = { 0x80, 0x80, 0x80, 0x80,
++						0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh1,uint,16,4) [] = { 0x8000, 0x8000,
++						 0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh1,uint,32,2) [] = { 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh1,uint,64,1) [] = { 0x8000000000000000 };
++VECT_VAR_DECL(expected_max_sh1,int,8,16) [] = { 0x40, 0x40, 0x40, 0x40,
++						0x40, 0x40, 0x40, 0x40,
++						0x40, 0x40, 0x40, 0x40,
++						0x40, 0x40, 0x40, 0x40 };
++VECT_VAR_DECL(expected_max_sh1,int,16,8) [] = { 0x4000, 0x4000, 0x4000, 0x4000,
++						0x4000, 0x4000, 0x4000, 0x4000 };
++VECT_VAR_DECL(expected_max_sh1,int,32,4) [] = { 0x40000000, 0x40000000,
++						0x40000000, 0x40000000 };
++VECT_VAR_DECL(expected_max_sh1,int,64,2) [] = { 0x4000000000000000,
++						0x4000000000000000 };
++VECT_VAR_DECL(expected_max_sh1,uint,8,16) [] = { 0x80, 0x80, 0x80, 0x80,
++						 0x80, 0x80, 0x80, 0x80,
++						 0x80, 0x80, 0x80, 0x80,
++						 0x80, 0x80, 0x80, 0x80 };
++VECT_VAR_DECL(expected_max_sh1,uint,16,8) [] = { 0x8000, 0x8000,
++						 0x8000, 0x8000,
++						 0x8000, 0x8000,
++						 0x8000, 0x8000 };
++VECT_VAR_DECL(expected_max_sh1,uint,32,4) [] = { 0x80000000, 0x80000000,
++						 0x80000000, 0x80000000 };
++VECT_VAR_DECL(expected_max_sh1,uint,64,2) [] = { 0x8000000000000000,
++						 0x8000000000000000 };
++
++/* Expected results with max input and shift by 3.  */
++VECT_VAR_DECL(expected_max_sh3,int,8,8) [] = { 0x10, 0x10, 0x10, 0x10,
++					       0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh3,int,16,4) [] = { 0x1000, 0x1000, 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh3,int,32,2) [] = { 0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh3,int,64,1) [] = { 0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh3,uint,8,8) [] = { 0x20, 0x20, 0x20, 0x20,
++						0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh3,uint,16,4) [] = { 0x2000, 0x2000,
++						 0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh3,uint,32,2) [] = { 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh3,uint,64,1) [] = { 0x2000000000000000 };
++VECT_VAR_DECL(expected_max_sh3,int,8,16) [] = { 0x10, 0x10, 0x10, 0x10,
++						0x10, 0x10, 0x10, 0x10,
++						0x10, 0x10, 0x10, 0x10,
++						0x10, 0x10, 0x10, 0x10 };
++VECT_VAR_DECL(expected_max_sh3,int,16,8) [] = { 0x1000, 0x1000, 0x1000, 0x1000,
++						0x1000, 0x1000, 0x1000, 0x1000 };
++VECT_VAR_DECL(expected_max_sh3,int,32,4) [] = { 0x10000000, 0x10000000,
++						0x10000000, 0x10000000 };
++VECT_VAR_DECL(expected_max_sh3,int,64,2) [] = { 0x1000000000000000,
++						0x1000000000000000 };
++VECT_VAR_DECL(expected_max_sh3,uint,8,16) [] = { 0x20, 0x20, 0x20, 0x20,
++						 0x20, 0x20, 0x20, 0x20,
++						 0x20, 0x20, 0x20, 0x20,
++						 0x20, 0x20, 0x20, 0x20 };
++VECT_VAR_DECL(expected_max_sh3,uint,16,8) [] = { 0x2000, 0x2000,
++						 0x2000, 0x2000,
++						 0x2000, 0x2000,
++						 0x2000, 0x2000 };
++VECT_VAR_DECL(expected_max_sh3,uint,32,4) [] = { 0x20000000, 0x20000000,
++						 0x20000000, 0x20000000 };
++VECT_VAR_DECL(expected_max_sh3,uint,64,2) [] = { 0x2000000000000000,
++						 0x2000000000000000 };
++
++/* Expected results with max input and shift by type width.  */
++VECT_VAR_DECL(expected_max_shmax,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_max_shmax,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						  0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_max_shmax,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_max_shmax,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_max_shmax,uint,64,2) [] = { 0x1, 0x1 };
++
++/* Expected results with min negative input and shift by 1.  */
++VECT_VAR_DECL(expected_min_sh1,int,8,8) [] = { 0xc0, 0xc0, 0xc0, 0xc0,
++					       0xc0, 0xc0, 0xc0, 0xc0 };
++VECT_VAR_DECL(expected_min_sh1,int,16,4) [] = { 0xc000, 0xc000, 0xc000, 0xc000 };
++VECT_VAR_DECL(expected_min_sh1,int,32,2) [] = { 0xc0000000, 0xc0000000 };
++VECT_VAR_DECL(expected_min_sh1,int,64,1) [] = { 0xc000000000000000 };
++VECT_VAR_DECL(expected_min_sh1,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_min_sh1,int,8,16) [] = { 0xc0, 0xc0, 0xc0, 0xc0,
++						0xc0, 0xc0, 0xc0, 0xc0,
++						0xc0, 0xc0, 0xc0, 0xc0,
++						0xc0, 0xc0, 0xc0, 0xc0 };
++VECT_VAR_DECL(expected_min_sh1,int,16,8) [] = { 0xc000, 0xc000, 0xc000, 0xc000,
++						0xc000, 0xc000, 0xc000, 0xc000 };
++VECT_VAR_DECL(expected_min_sh1,int,32,4) [] = { 0xc0000000, 0xc0000000,
++						0xc0000000, 0xc0000000 };
++VECT_VAR_DECL(expected_min_sh1,int,64,2) [] = { 0xc000000000000000,
++						0xc000000000000000 };
++VECT_VAR_DECL(expected_min_sh1,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh1,uint,64,2) [] = { 0x1, 0x1 };
++
++/* Expected results with min negative input and shift by 3.  */
++VECT_VAR_DECL(expected_min_sh3,int,8,8) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
++					       0xf0, 0xf0, 0xf0, 0xf0 };
++VECT_VAR_DECL(expected_min_sh3,int,16,4) [] = { 0xf000, 0xf000, 0xf000, 0xf000 };
++VECT_VAR_DECL(expected_min_sh3,int,32,2) [] = { 0xf0000000, 0xf0000000 };
++VECT_VAR_DECL(expected_min_sh3,int,64,1) [] = { 0xf000000000000000 };
++VECT_VAR_DECL(expected_min_sh3,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_min_sh3,int,8,16) [] = { 0xf0, 0xf0, 0xf0, 0xf0,
++						0xf0, 0xf0, 0xf0, 0xf0,
++						0xf0, 0xf0, 0xf0, 0xf0,
++						0xf0, 0xf0, 0xf0, 0xf0 };
++VECT_VAR_DECL(expected_min_sh3,int,16,8) [] = { 0xf000, 0xf000, 0xf000, 0xf000,
++						0xf000, 0xf000, 0xf000, 0xf000 };
++VECT_VAR_DECL(expected_min_sh3,int,32,4) [] = { 0xf0000000, 0xf0000000,
++						0xf0000000, 0xf0000000 };
++VECT_VAR_DECL(expected_min_sh3,int,64,2) [] = { 0xf000000000000000,
++						0xf000000000000000 };
++VECT_VAR_DECL(expected_min_sh3,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_sh3,uint,64,2) [] = { 0x1, 0x1 };
++
++/* Expected results with min negative input and shift by type width.  */
++VECT_VAR_DECL(expected_min_shmax,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,64,1) [] = { 0x0 };
++VECT_VAR_DECL(expected_min_shmax,uint,8,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						  0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,16,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,32,2) [] = { 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,64,1) [] = { 0x1 };
++VECT_VAR_DECL(expected_min_shmax,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++						  0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,int,64,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_min_shmax,uint,8,16) [] = { 0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,16,8) [] = { 0x1, 0x1, 0x1, 0x1,
++						   0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,32,4) [] = { 0x1, 0x1, 0x1, 0x1 };
++VECT_VAR_DECL(expected_min_shmax,uint,64,2) [] = { 0x1, 0x1 };
++
++#define TEST_MSG "VRSRA_N"
++void exec_vrsra_n (void)
++{
++  /* Basic test: y=vrsra_n(x,v), then store the result.  */
++#define TEST_VRSRA_N(Q, T1, T2, W, N, V)				\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vrsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			 VECT_VAR(vector2, T1, W, N),			\
++			 V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector2);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose arbitrary initialization values.  */
++  VDUP(vector2, , int, s, 8, 8, 0x11);
++  VDUP(vector2, , int, s, 16, 4, 0x22);
++  VDUP(vector2, , int, s, 32, 2, 0x33);
++  VDUP(vector2, , int, s, 64, 1, 0x44);
++  VDUP(vector2, , uint, u, 8, 8, 0x55);
++  VDUP(vector2, , uint, u, 16, 4, 0x66);
++  VDUP(vector2, , uint, u, 32, 2, 0x77);
++  VDUP(vector2, , uint, u, 64, 1, 0x88);
++
++  VDUP(vector2, q, int, s, 8, 16, 0x11);
++  VDUP(vector2, q, int, s, 16, 8, 0x22);
++  VDUP(vector2, q, int, s, 32, 4, 0x33);
++  VDUP(vector2, q, int, s, 64, 2, 0x44);
++  VDUP(vector2, q, uint, u, 8, 16, 0x55);
++  VDUP(vector2, q, uint, u, 16, 8, 0x66);
++  VDUP(vector2, q, uint, u, 32, 4, 0x77);
++  VDUP(vector2, q, uint, u, 64, 2, 0x88);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 1);
++  TEST_VRSRA_N(, int, s, 16, 4, 12);
++  TEST_VRSRA_N(, int, s, 32, 2, 2);
++  TEST_VRSRA_N(, int, s, 64, 1, 32);
++  TEST_VRSRA_N(, uint, u, 8, 8, 2);
++  TEST_VRSRA_N(, uint, u, 16, 4, 3);
++  TEST_VRSRA_N(, uint, u, 32, 2, 5);
++  TEST_VRSRA_N(, uint, u, 64, 1, 33);
++
++  TEST_VRSRA_N(q, int, s, 8, 16, 1);
++  TEST_VRSRA_N(q, int, s, 16, 8, 12);
++  TEST_VRSRA_N(q, int, s, 32, 4, 2);
++  TEST_VRSRA_N(q, int, s, 64, 2, 32);
++  TEST_VRSRA_N(q, uint, u, 8, 16, 2);
++  TEST_VRSRA_N(q, uint, u, 16, 8, 3);
++  TEST_VRSRA_N(q, uint, u, 32, 4, 5);
++  TEST_VRSRA_N(q, uint, u, 64, 2, 33);
++
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++
++
++  /* Initialize the accumulator with 0.  */
++  VDUP(vector, , int, s, 8, 8, 0);
++  VDUP(vector, , int, s, 16, 4, 0);
++  VDUP(vector, , int, s, 32, 2, 0);
++  VDUP(vector, , int, s, 64, 1, 0);
++  VDUP(vector, , uint, u, 8, 8, 0);
++  VDUP(vector, , uint, u, 16, 4, 0);
++  VDUP(vector, , uint, u, 32, 2, 0);
++  VDUP(vector, , uint, u, 64, 1, 0);
++  VDUP(vector, q, int, s, 8, 16, 0);
++  VDUP(vector, q, int, s, 16, 8, 0);
++  VDUP(vector, q, int, s, 32, 4, 0);
++  VDUP(vector, q, int, s, 64, 2, 0);
++  VDUP(vector, q, uint, u, 8, 16, 0);
++  VDUP(vector, q, uint, u, 16, 8, 0);
++  VDUP(vector, q, uint, u, 32, 4, 0);
++  VDUP(vector, q, uint, u, 64, 2, 0);
++
++  /* Initialize with max values to check overflow.  */
++  VDUP(vector2, , int, s, 8, 8, 0x7F);
++  VDUP(vector2, , int, s, 16, 4, 0x7FFF);
++  VDUP(vector2, , int, s, 32, 2, 0x7FFFFFFF);
++  VDUP(vector2, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector2, , uint, u, 8, 8, 0xFF);
++  VDUP(vector2, , uint, u, 16, 4, 0xFFFF);
++  VDUP(vector2, , uint, u, 32, 2, 0xFFFFFFFF);
++  VDUP(vector2, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
++  VDUP(vector2, q, int, s, 8, 16, 0x7F);
++  VDUP(vector2, q, int, s, 16, 8, 0x7FFF);
++  VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF);
++  VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
++  VDUP(vector2, q, uint, u, 8, 16, 0xFF);
++  VDUP(vector2, q, uint, u, 16, 8, 0xFFFF);
++  VDUP(vector2, q, uint, u, 32, 4, 0xFFFFFFFF);
++  VDUP(vector2, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
++
++  /* Shift by 1 to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 1);
++  TEST_VRSRA_N(, int, s, 16, 4, 1);
++  TEST_VRSRA_N(, int, s, 32, 2, 1);
++  TEST_VRSRA_N(, int, s, 64, 1, 1);
++  TEST_VRSRA_N(, uint, u, 8, 8, 1);
++  TEST_VRSRA_N(, uint, u, 16, 4, 1);
++  TEST_VRSRA_N(, uint, u, 32, 2, 1);
++  TEST_VRSRA_N(, uint, u, 64, 1, 1);
++  TEST_VRSRA_N(q, int, s, 8, 16, 1);
++  TEST_VRSRA_N(q, int, s, 16, 8, 1);
++  TEST_VRSRA_N(q, int, s, 32, 4, 1);
++  TEST_VRSRA_N(q, int, s, 64, 2, 1);
++  TEST_VRSRA_N(q, uint, u, 8, 16, 1);
++  TEST_VRSRA_N(q, uint, u, 16, 8, 1);
++  TEST_VRSRA_N(q, uint, u, 32, 4, 1);
++  TEST_VRSRA_N(q, uint, u, 64, 2, 1);
++
++#undef CMT
++#define CMT " (checking overflow: shift by 1, max input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh1, CMT);
++
++
++  /* Shift by 3 to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 3);
++  TEST_VRSRA_N(, int, s, 16, 4, 3);
++  TEST_VRSRA_N(, int, s, 32, 2, 3);
++  TEST_VRSRA_N(, int, s, 64, 1, 3);
++  TEST_VRSRA_N(, uint, u, 8, 8, 3);
++  TEST_VRSRA_N(, uint, u, 16, 4, 3);
++  TEST_VRSRA_N(, uint, u, 32, 2, 3);
++  TEST_VRSRA_N(, uint, u, 64, 1, 3);
++  TEST_VRSRA_N(q, int, s, 8, 16, 3);
++  TEST_VRSRA_N(q, int, s, 16, 8, 3);
++  TEST_VRSRA_N(q, int, s, 32, 4, 3);
++  TEST_VRSRA_N(q, int, s, 64, 2, 3);
++  TEST_VRSRA_N(q, uint, u, 8, 16, 3);
++  TEST_VRSRA_N(q, uint, u, 16, 8, 3);
++  TEST_VRSRA_N(q, uint, u, 32, 4, 3);
++  TEST_VRSRA_N(q, uint, u, 64, 2, 3);
++
++#undef CMT
++#define CMT " (checking overflow: shift by 3, max input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_sh3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_sh3, CMT);
++
++
++  /* Shift by max to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 8);
++  TEST_VRSRA_N(, int, s, 16, 4, 16);
++  TEST_VRSRA_N(, int, s, 32, 2, 32);
++  TEST_VRSRA_N(, int, s, 64, 1, 64);
++  TEST_VRSRA_N(, uint, u, 8, 8, 8);
++  TEST_VRSRA_N(, uint, u, 16, 4, 16);
++  TEST_VRSRA_N(, uint, u, 32, 2, 32);
++  TEST_VRSRA_N(, uint, u, 64, 1, 64);
++  TEST_VRSRA_N(q, int, s, 8, 16, 8);
++  TEST_VRSRA_N(q, int, s, 16, 8, 16);
++  TEST_VRSRA_N(q, int, s, 32, 4, 32);
++  TEST_VRSRA_N(q, int, s, 64, 2, 64);
++  TEST_VRSRA_N(q, uint, u, 8, 16, 8);
++  TEST_VRSRA_N(q, uint, u, 16, 8, 16);
++  TEST_VRSRA_N(q, uint, u, 32, 4, 32);
++  TEST_VRSRA_N(q, uint, u, 64, 2, 64);
++
++#undef CMT
++#define CMT " (checking overflow: shift by max, max input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shmax, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_max_shmax, CMT);
++
++
++  /* Initialize with min values to check overflow.  */
++  VDUP(vector2, , int, s, 8, 8, 0x80);
++  VDUP(vector2, , int, s, 16, 4, 0x8000);
++  VDUP(vector2, , int, s, 32, 2, 0x80000000);
++  VDUP(vector2, , int, s, 64, 1, 0x8000000000000000LL);
++  VDUP(vector2, q, int, s, 8, 16, 0x80);
++  VDUP(vector2, q, int, s, 16, 8, 0x8000);
++  VDUP(vector2, q, int, s, 32, 4, 0x80000000);
++  VDUP(vector2, q, int, s, 64, 2, 0x8000000000000000ULL);
++
++  /* Shift by 1 to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 1);
++  TEST_VRSRA_N(, int, s, 16, 4, 1);
++  TEST_VRSRA_N(, int, s, 32, 2, 1);
++  TEST_VRSRA_N(, int, s, 64, 1, 1);
++  TEST_VRSRA_N(q, int, s, 8, 16, 1);
++  TEST_VRSRA_N(q, int, s, 16, 8, 1);
++  TEST_VRSRA_N(q, int, s, 32, 4, 1);
++  TEST_VRSRA_N(q, int, s, 64, 2, 1);
++
++#undef CMT
++#define CMT " (checking overflow: shift by 1, min negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_min_sh1, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_min_sh1, CMT);
++
++
++  /* Shift by 3 to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 3);
++  TEST_VRSRA_N(, int, s, 16, 4, 3);
++  TEST_VRSRA_N(, int, s, 32, 2, 3);
++  TEST_VRSRA_N(, int, s, 64, 1, 3);
++  TEST_VRSRA_N(q, int, s, 8, 16, 3);
++  TEST_VRSRA_N(q, int, s, 16, 8, 3);
++  TEST_VRSRA_N(q, int, s, 32, 4, 3);
++  TEST_VRSRA_N(q, int, s, 64, 2, 3);
++
++#undef CMT
++#define CMT " (checking overflow: shift by 3, min negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_min_sh3, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_min_sh3, CMT);
++
++
++  /* Shift by max to check overflow with rounding constant.  */
++  TEST_VRSRA_N(, int, s, 8, 8, 8);
++  TEST_VRSRA_N(, int, s, 16, 4, 16);
++  TEST_VRSRA_N(, int, s, 32, 2, 32);
++  TEST_VRSRA_N(, int, s, 64, 1, 64);
++  TEST_VRSRA_N(q, int, s, 8, 16, 8);
++  TEST_VRSRA_N(q, int, s, 16, 8, 16);
++  TEST_VRSRA_N(q, int, s, 32, 4, 32);
++  TEST_VRSRA_N(q, int, s, 64, 2, 64);
++
++#undef CMT
++#define CMT " (checking overflow: shift by max, min negative input)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_min_shmax, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_min_shmax, CMT);
++}
++
++int main (void)
++{
++  exec_vrsra_n ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc
+@@ -68,7 +68,24 @@ void FNNAME (INSN_NAME) (void)
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 3);
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 12);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected, "");
+ 
+ #ifdef EXTRA_TESTS
+   EXTRA_TESTS();
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vset_lane.c
+@@ -0,0 +1,112 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++				       0xf4, 0xf5, 0xf6, 0x11 };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0x22 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff0, 0x33 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0x44 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					0xf4, 0xf5, 0x55, 0xf7 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff0, 0xfff1, 0x66, 0xfff3 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff0, 0x77 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x88 };
++VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					0xf4, 0xf5, 0x55, 0xf7 };
++VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff0, 0xfff1, 0x66, 0xfff3 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xcc00, 0xcb80, 0x4840, 0xca80 };
++VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1800000, 0x4204cccd };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					0xf4, 0xf5, 0xf6, 0xf7,
++					0xf8, 0xf9, 0xfa, 0xfb,
++					0xfc, 0xfd, 0xfe, 0x99 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					0xfff4, 0xaa, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					0xfffffff2, 0xbb };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0, 0xcc };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					 0xf4, 0xf5, 0xf6, 0xf7,
++					 0xf8, 0xf9, 0xfa, 0xfb,
++					 0xfc, 0xfd, 0xdd, 0xff };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					 0xfff4, 0xfff5, 0xee, 0xfff7 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					 0xff, 0xfffffff3 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0, 0x11 };
++VECT_VAR_DECL(expected,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					 0xf4, 0xf5, 0xf6, 0xf7,
++					 0xf8, 0xf9, 0xfa, 0xfb,
++					 0xfc, 0xfd, 0xdd, 0xff };
++VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					 0xfff4, 0xfff5, 0xee, 0xfff7 };
++VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xcc00, 0xcb80, 0xcb00, 0xca80,
++					   0xca00, 0x4480, 0xc900, 0xc880 };
++VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
++					   0xc1600000, 0x41333333 };
++
++#define TEST_MSG "VSET_LANE/VSET_LANEQ"
++void exec_vset_lane (void)
++{
++  /* vec=vset_lane(val, vec, lane), then store the result.  */
++#define TEST_VSET_LANE(Q, T1, T2, W, N, V, L)				\
++  VECT_VAR(vector, T1, W, N) =						\
++    vset##Q##_lane_##T2##W(V,						\
++			   VECT_VAR(vector, T1, W, N),			\
++			   L);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  VLOAD(vector, buffer, , float, f, 16, 4);
++  VLOAD(vector, buffer, q, float, f, 16, 8);
++#endif
++  VLOAD(vector, buffer, , float, f, 32, 2);
++  VLOAD(vector, buffer, q, float, f, 32, 4);
++
++  /* Choose value and lane arbitrarily.  */
++  TEST_VSET_LANE(, int, s, 8, 8, 0x11, 7);
++  TEST_VSET_LANE(, int, s, 16, 4, 0x22, 3);
++  TEST_VSET_LANE(, int, s, 32, 2, 0x33, 1);
++  TEST_VSET_LANE(, int, s, 64, 1, 0x44, 0);
++  TEST_VSET_LANE(, uint, u, 8, 8, 0x55, 6);
++  TEST_VSET_LANE(, uint, u, 16, 4, 0x66, 2);
++  TEST_VSET_LANE(, uint, u, 32, 2, 0x77, 1);
++  TEST_VSET_LANE(, uint, u, 64, 1, 0x88, 0);
++  TEST_VSET_LANE(, poly, p, 8, 8, 0x55, 6);
++  TEST_VSET_LANE(, poly, p, 16, 4, 0x66, 2);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VSET_LANE(, float, f, 16, 4, 8.5f, 2);
++#endif
++  TEST_VSET_LANE(, float, f, 32, 2, 33.2f, 1);
++
++  TEST_VSET_LANE(q, int, s, 8, 16, 0x99, 15);
++  TEST_VSET_LANE(q, int, s, 16, 8, 0xAA, 5);
++  TEST_VSET_LANE(q, int, s, 32, 4, 0xBB, 3);
++  TEST_VSET_LANE(q, int, s, 64, 2, 0xCC, 1);
++  TEST_VSET_LANE(q, uint, u, 8, 16, 0xDD, 14);
++  TEST_VSET_LANE(q, uint, u, 16, 8, 0xEE, 6);
++  TEST_VSET_LANE(q, uint, u, 32, 4, 0xFF, 2);
++  TEST_VSET_LANE(q, uint, u, 64, 2, 0x11, 1);
++  TEST_VSET_LANE(q, poly, p, 8, 16, 0xDD, 14);
++  TEST_VSET_LANE(q, poly, p, 16, 8, 0xEE, 6);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VSET_LANE(q, float, f, 16, 8, 4.5f, 5);
++#endif
++  TEST_VSET_LANE(q, float, f, 32, 4, 11.2f, 3);
++
++  CHECK_RESULTS(TEST_MSG, "");
++}
++
++int main (void)
++{
++  exec_vset_lane ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl.c
+@@ -13,11 +13,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff80, 0xff88, 0xff90, 0xff98 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffff000, 0xfffff100 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffff80 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333,
+-					 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x20, 0x40, 0x60,
+ 					0x80, 0xa0, 0xc0, 0xe0,
+ 					0x0, 0x20, 0x40, 0x60,
+@@ -36,14 +31,6 @@ VECT_VAR_DECL(expected,uint,16,8) [] = { 0x0, 0x1000, 0x2000, 0x3000,
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0x0, 0x40000000,
+ 					 0x80000000, 0xc0000000 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0x0, 0x8000000000000000 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results with large shift amount.  */
+ VECT_VAR_DECL(expected_large_shift,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
+@@ -56,11 +43,6 @@ VECT_VAR_DECL(expected_large_shift,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ VECT_VAR_DECL(expected_large_shift,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+ VECT_VAR_DECL(expected_large_shift,uint,32,2) [] = { 0x0, 0x0 };
+ VECT_VAR_DECL(expected_large_shift,uint,64,1) [] = { 0x0 };
+-VECT_VAR_DECL(expected_large_shift,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-						    0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_large_shift,poly,16,4) [] = { 0x3333, 0x3333,
+-						     0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_large_shift,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected_large_shift,int,8,16) [] = { 0x0, 0x0, 0x0, 0x0,
+ 						    0x0, 0x0, 0x0, 0x0,
+ 						    0x0, 0x0, 0x0, 0x0,
+@@ -77,16 +59,6 @@ VECT_VAR_DECL(expected_large_shift,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
+ 						     0x0, 0x0, 0x0, 0x0 };
+ VECT_VAR_DECL(expected_large_shift,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
+ VECT_VAR_DECL(expected_large_shift,uint,64,2) [] = { 0x0, 0x0 };
+-VECT_VAR_DECL(expected_large_shift,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-						     0x33, 0x33, 0x33, 0x33,
+-						     0x33, 0x33, 0x33, 0x33,
+-						     0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_large_shift,poly,16,8) [] = { 0x3333, 0x3333,
+-						     0x3333, 0x3333,
+-						     0x3333, 0x3333,
+-						     0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_large_shift,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						       0x33333333, 0x33333333 };
+ 
+ 
+ /* Expected results with negative shift amount.  */
+@@ -103,12 +75,6 @@ VECT_VAR_DECL(expected_negative_shift,uint,16,4) [] = { 0x7ff8, 0x7ff8,
+ VECT_VAR_DECL(expected_negative_shift,uint,32,2) [] = { 0x3ffffffc,
+ 							0x3ffffffc };
+ VECT_VAR_DECL(expected_negative_shift,uint,64,1) [] = { 0xfffffffffffffff };
+-VECT_VAR_DECL(expected_negative_shift,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-						       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_negative_shift,poly,16,4) [] = { 0x3333, 0x3333,
+-							0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_negative_shift,hfloat,32,2) [] = { 0x33333333,
+-							  0x33333333 };
+ VECT_VAR_DECL(expected_negative_shift,int,8,16) [] = { 0xfc, 0xfc, 0xfc, 0xfc,
+ 						       0xfd, 0xfd, 0xfd, 0xfd,
+ 						       0xfe, 0xfe, 0xfe, 0xfe,
+@@ -133,18 +99,6 @@ VECT_VAR_DECL(expected_negative_shift,uint,32,4) [] = { 0x1ffffffe, 0x1ffffffe,
+ 							0x1ffffffe, 0x1ffffffe };
+ VECT_VAR_DECL(expected_negative_shift,uint,64,2) [] = { 0x7ffffffffffffff,
+ 							0x7ffffffffffffff };
+-VECT_VAR_DECL(expected_negative_shift,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-							0x33, 0x33, 0x33, 0x33,
+-							0x33, 0x33, 0x33, 0x33,
+-							0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected_negative_shift,poly,16,8) [] = { 0x3333, 0x3333,
+-							0x3333, 0x3333,
+-							0x3333, 0x3333,
+-							0x3333, 0x3333 };
+-VECT_VAR_DECL(expected_negative_shift,hfloat,32,4) [] = { 0x33333333,
+-							  0x33333333,
+-							  0x33333333,
+-							  0x33333333 };
+ 
+ 
+ #ifndef INSN_NAME
+@@ -187,7 +141,22 @@ void FNNAME (INSN_NAME) (void)
+   /* Execute the tests.  */
+   TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
+ 
+-  CHECK_RESULTS (TEST_MSG, "");
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
+ 
+ 
+   /* Test large shift amount (larger or equal to the type width.  */
+@@ -203,7 +172,23 @@ void FNNAME (INSN_NAME) (void)
+   /* Execute the tests.  */
+   TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_large_shift, "(large shift amount)");
++#define COMMENT1 "(large shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_large_shift, COMMENT1);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_large_shift, COMMENT1);
+ 
+ 
+   /* Test negative shift amount. */
+@@ -219,7 +204,23 @@ void FNNAME (INSN_NAME) (void)
+   /* Execute the tests.  */
+   TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_negative_shift, "(negative shift amount)");
++#define COMMENT2 "(negative shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_negative_shift, COMMENT2);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected_negative_shift, COMMENT2);
+ }
+ 
+ int main (void)
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshl_n.c
+@@ -0,0 +1,96 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xe0, 0xe2, 0xe4, 0xe6,
++				       0xe8, 0xea, 0xec, 0xee };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xffffff80, 0xffffff88 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffffc0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
++					0xd0, 0xd4, 0xd8, 0xdc };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xff00, 0xff10, 0xff20, 0xff30 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffff80, 0xffffff88 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffe0 };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0x0, 0x20, 0x40, 0x60,
++					0x80, 0xa0, 0xc0, 0xe0,
++					0x0, 0x20, 0x40, 0x60,
++					0x80, 0xa0, 0xc0, 0xe0 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6,
++					0xffe8, 0xffea, 0xffec, 0xffee };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffc0, 0xffffffc4,
++					0xffffffc8, 0xffffffcc };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffc0, 0xffffffffffffffc4 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xc0, 0xc4, 0xc8, 0xcc,
++					 0xd0, 0xd4, 0xd8, 0xdc,
++					 0xe0, 0xe4, 0xe8, 0xec,
++					 0xf0, 0xf4, 0xf8, 0xfc };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xff80, 0xff88, 0xff90, 0xff98,
++					 0xffa0, 0xffa8, 0xffb0, 0xffb8 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffc0, 0xffffffc4,
++					 0xffffffc8, 0xffffffcc };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffe0,
++					 0xffffffffffffffe2 };
++
++#define TEST_MSG "VSHL_N"
++void exec_vshl_n (void)
++{
++  /* Basic test: v2=vshl_n(v1,v), then store the result.  */
++#define TEST_VSHL_N(Q, T1, T2, W, N, V)					\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vshl##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VSHL_N(, int, s, 8, 8, 1);
++  TEST_VSHL_N(, int, s, 16, 4, 1);
++  TEST_VSHL_N(, int, s, 32, 2, 3);
++  TEST_VSHL_N(, int, s, 64, 1, 2);
++  TEST_VSHL_N(, uint, u, 8, 8, 2);
++  TEST_VSHL_N(, uint, u, 16, 4, 4);
++  TEST_VSHL_N(, uint, u, 32, 2, 3);
++  TEST_VSHL_N(, uint, u, 64, 1, 1);
++
++  TEST_VSHL_N(q, int, s, 8, 16, 5);
++  TEST_VSHL_N(q, int, s, 16, 8, 1);
++  TEST_VSHL_N(q, int, s, 32, 4, 2);
++  TEST_VSHL_N(q, int, s, 64, 2, 2);
++  TEST_VSHL_N(q, uint, u, 8, 16, 2);
++  TEST_VSHL_N(q, uint, u, 16, 8, 3);
++  TEST_VSHL_N(q, uint, u, 32, 4, 2);
++  TEST_VSHL_N(q, uint, u, 64, 2, 1);
++
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vshl_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshll_n.c
+@@ -0,0 +1,56 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xffe0, 0xffe2, 0xffe4, 0xffe6,
++					0xffe8, 0xffea, 0xffec, 0xffee };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xffffffe0, 0xffffffe2,
++					0xffffffe4, 0xffffffe6 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffff80, 0xffffffffffffff88 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3c0, 0x3c4, 0x3c8, 0x3cc,
++					 0x3d0, 0x3d4, 0x3d8, 0x3dc };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfff00, 0xfff10, 0xfff20, 0xfff30 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0x7ffffff80, 0x7ffffff88 };
++
++#define TEST_MSG "VSHLL_N"
++void exec_vshll_n (void)
++{
++  /* Basic test: v2=vshll_n(v1,v), then store the result.  */
++#define TEST_VSHLL_N(T1, T2, W, W2, N, V)				\
++  VECT_VAR(vector_res, T1, W2, N) =					\
++    vshll##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++		      V);						\
++  vst1q##_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector_res, T1, W2, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VSHLL_N(int, s, 8, 16, 8, 1);
++  TEST_VSHLL_N(int, s, 16, 32, 4, 1);
++  TEST_VSHLL_N(int, s, 32, 64, 2, 3);
++  TEST_VSHLL_N(uint, u, 8, 16, 8, 2);
++  TEST_VSHLL_N(uint, u, 16, 32, 4, 4);
++  TEST_VSHLL_N(uint, u, 32, 64, 2, 3);
++
++#undef CMT
++#define CMT ""
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vshll_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshr_n.c
+@@ -0,0 +1,95 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
++				       0xfa, 0xfa, 0xfb, 0xfb };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xffffffffffffffff };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x3c, 0x3c, 0x3c, 0x3c,
++					0x3d, 0x3d, 0x3d, 0x3d };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0x1ffe, 0x1ffe, 0x1ffe, 0x1ffe };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0x7ffffff, 0x7ffffff };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0x7fffffff };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
++					0xfa, 0xfa, 0xfb, 0xfb,
++					0xfc, 0xfc, 0xfd, 0xfd,
++					0xfe, 0xfe, 0xff, 0xff };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xffff, 0xffff, 0xffff, 0xffff,
++					0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffc, 0xfffffffc,
++					0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xffffffffffffffff, 0xffffffffffffffff };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0x3c, 0x3c, 0x3c, 0x3c,
++					 0x3d, 0x3d, 0x3d, 0x3d,
++					 0x3e, 0x3e, 0x3e, 0x3e,
++					 0x3f, 0x3f, 0x3f, 0x3f };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0x1ffe, 0x1ffe, 0x1ffe, 0x1ffe,
++					 0x1ffe, 0x1ffe, 0x1ffe, 0x1ffe };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0x7ffffff, 0x7ffffff,
++					 0x7ffffff, 0x7ffffff };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0x7fffffff, 0x7fffffff };
++
++#define TEST_MSG "VSHR_N"
++void exec_vshr_n (void)
++{
++  /* Basic test: y=vshr_n(x,v), then store the result.  */
++#define TEST_VSHR_N(Q, T1, T2, W, N, V)					\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vshr##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VSHR_N(, int, s, 8, 8, 1);
++  TEST_VSHR_N(, int, s, 16, 4, 12);
++  TEST_VSHR_N(, int, s, 32, 2, 2);
++  TEST_VSHR_N(, int, s, 64, 1, 32);
++  TEST_VSHR_N(, uint, u, 8, 8, 2);
++  TEST_VSHR_N(, uint, u, 16, 4, 3);
++  TEST_VSHR_N(, uint, u, 32, 2, 5);
++  TEST_VSHR_N(, uint, u, 64, 1, 33);
++
++  TEST_VSHR_N(q, int, s, 8, 16, 1);
++  TEST_VSHR_N(q, int, s, 16, 8, 12);
++  TEST_VSHR_N(q, int, s, 32, 4, 2);
++  TEST_VSHR_N(q, int, s, 64, 2, 32);
++  TEST_VSHR_N(q, uint, u, 8, 16, 2);
++  TEST_VSHR_N(q, uint, u, 16, 8, 3);
++  TEST_VSHR_N(q, uint, u, 32, 4, 5);
++  TEST_VSHR_N(q, uint, u, 64, 2, 33);
++
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vshr_n ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c
+@@ -0,0 +1,70 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf8, 0xf9, 0xf9,
++				       0xfa, 0xfa, 0xfb, 0xfb };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff8, 0xfff8, 0xfff9, 0xfff9 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffc };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xfc, 0xfc, 0xfc, 0xfc,
++					0xfd, 0xfd, 0xfd, 0xfd };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffe, 0xfffe, 0xfffe, 0xfffe };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffffe, 0xfffffffe };
++
++#define TEST_MSG "VSHRN_N"
++void exec_vshrn_n (void)
++{
++  /* Basic test: y=vshrn_n(x,v), then store the result.  */
++#define TEST_VSHRN_N(T1, T2, W, W2, N, V)				\
++  VECT_VAR(vector_res, T1, W2, N) =					\
++    vshrn_n_##T2##W(VECT_VAR(vector, T1, W, N),				\
++		    V);							\
++  vst1_##T2##W2(VECT_VAR(result, T1, W2, N), VECT_VAR(vector_res, T1, W2, N))
++
++  /* vector is twice as large as vector_res.  */
++  DECL_VARIABLE(vector, int, 16, 8);
++  DECL_VARIABLE(vector, int, 32, 4);
++  DECL_VARIABLE(vector, int, 64, 2);
++  DECL_VARIABLE(vector, uint, 16, 8);
++  DECL_VARIABLE(vector, uint, 32, 4);
++  DECL_VARIABLE(vector, uint, 64, 2);
++
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, int, 16, 4);
++  DECL_VARIABLE(vector_res, int, 32, 2);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 16, 4);
++  DECL_VARIABLE(vector_res, uint, 32, 2);
++
++  clean_results ();
++
++  VLOAD(vector, buffer, q, int, s, 16, 8);
++  VLOAD(vector, buffer, q, int, s, 32, 4);
++  VLOAD(vector, buffer, q, int, s, 64, 2);
++  VLOAD(vector, buffer, q, uint, u, 16, 8);
++  VLOAD(vector, buffer, q, uint, u, 32, 4);
++  VLOAD(vector, buffer, q, uint, u, 64, 2);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VSHRN_N(int, s, 16, 8, 8, 1);
++  TEST_VSHRN_N(int, s, 32, 16, 4, 1);
++  TEST_VSHRN_N(int, s, 64, 32, 2, 2);
++  TEST_VSHRN_N(uint, u, 16, 8, 8, 2);
++  TEST_VSHRN_N(uint, u, 32, 16, 4, 3);
++  TEST_VSHRN_N(uint, u, 64, 32, 2, 3);
++
++#define CMT ""
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, CMT);
++}
++
++int main (void)
++{
++  exec_vshrn_n ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc
+@@ -120,15 +120,40 @@ void FNNAME (INSN_NAME) (void)
+   TEST_EXTRA_CHUNK(poly, 16, 8, 1);		\
+   TEST_EXTRA_CHUNK(float, 32, 4, 1)
+ 
++  /* vshuffle support all vector types except [u]int64x1 and
++     [u]int64x2.  */
++#define CHECK_RESULTS_VSHUFFLE(test_name,EXPECTED,comment)		\
++  {									\
++    CHECK(test_name, int, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 2, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment);	\
++									\
++    CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, int, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, int, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, uint, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, uint, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK(test_name, uint, 32, 4, PRIx32, EXPECTED, comment);		\
++    CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment);		\
++    CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment);		\
++    CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment);	\
++  }									\
++
+   clean_results ();
+ 
+   /* Execute the tests.  */
+   TEST_ALL_VSHUFFLE(INSN_NAME);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected0, "(chunk 0)");
++  CHECK_RESULTS_VSHUFFLE (TEST_MSG, expected0, "(chunk 0)");
+ 
+   TEST_ALL_EXTRA_CHUNKS();
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected1, "(chunk 1)");
++  CHECK_RESULTS_VSHUFFLE (TEST_MSG, expected1, "(chunk 1)");
+ }
+ 
+ int main (void)
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
+@@ -23,7 +23,6 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0x10 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0x50, 0x51, 0x52, 0x53,
+ 					0x50, 0x51, 0x52, 0x53 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0x7bf0, 0x7bf1, 0x7bf2, 0x7bf3 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xd0, 0xd1, 0xd2, 0xd3,
+ 					0xd4, 0xd5, 0xd6, 0xd7,
+ 					0xd8, 0xd9, 0xda, 0xdb,
+@@ -48,8 +47,6 @@ VECT_VAR_DECL(expected,poly,8,16) [] = { 0x60, 0x61, 0x62, 0x63,
+ 					 0x64, 0x65, 0x66, 0x67 };
+ VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3ff0, 0x3ff1, 0x3ff2, 0x3ff3,
+ 					 0x3ff4, 0x3ff5, 0x3ff6, 0x3ff7 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results with max shift amount.  */
+ VECT_VAR_DECL(expected_max_shift,int,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
+@@ -68,7 +65,6 @@ VECT_VAR_DECL(expected_max_shift,poly,8,8) [] = { 0x70, 0x71, 0x72, 0x73,
+ 						  0x74, 0x75, 0x76, 0x77 };
+ VECT_VAR_DECL(expected_max_shift,poly,16,4) [] = { 0x7ff0, 0x7ff1,
+ 						   0x7ff2, 0x7ff3 };
+-VECT_VAR_DECL(expected_max_shift,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected_max_shift,int,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
+ 						  0x74, 0x75, 0x76, 0x77,
+ 						  0x78, 0x79, 0x7a, 0x7b,
+@@ -95,8 +91,6 @@ VECT_VAR_DECL(expected_max_shift,poly,8,16) [] = { 0x70, 0x71, 0x72, 0x73,
+ 						   0x7c, 0x7d, 0x7e, 0x7f };
+ VECT_VAR_DECL(expected_max_shift,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						   0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+-VECT_VAR_DECL(expected_max_shift,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						     0x33333333, 0x33333333 };
+ 
+ #include "vsXi_n.inc"
+ 
+@@ -158,5 +152,23 @@ void vsli_extra(void)
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 7);
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 15);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_max_shift, "(max shift amount)");
++#define COMMENT "(max shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
+ }
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsra_n.c
+@@ -0,0 +1,117 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
++				       0xfc, 0xfd, 0xfe, 0xff };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffd };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0x5, 0x6, 0x7, 0x8,
++					0x9, 0xa, 0xb, 0xc };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff3, 0xfffffff4 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
++					0xfc, 0xfd, 0xfe, 0xff,
++					0x0, 0x1, 0x2, 0x3,
++					0x4, 0x5, 0x6, 0x7 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					0xfff4, 0xfff5, 0xfff6, 0xfff7 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffc, 0xfffffffd,
++					0xfffffffe, 0xffffffff };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0,
++					0xfffffffffffffff1 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0x5, 0x6, 0x7, 0x8,
++					 0x9, 0xa, 0xb, 0xc,
++					 0xd, 0xe, 0xf, 0x10,
++					 0x11, 0x12, 0x13, 0x14 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff,
++					 0x0, 0x1, 0x2, 0x3 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff3, 0xfffffff4,
++					 0xfffffff5, 0xfffffff6 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
++					 0xfffffffffffffff1 };
++
++#define TEST_MSG "VSRA_N"
++void exec_vsra_n (void)
++{
++  /* Basic test: y=vsra_n(x,v), then store the result.  */
++#define TEST_VSRA_N(Q, T1, T2, W, N, V)					\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N),			\
++			VECT_VAR(vector2, T1, W, N),			\
++			V);						\
++  vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector2);
++  DECL_VARIABLE_ALL_VARIANTS(vector_res);
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose arbitrary initialization values.  */
++  VDUP(vector2, , int, s, 8, 8, 0x11);
++  VDUP(vector2, , int, s, 16, 4, 0x22);
++  VDUP(vector2, , int, s, 32, 2, 0x33);
++  VDUP(vector2, , int, s, 64, 1, 0x44);
++  VDUP(vector2, , uint, u, 8, 8, 0x55);
++  VDUP(vector2, , uint, u, 16, 4, 0x66);
++  VDUP(vector2, , uint, u, 32, 2, 0x77);
++  VDUP(vector2, , uint, u, 64, 1, 0x88);
++
++  VDUP(vector2, q, int, s, 8, 16, 0x11);
++  VDUP(vector2, q, int, s, 16, 8, 0x22);
++  VDUP(vector2, q, int, s, 32, 4, 0x33);
++  VDUP(vector2, q, int, s, 64, 2, 0x44);
++  VDUP(vector2, q, uint, u, 8, 16, 0x55);
++  VDUP(vector2, q, uint, u, 16, 8, 0x66);
++  VDUP(vector2, q, uint, u, 32, 4, 0x77);
++  VDUP(vector2, q, uint, u, 64, 2, 0x88);
++
++  /* Choose shift amount arbitrarily.  */
++  TEST_VSRA_N(, int, s, 8, 8, 1);
++  TEST_VSRA_N(, int, s, 16, 4, 12);
++  TEST_VSRA_N(, int, s, 32, 2, 2);
++  TEST_VSRA_N(, int, s, 64, 1, 32);
++  TEST_VSRA_N(, uint, u, 8, 8, 2);
++  TEST_VSRA_N(, uint, u, 16, 4, 3);
++  TEST_VSRA_N(, uint, u, 32, 2, 5);
++  TEST_VSRA_N(, uint, u, 64, 1, 33);
++
++  TEST_VSRA_N(q, int, s, 8, 16, 1);
++  TEST_VSRA_N(q, int, s, 16, 8, 12);
++  TEST_VSRA_N(q, int, s, 32, 4, 2);
++  TEST_VSRA_N(q, int, s, 64, 2, 32);
++  TEST_VSRA_N(q, uint, u, 8, 16, 2);
++  TEST_VSRA_N(q, uint, u, 16, 8, 3);
++  TEST_VSRA_N(q, uint, u, 32, 4, 5);
++  TEST_VSRA_N(q, uint, u, 64, 2, 33);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
++  CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
++}
++
++int main (void)
++{
++  exec_vsra_n ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsri_n.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsri_n.c
+@@ -23,7 +23,6 @@ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xe000000000000000 };
+ VECT_VAR_DECL(expected,poly,8,8) [] = { 0xc5, 0xc5, 0xc5, 0xc5,
+ 					0xc5, 0xc5, 0xc5, 0xc5 };
+ VECT_VAR_DECL(expected,poly,16,4) [] = { 0xffc0, 0xffc0, 0xffc0, 0xffc0 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xf7, 0xf7, 0xf7, 0xf7,
+ 					0xf7, 0xf7, 0xf7, 0xf7,
+ 					0xff, 0xff, 0xff, 0xff,
+@@ -50,8 +49,6 @@ VECT_VAR_DECL(expected,poly,8,16) [] = { 0xe1, 0xe1, 0xe1, 0xe1,
+ 					 0xe1, 0xe1, 0xe1, 0xe1 };
+ VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff0, 0xfff0, 0xfff0, 0xfff0,
+ 					 0xfff0, 0xfff0, 0xfff0, 0xfff0 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ /* Expected results with max shift amount.  */
+ VECT_VAR_DECL(expected_max_shift,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+@@ -70,7 +67,6 @@ VECT_VAR_DECL(expected_max_shift,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						  0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected_max_shift,poly,16,4) [] = { 0xfff0, 0xfff1,
+ 						   0xfff2, 0xfff3 };
+-VECT_VAR_DECL(expected_max_shift,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected_max_shift,int,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						  0xf4, 0xf5, 0xf6, 0xf7,
+ 						  0xf8, 0xf9, 0xfa, 0xfb,
+@@ -97,8 +93,6 @@ VECT_VAR_DECL(expected_max_shift,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 						   0xfc, 0xfd, 0xfe, 0xff };
+ VECT_VAR_DECL(expected_max_shift,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
+ 						   0xfff4, 0xfff5, 0xfff6, 0xfff7 };
+-VECT_VAR_DECL(expected_max_shift,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-						     0x33333333, 0x33333333 };
+ 
+ #include "vsXi_n.inc"
+ 
+@@ -160,5 +154,23 @@ void vsri_extra(void)
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 8, 16, 8);
+   TEST_VSXI_N(INSN_NAME, q, poly, p, 16, 8, 16);
+ 
+-  CHECK_RESULTS_NAMED (TEST_MSG, expected_max_shift, "(max shift amount)");
++#define COMMENT "(max shift amount)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 64, 1, PRIx64, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 8, 16, PRIx8, expected_max_shift, COMMENT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_max_shift, COMMENT);
+ }
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c
+@@ -0,0 +1,102 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results.  */
++VECT_VAR_DECL(expected,int,8,8) [] = { 0xf7, 0x33, 0x33, 0x33,
++				       0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff3, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffff1, 0x33333333 };
++VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,uint,8,8) [] = { 0xf6, 0x33, 0x33, 0x33,
++					0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfff2, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff0, 0x33333333 };
++VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
++VECT_VAR_DECL(expected,poly,8,8) [] = { 0xf6, 0x33, 0x33, 0x33,
++					0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,poly,16,4) [] = { 0xfff2, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,hfloat,16,4) [] = { 0xcb80, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc1700000, 0x33333333 };
++VECT_VAR_DECL(expected,int,8,16) [] = { 0xff, 0x33, 0x33, 0x33,
++					0x33, 0x33, 0x33, 0x33,
++					0x33, 0x33, 0x33, 0x33,
++					0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff5, 0x3333, 0x3333, 0x3333,
++					0x3333, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffff1, 0x33333333,
++					0x33333333, 0x33333333 };
++VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff1, 0x3333333333333333 };
++VECT_VAR_DECL(expected,uint,8,16) [] = { 0xfa, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfff4, 0x3333, 0x3333, 0x3333,
++					 0x3333, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff3, 0x33333333,
++					 0x33333333, 0x33333333 };
++VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
++					 0x3333333333333333 };
++VECT_VAR_DECL(expected,poly,8,16) [] = { 0xfa, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33,
++					 0x33, 0x33, 0x33, 0x33 };
++VECT_VAR_DECL(expected,poly,16,8) [] = { 0xfff4, 0x3333, 0x3333, 0x3333,
++					 0x3333, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,hfloat,16,8) [] = { 0xc900, 0x3333, 0x3333, 0x3333,
++					   0x3333, 0x3333, 0x3333, 0x3333 };
++VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc1700000, 0x33333333,
++					   0x33333333, 0x33333333 };
++
++#define TEST_MSG "VST1_LANE/VST1_LANEQ"
++void exec_vst1_lane (void)
++{
++#define TEST_VST1_LANE(Q, T1, T2, W, N, L)		\
++  VECT_VAR(vector, T1, W, N) =				\
++    vld1##Q##_##T2##W(VECT_VAR(buffer, T1, W, N));	\
++  vst1##Q##_lane_##T2##W(VECT_VAR(result, T1, W, N),	\
++			 VECT_VAR(vector, T1, W, N), L)
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++
++  clean_results ();
++
++  /* Choose lane arbitrarily.  */
++  TEST_VST1_LANE(, int, s, 8, 8, 7);
++  TEST_VST1_LANE(, int, s, 16, 4, 3);
++  TEST_VST1_LANE(, int, s, 32, 2, 1);
++  TEST_VST1_LANE(, int, s, 64, 1, 0);
++  TEST_VST1_LANE(, uint, u, 8, 8, 6);
++  TEST_VST1_LANE(, uint, u, 16, 4, 2);
++  TEST_VST1_LANE(, uint, u, 32, 2, 0);
++  TEST_VST1_LANE(, uint, u, 64, 1, 0);
++  TEST_VST1_LANE(, poly, p, 8, 8, 6);
++  TEST_VST1_LANE(, poly, p, 16, 4, 2);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VST1_LANE(, float, f, 16, 4, 1);
++#endif
++  TEST_VST1_LANE(, float, f, 32, 2, 1);
++
++  TEST_VST1_LANE(q, int, s, 8, 16, 15);
++  TEST_VST1_LANE(q, int, s, 16, 8, 5);
++  TEST_VST1_LANE(q, int, s, 32, 4, 1);
++  TEST_VST1_LANE(q, int, s, 64, 2, 1);
++  TEST_VST1_LANE(q, uint, u, 8, 16, 10);
++  TEST_VST1_LANE(q, uint, u, 16, 8, 4);
++  TEST_VST1_LANE(q, uint, u, 32, 4, 3);
++  TEST_VST1_LANE(q, uint, u, 64, 2, 0);
++  TEST_VST1_LANE(q, poly, p, 8, 16, 10);
++  TEST_VST1_LANE(q, poly, p, 16, 8, 4);
++#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
++  TEST_VST1_LANE(q, float, f, 16, 8, 6);
++#endif
++  TEST_VST1_LANE(q, float, f, 32, 4, 1);
++
++  CHECK_RESULTS(TEST_MSG, "");
++}
++
++int main (void)
++{
++  exec_vst1_lane ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_f16 (float16_t * p, float16x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_f32 (float32_t * p, float32x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2_lane_f64 (float64_t * p, float64x1x2_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_p8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_p8 (poly8_t * p, poly8x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_s16 (int16_t * p, int16x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_s32 (int32_t * p, int32x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2_lane_s64 (int64_t * p, int64x1x2_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_s8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_s8 (int8_t * p, int8x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_u16 (uint16_t * p, uint16x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_u32 (uint32_t * p, uint32x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2_lane_u64 (uint64_t * p, uint64x1x2_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst2_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2_lane_u8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2_lane_u8 (uint8_t * p, uint8x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_f16 (float16_t * p, float16x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_f32 (float32_t * p, float32x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_f64 (float64_t * p, float64x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_p8 (poly8_t * p, poly8x16x2_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_s16 (int16_t * p, int16x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_s32 (int32_t * p, int32x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_s64 (int64_t * p, int64x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_s8 (int8_t * p, int8x16x2_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_u16 (uint16_t * p, uint16x8x2_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst2q_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst2q_lane_u32 (uint32_t * p, uint32x4x2_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst2q_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_u64 (uint64_t * p, uint64x2x2_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst2q_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst2q_lane_u8 (uint8_t * p, uint8x16x2_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst2q_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_f16 (float16_t * p, float16x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_f32 (float32_t * p, float32x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3_lane_f64 (float64_t * p, float64x1x3_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_p8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_p8 (poly8_t * p, poly8x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_s16 (int16_t * p, int16x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_s32 (int32_t * p, int32x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3_lane_s64 (int64_t * p, int64x1x3_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_s8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_s8 (int8_t * p, int8x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_u16 (uint16_t * p, uint16x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_u32 (uint32_t * p, uint32x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3_lane_u64 (uint64_t * p, uint64x1x3_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst3_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3_lane_u8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3_lane_u8 (uint8_t * p, uint8x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_f16 (float16_t * p, float16x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_f32 (float32_t * p, float32x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_f64 (float64_t * p, float64x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_p8 (poly8_t * p, poly8x16x3_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_s16 (int16_t * p, int16x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_s32 (int32_t * p, int32x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_s64 (int64_t * p, int64x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_s8 (int8_t * p, int8x16x3_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_u16 (uint16_t * p, uint16x8x3_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst3q_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst3q_lane_u32 (uint32_t * p, uint32x4x3_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst3q_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_u64 (uint64_t * p, uint64x2x3_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst3q_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst3q_lane_u8 (uint8_t * p, uint8x16x3_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst3q_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_f16 (float16_t * p, float16x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_f16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_f32 (float32_t * p, float32x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_f32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4_lane_f64 (float64_t * p, float64x1x4_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_f64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_p8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_p8 (poly8_t * p, poly8x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_p8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_s16 (int16_t * p, int16x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_s16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_s32 (int32_t * p, int32x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_s32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4_lane_s64 (int64_t * p, int64x1x4_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_s64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_s8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_s8 (int8_t * p, int8x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_s8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_u16 (uint16_t * p, uint16x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_u16 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_u32 (uint32_t * p, uint32x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_u32 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4_lane_u64 (uint64_t * p, uint64x1x4_t v)
++{
++  /* { dg-error "lane 1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_u64 (p, v, 1);
++  /* { dg-error "lane -1 out of range 0 - 0" "" { target *-*-* } 0 } */
++  vst4_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4_lane_u8_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4_lane_u8 (uint8_t * p, uint8x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_u8 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_f16 (float16_t * p, float16x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_f16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_f16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_f32 (float32_t * p, float32x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_f32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_f32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_f64 (float64_t * p, float64x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_f64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_f64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_p8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_p8 (poly8_t * p, poly8x16x4_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_p8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_p8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_s16 (int16_t * p, int16x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_s16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_s16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_s32 (int32_t * p, int32x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_s32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_s32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_s64 (int64_t * p, int64x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_s64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_s64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_s8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_s8 (int8_t * p, int8x16x4_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_s8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_s8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u16_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_u16 (uint16_t * p, uint16x8x4_t v)
++{
++  /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_u16 (p, v, 8);
++  /* { dg-error "lane -1 out of range 0 - 7" "" { target *-*-* } 0 } */
++  vst4q_lane_u16 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u32_indices_1.c
+@@ -0,0 +1,14 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++
++void
++f_vst4q_lane_u32 (uint32_t * p, uint32x4x4_t v)
++{
++  /* { dg-error "lane 4 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_u32 (p, v, 4);
++  /* { dg-error "lane -1 out of range 0 - 3" "" { target *-*-* } 0 } */
++  vst4q_lane_u32 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u64_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_u64 (uint64_t * p, uint64x2x4_t v)
++{
++  /* { dg-error "lane 2 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_u64 (p, v, 2);
++  /* { dg-error "lane -1 out of range 0 - 1" "" { target *-*-* } 0 } */
++  vst4q_lane_u64 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_u8_indices_1.c
+@@ -0,0 +1,15 @@
++#include <arm_neon.h>
++
++/* { dg-do compile } */
++/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
++/* { dg-skip-if "" { arm*-*-* } } */
++
++void
++f_vst4q_lane_u8 (uint8_t * p, uint8x16x4_t v)
++{
++  /* { dg-error "lane 16 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_u8 (p, v, 16);
++  /* { dg-error "lane -1 out of range 0 - 15" "" { target *-*-* } 0 } */
++  vst4q_lane_u8 (p, v, -1);
++  return;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c
+@@ -0,0 +1,578 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results for vst2, chunk 0.  */
++VECT_VAR_DECL(expected_st2_0,int,8,8) [] = { 0xf0, 0xf1, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,int,16,4) [] = { 0xfff0, 0xfff1, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st2_0,uint,8,8) [] = { 0xf0, 0xf1, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,uint,16,4) [] = { 0xfff0, 0xfff1, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st2_0,poly,8,8) [] = { 0xf0, 0xf1, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
++VECT_VAR_DECL(expected_st2_0,int,16,8) [] = { 0xfff0, 0xfff1, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					       0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
++						 0x0, 0x0 };
++
++/* Expected results for vst2, chunk 1.  */
++VECT_VAR_DECL(expected_st2_1,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,hfloat,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st2_1,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results for vst3, chunk 0.  */
++VECT_VAR_DECL(expected_st3_0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0 };
++VECT_VAR_DECL(expected_st3_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st3_0,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0 };
++VECT_VAR_DECL(expected_st3_0,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st3_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0 };
++VECT_VAR_DECL(expected_st3_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
++VECT_VAR_DECL(expected_st3_0,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					      0xfffffff2, 0x0 };
++VECT_VAR_DECL(expected_st3_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					       0xfffffff2, 0x0 };
++VECT_VAR_DECL(expected_st3_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
++						 0xc1600000, 0x0 };
++
++/* Expected results for vst3, chunk 1.  */
++VECT_VAR_DECL(expected_st3_1,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,int,32,2) [] = { 0xfffffff2, 0x0 };
++VECT_VAR_DECL(expected_st3_1,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,uint,32,2) [] = { 0xfffffff2, 0x0 };
++VECT_VAR_DECL(expected_st3_1,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,hfloat,32,2) [] = { 0xc1600000, 0x0 };
++VECT_VAR_DECL(expected_st3_1,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_1,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results for vst3, chunk 2.  */
++VECT_VAR_DECL(expected_st3_2,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,hfloat,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st3_2,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results for vst4, chunk 0.  */
++VECT_VAR_DECL(expected_st4_0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_st4_0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st4_0,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,uint,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_st4_0,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
++VECT_VAR_DECL(expected_st4_0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,poly,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
++VECT_VAR_DECL(expected_st4_0,hfloat,32,2) [] = { 0xc1800000, 0xc1700000 };
++VECT_VAR_DECL(expected_st4_0,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					      0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_st4_0,uint,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
++					       0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_st4_0,poly,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_0,hfloat,32,4) [] = { 0xc1800000, 0xc1700000,
++						 0xc1600000, 0xc1500000 };
++
++/* Expected results for vst4, chunk 1.  */
++VECT_VAR_DECL(expected_st4_1,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,int,32,2) [] = { 0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_st4_1,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,uint,32,2) [] = { 0xfffffff2, 0xfffffff3 };
++VECT_VAR_DECL(expected_st4_1,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,hfloat,32,2) [] = { 0xc1600000, 0xc1500000 };
++VECT_VAR_DECL(expected_st4_1,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_1,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results for vst4, chunk 2.  */
++VECT_VAR_DECL(expected_st4_2,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,hfloat,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_2,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Expected results for vst4, chunk 3.  */
++VECT_VAR_DECL(expected_st4_3,int,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					     0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,int,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,int,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,uint,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,uint,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,uint,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,poly,8,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,poly,16,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,hfloat,32,2) [] = { 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,int,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					      0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,int,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,uint,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,uint,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,poly,16,8) [] = { 0x0, 0x0, 0x0, 0x0,
++					       0x0, 0x0, 0x0, 0x0 };
++VECT_VAR_DECL(expected_st4_3,hfloat,32,4) [] = { 0x0, 0x0, 0x0, 0x0 };
++
++/* Declare additional input buffers as needed.  */
++/* Input buffers for vld2_lane.  */
++VECT_VAR_DECL_INIT(buffer_vld2_lane, int, 8, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, int, 16, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, int, 32, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, int, 64, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 8, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 16, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 32, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 64, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 8, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 16, 2);
++VECT_VAR_DECL_INIT(buffer_vld2_lane, float, 32, 2);
++
++/* Input buffers for vld3_lane.  */
++VECT_VAR_DECL_INIT(buffer_vld3_lane, int, 8, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, int, 16, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, int, 32, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, int, 64, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 8, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 16, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 32, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 64, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 8, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 16, 3);
++VECT_VAR_DECL_INIT(buffer_vld3_lane, float, 32, 3);
++
++/* Input buffers for vld4_lane.  */
++VECT_VAR_DECL_INIT(buffer_vld4_lane, int, 8, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, int, 16, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, int, 32, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, int, 64, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 8, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 16, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 32, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 64, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 8, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 16, 4);
++VECT_VAR_DECL_INIT(buffer_vld4_lane, float, 32, 4);
++
++void exec_vstX_lane (void)
++{
++  /* In this case, input variables are arrays of vectors.  */
++#define DECL_VSTX_LANE(T1, W, N, X)					\
++  VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector, T1, W, N, X);	\
++  VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(vector_src, T1, W, N, X);	\
++  VECT_VAR_DECL(result_bis_##X, T1, W, N)[X * N]
++
++  /* We need to use a temporary result buffer (result_bis), because
++     the one used for other tests is not large enough. A subset of the
++     result data is moved from result_bis to result, and it is this
++     subset which is used to check the actual behaviour. The next
++     macro enables to move another chunk of data from result_bis to
++     result.  */
++  /* We also use another extra input buffer (buffer_src), which we
++     fill with 0xAA, and which it used to load a vector from which we
++     read a given lane.  */
++#define TEST_VSTX_LANE(Q, T1, T2, W, N, X, L)				 \
++  memset (VECT_VAR(buffer_src, T1, W, N), 0xAA,				 \
++	  sizeof(VECT_VAR(buffer_src, T1, W, N)));			 \
++  memset (VECT_VAR(result_bis_##X, T1, W, N), 0,			 \
++	  sizeof(VECT_VAR(result_bis_##X, T1, W, N)));			 \
++									 \
++  VECT_ARRAY_VAR(vector_src, T1, W, N, X) =				 \
++    vld##X##Q##_##T2##W(VECT_VAR(buffer_src, T1, W, N));		 \
++									 \
++  VECT_ARRAY_VAR(vector, T1, W, N, X) =					 \
++    /* Use dedicated init buffer, of size X.  */			 \
++    vld##X##Q##_lane_##T2##W(VECT_VAR(buffer_vld##X##_lane, T1, W, X),	 \
++			     VECT_ARRAY_VAR(vector_src, T1, W, N, X),	 \
++			     L);					 \
++  vst##X##Q##_lane_##T2##W(VECT_VAR(result_bis_##X, T1, W, N),		 \
++			   VECT_ARRAY_VAR(vector, T1, W, N, X),		 \
++			   L);						 \
++  memcpy(VECT_VAR(result, T1, W, N), VECT_VAR(result_bis_##X, T1, W, N), \
++	 sizeof(VECT_VAR(result, T1, W, N)));
++
++  /* Overwrite "result" with the contents of "result_bis"[Y].  */
++#define TEST_EXTRA_CHUNK(T1, W, N, X, Y)		\
++  memcpy(VECT_VAR(result, T1, W, N),			\
++	 &(VECT_VAR(result_bis_##X, T1, W, N)[Y*N]),	\
++	 sizeof(VECT_VAR(result, T1, W, N)));
++
++  /* We need all variants in 64 bits, but there is no 64x2 variant,
++     nor 128 bits vectors of int8/uint8/poly8.  */
++#define DECL_ALL_VSTX_LANE(X)			\
++  DECL_VSTX_LANE(int, 8, 8, X);			\
++  DECL_VSTX_LANE(int, 16, 4, X);		\
++  DECL_VSTX_LANE(int, 32, 2, X);		\
++  DECL_VSTX_LANE(uint, 8, 8, X);		\
++  DECL_VSTX_LANE(uint, 16, 4, X);		\
++  DECL_VSTX_LANE(uint, 32, 2, X);		\
++  DECL_VSTX_LANE(poly, 8, 8, X);		\
++  DECL_VSTX_LANE(poly, 16, 4, X);		\
++  DECL_VSTX_LANE(float, 32, 2, X);		\
++  DECL_VSTX_LANE(int, 16, 8, X);		\
++  DECL_VSTX_LANE(int, 32, 4, X);		\
++  DECL_VSTX_LANE(uint, 16, 8, X);		\
++  DECL_VSTX_LANE(uint, 32, 4, X);		\
++  DECL_VSTX_LANE(poly, 16, 8, X);		\
++  DECL_VSTX_LANE(float, 32, 4, X)
++
++#define DUMMY_ARRAY(V, T, W, N, L) VECT_VAR_DECL(V,T,W,N)[N*L]
++
++  /* Use the same lanes regardless of the size of the array (X), for
++     simplicity.  */
++#define TEST_ALL_VSTX_LANE(X)			\
++  TEST_VSTX_LANE(, int, s, 8, 8, X, 7);		\
++  TEST_VSTX_LANE(, int, s, 16, 4, X, 2);	\
++  TEST_VSTX_LANE(, int, s, 32, 2, X, 0);	\
++  TEST_VSTX_LANE(, float, f, 32, 2, X, 0);	\
++  TEST_VSTX_LANE(, uint, u, 8, 8, X, 4);	\
++  TEST_VSTX_LANE(, uint, u, 16, 4, X, 3);	\
++  TEST_VSTX_LANE(, uint, u, 32, 2, X, 1);	\
++  TEST_VSTX_LANE(, poly, p, 8, 8, X, 4);	\
++  TEST_VSTX_LANE(, poly, p, 16, 4, X, 3);	\
++  TEST_VSTX_LANE(q, int, s, 16, 8, X, 6);	\
++  TEST_VSTX_LANE(q, int, s, 32, 4, X, 2);	\
++  TEST_VSTX_LANE(q, uint, u, 16, 8, X, 5);	\
++  TEST_VSTX_LANE(q, uint, u, 32, 4, X, 0);	\
++  TEST_VSTX_LANE(q, poly, p, 16, 8, X, 5);	\
++  TEST_VSTX_LANE(q, float, f, 32, 4, X, 2)
++
++#define TEST_ALL_EXTRA_CHUNKS(X, Y)		\
++  TEST_EXTRA_CHUNK(int, 8, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(int, 16, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(int, 32, 2, X, Y);		\
++  TEST_EXTRA_CHUNK(uint, 8, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(uint, 16, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(uint, 32, 2, X, Y);		\
++  TEST_EXTRA_CHUNK(poly, 8, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(poly, 16, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(float, 32, 2, X, Y);		\
++  TEST_EXTRA_CHUNK(int, 16, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(int, 32, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(uint, 16, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(uint, 32, 4, X, Y);		\
++  TEST_EXTRA_CHUNK(poly, 16, 8, X, Y);		\
++  TEST_EXTRA_CHUNK(float, 32, 4, X, Y)
++
++  /* Declare the temporary buffers / variables.  */
++  DECL_ALL_VSTX_LANE(2);
++  DECL_ALL_VSTX_LANE(3);
++  DECL_ALL_VSTX_LANE(4);
++
++  /* Define dummy input arrays, large enough for x4 vectors.  */
++  DUMMY_ARRAY(buffer_src, int, 8, 8, 4);
++  DUMMY_ARRAY(buffer_src, int, 16, 4, 4);
++  DUMMY_ARRAY(buffer_src, int, 32, 2, 4);
++  DUMMY_ARRAY(buffer_src, uint, 8, 8, 4);
++  DUMMY_ARRAY(buffer_src, uint, 16, 4, 4);
++  DUMMY_ARRAY(buffer_src, uint, 32, 2, 4);
++  DUMMY_ARRAY(buffer_src, poly, 8, 8, 4);
++  DUMMY_ARRAY(buffer_src, poly, 16, 4, 4);
++  DUMMY_ARRAY(buffer_src, float, 32, 2, 4);
++  DUMMY_ARRAY(buffer_src, int, 16, 8, 4);
++  DUMMY_ARRAY(buffer_src, int, 32, 4, 4);
++  DUMMY_ARRAY(buffer_src, uint, 16, 8, 4);
++  DUMMY_ARRAY(buffer_src, uint, 32, 4, 4);
++  DUMMY_ARRAY(buffer_src, poly, 16, 8, 4);
++  DUMMY_ARRAY(buffer_src, float, 32, 4, 4);
++
++  /* Check vst2_lane/vst2q_lane.  */
++  clean_results ();
++#define TEST_MSG "VST2_LANE/VST2Q_LANE"
++  TEST_ALL_VSTX_LANE(2);
++
++#define CMT " (chunk 0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st2_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st2_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st2_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_0, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_0, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(2, 1);
++#undef CMT
++#define CMT " chunk 1"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st2_1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st2_1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st2_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st2_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st2_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st2_1, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st2_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st2_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st2_1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st2_1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st2_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st2_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st2_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st2_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st2_1, CMT);
++
++
++  /* Check vst3_lane/vst3q_lane.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VST3_LANE/VST3Q_LANE"
++  TEST_ALL_VSTX_LANE(3);
++
++#undef CMT
++#define CMT " (chunk 0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st3_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st3_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st3_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_0, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_0, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(3, 1);
++
++#undef CMT
++#define CMT " (chunk 1)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st3_1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st3_1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st3_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_1, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_1, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(3, 2);
++
++#undef CMT
++#define CMT " (chunk 2)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st3_2, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st3_2, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st3_2, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st3_2, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st3_2, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st3_2, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st3_2, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st3_2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st3_2, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st3_2, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st3_2, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st3_2, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st3_2, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st3_2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st3_2, CMT);
++
++
++  /* Check vst4_lane/vst4q_lane.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VST4_LANE/VST4Q_LANE"
++  TEST_ALL_VSTX_LANE(4);
++
++#undef CMT
++#define CMT " (chunk 0)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st4_0, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st4_0, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st4_0, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_0, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_0, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_0, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_0, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_0, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_0, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_0, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_0, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(4, 1);
++
++#undef CMT
++#define CMT " (chunk 1)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st4_1, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st4_1, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st4_1, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_1, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_1, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_1, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_1, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_1, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_1, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_1, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_1, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(4, 2);
++
++#undef CMT
++#define CMT " (chunk 2)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st4_2, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st4_2, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st4_2, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_2, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_2, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_2, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_2, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_2, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_2, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_2, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_2, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_2, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_2, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_2, CMT);
++
++  TEST_ALL_EXTRA_CHUNKS(4, 3);
++
++#undef CMT
++#define CMT " (chunk 3)"
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_st4_3, CMT);
++  CHECK(TEST_MSG, int, 16, 4, PRIx16, expected_st4_3, CMT);
++  CHECK(TEST_MSG, int, 32, 2, PRIx32, expected_st4_3, CMT);
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_st4_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_st4_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_st4_3, CMT);
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_st4_3, CMT);
++  CHECK(TEST_MSG, poly, 16, 4, PRIx16, expected_st4_3, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 2, PRIx32, expected_st4_3, CMT);
++  CHECK(TEST_MSG, int, 16, 8, PRIx16, expected_st4_3, CMT);
++  CHECK(TEST_MSG, int, 32, 4, PRIx32, expected_st4_3, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_st4_3, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_st4_3, CMT);
++  CHECK(TEST_MSG, poly, 16, 8, PRIx16, expected_st4_3, CMT);
++  CHECK_FP(TEST_MSG, float, 32, 4, PRIx32, expected_st4_3, CMT);
++}
++
++int main (void)
++{
++  exec_vstX_lane ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsub.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsub.c
+@@ -18,10 +18,6 @@ VECT_VAR_DECL(expected,uint,8,8) [] = { 0xdc, 0xdd, 0xde, 0xdf,
+ VECT_VAR_DECL(expected,uint,16,4) [] = { 0xffd2, 0xffd3, 0xffd4, 0xffd5 };
+ VECT_VAR_DECL(expected,uint,32,2) [] = { 0xffffffc8, 0xffffffc9 };
+ VECT_VAR_DECL(expected,uint,64,1) [] = { 0xffffffffffffffee };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+ VECT_VAR_DECL(expected,int,8,16) [] = { 0xfa, 0xfb, 0xfc, 0xfd,
+ 					0xfe, 0xff, 0x0, 0x1,
+ 					0x2, 0x3, 0x4, 0x5,
+@@ -41,14 +37,6 @@ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffb9, 0xffffffba,
+ 					 0xffffffbb, 0xffffffbc };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffffffffffed,
+ 					 0xffffffffffffffee };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					  0x33333333, 0x33333333 };
+ 
+ /* Expected results for float32 variants. Needs to be separated since
+    the generic test function does not test floating-point
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubl.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubl.c
+@@ -6,43 +6,13 @@
+ #define TEST_MSG "VSUBL"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0xfffd, 0xfffe, 0xffff, 0x0,
+ 					0x1, 0x2, 0x3, 0x4 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffe, 0xffffffff, 0x0, 0x1 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0x0, 0x1 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfffd, 0xfffe, 0xffff, 0x0,
+ 					 0x1, 0x2, 0x3, 0x4 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xffffffff, 0x0, 0x1, 0x2 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0x0, 0x1 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #include "vXXXl.inc"
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubw.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubw.c
+@@ -6,45 +6,15 @@
+ #define TEST_MSG "VSUBW"
+ 
+ /* Expected results.  */
+-VECT_VAR_DECL(expected,int,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-				       0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,int,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,int,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
+-VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
+-VECT_VAR_DECL(expected,int,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33,
+-					0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,int,16,8) [] = { 0xfffd, 0xfffe, 0xffff, 0x0,
+ 					0x1, 0x2, 0x3, 0x4 };
+ VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffe, 0xffffffff, 0x0, 0x1 };
+ VECT_VAR_DECL(expected,int,64,2) [] = { 0x0, 0x1 };
+-VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+ VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfefd, 0xfefe, 0xfeff, 0xff00,
+ 					 0xff01, 0xff02, 0xff03, 0xff04 };
+ VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffeffff, 0xffff0000,
+ 					 0xffff0001, 0xffff0002 };
+ VECT_VAR_DECL(expected,uint,64,2) [] = { 0xffffffff00000000,
+ 					 0xffffffff00000001 };
+-VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33,
+-					 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
+-					 0x3333, 0x3333, 0x3333, 0x3333 };
+-VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
+-					   0x33333333, 0x33333333 };
+ 
+ #include "vXXXw.inc"
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtbX.c
+@@ -0,0 +1,289 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results for vtbl1.  */
++VECT_VAR_DECL(expected_vtbl1,int,8,8) [] = { 0x0, 0xf2, 0xf2, 0xf2,
++					     0x0, 0x0, 0xf2, 0xf2 };
++VECT_VAR_DECL(expected_vtbl1,uint,8,8) [] = { 0x0, 0xf3, 0xf3, 0xf3,
++					      0x0, 0x0, 0xf3, 0xf3 };
++VECT_VAR_DECL(expected_vtbl1,poly,8,8) [] = { 0x0, 0xf3, 0xf3, 0xf3,
++					      0x0, 0x0, 0xf3, 0xf3 };
++
++/* Expected results for vtbl2.  */
++VECT_VAR_DECL(expected_vtbl2,int,8,8) [] = { 0xf6, 0xf3, 0xf3, 0xf3,
++					     0x0, 0x0, 0xf3, 0xf3 };
++VECT_VAR_DECL(expected_vtbl2,uint,8,8) [] = { 0xf6, 0xf5, 0xf5, 0xf5,
++					      0x0, 0x0, 0xf5, 0xf5 };
++VECT_VAR_DECL(expected_vtbl2,poly,8,8) [] = { 0xf6, 0xf5, 0xf5, 0xf5,
++					      0x0, 0x0, 0xf5, 0xf5 };
++
++/* Expected results for vtbl3.  */
++VECT_VAR_DECL(expected_vtbl3,int,8,8) [] = { 0xf8, 0xf4, 0xf4, 0xf4,
++					     0xff, 0x0, 0xf4, 0xf4 };
++VECT_VAR_DECL(expected_vtbl3,uint,8,8) [] = { 0xf8, 0xf7, 0xf7, 0xf7,
++					      0xff, 0x0, 0xf7, 0xf7 };
++VECT_VAR_DECL(expected_vtbl3,poly,8,8) [] = { 0xf8, 0xf7, 0xf7, 0xf7,
++					      0xff, 0x0, 0xf7, 0xf7 };
++
++/* Expected results for vtbl4.  */
++VECT_VAR_DECL(expected_vtbl4,int,8,8) [] = { 0xfa, 0xf5, 0xf5, 0xf5,
++					    0x3, 0x0, 0xf5, 0xf5 };
++VECT_VAR_DECL(expected_vtbl4,uint,8,8) [] = { 0xfa, 0xf9, 0xf9, 0xf9,
++					     0x3, 0x0, 0xf9, 0xf9 };
++VECT_VAR_DECL(expected_vtbl4,poly,8,8) [] = { 0xfa, 0xf9, 0xf9, 0xf9,
++					     0x3, 0x0, 0xf9, 0xf9 };
++
++/* Expected results for vtbx1.  */
++VECT_VAR_DECL(expected_vtbx1,int,8,8) [] = { 0x33, 0xf2, 0xf2, 0xf2,
++					    0x33, 0x33, 0xf2, 0xf2 };
++VECT_VAR_DECL(expected_vtbx1,uint,8,8) [] = { 0xcc, 0xf3, 0xf3, 0xf3,
++					     0xcc, 0xcc, 0xf3, 0xf3 };
++VECT_VAR_DECL(expected_vtbx1,poly,8,8) [] = { 0xcc, 0xf3, 0xf3, 0xf3,
++					     0xcc, 0xcc, 0xf3, 0xf3 };
++
++/* Expected results for vtbx2.  */
++VECT_VAR_DECL(expected_vtbx2,int,8,8) [] = { 0xf6, 0xf3, 0xf3, 0xf3,
++					    0x33, 0x33, 0xf3, 0xf3 };
++VECT_VAR_DECL(expected_vtbx2,uint,8,8) [] = { 0xf6, 0xf5, 0xf5, 0xf5,
++					     0xcc, 0xcc, 0xf5, 0xf5 };
++VECT_VAR_DECL(expected_vtbx2,poly,8,8) [] = { 0xf6, 0xf5, 0xf5, 0xf5,
++					     0xcc, 0xcc, 0xf5, 0xf5 };
++
++/* Expected results for vtbx3.  */
++VECT_VAR_DECL(expected_vtbx3,int,8,8) [] = { 0xf8, 0xf4, 0xf4, 0xf4,
++					    0xff, 0x33, 0xf4, 0xf4 };
++VECT_VAR_DECL(expected_vtbx3,uint,8,8) [] = { 0xf8, 0xf7, 0xf7, 0xf7,
++					     0xff, 0xcc, 0xf7, 0xf7 };
++VECT_VAR_DECL(expected_vtbx3,poly,8,8) [] = { 0xf8, 0xf7, 0xf7, 0xf7,
++					     0xff, 0xcc, 0xf7, 0xf7 };
++
++/* Expected results for vtbx4.  */
++VECT_VAR_DECL(expected_vtbx4,int,8,8) [] = { 0xfa, 0xf5, 0xf5, 0xf5,
++					     0x3, 0x33, 0xf5, 0xf5 };
++VECT_VAR_DECL(expected_vtbx4,uint,8,8) [] = { 0xfa, 0xf9, 0xf9, 0xf9,
++					      0x3, 0xcc, 0xf9, 0xf9 };
++VECT_VAR_DECL(expected_vtbx4,poly,8,8) [] = { 0xfa, 0xf9, 0xf9, 0xf9,
++					      0x3, 0xcc, 0xf9, 0xf9 };
++
++void exec_vtbX (void)
++{
++  int i;
++
++  /* In this case, input variables are arrays of vectors.  */
++#define DECL_VTBX(T1, W, N, X)						\
++  VECT_ARRAY_TYPE(T1, W, N, X) VECT_ARRAY_VAR(table_vector, T1, W, N, X)
++
++  /* The vtbl1 variant is different from vtbl{2,3,4} because it takes a
++     vector as 1st param, instead of an array of vectors.  */
++#define TEST_VTBL1(T1, T2, T3, W, N)			\
++  VECT_VAR(table_vector, T1, W, N) =			\
++    vld1##_##T2##W((T1##W##_t *)lookup_table);		\
++							\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vtbl1_##T2##W(VECT_VAR(table_vector, T1, W, N),	\
++		  VECT_VAR(vector, T3, W, N));		\
++  vst1_##T2##W(VECT_VAR(result, T1, W, N),		\
++	       VECT_VAR(vector_res, T1, W, N));
++
++#define TEST_VTBLX(T1, T2, T3, W, N, X)					\
++  VECT_ARRAY_VAR(table_vector, T1, W, N, X) =				\
++    vld##X##_##T2##W((T1##W##_t *)lookup_table);			\
++									\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vtbl##X##_##T2##W(VECT_ARRAY_VAR(table_vector, T1, W, N, X),	\
++		      VECT_VAR(vector, T3, W, N));			\
++  vst1_##T2##W(VECT_VAR(result, T1, W, N),				\
++	       VECT_VAR(vector_res, T1, W, N));
++
++  /* We need to define a lookup table.  */
++  uint8_t lookup_table[32];
++
++  DECL_VARIABLE(vector, int, 8, 8);
++  DECL_VARIABLE(vector, uint, 8, 8);
++  DECL_VARIABLE(vector, poly, 8, 8);
++  DECL_VARIABLE(vector_res, int, 8, 8);
++  DECL_VARIABLE(vector_res, uint, 8, 8);
++  DECL_VARIABLE(vector_res, poly, 8, 8);
++
++  /* For vtbl1.  */
++  DECL_VARIABLE(table_vector, int, 8, 8);
++  DECL_VARIABLE(table_vector, uint, 8, 8);
++  DECL_VARIABLE(table_vector, poly, 8, 8);
++
++  /* For vtbx*.  */
++  DECL_VARIABLE(default_vector, int, 8, 8);
++  DECL_VARIABLE(default_vector, uint, 8, 8);
++  DECL_VARIABLE(default_vector, poly, 8, 8);
++
++  /* We need only 8 bits variants.  */
++#define DECL_ALL_VTBLX(X)			\
++  DECL_VTBX(int, 8, 8, X);			\
++  DECL_VTBX(uint, 8, 8, X);			\
++  DECL_VTBX(poly, 8, 8, X)
++
++#define TEST_ALL_VTBL1()			\
++  TEST_VTBL1(int, s, int, 8, 8);		\
++  TEST_VTBL1(uint, u, uint, 8, 8);		\
++  TEST_VTBL1(poly, p, uint, 8, 8)
++
++#define TEST_ALL_VTBLX(X)			\
++  TEST_VTBLX(int, s, int, 8, 8, X);		\
++  TEST_VTBLX(uint, u, uint, 8, 8, X);		\
++  TEST_VTBLX(poly, p, uint, 8, 8, X)
++
++  /* Declare the temporary buffers / variables.  */
++  DECL_ALL_VTBLX(2);
++  DECL_ALL_VTBLX(3);
++  DECL_ALL_VTBLX(4);
++
++  /* Fill the lookup table.  */
++  for (i=0; i<32; i++) {
++    lookup_table[i] = i-15;
++  }
++
++  /* Choose init value arbitrarily, will be used as table index.  */
++  VDUP(vector, , int, s, 8, 8, 1);
++  VDUP(vector, , uint, u, 8, 8, 2);
++  VDUP(vector, , poly, p, 8, 8, 2);
++
++  /* To ensure coverage, add some indexes larger than 8,16 and 32
++     except: lane 0 (by 6), lane 1 (by 8) and lane 2 (by 9).  */
++  VSET_LANE(vector, , int, s, 8, 8, 0, 10);
++  VSET_LANE(vector, , int, s, 8, 8, 4, 20);
++  VSET_LANE(vector, , int, s, 8, 8, 5, 40);
++  VSET_LANE(vector, , uint, u, 8, 8, 0, 10);
++  VSET_LANE(vector, , uint, u, 8, 8, 4, 20);
++  VSET_LANE(vector, , uint, u, 8, 8, 5, 40);
++  VSET_LANE(vector, , poly, p, 8, 8, 0, 10);
++  VSET_LANE(vector, , poly, p, 8, 8, 4, 20);
++  VSET_LANE(vector, , poly, p, 8, 8, 5, 40);
++
++
++  /* Check vtbl1.  */
++  clean_results ();
++#define TEST_MSG "VTBL1"
++  TEST_ALL_VTBL1();
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl1, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl1, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl1, "");
++
++  /* Check vtbl2.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBL2"
++  TEST_ALL_VTBLX(2);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl2, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl2, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl2, "");
++
++  /* Check vtbl3.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBL3"
++  TEST_ALL_VTBLX(3);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl3, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl3, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl3, "");
++
++  /* Check vtbl4.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBL4"
++  TEST_ALL_VTBLX(4);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbl4, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbl4, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbl4, "");
++
++
++  /* Now test VTBX.  */
++
++  /* The vtbx1 variant is different from vtbx{2,3,4} because it takes a
++     vector as 1st param, instead of an array of vectors.  */
++#define TEST_VTBX1(T1, T2, T3, W, N)			\
++  VECT_VAR(table_vector, T1, W, N) =			\
++    vld1##_##T2##W((T1##W##_t *)lookup_table);		\
++							\
++  VECT_VAR(vector_res, T1, W, N) =			\
++    vtbx1_##T2##W(VECT_VAR(default_vector, T1, W, N),	\
++		  VECT_VAR(table_vector, T1, W, N),	\
++		  VECT_VAR(vector, T3, W, N));		\
++  vst1_##T2##W(VECT_VAR(result, T1, W, N),		\
++	       VECT_VAR(vector_res, T1, W, N));
++
++#define TEST_VTBXX(T1, T2, T3, W, N, X)					\
++  VECT_ARRAY_VAR(table_vector, T1, W, N, X) =				\
++    vld##X##_##T2##W((T1##W##_t *)lookup_table);			\
++									\
++  VECT_VAR(vector_res, T1, W, N) =					\
++    vtbx##X##_##T2##W(VECT_VAR(default_vector, T1, W, N),		\
++		      VECT_ARRAY_VAR(table_vector, T1, W, N, X),	\
++		      VECT_VAR(vector, T3, W, N));			\
++  vst1_##T2##W(VECT_VAR(result, T1, W, N),				\
++	       VECT_VAR(vector_res, T1, W, N));
++
++#define TEST_ALL_VTBX1()			\
++  TEST_VTBX1(int, s, int, 8, 8);		\
++  TEST_VTBX1(uint, u, uint, 8, 8);		\
++  TEST_VTBX1(poly, p, uint, 8, 8)
++
++#define TEST_ALL_VTBXX(X)			\
++  TEST_VTBXX(int, s, int, 8, 8, X);		\
++  TEST_VTBXX(uint, u, uint, 8, 8, X);		\
++  TEST_VTBXX(poly, p, uint, 8, 8, X)
++
++  /* Choose init value arbitrarily, will be used as default value.  */
++  VDUP(default_vector, , int, s, 8, 8, 0x33);
++  VDUP(default_vector, , uint, u, 8, 8, 0xCC);
++  VDUP(default_vector, , poly, p, 8, 8, 0xCC);
++
++  /* Check vtbx1.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBX1"
++  TEST_ALL_VTBX1();
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx1, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx1, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx1, "");
++
++  /* Check vtbx2.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBX2"
++  TEST_ALL_VTBXX(2);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx2, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx2, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx2, "");
++
++  /* Check vtbx3.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBX3"
++  TEST_ALL_VTBXX(3);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx3, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx3, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx3, "");
++
++  /* Check vtbx4.  */
++  clean_results ();
++#undef TEST_MSG
++#define TEST_MSG "VTBX4"
++  TEST_ALL_VTBXX(4);
++
++  CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_vtbx4, "");
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_vtbx4, "");
++  CHECK(TEST_MSG, poly, 8, 8, PRIx8, expected_vtbx4, "");
++}
++
++int main (void)
++{
++  exec_vtbX ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn.c
+@@ -8,12 +8,10 @@ VECT_VAR_DECL(expected0,int,8,8) [] = { 0xf0, 0xf1, 0x11, 0x11,
+ 					0xf2, 0xf3, 0x11, 0x11 };
+ VECT_VAR_DECL(expected0,int,16,4) [] = { 0xfff0, 0xfff1, 0x22, 0x22 };
+ VECT_VAR_DECL(expected0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,8) [] = { 0xf0, 0xf1, 0x55, 0x55,
+ 					 0xf2, 0xf3, 0x55, 0x55 };
+ VECT_VAR_DECL(expected0,uint,16,4) [] = { 0xfff0, 0xfff1, 0x66, 0x66 };
+ VECT_VAR_DECL(expected0,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,8) [] = { 0xf0, 0xf1, 0x55, 0x55,
+ 					 0xf2, 0xf3, 0x55, 0x55 };
+ VECT_VAR_DECL(expected0,poly,16,4) [] = { 0xfff0, 0xfff1, 0x66, 0x66 };
+@@ -25,8 +23,6 @@ VECT_VAR_DECL(expected0,int,8,16) [] = { 0xf0, 0xf1, 0x11, 0x11,
+ VECT_VAR_DECL(expected0,int,16,8) [] = { 0xfff0, 0xfff1, 0x22, 0x22,
+ 					 0xfff2, 0xfff3, 0x22, 0x22 };
+ VECT_VAR_DECL(expected0,int,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x33, 0x33 };
+-VECT_VAR_DECL(expected0,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,16) [] = { 0xf0, 0xf1, 0x55, 0x55,
+ 					  0xf2, 0xf3, 0x55, 0x55,
+ 					  0xf4, 0xf5, 0x55, 0x55,
+@@ -34,8 +30,6 @@ VECT_VAR_DECL(expected0,uint,8,16) [] = { 0xf0, 0xf1, 0x55, 0x55,
+ VECT_VAR_DECL(expected0,uint,16,8) [] = { 0xfff0, 0xfff1, 0x66, 0x66,
+ 					  0xfff2, 0xfff3, 0x66, 0x66 };
+ VECT_VAR_DECL(expected0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1, 0x77, 0x77 };
+-VECT_VAR_DECL(expected0,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,16) [] = { 0xf0, 0xf1, 0x55, 0x55,
+ 					  0xf2, 0xf3, 0x55, 0x55,
+ 					  0xf4, 0xf5, 0x55, 0x55,
+@@ -50,12 +44,10 @@ VECT_VAR_DECL(expected1,int,8,8) [] = { 0xf4, 0xf5, 0x11, 0x11,
+ 					0xf6, 0xf7, 0x11, 0x11 };
+ VECT_VAR_DECL(expected1,int,16,4) [] = { 0xfff2, 0xfff3, 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,2) [] = { 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,8) [] = { 0xf4, 0xf5, 0x55, 0x55,
+ 					 0xf6, 0xf7, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,uint,16,4) [] = { 0xfff2, 0xfff3, 0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,2) [] = { 0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,8) [] = { 0xf4, 0xf5, 0x55, 0x55,
+ 					 0xf6, 0xf7, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,poly,16,4) [] = { 0xfff2, 0xfff3, 0x66, 0x66 };
+@@ -67,8 +59,6 @@ VECT_VAR_DECL(expected1,int,8,16) [] = { 0xf8, 0xf9, 0x11, 0x11,
+ VECT_VAR_DECL(expected1,int,16,8) [] = { 0xfff4, 0xfff5, 0x22, 0x22,
+ 					 0xfff6, 0xfff7, 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,4) [] = { 0xfffffff2, 0xfffffff3, 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,16) [] = { 0xf8, 0xf9, 0x55, 0x55,
+ 					  0xfa, 0xfb, 0x55, 0x55,
+ 					  0xfc, 0xfd, 0x55, 0x55,
+@@ -76,8 +66,6 @@ VECT_VAR_DECL(expected1,uint,8,16) [] = { 0xf8, 0xf9, 0x55, 0x55,
+ VECT_VAR_DECL(expected1,uint,16,8) [] = { 0xfff4, 0xfff5, 0x66, 0x66,
+ 					  0xfff6, 0xfff7, 0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,4) [] = { 0xfffffff2, 0xfffffff3, 0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,16) [] = { 0xf8, 0xf9, 0x55, 0x55,
+ 					  0xfa, 0xfb, 0x55, 0x55,
+ 					  0xfc, 0xfd, 0x55, 0x55,
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c
+@@ -0,0 +1,120 @@
++#include <arm_neon.h>
++#include "arm-neon-ref.h"
++#include "compute-ref-data.h"
++
++/* Expected results with signed input.  */
++VECT_VAR_DECL(expected_signed,uint,8,8) [] = { 0x0, 0xff, 0xff, 0xff,
++					       0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_signed,uint,16,4) [] = { 0x0, 0xffff, 0x0, 0xffff };
++VECT_VAR_DECL(expected_signed,uint,32,2) [] = { 0x0, 0xffffffff };
++VECT_VAR_DECL(expected_signed,uint,8,16) [] = { 0x0, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff,
++						0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_signed,uint,16,8) [] = { 0x0, 0xffff, 0x0, 0xffff,
++						0xffff, 0xffff, 0xffff, 0xffff };
++VECT_VAR_DECL(expected_signed,uint,32,4) [] = { 0x0, 0xffffffff,
++						0x0, 0xffffffff };
++
++/* Expected results with unsigned input.  */
++VECT_VAR_DECL(expected_unsigned,uint,8,8) [] = { 0x0, 0xff, 0xff, 0xff,
++						 0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_unsigned,uint,16,4) [] = { 0x0, 0xffff, 0x0, 0xffff };
++VECT_VAR_DECL(expected_unsigned,uint,32,2) [] = { 0x0, 0xffffffff };
++VECT_VAR_DECL(expected_unsigned,uint,8,16) [] = { 0x0, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff,
++						  0xff, 0xff, 0xff, 0xff };
++VECT_VAR_DECL(expected_unsigned,uint,16,8) [] = { 0x0, 0xffff,
++						  0x0, 0xffff,
++						  0xffff, 0xffff,
++						  0xffff, 0xffff };
++VECT_VAR_DECL(expected_unsigned,uint,32,4) [] = { 0x0, 0xffffffff,
++						  0x0, 0xffffffff };
++
++#ifndef INSN_NAME
++#define INSN_NAME vtst
++#define TEST_MSG "VTST/VTSTQ"
++#endif
++
++/* We can't use the standard ref_v_binary_op.c template because vtst
++   has no 64 bits variant, and outputs are always of uint type.  */
++#define FNNAME1(NAME) void exec_ ## NAME (void)
++#define FNNAME(NAME) FNNAME1(NAME)
++
++FNNAME (INSN_NAME)
++{
++  /* Basic test: y=OP(x,x), then store the result.  */
++#define TEST_BINARY_OP1(INSN, Q, T1, T2, W, N)		\
++  VECT_VAR(vector_res, uint, W, N) =			\
++    INSN##Q##_##T2##W(VECT_VAR(vector, T1, W, N),	\
++		      VECT_VAR(vector2, T1, W, N));	\
++  vst1##Q##_u##W(VECT_VAR(result, uint, W, N),		\
++		 VECT_VAR(vector_res, uint, W, N))
++
++#define TEST_BINARY_OP(INSN, Q, T1, T2, W, N)	\
++  TEST_BINARY_OP1(INSN, Q, T1, T2, W, N)	\
++
++  DECL_VARIABLE_ALL_VARIANTS(vector);
++  DECL_VARIABLE_ALL_VARIANTS(vector2);
++  DECL_VARIABLE_UNSIGNED_VARIANTS(vector_res);
++
++
++  clean_results ();
++
++  /* Initialize input "vector" from "buffer".  */
++  TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
++
++  /* Choose init value arbitrarily, will be used as comparison
++     value.  */
++  VDUP(vector2, , int, s, 8, 8, 15);
++  VDUP(vector2, , int, s, 16, 4, 5);
++  VDUP(vector2, , int, s, 32, 2, 1);
++  VDUP(vector2, , uint, u, 8, 8, 15);
++  VDUP(vector2, , uint, u, 16, 4, 5);
++  VDUP(vector2, , uint, u, 32, 2, 1);
++  VDUP(vector2, q, int, s, 8, 16, 15);
++  VDUP(vector2, q, int, s, 16, 8, 5);
++  VDUP(vector2, q, int, s, 32, 4, 1);
++  VDUP(vector2, q, uint, u, 8, 16, 15);
++  VDUP(vector2, q, uint, u, 16, 8, 5);
++  VDUP(vector2, q, uint, u, 32, 4, 1);
++
++#define TEST_MACRO_NO64BIT_VARIANT_1_5(MACRO, VAR, T1, T2)	\
++  MACRO(VAR, , T1, T2, 8, 8);					\
++  MACRO(VAR, , T1, T2, 16, 4);					\
++  MACRO(VAR, , T1, T2, 32, 2);					\
++  MACRO(VAR, q, T1, T2, 8, 16);					\
++  MACRO(VAR, q, T1, T2, 16, 8);					\
++  MACRO(VAR, q, T1, T2, 32, 4)
++
++  /* Split the test, as both signed and unsigned variants output their
++     result in an unsigned form (thus the same output variable is used
++     in these tests).  */
++  TEST_MACRO_NO64BIT_VARIANT_1_5(TEST_BINARY_OP, INSN_NAME, int, s);
++
++#define CMT " (signed input)"
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_signed, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_signed, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_signed, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_signed, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_signed, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_signed, CMT);
++
++  TEST_MACRO_NO64BIT_VARIANT_1_5(TEST_BINARY_OP, INSN_NAME, uint, u);
++
++#undef CMT
++#define CMT " (unsigned input)"
++  CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_unsigned, CMT);
++  CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected_unsigned, CMT);
++  CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected_unsigned, CMT);
++  CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_unsigned, CMT);
++  CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_unsigned, CMT);
++  CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_unsigned, CMT);
++}
++
++int main (void)
++{
++  exec_vtst ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp.c
+@@ -9,14 +9,12 @@ VECT_VAR_DECL(expected0,int,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ VECT_VAR_DECL(expected0,int,16,4) [] = { 0xfff0, 0xfff1,
+ 					 0xfff2, 0xfff3 };
+ VECT_VAR_DECL(expected0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					 0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected0,uint,16,4) [] = { 0xfff0, 0xfff1,
+ 					  0xfff2, 0xfff3 };
+ VECT_VAR_DECL(expected0,uint,32,2) [] = { 0xfffffff0,
+ 					  0xfffffff1 };
+-VECT_VAR_DECL(expected0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,8) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					 0xf4, 0xf5, 0xf6, 0xf7 };
+ VECT_VAR_DECL(expected0,poly,16,4) [] = { 0xfff0, 0xfff1,
+@@ -32,8 +30,6 @@ VECT_VAR_DECL(expected0,int,16,8) [] = { 0xfff0, 0xfff1,
+ 					 0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected0,int,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					 0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected0,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					  0xf4, 0xf5, 0xf6, 0xf7,
+ 					  0xf8, 0xf9, 0xfa, 0xfb,
+@@ -44,8 +40,6 @@ VECT_VAR_DECL(expected0,uint,16,8) [] = { 0xfff0, 0xfff1,
+ 					  0xfff6, 0xfff7 };
+ VECT_VAR_DECL(expected0,uint,32,4) [] = { 0xfffffff0, 0xfffffff1,
+ 					  0xfffffff2, 0xfffffff3 };
+-VECT_VAR_DECL(expected0,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,16) [] = { 0xf0, 0xf1, 0xf2, 0xf3,
+ 					  0xf4, 0xf5, 0xf6, 0xf7,
+ 					  0xf8, 0xf9, 0xfa, 0xfb,
+@@ -62,12 +56,10 @@ VECT_VAR_DECL(expected1,int,8,8) [] = { 0x11, 0x11, 0x11, 0x11,
+ 					0x11, 0x11, 0x11, 0x11 };
+ VECT_VAR_DECL(expected1,int,16,4) [] = { 0x22, 0x22, 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,2) [] = { 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,8) [] = { 0x55, 0x55, 0x55, 0x55,
+ 					 0x55, 0x55, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,uint,16,4) [] = { 0x66, 0x66, 0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,2) [] = { 0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,8) [] = { 0x55, 0x55, 0x55, 0x55,
+ 					 0x55, 0x55, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,poly,16,4) [] = { 0x66, 0x66, 0x66, 0x66 };
+@@ -79,8 +71,6 @@ VECT_VAR_DECL(expected1,int,8,16) [] = { 0x11, 0x11, 0x11, 0x11,
+ VECT_VAR_DECL(expected1,int,16,8) [] = { 0x22, 0x22, 0x22, 0x22,
+ 					 0x22, 0x22, 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,4) [] = { 0x33, 0x33, 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,16) [] = { 0x55, 0x55, 0x55, 0x55,
+ 					  0x55, 0x55, 0x55, 0x55,
+ 					  0x55, 0x55, 0x55, 0x55,
+@@ -88,8 +78,6 @@ VECT_VAR_DECL(expected1,uint,8,16) [] = { 0x55, 0x55, 0x55, 0x55,
+ VECT_VAR_DECL(expected1,uint,16,8) [] = { 0x66, 0x66, 0x66, 0x66,
+ 					  0x66, 0x66, 0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,4) [] = { 0x77, 0x77, 0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,16) [] = { 0x55, 0x55, 0x55, 0x55,
+ 					  0x55, 0x55, 0x55, 0x55,
+ 					  0x55, 0x55, 0x55, 0x55,
+--- a/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip.c
+@@ -9,13 +9,11 @@ VECT_VAR_DECL(expected0,int,8,8) [] = { 0xf0, 0xf4, 0x11, 0x11,
+ VECT_VAR_DECL(expected0,int,16,4) [] = { 0xfff0, 0xfff2,
+ 					 0x22, 0x22 };
+ VECT_VAR_DECL(expected0,int,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected0,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,8) [] = { 0xf0, 0xf4, 0x55, 0x55,
+ 					 0xf1, 0xf5, 0x55, 0x55 };
+ VECT_VAR_DECL(expected0,uint,16,4) [] = { 0xfff0, 0xfff2,
+ 					  0x66, 0x66 };
+ VECT_VAR_DECL(expected0,uint,32,2) [] = { 0xfffffff0, 0xfffffff1 };
+-VECT_VAR_DECL(expected0,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,8) [] = { 0xf0, 0xf4, 0x55, 0x55,
+ 					 0xf1, 0xf5, 0x55, 0x55 };
+ VECT_VAR_DECL(expected0,poly,16,4) [] = { 0xfff0, 0xfff2,
+@@ -29,8 +27,6 @@ VECT_VAR_DECL(expected0,int,16,8) [] = { 0xfff0, 0xfff4, 0x22, 0x22,
+ 					 0xfff1, 0xfff5, 0x22, 0x22 };
+ VECT_VAR_DECL(expected0,int,32,4) [] = { 0xfffffff0, 0xfffffff2,
+ 					 0x33, 0x33 };
+-VECT_VAR_DECL(expected0,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected0,uint,8,16) [] = { 0xf0, 0xf8, 0x55, 0x55,
+ 					  0xf1, 0xf9, 0x55, 0x55,
+ 					  0xf2, 0xfa, 0x55, 0x55,
+@@ -39,8 +35,6 @@ VECT_VAR_DECL(expected0,uint,16,8) [] = { 0xfff0, 0xfff4, 0x66, 0x66,
+ 					  0xfff1, 0xfff5, 0x66, 0x66 };
+ VECT_VAR_DECL(expected0,uint,32,4) [] = { 0xfffffff0, 0xfffffff2,
+ 					  0x77, 0x77 };
+-VECT_VAR_DECL(expected0,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected0,poly,8,16) [] = { 0xf0, 0xf8, 0x55, 0x55,
+ 					  0xf1, 0xf9, 0x55, 0x55,
+ 					  0xf2, 0xfa, 0x55, 0x55,
+@@ -56,13 +50,11 @@ VECT_VAR_DECL(expected1,int,8,8) [] = { 0xf2, 0xf6, 0x11, 0x11,
+ VECT_VAR_DECL(expected1,int,16,4) [] = { 0xfff1, 0xfff3,
+ 					 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,2) [] = { 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,8) [] = { 0xf2, 0xf6, 0x55, 0x55,
+ 					 0xf3, 0xf7, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,uint,16,4) [] = { 0xfff1, 0xfff3,
+ 					  0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,2) [] = { 0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,1) [] = { 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,8) [] = { 0xf2, 0xf6, 0x55, 0x55,
+ 					 0xf3, 0xf7, 0x55, 0x55 };
+ VECT_VAR_DECL(expected1,poly,16,4) [] = { 0xfff1, 0xfff3,
+@@ -76,8 +68,6 @@ VECT_VAR_DECL(expected1,int,16,8) [] = { 0xfff2, 0xfff6, 0x22, 0x22,
+ 					 0xfff3, 0xfff7, 0x22, 0x22 };
+ VECT_VAR_DECL(expected1,int,32,4) [] = { 0xfffffff1, 0xfffffff3,
+ 					 0x33, 0x33 };
+-VECT_VAR_DECL(expected1,int,64,2) [] = { 0x3333333333333333,
+-					 0x3333333333333333 };
+ VECT_VAR_DECL(expected1,uint,8,16) [] = { 0xf4, 0xfc, 0x55, 0x55,
+ 					  0xf5, 0xfd, 0x55, 0x55,
+ 					  0xf6, 0xfe, 0x55, 0x55,
+@@ -86,8 +76,6 @@ VECT_VAR_DECL(expected1,uint,16,8) [] = { 0xfff2, 0xfff6, 0x66, 0x66,
+ 					  0xfff3, 0xfff7, 0x66, 0x66 };
+ VECT_VAR_DECL(expected1,uint,32,4) [] = { 0xfffffff1, 0xfffffff3,
+ 					  0x77, 0x77 };
+-VECT_VAR_DECL(expected1,uint,64,2) [] = { 0x3333333333333333,
+-					  0x3333333333333333 };
+ VECT_VAR_DECL(expected1,poly,8,16) [] = { 0xf4, 0xfc, 0x55, 0x55,
+ 					  0xf5, 0xfd, 0x55, 0x55,
+ 					  0xf6, 0xfe, 0x55, 0x55,
+--- a/src/gcc/testsuite/gcc.target/aarch64/aes_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/aes_1.c
+@@ -37,4 +37,3 @@ test_vaesimcq_u8 (uint8x16_t data)
+ /* { dg-final { scan-assembler-times "aesimc\\tv\[0-9\]+\.16b, v\[0-9\]+\.16b" 1 } } */
+ 
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/ands_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/ands_1.c
+@@ -12,7 +12,7 @@ ands_si_test1 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -24,7 +24,7 @@ ands_si_test2 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -36,7 +36,7 @@ ands_si_test3 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ typedef long long s64;
+@@ -50,7 +50,7 @@ ands_di_test1 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -62,7 +62,7 @@ ands_di_test2 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -74,7 +74,7 @@ ands_di_test3 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -84,7 +84,7 @@ main ()
+   s64 y;
+ 
+   x = ands_si_test1 (29, 4, 5);
+-  if (x != 13)
++  if (x != (29 & 4))
+     abort ();
+ 
+   x = ands_si_test1 (5, 2, 20);
+@@ -92,7 +92,7 @@ main ()
+     abort ();
+ 
+   x = ands_si_test2 (29, 4, 5);
+-  if (x != 38)
++  if (x != (29 & 0xff))
+     abort ();
+ 
+   x = ands_si_test2 (1024, 2, 20);
+@@ -100,7 +100,7 @@ main ()
+     abort ();
+ 
+   x = ands_si_test3 (35, 4, 5);
+-  if (x != 41)
++  if (x != (35 & (4 << 3)))
+     abort ();
+ 
+   x = ands_si_test3 (5, 2, 20);
+@@ -111,7 +111,7 @@ main ()
+                      0x320000004ll,
+                      0x505050505ll);
+ 
+-  if (y != ((0x130000029ll & 0x320000004ll) + 0x320000004ll + 0x505050505ll))
++  if (y != ((0x130000029ll & 0x320000004ll)))
+     abort ();
+ 
+   y = ands_di_test1 (0x5000500050005ll,
+@@ -123,7 +123,7 @@ main ()
+   y = ands_di_test2 (0x130000029ll,
+                      0x320000004ll,
+                      0x505050505ll);
+-  if (y != ((0x130000029ll & 0xff) + 0x320000004ll + 0x505050505ll))
++  if (y != ((0x130000029ll & 0xff)))
+     abort ();
+ 
+   y = ands_di_test2 (0x130002900ll,
+@@ -135,8 +135,7 @@ main ()
+   y = ands_di_test3 (0x130000029ll,
+                      0x064000008ll,
+                      0x505050505ll);
+-  if (y != ((0x130000029ll & (0x064000008ll << 3))
+-	    + 0x064000008ll + 0x505050505ll))
++  if (y != ((0x130000029ll & (0x064000008ll << 3))))
+     abort ();
+ 
+   y = ands_di_test3 (0x130002900ll,
+@@ -148,4 +147,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/ands_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/ands_2.c
+@@ -154,4 +154,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/arm_align_max_pwr.c
+@@ -0,0 +1,23 @@
++/* { dg-do compile } */
++/* { dg-options "-O1" } */
++
++#define align (1ul << __ARM_ALIGN_MAX_PWR)
++static int x __attribute__ ((aligned (align)));
++static int y __attribute__ ((aligned (align)));
++
++extern void foo (int *x, int *y);
++extern int bar (int x, int y);
++
++int
++dummy ()
++{
++  int result;
++
++  foo (&x, &y);
++  result = bar (x, y);
++
++  return result;
++}
++
++/* { dg-final { scan-assembler-times "zero\t4" 2 } } */
++/* { dg-final { scan-assembler "zero\t268435452" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/arm_align_max_stack_pwr.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O1" } */
++
++#define align (1ul << __ARM_ALIGN_MAX_STACK_PWR)
++extern void foo (int *x);
++extern int bar (int x);
++
++int
++dummy ()
++{
++  int x __attribute__ ((aligned (align)));
++  int result;
++
++  foo (&x);
++  result = bar (x);
++
++  return result;
++}
++
++/* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, -65536" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/arm_neon-nosimd-error.c
++++ b/src//dev/null
+@@ -1,11 +0,0 @@
+-/* { dg-do compile } */
+-/* { dg-options "-mgeneral-regs-only" } */
+-/* { dg-excess-errors "You must enable" } */
+-
+-#include "arm_neon.h"
+-
+-int
+-foo ()
+-{
+-  return 0;
+-}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
+@@ -0,0 +1,49 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -save-temps" } */
++
++extern void abort (void);
++
++#define GEN_TEST_CASE(x, y, z)\
++__uint128_t __attribute__ ((noinline))\
++ushift_##x##_##z (unsigned y data)\
++{\
++  return (__uint128_t) data << x;\
++}\
++__int128_t __attribute__ ((noinline)) \
++shift_##x##_##z (y data) \
++{\
++  return (__int128_t) data << x;\
++}
++
++GEN_TEST_CASE (53, int, i)
++GEN_TEST_CASE (3, long long, ll)
++GEN_TEST_CASE (13, long long, ll)
++GEN_TEST_CASE (53, long long, ll)
++
++int
++main (int argc, char **argv)
++{
++
++#define SHIFT_CHECK(x, y, z, p) \
++	if (ushift_##y##_##p (x)\
++	    != ((__uint128_t) (unsigned z) x << y)) \
++	  abort ();\
++	if (shift_##y##_##p (x)\
++	    != ((__uint128_t) (signed z) x << y)) \
++	  abort ();
++
++  SHIFT_CHECK (0x12345678, 53, int, i)
++  SHIFT_CHECK (0xcafecafe, 53, int, i)
++
++  SHIFT_CHECK (0x1234567890abcdefLL, 3, long long, ll)
++  SHIFT_CHECK (0x1234567890abcdefLL, 13, long long, ll)
++  SHIFT_CHECK (0x1234567890abcdefLL, 53, long long, ll)
++  SHIFT_CHECK (0xcafecafedeaddeadLL, 3, long long, ll)
++  SHIFT_CHECK (0xcafecafedeaddeadLL, 13, long long, ll)
++  SHIFT_CHECK (0xcafecafedeaddeadLL, 53, long long, ll)
++
++  return 0;
++}
++
++/* { dg-final { scan-assembler-times "asr" 4 } } */
++/* { dg-final { scan-assembler-not "extr\t" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/assembler_arch_1.c
+@@ -0,0 +1,21 @@
++/* { dg-do assemble } */
++/* { dg-require-effective-target aarch64_asm_lse_ok } */
++/* { dg-options "-march=armv8-a" } */
++
++/* Make sure that the function header in assembly doesn't override
++   user asm arch_extension directives.  */
++
++__asm__ (".arch_extension lse");
++
++void
++foo (int i, int *v)
++{
++  register int w0 asm ("w0") = i;
++  register int *x1 asm ("x1") = v;
++
++  asm volatile (
++  "\tstset   %w[i], %[v]\n"
++  : [i] "+r" (w0), [v] "+Q" (v)
++  : "r" (x1)
++  : "x30");
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fno-ipa-icf" } */
++/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
+ 
+ #include "atomic-comp-swap-release-acquire.x"
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-inst-cas.c
+@@ -0,0 +1,61 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+lse -fno-ipa-icf" } */
++
++/* Test ARMv8.1-A CAS instruction.  */
++
++#include "atomic-inst-ops.inc"
++
++#define TEST TEST_TWO
++
++#define CAS_ATOMIC(FN, TY, MODEL1, MODEL2)				\
++  int FNNAME (FN, TY) (TY* val, TY* foo, TY* bar)			\
++  {									\
++    int model_s = MODEL1;						\
++    int model_f = MODEL2;						\
++    /* The success memory ordering must be at least as strong as	\
++       the failure memory ordering.  */					\
++    if (model_s < model_f)						\
++      return 0;								\
++    /* Ignore invalid memory orderings.  */				\
++    if (model_f == __ATOMIC_RELEASE || model_f == __ATOMIC_ACQ_REL)	\
++      return 0;								\
++    return __atomic_compare_exchange_n (val, foo, bar, 0, model_s, model_f); \
++  }
++
++#define CAS_ATOMIC_NORETURN(FN, TY, MODEL1, MODEL2)			\
++  void FNNAME (FN, TY) (TY* val, TY* foo, TY* bar)			\
++  {									\
++    int model_s = MODEL1;						\
++    int model_f = MODEL2;						\
++    /* The success memory ordering must be at least as strong as	\
++       the failure memory ordering.  */					\
++    if (model_s < model_f)						\
++      return;								\
++    /* Ignore invalid memory orderings.  */				\
++    if (model_f == __ATOMIC_RELEASE || model_f == __ATOMIC_ACQ_REL)	\
++      return;								\
++    __atomic_compare_exchange_n (val, foo, bar, 0, model_s, model_f);	\
++  }
++
++TEST (cas_atomic, CAS_ATOMIC)
++TEST (cas_atomic_noreturn, CAS_ATOMIC_NORETURN)
++
++
++/* { dg-final { scan-assembler-times "casb\t" 4} } */
++/* { dg-final { scan-assembler-times "casab\t" 20} } */
++/* { dg-final { scan-assembler-times "caslb\t" 4} } */
++/* { dg-final { scan-assembler-times "casalb\t" 36} } */
++
++/* { dg-final { scan-assembler-times "cash\t" 4} } */
++/* { dg-final { scan-assembler-times "casah\t" 20} } */
++/* { dg-final { scan-assembler-times "caslh\t" 4} } */
++/* { dg-final { scan-assembler-times "casalh\t" 36} } */
++
++/* { dg-final { scan-assembler-times "cas\t" 8} } */
++/* { dg-final { scan-assembler-times "casa\t" 40} } */
++/* { dg-final { scan-assembler-times "casl\t" 8} } */
++/* { dg-final { scan-assembler-times "casal\t" 72} } */
++
++/* { dg-final { scan-assembler-not "ldaxr\t" } } */
++/* { dg-final { scan-assembler-not "stlxr\t" } } */
++/* { dg-final { scan-assembler-not "dmb" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldadd.c
+@@ -0,0 +1,87 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+lse -fno-ipa-icf" } */
++
++/* Test ARMv8.1-A Load-ADD instruction.  */
++
++#include "atomic-inst-ops.inc"
++
++#define TEST TEST_ONE
++
++#define LOAD_ADD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_fetch_add (val, foo, MODEL);			\
++  }
++
++#define LOAD_ADD_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_fetch_add (val, foo, MODEL);				\
++  }
++
++#define LOAD_SUB(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_fetch_sub (val, foo, MODEL);			\
++  }
++
++#define LOAD_SUB_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_fetch_sub (val, foo, MODEL);				\
++  }
++
++#define ADD_LOAD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_add_fetch (val, foo, MODEL);			\
++  }
++
++#define ADD_LOAD_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_add_fetch (val, foo, MODEL);				\
++  }
++
++#define SUB_LOAD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_sub_fetch (val, foo, MODEL);			\
++  }
++
++#define SUB_LOAD_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_sub_fetch (val, foo, MODEL);				\
++  }
++
++TEST (load_add, LOAD_ADD)
++TEST (load_add_notreturn, LOAD_ADD_NORETURN)
++
++TEST (load_sub, LOAD_SUB)
++TEST (load_sub_notreturn, LOAD_SUB_NORETURN)
++
++TEST (add_load, ADD_LOAD)
++TEST (add_load_notreturn, ADD_LOAD_NORETURN)
++
++TEST (sub_load, SUB_LOAD)
++TEST (sub_load_notreturn, SUB_LOAD_NORETURN)
++
++/* { dg-final { scan-assembler-times "ldaddb\t" 16} } */
++/* { dg-final { scan-assembler-times "ldaddab\t" 32} } */
++/* { dg-final { scan-assembler-times "ldaddlb\t" 16} } */
++/* { dg-final { scan-assembler-times "ldaddalb\t" 32} } */
++
++/* { dg-final { scan-assembler-times "ldaddh\t" 16} } */
++/* { dg-final { scan-assembler-times "ldaddah\t" 32} } */
++/* { dg-final { scan-assembler-times "ldaddlh\t" 16} } */
++/* { dg-final { scan-assembler-times "ldaddalh\t" 32} } */
++
++/* { dg-final { scan-assembler-times "ldadd\t" 32} } */
++/* { dg-final { scan-assembler-times "ldadda\t" 64} } */
++/* { dg-final { scan-assembler-times "ldaddl\t" 32} } */
++/* { dg-final { scan-assembler-times "ldaddal\t" 64} } */
++
++/* { dg-final { scan-assembler-not "ldaxr\t" } } */
++/* { dg-final { scan-assembler-not "stlxr\t" } } */
++/* { dg-final { scan-assembler-not "dmb" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-inst-ldlogic.c
+@@ -0,0 +1,155 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+lse -fno-ipa-icf" } */
++
++/* Test ARMv8.1-A LD<logic-op> instruction.  */
++
++#include "atomic-inst-ops.inc"
++
++#define TEST TEST_ONE
++
++#define LOAD_OR(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_fetch_or (val, foo, MODEL);				\
++  }
++
++#define LOAD_OR_NORETURN(FN, TY, MODEL)					\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_fetch_or (val, foo, MODEL);				\
++  }
++
++#define LOAD_AND(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_fetch_and (val, foo, MODEL);			\
++  }
++
++#define LOAD_AND_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_fetch_and (val, foo, MODEL);				\
++  }
++
++#define LOAD_XOR(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_fetch_xor (val, foo, MODEL);			\
++  }
++
++#define LOAD_XOR_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_fetch_xor (val, foo, MODEL);				\
++  }
++
++#define OR_LOAD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_or_fetch (val, foo, MODEL);				\
++  }
++
++#define OR_LOAD_NORETURN(FN, TY, MODEL)					\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_or_fetch (val, foo, MODEL);				\
++  }
++
++#define AND_LOAD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_and_fetch (val, foo, MODEL);			\
++  }
++
++#define AND_LOAD_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_and_fetch (val, foo, MODEL);				\
++  }
++
++#define XOR_LOAD(FN, TY, MODEL)						\
++  TY FNNAME (FN, TY) (TY* val, TY* foo)					\
++  {									\
++    return __atomic_xor_fetch (val, foo, MODEL);			\
++  }
++
++#define XOR_LOAD_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo)				\
++  {									\
++    __atomic_xor_fetch (val, foo, MODEL);				\
++  }
++
++
++TEST (load_or, LOAD_OR)
++TEST (load_or_notreturn, LOAD_OR_NORETURN)
++
++TEST (load_and, LOAD_AND)
++TEST (load_and_notreturn, LOAD_AND_NORETURN)
++
++TEST (load_xor, LOAD_XOR)
++TEST (load_xor_notreturn, LOAD_XOR_NORETURN)
++
++TEST (or_load, OR_LOAD)
++TEST (or_load_notreturn, OR_LOAD_NORETURN)
++
++TEST (and_load, AND_LOAD)
++TEST (and_load_notreturn, AND_LOAD_NORETURN)
++
++TEST (xor_load, XOR_LOAD)
++TEST (xor_load_notreturn, XOR_LOAD_NORETURN)
++
++
++/* Load-OR.  */
++
++/* { dg-final { scan-assembler-times "ldsetb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldsetab\t" 16} } */
++/* { dg-final { scan-assembler-times "ldsetlb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldsetalb\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldseth\t" 8} } */
++/* { dg-final { scan-assembler-times "ldsetah\t" 16} } */
++/* { dg-final { scan-assembler-times "ldsetlh\t" 8} } */
++/* { dg-final { scan-assembler-times "ldsetalh\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldset\t" 16} } */
++/* { dg-final { scan-assembler-times "ldseta\t" 32} } */
++/* { dg-final { scan-assembler-times "ldsetl\t" 16} } */
++/* { dg-final { scan-assembler-times "ldsetal\t" 32} } */
++
++/* Load-AND.  */
++
++/* { dg-final { scan-assembler-times "ldclrb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldclrab\t" 16} } */
++/* { dg-final { scan-assembler-times "ldclrlb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldclralb\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldclrh\t" 8} } */
++/* { dg-final { scan-assembler-times "ldclrah\t" 16} } */
++/* { dg-final { scan-assembler-times "ldclrlh\t" 8} } */
++/* { dg-final { scan-assembler-times "ldclralh\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldclr\t" 16} */
++/* { dg-final { scan-assembler-times "ldclra\t" 32} } */
++/* { dg-final { scan-assembler-times "ldclrl\t" 16} } */
++/* { dg-final { scan-assembler-times "ldclral\t" 32} } */
++
++/* Load-XOR.  */
++
++/* { dg-final { scan-assembler-times "ldeorb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldeorab\t" 16} } */
++/* { dg-final { scan-assembler-times "ldeorlb\t" 8} } */
++/* { dg-final { scan-assembler-times "ldeoralb\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldeorh\t" 8} } */
++/* { dg-final { scan-assembler-times "ldeorah\t" 16} } */
++/* { dg-final { scan-assembler-times "ldeorlh\t" 8} } */
++/* { dg-final { scan-assembler-times "ldeoralh\t" 16} } */
++
++/* { dg-final { scan-assembler-times "ldeor\t" 16} */
++/* { dg-final { scan-assembler-times "ldeora\t" 32} } */
++/* { dg-final { scan-assembler-times "ldeorl\t" 16} } */
++/* { dg-final { scan-assembler-times "ldeoral\t" 32} } */
++
++/* { dg-final { scan-assembler-not "ldaxr\t" } } */
++/* { dg-final { scan-assembler-not "stlxr\t" } } */
++/* { dg-final { scan-assembler-not "dmb" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-inst-ops.inc
+@@ -0,0 +1,66 @@
++/* Support code for atomic instruction tests.  */
++
++/* Define types names without spaces.  */
++typedef unsigned char uchar;
++typedef unsigned short ushort;
++typedef unsigned int uint;
++typedef long long longlong;
++typedef unsigned long long ulonglong;
++typedef __int128_t int128;
++typedef __uint128_t uint128;
++
++#define FNNAME(NAME,TY) NAME
++
++/* Expand one-model functions.  */
++#define TEST_M1(NAME, FN, TY, MODEL, DUMMY)	\
++  FN (test_##NAME##_##TY, TY, MODEL)
++
++/* Expand two-model functions.  */
++#define TEST_M2(NAME, FN, TY, MODEL1, MODEL2)	\
++  FN (test_##NAME##_##TY, TY, MODEL1, MODEL2)
++
++/* Typest to test.  */
++#define TEST_TY(NAME, FN, N, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, char, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, uchar, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, short, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, ushort, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, int, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, uint, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, longlong, MODEL1, MODEL2)	\
++  TEST_M##N (NAME, FN, ulonglong, MODEL1, MODEL2)	\
++  TEST_M##N (NAME, FN, int128, MODEL1, MODEL2)		\
++  TEST_M##N (NAME, FN, uint128, MODEL1, MODEL2)
++
++/* Models to test.  */
++#define TEST_MODEL(NAME, FN, N)					\
++  TEST_TY (NAME##_relaxed, FN, N, __ATOMIC_RELAXED, DUMMY)	\
++  TEST_TY (NAME##_consume, FN, N, __ATOMIC_CONSUME, DUMMY)	\
++  TEST_TY (NAME##_acquire, FN, N, __ATOMIC_ACQUIRE, DUMMY)	\
++  TEST_TY (NAME##_release, FN, N, __ATOMIC_RELEASE, DUMMY)	\
++  TEST_TY (NAME##_acq_rel, FN, N, __ATOMIC_ACQ_REL, DUMMY)	\
++  TEST_TY (NAME##_seq_cst, FN, N, __ATOMIC_SEQ_CST, DUMMY)	\
++
++/* Cross-product of models to test.  */
++#define TEST_MODEL_M1(NAME, FN, N, M)			\
++  TEST_TY (NAME##_relaxed, FN, N, M, __ATOMIC_RELAXED)	\
++  TEST_TY (NAME##_consume, FN, N, M, __ATOMIC_CONSUME)	\
++  TEST_TY (NAME##_acquire, FN, N, M, __ATOMIC_ACQUIRE)	\
++  TEST_TY (NAME##_release, FN, N, M, __ATOMIC_RELEASE)	\
++  TEST_TY (NAME##_acq_rel, FN, N, M, __ATOMIC_ACQ_REL)	\
++  TEST_TY (NAME##_seq_cst, FN, N, M, __ATOMIC_SEQ_CST)	\
++
++#define TEST_MODEL_M2(NAME, FN)					\
++  TEST_MODEL_M1 (NAME##_relaxed, FN, 2, __ATOMIC_RELAXED)	\
++  TEST_MODEL_M1 (NAME##_consume, FN, 2, __ATOMIC_CONSUME)	\
++  TEST_MODEL_M1 (NAME##_acquire, FN, 2, __ATOMIC_ACQUIRE)	\
++  TEST_MODEL_M1 (NAME##_release, FN, 2, __ATOMIC_RELEASE)	\
++  TEST_MODEL_M1 (NAME##_acq_rel, FN, 2, __ATOMIC_ACQ_REL)	\
++  TEST_MODEL_M1 (NAME##_seq_cst, FN, 2, __ATOMIC_SEQ_CST)	\
++
++/* Expand functions for a cross-product of memory models and types.  */
++#define TEST_TWO(NAME, FN) TEST_MODEL_M2 (NAME, FN)
++
++/* Expand functions for a set of memory models and types.  */
++#define TEST_ONE(NAME, FN) TEST_MODEL (NAME, FN, 1)
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-inst-swp.c
+@@ -0,0 +1,44 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+lse -fno-ipa-icf" } */
++
++/* Test ARMv8.1-A SWP instruction.  */
++
++#include "atomic-inst-ops.inc"
++
++#define TEST TEST_ONE
++
++#define SWAP_ATOMIC(FN, TY, MODEL)					\
++  TY FNNAME (FN, TY) (TY* val, TY foo)					\
++  {									\
++    return __atomic_exchange_n (val, foo, MODEL);			\
++  }
++
++#define SWAP_ATOMIC_NORETURN(FN, TY, MODEL)				\
++  void FNNAME (FN, TY) (TY* val, TY* foo, TY* bar)			\
++  {									\
++    __atomic_exchange (val, foo, bar, MODEL);				\
++  }
++
++
++TEST (swap_atomic, SWAP_ATOMIC)
++TEST (swap_atomic_noreturn, SWAP_ATOMIC_NORETURN)
++
++
++/* { dg-final { scan-assembler-times "swpb\t" 4} } */
++/* { dg-final { scan-assembler-times "swpab\t" 8} } */
++/* { dg-final { scan-assembler-times "swplb\t" 4} } */
++/* { dg-final { scan-assembler-times "swpalb\t" 8} } */
++
++/* { dg-final { scan-assembler-times "swph\t" 4} } */
++/* { dg-final { scan-assembler-times "swpah\t" 8} } */
++/* { dg-final { scan-assembler-times "swplh\t" 4} } */
++/* { dg-final { scan-assembler-times "swpalh\t" 8} } */
++
++/* { dg-final { scan-assembler-times "swp\t" 8} } */
++/* { dg-final { scan-assembler-times "swpa\t" 16} } */
++/* { dg-final { scan-assembler-times "swpl\t" 8} } */
++/* { dg-final { scan-assembler-times "swpal\t" 16} } */
++
++/* { dg-final { scan-assembler-not "ldaxr\t" } } */
++/* { dg-final { scan-assembler-not "stlxr\t" } } */
++/* { dg-final { scan-assembler-not "dmb" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-acq_rel.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-acquire.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-char.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-consume.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ int v = 0;
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-int.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ long v = 0;
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-relaxed.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-release.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-seq_cst.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "atomic-op-short.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/bfxil_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bfxil_1.c
+@@ -37,4 +37,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/bfxil_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bfxil_2.c
+@@ -39,4 +39,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/bics_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_1.c
+@@ -12,7 +12,7 @@ bics_si_test1 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -24,7 +24,7 @@ bics_si_test2 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ typedef long long s64;
+@@ -38,7 +38,7 @@ bics_di_test1 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -50,7 +50,7 @@ bics_di_test2 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -60,7 +60,7 @@ main ()
+   s64 y;
+ 
+   x = bics_si_test1 (29, ~4, 5);
+-  if (x != ((29 & 4) + ~4 + 5))
++  if (x != (29 & 4))
+     abort ();
+ 
+   x = bics_si_test1 (5, ~2, 20);
+@@ -68,7 +68,7 @@ main ()
+     abort ();
+ 
+   x = bics_si_test2 (35, ~4, 5);
+-  if (x != ((35 & ~(~4 << 3)) + ~4 + 5))
++  if (x != (35 & ~(~4 << 3)))
+     abort ();
+ 
+   x = bics_si_test2 (96, ~2, 20);
+@@ -79,7 +79,7 @@ main ()
+                      ~0x320000004ll,
+                      0x505050505ll);
+ 
+-  if (y != ((0x130000029ll & 0x320000004ll) + ~0x320000004ll + 0x505050505ll))
++  if (y != (0x130000029ll & 0x320000004ll))
+     abort ();
+ 
+   y = bics_di_test1 (0x5000500050005ll,
+@@ -91,8 +91,7 @@ main ()
+   y = bics_di_test2 (0x130000029ll,
+                      ~0x064000008ll,
+                      0x505050505ll);
+-  if (y != ((0x130000029ll & ~(~0x064000008ll << 3))
+-	    + ~0x064000008ll + 0x505050505ll))
++  if (y != (0x130000029ll & ~(~0x064000008ll << 3)))
+     abort ();
+ 
+   y = bics_di_test2 (0x130002900ll,
+@@ -103,5 +102,3 @@ main ()
+ 
+   return 0;
+ }
+-
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/bics_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_2.c
+@@ -108,4 +108,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/bics_3.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_3.c
+@@ -66,4 +66,3 @@ main (void)
+ /* { dg-final { scan-assembler-times "bics\txzr, x\[0-9\]+, x\[0-9\]+" 2 } } */
+ /* { dg-final { scan-assembler-times "bics\txzr, x\[0-9\]+, x\[0-9\]+, lsl 2" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/bics_4.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/bics_4.c
+@@ -84,4 +84,3 @@ main ()
+ 
+ /* { dg-final { scan-assembler-times "bics\twzr, w\[0-9\]+, w\[0-9\]+" 2 } } */
+ /* { dg-final { scan-assembler-times "bics\txzr, x\[0-9\]+, x\[0-9\]+" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/cinc_common_1.c
+@@ -0,0 +1,64 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O2 -fno-inline" } */
++
++extern void abort (void);
++
++int
++foosi (int x)
++{
++  return x > 100 ? x - 2 : x - 1;
++}
++
++int
++barsi (int x)
++{
++  return x > 100 ? x + 4 : x + 3;
++}
++
++long
++foodi (long x)
++{
++  return x > 100 ? x - 2 : x - 1;
++}
++
++long
++bardi (long x)
++{
++  return x > 100 ? x + 4 : x + 3;
++}
++
++/* { dg-final { scan-assembler-times "cs?inc\tw\[0-9\]*" 2 } } */
++/* { dg-final { scan-assembler-times "cs?inc\tx\[0-9\]*" 2 } } */
++
++int
++main (void)
++{
++  if (foosi (105) != 103)
++    abort ();
++
++  if (foosi (95) != 94)
++    abort ();
++
++  if (barsi (105) != 109)
++    abort ();
++
++  if (barsi (95) != 98)
++    abort ();
++
++  if (foodi (105) != 103)
++    abort ();
++
++  if (foodi (95) != 94)
++    abort ();
++
++  if (bardi (105) != 109)
++    abort ();
++
++  if (bardi (95) != 98)
++    abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-assembler-not "csel\tx\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-not "csel\tw\[0-9\]*.*" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/cmn-neg.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/cmn-neg.c
+@@ -30,4 +30,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/cmn-neg2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/cmn-neg2.c
+@@ -31,4 +31,3 @@ main (void)
+ }
+ /* { dg-final { scan-assembler-not "cmn\t" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/cmpimm_branch_1.c
+@@ -0,0 +1,26 @@
++/* { dg-do compile } */
++/* { dg-options "-save-temps -O2" } */
++
++/* Test that we emit a sub+subs sequence rather than mov+movk+cmp.  */
++
++void g (void);
++void
++foo (int x)
++{
++  if (x != 0x123456)
++    g ();
++}
++
++void
++fool (long long x)
++{
++  if (x != 0x123456)
++    g ();
++}
++
++/* { dg-final { scan-assembler-not "cmp\tw\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-not "cmp\tx\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-times "sub\tw\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "sub\tx\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "subs\tw\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "subs\tx\[0-9\]+.*" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/cmpimm_cset_1.c
+@@ -0,0 +1,23 @@
++/* { dg-do compile } */
++/* { dg-options "-save-temps -O2" } */
++
++/* Test that we emit a sub+subs sequence rather than mov+movk+cmp.  */
++
++int
++foo (int x)
++{
++  return x == 0x123456;
++}
++
++long long
++fool (long long x)
++{
++  return x == 0x123456;
++}
++
++/* { dg-final { scan-assembler-not "cmp\tw\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-not "cmp\tx\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-times "sub\tw\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "sub\tx\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "subs\tw\[0-9\]+.*" 1 } } */
++/* { dg-final { scan-assembler-times "subs\tx\[0-9\]+.*" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/combine_bfi_1.c
+@@ -0,0 +1,34 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-combine" } */
++
++int
++f1 (int x, int y)
++{
++  return (x & ~0x0ffff00) | ((y << 8) & 0x0ffff00);
++}
++
++int
++f2 (int x, int y)
++{
++  return (x & ~0x0ff000) | ((y & 0x0ff) << 12);
++}
++
++int
++f3 (int x, int y)
++{
++  return (x & ~0xffff) | (y & 0xffff);
++}
++
++int
++f4 (int x, int y)
++{
++  return (x & ~0xff) | (y & 0xff);
++}
++
++long
++f5 (long x, long y)
++{
++  return (x & ~0xffffffffull) | (y & 0xffffffff);
++}
++
++/* { dg-final { scan-rtl-dump-times "\\*aarch64_bfi" 5 "combine" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/copysign_1.c
+@@ -0,0 +1,81 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps" } */
++
++double fabs (double);
++
++double
++check (double x, double y)
++{
++  return __builtin_copysign (x, y);
++}
++
++double
++check1 (double x)
++{
++  return __builtin_copysign (x, 1.0);
++}
++
++double
++check2 (double x)
++{
++  return __builtin_copysign (1.0, x);
++}
++
++double
++check3 (double x)
++{
++  return -__builtin_copysign (x, 1.0);
++}
++
++double
++check4 (double x, double y)
++{
++  return x * __builtin_copysign (x, y);
++}
++
++double
++check5 (double x, double y)
++{
++  return __builtin_copysign (-x, -y);
++}
++
++int
++main (int argc, char** argv)
++{
++  double x = 2.0;
++  double y = -5.0;
++  double epsilon = 0.00001;
++
++  double expected = -2.0;
++
++  if (fabs (check (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 2.0;
++
++  if (fabs (check1 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 1.0;
++
++  if (fabs (check2 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = -2.0;
++
++  if (fabs (check3 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = -4.0;
++
++  if (fabs (check4 (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 2.0;
++
++  if (fabs (check5 (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++}
++
++/* { dg-final { scan-assembler-not "copysign\tw" } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/copysign_2.c
+@@ -0,0 +1,81 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps" } */
++
++float fabsf (float);
++
++float
++check (float x, float y)
++{
++  return __builtin_copysignf (x, y);
++}
++
++float
++check1 (float x)
++{
++  return __builtin_copysignf (x, 1.0);
++}
++
++float
++check2 (float x)
++{
++  return __builtin_copysignf (1.0, x);
++}
++
++float
++check3 (float x)
++{
++  return -__builtin_copysignf (x, 1.0);
++}
++
++float
++check4 (float x, float y)
++{
++  return x * __builtin_copysignf (x, y);
++}
++
++float
++check5 (float x, float y)
++{
++  return __builtin_copysignf (-x, -y);
++}
++
++int
++main (int argc, char** argv)
++{
++  float x = 2.0f;
++  float y = -5.0f;
++  float epsilon = 0.00001f;
++
++  float expected = -2.0f;
++
++  if (fabsf (check (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 2.0f;
++
++  if (fabsf (check1 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 1.0f;
++
++  if (fabsf (check2 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = -2.0f;
++
++  if (fabsf (check3 (x) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = -4.0f;
++
++  if (fabsf (check4 (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++
++  expected = 2.0f;
++
++  if (fabsf (check5 (x, y) - expected) >= epsilon)
++    __builtin_abort ();
++}
++
++/* { dg-final { scan-assembler-not "copysign\tw" } } */
++
+--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c
+@@ -1,4 +1,4 @@
+-/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */
++/* { dg-error "invalid feature" "" {target "aarch64*-*-*" } } */
+ /* { dg-options "-O2 -mcpu=cortex-a53+dummy" } */
+ 
+ void f ()
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/csel_bfx_1.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-save-temps -O2" } */
++
++int
++foo (int a, int b)
++{
++  return ((a & (1 << 25)) ? 5 : 4);
++}
++
++/* { dg-final { scan-assembler "ubfx\t\[xw\]\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-not "csel\tw\[0-9\]*.*" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/csel_imms_inc_1.c
+@@ -0,0 +1,42 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O2 -fno-inline" } */
++
++extern void abort (void);
++
++int
++fooinc (int x)
++{
++  if (x)
++    return 1025;
++  else
++    return 1026;
++}
++
++int
++fooinc2 (int x)
++{
++  if (x)
++    return 1026;
++  else
++    return 1025;
++}
++
++int
++main (void)
++{
++  if (fooinc (0) != 1026)
++    abort ();
++
++  if (fooinc (1) != 1025)
++    abort ();
++
++  if (fooinc2 (0) != 1025)
++    abort ();
++
++  if (fooinc2 (1) != 1026)
++    abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-assembler-not "csel\tw\[0-9\]*.*" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c
+@@ -56,3 +56,15 @@ int test_csneg_cmp(int x)
+     x = -x;
+   return x;
+ }
++
++unsigned long long
++test_csneg_uxtw (unsigned int a,
++		 unsigned int b,
++		 unsigned int c)
++{
++  /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */
++  /* { dg-final { scan-assembler-not "uxtw\tw\[0-9\]*.*" } } */
++  unsigned int val;
++  val = a ? b: -c;
++  return val;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/cvtf_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/cvtf_1.c
+@@ -92,4 +92,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/extr.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/extr.c
+@@ -31,4 +31,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/f16_movs_1.c
+@@ -0,0 +1,26 @@
++/* { dg-do run } */
++/* { dg-options "-fno-inline -O2" } */
++
++#include <arm_neon.h>
++
++__fp16
++func2 (__fp16 a, __fp16 b)
++{
++  return b;
++}
++
++int
++main (int argc, char **argv)
++{
++  __fp16 array[16];
++  int i;
++
++  for (i = 0; i < sizeof (array) / sizeof (array[0]); i++)
++    array[i] = i;
++
++  array[0] = func2 (array[1], array[2]);
++
++  __builtin_printf ("%f\n", array[0]); /* { dg-output "2.0" } */
++
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/fabd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/fabd.c
+@@ -35,4 +35,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double1.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (int x)
++{
++  return (double) (float) (x | (int) 0xff000000);
++}
++
++/* { dg-final { scan-assembler {\tscvtf\td0, w[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double2.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (int x)
++{
++  return (double) (float) (x | (int) 0xfe000000);
++}
++
++/* { dg-final { scan-assembler {\tscvtf\ts[0-9]*, w[0-9]*} } } */
++/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double3.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (int x)
++{
++  return (double) (float) ((x & -16) | (int) 0xf0000000);
++}
++
++/* { dg-final { scan-assembler {\tscvtf\td0, w[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_int_float_double4.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (int x)
++{
++  return (double) (float) ((x & -16) | (int) 0xfe00000);
++}
++
++/* { dg-final { scan-assembler {\tscvtf\ts[0-9]*, w[0-9]*} } } */
++/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double1.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (unsigned int x)
++{
++  return (double) (float) (x & 0xffffff);
++}
++
++/* { dg-final { scan-assembler {\t[su]cvtf\td0, w[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double2.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (unsigned int x)
++{
++  return (double) (float) (x & 0x1ffffff);
++}
++
++/* { dg-final { scan-assembler {\t[su]cvtf\ts[0-9]*, w[0-9]*} } } */
++/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double3.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (unsigned int x)
++{
++  return (double) (float) (x & 0xffffff00);
++}
++
++/* { dg-final { scan-assembler {\tucvtf\td0, w[0-9]*} } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_uint_float_double4.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++double
++foo (unsigned int x)
++{
++  return (double) (float) (x & 0xffffff80);
++}
++
++/* { dg-final { scan-assembler {\tucvtf\ts[0-9]*, w[0-9]*} } } */
++/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/fmla_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmla_intrinsic_1.c
+@@ -112,5 +112,4 @@ main (int argc, char **argv)
+    vfmaq_laneq_f64.  */
+ /* { dg-final { scan-assembler-times "fmla\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d\\\[\[0-9\]+\\\]" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/fmls_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmls_intrinsic_1.c
+@@ -113,5 +113,4 @@ main (int argc, char **argv)
+    vfmsq_laneq_f64.  */
+ /* { dg-final { scan-assembler-times "fmls\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d\\\[\[0-9\]+\\\]" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovd-zero-mem.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void
++foo (double *output)
++{
++  *output = 0.0;
++}
++
++/* { dg-final { scan-assembler "str\\txzr, \\\[x0\\\]" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovd-zero-reg.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void bar (double);
++void
++foo (void)
++{
++  bar (0.0);
++}
++
++/* { dg-final { scan-assembler "fmov\\td0, xzr" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/fmovd-zero.c
++++ b/src//dev/null
+@@ -1,10 +0,0 @@
+-/* { dg-do compile } */
+-/* { dg-options "-O2" } */
+-
+-void
+-foo (double *output)
+-{
+-  *output = 0.0;
+-}
+-
+-/* { dg-final { scan-assembler "fmov\\td\[0-9\]+, xzr" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovf-zero-mem.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void
++foo (float *output)
++{
++  *output = 0.0;
++}
++
++/* { dg-final { scan-assembler "str\\twzr, \\\[x0\\\]" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovf-zero-reg.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void bar (float);
++void
++foo (void)
++{
++  bar (0.0);
++}
++
++/* { dg-final { scan-assembler "fmov\\ts0, wzr" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/fmovf-zero.c
++++ b/src//dev/null
+@@ -1,10 +0,0 @@
+-/* { dg-do compile } */
+-/* { dg-options "-O2" } */
+-
+-void
+-foo (float *output)
+-{
+-  *output = 0.0;
+-}
+-
+-/* { dg-final { scan-assembler "fmov\\ts\[0-9\]+, wzr" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovld-zero-mem.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void
++foo (long double *output)
++{
++  *output = 0.0;
++}
++
++/* { dg-final { scan-assembler "stp\\txzr, xzr, \\\[x0\\\]" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovld-zero-reg.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void bar (long double);
++void
++foo (void)
++{
++  bar (0.0);
++}
++
++/* { dg-final { scan-assembler "movi\\tv0\.2d, #0" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/fmul_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/fmul_intrinsic_1.c
+@@ -112,5 +112,4 @@ main (int argc, char **argv)
+    vmulq_laneq_f64.  */
+ /* { dg-final { scan-assembler-times "fmul\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.d\\\[\[0-9\]+\\\]" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_1.c
+@@ -0,0 +1,34 @@
++/* { dg-do run } */
++/* { dg-options "-O2" } */
++/* { dg-additional-options "-mfp16-format=ieee" {target "arm*-*-*"} } */
++
++extern void abort (void);
++
++#define EPSILON 0.0001
++
++int
++main (int argc, char **argv)
++{
++  float f1 = 3.14159f;
++  float f2 = 2.718f;
++  /* This 'assembler' statement should be portable between ARM and AArch64.  */
++  asm volatile ("" : : : "memory");
++  __fp16 in1 = f1;
++  __fp16 in2 = f2;
++
++  /* Do the addition on __fp16's (implicitly converts both operands to
++     float32, adds, converts back to f16, then we convert back to f32).  */
++  __fp16 res1 = in1 + in2;
++  asm volatile ("" : : : "memory");
++  float f_res_1 = res1;
++
++  /* Do the addition on float32's (we convert both operands to f32, and add,
++     as above, but skip the final conversion f32 -> f16 -> f32).  */
++  float f1a = in1;
++  float f2a = in2;
++  float f_res_2 = f1a + f2a;
++
++  if (__builtin_fabs (f_res_2 - f_res_1) > EPSILON)
++    abort ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_2.c
+@@ -0,0 +1,33 @@
++/* { dg-do run } */
++/* { dg-options "-O2" } */
++/* { dg-additional-options "-mfp16-format=ieee" {target "arm*-*-*"} } */
++
++extern void abort (void);
++
++#define EPSILON 0.0001
++
++int
++main (int argc, char **argv)
++{
++  int i1 = 3;
++  int i2 = 2;
++  /*  This 'assembler' should be portable across ARM and AArch64.  */
++  asm volatile ("" : : : "memory");
++
++  __fp16 in1 = i1;
++  __fp16 in2 = i2;
++
++  /* Do the addition on __fp16's (implicitly converts both operands to
++     float32, adds, converts back to f16, then we convert to int).  */
++  __fp16 res1 = in1 + in2;
++  asm volatile ("" : : : "memory");
++  int result1 = res1;
++
++  /* Do the addition on int's (we convert both operands directly to int, add,
++     and we're done).  */
++  int result2 = ((int) in1) + ((int) in2);
++
++  if (__builtin_abs (result2 - result1) > EPSILON)
++    abort ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fp16/fp16.exp
+@@ -0,0 +1,43 @@
++# Tests of 16-bit floating point (__fp16), for both ARM and AArch64.
++# Copyright (C) 2015 Free Software Foundation, Inc.
++
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 3 of the License, or
++# (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with GCC; see the file COPYING3.  If not see
++# <http://www.gnu.org/licenses/>.
++
++# GCC testsuite that uses the `dg.exp' driver.
++
++# Exit immediately if this isn't an ARM or AArch64 target.
++if {![istarget arm*-*-*]
++    && ![istarget aarch64*-*-*]} then {
++  return
++}
++
++# Load support procs.
++load_lib gcc-dg.exp
++
++# If a testcase doesn't have special options, use these.
++global DEFAULT_CFLAGS
++if ![info exists DEFAULT_CFLAGS] then {
++    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
++}
++
++# Initialize `dg'.
++dg-init
++
++# Main loop.
++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cC\]]] \
++	"" $DEFAULT_CFLAGS
++
++# All done.
++dg-finish
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fp16/set_zero_1.c
+@@ -0,0 +1,21 @@
++/* { dg-do run } */
++/* { dg-options "-O2" } */
++/* { dg-additional-options "-mfp16-format=ieee" { target "arm*-*-*" } } */
++
++extern void abort (void);
++
++__attribute__ ((noinline))
++void setfoo (__fp16 *f)
++{
++  *f = 0.0;
++}
++
++int
++main (int argc, char **argv)
++{
++  __fp16 a = 1.0;
++  setfoo (&a);
++  if (a != 0.0)
++    abort ();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/fpcr_fpsr_1.c
+@@ -0,0 +1,26 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void
++f1 (int *x)
++{
++  __builtin_aarch64_set_fpsr (*x);
++}
++
++void
++f2 (int *x)
++{
++  __builtin_aarch64_set_fpcr (*x);
++}
++
++void
++f3 (int *x)
++{
++  *x = __builtin_aarch64_get_fpsr ();
++}
++
++void
++f4 (int *x)
++{
++  *x = __builtin_aarch64_get_fpcr ();
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/get_lane_f16_1.c
+@@ -0,0 +1,25 @@
++
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++void fn2 ();
++
++typedef __Float16x4_t float16x4_t;
++__fp16 result_float16x4[1];
++float16x4_t exec_vst1_lane_vector_float16x4, exec_vst1_lane___trans_tmp_1;
++
++void fn1 ()
++{
++  exec_vst1_lane_vector_float16x4 = exec_vst1_lane___trans_tmp_1;
++  __fp16 *__a = result_float16x4;
++  float16x4_t __b = exec_vst1_lane___trans_tmp_1;
++  int __lane = 0;
++  *__a = ({ __b[__lane]; });
++  union {
++      short i;
++      __fp16 f;
++  } tmp_res;
++  tmp_res.f = result_float16x4[0];
++  if (tmp_res.i)
++    fn2();
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/got_mem_hoist_1.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fpic -fdump-rtl-loop2_invariant" } */
++/* { dg-skip-if "Load/Store hoisted by RTL PRE already" { aarch64*-*-* }  { "-mcmodel=tiny" "-mcmodel=large" } { "" } } */
++
++int bar (int);
++int cal (void *);
++
++int
++foo (int a, int bound)
++{
++  int i = 0;
++  int sum = 0;
++
++  for (i; i < bound; i++)
++    sum = cal (bar);
++
++  return sum;
++}
++
++/* The insn which loads function address from GOT table should be moved out
++   of the loop.  */
++/* { dg-final { scan-rtl-dump "Decided" "loop2_invariant" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/insv_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/insv_1.c
+@@ -82,4 +82,3 @@ main (int argc, char** argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/insv_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/insv_2.c
+@@ -82,4 +82,3 @@ main (int argc, char** argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/ldp_vec_64_1.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-Ofast" } */
++
++typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
++
++void
++foo (int32x2_t *foo, int32x2_t *bar)
++{
++  int i = 0;
++  int32x2_t val = { 3, 2 };
++
++  for (i = 0; i < 1024; i+=2)
++    foo[i] = bar[i] + bar[i + 1];
++}
++
++/* { dg-final { scan-assembler "ldp\td\[0-9\]+, d\[0-9\]" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/legitimize_stack_var_before_reload_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/legitimize_stack_var_before_reload_1.c
+@@ -18,4 +18,3 @@ test15 (void)
+ 
+ /* { dg-final { scan-rtl-dump "\\(mem\[^\\n\]*\\(plus\[^\\n\]*virtual-stack-vars" "expand" } } */
+ 
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/long_branch_1.c
+@@ -0,0 +1,91 @@
++/* { dg-do assemble } */
++/* { dg-timeout-factor 2.0 } */
++/* { dg-options "-O1 -fno-reorder-blocks -fno-tree-cselim --save-temps" } */
++
++
++__attribute__((noinline, noclone)) int
++restore (int a, int b)
++{
++  return a * b;
++}
++
++__attribute__((noinline, noclone)) void
++do_nothing (int *input)
++{
++  *input = restore (*input, 1);
++  return;
++}
++#define ENTRY_SUM(n, x) \
++    sum = sum / ((n) + (x)); \
++    sum = restore (sum, (n) + (x));
++
++#define ENTRY_SUM2(n, x) ENTRY_SUM ((n), (x)) ENTRY_SUM ((n), (x)+1)
++#define ENTRY_SUM4(n, x) ENTRY_SUM2 ((n), (x)) ENTRY_SUM2 ((n), (x)+2)
++#define ENTRY_SUM8(n, x) ENTRY_SUM4 ((n), (x)) ENTRY_SUM4 ((n), (x)+4)
++#define ENTRY_SUM16(n, x) ENTRY_SUM8 ((n), (x)) ENTRY_SUM8 ((n), (x)+8)
++#define ENTRY_SUM32(n, x) ENTRY_SUM16 ((n), (x)) ENTRY_SUM16 ((n), (x)+16)
++#define ENTRY_SUM64(n, x) ENTRY_SUM32 ((n), (x)) ENTRY_SUM32 ((n), (x)+32)
++#define ENTRY_SUM128(n, x) ENTRY_SUM64 ((n), (x)) ENTRY_SUM64 ((n), (x)+64)
++
++#define CASE_ENTRY(n) \
++  case n: \
++    sum = sum / (n + 1); \
++    sum = restore (sum, n + 1); \
++    if (sum == (n + addend)) \
++      break;\
++    ENTRY_SUM128 ((n), 2) \
++    ENTRY_SUM16 ((n), 130) \
++    break;
++
++#define CASE_ENTRY2(n) CASE_ENTRY ((n)) CASE_ENTRY ((n)+1)
++#define CASE_ENTRY4(n) CASE_ENTRY2 ((n)) CASE_ENTRY2 ((n)+2)
++#define CASE_ENTRY8(n) CASE_ENTRY4 ((n)) CASE_ENTRY4 ((n)+4)
++#define CASE_ENTRY16(n) CASE_ENTRY8 ((n)) CASE_ENTRY8 ((n)+8)
++#define CASE_ENTRY32(n) CASE_ENTRY16 ((n)) CASE_ENTRY16 ((n)+16)
++#define CASE_ENTRY64(n) CASE_ENTRY32 ((n)) CASE_ENTRY32 ((n)+32)
++#define CASE_ENTRY128(n) CASE_ENTRY64 ((n)) CASE_ENTRY64 ((n)+64)
++
++__attribute__((noinline, noclone)) long long
++test_and_branch (int selector, int addend, int cond)
++{
++  long long sum = selector + 1;
++
++  if (selector > 200)
++    {
++start0:
++      return sum - 1;
++start1:
++      return sum + 1;
++start2:
++      return sum;
++start3:
++      return sum - 2;
++    }
++  else
++    {
++      switch (selector)
++	{
++	  CASE_ENTRY128 (1)
++	  CASE_ENTRY64 (129)
++	  CASE_ENTRY16 (193)
++	}
++
++      do_nothing ((int *)&sum);
++
++      if (cond == 0)
++	goto start0;
++      else if (cond < 0)
++	goto start1;
++      else if ((cond & 0x010) != 0)
++	goto start2;
++      else if (cond >= 14)
++	goto start3;
++
++    }
++
++  return -1;
++}
++
++/* { dg-final { scan-assembler "Lbcond" } } */
++/* { dg-final { scan-assembler "Lcb" } } */
++/* { dg-final { scan-assembler "Ltb" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/lr_free_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/lr_free_1.c
+@@ -35,4 +35,3 @@ main (int argc, char **argv)
+ /* { dg-final { scan-assembler "ldr\tw30, \\\[sp, \[0-9\]+\\\]" } } */
+ /* { dg-final { scan-assembler-times "ldr\tx30, \\\[sp\\\], \[0-9\]+" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/lr_free_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/lr_free_2.c
+@@ -25,5 +25,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+-/* { dg-final { cleanup-rtl-dump "ira" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
+@@ -0,0 +1,10 @@
++/* { dg-options "-mgeneral-regs-only" } */
++
++typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
++
++/* { dg-error "'-mgeneral-regs-only' is incompatible with vector return type" "" {target "aarch64*-*-*"} 7 } */
++/* { dg-error "'-mgeneral-regs-only' is incompatible with vector argument" "" {target "aarch64*-*-*"} 7 } */
++int32x2_t test (int32x2_t a, int32x2_t b)
++{
++  return a + b;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c
+@@ -0,0 +1,15 @@
++/* { dg-options "-mgeneral-regs-only" } */
++
++#include <stdarg.h>
++
++typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
++
++int
++test (int i, ...)
++{
++  va_list argp;
++  va_start (argp, i);
++  int32x2_t x = (int32x2_t) {0, 1};
++  x += va_arg (argp, int32x2_t); /* { dg-error "'-mgeneral-regs-only' is incompatible with vector varargs" } */
++  return x[0] + x[1];
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-mgeneral-regs-only -O2" } */
++
++extern void abort (void);
++
++int
++test (int i, ...)
++{
++  float f = (float) i; /* { dg-error "'-mgeneral-regs-only' is incompatible with floating-point code" } */
++  if (f != f) abort ();
++  return 2;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_4.c
+@@ -0,0 +1,9 @@
++/* { dg-options "-mgeneral-regs-only -march=armv8-a+simd+fp -O2" } */
++
++int
++test (void)
++{
++  return 1;
++}
++
++/* { dg-final { scan-assembler-times "\\.arch armv8-a\n" 1 } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/mla_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/mla_intrinsic_1.c
+@@ -80,5 +80,4 @@ main (int argc, char **argv)
+ 
+ /* { dg-final { scan-assembler-times "mla\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s\\\[\[0-9\]+\\\]" 4 } } */
+ /* { dg-final { scan-assembler-times "mla\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h\\\[\[0-9\]+\\\]" 4 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/mls_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/mls_intrinsic_1.c
+@@ -85,5 +85,4 @@ main (int argc, char **argv)
+ 
+ /* { dg-final { scan-assembler-times "mls\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.4s\\\[\[0-9\]+\\\]" 4 } } */
+ /* { dg-final { scan-assembler-times "mls\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.8h\\\[\[0-9\]+\\\]" 4 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mod_2.c
+@@ -0,0 +1,7 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++#include "mod_2.x"
++
++/* { dg-final { scan-assembler "csneg\t\[wx\]\[0-9\]*" } } */
++/* { dg-final { scan-assembler-times "and\t\[wx\]\[0-9\]*" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mod_2.x
+@@ -0,0 +1,5 @@
++int
++f (int x)
++{
++  return x % 2;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mod_256.c
+@@ -0,0 +1,6 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++#include "mod_256.x"
++
++/* { dg-final { scan-assembler "csneg\t\[wx\]\[0-9\]*" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mod_256.x
+@@ -0,0 +1,5 @@
++int
++f (int x)
++{
++  return x % 256;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/movk.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/movk.c
+@@ -28,4 +28,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/mul_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/mul_intrinsic_1.c
+@@ -79,5 +79,4 @@ main (int argc, char **argv)
+ 
+ /* { dg-final { scan-assembler-times "mul\\tv\[0-9\]+\.4s, v\[0-9\]+\.4s, v\[0-9\]+\.s\\\[\[0-9\]+\\\]" 4 } } */
+ /* { dg-final { scan-assembler-times "mul\\tv\[0-9\]+\.8h, v\[0-9\]+\.8h, v\[0-9\]+\.h\\\[\[0-9\]+\\\]" 4 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_1.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++int
++foo (int x)
++{
++  return x * 100;
++}
++
++/* { dg-final { scan-assembler-times "mul\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_2.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++int
++foo (int x)
++{
++  return x * 25;
++}
++
++/* { dg-final { scan-assembler-times "mul\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_3.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++int
++foo (int x)
++{
++  return x * 11;
++}
++
++/* { dg-final { scan-assembler-times "mul\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_4.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++long
++foo (int x, int y)
++{
++   return (long)x * 6L;
++}
++
++/* { dg-final { scan-assembler-times "smull\tx\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_5.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++int
++foo (int x)
++{
++  return x * 10;
++}
++
++/* { dg-final { scan-assembler-not "\tw1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/mult-synth_6.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++int
++foo (int x)
++{
++  return x * 20;
++}
++
++/* { dg-final { scan-assembler-not "\tw1" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/neg_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/neg_1.c
+@@ -64,4 +64,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/neg_abs_1.c
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* { dg-options "-save-temps -O2" } */
++
++int
++f1 (int x)
++{
++  return x < 0 ? x : -x;
++}
++
++long long
++f2 (long long x)
++{
++  return x < 0 ? x : -x;
++}
++
++/* { dg-final { scan-assembler-not "\tneg\tw\[0-9\]*.*" } } */
++/* { dg-final { scan-assembler-not "\tneg\tx\[0-9\]*.*" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/ngc.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/ngc.c
+@@ -63,4 +63,3 @@ main ()
+ 
+ /* { dg-final { scan-assembler-times "ngc\tw\[0-9\]+, w\[0-9\]+" 2 } } */
+ /* { dg-final { scan-assembler-times "ngc\tx\[0-9\]+, x\[0-9\]+" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/nofp_1.c
+@@ -0,0 +1,19 @@
++/* { dg-skip-if "conflicting -march" { *-*-* } { "-march=*" } { "-march=*+nofp" } } */
++/* If there are multiple -march's, the latest wins; skip the test either way.
++   -march overrides -mcpu, so there is no possibility of conflict.  */
++
++/* { dg-options "-march=armv8-a+nofp" } */
++
++#include <stdarg.h>
++
++typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
++
++int test (int i, ...);
++
++int
++main (int argc, char **argv)
++{
++  int32x2_t a = (int32x2_t) {0, 1};
++  int32x2_t b = (int32x2_t) {2, 3};
++  return test (2, a, b); /* { dg-error "'\\+nofp' feature modifier is incompatible with vector argument" } */
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/noplt_1.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fpic -fno-plt" } */
++/* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-mcmodel=large" } { "" } } */
++
++int* bar (void) ;
++
++int
++foo (int a)
++{
++  int *b = bar ();
++  return b[a];
++}
++
++/* { dg-final { scan-assembler "blr" } } */
++/* { dg-final { scan-assembler-not "bl\t" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/noplt_2.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fpic" } */
++/* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-mcmodel=large" } { "" } } */
++
++__attribute__ ((noplt))
++int* bar0 (void) ;
++int* bar1 (void) ;
++
++int
++foo (int a)
++{
++  int *b0 = bar0 ();
++  int *b1 = bar1 ();
++  return b0[a] + b1[a];
++}
++
++/* { dg-final { scan-assembler-times "blr" 1 } } */
++/* { dg-final { scan-assembler-times "bl\t" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/noplt_3.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fpic -fno-plt" } */
++/* { dg-skip-if "-mcmodel=large, no support for -fpic" { aarch64-*-* }  { "-mcmodel=large" } { "" } } */
++
++int dec (int);
++
++int
++cal (int a)
++{
++  return dec (a);
++}
++
++void
++cal_novalue (int a)
++{
++  dec (a);
++}
++
++/* { dg-final { scan-assembler-times "br" 2 } } */
++/* { dg-final { scan-assembler-not "b\t" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pic-small.c
+@@ -0,0 +1,28 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target aarch64_small_fpic } */
++/* { dg-options "-O2 -fpic -fno-inline --save-temps" } */
++/* { dg-skip-if "-fpic for AArch64 small code model" { aarch64*-*-* }  { "-mcmodel=tiny" "-mcmodel=large" } { "" } } */
++
++void abort ();
++int global_a;
++
++int
++initialize (void)
++{
++  global_a = 0x10;
++  return global_a - 1;
++}
++
++int
++main (int argc, char **argv)
++{
++  int a = initialize ();
++
++  if (a != global_a - 1)
++    abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-assembler-times "adrp\tx\[0-9\]+, _GLOBAL_OFFSET_TABLE" 2 } } */
++/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/pmull_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/pmull_1.c
+@@ -20,4 +20,3 @@ test_vmull_high_p64 (poly64x2_t a, poly64x2_t b)
+ 
+ /* { dg-final { scan-assembler-times "pmull2\\tv" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/pr60580_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr60580_1.c
+@@ -42,4 +42,3 @@ func3 (void)
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr63304_1.c
+@@ -0,0 +1,47 @@
++/* { dg-do assemble } */
++/* { dg-options "-O1 --save-temps -mno-fix-cortex-a53-843419" } */
++#pragma GCC push_options
++#pragma GCC target ("+nothing+simd, cmodel=small")
++
++int
++cal (float a)
++{
++  float b = 1.2;
++  float c = 2.2;
++  if ((a + b) != c)
++    return 0;
++  else
++    return 1;
++}
++
++#pragma GCC push_options
++
++#pragma GCC target ("cmodel=large")
++
++int
++cal2 (float a)
++{
++
++  float b = 1.2;
++  float c = 2.2;
++  if ((a + b) != c)
++    return 0;
++  else
++    return 1;
++}
++
++#pragma GCC pop_options
++
++int
++cal3 (float a)
++{
++
++  float b = 1.2;
++  float c = 2.2;
++  if ((a + b) != c)
++    return 0;
++  else
++    return 1;
++}
++
++/* { dg-final { scan-assembler-times "adrp" 6 } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/pr64304.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr64304.c
+@@ -15,4 +15,3 @@ set_bit (unsigned int bit, unsigned char value)
+   /* { dg-final { scan-assembler "and\tw\[0-9\]+, w\[0-9\]+, 7" } } */
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr65491_1.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef long double a __attribute__((vector_size (16)));
++
++a
++sum (a first, a second)
++{
++  return first + second;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr66776.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 --save-temps" } */
++
++unsigned long long
++foo (unsigned int a, unsigned int b, unsigned int c)
++{
++  return a ? b : c;
++}
++
++/* { dg-final { scan-assembler-not "uxtw" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr69245_1.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+fp -fomit-frame-pointer" } */
++
++#pragma GCC target "arch=armv8-a+nofp"
++long a;
++static void
++fn1 ()
++{
++}
++
++#pragma GCC target "arch=armv8-a+fp"
++float
++fn2 (float a)
++{
++  return a + 2.0;
++}
++
++/* { dg-final { scan-assembler-not "__addsf3" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr69245_2.c
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+fp" } */
++
++#pragma GCC push_options
++#pragma GCC target "arch=armv8-a+nofp"
++static void
++fn1 ()
++{
++}
++#pragma GCC pop_options
++float
++fn2 (float a)
++{
++  return a + 2.0;
++}
++
++/* { dg-final { scan-assembler-not "__addsf3" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pr70398.c
+@@ -0,0 +1,26 @@
++/* { dg-do run } */
++/* { dg-options "-O -fno-tree-loop-optimize -fno-tree-ter -static" } */
++unsigned int in[8 * 8] =
++  { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
++    45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63 };
++
++unsigned char out[8 * 8];
++
++int
++main (void)
++{
++  int i;
++  for (i = 0; i < 8 * 4; i++)
++    {
++      out[i * 2] = (unsigned char) in[i * 2] + 1;
++      out[i * 2 + 1] = (unsigned char) in[i * 2 + 1] + 2;
++    }
++  __asm__("":::"memory");
++  for (i = 0; i < 8 * 4; i++)
++    {
++      if (out[i * 2] != in[i * 2] + 1
++	  || out[i * 2 + 1] != in[i * 2 + 1] + 2)
++	__builtin_abort ();
++    }
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_1.c
+@@ -0,0 +1,255 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+crypto" } */
++
++/* Test that pragma option pushing and popping works.
++   Also that CPP predefines redefinitions on #pragma works.  */
++
++#pragma GCC push_options
++#pragma GCC target ("arch=armv8-a+nofp+nosimd")
++#ifdef __ARM_FEATURE_FMA
++#error "__ARM_FEATURE_FMA is defined but should not be!"
++#endif
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("arch=armv8-a+fp+nosimd")
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("arch=armv8-a+fp+simd")
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("arch=armv8-a+fp+simd+crypto")
++
++#ifndef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is not defined but should be!"
++#endif
++
++#pragma GCC pop_options
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++
++#pragma GCC pop_options
++
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC pop_options
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++/* And again, but using cpu=.  */
++
++#pragma GCC push_options
++#pragma GCC target ("cpu=cortex-a53+nofp+nosimd")
++#ifdef __ARM_FEATURE_FMA
++#error "__ARM_FEATURE_FMA is defined but should not be!"
++#endif
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("cpu=cortex-a53+fp+nosimd")
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("cpu=cortex-a53+fp+simd+nocrypto")
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("cpu=cortex-a53+fp+simd+crypto")
++
++#ifndef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is not defined but should be!"
++#endif
++
++
++#pragma GCC pop_options
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++
++#pragma GCC pop_options
++
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC pop_options
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++/* And again, but using just the ISA extensions.  */
++
++#pragma GCC push_options
++#pragma GCC target ("+nofp")
++#ifdef __ARM_FEATURE_FMA
++#error "__ARM_FEATURE_FMA is defined but should not be!"
++#endif
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("+fp+nosimd")
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("+fp+simd+nocrypto")
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++#pragma GCC push_options
++#pragma GCC target ("+fp+simd+crypto")
++
++#ifndef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is not defined but should be!"
++#endif
++
++#pragma GCC pop_options
++
++#ifndef __ARM_NEON
++#error "__ARM_NEON is not defined but should be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++
++#pragma GCC pop_options
++
++#ifndef __ARM_FP
++#error "__ARM_FP is not defined but should be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#pragma GCC pop_options
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++/* Make sure that general-regs-only works too.  */
++#pragma GCC push_options
++#pragma GCC target ("general-regs-only")
++#ifdef __ARM_FEATURE_FMA
++#error "__ARM_FEATURE_FMA is defined but should not be!"
++#endif
++
++#ifdef __ARM_FP
++#error "__ARM_FP is defined but should not be!"
++#endif
++
++#ifdef __ARM_NEON
++#error "__ARM_NEON is defined but should not be!"
++#endif
++
++#ifdef __ARM_FEATURE_CRYPTO
++#error "__ARM_FEATURE_CRYPTO is defined but should not be!"
++#endif
++
++#pragma GCC pop_options
++
++/* Also check that crc re-defines work.  */
++#pragma GCC target ("+nocrc")
++#ifdef __ARM_FEATURE_CRC32
++#error "__ARM_FEATURE_CRC32 is defined but should not be!"
++#endif
++
++#pragma GCC target ("+crc")
++#ifndef __ARM_FEATURE_CRC32
++#error "__ARM_FEATURE_CRC32 is not defined but should be!"
++#endif
++
++int
++foo (int a)
++{
++  return a;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/ror.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/ror.c
+@@ -31,4 +31,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/saddw-1.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++int 
++t6(int len, void * dummy, short * __restrict x)
++{
++  len = len & ~31;
++  int result = 0;
++  __asm volatile ("");
++  for (int i = 0; i < len; i++)
++    result += x[i];
++  return result;
++}
++
++/* { dg-final { scan-assembler "saddw" } } */
++/* { dg-final { scan-assembler "saddw2" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/saddw-2.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++int 
++t6(int len, void * dummy, int * __restrict x)
++{
++  len = len & ~31;
++  long long result = 0;
++  __asm volatile ("");
++  for (int i = 0; i < len; i++)
++    result += x[i];
++  return result;
++}
++
++/* { dg-final { scan-assembler "saddw" } } */
++/* { dg-final { scan-assembler "saddw2" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/sbc.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sbc.c
+@@ -38,4 +38,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/scalar-vca.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar-vca.c
+@@ -69,4 +69,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c
+@@ -226,4 +226,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/sha1_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sha1_1.c
+@@ -52,4 +52,3 @@ test_vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
+ 
+ /* { dg-final { scan-assembler-times "sha1su1\\tv" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/sha256_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sha256_1.c
+@@ -37,4 +37,3 @@ test_vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
+ /* { dg-final { scan-assembler-times "sha256su1\\tv" 1 } } */
+ 
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/shrink_wrap_symbol_ref_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/shrink_wrap_symbol_ref_1.c
+@@ -25,4 +25,3 @@ assemble_string (const char *p, int size)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_f32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_f32_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_f32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_f64_1.c
+@@ -22,4 +22,3 @@ main (int argc, char **argv)
+ 
+ /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
+    return its first argument, so it is legitimate to optimize it out.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_p16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_p16_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_p16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_p8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_p8_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_p8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#?\[0-9\]+\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s16_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_s16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s32_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_s32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
+@@ -23,4 +23,3 @@ main (int argc, char **argv)
+ 
+ /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
+    return its first argument, so it is legitimate to optimize it out.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_s8_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_s8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#?\[0-9\]+\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u16_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_u16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u32_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_u32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
+@@ -23,4 +23,3 @@ main (int argc, char **argv)
+ 
+ /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
+    return its first argument, so it is legitimate to optimize it out.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/ext_u8_1.c
+@@ -7,4 +7,3 @@
+ #include "ext_u8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\], ?#?\[0-9\]+\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_f32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_f32_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_f32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_f64_1.c
+@@ -33,4 +33,3 @@ main (int argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.8\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_p16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_p16_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_p16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_p8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_p8_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_p8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#?\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s16_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_s16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s32_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_s32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s64_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_s64.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.8\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_s8_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_s8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#?\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u16_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_u16.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u32_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_u32.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.4)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u64_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_u64.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#\[0-9\]+\(?:.8\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/extq_u8_1.c
+@@ -7,4 +7,3 @@
+ #include "extq_u8.x"
+ 
+ /* { dg-final { scan-assembler-times "ext\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\], ?#?\[0-9\]+\(?:.2\)?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcage_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcage_f64.c
+@@ -35,4 +35,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facge\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcagt_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcagt_f64.c
+@@ -35,4 +35,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facgt\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcale_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcale_f64.c
+@@ -35,4 +35,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facge\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcaled_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcaled_f64.c
+@@ -33,4 +33,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facge\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcales_f32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcales_f32.c
+@@ -33,4 +33,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facge\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcalt_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcalt_f64.c
+@@ -35,4 +35,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facgt\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcaltd_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcaltd_f64.c
+@@ -33,4 +33,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facgt\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vcalts_f32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcalts_f32.c
+@@ -33,4 +33,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "facgt\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvt_s64_f64_1.c
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  int64x1_t b1 = vcvt_s64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  volatile float64x1_t a2 = {-0.5};
++  int64x1_t b2 = vcvt_s64_f64 (a2);
++
++  if (b2[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtzs\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvt_u64_f64_1.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  uint64x1_t b1 = vcvt_u64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtzu\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvta_s64_f64_1.c
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  int64x1_t b1 = vcvta_s64_f64 (a);
++
++  if (b1[0] != 1)
++    abort ();
++
++  volatile float64x1_t a2 = {-0.5};
++  int64x1_t b2 = vcvta_s64_f64 (a2);
++
++  if (b2[0] != -1)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtas\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvta_u64_f64_1.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  uint64x1_t b1 = vcvta_u64_f64 (a);
++
++  if (b1[0] != 1)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtau\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtm_s64_f64_1.c
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  int64x1_t b1 = vcvtm_s64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  volatile float64x1_t a2 = {-0.5};
++  int64x1_t b2 = vcvtm_s64_f64 (a2);
++
++  if (b2[0] != -1)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtms\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtm_u64_f64_1.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  uint64x1_t b1 = vcvtm_u64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtmu\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtn_s64_f64_1.c
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  int64x1_t b1 = vcvtn_s64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  volatile float64x1_t a2 = {-0.5};
++  int64x1_t b2 = vcvtn_s64_f64 (a2);
++
++  if (b2[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtns\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtn_u64_f64_1.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  uint64x1_t b1 = vcvtn_u64_f64 (a);
++
++  if (b1[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtnu\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtp_s64_f64_1.c
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  int64x1_t b1 = vcvtp_s64_f64 (a);
++
++  if (b1[0] != 1)
++    abort ();
++
++  volatile float64x1_t a2 = {-0.5};
++  int64x1_t b2 = vcvtp_s64_f64 (a2);
++
++  if (b2[0] != 0)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtps\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vcvtp_u64_f64_1.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-options "-save-temps -O3" } */
++
++#include "arm_neon.h"
++
++extern void abort ();
++
++int
++main()
++{
++  volatile float64x1_t a = {0.5};
++  uint64x1_t b1 = vcvtp_u64_f64 (a);
++
++  if (b1[0] != 1)
++    abort ();
++
++  return 0;
++}
++/* { dg-final { scan-assembler "fcvtpu\[ \t\]+\[xX\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vfma_f64.c
+@@ -42,4 +42,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "fmadd\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vfms_f64.c
+@@ -42,4 +42,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "fmsub\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vmul_f64_1.c
+@@ -27,4 +27,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "fmul\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_f64.c
+@@ -24,4 +24,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "faddp\[ \t\]+\[dD\]\[0-9\]+, v\[0-9\].2d+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_s64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_s64.c
+@@ -24,4 +24,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "addp\[ \t\]+\[dD\]\[0-9\]+, v\[0-9\].2d+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_u64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vpaddd_u64.c
+@@ -24,4 +24,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "addp\[ \t\]+\[dD\]\[0-9\]+, v\[0-9\].2d+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlal_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_high_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlal_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlal_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlal_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlal_laneq_s32 (int64x2_t a, int32x2_t b, int32x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlalh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c
+@@ -32,4 +32,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[7\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlals_lane_s32 (int64_t a, int32_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c
+@@ -32,4 +32,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmlal\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[3\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_high_lane_s32 (int64x2_t a, int32x4_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_high_laneq_s32 (int64x2_t a, int32x4_t b, int32x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_lane_s32 (int64x2_t a, int32x2_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsl_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlsl_lane_s32 (int64x2_t a, int32x2_t b, int32x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmlslh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c
+@@ -32,4 +32,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[4\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmlsls_lane_s32 (int64_t a, int32_t b, int32x2_t c)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c
+@@ -32,4 +32,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[3\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmulh_laneq_s16 (int16x4_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulh_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmulh_laneq_s32 (int32x2_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_lane_s16.c
+@@ -33,4 +33,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[hH\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[2\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c
+@@ -30,4 +30,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[hH\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[7\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmulhq_laneq_s16 (int16x8_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhq_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmulhq_laneq_s32 (int32x4_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_lane_s32.c
+@@ -31,4 +31,3 @@ main (void)
+   return 0;
+ }
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c
+@@ -30,4 +30,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[3\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmull_high_lane_s16 (int16x8_t a, int16x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmull_high_lane_s32 (int32x4_t a, int32x2_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull2\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_high_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmull_high_laneq_s32 (int32x4_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull2\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmull_lane_s16 (int16x4_t a, int16x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmull_lane_s32 (int32x2_t a, int32x2_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmull_laneq_s16 (int16x4_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmull_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmull_laneq_s32 (int32x2_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c
+@@ -12,4 +12,3 @@ t_vqdmullh_lane_s16 (int16_t a, int16x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqdmullh_laneq_s16 (int16_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[sS\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c
+@@ -12,4 +12,3 @@ t_vqdmulls_lane_s32 (int32_t a, int32x2_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqdmulls_laneq_s32 (int32_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqdmull\[ \t\]+\[dD\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqrdmulh_laneq_s16 (int16x4_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.4\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulh_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqrdmulh_laneq_s32 (int32x2_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c
+@@ -32,4 +32,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[hH\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[3\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c
+@@ -30,4 +30,3 @@ main (void)
+ 
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[hH\]\[0-9\]+, ?\[hH\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[hH\]\\\[7\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s16.c
+@@ -12,4 +12,3 @@ t_vqrdmulhq_laneq_s16 (int16x8_t a, int16x8_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.8\[hH\], ?\[vV\]\[0-9\]+\.\[hH\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhq_laneq_s32.c
+@@ -12,4 +12,3 @@ t_vqrdmulhq_laneq_s32 (int32x4_t a, int32x4_t b)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.4\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c
+@@ -32,4 +32,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[1\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c
+@@ -29,4 +29,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "sqrdmulh\[ \t\]+\[sS\]\[0-9\]+, ?\[sS\]\[0-9\]+, ?\[vV\]\[0-9\]+\.\[sS\]\\\[3\\\]\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrbit_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrbit_1.c
+@@ -53,4 +53,3 @@ main (int argc, char **argv)
+ /* { dg-final { scan-assembler-times "rbit\[ \t\]+\[vV\]\[0-9\]+\.8\[bB\], ?\[vV\]\[0-9\]+\.8\[bB\]" 3 } } */
+ /* { dg-final { scan-assembler-times "rbit\[ \t\]+\[vV\]\[0-9\]+\.16\[bB\], ?\[vV\]\[0-9\]+\.16\[bB\]" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16p8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16p8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16p8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16qp8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16qs8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16qu8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16s8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16s8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16s8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16u8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev16u8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev16u8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev16\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32p16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32p16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32p16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32p8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32p8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32p8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qp16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qp16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qp8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qs16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qs16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qs16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qs8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qu16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qu16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32qu8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32s16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32s16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32s8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32s8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32s8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32u16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32u16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32u16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32u8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev32u8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev32u8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev32\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64f32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64f32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64f32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.2s, ?v\[0-9\]+.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64p16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64p16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64p16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64p8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64p8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64p8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qf32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qf32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4s, ?v\[0-9\]+.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qp16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qp16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qp8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qs16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qs32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4s, ?v\[0-9\]+.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qs8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qu16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8h, ?v\[0-9\]+.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qu32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4s, ?v\[0-9\]+.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64qu8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.16b, ?v\[0-9\]+.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64s16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64s32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.2s, ?v\[0-9\]+.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64s8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64s8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u16_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64u16.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.4h, ?v\[0-9\]+.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u32_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64u32.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.2s, ?v\[0-9\]+.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vrev64u8_1.c
+@@ -7,4 +7,3 @@
+ #include "vrev64u8.x"
+ 
+ /* { dg-final { scan-assembler-times "rev64\[ \t\]+v\[0-9\]+.8b, ?v\[0-9\]+.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c
+@@ -22,4 +22,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-assembler "fsqrt\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqs8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnqu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrns8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vtrnu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "trn1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "trn2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqs8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpqu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzps8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vuzpu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "uzp1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "uzp2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqf32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqp16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqp8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqs8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8h, ?v\[0-9\]+\.8h, ?v\[0-9\]+\.8h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4s, ?v\[0-9\]+\.4s, ?v\[0-9\]+\.4s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipqu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.16b, ?v\[0-9\]+\.16b, ?v\[0-9\]+\.16b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzips16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzips16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzips32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzips32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzips8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzips8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu16_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu16_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.4h, ?v\[0-9\]+\.4h, ?v\[0-9\]+\.4h!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu32_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu32_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.2s, ?v\[0-9\]+\.2s!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu8_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/simd/vzipu8_1.c
+@@ -8,4 +8,3 @@
+ 
+ /* { dg-final { scan-assembler-times "zip1\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+ /* { dg-final { scan-assembler-times "zip2\[ \t\]+v\[0-9\]+\.8b, ?v\[0-9\]+\.8b, ?v\[0-9\]+\.8b!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/singleton_intrinsics_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/singleton_intrinsics_1.c
+@@ -235,8 +235,8 @@ test_vrshl_u64 (uint64x1_t a, int64x1_t b)
+   return vrshl_u64 (a, b);
+ }
+ 
+-/* For int64x1_t, sshr...#63 is output instead of the equivalent cmlt...#0.  */
+-/* { dg-final { scan-assembler-times "\\tsshr\\td\[0-9\]+" 2 } } */
++/* For int64x1_t, sshr...#63 is equivalent to cmlt...#0.  */
++/* { dg-final { scan-assembler-times "\\t(?:sshr|cmlt)\\td\[0-9\]+" 2 } } */
+ 
+ int64x1_t
+ test_vshr_n_s64 (int64x1_t a)
+@@ -400,5 +400,4 @@ test_vsri_n_u64 (uint64x1_t a, uint64x1_t b)
+   return vsri_n_u64 (a, b, 9);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/sshr64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sshr64_1.c
+@@ -112,4 +112,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/stp_vec_64_1.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-Ofast" } */
++
++
++typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
++
++void
++bar (int32x2_t *foo)
++{
++  int i = 0;
++  int32x2_t val = { 3, 2 };
++
++  for (i = 0; i < 256; i+=2)
++    {
++      foo[i] = val;
++      foo[i+1] = val;
++    }
++}
++
++/* { dg-final { scan-assembler "stp\td\[0-9\]+, d\[0-9\]" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/subs1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/subs1.c
+@@ -12,7 +12,7 @@ subs_si_test1 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -24,7 +24,7 @@ subs_si_test2 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -36,7 +36,7 @@ subs_si_test3 (int a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ typedef long long s64;
+@@ -50,7 +50,7 @@ subs_di_test1 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -62,7 +62,7 @@ subs_di_test2 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ s64
+@@ -74,7 +74,7 @@ subs_di_test3 (s64 a, s64 b, s64 c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int main ()
+@@ -83,67 +83,66 @@ int main ()
+   s64 y;
+ 
+   x = subs_si_test1 (29, 4, 5);
+-  if (x != 33)
++  if (x != 24)
+     abort ();
+ 
+-  x = subs_si_test1 (5, 2, 20);
+-  if (x != 7)
++  x = subs_si_test1 (20, 2, 20);
++  if (x != 40)
+     abort ();
+ 
+-  x = subs_si_test2 (29, 4, 5);
+-  if (x != -217)
+-    abort ();
++   x = subs_si_test2 (0xff, 4, 5);
++   if (x != (0xff + 5))
++     abort ();
+ 
+-  x = subs_si_test2 (1024, 2, 20);
+-  if (x != 791)
+-    abort ();
++   x = subs_si_test2 (1024, 2, 20);
++   if (x != (1024 - 0xff))
++     abort ();
+ 
+   x = subs_si_test3 (35, 4, 5);
+-  if (x != 12)
++  if (x != 35 - (4 << 3))
+     abort ();
+ 
+-  x = subs_si_test3 (5, 2, 20);
+-  if (x != 11)
++  x = subs_si_test3 (5 << 3, 5, 20);
++  if (x != (20 + (5 << 3)))
+     abort ();
+ 
+   y = subs_di_test1 (0x130000029ll,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+ 
+-  if (y != 0x45000002d)
++  if (y != (0x130000029ll - 0x505050505ll))
+     abort ();
+ 
+   y = subs_di_test1 (0x5000500050005ll,
+ 		     0x2111211121112ll,
+-		     0x0000000002020ll);
+-  if (y != 0x7111711171117)
++		     0x5000500050005ll);
++  if (y != (0x5000500050005ll + 0x5000500050005ll))
+     abort ();
+ 
+   y = subs_di_test2 (0x130000029ll,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+-  if (y != 0x955050433)
++  if (y != (0x130000029ll - 0xff))
+     abort ();
+ 
+-  y = subs_di_test2 (0x130002900ll,
++  y = subs_di_test2 (0xff,
+ 		     0x320000004ll,
+ 		     0x505050505ll);
+-  if (y != 0x955052d0a)
++  if (y != (0xff + 0x505050505ll))
+     abort ();
+ 
+   y = subs_di_test3 (0x130000029ll,
+ 		     0x064000008ll,
+ 		     0x505050505ll);
+-  if (y != 0x3790504f6)
++  if (y != (0x130000029ll - (0x064000008ll << 3)))
+     abort ();
+ 
+-  y = subs_di_test3 (0x130002900ll,
+-		     0x088000008ll,
++  y = subs_di_test3 (0x130002900ll << 3,
++		     0x130002900ll,
+ 		     0x505050505ll);
+-  if (y != 0x27d052dcd)
++  if (y != (0x505050505ll + (0x130002900ll << 3)))
+     abort ();
+ 
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/subs2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/subs2.c
+@@ -152,4 +152,3 @@ int main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/subs3.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/subs3.c
+@@ -12,7 +12,7 @@ subs_ext (s64 a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int
+@@ -23,7 +23,7 @@ subs_shift_ext (s64 a, int b, int c)
+   if (d == 0)
+     return a + c;
+   else
+-    return b + d + c;
++    return d;
+ }
+ 
+ int main ()
+@@ -32,27 +32,27 @@ int main ()
+   s64 y;
+ 
+   x = subs_ext (0x13000002ll, 41, 15);
+-  if (x != 318767121)
++  if (x != (int)(0x13000002ll - 41))
+     abort ();
+ 
+-  x = subs_ext (0x50505050ll, 29, 4);
+-  if (x != 1347440724)
++  x = subs_ext (0x50505050ll, 0x50505050ll, 4);
++  if (x != (int)(0x50505050ll + 4))
+     abort ();
+ 
+   x = subs_ext (0x12121212121ll, 2, 14);
+-  if (x != 555819311)
++  if (x != (int)(0x12121212121ll - 2))
+     abort ();
+ 
+   x = subs_shift_ext (0x123456789ll, 4, 12);
+-  if (x != 591751033)
++  if (x != (int)(0x123456789ll - (4 << 3)))
+     abort ();
+ 
+-  x = subs_shift_ext (0x02020202ll, 9, 8);
+-  if (x != 33685963)
++  x = subs_shift_ext (0x02020202ll << 3, 0x02020202ll, 8);
++  if (x != (int)(8 + (0x02020202ll << 3)))
+     abort ();
+ 
+   x = subs_shift_ext (0x987987987987ll, 23, 41);
+-  if (x != -2020050673)
++  if (x != (int)(0x987987987987ll - (23 << 3)))
+     abort ();
+ 
+   return 0;
+--- a/src/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/symbol-range-tiny.c
+@@ -10,4 +10,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-assembler-not "adr\tx\[0-9\]+, fixed_regs\\\+" } } */
+-/* { dg-final {cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/symbol-range.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/symbol-range.c
+@@ -10,4 +10,3 @@ foo()
+ }
+ 
+ /* { dg-final { scan-assembler-not "adrp\tx\[0-9\]+, fixed_regs\\\+" } } */
+-/* { dg-final {cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fno-ipa-icf" } */
++/* { dg-options "-march=armv8-a+nolse -O2 -fno-ipa-icf" } */
+ 
+ #include "sync-comp-swap.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "sync-op-acquire.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/sync-op-full.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sync-op-full.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "sync-op-full.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/sync-op-release.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/sync-op-release.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-march=armv8-a+nolse -O2" } */
+ 
+ #include "sync-op-release.x"
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c
+@@ -435,5 +435,5 @@ qtbxq_testp8_4 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx)
+   return vqtbx4q_p8 (r, tab, idx);
+ }
+ 
+-/* { dg-final { scan-assembler-times "tbl v" 42} }  */
+-/* { dg-final { scan-assembler-times "tbx v" 30} }  */
++/* { dg-final { scan-assembler-times "tbl\[ |\t\]*v" 42} }  */
++/* { dg-final { scan-assembler-times "tbx\[ |\t\]*v" 30} }  */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_1.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=thunderx -dA" } */
++
++/* Test that cpu attribute overrides the command-line -mcpu.  */
++
++__attribute__ ((target ("cpu=cortex-a72.cortex-a53")))
++int
++foo (int a)
++{
++  return a + 1;
++}
++
++/* { dg-final { scan-assembler "//.tune cortex-a72.cortex-a53" } } */
++/* { dg-final { scan-assembler-not "thunderx" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_10.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv8-a+simd" } */
++
++/* Using a SIMD intrinsic from a function tagged with nosimd should fail
++   due to inlining rules.  */
++
++#include "arm_neon.h"
++
++__attribute__ ((target ("+nosimd")))
++uint8x16_t
++foo (uint8x16_t a, uint8x16_t b, uint8x16_t c)
++{
++  return vbslq_u8 (a, b, c); /* { dg-error "called from here" } */
++}
++
++/* { dg-error "inlining failed in call to always_inline" "" { target *-*-* } 0 } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_11.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++
++/* Reject the negated form of non-negatable attributes.  */
++
++__attribute__ ((target ("no-general-regs-only")))
++int
++foo (int a)
++{
++  return a + 1;
++}
++
++/* { dg-error "does not allow a negated form" "" { target *-*-* } 0 } */
++/* { dg-error "is invalid" "" { target *-*-* } 0 } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_12.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++
++/* Reject arguments to attributes that do not accept any.  */
++
++__attribute__ ((target ("general-regs-only=+crc")))
++int
++foo (int a)
++{
++  return a + 1;
++}
++
++/* { dg-error "does not accept an argument" "" { target *-*-* } 0 } */
++/* { dg-error "is invalid" "" { target *-*-* } 0 } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_13.c
+@@ -0,0 +1,16 @@
++/* { dg-do assemble } */
++/* { dg-options "-O2 -march=armv8-a+crc+crypto" } */
++
++#include "arm_acle.h"
++
++/* Make sure that 'crypto' is not required to compile an intrinsic
++   from arm_acle.h in a non-crypto function.  Tests that arm_acle.h
++   properly clears the architectural features in its initial target
++   pragma.  */
++
++__attribute__ ((target ("+crc+nocrypto")))
++int
++foo (uint32_t a, uint8_t b)
++{
++  return __crc32b (a, b);
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_14.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++/* Inlining non-strict-align functions into strict-align
++   functions is allowed.  */
++
++static int
++bar (int a)
++{
++  return a - 6;
++}
++
++__attribute__ ((target ("strict-align")))
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++/* { dg-final { scan-assembler-not "bl.*bar" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_15.c
+@@ -0,0 +1,13 @@
++/* { dg-do assemble } */
++/* { dg-options "-march=armv8-a+crypto -save-temps" } */
++
++/* Check that "+nothing" clears the ISA flags.  */
++
++__attribute__ ((target ("+nothing")))
++int
++foo (int a)
++{
++  return a + 1;
++}
++
++/* { dg-final { scan-assembler-times "\\.arch armv8-a\\+nofp\\+nosimd\n" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_17.c
+@@ -0,0 +1,8 @@
++__attribute__((target("invalid-attr-string")))
++int
++foo (int a)
++{
++  return a + 5;
++}
++
++/* { dg-error "target attribute.*is invalid" "" { target *-*-* } 0 } */
+\ No newline at end of file
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_2.c
+@@ -0,0 +1,39 @@
++/* { dg-do assemble } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -ftree-vectorize -fdump-tree-vect-all" } */
++
++/* The various ways to turn off simd availability should
++   turn off vectorization.  */
++
++__attribute__ ((target ("+nosimd")))
++int
++baz (int *a)
++{
++  for (int i = 0; i < 1024; i++)
++    a[i] += 5;
++}
++
++__attribute__ ((target ("arch=armv8-a+nosimd")))
++int
++baz2 (int *a)
++{
++  for (int i = 0; i < 1024; i++)
++    a[i] += 5;
++}
++
++__attribute__ ((target ("cpu=cortex-a53+nosimd")))
++int
++baz3 (int *a)
++{
++  for (int i = 0; i < 1024; i++)
++    a[i] += 5;
++}
++
++__attribute__ ((target ("general-regs-only")))
++int
++baz4 (int *a)
++{
++  for (int i = 0; i < 1024; i++)
++    a[i] += 5;
++}
++
++/* { dg-final { scan-tree-dump-not "vectorized 1 loops" "vect" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_3.c
+@@ -0,0 +1,34 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mno-fix-cortex-a53-835769 -save-temps" } */
++
++/* Check that the attribute overrides the command line option
++   and the fix is applied once.  */
++
++__attribute__ ((target ("fix-cortex-a53-835769")))
++unsigned long
++test (unsigned long a, double b, unsigned long c,
++      unsigned long d, unsigned long *e)
++{
++  double result;
++  volatile unsigned long tmp = *e;
++  __asm__ __volatile ("// %0, %1"
++			: "=w" (result)
++			: "0" (b)
++			:    /* No clobbers.  */);
++  return c * d + d;
++}
++
++unsigned long
++test2 (unsigned long a, double b, unsigned long c,
++       unsigned long d, unsigned long *e)
++{
++  double result;
++  volatile unsigned long tmp = *e;
++  __asm__ __volatile ("// %0, %1"
++			: "=w" (result)
++			: "0" (b)
++			:   /* No clobbers.  */);
++  return c * d + d;
++}
++
++/* { dg-final { scan-assembler-times "between mem op and" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_4.c
+@@ -0,0 +1,30 @@
++/* { dg-do assemble } */
++/* { dg-options "-O2 -march=armv8-a+nocrc -save-temps" } */
++
++#include "arm_acle.h"
++
++/* Check that enabling an ISA feature using an attribute in a file
++   compiled without that attribute works.  */
++
++__attribute__ ((target ("+crc")))
++uint32_t
++foo (uint32_t a, uint8_t b)
++{
++  return __crc32b (a, b);
++}
++
++__attribute__ ((target ("arch=armv8-a+crc")))
++uint32_t
++fooarch (uint32_t a, uint8_t b)
++{
++  return __crc32b (a, b);
++}
++
++__attribute__ ((target ("cpu=cortex-a53+crc")))
++uint32_t
++foocpu (uint32_t a, uint8_t b)
++{
++  return __crc32b (a, b);
++}
++
++/* { dg-final { scan-assembler-times "crc32b\tw..?, w..?, w..?\n" 3 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_5.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++/* Make sure that bar is inlined into bam.  */
++
++__attribute__ ((target ("arch=armv8-a+nocrc")))
++static int
++bar (int a)
++{
++  return a - 6;
++}
++
++__attribute__ ((target ("cpu=cortex-a53+nocrc")))
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++/* { dg-final { scan-assembler-not "bl.*bar" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_6.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++/* Inlining strict-align functions into non-strict align
++   functions is not allowed.  */
++
++__attribute__ ((target ("strict-align")))
++int
++bar (int a)
++{
++  return a - 6;
++}
++
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++/* { dg-final { scan-assembler "bl.*bar" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_7.c
+@@ -0,0 +1,24 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=thunderx -dA" } */
++
++/* Make sure that #pragma overrides command line option and
++   target attribute overrides the pragma.  */
++
++#pragma GCC target ("cpu=xgene1")
++
++int
++bar (int a)
++{
++  return a - 6;
++}
++
++__attribute__ ((target ("tune=cortex-a53")))
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++/* { dg-final { scan-assembler-times "//.tune xgene1" 1 } } */
++/* { dg-final { scan-assembler-times "//.tune cortex-a53" 1 } } */
++/* { dg-final { scan-assembler-not "thunderx" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_8.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++/* bar has a subset set of the architectural flags of bam.
++   Inlining should be allowed.  */
++
++__attribute__ ((target ("arch=armv8-a+nocrc")))
++static int
++bar (int a)
++{
++  return a - 6;
++}
++
++__attribute__ ((target ("arch=armv8-a+crc")))
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++
++/* { dg-final { scan-assembler-not "bl.*bar" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_9.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++/* bar does not have a subset of architectural flags of bam.
++   Inlining should be rejected.  */
++
++__attribute__ ((target ("arch=armv8-a+crc")))
++int
++bar (int a)
++{
++  return a - 6;
++}
++
++__attribute__ ((target ("arch=armv8-a+nocrc")))
++int
++bam (int a)
++{
++  return a - bar (a);
++}
++
++
++/* { dg-final { scan-assembler "bl.*bar" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_1.c
+@@ -0,0 +1,21 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=thunderx+nofp" } */
++
++#include "arm_neon.h"
++
++/* Unless we do something about re-laying out the SIMD builtin types
++   this testcase ICEs during expansion of the crypto builtin.  */
++
++__attribute__ ((target ("cpu=cortex-a57+crypto")))
++uint32x4_t
++test_vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
++{
++  return vsha1cq_u32 (hash_abcd, hash_e, wk);
++}
++
++/* This one should be compiled for thunderx with no fp.  */
++int
++foo (int a)
++{
++  return a + 5;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/target_attr_crypto_ice_2.c
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=thunderx+nofp" } */
++
++/* Make sure that we don't ICE when dealing with vector parameters
++   in a simd-tagged function within a non-simd translation unit.  */
++
++#pragma GCC push_options
++#pragma GCC target ("+nothing+simd")
++typedef unsigned int __uint32_t;
++typedef __uint32_t uint32_t ;
++typedef __Uint32x4_t uint32x4_t;
++#pragma GCC pop_options
++
++
++__attribute__ ((target ("cpu=cortex-a57")))
++uint32x4_t
++foo (uint32x4_t a, uint32_t b, uint32x4_t c)
++{
++  return c;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-1.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-2.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-3.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-3.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-4.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-4.c
+@@ -13,4 +13,3 @@
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-5.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-5.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-6.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-6.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-7.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-7.c
+@@ -12,4 +12,3 @@
+ 
+ /* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-8.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-8.c
+@@ -13,4 +13,3 @@
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_fp_attribute_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_fp_attribute_1.c
+@@ -23,4 +23,3 @@ non_leaf_2 (void)
+ 
+ /* { dg-final { scan-assembler-times "str\tx30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_fp_attribute_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_fp_attribute_2.c
+@@ -23,4 +23,3 @@ non_leaf_2 (void)
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_1.c
+@@ -16,4 +16,3 @@ t_frame_run (test1)
+ /* { dg-final { scan-assembler-times "str\tx30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ /* { dg-final { scan-assembler-times "ldr\tx30, \\\[sp\\\], \[0-9\]+" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_10.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_10.c
+@@ -18,4 +18,3 @@ t_frame_run (test10)
+ /* { dg-final { scan-assembler-times "stp\tx19, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ /* { dg-final { scan-assembler-times "ldp\tx19, x30, \\\[sp\\\], \[0-9\]+" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_11.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_11.c
+@@ -13,4 +13,3 @@ t_frame_pattern (test11, 400, )
+ t_frame_run (test11)
+ 
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_12.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_12.c
+@@ -16,4 +16,3 @@ t_frame_run (test12)
+ /* Check epilogue using write-back.  */
+ /* { dg-final { scan-assembler-times "ldp\tx29, x30, \\\[sp\\\], \[0-9\]+" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_13.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_13.c
+@@ -15,4 +15,3 @@ t_frame_run (test13)
+ 
+ /* { dg-final { scan-assembler-times "sub\tsp, sp, #\[0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_15.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_15.c
+@@ -16,4 +16,3 @@ t_frame_run (test15)
+ 
+ /* { dg-final { scan-assembler-times "sub\tsp, sp, #\[0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_2.c
+@@ -17,4 +17,3 @@ t_frame_run (test2)
+ /* { dg-final { scan-assembler-times "stp\tx19, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ /* { dg-final { scan-assembler-times "ldp\tx19, x30, \\\[sp\\\], \[0-9\]+" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_4.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_4.c
+@@ -16,4 +16,3 @@ t_frame_run (test4)
+ /* { dg-final { scan-assembler-times "stp\tx19, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ /* { dg-final { scan-assembler-times "ldp\tx19, x30, \\\[sp\\\], \[0-9\]+" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_6.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_6.c
+@@ -17,4 +17,3 @@ t_frame_run (test6)
+ /* { dg-final { scan-assembler-times "str\tx30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */
+ /* { dg-final { scan-assembler-times "ldr\tx30, \\\[sp\\\], \[0-9\]+" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_7.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_7.c
+@@ -17,4 +17,3 @@ t_frame_run (test7)
+ /* { dg-final { scan-assembler-times "stp\tx19, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */
+ /* { dg-final { scan-assembler-times "ldp\tx19, x30, \\\[sp\\\], \[0-9\]+" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/test_frame_8.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/test_frame_8.c
+@@ -15,4 +15,3 @@ t_frame_run (test8)
+ /* { dg-final { scan-assembler-times "str\tx30, \\\[sp, -\[0-9\]+\\\]!" 3 } } */
+ /* { dg-final { scan-assembler-times "ldr\tx30, \\\[sp\\\], \[0-9\]+" 3 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tls_1.x
+@@ -0,0 +1,14 @@
++void abort (void);
++
++__thread int t0 = 0x10;
++__thread int t1 = 0x10;
++
++int
++main (int argc, char **argv)
++{
++  if (t0 != t1)
++    abort ();
++
++  return  0;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsie_tiny_1.c
+@@ -0,0 +1,7 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=initial-exec -mcmodel=tiny" } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times ":gottprel:" 2 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle12_1.c
+@@ -0,0 +1,8 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=12 --save-temps" } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_lo12" 2 } } */
++/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle12_tiny_1.c
+@@ -0,0 +1,8 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=12 -mcmodel=tiny --save-temps" } */
++/* { dg-skip-if "TLS 12bit size for tiny" { aarch64*-*-* }  { "-mcmodel=small" "-mcmodel=large" } { "" } } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_lo12" 2 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle24_1.c
+@@ -0,0 +1,9 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=24 --save-temps" } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_lo12_nc" 2 } } */
++/* { dg-final { scan-assembler-times "#:tprel_hi12" 2 } } */
++/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle24_tiny_1.c
+@@ -0,0 +1,9 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=24 -mcmodel=tiny --save-temps" } */
++/* { dg-skip-if "TLS 24bit size for tiny" { aarch64*-*-* }  { "-mcmodel=small" "-mcmodel=large" } { "" } } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_lo12_nc" 2 } } */
++/* { dg-final { scan-assembler-times "#:tprel_hi12" 2 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle32_1.c
+@@ -0,0 +1,10 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-require-effective-target aarch64_tlsle32 } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=32 --save-temps" } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_g1" 2 } } */
++/* { dg-final { scan-assembler-times "#:tprel_g0_nc" 2 } } */
++/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle_sizeadj_small_1.c
+@@ -0,0 +1,10 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-require-effective-target aarch64_tlsle32 } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=48 --save-temps" } */
++/* { dg-skip-if "TLS size trunc for small" { aarch64*-*-* }  { "-mcmodel=tiny" "-mcmodel=large" } { "" } } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_g1" 2 } } */
++/* { dg-final { scan-assembler-times "#:tprel_g0_nc" 2 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tlsle_sizeadj_tiny_1.c
+@@ -0,0 +1,9 @@
++/* { dg-do run } */
++/* { dg-require-effective-target tls_native } */
++/* { dg-options "-O2 -fpic -ftls-model=local-exec -mtls-size=32 -mcmodel=tiny --save-temps" } */
++/* { dg-skip-if "TLS size trunc for tiny" { aarch64*-*-* }  { "-mcmodel=small" "-mcmodel=large" } { "" } } */
++
++#include "tls_1.x"
++
++/* { dg-final { scan-assembler-times "#:tprel_lo12_nc" 2 } } */
++/* { dg-final { scan-assembler-times "#:tprel_hi12" 2 } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/tst_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_1.c
+@@ -147,4 +147,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/tst_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_2.c
+@@ -153,4 +153,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_3.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++int
++f1 (int x)
++{
++  if (x & 1)
++    return 1;
++  return x;
++}
++
++/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]*.*1" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_4.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++int
++f1 (long x)
++{
++   return ((short) x >= 0) ? x : 0;
++}
++
++/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]*.*32768\n" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_5.c
+@@ -0,0 +1,21 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++int
++f255 (int x)
++{
++  if (x & 255)
++    return 1;
++  return x;
++}
++
++int
++f65535 (int x)
++{
++  if (x & 65535)
++    return 1;
++  return x;
++}
++
++/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]+,\[ \t\]*255" } } */
++/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]+,\[ \t\]*65535" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/tst_6.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++int
++foo (long x)
++{
++   return ((short) x != 0) ? x : 1;
++}
++
++/* { dg-final { scan-assembler "tst\t(x|w)\[0-9\]+,\[ \t\]*65535" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/uaddw-1.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++int 
++t6(int len, void * dummy, unsigned short * __restrict x)
++{
++  len = len & ~31;
++  unsigned int result = 0;
++  __asm volatile ("");
++  for (int i = 0; i < len; i++)
++    result += x[i];
++  return result;
++}
++
++/* { dg-final { scan-assembler "uaddw" } } */
++/* { dg-final { scan-assembler "uaddw2" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/uaddw-2.c
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++int 
++t6(int len, void * dummy, unsigned short * __restrict x)
++{
++  len = len & ~31;
++  unsigned int result = 0;
++  __asm volatile ("");
++  for (int i = 0; i < len; i++)
++    result += x[i];
++  return result;
++}
++
++/* { dg-final { scan-assembler "uaddw" } } */
++/* { dg-final { scan-assembler "uaddw2" } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/uaddw-3.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O3" } */
++
++int 
++t6(int len, void * dummy, char * __restrict x)
++{
++  len = len & ~31;
++  unsigned short result = 0;
++  __asm volatile ("");
++  for (int i = 0; i < len; i++)
++    result += x[i];
++  return result;
++}
++
++/* { dg-final { scan-assembler "uaddw" } } */
++/* { dg-final { scan-assembler "uaddw2" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/umaddl_combine_1.c
+@@ -0,0 +1,29 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -mcpu=cortex-a53" } */
++
++enum reg_class
++{
++  NO_REGS,
++  AD_REGS,
++  ALL_REGS, LIM_REG_CLASSES
++};
++
++extern enum reg_class
++  reg_class_subclasses[((int) LIM_REG_CLASSES)][((int) LIM_REG_CLASSES)];
++
++void
++init_reg_sets_1 (unsigned int i)
++{
++  unsigned int j;
++  {
++    for (j = i + 1; j < ((int) LIM_REG_CLASSES); j++)
++      {
++	enum reg_class *p;
++	p = &reg_class_subclasses[j][0];
++	while (*p != LIM_REG_CLASSES)
++	  p++;
++      }
++  }
++}
++
++/* { dg-final { scan-assembler-not "umull\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/unsigned-float.c
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O1" } */
++
++#include <stdint.h>
++
++double
++f1 (uint16_t x)
++{
++  return (double)(float)x;
++}
++
++float
++f2 (uint16_t x)
++{
++  return (float)(double)x;
++}
++
++/* { dg-final { scan-assembler-not "fcvt" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/ushr64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/ushr64_1.c
+@@ -80,4 +80,3 @@ main (int argc, char *argv[])
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vabs_intrinsic_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vabs_intrinsic_1.c
+@@ -98,4 +98,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vadd_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vadd_f64.c
+@@ -79,4 +79,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vbslq_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vbslq_f64_1.c
+@@ -17,5 +17,4 @@ fold_me (float32x4_t a, float32x4_t b)
+ /* { dg-final { scan-assembler-not "bit\\tv" } } */
+ /* { dg-final { scan-assembler-not "bif\\tv" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vbslq_f64_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vbslq_f64_2.c
+@@ -20,5 +20,4 @@ half_fold_me (uint32x4_t mask)
+ /* { dg-final { scan-assembler-not "bif\\tv" } } */
+ /* { dg-final { scan-assembler "bic\\tv" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vbslq_u64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vbslq_u64_1.c
+@@ -13,5 +13,4 @@ vbslq_dummy_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t mask)
+ }
+ 
+ /* { dg-final { scan-assembler-times "bif\\tv" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vbslq_u64_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vbslq_u64_2.c
+@@ -18,5 +18,4 @@ half_fold_int (uint32x4_t mask)
+ /* { dg-final { scan-assembler-not "bif\\tv" } } */
+ /* { dg-final { scan-assembler "bic\\tv" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vclz.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vclz.c
+@@ -67,18 +67,13 @@ extern void abort (void);
+   CONCAT1 (vclz, POSTFIX (reg_len, data_len, is_signed))
+ 
+ #define RUN_TEST(test_set, answ_set, reg_len, data_len, is_signed, n)	\
++  INHIB_OPTIMIZATION;							\
+   a = LOAD_INST (reg_len, data_len, is_signed) (test_set);		\
+   b = LOAD_INST (reg_len, data_len, is_signed) (answ_set);	        \
+-  INHIB_OPTIMIZATION;							\
+   a = CLZ_INST (reg_len, data_len, is_signed) (a);			\
+   for (i = 0; i < n; i++)						\
+-    {									\
+-      INHIB_OPTIMIZATION;						\
+-      if (a [i] != b [i])						\
+-        {								\
+-          return 1;							\
+-        }								\
+-    }
++    if (a [i] != b [i])							\
++      return 1;
+ 
+ int
+ test_vclz_s8 ()
+@@ -571,4 +566,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vdiv_f.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vdiv_f.c
+@@ -7,7 +7,7 @@
+ #define FLT_INFINITY (__builtin_inff ())
+ #define DBL_INFINITY (__builtin_inf ())
+ 
+-#define NAN (0.0 / 0.0)
++#define NAN (__builtin_nan (""))
+ 
+ #define PI 3.141592653589793
+ #define PI_4 0.7853981633974483
+@@ -228,9 +228,7 @@ test_vdiv_f64 ()
+   return 0;
+ }
+ 
+-/* The following assembly should match 2 more times,
+-   in 64bit NAN generation.  */
+-/* { dg-final { scan-assembler-times "fdiv\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 3 } } */
++/* { dg-final { scan-assembler-times "fdiv\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+ 
+ #undef TESTA8
+ #undef ANSW8
+@@ -349,4 +347,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vdup_lane_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vdup_lane_1.c
+@@ -401,4 +401,3 @@ main ()
+ /* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.4s, v\[0-9\]+\.s\\\[0\\\]" 2 } } */
+ /* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.4s, v\[0-9\]+\.s\\\[1\\\]" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vdup_lane_2.c
+@@ -338,6 +338,5 @@ main ()
+ 
+ /* Asm check for vdupd_lane_f64, vdupd_lane_s64, vdupd_lane_u64.  */
+ /* Attempts to make the compiler generate vdupd are not practical.  */
+-/* { dg-final { scan-assembler-not "dup\\td\[0-9\]+, v\[0-9\]+\.d\\\[0\\\]" } }
++/* { dg-final { scan-assembler-not "dup\\td\[0-9\]+, v\[0-9\]+\.d\\\[0\\\]" } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vdup_n_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vdup_n_1.c
+@@ -616,4 +616,3 @@ main ()
+ /* Asm check for test_vdupq_n_s64, test_vdupq_n_u64.  */
+ /* { dg-final { scan-assembler-times "dup\\tv\[0-9\]+\.2d, x\[0-9\]+" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vdup_n_2.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vdup_n_2.c
+@@ -24,5 +24,4 @@ main (int argc, char **argv)
+ 
+ /* { dg-final { scan-assembler-times "\[ \t\]*dup\[ \t\]+v\[0-9\]+\.2s, ?v\[0-9\]+\.s\\\[\[01\]\\\]" 1 } } */
+ /* { dg-final { scan-assembler-not "zip" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/vec_init_1.c
+@@ -0,0 +1,33 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -fomit-frame-pointer --save-temps -fno-inline" } */
++
++extern void abort (void);
++
++typedef float float16x4_t __attribute__ ((vector_size ((16))));
++
++float a;
++float b;
++
++float16x4_t
++make_vector ()
++{
++  return (float16x4_t) { 0, 0, a, b };
++}
++
++int
++main (int argc, char **argv)
++{
++  a = 4.0;
++  b = 3.0;
++  float16x4_t vec = make_vector ();
++  if (vec[0] != 0 || vec[1] != 0 || vec[2] != a || vec[3] != b)
++    abort ();
++  return 0;
++}
++
++/* { dg-final { scan-assembler-times "ins\\t" 2 } } */
++/* What we want to check, is that make_vector does not stp the whole vector
++   to the stack.  Unfortunately here we scan the body of main() too, which may
++   be a bit fragile - the test is currently passing only because of the option
++   -fomit-frame-pointer which avoids use of stp in the prologue to main().  */
++/* { dg-final { scan-assembler-not "stp\\t" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-clz.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-clz.c
+@@ -32,4 +32,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c
+@@ -11,5 +11,3 @@
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */
+ /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */
+ /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c
+@@ -11,5 +11,3 @@
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 8 "vect" } } */
+ /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */
+ /* { dg-final { scan-assembler "fcmeq\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c
+@@ -12,5 +12,3 @@
+ /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */
+ /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */
+ /* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c
+@@ -12,5 +12,3 @@
+ /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */
+ /* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */
+ /* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c
+@@ -12,5 +12,3 @@
+ /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */
+ /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */
+ /* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c
+@@ -12,5 +12,3 @@
+ /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */
+ /* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */
+ /* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c
+@@ -14,4 +14,3 @@ foo (double *output)
+ 
+ /* { dg-final { scan-assembler "movi\\tv\[0-9\]+\\.2d, 0" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd.c
+@@ -14,4 +14,3 @@ foo (double *output)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-assembler "fmov\\tv\[0-9\]+\\.2d, 4\\.25" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c
+@@ -14,4 +14,3 @@ foo (float *output)
+ 
+ /* { dg-final { scan-assembler "movi\\tv\[0-9\]+\\.\[24\]s, 0" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf.c
+@@ -14,4 +14,3 @@ foo (float *output)
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-assembler "fmov\\tv\[0-9\]+\\.\[24\]s, 4\\.25" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-movi.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-movi.c
+@@ -71,4 +71,3 @@ main (void)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-reduc-or_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-reduc-or_1.c
+@@ -31,4 +31,3 @@ main (unsigned char argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Reduce using vector shifts" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vaddv.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vaddv.c
+@@ -125,4 +125,3 @@ TEST (f64, q, float64, 2, D)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vca.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vca.c
+@@ -86,4 +86,3 @@ BUILD_VARIANTS (lt, <)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vcvt.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vcvt.c
+@@ -129,4 +129,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vfmaxv.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vfmaxv.c
+@@ -166,4 +166,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vmaxv.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vmaxv.c
+@@ -114,4 +114,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect-vrnd.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-vrnd.c
+@@ -114,4 +114,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_combine_zeroes_1.c
+@@ -0,0 +1,24 @@
++/* { dg-options "-O2 --save-temps" } */
++
++#include "arm_neon.h"
++
++int32x4_t
++foo (int32x2_t *x)
++{
++  int32x2_t i = *x;
++  int32x2_t zeroes = vcreate_s32 (0l);
++  int32x4_t ret = vcombine_s32 (i, zeroes);
++  return ret;
++}
++
++int32x4_t
++bar (int64_t x)
++{
++  int32x2_t i = vcreate_s32 (x);
++  int32x2_t zeroes = vcreate_s32 (0l);
++  int32x4_t ret = vcombine_s32 (i, zeroes);
++  return ret;
++}
++
++/* { dg-final { scan-assembler-not "mov\tv\[0-9\]+.8b, v\[0-9\]+.8b" } } */
++
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_ctz_1.c
+@@ -38,4 +38,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_int32x2x4_1.c
+@@ -0,0 +1,22 @@
++/* { dg-do compile } */
++/* { dg-options "-O3 -fdump-rtl-expand" } */
++
++#include <arm_neon.h>
++
++uint32x2x4_t
++test_1 (uint32x2x4_t a, uint32x2x4_t b)
++{
++   uint32x2x4_t result;
++
++   for (unsigned index = 0; index < 4; ++index)
++     result.val[index] = a.val[index] + b.val[index];
++
++   return result;
++}
++
++/* Should not use the stack in expand.  */
++/* { dg-final { scan-rtl-dump-not "virtual-stack-vars" "expand" } } */
++/* Should not have to modify the stack pointer.  */
++/* { dg-final { scan-assembler-not "\t(add|sub).*sp" } } */
++/* Should not have to store or load anything.  */
++/* { dg-final { scan-assembler-not "\t(ld|st)\[rp\]" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c
+@@ -311,5 +311,4 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c
+@@ -322,4 +322,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/vector_initialization_nostack.c
+@@ -0,0 +1,53 @@
++/* { dg-do compile } */
++/* { dg-options "-O3 -ftree-vectorize -fno-vect-cost-model" } */
++float arr_f[100][100];
++float
++f9 (void)
++{
++
++  int i;
++  float sum = 0;
++  for (i = 0; i < 100; i++)
++    sum += arr_f[i][0] * arr_f[0][i];
++  return sum;
++
++}
++
++
++int arr[100][100];
++int
++f10 (void)
++{
++
++  int i;
++  int sum = 0;
++  for (i = 0; i < 100; i++)
++    sum += arr[i][0] * arr[0][i];
++  return sum;
++
++}
++
++double arr_d[100][100];
++double
++f11 (void)
++{
++  int i;
++  double sum = 0;
++  for (i = 0; i < 100; i++)
++    sum += arr_d[i][0] * arr_d[0][i];
++  return sum;
++}
++
++char arr_c[100][100];
++char
++f12 (void)
++{
++  int i;
++  char sum = 0;
++  for (i = 0; i < 100; i++)
++    sum += arr_c[i][0] * arr_c[0][i];
++  return sum;
++}
++
++
++/* { dg-final { scan-assembler-not "sp" } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vget_high_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vget_high_1.c
+@@ -14,6 +14,7 @@ VARIANT (int8_t, 8, int8x8_t, int8x16_t, s8)		\
+ VARIANT (int16_t, 4, int16x4_t, int16x8_t, s16)		\
+ VARIANT (int32_t, 2, int32x2_t, int32x4_t, s32)		\
+ VARIANT (int64_t, 1, int64x1_t, int64x2_t, s64)		\
++VARIANT (float16_t, 4, float16x4_t, float16x8_t, f16)	\
+ VARIANT (float32_t, 2, float32x2_t, float32x4_t, f32)	\
+ VARIANT (float64_t, 1, float64x1_t, float64x2_t, f64)
+ 
+@@ -51,6 +52,8 @@ main (int argc, char **argv)
+   int16_t int16_t_data[8] = { -17, 19, 3, -999, 44048, 505, 9999, 1000};
+   int32_t int32_t_data[4] = { 123456789, -987654321, -135792468, 975318642 };
+   int64_t int64_t_data[2] = {0xfedcba9876543210LL, 0xdeadbabecafebeefLL };
++  float16_t float16_t_data[8] = { 1.25, 4.5, 7.875, 2.3125, 5.675, 8.875,
++      3.6875, 6.75};
+   float32_t float32_t_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+   float64_t float64_t_data[2] = { 1.01001000100001, 12345.6789 };
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vget_low_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vget_low_1.c
+@@ -14,6 +14,7 @@ VARIANT (int8_t, 8, int8x8_t, int8x16_t, s8)		\
+ VARIANT (int16_t, 4, int16x4_t, int16x8_t, s16)		\
+ VARIANT (int32_t, 2, int32x2_t, int32x4_t, s32)		\
+ VARIANT (int64_t, 1, int64x1_t, int64x2_t, s64)		\
++VARIANT (float16_t, 4, float16x4_t, float16x8_t, f16)	\
+ VARIANT (float32_t, 2, float32x2_t, float32x4_t, f32)	\
+ VARIANT (float64_t, 1, float64x1_t, float64x2_t, f64)
+ 
+@@ -51,6 +52,8 @@ main (int argc, char **argv)
+   int16_t int16_t_data[8] = { -17, 19, 3, -999, 44048, 505, 9999, 1000};
+   int32_t int32_t_data[4] = { 123456789, -987654321, -135792468, 975318642 };
+   int64_t int64_t_data[2] = {0xfedcba9876543210LL, 0xdeadbabecafebeefLL };
++  float16_t float16_t_data[8] = { 1.25, 4.5, 7.875, 2.3125, 5.675, 8.875,
++      3.6875, 6.75};
+   float32_t float32_t_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+   float64_t float64_t_data[2] = { 1.01001000100001, 12345.6789 };
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vld1-vst1_1.c
+@@ -31,6 +31,7 @@ THING (int8x8_t, 8, int8_t, _s8)	\
+ THING (uint8x8_t, 8, uint8_t, _u8)	\
+ THING (int16x4_t, 4, int16_t, _s16)	\
+ THING (uint16x4_t, 4, uint16_t, _u16)	\
++THING (float16x4_t, 4, float16_t, _f16)	\
+ THING (int32x2_t, 2, int32_t, _s32)	\
+ THING (uint32x2_t, 2, uint32_t, _u32)	\
+ THING (float32x2_t, 2, float32_t, _f32) \
+@@ -38,8 +39,10 @@ THING (int8x16_t, 16, int8_t, q_s8)	\
+ THING (uint8x16_t, 16, uint8_t, q_u8)	\
+ THING (int16x8_t, 8, int16_t, q_s16)	\
+ THING (uint16x8_t, 8, uint16_t, q_u16)	\
++THING (float16x8_t, 8, float16_t, q_f16)\
+ THING (int32x4_t, 4, int32_t, q_s32)	\
+ THING (uint32x4_t, 4, uint32_t, q_u32)	\
++THING (float32x4_t, 4, float32_t, q_f32)\
+ THING (int64x2_t, 2, int64_t, q_s64)	\
+ THING (uint64x2_t, 2, uint64_t, q_u64)	\
+ THING (float64x2_t, 2, float64_t, q_f64)
+--- a/src/gcc/testsuite/gcc.target/aarch64/vld1_lane.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vld1_lane.c
+@@ -16,6 +16,7 @@ VARIANT (int32, , 2, _s32, 0)	\
+ VARIANT (int64, , 1, _s64, 0)	\
+ VARIANT (poly8, , 8, _p8, 7)	\
+ VARIANT (poly16, , 4, _p16, 2)	\
++VARIANT (float16, , 4, _f16, 3)	\
+ VARIANT (float32, , 2, _f32, 1)	\
+ VARIANT (float64, , 1, _f64, 0)	\
+ VARIANT (uint8, q, 16, _u8, 13)	\
+@@ -28,6 +29,7 @@ VARIANT (int32, q, 4, _s32, 1)	\
+ VARIANT (int64, q, 2, _s64, 1)	\
+ VARIANT (poly8, q, 16, _p8, 7)	\
+ VARIANT (poly16, q, 8, _p16, 4)	\
++VARIANT (float16, q, 8, _f16, 3)\
+ VARIANT (float32, q, 4, _f32, 2)\
+ VARIANT (float64, q, 2, _f64, 1)
+ 
+@@ -56,7 +58,7 @@ VARIANTS (TESTMETH)
+ 
+ #define CHECK(BASE, Q, ELTS, SUFFIX, LANE)			\
+   if (test_vld1##Q##_lane##SUFFIX ((const BASE##_t *)orig_data,	\
+-				   BASE##_data) != 0)	\
++				   & BASE##_data) != 0)	\
+     abort ();
+ 
+ int
+@@ -65,20 +67,20 @@ main (int argc, char **argv)
+   /* Original data for all vector formats.  */
+   uint64_t orig_data[2] = {0x1234567890abcdefULL, 0x13579bdf02468aceULL};
+ 
+-  /* Data with which vldN_lane will overwrite some of previous.  */
+-  uint8_t uint8_data[4] = { 7, 11, 13, 17 };
+-  uint16_t uint16_data[4] = { 257, 263, 269, 271 };
+-  uint32_t uint32_data[4] = { 65537, 65539, 65543, 65551 };
+-  uint64_t uint64_data[4] = { 0xdeadbeefcafebabeULL, 0x0123456789abcdefULL,
+-			      0xfedcba9876543210LL, 0xdeadbabecafebeefLL };
+-  int8_t int8_data[4] = { -1, 3, -5, 7 };
+-  int16_t int16_data[4] = { 257, -259, 261, -263 };
+-  int32_t int32_data[4] = { 123456789, -987654321, -135792468, 975318642 };
+-  int64_t *int64_data = (int64_t *)uint64_data;
+-  poly8_t poly8_data[4] = { 0, 7, 13, 18, };
+-  poly16_t poly16_data[4] = { 11111, 2222, 333, 44 };
+-  float32_t float32_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+-  float64_t float64_data[4] = { 1.010010001, 12345.6789, -9876.54321, 1.618 };
++  /* Data with which vld1_lane will overwrite one element of previous.  */
++  uint8_t uint8_data = 7;
++  uint16_t uint16_data = 257;
++  uint32_t uint32_data = 65537;
++  uint64_t uint64_data = 0xdeadbeefcafebabeULL;
++  int8_t int8_data = -1;
++  int16_t int16_data = -259;
++  int32_t int32_data = -987654321;
++  int64_t int64_data = 0x1234567890abcdefLL;
++  poly8_t poly8_data = 13;
++  poly16_t poly16_data = 11111;
++  float16_t float16_data = 8.75;
++  float32_t float32_data = 3.14159;
++  float64_t float64_data = 1.010010001;
+ 
+   VARIANTS (CHECK);
+   return 0;
+--- a/src/gcc/testsuite/gcc.target/aarch64/vldN_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vldN_1.c
+@@ -39,6 +39,7 @@ VARIANT (int32, 2, STRUCT, _s32)	\
+ VARIANT (int64, 1, STRUCT, _s64)	\
+ VARIANT (poly8, 8, STRUCT, _p8)		\
+ VARIANT (poly16, 4, STRUCT, _p16)	\
++VARIANT (float16, 4, STRUCT, _f16)	\
+ VARIANT (float32, 2, STRUCT, _f32)	\
+ VARIANT (float64, 1, STRUCT, _f64)	\
+ VARIANT (uint8, 16, STRUCT, q_u8)	\
+@@ -51,6 +52,7 @@ VARIANT (int32, 4, STRUCT, q_s32)	\
+ VARIANT (int64, 2, STRUCT, q_s64)	\
+ VARIANT (poly8, 16, STRUCT, q_p8)	\
+ VARIANT (poly16, 8, STRUCT, q_p16)	\
++VARIANT (float16, 8, STRUCT, q_f16)	\
+ VARIANT (float32, 4, STRUCT, q_f32)	\
+ VARIANT (float64, 2, STRUCT, q_f64)
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vldN_dup_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vldN_dup_1.c
+@@ -16,6 +16,7 @@ VARIANT (int32, , 2, _s32, STRUCT)	\
+ VARIANT (int64, , 1, _s64, STRUCT)	\
+ VARIANT (poly8, , 8, _p8, STRUCT)	\
+ VARIANT (poly16, , 4, _p16, STRUCT)	\
++VARIANT (float16, , 4, _f16, STRUCT)	\
+ VARIANT (float32, , 2, _f32, STRUCT)	\
+ VARIANT (float64, , 1, _f64, STRUCT)	\
+ VARIANT (uint8, q, 16, _u8, STRUCT)	\
+@@ -28,6 +29,7 @@ VARIANT (int32, q, 4, _s32, STRUCT)	\
+ VARIANT (int64, q, 2, _s64, STRUCT)	\
+ VARIANT (poly8, q, 16, _p8, STRUCT)	\
+ VARIANT (poly16, q, 8, _p16, STRUCT)	\
++VARIANT (float16, q, 8, _f16, STRUCT)	\
+ VARIANT (float32, q, 4, _f32, STRUCT)	\
+ VARIANT (float64, q, 2, _f64, STRUCT)
+ 
+@@ -74,6 +76,7 @@ main (int argc, char **argv)
+   int64_t *int64_data = (int64_t *)uint64_data;
+   poly8_t poly8_data[4] = { 0, 7, 13, 18, };
+   poly16_t poly16_data[4] = { 11111, 2222, 333, 44 };
++  float16_t float16_data[4] = { 1.0625, 3.125, 0.03125, 7.75 };
+   float32_t float32_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+   float64_t float64_data[4] = { 1.010010001, 12345.6789, -9876.54321, 1.618 };
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vldN_lane_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vldN_lane_1.c
+@@ -16,6 +16,7 @@ VARIANT (int32, , 2, _s32, 0, STRUCT)	\
+ VARIANT (int64, , 1, _s64, 0, STRUCT)	\
+ VARIANT (poly8, , 8, _p8, 7, STRUCT)	\
+ VARIANT (poly16, , 4, _p16, 1, STRUCT)	\
++VARIANT (float16, , 4, _f16, 3, STRUCT)	\
+ VARIANT (float32, , 2, _f32, 1, STRUCT)	\
+ VARIANT (float64, , 1, _f64, 0, STRUCT)	\
+ VARIANT (uint8, q, 16, _u8, 14, STRUCT)	\
+@@ -28,6 +29,7 @@ VARIANT (int32, q, 4, _s32, 2, STRUCT)	\
+ VARIANT (int64, q, 2, _s64, 1, STRUCT)	\
+ VARIANT (poly8, q, 16, _p8, 12, STRUCT)	\
+ VARIANT (poly16, q, 8, _p16, 5, STRUCT)	\
++VARIANT (float16, q, 8, _f16, 7, STRUCT)\
+ VARIANT (float32, q, 4, _f32, 1, STRUCT)\
+ VARIANT (float64, q, 2, _f64, 0, STRUCT)
+ 
+@@ -54,11 +56,11 @@ test_vld##STRUCT##Q##_lane##SUFFIX (const BASE##_t *data,		\
+ }
+ 
+ 
+-/* Tests of vld2_dup and vld2q_dup.  */
++/* Tests of vld2_lane and vld2q_lane.  */
+ VARIANTS (TESTMETH, 2)
+-/* Tests of vld3_dup and vld3q_dup.  */
++/* Tests of vld3_lane and vld3q_lane.  */
+ VARIANTS (TESTMETH, 3)
+-/* Tests of vld4_dup and vld4q_dup.  */
++/* Tests of vld4_lane and vld4q_lane.  */
+ VARIANTS (TESTMETH, 4)
+ 
+ #define CHECK(BASE, Q, ELTS, SUFFIX, LANE, STRUCT)			\
+@@ -71,7 +73,7 @@ main (int argc, char **argv)
+ {
+   /* Original data for all vector formats.  */
+   uint64_t orig_data[8] = {0x1234567890abcdefULL, 0x13579bdf02468aceULL,
+-			   0x012389ab4567cdefULL, 0xfeeddadacafe0431ULL,
++			   0x012389ab4567cdefULL, 0xdeeddadacafe0431ULL,
+ 			   0x1032547698badcfeULL, 0xbadbadbadbad0badULL,
+ 			   0x0102030405060708ULL, 0x0f0e0d0c0b0a0908ULL};
+ 
+@@ -87,6 +89,7 @@ main (int argc, char **argv)
+   int64_t *int64_data = (int64_t *)uint64_data;
+   poly8_t poly8_data[4] = { 0, 7, 13, 18, };
+   poly16_t poly16_data[4] = { 11111, 2222, 333, 44 };
++  float16_t float16_data[4] = { 0.8125, 7.5, 19, 0.046875 };
+   float32_t float32_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+   float64_t float64_data[4] = { 1.010010001, 12345.6789, -9876.54321, 1.618 };
+ 
+--- a/src/gcc/testsuite/gcc.target/aarch64/vmov_n_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vmov_n_1.c
+@@ -346,4 +346,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vneg_f.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vneg_f.c
+@@ -267,4 +267,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vneg_s.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vneg_s.c
+@@ -298,4 +298,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vqabs_s64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vqabs_s64_1.c
+@@ -51,4 +51,3 @@ main (int argc, char **argv)
+ 
+   return 0;
+ }
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vqneg_s64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vqneg_s64_1.c
+@@ -44,4 +44,3 @@ main (int argc, char **argv)
+ 
+   return 0;
+ }
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vrecps.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vrecps.c
+@@ -141,4 +141,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vrecpx.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vrecpx.c
+@@ -51,4 +51,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vrnd_f64_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vrnd_f64_1.c
+@@ -102,4 +102,3 @@ main (int argc, char **argv)
+ /* { dg-final { scan-assembler-times "frintm\\td\[0-9\]+, d\[0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-times "frinti\\td\[0-9\]+, d\[0-9\]+" 1 } } */
+ /* { dg-final { scan-assembler-times "frinta\\td\[0-9\]+, d\[0-9\]+" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/aarch64/vset_lane_1.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vset_lane_1.c
+@@ -16,6 +16,7 @@ VARIANT (int32_t, , 2, int32x2_t, _s32, 0)	\
+ VARIANT (int64_t, , 1, int64x1_t, _s64, 0)	\
+ VARIANT (poly8_t, , 8, poly8x8_t, _p8, 6)	\
+ VARIANT (poly16_t, , 4, poly16x4_t, _p16, 2)	\
++VARIANT (float16_t, , 4, float16x4_t, _f16, 3)	\
+ VARIANT (float32_t, , 2, float32x2_t, _f32, 1)	\
+ VARIANT (float64_t, , 1, float64x1_t, _f64, 0)	\
+ VARIANT (uint8_t, q, 16, uint8x16_t, _u8, 11)	\
+@@ -28,6 +29,7 @@ VARIANT (int32_t, q, 4, int32x4_t, _s32, 3)	\
+ VARIANT (int64_t, q, 2, int64x2_t, _s64, 0)	\
+ VARIANT (poly8_t, q, 16, poly8x16_t, _p8, 14)	\
+ VARIANT (poly16_t, q, 8, poly16x8_t, _p16, 6)	\
++VARIANT (float16_t, q, 8, float16x8_t, _f16, 6)	\
+ VARIANT (float32_t, q, 4, float32x4_t, _f32, 2) \
+ VARIANT (float64_t, q, 2, float64x2_t, _f64, 1)
+ 
+@@ -76,6 +78,9 @@ main (int argc, char **argv)
+   poly8_t poly8_t_data[16] =
+       { 0, 7, 13, 18, 22, 25, 27, 28, 29, 31, 34, 38, 43, 49, 56, 64 };
+   poly16_t poly16_t_data[8] = { 11111, 2222, 333, 44, 5, 65432, 54321, 43210 };
++  float16_t float16_t_data[8] = { 1.25, 4.5, 7.875, 2.3125, 5.675, 8.875,
++      3.6875, 6.75};
++
+   float32_t float32_t_data[4] = { 3.14159, 2.718, 1.414, 100.0 };
+   float64_t float64_t_data[2] = { 1.01001000100001, 12345.6789 };
+ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/aarch64/vstN_lane_1.c
+@@ -0,0 +1,75 @@
++/* { dg-do run } */
++/* { dg-options "-O3 -fno-inline" } */
++
++#include <arm_neon.h>
++
++extern void abort (void);
++
++#define VARIANTS(VARIANT, STRUCT)	\
++VARIANT (uint8, , 8, _u8, 6, STRUCT)	\
++VARIANT (uint16, , 4, _u16, 3, STRUCT)	\
++VARIANT (uint32, , 2, _u32, 1, STRUCT)	\
++VARIANT (uint64, , 1, _u64, 0, STRUCT)	\
++VARIANT (int8, , 8, _s8, 5, STRUCT)	\
++VARIANT (int16, , 4, _s16, 2, STRUCT)	\
++VARIANT (int32, , 2, _s32, 0, STRUCT)	\
++VARIANT (int64, , 1, _s64, 0, STRUCT)	\
++VARIANT (poly8, , 8, _p8, 7, STRUCT)	\
++VARIANT (poly16, , 4, _p16, 1, STRUCT)	\
++VARIANT (float32, , 2, _f32, 1, STRUCT)	\
++VARIANT (float64, , 1, _f64, 0, STRUCT)	\
++VARIANT (uint8, q, 16, _u8, 14, STRUCT)	\
++VARIANT (uint16, q, 8, _u16, 4, STRUCT)	\
++VARIANT (uint32, q, 4, _u32, 3, STRUCT)	\
++VARIANT (uint64, q, 2, _u64, 0, STRUCT)	\
++VARIANT (int8, q, 16, _s8, 13, STRUCT)	\
++VARIANT (int16, q, 8, _s16, 6, STRUCT)	\
++VARIANT (int32, q, 4, _s32, 2, STRUCT)	\
++VARIANT (int64, q, 2, _s64, 1, STRUCT)	\
++VARIANT (poly8, q, 16, _p8, 12, STRUCT)	\
++VARIANT (poly16, q, 8, _p16, 5, STRUCT)	\
++VARIANT (float32, q, 4, _f32, 1, STRUCT)\
++VARIANT (float64, q, 2, _f64, 0, STRUCT)
++
++#define TESTMETH(BASE, Q, ELTS, SUFFIX, LANE, STRUCT)			\
++int									\
++test_vst##STRUCT##Q##_lane##SUFFIX (const BASE##_t *data)		\
++{									\
++  BASE##x##ELTS##x##STRUCT##_t vectors;					\
++  for (int i = 0; i < STRUCT; i++, data += ELTS)			\
++    vectors.val[i] = vld1##Q##SUFFIX (data);				\
++  BASE##_t temp[STRUCT];						\
++  vst##STRUCT##Q##_lane##SUFFIX (temp, vectors, LANE);			\
++  for (int i = 0; i < STRUCT; i++)					\
++    {									\
++      if (temp[i] != vget##Q##_lane##SUFFIX (vectors.val[i], LANE))	\
++	return 1;							\
++    }									\
++  return 0;								\
++}
++
++/* Tests of vst2_lane and vst2q_lane.  */
++VARIANTS (TESTMETH, 2)
++/* Tests of vst3_lane and vst3q_lane.  */
++VARIANTS (TESTMETH, 3)
++/* Tests of vst4_lane and vst4q_lane.  */
++VARIANTS (TESTMETH, 4)
++
++#define CHECK(BASE, Q, ELTS, SUFFIX, LANE, STRUCT)			\
++  if (test_vst##STRUCT##Q##_lane##SUFFIX ((const BASE##_t *)orig_data))	\
++    abort ();
++
++int
++main (int argc, char **argv)
++{
++  /* Original data for all vector formats.  */
++  uint64_t orig_data[8] = {0x1234567890abcdefULL, 0x13579bdf02468aceULL,
++			   0x012389ab4567cdefULL, 0xfeeddadacafe0431ULL,
++			   0x1032547698badcfeULL, 0xbadbadbadbad0badULL,
++			   0x0102030405060708ULL, 0x0f0e0d0c0b0a0908ULL};
++
++  VARIANTS (CHECK, 2);
++  VARIANTS (CHECK, 3);
++  VARIANTS (CHECK, 4);
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/aarch64/vsub_f64.c
++++ b/src/gcc/testsuite/gcc.target/aarch64/vsub_f64.c
+@@ -81,4 +81,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/20131120.c
++++ b/src/gcc/testsuite/gcc.target/arm/20131120.c
+@@ -11,4 +11,3 @@ foo (Arr2 a2, int i)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "\\\(set \\\(reg:SI \[0-9\]*\\\)\[\n\r\]+\[ \t]*\\\(const_int 4000" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32b.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32b.c
+@@ -17,4 +17,3 @@ void test_crc32b (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32b\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cb.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cb.c
+@@ -17,4 +17,3 @@ void test_crc32cb (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32cb\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cd.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cd.c
+@@ -17,4 +17,3 @@ void test_crc32cd (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "crc32cw\t...?, ...?, ...?\n" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32ch.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32ch.c
+@@ -17,4 +17,3 @@ void test_crc32ch (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32ch\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32cw.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32cw.c
+@@ -17,4 +17,3 @@ void test_crc32cw (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32cw\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32d.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32d.c
+@@ -17,4 +17,3 @@ void test_crc32d (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "crc32w\t...?, ...?, ...?\n" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32h.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32h.c
+@@ -17,4 +17,3 @@ void test_crc32h (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32h\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/acle/crc32w.c
++++ b/src/gcc/testsuite/gcc.target/arm/acle/crc32w.c
+@@ -17,4 +17,3 @@ void test_crc32w (void)
+ }
+ 
+ /* { dg-final { scan-assembler "crc32w\t...?, ...?, ...?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/anddi_notdi-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/anddi_notdi-1.c
+@@ -63,4 +63,3 @@ int main ()
+ /* { dg-final { scan-assembler-times "bics\t" 6 { target arm_thumb1 } } } */
+ /* { dg-final { scan-assembler-times "bic\t" 6 { target { ! arm_thumb1 } } } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_1.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_acquire.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */
++/* { dg-final { scan-assembler-times "dmb\tish" 1 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_2.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_acquire.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */
++/* { dg-final { scan-assembler-times "dmb\tish" 1 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_3.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_acquire.x"
+ 
+ /* { dg-final { scan-assembler-times "ldaexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-not "dmb\tsy" } } */
++/* { dg-final { scan-assembler-not "dmb\tish" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_4.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_relaxed.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-not "dmb\tsy" } } */
++/* { dg-final { scan-assembler-not "dmb\tish" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_5.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_relaxed.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-not "dmb\tsy" } } */
+\ No newline at end of file
++/* { dg-final { scan-assembler-not "dmb\tish" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_6.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_relaxed.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-not "dmb\tsy" } } */
+\ No newline at end of file
++/* { dg-final { scan-assembler-not "dmb\tish" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_7.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_seq_cst.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */
++/* { dg-final { scan-assembler-times "dmb\tish" 1 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_8.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_seq_cst.x"
+ 
+ /* { dg-final { scan-assembler-times "ldrd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-times "dmb\tsy" 1 } } */
++/* { dg-final { scan-assembler-times "dmb\tish" 1 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c
++++ b/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_9.c
+@@ -6,4 +6,4 @@
+ #include "atomic_loaddi_seq_cst.x"
+ 
+ /* { dg-final { scan-assembler-times "ldaexd\tr\[0-9\]+, r\[0-9\]+, \\\[r\[0-9\]+\\\]" 1 } } */
+-/* { dg-final { scan-assembler-not "dmb\tsy" } } */
++/* { dg-final { scan-assembler-not "dmb\tish" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/atomic_loaddi_relaxed_cond.c
++++ b/src//dev/null
+@@ -1,20 +0,0 @@
+-/* { dg-do assemble } */
+-/* { dg-options "-std=c11 -O" } */
+-/* { dg-require-effective-target arm_arch_v8a_ok } */
+-/* { dg-add-options arm_arch_v8a } */
+-
+-/* Check that if we conditionalise the atomic load we put the condition
+-   code in the right place to create valid assembly.  */
+-
+-#include <stdatomic.h>
+-
+-atomic_ullong foo;
+-int glob;
+-
+-int
+-main (int argc, char *argv[])
+-{
+-  if (argc > 2)
+-    atomic_load_explicit (&foo, memory_order_relaxed);
+-  return glob;
+-}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/attr_arm-err.c
+@@ -0,0 +1,13 @@
++/* Check that attribute target arm is rejected for M profile.  */
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_arm_ok } */
++/* { dg-skip-if "avoid conflicting multilib options" { *-*-* } { "-march=*" } { "-march=armv6-m" } } */
++/* { dg-add-options arm_arch_v6m } */
++
++int __attribute__((target("arm")))
++foo(int a)
++{  /* { dg-error "does not support" } */
++  return a ? 1 : 5;
++}
++
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/attr_arm.c
+@@ -0,0 +1,11 @@
++/* Check that attribute target arm is recognized.  */
++/* { dg-do compile } */
++/* { dg-final { scan-assembler "\\.arm" } } */
++/* { dg-final { scan-assembler-not "\\.thumb_func" } } */
++
++int __attribute__((target("arm")))
++foo(int a)
++{
++  return a ? 1 : 5;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/attr_thumb-static.c
+@@ -0,0 +1,25 @@
++/* Check that a change mode to a static function is correctly handled. */
++/* { dg-do run } */
++
++static void
++ __attribute__((__noinline__)) 
++foo (void)
++{
++  __asm__ ("");
++}
++
++static void
++__attribute__((__noinline__)) 
++__attribute__((target("thumb")))
++bar (void)
++{
++  __asm__ ("");
++}
++
++int
++main (void)
++{
++  foo();
++  bar();
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/attr_thumb-static2.c
+@@ -0,0 +1,40 @@
++/* Check interwork between static functions for thumb2. */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_arch_v7a_ok } */
++/* { dg-options "-O0 -march=armv7-a" } */
++
++struct _NSPoint
++{
++  float x;
++  float y;
++};
++
++typedef struct _NSPoint NSPoint;
++
++static NSPoint
++__attribute__ ((target("arm")))
++NSMakePoint (float x, float y)
++{
++  NSPoint point;
++  point.x = x;
++  point.y = y;
++  return point;
++}
++
++static NSPoint
++__attribute__ ((target("thumb")))
++RelativePoint (NSPoint point, NSPoint refPoint)
++{
++  return NSMakePoint (refPoint.x + point.x, refPoint.y + point.y);
++}
++
++NSPoint
++__attribute__ ((target("arm")))
++g(NSPoint refPoint)
++{
++  float pointA, pointB;
++  return RelativePoint (NSMakePoint (0, pointA), refPoint);
++}
++
++/* { dg-final { scan-assembler-times "blx" 2 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/attr_thumb.c
+@@ -0,0 +1,15 @@
++/* Check that attribute target thumb is recognized. */
++/* { dg-do compile } */
++/* Make sure the current multilib supports thumb.  */
++/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
++/* { dg-options "-O2 -mno-restrict-it" } */
++/* { dg-final { scan-assembler-not "\\.arm"  } } */
++/* { dg-final { scan-assembler "\\.thumb_func" } } */
++
++int __attribute__((target("thumb")))
++foo(int a)
++{
++  /* { dg-final { scan-assembler "ite" { target { arm_thumb2_ok } } } } */
++  return a ? 1 : 5;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/bics_1.c
+@@ -0,0 +1,53 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps -fno-inline" } */
++/* { dg-require-effective-target arm32 } */
++
++extern void abort (void);
++
++int
++bics_si_test1 (int a, int b, int c)
++{
++  int d = a & ~b;
++
++  /* { dg-final { scan-assembler-times "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" 2 } } */
++  if (d == 0)
++    return a + c;
++  else
++    return b + d + c;
++}
++
++int
++bics_si_test2 (int a, int b, int c)
++{
++  int d = a & ~(b << 3);
++
++  /* { dg-final { scan-assembler-times "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+, .sl \#3" 1 } } */
++  if (d == 0)
++    return a + c;
++  else
++    return b + d + c;
++}
++
++int
++main ()
++{
++  int x;
++
++  x = bics_si_test1 (29, ~4, 5);
++  if (x != ((29 & 4) + ~4 + 5))
++    abort ();
++
++  x = bics_si_test1 (5, ~2, 20);
++  if (x != 25)
++    abort ();
++
++    x = bics_si_test2 (35, ~4, 5);
++  if (x != ((35 & ~(~4 << 3)) + ~4 + 5))
++    abort ();
++
++  x = bics_si_test2 (96, ~2, 20);
++  if (x != 116)
++  abort ();
++
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/bics_2.c
+@@ -0,0 +1,56 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps -fno-inline" } */
++/* { dg-require-effective-target arm32 } */
++
++extern void abort (void);
++
++int
++bics_si_test1 (int a, int b, int c)
++{
++  int d = a & ~b;
++
++  /* { dg-final { scan-assembler-not "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" } } */
++  /* { dg-final { scan-assembler-times "bic\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" 2 } } */
++  if (d <= 0)
++    return a + c;
++  else
++    return b + d + c;
++}
++
++int
++bics_si_test2 (int a, int b, int c)
++{
++  int d = a & ~(b << 3);
++
++  /* { dg-final { scan-assembler-not "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+, .sl \#3" } } */
++  /* { dg-final { scan-assembler "bic\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+, .sl \#3" } } */
++  if (d <= 0)
++    return a + c;
++  else
++    return b + d + c;
++}
++
++int
++main ()
++{
++  int x;
++
++  x = bics_si_test1 (29, ~4, 5);
++  if (x != ((29 & 4) + ~4 + 5))
++    abort ();
++
++  x = bics_si_test1 (5, ~2, 20);
++  if (x != 25)
++    abort ();
++
++  x = bics_si_test2 (35, ~4, 5);
++  if (x != ((35 & ~(~4 << 3)) + ~4 + 5))
++    abort ();
++
++  x = bics_si_test2 (96, ~2, 20);
++  if (x != 116)
++    abort ();
++
++  return 0;
++}
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/bics_3.c
+@@ -0,0 +1,40 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps -fno-inline" } */
++/* { dg-require-effective-target arm32 } */
++
++extern void abort (void);
++
++int
++bics_si_test (int a, int b)
++{
++  if (a & ~b)
++    return 1;
++  else
++    return 0;
++}
++
++int
++bics_si_test2 (int a, int b)
++{
++  if (a & ~ (b << 2))
++    return 1;
++  else
++    return 0;
++}
++
++int
++main (void)
++{
++  int a = 5;
++  int b = 5;
++  int c = 20;
++  if (bics_si_test (a, b))
++    abort ();
++  if (bics_si_test2 (c, b))
++    abort ();
++  return 0;
++}
++
++/* { dg-final { scan-assembler-times "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" 2 } } */
++/* { dg-final { scan-assembler-times "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+, .sl #2" 1 } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/bics_4.c
+@@ -0,0 +1,48 @@
++/* { dg-do run } */
++/* { dg-options "-O2 --save-temps -fno-inline" } */
++/* { dg-require-effective-target arm32 } */
++
++extern void abort (void);
++
++int
++bics_si_test1 (int a, int b, int c)
++{
++  if ((a & b) == a)
++    return a;
++  else
++    return c;
++}
++
++int
++bics_si_test2 (int a, int b, int c)
++{
++  if ((a & b) == b)
++    return b;
++  else
++    return c;
++}
++
++int
++main ()
++{
++  int x;
++  x = bics_si_test1 (0xf00d, 0xf11f, 0);
++  if (x != 0xf00d)
++    abort ();
++
++  x = bics_si_test1 (0xf11f, 0xf00d, 0);
++  if (x != 0)
++    abort ();
++
++  x = bics_si_test2 (0xf00d, 0xf11f, 0);
++  if (x != 0)
++    abort ();
++
++  x = bics_si_test2 (0xf11f, 0xf00d, 0);
++  if (x != 0xf00d)
++    abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-assembler-times "bics\tr\[0-9\]+, r\[0-9\]+, r\[0-9\]+" 2 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/combine-movs.c
++++ b/src/gcc/testsuite/gcc.target/arm/combine-movs.c
+@@ -9,5 +9,4 @@ void foo (unsigned long r[], unsigned int d)
+     r[i] = 0;
+ }
+ 
+-/* { dg-final { scan-assembler "lsrs\tr\[0-9\]" { target arm_thumb2 } } } */
+-/* { dg-final { scan-assembler "movs\tr\[0-9\]" { target { ! arm_thumb2 } } } } */
++/* { dg-final { scan-assembler "lsrs\tr\[0-9\]" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/cond_sub_restrict_it.c
+@@ -0,0 +1,26 @@
++/* { dg-do run } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-mthumb -O -mrestrict-it" }  */
++
++int a;
++
++__attribute__((noinline, noclone)) int
++fn1 (int c, int d)
++{
++  a -= c == d;
++  return a;
++}
++
++int
++main (void)
++{
++  a = 10;
++  if (fn1 (4, 4) != 9)
++    __builtin_abort ();
++
++  a = 5;
++  if (fn1 (3, 4) != 5)
++    __builtin_abort ();
++
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/condarith_restrict_it.c
+@@ -0,0 +1,47 @@
++/* { dg-do run } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-mthumb -O2 -mrestrict-it" }  */
++
++__attribute__ ((noinline, noclone)) void
++fn2 ()
++{
++  __builtin_printf ("4");
++}
++
++enum
++{
++  ONE = 1,
++  TWO
++} a;
++
++int b;
++
++__attribute__ ((noinline, noclone)) int
++fn1 ()
++{
++  int c = b == 0;
++  if (a <= ONE)
++    if (b == 0)
++      fn2 ();
++  if (a)
++    if (c)
++      a = 0;
++
++  return a;
++}
++
++int
++main (void)
++{
++  a = ONE;
++  b = 1;
++  if (fn1 () != ONE)
++    __builtin_abort ();
++
++  a = TWO;
++  b = 0;
++  if (fn1 () != 0)
++    __builtin_abort ();
++
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+@@ -58,4 +58,3 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/divzero.c
++++ b/src/gcc/testsuite/gcc.target/arm/divzero.c
+@@ -1,6 +1,6 @@
++/* { dg-do run } */
+ /* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "" } */
+-/* { dg-do run } */
+ 
+ /* Check that long long divmod functions pass the right argument to
+    __aeabi_ldiv0 on divide by zero.  */
+--- a/src/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c
++++ b/src/gcc/testsuite/gcc.target/arm/fixed_float_conversion.c
+@@ -3,6 +3,7 @@
+ /* { dg-require-effective-target arm_vfp3_ok } */
+ /* { dg-options "-O1" } */
+ /* { dg-add-options arm_vfp3 } */
++/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+ 
+ float
+ fixed_to_float (int i)
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/flip-thumb.c
+@@ -0,0 +1,26 @@
++/* Check -mflip-thumb. */
++/* { dg-do compile } */
++/* Make sure the current multilib supports thumb.  */
++/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
++/* { dg-options "-O2 -mflip-thumb -mno-restrict-it" } */
++/* { dg-final { scan-assembler "\\.arm" } } */
++/* { dg-final { scan-assembler-times "\\.thumb_func" 1} } */
++
++int 
++foo(int a)
++{
++  return a ? 1 : 5;
++}
++
++int 
++bar(int a)
++{
++  return a ? 1 : 5;
++}
++
++/* { dg-final { scan-assembler-times "ite" 1 { target { arm_thumb2_ok } } } } */
++
++
++
++
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/fp16-inf.c
+@@ -0,0 +1,14 @@
++/* { dg-do run } */
++/* { dg-options "-O -mfp16-format=ieee" } */
++
++/* Conversion of infinity to __fp16 and back again should preserve the
++   value.  */
++volatile float f = __builtin_inf ();
++
++int main ()
++{
++  __fp16 h = f;
++  if (h != __builtin_inf ())
++    __builtin_abort ();
++  return 0;
++}
+--- a/src/gcc/testsuite/gcc.target/arm/identical-invariants.c
++++ b/src/gcc/testsuite/gcc.target/arm/identical-invariants.c
+@@ -25,5 +25,4 @@ int foo (int a, int b, int c, int d)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Decided to move invariant 0" "loop2_invariant" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_invariant" } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/interrupt-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/interrupt-1.c
+@@ -13,5 +13,5 @@ void foo ()
+   bar (0);
+ }
+ 
+-/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, lr}" } } */
+-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */
++/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, fp, ip, lr}" } } */
++/* { dg-final { scan-assembler "pop\t{r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/interrupt-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/interrupt-2.c
+@@ -15,5 +15,5 @@ void test()
+   foo = 0;
+ }
+ 
+-/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, lr}" } } */
+-/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */
++/* { dg-final { scan-assembler "push\t{r0, r1, r2, r3, r4, r5, ip, lr}" } } */
++/* { dg-final { scan-assembler "pop\t{r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/iordi_notdi-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/iordi_notdi-1.c
+@@ -62,4 +62,3 @@ int main ()
+ 
+ /* { dg-final { scan-assembler-times "orn\t" 6 { target arm_thumb2 } } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-2.c
+@@ -15,5 +15,3 @@ tr4 (short array[], int n)
+ /* { dg-final { scan-tree-dump-times "PHI <ivtmp" 1 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times "PHI <" 1 "ivopts"} } */
+ /* { dg-final { object-size text <= 26 { target arm_thumb2 } } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+-/* { dg-final { cleanup-saved-temps "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts-3.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-3.c
+@@ -17,5 +17,3 @@ tr3 (short array[], unsigned int n)
+ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
+ /* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+-/* { dg-final { cleanup-saved-temps "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts-4.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-4.c
+@@ -18,5 +18,3 @@ tr2 (int array[], int n)
+ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
+ /* { dg-final { object-size text <= 36 { target arm_thumb2 } } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+-/* { dg-final { cleanup-saved-temps "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts-5.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-5.c
+@@ -17,5 +17,3 @@ tr1 (int array[], unsigned int n)
+ /* { dg-final { scan-tree-dump-times "PHI <x" 0 "ivopts"} } */
+ /* { dg-final { scan-tree-dump-times ", x" 0 "ivopts"} } */
+ /* { dg-final { object-size text <= 30 { target arm_thumb2 } } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+-/* { dg-final { cleanup-saved-temps "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts-orig_biv-inc.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts-orig_biv-inc.c
+@@ -16,4 +16,3 @@ unsigned char * foo(unsigned char *ReadPtr)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "original biv" 2 "ivopts"} } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/ivopts.c
++++ b/src/gcc/testsuite/gcc.target/arm/ivopts.c
+@@ -14,5 +14,3 @@ tr5 (short array[], int n)
+ /* { dg-final { object-size text <= 20 { target arm_thumb2 } } } */
+ /* { dg-final { object-size text <= 32 { target { arm_nothumb && { ! arm_iwmmxt_ok } } } } } */
+ /* { dg-final { object-size text <= 36 { target { arm_nothumb && arm_iwmmxt_ok }  } } } */
+-/* { dg-final { cleanup-tree-dump "ivopts" } } */
+-/* { dg-final { cleanup-saved-temps "ivopts" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/lp1243022.c
++++ b/src/gcc/testsuite/gcc.target/arm/lp1243022.c
+@@ -2,7 +2,6 @@
+ /* { dg-options "-O2 -fdump-rtl-subreg2" } */
+ 
+ /* { dg-final { scan-rtl-dump "REG_INC" "subreg2" { target { ! arm_neon } } } } */
+-/* { dg-final { cleanup-rtl-dump "subreg2" } } */
+ struct device;
+ typedef unsigned int __u32;
+ typedef unsigned long long u64;
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/maskdata.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options " -O2" }  */
++/* { dg-require-effective-target arm_thumb2_ok } */
++
++#define MASK 0xff00ff
++void maskdata (int * data, int len)
++{
++   int i = len;
++   for (; i > 0; i -= 2)
++    {
++      data[i] &= MASK;
++      data[i + 1] &= MASK;
++    }
++}
++/* { dg-final { scan-assembler-not "65280" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/memcpy-aligned-1.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -save-temps" } */
++
++void *memcpy (void *dest, const void *src, unsigned int n);
++
++void foo (char *dst, int i)
++{
++  memcpy (dst, &i, sizeof (i));
++}
++
++/* { dg-final { scan-assembler-times "str\t" 1 } } */
++/* { dg-final { scan-assembler-not "ldr\t" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-1.c
+@@ -36,4 +36,3 @@ main(void)
+ }
+ 
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]*memset" { target { arm_thumb2_ok } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-10.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-10.c
+@@ -1,5 +1,8 @@
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb2_ok } */
+ /* { dg-options "-march=armv7-a -mfloat-abi=hard -mfpu=neon -O2" } */
++/* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
++/* { dg-skip-if "need SIMD instructions" { *-*-* } { "-mfpu=vfp*" } { "" } } */
+ 
+ #define BUF 100
+ long a[BUF];
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-2.c
+@@ -35,4 +35,3 @@ main(void)
+   return 0;
+ }
+ /* { dg-final { scan-assembler "bl?\[ \t\]*memset" { target { ! arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-4.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-4.c
+@@ -64,4 +64,3 @@ main(void)
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]+memset" { target { ! arm_thumb1_ok } } } } */
+ /* { dg-final { scan-assembler-times "vst1\.8" 1 { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler "vstr" { target { arm_little_endian && arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-5.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-5.c
+@@ -73,5 +73,4 @@ main(void)
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]+memset" { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler "vst1" { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler-not "vstr"  { target { arm_little_endian && arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-6.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-6.c
+@@ -62,6 +62,5 @@ main(void)
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]+memset" { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler-times "vst1" 3 { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler-times "vstr" 4 { target { arm_little_endian && arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-8.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-8.c
+@@ -40,4 +40,3 @@ main(void)
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]*memset" { target { arm_thumb2_ok } } } } */
+ /* { dg-final { scan-assembler "vst1" { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler-not "vstr" { target { arm_little_endian && arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/memset-inline-9.c
++++ b/src/gcc/testsuite/gcc.target/arm/memset-inline-9.c
+@@ -38,4 +38,3 @@ main(void)
+ }
+ /* { dg-final { scan-assembler-not "bl?\[ \t\]*memset" { target { arm_little_endian && arm_neon } } } } */
+ /* { dg-final { scan-assembler "vst1" { target { arm_little_endian && arm_neon } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/mmx-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/mmx-1.c
+@@ -8,7 +8,7 @@
+ /* { dg-options "-O -mno-apcs-frame -mcpu=iwmmxt -mabi=iwmmxt" } */
+ /* { dg-require-effective-target arm32 } */
+ /* { dg-require-effective-target arm_iwmmxt_ok } */
+-/* { dg-final { scan-assembler "ldmfd\[ 	]sp!.*ip,\[ ]*pc" } } */
++/* { dg-final { scan-assembler "push.*ip,\[ ]*pc" } } */
+ 
+ /* This function uses all the call-saved registers, namely r4, r5, r6,
+    r7, r8, r9, sl, fp.  Since we also save lr, that leaves an odd
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/mod_2.c
+@@ -0,0 +1,8 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm32 } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++#include "../aarch64/mod_2.x"
++
++/* { dg-final { scan-assembler "rsblt\tr\[0-9\]*" } } */
++/* { dg-final { scan-assembler-times "and\tr\[0-9\].*1" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/mod_256.c
+@@ -0,0 +1,8 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm32 } */
++/* { dg-options "-O2 -mcpu=cortex-a57 -save-temps" } */
++
++#include "../aarch64/mod_256.x"
++
++/* { dg-final { scan-assembler "rsbpl\tr\[0-9\]*" } } */
++
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/movcond_restrict_it.c
+@@ -0,0 +1,27 @@
++/* { dg-do run } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-mthumb -O3 -mrestrict-it" }  */
++
++int a;
++
++__attribute__ ((noinline, noclone)) int
++fn1 (int c, int d)
++{
++  if (c > d)
++    a = 1;
++  else
++    a = -1;
++  return a;
++}
++
++int
++main (void)
++{
++  if (fn1 (4, 5) != -1)
++    __builtin_abort ();
++
++  if (fn1 (5, 4) != 1)
++    __builtin_abort ();
++
++  return 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/negscc_restrict_it.c
+@@ -0,0 +1,19 @@
++/* { dg-do run } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-mthumb -O2 -mrestrict-it" }  */
++
++__attribute__ ((noinline, noclone)) int
++fn1 (int a, int b)
++{
++  return (a == b ? 0 : -1);
++}
++
++int
++main (void)
++{
++  if (fn1 (3, 3) != 0)
++    __builtin_abort ();
++
++  if (fn1 (6, 7) != -1)
++    __builtin_abort ();
++}
+--- a/src/gcc/testsuite/gcc.target/arm/neon-reload-class.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-reload-class.c
+@@ -15,4 +15,4 @@ _op_blend_p_caa_dp(unsigned *s, unsigned* e, unsigned *d, unsigned c) {
+ 
+ /* These constants should be emitted as immediates rather than loaded from memory.  */
+ 
+-/* { dg-final { scan-assembler-not "(\\.d?word|mov(w|t))" } } */
++/* { dg-final { scan-assembler-not "(\\.d?word)" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-1.c
+@@ -14,4 +14,3 @@ void test_vdupq_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.f32\[ 	\]+\[qQ\]\[0-9\]+, #0\.0\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-10.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-10.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #3992977407\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-11.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-11.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-12.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-12.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-13.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-13.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #65517\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-14.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-14.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #60927\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-15.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-15.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i8\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-16.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4863\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-17.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-17.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #1245183\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-18.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-18.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294962432\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-19.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-19.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4293722112\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-2.c
+@@ -14,4 +14,3 @@ void test_vdupq_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.f32\[ 	\]+\[qQ\]\[0-9\]+, #1\.25e-1\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-3.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-3.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-4.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-4.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-5.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-5.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #1179648\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-6.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-6.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #301989888\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-7.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-7.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294967277\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-8.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294962687\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-9.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-9.c
+@@ -14,4 +14,3 @@ void test_vdupq_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4293787647\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/pr51534.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/pr51534.c
+@@ -58,18 +58,18 @@ GEN_COND_TESTS(vceq)
+ /* { dg-final { scan-assembler-times "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+ /* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+ /* { dg-final { scan-assembler-times "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" 2 } } */
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+" } } */
++/* { dg-final { scan-assembler "vclt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vclt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vclt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vclt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vclt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vclt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
++/* { dg-final { scan-assembler "vcle\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #0" } } */
+ /* { dg-final { scan-assembler-times "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+ /* { dg-final { scan-assembler-times "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+ /* { dg-final { scan-assembler-times "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #0" 2 } } */
+@@ -81,4 +81,3 @@ GEN_COND_TESTS(vceq)
+ /* { dg-final { scan-assembler-not "vc\[gl\]\[te\]\.u\[0-9\]+\[ 	\]+\[qQdD\]\[0-9\]+, \[qQdD\]\[0-9\]+, #0" } } */
+ 
+ /* Tidy up.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
+@@ -18,4 +18,3 @@ void test_vRaddhns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
+@@ -18,4 +18,3 @@ void test_vRaddhns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
+@@ -18,4 +18,3 @@ void test_vRaddhns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
+@@ -18,4 +18,3 @@ void test_vRaddhnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
+@@ -18,4 +18,3 @@ void test_vRaddhnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
+@@ -18,4 +18,3 @@ void test_vRaddhnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
+@@ -18,4 +18,3 @@ void test_vRhaddQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
+@@ -18,4 +18,3 @@ void test_vRhaddQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
+@@ -18,4 +18,3 @@ void test_vRhaddQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
+@@ -18,4 +18,3 @@ void test_vRhaddQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
+@@ -18,4 +18,3 @@ void test_vRhaddQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
+@@ -18,4 +18,3 @@ void test_vRhaddQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
+@@ -18,4 +18,3 @@ void test_vRhadds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
+@@ -18,4 +18,3 @@ void test_vRhadds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
+@@ -18,4 +18,3 @@ void test_vRhadds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
+@@ -18,4 +18,3 @@ void test_vRhaddu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
+@@ -18,4 +18,3 @@ void test_vRhaddu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
+@@ -18,4 +18,3 @@ void test_vRhaddu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
+@@ -18,4 +18,3 @@ void test_vRshlQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
+@@ -18,4 +18,3 @@ void test_vRshlQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
+@@ -18,4 +18,3 @@ void test_vRshlQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
+@@ -18,4 +18,3 @@ void test_vRshlQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
+@@ -18,4 +18,3 @@ void test_vRshlQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
+@@ -18,4 +18,3 @@ void test_vRshlQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
+@@ -18,4 +18,3 @@ void test_vRshlQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
+@@ -18,4 +18,3 @@ void test_vRshlQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
+@@ -18,4 +18,3 @@ void test_vRshls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
+@@ -18,4 +18,3 @@ void test_vRshls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
+@@ -18,4 +18,3 @@ void test_vRshls64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
+@@ -18,4 +18,3 @@ void test_vRshls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
+@@ -18,4 +18,3 @@ void test_vRshlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
+@@ -18,4 +18,3 @@ void test_vRshlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
+@@ -18,4 +18,3 @@ void test_vRshlu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
+@@ -18,4 +18,3 @@ void test_vRshlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vRshrQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
+@@ -17,4 +17,3 @@ void test_vRshr_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
+@@ -17,4 +17,3 @@ void test_vRshr_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
+@@ -17,4 +17,3 @@ void test_vRshr_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
+@@ -17,4 +17,3 @@ void test_vRshr_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
+@@ -17,4 +17,3 @@ void test_vRshr_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
+@@ -17,4 +17,3 @@ void test_vRshr_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
+@@ -17,4 +17,3 @@ void test_vRshr_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
+@@ -17,4 +17,3 @@ void test_vRshr_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
+@@ -17,4 +17,3 @@ void test_vRshrn_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
+@@ -17,4 +17,3 @@ void test_vRshrn_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
+@@ -17,4 +17,3 @@ void test_vRshrn_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
+@@ -17,4 +17,3 @@ void test_vRshrn_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
+@@ -17,4 +17,3 @@ void test_vRshrn_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
+@@ -17,4 +17,3 @@ void test_vRshrn_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
+@@ -18,4 +18,3 @@ void test_vRsraQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
+@@ -18,4 +18,3 @@ void test_vRsra_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
+@@ -18,4 +18,3 @@ void test_vRsra_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
+@@ -18,4 +18,3 @@ void test_vRsra_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
+@@ -18,4 +18,3 @@ void test_vRsra_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
+@@ -18,4 +18,3 @@ void test_vRsra_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
+@@ -18,4 +18,3 @@ void test_vRsra_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
+@@ -18,4 +18,3 @@ void test_vRsra_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
+@@ -18,4 +18,3 @@ void test_vRsra_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
+@@ -18,4 +18,3 @@ void test_vRsubhns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
+@@ -18,4 +18,3 @@ void test_vRsubhns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
+@@ -18,4 +18,3 @@ void test_vRsubhns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
+@@ -18,4 +18,3 @@ void test_vRsubhnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
+@@ -18,4 +18,3 @@ void test_vRsubhnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
+@@ -18,4 +18,3 @@ void test_vRsubhnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
+@@ -19,4 +19,3 @@ void test_vabaQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
+@@ -19,4 +19,3 @@ void test_vabaQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
+@@ -19,4 +19,3 @@ void test_vabaQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
+@@ -19,4 +19,3 @@ void test_vabaQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
+@@ -19,4 +19,3 @@ void test_vabaQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
+@@ -19,4 +19,3 @@ void test_vabaQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabals16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabals16.c
+@@ -19,4 +19,3 @@ void test_vabals16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabals32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabals32.c
+@@ -19,4 +19,3 @@ void test_vabals32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabals8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabals8.c
+@@ -19,4 +19,3 @@ void test_vabals8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
+@@ -19,4 +19,3 @@ void test_vabalu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
+@@ -19,4 +19,3 @@ void test_vabalu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
+@@ -19,4 +19,3 @@ void test_vabalu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabas16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabas16.c
+@@ -19,4 +19,3 @@ void test_vabas16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabas32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabas32.c
+@@ -19,4 +19,3 @@ void test_vabas32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabas8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabas8.c
+@@ -19,4 +19,3 @@ void test_vabas8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabau16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabau16.c
+@@ -19,4 +19,3 @@ void test_vabau16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabau32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabau32.c
+@@ -19,4 +19,3 @@ void test_vabau32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabau8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabau8.c
+@@ -19,4 +19,3 @@ void test_vabau8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
+@@ -18,4 +18,3 @@ void test_vabdQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
+@@ -18,4 +18,3 @@ void test_vabdQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
+@@ -18,4 +18,3 @@ void test_vabdQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
+@@ -18,4 +18,3 @@ void test_vabdQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
+@@ -18,4 +18,3 @@ void test_vabdQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
+@@ -18,4 +18,3 @@ void test_vabdQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
+@@ -18,4 +18,3 @@ void test_vabdQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
+@@ -18,4 +18,3 @@ void test_vabdf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
+@@ -18,4 +18,3 @@ void test_vabdls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
+@@ -18,4 +18,3 @@ void test_vabdls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
+@@ -18,4 +18,3 @@ void test_vabdls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
+@@ -18,4 +18,3 @@ void test_vabdlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
+@@ -18,4 +18,3 @@ void test_vabdlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
+@@ -18,4 +18,3 @@ void test_vabdlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabdl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabds16.c
+@@ -18,4 +18,3 @@ void test_vabds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabds32.c
+@@ -18,4 +18,3 @@ void test_vabds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabds8.c
+@@ -18,4 +18,3 @@ void test_vabds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
+@@ -18,4 +18,3 @@ void test_vabdu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
+@@ -18,4 +18,3 @@ void test_vabdu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
+@@ -18,4 +18,3 @@ void test_vabdu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
+@@ -17,4 +17,3 @@ void test_vabsQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
+@@ -17,4 +17,3 @@ void test_vabsQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
+@@ -17,4 +17,3 @@ void test_vabsQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
+@@ -17,4 +17,3 @@ void test_vabsQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
+@@ -17,4 +17,3 @@ void test_vabsf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabss16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabss16.c
+@@ -17,4 +17,3 @@ void test_vabss16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabss32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabss32.c
+@@ -17,4 +17,3 @@ void test_vabss32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vabss8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vabss8.c
+@@ -17,4 +17,3 @@ void test_vabss8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
+@@ -18,4 +18,3 @@ void test_vaddQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
+@@ -18,4 +18,3 @@ void test_vaddQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
+@@ -18,4 +18,3 @@ void test_vaddQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
+@@ -18,4 +18,3 @@ void test_vaddQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
+@@ -18,4 +18,3 @@ void test_vaddQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
+@@ -18,4 +18,3 @@ void test_vaddQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
+@@ -18,4 +18,3 @@ void test_vaddQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
+@@ -18,4 +18,3 @@ void test_vaddQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
+@@ -18,4 +18,3 @@ void test_vaddQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
+@@ -18,4 +18,3 @@ void test_vaddf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
+@@ -18,4 +18,3 @@ void test_vaddhns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
+@@ -18,4 +18,3 @@ void test_vaddhns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
+@@ -18,4 +18,3 @@ void test_vaddhns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
+@@ -18,4 +18,3 @@ void test_vaddhnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
+@@ -18,4 +18,3 @@ void test_vaddhnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
+@@ -18,4 +18,3 @@ void test_vaddhnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
+@@ -18,4 +18,3 @@ void test_vaddls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
+@@ -18,4 +18,3 @@ void test_vaddls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
+@@ -18,4 +18,3 @@ void test_vaddls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
+@@ -18,4 +18,3 @@ void test_vaddlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
+@@ -18,4 +18,3 @@ void test_vaddlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
+@@ -18,4 +18,3 @@ void test_vaddlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vadds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vadds16.c
+@@ -18,4 +18,3 @@ void test_vadds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vadds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vadds32.c
+@@ -18,4 +18,3 @@ void test_vadds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vadds64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vadds64.c
+@@ -17,4 +17,3 @@ void test_vadds64 (void)
+   out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vadds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vadds8.c
+@@ -18,4 +18,3 @@ void test_vadds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
+@@ -18,4 +18,3 @@ void test_vaddu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
+@@ -18,4 +18,3 @@ void test_vaddu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
+@@ -17,4 +17,3 @@ void test_vaddu64 (void)
+   out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
+@@ -18,4 +18,3 @@ void test_vaddu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
+@@ -18,4 +18,3 @@ void test_vaddws16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
+@@ -18,4 +18,3 @@ void test_vaddws32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
+@@ -18,4 +18,3 @@ void test_vaddws8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
+@@ -18,4 +18,3 @@ void test_vaddwu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
+@@ -18,4 +18,3 @@ void test_vaddwu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
+@@ -18,4 +18,3 @@ void test_vaddwu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vaddw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
+@@ -18,4 +18,3 @@ void test_vandQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
+@@ -18,4 +18,3 @@ void test_vandQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
+@@ -18,4 +18,3 @@ void test_vandQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
+@@ -18,4 +18,3 @@ void test_vandQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
+@@ -18,4 +18,3 @@ void test_vandQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
+@@ -18,4 +18,3 @@ void test_vandQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
+@@ -18,4 +18,3 @@ void test_vandQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
+@@ -18,4 +18,3 @@ void test_vandQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vands16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vands16.c
+@@ -18,4 +18,3 @@ void test_vands16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vands32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vands32.c
+@@ -18,4 +18,3 @@ void test_vands32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vands64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vands64.c
+@@ -17,4 +17,3 @@ void test_vands64 (void)
+   out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vands8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vands8.c
+@@ -18,4 +18,3 @@ void test_vands8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandu16.c
+@@ -18,4 +18,3 @@ void test_vandu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandu32.c
+@@ -18,4 +18,3 @@ void test_vandu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandu64.c
+@@ -17,4 +17,3 @@ void test_vandu64 (void)
+   out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vandu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vandu8.c
+@@ -18,4 +18,3 @@ void test_vandu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
+@@ -18,4 +18,3 @@ void test_vbicQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
+@@ -18,4 +18,3 @@ void test_vbicQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
+@@ -18,4 +18,3 @@ void test_vbicQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
+@@ -18,4 +18,3 @@ void test_vbicQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
+@@ -18,4 +18,3 @@ void test_vbicQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
+@@ -18,4 +18,3 @@ void test_vbicQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
+@@ -18,4 +18,3 @@ void test_vbicQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
+@@ -18,4 +18,3 @@ void test_vbicQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbics16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbics16.c
+@@ -18,4 +18,3 @@ void test_vbics16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbics32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbics32.c
+@@ -18,4 +18,3 @@ void test_vbics32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbics64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbics64.c
+@@ -17,4 +17,3 @@ void test_vbics64 (void)
+   out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbics8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbics8.c
+@@ -18,4 +18,3 @@ void test_vbics8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
+@@ -18,4 +18,3 @@ void test_vbicu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
+@@ -18,4 +18,3 @@ void test_vbicu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
+@@ -17,4 +17,3 @@ void test_vbicu64 (void)
+   out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
+@@ -18,4 +18,3 @@ void test_vbicu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
+@@ -19,4 +19,3 @@ void test_vbslQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
+@@ -19,4 +19,3 @@ void test_vbslQp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQp64.c
+@@ -19,4 +19,3 @@ void test_vbslQp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
+@@ -19,4 +19,3 @@ void test_vbslQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
+@@ -19,4 +19,3 @@ void test_vbslQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
+@@ -19,4 +19,3 @@ void test_vbslQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
+@@ -19,4 +19,3 @@ void test_vbslQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
+@@ -19,4 +19,3 @@ void test_vbslQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
+@@ -19,4 +19,3 @@ void test_vbslQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
+@@ -19,4 +19,3 @@ void test_vbslQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
+@@ -19,4 +19,3 @@ void test_vbslQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
+@@ -19,4 +19,3 @@ void test_vbslQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
+@@ -19,4 +19,3 @@ void test_vbslf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
+@@ -19,4 +19,3 @@ void test_vbslp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslp64.c
+@@ -19,4 +19,3 @@ void test_vbslp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
+@@ -19,4 +19,3 @@ void test_vbslp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
+@@ -19,4 +19,3 @@ void test_vbsls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
+@@ -19,4 +19,3 @@ void test_vbsls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
+@@ -19,4 +19,3 @@ void test_vbsls64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
+@@ -19,4 +19,3 @@ void test_vbsls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
+@@ -19,4 +19,3 @@ void test_vbslu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
+@@ -19,4 +19,3 @@ void test_vbslu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
+@@ -19,4 +19,3 @@ void test_vbslu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
+@@ -19,4 +19,3 @@ void test_vbslu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
+@@ -18,4 +18,3 @@ void test_vcageQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
+@@ -18,4 +18,3 @@ void test_vcagef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
+@@ -18,4 +18,3 @@ void test_vcagtQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
+@@ -18,4 +18,3 @@ void test_vcagtf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
+@@ -18,4 +18,3 @@ void test_vcaleQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
+@@ -18,4 +18,3 @@ void test_vcalef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
+@@ -18,4 +18,3 @@ void test_vcaltQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
+@@ -18,4 +18,3 @@ void test_vcaltf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
+@@ -18,4 +18,3 @@ void test_vceqQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
+@@ -18,4 +18,3 @@ void test_vceqQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
+@@ -18,4 +18,3 @@ void test_vceqQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
+@@ -18,4 +18,3 @@ void test_vceqQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
+@@ -18,4 +18,3 @@ void test_vceqQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
+@@ -18,4 +18,3 @@ void test_vceqQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
+@@ -18,4 +18,3 @@ void test_vceqQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
+@@ -18,4 +18,3 @@ void test_vceqQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
+@@ -18,4 +18,3 @@ void test_vceqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
+@@ -18,4 +18,3 @@ void test_vceqp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
+@@ -18,4 +18,3 @@ void test_vceqs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
+@@ -18,4 +18,3 @@ void test_vceqs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
+@@ -18,4 +18,3 @@ void test_vceqs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
+@@ -18,4 +18,3 @@ void test_vcequ16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
+@@ -18,4 +18,3 @@ void test_vcequ32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
+@@ -18,4 +18,3 @@ void test_vcequ8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
+@@ -18,4 +18,3 @@ void test_vcgeQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
+@@ -18,4 +18,3 @@ void test_vcgeQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
+@@ -18,4 +18,3 @@ void test_vcgeQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
+@@ -18,4 +18,3 @@ void test_vcgeQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
+@@ -18,4 +18,3 @@ void test_vcgeQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
+@@ -18,4 +18,3 @@ void test_vcgeQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
+@@ -18,4 +18,3 @@ void test_vcgeQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
+@@ -18,4 +18,3 @@ void test_vcgef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcges16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcges16.c
+@@ -18,4 +18,3 @@ void test_vcges16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcges32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcges32.c
+@@ -18,4 +18,3 @@ void test_vcges32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcges8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcges8.c
+@@ -18,4 +18,3 @@ void test_vcges8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
+@@ -18,4 +18,3 @@ void test_vcgeu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
+@@ -18,4 +18,3 @@ void test_vcgeu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
+@@ -18,4 +18,3 @@ void test_vcgeu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
+@@ -18,4 +18,3 @@ void test_vcgtQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
+@@ -18,4 +18,3 @@ void test_vcgtQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
+@@ -18,4 +18,3 @@ void test_vcgtQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
+@@ -18,4 +18,3 @@ void test_vcgtQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
+@@ -18,4 +18,3 @@ void test_vcgtQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
+@@ -18,4 +18,3 @@ void test_vcgtQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
+@@ -18,4 +18,3 @@ void test_vcgtQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
+@@ -18,4 +18,3 @@ void test_vcgtf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
+@@ -18,4 +18,3 @@ void test_vcgts16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
+@@ -18,4 +18,3 @@ void test_vcgts32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
+@@ -18,4 +18,3 @@ void test_vcgts8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
+@@ -18,4 +18,3 @@ void test_vcgtu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
+@@ -18,4 +18,3 @@ void test_vcgtu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
+@@ -18,4 +18,3 @@ void test_vcgtu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
+@@ -18,4 +18,3 @@ void test_vcleQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
+@@ -18,4 +18,3 @@ void test_vcleQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
+@@ -18,4 +18,3 @@ void test_vcleQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
+@@ -18,4 +18,3 @@ void test_vcleQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
+@@ -18,4 +18,3 @@ void test_vcleQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
+@@ -18,4 +18,3 @@ void test_vcleQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
+@@ -18,4 +18,3 @@ void test_vcleQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclef32.c
+@@ -18,4 +18,3 @@ void test_vclef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcles16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcles16.c
+@@ -18,4 +18,3 @@ void test_vcles16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcles32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcles32.c
+@@ -18,4 +18,3 @@ void test_vcles32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcles8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcles8.c
+@@ -18,4 +18,3 @@ void test_vcles8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
+@@ -18,4 +18,3 @@ void test_vcleu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
+@@ -18,4 +18,3 @@ void test_vcleu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
+@@ -18,4 +18,3 @@ void test_vcleu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
+@@ -17,4 +17,3 @@ void test_vclsQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
+@@ -17,4 +17,3 @@ void test_vclsQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
+@@ -17,4 +17,3 @@ void test_vclsQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclss16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclss16.c
+@@ -17,4 +17,3 @@ void test_vclss16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclss32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclss32.c
+@@ -17,4 +17,3 @@ void test_vclss32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclss8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclss8.c
+@@ -17,4 +17,3 @@ void test_vclss8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
+@@ -18,4 +18,3 @@ void test_vcltQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
+@@ -18,4 +18,3 @@ void test_vcltQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
+@@ -18,4 +18,3 @@ void test_vcltQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
+@@ -18,4 +18,3 @@ void test_vcltQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
+@@ -18,4 +18,3 @@ void test_vcltQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
+@@ -18,4 +18,3 @@ void test_vcltQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
+@@ -18,4 +18,3 @@ void test_vcltQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
+@@ -18,4 +18,3 @@ void test_vcltf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclts16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclts16.c
+@@ -18,4 +18,3 @@ void test_vclts16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclts32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclts32.c
+@@ -18,4 +18,3 @@ void test_vclts32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclts8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclts8.c
+@@ -18,4 +18,3 @@ void test_vclts8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
+@@ -18,4 +18,3 @@ void test_vcltu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
+@@ -18,4 +18,3 @@ void test_vcltu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
+@@ -18,4 +18,3 @@ void test_vcltu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
+@@ -17,4 +17,3 @@ void test_vclzQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
+@@ -17,4 +17,3 @@ void test_vclzQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
+@@ -17,4 +17,3 @@ void test_vclzQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
+@@ -17,4 +17,3 @@ void test_vclzQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
+@@ -17,4 +17,3 @@ void test_vclzQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
+@@ -17,4 +17,3 @@ void test_vclzQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
+@@ -17,4 +17,3 @@ void test_vclzs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
+@@ -17,4 +17,3 @@ void test_vclzs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
+@@ -17,4 +17,3 @@ void test_vclzs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
+@@ -17,4 +17,3 @@ void test_vclzu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
+@@ -17,4 +17,3 @@ void test_vclzu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
+@@ -17,4 +17,3 @@ void test_vclzu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
+@@ -17,4 +17,3 @@ void test_vcntQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
+@@ -17,4 +17,3 @@ void test_vcntQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
+@@ -17,4 +17,3 @@ void test_vcntQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
+@@ -17,4 +17,3 @@ void test_vcntp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
+@@ -17,4 +17,3 @@ void test_vcnts8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
+@@ -17,4 +17,3 @@ void test_vcntu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
+@@ -17,4 +17,3 @@ void test_vcombinef32 (void)
+   out_float32x4_t = vcombine_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
+@@ -17,4 +17,3 @@ void test_vcombinep16 (void)
+   out_poly16x8_t = vcombine_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombinep64.c
+@@ -17,4 +17,3 @@ void test_vcombinep64 (void)
+   out_poly64x2_t = vcombine_p64 (arg0_poly64x1_t, arg1_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
+@@ -17,4 +17,3 @@ void test_vcombinep8 (void)
+   out_poly8x16_t = vcombine_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
+@@ -17,4 +17,3 @@ void test_vcombines16 (void)
+   out_int16x8_t = vcombine_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
+@@ -17,4 +17,3 @@ void test_vcombines32 (void)
+   out_int32x4_t = vcombine_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
+@@ -17,4 +17,3 @@ void test_vcombines64 (void)
+   out_int64x2_t = vcombine_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
+@@ -17,4 +17,3 @@ void test_vcombines8 (void)
+   out_int8x16_t = vcombine_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
+@@ -17,4 +17,3 @@ void test_vcombineu16 (void)
+   out_uint16x8_t = vcombine_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
+@@ -17,4 +17,3 @@ void test_vcombineu32 (void)
+   out_uint32x4_t = vcombine_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
+@@ -17,4 +17,3 @@ void test_vcombineu64 (void)
+   out_uint64x2_t = vcombine_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
+@@ -17,4 +17,3 @@ void test_vcombineu8 (void)
+   out_uint8x16_t = vcombine_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
+@@ -16,4 +16,3 @@ void test_vcreatef32 (void)
+   out_float32x2_t = vcreate_f32 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
+@@ -16,4 +16,3 @@ void test_vcreatep16 (void)
+   out_poly16x4_t = vcreate_p16 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreatep64.c
+@@ -16,4 +16,3 @@ void test_vcreatep64 (void)
+   out_poly64x1_t = vcreate_p64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
+@@ -16,4 +16,3 @@ void test_vcreatep8 (void)
+   out_poly8x8_t = vcreate_p8 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
+@@ -16,4 +16,3 @@ void test_vcreates16 (void)
+   out_int16x4_t = vcreate_s16 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
+@@ -16,4 +16,3 @@ void test_vcreates32 (void)
+   out_int32x2_t = vcreate_s32 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
+@@ -16,4 +16,3 @@ void test_vcreates64 (void)
+   out_int64x1_t = vcreate_s64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
+@@ -16,4 +16,3 @@ void test_vcreates8 (void)
+   out_int8x8_t = vcreate_s8 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
+@@ -16,4 +16,3 @@ void test_vcreateu16 (void)
+   out_uint16x4_t = vcreate_u16 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
+@@ -16,4 +16,3 @@ void test_vcreateu32 (void)
+   out_uint32x2_t = vcreate_u32 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
+@@ -16,4 +16,3 @@ void test_vcreateu64 (void)
+   out_uint64x1_t = vcreate_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
+@@ -16,4 +16,3 @@ void test_vcreateu8 (void)
+   out_uint8x8_t = vcreate_u8 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
+@@ -17,4 +17,3 @@ void test_vcvtQ_nf32_s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
+@@ -17,4 +17,3 @@ void test_vcvtQ_nf32_u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtQ_ns32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtQ_nu32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
+@@ -17,4 +17,3 @@ void test_vcvtQf32_s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
+@@ -17,4 +17,3 @@ void test_vcvtQf32_u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtQs32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtQu32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
+@@ -17,4 +17,3 @@ void test_vcvt_nf32_s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
+@@ -17,4 +17,3 @@ void test_vcvt_nf32_u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvt_ns32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvt_nu32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf16_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtf16_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f16.f32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_f16.c
+@@ -17,4 +17,3 @@ void test_vcvtf32_f16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.f16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
+@@ -17,4 +17,3 @@ void test_vcvtf32_s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
+@@ -17,4 +17,3 @@ void test_vcvtf32_u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvts32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
+@@ -17,4 +17,3 @@ void test_vcvtu32_f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_lanep64 (void)
+   out_poly64x2_t = vdupq_lane_p64 (arg0_poly64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_lanes64 (void)
+   out_int64x2_t = vdupq_lane_s64 (arg0_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_laneu64 (void)
+   out_uint64x2_t = vdupq_lane_u64 (arg0_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_np64 (void)
+   out_poly64x2_t = vdupq_n_p64 (arg0_poly64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_ns64 (void)
+   out_int64x2_t = vdupq_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vdupQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vdupQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
+@@ -16,4 +16,3 @@ void test_vdupQ_nu64 (void)
+   out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vdupQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
+@@ -17,4 +17,3 @@ void test_vdup_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
+@@ -17,4 +17,3 @@ void test_vdup_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep64.c
+@@ -16,4 +16,3 @@ void test_vdup_lanep64 (void)
+   out_poly64x1_t = vdup_lane_p64 (arg0_poly64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
+@@ -17,4 +17,3 @@ void test_vdup_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
+@@ -17,4 +17,3 @@ void test_vdup_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
+@@ -17,4 +17,3 @@ void test_vdup_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
+@@ -16,4 +16,3 @@ void test_vdup_lanes64 (void)
+   out_int64x1_t = vdup_lane_s64 (arg0_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
+@@ -17,4 +17,3 @@ void test_vdup_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
+@@ -17,4 +17,3 @@ void test_vdup_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
+@@ -17,4 +17,3 @@ void test_vdup_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
+@@ -16,4 +16,3 @@ void test_vdup_laneu64 (void)
+   out_uint64x1_t = vdup_lane_u64 (arg0_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
+@@ -17,4 +17,3 @@ void test_vdup_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
+@@ -17,4 +17,3 @@ void test_vdup_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
+@@ -17,4 +17,3 @@ void test_vdup_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_np64.c
+@@ -16,4 +16,3 @@ void test_vdup_np64 (void)
+   out_poly64x1_t = vdup_n_p64 (arg0_poly64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
+@@ -17,4 +17,3 @@ void test_vdup_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
+@@ -17,4 +17,3 @@ void test_vdup_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
+@@ -17,4 +17,3 @@ void test_vdup_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
+@@ -16,4 +16,3 @@ void test_vdup_ns64 (void)
+   out_int64x1_t = vdup_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
+@@ -17,4 +17,3 @@ void test_vdup_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
+@@ -17,4 +17,3 @@ void test_vdup_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
+@@ -17,4 +17,3 @@ void test_vdup_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
+@@ -16,4 +16,3 @@ void test_vdup_nu64 (void)
+   out_uint64x1_t = vdup_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
+@@ -17,4 +17,3 @@ void test_vdup_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vect-vcvt.c
+@@ -25,4 +25,3 @@ int convert()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vect-vcvtq.c
+@@ -25,4 +25,3 @@ int convert()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
+@@ -18,4 +18,3 @@ void test_veorQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
+@@ -18,4 +18,3 @@ void test_veorQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
+@@ -18,4 +18,3 @@ void test_veorQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
+@@ -18,4 +18,3 @@ void test_veorQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
+@@ -18,4 +18,3 @@ void test_veorQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
+@@ -18,4 +18,3 @@ void test_veorQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
+@@ -18,4 +18,3 @@ void test_veorQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
+@@ -18,4 +18,3 @@ void test_veorQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veors16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veors16.c
+@@ -18,4 +18,3 @@ void test_veors16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veors32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veors32.c
+@@ -18,4 +18,3 @@ void test_veors32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veors64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veors64.c
+@@ -17,4 +17,3 @@ void test_veors64 (void)
+   out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veors8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veors8.c
+@@ -18,4 +18,3 @@ void test_veors8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veoru16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veoru16.c
+@@ -18,4 +18,3 @@ void test_veoru16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veoru32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veoru32.c
+@@ -18,4 +18,3 @@ void test_veoru32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veoru64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veoru64.c
+@@ -17,4 +17,3 @@ void test_veoru64 (void)
+   out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/veoru8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/veoru8.c
+@@ -18,4 +18,3 @@ void test_veoru8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
+@@ -18,4 +18,3 @@ void test_vextQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
+@@ -18,4 +18,3 @@ void test_vextQp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQp64.c
+@@ -18,4 +18,3 @@ void test_vextQp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
+@@ -18,4 +18,3 @@ void test_vextQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
+@@ -18,4 +18,3 @@ void test_vextQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
+@@ -18,4 +18,3 @@ void test_vextQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
+@@ -18,4 +18,3 @@ void test_vextQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
+@@ -18,4 +18,3 @@ void test_vextQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
+@@ -18,4 +18,3 @@ void test_vextQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
+@@ -18,4 +18,3 @@ void test_vextQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
+@@ -18,4 +18,3 @@ void test_vextQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
+@@ -18,4 +18,3 @@ void test_vextQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextf32.c
+@@ -18,4 +18,3 @@ void test_vextf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextp16.c
+@@ -18,4 +18,3 @@ void test_vextp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextp64.c
+@@ -18,4 +18,3 @@ void test_vextp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextp8.c
+@@ -18,4 +18,3 @@ void test_vextp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vexts16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vexts16.c
+@@ -18,4 +18,3 @@ void test_vexts16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vexts32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vexts32.c
+@@ -18,4 +18,3 @@ void test_vexts32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vexts64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vexts64.c
+@@ -18,4 +18,3 @@ void test_vexts64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vexts8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vexts8.c
+@@ -18,4 +18,3 @@ void test_vexts8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextu16.c
+@@ -18,4 +18,3 @@ void test_vextu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextu32.c
+@@ -18,4 +18,3 @@ void test_vextu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextu64.c
+@@ -18,4 +18,3 @@ void test_vextu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vextu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vextu8.c
+@@ -18,4 +18,3 @@ void test_vextu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vfmaQf32.c
+@@ -19,4 +19,3 @@ void test_vfmaQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vfma\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vfmaf32.c
+@@ -19,4 +19,3 @@ void test_vfmaf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vfma\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vfmsQf32.c
+@@ -19,4 +19,3 @@ void test_vfmsQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vfms\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vfmsf32.c
+@@ -19,4 +19,3 @@ void test_vfmsf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vfms\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
+@@ -25,4 +25,3 @@ uint64x2_t test_vshll_n_u32 (uint32x2_t a)
+ /* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
+@@ -17,4 +17,3 @@ void test_vgetQ_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
+@@ -17,4 +17,3 @@ void test_vgetQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
+@@ -17,4 +17,3 @@ void test_vgetQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
+@@ -17,4 +17,3 @@ void test_vgetQ_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
+@@ -17,4 +17,3 @@ void test_vgetQ_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
+@@ -16,4 +16,3 @@ void test_vget_highf32 (void)
+   out_float32x2_t = vget_high_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
+@@ -16,4 +16,3 @@ void test_vget_highp16 (void)
+   out_poly16x4_t = vget_high_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highp64.c
+@@ -16,4 +16,3 @@ void test_vget_highp64 (void)
+   out_poly64x1_t = vget_high_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
+@@ -16,4 +16,3 @@ void test_vget_highp8 (void)
+   out_poly8x8_t = vget_high_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
+@@ -16,4 +16,3 @@ void test_vget_highs16 (void)
+   out_int16x4_t = vget_high_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
+@@ -16,4 +16,3 @@ void test_vget_highs32 (void)
+   out_int32x2_t = vget_high_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
+@@ -16,4 +16,3 @@ void test_vget_highs64 (void)
+   out_int64x1_t = vget_high_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
+@@ -16,4 +16,3 @@ void test_vget_highs8 (void)
+   out_int8x8_t = vget_high_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
+@@ -16,4 +16,3 @@ void test_vget_highu16 (void)
+   out_uint16x4_t = vget_high_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
+@@ -16,4 +16,3 @@ void test_vget_highu32 (void)
+   out_uint32x2_t = vget_high_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
+@@ -16,4 +16,3 @@ void test_vget_highu64 (void)
+   out_uint64x1_t = vget_high_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
+@@ -16,4 +16,3 @@ void test_vget_highu8 (void)
+   out_uint8x8_t = vget_high_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
+@@ -17,4 +17,3 @@ void test_vget_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
+@@ -17,4 +17,3 @@ void test_vget_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
+@@ -17,4 +17,3 @@ void test_vget_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
+@@ -17,4 +17,3 @@ void test_vget_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
+@@ -17,4 +17,3 @@ void test_vget_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
+@@ -16,4 +16,3 @@ void test_vget_lanes64 (void)
+   out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
+@@ -17,4 +17,3 @@ void test_vget_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
+@@ -17,4 +17,3 @@ void test_vget_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
+@@ -17,4 +17,3 @@ void test_vget_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
+@@ -16,4 +16,3 @@ void test_vget_laneu64 (void)
+   out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
+@@ -17,4 +17,3 @@ void test_vget_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
+@@ -17,4 +17,3 @@ void test_vget_lowf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
+@@ -17,4 +17,3 @@ void test_vget_lowp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp64.c
+@@ -16,4 +16,3 @@ void test_vget_lowp64 (void)
+   out_poly64x1_t = vget_low_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
+@@ -17,4 +17,3 @@ void test_vget_lowp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
+@@ -17,4 +17,3 @@ void test_vget_lows16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
+@@ -17,4 +17,3 @@ void test_vget_lows32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
+@@ -16,4 +16,3 @@ void test_vget_lows64 (void)
+   out_int64x1_t = vget_low_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
+@@ -17,4 +17,3 @@ void test_vget_lows8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
+@@ -17,4 +17,3 @@ void test_vget_lowu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
+@@ -17,4 +17,3 @@ void test_vget_lowu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
+@@ -16,4 +16,3 @@ void test_vget_lowu64 (void)
+   out_uint64x1_t = vget_low_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
+@@ -17,4 +17,3 @@ void test_vget_lowu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
+@@ -18,4 +18,3 @@ void test_vhaddQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
+@@ -18,4 +18,3 @@ void test_vhaddQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
+@@ -18,4 +18,3 @@ void test_vhaddQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
+@@ -18,4 +18,3 @@ void test_vhaddQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
+@@ -18,4 +18,3 @@ void test_vhaddQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
+@@ -18,4 +18,3 @@ void test_vhaddQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
+@@ -18,4 +18,3 @@ void test_vhadds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
+@@ -18,4 +18,3 @@ void test_vhadds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
+@@ -18,4 +18,3 @@ void test_vhadds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
+@@ -18,4 +18,3 @@ void test_vhaddu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
+@@ -18,4 +18,3 @@ void test_vhaddu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
+@@ -18,4 +18,3 @@ void test_vhaddu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
+@@ -18,4 +18,3 @@ void test_vhsubQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
+@@ -18,4 +18,3 @@ void test_vhsubQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
+@@ -18,4 +18,3 @@ void test_vhsubQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
+@@ -18,4 +18,3 @@ void test_vhsubQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
+@@ -18,4 +18,3 @@ void test_vhsubQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
+@@ -18,4 +18,3 @@ void test_vhsubQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
+@@ -18,4 +18,3 @@ void test_vhsubs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
+@@ -18,4 +18,3 @@ void test_vhsubs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
+@@ -18,4 +18,3 @@ void test_vhsubs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
+@@ -18,4 +18,3 @@ void test_vhsubu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
+@@ -18,4 +18,3 @@ void test_vhsubu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
+@@ -18,4 +18,3 @@ void test_vhsubu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp64.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dups16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dups32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dups64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dups8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+@@ -16,4 +16,3 @@ void test_vld1Q_dupu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep64.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanep64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+@@ -17,4 +17,3 @@ void test_vld1Q_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld1Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld1Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+@@ -17,4 +17,3 @@ void test_vld1Q_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+@@ -17,4 +17,3 @@ void test_vld1Q_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+@@ -16,4 +16,3 @@ void test_vld1Qf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+@@ -16,4 +16,3 @@ void test_vld1Qp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp64.c
+@@ -16,4 +16,3 @@ void test_vld1Qp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+@@ -16,4 +16,3 @@ void test_vld1Qp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+@@ -16,4 +16,3 @@ void test_vld1Qs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+@@ -16,4 +16,3 @@ void test_vld1Qs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+@@ -16,4 +16,3 @@ void test_vld1Qs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+@@ -16,4 +16,3 @@ void test_vld1Qs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+@@ -16,4 +16,3 @@ void test_vld1Qu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+@@ -16,4 +16,3 @@ void test_vld1Qu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+@@ -16,4 +16,3 @@ void test_vld1Qu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+@@ -16,4 +16,3 @@ void test_vld1Qu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+@@ -16,4 +16,3 @@ void test_vld1_dupf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+@@ -16,4 +16,3 @@ void test_vld1_dupp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp64.c
+@@ -16,4 +16,3 @@ void test_vld1_dupp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+@@ -16,4 +16,3 @@ void test_vld1_dupp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+@@ -16,4 +16,3 @@ void test_vld1_dups16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+@@ -16,4 +16,3 @@ void test_vld1_dups32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+@@ -16,4 +16,3 @@ void test_vld1_dups64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+@@ -16,4 +16,3 @@ void test_vld1_dups8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+@@ -16,4 +16,3 @@ void test_vld1_dupu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+@@ -16,4 +16,3 @@ void test_vld1_dupu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+@@ -16,4 +16,3 @@ void test_vld1_dupu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+@@ -16,4 +16,3 @@ void test_vld1_dupu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld1_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld1_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep64.c
+@@ -17,4 +17,3 @@ void test_vld1_lanep64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+@@ -17,4 +17,3 @@ void test_vld1_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld1_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld1_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+@@ -17,4 +17,3 @@ void test_vld1_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+@@ -17,4 +17,3 @@ void test_vld1_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld1_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld1_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+@@ -17,4 +17,3 @@ void test_vld1_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+@@ -17,4 +17,3 @@ void test_vld1_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+@@ -16,4 +16,3 @@ void test_vld1f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+@@ -16,4 +16,3 @@ void test_vld1p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p64.c
+@@ -16,4 +16,3 @@ void test_vld1p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+@@ -16,4 +16,3 @@ void test_vld1p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+@@ -16,4 +16,3 @@ void test_vld1s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+@@ -16,4 +16,3 @@ void test_vld1s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+@@ -16,4 +16,3 @@ void test_vld1s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+@@ -16,4 +16,3 @@ void test_vld1s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+@@ -16,4 +16,3 @@ void test_vld1u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+@@ -16,4 +16,3 @@ void test_vld1u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+@@ -16,4 +16,3 @@ void test_vld1u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+@@ -16,4 +16,3 @@ void test_vld1u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld2Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld2Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld2Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld2Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld2Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld2Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+@@ -17,4 +17,3 @@ void test_vld2Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+@@ -17,4 +17,3 @@ void test_vld2Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+@@ -17,4 +17,3 @@ void test_vld2Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+@@ -17,4 +17,3 @@ void test_vld2Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+@@ -17,4 +17,3 @@ void test_vld2Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+@@ -17,4 +17,3 @@ void test_vld2Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+@@ -17,4 +17,3 @@ void test_vld2Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+@@ -17,4 +17,3 @@ void test_vld2Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+@@ -17,4 +17,3 @@ void test_vld2Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+@@ -16,4 +16,3 @@ void test_vld2_dupf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+@@ -16,4 +16,3 @@ void test_vld2_dupp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp64.c
+@@ -16,4 +16,3 @@ void test_vld2_dupp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+@@ -16,4 +16,3 @@ void test_vld2_dupp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+@@ -16,4 +16,3 @@ void test_vld2_dups16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+@@ -16,4 +16,3 @@ void test_vld2_dups32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+@@ -16,4 +16,3 @@ void test_vld2_dups64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+@@ -16,4 +16,3 @@ void test_vld2_dups8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+@@ -16,4 +16,3 @@ void test_vld2_dupu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+@@ -16,4 +16,3 @@ void test_vld2_dupu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+@@ -16,4 +16,3 @@ void test_vld2_dupu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+@@ -16,4 +16,3 @@ void test_vld2_dupu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld2_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld2_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+@@ -17,4 +17,3 @@ void test_vld2_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld2_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld2_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+@@ -17,4 +17,3 @@ void test_vld2_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld2_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld2_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+@@ -17,4 +17,3 @@ void test_vld2_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+@@ -16,4 +16,3 @@ void test_vld2f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+@@ -16,4 +16,3 @@ void test_vld2p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p64.c
+@@ -16,4 +16,3 @@ void test_vld2p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+@@ -16,4 +16,3 @@ void test_vld2p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+@@ -16,4 +16,3 @@ void test_vld2s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+@@ -16,4 +16,3 @@ void test_vld2s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+@@ -16,4 +16,3 @@ void test_vld2s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+@@ -16,4 +16,3 @@ void test_vld2s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+@@ -16,4 +16,3 @@ void test_vld2u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+@@ -16,4 +16,3 @@ void test_vld2u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+@@ -16,4 +16,3 @@ void test_vld2u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+@@ -16,4 +16,3 @@ void test_vld2u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld3Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld3Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld3Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld3Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld3Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld3Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+@@ -17,4 +17,3 @@ void test_vld3Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+@@ -17,4 +17,3 @@ void test_vld3Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+@@ -17,4 +17,3 @@ void test_vld3Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+@@ -17,4 +17,3 @@ void test_vld3Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+@@ -17,4 +17,3 @@ void test_vld3Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+@@ -17,4 +17,3 @@ void test_vld3Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+@@ -17,4 +17,3 @@ void test_vld3Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+@@ -17,4 +17,3 @@ void test_vld3Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+@@ -17,4 +17,3 @@ void test_vld3Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+@@ -16,4 +16,3 @@ void test_vld3_dupf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+@@ -16,4 +16,3 @@ void test_vld3_dupp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp64.c
+@@ -16,4 +16,3 @@ void test_vld3_dupp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+@@ -16,4 +16,3 @@ void test_vld3_dupp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+@@ -16,4 +16,3 @@ void test_vld3_dups16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+@@ -16,4 +16,3 @@ void test_vld3_dups32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+@@ -16,4 +16,3 @@ void test_vld3_dups64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+@@ -16,4 +16,3 @@ void test_vld3_dups8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+@@ -16,4 +16,3 @@ void test_vld3_dupu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+@@ -16,4 +16,3 @@ void test_vld3_dupu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+@@ -16,4 +16,3 @@ void test_vld3_dupu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+@@ -16,4 +16,3 @@ void test_vld3_dupu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld3_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld3_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+@@ -17,4 +17,3 @@ void test_vld3_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld3_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld3_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+@@ -17,4 +17,3 @@ void test_vld3_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld3_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld3_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+@@ -17,4 +17,3 @@ void test_vld3_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+@@ -16,4 +16,3 @@ void test_vld3f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+@@ -16,4 +16,3 @@ void test_vld3p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p64.c
+@@ -16,4 +16,3 @@ void test_vld3p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+@@ -16,4 +16,3 @@ void test_vld3p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+@@ -16,4 +16,3 @@ void test_vld3s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+@@ -16,4 +16,3 @@ void test_vld3s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+@@ -16,4 +16,3 @@ void test_vld3s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+@@ -16,4 +16,3 @@ void test_vld3s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+@@ -16,4 +16,3 @@ void test_vld3u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+@@ -16,4 +16,3 @@ void test_vld3u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+@@ -16,4 +16,3 @@ void test_vld3u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+@@ -16,4 +16,3 @@ void test_vld3u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld4Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld4Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld4Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld4Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld4Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld4Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+@@ -17,4 +17,3 @@ void test_vld4Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+@@ -17,4 +17,3 @@ void test_vld4Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+@@ -17,4 +17,3 @@ void test_vld4Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+@@ -17,4 +17,3 @@ void test_vld4Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+@@ -17,4 +17,3 @@ void test_vld4Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+@@ -17,4 +17,3 @@ void test_vld4Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+@@ -17,4 +17,3 @@ void test_vld4Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+@@ -17,4 +17,3 @@ void test_vld4Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+@@ -17,4 +17,3 @@ void test_vld4Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+@@ -16,4 +16,3 @@ void test_vld4_dupf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+@@ -16,4 +16,3 @@ void test_vld4_dupp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp64.c
+@@ -16,4 +16,3 @@ void test_vld4_dupp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+@@ -16,4 +16,3 @@ void test_vld4_dupp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+@@ -16,4 +16,3 @@ void test_vld4_dups16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+@@ -16,4 +16,3 @@ void test_vld4_dups32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+@@ -16,4 +16,3 @@ void test_vld4_dups64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+@@ -16,4 +16,3 @@ void test_vld4_dups8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+@@ -16,4 +16,3 @@ void test_vld4_dupu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+@@ -16,4 +16,3 @@ void test_vld4_dupu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+@@ -16,4 +16,3 @@ void test_vld4_dupu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+@@ -16,4 +16,3 @@ void test_vld4_dupu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+@@ -17,4 +17,3 @@ void test_vld4_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+@@ -17,4 +17,3 @@ void test_vld4_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+@@ -17,4 +17,3 @@ void test_vld4_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+@@ -17,4 +17,3 @@ void test_vld4_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+@@ -17,4 +17,3 @@ void test_vld4_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+@@ -17,4 +17,3 @@ void test_vld4_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+@@ -17,4 +17,3 @@ void test_vld4_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+@@ -17,4 +17,3 @@ void test_vld4_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+@@ -17,4 +17,3 @@ void test_vld4_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+@@ -16,4 +16,3 @@ void test_vld4f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+@@ -16,4 +16,3 @@ void test_vld4p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p64.c
+@@ -16,4 +16,3 @@ void test_vld4p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+@@ -16,4 +16,3 @@ void test_vld4p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+@@ -16,4 +16,3 @@ void test_vld4s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+@@ -16,4 +16,3 @@ void test_vld4s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+@@ -16,4 +16,3 @@ void test_vld4s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+@@ -16,4 +16,3 @@ void test_vld4s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+@@ -16,4 +16,3 @@ void test_vld4u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+@@ -16,4 +16,3 @@ void test_vld4u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+@@ -16,4 +16,3 @@ void test_vld4u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+@@ -16,4 +16,3 @@ void test_vld4u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
+@@ -18,4 +18,3 @@ void test_vmaxQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
+@@ -18,4 +18,3 @@ void test_vmaxQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
+@@ -18,4 +18,3 @@ void test_vmaxQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
+@@ -18,4 +18,3 @@ void test_vmaxQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
+@@ -18,4 +18,3 @@ void test_vmaxQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
+@@ -18,4 +18,3 @@ void test_vmaxQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
+@@ -18,4 +18,3 @@ void test_vmaxQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
+@@ -18,4 +18,3 @@ void test_vmaxf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
+@@ -18,4 +18,3 @@ void test_vmaxs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
+@@ -18,4 +18,3 @@ void test_vmaxs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
+@@ -18,4 +18,3 @@ void test_vmaxs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
+@@ -18,4 +18,3 @@ void test_vmaxu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
+@@ -18,4 +18,3 @@ void test_vmaxu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
+@@ -18,4 +18,3 @@ void test_vmaxu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
+@@ -18,4 +18,3 @@ void test_vminQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
+@@ -18,4 +18,3 @@ void test_vminQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
+@@ -18,4 +18,3 @@ void test_vminQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
+@@ -18,4 +18,3 @@ void test_vminQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
+@@ -18,4 +18,3 @@ void test_vminQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
+@@ -18,4 +18,3 @@ void test_vminQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
+@@ -18,4 +18,3 @@ void test_vminQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminf32.c
+@@ -18,4 +18,3 @@ void test_vminf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmins16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmins16.c
+@@ -18,4 +18,3 @@ void test_vmins16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmins32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmins32.c
+@@ -18,4 +18,3 @@ void test_vmins32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmins8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmins8.c
+@@ -18,4 +18,3 @@ void test_vmins8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminu16.c
+@@ -18,4 +18,3 @@ void test_vminu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminu32.c
+@@ -18,4 +18,3 @@ void test_vminu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vminu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vminu8.c
+@@ -18,4 +18,3 @@ void test_vminu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
+@@ -19,4 +19,3 @@ void test_vmlaQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
+@@ -19,4 +19,3 @@ void test_vmlaQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
+@@ -19,4 +19,3 @@ void test_vmlaQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
+@@ -19,4 +19,3 @@ void test_vmlaQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
+@@ -19,4 +19,3 @@ void test_vmlaQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
+@@ -19,4 +19,3 @@ void test_vmlaQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
+@@ -19,4 +19,3 @@ void test_vmlaQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
+@@ -19,4 +19,3 @@ void test_vmlaQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
+@@ -19,4 +19,3 @@ void test_vmla_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmla_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmla_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmla_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmla_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
+@@ -19,4 +19,3 @@ void test_vmla_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
+@@ -19,4 +19,3 @@ void test_vmla_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
+@@ -19,4 +19,3 @@ void test_vmla_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
+@@ -19,4 +19,3 @@ void test_vmla_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
+@@ -19,4 +19,3 @@ void test_vmla_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
+@@ -19,4 +19,3 @@ void test_vmlaf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmlal_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmlal_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmlal_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmlal_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
+@@ -19,4 +19,3 @@ void test_vmlal_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
+@@ -19,4 +19,3 @@ void test_vmlal_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
+@@ -19,4 +19,3 @@ void test_vmlal_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
+@@ -19,4 +19,3 @@ void test_vmlal_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
+@@ -19,4 +19,3 @@ void test_vmlals16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
+@@ -19,4 +19,3 @@ void test_vmlals32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
+@@ -19,4 +19,3 @@ void test_vmlals8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
+@@ -19,4 +19,3 @@ void test_vmlalu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
+@@ -19,4 +19,3 @@ void test_vmlalu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
+@@ -19,4 +19,3 @@ void test_vmlalu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
+@@ -19,4 +19,3 @@ void test_vmlas16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
+@@ -19,4 +19,3 @@ void test_vmlas32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
+@@ -19,4 +19,3 @@ void test_vmlas8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
+@@ -19,4 +19,3 @@ void test_vmlau16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
+@@ -19,4 +19,3 @@ void test_vmlau32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
+@@ -19,4 +19,3 @@ void test_vmlau8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
+@@ -19,4 +19,3 @@ void test_vmlsQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
+@@ -19,4 +19,3 @@ void test_vmlsQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
+@@ -19,4 +19,3 @@ void test_vmlsQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
+@@ -19,4 +19,3 @@ void test_vmlsQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
+@@ -19,4 +19,3 @@ void test_vmlsQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
+@@ -19,4 +19,3 @@ void test_vmlsQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
+@@ -19,4 +19,3 @@ void test_vmlsQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
+@@ -19,4 +19,3 @@ void test_vmlsQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
+@@ -19,4 +19,3 @@ void test_vmls_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmls_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmls_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmls_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmls_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
+@@ -19,4 +19,3 @@ void test_vmls_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
+@@ -19,4 +19,3 @@ void test_vmls_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
+@@ -19,4 +19,3 @@ void test_vmls_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
+@@ -19,4 +19,3 @@ void test_vmls_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
+@@ -19,4 +19,3 @@ void test_vmls_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
+@@ -19,4 +19,3 @@ void test_vmlsf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
+@@ -19,4 +19,3 @@ void test_vmlsl_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
+@@ -19,4 +19,3 @@ void test_vmlsl_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
+@@ -19,4 +19,3 @@ void test_vmlsl_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
+@@ -19,4 +19,3 @@ void test_vmlsl_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
+@@ -19,4 +19,3 @@ void test_vmlsl_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
+@@ -19,4 +19,3 @@ void test_vmlsl_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
+@@ -19,4 +19,3 @@ void test_vmlsl_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
+@@ -19,4 +19,3 @@ void test_vmlsl_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
+@@ -19,4 +19,3 @@ void test_vmlsls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
+@@ -19,4 +19,3 @@ void test_vmlsls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
+@@ -19,4 +19,3 @@ void test_vmlsls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
+@@ -19,4 +19,3 @@ void test_vmlslu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
+@@ -19,4 +19,3 @@ void test_vmlslu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
+@@ -19,4 +19,3 @@ void test_vmlslu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmlsl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
+@@ -19,4 +19,3 @@ void test_vmlss16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
+@@ -19,4 +19,3 @@ void test_vmlss32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
+@@ -19,4 +19,3 @@ void test_vmlss8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
+@@ -19,4 +19,3 @@ void test_vmlsu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
+@@ -19,4 +19,3 @@ void test_vmlsu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
+@@ -19,4 +19,3 @@ void test_vmlsu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
+@@ -17,4 +17,3 @@ void test_vmovQ_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
+@@ -17,4 +17,3 @@ void test_vmovQ_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
+@@ -17,4 +17,3 @@ void test_vmovQ_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vmovQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vmovQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
+@@ -16,4 +16,3 @@ void test_vmovQ_ns64 (void)
+   out_int64x2_t = vmovq_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vmovQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vmovQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vmovQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
+@@ -16,4 +16,3 @@ void test_vmovQ_nu64 (void)
+   out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vmovQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
+@@ -17,4 +17,3 @@ void test_vmov_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
+@@ -17,4 +17,3 @@ void test_vmov_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
+@@ -17,4 +17,3 @@ void test_vmov_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
+@@ -17,4 +17,3 @@ void test_vmov_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
+@@ -17,4 +17,3 @@ void test_vmov_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
+@@ -16,4 +16,3 @@ void test_vmov_ns64 (void)
+   out_int64x1_t = vmov_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
+@@ -17,4 +17,3 @@ void test_vmov_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
+@@ -17,4 +17,3 @@ void test_vmov_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
+@@ -17,4 +17,3 @@ void test_vmov_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
+@@ -16,4 +16,3 @@ void test_vmov_nu64 (void)
+   out_uint64x1_t = vmov_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
+@@ -17,4 +17,3 @@ void test_vmov_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
+@@ -17,4 +17,3 @@ void test_vmovls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
+@@ -17,4 +17,3 @@ void test_vmovls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
+@@ -17,4 +17,3 @@ void test_vmovls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
+@@ -17,4 +17,3 @@ void test_vmovlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
+@@ -17,4 +17,3 @@ void test_vmovlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
+@@ -17,4 +17,3 @@ void test_vmovlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
+@@ -17,4 +17,3 @@ void test_vmovns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
+@@ -17,4 +17,3 @@ void test_vmovns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
+@@ -17,4 +17,3 @@ void test_vmovns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
+@@ -17,4 +17,3 @@ void test_vmovnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
+@@ -17,4 +17,3 @@ void test_vmovnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
+@@ -17,4 +17,3 @@ void test_vmovnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
+@@ -18,4 +18,3 @@ void test_vmulQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
+@@ -18,4 +18,3 @@ void test_vmulQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vmulQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
+@@ -18,4 +18,3 @@ void test_vmulQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
+@@ -18,4 +18,3 @@ void test_vmulQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
+@@ -18,4 +18,3 @@ void test_vmulQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
+@@ -18,4 +18,3 @@ void test_vmulQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
+@@ -18,4 +18,3 @@ void test_vmulQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
+@@ -18,4 +18,3 @@ void test_vmulQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
+@@ -18,4 +18,3 @@ void test_vmulQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
+@@ -18,4 +18,3 @@ void test_vmulQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
+@@ -18,4 +18,3 @@ void test_vmulQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
+@@ -18,4 +18,3 @@ void test_vmulQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
+@@ -18,4 +18,3 @@ void test_vmul_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
+@@ -18,4 +18,3 @@ void test_vmul_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
+@@ -18,4 +18,3 @@ void test_vmul_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
+@@ -18,4 +18,3 @@ void test_vmul_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
+@@ -18,4 +18,3 @@ void test_vmul_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
+@@ -18,4 +18,3 @@ void test_vmul_nf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
+@@ -18,4 +18,3 @@ void test_vmul_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
+@@ -18,4 +18,3 @@ void test_vmul_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
+@@ -18,4 +18,3 @@ void test_vmul_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
+@@ -18,4 +18,3 @@ void test_vmul_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
+@@ -18,4 +18,3 @@ void test_vmulf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
+@@ -18,4 +18,3 @@ void test_vmull_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
+@@ -18,4 +18,3 @@ void test_vmull_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
+@@ -18,4 +18,3 @@ void test_vmull_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
+@@ -18,4 +18,3 @@ void test_vmull_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
+@@ -18,4 +18,3 @@ void test_vmull_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
+@@ -18,4 +18,3 @@ void test_vmull_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
+@@ -18,4 +18,3 @@ void test_vmull_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
+@@ -18,4 +18,3 @@ void test_vmull_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
+@@ -18,4 +18,3 @@ void test_vmullp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
+@@ -18,4 +18,3 @@ void test_vmulls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
+@@ -18,4 +18,3 @@ void test_vmulls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
+@@ -18,4 +18,3 @@ void test_vmulls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
+@@ -18,4 +18,3 @@ void test_vmullu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
+@@ -18,4 +18,3 @@ void test_vmullu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
+@@ -18,4 +18,3 @@ void test_vmullu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmull\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
+@@ -18,4 +18,3 @@ void test_vmulp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
+@@ -18,4 +18,3 @@ void test_vmuls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
+@@ -18,4 +18,3 @@ void test_vmuls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
+@@ -18,4 +18,3 @@ void test_vmuls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
+@@ -18,4 +18,3 @@ void test_vmulu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
+@@ -18,4 +18,3 @@ void test_vmulu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
+@@ -18,4 +18,3 @@ void test_vmulu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
+@@ -17,4 +17,3 @@ void test_vmvnQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
+@@ -17,4 +17,3 @@ void test_vmvnQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
+@@ -17,4 +17,3 @@ void test_vmvnQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
+@@ -17,4 +17,3 @@ void test_vmvnQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
+@@ -17,4 +17,3 @@ void test_vmvnQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
+@@ -17,4 +17,3 @@ void test_vmvnQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
+@@ -17,4 +17,3 @@ void test_vmvnQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
+@@ -17,4 +17,3 @@ void test_vmvnp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
+@@ -17,4 +17,3 @@ void test_vmvns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
+@@ -17,4 +17,3 @@ void test_vmvns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
+@@ -17,4 +17,3 @@ void test_vmvns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
+@@ -17,4 +17,3 @@ void test_vmvnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
+@@ -17,4 +17,3 @@ void test_vmvnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
+@@ -17,4 +17,3 @@ void test_vmvnu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
+@@ -17,4 +17,3 @@ void test_vnegQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
+@@ -17,4 +17,3 @@ void test_vnegQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
+@@ -17,4 +17,3 @@ void test_vnegQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
+@@ -17,4 +17,3 @@ void test_vnegQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
+@@ -17,4 +17,3 @@ void test_vnegf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
+@@ -17,4 +17,3 @@ void test_vnegs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
+@@ -17,4 +17,3 @@ void test_vnegs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
+@@ -17,4 +17,3 @@ void test_vnegs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
+@@ -18,4 +18,3 @@ void test_vornQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
+@@ -18,4 +18,3 @@ void test_vornQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
+@@ -18,4 +18,3 @@ void test_vornQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
+@@ -18,4 +18,3 @@ void test_vornQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
+@@ -18,4 +18,3 @@ void test_vornQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
+@@ -18,4 +18,3 @@ void test_vornQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
+@@ -18,4 +18,3 @@ void test_vornQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
+@@ -18,4 +18,3 @@ void test_vornQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorns16.c
+@@ -18,4 +18,3 @@ void test_vorns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorns32.c
+@@ -18,4 +18,3 @@ void test_vorns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorns64.c
+@@ -17,4 +17,3 @@ void test_vorns64 (void)
+   out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorns8.c
+@@ -18,4 +18,3 @@ void test_vorns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornu16.c
+@@ -18,4 +18,3 @@ void test_vornu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornu32.c
+@@ -18,4 +18,3 @@ void test_vornu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornu64.c
+@@ -17,4 +17,3 @@ void test_vornu64 (void)
+   out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vornu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vornu8.c
+@@ -18,4 +18,3 @@ void test_vornu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
+@@ -18,4 +18,3 @@ void test_vorrQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
+@@ -18,4 +18,3 @@ void test_vorrQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
+@@ -18,4 +18,3 @@ void test_vorrQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
+@@ -18,4 +18,3 @@ void test_vorrQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
+@@ -18,4 +18,3 @@ void test_vorrQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
+@@ -18,4 +18,3 @@ void test_vorrQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
+@@ -18,4 +18,3 @@ void test_vorrQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
+@@ -18,4 +18,3 @@ void test_vorrQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
+@@ -18,4 +18,3 @@ void test_vorrs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
+@@ -18,4 +18,3 @@ void test_vorrs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
+@@ -17,4 +17,3 @@ void test_vorrs64 (void)
+   out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
+@@ -18,4 +18,3 @@ void test_vorrs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorru16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorru16.c
+@@ -18,4 +18,3 @@ void test_vorru16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorru32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorru32.c
+@@ -18,4 +18,3 @@ void test_vorru32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorru64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorru64.c
+@@ -17,4 +17,3 @@ void test_vorru64 (void)
+   out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vorru8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vorru8.c
+@@ -18,4 +18,3 @@ void test_vorru8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
+@@ -18,4 +18,3 @@ void test_vpadalQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
+@@ -18,4 +18,3 @@ void test_vpadalQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
+@@ -18,4 +18,3 @@ void test_vpadalQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
+@@ -18,4 +18,3 @@ void test_vpadalQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
+@@ -18,4 +18,3 @@ void test_vpadalQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
+@@ -18,4 +18,3 @@ void test_vpadalQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
+@@ -18,4 +18,3 @@ void test_vpadals16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
+@@ -18,4 +18,3 @@ void test_vpadals32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
+@@ -18,4 +18,3 @@ void test_vpadals8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
+@@ -18,4 +18,3 @@ void test_vpadalu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
+@@ -18,4 +18,3 @@ void test_vpadalu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
+@@ -18,4 +18,3 @@ void test_vpadalu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
+@@ -18,4 +18,3 @@ void test_vpaddf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
+@@ -17,4 +17,3 @@ void test_vpaddlQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
+@@ -17,4 +17,3 @@ void test_vpaddlQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
+@@ -17,4 +17,3 @@ void test_vpaddlQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
+@@ -17,4 +17,3 @@ void test_vpaddlQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
+@@ -17,4 +17,3 @@ void test_vpaddlQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
+@@ -17,4 +17,3 @@ void test_vpaddlQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
+@@ -17,4 +17,3 @@ void test_vpaddls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
+@@ -17,4 +17,3 @@ void test_vpaddls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
+@@ -17,4 +17,3 @@ void test_vpaddls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
+@@ -17,4 +17,3 @@ void test_vpaddlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
+@@ -17,4 +17,3 @@ void test_vpaddlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
+@@ -17,4 +17,3 @@ void test_vpaddlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
+@@ -18,4 +18,3 @@ void test_vpadds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
+@@ -18,4 +18,3 @@ void test_vpadds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
+@@ -18,4 +18,3 @@ void test_vpadds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
+@@ -18,4 +18,3 @@ void test_vpaddu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
+@@ -18,4 +18,3 @@ void test_vpaddu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
+@@ -18,4 +18,3 @@ void test_vpaddu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
+@@ -18,4 +18,3 @@ void test_vpmaxf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
+@@ -18,4 +18,3 @@ void test_vpmaxs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
+@@ -18,4 +18,3 @@ void test_vpmaxs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
+@@ -18,4 +18,3 @@ void test_vpmaxs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
+@@ -18,4 +18,3 @@ void test_vpmaxu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
+@@ -18,4 +18,3 @@ void test_vpmaxu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
+@@ -18,4 +18,3 @@ void test_vpmaxu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
+@@ -18,4 +18,3 @@ void test_vpminf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
+@@ -18,4 +18,3 @@ void test_vpmins16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
+@@ -18,4 +18,3 @@ void test_vpmins32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
+@@ -18,4 +18,3 @@ void test_vpmins8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
+@@ -18,4 +18,3 @@ void test_vpminu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
+@@ -18,4 +18,3 @@ void test_vpminu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
+@@ -18,4 +18,3 @@ void test_vpminu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vpmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulh_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulh_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulh_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulh_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
+@@ -18,4 +18,3 @@ void test_vqRdmulhs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
+@@ -18,4 +18,3 @@ void test_vqRshlQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
+@@ -18,4 +18,3 @@ void test_vqRshlQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
+@@ -18,4 +18,3 @@ void test_vqRshlQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
+@@ -18,4 +18,3 @@ void test_vqRshlQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
+@@ -18,4 +18,3 @@ void test_vqRshlQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
+@@ -18,4 +18,3 @@ void test_vqRshlQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
+@@ -18,4 +18,3 @@ void test_vqRshlQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
+@@ -18,4 +18,3 @@ void test_vqRshlQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
+@@ -18,4 +18,3 @@ void test_vqRshls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
+@@ -18,4 +18,3 @@ void test_vqRshls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
+@@ -18,4 +18,3 @@ void test_vqRshls64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
+@@ -18,4 +18,3 @@ void test_vqRshls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
+@@ -18,4 +18,3 @@ void test_vqRshlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
+@@ -18,4 +18,3 @@ void test_vqRshlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
+@@ -18,4 +18,3 @@ void test_vqRshlu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
+@@ -18,4 +18,3 @@ void test_vqRshlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
+@@ -17,4 +17,3 @@ void test_vqRshrn_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
+@@ -17,4 +17,3 @@ void test_vqRshrun_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
+@@ -17,4 +17,3 @@ void test_vqRshrun_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
+@@ -17,4 +17,3 @@ void test_vqRshrun_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqrshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
+@@ -17,4 +17,3 @@ void test_vqabsQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
+@@ -17,4 +17,3 @@ void test_vqabsQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
+@@ -17,4 +17,3 @@ void test_vqabsQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
+@@ -17,4 +17,3 @@ void test_vqabss16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
+@@ -17,4 +17,3 @@ void test_vqabss32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
+@@ -17,4 +17,3 @@ void test_vqabss8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
+@@ -18,4 +18,3 @@ void test_vqaddQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
+@@ -18,4 +18,3 @@ void test_vqaddQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
+@@ -18,4 +18,3 @@ void test_vqaddQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
+@@ -18,4 +18,3 @@ void test_vqaddQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
+@@ -18,4 +18,3 @@ void test_vqaddQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
+@@ -18,4 +18,3 @@ void test_vqaddQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
+@@ -18,4 +18,3 @@ void test_vqaddQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
+@@ -18,4 +18,3 @@ void test_vqaddQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
+@@ -18,4 +18,3 @@ void test_vqadds16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
+@@ -18,4 +18,3 @@ void test_vqadds32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
+@@ -18,4 +18,3 @@ void test_vqadds64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
+@@ -18,4 +18,3 @@ void test_vqadds8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
+@@ -18,4 +18,3 @@ void test_vqaddu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
+@@ -18,4 +18,3 @@ void test_vqaddu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
+@@ -18,4 +18,3 @@ void test_vqaddu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
+@@ -18,4 +18,3 @@ void test_vqaddu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
+@@ -19,4 +19,3 @@ void test_vqdmlal_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
+@@ -19,4 +19,3 @@ void test_vqdmlal_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
+@@ -19,4 +19,3 @@ void test_vqdmlal_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
+@@ -19,4 +19,3 @@ void test_vqdmlal_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
+@@ -19,4 +19,3 @@ void test_vqdmlals16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
+@@ -19,4 +19,3 @@ void test_vqdmlals32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
+@@ -19,4 +19,3 @@ void test_vqdmlsl_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
+@@ -19,4 +19,3 @@ void test_vqdmlsl_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
+@@ -19,4 +19,3 @@ void test_vqdmlsl_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
+@@ -19,4 +19,3 @@ void test_vqdmlsl_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
+@@ -19,4 +19,3 @@ void test_vqdmlsls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
+@@ -19,4 +19,3 @@ void test_vqdmlsls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
+@@ -18,4 +18,3 @@ void test_vqdmulhQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
+@@ -18,4 +18,3 @@ void test_vqdmulh_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
+@@ -18,4 +18,3 @@ void test_vqdmulh_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
+@@ -18,4 +18,3 @@ void test_vqdmulh_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
+@@ -18,4 +18,3 @@ void test_vqdmulh_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
+@@ -18,4 +18,3 @@ void test_vqdmulhs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
+@@ -18,4 +18,3 @@ void test_vqdmulhs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
+@@ -18,4 +18,3 @@ void test_vqdmull_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
+@@ -18,4 +18,3 @@ void test_vqdmull_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
+@@ -18,4 +18,3 @@ void test_vqdmull_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
+@@ -18,4 +18,3 @@ void test_vqdmull_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
+@@ -18,4 +18,3 @@ void test_vqdmulls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
+@@ -18,4 +18,3 @@ void test_vqdmulls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
+@@ -17,4 +17,3 @@ void test_vqmovns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
+@@ -17,4 +17,3 @@ void test_vqmovns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
+@@ -17,4 +17,3 @@ void test_vqmovns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
+@@ -17,4 +17,3 @@ void test_vqmovnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
+@@ -17,4 +17,3 @@ void test_vqmovnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
+@@ -17,4 +17,3 @@ void test_vqmovnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
+@@ -17,4 +17,3 @@ void test_vqmovuns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
+@@ -17,4 +17,3 @@ void test_vqmovuns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
+@@ -17,4 +17,3 @@ void test_vqmovuns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqmovun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
+@@ -17,4 +17,3 @@ void test_vqnegQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
+@@ -17,4 +17,3 @@ void test_vqnegQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
+@@ -17,4 +17,3 @@ void test_vqnegQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
+@@ -17,4 +17,3 @@ void test_vqnegs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
+@@ -17,4 +17,3 @@ void test_vqnegs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
+@@ -17,4 +17,3 @@ void test_vqnegs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vqshlQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
+@@ -18,4 +18,3 @@ void test_vqshlQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
+@@ -18,4 +18,3 @@ void test_vqshlQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
+@@ -18,4 +18,3 @@ void test_vqshlQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
+@@ -18,4 +18,3 @@ void test_vqshlQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
+@@ -18,4 +18,3 @@ void test_vqshlQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
+@@ -18,4 +18,3 @@ void test_vqshlQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
+@@ -18,4 +18,3 @@ void test_vqshlQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
+@@ -18,4 +18,3 @@ void test_vqshlQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshl_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshl_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshl_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
+@@ -17,4 +17,3 @@ void test_vqshl_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
+@@ -17,4 +17,3 @@ void test_vqshl_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
+@@ -17,4 +17,3 @@ void test_vqshl_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
+@@ -17,4 +17,3 @@ void test_vqshl_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
+@@ -17,4 +17,3 @@ void test_vqshl_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
+@@ -18,4 +18,3 @@ void test_vqshls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
+@@ -18,4 +18,3 @@ void test_vqshls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
+@@ -18,4 +18,3 @@ void test_vqshls64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
+@@ -18,4 +18,3 @@ void test_vqshls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
+@@ -18,4 +18,3 @@ void test_vqshlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
+@@ -18,4 +18,3 @@ void test_vqshlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
+@@ -18,4 +18,3 @@ void test_vqshlu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
+@@ -18,4 +18,3 @@ void test_vqshlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshluQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshluQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshluQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vqshluQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshlu_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshlu_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshlu_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
+@@ -17,4 +17,3 @@ void test_vqshlu_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshrn_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshrn_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshrn_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
+@@ -17,4 +17,3 @@ void test_vqshrn_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
+@@ -17,4 +17,3 @@ void test_vqshrn_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
+@@ -17,4 +17,3 @@ void test_vqshrn_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
+@@ -17,4 +17,3 @@ void test_vqshrun_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
+@@ -17,4 +17,3 @@ void test_vqshrun_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
+@@ -17,4 +17,3 @@ void test_vqshrun_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
+@@ -18,4 +18,3 @@ void test_vqsubQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
+@@ -18,4 +18,3 @@ void test_vqsubQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
+@@ -18,4 +18,3 @@ void test_vqsubQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
+@@ -18,4 +18,3 @@ void test_vqsubQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
+@@ -18,4 +18,3 @@ void test_vqsubQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
+@@ -18,4 +18,3 @@ void test_vqsubQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
+@@ -18,4 +18,3 @@ void test_vqsubQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
+@@ -18,4 +18,3 @@ void test_vqsubQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
+@@ -18,4 +18,3 @@ void test_vqsubs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
+@@ -18,4 +18,3 @@ void test_vqsubs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
+@@ -18,4 +18,3 @@ void test_vqsubs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
+@@ -18,4 +18,3 @@ void test_vqsubs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
+@@ -18,4 +18,3 @@ void test_vqsubu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
+@@ -18,4 +18,3 @@ void test_vqsubu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
+@@ -18,4 +18,3 @@ void test_vqsubu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
+@@ -18,4 +18,3 @@ void test_vqsubu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
+@@ -17,4 +17,3 @@ void test_vrecpeQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
+@@ -17,4 +17,3 @@ void test_vrecpeQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
+@@ -17,4 +17,3 @@ void test_vrecpef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
+@@ -17,4 +17,3 @@ void test_vrecpeu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
+@@ -18,4 +18,3 @@ void test_vrecpsQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
+@@ -18,4 +18,3 @@ void test_vrecpsf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_p128 (void)
+   out_float32x4_t = vreinterpretq_f32_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_p16 (void)
+   out_float32x4_t = vreinterpretq_f32_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_p64 (void)
+   out_float32x4_t = vreinterpretq_f32_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_p8 (void)
+   out_float32x4_t = vreinterpretq_f32_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_s16 (void)
+   out_float32x4_t = vreinterpretq_f32_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_s32 (void)
+   out_float32x4_t = vreinterpretq_f32_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_s64 (void)
+   out_float32x4_t = vreinterpretq_f32_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_s8 (void)
+   out_float32x4_t = vreinterpretq_f32_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_u16 (void)
+   out_float32x4_t = vreinterpretq_f32_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_u32 (void)
+   out_float32x4_t = vreinterpretq_f32_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_u64 (void)
+   out_float32x4_t = vreinterpretq_f32_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQf32_u8 (void)
+   out_float32x4_t = vreinterpretq_f32_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_f32 (void)
+   out_poly128_t = vreinterpretq_p128_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_p16 (void)
+   out_poly128_t = vreinterpretq_p128_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_p64 (void)
+   out_poly128_t = vreinterpretq_p128_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_p8 (void)
+   out_poly128_t = vreinterpretq_p128_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_s16 (void)
+   out_poly128_t = vreinterpretq_p128_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_s32 (void)
+   out_poly128_t = vreinterpretq_p128_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_s64 (void)
+   out_poly128_t = vreinterpretq_p128_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_s8 (void)
+   out_poly128_t = vreinterpretq_p128_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_u16 (void)
+   out_poly128_t = vreinterpretq_p128_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_u32 (void)
+   out_poly128_t = vreinterpretq_p128_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_u64 (void)
+   out_poly128_t = vreinterpretq_p128_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp128_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp128_u8 (void)
+   out_poly128_t = vreinterpretq_p128_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_f32 (void)
+   out_poly16x8_t = vreinterpretq_p16_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_p128 (void)
+   out_poly16x8_t = vreinterpretq_p16_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_p64 (void)
+   out_poly16x8_t = vreinterpretq_p16_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_p8 (void)
+   out_poly16x8_t = vreinterpretq_p16_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_s16 (void)
+   out_poly16x8_t = vreinterpretq_p16_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_s32 (void)
+   out_poly16x8_t = vreinterpretq_p16_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_s64 (void)
+   out_poly16x8_t = vreinterpretq_p16_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_s8 (void)
+   out_poly16x8_t = vreinterpretq_p16_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_u16 (void)
+   out_poly16x8_t = vreinterpretq_p16_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_u32 (void)
+   out_poly16x8_t = vreinterpretq_p16_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_u64 (void)
+   out_poly16x8_t = vreinterpretq_p16_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp16_u8 (void)
+   out_poly16x8_t = vreinterpretq_p16_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_f32 (void)
+   out_poly64x2_t = vreinterpretq_p64_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_p128 (void)
+   out_poly64x2_t = vreinterpretq_p64_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_p16 (void)
+   out_poly64x2_t = vreinterpretq_p64_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_p8 (void)
+   out_poly64x2_t = vreinterpretq_p64_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_s16 (void)
+   out_poly64x2_t = vreinterpretq_p64_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_s32 (void)
+   out_poly64x2_t = vreinterpretq_p64_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_s64 (void)
+   out_poly64x2_t = vreinterpretq_p64_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_s8 (void)
+   out_poly64x2_t = vreinterpretq_p64_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_u16 (void)
+   out_poly64x2_t = vreinterpretq_p64_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_u32 (void)
+   out_poly64x2_t = vreinterpretq_p64_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_u64 (void)
+   out_poly64x2_t = vreinterpretq_p64_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp64_u8 (void)
+   out_poly64x2_t = vreinterpretq_p64_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_f32 (void)
+   out_poly8x16_t = vreinterpretq_p8_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_p128 (void)
+   out_poly8x16_t = vreinterpretq_p8_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_p16 (void)
+   out_poly8x16_t = vreinterpretq_p8_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_p64 (void)
+   out_poly8x16_t = vreinterpretq_p8_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_s16 (void)
+   out_poly8x16_t = vreinterpretq_p8_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_s32 (void)
+   out_poly8x16_t = vreinterpretq_p8_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_s64 (void)
+   out_poly8x16_t = vreinterpretq_p8_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_s8 (void)
+   out_poly8x16_t = vreinterpretq_p8_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_u16 (void)
+   out_poly8x16_t = vreinterpretq_p8_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_u32 (void)
+   out_poly8x16_t = vreinterpretq_p8_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_u64 (void)
+   out_poly8x16_t = vreinterpretq_p8_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQp8_u8 (void)
+   out_poly8x16_t = vreinterpretq_p8_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_f32 (void)
+   out_int16x8_t = vreinterpretq_s16_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_p128 (void)
+   out_int16x8_t = vreinterpretq_s16_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_p16 (void)
+   out_int16x8_t = vreinterpretq_s16_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_p64 (void)
+   out_int16x8_t = vreinterpretq_s16_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_p8 (void)
+   out_int16x8_t = vreinterpretq_s16_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_s32 (void)
+   out_int16x8_t = vreinterpretq_s16_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_s64 (void)
+   out_int16x8_t = vreinterpretq_s16_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_s8 (void)
+   out_int16x8_t = vreinterpretq_s16_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_u16 (void)
+   out_int16x8_t = vreinterpretq_s16_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_u32 (void)
+   out_int16x8_t = vreinterpretq_s16_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_u64 (void)
+   out_int16x8_t = vreinterpretq_s16_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs16_u8 (void)
+   out_int16x8_t = vreinterpretq_s16_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_f32 (void)
+   out_int32x4_t = vreinterpretq_s32_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_p128 (void)
+   out_int32x4_t = vreinterpretq_s32_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_p16 (void)
+   out_int32x4_t = vreinterpretq_s32_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_p64 (void)
+   out_int32x4_t = vreinterpretq_s32_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_p8 (void)
+   out_int32x4_t = vreinterpretq_s32_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_s16 (void)
+   out_int32x4_t = vreinterpretq_s32_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_s64 (void)
+   out_int32x4_t = vreinterpretq_s32_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_s8 (void)
+   out_int32x4_t = vreinterpretq_s32_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_u16 (void)
+   out_int32x4_t = vreinterpretq_s32_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_u32 (void)
+   out_int32x4_t = vreinterpretq_s32_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_u64 (void)
+   out_int32x4_t = vreinterpretq_s32_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs32_u8 (void)
+   out_int32x4_t = vreinterpretq_s32_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_f32 (void)
+   out_int64x2_t = vreinterpretq_s64_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_p128 (void)
+   out_int64x2_t = vreinterpretq_s64_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_p16 (void)
+   out_int64x2_t = vreinterpretq_s64_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_p64 (void)
+   out_int64x2_t = vreinterpretq_s64_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_p8 (void)
+   out_int64x2_t = vreinterpretq_s64_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_s16 (void)
+   out_int64x2_t = vreinterpretq_s64_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_s32 (void)
+   out_int64x2_t = vreinterpretq_s64_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_s8 (void)
+   out_int64x2_t = vreinterpretq_s64_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_u16 (void)
+   out_int64x2_t = vreinterpretq_s64_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_u32 (void)
+   out_int64x2_t = vreinterpretq_s64_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_u64 (void)
+   out_int64x2_t = vreinterpretq_s64_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs64_u8 (void)
+   out_int64x2_t = vreinterpretq_s64_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_f32 (void)
+   out_int8x16_t = vreinterpretq_s8_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_p128 (void)
+   out_int8x16_t = vreinterpretq_s8_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_p16 (void)
+   out_int8x16_t = vreinterpretq_s8_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_p64 (void)
+   out_int8x16_t = vreinterpretq_s8_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_p8 (void)
+   out_int8x16_t = vreinterpretq_s8_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_s16 (void)
+   out_int8x16_t = vreinterpretq_s8_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_s32 (void)
+   out_int8x16_t = vreinterpretq_s8_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_s64 (void)
+   out_int8x16_t = vreinterpretq_s8_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_u16 (void)
+   out_int8x16_t = vreinterpretq_s8_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_u32 (void)
+   out_int8x16_t = vreinterpretq_s8_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_u64 (void)
+   out_int8x16_t = vreinterpretq_s8_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQs8_u8 (void)
+   out_int8x16_t = vreinterpretq_s8_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_f32 (void)
+   out_uint16x8_t = vreinterpretq_u16_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_p128 (void)
+   out_uint16x8_t = vreinterpretq_u16_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_p16 (void)
+   out_uint16x8_t = vreinterpretq_u16_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_p64 (void)
+   out_uint16x8_t = vreinterpretq_u16_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_p8 (void)
+   out_uint16x8_t = vreinterpretq_u16_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_s16 (void)
+   out_uint16x8_t = vreinterpretq_u16_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_s32 (void)
+   out_uint16x8_t = vreinterpretq_u16_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_s64 (void)
+   out_uint16x8_t = vreinterpretq_u16_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_s8 (void)
+   out_uint16x8_t = vreinterpretq_u16_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_u32 (void)
+   out_uint16x8_t = vreinterpretq_u16_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_u64 (void)
+   out_uint16x8_t = vreinterpretq_u16_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu16_u8 (void)
+   out_uint16x8_t = vreinterpretq_u16_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_f32 (void)
+   out_uint32x4_t = vreinterpretq_u32_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_p128 (void)
+   out_uint32x4_t = vreinterpretq_u32_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_p16 (void)
+   out_uint32x4_t = vreinterpretq_u32_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_p64 (void)
+   out_uint32x4_t = vreinterpretq_u32_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_p8 (void)
+   out_uint32x4_t = vreinterpretq_u32_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_s16 (void)
+   out_uint32x4_t = vreinterpretq_u32_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_s32 (void)
+   out_uint32x4_t = vreinterpretq_u32_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_s64 (void)
+   out_uint32x4_t = vreinterpretq_u32_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_s8 (void)
+   out_uint32x4_t = vreinterpretq_u32_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_u16 (void)
+   out_uint32x4_t = vreinterpretq_u32_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_u64 (void)
+   out_uint32x4_t = vreinterpretq_u32_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu32_u8 (void)
+   out_uint32x4_t = vreinterpretq_u32_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_f32 (void)
+   out_uint64x2_t = vreinterpretq_u64_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_p128 (void)
+   out_uint64x2_t = vreinterpretq_u64_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_p16 (void)
+   out_uint64x2_t = vreinterpretq_u64_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_p64 (void)
+   out_uint64x2_t = vreinterpretq_u64_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_p8 (void)
+   out_uint64x2_t = vreinterpretq_u64_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_s16 (void)
+   out_uint64x2_t = vreinterpretq_u64_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_s32 (void)
+   out_uint64x2_t = vreinterpretq_u64_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_s64 (void)
+   out_uint64x2_t = vreinterpretq_u64_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_s8 (void)
+   out_uint64x2_t = vreinterpretq_u64_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_u16 (void)
+   out_uint64x2_t = vreinterpretq_u64_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_u32 (void)
+   out_uint64x2_t = vreinterpretq_u64_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu64_u8 (void)
+   out_uint64x2_t = vreinterpretq_u64_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_f32 (void)
+   out_uint8x16_t = vreinterpretq_u8_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p128.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_p128 (void)
+   out_uint8x16_t = vreinterpretq_u8_p128 (arg0_poly128_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_p16 (void)
+   out_uint8x16_t = vreinterpretq_u8_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_p64 (void)
+   out_uint8x16_t = vreinterpretq_u8_p64 (arg0_poly64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_p8 (void)
+   out_uint8x16_t = vreinterpretq_u8_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_s16 (void)
+   out_uint8x16_t = vreinterpretq_u8_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_s32 (void)
+   out_uint8x16_t = vreinterpretq_u8_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_s64 (void)
+   out_uint8x16_t = vreinterpretq_u8_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_s8 (void)
+   out_uint8x16_t = vreinterpretq_u8_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_u16 (void)
+   out_uint8x16_t = vreinterpretq_u8_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_u32 (void)
+   out_uint8x16_t = vreinterpretq_u8_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretQu8_u64 (void)
+   out_uint8x16_t = vreinterpretq_u8_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_p16 (void)
+   out_float32x2_t = vreinterpret_f32_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_p64 (void)
+   out_float32x2_t = vreinterpret_f32_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_p8 (void)
+   out_float32x2_t = vreinterpret_f32_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_s16 (void)
+   out_float32x2_t = vreinterpret_f32_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_s32 (void)
+   out_float32x2_t = vreinterpret_f32_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_s64 (void)
+   out_float32x2_t = vreinterpret_f32_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_s8 (void)
+   out_float32x2_t = vreinterpret_f32_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_u16 (void)
+   out_float32x2_t = vreinterpret_f32_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_u32 (void)
+   out_float32x2_t = vreinterpret_f32_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_u64 (void)
+   out_float32x2_t = vreinterpret_f32_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretf32_u8 (void)
+   out_float32x2_t = vreinterpret_f32_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_f32 (void)
+   out_poly16x4_t = vreinterpret_p16_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_p64 (void)
+   out_poly16x4_t = vreinterpret_p16_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_p8 (void)
+   out_poly16x4_t = vreinterpret_p16_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_s16 (void)
+   out_poly16x4_t = vreinterpret_p16_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_s32 (void)
+   out_poly16x4_t = vreinterpret_p16_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_s64 (void)
+   out_poly16x4_t = vreinterpret_p16_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_s8 (void)
+   out_poly16x4_t = vreinterpret_p16_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_u16 (void)
+   out_poly16x4_t = vreinterpret_p16_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_u32 (void)
+   out_poly16x4_t = vreinterpret_p16_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_u64 (void)
+   out_poly16x4_t = vreinterpret_p16_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp16_u8 (void)
+   out_poly16x4_t = vreinterpret_p16_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_f32 (void)
+   out_poly64x1_t = vreinterpret_p64_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_p16 (void)
+   out_poly64x1_t = vreinterpret_p64_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_p8 (void)
+   out_poly64x1_t = vreinterpret_p64_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_s16 (void)
+   out_poly64x1_t = vreinterpret_p64_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_s32 (void)
+   out_poly64x1_t = vreinterpret_p64_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_s64 (void)
+   out_poly64x1_t = vreinterpret_p64_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_s8 (void)
+   out_poly64x1_t = vreinterpret_p64_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_u16 (void)
+   out_poly64x1_t = vreinterpret_p64_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_u32 (void)
+   out_poly64x1_t = vreinterpret_p64_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_u64 (void)
+   out_poly64x1_t = vreinterpret_p64_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp64_u8 (void)
+   out_poly64x1_t = vreinterpret_p64_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_f32 (void)
+   out_poly8x8_t = vreinterpret_p8_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_p16 (void)
+   out_poly8x8_t = vreinterpret_p8_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_p64 (void)
+   out_poly8x8_t = vreinterpret_p8_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_s16 (void)
+   out_poly8x8_t = vreinterpret_p8_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_s32 (void)
+   out_poly8x8_t = vreinterpret_p8_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_s64 (void)
+   out_poly8x8_t = vreinterpret_p8_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_s8 (void)
+   out_poly8x8_t = vreinterpret_p8_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_u16 (void)
+   out_poly8x8_t = vreinterpret_p8_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_u32 (void)
+   out_poly8x8_t = vreinterpret_p8_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_u64 (void)
+   out_poly8x8_t = vreinterpret_p8_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretp8_u8 (void)
+   out_poly8x8_t = vreinterpret_p8_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_f32 (void)
+   out_int16x4_t = vreinterpret_s16_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_p16 (void)
+   out_int16x4_t = vreinterpret_s16_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_p64 (void)
+   out_int16x4_t = vreinterpret_s16_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_p8 (void)
+   out_int16x4_t = vreinterpret_s16_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_s32 (void)
+   out_int16x4_t = vreinterpret_s16_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_s64 (void)
+   out_int16x4_t = vreinterpret_s16_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_s8 (void)
+   out_int16x4_t = vreinterpret_s16_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_u16 (void)
+   out_int16x4_t = vreinterpret_s16_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_u32 (void)
+   out_int16x4_t = vreinterpret_s16_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_u64 (void)
+   out_int16x4_t = vreinterpret_s16_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets16_u8 (void)
+   out_int16x4_t = vreinterpret_s16_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_f32 (void)
+   out_int32x2_t = vreinterpret_s32_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_p16 (void)
+   out_int32x2_t = vreinterpret_s32_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_p64 (void)
+   out_int32x2_t = vreinterpret_s32_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_p8 (void)
+   out_int32x2_t = vreinterpret_s32_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_s16 (void)
+   out_int32x2_t = vreinterpret_s32_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_s64 (void)
+   out_int32x2_t = vreinterpret_s32_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_s8 (void)
+   out_int32x2_t = vreinterpret_s32_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_u16 (void)
+   out_int32x2_t = vreinterpret_s32_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_u32 (void)
+   out_int32x2_t = vreinterpret_s32_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_u64 (void)
+   out_int32x2_t = vreinterpret_s32_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets32_u8 (void)
+   out_int32x2_t = vreinterpret_s32_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_f32 (void)
+   out_int64x1_t = vreinterpret_s64_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_p16 (void)
+   out_int64x1_t = vreinterpret_s64_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_p64 (void)
+   out_int64x1_t = vreinterpret_s64_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_p8 (void)
+   out_int64x1_t = vreinterpret_s64_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_s16 (void)
+   out_int64x1_t = vreinterpret_s64_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_s32 (void)
+   out_int64x1_t = vreinterpret_s64_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_s8 (void)
+   out_int64x1_t = vreinterpret_s64_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_u16 (void)
+   out_int64x1_t = vreinterpret_s64_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_u32 (void)
+   out_int64x1_t = vreinterpret_s64_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_u64 (void)
+   out_int64x1_t = vreinterpret_s64_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets64_u8 (void)
+   out_int64x1_t = vreinterpret_s64_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_f32 (void)
+   out_int8x8_t = vreinterpret_s8_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_p16 (void)
+   out_int8x8_t = vreinterpret_s8_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_p64 (void)
+   out_int8x8_t = vreinterpret_s8_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_p8 (void)
+   out_int8x8_t = vreinterpret_s8_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_s16 (void)
+   out_int8x8_t = vreinterpret_s8_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_s32 (void)
+   out_int8x8_t = vreinterpret_s8_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_s64 (void)
+   out_int8x8_t = vreinterpret_s8_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_u16 (void)
+   out_int8x8_t = vreinterpret_s8_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_u32 (void)
+   out_int8x8_t = vreinterpret_s8_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_u64 (void)
+   out_int8x8_t = vreinterpret_s8_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterprets8_u8 (void)
+   out_int8x8_t = vreinterpret_s8_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_f32 (void)
+   out_uint16x4_t = vreinterpret_u16_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_p16 (void)
+   out_uint16x4_t = vreinterpret_u16_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_p64 (void)
+   out_uint16x4_t = vreinterpret_u16_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_p8 (void)
+   out_uint16x4_t = vreinterpret_u16_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_s16 (void)
+   out_uint16x4_t = vreinterpret_u16_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_s32 (void)
+   out_uint16x4_t = vreinterpret_u16_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_s64 (void)
+   out_uint16x4_t = vreinterpret_u16_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_s8 (void)
+   out_uint16x4_t = vreinterpret_u16_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_u32 (void)
+   out_uint16x4_t = vreinterpret_u16_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_u64 (void)
+   out_uint16x4_t = vreinterpret_u16_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu16_u8 (void)
+   out_uint16x4_t = vreinterpret_u16_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_f32 (void)
+   out_uint32x2_t = vreinterpret_u32_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_p16 (void)
+   out_uint32x2_t = vreinterpret_u32_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_p64 (void)
+   out_uint32x2_t = vreinterpret_u32_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_p8 (void)
+   out_uint32x2_t = vreinterpret_u32_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_s16 (void)
+   out_uint32x2_t = vreinterpret_u32_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_s32 (void)
+   out_uint32x2_t = vreinterpret_u32_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_s64 (void)
+   out_uint32x2_t = vreinterpret_u32_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_s8 (void)
+   out_uint32x2_t = vreinterpret_u32_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_u16 (void)
+   out_uint32x2_t = vreinterpret_u32_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_u64 (void)
+   out_uint32x2_t = vreinterpret_u32_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu32_u8 (void)
+   out_uint32x2_t = vreinterpret_u32_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_f32 (void)
+   out_uint64x1_t = vreinterpret_u64_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_p16 (void)
+   out_uint64x1_t = vreinterpret_u64_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_p64 (void)
+   out_uint64x1_t = vreinterpret_u64_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_p8 (void)
+   out_uint64x1_t = vreinterpret_u64_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_s16 (void)
+   out_uint64x1_t = vreinterpret_u64_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_s32 (void)
+   out_uint64x1_t = vreinterpret_u64_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_s64 (void)
+   out_uint64x1_t = vreinterpret_u64_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_s8 (void)
+   out_uint64x1_t = vreinterpret_u64_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_u16 (void)
+   out_uint64x1_t = vreinterpret_u64_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_u32 (void)
+   out_uint64x1_t = vreinterpret_u64_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu64_u8 (void)
+   out_uint64x1_t = vreinterpret_u64_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_f32 (void)
+   out_uint8x8_t = vreinterpret_u8_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_p16 (void)
+   out_uint8x8_t = vreinterpret_u8_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_p64 (void)
+   out_uint8x8_t = vreinterpret_u8_p64 (arg0_poly64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_p8 (void)
+   out_uint8x8_t = vreinterpret_u8_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_s16 (void)
+   out_uint8x8_t = vreinterpret_u8_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_s32 (void)
+   out_uint8x8_t = vreinterpret_u8_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_s64 (void)
+   out_uint8x8_t = vreinterpret_u8_s64 (arg0_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_s8 (void)
+   out_uint8x8_t = vreinterpret_u8_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_u16 (void)
+   out_uint8x8_t = vreinterpret_u8_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_u32 (void)
+   out_uint8x8_t = vreinterpret_u8_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
+@@ -16,4 +16,3 @@ void test_vreinterpretu8_u64 (void)
+   out_uint8x8_t = vreinterpret_u8_u64 (arg0_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
+@@ -17,4 +17,3 @@ void test_vrev16Qp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
+@@ -17,4 +17,3 @@ void test_vrev16Qs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
+@@ -17,4 +17,3 @@ void test_vrev16Qu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
+@@ -17,4 +17,3 @@ void test_vrev16p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
+@@ -17,4 +17,3 @@ void test_vrev16s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
+@@ -17,4 +17,3 @@ void test_vrev16u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
+@@ -17,4 +17,3 @@ void test_vrev32Qp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
+@@ -17,4 +17,3 @@ void test_vrev32Qp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
+@@ -17,4 +17,3 @@ void test_vrev32Qs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
+@@ -17,4 +17,3 @@ void test_vrev32Qs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
+@@ -17,4 +17,3 @@ void test_vrev32Qu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
+@@ -17,4 +17,3 @@ void test_vrev32Qu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
+@@ -17,4 +17,3 @@ void test_vrev32p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
+@@ -17,4 +17,3 @@ void test_vrev32p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
+@@ -17,4 +17,3 @@ void test_vrev32s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
+@@ -17,4 +17,3 @@ void test_vrev32s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
+@@ -17,4 +17,3 @@ void test_vrev32u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
+@@ -17,4 +17,3 @@ void test_vrev32u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
+@@ -17,4 +17,3 @@ void test_vrev64Qf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
+@@ -17,4 +17,3 @@ void test_vrev64Qp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
+@@ -17,4 +17,3 @@ void test_vrev64Qp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
+@@ -17,4 +17,3 @@ void test_vrev64Qs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
+@@ -17,4 +17,3 @@ void test_vrev64Qs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
+@@ -17,4 +17,3 @@ void test_vrev64Qs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
+@@ -17,4 +17,3 @@ void test_vrev64Qu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
+@@ -17,4 +17,3 @@ void test_vrev64Qu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
+@@ -17,4 +17,3 @@ void test_vrev64Qu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
+@@ -17,4 +17,3 @@ void test_vrev64f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
+@@ -17,4 +17,3 @@ void test_vrev64p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
+@@ -17,4 +17,3 @@ void test_vrev64p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
+@@ -17,4 +17,3 @@ void test_vrev64s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
+@@ -17,4 +17,3 @@ void test_vrev64s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
+@@ -17,4 +17,3 @@ void test_vrev64s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
+@@ -17,4 +17,3 @@ void test_vrev64u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
+@@ -17,4 +17,3 @@ void test_vrev64u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
+@@ -17,4 +17,3 @@ void test_vrev64u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndaf32.c
+@@ -17,4 +17,3 @@ void test_vrndaf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrinta\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndaqf32.c
+@@ -17,4 +17,3 @@ void test_vrndaqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrinta\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndf32.c
+@@ -17,4 +17,3 @@ void test_vrndf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintz\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndmf32.c
+@@ -17,4 +17,3 @@ void test_vrndmf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintm\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndmqf32.c
+@@ -17,4 +17,3 @@ void test_vrndmqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintm\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndnf32.c
+@@ -17,4 +17,3 @@ void test_vrndnf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintn\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndnqf32.c
+@@ -17,4 +17,3 @@ void test_vrndnqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintn\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndpf32.c
+@@ -17,4 +17,3 @@ void test_vrndpf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintp\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndpqf32.c
+@@ -17,4 +17,3 @@ void test_vrndpqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintp\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrndqf32.c
+@@ -17,4 +17,3 @@ void test_vrndqf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintz\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
+@@ -17,4 +17,3 @@ void test_vrsqrteQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
+@@ -17,4 +17,3 @@ void test_vrsqrteQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
+@@ -17,4 +17,3 @@ void test_vrsqrtef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
+@@ -17,4 +17,3 @@ void test_vrsqrteu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
+@@ -18,4 +18,3 @@ void test_vrsqrtsQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
+@@ -18,4 +18,3 @@ void test_vrsqrtsf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
+@@ -18,4 +18,3 @@ void test_vsetQ_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
+@@ -18,4 +18,3 @@ void test_vsetQ_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
+@@ -18,4 +18,3 @@ void test_vsetQ_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
+@@ -18,4 +18,3 @@ void test_vsetQ_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
+@@ -18,4 +18,3 @@ void test_vsetQ_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
+@@ -18,4 +18,3 @@ void test_vset_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
+@@ -18,4 +18,3 @@ void test_vset_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
+@@ -18,4 +18,3 @@ void test_vset_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
+@@ -18,4 +18,3 @@ void test_vset_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
+@@ -18,4 +18,3 @@ void test_vset_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
+@@ -17,4 +17,3 @@ void test_vset_lanes64 (void)
+   out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
+@@ -18,4 +18,3 @@ void test_vset_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
+@@ -18,4 +18,3 @@ void test_vset_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
+@@ -18,4 +18,3 @@ void test_vset_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
+@@ -17,4 +17,3 @@ void test_vset_laneu64 (void)
+   out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
+@@ -18,4 +18,3 @@ void test_vset_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vshlQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vshlQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
+@@ -17,4 +17,3 @@ void test_vshlQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vshlQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vshlQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vshlQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
+@@ -17,4 +17,3 @@ void test_vshlQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vshlQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
+@@ -18,4 +18,3 @@ void test_vshlQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
+@@ -18,4 +18,3 @@ void test_vshlQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
+@@ -18,4 +18,3 @@ void test_vshlQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
+@@ -18,4 +18,3 @@ void test_vshlQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
+@@ -18,4 +18,3 @@ void test_vshlQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
+@@ -18,4 +18,3 @@ void test_vshlQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
+@@ -18,4 +18,3 @@ void test_vshlQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
+@@ -18,4 +18,3 @@ void test_vshlQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
+@@ -17,4 +17,3 @@ void test_vshl_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
+@@ -17,4 +17,3 @@ void test_vshl_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
+@@ -17,4 +17,3 @@ void test_vshl_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
+@@ -17,4 +17,3 @@ void test_vshl_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
+@@ -17,4 +17,3 @@ void test_vshl_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
+@@ -17,4 +17,3 @@ void test_vshl_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
+@@ -17,4 +17,3 @@ void test_vshl_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
+@@ -17,4 +17,3 @@ void test_vshl_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
+@@ -17,4 +17,3 @@ void test_vshll_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
+@@ -17,4 +17,3 @@ void test_vshll_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
+@@ -17,4 +17,3 @@ void test_vshll_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
+@@ -17,4 +17,3 @@ void test_vshll_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
+@@ -17,4 +17,3 @@ void test_vshll_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
+@@ -17,4 +17,3 @@ void test_vshll_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshls16.c
+@@ -18,4 +18,3 @@ void test_vshls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshls32.c
+@@ -18,4 +18,3 @@ void test_vshls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshls64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshls64.c
+@@ -18,4 +18,3 @@ void test_vshls64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshls8.c
+@@ -18,4 +18,3 @@ void test_vshls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
+@@ -18,4 +18,3 @@ void test_vshlu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
+@@ -18,4 +18,3 @@ void test_vshlu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
+@@ -18,4 +18,3 @@ void test_vshlu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
+@@ -18,4 +18,3 @@ void test_vshlu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
+@@ -17,4 +17,3 @@ void test_vshrQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
+@@ -17,4 +17,3 @@ void test_vshrQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
+@@ -17,4 +17,3 @@ void test_vshrQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
+@@ -17,4 +17,3 @@ void test_vshrQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
+@@ -17,4 +17,3 @@ void test_vshrQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
+@@ -17,4 +17,3 @@ void test_vshrQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
+@@ -17,4 +17,3 @@ void test_vshrQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
+@@ -17,4 +17,3 @@ void test_vshrQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
+@@ -17,4 +17,3 @@ void test_vshr_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
+@@ -17,4 +17,3 @@ void test_vshr_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
+@@ -17,4 +17,3 @@ void test_vshr_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
+@@ -17,4 +17,3 @@ void test_vshr_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
+@@ -17,4 +17,3 @@ void test_vshr_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
+@@ -17,4 +17,3 @@ void test_vshr_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
+@@ -17,4 +17,3 @@ void test_vshr_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
+@@ -17,4 +17,3 @@ void test_vshr_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
+@@ -17,4 +17,3 @@ void test_vshrn_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
+@@ -17,4 +17,3 @@ void test_vshrn_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
+@@ -17,4 +17,3 @@ void test_vshrn_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
+@@ -17,4 +17,3 @@ void test_vshrn_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
+@@ -17,4 +17,3 @@ void test_vshrn_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
+@@ -17,4 +17,3 @@ void test_vshrn_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
+@@ -18,4 +18,3 @@ void test_vsliQ_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np64.c
+@@ -18,4 +18,3 @@ void test_vsliQ_np64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
+@@ -18,4 +18,3 @@ void test_vsliQ_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vsliQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vsliQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
+@@ -18,4 +18,3 @@ void test_vsliQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
+@@ -18,4 +18,3 @@ void test_vsliQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
+@@ -18,4 +18,3 @@ void test_vsliQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
+@@ -18,4 +18,3 @@ void test_vsliQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
+@@ -18,4 +18,3 @@ void test_vsliQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
+@@ -18,4 +18,3 @@ void test_vsliQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
+@@ -18,4 +18,3 @@ void test_vsli_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_np64.c
+@@ -18,4 +18,3 @@ void test_vsli_np64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
+@@ -18,4 +18,3 @@ void test_vsli_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
+@@ -18,4 +18,3 @@ void test_vsli_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
+@@ -18,4 +18,3 @@ void test_vsli_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
+@@ -18,4 +18,3 @@ void test_vsli_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
+@@ -18,4 +18,3 @@ void test_vsli_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
+@@ -18,4 +18,3 @@ void test_vsli_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
+@@ -18,4 +18,3 @@ void test_vsli_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
+@@ -18,4 +18,3 @@ void test_vsli_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
+@@ -18,4 +18,3 @@ void test_vsli_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vsraQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vsraQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
+@@ -18,4 +18,3 @@ void test_vsraQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
+@@ -18,4 +18,3 @@ void test_vsraQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
+@@ -18,4 +18,3 @@ void test_vsraQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
+@@ -18,4 +18,3 @@ void test_vsraQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
+@@ -18,4 +18,3 @@ void test_vsraQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
+@@ -18,4 +18,3 @@ void test_vsraQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
+@@ -18,4 +18,3 @@ void test_vsra_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
+@@ -18,4 +18,3 @@ void test_vsra_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
+@@ -18,4 +18,3 @@ void test_vsra_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
+@@ -18,4 +18,3 @@ void test_vsra_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
+@@ -18,4 +18,3 @@ void test_vsra_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
+@@ -18,4 +18,3 @@ void test_vsra_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
+@@ -18,4 +18,3 @@ void test_vsra_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
+@@ -18,4 +18,3 @@ void test_vsra_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
+@@ -18,4 +18,3 @@ void test_vsriQ_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np64.c
+@@ -18,4 +18,3 @@ void test_vsriQ_np64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
+@@ -18,4 +18,3 @@ void test_vsriQ_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
+@@ -18,4 +18,3 @@ void test_vsriQ_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
+@@ -18,4 +18,3 @@ void test_vsriQ_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
+@@ -18,4 +18,3 @@ void test_vsriQ_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
+@@ -18,4 +18,3 @@ void test_vsriQ_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
+@@ -18,4 +18,3 @@ void test_vsriQ_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
+@@ -18,4 +18,3 @@ void test_vsriQ_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
+@@ -18,4 +18,3 @@ void test_vsriQ_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
+@@ -18,4 +18,3 @@ void test_vsriQ_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
+@@ -18,4 +18,3 @@ void test_vsri_np16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_np64.c
+@@ -18,4 +18,3 @@ void test_vsri_np64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
+@@ -18,4 +18,3 @@ void test_vsri_np8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
+@@ -18,4 +18,3 @@ void test_vsri_ns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
+@@ -18,4 +18,3 @@ void test_vsri_ns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
+@@ -18,4 +18,3 @@ void test_vsri_ns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
+@@ -18,4 +18,3 @@ void test_vsri_ns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
+@@ -18,4 +18,3 @@ void test_vsri_nu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
+@@ -18,4 +18,3 @@ void test_vsri_nu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
+@@ -18,4 +18,3 @@ void test_vsri_nu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
+@@ -18,4 +18,3 @@ void test_vsri_nu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep64.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanep64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+@@ -17,4 +17,3 @@ void test_vst1Q_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst1Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst1Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+@@ -17,4 +17,3 @@ void test_vst1Q_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+@@ -17,4 +17,3 @@ void test_vst1Q_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+@@ -17,4 +17,3 @@ void test_vst1Qf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+@@ -17,4 +17,3 @@ void test_vst1Qp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp64.c
+@@ -17,4 +17,3 @@ void test_vst1Qp64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+@@ -17,4 +17,3 @@ void test_vst1Qp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+@@ -17,4 +17,3 @@ void test_vst1Qs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+@@ -17,4 +17,3 @@ void test_vst1Qs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+@@ -17,4 +17,3 @@ void test_vst1Qs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+@@ -17,4 +17,3 @@ void test_vst1Qs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+@@ -17,4 +17,3 @@ void test_vst1Qu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+@@ -17,4 +17,3 @@ void test_vst1Qu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+@@ -17,4 +17,3 @@ void test_vst1Qu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+@@ -17,4 +17,3 @@ void test_vst1Qu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst1_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst1_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep64.c
+@@ -17,4 +17,3 @@ void test_vst1_lanep64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+@@ -17,4 +17,3 @@ void test_vst1_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst1_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst1_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+@@ -17,4 +17,3 @@ void test_vst1_lanes64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+@@ -17,4 +17,3 @@ void test_vst1_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst1_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst1_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+@@ -17,4 +17,3 @@ void test_vst1_laneu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+@@ -17,4 +17,3 @@ void test_vst1_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+@@ -17,4 +17,3 @@ void test_vst1f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+@@ -17,4 +17,3 @@ void test_vst1p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p64.c
+@@ -17,4 +17,3 @@ void test_vst1p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+@@ -17,4 +17,3 @@ void test_vst1p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+@@ -17,4 +17,3 @@ void test_vst1s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+@@ -17,4 +17,3 @@ void test_vst1s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+@@ -17,4 +17,3 @@ void test_vst1s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+@@ -17,4 +17,3 @@ void test_vst1s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+@@ -17,4 +17,3 @@ void test_vst1u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+@@ -17,4 +17,3 @@ void test_vst1u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+@@ -17,4 +17,3 @@ void test_vst1u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+@@ -17,4 +17,3 @@ void test_vst1u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst2Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst2Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst2Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst2Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst2Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst2Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+@@ -18,4 +18,3 @@ void test_vst2Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+@@ -18,4 +18,3 @@ void test_vst2Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+@@ -18,4 +18,3 @@ void test_vst2Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+@@ -18,4 +18,3 @@ void test_vst2Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+@@ -18,4 +18,3 @@ void test_vst2Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+@@ -18,4 +18,3 @@ void test_vst2Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+@@ -18,4 +18,3 @@ void test_vst2Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+@@ -18,4 +18,3 @@ void test_vst2Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+@@ -18,4 +18,3 @@ void test_vst2Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst2_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst2_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+@@ -17,4 +17,3 @@ void test_vst2_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst2_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst2_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+@@ -17,4 +17,3 @@ void test_vst2_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst2_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst2_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+@@ -17,4 +17,3 @@ void test_vst2_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+@@ -17,4 +17,3 @@ void test_vst2f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+@@ -17,4 +17,3 @@ void test_vst2p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p64.c
+@@ -17,4 +17,3 @@ void test_vst2p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+@@ -17,4 +17,3 @@ void test_vst2p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+@@ -17,4 +17,3 @@ void test_vst2s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+@@ -17,4 +17,3 @@ void test_vst2s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+@@ -17,4 +17,3 @@ void test_vst2s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+@@ -17,4 +17,3 @@ void test_vst2s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+@@ -17,4 +17,3 @@ void test_vst2u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+@@ -17,4 +17,3 @@ void test_vst2u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+@@ -17,4 +17,3 @@ void test_vst2u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+@@ -17,4 +17,3 @@ void test_vst2u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst3Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst3Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst3Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst3Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst3Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst3Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+@@ -18,4 +18,3 @@ void test_vst3Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+@@ -18,4 +18,3 @@ void test_vst3Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+@@ -18,4 +18,3 @@ void test_vst3Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+@@ -18,4 +18,3 @@ void test_vst3Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+@@ -18,4 +18,3 @@ void test_vst3Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+@@ -18,4 +18,3 @@ void test_vst3Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+@@ -18,4 +18,3 @@ void test_vst3Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+@@ -18,4 +18,3 @@ void test_vst3Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+@@ -18,4 +18,3 @@ void test_vst3Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst3_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst3_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+@@ -17,4 +17,3 @@ void test_vst3_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst3_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst3_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+@@ -17,4 +17,3 @@ void test_vst3_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst3_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst3_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+@@ -17,4 +17,3 @@ void test_vst3_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+@@ -17,4 +17,3 @@ void test_vst3f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+@@ -17,4 +17,3 @@ void test_vst3p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p64.c
+@@ -17,4 +17,3 @@ void test_vst3p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+@@ -17,4 +17,3 @@ void test_vst3p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+@@ -17,4 +17,3 @@ void test_vst3s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+@@ -17,4 +17,3 @@ void test_vst3s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+@@ -17,4 +17,3 @@ void test_vst3s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+@@ -17,4 +17,3 @@ void test_vst3s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+@@ -17,4 +17,3 @@ void test_vst3u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+@@ -17,4 +17,3 @@ void test_vst3u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+@@ -17,4 +17,3 @@ void test_vst3u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+@@ -17,4 +17,3 @@ void test_vst3u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst4Q_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst4Q_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst4Q_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst4Q_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst4Q_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst4Q_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+@@ -18,4 +18,3 @@ void test_vst4Qf32 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+@@ -18,4 +18,3 @@ void test_vst4Qp16 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+@@ -18,4 +18,3 @@ void test_vst4Qp8 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+@@ -18,4 +18,3 @@ void test_vst4Qs16 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+@@ -18,4 +18,3 @@ void test_vst4Qs32 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+@@ -18,4 +18,3 @@ void test_vst4Qs8 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+@@ -18,4 +18,3 @@ void test_vst4Qu16 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+@@ -18,4 +18,3 @@ void test_vst4Qu32 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+@@ -18,4 +18,3 @@ void test_vst4Qu8 (void)
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+@@ -17,4 +17,3 @@ void test_vst4_lanef32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+@@ -17,4 +17,3 @@ void test_vst4_lanep16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+@@ -17,4 +17,3 @@ void test_vst4_lanep8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+@@ -17,4 +17,3 @@ void test_vst4_lanes16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+@@ -17,4 +17,3 @@ void test_vst4_lanes32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+@@ -17,4 +17,3 @@ void test_vst4_lanes8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+@@ -17,4 +17,3 @@ void test_vst4_laneu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+@@ -17,4 +17,3 @@ void test_vst4_laneu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+@@ -17,4 +17,3 @@ void test_vst4_laneu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+@@ -17,4 +17,3 @@ void test_vst4f32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+@@ -17,4 +17,3 @@ void test_vst4p16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p64.c
+@@ -17,4 +17,3 @@ void test_vst4p64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+@@ -17,4 +17,3 @@ void test_vst4p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+@@ -17,4 +17,3 @@ void test_vst4s16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+@@ -17,4 +17,3 @@ void test_vst4s32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+@@ -17,4 +17,3 @@ void test_vst4s64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+@@ -17,4 +17,3 @@ void test_vst4s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+@@ -17,4 +17,3 @@ void test_vst4u16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+@@ -17,4 +17,3 @@ void test_vst4u32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+@@ -17,4 +17,3 @@ void test_vst4u64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+@@ -17,4 +17,3 @@ void test_vst4u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
+@@ -18,4 +18,3 @@ void test_vsubQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
+@@ -18,4 +18,3 @@ void test_vsubQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
+@@ -18,4 +18,3 @@ void test_vsubQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
+@@ -18,4 +18,3 @@ void test_vsubQs64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
+@@ -18,4 +18,3 @@ void test_vsubQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
+@@ -18,4 +18,3 @@ void test_vsubQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
+@@ -18,4 +18,3 @@ void test_vsubQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
+@@ -18,4 +18,3 @@ void test_vsubQu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
+@@ -18,4 +18,3 @@ void test_vsubQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
+@@ -18,4 +18,3 @@ void test_vsubf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
+@@ -18,4 +18,3 @@ void test_vsubhns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
+@@ -18,4 +18,3 @@ void test_vsubhns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
+@@ -18,4 +18,3 @@ void test_vsubhns64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
+@@ -18,4 +18,3 @@ void test_vsubhnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
+@@ -18,4 +18,3 @@ void test_vsubhnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
+@@ -18,4 +18,3 @@ void test_vsubhnu64 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
+@@ -18,4 +18,3 @@ void test_vsubls16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
+@@ -18,4 +18,3 @@ void test_vsubls32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
+@@ -18,4 +18,3 @@ void test_vsubls8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
+@@ -18,4 +18,3 @@ void test_vsublu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
+@@ -18,4 +18,3 @@ void test_vsublu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
+@@ -18,4 +18,3 @@ void test_vsublu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
+@@ -18,4 +18,3 @@ void test_vsubs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
+@@ -18,4 +18,3 @@ void test_vsubs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
+@@ -17,4 +17,3 @@ void test_vsubs64 (void)
+   out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
+@@ -18,4 +18,3 @@ void test_vsubs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
+@@ -18,4 +18,3 @@ void test_vsubu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
+@@ -18,4 +18,3 @@ void test_vsubu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
+@@ -17,4 +17,3 @@ void test_vsubu64 (void)
+   out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
+@@ -18,4 +18,3 @@ void test_vsubu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
+@@ -18,4 +18,3 @@ void test_vsubws16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
+@@ -18,4 +18,3 @@ void test_vsubws32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
+@@ -18,4 +18,3 @@ void test_vsubws8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
+@@ -18,4 +18,3 @@ void test_vsubwu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
+@@ -18,4 +18,3 @@ void test_vsubwu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
+@@ -18,4 +18,3 @@ void test_vsubwu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vsubw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
+@@ -18,4 +18,3 @@ void test_vtbl1p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
+@@ -18,4 +18,3 @@ void test_vtbl1s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
+@@ -18,4 +18,3 @@ void test_vtbl1u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
+@@ -18,4 +18,3 @@ void test_vtbl2p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
+@@ -18,4 +18,3 @@ void test_vtbl2s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
+@@ -18,4 +18,3 @@ void test_vtbl2u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
+@@ -18,4 +18,3 @@ void test_vtbl3p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
+@@ -18,4 +18,3 @@ void test_vtbl3s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
+@@ -18,4 +18,3 @@ void test_vtbl3u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
+@@ -18,4 +18,3 @@ void test_vtbl4p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
+@@ -18,4 +18,3 @@ void test_vtbl4s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
+@@ -18,4 +18,3 @@ void test_vtbl4u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
+@@ -19,4 +19,3 @@ void test_vtbx1p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
+@@ -19,4 +19,3 @@ void test_vtbx1s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
+@@ -19,4 +19,3 @@ void test_vtbx1u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
+@@ -19,4 +19,3 @@ void test_vtbx2p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
+@@ -19,4 +19,3 @@ void test_vtbx2s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
+@@ -19,4 +19,3 @@ void test_vtbx2u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
+@@ -19,4 +19,3 @@ void test_vtbx3p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
+@@ -19,4 +19,3 @@ void test_vtbx3s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
+@@ -19,4 +19,3 @@ void test_vtbx3u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
+@@ -19,4 +19,3 @@ void test_vtbx4p8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
+@@ -19,4 +19,3 @@ void test_vtbx4s8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
+@@ -19,4 +19,3 @@ void test_vtbx4u8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
+@@ -18,4 +18,3 @@ void test_vtrnQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
+@@ -18,4 +18,3 @@ void test_vtrnQp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
+@@ -18,4 +18,3 @@ void test_vtrnQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
+@@ -18,4 +18,3 @@ void test_vtrnQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
+@@ -18,4 +18,3 @@ void test_vtrnQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
+@@ -18,4 +18,3 @@ void test_vtrnQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
+@@ -18,4 +18,3 @@ void test_vtrnQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
+@@ -18,4 +18,3 @@ void test_vtrnQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
+@@ -18,4 +18,3 @@ void test_vtrnQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
+@@ -18,4 +18,3 @@ void test_vtrnf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
+@@ -18,4 +18,3 @@ void test_vtrnp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
+@@ -18,4 +18,3 @@ void test_vtrnp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
+@@ -18,4 +18,3 @@ void test_vtrns16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
+@@ -18,4 +18,3 @@ void test_vtrns32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
+@@ -18,4 +18,3 @@ void test_vtrns8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
+@@ -18,4 +18,3 @@ void test_vtrnu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
+@@ -18,4 +18,3 @@ void test_vtrnu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
+@@ -18,4 +18,3 @@ void test_vtrnu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
+@@ -18,4 +18,3 @@ void test_vtstQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
+@@ -18,4 +18,3 @@ void test_vtstQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
+@@ -18,4 +18,3 @@ void test_vtstQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
+@@ -18,4 +18,3 @@ void test_vtstQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
+@@ -18,4 +18,3 @@ void test_vtstQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
+@@ -18,4 +18,3 @@ void test_vtstQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
+@@ -18,4 +18,3 @@ void test_vtstQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
+@@ -18,4 +18,3 @@ void test_vtstp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
+@@ -18,4 +18,3 @@ void test_vtsts16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
+@@ -18,4 +18,3 @@ void test_vtsts32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
+@@ -18,4 +18,3 @@ void test_vtsts8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
+@@ -18,4 +18,3 @@ void test_vtstu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
+@@ -18,4 +18,3 @@ void test_vtstu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
+@@ -18,4 +18,3 @@ void test_vtstu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
+@@ -18,4 +18,3 @@ void test_vuzpQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
+@@ -18,4 +18,3 @@ void test_vuzpQp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
+@@ -18,4 +18,3 @@ void test_vuzpQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
+@@ -18,4 +18,3 @@ void test_vuzpQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
+@@ -18,4 +18,3 @@ void test_vuzpQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
+@@ -18,4 +18,3 @@ void test_vuzpQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
+@@ -18,4 +18,3 @@ void test_vuzpQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
+@@ -18,4 +18,3 @@ void test_vuzpQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
+@@ -18,4 +18,3 @@ void test_vuzpQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
+@@ -18,4 +18,3 @@ void test_vuzpf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
+@@ -18,4 +18,3 @@ void test_vuzpp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
+@@ -18,4 +18,3 @@ void test_vuzpp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
+@@ -18,4 +18,3 @@ void test_vuzps16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
+@@ -18,4 +18,3 @@ void test_vuzps32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
+@@ -18,4 +18,3 @@ void test_vuzps8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
+@@ -18,4 +18,3 @@ void test_vuzpu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
+@@ -18,4 +18,3 @@ void test_vuzpu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
+@@ -18,4 +18,3 @@ void test_vuzpu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
+@@ -18,4 +18,3 @@ void test_vzipQf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
+@@ -18,4 +18,3 @@ void test_vzipQp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
+@@ -18,4 +18,3 @@ void test_vzipQp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
+@@ -18,4 +18,3 @@ void test_vzipQs16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
+@@ -18,4 +18,3 @@ void test_vzipQs32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
+@@ -18,4 +18,3 @@ void test_vzipQs8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
+@@ -18,4 +18,3 @@ void test_vzipQu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
+@@ -18,4 +18,3 @@ void test_vzipQu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
+@@ -18,4 +18,3 @@ void test_vzipQu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
+@@ -18,4 +18,3 @@ void test_vzipf32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
+@@ -18,4 +18,3 @@ void test_vzipp16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
+@@ -18,4 +18,3 @@ void test_vzipp8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzips16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzips16.c
+@@ -18,4 +18,3 @@ void test_vzips16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzips32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzips32.c
+@@ -18,4 +18,3 @@ void test_vzips32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzips8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzips8.c
+@@ -18,4 +18,3 @@ void test_vzips8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
+@@ -18,4 +18,3 @@ void test_vzipu16 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
+@@ -18,4 +18,3 @@ void test_vzipu32 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
++++ b/src/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
+@@ -18,4 +18,3 @@ void test_vzipu8 (void)
+ }
+ 
+ /* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr26702.c
+@@ -0,0 +1,4 @@
++/* { dg-do compile { target arm*-*-eabi* } } */
++/* { dg-final { scan-assembler "\\.size\[\\t \]+static_foo, 4" } } */
++int foo;
++static int static_foo;
+--- a/src/gcc/testsuite/gcc.target/arm/pr42172-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr42172-1.c
+@@ -16,4 +16,4 @@ void init_A (struct A *this)
+   this->f4 = 0;
+ }
+ 
+-/* { dg-final { scan-assembler-times "ldr" 1 } } */
++/* { dg-final { scan-assembler-times "str" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr43404.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target naked_functions } */
++/* { dg-options "-O0" } */
++
++__attribute__ ((naked))
++void __data_abort(void)
++{
++  long foo; /* { dg-error "cannot allocate stack for variable" } */
++  long* bar = &foo;
++}
+--- a/src/gcc/testsuite/gcc.target/arm/pr43597.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr43597.c
+@@ -25,4 +25,3 @@ foo4 ()
+ /* { dg-final { scan-assembler-times "sub" 1 } } */
+ /* { dg-final { scan-assembler-times "cmp" 0 } } */
+ /* { dg-final { object-size text <= 30 } } */
+-/* { dg-final { cleanup-saved-temps "pr43597" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/pr45701-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr45701-1.c
+@@ -2,7 +2,7 @@
+ /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
+ /* { dg-options "-mthumb -Os" }  */
+ /* { dg-final { scan-assembler "push\t\{r3" } } */
+-/* { dg-final { scan-assembler-not "r8" } } */
++/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
+ 
+ extern int hist_verify;
+ extern int a1;
+--- a/src/gcc/testsuite/gcc.target/arm/pr45701-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr45701-2.c
+@@ -2,7 +2,7 @@
+ /* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
+ /* { dg-options "-mthumb -Os" }  */
+ /* { dg-final { scan-assembler "push\t\{r3" } } */
+-/* { dg-final { scan-assembler-not "r8" } } */
++/* { dg-final { scan-assembler-not "\[^\-\]r8" } } */
+ 
+ extern int hist_verify;
+ extern int a1;
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr48470.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target naked_functions } */
++/* { dg-options "-O0" } */
++
++extern void g(int *x);
++
++void __attribute__((naked)) f(void)
++{
++    int x = 0; /* { dg-error "cannot allocate stack for variable" } */
++    g(&x);
++}
+--- a/src/gcc/testsuite/gcc.target/arm/pr58784.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr58784.c
+@@ -1,6 +1,8 @@
+ /* { dg-do compile } */
+ /* { dg-skip-if "incompatible options" { arm_thumb1 } { "*" } { "" } } */
+ /* { dg-options "-march=armv7-a -mfloat-abi=hard -mfpu=neon -marm -O2" } */
++/* { dg-skip-if "need hardfp ABI" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
++
+ 
+ typedef struct __attribute__ ((__packed__))
+ {
+--- a/src/gcc/testsuite/gcc.target/arm/pr59985.C
++++ b/src/gcc/testsuite/gcc.target/arm/pr59985.C
+@@ -1,6 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-skip-if "incompatible options" { arm_thumb1 } { "*" } { "" } } */
+ /* { dg-options "-g -fcompare-debug -O2 -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard" } */
++/* { dg-skip-if "need hardfp abi" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+ 
+ extern void *f1 (unsigned long, unsigned long);
+ extern const struct line_map *f2 (void *, int, unsigned int, const char *, unsigned int);
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr62554.c
+@@ -0,0 +1,51 @@
++/* Check that pre ARMv4 compilation still works.  */
++/* { dg-do compile } */
++/* { dg-options "-marm -march=armv3 -O" } */
++/* { dg-require-effective-target arm_arm_ok } */
++
++typedef struct
++{
++  char bits;
++  short val;
++} code;
++
++union uu
++{
++  short us;
++  char b[2];
++};
++
++int a, b, c, f, g, h;
++code *d;
++
++code e;
++
++int
++fn1 (void)
++{
++  char i;
++  do
++    if (e.bits)
++      {
++      dodist:
++        f = c;
++        if (e.bits & 6)
++          {
++            ++i;
++            if (g)
++              do
++                {
++                  union uu j;
++                  j.b[1] = a;
++                  h = j.us;
++                }
++              while (fn1);
++          }
++        else
++          {
++            e = d[b];
++            goto dodist;
++          }
++      }
++  while (i);
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr64208.c
+@@ -0,0 +1,25 @@
++/* { dg-do compile } */
++/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
++/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
++/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
++/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
++/* { dg-require-effective-target arm32 } */
++/* { dg-require-effective-target arm_iwmmxt_ok } */
++/* { dg-options "-O1 -mcpu=iwmmxt" } */
++
++long long x6(void);
++void x7(long long, long long);
++void x8(long long);
++
++int x0;
++long long *x1;
++
++void x2(void) {
++  long long *x3 = x1;
++  while (x1) {
++    long long x4 = x0, x5 = x6();
++    x7(x4, x5);
++    x8(x5);
++    *x3 = 0;
++  }
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr64616.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-cprop2" } */
++
++int f (int);
++unsigned int glob;
++
++void
++g ()
++{
++  while (f (glob));
++  glob = 5;
++}
++
++/* { dg-final { scan-rtl-dump "GLOBAL COPY-PROP" "cprop2" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr64744-1.c
+@@ -0,0 +1,40 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target naked_functions } */
++/* { dg-options "-O0" } */
++
++__attribute__((naked))
++void foo1 ()
++{
++  int aa = 0;
++  int ab = {0};
++}
++
++__attribute__((naked))
++void foo2() {
++  char aa [ ] = {}; /* { dg-error "cannot allocate stack for variable" } */
++  char ab [1] = {};
++  char ac [2] = {}; /* { dg-error "cannot allocate stack for variable" } */
++  char ad [3] = {}; /* { dg-error "cannot allocate stack for variable" } */
++}
++
++__attribute__((naked))
++void foo3() {
++  char aa [1] = {0};
++  char ab [2] = {0}; /* { dg-error "cannot allocate stack for variable" } */
++  char ac [3] = {0}; /* { dg-error "cannot allocate stack for variable" } */
++  char ad [4] = {0}; /* { dg-error "cannot allocate stack for variable" } */
++}
++
++__attribute__((naked))
++void foo4() {
++  char aa [2] = {0,0}; /* { dg-error "cannot allocate stack for variable" } */
++}
++__attribute__((naked))
++void foo5() {
++  char aa [3] = {0,0,0}; /* { dg-error "cannot allocate stack for variable" } */
++}
++
++__attribute__((naked))
++void foo6() {
++  char aa [4] = {0,0,0,0}; /* { dg-error "cannot allocate stack for variable" } */
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr64744-2.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target naked_functions } */
++/* { dg-options "-O0" } */
++
++struct s {
++  char a;
++    int b;
++};
++
++__attribute__((naked))
++void foo () {
++  struct s x = {}; /* { dg-error "cannot allocate stack for variable" } */
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr64818.c
+@@ -0,0 +1,30 @@
++/* { dg-do compile } */
++/* { dg-options "-O1" } */
++
++char temp[16];
++extern int foo1 (void);
++
++void foo (void)
++{
++  int i;
++  int len;
++
++  while (1)
++  {
++    len = foo1 ();
++    register int a asm ("r0") = 5;
++    register char *b asm ("r1") = temp;
++    register int c asm ("r2") = len;
++    asm volatile ("mov %[r0], %[r0]\n  mov %[r1], %[r1]\n  mov %[r2], %[r2]\n"
++		   : "+m"(*b)
++		   : [r0]"r"(a), [r1]"r"(b), [r2]"r"(c));
++
++    for (i = 0; i < len; i++)
++    {
++      if (temp[i] == 10)
++      return;
++    }
++  }
++}
++
++/* { dg-final { scan-assembler "\[\\t \]+mov\ r1,\ r1" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/pr65067.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr65067.c
+@@ -1,4 +1,5 @@
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb2_ok } */
+ /* { dg-options "-mthumb -mcpu=cortex-m3 -O2" } */
+ 
+ struct tmp {
+--- a/src/gcc/testsuite/gcc.target/arm/pr65647.c
++++ b/src/gcc/testsuite/gcc.target/arm/pr65647.c
+@@ -1,4 +1,6 @@
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_arch_v6m_ok } */
++/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {"-mfloat-abi=soft" } } */
+ /* { dg-options "-march=armv6-m -mthumb -O3 -w -mfloat-abi=soft" } */
+ 
+ a, b, c, e, g = &e, h, i = 7, l = 1, m, n, o, q = &m, r, s = &r, u, w = 9, x,
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr65710.c
+@@ -0,0 +1,120 @@
++/* { dg-do compile } */
++/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {"-mfloat-abi=soft" } } */
++/* { dg-options "-mthumb -O2 -mfloat-abi=soft -w" } */
++/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
++
++struct ST {
++  char *buffer;
++  int used;
++};
++
++struct ST *h;
++
++enum { no_op, duplicate, pop_failure_jump, dummy_failure_jump };
++
++typedef struct {
++  unsigned pointer;
++} byte_fail_stack_elt_t;
++
++typedef struct { unsigned avail; } byte_fail_stack_type;
++
++typedef union {
++  byte_fail_stack_elt_t word;
++  struct {
++    unsigned match_null_string_p : 2;
++    unsigned is_active : 1;
++    unsigned ever_matched_something : 1;
++  } bits;
++} byte_register_info_type;
++
++static int a;
++int b = 0;
++int c, e, f;
++int *d, *g;
++
++int
++byte_re_match_2_internal_size2(const int p2, int p3, const int p4) {
++  int i, p;
++  char *j;
++  char k, l, m, n = h;
++  byte_fail_stack_type o;
++  byte_fail_stack_elt_t *q;
++  unsigned int s = (unsigned int)h;
++  long t, u;
++  char **v, *w, **x, **y, **t1;
++  byte_register_info_type *z, *t2 = __builtin_alloca(s);
++  x = __builtin_alloca(s);
++  y = __builtin_alloca(s);
++  z = __builtin_alloca(sizeof(byte_register_info_type));
++  k = p4 + byte_re_match_2_internal_size2;
++  if (p3)
++    f = p4;
++  for (;;) {
++    if (h == h->used) {
++      g = f;
++      if (o.avail) {
++        b = 1;
++        for (; i < s; i++)
++          t1[i] = w;
++        goto fail;
++      }
++      e = 30 > s;
++      d = p4;
++      d[s] = 1;
++      return;
++    }
++    switch (*h->buffer++) {
++    case no_op:
++      while (m && n ?: *g)
++        ;
++      y[*h->buffer] = z[*h->buffer].bits.match_null_string_p ? w == &a ?: w : w;
++      w = g;
++      if (t) {
++        char r = h;
++        while (r && z[r].bits.is_active)
++          r--;
++        if (r == 0)
++          ;
++        else
++          u = r;
++      }
++      switch (*j++)
++      case dummy_failure_jump:
++      i = j;
++      if (i)
++        if (z[*h->buffer].bits.ever_matched_something) {
++          unsigned r;
++          z[*h->buffer].bits.ever_matched_something = r = *h->buffer;
++          for (; r + *(h->buffer + 1); r++) {
++            v = x[r];
++            w[r] = y[r];
++          }
++        }
++      break;
++    case duplicate: {
++      char *t3 = p2 + p3;
++      if (t3)
++        break;
++    }
++      if ((p3 ?: p4) == k)
++        goto fail;
++    case pop_failure_jump:
++      for (; c; c--)
++        t2[c].word = q[o.avail];
++      char t4;
++      q = t4 = __builtin_allocamemcpy(t4 ?: (p <<= 1));
++    }
++    continue;
++  fail : {
++    unsigned t5;
++    t = q;
++    t5 = u;
++    for (; t5 >= t; t5--)
++      v[t5] = q[--o.avail].pointer;
++    switch (*h->buffer)
++    case pop_failure_jump:
++    goto fail;
++  }
++    m = &l;
++  }
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr65729.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_hard_vfp_ok } */
++/* { dg-options "-O2 -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16" } */
++
++int foo (void)
++{
++  double x = 0.0;
++  asm volatile ("" : "+gw" (x));
++  return x;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr65924.c
+@@ -0,0 +1,9 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-O2 -mthumb" } */
++
++int a, b, c;
++int fn1() {
++  if (b + a < 0)
++    c = 0;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr67756.c
+@@ -0,0 +1,64 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_hard_vfp_ok } */
++/* { dg-options "-O2 -mapcs -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3-d16" } */
++
++int inode_permission (), try_break_deleg ();
++int mutex_lock (), mutex_unlock ();
++struct mutex
++{
++};
++struct dentry
++{
++  struct inode *d_inode;
++};
++struct inode
++{
++  const struct inode_operations *i_op;
++  struct super_block *i_sb;
++    union
++    {
++      const unsigned int i_nlink;
++    };
++  unsigned long i_state;
++  struct mutex i_mutex;
++};
++struct super_block
++{
++  unsigned int s_max_links;
++};
++struct inode_operations
++{
++  int (*link) (struct dentry *, struct inode *, struct dentry *);
++} __attribute__ ((__aligned__ ((1 << 6))));
++static inline __attribute__ ((always_inline))
++__attribute__ ((no_instrument_function))
++int may_create (struct inode *dir, struct dentry *child)
++{
++  if (child->d_inode)
++    return -17;
++  return inode_permission (dir, 0x00000002 | 0x00000001);
++}
++
++int
++vfs_link (struct dentry *old_dentry, struct inode *dir,
++	  struct dentry *new_dentry, struct inode **delegated_inode)
++{
++  struct inode *inode = old_dentry->d_inode;
++  unsigned max_links = dir->i_sb->s_max_links;
++  int error;
++  error = may_create (dir, new_dentry);
++  if (error)
++    return error;
++  mutex_lock (&inode->i_mutex);
++  if (inode->i_nlink == 0 && !(inode->i_state & (1 << 10)))
++    error = -2;
++  else if (max_links && inode->i_nlink >= max_links)
++    error = -31;
++  else
++    {
++      error = try_break_deleg (inode, delegated_inode);
++      error = dir->i_op->link (old_dentry, dir, new_dentry);
++    }
++  mutex_unlock (&inode->i_mutex);
++  return error;
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr67989.C
+@@ -0,0 +1,82 @@
++/* { dg-do compile } */
++/* { dg-options "-std=c++11 -O2" } */
++/* { dg-require-effective-target arm_arch_v4t_ok } */
++/* { dg-add-options arm_arch_v4t } */
++/* { dg-additional-options "-marm" } */
++
++/* Duplicate version of the test in g++.dg to be able to run this test only if
++   ARMv4t in ARM execution state can be targetted.  Newer architecture don't
++   expose the bug this testcase was written for.  */
++
++
++__extension__ typedef unsigned long long int uint64_t;
++namespace std __attribute__ ((__visibility__ ("default")))
++{
++  typedef enum memory_order
++  {
++    memory_order_seq_cst
++  } memory_order;
++}
++
++namespace std __attribute__ ((__visibility__ ("default")))
++{
++  template < typename _Tp > struct atomic
++  {
++    static constexpr int _S_min_alignment
++      = (sizeof (_Tp) & (sizeof (_Tp) - 1)) || sizeof (_Tp) > 16
++      ? 0 : sizeof (_Tp);
++    static constexpr int _S_alignment
++      = _S_min_alignment > alignof (_Tp) ? _S_min_alignment : alignof (_Tp);
++      alignas (_S_alignment) _Tp _M_i;
++    operator  _Tp () const noexcept
++    {
++      return load ();
++    }
++    _Tp load (memory_order __m = memory_order_seq_cst) const noexcept
++    {
++      _Tp tmp;
++        __atomic_load (&_M_i, &tmp, __m);
++    }
++  };
++}
++
++namespace lldb_private
++{
++  namespace imp
++  {
++  }
++  class Address;
++}
++namespace lldb
++{
++  typedef uint64_t addr_t;
++  class SBSection
++  {
++  };
++  class SBAddress
++  {
++    void SetAddress (lldb::SBSection section, lldb::addr_t offset);
++      lldb_private::Address & ref ();
++  };
++}
++namespace lldb_private
++{
++  class Address
++  {
++  public:
++    const Address & SetOffset (lldb::addr_t offset)
++    {
++      bool changed = m_offset != offset;
++    }
++    std::atomic < lldb::addr_t > m_offset;
++  };
++}
++
++using namespace lldb;
++using namespace lldb_private;
++void
++SBAddress::SetAddress (lldb::SBSection section, lldb::addr_t offset)
++{
++  Address & addr = ref ();
++  addr.SetOffset (offset);
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr69610-1.c
+@@ -0,0 +1,14 @@
++/* Check that pre ARMv4 compilation still works.  */
++/* { dg-do compile } */
++/* { dg-options "-marm -march=armv3 -ftree-ter" } */
++/* { dg-require-effective-target arm_arm_ok } */
++
++typedef unsigned short v16u16 __attribute__ ((vector_size (16)));
++typedef unsigned int v16u32 __attribute__ ((vector_size (16)));
++
++unsigned short
++foo (v16u16 v16u16_1, v16u32 v16u32_1)
++{
++  v16u16_1 += (v16u16) v16u32_1;
++  return v16u16_1[5] + v16u32_1[1];
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr69610-2.c
+@@ -0,0 +1,33 @@
++/* Check that pre ARMv4 compilation still works.  */
++/* { dg-do compile } */
++/* { dg-options "-marm -march=armv3 -O2 -fno-forward-propagate" } */
++/* { dg-require-effective-target arm_arm_ok } */
++
++typedef short v16u16 __attribute__ ((vector_size (16)));
++typedef unsigned v16u32 __attribute__ ((vector_size (16)));
++typedef long long v16u64 __attribute__ ((vector_size (16)));
++
++unsigned
++foo
++  (int
++   u16_0,
++   unsigned
++   u32_0,
++   int
++   u64_0,
++   int
++   u16_1,
++   unsigned
++   u64_1,
++   v16u16
++   v16u16_0,
++   v16u32
++   v16u32_0,
++   v16u64 v16u64_0, v16u16 v16u16_1, v16u32 v16u32_1, v16u64 v16u64_1)
++{
++  v16u16_1[3] -= v16u32_0[0];
++  v16u16_0 -= (v16u16) v16u32_0;
++  return u16_0 + u32_0 + u64_0 + u16_1 +
++        v16u16_0[0] + v16u16_0[2] + v16u16_0[3] + v16u16_0[4] + v16u16_0[5] + v16u32_0[0] + v16u32_0[1] + v16u32_0[3] + v16u64_0[1] +
++        v16u16_1[2] + v16u16_1[3] + v16u16_1[5] + v16u16_1[7] + v16u32_1[0] + v16u32_1[3] + v16u64_1[0] + v16u64_1[1];
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr69904.c
+@@ -0,0 +1,24 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -marm" } */
++/* { dg-require-effective-target arm_arch_v7a_ok } */
++/* { dg-add-options arm_arch_v7a } */
++
++/* Make sure that RTL optimizers don't do any unexpected transformations
++   on the compare_exchange loop.  */
++
++#include <stdatomic.h>
++
++atomic_uint foo;
++atomic_uint bar;
++int glob;
++
++int
++main (void)
++{
++  glob = atomic_compare_exchange_strong (&foo, &bar, 0);
++  return glob;
++}
++
++/* { dg-final { scan-assembler-times "dmb\tish" 2 } } */
++/* { dg-final { scan-assembler-times "ldrex\t" 1 } } */
++/* { dg-final { scan-assembler-times "strex\t" 1 } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pr70496.c
+@@ -0,0 +1,13 @@
++/* { dg-do assemble } */
++/* { dg-options "-mthumb -O2" } */
++/* { dg-require-effective-target arm_arm_ok } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++
++int i;
++void
++main (void)
++{
++  __asm__ volatile (".arm");
++  i = 0;
++  __asm__ volatile ("\n cbz r0, 2f\n2:");
++}
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/pragma_attribute.c
+@@ -0,0 +1,35 @@
++/* Test for #prama target macros.  */
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb1_ok } */
++
++#pragma GCC target ("thumb")
++
++#ifndef __thumb__
++#error "__thumb__ is not defined"
++#endif
++
++#ifdef __thumb2__
++#ifndef __ARM_32BIT_STATE
++#error  "__ARM_32BIT_STATE is not defined"
++#endif
++#else /* thumb1 */
++#ifdef __ARM_32BIT_STATE
++#error  "__ARM_32BIT_STATE is defined"
++#endif
++#endif /* thumb1 */
++
++#pragma GCC target ("arm")
++
++#ifdef __thumb__
++#error "__thumb__ is defined"
++#endif
++
++#if defined (__thumb2__) || defined (__thumb1__)
++#error "thumb is defined"
++#endif 
++
++#ifndef __ARM_32BIT_STATE
++#error  "__ARM_32BIT_STATE is not defined"
++#endif
++
++#pragma GCC reset_options
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/reg_equal_test.c
+@@ -0,0 +1,24 @@
++/* { dg-do compile } */
++/* { dg-options "-O1 -fdump-rtl-expand" } */
++
++extern void abort (void);
++unsigned int a = 1;
++
++int
++main (void)
++{
++  unsigned int b, c, d;
++
++  if (sizeof (int) != 4 || (int) 0xc7d24b5e > 0)
++    return 0;
++
++  c = 0xc7d24b5e;
++  d = a | -2;
++  b = (d == 0) ? c : (c % d);
++  if (b != c)
++    abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-rtl-dump "expr_list:REG_EQUAL \\(const_int -942519458" "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/scd42-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/scd42-1.c
+@@ -1,7 +1,8 @@
+ /* Verify that mov is preferred on XScale for loading a 1 byte constant. */
+ /* { dg-do compile } */
+ /* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
+-/* { dg-options "-mcpu=xscale -O" } */
++/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
++/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
+ 
+ unsigned load1(void) __attribute__ ((naked));
+ unsigned load1(void)
+--- a/src/gcc/testsuite/gcc.target/arm/scd42-3.c
++++ b/src/gcc/testsuite/gcc.target/arm/scd42-3.c
+@@ -2,7 +2,8 @@
+ /* { dg-do compile } */
+ /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-march=*" } { "-march=xscale" } } */
+ /* { dg-skip-if "Test is specific to Xscale" { arm*-*-* } { "-mcpu=*" } { "-mcpu=xscale" } } */
+-/* { dg-options "-mcpu=xscale -O" } */
++/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
++/* { dg-options "-mcpu=xscale -O -mfloat-abi=softfp" } */
+ 
+ unsigned load4(void) __attribute__ ((naked));
+ unsigned load4(void)
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/short-it-ifcvt-1.c
+@@ -0,0 +1,23 @@
++/* Test that ifcvt is not being too aggressive when -mrestrict-it.  */
++/* { dg-do compile } */
++/* { dg-options "-O2 -mrestrict-it" } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++
++int
++f1(int x, int y, int z)
++{
++  if (x > 100)
++    {
++      x++;
++      z = -z;
++    }
++  else
++    {
++      x = -x;
++      y = -y;
++      z = 1;
++    }
++  return x + y + z;
++}
++
++/* { dg-final { scan-assembler "b(gt|le)" } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/short-it-ifcvt-2.c
+@@ -0,0 +1,21 @@
++/* Test that ifcvt is not being too aggressive when -mrestrict-it.  */
++/* { dg-do compile } */
++/* { dg-options "-O2 -mrestrict-it" } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++
++int
++f1(int x, int y, int z)
++{
++  if (x > 100)
++    {
++      x++;
++      z = -z;
++    }
++  else
++    {
++      x = -x;
++      y = -y;
++    }
++  return x + y + z;
++}
++/* { dg-final { scan-assembler "b(gt|le)" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/sibcall-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/sibcall-2.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_eabi } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "-O2 -mabi=aapcs" } */
+ 
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/simd/neon-vrndx_f32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/neon-vrndx_f32_1.c
+@@ -14,4 +14,3 @@ test_vrndx_f32 (float32x2_t in)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintx\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/neon-vrndxq_f32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/neon-vrndxq_f32_1.c
+@@ -14,4 +14,3 @@ test_vrndxq_f32 (float32x4_t in)
+ }
+ 
+ /* { dg-final { scan-assembler "vrintx\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_f32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_p16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQp64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQp64_1.c
+@@ -29,4 +29,3 @@ main (int argc, char **argv)
+ }
+ 
+ /* { dg-final { scan-assembler-times "vext\.64\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_p8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_s16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQs32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQs32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_s32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQs64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQs64_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_s64.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.64\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_s8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_u16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_u32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQu64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQu64_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_u64.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.64\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextQu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextQu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/extq_u8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 15 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_f32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_p16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextp64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextp64_1.c
+@@ -21,5 +21,4 @@ main (int argc, char **argv)
+   return 0;
+ }
+ 
+-/* Don't scan assembler for vext - it can be optimized into a move from r0.
+-/* { dg-final { cleanup-saved-temps } } */
++/* Don't scan assembler for vext - it can be optimized into a move from r0. */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_p8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vexts16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vexts16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_s16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vexts32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vexts32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_s32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
+@@ -22,4 +22,3 @@ main (int argc, char **argv)
+ }
+ 
+ /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vexts8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vexts8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_s8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_u16.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 3 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_u32.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
+@@ -22,4 +22,3 @@ main (int argc, char **argv)
+ }
+ 
+ /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vextu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vextu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/ext_u8.x"
+ 
+ /* { dg-final { scan-assembler-times "vext\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 7 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16p8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16p8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16p8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16qp8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16qs8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16qu8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16s8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16s8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16s8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev16u8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev16u8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev16u8.x"
+ 
+ /* { dg-final { scan-assembler "vrev16\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32p16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32p16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32p16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32p8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32p8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32p8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qp16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qp8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qs16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qs8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qu16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32qu8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32s16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32s16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32s16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32s8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32s8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32s8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32u16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32u16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32u16.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev32u8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev32u8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev32u8.x"
+ 
+ /* { dg-final { scan-assembler "vrev32\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64f32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64f32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64f32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64p16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64p16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64p16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64p8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64p8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64p8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qf32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qp16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qp8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qs16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qs32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qs8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qu16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qu32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64qu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64qu8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64s16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64s16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64s16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64s32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64s32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64s32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64s8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64s8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64s8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64u16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64u16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64u16.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.16\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64u32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64u32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64u32.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.32\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vrev64u8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vrev64u8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vrev64u8.x"
+ 
+ /* { dg-final { scan-assembler "vrev64\.8\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqs16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqs32.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqs8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnqu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnqu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrns16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrns16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrns16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrns32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrns32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrns32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrns8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrns8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrns8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vtrnu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vtrnu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vtrnu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vtrn\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqs16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqs32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqs8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpqu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpqu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzps16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzps16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzps16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzps32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzps32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzps32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzps8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzps8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzps8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vuzpu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vuzpu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vuzpu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqf32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqf32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqf32.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqp16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqp16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqp16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqp8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqp8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqp8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqs16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqs16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqs16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqs32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqs32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqs32.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqs8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqs8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqs8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.32\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipqu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipqu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipqu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzips16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzips16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzips16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzips32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzips32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzips32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzips8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzips8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzips8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipu16_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipu16_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipu16.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.16\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipu32_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipu32_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipu32.x"
+ 
+ /* { dg-final { scan-assembler-times "vuzp\.32\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/simd/vzipu8_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/simd/vzipu8_1.c
+@@ -7,4 +7,3 @@
+ #include "../../aarch64/simd/vzipu8.x"
+ 
+ /* { dg-final { scan-assembler-times "vzip\.8\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+!?\(?:\[ \t\]+@\[a-zA-Z0-9 \]+\)?\n" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c
++++ b/src/gcc/testsuite/gcc.target/arm/split-live-ranges-for-shrink-wrap.c
+@@ -13,4 +13,3 @@ int test (int d, char * out, char *in, int len)
+ }
+ /* { dg-final { object-size text <= 20 } } */
+ /* { dg-final { scan-rtl-dump-not "Split live-range of register" "ira" } } */
+-/* { dg-final { cleanup-rtl-dump "ira" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/thumb-ifcvt.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb-ifcvt.c
+@@ -1,7 +1,7 @@
+ /* Check that Thumb 16-bit shifts can be if-converted.  */
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_thumb2_ok } */
+-/* { dg-options "-O2 -mthumb" } */
++/* { dg-options "-O2 -mthumb -mno-restrict-it" } */
+ 
+ int
+ foo (int a, int b)
+--- a/src/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-options "-Os" } */
+ /* { dg-skip-if "" { ! { arm_thumb1 } } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-options "-Os" } */
+ /* { dg-skip-if "" { ! { arm_thumb1 } } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-options "-O2" } */
+ /* { dg-skip-if "" { ! { arm_thumb1 } } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb1_ok } */
+ /* { dg-options "-Os" } */
+ /* { dg-skip-if "" { ! { arm_thumb1 } } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data.c
++++ b/src/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data.c
+@@ -50,7 +50,7 @@ int
+ foo (int a, int b)
+ {
+   int i;
+-  volatile *labelref = &&label1;
++  volatile int *labelref = &&label1;
+ 
+   if (a > b)
+     {
+@@ -70,5 +70,4 @@ label1:
+   return a + b;
+ }
+ 
+-/* { dg-final { scan-assembler-times "movt" 13 } } */
+-/* { dg-final { scan-assembler-times "movt.*LC0\\+4" 1 } } */
++/* { dg-final { scan-assembler-not "\\.(float|l\\?double|\d?byte|short|int|long|quad|word)\\s+\[^.\]" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c
++++ b/src/gcc/testsuite/gcc.target/arm/unaligned-memcpy-4.c
+@@ -14,7 +14,7 @@ void aligned_both (void)
+ 
+ /* We know both src and dest to be aligned: expect multiword loads/stores.  */
+ 
+-/* { dg-final { scan-assembler-times "ldmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */
++/* { dg-final { scan-assembler-times "ldm" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */
+ /* { dg-final { scan-assembler-times "stmia" 1 { target { ! { arm_prefer_ldrd_strd } } } } } */
+ /* { dg-final { scan-assembler "ldrd" { target { arm_prefer_ldrd_strd } } } } */
+ /* { dg-final { scan-assembler-times "ldm" 0 { target { arm_prefer_ldrd_strd } } } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/arm/unsigned-float.c
+@@ -0,0 +1,21 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
++/* { dg-options "-march=armv7-a -O1" } */
++/* { dg-additional-options "-mfloat-abi=softfp" { target { ! { arm_hf_eabi } } } } */
++
++#include <stdint.h>
++
++double
++f1 (uint16_t x)
++{
++  return (double)(float)x;
++}
++
++float
++f2 (uint16_t x)
++{
++  return (float)(double)x;
++}
++
++/* { dg-final { scan-assembler-not "vcvt.(f32.f64|f64.f32)" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-copysignf.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-copysignf.c
+@@ -33,4 +33,3 @@ main (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-lceilf_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-lceilf_1.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-lfloorf_1.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-lroundf_1.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-lroundf_1.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-btruncf.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btruncf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-ceilf.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceilf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-floorf.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floorf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c
++++ b/src/gcc/testsuite/gcc.target/arm/vect-rounding-roundf.c
+@@ -18,4 +18,3 @@ foo ()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_roundf } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/arm/vfp-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/vfp-1.c
+@@ -1,6 +1,7 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp -ffp-contract=off" } */
+ /* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } } */
+ 
+ extern float fabsf (float);
+ extern float sqrtf (float);
+--- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
++++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_eabi } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "-O2" } */
+ 
+ typedef struct {
+--- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
++++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_eabi } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "-O2" } */
+ 
+ typedef struct {
+--- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
++++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_eabi } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "-O2" } */
+ 
+ typedef struct {
+--- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
++++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
+@@ -1,5 +1,5 @@
+-/* { dg-require-effective-target arm_eabi } */
+ /* { dg-do compile } */
++/* { dg-require-effective-target arm_eabi } */
+ /* { dg-options "-O2" } */
+ /* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+ /* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+--- a/src/gcc/testsuite/gcc.target/arm/xor-and.c
++++ b/src/gcc/testsuite/gcc.target/arm/xor-and.c
+@@ -10,6 +10,6 @@ unsigned short foo (unsigned short x)
+   return x;
+ }
+ 
+-/* { dg-final { scan-assembler "orr" } } */
++/* { dg-final { scan-assembler "eor" } } */
+ /* { dg-final { scan-assembler-not "mvn" } } */
+ /* { dg-final { scan-assembler-not "uxth" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx-cvt-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx-cvt-2.c
+@@ -10,4 +10,3 @@
+ /* { dg-final { scan-assembler "vcvttps2dq\[^\n\r\]*ymm" } } */
+ /* { dg-final { scan-assembler "vcvtdq2pd\[^\n\r\]*(%xmm\[^\n\r\]*%ymm|ymm\[^\n\r\]*xmm)" } } */
+ /* { dg-final { scan-assembler "vcvtpd2ps(y\[^\n\r\]*%xmm|\[^\n\r\]*xmm\[^\n\r\]*YMMWORD PTR)" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx-cvt-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx-cvt-3.c
+@@ -10,4 +10,3 @@
+ /* { dg-final { scan-assembler "vcvttps2dq\[^\n\r\]*xmm" } } */
+ /* { dg-final { scan-assembler "vcvtdq2pd\[^\n\r\]*xmm\[^\n\r\]*xmm" } } */
+ /* { dg-final { scan-assembler "vcvtpd2ps(x\[^\n\r\]*%xmm|\[^\n\r\]*xmm\[^\n\r\]*XMMWORD PTR)" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-cvt-2.c
+@@ -10,4 +10,3 @@
+ /* { dg-final { scan-assembler "vcvttps2dq\[^\n\r\]*ymm" } } */
+ /* { dg-final { scan-assembler "vcvtdq2pd\[^\n\r\]*(%xmm\[^\n\r\]*%ymm|ymm\[^\n\r\]*xmm)" } } */
+ /* { dg-final { scan-assembler "vcvtpd2ps(y\[^\n\r\]*%xmm|\[^\n\r\]*xmm\[^\n\r\]*YMMWORD PTR)" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-gather-2.c
+@@ -4,4 +4,3 @@
+ #include "avx2-gather-1.c"
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops in function" 16 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-gather-6.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-gather-6.c
+@@ -4,4 +4,3 @@
+ #include "avx2-gather-5.c"
+ 
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops in function" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vect-aggressive-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vect-aggressive-1.c
+@@ -30,4 +30,3 @@ void foo()
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vect-aggressive.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vect-aggressive.c
+@@ -45,5 +45,4 @@ avx2_test (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpaddb-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpaddb-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpaddb\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpaddd-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpaddd-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpaddq-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpaddq-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpaddw-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpaddw-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpaddw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpand-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpand-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpand\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpmulld-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpmulld-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpmulld\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpmullw-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpmullw-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpmullw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsrad-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsrad-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsraw-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsraw-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsraw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsrld-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsrld-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsrld\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsrlw-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsrlw-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsrlw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsubb-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsubb-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsubb\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsubd-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsubd-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsubq-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsubq-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx2-vpsubw-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx2-vpsubw-3.c
+@@ -9,4 +9,3 @@
+ #include "avx2-vpop-check.h"
+ 
+ /* { dg-final { scan-assembler-times "vpsubw\[ \\t\]+\[^\n\]*%ymm\[0-9\]" 1 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/avx512f-gather-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/avx512f-gather-2.c
+@@ -8,4 +8,3 @@
+ /* { dg-final { scan-assembler-not "gather\[^\n\]*ymm\[^\n\]*xmm" } } */
+ /* { dg-final { scan-assembler-not "gather\[^\n\]*xmm\[^\n\]*xmm" } } */
+ /* { dg-final { scan-tree-dump-times "note: vectorized 1 loops in function" 16 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/branch-cost1.c
++++ b/src/gcc/testsuite/gcc.target/i386/branch-cost1.c
+@@ -13,4 +13,3 @@ foo (int a, int b)
+ 
+ /* { dg-final { scan-tree-dump-times "if " 2 "gimple" } } */
+ /* { dg-final { scan-tree-dump-not " & " "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/branch-cost2.c
++++ b/src/gcc/testsuite/gcc.target/i386/branch-cost2.c
+@@ -13,4 +13,3 @@ foo (int a, int b)
+ 
+ /* { dg-final { scan-tree-dump-times "if " 1 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times " & " 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/branch-cost3.c
++++ b/src/gcc/testsuite/gcc.target/i386/branch-cost3.c
+@@ -13,4 +13,3 @@ foo (_Bool a, _Bool b)
+ 
+ /* { dg-final { scan-tree-dump-times "if " 1 "gimple" } } */
+ /* { dg-final { scan-tree-dump-times " & " 1 "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/branch-cost4.c
++++ b/src/gcc/testsuite/gcc.target/i386/branch-cost4.c
+@@ -13,4 +13,3 @@ foo (_Bool a, _Bool b)
+ 
+ /* { dg-final { scan-tree-dump-times "if " 2 "gimple" } } */
+ /* { dg-final { scan-tree-dump-not " & " "gimple" } } */
+-/* { dg-final { cleanup-tree-dump "gimple" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-bndret.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-bndret.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump-not "bndret" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ #include "string.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-builtins-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-builtins-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump-not "bnd_init_ptr_bounds" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ void *
+ chkp_test (void *p)
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-builtins-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-builtins-2.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump-not "bnd_copy_ptr_bounds" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ void *
+ chkp_test (void *p, void *q)
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-builtins-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-builtins-3.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump-not "bnd_set_ptr_bounds" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ void *
+ chkp_test (void *p)
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-builtins-4.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-builtins-4.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump-not "bnd_null_ptr_bounds" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ void *
+ chkp_test (void *p)
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-const-check-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-const-check-1.c
+@@ -2,7 +2,6 @@
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt" } */
+ /* { dg-final { scan-tree-dump-not "bndcl" "chkpopt" } } */
+ /* { dg-final { scan-tree-dump-not "bndcu" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ int test (int *p)
+ {
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-lifetime-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-lifetime-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt-details" } */
+ /* { dg-final { scan-tree-dump "Moving creation of \[^ \]+ down to its use" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ extern int arr[];
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-narrow-bounds.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-narrow-bounds.c
+@@ -2,7 +2,6 @@
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkp" } */
+ /* { dg-final { scan-tree-dump "bndcl" "chkp" } } */
+ /* { dg-final { scan-tree-dump "bndcu" "chkp" } } */
+-/* { dg-final { cleanup-tree-dump "chkp" } } */
+ 
+ int
+ test (int *p)
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-remove-bndint-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-remove-bndint-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-not "bndint" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ struct S
+ {
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-remove-bndint-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-remove-bndint-2.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-optimized -Wchkp" } */
+ /* { dg-final { scan-tree-dump-not "bndint" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ struct S
+ {
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-strlen-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-strlen-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-strlen" } */
+ /* { dg-final { scan-tree-dump "memcpy.chkp" "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-strlen-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-strlen-2.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target stpcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-strlen" } */
+ /* { dg-final { scan-tree-dump-not "strlen" "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-strlen-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-strlen-3.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-strlen" } */
+ /* { dg-final { scan-tree-dump-times "strlen" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-strlen-4.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-strlen-4.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target mempcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-strlen -D_GNU_SOURCE" } */
+ /* { dg-final { scan-tree-dump-times "strlen" 1 "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-strlen-5.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-strlen-5.c
+@@ -2,7 +2,6 @@
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-strlen" } */
+ /* { dg-final { scan-tree-dump-times "strlen" 2 "strlen" } } */
+ /* { dg-final { scan-tree-dump "memcpy" "strlen" } } */
+-/* { dg-final { cleanup-tree-dump "strlen" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-1.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions" } */
+ /* { dg-final { scan-tree-dump "memcpy_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-10.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-10.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump-not "memset_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-11.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-11.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump-not "memmove_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-12.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-12.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target mempcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions -D_GNU_SOURCE" } */
+ /* { dg-final { scan-tree-dump-not "mempcpy_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-13.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-13.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memcpy_nobnd_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-14.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-14.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memset_nobnd_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-15.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-15.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memmove_nobnd_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-16.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-16.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target mempcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions -fchkp-use-fast-string-functions -D_GNU_SOURCE" } */
+ /* { dg-final { scan-tree-dump "mempcpy_nobnd_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-2.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions" } */
+ /* { dg-final { scan-tree-dump "memset_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-3.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions" } */
+ /* { dg-final { scan-tree-dump "memmove_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-4.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-4.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target mempcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-nochk-string-functions -D_GNU_SOURCE" } */
+ /* { dg-final { scan-tree-dump "mempcpy_nochk" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-5.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-5.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memcpy_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-6.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-6.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memset_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-7.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-7.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump "memmove_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-8.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-8.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target mempcpy } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions -D_GNU_SOURCE" } */
+ /* { dg-final { scan-tree-dump "mempcpy_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #define USE_GNU
+ #include "../../gcc.dg/strlenopt.h"
+--- a/src/gcc/testsuite/gcc.target/i386/chkp-stropt-9.c
++++ b/src/gcc/testsuite/gcc.target/i386/chkp-stropt-9.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-fcheck-pointer-bounds -mmpx -O2 -fdump-tree-chkpopt -fchkp-use-fast-string-functions" } */
+ /* { dg-final { scan-tree-dump-not "memcpy_nobnd" "chkpopt" } } */
+-/* { dg-final { cleanup-tree-dump "chkpopt" } } */
+ 
+ #include "../../gcc.dg/strlenopt.h"
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/intrinsics_opt-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/intrinsics_opt-2.c
+@@ -13,4 +13,3 @@ int f(__m128d x){
+ }
+ 
+ /* { dg-final { scan-tree-dump "return 1;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/mcount_pic.c
++++ b/src/gcc/testsuite/gcc.target/i386/mcount_pic.c
+@@ -12,5 +12,4 @@ int main ()
+ 
+ /* { dg-final { scan-assembler "mcount" } } */
+ /* { dg-final { scan-assembler "get_pc_thunk" { xfail { *-*-solaris* && { ! gld } } } } } */
+-/* { dg-final { cleanup-saved-temps } } */
+ /* { dg-final { cleanup-profile-file } } */
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/i386/noplt-1.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile { target { *-*-linux* && { ! ia32 } } } } */
++/* { dg-options "-fno-pic" } */
++
++__attribute__ ((noplt))
++void foo();
++
++int main()
++{
++  foo();
++  return 0;
++}
++
++/* { dg-final { scan-assembler "call\[ \t\]\\*.*foo.*@GOTPCREL\\(%rip\\)" } } */ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/i386/noplt-2.c
+@@ -0,0 +1,13 @@
++/* { dg-do compile { target { *-*-linux* && { ! ia32 } } } } */
++/* { dg-options "-O2 -fno-pic" } */
++
++
++__attribute__ ((noplt))
++int foo();
++
++int main()
++{
++  return foo();
++}
++
++/* { dg-final { scan-assembler "jmp\[ \t\]\\*.*foo.*@GOTPCREL\\(%rip\\)" } } */ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/i386/noplt-3.c
+@@ -0,0 +1,12 @@
++/* { dg-do compile { target { *-*-linux* && { ! ia32 } } } } */
++/* { dg-options "-fno-pic -fno-plt" } */
++
++void foo();
++
++int main()
++{
++  foo();
++  return 0;
++}
++
++/* { dg-final { scan-assembler "call\[ \t\]\\*.*foo.*@GOTPCREL\\(%rip\\)" } } */ 
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/i386/noplt-4.c
+@@ -0,0 +1,11 @@
++/* { dg-do compile { target { *-*-linux* && { ! ia32 } } } } */
++/* { dg-options "-O2 -fno-pic -fno-plt" } */
++
++int foo();
++
++int main()
++{
++  return foo();
++}
++
++/* { dg-final { scan-assembler "jmp\[ \t\]\\*.*foo.*@GOTPCREL\\(%rip\\)" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/nrv1.c
++++ b/src/gcc/testsuite/gcc.target/i386/nrv1.c
+@@ -9,4 +9,3 @@ _Complex double foo (_Complex double x)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "return slot optimization" 1 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr20020-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr20020-1.c
+@@ -24,4 +24,3 @@ sptr_result (void)
+ }
+ /* { dg-final { scan-rtl-dump "\\\(set \\\(reg:TI \[0-9\]* \\\[ <retval> \\\]\\\)" "expand" } } */
+ /* { dg-final { scan-rtl-dump "\\\(set \\\(reg/i:TI 0 ax\\\)" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr20020-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr20020-2.c
+@@ -22,4 +22,3 @@ copy_sptr (sptr_t *dest, sptr_t src)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "\\\(set \\\(reg:TI \[0-9\]*" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr20020-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr20020-3.c
+@@ -25,4 +25,3 @@ copy_sptr (void)
+ 
+ /* { dg-final { scan-rtl-dump "\\\(set \\\(reg:TI \[0-9\]*" "expand" } } */
+ /* { dg-final { scan-rtl-dump "\\\(set \\\(mem/c:TI" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr24178.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr24178.c
+@@ -13,4 +13,3 @@ unsigned long f(unsigned char *p10) {
+ /* The p->c memory access should have alignment of 4 bytes.  */
+ 
+ /* { dg-final { scan-rtl-dump "MEM\[^\\n\]*A32" "expand" } } */
+-/* { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr37248-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr37248-1.c
+@@ -17,4 +17,3 @@ foo (struct S x)
+ 
+ /* { dg-final { scan-tree-dump "& 7;" "optimized" } } */
+ /* { dg-final { scan-tree-dump "== 7;" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr37248-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr37248-2.c
+@@ -21,4 +21,3 @@ foo (struct S x)
+ 
+ /* { dg-final { scan-tree-dump "& (3758096391|0x0e0000007);" "optimized" } } */
+ /* { dg-final { scan-tree-dump "== (3758096391|0x0e0000007);" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr37248-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr37248-3.c
+@@ -23,4 +23,3 @@ foo (struct S x)
+ 
+ /* { dg-final { scan-tree-dump "& (3766484487|0x0e07ffe07);" "optimized" } } */
+ /* { dg-final { scan-tree-dump "== (3758163463|0x0e0010607);" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr45830.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr45830.c
+@@ -28,4 +28,3 @@ foo (int *a)
+ 
+ /* { dg-final { scan-tree-dump "expanding as bit test is preferable" "switchconv" } } */
+ /* { dg-final { scan-assembler-not "CSWTCH" } } */
+-/* { dg-final { cleanup-tree-dump "switchconv" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr46865-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr46865-2.c
+@@ -29,4 +29,3 @@ bar (void)
+ }
+ 
+ /* { dg-final { scan-assembler-times "asmnop" 2 } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr53397-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr53397-1.c
+@@ -25,4 +25,3 @@ void prefetch_when_non_constant_step_is_invariant(int step, int n)
+ /* { dg-final { scan-tree-dump "Issued prefetch" "aprefetch" } } */
+ /* { dg-final { scan-assembler "prefetcht0" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr53397-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr53397-2.c
+@@ -24,5 +24,4 @@ void donot_prefetch_when_non_constant_step_is_variant(int step, int n)
+ /* { dg-final { scan-tree-dump "Not prefetching" "aprefetch" } } */
+ /* { dg-final { scan-tree-dump "loop variant step" "aprefetch" } } */
+ 
+-/* { dg-final { cleanup-tree-dump "aprefetch" } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/pr53623.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr53623.c
+@@ -21,5 +21,4 @@ int main(void) {
+ }
+ 
+ /* { dg-final { scan-rtl-dump "copy needed" "ree" } } */
+-/* { dg-final { cleanup-rtl-dump "ree" } } */
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/pr56564-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr56564-1.c
+@@ -23,4 +23,3 @@ bar (void)
+ /* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr56564-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr56564-2.c
+@@ -22,4 +22,3 @@ bar (void)
+ /* { dg-final { scan-tree-dump-times "return 0" 2 "optimized" } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr56564-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr56564-3.c
+@@ -26,4 +26,3 @@ bar (void)
+ /* { dg-final { scan-tree-dump-times "return 0" 0 "optimized" } } */
+ /* { dg-final { scan-assembler-not ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr56564-4.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr56564-4.c
+@@ -19,4 +19,3 @@ bar (void)
+ 
+ /* { dg-final { scan-assembler-not ".align\[ \t]*16\[^:]*\[\n\r]s:" { target { *-*-linux* } } } } */
+ /* { dg-final { scan-assembler ".align\[ \t]*16\[^:]*\[\n\r]t:" { target { *-*-linux* } } } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr58066.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr58066.c
+@@ -19,4 +19,3 @@ void* goo()
+ 
+ /* { dg-final { scan-rtl-dump "Function foo.*set\[^\r\n\]*sp\\)\[\r\n\]\[^\r\n\]*plus\[^\r\n\]*sp\\)\[\r\n\]\[^\r\n\]*const_int -8.*UNSPEC_TLS.*Function goo" "final" } } */
+ /* { dg-final { scan-rtl-dump "Function goo.*set\[^\r\n\]*sp\\)\[\r\n\]\[^\r\n\]*plus\[^\r\n\]*sp\\)\[\r\n\]\[^\r\n\]*const_int -8.*UNSPEC_TLS" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/pr59544.c
++++ b/src/gcc/testsuite/gcc.target/i386/pr59544.c
+@@ -10,4 +10,3 @@ void test1(short * __restrict__ x, short * __restrict__ y, short * __restrict__
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/reload-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/reload-1.c
+@@ -112,4 +112,3 @@ long foo (job *j )
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "deleted 1 dead insns" "csa" } } */
+-/* { dg-final { cleanup-rtl-dump "csa" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/rotate-3.c
++++ b/src/gcc/testsuite/gcc.target/i386/rotate-3.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target avx2 } */
+ /* { dg-options "-O3 -mavx2 -fdump-tree-vect-details" } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ unsigned int a[1024] __attribute__((aligned (32)));
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/rotate-4.c
++++ b/src/gcc/testsuite/gcc.target/i386/rotate-4.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target avx } */
+ /* { dg-options "-O3 -mavx -fdump-tree-vect-details" } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ unsigned int a[1024] __attribute__((aligned (32)));
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/rotate-5.c
++++ b/src/gcc/testsuite/gcc.target/i386/rotate-5.c
+@@ -2,7 +2,6 @@
+ /* { dg-require-effective-target avx } */
+ /* { dg-options "-O3 -mavx -fdump-tree-vect-details" } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+ unsigned int a[1024] __attribute__((aligned (32)));
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/shrink_wrap_1.c
++++ b/src/gcc/testsuite/gcc.target/i386/shrink_wrap_1.c
+@@ -46,4 +46,3 @@ builtin_memset_gen_str (void *data, long offset __attribute__ ((__unused__)),
+ }
+ 
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue"  } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/sse2-cvt-2.c
+@@ -10,4 +10,3 @@
+ /* { dg-final { scan-assembler "cvttps2dq" } } */
+ /* { dg-final { scan-assembler "cvtdq2pd" } } */
+ /* { dg-final { scan-assembler "cvtpd2ps" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/sw-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/sw-1.c
+@@ -16,4 +16,3 @@ __attribute__((regparm(1))) void foo (int a, int b)
+  }
+ 
+ /* { dg-final { scan-rtl-dump "Performing shrink-wrapping" "pro_and_epilogue" } } */
+-/* { dg-final { cleanup-rtl-dump "pro_and_epilogue" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/thunk-retbnd.c
++++ b/src/gcc/testsuite/gcc.target/i386/thunk-retbnd.c
+@@ -1,7 +1,6 @@
+ /* { dg-do compile { target { ! x32 } } } */
+ /* { dg-options "-O2 -fcheck-pointer-bounds -mmpx -fdump-tree-optimized" } */
+ /* { dg-final { scan-tree-dump-times "return &glob," 2 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+ 
+ int glob;
+ 
+--- a/src/gcc/testsuite/gcc.target/i386/vect-abs-s16.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-abs-s16.c
+@@ -12,4 +12,3 @@ void test (short* a, short* b)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vect-abs-s32.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-abs-s32.c
+@@ -12,4 +12,3 @@ void test (int* a, int* b)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vect-abs-s8.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-abs-s8.c
+@@ -12,4 +12,3 @@ void test (char* a, char* b)
+ 
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vect-cond-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-cond-1.c
+@@ -18,4 +18,3 @@ foo (int *p)
+     }
+ }
+ 
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vect-double-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-double-1.c
+@@ -34,4 +34,3 @@ sse2_test (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "Vectorized loops: 1" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vect-double-2.c
++++ b/src/gcc/testsuite/gcc.target/i386/vect-double-2.c
+@@ -32,4 +32,3 @@ sse2_test (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "vectorized 1 loops" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/i386/vectorize1.c
++++ b/src/gcc/testsuite/gcc.target/i386/vectorize1.c
+@@ -18,4 +18,3 @@ int set_names (void)
+ }
+ 
+ /* { dg-final { scan-tree-dump "vect_cst" "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/mips/octeon-pipe-1.c
++++ b/src/gcc/testsuite/gcc.target/mips/octeon-pipe-1.c
+@@ -9,4 +9,3 @@ NOMIPS16 int f (int a, int b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "octeon_mult\\*71" "sched2" } }  */
+-/* { dg-final { cleanup-rtl-dump "sched2" } }  */
+--- a/src/gcc/testsuite/gcc.target/mips/octeon2-pipe-1.c
++++ b/src/gcc/testsuite/gcc.target/mips/octeon2-pipe-1.c
+@@ -9,4 +9,3 @@ NOMIPS16 int f (int a, int b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "octeon_mult\\*17" "sched2" } }  */
+-/* { dg-final { cleanup-rtl-dump "sched2" } }  */
+--- a/src/gcc/testsuite/gcc.target/mips/octeon3-pipe-1.c
++++ b/src/gcc/testsuite/gcc.target/mips/octeon3-pipe-1.c
+@@ -9,4 +9,3 @@ NOMIPS16 int f (int a, int b)
+ }
+ 
+ /* { dg-final { scan-rtl-dump "octeon_mult\\*17" "sched2" } }  */
+-/* { dg-final { cleanup-rtl-dump "sched2" } }  */
+--- a/src/gcc/testsuite/gcc.target/mips/pr54240.c
++++ b/src/gcc/testsuite/gcc.target/mips/pr54240.c
+@@ -25,4 +25,3 @@ NOMIPS16 int foo(S *s)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Hoisting adjacent loads" "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.target/nios2/custom-fp-lto.c
++++ b/src/gcc/testsuite/gcc.target/nios2/custom-fp-lto.c
+@@ -26,4 +26,3 @@ main (int argc, char *argv[])
+ }
+ 
+ /* { dg-final { scan-lto-assembler "custom\\t224, " } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-16.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-16.c
+@@ -19,4 +19,3 @@ vector_float f1 = { 1.0, 2.0, 3.0, 4.0 };
+ vector_float_foo = { 3.0, 4.0, 5.0, 6.0 };
+ vector_float_bar_eq { 8.0, 7.0, 6.0, 5.0 };
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/altivec-29.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/altivec-29.c
+@@ -20,4 +20,3 @@ int *baz (int *vector __attribute__((unused)))
+   return vector;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/dfmode_off.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/dfmode_off.c
+@@ -44,4 +44,3 @@ double r19 (void *x) { return *(double *) (x + 32749); }
+ double r20 (void *x) { return *(double *) (x + 32748); }
+ 
+ /* { dg-final { object-size text == 320 } } */
+-/* { dg-final { cleanup-saved-temps "dfmode_off" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/dimode_off.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/dimode_off.c
+@@ -47,4 +47,3 @@ long long r20 (void *x) { return *(long long *) (x + 32748); }
+ /* 32-bit test should really be == 512 bytes, see pr54110 */
+ /* { dg-final { object-size text <= 640 { target { ilp32 } } } } */
+ /* { dg-final { scan-assembler-not "(st|l)fd" } } */
+-/* { dg-final { cleanup-saved-temps "dimode_off" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/e500-ord-1.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/e500-ord-1.c
+@@ -26,4 +26,3 @@ int islessequal (float f1, float f2)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "__unordsf2" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/e500-ord-2.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/e500-ord-2.c
+@@ -26,4 +26,3 @@ int islessequal (float f1, float f2)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "__unordsf2" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/e500-unord-1.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/e500-unord-1.c
+@@ -26,4 +26,3 @@ int islessequal (float f1, float f2)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "__unordsf2" 4 "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/e500-unord-2.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/e500-unord-2.c
+@@ -26,4 +26,3 @@ int islessequal (float f1, float f2)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-not "__unordsf2" "final" } } */
+-/* { dg-final { cleanup-rtl-dump "final" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c
+@@ -51,4 +51,3 @@ void use_builtins (long *p, char code, long *a, long *b)
+   __builtin_set_tfhar (a[22]);
+   __builtin_set_tfiar (a[23]);
+ }
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/outofline_rnreg.c
+@@ -6,7 +6,6 @@
+ /* { dg-options "-Os -frename-registers -fdump-rtl-rnreg" } */
+ /* "* renamed" or "* no available better choice" results are not acceptable */
+ /* { dg-final { scan-rtl-dump-not "Register 11 in insn *" "rnreg" { target powerpc*-*-linux* } } } */
+-/* { dg-final { cleanup-rtl-dump "rnreg" } } */
+ int
+ calc (int j)
+ {
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr54240.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr54240.c
+@@ -24,4 +24,3 @@ int foo(S *s)
+ }
+ 
+ /* { dg-final { scan-tree-dump "Hoisting adjacent loads" "phiopt1" } } */
+-/* { dg-final { cleanup-tree-dump "phiopt1" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr56605.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr56605.c
+@@ -11,4 +11,3 @@ void foo (short* __restrict sb, int* __restrict ia)
+ }
+ 
+ /* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\(subreg:SI \\\(reg:DI" 1 "loop2_doloop" } } */
+-/* { dg-final { cleanup-rtl-dump "loop2_doloop" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/tfmode_off.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/tfmode_off.c
+@@ -49,4 +49,3 @@ TFmode r19 (void *x) { return *(TFmode *) (x + 32749); }
+ TFmode r20 (void *x) { return *(TFmode *) (x + 32748); }
+ 
+ /* { dg-final { object-size text == 544 } } */
+-/* { dg-final { cleanup-saved-temps "tfmode_off" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/timode_off.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/timode_off.c
+@@ -55,4 +55,3 @@ TImode r20 (void *x) { return *(TImode *) (x + 32748); }
+ 
+ /* { dg-final { object-size text <= 700 } } */
+ /* { dg-final { scan-assembler-not "(st|l)fd" } } */
+-/* { dg-final { cleanup-saved-temps "timode_off" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c
+@@ -52,4 +52,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
+@@ -62,4 +62,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 3 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c
+@@ -58,4 +58,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
+@@ -62,4 +62,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
+@@ -62,4 +62,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c
++++ b/src/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c
+@@ -62,4 +62,3 @@ int main (void)
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" } } */
+-/* { dg-final { cleanup-tree-dump "vect" } } */
+--- a/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/htm-nofloat-1.c
+@@ -48,4 +48,3 @@ int main(void)
+ /* Make sure no FPR saves/restores are emitted.  */
+ /* { dg-final { scan-assembler-not "\tstd\t" } } */
+ /* { dg-final { scan-assembler-not "\tld\t" } } */
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-abi-vararg-1.c
+@@ -16,7 +16,6 @@
+ /* { dg-final { scan-assembler "vl\t%v\[0-9\]*,232\\(%r15\\)" { target ilp32 } } } */
+ /* { dg-final { scan-assembler "ld\t%v\[0-9\]*,248\\(%r15\\)" { target ilp32 } } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+ #include <stdarg.h>
+ 
+--- a/src/gcc/testsuite/gcc.target/s390/vector/vec-dbl-math-compile-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-dbl-math-compile-1.c
+@@ -45,4 +45,3 @@ fmsdbl (v2df a, v2df b, v2df c)
+ }
+ /* { dg-final { scan-assembler-times "vfms" 1 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-genbytemask-1.c
+@@ -80,4 +80,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/vector/vec-genmask-1.c
+@@ -67,4 +67,3 @@ main ()
+   return 0;
+ }
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+--- a/src/gcc/testsuite/gcc.target/s390/zvector/vec-dbl-math-compile-1.c
++++ b/src/gcc/testsuite/gcc.target/s390/zvector/vec-dbl-math-compile-1.c
+@@ -8,7 +8,6 @@
+ /* { dg-final { scan-assembler-times "vfcedbs\t" 2 } } */
+ /* { dg-final { scan-assembler-times "vfchdbs\t" 2 } } */
+ 
+-/* { dg-final { cleanup-saved-temps } } */
+ 
+ #include <vecintrin.h>
+ 
+--- a/src/gcc/testsuite/gcc.target/sparc/fexpand-2.c
++++ b/src/gcc/testsuite/gcc.target/sparc/fexpand-2.c
+@@ -9,4 +9,3 @@ vec16 foo () {
+ }
+ 
+ /* { dg-final { scan-tree-dump "{ 16, 32, 64, 128 }" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/sparc/fpmerge-2.c
++++ b/src/gcc/testsuite/gcc.target/sparc/fpmerge-2.c
+@@ -13,4 +13,3 @@ pixel foo () {
+ 
+ /* { dg-final { scan-assembler-not "fpmerge\t%" } } */
+ /* { dg-final { scan-tree-dump "{ 1, 2, 3, 4, 5, 6, 7, 8 }" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/sparc/fpmul-2.c
++++ b/src/gcc/testsuite/gcc.target/sparc/fpmul-2.c
+@@ -45,4 +45,3 @@ vec16 foo3 () {
+ }
+ /* { dg-final { scan-assembler-not "fmul8x16al\t%" } } */
+ /* { dg-final { scan-tree-dump "{ 2, 4, 6, 8 }" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/sparc/pdist-2.c
++++ b/src/gcc/testsuite/gcc.target/sparc/pdist-2.c
+@@ -16,4 +16,3 @@ int64_t foo () {
+ 
+ /* { dg-final { scan-assembler-not "pdist\t%" } } */
+ /* { dg-final { scan-tree-dump "return 475" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gcc.target/sparc/pdistn-2.c
++++ b/src/gcc/testsuite/gcc.target/sparc/pdistn-2.c
+@@ -13,4 +13,3 @@ long foo () {
+ 
+ /* { dg-final { scan-assembler-not "pdistn\t%" } } */
+ /* { dg-final { scan-tree-dump "return 473" "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gfortran.dg/PR40660.f90
++++ b/src/gcc/testsuite/gfortran.dg/PR40660.f90
+@@ -11,5 +11,4 @@ PROGRAM test
+ end program test
+ 
+ ! { dg-final { scan-tree-dump-times ": 3\] _gfortran" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_auto_array_2.f90
+@@ -37,4 +37,3 @@ end module grid_io
+   use grid_io
+   call read_grid_header
+ end
+-! { dg-final { cleanup-tree-dump "grid_io" } }
+--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_basics_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_basics_1.f90
+@@ -142,4 +142,3 @@ contains
+ 
+ end program alloc
+ ! { dg-final { scan-tree-dump-times "builtin_free" 18 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/alloc_comp_constructor_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/alloc_comp_constructor_1.f90
+@@ -108,4 +108,3 @@ contains
+ 
+ end program test_constructor
+ ! { dg-final { scan-tree-dump-times "builtin_free" 19 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/allocatable_function_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/allocatable_function_1.f90
+@@ -108,4 +108,3 @@ contains
+ 
+ end program alloc_fun
+ ! { dg-final { scan-tree-dump-times "free" 10 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/allocatable_function_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/allocatable_function_4.f90
+@@ -52,5 +52,4 @@ function unique_A (x, sorted) result (x_unique)
+ end function unique_A
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 5 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/allocatable_scalar_13.f90
++++ b/src/gcc/testsuite/gfortran.dg/allocatable_scalar_13.f90
+@@ -69,4 +69,3 @@ contains
+ end
+ ! { dg-final { scan-tree-dump-times "builtin_malloc" 16 "original" } }
+ ! { dg-final { scan-tree-dump-times "builtin_free" 16 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
+@@ -53,4 +53,3 @@ end block
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 32 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_14.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_14.f90
+@@ -12,4 +12,3 @@ subroutine bar(x)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump-times "data" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_15.f90
+@@ -4,4 +4,3 @@
+   if (any(x(:,:) .ne. reshape ((/ 3, 1, 4, 1 /), (/ 2, 2 /)))) call abort ()
+ end
+ ! { dg-final { scan-tree-dump-times "atmp" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_40.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_40.f90
+@@ -49,4 +49,3 @@ program main
+   if (abs(res - 8.1) > 1e-5) call abort
+ end program main
+ ! { dg-final { scan-tree-dump-times "while" 5 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_41.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_41.f90
+@@ -30,4 +30,3 @@ PROGRAM TEST
+ END
+ 
+ ! { dg-final { scan-tree-dump-times "realloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_43.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_43.f90
+@@ -10,4 +10,3 @@ program main
+   if (any ([a,b,c,d] < 0.2)) print *,"foo"
+ end program main
+ ! { dg-final { scan-tree-dump-times "\\\|\\\|" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_46.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_46.f90
+@@ -12,4 +12,3 @@ program main
+   if (abs (product([[11._dp, thirteen], a]) - 30030._dp) > 1e-8) call abort
+ end program main
+ ! { dg-final { scan-tree-dump-times "while" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_47.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_47.f90
+@@ -20,5 +20,4 @@ program main
+   end function eleven_ones
+ end program main
+ ! { dg-final { scan-tree-dump-times "while" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/array_constructor_49.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_constructor_49.f90
+@@ -10,4 +10,3 @@ program t
+   if (line /= ' 3 4 5 6') call abort
+ end program t
+ ! { dg-final { scan-tree-dump-times "__var" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memcpy_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memcpy_1.f90
+@@ -25,4 +25,3 @@ subroutine testl(a,b)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump-times "memcpy" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memcpy_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memcpy_2.f90
+@@ -17,4 +17,3 @@
+   z = y
+ end
+ ! { dg-final { scan-tree-dump-times "memcpy" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memcpy_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memcpy_3.f90
+@@ -12,4 +12,3 @@ subroutine bar(x)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump-times "memcpy|ref-all\[^\\n\]*ref-all" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memcpy_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memcpy_4.f90
+@@ -10,4 +10,3 @@
+   d = s
+ end
+ ! { dg-final { scan-tree-dump-times "memcpy" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memset_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memset_1.f90
+@@ -61,4 +61,3 @@ subroutine l3(a)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump-times "memset" 12 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_memset_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_memset_2.f90
+@@ -34,4 +34,3 @@ program test
+ end program
+ 
+ ! { dg-final { scan-tree-dump-times "= {}" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/array_section_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/array_section_2.f90
+@@ -13,4 +13,3 @@ program test
+    temp(1:size(a)) = a
+ end program
+ ! { dg-final { scan-tree-dump-times "MAX_EXPR\[^\n\t\]+ubound\[^\n\t\]+lbound" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/assign_10.f90
++++ b/src/gcc/testsuite/gfortran.dg/assign_10.f90
+@@ -25,4 +25,3 @@ end
+ !
+ ! { dg-final { scan-tree-dump-times "parm" 18 "original" } }
+ ! { dg-final { scan-tree-dump-times "atmp" 18 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/associate_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/associate_11.f90
+@@ -22,4 +22,3 @@ contains
+ end program bug
+ 
+ ! { dg-final { scan-tree-dump-times "foo ..integer.kind=4..0:. . restrict. a.data.;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/associate_6.f03
++++ b/src/gcc/testsuite/gfortran.dg/associate_6.f03
+@@ -35,4 +35,3 @@ PROGRAM main
+   END ASSOCIATE
+ END PROGRAM main
+ ! { dg-final { scan-tree-dump-times "func" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/associative_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/associative_1.f90
+@@ -7,4 +7,3 @@ SUBROUTINE S1(a)
+  a=1+a-1
+ END SUBROUTINE S1
+ ! { dg-final { scan-tree-dump-times " \\\+ " 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/assumed_charlen_substring_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/assumed_charlen_substring_1.f90
+@@ -7,4 +7,3 @@ subroutine foo(a,b)
+   if (a(1:) /= a(1:)) call do_not_use
+ end subroutine foo
+ ! { dg-final { scan-tree-dump-times "do_not_use" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/assumed_rank_10.f90
++++ b/src/gcc/testsuite/gfortran.dg/assumed_rank_10.f90
+@@ -103,4 +103,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "iia = .integer.kind=4. .. desc.\[0-9\]+.data;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "jjp = .struct t .. desc.\[0-9\]+.data;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "jja = .struct t .. desc.\[0-9\]+.data;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/assumed_rank_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/assumed_rank_12.f90
+@@ -17,5 +17,4 @@ end function f
+ end
+ 
+ ! { dg-final { scan-tree-dump " = f \\(\\);.*desc.0.dtype = .*;.*desc.0.data = .void .. D.*;.*sub \\(&desc.0\\);.*D.*= .integer.kind=4. .. desc.0.data;" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/assumed_type_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/assumed_type_2.f90
+@@ -175,4 +175,3 @@ end
+ ! { dg-final { scan-tree-dump-times "sub_array_shape \\(&array_class_t1_alloc._data," 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "sub_array_shape \\(&array_class_t1_ptr._data," 1 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/auto_dealloc_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/auto_dealloc_1.f90
+@@ -54,4 +54,3 @@ end module
+ 
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/auto_dealloc_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/auto_dealloc_2.f90
+@@ -28,4 +28,3 @@ end program
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 4 "original" } }
+ ! { dg-final { scan-tree-dump-times "x->_vptr->_final \\(" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/auto_save_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/auto_save_2.f90
+@@ -81,4 +81,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "  static integer\\\(kind=4\\\) a = 0;" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "  b = 0;" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/bind_c_array_params_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/bind_c_array_params_2.f90
+@@ -19,4 +19,3 @@ end
+ ! { dg-final { scan-assembler-times "\[ \t\]\[$,_0-9\]*myBindC" 1 { target { ! { hppa*-*-* } } } } }
+ ! { dg-final { scan-assembler-times "myBindC,%r2" 1 { target { hppa*-*-* } } } }
+ ! { dg-final { scan-tree-dump-times "test \\\(&parm\\." 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/bind_c_usage_13.f03
++++ b/src/gcc/testsuite/gfortran.dg/bind_c_usage_13.f03
+@@ -148,4 +148,3 @@ end program test
+ ! { dg-final { scan-tree-dump "subiso_val .121.;" "original" } }
+ ! { dg-final { scan-tree-dump "subiso2_val ..z..;" "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/bind_c_usage_14.f03
++++ b/src/gcc/testsuite/gfortran.dg/bind_c_usage_14.f03
+@@ -112,4 +112,3 @@ end subroutine sub6NoIso
+ ! { dg-final { scan-tree-dump "master.3.sub6noiso .0, 0B, 0B, 0B, b, a, 0, 0, 1, 1\\);" "original" } }
+ ! { dg-final { scan-tree-dump "master.3.sub6noiso .1, z, y, x, 0B, 0B, 1, 1, 0, 0\\);" "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/block_2.f08
++++ b/src/gcc/testsuite/gfortran.dg/block_2.f08
+@@ -36,4 +36,3 @@ PROGRAM main
+   END BLOCK
+ END PROGRAM main
+ ! { dg-final { scan-tree-dump-times "free \\(\\(void \\*\\) alloc_arr\\.data" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/bound_simplification_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/bound_simplification_3.f90
+@@ -20,4 +20,3 @@ end program testit
+ 
+ ! { dg-final { scan-tree-dump-times "bound" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "abort" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/c_f_pointer_tests_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_f_pointer_tests_3.f90
+@@ -39,4 +39,3 @@ end program test
+ ! Check c_f_procpointer
+ ! { dg-final { scan-tree-dump-times "  fprocptr = .integer.kind=4. .\\*<.*>. ... cfunptr;" 1 "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/c_funloc_tests_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_funloc_tests_7.f90
+@@ -18,5 +18,4 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "cfp =\[^;\]+ nocsub;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "fint =\[^;\]+ cfp;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/c_loc_test_22.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_loc_test_22.f90
+@@ -21,4 +21,3 @@ end
+ ! { dg-final { scan-tree-dump-times "parm.\[0-9\]+.data = \\(void .\\) &\\(.yyy.\[0-9\]+\\)\\\[D.\[0-9\]+ \\* 4\\\];" 1 "original" } }
+ 
+ ! { dg-final { scan-tree-dump-times "D.\[0-9\]+ = parm.\[0-9\]+.data;\[^;]+ptr\[1-4\] = D.\[0-9\]+;" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/c_ptr_tests_14.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_ptr_tests_14.f90
+@@ -49,4 +49,3 @@ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "bbb =" 0 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/c_ptr_tests_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_ptr_tests_15.f90
+@@ -51,4 +51,3 @@ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "bbb =" 0 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/c_ptr_tests_16.f90
++++ b/src/gcc/testsuite/gfortran.dg/c_ptr_tests_16.f90
+@@ -59,4 +59,3 @@ function fun()
+ end function fun 
+ 
+ ! { dg-final { scan-tree-dump-times "i_do_not_exist" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/char_cast_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/char_cast_1.f90
+@@ -28,4 +28,3 @@ end
+ ! The sign that all is well is that [S.6][1] appears twice.
+ ! Platform dependent variations are [S$6][1], [__S_6][1], [S___6][1]
+ ! { dg-final { scan-tree-dump-times "6\\\]\\\[1\\\]" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/char_cast_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/char_cast_2.f90
+@@ -23,4 +23,3 @@ end
+ ! Platform dependent variations are [S$5][1], [__S_5][1], [S___5][1]
+ ! so we count the occurrences of 5][1].
+ ! { dg-final { scan-tree-dump-times "5\\\]\\\[1\\\]" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/char_eoshift_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/char_eoshift_5.f90
+@@ -22,4 +22,3 @@ END
+ 
+ ! Check that _gfortran_eoshift* is called with 8 arguments:
+ ! { dg-final { scan-tree-dump "_gfortran_eoshift\[0-9_\]+char \\(\[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*, \[&a-zA-Z0-9._\]*\\)" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/char_length_17.f90
++++ b/src/gcc/testsuite/gfortran.dg/char_length_17.f90
+@@ -12,4 +12,3 @@ program main
+   if (c(i+1:i+1) /= 'b') call abort ()
+ end program main
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_1.f90
+@@ -33,5 +33,4 @@ subroutine yes
+ end subroutine yes
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_2.f90
+@@ -36,5 +36,4 @@ subroutine yes
+ end subroutine yes
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_3.f90
+@@ -27,5 +27,4 @@ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 6 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_memcmp" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_4.f90
+@@ -35,5 +35,4 @@ subroutine yes
+ end subroutine yes
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_5.f90
+@@ -17,5 +17,4 @@ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_concat_string" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_memcmp" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_6.f90
+@@ -16,5 +16,4 @@ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_concat_string" 4 "original" } }
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_7.f90
+@@ -22,5 +22,4 @@ subroutine no(a)
+ end subroutine no
+ 
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_8.f90
+@@ -10,5 +10,4 @@ program main
+   if (LGT(a,a)) call abort
+ end program main
+ ! { dg-final { scan-tree-dump-times "gfortran_compare_string" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/character_comparison_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/character_comparison_9.f90
+@@ -13,4 +13,3 @@ program main
+ end program main
+ ! { dg-final { scan-tree-dump-times "_gfortran_compare_string_char4" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_memcmp" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/chmod_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/chmod_1.f90
+@@ -2,7 +2,7 @@
+ ! { dg-options "-std=gnu" }
+ ! See PR38956.  Test fails on cygwin when user has Administrator rights
+   implicit none
+-  character(len=*), parameter :: n = "foobar_file"
++  character(len=*), parameter :: n = "foobar_file_chmod_1"
+   integer :: i
+ 
+   open (10,file=n)
+--- a/src/gcc/testsuite/gfortran.dg/chmod_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/chmod_2.f90
+@@ -2,7 +2,7 @@
+ ! { dg-options "-std=gnu" }
+ ! See PR38956.  Test fails on cygwin when user has Administrator rights
+   implicit none
+-  character(len=*), parameter :: n = "foobar_file"
++  character(len=*), parameter :: n = "foobar_file_chmod_2"
+   integer :: i
+ 
+   open (10,file=n)
+--- a/src/gcc/testsuite/gfortran.dg/chmod_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/chmod_3.f90
+@@ -2,7 +2,7 @@
+ ! { dg-options "-std=gnu -fdefault-integer-8" }
+ ! See PR38956.  Test fails on cygwin when user has Administrator rights
+   implicit none
+-  character(len=*), parameter :: n = "foobar_file"
++  character(len=*), parameter :: n = "foobar_file_chmod_3"
+   integer :: i
+ 
+   open (10,file=n)
+--- a/src/gcc/testsuite/gfortran.dg/class_19.f03
++++ b/src/gcc/testsuite/gfortran.dg/class_19.f03
+@@ -40,4 +40,3 @@ program main
+ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 12 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_51.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_51.f90
+@@ -22,4 +22,3 @@
+   End Program
+ 
+ ! { dg-final { scan-tree-dump-times "sub \\(&class" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_alias.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_alias.f90
+@@ -92,4 +92,3 @@ use test_module
+   deallocate (var_a)
+   deallocate (var_p)
+ end
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_allocate_14.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_allocate_14.f90
+@@ -27,5 +27,4 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "static struct __class_m_T_1_0a b = {._data={.data=0B}, ._vptr=&__vtab_m_T};" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "static struct __class_m_T_a y = {._data=0B, ._vptr=&__vtab_m_T};" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/class_allocate_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_allocate_15.f90
+@@ -25,4 +25,3 @@ contains
+   end
+ end
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_allocate_16.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_allocate_16.f90
+@@ -25,4 +25,3 @@
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_allocate_17.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_allocate_17.f90
+@@ -29,4 +29,3 @@ contains
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "fini_coarray" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_array_15.f03
++++ b/src/gcc/testsuite/gfortran.dg/class_array_15.f03
+@@ -116,4 +116,3 @@ subroutine pr54992  ! This test remains as the original.
+   if (loc (b) .ne. loc(bh%hostNode)) call abort
+ end
+ ! { dg-final { scan-tree-dump-times "builtin_free" 12 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_array_16.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_array_16.f90
+@@ -68,4 +68,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 5 "original" } }
+ ! { dg-final { scan-tree-dump-times "finally" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/class_array_17.f90
++++ b/src/gcc/testsuite/gfortran.dg/class_array_17.f90
+@@ -31,4 +31,3 @@ program test
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_malloc \\(40\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_11.f90
+@@ -61,4 +61,3 @@ subroutine boundsTest()
+ end subroutine boundsTest
+ 
+ ! { dg-final { scan-tree-dump-times "not_existing" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_12.f90
+@@ -74,4 +74,3 @@ end subroutine testAlloc5
+ ! { dg-final { scan-tree-dump-times "yyy.dim.4..lbound = .*ooo;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "yyy.dim.4..ubound"          0 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_30.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_30.f90
+@@ -12,4 +12,3 @@ program main
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "greeting.data = \\(void . restrict\\) __builtin_malloc \\(25\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_31.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_31.f90
+@@ -19,4 +19,3 @@ end
+ ! { dg-final { scan-tree-dump "a.y.x.data = D.\[0-9\]+.y.x.data;" "original" } }
+ ! { dg-final { scan-tree-dump "a.y.z._data.data = D.\[0-9\]+.y.z._data.data;" "original" } }
+ ! { dg-final { scan-tree-dump "a.y.d._data.data = D.\[0-9\]+.y.d._data.data;" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_32.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_32.f90
+@@ -14,5 +14,4 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "ubound.. = " 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "size.. = " 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/coarray_atomic_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_atomic_4.f90
+@@ -66,4 +66,3 @@ end
+ ! All calls should have a stat=0
+ ! { dg-final { scan-tree-dump-times "stat = 0;" 14 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_atomic_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_atomic_5.f90
+@@ -23,4 +23,3 @@ end program
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_atomic_define \\(caf_token.0, 0, 1, &value.., 0B, 1, 4\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_atomic_op \\(1, caf_token.0, 0, 1, &me, 0B, 0B, 1, 4\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_atomic_ref \\(caf_token.0, 0, 1, &me, 0B, 1, 4\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_11.f90
+@@ -12,4 +12,3 @@ program test
+ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "stat1 = 0;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_12.f90
+@@ -23,4 +23,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_broadcast \\(&desc.., _gfortran_caf_num_images \\(0, -1\\), &stat1, errmesg1, 6\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_broadcast \\(&val2, 4, &stat2, errmesg2, 7\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_broadcast \\(&desc.., res, &stat3, errmesg3, 8\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_15.f90
+@@ -17,4 +17,3 @@ contains
+ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "stat1 = 0;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_16.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_16.f90
+@@ -36,4 +36,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_reduce \\(&desc.., fr, 4, _gfortran_caf_num_images \\(0, -1\\), &stat1, errmesg1, 0, 6\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_reduce \\(&val2, gz, 0, 4, &stat2, errmesg2, 0, 7\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_reduce \\(&desc.., hc, 1, res, &stat3, errmesg3, 99, 8\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_4.f90
+@@ -16,5 +16,4 @@ end program test
+ ! { dg-final { scan-tree-dump-times "stat1 = 0;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "stat2 = 0;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "stat3 = 0;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_5.f90
+@@ -16,4 +16,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_max \\(&desc.., 0, &stat1, 0B, 0, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_min \\(&desc.., 0, &stat2, 0B, 0, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_sum \\(&desc.., 0, &stat3, 0B, 0\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_collectives_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_collectives_6.f90
+@@ -23,4 +23,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_max \\(&desc.., 0, &stat1, errmesg1, 0, 6\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_sum \\(&val2, 4, &stat2, errmesg2, 7\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_co_min \\(&desc.., res, &stat3, errmesg3, 99, 8\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_1.f90
+@@ -19,4 +19,3 @@
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy.token, &stat.., &errmsg, 200.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy.token, 0B, 0B, 0.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&xx.token, 0B, 0B, 0.;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_2.f90
+@@ -21,4 +21,3 @@
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy._data.token, &stat.., &errmsg, 200.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy._data.token, 0B, 0B, 0.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&xx._data.token, 0B, 0B, 0.;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_alloc_3.f90
+@@ -22,4 +22,3 @@ subroutine test
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy._data.token, &stat.., &errmsg, 200.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&yy._data.token, 0B, 0B, 0.;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister .&xx._data.token, 0B, 0B, 0.;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_comm_1.f90
+@@ -44,4 +44,3 @@ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_get \\\(caf_token.1, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) b, 1, &parm.\[0-9\]+, 0B, &p, 4, 4, 0\\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_sendget \\\(caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, caf_token.0, \\\(integer\\\(kind=\[48\]\\\)\\\) parm.\[0-9\]+.data - \\\(integer\\\(kind=\[48\]\\\)\\\) a, 1, &parm.\[0-9\]+, 0B, 4, 4, 0\\\);" 1 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_move_alloc_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_move_alloc_1.f90
+@@ -20,4 +20,3 @@ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_deregister" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "\\*bb = \\*aa" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "\\*dd = \\*cc" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_realloc_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_realloc_1.f90
+@@ -32,4 +32,3 @@ end
+ ! But copy "ii" and "CAF":
+ ! { dg-final { scan-tree-dump-times "__builtin_memcpy|= MEM" 2 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_this_image_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_this_image_1.f90
+@@ -24,4 +24,3 @@ end
+ ! { dg-final { scan-tree-dump-times "mythis_image = _gfortran_caf_this_image \\(0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar \\(x, caf_token.., 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_init \\(&argc, &argv\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_this_image_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_this_image_2.f90
+@@ -24,4 +24,3 @@ end
+ ! { dg-final { scan-tree-dump-times "mythis_image = _gfortran_caf_this_image \\(0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar \\(&parm.\[0-9\]+, caf_token.\[0-9\]+, \\(integer\\(kind=\[48\]\\)\\) parm.\[0-9\]+.data - \\(integer\\(kind=\[48\]\\)\\) x\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_init \\(&argc, &argv\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_token_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_token_1.f90
+@@ -85,4 +85,3 @@ end program main
+ !
+ ! { dg-final { scan-tree-dump-times "sub_opt \\(.integer.kind=4. .. caf, caf_token.\[0-9\]+, 0\\)" 1 "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_token_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_token_2.f90
+@@ -112,4 +112,3 @@ end program main
+ !
+ ! { dg-final { scan-tree-dump-times "sub_opt \\(.integer.kind=4. .. caf.data, caf.token, 0\\)" 1 "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_token_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_token_3.f90
+@@ -10,4 +10,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "caf.data = \\(void . restrict\\) _gfortran_caf_register \\(4, 1, &caf.token, 0B, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "caf_scalar.data = \\(void . restrict\\) _gfortran_caf_register \\(4, 1, &caf_scalar.token, 0B, 0B, 0\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lib_token_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lib_token_4.f90
+@@ -49,4 +49,3 @@ end program test_caf
+ !
+ ! { dg-final { scan-tree-dump-times "foo \\(&parm.\[0-9\]+, &a, &C.\[0-9\]+, caf_token.\[0-9\]+, \\(integer\\(kind=.\\)\\) parm.\[0-9\]+.data - \\(integer\\(kind=.\\)\\) b, a.token, 0\\);" 1 "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_lock_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_lock_7.f90
+@@ -44,4 +44,3 @@ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_lock \\(four.token, 1 - \\(integer\\(kind=4\\)\\) four.dim\\\[0\\\].lbound, 7 - \\(integer\\(kind=4\\)\\) four.dim\\\[1\\\].lbound, &acquired.., &ii, 0B, 0\\);|_gfortran_caf_lock \\(four.token, 1 - four.dim\\\[0\\\].lbound, 7 - four.dim\\\[1\\\].lbound, &acquired.., &ii, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_unlock \\(four.token, 2 - \\(integer\\(kind=4\\)\\) four.dim\\\[0\\\].lbound, 8 - \\(integer\\(kind=4\\)\\) four.dim\\\[1\\\].lbound, 0B, 0B, 0\\);|_gfortran_caf_unlock \\(four.token, 2 - four.dim\\\[0\\\].lbound, 8 - four.dim\\\[1\\\].lbound, 0B, 0B, 0\\);" 1 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_poly_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_poly_4.f90
+@@ -20,4 +20,3 @@ call sub(var%x)
+ end subroutine test
+ 
+ ! { dg-final { scan-tree-dump-times "sub \\(\\(real\\(kind=4\\) \\*\\) var.x.data, var.x.token, 0\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_poly_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_poly_5.f90
+@@ -11,4 +11,3 @@ allocate(x%x[*])
+ end subroutine test
+ 
+ ! { dg-final { scan-tree-dump-times "x->_data->x.data = _gfortran_caf_register \\(4, 1, &x->_data->x.token, 0B, 0B, 0\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_poly_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_poly_6.f90
+@@ -19,4 +19,3 @@ end
+ ! { dg-final { scan-tree-dump-times "bar \\(struct __class_MAIN___T_0_1t \\* x, void \\* restrict caf_token.., integer\\(kind=\[48\]\\) caf_offset..\\)" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar \\(0B, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "foo \\(&class.., y._data._data.token, \\(integer\\(kind=\[48\]\\)\\) class..._data.data - \\(integer\\(kind=\[48\]\\)\\) y._data._data.data\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_poly_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_poly_7.f90
+@@ -19,4 +19,3 @@ end
+ ! { dg-final { scan-tree-dump-times "bar \\(struct __class_MAIN___T_1_1t \\* x, void \\* restrict caf_token.., integer\\(kind=\[48\]\\) caf_offset..\\)" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar \\(0B, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "foo \\(&class.., y._data._data.token, \\(integer\\(kind=\[48\]\\)\\) class..._data.data - \\(integer\\(kind=\[48\]\\)\\) y._data._data.data\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_poly_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_poly_8.f90
+@@ -19,4 +19,3 @@ end
+ ! { dg-final { scan-tree-dump-times "bar \\(struct __class_MAIN___T_1_1t \\* x, void \\* restrict caf_token.., integer\\(kind=\[48\]\\) caf_offset..\\)" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar \\(0B, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "foo \\(&class.., y._data._data.token, \\(integer\\(kind=\[48\]\\)\\) class..._data.data - \\(integer\\(kind=\[48\]\\)\\) y._data._data.data\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_sync_memory.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_sync_memory.f90
+@@ -16,4 +16,3 @@ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_sync_memory \\(&stat, 0B, 0\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_sync_memory \\(0B, &&msg, 42\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_caf_sync_memory \\(&stat, &&msg, 42\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_this_image_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_this_image_1.f90
+@@ -17,4 +17,3 @@ end
+ ! { dg-final { scan-tree-dump-times "k3 = 1;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "k4 = 0;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "k5 = 1;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/coarray_this_image_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/coarray_this_image_2.f90
+@@ -17,4 +17,3 @@ end
+ ! { dg-final { scan-tree-dump-times "k3 = _gfortran_caf_num_images \\(7, -1\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "k4 = _gfortran_caf_num_images \\(8, 1\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "k5 = _gfortran_caf_num_images \\(0, 0\\);" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/complex_intrinsic_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/complex_intrinsic_7.f90
+@@ -41,4 +41,3 @@ if (abs(tanh(z81_1) - cmplx(1.0839233273386946_8,0.27175258531951174_8,8)) > eps
+ 
+ end
+ ! { dg-final { scan-tree-dump-times "abort" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/constructor_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/constructor_2.f90
+@@ -70,4 +70,3 @@ program main
+   if (b%bar /= 4) call abort ()
+ end program main
+ 
+-! { dg-final { cleanup-tree-dump "foo_module bar_module" } }
+--- a/src/gcc/testsuite/gfortran.dg/contiguous_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/contiguous_3.f90
+@@ -62,4 +62,3 @@ end subroutine test3
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_unpack .&parm" 2 "original" } }
+ 
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/default_format_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/default_format_2.f90
+@@ -1,5 +1,5 @@
+-! { dg-require-effective-target fortran_large_real }
+ ! { dg-do run { xfail powerpc*-apple-darwin* powerpc*-*-linux* } }
++! { dg-require-effective-target fortran_large_real }
+ ! Test XFAILed on these platforms because the system's printf() lacks
+ ! proper support for denormalized long doubles. See PR24685
+ !
+--- a/src/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/default_format_denormal_2.f90
+@@ -1,5 +1,5 @@
+-! { dg-require-effective-target fortran_large_real }
+ ! { dg-do run { xfail powerpc*-apple-darwin* } }
++! { dg-require-effective-target fortran_large_real }
+ ! Test XFAILed on this platform because the system's printf() lacks
+ ! proper support for denormalized long doubles. See PR24685
+ !
+--- a/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/default_initialization_5.f90
+@@ -62,4 +62,3 @@ end program
+ 
+ ! { dg-final { scan-tree-dump-times "my_data.head = 0B" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "my_data.head = &tgt" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/default_numeric_type_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/default_numeric_type_1.f90
+@@ -16,4 +16,3 @@ end subroutine
+ program testprog
+   call mysub1((/1.,2./),(/1.,2.,3./),-2, 3.2)
+ end
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_10.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_10.f90
+@@ -10,4 +10,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_11.f90
+@@ -10,4 +10,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_12.f90
+@@ -9,4 +9,3 @@ subroutine foo(a,b)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_13.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_13.f90
+@@ -10,4 +10,3 @@
+    end where
+    end
+ ! { dg-final { scan-tree-dump-times "temp" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_14.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_14.f90
+@@ -9,4 +9,3 @@ subroutine foo(a,i)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_15.f90
+@@ -9,4 +9,3 @@ subroutine foo(a,i)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_16.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_16.f90
+@@ -9,4 +9,3 @@ subroutine foo(a,i)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_17.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_17.f90
+@@ -9,4 +9,3 @@ subroutine foo(a,i)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_18.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_18.f90
+@@ -17,4 +17,3 @@ subroutine foo(a,i,j,k)
+   a(k:k+2) = a(k+1:k+3)
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_20.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_20.f90
+@@ -7,4 +7,3 @@
+   endwhere
+ end
+ ! { dg-final { scan-tree-dump-times "temp" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_26.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_26.f90
+@@ -49,4 +49,3 @@ END MODULE M1
+ end
+ ! { dg-final { scan-tree-dump-times "&a" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "pack" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_4.f90
+@@ -8,4 +8,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_5.f90
+@@ -8,4 +8,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_6.f90
+@@ -8,4 +8,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_7.f90
+@@ -8,4 +8,3 @@ subroutine foo(a)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_8.f90
+@@ -10,4 +10,3 @@ subroutine foo(a,i,j)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "temp" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dependency_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/dependency_9.f90
+@@ -10,4 +10,3 @@ subroutine foo(a,i,j)
+   endwhere
+ end subroutine
+ ! { dg-final { scan-tree-dump-times "malloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/derived_array_intrinisics_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/derived_array_intrinisics_1.f90
+@@ -28,4 +28,3 @@
+     j = total
+   end
+ ! { dg-final { scan-tree-dump-times "j = 50" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/derived_constructor_char_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/derived_constructor_char_1.f90
+@@ -47,4 +47,3 @@ end subroutine
+ ! { dg-final { scan-tree-dump-times "four = ..txt=..ABC  ., .ZYX  ...;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "five = ..txt=..AbCdE., .ZyXwV...;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "six = ..txt=..aBcDe., .zYxWv...;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/direct_io_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/direct_io_8.f90
+@@ -7,7 +7,7 @@ program main
+   i=44
+   ir = -42
+ 
+-  open(11,file="foo.dat")
++  open(11,file="foo_direct_io_8.dat")
+   ! Try a direct access read on a formatted sequential rile
+   READ (11, REC = I, ERR = 99) TEMP_CHANGES
+   call abort
+--- a/src/gcc/testsuite/gfortran.dg/dot_product_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/dot_product_2.f90
+@@ -35,4 +35,3 @@ end
+ 
+ 
+ ! { dg-final { scan-tree-dump-not "abort" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/dot_product_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/dot_product_3.f90
+@@ -12,4 +12,3 @@ program main
+    stop
+ end program main
+ ! { dg-final { scan-tree-dump-times "8\\.0e\\+0" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/elemental_dependency_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/elemental_dependency_1.f90
+@@ -80,4 +80,3 @@ CONTAINS
+ END PROGRAM main
+ 
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_unpack" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/elemental_dependency_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/elemental_dependency_3.f90
+@@ -25,4 +25,3 @@ program gfcbu84_main
+   end subroutine tq_tvgh
+ end program gfcbu84_main
+ ! { dg-final { scan-tree-dump-times "atmp" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/elemental_dependency_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/elemental_dependency_4.f90
+@@ -164,4 +164,3 @@ CONTAINS
+     END FUNCTION Romeo
+ END PROGRAM Main
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/extends_11.f03
++++ b/src/gcc/testsuite/gfortran.dg/extends_11.f03
+@@ -38,4 +38,3 @@
+ end
+ 
+ ! { dg-final { scan-tree-dump-times " +recruit\\.service\\.education\\.person\\.ss =" 8 "original"} }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/extends_14.f03
++++ b/src/gcc/testsuite/gfortran.dg/extends_14.f03
+@@ -26,4 +26,3 @@ program evolve_aflow
+ end program 
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/extends_type_of_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/extends_type_of_3.f90
+@@ -108,4 +108,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "abort" 13 "original" } }
+ ! { dg-final { scan-tree-dump-times "should_not_exist" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/f2003_inquire_1.f03
++++ b/src/gcc/testsuite/gfortran.dg/f2003_inquire_1.f03
+@@ -4,7 +4,7 @@ character(25) :: sround, ssign, sasynchronous, sdecimal, sencoding
+ integer :: vsize, vid
+ logical :: vpending
+ 
+-open(10, file='mydata', asynchronous="yes", blank="null", &
++open(10, file='mydata_f2003_inquire_1', asynchronous="yes", blank="null", &
+ & decimal="comma", encoding="utf-8", sign="plus")
+ 
+ inquire(unit=10, round=sround, sign=ssign, size=vsize, id=vid, &
+--- a/src/gcc/testsuite/gfortran.dg/f2003_io_1.f03
++++ b/src/gcc/testsuite/gfortran.dg/f2003_io_1.f03
+@@ -8,7 +8,7 @@ character(25) :: msg
+ 
+ a = 23.45
+ b = 0.0
+-open(10, file='mydata', asynchronous="yes", blank="null")
++open(10, file='mydata_f2003_io_1', asynchronous="yes", blank="null")
+ 
+ write(10,'(10f8.3)', asynchronous="yes", decimal="comma", id=j) a
+ rewind(10)
+--- a/src/gcc/testsuite/gfortran.dg/f2003_io_2.f03
++++ b/src/gcc/testsuite/gfortran.dg/f2003_io_2.f03
+@@ -7,7 +7,7 @@ character(25) :: msg
+ real, dimension(10) :: a, b
+ 
+ a = 43.21
+-open(10, file='mydata', asynchronous="yes")
++open(10, file='mydata_f2003_io_2', asynchronous="yes")
+ write(10,'(10f8.3)', asynchronous="yes", decimal="comma") a
+ rewind(10)
+ read(10,'(10f8.3)', asynchronous="yes", decimal="comma", id=idvar) b
+--- a/src/gcc/testsuite/gfortran.dg/f2003_io_8.f03
++++ b/src/gcc/testsuite/gfortran.dg/f2003_io_8.f03
+@@ -6,7 +6,7 @@ real :: c
+ integer :: istat, j
+ character(25) :: msg
+ 
+-open(10, file='mydata', asynchronous="yes", blank="null")
++open(10, file='mydata_f2003_io_8', asynchronous="yes", blank="null")
+ write(10,'(10f8.3)', asynchronous='no', decimal="comma", id=j) a ! { dg-error "must be with ASYNCHRONOUS=" }
+ read(10,'(10f8.3)', id=j, decimal="comma", blank="zero") b ! { dg-error "must be with ASYNCHRONOUS=" }
+ read(10,'(10f8.3)', asynchronous=msg, decimal="comma", blank="zero") b ! { dg-error "must be an initialization expression" }
+--- a/src/gcc/testsuite/gfortran.dg/finalize_10.f90
++++ b/src/gcc/testsuite/gfortran.dg/finalize_10.f90
+@@ -36,4 +36,3 @@ end subroutine foo
+ ! { dg-final { scan-tree-dump-times "desc.\[0-9\]+.data = \\(void \\* restrict\\) bb;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__final_m_T2 \\(&desc.\[0-9\]+, 0, 0\\);" 1 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/finalize_18.f90
++++ b/src/gcc/testsuite/gfortran.dg/finalize_18.f90
+@@ -44,4 +44,3 @@ end
+ ! { dg-final { scan-tree-dump "y.cc._vptr->_final \\(&desc.\[0-9\]+, (\\(integer\\(kind=8\\)\\) )?y.cc._vptr->_size, 1\\);" "original" } }
+ ! { dg-final { scan-tree-dump "y.dd._vptr->_final \\(&y.dd._data, (\\(integer\\(kind=8\\)\\) )?y.dd._vptr->_size, 1\\);" "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/finalize_21.f90
++++ b/src/gcc/testsuite/gfortran.dg/finalize_21.f90
+@@ -9,4 +9,3 @@ class(*), allocatable :: var
+ end
+ 
+ ! { dg-final { scan-tree-dump "static struct __vtype__STAR __vtab__STAR = {._hash=0, ._size=., ._extends=0B, ._def_init=0B, ._copy=0B, ._final=0B};" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/finalize_28.f90
++++ b/src/gcc/testsuite/gfortran.dg/finalize_28.f90
+@@ -22,4 +22,3 @@ contains
+   end subroutine coo_dump_edges
+ end module coo_graphs
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/fmt_en.f90
++++ b/src/gcc/testsuite/gfortran.dg/fmt_en.f90
+@@ -183,4 +183,3 @@ contains
+     end subroutine
+ end program
+ ! { dg-final { scan-file fmt_en.res "All kinds rounded to nearest" { xfail hppa*-*-hpux* } } }
+-! { dg-final { cleanup-saved-temps } }
+--- a/src/gcc/testsuite/gfortran.dg/forall_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/forall_15.f90
+@@ -23,4 +23,3 @@ program test
+ end program test
+ ! { dg-final { scan-tree-dump-times "__builtin_cos" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_sin" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/forall_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/forall_8.f90
+@@ -6,4 +6,3 @@
+   end forall
+   end
+ ! { dg-final { scan-tree-dump-times "temp" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/forall_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/forall_9.f90
+@@ -6,4 +6,3 @@
+   end forall
+   end
+ ! { dg-final { scan-tree-dump-times "temp" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_1.f90
+@@ -44,4 +44,3 @@ end program main
+ ! { dg-final { scan-tree-dump-times "element" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "mypure" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "elem_impure" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_2.f90
+@@ -44,4 +44,3 @@ end program main
+ ! { dg-final { scan-tree-dump-times "element" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "mypure" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "elem_impure" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_6.f90
+@@ -11,6 +11,5 @@ program main
+   ENDDO
+ END program main
+ ! { dg-final { scan-tree-dump-times "mypure" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+ 
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_7.f90
+@@ -44,4 +44,3 @@ end subroutine xx
+ ! { dg-final { scan-tree-dump-times "mypure" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "elem_impure" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "sum_r4" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_8.f90
+@@ -32,4 +32,3 @@ program main
+ end program main
+ ! { dg-final { scan-tree-dump-times "myfunc" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "mychar" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/function_optimize_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/function_optimize_9.f90
+@@ -20,4 +20,3 @@ program main
+   print *,a
+ end program main
+ ! { dg-final { scan-tree-dump-times "purefunc" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/generic_18.f90
++++ b/src/gcc/testsuite/gfortran.dg/generic_18.f90
+@@ -50,4 +50,3 @@ PROGRAM MakeAChoice
+ END PROGRAM MakeAChoice
+ ! { dg-final { scan-tree-dump-times "specproc" 3 "original" } }
+ ! { dg-final { scan-tree-dump-times "elemproc" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-1.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-1.f95
+@@ -19,4 +19,3 @@ end function f
+ ! Unsuitable to be handled as a builtin, so we're expecting four calls.
+ ! { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 4 "expand" } }
+ 
+-! { dg-final { cleanup-rtl-dump "expand" } }
+--- a/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-2-off.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-2-off.f95
+@@ -36,4 +36,3 @@ end function f
+ ! Without -fopenacc, we're expecting one call.
+ ! { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 1 "expand" } }
+ 
+-! { dg-final { cleanup-rtl-dump "expand" } }
+--- a/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-2.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/acc_on_device-2.f95
+@@ -37,4 +37,3 @@ end function f
+ ! TODO: not working.
+ ! { dg-final { scan-rtl-dump-times "\\\(call \[^\\n\]* acc_on_device" 0 "expand" { xfail *-*-* } } }
+ 
+-! { dg-final { cleanup-rtl-dump "expand" } }
+--- a/src/gcc/testsuite/gfortran.dg/goacc/data-tree.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/data-tree.f95
+@@ -27,4 +27,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "map\\(alloc:t\\)" 1 "original" } } 
+ 
+ ! { dg-final { scan-tree-dump-times "map\\(force_deviceptr:u\\)" 1 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/declare-1.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/declare-1.f95
+@@ -17,4 +17,3 @@ contains
+ end program test
+ ! { dg-prune-output "unimplemented" }
+ ! { dg-final { scan-tree-dump-times "pragma acc declare map\\(force_tofrom:i\\)" 2 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/host_data-tree.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/host_data-tree.f95
+@@ -10,4 +10,3 @@ program test
+ end program test
+ ! { dg-prune-output "unimplemented" }
+ ! { dg-final { scan-tree-dump-times "pragma acc host_data use_device\\(i\\)" 1 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/kernels-tree.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/kernels-tree.f95
+@@ -29,4 +29,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "map\\(alloc:t\\)" 1 "original" } } 
+ 
+ ! { dg-final { scan-tree-dump-times "map\\(force_deviceptr:u\\)" 1 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/loop-tree-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/goacc/loop-tree-1.f90
+@@ -45,4 +45,3 @@ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "private\\(m\\)" 1 "original" } } 
+ ! { dg-final { scan-tree-dump-times "reduction\\(\\+:sum\\)" 1 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/parallel-tree.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/parallel-tree.f95
+@@ -38,4 +38,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "map\\(force_deviceptr:u\\)" 1 "original" } } 
+ ! { dg-final { scan-tree-dump-times "private\\(v\\)" 1 "original" } } 
+ ! { dg-final { scan-tree-dump-times "firstprivate\\(w\\)" 1 "original" } } 
+-! { dg-final { cleanup-tree-dump "original" } } 
+--- a/src/gcc/testsuite/gfortran.dg/goacc/private-1.f95
++++ b/src/gcc/testsuite/gfortran.dg/goacc/private-1.f95
+@@ -35,4 +35,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "private\\(i\\)" 3 "omplower" } }
+ ! { dg-final { scan-tree-dump-times "private\\(j\\)" 2 "omplower" } }
+ ! { dg-final { scan-tree-dump-times "private\\(k\\)" 1 "omplower" } }
+-! { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/do-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/do-1.f90
+@@ -23,4 +23,3 @@ end subroutine bar
+ 
+ ! { dg-final { scan-tree-dump-times "GOMP_parallel_loop_dynamic_start" 2 "omplower" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "GOMP_parallel_loop_guided_start" 2 "omplower" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/omp_parse1.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/omp_parse1.f90
+@@ -17,4 +17,3 @@ call bar
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "pragma omp parallel" 3 "omplower" } }
+-! { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/omp_parse2.f
++++ b/src/gcc/testsuite/gfortran.dg/gomp/omp_parse2.f
+@@ -11,4 +11,3 @@ C$omp 	 	p
+       end
+ 
+ ! { dg-final { scan-tree-dump-times "pragma omp parallel" 2 "omplower" } }
+-! { dg-final { cleanup-tree-dump "omplower" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-1.f90
+@@ -134,4 +134,3 @@ end
+ ! { dg-final { scan-tree-dump-times "pragma omp simd" 6 "original" } }
+ ! { dg-final { scan-tree-dump-times "pragma omp" 6 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-2.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-2.f90
+@@ -25,4 +25,3 @@ include 'openmp-simd-1.f90'
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_cancel" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_taskyield" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_taskwait" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-3.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/openmp-simd-3.f90
+@@ -25,4 +25,3 @@ include 'openmp-simd-1.f90'
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_cancel" 2 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_taskyield" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_GOMP_taskwait" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/workshare2.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/workshare2.f90
+@@ -50,4 +50,3 @@ program foo
+ 
+ end program foo
+ ! { dg-final { scan-tree-dump-times "__var" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/gomp/workshare3.f90
++++ b/src/gcc/testsuite/gfortran.dg/gomp/workshare3.f90
+@@ -36,4 +36,3 @@ program foo
+ 
+ end program foo
+ ! { dg-final { scan-tree-dump-times "__builtin_cosf" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/block-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/block-1.f90
+@@ -9,5 +9,4 @@ end subroutine matrix_multiply
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/graphite/block-2.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/block-2.f
+@@ -18,4 +18,3 @@
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 2" 1 "graphite" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "will be loop blocked" 2 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/block-3.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/block-3.f90
+@@ -14,5 +14,4 @@ end subroutine matrix_multiply
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/graphite/block-4.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/block-4.f90
+@@ -17,5 +17,4 @@ end subroutine matrix_multiply
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/graphite/interchange-1.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/interchange-1.f
+@@ -42,4 +42,3 @@
+ ! kernel from bwaves.
+ 
+ ! { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/interchange-2.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/interchange-2.f
+@@ -40,4 +40,3 @@
+ ! as the number of iterations for f4 is not known.
+ 
+ ! { dg-final { scan-tree-dump-times "will be interchanged" 0 "graphite" } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/interchange-3.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/interchange-3.f90
+@@ -25,4 +25,3 @@ Program FOO
+ end Program FOO
+ 
+ ! { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/interchange-4.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/interchange-4.f
+@@ -26,4 +26,3 @@ c
+       end
+ 
+ ! { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/interchange-5.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/interchange-5.f
+@@ -27,4 +27,3 @@ c
+       end
+ 
+ ! { dg-final { scan-tree-dump-times "will be interchanged" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/pr14741.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/pr14741.f90
+@@ -26,4 +26,3 @@ END SUBROUTINE mult
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" { xfail *-*-* } } }
+ ! { dg-final { scan-tree-dump-times "will be loop blocked" 1 "graphite" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "graphite" } }
+--- a/src/gcc/testsuite/gfortran.dg/graphite/scop-1.f
++++ b/src/gcc/testsuite/gfortran.dg/graphite/scop-1.f
+@@ -10,4 +10,3 @@
+       end
+ 
+ ! { dg-final { scan-tree-dump-times "number of SCoPs: 1" 1 "graphite" { xfail *-*-* } } } 
+-! { dg-final { cleanup-tree-dump "graphite" } } 
+--- a/src/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
++++ b/src/gcc/testsuite/gfortran.dg/graphite/vect-pr40979.f90
+@@ -24,4 +24,3 @@ contains
+ end module mqc_m
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/implicit_pure_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/implicit_pure_3.f90
+@@ -106,4 +106,3 @@ END MODULE
+ 
+ ! { dg-final { scan-module-absence "parallel_rng_types" "IMPLICIT_PURE" } }
+ ! { dg-final { scan-tree-dump-times "rn32 \\(rng_stream" 3 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/index_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/index_2.f90
+@@ -53,4 +53,3 @@
+ 
+ ! { dg-final { scan-tree-dump-times "if ..integer.kind=1.. _gfortran_string_index" 6 "original" } }
+ ! { dg-final { scan-tree-dump-times "if ..integer.kind=1.. _gfortran_string_scan" 6 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/inline_product_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/inline_product_1.f90
+@@ -29,4 +29,3 @@ end
+ ! { dg-final { scan-tree-dump-times "struct array._integer\\(kind=4\\) atmp" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "struct array\[^\\n\]*atmp" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_product_" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/inline_sum_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/inline_sum_1.f90
+@@ -191,4 +191,3 @@ end
+ ! { dg-final { scan-tree-dump-times "struct array._integer\\(kind=4\\) atmp" 13 "original" } }
+ ! { dg-final { scan-tree-dump-times "struct array\[^\\n\]*atmp" 13 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_sum_" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/inline_transpose_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/inline_transpose_1.f90
+@@ -234,5 +234,3 @@ end subroutine titi
+ ! { # Commented out as failing at -O0: dg-final { scan-tree-dump-times "_gfortran_abort" 37 "optimized" } }
+ !
+ ! cleanup
+-! { dg-final { cleanup-tree-dump "original" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/inquire_size.f90
++++ b/src/gcc/testsuite/gfortran.dg/inquire_size.f90
+@@ -4,7 +4,7 @@ integer :: i
+ character(30) :: aname = "noname"
+ logical :: is_named
+ 
+-open(25, file="testfile", status="replace", access="stream", form="unformatted")
++open(25, file="testfile_inquire_size", status="replace", access="stream", form="unformatted")
+ do i=1,100
+   write(25) i, "abcdefghijklmnopqrstuvwxyz"
+ enddo
+@@ -14,16 +14,16 @@ enddo
+ 
+ inquire(unit=25, named=is_named, name=aname, size=i)
+ if (.not.is_named) call abort
+-if (aname /= "testfile") call abort
++if (aname /= "testfile_inquire_size") call abort
+ if (i /= 3000) call abort
+ 
+-inquire(file="testfile", size=i)
++inquire(file="testfile_inquire_size", size=i)
+ if (.not.is_named) call abort
+-if (aname /= "testfile") call abort
++if (aname /= "testfile_inquire_size") call abort
+ if (i /= 3000) call abort
+ 
+ close(25, status="delete")
+-inquire(file="testfile", size=i)
++inquire(file="testfile_inquire_size", size=i)
+ if (i /= -1)  call abort
+ end
+ 
+--- a/src/gcc/testsuite/gfortran.dg/intent_optimize_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/intent_optimize_1.f90
+@@ -21,4 +21,3 @@ if (y /= 5) call does_not_exist ()
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "does_not_exist" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_11.f90
+@@ -15,4 +15,3 @@
+   call foo (ot(0:time_steps)) ! Was an unnecessary temporary
+   end
+ ! { dg-final { scan-tree-dump-times "unpack" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_12.f90
+@@ -56,4 +56,3 @@ subroutine bar(x)
+   if (any (x(1:3) /= [1,3,5])) call abort ()
+ end subroutine bar
+ ! { dg-final { scan-tree-dump-times "unpack" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_4.f90
+@@ -28,4 +28,3 @@ END
+ 
+ ! { dg-final { scan-tree-dump-times "a != 0B \\? \\\(.*\\\) _gfortran_internal_pack" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "if \\(a != 0B &&" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_5.f90
+@@ -18,4 +18,3 @@ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_pack" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_unpack" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_6.f90
+@@ -55,4 +55,3 @@ END SUBROUTINE S2
+  call s2
+ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_pack" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_7.f90
+@@ -31,4 +31,3 @@ CONTAINS
+   END FUNCTION S2
+ END MODULE M1
+ ! { dg-final { scan-tree-dump-times "pack" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/internal_pack_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/internal_pack_9.f90
+@@ -38,4 +38,3 @@ subroutine foobar
+   call foo(A(:,3:7:-1)) ! temporary(3) OK because of stride
+ end
+ ! { dg-final { scan-tree-dump-times "unpack" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/intrinsic_optional_char_arg_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/intrinsic_optional_char_arg_1.f90
+@@ -29,4 +29,3 @@ END PROGRAM main
+ ! { dg-final { scan-tree-dump "_eoshift\[0-9_\]+char \\(\[&a-zA-Z0-9._, \]+, 1, 0\\)" "original" } }
+ ! { dg-final { scan-tree-dump "_reshape\[0-9_\]+char \\(\[&a-zA-Z0-9._, \]+, 1, 0\\)" "original" } }
+ ! { dg-final { scan-tree-dump "_pack\[0-9_\]+char \\(\[&a-zA-Z0-9._, \]+, 1, 0\\)" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/intrinsic_size_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/intrinsic_size_3.f90
+@@ -23,4 +23,3 @@ program bug
+ end program bug
+ 
+ ! { dg-final { scan-tree-dump-times "iszs = \\(integer\\(kind=2\\)\\) MAX_EXPR <\\(D.\[0-9\]+->dim.0..ubound - D.\[0-9\]+->dim.0..lbound\\) \\+ 1, 0>;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/intrinsic_std_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/intrinsic_std_6.f90
+@@ -38,4 +38,3 @@ END SUBROUTINE implicit_type
+ ! { dg-final { scan-tree-dump " abort " "original" } }
+ ! { dg-final { scan-tree-dump " asinh " "original" } }
+ ! { dg-final { scan-tree-dump " acosh " "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/ipcp-array-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/ipcp-array-1.f90
+@@ -13,7 +13,5 @@ end
+ 
+ ! { dg-final { scan-ipa-dump "Creating a specialized node of foo" "cp" } }
+ ! { dg-final { scan-ipa-dump-times "Aggregate replacements\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=" 2 "cp" } }
+-! { dg-final { cleanup-ipa-dump "cp" } }
+ ! { dg-final { scan-tree-dump-not "stride;" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "lbound;" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/ishft_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/ishft_4.f90
+@@ -37,4 +37,3 @@ end program
+ !
+ ! { dg-final { scan-tree-dump-times "foo *\\\(\\\)" 5 "original" } }
+ ! { dg-final { scan-tree-dump-times "bar *\\\(\\\)" 5 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/iso_c_binding_param_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/iso_c_binding_param_2.f90
+@@ -17,4 +17,3 @@ if (c_float128_complex >= 0 .and. c_float128_complex /= 16) call unreachable()
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "unreachable" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/iso_fortran_env_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/iso_fortran_env_5.f90
+@@ -23,5 +23,4 @@ if (STAT_LOCKED == STAT_UNLOCKED) call abort()
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "abort" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/ldist-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/ldist-1.f90
+@@ -33,4 +33,3 @@ end Subroutine PADEC
+ ! locality heuristic, this loop should not be split.
+ 
+ ! { dg-final { scan-tree-dump-not "distributed: split to" "ldist" } }
+-! { dg-final { cleanup-tree-dump "ldist" } }
+--- a/src/gcc/testsuite/gfortran.dg/ldist-pr45199.f
++++ b/src/gcc/testsuite/gfortran.dg/ldist-pr45199.f
+@@ -24,4 +24,3 @@
+ 
+ ! { dg-final { scan-tree-dump "distributed: split to 0 loops and 9 library calls" "ldist" } }
+ ! { dg-final { scan-tree-dump-times "generated memset zero" 9 "ldist" } }
+-! { dg-final { cleanup-tree-dump "ldist" } }
+--- a/src/gcc/testsuite/gfortran.dg/leadz_trailz_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/leadz_trailz_3.f90
+@@ -27,4 +27,3 @@ end program
+ !   -- plus as many times as the function is called
+ !
+ ! { dg-final { scan-tree-dump-times "foo *\\\(\\\)" 7 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/matmul_9.f90
++++ b/src/gcc/testsuite/gfortran.dg/matmul_9.f90
+@@ -43,5 +43,4 @@ program name
+ end program name
+ 
+ ! { dg-final { scan-tree-dump-times "matmul" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/merge_init_expr_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/merge_init_expr_2.f90
+@@ -55,4 +55,3 @@ end subroutine test
+ ! { dg-final { scan-tree-dump-times "check1 = 1275069467;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "check2 = 1;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "__builtin_memmove ..void .. &three, .void .. &one, 3.;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_4.f90
+@@ -23,4 +23,3 @@ contains
+ end module krmod
+ 
+ ! { dg-final { scan-tree-dump " tm_doit \\(0B, 0\\);" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_5.f90
+@@ -24,4 +24,3 @@ contains
+ end module krmod
+ 
+ ! { dg-final { scan-tree-dump " tm_doit \\(&parm\.., 0B, 0\\);" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/missing_optional_dummy_6.f90
+@@ -57,4 +57,3 @@ end program test
+ ! { dg-final { scan-tree-dump-times "assumed_shape2 \\(as1" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "explicit_shape2 \\(as1" 0 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/move_alloc_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/move_alloc_4.f90
+@@ -21,4 +21,3 @@ program testmv3
+ end program testmv3 
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 9 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/namelist_66.f90
++++ b/src/gcc/testsuite/gfortran.dg/namelist_66.f90
+@@ -17,7 +17,7 @@ end type qptracer
+ type(qptracer) , dimension(3) :: qtracer
+ namelist/naml2/  qtracer
+ 
+-open (99, file='nml.dat', status="replace")
++open (99, file='nml_66.dat', status="replace")
+ write(99,*) "&naml1"
+ write(99,*) "   tracer(1)   = 'aa', .true."
+ write(99,*) "   tracer(2)   = 'bb', .true."
+--- a/src/gcc/testsuite/gfortran.dg/namelist_82.f90
++++ b/src/gcc/testsuite/gfortran.dg/namelist_82.f90
+@@ -10,7 +10,7 @@ namelist/naml1/  tracer
+ 
+ tracer(:) = ptracer('XXX', .false.)
+ 
+-open (99, file='nml.dat', status="replace")
++open (99, file='nml_82.dat', status="replace")
+ write(99,*) "&naml1"
+ !write(99,*) "   tracer(2)   = 'bb' , .true."
+ write(99,*) "   tracer(:)   = 'aa' , .true."
+--- a/src/gcc/testsuite/gfortran.dg/no_arg_check_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/no_arg_check_2.f90
+@@ -150,4 +150,3 @@ end
+ ! { dg-final { scan-tree-dump-times "sub_array_assumed \\(\\(struct t1.0:. . restrict\\) array_class_t1_alloc._data.data\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "sub_array_assumed \\(\\(struct t1.0:. .\\) array_class_t1_ptr._data.data\\);" 1 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/open_negative_unit_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/open_negative_unit_1.f90
+@@ -9,7 +9,7 @@ program nutest
+     logical l
+     integer id, ios
+ 
+-    open(newunit=id, file="foo.txt", iostat=ios)
++    open(newunit=id, file="foo_open_negative_unit_1.txt", iostat=ios)
+     if (ios /= 0) call abort
+ 
+     open(id, file="bar.txt", iostat=ios)
+@@ -17,14 +17,14 @@ program nutest
+ 
+     close(id, status="delete")
+ 
+-    open(unit=10, file="foo.txt", status="old", iostat=ios)
++    open(unit=10, file="foo_open_negative_unit_1.txt", status="old", iostat=ios)
+     if (ios /= 0) call abort
+ 
+     close(10, status="delete")
+ 
+-    open(-10, file="foo.txt", iostat=ios)
++    open(-10, file="foo_open_negative_unit_1.txt", iostat=ios)
+     if (ios == 0) call abort
+ 
+-    inquire(file="foo.txt", exist=l)
++    inquire(file="foo_open_negative_unit_1.txt", exist=l)
+     if (l) call abort
+ end program nutest
+--- a/src/gcc/testsuite/gfortran.dg/open_new.f90
++++ b/src/gcc/testsuite/gfortran.dg/open_new.f90
+@@ -3,9 +3,9 @@
+ !            status="new" is an error
+ program main
+   nout = 10
+-  open(nout, file="foo.dat", status="replace")     ! make sure foo.dat exists
++  open(nout, file="foo_open_new.dat", status="replace")     ! make sure foo_open_new.dat exists
+   close(nout)
+-  open(nout, file="foo.dat", status="new",err=100)
++  open(nout, file="foo_open_new.dat", status="new",err=100)
+   call abort                 ! This should never happen
+-100 call unlink ("foo.dat")
++100 call unlink ("foo_open_new.dat")
+ end program main
+--- a/src/gcc/testsuite/gfortran.dg/parameter_array_element_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/parameter_array_element_1.f90
+@@ -15,5 +15,4 @@
+ END
+ ! Scan for the 105 in the declaration real8 out_val[105];
+ ! { dg-final { scan-tree-dump-times "105" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/power_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/power_3.f90
+@@ -35,4 +35,3 @@ program main
+ 
+ end program main
+ ! { dg-final { scan-tree-dump-times "_gfortran_pow_i4_i4" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/power_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/power_4.f90
+@@ -26,4 +26,3 @@ program main
+   if (any(d /= e)) call abort
+ end program main
+ ! { dg-final { scan-tree-dump-times "_gfortran_pow_i4_i4" 3 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/power_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/power_5.f90
+@@ -33,4 +33,3 @@ program main
+ 
+ end program main
+ ! { dg-final { scan-tree-dump-times "_gfortran_pow_i4_i4" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/power_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/power_6.f90
+@@ -12,4 +12,3 @@ end
+ ! { dg-final { scan-tree-dump-not "__builtin_powif"  "optimized" } }
+ ! { dg-final { scan-tree-dump "powi_cond_\[0-9\] = k_\[0-9\]\\(D\\) & 1;"  "optimized" } }
+ ! { dg-final { scan-tree-dump "powi_\[0-9\] = powi_cond_\[0-9\] \\? -1.0e\\+0 : 1.0e\\+0;"  "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr26246_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr26246_1.f90
+@@ -15,4 +15,3 @@ module pr26246_1
+ end module pr26246_1
+ 
+ ! { dg-final { scan-tree-dump-times "static int" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr26246_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr26246_2.f90
+@@ -10,4 +10,3 @@ subroutine foo(string, n)
+ end subroutine foo
+ 
+ ! { dg-final { scan-tree-dump-times "static int" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr32921.f
++++ b/src/gcc/testsuite/gfortran.dg/pr32921.f
+@@ -46,4 +46,3 @@
+       RETURN
+       END
+ ! { dg-final { scan-tree-dump-times "stride" 4 "lim1" } }
+-! { dg-final { cleanup-tree-dump "lim1" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr34163.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr34163.f90
+@@ -13,4 +13,3 @@ do i = i1+1 , i2
+ enddo
+ end subroutine trisolve2
+ ! { dg-final { scan-tree-dump "Executing predictive commoning" "pcom" } }
+-! { dg-final { cleanup-tree-dump "pcom" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr38868.f
++++ b/src/gcc/testsuite/gfortran.dg/pr38868.f
+@@ -14,4 +14,3 @@
+       END
+ 
+ ! { dg-final { scan-rtl-dump-times "line\\\+80" 0 "expand" } }
+-! { dg-final { cleanup-rtl-dump "expand" } } */
+--- a/src/gcc/testsuite/gfortran.dg/pr42108.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr42108.f90
+@@ -25,5 +25,3 @@ end subroutine eval
+ ! { dg-final { scan-tree-dump "in all uses of countm1\[^\n\]* / " "pre" } }
+ ! There should be only one load from n left
+ ! { dg-final { scan-tree-dump-times "\\*n_" 1 "fre1" } }
+-! { dg-final { cleanup-tree-dump "fre1" } }
+-! { dg-final { cleanup-tree-dump "pre" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr43984.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr43984.f90
+@@ -53,4 +53,3 @@ end
+ ! There should be three loads from iyz.data, not four.
+ 
+ ! { dg-final { scan-tree-dump-times "= iyz.data" 3 "pre" } }
+-! { dg-final { cleanup-tree-dump "pre" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr45636.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr45636.f90
+@@ -13,4 +13,3 @@ end program main
+ ! This test will fail on targets which prefer memcpy/memset over
+ ! move_by_pieces/store_by_pieces.
+ ! { dg-final { scan-tree-dump-times "memset" 0 "forwprop2" { xfail { { hppa*-*-* && { ! lp64 } } || { { mips*-*-* && { ! nomips16 } } || { aarch64*-*-* } } } } } }
+-! { dg-final { cleanup-tree-dump "forwprop2" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr48636-2.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr48636-2.f90
+@@ -35,4 +35,3 @@ end program main
+ 
+ ! { dg-final { scan-ipa-dump "Creating a specialized node of \[^\n\r\]*bar/\[0-9\]*\\." "cp" } }
+ ! { dg-final { scan-ipa-dump-times "Aggregate replacements\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=\[^=\]*=" 2 "cp" } }
+-! { dg-final { cleanup-ipa-dump "cp" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr48636.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr48636.f90
+@@ -36,4 +36,3 @@ end program main
+ ! { dg-final { scan-ipa-dump "bar\[^\\n\]*inline copy in MAIN" "inline" } }
+ ! { dg-final { scan-ipa-dump-times "phi predicate:" 5 "inline" } }
+ ! { dg-final { scan-ipa-dump "inline hints: loop_iterations" "inline" } }
+-! { dg-final { cleanup-ipa-dump "inline" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr52835.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr52835.f90
+@@ -13,4 +13,3 @@ subroutine foo (x, y, z, n)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump "bar\[ _\]" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr53787.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr53787.f90
+@@ -18,4 +18,3 @@ end subroutine init
+ 
+ ! { dg-final { scan-ipa-dump "Creating a specialized node of init" "cp" } }
+ ! { dg-final { scan-ipa-dump-times "Aggregate replacements" 2 "cp" } }
+-! { dg-final { cleanup-ipa-dump "cp" } }
+--- a/src/gcc/testsuite/gfortran.dg/pr57987.f90
++++ b/src/gcc/testsuite/gfortran.dg/pr57987.f90
+@@ -21,4 +21,3 @@ contains
+ end program test
+ 
+ ! { dg-final { scan-ipa-dump-not "redefined extern inline functions are not considered for inlining" "inline" } }
+-! { dg-final { cleanup-ipa-dump "inline" } }
+--- a/src/gcc/testsuite/gfortran.dg/proc_decl_23.f90
++++ b/src/gcc/testsuite/gfortran.dg/proc_decl_23.f90
+@@ -40,4 +40,3 @@ end module m_string
+   print *, t%char3 (["g","h","i"])
+   print *, char1 (["j","k","l"])
+ end
+-! { dg-final { cleanup-tree-dump "m_string" } }
+--- a/src/gcc/testsuite/gfortran.dg/promotion_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/promotion_2.f90
+@@ -13,4 +13,3 @@ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "sgemm_" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "dgemm_" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/rank_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/rank_4.f90
+@@ -16,4 +16,3 @@ program test_rank
+ end program test_rank
+ 
+ ! { dg-final { scan-tree-dump-times "not_existing" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/realloc_on_assign_18.f90
++++ b/src/gcc/testsuite/gfortran.dg/realloc_on_assign_18.f90
+@@ -17,4 +17,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump "x = \\(struct t .\\) __builtin_malloc \\(1\\);" "original" } }
+ ! { dg-final { scan-tree-dump "y.data = \\(void . restrict\\) __builtin_malloc \\(1\\);" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/realloc_on_assign_19.f90
++++ b/src/gcc/testsuite/gfortran.dg/realloc_on_assign_19.f90
+@@ -18,4 +18,3 @@ contains
+   end subroutine bar
+ end module foo
+ ! { dg-final { scan-tree-dump-times "alloc" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_1.f90
+@@ -10,4 +10,3 @@ end
+ ! We need an explicit +5 and -5, and an intermediate ((bla)) expression
+ ! (the reassoc barrier).  Make use of "." matching lineends.
+ ! { dg-final { scan-tree-dump "\\\+ 5.*\\\)\\\).* - 5" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_10.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_10.f
+@@ -14,4 +14,3 @@
+ ! and power expansion.
+ 
+ ! { dg-final { scan-tree-dump-times " \\\* " 5 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_2.f90
+@@ -13,4 +13,3 @@ function test(a)
+ end
+ 
+ ! { dg-final { scan-tree-dump "- 5" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_3.f90
+@@ -16,5 +16,3 @@ end
+ ! { dg-final { scan-tree-dump "b = 5" "original" } }
+ ! { dg-final { scan-tree-dump "c_. = .a" "optimized" } }
+ ! { dg-final { scan-tree-dump "return c_.;" "optimized" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_4.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_4.f
+@@ -41,4 +41,3 @@
+ ! unrolled loops.
+ 
+ ! { dg-final { scan-tree-dump-times "\[0-9\] \\\* " 22 "reassoc1" } }
+-! { dg-final { cleanup-tree-dump "reassoc1" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_5.f90
+@@ -16,4 +16,3 @@ end
+ ! We need an explicit +5 and -5, and an intermediate ((bla)) expression
+ ! (the reassoc barrier).  Make use of "." matching lineends.
+ ! { dg-final { scan-tree-dump-times "\\\+ 5.*\\\)\\\).* - 5" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_6.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_6.f
+@@ -19,4 +19,3 @@
+ ! While we understand to combine x + ~x IVOPTs now messes things
+ ! up by hiding that operation in casts to unsigned.
+ ! { dg-final { scan-tree-dump-not "~" "optimized" { xfail *-*-* } } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_7.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_7.f
+@@ -13,4 +13,3 @@
+ ! There should be two multiplies following un-distribution.
+ 
+ ! { dg-final { scan-tree-dump-times " \\\* " 2 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_8.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_8.f
+@@ -14,4 +14,3 @@
+ ! and power expansion.
+ 
+ ! { dg-final { scan-tree-dump-times " \\\* " 3 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reassoc_9.f
++++ b/src/gcc/testsuite/gfortran.dg/reassoc_9.f
+@@ -14,4 +14,3 @@
+ ! and power expansion.
+ 
+ ! { dg-final { scan-tree-dump-times " \\\* " 3 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/reshape_empty_1.f03
++++ b/src/gcc/testsuite/gfortran.dg/reshape_empty_1.f03
+@@ -17,4 +17,3 @@ if (K /= i) call abort
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "\\\{1, 2, 2, 2, 1, 2, 2, 2, 1\\\}" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/scan_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/scan_2.f90
+@@ -32,4 +32,3 @@ end program p1
+ 
+ ! { dg-final { scan-tree-dump-times "iscan = _gfortran_string_scan \\(2," 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "iverify = _gfortran_string_verify \\(2," 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/select_char_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/select_char_2.f90
+@@ -42,4 +42,3 @@ contains
+ end
+ 
+ ! { dg-final { scan-tree-dump-not "_gfortran_select_string" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/shape_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/shape_7.f90
+@@ -28,5 +28,4 @@ Program Main
+ End Program Main
+ 
+ ! { dg-final { scan-tree-dump-times "abort" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/single_char_string.f90
++++ b/src/gcc/testsuite/gfortran.dg/single_char_string.f90
+@@ -33,4 +33,3 @@ end
+ ! { dg-final { scan-tree-dump-times "_gfortran_compare_string" 0 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_copy_string" 0 "original" } }
+ 
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/size_kind_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/size_kind_2.f90
+@@ -14,4 +14,3 @@ end
+ ! { dg-final { scan-tree-dump "static integer.kind=8. A..\\\[2\\\] = \\\{2147483650, 2\\\};" "original" } }
+ ! { dg-final { scan-tree-dump "var2 = 4294967300;" "original" } }
+ ! { dg-final { scan-tree-dump "var3 = 2147483650;" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/sizeof_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/sizeof_3.f90
+@@ -42,4 +42,3 @@ end
+ ! { dg-final { scan-tree-dump-times "m2test = 1;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "iii = 100;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "jjj = 160;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/spread_size_limit.f90
++++ b/src/gcc/testsuite/gfortran.dg/spread_size_limit.f90
+@@ -11,5 +11,4 @@ ZLON_MASK(:,:)= SPREAD( (/ (JLON , JLON=1,720) /) , DIM=2, NCOPIES=360 )
+ print *, zlon_mask(100,100)
+ END
+ ! { dg-final { scan-tree-dump-times "_gfortran_spread" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/stat_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/stat_1.f90
+@@ -1,7 +1,7 @@
+ ! { dg-do run }
+ ! { dg-skip-if "" { *-*-mingw* spu-*-* } { "*" } { "" } }
+ ! { dg-options "-std=gnu" }
+-  character(len=*), parameter :: f = "testfile"
++  character(len=*), parameter :: f = "testfile_stat_1"
+   integer :: s1(13), r1, s2(13), r2, s3(13), r3, d(13), rd
+   
+   open (10,file=f)
+--- a/src/gcc/testsuite/gfortran.dg/stat_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/stat_2.f90
+@@ -1,7 +1,7 @@
+ ! { dg-do run }
+ ! { dg-skip-if "" { *-*-mingw* spu-*-* } { "*" } { "" } }
+ ! { dg-options "-std=gnu" }
+-  character(len=*), parameter :: f = "testfile"
++  character(len=*), parameter :: f = "testfile_stat_2"
+   integer :: s1(13), r1, s2(13), r2, s3(13), r3, d(13), rd
+   
+   open (10,file=f)
+--- a/src/gcc/testsuite/gfortran.dg/storage_size_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/storage_size_4.f90
+@@ -20,4 +20,3 @@ subroutine S ( A )
+ end
+ 
+ ! { dg-final { scan-tree-dump-not "abort" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/storage_size_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/storage_size_5.f90
+@@ -41,4 +41,3 @@ end subroutine test2
+ 
+ ! { dg-final { scan-tree-dump-times "k1 = \\(integer\\(kind=1\\)\\)" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "k2 = \\(integer\\(kind=2\\)\\)" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/streamio_10.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_10.f90
+@@ -8,7 +8,7 @@ program stream_io_10
+   integer(kind=8) :: thepos
+   a = (/ 1, 2, 3, 4 /)
+   b = a
+-  open(10, file="teststream", access="stream")
++  open(10, file="teststream_streamio_10", access="stream")
+   write(10) a
+   inquire(10, pos=thepos)
+   if (thepos.ne.17) call abort()
+--- a/src/gcc/testsuite/gfortran.dg/streamio_12.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_12.f90
+@@ -6,7 +6,7 @@ program streamtest
+   character(1)   :: tchar
+   integer        :: i,j,k
+   real(kind=4), dimension(100,100) :: anarray
+-  open(10, file="teststream", access="stream", form="unformatted")
++  open(10, file="teststream_streamio_12", access="stream", form="unformatted")
+   anarray = 3.14159
+   write(10) anarray
+   write(10, pos=1) ! This is a way to position an unformatted file
+--- a/src/gcc/testsuite/gfortran.dg/streamio_15.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_15.f90
+@@ -13,7 +13,7 @@ program main
+   if (newline_length < 1 .or. newline_length > 2) call abort
+   close(20)
+ 
+-  open(20,file="foo.txt",form="formatted",access="stream")
++  open(20,file="foo_streamio_15.txt",form="formatted",access="stream")
+   write(20,'(A)') '123456'
+   write(20,'(A)') 'abcdef'
+   write(20,'(A)') 'qwerty'
+--- a/src/gcc/testsuite/gfortran.dg/streamio_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_4.f90
+@@ -9,7 +9,7 @@ program streamtest
+   integer        :: i,j,k
+   integer, parameter :: lines = 5231
+    
+-  open(10, file="teststream", access="stream", form="formatted")
++  open(10, file="teststream_streamio_4", access="stream", form="formatted")
+   
+   do i=1,lines
+     do j=0,9
+@@ -19,7 +19,7 @@ program streamtest
+   
+   close(10)
+   
+-  open(10, file="teststream", access="stream",&
++  open(10, file="teststream_streamio_4", access="stream",&
+   &form="formatted", position="append")
+   do i=1,lines
+     do j=0,9
+--- a/src/gcc/testsuite/gfortran.dg/streamio_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_5.f90
+@@ -7,7 +7,7 @@ program streamtest5
+   character(1)   :: tchar
+   integer        :: i,j,k
+    
+-  open(10, file="teststream", access="stream", form="unformatted")
++  open(10, file="teststream_streamio_5", access="stream", form="unformatted")
+   
+   do i=1,1229
+     do j=0,9
+@@ -18,7 +18,7 @@ program streamtest5
+   
+   close(10)
+   
+-  open(10, file="teststream", access="stream", form="unformatted")
++  open(10, file="teststream_streamio_5", access="stream", form="unformatted")
+   
+   do i=1,1229
+     do j=0,9
+--- a/src/gcc/testsuite/gfortran.dg/streamio_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_6.f90
+@@ -15,7 +15,7 @@ program streamio_6
+   &    72, 81, 59, 24, 37, 43, 21, 54, 68, 31, 19, 79, 63, 41,&
+   &    42, 12, 10, 62, 43, 9, 30, 9, 54, 35, 4, 5, 55, 3, 94 /
+ 
+-  open(unit=15,file="teststream",access="stream",form="unformatted")
++  open(unit=15,file="teststream_streamio_6",access="stream",form="unformatted")
+   do i=1,100
+     k = a(i)
+     write(unit=15, pos=k) achar(k)
+--- a/src/gcc/testsuite/gfortran.dg/streamio_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/streamio_7.f90
+@@ -7,7 +7,7 @@ program streamtest
+   character(1)   :: tchar
+   integer        :: i,j,k
+   real(kind=4), dimension(100,100) :: anarray
+-  open(10, file="teststream", access="stream", form="unformatted")
++  open(10, file="teststream_streamio_7", access="stream", form="unformatted")
+   anarray = 3.14159
+   write(10) anarray
+   anarray = 0.0
+--- a/src/gcc/testsuite/gfortran.dg/string_assign_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/string_assign_1.f90
+@@ -8,4 +8,3 @@ program main
+   print *,c
+ end program main
+ ! { dg-final { scan-tree-dump-times "memcpy" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/string_compare_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/string_compare_4.f90
+@@ -20,4 +20,3 @@ contains
+   end subroutine foo
+ end program main
+ ! { dg-final { scan-tree-dump-times "_gfortran_string_len_trim" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/string_length_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/string_length_2.f90
+@@ -29,4 +29,3 @@ program main
+   if (len(c(  (i-2)*(i-3)     :   (i-3)*(i-2)    )) /= 1)       call abort ! Case 18
+ end program main
+ ! { dg-final { scan-tree-dump-times "_abort" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/structure_constructor_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/structure_constructor_11.f90
+@@ -93,4 +93,3 @@ end program ala
+ ! { dg-final { scan-tree-dump-times "this->_data->a.cleanup = \\*cleanup;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "ext_ptr.\[0-9\]+.init = this->_data->a.init;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "ext_ptr.\[0-9\]+.cleanup = this->_data->a.cleanup;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_1.f90
+@@ -15,4 +15,3 @@ subroutine BytesToString(bytes, string)
+     string = transfer(bytes, string)
+   end subroutine
+ ! { dg-final { scan-tree-dump-times "MIN_EXPR" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90
+@@ -17,4 +17,3 @@
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/transfer_resolve_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/transfer_resolve_3.f90
+@@ -16,5 +16,4 @@ intg = transfer (para%ptr, intg)
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "intg = 0;" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/transpose_optimization_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/transpose_optimization_1.f90
+@@ -103,4 +103,3 @@ contains
+ end module foo
+ 
+ ! { dg-final { scan-tree-dump-times "struct\[^\\n\]*atmp" 4 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/transpose_optimization_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/transpose_optimization_2.f90
+@@ -62,4 +62,3 @@ end
+ !
+ ! { dg-final { scan-tree-dump-times "parm" 66 "original" } }
+ ! { dg-final { scan-tree-dump-times "atmp" 12 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_1.f90
+@@ -13,4 +13,3 @@ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "memmove" 3 "original" } }
+ ! { dg-final { scan-tree-dump-times "string_trim" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_2.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_2.f90
+@@ -34,4 +34,3 @@ end program main
+ 
+ ! { dg-final { scan-tree-dump-times "memmove" 6 "original" } }
+ ! { dg-final { scan-tree-dump-times "string_trim" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_3.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_3.f90
+@@ -13,4 +13,3 @@ program main
+   if (b4 /= 4_'bcdx') call abort
+ end
+ ! { dg-final { scan-tree-dump-times "string_len_trim" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_5.f90
+@@ -17,4 +17,3 @@ program main
+   if (line /= 'abY       ') call abort
+ end program main
+ ! { dg-final { scan-tree-dump-times "string_len_trim" 2 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_7.f90
+@@ -16,4 +16,3 @@ program main
+   if (d /= 'a b a c ') call abort
+ end
+ ! { dg-final { scan-tree-dump-times "string_len_trim" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/trim_optimize_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/trim_optimize_8.f90
+@@ -11,4 +11,3 @@ program main
+   if (trim (trim(a) // trim(b)) /= 'ab ') call abort
+ end
+ ! { dg-final { scan-tree-dump-times "string_len_trim" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/typebound_assignment_5.f03
++++ b/src/gcc/testsuite/gfortran.dg/typebound_assignment_5.f03
+@@ -41,4 +41,3 @@
+ 
+ ! { dg-final { scan-tree-dump-not "_gfortran_internal_pack" "original" } }
+ ! { dg-final { scan-tree-dump-not "_gfortran_internal_unpack" "original" } }
+-! { dg-final { cleanup-tree-dump "original"} }
+--- a/src/gcc/testsuite/gfortran.dg/typebound_assignment_6.f03
++++ b/src/gcc/testsuite/gfortran.dg/typebound_assignment_6.f03
+@@ -39,5 +39,4 @@
+ 
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_pack" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "_gfortran_internal_unpack" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/typebound_call_21.f03
++++ b/src/gcc/testsuite/gfortran.dg/typebound_call_21.f03
+@@ -34,4 +34,3 @@ end module m
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "_vptr->" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/typebound_call_22.f03
++++ b/src/gcc/testsuite/gfortran.dg/typebound_call_22.f03
+@@ -27,4 +27,3 @@ program test
+ end program
+ 
+ ! { dg-final { scan-tree-dump-times "base \\(\\);" 1 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/typebound_operator_14.f90
++++ b/src/gcc/testsuite/gfortran.dg/typebound_operator_14.f90
+@@ -39,4 +39,3 @@ contains
+   end function gt_cmp_int
+ end module
+ 
+-! { dg-final { cleanup-tree-dump "m_sort test" } }
+--- a/src/gcc/testsuite/gfortran.dg/typebound_proc_27.f03
++++ b/src/gcc/testsuite/gfortran.dg/typebound_proc_27.f03
+@@ -88,5 +88,4 @@ end program prog
+ ! take the realloc path after the first assignment, so don't count as a malloc.
+ ! { dg-final { scan-tree-dump-times "__builtin_free" 7 "original" } }
+ !
+-! { dg-final { cleanup-tree-dump "original" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/unf_read_corrupted_1.f90
++++ b/src/gcc/testsuite/gfortran.dg/unf_read_corrupted_1.f90
+@@ -10,13 +10,13 @@ program main
+   ! Write out a truncated unformatted sequential file by
+   ! using unformatted stream.
+ 
+-  open (10, form="unformatted", access="stream", file="foo.dat", &
++  open (10, form="unformatted", access="stream", file="foo_unf_read_corrupted_1.dat", &
+   status="unknown")
+   write (10) 16_4, 1_4
+   close (10, status="keep")
+ 
+   ! Try to read
+-  open (10, file="foo.dat", form="unformatted", access="sequential")
++  open (10, file="foo_unf_read_corrupted_1.dat", form="unformatted", access="sequential")
+   i1 = 0
+   i2 = 0
+   read (10, iostat=ios, iomsg=msg) i1, i2
+--- a/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_11.f90
++++ b/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_11.f90
+@@ -11,4 +11,3 @@
+ end
+ 
+ ! { dg-final { scan-tree-dump "\\(struct __vtype__STAR \\*\\) c._vptr = \\(struct __vtype__STAR \\*\\) a._vptr;" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_8.f90
++++ b/src/gcc/testsuite/gfortran.dg/unlimited_polymorphic_8.f90
+@@ -17,4 +17,3 @@ end
+ 
+ ! { dg-final { scan-tree-dump-times "foo.0.x._data = 0B;" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "foo.0.x._vptr = .* &__vtab__STAR;" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/use_rename_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/use_rename_6.f90
+@@ -37,4 +37,3 @@ subroutine four()
+ end subroutine four
+ 
+ ! { dg-final { scan-tree-dump-times "shall_not_be_there" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/O3-pr36119.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/O3-pr36119.f90
+@@ -25,4 +25,3 @@ SUBROUTINE check_dnucint_ana (dcore)
+   END IF
+ END SUBROUTINE check_dnucint_ana
+ 
+-! { dg-final { cleanup-tree-dump "vect" } } 
+--- a/src/gcc/testsuite/gfortran.dg/vect/O3-pr39595.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/O3-pr39595.f
+@@ -13,5 +13,4 @@
+       end do
+       end
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/O3-pr49957.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/O3-pr49957.f
+@@ -14,4 +14,3 @@
+       return
+       end
+ ! { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail vect_no_align } } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/Ofast-pr50414.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/Ofast-pr50414.f90
+@@ -8,4 +8,3 @@
+       CALL PROUND(YMA)
+       END
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/cost-model-pr34445.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/cost-model-pr34445.f
+@@ -6,4 +6,3 @@ c { dg-do compile }
+         Alpha = 1.2
+       End Do
+       End
+-c { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/cost-model-pr34445a.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/cost-model-pr34445a.f
+@@ -26,4 +26,3 @@ c
+   130 continue
+       return
+       end
+-c { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-mgrid-resid.f
+@@ -43,5 +43,3 @@ C
+ ! { dg-final { scan-tree-dump-times "Executing predictive commoning without unrolling" 1 "pcom" { target lp64 } } }
+ ! { dg-final { scan-tree-dump-times "Executing predictive commoning without unrolling" 2 "pcom" { target ia32 } } }
+ ! { dg-final { scan-tree-dump-times "Predictive commoning failed: no suitable chains" 0 "pcom" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+-! { dg-final { cleanup-tree-dump "pcom" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr33299.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr33299.f90
+@@ -14,4 +14,3 @@ FUNCTION f( x, dist ) RESULT(s)
+   IF( x < 0 ) s = -s
+ END FUNCTION f
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr37021.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr37021.f90
+@@ -15,4 +15,3 @@ subroutine to_product_of(self,a,b,a1,a2)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90
+@@ -25,4 +25,3 @@ program mymatmul
+ end program mymatmul
+ 
+ ! { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-real8-pr40801.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-real8-pr40801.f90
+@@ -34,4 +34,3 @@ IF (ITOP < KLEV+1) THEN
+ ENDIF
+ END SUBROUTINE ACCONV
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-rnflow-trs2a2.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-rnflow-trs2a2.f90
+@@ -30,4 +30,3 @@
+       end function trs2a2
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/fast-math-vect-8.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/fast-math-vect-8.f90
+@@ -91,4 +91,3 @@ end module solv_cap
+ 
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_intfloat_cvt } } }
+-! { dg-final { cleanup-tree-dump "vect" } } 
+--- a/src/gcc/testsuite/gfortran.dg/vect/no-fre-no-copy-prop-O3-pr51704.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/no-fre-no-copy-prop-O3-pr51704.f90
+@@ -53,5 +53,4 @@ contains
+   end subroutine tes
+ end
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/no-vfa-pr32377.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/no-vfa-pr32377.f90
+@@ -12,5 +12,4 @@ real t1,t2,chksum,ctime,dtime,cs1d
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect"   } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/no-vfa-pr32457.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/no-vfa-pr32457.f90
+@@ -12,4 +12,3 @@ SUBROUTINE KEEL(RBOUND)
+ END SUBROUTINE KEEL
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90
+@@ -21,5 +21,4 @@ subroutine s111 (ntimes,ld,n,ctime,dtime,a,b,c,d,e,aa,bb,cc)
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } }
+ ! { dg-final { scan-tree-dump-times "complicated access pattern" 1 "vect" { xfail vect_multiple_sizes } } }
+ ! { dg-final { scan-tree-dump-times "complicated access pattern" 2 "vect" { target vect_multiple_sizes } } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr32377.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr32377.f90
+@@ -12,4 +12,3 @@ subroutine s243(ntimes,ld,n,ctime,dtime,a,b,c,d,e,aa,bb,cc)
+ end subroutine s243
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr32380.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr32380.f
+@@ -262,4 +262,3 @@ c
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect_element_align } } } }
+ ! { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { target { vect_element_align && { ! vect_call_sqrtf } } } } }
+ ! { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target { vect_element_align && vect_call_sqrtf } } } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr33301.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr33301.f
+@@ -11,4 +11,3 @@ c     It is present in original lapack source
+    20       CONTINUE
+       END
+ 
+-c { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr39318.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr39318.f90
+@@ -17,5 +17,4 @@
+       return
+       end
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr45714-a.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr45714-a.f
+@@ -24,4 +24,3 @@
+       enddo
+       end
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr45714-b.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr45714-b.f
+@@ -24,4 +24,3 @@
+       enddo
+       end
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr46213.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr46213.f90
+@@ -22,4 +22,3 @@ contains
+   end function get_d
+ end program test
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr48329.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr48329.f90
+@@ -26,4 +26,3 @@ program calcpi
+ end program calcpi
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr50178.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr50178.f90
+@@ -26,4 +26,3 @@ subroutine suedyn
+ 
+ end subroutine suedyn
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr50412.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr50412.f90
+@@ -9,4 +9,3 @@
+    20 CONTINUE
+       END
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr51058-2.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr51058-2.f90
+@@ -17,4 +17,3 @@ subroutine pr51058(n, u, v, w, z)
+   end do
+ end subroutine
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr51058.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr51058.f90
+@@ -15,5 +15,4 @@
+          ENDDO
+       END
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr51285.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr51285.f90
+@@ -33,4 +33,3 @@
+     ENDDO
+  END SUBROUTINE
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr52580.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr52580.f
+@@ -30,4 +30,3 @@
+       RETURN
+       END
+ ! { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/pr62283.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/pr62283.f
+@@ -14,4 +14,3 @@ C { dg-additional-options "-fvect-cost-model=dynamic" }
+       y=y+beta*x
+       end
+ C { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_hw_misalign } } } }
+-C { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-1.f90
+@@ -8,4 +8,3 @@ PRINT*, C(500000)
+ END
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 3 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-2.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-2.f90
+@@ -19,4 +19,3 @@ END
+ ! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { target { { vect_no_align && { ! vect_hw_misalign } } && { ! vector_alignment_reachable } } } } }
+ ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } }
+ ! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" {target { { vect_no_align && { ! vect_hw_misalign } } || { { ! vector_alignment_reachable  } && { ! vect_hw_misalign } } } } } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-3.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-3.f90
+@@ -12,4 +12,3 @@ END
+ ! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable}} } } }
+ ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || { ! vector_alignment_reachable} } } } }
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-4.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-4.f90
+@@ -14,4 +14,3 @@ END
+ ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {! vector_alignment_reachable} } } } }
+ ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } }
+ ! { dg-final { scan-tree-dump-times "accesses have the same alignment." 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-5.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-5.f90
+@@ -40,4 +40,3 @@
+ ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } }
+ ! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { vect_no_align && { ! vect_hw_misalign } } } } }
+ ! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-6.f
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-6.f
+@@ -21,5 +21,4 @@
+   150    CONTINUE
+       END
+ 
+-! { dg-final { cleanup-tree-dump "vect" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-7.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-7.f90
+@@ -12,5 +12,4 @@ subroutine foo (x,nnd)
+ end subroutine foo 
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_unpack  && vect_intfloat_cvt } } } } 
+-! { dg-final { cleanup-tree-dump "vect" } } 
+ 
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-8.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-8.f90
+@@ -704,4 +704,3 @@ RETURN
+ END SUBROUTINE kernel
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 19 loops" 1 "vect" } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-do-concurrent-1.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-do-concurrent-1.f90
+@@ -13,4 +13,3 @@ end subroutine test
+ 
+ ! { dg-message "loop vectorized" "" { target *-*-* } 0 }
+ ! { dg-bogus " version\[^\n\r]* alias" "" { target *-*-* } 0 }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vect/vect-gems.f90
++++ b/src/gcc/testsuite/gfortran.dg/vect/vect-gems.f90
+@@ -54,4 +54,3 @@ END SUBROUTINE UPMLupdateE
+ END MODULE UPML_mod
+ 
+ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  } }
+-! { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gfortran.dg/vector_subscript_4.f90
++++ b/src/gcc/testsuite/gfortran.dg/vector_subscript_4.f90
+@@ -10,4 +10,3 @@
+       k = j((/1,1,1/)+i)
+       end
+ ! { dg-final { scan-tree-dump-times "A\.2\\\[3\\\]" 1 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/vector_subscript_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/vector_subscript_6.f90
+@@ -30,4 +30,3 @@ subroutine test3(esss,Ix,Iyz, e_x, ii_ivec)
+ end subroutine
+ 
+ ! { dg-final { scan-tree-dump-not "malloc" "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gfortran.dg/volatile10.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile10.f90
+@@ -145,4 +145,3 @@ end program main
+ ! { dg-final { scan-tree-dump      "main_test2_2" "optimized" } }
+ ! TODO: dg-final { scan-tree-dump-not  "main_test2_3" "optimized" } 
+ ! { dg-final { scan-tree-dump      "main_test2_4" "optimized" } }
+-! { dg-final { cleanup-tree-dump  "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/volatile11.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile11.f90
+@@ -37,4 +37,3 @@ end subroutine
+ ! { dg-final { scan-tree-dump "NotOptimizedAway1" "optimized" } } */
+ ! { dg-final { scan-tree-dump "NotOptimizedAway2" "optimized" } } */
+ ! { dg-final { scan-tree-dump-not "IsOptimizedAway" "optimized" } } */
+-! { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gfortran.dg/volatile12.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile12.f90
+@@ -12,5 +12,4 @@ end
+ ! { dg-final { scan-tree-dump "integer.kind=.. . volatile arg" "optimized" } }
+ ! { dg-final { scan-tree-dump-times " =.v. arg;" 2 "optimized" } }
+ ! { dg-final { scan-tree-dump "i_dont_exist" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+ 
+--- a/src/gcc/testsuite/gfortran.dg/volatile4.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile4.f90
+@@ -15,4 +15,3 @@ end do
+ end
+ ! { dg-final { scan-tree-dump "VolatileNotOptimizedAway" "optimized" } } */
+ ! { dg-final { scan-tree-dump-not "NonVolatileNotOptimizedAway" "optimized" } } */
+-! { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/gcc/testsuite/gfortran.dg/volatile5.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile5.f90
+@@ -39,4 +39,3 @@ end program main
+ ! { dg-final { scan-tree-dump "bStillPresent" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "cPresent" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "cStillPresent" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/volatile6.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile6.f90
+@@ -23,4 +23,3 @@ end
+ ! { dg-final { scan-tree-dump "VolatileNotOptimizedAway2" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "NonVolatileNotOptimizedAway1" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "NonVolatileNotOptimizedAway2" "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/volatile7.f90
++++ b/src/gcc/testsuite/gfortran.dg/volatile7.f90
+@@ -13,4 +13,3 @@ if(associated(t2)) print *, 'NonVolatileNotOptimizedAway'
+ end
+ ! { dg-final { scan-tree-dump "VolatileNotOptimizedAway" "optimized" } }
+ ! { dg-final { scan-tree-dump-not "NonVolatileNotOptimizedAway" "optimized" } } 
+-! { dg-final { cleanup-tree-dump "optimized" } } 
+--- a/src/gcc/testsuite/gfortran.dg/whole_file_5.f90
++++ b/src/gcc/testsuite/gfortran.dg/whole_file_5.f90
+@@ -17,4 +17,3 @@ PROGRAM main
+ END PROGRAM
+ 
+ ! { dg-final { scan-tree-dump-times "= f \\(\\)" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/whole_file_6.f90
++++ b/src/gcc/testsuite/gfortran.dg/whole_file_6.f90
+@@ -17,4 +17,3 @@ INTEGER FUNCTION f()
+ END FUNCTION
+ 
+ ! { dg-final { scan-tree-dump-times "= f \\(\\)" 0 "optimized" } }
+-! { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gfortran.dg/widechar_7.f90
++++ b/src/gcc/testsuite/gfortran.dg/widechar_7.f90
+@@ -16,4 +16,3 @@ program test
+ end program test
+ 
+ ! { dg-final { scan-tree-dump-times "memmove" 0 "original" } }
+-! { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gnat.dg/aggr12.adb
++++ b/src/gcc/testsuite/gnat.dg/aggr12.adb
+@@ -17,4 +17,3 @@ package body Aggr12 is
+ end Aggr12;
+ 
+ -- { dg-final { scan-tree-dump-not "{.i1=0, .i2=2}" "original" } }
+--- { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gnat.dg/aggr13.adb
++++ b/src/gcc/testsuite/gnat.dg/aggr13.adb
+@@ -20,4 +20,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "= {}" "gimple" } }
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/aliasing1.adb
++++ b/src/gcc/testsuite/gnat.dg/aliasing1.adb
+@@ -19,4 +19,3 @@ package body Aliasing1 is
+ end Aliasing1;
+ 
+ -- { dg-final { scan-tree-dump-not "gnat_rcheck" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/aliasing2.adb
++++ b/src/gcc/testsuite/gnat.dg/aliasing2.adb
+@@ -19,4 +19,3 @@ package body Aliasing2 is
+ end Aliasing2;
+ 
+ -- { dg-final { scan-tree-dump-not "gnat_rcheck" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/alignment4.adb
++++ b/src/gcc/testsuite/gnat.dg/alignment4.adb
+@@ -12,4 +12,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not ".\F" "gimple" } }
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/alignment5.adb
++++ b/src/gcc/testsuite/gnat.dg/alignment5.adb
+@@ -28,4 +28,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "\.F" "gimple" } }
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/alignment6.adb
++++ b/src/gcc/testsuite/gnat.dg/alignment6.adb
+@@ -29,4 +29,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "VIEW_CONVERT_EXPR" "gimple" } }
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/array16.adb
++++ b/src/gcc/testsuite/gnat.dg/array16.adb
+@@ -25,4 +25,3 @@ package body Array16 is
+ end Array16;
+ 
+ -- { dg-final { scan-tree-dump-not "secondary_stack" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/array7.adb
++++ b/src/gcc/testsuite/gnat.dg/array7.adb
+@@ -20,4 +20,3 @@ package body Array7 is
+ end Array7;
+ 
+ -- { dg-final { scan-tree-dump-not "MAX_EXPR" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic1.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic1.adb
+@@ -15,4 +15,3 @@ end;
+ 
+ -- { dg-final { scan-tree-dump-times "v_16" 1 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "v_32" 1 "gimple"} }
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_1.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_1.adb
+@@ -36,4 +36,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_2.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_2.adb
+@@ -42,4 +42,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_3.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_3.adb
+@@ -55,4 +55,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_4.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_4.adb
+@@ -42,4 +42,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_5.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_5.adb
+@@ -35,4 +35,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_6.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_6.adb
+@@ -36,4 +36,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_7.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_7.adb
+@@ -37,4 +37,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 0 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/atomic6_8.adb
++++ b/src/gcc/testsuite/gnat.dg/atomic6_8.adb
+@@ -34,4 +34,3 @@ end;
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*&temp" 0 "gimple"} }
+ -- { dg-final { scan-tree-dump-times "atomic_store\[^\n\r\]*ptr" 3 "gimple"} }
+ 
+--- { dg-final { cleanup-tree-dump "gimple" } }
+--- a/src/gcc/testsuite/gnat.dg/derived_type1.adb
++++ b/src/gcc/testsuite/gnat.dg/derived_type1.adb
+@@ -25,4 +25,3 @@ end;
+ 
+ -- { dg-final { scan-tree-dump-not "VIEW_CONVERT_EXPR<struct derived_type1__root>" "original" } }
+ -- { dg-final { scan-tree-dump-not "VIEW_CONVERT_EXPR<struct derived_type1__derived1>" "original" } }
+--- { dg-final { cleanup-tree-dump "original" } }
+--- a/src/gcc/testsuite/gnat.dg/loop_optimization6.adb
++++ b/src/gcc/testsuite/gnat.dg/loop_optimization6.adb
+@@ -23,4 +23,3 @@ package body Loop_Optimization6 is
+ end Loop_Optimization6;
+ 
+ -- { dg-final { scan-tree-dump-not "goto" "optimized"} }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/noinline2.adb
++++ b/src/gcc/testsuite/gnat.dg/noinline2.adb
+@@ -19,4 +19,3 @@ package body Noinline2 is
+ end Noinline2;
+ 
+ -- { dg-final { scan-tree-dump-times "noinline2.inner" 2 "optimized"  } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/opt15.adb
++++ b/src/gcc/testsuite/gnat.dg/opt15.adb
+@@ -9,4 +9,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "trace_inlined" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/opt34.adb
++++ b/src/gcc/testsuite/gnat.dg/opt34.adb
+@@ -26,4 +26,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump "Created a replacement for result" "esra" } }
+--- { dg-final { cleanup-tree-dump "esra" } }
+--- a/src/gcc/testsuite/gnat.dg/opt37.adb
++++ b/src/gcc/testsuite/gnat.dg/opt37.adb
+@@ -39,4 +39,3 @@ package body Opt37 is
+ end Opt37;
+ 
+ -- { dg-final { scan-tree-dump-not "alloca" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/opt39.adb
++++ b/src/gcc/testsuite/gnat.dg/opt39.adb
+@@ -28,4 +28,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-times "MEM" 1 "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/opt40.adb
++++ b/src/gcc/testsuite/gnat.dg/opt40.adb
+@@ -14,4 +14,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "gnat_rcheck" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/pack9.adb
++++ b/src/gcc/testsuite/gnat.dg/pack9.adb
+@@ -16,4 +16,3 @@ package body Pack9 is
+ end Pack9;
+ 
+ -- { dg-final { scan-tree-dump-not "gnat_rcheck" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/renaming5.adb
++++ b/src/gcc/testsuite/gnat.dg/renaming5.adb
+@@ -27,4 +27,3 @@ package body Renaming5 is
+ end Renaming5;
+ 
+ -- { dg-final { scan-tree-dump-times "goto" 2 "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/specs/noinline3.ads
++++ b/src/gcc/testsuite/gnat.dg/specs/noinline3.ads
+@@ -6,4 +6,3 @@ with Noinline3_Pkg;
+ package Noinline3 is new Noinline3_Pkg (0);
+ 
+ -- { dg-final { scan-tree-dump-times "noinline3.inner" 2 "optimized"  } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/unchecked_convert9.adb
++++ b/src/gcc/testsuite/gnat.dg/unchecked_convert9.adb
+@@ -12,4 +12,3 @@ package body Unchecked_Convert9 is
+ end Unchecked_Convert9;
+ 
+ -- { dg-final { scan-rtl-dump-times "set \\(mem/v" 1 "final" } }
+--- { dg-final { cleanup-rtl-dump "final" } }
+--- a/src/gcc/testsuite/gnat.dg/vect1.adb
++++ b/src/gcc/testsuite/gnat.dg/vect1.adb
+@@ -125,4 +125,3 @@ package body Vect1 is
+ end Vect1;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect11.adb
++++ b/src/gcc/testsuite/gnat.dg/vect11.adb
+@@ -30,4 +30,3 @@ package body Vect11 is
+ end Vect11;
+ 
+ -- { dg-final { scan-tree-dump-not "goto" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/vect12.adb
++++ b/src/gcc/testsuite/gnat.dg/vect12.adb
+@@ -24,4 +24,3 @@ package body Vect12 is
+ end Vect12;
+ 
+ -- { dg-final { scan-tree-dump-not "vectorized 1 loops" "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect13.adb
++++ b/src/gcc/testsuite/gnat.dg/vect13.adb
+@@ -24,4 +24,3 @@ package body Vect13 is
+ end Vect13;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect14.adb
++++ b/src/gcc/testsuite/gnat.dg/vect14.adb
+@@ -22,4 +22,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump-not "VIEW_CONVERT_EXPR" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/vect2.adb
++++ b/src/gcc/testsuite/gnat.dg/vect2.adb
+@@ -125,4 +125,3 @@ package body Vect2 is
+ end Vect2;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect3.adb
++++ b/src/gcc/testsuite/gnat.dg/vect3.adb
+@@ -125,4 +125,3 @@ package body Vect3 is
+ end Vect3;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect4.adb
++++ b/src/gcc/testsuite/gnat.dg/vect4.adb
+@@ -125,4 +125,3 @@ package body Vect4 is
+ end Vect4;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect5.adb
++++ b/src/gcc/testsuite/gnat.dg/vect5.adb
+@@ -125,4 +125,3 @@ package body Vect5 is
+ end Vect5;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/vect6.adb
++++ b/src/gcc/testsuite/gnat.dg/vect6.adb
+@@ -125,4 +125,3 @@ package body Vect6 is
+ end Vect6;
+ 
+ -- { dg-final { scan-tree-dump-times "vectorized 1 loops" 15 "vect"  } }
+--- { dg-final { cleanup-tree-dump "vect" } }
+--- a/src/gcc/testsuite/gnat.dg/volatile6.adb
++++ b/src/gcc/testsuite/gnat.dg/volatile6.adb
+@@ -17,4 +17,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump "goto" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/volatile7.adb
++++ b/src/gcc/testsuite/gnat.dg/volatile7.adb
+@@ -21,4 +21,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump "goto" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/volatile8.adb
++++ b/src/gcc/testsuite/gnat.dg/volatile8.adb
+@@ -19,4 +19,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump "goto" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/gnat.dg/volatile9.adb
++++ b/src/gcc/testsuite/gnat.dg/volatile9.adb
+@@ -17,4 +17,3 @@ begin
+ end;
+ 
+ -- { dg-final { scan-tree-dump "goto" "optimized" } }
+--- { dg-final { cleanup-tree-dump "optimized" } }
+--- a/src/gcc/testsuite/lib/asan-dg.exp
++++ b/src/gcc/testsuite/lib/asan-dg.exp
+@@ -138,6 +138,7 @@ proc asan_finish { args } {
+     }
+     set ld_library_path $asan_saved_library_path
+     set_ld_library_path_env_vars
++    clear_effective_target_cache
+ }
+ 
+ # Symbolize lines like
+--- a/src/gcc/testsuite/lib/atomic-dg.exp
++++ b/src/gcc/testsuite/lib/atomic-dg.exp
+@@ -101,4 +101,5 @@ proc atomic_finish { args } {
+     } else {
+ 	unset TEST_ALWAYS_FLAGS
+     }
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/lib/cilk-plus-dg.exp
++++ b/src/gcc/testsuite/lib/cilk-plus-dg.exp
+@@ -101,4 +101,5 @@ proc cilkplus_finish { args } {
+     } else {
+ 	unset TEST_ALWAYS_FLAGS
+     }
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/lib/clearcap.exp
++++ b/src/gcc/testsuite/lib/clearcap.exp
+@@ -55,4 +55,5 @@ proc clearcap-finish { args } {
+     } else {
+ 	unset TEST_ALWAYS_FLAGS
+     }
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/lib/gcc-dg.exp
++++ b/src/gcc/testsuite/lib/gcc-dg.exp
+@@ -105,6 +105,108 @@ if [check_effective_target_lto] {
+     }
+ }
+ 
++# Deduce generated files from tool flags, return finalcode string
++proc schedule-cleanups { opts } {
++    global additional_sources
++    set finalcode ""
++    set testcases {}
++    lappend testcases [lindex [testname-for-summary] 0]
++    verbose "Cleanup testcases: $testcases" 4
++    if { [info exists additional_sources] && $additional_sources != "" } {
++	lappend testcases $additional_sources
++	verbose "Cleanup testcases, additional: $additional_sources" 4
++    }
++    verbose "Cleanup all options: $opts" 4
++
++    # First some fixups to transform stuff to something manageable ..
++    # --dump= should translate to -d with joined operand.
++    if [regexp -- {(^|\s+)--dump=[^\s]+(\s+|$)} $opts] {
++	regsub -all -- {--dump=} $opts {-d} opts
++    }
++    # -da and -dx are treated as shorthand for -fdump-rtl-all here
++    if [regexp -- {(^|\s+)-d[ax](\s+|$)} $opts] {
++	verbose "Cleanup -d seen" 4
++	lappend opts "-fdump-rtl-all"
++    }
++    # .. and don't question why there is --dump=? and -d?
++
++    # Then handle options that generate non-dump files
++    # TODO
++    # -fprofile-generate -> cleanup-coverage-files()
++    # -fstack-usage -> cleanup-stack-usage()
++    if [regexp -- {(^|\s+)-fstack-usage(\s+|$)} $opts] {
++	verbose "Cleanup -fstack-usage seen" 4
++#	append finalcode "cleanup-stack-usage\n"
++    }
++    global keep_saved_temps_suffixes
++    if [info exists keep_saved_temps_suffixes ] {
++	verbose "dg-keep-saved-temps ${keep_saved_temps_suffixes}" 2
++    }
++    # -save-temps -> cleanup-saved-temps()
++    if [regexp -- {(^|\s+)-save-temps(\s+|$)} $opts] {
++	verbose "Cleanup -save-temps seen" 4
++	if [info exists keep_saved_temps_suffixes] {
++	    append finalcode "cleanup-saved-temps ${keep_saved_temps_suffixes}\n"
++	} else {
++	    append finalcode "cleanup-saved-temps\n"
++	}
++    } else {
++	if [info exists keep_saved_temps_suffixes ] {
++	    error "dg-keep-saved-temps specified but testcase does not -save-temps"
++	    return
++	}
++    }
++    # Finally see if there are any dumps in opts, otherwise we are done
++    if [regexp -- {(?=(?:^|[ \t]+)?)-fdump-[^ \t]+(?=(?:$|[ \t]+)?)} $opts] {
++        # Ipa, Rtl, Tree for simplicity
++        set ptn "{i,r,t}"
++    } else {
++        return $finalcode
++    }
++    # stem.ext.<passnum><fam>.<passname><pass-instances>
++    # (tree)passes can have multiple instances, thus optional trailing *
++    set ptn "\[0-9\]\[0-9\]\[0-9\]$ptn.*"
++    # Handle ltrans files around -flto
++    if [regexp -- {(^|\s+)-flto(\s+|$)} $opts] {
++	verbose "Cleanup -flto seen" 4
++	set ltrans "{ltrans\[0-9\]*.,}"
++    } else {
++	set ltrans ""
++    }
++    set ptn "$ltrans$ptn"
++    verbose "Cleanup final ptn: $ptn" 4
++    set tfiles {}
++    foreach src $testcases {
++	set basename [file tail $src]
++	if { $ltrans != "" } {
++	    # ??? should we use upvar 1 output_file instead of this (dup ?)
++	    set stem [file rootname $basename]
++	    set basename_ext [file extension $basename]
++	    if {$basename_ext != ""} {
++		regsub -- {^.*\.} $basename_ext {} basename_ext
++	    }
++	    lappend tfiles "$stem.{$basename_ext,exe}"
++	    unset basename_ext
++	} else {
++	    lappend tfiles $basename
++	}
++    }
++    if { [llength $tfiles] > 1 } {
++	set tfiles [join $tfiles ","]
++	set tfiles "{$tfiles}"
++    }
++    verbose "Cleanup final testcases: $tfiles" 4
++    # We have to quote the regex
++    regsub -all {([][$^?+*()|\\{}])} "$tfiles.$ptn" {\\\1} ptn
++    set final ""
++    append final {remove-build-file }
++    append final "\"$ptn\""
++    verbose "Cleanup final: $final" 4
++    append finalcode "$final\n"
++
++    return $finalcode
++}
++
+ # Define gcc callbacks for dg.exp.
+ 
+ proc gcc-dg-test-1 { target_compile prog do_what extra_tool_flags } {
+@@ -176,6 +278,7 @@ proc gcc-dg-test-1 { target_compile prog do_what extra_tool_flags } {
+ 	}
+     }
+ 
++    append finalcode [schedule-cleanups "$options $extra_tool_flags"]
+     if { $extra_tool_flags != "" } {
+ 	lappend options "additional_flags=$extra_tool_flags"
+     }
+@@ -277,6 +380,7 @@ if { [info procs ${tool}_load] != [list] \
+ 	    switch [lindex $result 0] {
+ 		"pass" { set status "fail" }
+ 		"fail" { set status "pass" }
++		default { set status [lindex $result 0] }
+ 	    }
+ 	    set result [list $status [lindex $result 1]]
+ 	}
+@@ -527,27 +631,6 @@ proc cleanup-repo-files { } {
+     }
+ }
+ 
+-# Remove compiler-generated RTL dump files for the current test.
+-#
+-# SUFFIX is the filename suffix pattern.
+-proc cleanup-rtl-dump { suffix } {
+-  cleanup-dump "\[0-9\]\[0-9\]\[0-9\]r.$suffix"
+-}
+-
+-# Remove a specific tree dump file for the current test.
+-#
+-# SUFFIX is the tree dump file suffix pattern.
+-proc cleanup-tree-dump { suffix } {
+-  cleanup-dump "\[0-9\]\[0-9\]\[0-9\]t.$suffix"
+-}
+-
+-# Remove a specific ipa dump file for the current test.
+-#
+-# SUFFIX is the ipa dump file suffix pattern.
+-proc cleanup-ipa-dump { suffix } {
+-  cleanup-dump "\[0-9\]\[0-9\]\[0-9\]i.$suffix"
+-}
+-
+ # Remove a final insns dump file for the current test.
+ proc cleanup-final-insns-dump { } {
+     set testcase [testname-for-summary]
+@@ -592,30 +675,6 @@ proc cleanup-ada-spec { } {
+     }
+ }
+ 
+-# Remove all dump files with the provided suffix.
+-proc cleanup-dump { suffix } {
+-    global additional_sources_used
+-    set testcase [testname-for-summary]
+-    # The name might include a list of options; extract the file name.
+-    set src [file tail [lindex $testcase 0]]
+-    remove-build-file "[file tail $src].$suffix"
+-    remove-build-file "[file rootname [file tail $src]].exe.$suffix"
+-    remove-build-file "[file rootname [file tail $src]].exe.ltrans\[0-9\]*.$suffix"
+-    # -fcompare-debug dumps
+-    remove-build-file "[file tail $src].gk.$suffix"
+-
+-    # Clean up dump files for additional source files.
+-    if [info exists additional_sources_used] {
+-	foreach srcfile $additional_sources_used {
+-	    remove-build-file "[file tail $srcfile].$suffix"
+-	    remove-build-file "[file rootname [file tail $srcfile]].exe.$suffix"
+-	    remove-build-file "[file rootname [file tail $srcfile]].exe.ltrans\[0-9\]*.$suffix"
+-	    # -fcompare-debug dumps
+-	    remove-build-file "[file tail $srcfile].gk.$suffix"
+-	}
+-    }
+-}
+-
+ # Remove files kept by --save-temps for the current test.
+ #
+ # Currently this is only .i, .ii, .s and .o files, but more can be added
+@@ -658,6 +717,24 @@ proc cleanup-saved-temps { args } {
+     }
+ }
+ 
++
++# Files to be kept after cleanup of --save-temps for the current test.
++# ARGS is a list of suffixes to NOT delete.
++proc dg-keep-saved-temps { args } {
++    global keep_saved_temps_suffixes
++    set keep_saved_temps_suffixes {}
++
++    # add the to-be-kept suffixes
++    foreach suffix {".mii" ".ii" ".i" ".s" ".o" ".gkd" ".res" ".ltrans.out"} {
++	if {[lsearch $args $suffix] >= 0} {
++	    lappend keep_saved_temps_suffixes $suffix
++	}
++    }
++    if { [llength keep_saved_temps_suffixes] < 1 } {
++	error "dg-keep-saved-temps ${args} did not match any known suffix"
++    }
++}
++
+ # Scan Fortran modules for a given regexp.
+ #
+ # Argument 0 is the module name
+@@ -760,6 +837,7 @@ if { [info procs saved-dg-test] == [list] } {
+ 	global shouldfail
+ 	global testname_with_flags
+ 	global set_target_env_var
++	global keep_saved_temps_suffixes
+ 
+ 	if { [ catch { eval saved-dg-test $args } errmsg ] } {
+ 	    set saved_info $errorInfo
+@@ -785,6 +863,9 @@ if { [info procs saved-dg-test] == [list] } {
+ 	if [info exists set_target_env_var] {
+ 	    unset set_target_env_var
+ 	}
++	if [info exists keep_saved_temps_suffixes] {
++	    unset keep_saved_temps_suffixes
++	}
+ 	unset_timeout_vars
+ 	if [info exists compiler_conditional_xfail_data] {
+ 	    unset compiler_conditional_xfail_data
+--- a/src/gcc/testsuite/lib/mpx-dg.exp
++++ b/src/gcc/testsuite/lib/mpx-dg.exp
+@@ -142,4 +142,5 @@ proc mpx_finish { args } {
+     }
+     set ld_library_path $mpx_saved_library_path
+     set_ld_library_path_env_vars
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/lib/profopt.exp
++++ b/src/gcc/testsuite/lib/profopt.exp
+@@ -304,6 +304,9 @@ proc profopt-execute { src } {
+ 	    return
+ 	}
+ 
++	# schedule removal of dump files et al
++	# Do this before the call below destroys additional_sources..
++	append use_final_code [schedule-cleanups "$option $extra_flags"]
+         set extra_options [dg-additional-files-options "" "$src"]
+ 
+ 	# Remove old profiling data files.  Make sure additional_sources_used is
+--- a/src/gcc/testsuite/lib/target-supports.exp
++++ b/src/gcc/testsuite/lib/target-supports.exp
+@@ -117,6 +117,7 @@ proc current_target_name { } {
+ 
+ proc check_cached_effective_target { prop args } {
+     global et_cache
++    global et_prop_list
+ 
+     set target [current_target_name]
+     if {![info exists et_cache($prop,target)]
+@@ -124,12 +125,40 @@ proc check_cached_effective_target { prop args } {
+ 	verbose "check_cached_effective_target $prop: checking $target" 2
+ 	set et_cache($prop,target) $target
+ 	set et_cache($prop,value) [uplevel eval $args]
++	if {![info exists et_prop_list]
++	    || [lsearch $et_prop_list $prop] < 0} {
++	    lappend et_prop_list $prop
++	}
++	verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
+     }
+     set value $et_cache($prop,value)
+     verbose "check_cached_effective_target $prop: returning $value for $target" 2
+     return $value
+ }
+ 
++# Clear effective-target cache. This is useful after testing
++# effective-target features and overriding TEST_ALWAYS_FLAGS and/or
++# ALWAYS_CXXFLAGS.
++# If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
++# do a clear_effective_target_cache at the end as the target cache can
++# make decisions based upon the flags, and those decisions need to be
++# redone when the flags change. An example of this is the
++# asan_init/asan_finish pair.
++
++proc clear_effective_target_cache { } {
++    global et_cache
++    global et_prop_list
++
++    if {[info exists et_prop_list]} {
++	verbose "clear_effective_target_cache: $et_prop_list" 2
++	foreach prop $et_prop_list {
++	    unset et_cache($prop,value)
++	    unset et_cache($prop,target)
++	}
++	unset et_prop_list
++    }
++}
++
+ # Like check_compile, but delete the output file and return true if the
+ # compiler printed no messages.
+ proc check_no_compiler_messages_nocache {args} {
+@@ -944,6 +973,43 @@ proc check_effective_target_fpic { } {
+     return 0
+ }
+ 
++# On AArch64, if -fpic is not supported, then we will fall back to -fPIC
++# silently.  So, we can't rely on above "check_effective_target_fpic" as it
++# assumes compiler will give warning if -fpic not supported.  Here we check
++# whether binutils supports those new -fpic relocation modifiers, and assume
++# -fpic is supported if there is binutils support.  GCC configuration will
++# enable -fpic for AArch64 in this case.
++#
++# "check_effective_target_aarch64_small_fpic" is dedicated for checking small
++# memory model -fpic relocation types.
++
++proc check_effective_target_aarch64_small_fpic { } {
++    if { [istarget aarch64*-*-*] } {
++	return [check_no_compiler_messages aarch64_small_fpic object {
++	    void foo (void) { asm ("ldr	x0, [x2, #:gotpage_lo15:globalsym]"); }
++	}]
++    } else {
++	return 0
++    }
++}
++
++# On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
++# the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
++# in binutils since 2015-03-04 as PR gas/17843.
++#
++# This test directive make sure binutils support all features needed by TLS LE
++# under -mtls-size=32 on AArch64.
++
++proc check_effective_target_aarch64_tlsle32 { } {
++    if { [istarget aarch64*-*-*] } {
++	return [check_no_compiler_messages aarch64_tlsle32 object {
++	    void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
++	}]
++    } else {
++	return 0
++    }
++}
++
+ # Return 1 if -shared is supported, as in no warnings or errors
+ # emitted, 0 otherwise.
+ 
+@@ -2622,6 +2688,17 @@ proc add_options_for_arm_v8_neon { flags } {
+     return "$flags $et_arm_v8_neon_flags -march=armv8-a"
+ }
+ 
++# Add the options needed for ARMv8.1 Adv.SIMD.  Also adds the ARMv8 NEON
++# options for AArch64 and for ARM.
++
++proc add_options_for_arm_v8_1a_neon { flags } {
++    if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
++	return "$flags"
++    }
++    global et_arm_v8_1a_neon_flags
++    return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
++}
++
+ proc add_options_for_arm_crc { flags } {
+     if { ! [check_effective_target_arm_crc_ok] } {
+         return "$flags"
+@@ -2709,7 +2786,11 @@ proc check_effective_target_arm_neon_fp16_ok_nocache { } {
+     set et_arm_neon_fp16_flags ""
+     if { [check_effective_target_arm32] } {
+ 	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
+-	               "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
++		       "-mfpu=neon-fp16 -mfloat-abi=softfp"
++		       "-mfp16-format=ieee"
++		       "-mfloat-abi=softfp -mfp16-format=ieee"
++		       "-mfpu=neon-fp16 -mfp16-format=ieee"
++		       "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
+ 	    if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
+ 		#include "arm_neon.h"
+ 		float16x4_t
+@@ -2732,6 +2813,21 @@ proc check_effective_target_arm_neon_fp16_ok { } {
+ 		check_effective_target_arm_neon_fp16_ok_nocache]
+ }
+ 
++proc check_effective_target_arm_neon_fp16_hw { } {
++    if {! [check_effective_target_arm_neon_fp16_ok] } {
++	return 0
++    }
++    global et_arm_neon_fp16_flags
++    check_runtime_nocache arm_neon_fp16_hw {
++	int
++	main (int argc, char **argv)
++	{
++	  asm ("vcvt.f32.f16 q1, d0");
++	  return 0;
++	}
++    } $et_arm_neon_fp16_flags
++}
++
+ proc add_options_for_arm_neon_fp16 { flags } {
+     if { ! [check_effective_target_arm_neon_fp16_ok] } {
+ 	return "$flags"
+@@ -2888,7 +2984,8 @@ foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
+ 				     v7r "-march=armv7-r" __ARM_ARCH_7R__
+ 				     v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
+ 				     v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
+-				     v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
++				     v8a "-march=armv8-a" __ARM_ARCH_8A__
++				     v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
+     eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
+ 	proc check_effective_target_arm_arch_FUNC_ok { } {
+ 	    if { [ string match "*-marm*" "FLAG" ] &&
+@@ -3065,6 +3162,41 @@ proc check_effective_target_arm_neonv2_hw { } {
+     } [add_options_for_arm_neonv2 ""]]
+ }
+ 
++# Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
++# otherwise.  The test is valid for AArch64 and ARM.  Record the command
++# line options needed.
++
++proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
++    global et_arm_v8_1a_neon_flags
++    set et_arm_v8_1a_neon_flags ""
++
++    if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
++	return 0;
++    }
++
++    # Iterate through sets of options to find the compiler flags that
++    # need to be added to the -march option.  Start with the empty set
++    # since AArch64 only needs the -march setting.
++    foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
++		       "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
++	if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
++	    #if !defined (__ARM_FEATURE_QRDMX)
++	    #error "__ARM_FEATURE_QRDMX not defined"
++	    #endif
++	} "$flags -march=armv8.1-a"] } {
++	    set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
++	    return 1
++	}
++    }
++
++    return 0;
++}
++
++proc check_effective_target_arm_v8_1a_neon_ok { } {
++    return [check_cached_effective_target arm_v8_1a_neon_ok \
++		check_effective_target_arm_v8_1a_neon_ok_nocache]
++}
++
+ # Return 1 if the target supports executing ARMv8 NEON instructions, 0
+ # otherwise.
+ 
+@@ -3083,6 +3215,44 @@ proc check_effective_target_arm_v8_neon_hw { } {
+     } [add_options_for_arm_v8_neon ""]]
+ }
+ 
++# Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
++# otherwise.  The test is valid for AArch64 and ARM.
++
++proc check_effective_target_arm_v8_1a_neon_hw { } {
++    if { ![check_effective_target_arm_v8_1a_neon_ok] } {
++	return 0;
++    }
++    return [check_runtime arm_v8_1a_neon_hw_available {
++	int
++	main (void)
++	{
++	  #ifdef __ARM_ARCH_ISA_A64
++	  __Int32x2_t a = {0, 1};
++	  __Int32x2_t b = {0, 2};
++	  __Int32x2_t result;
++
++	  asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
++	       : "=w"(result)
++	       : "w"(a), "w"(b)
++	       : /* No clobbers.  */);
++
++	  #else
++
++	  __simd64_int32_t a = {0, 1};
++	  __simd64_int32_t b = {0, 2};
++	  __simd64_int32_t result;
++
++	  asm ("vqrdmlah.s32 %P0, %P1, %P2"
++	       : "=w"(result)
++	       : "w"(a), "w"(b)
++	       : /* No clobbers.  */);
++	  #endif
++
++	  return result[0];
++	}
++    } [add_options_for_arm_v8_1a_neon ""]]
++}
++
+ # Return 1 if this is a ARM target with NEON enabled.
+ 
+ proc check_effective_target_arm_neon { } {
+@@ -3865,6 +4035,7 @@ proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
+     } else {
+         set et_vect_widen_sum_hi_to_si_pattern_saved 0
+         if { [istarget powerpc*-*-*]
++             || [istarget aarch64*-*-*]
+              || [istarget ia64-*-*] } {
+             set et_vect_widen_sum_hi_to_si_pattern_saved 1
+         }
+@@ -4718,6 +4889,27 @@ proc check_effective_target_vect_call_copysignf { } {
+     return $et_vect_call_copysignf_saved
+ }
+ 
++# Return 1 if the target supports hardware square root instructions.
++
++proc check_effective_target_sqrt_insn { } {
++    global et_sqrt_insn_saved
++
++    if [info exists et_sqrt_insn_saved] {
++	verbose "check_effective_target_hw_sqrt: using cached result" 2
++    } else {
++	set et_sqrt_insn_saved 0
++	if { [istarget x86_64-*-*]
++	     || [istarget powerpc*-*-*]
++	     || [istarget aarch64*-*-*]
++	     || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
++	   set et_sqrt_insn_saved 1
++	}
++    }
++
++    verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
++    return $et_sqrt_insn_saved
++}
++
+ # Return 1 if the target supports vector sqrtf calls.
+ 
+ proc check_effective_target_vect_call_sqrtf { } {
+@@ -4977,7 +5169,8 @@ proc check_effective_target_section_anchors { } {
+     } else {
+         set et_section_anchors_saved 0
+         if { [istarget powerpc*-*-*]
+-	      || [istarget arm*-*-*] } {
++	      || [istarget arm*-*-*] 
++	      || [istarget aarch64*-*-*] } {
+            set et_section_anchors_saved 1
+         }
+     }
+@@ -6154,6 +6347,23 @@ proc check_effective_target_aarch64_tiny { } {
+     }
+ }
+ 
++# Create functions to check that the AArch64 assembler supports the
++# various architecture extensions via the .arch_extension pseudo-op.
++
++foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
++    eval [string map [list FUNC $aarch64_ext] {
++	proc check_effective_target_aarch64_asm_FUNC_ok { } {
++	  if { [istarget aarch64*-*-*] } {
++		return [check_no_compiler_messages aarch64_FUNC_assembler object {
++			__asm__ (".arch_extension FUNC");
++		} "-march=armv8-a+FUNC"]
++	  } else {
++		return 0
++	  }
++	}
++    }]
++}
++
+ proc check_effective_target_aarch64_small { } {
+     if { [istarget aarch64*-*-*] } {
+ 	return [check_no_compiler_messages aarch64_small object {
+--- a/src/gcc/testsuite/lib/tsan-dg.exp
++++ b/src/gcc/testsuite/lib/tsan-dg.exp
+@@ -149,4 +149,5 @@ proc tsan_finish { args } {
+     }
+     set ld_library_path $tsan_saved_library_path
+     set_ld_library_path_env_vars
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/lib/ubsan-dg.exp
++++ b/src/gcc/testsuite/lib/ubsan-dg.exp
+@@ -121,4 +121,5 @@ proc ubsan_finish { args } {
+     }
+     set ld_library_path $ubsan_saved_library_path
+     set_ld_library_path_env_vars
++    clear_effective_target_cache
+ }
+--- a/src/gcc/testsuite/obj-c++.dg/encode-2.mm
++++ b/src/gcc/testsuite/obj-c++.dg/encode-2.mm
+@@ -24,5 +24,4 @@ const char *enc3 = @encode(anonymous);
+ 
+ /* { dg-final { scan-assembler "{Vec<float>=ffi}" } }  */
+ /* { dg-final { scan-assembler "{Vec<double>=ddi}" } }  */
+-/* { dg-final { scan-file "encode-2.o" "{?={Vec<double>=ddi}{Vec<float>=ffi}fd{Vec<signed char>=cci}i}" } }
+-/* { dg-final cleanup-saved-temps } */
++/* { dg-final { scan-file "encode-2.o" "{?={Vec<double>=ddi}{Vec<float>=ffi}fd{Vec<signed char>=cci}i}" } } */
+--- a/src/gcc/tree-cfg.c
++++ b/src/gcc/tree-cfg.c
+@@ -4023,10 +4023,8 @@ verify_gimple_assign_ternary (gassign *stmt)
+     case SAD_EXPR:
+       if (!useless_type_conversion_p (rhs1_type, rhs2_type)
+ 	  || !useless_type_conversion_p (lhs_type, rhs3_type)
+-	  || 2 * GET_MODE_BITSIZE (GET_MODE_INNER
+-				     (TYPE_MODE (TREE_TYPE (rhs1_type))))
+-	       > GET_MODE_BITSIZE (GET_MODE_INNER
+-				     (TYPE_MODE (TREE_TYPE (lhs_type)))))
++	  || 2 * GET_MODE_UNIT_BITSIZE (TYPE_MODE (TREE_TYPE (rhs1_type)))
++	       > GET_MODE_UNIT_BITSIZE (TYPE_MODE (TREE_TYPE (lhs_type))))
+ 	{
+ 	  error ("type mismatch in sad expression");
+ 	  debug_generic_expr (lhs_type);
+--- a/src/gcc/tree-pass.h
++++ b/src/gcc/tree-pass.h
+@@ -380,6 +380,7 @@ extern gimple_opt_pass *make_pass_loop_prefetch (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_iv_optimize (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_tree_loop_done (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_ch (gcc::context *ctxt);
++extern gimple_opt_pass *make_pass_ch_vect (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_ccp (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_phi_only_cprop (gcc::context *ctxt);
+ extern gimple_opt_pass *make_pass_build_ssa (gcc::context *ctxt);
+--- a/src/gcc/tree-ssa-loop-ch.c
++++ b/src/gcc/tree-ssa-loop-ch.c
+@@ -143,12 +143,23 @@ do_while_loop_p (struct loop *loop)
+   return true;
+ }
+ 
+-/* For all loops, copy the condition at the end of the loop body in front
+-   of the loop.  This is beneficial since it increases efficiency of
+-   code motion optimizations.  It also saves one jump on entry to the loop.  */
+-
+ namespace {
+ 
++/* Common superclass for both header-copying phases.  */
++class ch_base : public gimple_opt_pass
++{
++  protected:
++    ch_base (pass_data data, gcc::context *ctxt)
++      : gimple_opt_pass (data, ctxt)
++    {}
++
++  /* Copies headers of all loops in FUN for which process_loop_p is true.  */
++  unsigned int copy_headers (function *fun);
++
++  /* Return true to copy headers of LOOP or false to skip.  */
++  virtual bool process_loop_p (struct loop *loop) = 0;
++};
++
+ const pass_data pass_data_ch =
+ {
+   GIMPLE_PASS, /* type */
+@@ -162,21 +173,68 @@ const pass_data pass_data_ch =
+   0, /* todo_flags_finish */
+ };
+ 
+-class pass_ch : public gimple_opt_pass
++class pass_ch : public ch_base
+ {
+ public:
+   pass_ch (gcc::context *ctxt)
+-    : gimple_opt_pass (pass_data_ch, ctxt)
++    : ch_base (pass_data_ch, ctxt)
+   {}
+ 
+   /* opt_pass methods: */
+   virtual bool gate (function *) { return flag_tree_ch != 0; }
++  
++  /* Initialize and finalize loop structures, copying headers inbetween.  */
+   virtual unsigned int execute (function *);
+ 
++protected:
++  /* ch_base method: */
++  virtual bool process_loop_p (struct loop *loop);
+ }; // class pass_ch
+ 
++const pass_data pass_data_ch_vect =
++{
++  GIMPLE_PASS, /* type */
++  "ch_vect", /* name */
++  OPTGROUP_LOOP, /* optinfo_flags */
++  TV_TREE_CH, /* tv_id */
++  ( PROP_cfg | PROP_ssa ), /* properties_required */
++  0, /* properties_provided */
++  0, /* properties_destroyed */
++  0, /* todo_flags_start */
++  0, /* todo_flags_finish */
++};
++
++/* This is a more aggressive version of the same pass, designed to run just
++   before if-conversion and vectorization, to put more loops into the form
++   required for those phases.  */
++class pass_ch_vect : public ch_base
++{
++public:
++  pass_ch_vect (gcc::context *ctxt)
++    : ch_base (pass_data_ch_vect, ctxt)
++  {}
++
++  /* opt_pass methods: */
++  virtual bool gate (function *fun)
++  {
++    return flag_tree_ch != 0
++	   && (flag_tree_loop_vectorize != 0 || fun->has_force_vectorize_loops);
++  }
++  
++  /* Just copy headers, no initialization/finalization of loop structures.  */
++  virtual unsigned int execute (function *);
++
++protected:
++  /* ch_base method: */
++  virtual bool process_loop_p (struct loop *loop);
++}; // class pass_ch_vect
++
++/* For all loops, copy the condition at the end of the loop body in front
++   of the loop.  This is beneficial since it increases efficiency of
++   code motion optimizations.  It also saves one jump on entry to the loop.  */
++
+ unsigned int
+-pass_ch::execute (function *fun)
++ch_base::copy_headers (function *fun)
+ {
+   struct loop *loop;
+   basic_block header;
+@@ -186,13 +244,8 @@ pass_ch::execute (function *fun)
+   unsigned bbs_size;
+   bool changed = false;
+ 
+-  loop_optimizer_init (LOOPS_HAVE_PREHEADERS
+-		       | LOOPS_HAVE_SIMPLE_LATCHES);
+   if (number_of_loops (fun) <= 1)
+-    {
+-      loop_optimizer_finalize ();
+       return 0;
+-    }
+ 
+   bbs = XNEWVEC (basic_block, n_basic_blocks_for_fn (fun));
+   copied_bbs = XNEWVEC (basic_block, n_basic_blocks_for_fn (fun));
+@@ -209,7 +262,7 @@ pass_ch::execute (function *fun)
+ 	 written as such, or because jump threading transformed it into one),
+ 	 we might be in fact peeling the first iteration of the loop.  This
+ 	 in general is not a good idea.  */
+-      if (do_while_loop_p (loop))
++      if (!process_loop_p (loop))
+ 	continue;
+ 
+       /* Iterate the header copying up to limit; this takes care of the cases
+@@ -296,17 +349,88 @@ pass_ch::execute (function *fun)
+       changed = true;
+     }
+ 
+-  update_ssa (TODO_update_ssa);
++  if (changed)
++    update_ssa (TODO_update_ssa);
+   free (bbs);
+   free (copied_bbs);
+ 
+-  loop_optimizer_finalize ();
+   return changed ? TODO_cleanup_cfg : 0;
+ }
+ 
++/* Initialize the loop structures we need, and finalize after.  */
++
++unsigned int
++pass_ch::execute (function *fun)
++{
++  loop_optimizer_init (LOOPS_HAVE_PREHEADERS
++		       | LOOPS_HAVE_SIMPLE_LATCHES);
++
++  unsigned int res = copy_headers (fun);
++
++  loop_optimizer_finalize ();
++  return res;
++}
++
++/* Assume an earlier phase has already initialized all the loop structures that
++   we need here (and perhaps others too), and that these will be finalized by
++   a later phase.  */
++   
++unsigned int
++pass_ch_vect::execute (function *fun)
++{
++  return copy_headers (fun);
++}
++
++/* Apply header copying according to a very simple test of do-while shape.  */
++
++bool
++pass_ch::process_loop_p (struct loop *loop)
++{
++  return !do_while_loop_p (loop);
++}
++
++/* Apply header-copying to loops where we might enable vectorization.  */
++
++bool
++pass_ch_vect::process_loop_p (struct loop *loop)
++{
++  if (!flag_tree_vectorize && !loop->force_vectorize)
++    return false;
++
++  if (loop->dont_vectorize)
++    return false;
++
++  if (!do_while_loop_p (loop))
++    return true;
++
++ /* The vectorizer won't handle anything with multiple exits, so skip.  */
++  edge exit = single_exit (loop);
++  if (!exit)
++    return false;
++
++  /* Copy headers iff there looks to be code in the loop after the exit block,
++     i.e. the exit block has an edge to another block (besides the latch,
++     which should be empty).  */
++  edge_iterator ei;
++  edge e;
++  FOR_EACH_EDGE (e, ei, exit->src->succs)
++    if (!loop_exit_edge_p (loop, e)
++	&& e->dest != loop->header
++	&& e->dest != loop->latch)
++      return true;
++
++  return false;
++}
++
+ } // anon namespace
+ 
+ gimple_opt_pass *
++make_pass_ch_vect (gcc::context *ctxt)
++{
++  return new pass_ch_vect (ctxt);
++}
++
++gimple_opt_pass *
+ make_pass_ch (gcc::context *ctxt)
+ {
+   return new pass_ch (ctxt);
+--- a/src/gcc/tree-ssa-loop-ivopts.c
++++ b/src/gcc/tree-ssa-loop-ivopts.c
+@@ -226,6 +226,7 @@ struct cost_pair
+ struct iv_use
+ {
+   unsigned id;		/* The id of the use.  */
++  unsigned sub_id;	/* The id of the sub use.  */
+   enum use_type type;	/* Type of the use.  */
+   struct iv *iv;	/* The induction variable it is based on.  */
+   gimple stmt;		/* Statement in that it occurs.  */
+@@ -239,6 +240,11 @@ struct iv_use
+ 
+   struct iv_cand *selected;
+ 			/* The selected candidate.  */
++
++  struct iv_use *next;	/* The next sub use.  */
++  tree addr_base;	/* Base address with const offset stripped.  */
++  unsigned HOST_WIDE_INT addr_offset;
++			/* Const offset stripped from base address.  */
+ };
+ 
+ /* The position where the iv is computed.  */
+@@ -555,7 +561,11 @@ dump_iv (FILE *file, struct iv *iv)
+ void
+ dump_use (FILE *file, struct iv_use *use)
+ {
+-  fprintf (file, "use %d\n", use->id);
++  fprintf (file, "use %d", use->id);
++  if (use->sub_id)
++    fprintf (file, ".%d", use->sub_id);
++
++  fprintf (file, "\n");
+ 
+   switch (use->type)
+     {
+@@ -604,8 +614,12 @@ dump_uses (FILE *file, struct ivopts_data *data)
+   for (i = 0; i < n_iv_uses (data); i++)
+     {
+       use = iv_use (data, i);
+-
+-      dump_use (file, use);
++      do
++	{
++	  dump_use (file, use);
++	  use = use->next;
++	}
++      while (use);
+       fprintf (file, "\n");
+     }
+ }
+@@ -1326,33 +1340,84 @@ find_induction_variables (struct ivopts_data *data)
+   return true;
+ }
+ 
+-/* Records a use of type USE_TYPE at *USE_P in STMT whose value is IV.  */
++/* Records a use of type USE_TYPE at *USE_P in STMT whose value is IV.
++   For address type use, ADDR_BASE is the stripped IV base, ADDR_OFFSET
++   is the const offset stripped from IV base.  For uses of other types,
++   ADDR_BASE and ADDR_OFFSET are zero by default.  */
+ 
+ static struct iv_use *
+ record_use (struct ivopts_data *data, tree *use_p, struct iv *iv,
+-	    gimple stmt, enum use_type use_type)
++	    gimple stmt, enum use_type use_type, tree addr_base = NULL,
++	    unsigned HOST_WIDE_INT addr_offset = 0)
+ {
+   struct iv_use *use = XCNEW (struct iv_use);
+ 
+   use->id = n_iv_uses (data);
++  use->sub_id = 0;
+   use->type = use_type;
+   use->iv = iv;
+   use->stmt = stmt;
+   use->op_p = use_p;
+   use->related_cands = BITMAP_ALLOC (NULL);
++  use->next = NULL;
++  use->addr_base = addr_base;
++  use->addr_offset = addr_offset;
+ 
+   /* To avoid showing ssa name in the dumps, if it was not reset by the
+      caller.  */
+   iv->ssa_name = NULL_TREE;
+ 
+-  if (dump_file && (dump_flags & TDF_DETAILS))
+-    dump_use (dump_file, use);
+-
+   data->iv_uses.safe_push (use);
+ 
+   return use;
+ }
+ 
++/* Records a sub use of type USE_TYPE at *USE_P in STMT whose value is IV.
++   The sub use is recorded under the one whose use id is ID_GROUP.  */
++
++static struct iv_use *
++record_sub_use (struct ivopts_data *data, tree *use_p,
++		    struct iv *iv, gimple stmt, enum use_type use_type,
++		    tree addr_base, unsigned HOST_WIDE_INT addr_offset,
++		    unsigned int id_group)
++{
++  struct iv_use *use = XCNEW (struct iv_use);
++  struct iv_use *group = iv_use (data, id_group);
++
++  use->id = group->id;
++  use->sub_id = 0;
++  use->type = use_type;
++  use->iv = iv;
++  use->stmt = stmt;
++  use->op_p = use_p;
++  use->related_cands = NULL;
++  use->addr_base = addr_base;
++  use->addr_offset = addr_offset;
++
++  /* Sub use list is maintained in offset ascending order.  */
++  if (addr_offset <= group->addr_offset)
++    {
++      use->related_cands = group->related_cands;
++      group->related_cands = NULL;
++      use->next = group;
++      data->iv_uses[id_group] = use;
++    }
++  else
++    {
++      struct iv_use *pre;
++      do
++	{
++	  pre = group;
++	  group = group->next;
++	}
++      while (group && addr_offset > group->addr_offset);
++      use->next = pre->next;
++      pre->next = use;
++    }
++
++  return use;
++}
++
+ /* Checks whether OP is a loop-level invariant and if so, records it.
+    NONLINEAR_USE is true if the invariant is used in a way we do not
+    handle specially.  */
+@@ -1837,6 +1902,50 @@ may_be_nonaddressable_p (tree expr)
+   return false;
+ }
+ 
++static tree
++strip_offset (tree expr, unsigned HOST_WIDE_INT *offset);
++
++/* Record a use of type USE_TYPE at *USE_P in STMT whose value is IV.
++   If there is an existing use which has same stripped iv base and step,
++   this function records this one as a sub use to that; otherwise records
++   it as a normal one.  */
++
++static struct iv_use *
++record_group_use (struct ivopts_data *data, tree *use_p,
++		  struct iv *iv, gimple stmt, enum use_type use_type)
++{
++  unsigned int i;
++  struct iv_use *use;
++  tree addr_base;
++  unsigned HOST_WIDE_INT addr_offset;
++
++  /* Only support sub use for address type uses, that is, with base
++     object.  */
++  if (!iv->base_object)
++    return record_use (data, use_p, iv, stmt, use_type);
++
++  addr_base = strip_offset (iv->base, &addr_offset);
++  for (i = 0; i < n_iv_uses (data); i++)
++    {
++      use = iv_use (data, i);
++      if (use->type != USE_ADDRESS || !use->iv->base_object)
++	continue;
++
++      /* Check if it has the same stripped base and step.  */
++      if (operand_equal_p (iv->base_object, use->iv->base_object, 0)
++	  && operand_equal_p (iv->step, use->iv->step, 0)
++	  && operand_equal_p (addr_base, use->addr_base, 0))
++	break;
++    }
++
++  if (i == n_iv_uses (data))
++    return record_use (data, use_p, iv, stmt,
++		       use_type, addr_base, addr_offset);
++  else
++    return record_sub_use (data, use_p, iv, stmt,
++			   use_type, addr_base, addr_offset, i);
++}
++
+ /* Finds addresses in *OP_P inside STMT.  */
+ 
+ static void
+@@ -1947,7 +2056,7 @@ find_interesting_uses_address (struct ivopts_data *data, gimple stmt, tree *op_p
+     }
+ 
+   civ = alloc_iv (base, step);
+-  record_use (data, op_p, civ, stmt, USE_ADDRESS);
++  record_group_use (data, op_p, civ, stmt, USE_ADDRESS);
+   return;
+ 
+ fail:
+@@ -2133,6 +2242,172 @@ find_interesting_uses (struct ivopts_data *data)
+   free (body);
+ }
+ 
++/* Compute maximum offset of [base + offset] addressing mode
++   for memory reference represented by USE.  */
++
++static HOST_WIDE_INT
++compute_max_addr_offset (struct iv_use *use)
++{
++  int width;
++  rtx reg, addr;
++  HOST_WIDE_INT i, off;
++  unsigned list_index, num;
++  addr_space_t as;
++  machine_mode mem_mode, addr_mode;
++  static vec<HOST_WIDE_INT> max_offset_list;
++
++  as = TYPE_ADDR_SPACE (TREE_TYPE (use->iv->base));
++  mem_mode = TYPE_MODE (TREE_TYPE (*use->op_p));
++
++  num = max_offset_list.length ();
++  list_index = (unsigned) as * MAX_MACHINE_MODE + (unsigned) mem_mode;
++  if (list_index >= num)
++    {
++      max_offset_list.safe_grow (list_index + MAX_MACHINE_MODE);
++      for (; num < max_offset_list.length (); num++)
++	max_offset_list[num] = -1;
++    }
++
++  off = max_offset_list[list_index];
++  if (off != -1)
++    return off;
++
++  addr_mode = targetm.addr_space.address_mode (as);
++  reg = gen_raw_REG (addr_mode, LAST_VIRTUAL_REGISTER + 1);
++  addr = gen_rtx_fmt_ee (PLUS, addr_mode, reg, NULL_RTX);
++
++  width = GET_MODE_BITSIZE (addr_mode) - 1;
++  if (width > (HOST_BITS_PER_WIDE_INT - 1))
++    width = HOST_BITS_PER_WIDE_INT - 1;
++
++  for (i = width; i > 0; i--)
++    {
++      off = ((unsigned HOST_WIDE_INT) 1 << i) - 1;
++      XEXP (addr, 1) = gen_int_mode (off, addr_mode);
++      if (memory_address_addr_space_p (mem_mode, addr, as))
++	break;
++
++      /* For some strict-alignment targets, the offset must be naturally
++	 aligned.  Try an aligned offset if mem_mode is not QImode.  */
++      off = ((unsigned HOST_WIDE_INT) 1 << i);
++      if (off > GET_MODE_SIZE (mem_mode) && mem_mode != QImode)
++	{
++	  off -= GET_MODE_SIZE (mem_mode);
++	  XEXP (addr, 1) = gen_int_mode (off, addr_mode);
++	  if (memory_address_addr_space_p (mem_mode, addr, as))
++	    break;
++	}
++    }
++  if (i == 0)
++    off = 0;
++
++  max_offset_list[list_index] = off;
++  return off;
++}
++
++/* Check if all small groups should be split.  Return true if and
++   only if:
++
++     1) At least one groups contain two uses with different offsets.
++     2) No group contains more than two uses with different offsets.
++
++   Return false otherwise.  We want to split such groups because:
++
++     1) Small groups don't have much benefit and may interfer with
++	general candidate selection.
++     2) Size for problem with only small groups is usually small and
++	general algorithm can handle it well.
++
++   TODO -- Above claim may not hold when auto increment is supported.  */
++
++static bool
++split_all_small_groups (struct ivopts_data *data)
++{
++  bool split_p = false;
++  unsigned int i, n, distinct;
++  struct iv_use *pre, *use;
++
++  n = n_iv_uses (data);
++  for (i = 0; i < n; i++)
++    {
++      use = iv_use (data, i);
++      if (!use->next)
++	continue;
++
++      distinct = 1;
++      gcc_assert (use->type == USE_ADDRESS);
++      for (pre = use, use = use->next; use; pre = use, use = use->next)
++	{
++	  if (pre->addr_offset != use->addr_offset)
++	    distinct++;
++
++	  if (distinct > 2)
++	    return false;
++	}
++      if (distinct == 2)
++	split_p = true;
++    }
++
++  return split_p;
++}
++
++/* For each group of address type uses, this function further groups
++   these uses according to the maximum offset supported by target's
++   [base + offset] addressing mode.  */
++
++static void
++group_address_uses (struct ivopts_data *data)
++{
++  HOST_WIDE_INT max_offset = -1;
++  unsigned int i, n, sub_id;
++  struct iv_use *pre, *use;
++  unsigned HOST_WIDE_INT addr_offset_first;
++
++  /* Reset max offset to split all small groups.  */
++  if (split_all_small_groups (data))
++    max_offset = 0;
++
++  n = n_iv_uses (data);
++  for (i = 0; i < n; i++)
++    {
++      use = iv_use (data, i);
++      if (!use->next)
++	continue;
++
++      gcc_assert (use->type == USE_ADDRESS);
++      if (max_offset != 0)
++	max_offset = compute_max_addr_offset (use);
++
++      while (use)
++	{
++	  sub_id = 0;
++	  addr_offset_first = use->addr_offset;
++	  /* Only uses with offset that can fit in offset part against
++	     the first use can be grouped together.  */
++	  for (pre = use, use = use->next;
++	       use && (use->addr_offset - addr_offset_first
++		       <= (unsigned HOST_WIDE_INT) max_offset);
++	       pre = use, use = use->next)
++	    {
++	      use->id = pre->id;
++	      use->sub_id = ++sub_id;
++	    }
++
++	  /* Break the list and create new group.  */
++	  if (use)
++	    {
++	      pre->next = NULL;
++	      use->id = n_iv_uses (data);
++	      use->related_cands = BITMAP_ALLOC (NULL);
++	      data->iv_uses.safe_push (use);
++	    }
++	}
++    }
++
++  if (dump_file && (dump_flags & TDF_DETAILS))
++    dump_uses (dump_file, data);
++}
++
+ /* Strips constant offsets from EXPR and stores them to OFFSET.  If INSIDE_ADDR
+    is true, assume we are inside an address.  If TOP_COMPREF is true, assume
+    we are at the top-level of the processed address.  */
+@@ -2550,20 +2825,20 @@ add_autoinc_candidates (struct ivopts_data *data, tree base, tree step,
+ 
+ /* Adds a candidate BASE + STEP * i.  Important field is set to IMPORTANT and
+    position to POS.  If USE is not NULL, the candidate is set as related to
+-   it.  The candidate computation is scheduled on all available positions.  */
++   it.  The candidate computation is scheduled before exit condition and at
++   the end of loop.  */
+ 
+ static void
+ add_candidate (struct ivopts_data *data,
+ 	       tree base, tree step, bool important, struct iv_use *use)
+ {
++  gcc_assert (use == NULL || use->sub_id == 0);
++
+   if (ip_normal_pos (data->current_loop))
+     add_candidate_1 (data, base, step, important, IP_NORMAL, use, NULL);
+   if (ip_end_pos (data->current_loop)
+       && allow_ip_end_pos_p (data->current_loop))
+     add_candidate_1 (data, base, step, important, IP_END, use, NULL);
+-
+-  if (use != NULL && use->type == USE_ADDRESS)
+-    add_autoinc_candidates (data, base, step, important, use);
+ }
+ 
+ /* Adds standard iv candidates.  */
+@@ -2592,7 +2867,7 @@ add_standard_iv_candidates (struct ivopts_data *data)
+ /* Adds candidates bases on the old induction variable IV.  */
+ 
+ static void
+-add_old_iv_candidates (struct ivopts_data *data, struct iv *iv)
++add_iv_candidate_for_biv (struct ivopts_data *data, struct iv *iv)
+ {
+   gimple phi;
+   tree def;
+@@ -2632,7 +2907,7 @@ add_old_iv_candidates (struct ivopts_data *data, struct iv *iv)
+ /* Adds candidates based on the old induction variables.  */
+ 
+ static void
+-add_old_ivs_candidates (struct ivopts_data *data)
++add_iv_candidate_for_bivs (struct ivopts_data *data)
+ {
+   unsigned i;
+   struct iv *iv;
+@@ -2642,19 +2917,19 @@ add_old_ivs_candidates (struct ivopts_data *data)
+     {
+       iv = ver_info (data, i)->iv;
+       if (iv && iv->biv_p && !integer_zerop (iv->step))
+-	add_old_iv_candidates (data, iv);
++	add_iv_candidate_for_biv (data, iv);
+     }
+ }
+ 
+-/* Adds candidates based on the value of the induction variable IV and USE.  */
++/* Adds candidates based on the value of USE's iv.  */
+ 
+ static void
+-add_iv_value_candidates (struct ivopts_data *data,
+-			 struct iv *iv, struct iv_use *use)
++add_iv_candidate_for_use (struct ivopts_data *data, struct iv_use *use)
+ {
+   unsigned HOST_WIDE_INT offset;
+   tree base;
+   tree basetype;
++  struct iv *iv = use->iv;
+ 
+   add_candidate (data, iv->base, iv->step, false, use);
+ 
+@@ -2664,21 +2939,25 @@ add_iv_value_candidates (struct ivopts_data *data,
+   basetype = TREE_TYPE (iv->base);
+   if (POINTER_TYPE_P (basetype))
+     basetype = sizetype;
+-  add_candidate (data, build_int_cst (basetype, 0),
+-		 iv->step, true, use);
++  add_candidate (data, build_int_cst (basetype, 0), iv->step, true, use);
+ 
+   /* Third, try removing the constant offset.  Make sure to even
+      add a candidate for &a[0] vs. (T *)&a.  */
+   base = strip_offset (iv->base, &offset);
+-  if (offset
+-      || base != iv->base)
++  if (offset || base != iv->base)
+     add_candidate (data, base, iv->step, false, use);
++
++  /* At last, add auto-incremental candidates.  Make such variables
++     important since other iv uses with same base object may be based
++     on it.  */
++  if (use != NULL && use->type == USE_ADDRESS)
++    add_autoinc_candidates (data, iv->base, iv->step, true, use);
+ }
+ 
+ /* Adds candidates based on the uses.  */
+ 
+ static void
+-add_derived_ivs_candidates (struct ivopts_data *data)
++add_iv_candidate_for_uses (struct ivopts_data *data)
+ {
+   unsigned i;
+ 
+@@ -2695,7 +2974,7 @@ add_derived_ivs_candidates (struct ivopts_data *data)
+ 	case USE_COMPARE:
+ 	case USE_ADDRESS:
+ 	  /* Just add the ivs based on the value of the iv used here.  */
+-	  add_iv_value_candidates (data, use->iv, use);
++	  add_iv_candidate_for_use (data, use);
+ 	  break;
+ 
+ 	default:
+@@ -2785,11 +3064,22 @@ new_cost (unsigned runtime, unsigned complexity)
+   return cost;
+ }
+ 
++/* Returns true if COST is infinite.  */
++
++static bool
++infinite_cost_p (comp_cost cost)
++{
++  return cost.cost == INFTY;
++}
++
+ /* Adds costs COST1 and COST2.  */
+ 
+ static comp_cost
+ add_costs (comp_cost cost1, comp_cost cost2)
+ {
++  if (infinite_cost_p (cost1) || infinite_cost_p (cost2))
++    return infinite_cost;
++
+   cost1.cost += cost2.cost;
+   cost1.complexity += cost2.complexity;
+ 
+@@ -2818,14 +3108,6 @@ compare_costs (comp_cost cost1, comp_cost cost2)
+   return cost1.cost - cost2.cost;
+ }
+ 
+-/* Returns true if COST is infinite.  */
+-
+-static bool
+-infinite_cost_p (comp_cost cost)
+-{
+-  return cost.cost == INFTY;
+-}
+-
+ /* Sets cost of (USE, CANDIDATE) pair to COST and record that it depends
+    on invariants DEPENDS_ON and that the value used in expressing it
+    is VALUE, and in case of iv elimination the comparison operator is COMP.  */
+@@ -3644,6 +3926,7 @@ get_shiftadd_cost (tree expr, machine_mode mode, comp_cost cost0,
+   if (!(m >= 0 && m < maxm))
+     return false;
+ 
++  STRIP_NOPS (op1);
+   mult_in_op1 = operand_equal_p (op1, mult, 0);
+ 
+   as_cost = add_cost (speed, mode) + shift_cost (speed, mode, m);
+@@ -3883,7 +4166,9 @@ split_address_cost (struct ivopts_data *data,
+       *symbol_present = false;
+       *var_present = true;
+       fd_ivopts_data = data;
+-      walk_tree (&addr, find_depends, depends_on, NULL);
++      if (depends_on)
++	walk_tree (&addr, find_depends, depends_on, NULL);
++
+       return new_cost (target_spill_cost[data->speed], 0);
+     }
+ 
+@@ -4171,7 +4456,8 @@ get_computation_cost_at (struct ivopts_data *data,
+ 				? TYPE_MODE (TREE_TYPE (*use->op_p))
+ 				: VOIDmode);
+ 
+-  *depends_on = NULL;
++  if (depends_on)
++    *depends_on = NULL;
+ 
+   /* Only consider real candidates.  */
+   if (!cand->iv)
+@@ -4300,7 +4586,15 @@ get_computation_cost_at (struct ivopts_data *data,
+       cost.cost += add_cost (data->speed, TYPE_MODE (ctype));
+     }
+ 
+-  if (inv_expr_id)
++  /* Set of invariants depended on by sub use has already been computed
++     for the first use in the group.  */
++  if (use->sub_id)
++    {
++      cost.cost = 0;
++      if (depends_on && *depends_on)
++	bitmap_clear (*depends_on);
++    }
++  else if (inv_expr_id)
+     {
+       *inv_expr_id =
+           get_loop_invariant_expr_id (data, ubase, cbase, ratio, address_p);
+@@ -4429,6 +4723,8 @@ determine_use_iv_cost_address (struct ivopts_data *data,
+   bitmap depends_on;
+   bool can_autoinc;
+   int inv_expr_id = -1;
++  struct iv_use *sub_use;
++  comp_cost sub_cost;
+   comp_cost cost = get_computation_cost (data, use, cand, true, &depends_on,
+ 					 &can_autoinc, &inv_expr_id);
+ 
+@@ -4442,6 +4738,15 @@ determine_use_iv_cost_address (struct ivopts_data *data,
+       else if (cand->pos == IP_AFTER_USE || cand->pos == IP_BEFORE_USE)
+ 	cost = infinite_cost;
+     }
++  for (sub_use = use->next;
++       sub_use && !infinite_cost_p (cost);
++       sub_use = sub_use->next)
++    {
++      sub_cost = get_computation_cost (data, sub_use, cand, true, NULL,
++				       &can_autoinc, NULL);
++      cost = add_costs (cost, sub_cost);
++    }
++
+   set_use_iv_cost (data, use, cand, cost, depends_on, NULL_TREE, ERROR_MARK,
+                    inv_expr_id);
+ 
+@@ -5058,10 +5363,10 @@ find_iv_candidates (struct ivopts_data *data)
+   add_standard_iv_candidates (data);
+ 
+   /* Add old induction variables.  */
+-  add_old_ivs_candidates (data);
++  add_iv_candidate_for_bivs (data);
+ 
+   /* Add induction variables derived from uses.  */
+-  add_derived_ivs_candidates (data);
++  add_iv_candidate_for_uses (data);
+ 
+   set_autoinc_for_original_candidates (data);
+ 
+@@ -6588,8 +6893,8 @@ adjust_iv_update_pos (struct iv_cand *cand, struct iv_use *use)
+ /* Rewrites USE (address that is an iv) using candidate CAND.  */
+ 
+ static void
+-rewrite_use_address (struct ivopts_data *data,
+-		     struct iv_use *use, struct iv_cand *cand)
++rewrite_use_address_1 (struct ivopts_data *data,
++		       struct iv_use *use, struct iv_cand *cand)
+ {
+   aff_tree aff;
+   gimple_stmt_iterator bsi = gsi_for_stmt (use->stmt);
+@@ -6624,6 +6929,28 @@ rewrite_use_address (struct ivopts_data *data,
+   *use->op_p = ref;
+ }
+ 
++/* Rewrites USE (address that is an iv) using candidate CAND.  If it's the
++   first use of a group, rewrites sub uses in the group too.  */
++
++static void
++rewrite_use_address (struct ivopts_data *data,
++		      struct iv_use *use, struct iv_cand *cand)
++{
++  struct iv_use *next;
++
++  gcc_assert (use->sub_id == 0);
++  rewrite_use_address_1 (data, use, cand);
++  update_stmt (use->stmt);
++
++  for (next = use->next; next != NULL; next = next->next)
++    {
++      rewrite_use_address_1 (data, next, cand);
++      update_stmt (next->stmt);
++    }
++
++  return;
++}
++
+ /* Rewrites USE (the condition such that one of the arguments is an iv) using
+    candidate CAND.  */
+ 
+@@ -6899,6 +7226,18 @@ free_loop_data (struct ivopts_data *data)
+   for (i = 0; i < n_iv_uses (data); i++)
+     {
+       struct iv_use *use = iv_use (data, i);
++      struct iv_use *pre = use, *sub = use->next;
++
++      while (sub)
++	{
++	  gcc_assert (sub->related_cands == NULL);
++	  gcc_assert (sub->n_map_members == 0 && sub->cost_map == NULL);
++
++	  free (sub->iv);
++	  pre = sub;
++	  sub = sub->next;
++	  free (pre);
++	}
+ 
+       free (use->iv);
+       BITMAP_FREE (use->related_cands);
+@@ -7025,6 +7364,7 @@ tree_ssa_iv_optimize_loop (struct ivopts_data *data, struct loop *loop)
+ 
+   /* Finds interesting uses (item 1).  */
+   find_interesting_uses (data);
++  group_address_uses (data);
+   if (n_iv_uses (data) > MAX_CONSIDERED_USES)
+     goto finish;
+ 
+--- a/src/gcc/tree-ssa-loop-niter.c
++++ b/src/gcc/tree-ssa-loop-niter.c
+@@ -148,6 +148,237 @@ split_to_var_and_offset (tree expr, tree *var, mpz_t offset)
+     }
+ }
+ 
++/* From condition C0 CMP C1 derives information regarding the value range
++   of VAR, which is of TYPE.  Results are stored in to BELOW and UP.  */
++
++static void
++refine_value_range_using_guard (tree type, tree var,
++				tree c0, enum tree_code cmp, tree c1,
++				mpz_t below, mpz_t up)
++{
++  tree varc0, varc1, ctype;
++  mpz_t offc0, offc1;
++  mpz_t mint, maxt, minc1, maxc1;
++  wide_int minv, maxv;
++  bool no_wrap = nowrap_type_p (type);
++  bool c0_ok, c1_ok;
++  signop sgn = TYPE_SIGN (type);
++
++  switch (cmp)
++    {
++    case LT_EXPR:
++    case LE_EXPR:
++    case GT_EXPR:
++    case GE_EXPR:
++      STRIP_SIGN_NOPS (c0);
++      STRIP_SIGN_NOPS (c1);
++      ctype = TREE_TYPE (c0);
++      if (!useless_type_conversion_p (ctype, type))
++	return;
++
++      break;
++
++    case EQ_EXPR:
++      /* We could derive quite precise information from EQ_EXPR, however,
++	 such a guard is unlikely to appear, so we do not bother with
++	 handling it.  */
++      return;
++
++    case NE_EXPR:
++      /* NE_EXPR comparisons do not contain much of useful information,
++	 except for cases of comparing with bounds.  */
++      if (TREE_CODE (c1) != INTEGER_CST
++	  || !INTEGRAL_TYPE_P (type))
++	return;
++
++      /* Ensure that the condition speaks about an expression in the same
++	 type as X and Y.  */
++      ctype = TREE_TYPE (c0);
++      if (TYPE_PRECISION (ctype) != TYPE_PRECISION (type))
++	return;
++      c0 = fold_convert (type, c0);
++      c1 = fold_convert (type, c1);
++
++      if (operand_equal_p (var, c0, 0))
++	{
++	  mpz_t valc1;
++
++	  /* Case of comparing VAR with its below/up bounds.  */
++	  mpz_init (valc1);
++	  wi::to_mpz (c1, valc1, TYPE_SIGN (type));
++	  if (mpz_cmp (valc1, below) == 0)
++	    cmp = GT_EXPR;
++	  if (mpz_cmp (valc1, up) == 0)
++	    cmp = LT_EXPR;
++
++	  mpz_clear (valc1);
++	}
++      else
++	{
++	  /* Case of comparing with the bounds of the type.  */
++	  wide_int min = wi::min_value (type);
++	  wide_int max = wi::max_value (type);
++
++	  if (wi::eq_p (c1, min))
++	    cmp = GT_EXPR;
++	  if (wi::eq_p (c1, max))
++	    cmp = LT_EXPR;
++	}
++
++      /* Quick return if no useful information.  */
++      if (cmp == NE_EXPR)
++	return;
++
++      break;
++
++    default:
++      return;
++    }
++
++  mpz_init (offc0);
++  mpz_init (offc1);
++  split_to_var_and_offset (expand_simple_operations (c0), &varc0, offc0);
++  split_to_var_and_offset (expand_simple_operations (c1), &varc1, offc1);
++
++  /* We are only interested in comparisons of expressions based on VAR.  */
++  if (operand_equal_p (var, varc1, 0))
++    {
++      std::swap (varc0, varc1);
++      mpz_swap (offc0, offc1);
++      cmp = swap_tree_comparison (cmp);
++    }
++  else if (!operand_equal_p (var, varc0, 0))
++    {
++      mpz_clear (offc0);
++      mpz_clear (offc1);
++      return;
++    }
++
++  mpz_init (mint);
++  mpz_init (maxt);
++  get_type_static_bounds (type, mint, maxt);
++  mpz_init (minc1);
++  mpz_init (maxc1);
++  /* Setup range information for varc1.  */
++  if (integer_zerop (varc1))
++    {
++      wi::to_mpz (integer_zero_node, minc1, TYPE_SIGN (type));
++      wi::to_mpz (integer_zero_node, maxc1, TYPE_SIGN (type));
++    }
++  else if (TREE_CODE (varc1) == SSA_NAME
++	   && INTEGRAL_TYPE_P (type)
++	   && get_range_info (varc1, &minv, &maxv) == VR_RANGE)
++    {
++      gcc_assert (wi::le_p (minv, maxv, sgn));
++      wi::to_mpz (minv, minc1, sgn);
++      wi::to_mpz (maxv, maxc1, sgn);
++    }
++  else
++    {
++      mpz_set (minc1, mint);
++      mpz_set (maxc1, maxt);
++    }
++
++  /* Compute valid range information for varc1 + offc1.  Note nothing
++     useful can be derived if it overflows or underflows.  Overflow or
++     underflow could happen when:
++
++       offc1 > 0 && varc1 + offc1 > MAX_VAL (type)
++       offc1 < 0 && varc1 + offc1 < MIN_VAL (type).  */
++  mpz_add (minc1, minc1, offc1);
++  mpz_add (maxc1, maxc1, offc1);
++  c1_ok = (no_wrap
++	   || mpz_sgn (offc1) == 0
++	   || (mpz_sgn (offc1) < 0 && mpz_cmp (minc1, mint) >= 0)
++	   || (mpz_sgn (offc1) > 0 && mpz_cmp (maxc1, maxt) <= 0));
++  if (!c1_ok)
++    goto end;
++
++  if (mpz_cmp (minc1, mint) < 0)
++    mpz_set (minc1, mint);
++  if (mpz_cmp (maxc1, maxt) > 0)
++    mpz_set (maxc1, maxt);
++
++  if (cmp == LT_EXPR)
++    {
++      cmp = LE_EXPR;
++      mpz_sub_ui (maxc1, maxc1, 1);
++    }
++  if (cmp == GT_EXPR)
++    {
++      cmp = GE_EXPR;
++      mpz_add_ui (minc1, minc1, 1);
++    }
++
++  /* Compute range information for varc0.  If there is no overflow,
++     the condition implied that
++
++       (varc0) cmp (varc1 + offc1 - offc0)
++
++     We can possibly improve the upper bound of varc0 if cmp is LE_EXPR,
++     or the below bound if cmp is GE_EXPR.
++
++     To prove there is no overflow/underflow, we need to check below
++     four cases:
++       1) cmp == LE_EXPR && offc0 > 0
++
++	    (varc0 + offc0) doesn't overflow
++	    && (varc1 + offc1 - offc0) doesn't underflow
++
++       2) cmp == LE_EXPR && offc0 < 0
++
++	    (varc0 + offc0) doesn't underflow
++	    && (varc1 + offc1 - offc0) doesn't overfloe
++
++	  In this case, (varc0 + offc0) will never underflow if we can
++	  prove (varc1 + offc1 - offc0) doesn't overflow.
++
++       3) cmp == GE_EXPR && offc0 < 0
++
++	    (varc0 + offc0) doesn't underflow
++	    && (varc1 + offc1 - offc0) doesn't overflow
++
++       4) cmp == GE_EXPR && offc0 > 0
++
++	    (varc0 + offc0) doesn't overflow
++	    && (varc1 + offc1 - offc0) doesn't underflow
++
++	  In this case, (varc0 + offc0) will never overflow if we can
++	  prove (varc1 + offc1 - offc0) doesn't underflow.
++
++     Note we only handle case 2 and 4 in below code.  */
++
++  mpz_sub (minc1, minc1, offc0);
++  mpz_sub (maxc1, maxc1, offc0);
++  c0_ok = (no_wrap
++	   || mpz_sgn (offc0) == 0
++	   || (cmp == LE_EXPR
++	       && mpz_sgn (offc0) < 0 && mpz_cmp (maxc1, maxt) <= 0)
++	   || (cmp == GE_EXPR
++	       && mpz_sgn (offc0) > 0 && mpz_cmp (minc1, mint) >= 0));
++  if (!c0_ok)
++    goto end;
++
++  if (cmp == LE_EXPR)
++    {
++      if (mpz_cmp (up, maxc1) > 0)
++	mpz_set (up, maxc1);
++    }
++  else
++    {
++      if (mpz_cmp (below, minc1) < 0)
++	mpz_set (below, minc1);
++    }
++
++end:
++  mpz_clear (mint);
++  mpz_clear (maxt);
++  mpz_clear (minc1);
++  mpz_clear (maxc1);
++  mpz_clear (offc0);
++  mpz_clear (offc1);
++}
++
+ /* Stores estimate on the minimum/maximum value of the expression VAR + OFF
+    in TYPE to MIN and MAX.  */
+ 
+@@ -155,6 +386,9 @@ static void
+ determine_value_range (struct loop *loop, tree type, tree var, mpz_t off,
+ 		       mpz_t min, mpz_t max)
+ {
++  int cnt = 0;
++  mpz_t minm, maxm;
++  basic_block bb;
+   wide_int minv, maxv;
+   enum value_range_type rtype = VR_VARYING;
+ 
+@@ -209,35 +443,69 @@ determine_value_range (struct loop *loop, tree type, tree var, mpz_t off,
+ 		}
+ 	    }
+ 	}
+-      if (rtype == VR_RANGE)
++      mpz_init (minm);
++      mpz_init (maxm);
++      if (rtype != VR_RANGE)
++	{
++	  mpz_set (minm, min);
++	  mpz_set (maxm, max);
++	}
++      else
+ 	{
+-	  mpz_t minm, maxm;
+ 	  gcc_assert (wi::le_p (minv, maxv, sgn));
+-	  mpz_init (minm);
+-	  mpz_init (maxm);
+ 	  wi::to_mpz (minv, minm, sgn);
+ 	  wi::to_mpz (maxv, maxm, sgn);
+-	  mpz_add (minm, minm, off);
+-	  mpz_add (maxm, maxm, off);
+-	  /* If the computation may not wrap or off is zero, then this
+-	     is always fine.  If off is negative and minv + off isn't
+-	     smaller than type's minimum, or off is positive and
+-	     maxv + off isn't bigger than type's maximum, use the more
+-	     precise range too.  */
+-	  if (nowrap_type_p (type)
+-	      || mpz_sgn (off) == 0
+-	      || (mpz_sgn (off) < 0 && mpz_cmp (minm, min) >= 0)
+-	      || (mpz_sgn (off) > 0 && mpz_cmp (maxm, max) <= 0))
+-	    {
+-	      mpz_set (min, minm);
+-	      mpz_set (max, maxm);
+-	      mpz_clear (minm);
+-	      mpz_clear (maxm);
+-	      return;
+-	    }
++	}
++      /* Now walk the dominators of the loop header and use the entry
++	 guards to refine the estimates.  */
++      for (bb = loop->header;
++	   bb != ENTRY_BLOCK_PTR_FOR_FN (cfun) && cnt < MAX_DOMINATORS_TO_WALK;
++	   bb = get_immediate_dominator (CDI_DOMINATORS, bb))
++	{
++	  edge e;
++	  tree c0, c1;
++	  gimple cond;
++	  enum tree_code cmp;
++
++	  if (!single_pred_p (bb))
++	    continue;
++	  e = single_pred_edge (bb);
++
++	  if (!(e->flags & (EDGE_TRUE_VALUE | EDGE_FALSE_VALUE)))
++	    continue;
++
++	  cond = last_stmt (e->src);
++	  c0 = gimple_cond_lhs (cond);
++	  cmp = gimple_cond_code (cond);
++	  c1 = gimple_cond_rhs (cond);
++
++	  if (e->flags & EDGE_FALSE_VALUE)
++	    cmp = invert_tree_comparison (cmp, false);
++
++	  refine_value_range_using_guard (type, var, c0, cmp, c1, minm, maxm);
++	  ++cnt;
++	}
++
++      mpz_add (minm, minm, off);
++      mpz_add (maxm, maxm, off);
++      /* If the computation may not wrap or off is zero, then this
++	 is always fine.  If off is negative and minv + off isn't
++	 smaller than type's minimum, or off is positive and
++	 maxv + off isn't bigger than type's maximum, use the more
++	 precise range too.  */
++      if (nowrap_type_p (type)
++	  || mpz_sgn (off) == 0
++	  || (mpz_sgn (off) < 0 && mpz_cmp (minm, min) >= 0)
++	  || (mpz_sgn (off) > 0 && mpz_cmp (maxm, max) <= 0))
++	{
++	  mpz_set (min, minm);
++	  mpz_set (max, maxm);
+ 	  mpz_clear (minm);
+ 	  mpz_clear (maxm);
++	  return;
+ 	}
++      mpz_clear (minm);
++      mpz_clear (maxm);
+     }
+ 
+   /* If the computation may wrap, we know nothing about the value, except for
+@@ -1840,6 +2108,10 @@ simplify_using_initial_conditions (struct loop *loop, tree expr)
+       if (e->flags & EDGE_FALSE_VALUE)
+ 	cond = invert_truthvalue (cond);
+       expr = tree_simplify_using_condition (cond, expr);
++      /* Break if EXPR is simplified to const values.  */
++      if (expr && (integer_zerop (expr) || integer_nonzerop (expr)))
++	break;
++
+       ++cnt;
+     }
+ 
+--- a/src/gcc/tree-ssa-math-opts.c
++++ b/src/gcc/tree-ssa-math-opts.c
+@@ -143,6 +143,7 @@ along with GCC; see the file COPYING3.  If not see
+ #include "target.h"
+ #include "gimple-pretty-print.h"
+ #include "builtins.h"
++#include "params.h"
+ 
+ /* FIXME: RTL headers have to be included here for optabs.  */
+ #include "rtl.h"		/* Because optabs.h wants enum rtx_code.  */
+@@ -1148,6 +1149,357 @@ build_and_insert_cast (gimple_stmt_iterator *gsi, location_t loc,
+   return result;
+ }
+ 
++struct pow_synth_sqrt_info
++{
++  bool *factors;
++  unsigned int deepest;
++  unsigned int num_mults;
++};
++
++/* Return true iff the real value C can be represented as a
++   sum of powers of 0.5 up to N.  That is:
++   C == SUM<i from 1..N> (a[i]*(0.5**i)) where a[i] is either 0 or 1.
++   Record in INFO the various parameters of the synthesis algorithm such
++   as the factors a[i], the maximum 0.5 power and the number of
++   multiplications that will be required.  */
++
++bool
++representable_as_half_series_p (REAL_VALUE_TYPE c, unsigned n,
++				 struct pow_synth_sqrt_info *info)
++{
++  REAL_VALUE_TYPE factor = dconsthalf;
++  REAL_VALUE_TYPE remainder = c;
++
++  info->deepest = 0;
++  info->num_mults = 0;
++  memset (info->factors, 0, n * sizeof (bool));
++
++  for (unsigned i = 0; i < n; i++)
++    {
++      REAL_VALUE_TYPE res;
++
++      /* If something inexact happened bail out now.  */
++      if (REAL_ARITHMETIC (res, MINUS_EXPR, remainder, factor))
++	return false;
++
++      /* We have hit zero.  The number is representable as a sum
++         of powers of 0.5.  */
++      if (REAL_VALUES_EQUAL (res, dconst0))
++	{
++	  info->factors[i] = true;
++	  info->deepest = i + 1;
++	  return true;
++	}
++      else if (!REAL_VALUE_NEGATIVE (res))
++	{
++	  remainder = res;
++	  info->factors[i] = true;
++	  info->num_mults++;
++	}
++      else
++	info->factors[i] = false;
++
++      REAL_ARITHMETIC (factor, MULT_EXPR, factor, dconsthalf);
++    }
++  return false;
++}
++
++/* Return the tree corresponding to FN being applied
++   to ARG N times at GSI and LOC.
++   Look up previous results from CACHE if need be.
++   cache[0] should contain just plain ARG i.e. FN applied to ARG 0 times.  */
++
++static tree
++get_fn_chain (tree arg, unsigned int n, gimple_stmt_iterator *gsi,
++	      tree fn, location_t loc, tree *cache)
++{
++  tree res = cache[n];
++  if (!res)
++    {
++      tree prev = get_fn_chain (arg, n - 1, gsi, fn, loc, cache);
++      res = build_and_insert_call (gsi, loc, fn, prev);
++      cache[n] = res;
++    }
++
++  return res;
++}
++
++/* Print to STREAM the repeated application of function FNAME to ARG
++   N times.  So, for FNAME = "foo", ARG = "x", N = 2 it would print:
++   "foo (foo (x))".  */
++
++static void
++print_nested_fn (FILE* stream, const char *fname, const char* arg,
++		 unsigned int n)
++{
++  if (n == 0)
++    fprintf (stream, "%s", arg);
++  else
++    {
++      fprintf (stream, "%s (", fname);
++      print_nested_fn (stream, fname, arg, n - 1);
++      fprintf (stream, ")");
++    }
++}
++
++/* Print to STREAM the fractional sequence of sqrt chains
++   applied to ARG, described by INFO.  Used for the dump file.  */
++
++static void
++dump_fractional_sqrt_sequence (FILE *stream, const char *arg,
++			        struct pow_synth_sqrt_info *info)
++{
++  for (unsigned int i = 0; i < info->deepest; i++)
++    {
++      bool is_set = info->factors[i];
++      if (is_set)
++	{
++	  print_nested_fn (stream, "sqrt", arg, i + 1);
++	  if (i != info->deepest - 1)
++	    fprintf (stream, " * ");
++	}
++    }
++}
++
++/* Print to STREAM a representation of raising ARG to an integer
++   power N.  Used for the dump file.  */
++
++static void
++dump_integer_part (FILE *stream, const char* arg, HOST_WIDE_INT n)
++{
++  if (n > 1)
++    fprintf (stream, "powi (%s, " HOST_WIDE_INT_PRINT_DEC ")", arg, n);
++  else if (n == 1)
++    fprintf (stream, "%s", arg);
++}
++
++/* Attempt to synthesize a POW[F] (ARG0, ARG1) call using chains of
++   square roots.  Place at GSI and LOC.  Limit the maximum depth
++   of the sqrt chains to MAX_DEPTH.  Return the tree holding the
++   result of the expanded sequence or NULL_TREE if the expansion failed.
++
++   This routine assumes that ARG1 is a real number with a fractional part
++   (the integer exponent case will have been handled earlier in
++   gimple_expand_builtin_pow).
++
++   For ARG1 > 0.0:
++   * For ARG1 composed of a whole part WHOLE_PART and a fractional part
++     FRAC_PART i.e. WHOLE_PART == floor (ARG1) and
++                    FRAC_PART == ARG1 - WHOLE_PART:
++     Produce POWI (ARG0, WHOLE_PART) * POW (ARG0, FRAC_PART) where
++     POW (ARG0, FRAC_PART) is expanded as a product of square root chains
++     if it can be expressed as such, that is if FRAC_PART satisfies:
++     FRAC_PART == <SUM from i = 1 until MAX_DEPTH> (a[i] * (0.5**i))
++     where integer a[i] is either 0 or 1.
++
++     Example:
++     POW (x, 3.625) == POWI (x, 3) * POW (x, 0.625)
++       --> POWI (x, 3) * SQRT (x) * SQRT (SQRT (SQRT (x)))
++
++   For ARG1 < 0.0 there are two approaches:
++   * (A) Expand to 1.0 / POW (ARG0, -ARG1) where POW (ARG0, -ARG1)
++         is calculated as above.
++
++     Example:
++     POW (x, -5.625) == 1.0 / POW (x, 5.625)
++       -->  1.0 / (POWI (x, 5) * SQRT (x) * SQRT (SQRT (SQRT (x))))
++
++   * (B) : WHOLE_PART := - ceil (abs (ARG1))
++           FRAC_PART  := ARG1 - WHOLE_PART
++     and expand to POW (x, FRAC_PART) / POWI (x, WHOLE_PART).
++     Example:
++     POW (x, -5.875) == POW (x, 0.125) / POWI (X, 6)
++       --> SQRT (SQRT (SQRT (x))) / (POWI (x, 6))
++
++   For ARG1 < 0.0 we choose between (A) and (B) depending on
++   how many multiplications we'd have to do.
++   So, for the example in (B): POW (x, -5.875), if we were to
++   follow algorithm (A) we would produce:
++   1.0 / POWI (X, 5) * SQRT (X) * SQRT (SQRT (X)) * SQRT (SQRT (SQRT (X)))
++   which contains more multiplications than approach (B).
++
++   Hopefully, this approach will eliminate potentially expensive POW library
++   calls when unsafe floating point math is enabled and allow the compiler to
++   further optimise the multiplies, square roots and divides produced by this
++   function.  */
++
++static tree
++expand_pow_as_sqrts (gimple_stmt_iterator *gsi, location_t loc,
++		     tree arg0, tree arg1, HOST_WIDE_INT max_depth)
++{
++  tree type = TREE_TYPE (arg0);
++  machine_mode mode = TYPE_MODE (type);
++  tree sqrtfn = mathfn_built_in (type, BUILT_IN_SQRT);
++  bool one_over = true;
++
++  if (!sqrtfn)
++    return NULL_TREE;
++
++  if (TREE_CODE (arg1) != REAL_CST)
++    return NULL_TREE;
++
++  REAL_VALUE_TYPE exp_init = TREE_REAL_CST (arg1);
++
++  gcc_assert (max_depth > 0);
++  tree *cache = XALLOCAVEC (tree, max_depth + 1);
++
++  struct pow_synth_sqrt_info synth_info;
++  synth_info.factors = XALLOCAVEC (bool, max_depth + 1);
++  synth_info.deepest = 0;
++  synth_info.num_mults = 0;
++
++  bool neg_exp = REAL_VALUE_NEGATIVE (exp_init);
++  REAL_VALUE_TYPE exp = real_value_abs (&exp_init);
++
++  /* The whole and fractional parts of exp.  */
++  REAL_VALUE_TYPE whole_part;
++  REAL_VALUE_TYPE frac_part;
++
++  real_floor (&whole_part, mode, &exp);
++  REAL_ARITHMETIC (frac_part, MINUS_EXPR, exp, whole_part);
++
++
++  REAL_VALUE_TYPE ceil_whole = dconst0;
++  REAL_VALUE_TYPE ceil_fract = dconst0;
++
++  if (neg_exp)
++    {
++      real_ceil (&ceil_whole, mode, &exp);
++      REAL_ARITHMETIC (ceil_fract, MINUS_EXPR, ceil_whole, exp);
++    }
++
++  if (!representable_as_half_series_p (frac_part, max_depth, &synth_info))
++    return NULL_TREE;
++
++  /* Check whether it's more profitable to not use 1.0 / ...  */
++  if (neg_exp)
++    {
++      struct pow_synth_sqrt_info alt_synth_info;
++      alt_synth_info.factors = XALLOCAVEC (bool, max_depth + 1);
++      alt_synth_info.deepest = 0;
++      alt_synth_info.num_mults = 0;
++
++      if (representable_as_half_series_p (ceil_fract, max_depth,
++					   &alt_synth_info)
++	  && alt_synth_info.deepest <= synth_info.deepest
++	  && alt_synth_info.num_mults < synth_info.num_mults)
++	{
++	  whole_part = ceil_whole;
++	  frac_part = ceil_fract;
++	  synth_info.deepest = alt_synth_info.deepest;
++	  synth_info.num_mults = alt_synth_info.num_mults;
++	  memcpy (synth_info.factors, alt_synth_info.factors,
++		  (max_depth + 1) * sizeof (bool));
++	  one_over = false;
++	}
++    }
++
++  HOST_WIDE_INT n = real_to_integer (&whole_part);
++  REAL_VALUE_TYPE cint;
++  real_from_integer (&cint, VOIDmode, n, SIGNED);
++
++  if (!real_identical (&whole_part, &cint))
++    return NULL_TREE;
++
++  if (powi_cost (n) + synth_info.num_mults > POWI_MAX_MULTS)
++    return NULL_TREE;
++
++  memset (cache, 0, (max_depth + 1) * sizeof (tree));
++
++  tree integer_res = n == 0 ? build_real (type, dconst1) : arg0;
++
++  /* Calculate the integer part of the exponent.  */
++  if (n > 1)
++    {
++      integer_res = gimple_expand_builtin_powi (gsi, loc, arg0, n);
++      if (!integer_res)
++	return NULL_TREE;
++    }
++
++  if (dump_file)
++    {
++      char string[64];
++
++      real_to_decimal (string, &exp_init, sizeof (string), 0, 1);
++      fprintf (dump_file, "synthesizing pow (x, %s) as:\n", string);
++
++      if (neg_exp)
++	{
++	  if (one_over)
++	    {
++	      fprintf (dump_file, "1.0 / (");
++	      dump_integer_part (dump_file, "x", n);
++	      if (n > 0)
++	        fprintf (dump_file, " * ");
++	      dump_fractional_sqrt_sequence (dump_file, "x", &synth_info);
++	      fprintf (dump_file, ")");
++	    }
++	  else
++	    {
++	      dump_fractional_sqrt_sequence (dump_file, "x", &synth_info);
++	      fprintf (dump_file, " / (");
++	      dump_integer_part (dump_file, "x", n);
++	      fprintf (dump_file, ")");
++	    }
++	}
++      else
++	{
++	  dump_fractional_sqrt_sequence (dump_file, "x", &synth_info);
++	  if (n > 0)
++	    fprintf (dump_file, " * ");
++	  dump_integer_part (dump_file, "x", n);
++	}
++
++      fprintf (dump_file, "\ndeepest sqrt chain: %d\n", synth_info.deepest);
++    }
++
++
++  tree fract_res = NULL_TREE;
++  cache[0] = arg0;
++
++  /* Calculate the fractional part of the exponent.  */
++  for (unsigned i = 0; i < synth_info.deepest; i++)
++    {
++      if (synth_info.factors[i])
++	{
++	  tree sqrt_chain = get_fn_chain (arg0, i + 1, gsi, sqrtfn, loc, cache);
++
++	  if (!fract_res)
++	      fract_res = sqrt_chain;
++
++	  else
++	    fract_res = build_and_insert_binop (gsi, loc, "powroot", MULT_EXPR,
++					   fract_res, sqrt_chain);
++	}
++    }
++
++  tree res = NULL_TREE;
++
++  if (neg_exp)
++    {
++      if (one_over)
++	{
++	  if (n > 0)
++	    res = build_and_insert_binop (gsi, loc, "powroot", MULT_EXPR,
++					   fract_res, integer_res);
++	  else
++	    res = fract_res;
++
++	  res = build_and_insert_binop (gsi, loc, "powrootrecip", RDIV_EXPR,
++					  build_real (type, dconst1), res);
++	}
++      else
++	{
++	  res = build_and_insert_binop (gsi, loc, "powroot", RDIV_EXPR,
++					 fract_res, integer_res);
++	}
++    }
++  else
++    res = build_and_insert_binop (gsi, loc, "powroot", MULT_EXPR,
++				   fract_res, integer_res);
++  return res;
++}
++
+ /* ARG0 and ARG1 are the two arguments to a pow builtin call in GSI
+    with location info LOC.  If possible, create an equivalent and
+    less expensive sequence of statements prior to GSI, and return an
+@@ -1157,13 +1509,17 @@ static tree
+ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc, 
+ 			   tree arg0, tree arg1)
+ {
+-  REAL_VALUE_TYPE c, cint, dconst1_4, dconst3_4, dconst1_3, dconst1_6;
++  REAL_VALUE_TYPE c, cint, dconst1_3, dconst1_4, dconst1_6;
+   REAL_VALUE_TYPE c2, dconst3;
+   HOST_WIDE_INT n;
+-  tree type, sqrtfn, cbrtfn, sqrt_arg0, sqrt_sqrt, result, cbrt_x, powi_cbrt_x;
++  tree type, sqrtfn, cbrtfn, sqrt_arg0, result, cbrt_x, powi_cbrt_x;
+   machine_mode mode;
++  bool speed_p = optimize_bb_for_speed_p (gsi_bb (*gsi));
+   bool hw_sqrt_exists, c_is_int, c2_is_int;
+ 
++  dconst1_4 = dconst1;
++  SET_REAL_EXP (&dconst1_4, REAL_EXP (&dconst1_4) - 2);
++
+   /* If the exponent isn't a constant, there's nothing of interest
+      to be done.  */
+   if (TREE_CODE (arg1) != REAL_CST)
+@@ -1179,7 +1535,7 @@ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
+   if (c_is_int
+       && ((n >= -1 && n <= 2)
+ 	  || (flag_unsafe_math_optimizations
+-	      && optimize_bb_for_speed_p (gsi_bb (*gsi))
++	      && speed_p
+ 	      && powi_cost (n) <= POWI_MAX_MULTS)))
+     return gimple_expand_builtin_powi (gsi, loc, arg0, n);
+ 
+@@ -1196,49 +1552,8 @@ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
+       && !HONOR_SIGNED_ZEROS (mode))
+     return build_and_insert_call (gsi, loc, sqrtfn, arg0);
+ 
+-  /* Optimize pow(x,0.25) = sqrt(sqrt(x)).  Assume on most machines that
+-     a builtin sqrt instruction is smaller than a call to pow with 0.25,
+-     so do this optimization even if -Os.  Don't do this optimization
+-     if we don't have a hardware sqrt insn.  */
+-  dconst1_4 = dconst1;
+-  SET_REAL_EXP (&dconst1_4, REAL_EXP (&dconst1_4) - 2);
+   hw_sqrt_exists = optab_handler (sqrt_optab, mode) != CODE_FOR_nothing;
+ 
+-  if (flag_unsafe_math_optimizations
+-      && sqrtfn
+-      && REAL_VALUES_EQUAL (c, dconst1_4)
+-      && hw_sqrt_exists)
+-    {
+-      /* sqrt(x)  */
+-      sqrt_arg0 = build_and_insert_call (gsi, loc, sqrtfn, arg0);
+-
+-      /* sqrt(sqrt(x))  */
+-      return build_and_insert_call (gsi, loc, sqrtfn, sqrt_arg0);
+-    }
+-      
+-  /* Optimize pow(x,0.75) = sqrt(x) * sqrt(sqrt(x)) unless we are
+-     optimizing for space.  Don't do this optimization if we don't have
+-     a hardware sqrt insn.  */
+-  real_from_integer (&dconst3_4, VOIDmode, 3, SIGNED);
+-  SET_REAL_EXP (&dconst3_4, REAL_EXP (&dconst3_4) - 2);
+-
+-  if (flag_unsafe_math_optimizations
+-      && sqrtfn
+-      && optimize_function_for_speed_p (cfun)
+-      && REAL_VALUES_EQUAL (c, dconst3_4)
+-      && hw_sqrt_exists)
+-    {
+-      /* sqrt(x)  */
+-      sqrt_arg0 = build_and_insert_call (gsi, loc, sqrtfn, arg0);
+-
+-      /* sqrt(sqrt(x))  */
+-      sqrt_sqrt = build_and_insert_call (gsi, loc, sqrtfn, sqrt_arg0);
+-
+-      /* sqrt(x) * sqrt(sqrt(x))  */
+-      return build_and_insert_binop (gsi, loc, "powroot", MULT_EXPR,
+-				     sqrt_arg0, sqrt_sqrt);
+-    }
+-
+   /* Optimize pow(x,1./3.) = cbrt(x).  This requires unsafe math
+      optimizations since 1./3. is not exactly representable.  If x
+      is negative and finite, the correct value of pow(x,1./3.) is
+@@ -1263,7 +1578,7 @@ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
+       && sqrtfn
+       && cbrtfn
+       && (gimple_val_nonnegative_real_p (arg0) || !HONOR_NANS (mode))
+-      && optimize_function_for_speed_p (cfun)
++      && speed_p
+       && hw_sqrt_exists
+       && REAL_VALUES_EQUAL (c, dconst1_6))
+     {
+@@ -1274,54 +1589,31 @@ gimple_expand_builtin_pow (gimple_stmt_iterator *gsi, location_t loc,
+       return build_and_insert_call (gsi, loc, cbrtfn, sqrt_arg0);
+     }
+ 
+-  /* Optimize pow(x,c), where n = 2c for some nonzero integer n
+-     and c not an integer, into
+-
+-       sqrt(x) * powi(x, n/2),                n > 0;
+-       1.0 / (sqrt(x) * powi(x, abs(n/2))),   n < 0.
+-
+-     Do not calculate the powi factor when n/2 = 0.  */
+-  real_arithmetic (&c2, MULT_EXPR, &c, &dconst2);
+-  n = real_to_integer (&c2);
+-  real_from_integer (&cint, VOIDmode, n, SIGNED);
+-  c2_is_int = real_identical (&c2, &cint);
+ 
++  /* Attempt to expand the POW as a product of square root chains.
++     Expand the 0.25 case even when otpimising for size.  */
+   if (flag_unsafe_math_optimizations
+       && sqrtfn
+-      && c2_is_int
+-      && !c_is_int
+-      && optimize_function_for_speed_p (cfun))
++      && hw_sqrt_exists
++      && (speed_p || REAL_VALUES_EQUAL (c, dconst1_4))
++      && !HONOR_SIGNED_ZEROS (mode))
+     {
+-      tree powi_x_ndiv2 = NULL_TREE;
+-
+-      /* Attempt to fold powi(arg0, abs(n/2)) into multiplies.  If not
+-         possible or profitable, give up.  Skip the degenerate case when
+-         n is 1 or -1, where the result is always 1.  */
+-      if (absu_hwi (n) != 1)
+-	{
+-	  powi_x_ndiv2 = gimple_expand_builtin_powi (gsi, loc, arg0,
+-						     abs_hwi (n / 2));
+-	  if (!powi_x_ndiv2)
+-	    return NULL_TREE;
+-	}
++      unsigned int max_depth = speed_p
++				? PARAM_VALUE (PARAM_MAX_POW_SQRT_DEPTH)
++				: 2;
+ 
+-      /* Calculate sqrt(x).  When n is not 1 or -1, multiply it by the
+-	 result of the optimal multiply sequence just calculated.  */
+-      sqrt_arg0 = build_and_insert_call (gsi, loc, sqrtfn, arg0);
++      tree expand_with_sqrts
++	= expand_pow_as_sqrts (gsi, loc, arg0, arg1, max_depth);
+ 
+-      if (absu_hwi (n) == 1)
+-	result = sqrt_arg0;
+-      else
+-	result = build_and_insert_binop (gsi, loc, "powroot", MULT_EXPR,
+-					 sqrt_arg0, powi_x_ndiv2);
+-
+-      /* If n is negative, reciprocate the result.  */
+-      if (n < 0)
+-	result = build_and_insert_binop (gsi, loc, "powroot", RDIV_EXPR,
+-					 build_real (type, dconst1), result);
+-      return result;
++      if (expand_with_sqrts)
++	return expand_with_sqrts;
+     }
+ 
++  real_arithmetic (&c2, MULT_EXPR, &c, &dconst2);
++  n = real_to_integer (&c2);
++  real_from_integer (&cint, VOIDmode, n, SIGNED);
++  c2_is_int = real_identical (&c2, &cint);
++
+   /* Optimize pow(x,c), where 3c = n for some nonzero integer n, into
+ 
+      powi(x, n/3) * powi(cbrt(x), n%3),                    n > 0;
+--- a/src/gcc/tree-ssa-phiopt.c
++++ b/src/gcc/tree-ssa-phiopt.c
+@@ -90,6 +90,7 @@ along with GCC; see the file COPYING3.  If not see
+ static unsigned int tree_ssa_phiopt_worker (bool, bool);
+ static bool conditional_replacement (basic_block, basic_block,
+ 				     edge, edge, gphi *, tree, tree);
++static bool factor_out_conditional_conversion (edge, edge, gphi *, tree, tree);
+ static int value_replacement (basic_block, basic_block,
+ 			      edge, edge, gimple, tree, tree);
+ static bool minmax_replacement (basic_block, basic_block,
+@@ -356,6 +357,19 @@ tree_ssa_phiopt_worker (bool do_store_elim, bool do_hoist_loads)
+ 	     node.  */
+ 	  gcc_assert (arg0 != NULL && arg1 != NULL);
+ 
++	  if (factor_out_conditional_conversion (e1, e2, phi, arg0, arg1))
++	    {
++	      /* factor_out_conditional_conversion may create a new PHI in
++		 BB2 and eliminate an existing PHI in BB2.  Recompute values
++		 that may be affected by that change.  */
++	      phis = phi_nodes (bb2);
++	      phi = single_non_singleton_phi_for_edges (phis, e1, e2);
++	      gcc_assert (phi);
++	      arg0 = gimple_phi_arg_def (phi, e1->dest_idx);
++	      arg1 = gimple_phi_arg_def (phi, e2->dest_idx);
++	      gcc_assert (arg0 != NULL && arg1 != NULL);
++	    }
++
+ 	  /* Do the replacement of conditional if it can be done.  */
+ 	  if (conditional_replacement (bb, bb1, e1, e2, phi, arg0, arg1))
+ 	    cfgchanged = true;
+@@ -431,6 +445,134 @@ replace_phi_edge_with_variable (basic_block cond_block,
+ 	      bb->index);
+ }
+ 
++/* PR66726: Factor conversion out of COND_EXPR.  If the arguments of the PHI
++   stmt are CONVERT_STMT, factor out the conversion and perform the conversion
++   to the result of PHI stmt.  */
++
++static bool
++factor_out_conditional_conversion (edge e0, edge e1, gphi *phi,
++				   tree arg0, tree arg1)
++{
++  gimple arg0_def_stmt = NULL, arg1_def_stmt = NULL, new_stmt;
++  tree new_arg0 = NULL_TREE, new_arg1 = NULL_TREE;
++  tree temp, result;
++  gphi *newphi;
++  gimple_stmt_iterator gsi, gsi_for_def;
++  source_location locus = gimple_location (phi);
++  enum tree_code convert_code;
++
++  /* Handle only PHI statements with two arguments.  TODO: If all
++     other arguments to PHI are INTEGER_CST or if their defining
++     statement have the same unary operation, we can handle more
++     than two arguments too.  */
++  if (gimple_phi_num_args (phi) != 2)
++    return false;
++
++  /* First canonicalize to simplify tests.  */
++  if (TREE_CODE (arg0) != SSA_NAME)
++    {
++      std::swap (arg0, arg1);
++      std::swap (e0, e1);
++    }
++
++  if (TREE_CODE (arg0) != SSA_NAME
++      || (TREE_CODE (arg1) != SSA_NAME
++	  && TREE_CODE (arg1) != INTEGER_CST))
++    return false;
++
++  /* Check if arg0 is an SSA_NAME and the stmt which defines arg0 is
++     a conversion.  */
++  arg0_def_stmt = SSA_NAME_DEF_STMT (arg0);
++  if (!is_gimple_assign (arg0_def_stmt)
++      || !gimple_assign_cast_p (arg0_def_stmt))
++    return false;
++
++  /* Use the RHS as new_arg0.  */
++  convert_code = gimple_assign_rhs_code (arg0_def_stmt);
++  new_arg0 = gimple_assign_rhs1 (arg0_def_stmt);
++  if (convert_code == VIEW_CONVERT_EXPR)
++    new_arg0 = TREE_OPERAND (new_arg0, 0);
++
++  if (TREE_CODE (arg1) == SSA_NAME)
++    {
++      /* Check if arg1 is an SSA_NAME and the stmt which defines arg1
++	 is a conversion.  */
++      arg1_def_stmt = SSA_NAME_DEF_STMT (arg1);
++      if (!is_gimple_assign (arg1_def_stmt)
++	  || gimple_assign_rhs_code (arg1_def_stmt) != convert_code)
++	return false;
++
++      /* Use the RHS as new_arg1.  */
++      new_arg1 = gimple_assign_rhs1 (arg1_def_stmt);
++      if (convert_code == VIEW_CONVERT_EXPR)
++	new_arg1 = TREE_OPERAND (new_arg1, 0);
++    }
++  else
++    {
++      /* If arg1 is an INTEGER_CST, fold it to new type.  */
++      if (INTEGRAL_TYPE_P (TREE_TYPE (new_arg0))
++	  && int_fits_type_p (arg1, TREE_TYPE (new_arg0)))
++	{
++	  if (gimple_assign_cast_p (arg0_def_stmt))
++	    new_arg1 = fold_convert (TREE_TYPE (new_arg0), arg1);
++	  else
++	    return false;
++	}
++      else
++	return false;
++    }
++
++  /*  If arg0/arg1 have > 1 use, then this transformation actually increases
++      the number of expressions evaluated at runtime.  */
++  if (!has_single_use (arg0)
++      || (arg1_def_stmt && !has_single_use (arg1)))
++    return false;
++
++  /* If types of new_arg0 and new_arg1 are different bailout.  */
++  if (!types_compatible_p (TREE_TYPE (new_arg0), TREE_TYPE (new_arg1)))
++    return false;
++
++  /* Create a new PHI stmt.  */
++  result = PHI_RESULT (phi);
++  temp = make_ssa_name (TREE_TYPE (new_arg0), NULL);
++  newphi = create_phi_node (temp, gimple_bb (phi));
++
++  if (dump_file && (dump_flags & TDF_DETAILS))
++    {
++      fprintf (dump_file, "PHI ");
++      print_generic_expr (dump_file, gimple_phi_result (phi), 0);
++      fprintf (dump_file,
++	       " changed to factor conversion out from COND_EXPR.\n");
++      fprintf (dump_file, "New stmt with CAST that defines ");
++      print_generic_expr (dump_file, result, 0);
++      fprintf (dump_file, ".\n");
++    }
++
++  /* Remove the old cast(s) that has single use.  */
++  gsi_for_def = gsi_for_stmt (arg0_def_stmt);
++  gsi_remove (&gsi_for_def, true);
++  if (arg1_def_stmt)
++    {
++      gsi_for_def = gsi_for_stmt (arg1_def_stmt);
++      gsi_remove (&gsi_for_def, true);
++    }
++
++  add_phi_arg (newphi, new_arg0, e0, locus);
++  add_phi_arg (newphi, new_arg1, e1, locus);
++
++  /* Create the conversion stmt and insert it.  */
++  if (convert_code == VIEW_CONVERT_EXPR)
++    temp = fold_build1 (VIEW_CONVERT_EXPR, TREE_TYPE (result), temp);
++  new_stmt = gimple_build_assign (result,  convert_code, temp);
++  gsi = gsi_after_labels (gimple_bb (phi));
++  gsi_insert_before (&gsi, new_stmt, GSI_SAME_STMT);
++
++  /* Remove he original PHI stmt.  */
++  gsi = gsi_for_stmt (phi);
++  gsi_remove (&gsi, true);
++  return true;
++}
++
+ /*  The function conditional_replacement does the main work of doing the
+     conditional replacement.  Return true if the replacement is done.
+     Otherwise return false.
+@@ -2173,6 +2315,26 @@ gate_hoist_loads (void)
+    This pass also performs a fifth transformation of a slightly different
+    flavor.
+ 
++   Factor conversion in COND_EXPR
++   ------------------------------
++
++   This transformation factors the conversion out of COND_EXPR with
++   factor_out_conditional_conversion.
++
++   For example:
++   if (a <= CST) goto <bb 3>; else goto <bb 4>;
++   <bb 3>:
++   tmp = (int) a;
++   <bb 4>:
++   tmp = PHI <tmp, CST>
++
++   Into:
++   if (a <= CST) goto <bb 3>; else goto <bb 4>;
++   <bb 3>:
++   <bb 4>:
++   a = PHI <a, CST>
++   tmp = (int) a;
++
+    Adjacent Load Hoisting
+    ----------------------
+ 
+--- a/src/gcc/tree-streamer-out.c
++++ b/src/gcc/tree-streamer-out.c
+@@ -325,7 +325,10 @@ pack_ts_function_decl_value_fields (struct bitpack_d *bp, tree expr)
+ static void
+ pack_ts_type_common_value_fields (struct bitpack_d *bp, tree expr)
+ {
+-  bp_pack_machine_mode (bp, TYPE_MODE (expr));
++  /* for VECTOR_TYPE, TYPE_MODE reevaluates the mode using target_flags
++     not necessary valid in a global context.
++     Use the raw value previously set by layout_type.  */
++  bp_pack_machine_mode (bp, TYPE_MODE_RAW (expr));
+   bp_pack_value (bp, TYPE_STRING_FLAG (expr), 1);
+   bp_pack_value (bp, TYPE_NO_FORCE_BLK (expr), 1);
+   bp_pack_value (bp, TYPE_NEEDS_CONSTRUCTING (expr), 1);
+--- a/src/gcc/tree-vect-patterns.c
++++ b/src/gcc/tree-vect-patterns.c
+@@ -2672,7 +2672,6 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
+   tree cond_expr, then_clause, else_clause;
+   stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt), def_stmt_info;
+   tree type, vectype, comp_vectype, itype = NULL_TREE, vecitype;
+-  machine_mode cmpmode;
+   gimple pattern_stmt, def_stmt;
+   loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo);
+   bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo);
+@@ -2734,9 +2733,11 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
+       itype = orig_type1;
+     }
+ 
+-  cmpmode = GET_MODE_INNER (TYPE_MODE (comp_vectype));
+ 
+-  if (GET_MODE_BITSIZE (TYPE_MODE (type)) == GET_MODE_BITSIZE (cmpmode))
++  HOST_WIDE_INT cmp_mode_size
++    = GET_MODE_UNIT_BITSIZE (TYPE_MODE (comp_vectype));
++
++  if (GET_MODE_BITSIZE (TYPE_MODE (type)) == cmp_mode_size)
+     return NULL;
+ 
+   vectype = get_vectype_for_scalar_type (type);
+@@ -2747,11 +2748,11 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
+     return NULL;
+ 
+   if (itype == NULL_TREE)
+-    itype = build_nonstandard_integer_type (GET_MODE_BITSIZE (cmpmode),
++    itype = build_nonstandard_integer_type (cmp_mode_size,
+   					    TYPE_UNSIGNED (type));
+ 
+   if (itype == NULL_TREE
+-      || GET_MODE_BITSIZE (TYPE_MODE (itype)) != GET_MODE_BITSIZE (cmpmode))
++      || GET_MODE_BITSIZE (TYPE_MODE (itype)) != cmp_mode_size)
+     return NULL;
+ 
+   vecitype = get_vectype_for_scalar_type (itype);
+@@ -2761,7 +2762,7 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
+   if (!expand_vec_cond_expr_p (vecitype, comp_vectype))
+     return NULL;
+ 
+-  if (GET_MODE_BITSIZE (TYPE_MODE (type)) > GET_MODE_BITSIZE (cmpmode))
++  if (GET_MODE_BITSIZE (TYPE_MODE (type)) > cmp_mode_size)
+     {
+       if ((TREE_CODE (then_clause) == INTEGER_CST
+ 	   && !int_fits_type_p (then_clause, itype))
+--- a/src/gcc/tree-vrp.c
++++ b/src/gcc/tree-vrp.c
+@@ -3145,14 +3145,33 @@ extract_range_from_binary_expr_1 (value_range_t *vr,
+ 		 and all numbers from min to 0 for negative min.  */
+ 	      cmp = compare_values (vr0.max, zero);
+ 	      if (cmp == -1)
+-		max = zero;
++		{
++		  /* When vr0.max < 0, vr1.min != 0 and value
++		     ranges for dividend and divisor are available.  */
++		  if (vr1.type == VR_RANGE
++		      && !symbolic_range_p (&vr0)
++		      && !symbolic_range_p (&vr1)
++		      && !compare_values (vr1.min, zero))
++		    max = int_const_binop (code, vr0.max, vr1.min);
++		  else
++		    max = zero;
++		}
+ 	      else if (cmp == 0 || cmp == 1)
+ 		max = vr0.max;
+ 	      else
+ 		type = VR_VARYING;
+ 	      cmp = compare_values (vr0.min, zero);
+ 	      if (cmp == 1)
+-		min = zero;
++		{
++		  /* For unsigned division when value ranges for dividend
++		     and divisor are available.  */
++		  if (vr1.type == VR_RANGE
++		      && !symbolic_range_p (&vr0)
++		      && !symbolic_range_p (&vr1))
++		    min = int_const_binop (code, vr0.min, vr1.max);
++		  else
++		    min = zero;
++		}
+ 	      else if (cmp == 0 || cmp == -1)
+ 		min = vr0.min;
+ 	      else
+@@ -3180,26 +3199,60 @@ extract_range_from_binary_expr_1 (value_range_t *vr,
+     }
+   else if (code == TRUNC_MOD_EXPR)
+     {
+-      if (vr1.type != VR_RANGE
+-	  || range_includes_zero_p (vr1.min, vr1.max) != 0
+-	  || vrp_val_is_min (vr1.min))
++      if (range_is_null (&vr1))
+ 	{
+-	  set_value_range_to_varying (vr);
++	  set_value_range_to_undefined (vr);
+ 	  return;
+ 	}
++      /* ABS (A % B) < ABS (B) and either
++	 0 <= A % B <= A or A <= A % B <= 0.  */
+       type = VR_RANGE;
+-      /* Compute MAX <|vr1.min|, |vr1.max|> - 1.  */
+-      max = fold_unary_to_constant (ABS_EXPR, expr_type, vr1.min);
+-      if (tree_int_cst_lt (max, vr1.max))
+-	max = vr1.max;
+-      max = int_const_binop (MINUS_EXPR, max, build_int_cst (TREE_TYPE (max), 1));
+-      /* If the dividend is non-negative the modulus will be
+-	 non-negative as well.  */
+-      if (TYPE_UNSIGNED (expr_type)
+-	  || value_range_nonnegative_p (&vr0))
+-	min = build_int_cst (TREE_TYPE (max), 0);
++      signop sgn = TYPE_SIGN (expr_type);
++      unsigned int prec = TYPE_PRECISION (expr_type);
++      wide_int wmin, wmax, tmp;
++      wide_int zero = wi::zero (prec);
++      wide_int one = wi::one (prec);
++      if (vr1.type == VR_RANGE && !symbolic_range_p (&vr1))
++	{
++	  wmax = wi::sub (vr1.max, one);
++	  if (sgn == SIGNED)
++	    {
++	      tmp = wi::sub (wi::minus_one (prec), vr1.min);
++	      wmax = wi::smax (wmax, tmp);
++	    }
++	}
+       else
+-	min = fold_unary_to_constant (NEGATE_EXPR, expr_type, max);
++	{
++	  wmax = wi::max_value (prec, sgn);
++	  /* X % INT_MIN may be INT_MAX.  */
++	  if (sgn == UNSIGNED)
++	    wmax = wmax - one;
++	}
++
++      if (sgn == UNSIGNED)
++	wmin = zero;
++      else
++	{
++	  wmin = -wmax;
++	  if (vr0.type == VR_RANGE && TREE_CODE (vr0.min) == INTEGER_CST)
++	    {
++	      tmp = vr0.min;
++	      if (wi::gts_p (tmp, zero))
++		tmp = zero;
++	      wmin = wi::smax (wmin, tmp);
++	    }
++	}
++
++      if (vr0.type == VR_RANGE && TREE_CODE (vr0.max) == INTEGER_CST)
++	{
++	  tmp = vr0.max;
++	  if (sgn == SIGNED && wi::neg_p (tmp))
++	    tmp = zero;
++	  wmax = wi::min (wmax, tmp, sgn);
++	}
++
++      min = wide_int_to_tree (expr_type, wmin);
++      max = wide_int_to_tree (expr_type, wmax);
+     }
+   else if (code == BIT_AND_EXPR || code == BIT_IOR_EXPR || code == BIT_XOR_EXPR)
+     {
+--- a/src/gcc/tree.h
++++ b/src/gcc/tree.h
+@@ -1650,6 +1650,7 @@ extern void protected_set_expr_location (tree, location_t);
+ #define TYPE_MAIN_VARIANT(NODE) (TYPE_CHECK (NODE)->type_common.main_variant)
+ #define TYPE_CONTEXT(NODE) (TYPE_CHECK (NODE)->type_common.context)
+ 
++#define TYPE_MODE_RAW(NODE) (TYPE_CHECK (NODE)->type_common.mode)
+ #define TYPE_MODE(NODE) \
+   (VECTOR_TYPE_P (TYPE_CHECK (NODE)) \
+    ? vector_type_mode (NODE) : (NODE)->type_common.mode)
+--- a/src/libgcc/config.host
++++ b/src/libgcc/config.host
+@@ -382,14 +382,15 @@ arm*-*-netbsdelf*)
+ 	tmake_file="$tmake_file arm/t-arm arm/t-netbsd t-slibgcc-gld-nover"
+ 	;;
+ arm*-*-linux*)			# ARM GNU/Linux with ELF
+-	tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix"
++	tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix t-crtfm"
+ 	tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
+ 	tm_file="$tm_file arm/bpabi-lib.h"
+ 	unwind_header=config/arm/unwind-arm.h
+ 	tmake_file="$tmake_file t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
++	extra_parts="$extra_parts crtfastmath.o"
+ 	;;
+ arm*-*-uclinux*)		# ARM ucLinux
+-	tmake_file="${tmake_file} t-fixedpoint-gnu-prefix"
++	tmake_file="${tmake_file} t-fixedpoint-gnu-prefix t-crtfm"
+ 	tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
+ 	tmake_file="${tmake_file} arm/t-bpabi"
+ 	tm_file="$tm_file arm/bpabi-lib.h"
+@@ -401,7 +402,7 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
+ 	tm_file="$tm_file arm/bpabi-lib.h"
+ 	case ${host} in
+ 	arm*-*-eabi* | arm*-*-rtems*)
+-	  tmake_file="${tmake_file} arm/t-bpabi"
++	  tmake_file="${tmake_file} arm/t-bpabi t-crtfm"
+ 	  extra_parts="crtbegin.o crtend.o crti.o crtn.o"
+ 	  ;;
+ 	arm*-*-symbianelf*)
+@@ -411,6 +412,7 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems*)
+ 	  ;;
+ 	esac
+ 	tmake_file="$tmake_file t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
++	extra_parts="$extra_parts crtfastmath.o"
+ 	unwind_header=config/arm/unwind-arm.h
+ 	;;
+ avr-*-rtems*)
+--- /dev/null
++++ b/src/libgcc/config/arm/crtfastmath.c
+@@ -0,0 +1,40 @@
++/*
++ * Copyright (C) 2014 Free Software Foundation, Inc.
++ *
++ * This file is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 3, or (at your option) any
++ * later version.
++ *
++ * This file is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * Under Section 7 of GPL version 3, you are granted additional
++ * permissions described in the GCC Runtime Library Exception, version
++ * 3.1, as published by the Free Software Foundation.
++ *
++ * You should have received a copy of the GNU General Public License and
++ * a copy of the GCC Runtime Library Exception along with this program;
++ * see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++ * <http://www.gnu.org/licenses/>.
++ */
++
++/* Enable flush-to-zero support for -ffast-math on VFP targets.  */
++#ifndef __SOFTFP__
++
++#define FPSCR_FZ		(1 << 24)
++
++static void __attribute__((constructor))
++__arm_set_fast_math (void)
++{
++  unsigned int fpscr_save;
++
++  /* Set the FZ (flush-to-zero) bit in FPSCR.  */
++  __asm__("vmrs %0, fpscr" : "=r" (fpscr_save));
++  fpscr_save |= FPSCR_FZ;
++  __asm__("vmsr fpscr, %0" : : "r" (fpscr_save));
++}
++
++#endif /* __SOFTFP__  */
+--- a/src/libgcc/config/arm/fp16.c
++++ b/src/libgcc/config/arm/fp16.c
+@@ -35,9 +35,12 @@ __gnu_f2h_internal(unsigned int a, int ieee)
+     {
+       if (!ieee)
+ 	return sign;
++      if (mantissa == 0)
++	return sign | 0x7c00;	/* Infinity.  */
++      /* Remaining cases are NaNs.  Convert SNaN to QNaN.  */
+       return sign | 0x7e00 | (mantissa >> 13);
+     }
+-  
++
+   if (aexp == 0 && mantissa == 0)
+     return sign;
+ 
+@@ -49,7 +52,7 @@ __gnu_f2h_internal(unsigned int a, int ieee)
+     {
+       mask = 0x00ffffff;
+       if (aexp >= -25)
+-        mask >>= 25 + aexp;
++	mask >>= 25 + aexp;
+     }
+   else
+     mask = 0x00001fff;
+--- a/src/libgcc/config/arm/ieee754-df.S
++++ b/src/libgcc/config/arm/ieee754-df.S
+@@ -33,8 +33,12 @@
+  * Only the default rounding mode is intended for best performances.
+  * Exceptions aren't supported yet, but that can be added quite easily
+  * if necessary without impacting performances.
++ *
++ * In the CFI related comments, 'previousOffset' refers to the previous offset
++ * from sp used to compute the CFA.
+  */
+ 
++	.cfi_sections .debug_frame
+ 
+ #ifndef __ARMEB__
+ #define xl r0
+@@ -53,11 +57,13 @@
+ 
+ ARM_FUNC_START negdf2
+ ARM_FUNC_ALIAS aeabi_dneg negdf2
++	CFI_START_FUNCTION
+ 
+ 	@ flip sign bit
+ 	eor	xh, xh, #0x80000000
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dneg
+ 	FUNC_END negdf2
+ 
+@@ -66,6 +72,7 @@ ARM_FUNC_ALIAS aeabi_dneg negdf2
+ #ifdef L_arm_addsubdf3
+ 
+ ARM_FUNC_START aeabi_drsub
++	CFI_START_FUNCTION
+ 
+ 	eor	xh, xh, #0x80000000	@ flip sign bit of first arg
+ 	b	1f	
+@@ -81,7 +88,11 @@ ARM_FUNC_ALIAS aeabi_dsub subdf3
+ ARM_FUNC_START adddf3
+ ARM_FUNC_ALIAS aeabi_dadd adddf3
+ 
+-1:	do_push	{r4, r5, lr}
++1:  do_push {r4, r5, lr}        @ sp -= 12
++	.cfi_adjust_cfa_offset 12   @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0       @ Registers are saved from sp to sp + 8
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
+ 
+ 	@ Look for zeroes, equal values, INF, or NAN.
+ 	shift1	lsl, r4, xh, #1
+@@ -148,6 +159,11 @@ ARM_FUNC_ALIAS aeabi_dadd adddf3
+ 	@ Since this is not common case, rescale them off line.
+ 	teq	r4, r5
+ 	beq	LSYM(Lad_d)
++
++@ CFI note: we're lucky that the branches to Lad_* that appear after this function
++@ have a CFI state that's exactly the same as the one we're in at this
++@ point. Otherwise the CFI would change to a different state after the branch,
++@ which would be disastrous for backtracing.
+ LSYM(Lad_x):
+ 
+ 	@ Compensate for the exponent overlapping the mantissa MSB added later
+@@ -413,6 +429,7 @@ LSYM(Lad_i):
+ 	orrne	xh, xh, #0x00080000	@ quiet NAN
+ 	RETLDM	"r4, r5"
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dsub
+ 	FUNC_END subdf3
+ 	FUNC_END aeabi_dadd
+@@ -420,12 +437,19 @@ LSYM(Lad_i):
+ 
+ ARM_FUNC_START floatunsidf
+ ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
++	CFI_START_FUNCTION
+ 
+ 	teq	r0, #0
+ 	do_it	eq, t
+ 	moveq	r1, #0
+ 	RETc(eq)
+-	do_push	{r4, r5, lr}
++
++	do_push {r4, r5, lr}        @ sp -= 12
++	.cfi_adjust_cfa_offset 12   @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0       @ Registers are saved from sp + 0 to sp + 8.
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
++
+ 	mov	r4, #0x400		@ initial exponent
+ 	add	r4, r4, #(52-1 - 1)
+ 	mov	r5, #0			@ sign bit is 0
+@@ -435,17 +459,25 @@ ARM_FUNC_ALIAS aeabi_ui2d floatunsidf
+ 	mov	xh, #0
+ 	b	LSYM(Lad_l)
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_ui2d
+ 	FUNC_END floatunsidf
+ 
+ ARM_FUNC_START floatsidf
+ ARM_FUNC_ALIAS aeabi_i2d floatsidf
++	CFI_START_FUNCTION
+ 
+ 	teq	r0, #0
+ 	do_it	eq, t
+ 	moveq	r1, #0
+ 	RETc(eq)
+-	do_push	{r4, r5, lr}
++
++	do_push {r4, r5, lr}        @ sp -= 12
++	.cfi_adjust_cfa_offset 12   @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0       @ Registers are saved from sp + 0 to sp + 8.
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
++
+ 	mov	r4, #0x400		@ initial exponent
+ 	add	r4, r4, #(52-1 - 1)
+ 	ands	r5, r0, #0x80000000	@ sign bit in r5
+@@ -457,11 +489,13 @@ ARM_FUNC_ALIAS aeabi_i2d floatsidf
+ 	mov	xh, #0
+ 	b	LSYM(Lad_l)
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_i2d
+ 	FUNC_END floatsidf
+ 
+ ARM_FUNC_START extendsfdf2
+ ARM_FUNC_ALIAS aeabi_f2d extendsfdf2
++	CFI_START_FUNCTION
+ 
+ 	movs	r2, r0, lsl #1		@ toss sign bit
+ 	mov	xh, r2, asr #3		@ stretch exponent
+@@ -480,34 +514,54 @@ ARM_FUNC_ALIAS aeabi_f2d extendsfdf2
+ 
+ 	@ value was denormalized.  We can normalize it now.
+ 	do_push	{r4, r5, lr}
++	.cfi_adjust_cfa_offset 12   @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0       @ Registers are saved from sp + 0 to sp + 8.
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
++
+ 	mov	r4, #0x380		@ setup corresponding exponent
+ 	and	r5, xh, #0x80000000	@ move sign bit in r5
+ 	bic	xh, xh, #0x80000000
+ 	b	LSYM(Lad_l)
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_f2d
+ 	FUNC_END extendsfdf2
+ 
+ ARM_FUNC_START floatundidf
+ ARM_FUNC_ALIAS aeabi_ul2d floatundidf
++	CFI_START_FUNCTION
++	.cfi_remember_state        @ Save the current CFA state.
+ 
+ 	orrs	r2, r0, r1
+ 	do_it	eq
+ 	RETc(eq)
+ 
+-	do_push	{r4, r5, lr}
++	do_push {r4, r5, lr}       @ sp -= 12
++	.cfi_adjust_cfa_offset 12  @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0      @ Registers are saved from sp + 0 to sp + 8
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
+ 
+ 	mov	r5, #0
+ 	b	2f
+ 
+ ARM_FUNC_START floatdidf
+ ARM_FUNC_ALIAS aeabi_l2d floatdidf
++	.cfi_restore_state
++	@ Restore the CFI state we saved above. If we didn't do this then the
++	@ following instructions would have the CFI state that was set by the
++	@ offset adjustments made in floatundidf.
+ 
+ 	orrs	r2, r0, r1
+ 	do_it	eq
+ 	RETc(eq)
+ 
+-	do_push	{r4, r5, lr}
++	do_push {r4, r5, lr}       @ sp -= 12
++	.cfi_adjust_cfa_offset 12  @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r4, 0      @ Registers are saved from sp to sp + 8
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset lr, 8
+ 
+ 	ands	r5, ah, #0x80000000	@ sign bit in r5
+ 	bpl	2f
+@@ -550,6 +604,7 @@ ARM_FUNC_ALIAS aeabi_l2d floatdidf
+ 	add	r4, r4, r2
+ 	b	LSYM(Lad_p)
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END floatdidf
+ 	FUNC_END aeabi_l2d
+ 	FUNC_END floatundidf
+@@ -561,7 +616,14 @@ ARM_FUNC_ALIAS aeabi_l2d floatdidf
+ 
+ ARM_FUNC_START muldf3
+ ARM_FUNC_ALIAS aeabi_dmul muldf3
+-	do_push	{r4, r5, r6, lr}
++	CFI_START_FUNCTION
++
++	do_push {r4, r5, r6, lr}    @ sp -= 16
++	.cfi_adjust_cfa_offset 16   @ CFA is now sp + previousOffset + 16
++	.cfi_rel_offset r4, 0       @ Registers are saved from sp to sp + 12.
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset r6, 8
++	.cfi_rel_offset lr, 12
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -596,7 +658,16 @@ ARM_FUNC_ALIAS aeabi_dmul muldf3
+ 	and   r6, r6, #0x80000000
+ 
+ 	@ Well, no way to make it shorter without the umull instruction.
+-	stmfd	sp!, {r6, r7, r8, r9, sl, fp}
++	stmfd   sp!, {r6, r7, r8, r9, sl, fp}   @ sp -= 24
++	.cfi_remember_state         @ Save the current CFI state.
++	.cfi_adjust_cfa_offset 24   @ CFA is now sp + previousOffset + 24.
++	.cfi_rel_offset r6, 0       @ Registers are saved from sp to sp + 20.
++	.cfi_rel_offset r7, 4
++	.cfi_rel_offset r8, 8
++	.cfi_rel_offset r9, 12
++	.cfi_rel_offset sl, 16
++	.cfi_rel_offset fp, 20
++
+ 	mov	r7, xl, lsr #16
+ 	mov	r8, yl, lsr #16
+ 	mov	r9, xh, lsr #16
+@@ -648,8 +719,8 @@ ARM_FUNC_ALIAS aeabi_dmul muldf3
+ 	mul	fp, xh, yh
+ 	adcs	r5, r5, fp
+ 	adc	r6, r6, #0
+-	ldmfd	sp!, {yl, r7, r8, r9, sl, fp}
+-
++	ldmfd   sp!, {yl, r7, r8, r9, sl, fp}   @ sp += 24
++	.cfi_restore_state   @ Restore the previous CFI state.
+ #else
+ 
+ 	@ Here is the actual multiplication.
+@@ -715,7 +786,6 @@ LSYM(Lml_1):
+ 	orr	xh, xh, #0x00100000
+ 	mov	lr, #0
+ 	subs	r4, r4, #1
+-
+ LSYM(Lml_u):
+ 	@ Overflow?
+ 	bgt	LSYM(Lml_o)
+@@ -863,13 +933,20 @@ LSYM(Lml_n):
+ 	orr	xh, xh, #0x00f80000
+ 	RETLDM	"r4, r5, r6"
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dmul
+ 	FUNC_END muldf3
+ 
+ ARM_FUNC_START divdf3
+ ARM_FUNC_ALIAS aeabi_ddiv divdf3
++	CFI_START_FUNCTION
+ 	
+ 	do_push	{r4, r5, r6, lr}
++	.cfi_adjust_cfa_offset 16
++	.cfi_rel_offset r4, 0
++	.cfi_rel_offset r5, 4
++	.cfi_rel_offset r6, 8
++	.cfi_rel_offset lr, 12
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -1052,6 +1129,7 @@ LSYM(Ldv_s):
+ 	bne	LSYM(Lml_z)		@ 0 / <non_zero> -> 0
+ 	b	LSYM(Lml_n)		@ 0 / 0 -> NAN
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_ddiv
+ 	FUNC_END divdf3
+ 
+@@ -1063,6 +1141,7 @@ LSYM(Ldv_s):
+ 
+ ARM_FUNC_START gtdf2
+ ARM_FUNC_ALIAS gedf2 gtdf2
++	CFI_START_FUNCTION
+ 	mov	ip, #-1
+ 	b	1f
+ 
+@@ -1077,6 +1156,10 @@ ARM_FUNC_ALIAS eqdf2 cmpdf2
+ 	mov	ip, #1			@ how should we specify unordered here?
+ 
+ 1:	str	ip, [sp, #-4]!
++	.cfi_adjust_cfa_offset 4        @ CFA is now sp + previousOffset + 4.
++	@ We're not adding CFI for ip as it's pushed into the stack
++	@ only because @ it may be popped off later as a return value
++	@ (i.e. we're not preserving @ it anyways).
+ 
+ 	@ Trap any INF/NAN first.
+ 	mov	ip, xh, lsl #1
+@@ -1085,10 +1168,18 @@ ARM_FUNC_ALIAS eqdf2 cmpdf2
+ 	do_it	ne
+ 	COND(mvn,s,ne)	ip, ip, asr #21
+ 	beq	3f
+-
+-	@ Test for equality.
+-	@ Note that 0.0 is equal to -0.0.
++	.cfi_remember_state
++	@ Save the current CFI state. This is done because the branch
++	@ is conditional, @ and if we don't take it we'll issue a
++	@ .cfi_adjust_cfa_offset and return.  @ If we do take it,
++	@ however, the .cfi_adjust_cfa_offset from the non-branch @ code
++	@ will affect the branch code as well. To avoid this we'll
++	@ restore @ the current state before executing the branch code.
++
++	@ Test for equality.  @ Note that 0.0 is equal to -0.0.
+ 2:	add	sp, sp, #4
++	.cfi_adjust_cfa_offset -4       @ CFA is now sp + previousOffset.
++
+ 	orrs	ip, xl, xh, lsl #1	@ if x == 0.0 or -0.0
+ 	do_it	eq, e
+ 	COND(orr,s,eq)	ip, yl, yh, lsl #1	@ and y == 0.0 or -0.0
+@@ -1117,8 +1208,13 @@ ARM_FUNC_ALIAS eqdf2 cmpdf2
+ 	orr	r0, r0, #1
+ 	RET
+ 
+-	@ Look for a NAN.
+-3:	mov	ip, xh, lsl #1
++3:  @ Look for a NAN.
++
++	@ Restore the previous CFI state (i.e. keep the CFI state as it was
++	@ before the branch).
++	.cfi_restore_state
++
++	mov ip, xh, lsl #1
+ 	mvns	ip, ip, asr #21
+ 	bne	4f
+ 	orrs	ip, xl, xh, lsl #12
+@@ -1128,9 +1224,13 @@ ARM_FUNC_ALIAS eqdf2 cmpdf2
+ 	bne	2b
+ 	orrs	ip, yl, yh, lsl #12
+ 	beq	2b			@ y is not NAN
++
+ 5:	ldr	r0, [sp], #4		@ unordered return code
++	.cfi_adjust_cfa_offset -4       @ CFA is now sp + previousOffset.
++
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END gedf2
+ 	FUNC_END gtdf2
+ 	FUNC_END ledf2
+@@ -1140,6 +1240,7 @@ ARM_FUNC_ALIAS eqdf2 cmpdf2
+ 	FUNC_END cmpdf2
+ 
+ ARM_FUNC_START aeabi_cdrcmple
++	CFI_START_FUNCTION
+ 
+ 	mov	ip, r0
+ 	mov	r0, r2
+@@ -1148,13 +1249,17 @@ ARM_FUNC_START aeabi_cdrcmple
+ 	mov	r1, r3
+ 	mov	r3, ip
+ 	b	6f
+-	
++
+ ARM_FUNC_START aeabi_cdcmpeq
+ ARM_FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
+ 
+ 	@ The status-returning routines are required to preserve all
+ 	@ registers except ip, lr, and cpsr.
+ 6:	do_push	{r0, lr}
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8.
++	.cfi_rel_offset r0, 0     @ Previous r0 is saved at sp.
++	.cfi_rel_offset lr, 4     @ Previous lr is saved at sp + 4.
++
+ 	ARM_CALL cmpdf2
+ 	@ Set the Z flag correctly, and the C flag unconditionally.
+ 	cmp	r0, #0
+@@ -1162,59 +1267,86 @@ ARM_FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
+ 	@ that the first operand was smaller than the second.
+ 	do_it	mi
+ 	cmnmi	r0, #0
++
+ 	RETLDM	"r0"
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_cdcmple
+ 	FUNC_END aeabi_cdcmpeq
+ 	FUNC_END aeabi_cdrcmple
+ 	
+ ARM_FUNC_START	aeabi_dcmpeq
++	CFI_START_FUNCTION
++
++	str lr, [sp, #-8]!        @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cdcmple
+ 	do_it	eq, e
+ 	moveq	r0, #1	@ Equal to.
+ 	movne	r0, #0	@ Less than, greater than, or unordered.
++
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dcmpeq
+ 
+ ARM_FUNC_START	aeabi_dcmplt
++	CFI_START_FUNCTION
++
++	str lr, [sp, #-8]!        @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cdcmple
+ 	do_it	cc, e
+ 	movcc	r0, #1	@ Less than.
+ 	movcs	r0, #0	@ Equal to, greater than, or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dcmplt
+ 
+ ARM_FUNC_START	aeabi_dcmple
++	CFI_START_FUNCTION
++
++	str lr, [sp, #-8]!        @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cdcmple
+ 	do_it	ls, e
+ 	movls	r0, #1  @ Less than or equal to.
+ 	movhi	r0, #0	@ Greater than or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dcmple
+ 
+ ARM_FUNC_START	aeabi_dcmpge
++	CFI_START_FUNCTION
++
++	str lr, [sp, #-8]!        @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cdrcmple
+ 	do_it	ls, e
+ 	movls	r0, #1	@ Operand 2 is less than or equal to operand 1.
+ 	movhi	r0, #0	@ Operand 2 greater than operand 1, or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dcmpge
+ 
+ ARM_FUNC_START	aeabi_dcmpgt
++	CFI_START_FUNCTION
++
++	str lr, [sp, #-8]!        @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cdrcmple
+ 	do_it	cc, e
+ 	movcc	r0, #1	@ Operand 2 is less than operand 1.
+@@ -1222,6 +1354,7 @@ ARM_FUNC_START	aeabi_dcmpgt
+ 			@ or they are unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_dcmpgt
+ 
+ #endif /* L_cmpdf2 */
+@@ -1230,6 +1363,7 @@ ARM_FUNC_START	aeabi_dcmpgt
+ 
+ ARM_FUNC_START unorddf2
+ ARM_FUNC_ALIAS aeabi_dcmpun unorddf2
++	.cfi_startproc
+ 
+ 	mov	ip, xh, lsl #1
+ 	mvns	ip, ip, asr #21
+@@ -1247,6 +1381,7 @@ ARM_FUNC_ALIAS aeabi_dcmpun unorddf2
+ 3:	mov	r0, #1			@ arguments are unordered.
+ 	RET
+ 
++	.cfi_endproc
+ 	FUNC_END aeabi_dcmpun
+ 	FUNC_END unorddf2
+ 
+@@ -1256,6 +1391,7 @@ ARM_FUNC_ALIAS aeabi_dcmpun unorddf2
+ 
+ ARM_FUNC_START fixdfsi
+ ARM_FUNC_ALIAS aeabi_d2iz fixdfsi
++	CFI_START_FUNCTION
+ 
+ 	@ check exponent range.
+ 	mov	r2, xh, lsl #1
+@@ -1289,6 +1425,7 @@ ARM_FUNC_ALIAS aeabi_d2iz fixdfsi
+ 4:	mov	r0, #0			@ How should we convert NAN?
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_d2iz
+ 	FUNC_END fixdfsi
+ 
+@@ -1298,6 +1435,7 @@ ARM_FUNC_ALIAS aeabi_d2iz fixdfsi
+ 
+ ARM_FUNC_START fixunsdfsi
+ ARM_FUNC_ALIAS aeabi_d2uiz fixunsdfsi
++	CFI_START_FUNCTION
+ 
+ 	@ check exponent range.
+ 	movs	r2, xh, lsl #1
+@@ -1327,6 +1465,7 @@ ARM_FUNC_ALIAS aeabi_d2uiz fixunsdfsi
+ 4:	mov	r0, #0			@ How should we convert NAN?
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_d2uiz
+ 	FUNC_END fixunsdfsi
+ 
+@@ -1336,6 +1475,7 @@ ARM_FUNC_ALIAS aeabi_d2uiz fixunsdfsi
+ 
+ ARM_FUNC_START truncdfsf2
+ ARM_FUNC_ALIAS aeabi_d2f truncdfsf2
++	CFI_START_FUNCTION
+ 
+ 	@ check exponent range.
+ 	mov	r2, xh, lsl #1
+@@ -1400,6 +1540,7 @@ ARM_FUNC_ALIAS aeabi_d2f truncdfsf2
+ 	orr	r0, r0, #0x00800000
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_d2f
+ 	FUNC_END truncdfsf2
+ 
+--- a/src/libgcc/config/arm/ieee754-sf.S
++++ b/src/libgcc/config/arm/ieee754-sf.S
+@@ -31,16 +31,21 @@
+  * Only the default rounding mode is intended for best performances.
+  * Exceptions aren't supported yet, but that can be added quite easily
+  * if necessary without impacting performances.
++ *
++ * In the CFI related comments, 'previousOffset' refers to the previous offset
++ * from sp used to compute the CFA.
+  */
+ 
+ #ifdef L_arm_negsf2
+ 	
+ ARM_FUNC_START negsf2
+ ARM_FUNC_ALIAS aeabi_fneg negsf2
++	CFI_START_FUNCTION
+ 
+ 	eor	r0, r0, #0x80000000	@ flip sign bit
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fneg
+ 	FUNC_END negsf2
+ 
+@@ -49,6 +54,7 @@ ARM_FUNC_ALIAS aeabi_fneg negsf2
+ #ifdef L_arm_addsubsf3
+ 
+ ARM_FUNC_START aeabi_frsub
++	CFI_START_FUNCTION
+ 
+ 	eor	r0, r0, #0x80000000	@ flip sign bit of first arg
+ 	b	1f
+@@ -284,6 +290,7 @@ LSYM(Lad_i):
+ 	orrne	r0, r0, #0x00400000	@ quiet NAN
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_frsub
+ 	FUNC_END aeabi_fadd
+ 	FUNC_END addsf3
+@@ -292,6 +299,7 @@ LSYM(Lad_i):
+ 
+ ARM_FUNC_START floatunsisf
+ ARM_FUNC_ALIAS aeabi_ui2f floatunsisf
++	CFI_START_FUNCTION
+ 		
+ 	mov	r3, #0
+ 	b	1f
+@@ -316,6 +324,7 @@ ARM_FUNC_ALIAS aeabi_i2f floatsisf
+ 	mov	al, #0
+ 	b	2f
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_i2f
+ 	FUNC_END floatsisf
+ 	FUNC_END aeabi_ui2f
+@@ -323,6 +332,7 @@ ARM_FUNC_ALIAS aeabi_i2f floatsisf
+ 
+ ARM_FUNC_START floatundisf
+ ARM_FUNC_ALIAS aeabi_ul2f floatundisf
++	CFI_START_FUNCTION
+ 
+ 	orrs	r2, r0, r1
+ 	do_it	eq
+@@ -409,6 +419,7 @@ ARM_FUNC_ALIAS aeabi_l2f floatdisf
+ 	biceq	r0, r0, ip, lsr #31
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END floatdisf
+ 	FUNC_END aeabi_l2f
+ 	FUNC_END floatundisf
+@@ -420,6 +431,7 @@ ARM_FUNC_ALIAS aeabi_l2f floatdisf
+ 
+ ARM_FUNC_START mulsf3
+ ARM_FUNC_ALIAS aeabi_fmul mulsf3
++	CFI_START_FUNCTION
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -454,7 +466,13 @@ LSYM(Lml_x):
+ 	and	r3, ip, #0x80000000
+ 
+ 	@ Well, no way to make it shorter without the umull instruction.
+-	do_push	{r3, r4, r5}
++	do_push	{r3, r4, r5}       @ sp -= 12
++	.cfi_remember_state        @ Save the current CFI state
++	.cfi_adjust_cfa_offset 12  @ CFA is now sp + previousOffset + 12
++	.cfi_rel_offset r3, 0      @ Registers are saved from sp to sp + 8
++	.cfi_rel_offset r4, 4
++	.cfi_rel_offset r5, 8
++
+ 	mov	r4, r0, lsr #16
+ 	mov	r5, r1, lsr #16
+ 	bic	r0, r0, r4, lsl #16
+@@ -465,7 +483,8 @@ LSYM(Lml_x):
+ 	mla	r0, r4, r1, r0
+ 	adds	r3, r3, r0, lsl #16
+ 	adc	r1, ip, r0, lsr #16
+-	do_pop	{r0, r4, r5}
++	do_pop	{r0, r4, r5}       @ sp += 12
++	.cfi_restore_state         @ Restore the previous CFI state
+ 
+ #else
+ 
+@@ -618,11 +637,13 @@ LSYM(Lml_n):
+ 	orr	r0, r0, #0x00c00000
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fmul
+ 	FUNC_END mulsf3
+ 
+ ARM_FUNC_START divsf3
+ ARM_FUNC_ALIAS aeabi_fdiv divsf3
++	CFI_START_FUNCTION
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -758,6 +779,7 @@ LSYM(Ldv_s):
+ 	bne	LSYM(Lml_z)		@ 0 / <non_zero> -> 0
+ 	b	LSYM(Lml_n)		@ 0 / 0 -> NAN
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fdiv
+ 	FUNC_END divsf3
+ 
+@@ -782,6 +804,7 @@ LSYM(Ldv_s):
+ 
+ ARM_FUNC_START gtsf2
+ ARM_FUNC_ALIAS gesf2 gtsf2
++	CFI_START_FUNCTION
+ 	mov	ip, #-1
+ 	b	1f
+ 
+@@ -796,6 +819,10 @@ ARM_FUNC_ALIAS eqsf2 cmpsf2
+ 	mov	ip, #1			@ how should we specify unordered here?
+ 
+ 1:	str	ip, [sp, #-4]!
++	.cfi_adjust_cfa_offset 4  @ CFA is now sp + previousOffset + 4.
++	@ We're not adding CFI for ip as it's pushed into the stack only because
++	@ it may be popped off later as a return value (i.e. we're not preserving
++	@ it anyways).
+ 
+ 	@ Trap any INF/NAN first.
+ 	mov	r2, r0, lsl #1
+@@ -804,10 +831,18 @@ ARM_FUNC_ALIAS eqsf2 cmpsf2
+ 	do_it	ne
+ 	COND(mvn,s,ne)	ip, r3, asr #24
+ 	beq	3f
++	.cfi_remember_state
++	@ Save the current CFI state. This is done because the branch is conditional,
++	@ and if we don't take it we'll issue a .cfi_adjust_cfa_offset and return.
++	@ If we do take it, however, the .cfi_adjust_cfa_offset from the non-branch
++	@ code will affect the branch code as well. To avoid this we'll restore
++	@ the current state before executing the branch code.
+ 
+ 	@ Compare values.
+ 	@ Note that 0.0 is equal to -0.0.
+ 2:	add	sp, sp, #4
++	.cfi_adjust_cfa_offset -4       @ CFA is now sp + previousOffset.
++
+ 	orrs	ip, r2, r3, lsr #1	@ test if both are 0, clear C flag
+ 	do_it	ne
+ 	teqne	r0, r1			@ if not 0 compare sign
+@@ -823,8 +858,13 @@ ARM_FUNC_ALIAS eqsf2 cmpsf2
+ 	orrne	r0, r0, #1
+ 	RET
+ 
+-	@ Look for a NAN. 
+-3:	mvns	ip, r2, asr #24
++3:	@ Look for a NAN.
++
++	@ Restore the previous CFI state (i.e. keep the CFI state as it was
++	@ before the branch).
++	.cfi_restore_state
++
++	mvns	ip, r2, asr #24
+ 	bne	4f
+ 	movs	ip, r0, lsl #9
+ 	bne	5f			@ r0 is NAN
+@@ -832,9 +872,12 @@ ARM_FUNC_ALIAS eqsf2 cmpsf2
+ 	bne	2b
+ 	movs	ip, r1, lsl #9
+ 	beq	2b			@ r1 is not NAN
++
+ 5:	ldr	r0, [sp], #4		@ return unordered code.
++	.cfi_adjust_cfa_offset -4       @ CFA is now sp + previousOffset.
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END gesf2
+ 	FUNC_END gtsf2
+ 	FUNC_END lesf2
+@@ -844,6 +887,7 @@ ARM_FUNC_ALIAS eqsf2 cmpsf2
+ 	FUNC_END cmpsf2
+ 
+ ARM_FUNC_START aeabi_cfrcmple
++	CFI_START_FUNCTION
+ 
+ 	mov	ip, r0
+ 	mov	r0, r1
+@@ -856,6 +900,13 @@ ARM_FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
+ 	@ The status-returning routines are required to preserve all
+ 	@ registers except ip, lr, and cpsr.
+ 6:	do_push	{r0, r1, r2, r3, lr}
++	.cfi_adjust_cfa_offset 20  @ CFA is at sp + previousOffset + 20
++	.cfi_rel_offset r0, 0      @ Registers are saved from sp to sp + 16
++	.cfi_rel_offset r1, 4
++	.cfi_rel_offset r2, 8
++	.cfi_rel_offset r3, 12
++	.cfi_rel_offset lr, 16
++
+ 	ARM_CALL cmpsf2
+ 	@ Set the Z flag correctly, and the C flag unconditionally.
+ 	cmp	r0, #0
+@@ -865,57 +916,82 @@ ARM_FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
+ 	cmnmi	r0, #0
+ 	RETLDM	"r0, r1, r2, r3"
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_cfcmple
+ 	FUNC_END aeabi_cfcmpeq
+ 	FUNC_END aeabi_cfrcmple
+ 
+ ARM_FUNC_START	aeabi_fcmpeq
++	CFI_START_FUNCTION
++
++	str	lr, [sp, #-8]!    @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cfcmple
+ 	do_it	eq, e
+ 	moveq	r0, #1	@ Equal to.
+ 	movne	r0, #0	@ Less than, greater than, or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmpeq
+ 
+ ARM_FUNC_START	aeabi_fcmplt
++	CFI_START_FUNCTION
++
++	str	lr, [sp, #-8]!    @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cfcmple
+ 	do_it	cc, e
+ 	movcc	r0, #1	@ Less than.
+ 	movcs	r0, #0	@ Equal to, greater than, or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmplt
+ 
+ ARM_FUNC_START	aeabi_fcmple
++	CFI_START_FUNCTION
++
++	str	lr, [sp, #-8]!    @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cfcmple
+ 	do_it	ls, e
+ 	movls	r0, #1  @ Less than or equal to.
+ 	movhi	r0, #0	@ Greater than or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmple
+ 
+ ARM_FUNC_START	aeabi_fcmpge
++	CFI_START_FUNCTION
++
++	str	lr, [sp, #-8]!    @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cfrcmple
+ 	do_it	ls, e
+ 	movls	r0, #1	@ Operand 2 is less than or equal to operand 1.
+ 	movhi	r0, #0	@ Operand 2 greater than operand 1, or unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmpge
+ 
+ ARM_FUNC_START	aeabi_fcmpgt
++	CFI_START_FUNCTION
++
++	str	lr, [sp, #-8]!    @ sp -= 8
++	.cfi_adjust_cfa_offset 8  @ CFA is now sp + previousOffset + 8
++	.cfi_rel_offset lr, 0     @ lr is at sp
+ 
+-	str	lr, [sp, #-8]!
+ 	ARM_CALL aeabi_cfrcmple
+ 	do_it	cc, e
+ 	movcc	r0, #1	@ Operand 2 is less than operand 1.
+@@ -923,6 +999,7 @@ ARM_FUNC_START	aeabi_fcmpgt
+ 			@ or they are unordered.
+ 	RETLDM
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmpgt
+ 
+ #endif /* L_cmpsf2 */
+@@ -931,6 +1008,7 @@ ARM_FUNC_START	aeabi_fcmpgt
+ 
+ ARM_FUNC_START unordsf2
+ ARM_FUNC_ALIAS aeabi_fcmpun unordsf2
++	CFI_START_FUNCTION
+ 
+ 	mov	r2, r0, lsl #1
+ 	mov	r3, r1, lsl #1
+@@ -947,6 +1025,7 @@ ARM_FUNC_ALIAS aeabi_fcmpun unordsf2
+ 3:	mov	r0, #1			@ arguments are unordered.
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_fcmpun
+ 	FUNC_END unordsf2
+ 
+@@ -956,6 +1035,7 @@ ARM_FUNC_ALIAS aeabi_fcmpun unordsf2
+ 
+ ARM_FUNC_START fixsfsi
+ ARM_FUNC_ALIAS aeabi_f2iz fixsfsi
++	CFI_START_FUNCTION
+ 
+ 	@ check exponent range.
+ 	mov	r2, r0, lsl #1
+@@ -989,6 +1069,7 @@ ARM_FUNC_ALIAS aeabi_f2iz fixsfsi
+ 4:	mov	r0, #0			@ What should we convert NAN to?
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_f2iz
+ 	FUNC_END fixsfsi
+ 
+@@ -998,6 +1079,7 @@ ARM_FUNC_ALIAS aeabi_f2iz fixsfsi
+ 
+ ARM_FUNC_START fixunssfsi
+ ARM_FUNC_ALIAS aeabi_f2uiz fixunssfsi
++	CFI_START_FUNCTION
+ 
+ 	@ check exponent range.
+ 	movs	r2, r0, lsl #1
+@@ -1027,6 +1109,7 @@ ARM_FUNC_ALIAS aeabi_f2uiz fixunssfsi
+ 4:	mov	r0, #0			@ What should we convert NAN to?
+ 	RET
+ 
++	CFI_END_FUNCTION
+ 	FUNC_END aeabi_f2uiz
+ 	FUNC_END fixunssfsi
+ 
+--- a/src/libgcc/config/arm/lib1funcs.S
++++ b/src/libgcc/config/arm/lib1funcs.S
+@@ -1965,6 +1965,16 @@ LSYM(Lchange_\register):
+ 
+ #endif /* Arch supports thumb.  */
+ 
++.macro CFI_START_FUNCTION
++	.cfi_startproc
++	.cfi_remember_state
++.endm
++
++.macro CFI_END_FUNCTION
++	.cfi_restore_state
++	.cfi_endproc
++.endm
++
+ #ifndef __symbian__
+ #ifndef __ARM_ARCH_6M__
+ #include "ieee754-df.S"
+--- a/src/libgcc/unwind-dw2-fde-dip.c
++++ b/src/libgcc/unwind-dw2-fde-dip.c
+@@ -59,6 +59,12 @@
+ 
+ #if !defined(inhibit_libc) && defined(HAVE_LD_EH_FRAME_HDR) \
+     && defined(TARGET_DL_ITERATE_PHDR) \
++    && defined(__linux__)
++# define USE_PT_GNU_EH_FRAME
++#endif
++
++#if !defined(inhibit_libc) && defined(HAVE_LD_EH_FRAME_HDR) \
++    && defined(TARGET_DL_ITERATE_PHDR) \
+     && (defined(__DragonFly__) || defined(__FreeBSD__))
+ # define ElfW __ElfN
+ # define USE_PT_GNU_EH_FRAME
+--- a/src/libgfortran/acinclude.m4
++++ b/src/libgfortran/acinclude.m4
+@@ -100,7 +100,7 @@ void foo (void);
+ 	      [Define to 1 if the target supports #pragma weak])
+   fi
+   case "$host" in
+-    *-*-darwin* | *-*-hpux* | *-*-cygwin* | *-*-mingw* )
++    *-*-darwin* | *-*-hpux* | *-*-cygwin* | *-*-mingw* | *-*-musl* )
+       AC_DEFINE(GTHREAD_USE_WEAK, 0,
+ 		[Define to 0 if the target shouldn't use #pragma weak])
+       ;;
+--- a/src/libgfortran/configure
++++ b/src/libgfortran/configure
+@@ -26456,7 +26456,7 @@ $as_echo "#define SUPPORTS_WEAK 1" >>confdefs.h
+ 
+   fi
+   case "$host" in
+-    *-*-darwin* | *-*-hpux* | *-*-cygwin* | *-*-mingw* )
++    *-*-darwin* | *-*-hpux* | *-*-cygwin* | *-*-mingw* | *-*-musl* )
+ 
+ $as_echo "#define GTHREAD_USE_WEAK 0" >>confdefs.h
+ 
+--- a/src/libgomp/testsuite/libgomp.graphite/bounds.c
++++ b/src/libgomp/testsuite/libgomp.graphite/bounds.c
+@@ -8,6 +8,3 @@ int foo(int *a, int n)
+ /* Check that Graphite dependency checking notes the dependency.  */
+ /* { dg-do compile } */
+ /* { dg-final { scan-tree-dump-times "0 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-1.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-1.c
+@@ -25,7 +25,4 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "1 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-2.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-2.c
+@@ -24,7 +24,4 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "2 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-3.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-3.c
+@@ -31,8 +31,5 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "4 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.1" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-4.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-4.c
+@@ -49,8 +49,5 @@ int main(void)
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "1 loops carried no dependency" 1 "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "2 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.1" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-5.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-5.c
+@@ -32,8 +32,5 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "1 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.1" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-6.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-6.c
+@@ -80,7 +80,4 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "1 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-7.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-7.c
+@@ -32,7 +32,4 @@ int main (void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "3 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-8.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-8.c
+@@ -46,8 +46,5 @@ int main(void)
+ /* { dg-final { scan-tree-dump-times "1 loops carried no dependency" 1 "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "3 loops carried no dependency" 1 "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "5 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.1" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/force-parallel-9.c
++++ b/src/libgomp/testsuite/libgomp.graphite/force-parallel-9.c
+@@ -30,8 +30,5 @@ int main(void)
+ 
+ /* Check that parallel code generation part make the right answer.  */
+ /* { dg-final { scan-tree-dump-times "4 loops carried no dependency" 1 "graphite" } } */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.0" 4 "optimized" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn.1" 4 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libgomp/testsuite/libgomp.graphite/pr41118.c
++++ b/src/libgomp/testsuite/libgomp.graphite/pr41118.c
+@@ -13,7 +13,4 @@ int main(void)
+ }
+ 
+ /* Check that parallel code generation part make the right answer.  */
+-/* { dg-final { cleanup-tree-dump "graphite" } } */
+ /* { dg-final { scan-tree-dump-times "loopfn" 0 "optimized" } } */
+-/* { dg-final { cleanup-tree-dump "parloops" } } */
+-/* { dg-final { cleanup-tree-dump "optimized" } } */
+--- a/src/libitm/config/arm/hwcap.cc
++++ b/src/libitm/config/arm/hwcap.cc
+@@ -40,7 +40,7 @@ int GTM_hwcap HIDDEN = 0
+ 
+ #ifdef __linux__
+ #include <unistd.h>
+-#include <sys/fcntl.h>
++#include <fcntl.h>
+ #include <elf.h>
+ 
+ static void __attribute__((constructor))
+--- a/src/libitm/config/linux/x86/tls.h
++++ b/src/libitm/config/linux/x86/tls.h
+@@ -25,16 +25,19 @@
+ #ifndef LIBITM_X86_TLS_H
+ #define LIBITM_X86_TLS_H 1
+ 
+-#if defined(__GLIBC_PREREQ) && __GLIBC_PREREQ(2, 10)
++#if defined(__GLIBC_PREREQ)
++#if __GLIBC_PREREQ(2, 10)
+ /* Use slots in the TCB head rather than __thread lookups.
+    GLIBC has reserved words 10 through 13 for TM.  */
+ #define HAVE_ARCH_GTM_THREAD 1
+ #define HAVE_ARCH_GTM_THREAD_DISP 1
+ #endif
++#endif
+ 
+ #include "config/generic/tls.h"
+ 
+-#if defined(__GLIBC_PREREQ) && __GLIBC_PREREQ(2, 10)
++#if defined(__GLIBC_PREREQ)
++#if __GLIBC_PREREQ(2, 10)
+ namespace GTM HIDDEN {
+ 
+ #ifdef __x86_64__
+@@ -101,5 +104,6 @@ static inline void set_abi_disp(struct abi_dispatch *x)
+ 
+ } // namespace GTM
+ #endif /* >= GLIBC 2.10 */
++#endif
+ 
+ #endif // LIBITM_X86_TLS_H
+--- /dev/null
++++ b/src/libstdc++-v3/config/cpu/arm/cpu_defines.h
+@@ -0,0 +1,40 @@
++// Specific definitions for generic platforms  -*- C++ -*-
++
++// Copyright (C) 2015 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library.  This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++// GNU General Public License for more details.
++
++// Under Section 7 of GPL version 3, you are granted additional
++// permissions described in the GCC Runtime Library Exception, version
++// 3.1, as published by the Free Software Foundation.
++
++// You should have received a copy of the GNU General Public License and
++// a copy of the GCC Runtime Library Exception along with this program;
++// see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++// <http://www.gnu.org/licenses/>.
++
++/** @file bits/cpu_defines.h
++ *  This is an internal header file, included by other library headers.
++ *  Do not attempt to use it directly. @headername{iosfwd}
++ */
++
++#ifndef _GLIBCXX_CPU_DEFINES
++#define _GLIBCXX_CPU_DEFINES 1
++
++// Integer divide instructions don't trap on ARM.
++#ifdef __ARM_ARCH_EXT_IDIV__
++#define __glibcxx_integral_traps false
++#else
++#define __glibcxx_integral_traps true
++#endif
++
++#endif
+--- a/src/libstdc++-v3/config/os/generic/os_defines.h
++++ b/src/libstdc++-v3/config/os/generic/os_defines.h
+@@ -33,4 +33,9 @@
+ // System-specific #define, typedefs, corrections, etc, go here.  This
+ // file will come before all others.
+ 
++// Disable the weak reference logic in gthr.h for os/generic because it
++// is broken on every platform unless there is implementation specific
++// workaround in gthr-posix.h and at link-time for static linking.
++#define _GLIBCXX_GTHREAD_USE_WEAK 0
++
+ #endif
+--- a/src/libstdc++-v3/configure.host
++++ b/src/libstdc++-v3/configure.host
+@@ -143,6 +143,9 @@ cpu_include_dir=cpu/${try_cpu}
+ # Set specific CPU overrides for cpu_defines_dir. Most can just use generic.
+ # THIS TABLE IS SORTED.  KEEP IT THAT WAY.
+ case "${host_cpu}" in
++  arm*)
++    cpu_defines_dir=cpu/arm
++    ;;
+   powerpc* | rs6000)
+     cpu_defines_dir=cpu/powerpc
+     ;;
+@@ -273,6 +276,9 @@ case "${host_os}" in
+   freebsd*)
+     os_include_dir="os/bsd/freebsd"
+     ;;
++  linux-musl*)
++    os_include_dir="os/generic"
++    ;;
+   gnu* | linux* | kfreebsd*-gnu | knetbsd*-gnu)
+     if [ "$uclibc" = "yes" ]; then
+       os_include_dir="os/uclibc"
+--- a/src/libstdc++-v3/testsuite/lib/libstdc++.exp
++++ b/src/libstdc++-v3/testsuite/lib/libstdc++.exp
+@@ -409,6 +409,11 @@ proc libstdc++-dg-test { prog do_what extra_tool_flags } {
+     # and-target file), but the defaults are lacking in goodness.
+     set comp_output [$select_compile "$prog" "$output_file" "$compile_type" $options];
+ 
++    set unsupported_message [libstdc++_check_unsupported_p $comp_output]
++    if { $unsupported_message != "" } {
++	set comp_output "::unsupported::$unsupported_message"
++    }
++
+     return [list $comp_output $output_file]
+ }
+ 
--- gcc-5-5.4.0.orig/debian/patches/gcc-multiarch.diff
+++ gcc-5-5.4.0/debian/patches/gcc-multiarch.diff
@@ -0,0 +1,180 @@
+# DP: - Remaining multiarch patches, not yet submitted upstream.
+# DP: - Add MULTIARCH_DIRNAME definitions for multilib configurations,
+# DP:   which are used for the non-multilib builds.
+
+2013-06-12  Matthias Klose  <doko@ubuntu.com>
+
+	* config/i386/t-linux64: Set MULTIARCH_DIRNAME.
+	* config/i386/t-kfreebsd: Set MULTIARCH_DIRNAME.
+	* config.gcc (i[34567]86-*-linux* | x86_64-*-linux*): Prepend
+	i386/t-linux to $tmake_file;
+	set default ABI to N64 for mips64el.
+	* config/mips/t-linux64: Set MULTIARCH_DIRNAME.
+	* config/rs6000/t-linux64: Set MULTIARCH_DIRNAME.
+	* config/s390/t-linux64: Set MULTIARCH_DIRNAME.
+	* config/sparc/t-linux64: Set MULTIARCH_DIRNAME.
+	* src/gcc/config/mips/mips.h: (/usr)/lib as default path.
+
+--- a/src/gcc/config/sh/t-linux
++++ b/src/gcc/config/sh/t-linux
+@@ -1,2 +1,5 @@
+ MULTILIB_DIRNAMES= 
+ MULTILIB_MATCHES = 
++
++MULTILIB_OSDIRNAMES = .:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu
++MULTIARCH_DIRNAME = $(call if_multiarch,sh4-linux-gnu)
+--- a/src/gcc/config/sparc/t-linux64
++++ b/src/gcc/config/sparc/t-linux64
+@@ -27,3 +27,5 @@
+ MULTILIB_DIRNAMES = 64 32
+ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu)
+ MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu)
++
++MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu)
+--- a/src/gcc/config/s390/t-linux64
++++ b/src/gcc/config/s390/t-linux64
+@@ -9,3 +9,5 @@
+ MULTILIB_DIRNAMES = 64 32
+ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
+ MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
++
++MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu)
+--- a/src/gcc/config/rs6000/t-linux64
++++ b/src/gcc/config/rs6000/t-linux64
+@@ -31,6 +31,8 @@
+ MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
+ MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)
+ 
++MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu)
++
+ rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.c
+ 	$(COMPILE) $<
+ 	$(POSTCOMPILE)
+--- a/src/gcc/config/i386/t-linux64
++++ b/src/gcc/config/i386/t-linux64
+@@ -36,3 +36,13 @@
+ MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu)
+ MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu)
+ MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32)
++
++ifneq (,$(findstring x86_64,$(target)))
++  ifneq (,$(findstring biarchx32.h,$(tm_include_list)))
++  MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnux32)
++  else
++  MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnu)
++  endif
++else
++  MULTIARCH_DIRNAME = $(call if_multiarch,i386-linux-gnu)
++endif
+--- a/src/gcc/config/i386/t-kfreebsd
++++ b/src/gcc/config/i386/t-kfreebsd
+@@ -1,5 +1,9 @@
+-MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu)
++ifeq (,$(MULTIARCH_DIRNAME))
++  MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu)
++endif
+ 
+ # MULTILIB_OSDIRNAMES are set in t-linux64.
+ KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target))))
+ MULTILIB_OSDIRNAMES := $(filter-out mx32=%,$(subst linux,$(KFREEBSD_OS),$(MULTILIB_OSDIRNAMES)))
++
++MULTIARCH_DIRNAME := $(subst linux,$(KFREEBSD_OS),$(MULTIARCH_DIRNAME))
+--- a/src/gcc/config/mips/t-linux64
++++ b/src/gcc/config/mips/t-linux64
+@@ -18,9 +18,22 @@
+ 
+ MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64
+ MULTILIB_DIRNAMES = n32 32 64
++MIPS_R6 = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),r6)
++MIPS_32 = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),32)
++MIPS_ISA = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),isa)
+ MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el)
+ MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft)
+ MULTILIB_OSDIRNAMES = \
+-	../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \
+-	../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
+-	../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
++	../lib32$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \
++	../lib$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
++	../lib64$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
++
++ifneq (,$(findstring abin32,$(target)))
++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT))
++else
++ifneq (,$(findstring abi64,$(target)))
++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
++else
++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT))
++endif
++endif
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -2009,6 +2009,7 @@
+ 	case ${target} in
+ 		mipsisa32r6*)
+ 			default_mips_arch=mips32r6
++			enable_mips_multilibs="yes"
+ 			;;
+ 		mipsisa32r2*)
+ 			default_mips_arch=mips32r2
+@@ -2028,6 +2029,11 @@
+ 			target_cpu_default=MASK_SOFT_FLOAT_ABI
+ 			enable_mips_multilibs="yes"
+ 			;;
++		mipsisa64r6*-*-linux*-gnuabi64)
++			default_mips_abi=64
++			default_mips_arch=mips64r6
++			enable_mips_multilibs="yes"
++			;;
+ 		mipsisa64r6*-*-linux*)
+ 			default_mips_abi=n32
+ 			default_mips_arch=mips64r6
+@@ -2038,6 +2044,10 @@
+ 			default_mips_arch=mips64r2
+ 			enable_mips_multilibs="yes"
+ 			;;
++		mips64*-*-linux-gnuabi64 | mipsisa64*-*-linux-gnuabi64)
++			default_mips_abi=64
++			enable_mips_multilibs="yes"
++			;;
+ 		mips64*-*-linux* | mipsisa64*-*-linux*)
+ 			default_mips_abi=n32
+ 			enable_mips_multilibs="yes"
+@@ -4247,7 +4257,7 @@
+ 	i[34567]86-*-darwin* | x86_64-*-darwin*)
+ 		;;
+ 	i[34567]86-*-linux* | x86_64-*-linux*)
+-		tmake_file="$tmake_file i386/t-linux"
++		tmake_file="i386/t-linux $tmake_file"
+ 		;;
+ 	i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu)
+ 		tmake_file="$tmake_file i386/t-kfreebsd"
+--- a/src/gcc/config/aarch64/t-aarch64-linux
++++ b/src/gcc/config/aarch64/t-aarch64-linux
+@@ -22,7 +22,7 @@
+ LIB1ASMFUNCS = _aarch64_sync_cache_range
+ 
+ AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be)
+-MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
+-MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
++MULTILIB_OSDIRNAMES = mabi.lp64=../lib$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu)
++MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)_ilp32-linux-gnu)
+ 
+-MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32
++MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu)
+--- a/src/gcc/config/mips/mips.h
++++ b/src/gcc/config/mips/mips.h
+@@ -3185,13 +3185,3 @@
+    with arguments ARGS.  */
+ #define PMODE_INSN(NAME, ARGS) \
+   (Pmode == SImode ? NAME ## _si ARGS : NAME ## _di ARGS)
+-
+-/* If we are *not* using multilibs and the default ABI is not ABI_32 we
+-   need to change these from /lib and /usr/lib.  */
+-#if MIPS_ABI_DEFAULT == ABI_N32
+-#define STANDARD_STARTFILE_PREFIX_1 "/lib32/"
+-#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib32/"
+-#elif MIPS_ABI_DEFAULT == ABI_64
+-#define STANDARD_STARTFILE_PREFIX_1 "/lib64/"
+-#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib64/"
+-#endif
--- gcc-5-5.4.0.orig/debian/patches/gcc-multilib-multiarch.diff
+++ gcc-5-5.4.0/debian/patches/gcc-multilib-multiarch.diff
@@ -0,0 +1,114 @@
+# DP: Don't auto-detect multilib osdirnames.
+
+--- a/src/gcc/config/sparc/t-linux64
++++ b/src/gcc/config/sparc/t-linux64
+@@ -25,7 +25,12 @@
+ 
+ MULTILIB_OPTIONS = m64/m32
+ MULTILIB_DIRNAMES = 64 32
++ifneq (,$(findstring sparc64,$(target)))
++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu)
++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:sparc-linux-gnu)
++else
+ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu)
+-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu)
++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:sparc-linux-gnu)
++endif
+ 
+ MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu)
+--- a/src/gcc/config/s390/t-linux64
++++ b/src/gcc/config/s390/t-linux64
+@@ -7,7 +7,12 @@
+ 
+ MULTILIB_OPTIONS = m64/m31
+ MULTILIB_DIRNAMES = 64 32
++ifneq (,$(findstring s390x,$(target)))
++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu)
++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:s390-linux-gnu)
++else
+ MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu)
+-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu)
++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:s390-linux-gnu)
++endif
+ 
+ MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu)
+--- a/src/gcc/config/rs6000/t-linux64
++++ b/src/gcc/config/rs6000/t-linux64
+@@ -28,8 +28,13 @@
+ MULTILIB_OPTIONS    := m64/m32
+ MULTILIB_DIRNAMES   := 64 32
+ MULTILIB_EXTRA_OPTS := 
++ifneq (,$(findstring powerpc64,$(target)))
++MULTILIB_OSDIRNAMES := m64=../lib$(call if_multiarch,:powerpc64-linux-gnu)
++MULTILIB_OSDIRNAMES += m32=../lib32$(call if_multiarch,:powerpc-linux-gnu)
++else
+ MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
+-MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu)
++MULTILIB_OSDIRNAMES += m32=../lib$(call if_multiarch,:powerpc-linux-gnu)
++endif
+ 
+ MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu)
+ 
+--- a/src/gcc/config/i386/t-linux64
++++ b/src/gcc/config/i386/t-linux64
+@@ -33,9 +33,19 @@
+ comma=,
+ MULTILIB_OPTIONS    = $(subst $(comma),/,$(TM_MULTILIB_CONFIG))
+ MULTILIB_DIRNAMES   = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS)))
++ifneq (,$(findstring gnux32,$(target)))
+ MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu)
+-MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu)
++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu)
++MULTILIB_OSDIRNAMES+= mx32=../lib$(call if_multiarch,:x86_64-linux-gnux32)
++else ifneq (,$(findstring x86_64,$(target)))
++MULTILIB_OSDIRNAMES = m64=../lib$(call if_multiarch,:x86_64-linux-gnu)
++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu)
+ MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32)
++else
++MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu)
++MULTILIB_OSDIRNAMES+= m32=../lib$(call if_multiarch,:i386-linux-gnu)
++MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32)
++endif
+ 
+ ifneq (,$(findstring x86_64,$(target)))
+   ifneq (,$(findstring biarchx32.h,$(tm_include_list)))
+--- a/src/gcc/config/mips/t-linux64
++++ b/src/gcc/config/mips/t-linux64
+@@ -23,11 +23,24 @@
+ MIPS_ISA = $(if $(findstring r6, $(firstword $(subst -, ,$(target)))),isa)
+ MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el)
+ MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft)
++
++ifneq (,$(findstring gnuabi64,$(target)))
+ MULTILIB_OSDIRNAMES = \
+ 	../lib32$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \
+-	../lib$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
++	../libo32$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
++	../lib$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
++else ifneq (,$(findstring gnuabin32,$(target)))
++MULTILIB_OSDIRNAMES = \
++	../lib$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \
++	../libo32$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
+ 	../lib64$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
+-
++else
++MULTILIB_OSDIRNAMES = \
++ 	../lib32$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \
++ 	../lib$(call if_multiarch,:mips$(MIPS_ISA)$(MIPS_32)$(MIPS_R6)$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \
++ 	../lib64$(call if_multiarch,:mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT))
++endif
++ 
+ ifneq (,$(findstring abin32,$(target)))
+ MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_ISA)64$(MIPS_R6)$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT))
+ else
+--- a/src/gcc/config/rs6000/t-linux
++++ b/src/gcc/config/rs6000/t-linux
+@@ -2,7 +2,7 @@
+ # or soft-float.
+ ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float)))
+ ifneq (,$(findstring powerpc64,$(target)))
+-MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu)
++MULTILIB_OSDIRNAMES := .=../lib$(call if_multiarch,:powerpc64-linux-gnu)
+ else
+ ifneq (,$(findstring spe,$(target)))
+ MULTIARCH_DIRNAME := powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1)
--- gcc-5-5.4.0.orig/debian/patches/gcc-sysroot.diff
+++ gcc-5-5.4.0/debian/patches/gcc-sysroot.diff
@@ -0,0 +1,157 @@
+# DP: Allow building --with-sysroot=/
+
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -121,6 +121,69 @@ if test x$local_prefix = x; then
+ 	local_prefix=/usr/local
+ fi
+ 
++AC_ARG_WITH([native-system-header-dir],
++  [  --with-native-system-header-dir=dir
++                          use dir as the directory to look for standard
++                          system header files in.  Defaults to /usr/include.],
++[
++ case ${with_native_system_header_dir} in
++ yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;;
++ /* | [[A-Za-z]]:[[\\/]]*) ;;
++ *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;;
++ esac
++ configured_native_system_header_dir="${withval}"
++], [configured_native_system_header_dir=])
++
++AC_ARG_WITH(build-sysroot, 
++  [AS_HELP_STRING([--with-build-sysroot=sysroot],
++                  [use sysroot as the system root during the build])],
++  [if test x"$withval" != x ; then
++     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
++   fi],
++  [SYSROOT_CFLAGS_FOR_TARGET=])
++AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)
++
++if test "x$prefix" = xNONE; then
++ test_prefix=/usr/local
++else
++ test_prefix=$prefix
++fi
++if test "x$exec_prefix" = xNONE; then
++ test_exec_prefix=$test_prefix
++else
++ test_exec_prefix=$exec_prefix
++fi
++
++AC_ARG_WITH(sysroot,
++[AS_HELP_STRING([[--with-sysroot[=DIR]]],
++		[search for usr/lib, usr/include, et al, within DIR])],
++[
++ case ${with_sysroot} in
++ yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
++ *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
++ esac
++   
++ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
++ CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
++	
++ case ${TARGET_SYSTEM_ROOT} in
++ "${test_prefix}"|"${test_prefix}/"*|\
++ "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
++ '${prefix}'|'${prefix}/'*|\
++ '${exec_prefix}'|'${exec_prefix}/'*)
++   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
++   TARGET_SYSTEM_ROOT_DEFINE="$t"
++   ;;
++ esac
++], [
++ TARGET_SYSTEM_ROOT=
++ TARGET_SYSTEM_ROOT_DEFINE=
++ CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
++])
++AC_SUBST(TARGET_SYSTEM_ROOT)
++AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
++AC_SUBST(CROSS_SYSTEM_HEADER_DIR)
++
+ # Don't set gcc_gxx_include_dir to gxx_include_dir since that's only
+ # passed in by the toplevel make and thus we'd get different behavior
+ # depending on where we built the sources.
+@@ -152,7 +215,9 @@ gcc_gxx_include_dir_add_sysroot=0
+ if test "${with_sysroot+set}" = set; then
+   gcc_gxx_without_sysroot=`expr "${gcc_gxx_include_dir}" : "${with_sysroot}"'\(.*\)'`
+   if test "${gcc_gxx_without_sysroot}"; then
+-    gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    if test x${with_sysroot} != x/; then
++      gcc_gxx_include_dir="${gcc_gxx_without_sysroot}"
++    fi
+     gcc_gxx_include_dir_add_sysroot=1
+   fi
+ fi
+@@ -791,69 +856,6 @@ AC_ARG_ENABLE(shared,
+ ], [enable_shared=yes])
+ AC_SUBST(enable_shared)
+ 
+-AC_ARG_WITH([native-system-header-dir],
+-  [  --with-native-system-header-dir=dir
+-                          use dir as the directory to look for standard
+-                          system header files in.  Defaults to /usr/include.],
+-[
+- case ${with_native_system_header_dir} in
+- yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;;
+- /* | [[A-Za-z]]:[[\\/]]*) ;;
+- *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;;
+- esac
+- configured_native_system_header_dir="${withval}"
+-], [configured_native_system_header_dir=])
+-
+-AC_ARG_WITH(build-sysroot, 
+-  [AS_HELP_STRING([--with-build-sysroot=sysroot],
+-                  [use sysroot as the system root during the build])],
+-  [if test x"$withval" != x ; then
+-     SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval"
+-   fi],
+-  [SYSROOT_CFLAGS_FOR_TARGET=])
+-AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET)
+-
+-if test "x$prefix" = xNONE; then
+- test_prefix=/usr/local
+-else
+- test_prefix=$prefix
+-fi
+-if test "x$exec_prefix" = xNONE; then
+- test_exec_prefix=$test_prefix
+-else
+- test_exec_prefix=$exec_prefix
+-fi
+-
+-AC_ARG_WITH(sysroot,
+-[AS_HELP_STRING([[--with-sysroot[=DIR]]],
+-		[search for usr/lib, usr/include, et al, within DIR])],
+-[
+- case ${with_sysroot} in
+- yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;;
+- *) TARGET_SYSTEM_ROOT=$with_sysroot ;;
+- esac
+-   
+- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"'
+- CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)'
+-	
+- case ${TARGET_SYSTEM_ROOT} in
+- "${test_prefix}"|"${test_prefix}/"*|\
+- "${test_exec_prefix}"|"${test_exec_prefix}/"*|\
+- '${prefix}'|'${prefix}/'*|\
+- '${exec_prefix}'|'${exec_prefix}/'*)
+-   t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE"
+-   TARGET_SYSTEM_ROOT_DEFINE="$t"
+-   ;;
+- esac
+-], [
+- TARGET_SYSTEM_ROOT=
+- TARGET_SYSTEM_ROOT_DEFINE=
+- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include'
+-])
+-AC_SUBST(TARGET_SYSTEM_ROOT)
+-AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
+-AC_SUBST(CROSS_SYSTEM_HEADER_DIR)
+-
+ AC_ARG_WITH(specs,
+   [AS_HELP_STRING([--with-specs=SPECS],
+                   [add SPECS to driver command-line processing])],
--- gcc-5-5.4.0.orig/debian/patches/gcc-target-include-asm.diff
+++ gcc-5-5.4.0/debian/patches/gcc-target-include-asm.diff
@@ -0,0 +1,15 @@
+# DP: Search $(builddir)/sys-include for the asm header files
+
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -3195,7 +3195,7 @@ fi
+ # being built; programs in there won't even run.
+ if test "${build}" = "${host}" && test -d ${srcdir}/gcc; then
+   # Search for pre-installed headers if nothing else fits.
+-  FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include'
++  FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include -isystem $(CURDIR)/sys-include'
+ fi
+ 
+ if test "x${use_gnu_ld}" = x &&
--- gcc-5-5.4.0.orig/debian/patches/gcc-textdomain.diff
+++ gcc-5-5.4.0/debian/patches/gcc-textdomain.diff
@@ -0,0 +1,96 @@
+# DP: Set gettext's domain and textdomain to the versioned package name.
+
+Index: b/src/gcc/intl.c
+===================================================================
+--- a/src/gcc/intl.c
++++ b/src/gcc/intl.c
+@@ -55,8 +55,8 @@ gcc_init_libintl (void)
+   setlocale (LC_ALL, "");
+ #endif
+ 
+-  (void) bindtextdomain ("gcc", LOCALEDIR);
+-  (void) textdomain ("gcc");
++  (void) bindtextdomain ("gcc-5", LOCALEDIR);
++  (void) textdomain ("gcc-5");
+ 
+   /* Opening quotation mark.  */
+   open_quote = _("`");
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -3904,8 +3904,8 @@ install-po:
+ 	  dir=$(localedir)/$$lang/LC_MESSAGES; \
+ 	  echo $(mkinstalldirs) $(DESTDIR)$$dir; \
+ 	  $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \
+-	  echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \
+-	  $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \
++	  echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-5.mo; \
++	  $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-5.mo; \
+ 	done
+ 
+ # Rule for regenerating the message template (gcc.pot).
+Index: b/src/libcpp/init.c
+===================================================================
+--- a/src/libcpp/init.c
++++ b/src/libcpp/init.c
+@@ -153,7 +153,7 @@ init_library (void)
+       init_trigraph_map ();
+ 
+ #ifdef ENABLE_NLS
+-       (void) bindtextdomain (PACKAGE, LOCALEDIR);
++       (void) bindtextdomain (PACKAGE PACKAGE_SUFFIX, LOCALEDIR);
+ #endif
+     }
+ }
+Index: b/src/libcpp/system.h
+===================================================================
+--- a/src/libcpp/system.h
++++ b/src/libcpp/system.h
+@@ -280,7 +280,7 @@ extern int errno;
+ #endif
+ 
+ #ifndef _
+-# define _(msgid) dgettext (PACKAGE, msgid)
++# define _(msgid) dgettext (PACKAGE PACKAGE_SUFFIX, msgid)
+ #endif
+ 
+ #ifndef N_
+Index: b/src/libcpp/Makefile.in
+===================================================================
+--- a/src/libcpp/Makefile.in
++++ b/src/libcpp/Makefile.in
+@@ -49,6 +49,7 @@ LDFLAGS = @LDFLAGS@
+ LIBICONV = @LIBICONV@
+ LIBINTL = @LIBINTL@
+ PACKAGE = @PACKAGE@
++PACKAGE_SUFFIX = -5
+ RANLIB = @RANLIB@
+ SHELL = @SHELL@
+ USED_CATALOGS = @USED_CATALOGS@
+@@ -72,10 +73,12 @@ depcomp = $(SHELL) $(srcdir)/../depcomp
+ 
+ INCLUDES = -I$(srcdir) -I. -I$(srcdir)/../include @INCINTL@ \
+ 	-I$(srcdir)/include
++DEBCPPFLAGS += -DPACKAGE_SUFFIX=\"$(strip $(PACKAGE_SUFFIX))\"
+ 
+-ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) $(PICFLAG)
++ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) $(PICFLAG) \
++	$(DEBCPPFLAGS)
+ ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(NOEXCEPTION_FLAGS) $(INCLUDES) \
+-	$(CPPFLAGS) $(PICFLAG)
++	$(CPPFLAGS) $(PICFLAG) $(DEBCPPFLAGS)
+ 
+ # The name of the compiler to use.
+ COMPILER = $(CXX)
+@@ -164,8 +167,8 @@ install-strip install: all installdirs
+ 	  else continue; \
+ 	  fi; \
+ 	  dir=$(localedir)/$$lang/LC_MESSAGES; \
+-	  echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \
+-	  $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \
++	  echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \
++	  $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \
+ 	done
+ 
+ mostlyclean:
--- gcc-5-5.4.0.orig/debian/patches/gccgo-version.diff
+++ gcc-5-5.4.0/debian/patches/gccgo-version.diff
@@ -0,0 +1,91 @@
+# DP: Omit the subminor number from the go libdir
+
+Index: b/src/gcc/go/Make-lang.in
+===================================================================
+--- a/src/gcc/go/Make-lang.in
++++ b/src/gcc/go/Make-lang.in
+@@ -217,7 +217,9 @@ go.stageprofile: stageprofile-start
+ go.stagefeedback: stagefeedback-start
+ 	-mv go/*$(objext) stagefeedback/go
+ 
+-CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(version)\" \
++short_version := $(shell echo $(version) | sed -r 's/([0-9]+).*/\1/')
++
++CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(short_version)\" \
+ 	-DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\"
+ 
+ GOINCLUDES = -I $(srcdir)/go -I $(srcdir)/go/gofrontend
+Index: b/src/libgo/Makefile.in
+===================================================================
+--- a/src/libgo/Makefile.in
++++ b/src/libgo/Makefile.in
+@@ -491,14 +491,15 @@ SUFFIXES = .c .go .gox .o .obj .lo .a
+ @LIBGO_IS_RTEMS_TRUE@subdirs = testsuite
+ SUBDIRS = ${subdirs}
+ gcc_version := $(shell $(GOC) -dumpversion)
++short_version := $(shell echo $(gcc_version) | sed -r 's/([0-9]+)\..*/\1/')
+ MAINT_CHARSET = latin1
+ mkinstalldirs = $(SHELL) $(toplevel_srcdir)/mkinstalldirs
+ PWD_COMMAND = $${PWDCMD-pwd}
+ STAMP = echo timestamp >
+ toolexecdir = $(glibgo_toolexecdir)
+ toolexeclibdir = $(glibgo_toolexeclibdir)
+-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias)
+-libexecsubdir = $(libexecdir)/gcc/$(target_alias)/$(gcc_version)
++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version)
++libexecsubdir = $(libexecdir)/gcc/$(target_alias)/$(short_version)
+ WARN_CFLAGS = $(WARN_FLAGS) $(WERROR)
+ 
+ # -I/-D flags to pass when compiling.
+Index: b/src/libgo/Makefile.am
+===================================================================
+--- a/src/libgo/Makefile.am
++++ b/src/libgo/Makefile.am
+@@ -16,6 +16,7 @@ endif
+ SUBDIRS = ${subdirs}
+ 
+ gcc_version := $(shell $(GOC) -dumpversion)
++short_version := $(shell echo $(gcc_version) | sed -r 's/([0-9]+)\..*/\1/')
+ 
+ MAINT_CHARSET = latin1
+ 
+@@ -25,8 +26,8 @@ STAMP = echo timestamp >
+ 
+ toolexecdir = $(glibgo_toolexecdir)
+ toolexeclibdir = $(glibgo_toolexeclibdir)
+-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias)
+-libexecsubdir = $(libexecdir)/gcc/$(target_alias)/$(gcc_version)
++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version)
++libexecsubdir = $(libexecdir)/gcc/$(target_alias)/$(short_version)
+ 
+ LIBFFI = @LIBFFI@
+ LIBFFIINCS = @LIBFFIINCS@
+Index: b/src/gotools/Makefile.am
+===================================================================
+--- a/src/gotools/Makefile.am
++++ b/src/gotools/Makefile.am
+@@ -18,8 +18,9 @@
+ ACLOCAL_AMFLAGS = -I ./config -I ../config
+ 
+ gcc_version := $(shell $(GCC_FOR_TARGET) -dumpversion)
++short_version := $(shell echo $(gcc_version) | sed -r 's/([0-9]+)\..*/\1/')
+ 
+-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version)
++libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(short_version)
+ 
+ mkinstalldirs = $(SHELL) $(toplevel_srcdir)/mkinstalldirs
+ PWD_COMMAND = $${PWDCMD-pwd}
+Index: b/src/gotools/Makefile.in
+===================================================================
+--- a/src/gotools/Makefile.in
++++ b/src/gotools/Makefile.in
+@@ -219,7 +219,8 @@ top_builddir = @top_builddir@
+ top_srcdir = @top_srcdir@
+ ACLOCAL_AMFLAGS = -I ./config -I ../config
+ gcc_version := $(shell $(GCC_FOR_TARGET) -dumpversion)
+-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version)
++short_version := $(shell echo $(gcc_version) | sed -r 's/([0-9]+)\..*/\1/')
++libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(short_version)
+ mkinstalldirs = $(SHELL) $(toplevel_srcdir)/mkinstalldirs
+ PWD_COMMAND = $${PWDCMD-pwd}
+ STAMP = echo timestamp >
--- gcc-5-5.4.0.orig/debian/patches/gcj-arm-mode.diff
+++ gcc-5-5.4.0/debian/patches/gcj-arm-mode.diff
@@ -0,0 +1,33 @@
+# DP: For armhf, force arm mode instead of thumb mode
+
+--- a/src/libjava/configure.host
++++ b/src/libjava/configure.host
+@@ -66,6 +66,9 @@
+     ;;
+ esac
+ 
++# on armhf force arm mode
++libgcj_flags="${libgcj_flags} -marm"
++
+ AM_RUNTESTFLAGS= 
+ 
+ # Set any host dependent compiler flags.
+--- a/src/gcc/java/lang-specs.h
++++ b/src/gcc/java/lang-specs.h
+@@ -47,7 +47,7 @@
+     %{.class|.zip|.jar|!fsyntax-only:jc1				\
+       %{.java|fsaw-java-file:%U.jar -fsource-filename=%i %<ffilelist-file} \
+       %{.class|.zip|.jar|ffilelist-file|fcompile-resource*:%i}		\
+-      %(jc1) %(cc1_options) %{I*} %{!findirect-dispatch:-faux-classpath %U.zip} \
++      %(jc1) %(cc1_options) -marm %{I*} %{!findirect-dispatch:-faux-classpath %U.zip} \
+       %{MD:-MD_} %{MMD:-MMD_} %{M} %{MM} %{MA} %{MT*} %{MF*}\
+       %(invoke_as)}",
+       0, 0, 0},
+--- a/src/libjava/libgcj.spec.in
++++ b/src/libjava/libgcj.spec.in
+@@ -9,4 +9,4 @@
+ %rename lib liborig
+ *lib: @LD_START_STATIC_SPEC@ @LIBGCJ_SPEC@ @LD_FINISH_STATIC_SPEC@ @LIBMATHSPEC@ @LDLIBICONV@ @GCSPEC@ @THREADSPEC@ @ZLIBSPEC@ @SYSTEMSPEC@ %(libgcc) @LIBSTDCXXSPEC@ %(liborig)
+ 
+-*jc1: @HASH_SYNC_SPEC@ @DIVIDESPEC@ @CHECKREFSPEC@ @JC1GCSPEC@ @EXCEPTIONSPEC@ @BACKTRACESPEC@ @IEEESPEC@ @ATOMICSPEC@ @LIBGCJ_BC_SPEC@ -fkeep-inline-functions
++*jc1: @HASH_SYNC_SPEC@ @DIVIDESPEC@ @CHECKREFSPEC@ @JC1GCSPEC@ @EXCEPTIONSPEC@ @BACKTRACESPEC@ @IEEESPEC@ @ATOMICSPEC@ @LIBGCJ_BC_SPEC@ -fkeep-inline-functions -marm
--- gcc-5-5.4.0.orig/debian/patches/gdc-5-doc.diff
+++ gcc-5-5.4.0/debian/patches/gdc-5-doc.diff
@@ -0,0 +1,106 @@
+# DP: This implements D language support in the GCC back end, and adds
+# DP: relevant documentation about the GDC front end (documentation part).
+
+Index: b/src/gcc/doc/frontends.texi
+===================================================================
+--- a/src/gcc/doc/frontends.texi
++++ b/src/gcc/doc/frontends.texi
+@@ -9,6 +9,7 @@
+ @cindex GNU Compiler Collection
+ @cindex GNU C Compiler
+ @cindex Ada
++@cindex D
+ @cindex Fortran
+ @cindex Go
+ @cindex Java
+@@ -17,7 +18,7 @@
+ GCC stands for ``GNU Compiler Collection''.  GCC is an integrated
+ distribution of compilers for several major programming languages.  These
+ languages currently include C, C++, Objective-C, Objective-C++, Java,
+-Fortran, Ada, and Go.
++Fortran, Ada, D and Go.
+ 
+ The abbreviation @dfn{GCC} has multiple meanings in common use.  The
+ current official meaning is ``GNU Compiler Collection'', which refers
+Index: b/src/gcc/doc/install.texi
+===================================================================
+--- a/src/gcc/doc/install.texi
++++ b/src/gcc/doc/install.texi
+@@ -1547,12 +1547,12 @@ their runtime libraries should be built.
+ grep language= */config-lang.in
+ @end smallexample
+ Currently, you can use any of the following:
+-@code{all}, @code{ada}, @code{c}, @code{c++}, @code{fortran},
++@code{all}, @code{ada}, @code{c}, @code{c++}, @code{d}, @code{fortran},
+ @code{go}, @code{java}, @code{objc}, @code{obj-c++}.
+ Building the Ada compiler has special requirements, see below.
+ If you do not pass this flag, or specify the option @code{all}, then all
+ default languages available in the @file{gcc} sub-tree will be configured.
+-Ada, Go and Objective-C++ are not default languages; the rest are.
++Ada, D, Go and Objective-C++ are not default languages; the rest are.
+ 
+ @item --enable-stage1-languages=@var{lang1},@var{lang2},@dots{}
+ Specify that a particular subset of compilers and their runtime
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -1259,6 +1259,15 @@ called @dfn{specs}.
+ Ada source code file containing a library unit body (a subprogram or
+ package body).  Such files are also called @dfn{bodies}.
+ 
++@item @var{file}.d
++D source code file.
++
++@item @var{file}.di
++D interface code file.
++
++@item @var{file}.dd
++D documentation code file.
++
+ @c GCC also knows about some suffixes for languages not yet included:
+ @c Pascal:
+ @c @var{file}.p
+@@ -1294,6 +1303,7 @@ objective-c  objective-c-header  objecti
+ objective-c++ objective-c++-header objective-c++-cpp-output
+ assembler  assembler-with-cpp
+ ada
++d
+ f77  f77-cpp-input f95  f95-cpp-input
+ go
+ java
+Index: b/src/gcc/doc/sourcebuild.texi
+===================================================================
+--- a/src/gcc/doc/sourcebuild.texi
++++ b/src/gcc/doc/sourcebuild.texi
+@@ -109,6 +109,9 @@ The Objective-C and Objective-C++ runtim
+ @item libquadmath
+ The runtime support library for quad-precision math operations.
+ 
++@item libphobos
++The D standard runtime library.
++
+ @item libssp
+ The Stack protector runtime library.
+ 
+Index: b/src/gcc/doc/standards.texi
+===================================================================
+--- a/src/gcc/doc/standards.texi
++++ b/src/gcc/doc/standards.texi
+@@ -280,6 +280,16 @@ available online, see @uref{http://gcc.g
+ As of the GCC 4.7.1 release, GCC supports the Go 1 language standard,
+ described at @uref{http://golang.org/doc/go1.html}.
+ 
++@section D language
++
++The D language is under development as of this writing; see the
++@uref{http://dlang.org/@/language-reference.html, current language
++reference}.  At present the current major version of D is 2.0, and
++there is no way to describe the language supported by GCC in terms of
++a specific minor version.  In general GCC follows the D frontend
++releases closely, and any given GCC release will support the current
++language as of the date that the release was frozen.
++
+ @section References for Other Languages
+ 
+ @xref{Top, GNAT Reference Manual, About This Guide, gnat_rm,
--- gcc-5-5.4.0.orig/debian/patches/gdc-5.diff
+++ gcc-5-5.4.0/debian/patches/gdc-5.diff
@@ -0,0 +1,138 @@
+# DP: This implements D language support in the GCC back end, and adds
+# DP: relevant documentation about the GDC front end (code part).
+
+Index: b/src/gcc/config/darwin.h
+===================================================================
+--- a/src/gcc/config/darwin.h
++++ b/src/gcc/config/darwin.h
+@@ -49,6 +49,10 @@ see the files COPYING3 and COPYING.RUNTI
+ /* Suppress g++ attempt to link in the math library automatically. */
+ #define MATH_LIBRARY ""
+ 
++/* Suppress gdc attempt to link in the thread and time library automatically. */
++#define THREAD_LIBRARY ""
++#define TIME_LIBRARY ""
++
+ /* We have atexit.  */
+ 
+ #define HAVE_ATEXIT
+Index: b/src/gcc/config/i386/cygming.h
+===================================================================
+--- a/src/gcc/config/i386/cygming.h
++++ b/src/gcc/config/i386/cygming.h
+@@ -170,6 +170,10 @@ along with GCC; see the file COPYING3.
+ 
+ #undef MATH_LIBRARY
+ #define MATH_LIBRARY ""
++#undef THREAD_LIBRARY
++#define THREAD_LIBRARY ""
++#undef TIME_LIBRARY
++#define TIME_LIBRARY ""
+ 
+ #undef TARGET_LIBC_HAS_FUNCTION
+ #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
+Index: b/src/gcc/config/linux-android.h
+===================================================================
+--- a/src/gcc/config/linux-android.h
++++ b/src/gcc/config/linux-android.h
+@@ -57,3 +57,9 @@
+ 
+ #define ANDROID_ENDFILE_SPEC \
+   "%{shared: crtend_so%O%s;: crtend_android%O%s}"
++
++/* Suppress gdc attempt to link in the thread and time library automatically. */
++#if ANDROID_DEFAULT
++# define THREAD_LIBRARY ""
++# define TIME_LIBRARY ""
++#endif
+Index: b/src/gcc/config/rs6000/rs6000.c
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.c
++++ b/src/gcc/config/rs6000/rs6000.c
+@@ -25738,7 +25738,8 @@ rs6000_output_function_epilogue (FILE *f
+       if (lang_GNU_C ()
+ 	  || ! strcmp (language_string, "GNU GIMPLE")
+ 	  || ! strcmp (language_string, "GNU Go")
+-	  || ! strcmp (language_string, "libgccjit"))
++	  || ! strcmp (language_string, "libgccjit")
++	  || ! strcmp (language_string, "GNU D"))
+ 	i = 0;
+       else if (! strcmp (language_string, "GNU F77")
+ 	       || lang_GNU_Fortran ())
+Index: b/src/gcc/dwarf2out.c
+===================================================================
+--- a/src/gcc/dwarf2out.c
++++ b/src/gcc/dwarf2out.c
+@@ -4756,6 +4756,15 @@ is_ada (void)
+   return lang == DW_LANG_Ada95 || lang == DW_LANG_Ada83;
+ }
+ 
++/* Return TRUE if the language is D.  */
++static inline bool
++is_dlang (void)
++{
++  unsigned int lang = get_AT_unsigned (comp_unit_die (), DW_AT_language);
++
++  return lang == DW_LANG_D;
++}
++
+ /* Remove the specified attribute if present.  */
+ 
+ static void
+@@ -19844,6 +19853,8 @@ gen_compile_unit_die (const char *filena
+ 	language = DW_LANG_ObjC;
+       else if (strcmp (language_string, "GNU Objective-C++") == 0)
+ 	language = DW_LANG_ObjC_plus_plus;
++      else if (strcmp (language_string, "GNU D") == 0)
++	language = DW_LANG_D;
+       else if (dwarf_version >= 5 || !dwarf_strict)
+ 	{
+ 	  if (strcmp (language_string, "GNU Go") == 0)
+@@ -20813,7 +20824,7 @@ declare_in_namespace (tree thing, dw_die
+ 
+   if (ns_context != context_die)
+     {
+-      if (is_fortran ())
++      if (is_fortran () || is_dlang ())
+ 	return ns_context;
+       if (DECL_P (thing))
+ 	gen_decl_die (thing, NULL, ns_context);
+@@ -20836,7 +20847,7 @@ gen_namespace_die (tree decl, dw_die_ref
+     {
+       /* Output a real namespace or module.  */
+       context_die = setup_namespace_context (decl, comp_unit_die ());
+-      namespace_die = new_die (is_fortran ()
++      namespace_die = new_die (is_fortran () || is_dlang ()
+ 			       ? DW_TAG_module : DW_TAG_namespace,
+ 			       context_die, decl);
+       /* For Fortran modules defined in different CU don't add src coords.  */
+@@ -20899,7 +20910,7 @@ gen_decl_die (tree decl, tree origin, dw
+       break;
+ 
+     case CONST_DECL:
+-      if (!is_fortran () && !is_ada ())
++      if (!is_fortran () && !is_ada () && !is_dlang ())
+ 	{
+ 	  /* The individual enumerators of an enum type get output when we output
+ 	     the Dwarf representation of the relevant enum type itself.  */
+@@ -21370,7 +21381,7 @@ dwarf2out_decl (tree decl)
+     case CONST_DECL:
+       if (debug_info_level <= DINFO_LEVEL_TERSE)
+ 	return;
+-      if (!is_fortran () && !is_ada ())
++      if (!is_fortran () && !is_ada () && !is_dlang ())
+ 	return;
+       if (TREE_STATIC (decl) && decl_function_context (decl))
+ 	context_die = lookup_decl_die (DECL_CONTEXT (decl));
+Index: b/src/gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c
++++ b/src/gcc/gcc.c
+@@ -1148,6 +1148,7 @@ static const struct compiler default_com
+   {".java", "#Java", 0, 0, 0}, {".class", "#Java", 0, 0, 0},
+   {".zip", "#Java", 0, 0, 0}, {".jar", "#Java", 0, 0, 0},
+   {".go", "#Go", 0, 1, 0},
++  {".d", "#D", 0, 1, 0}, {".dd", "#D", 0, 1, 0}, {".di", "#D", 0, 1, 0},
+   /* Next come the entries for C.  */
+   {".c", "@c", 0, 0, 1},
+   {"@c",
--- gcc-5-5.4.0.orig/debian/patches/gdc-base-version.diff
+++ gcc-5-5.4.0/debian/patches/gdc-base-version.diff
@@ -0,0 +1,27 @@
+# DP: Use the GCC base version for the D include dir name
+
+Index: b/src/libphobos/m4/druntime.m4
+===================================================================
+--- a/src/libphobos/m4/druntime.m4
++++ b/src/libphobos/m4/druntime.m4
+@@ -43,7 +43,7 @@ AC_DEFUN([DRUNTIME_INSTALL_DIRECTORIES],
+   AC_REQUIRE([AC_PROG_GDC])
+ 
+   AC_MSG_CHECKING([D GCC version])
+-  d_gcc_ver=`$GDC -dumpversion`
++  d_gcc_ver=`$GDC -dumpversion | sed 's/^\(@<:@0-9@:>@*\).*/\1/'`
+   AC_MSG_RESULT($d_gcc_ver)
+   AC_ARG_WITH([cross-host],
+     AC_HELP_STRING([--with-cross-host=HOST],
+Index: b/src/libphobos/configure.ac
+===================================================================
+--- a/src/libphobos/configure.ac
++++ b/src/libphobos/configure.ac
+@@ -53,6 +53,7 @@ m4_rename([_AC_ARG_VAR_PRECIOUS],[glibd_
+ m4_define([_AC_ARG_VAR_PRECIOUS],[])
+ AM_PROG_AS
+ AC_PROG_CC
++dnl dummy change to run autoreconf in this directory
+ AC_PROG_GDC
+ WITH_LOCAL_DRUNTIME([GDC_CHECK_COMPILE], [])
+ 
--- gcc-5-5.4.0.orig/debian/patches/gdc-config-ml.diff
+++ gcc-5-5.4.0/debian/patches/gdc-config-ml.diff
@@ -0,0 +1,55 @@
+# DP: config-ml.in: Add D support.
+
+2015-04-30  Matthias Klose  <doko@ubuntu.com>
+
+        * config-ml.in: Add D support: treat GDC and GDCFLAGS like other
+        compiler/flag environment variables.
+
+Index: b/src/config-ml.in
+===================================================================
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -525,6 +525,7 @@ multi-do:
+ 				GCJFLAGS="$(GCJFLAGS) $${flags}" \
+ 				GOCFLAGS="$(GOCFLAGS) $${flags}" \
+ 				CXXFLAGS="$(CXXFLAGS) $${flags}" \
++				DFLAGS="$(DFLAGS) $${flags}" \
+ 				LIBCFLAGS="$(LIBCFLAGS) $${flags}" \
+ 				LIBCXXFLAGS="$(LIBCXXFLAGS) $${flags}" \
+ 				LDFLAGS="$(LDFLAGS) $${flags}" \
+@@ -757,7 +758,7 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+         break
+       fi
+     done
+-    ml_config_env='CC="${CC_}$flags" CXX="${CXX_}$flags" F77="${F77_}$flags" GCJ="${GCJ_}$flags" GFORTRAN="${GFORTRAN_}$flags" GOC="${GOC_}$flags"'
++    ml_config_env='CC="${CC_}$flags" CXX="${CXX_}$flags" F77="${F77_}$flags" GCJ="${GCJ_}$flags" GFORTRAN="${GFORTRAN_}$flags" GOC="${GOC_}$flags" GDC="${GDC_}$flags"'
+ 
+     if [ "${with_target_subdir}" = "." ]; then
+ 	CC_=$CC' '
+@@ -766,6 +767,7 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	GCJ_=$GCJ' '
+ 	GFORTRAN_=$GFORTRAN' '
+ 	GOC_=$GOC' '
++	GDC_=$GDC' '
+     else
+ 	# Create a regular expression that matches any string as long
+ 	# as ML_POPDIR.
+@@ -842,6 +844,18 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  esac
+ 	done
+ 
++	GDC_=
++	for arg in ${GDC}; do
++	  case $arg in
++	  -[BIL]"${ML_POPDIR}"/*)
++	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  "${ML_POPDIR}"/*)
++	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  *)
++	    GDC_="${GDC_}${arg} " ;;
++	  esac
++	done
++
+ 	if test "x${LD_LIBRARY_PATH+set}" = xset; then
+ 	  LD_LIBRARY_PATH_=
+ 	  for arg in `echo "$LD_LIBRARY_PATH" | tr ':' ' '`; do
--- gcc-5-5.4.0.orig/debian/patches/gdc-cross-biarch.diff
+++ gcc-5-5.4.0/debian/patches/gdc-cross-biarch.diff
@@ -0,0 +1,13 @@
+# DP: Fix the location of target's libs in cross-build for biarch
+
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -891,6 +915,8 @@
+ 	  case $arg in
+ 	  -[BIL]"${ML_POPDIR}"/*)
+ 	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  -B*/lib/)
++	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;;
+ 	  "${ML_POPDIR}"/*)
+ 	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
+ 	  *)
--- gcc-5-5.4.0.orig/debian/patches/gdc-cross-install-location.diff
+++ gcc-5-5.4.0/debian/patches/gdc-cross-install-location.diff
@@ -0,0 +1,13 @@
+Index: b/src/libphobos/m4/druntime.m4
+===================================================================
+--- a/src/libphobos/m4/druntime.m4
++++ b/src/libphobos/m4/druntime.m4
+@@ -78,7 +78,7 @@ AC_DEFUN([DRUNTIME_INSTALL_DIRECTORIES],
+   AC_SUBST(toolexeclibdir)
+ 
+   # Default case for install directory for D sources files.
+-  gdc_include_dir='${libdir}/gcc/${target_alias}'/${d_gcc_ver}/include/d
++  gdc_include_dir='${libdir}/gcc-cross/${target_alias}'/${d_gcc_ver}/include/d
+   AC_SUBST(gdc_include_dir)
+ ])
+ 
--- gcc-5-5.4.0.orig/debian/patches/gdc-driver-nophobos.diff
+++ gcc-5-5.4.0/debian/patches/gdc-driver-nophobos.diff
@@ -0,0 +1,28 @@
+# DP: Modify gdc driver to have no libphobos by default.
+
+Index: b/src/gcc/d/d-lang.cc
+===================================================================
+--- a/src/gcc/d/d-lang.cc
++++ b/src/gcc/d/d-lang.cc
+@@ -179,7 +179,7 @@ static void
+ d_init_options_struct(gcc_options *opts)
+ {
+   // GCC options
+-  opts->x_flag_exceptions = 1;
++  opts->x_flag_exceptions = 0;
+ 
+   // Avoid range issues for complex multiply and divide.
+   opts->x_flag_complex_method = 2;
+Index: b/src/gcc/d/d-spec.c
+===================================================================
+--- a/src/gcc/d/d-spec.c
++++ b/src/gcc/d/d-spec.c
+@@ -91,7 +91,7 @@ lang_specific_driver (cl_decoded_option
+ 
+   /* If nonzero, use the standard D runtime library when linking with
+      standard libraries. */
+-  int phobos = 1;
++  int phobos = 0;
+ 
+   /* The number of arguments being added to what's in argv, other than
+      libraries.  We use this to track the number of times we've inserted
--- gcc-5-5.4.0.orig/debian/patches/gdc-frontend-posix.diff
+++ gcc-5-5.4.0/debian/patches/gdc-frontend-posix.diff
@@ -0,0 +1,15 @@
+# DP: Fix build of the D frontend on the Hurd and KFreeBSD.
+
+Index: b/src/gcc/d/dfrontend/object.h
+===================================================================
+--- a/src/gcc/d/dfrontend/object.h
++++ b/src/gcc/d/dfrontend/object.h
+@@ -10,7 +10,7 @@
+ #ifndef OBJECT_H
+ #define OBJECT_H
+ 
+-#define POSIX (__linux__ || __APPLE__ || __FreeBSD__ || __OpenBSD__ || __sun)
++#define POSIX (__linux__ || __GLIBC__ || __gnu_hurd__ || __APPLE__ || __FreeBSD__ || __OpenBSD__ || __sun)
+ 
+ #if __DMC__
+ #pragma once
--- gcc-5-5.4.0.orig/debian/patches/gdc-libphobos-build.diff
+++ gcc-5-5.4.0/debian/patches/gdc-libphobos-build.diff
@@ -0,0 +1,939 @@
+# DP: This implements building of libphobos library in GCC.
+
+Index: b/src/configure.ac
+===================================================================
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -171,6 +171,7 @@ target_libraries="target-libgcc \
+ 		target-libssp \
+ 		target-libquadmath \
+ 		target-libgfortran \
++		target-libphobos \
+ 		target-boehm-gc \
+ 		${libgcj} \
+ 		target-libobjc \
+@@ -1352,6 +1353,7 @@ else
+   GCJ_FOR_BUILD="\$(GCJ)"
+   GFORTRAN_FOR_BUILD="\$(GFORTRAN)"
+   GOC_FOR_BUILD="\$(GOC)"
++  GDC_FOR_BUILD="\$(GDC)"
+   DLLTOOL_FOR_BUILD="\$(DLLTOOL)"
+   LD_FOR_BUILD="\$(LD)"
+   NM_FOR_BUILD="\$(NM)"
+@@ -3266,6 +3268,7 @@ AC_SUBST(DLLTOOL_FOR_BUILD)
+ AC_SUBST(GCJ_FOR_BUILD)
+ AC_SUBST(GFORTRAN_FOR_BUILD)
+ AC_SUBST(GOC_FOR_BUILD)
++AC_SUBST(GDC_FOR_BUILD)
+ AC_SUBST(LDFLAGS_FOR_BUILD)
+ AC_SUBST(LD_FOR_BUILD)
+ AC_SUBST(NM_FOR_BUILD)
+@@ -3376,6 +3379,7 @@ NCN_STRICT_CHECK_TARGET_TOOLS(GCC_FOR_TA
+ NCN_STRICT_CHECK_TARGET_TOOLS(GCJ_FOR_TARGET, gcj)
+ NCN_STRICT_CHECK_TARGET_TOOLS(GFORTRAN_FOR_TARGET, gfortran)
+ NCN_STRICT_CHECK_TARGET_TOOLS(GOC_FOR_TARGET, gccgo)
++NCN_STRICT_CHECK_TARGET_TOOLS(GDC_FOR_TARGET, gdc)
+ 
+ ACX_CHECK_INSTALLED_TARGET_TOOL(AR_FOR_TARGET, ar)
+ ACX_CHECK_INSTALLED_TARGET_TOOL(AS_FOR_TARGET, as)
+@@ -3411,6 +3415,8 @@ GCC_TARGET_TOOL(gfortran, GFORTRAN_FOR_T
+ 		[gcc/gfortran -B$$r/$(HOST_SUBDIR)/gcc/], fortran)
+ GCC_TARGET_TOOL(gccgo, GOC_FOR_TARGET, GOC,
+ 		[gcc/gccgo -B$$r/$(HOST_SUBDIR)/gcc/], go)
++GCC_TARGET_TOOL(gdc, GDC_FOR_TARGET, GDC,
++		[gcc/gdc -B$$r/$(HOST_SUBDIR)/gcc/], d)
+ GCC_TARGET_TOOL(ld, LD_FOR_TARGET, LD, [ld/ld-new])
+ GCC_TARGET_TOOL(lipo, LIPO_FOR_TARGET, LIPO)
+ GCC_TARGET_TOOL(nm, NM_FOR_TARGET, NM, [binutils/nm-new])
+Index: b/src/Makefile.def
+===================================================================
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -156,6 +156,7 @@ target_modules = { module= libquadmath;
+ target_modules = { module= libgfortran; };
+ target_modules = { module= libobjc; };
+ target_modules = { module= libgo; };
++target_modules = { module= libphobos; };
+ target_modules = { module= libtermcap; no_check=true;
+                    missing=mostlyclean;
+                    missing=clean;
+@@ -313,6 +314,7 @@ flags_to_pass = { flag= GCJ_FOR_TARGET ;
+ flags_to_pass = { flag= GFORTRAN_FOR_TARGET ; };
+ flags_to_pass = { flag= GOC_FOR_TARGET ; };
+ flags_to_pass = { flag= GOCFLAGS_FOR_TARGET ; };
++flags_to_pass = { flag= GDC_FOR_TARGET ; };
+ flags_to_pass = { flag= LD_FOR_TARGET ; };
+ flags_to_pass = { flag= LIPO_FOR_TARGET ; };
+ flags_to_pass = { flag= LDFLAGS_FOR_TARGET ; };
+@@ -583,6 +585,8 @@ dependencies = { module=configure-target
+ dependencies = { module=all-target-libgo; on=all-target-libbacktrace; };
+ dependencies = { module=all-target-libgo; on=all-target-libffi; };
+ dependencies = { module=all-target-libgo; on=all-target-libatomic; };
++dependencies = { module=configure-target-libphobos; on=configure-target-zlib; };
++dependencies = { module=all-target-libphobos; on=all-target-zlib; };
+ dependencies = { module=configure-target-libjava; on=configure-target-zlib; };
+ dependencies = { module=configure-target-libjava; on=configure-target-boehm-gc; };
+ dependencies = { module=configure-target-libjava; on=configure-target-libffi; };
+@@ -646,6 +650,8 @@ languages = { language=objc;	gcc-check-t
+ languages = { language=obj-c++;	gcc-check-target=check-obj-c++; };
+ languages = { language=go;	gcc-check-target=check-go;
+ 				lib-check-target=check-target-libgo; };
++languages = { language=d;	gcc-check-target=check-d;
++				lib-check-target=check-target-libphobos; };
+ 
+ // Toplevel bootstrap
+ bootstrap_stage = { id=1 ; };
+Index: b/src/config-ml.in
+===================================================================
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -513,6 +513,7 @@ multi-do:
+ 				exec_prefix="$(exec_prefix)" \
+ 				GCJFLAGS="$(GCJFLAGS) $${flags}" \
+ 				GOCFLAGS="$(GOCFLAGS) $${flags}" \
++				GDCFLAGS="$(GDCFLAGS) $${flags}" \
+ 				CXXFLAGS="$(CXXFLAGS) $${flags}" \
+ 				LIBCFLAGS="$(LIBCFLAGS) $${flags}" \
+ 				LIBCXXFLAGS="$(LIBCXXFLAGS) $${flags}" \
+@@ -746,7 +747,7 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+         break
+       fi
+     done
+-    ml_config_env='CC="${CC_}$flags" CXX="${CXX_}$flags" F77="${F77_}$flags" GCJ="${GCJ_}$flags" GFORTRAN="${GFORTRAN_}$flags" GOC="${GOC_}$flags"'
++    ml_config_env='CC="${CC_}$flags" CXX="${CXX_}$flags" F77="${F77_}$flags" GCJ="${GCJ_}$flags" GFORTRAN="${GFORTRAN_}$flags" GOC="${GOC_}$flags" GDC="${GDC_}$flags"'
+ 
+     if [ "${with_target_subdir}" = "." ]; then
+ 	CC_=$CC' '
+@@ -755,6 +756,7 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	GCJ_=$GCJ' '
+ 	GFORTRAN_=$GFORTRAN' '
+ 	GOC_=$GOC' '
++	GDC_=$GDC' '
+     else
+ 	# Create a regular expression that matches any string as long
+ 	# as ML_POPDIR.
+@@ -831,6 +833,18 @@ if [ -n "${multidirs}" ] && [ -z "${ml_n
+ 	  esac
+ 	done
+ 
++	GDC_=
++	for arg in ${GDC}; do
++	  case $arg in
++	  -[BIL]"${ML_POPDIR}"/*)
++	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  "${ML_POPDIR}"/*)
++	    GDC_="${GDC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;;
++	  *)
++	    GDC_="${GDC_}${arg} " ;;
++	  esac
++	done
++
+ 	if test "x${LD_LIBRARY_PATH+set}" = xset; then
+ 	  LD_LIBRARY_PATH_=
+ 	  for arg in `echo "$LD_LIBRARY_PATH" | tr ':' ' '`; do
+Index: b/src/config/multi.m4
+===================================================================
+--- a/src/config/multi.m4
++++ b/src/config/multi.m4
+@@ -65,4 +65,6 @@ CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+ CC="$CC"
+ CXX="$CXX"
+ GFORTRAN="$GFORTRAN"
+-GCJ="$GCJ"])])dnl
++GCJ="$GCJ"
++GDC="$GDC"])])dnl
++
+Index: b/src/Makefile.in
+===================================================================
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -157,6 +157,7 @@ BUILD_EXPORTS = \
+ 	GFORTRAN="$(GFORTRAN_FOR_BUILD)"; export GFORTRAN; \
+ 	GOC="$(GOC_FOR_BUILD)"; export GOC; \
+ 	GOCFLAGS="$(GOCFLAGS_FOR_BUILD)"; export GOCFLAGS; \
++	GDC="$(GDC_FOR_BUILD)"; export GDC; \
+ 	DLLTOOL="$(DLLTOOL_FOR_BUILD)"; export DLLTOOL; \
+ 	LD="$(LD_FOR_BUILD)"; export LD; \
+ 	LDFLAGS="$(LDFLAGS_FOR_BUILD)"; export LDFLAGS; \
+@@ -194,6 +195,7 @@ HOST_EXPORTS = \
+ 	GCJ="$(GCJ)"; export GCJ; \
+ 	GFORTRAN="$(GFORTRAN)"; export GFORTRAN; \
+ 	GOC="$(GOC)"; export GOC; \
++	GDC="$(GDC)"; export GDC; \
+ 	AR="$(AR)"; export AR; \
+ 	AS="$(AS)"; export AS; \
+ 	CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \
+@@ -280,6 +282,7 @@ BASE_TARGET_EXPORTS = \
+ 	GCJ="$(GCJ_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GCJ; \
+ 	GFORTRAN="$(GFORTRAN_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GFORTRAN; \
+ 	GOC="$(GOC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GOC; \
++	GDC="$(GDC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GDC; \
+ 	DLLTOOL="$(DLLTOOL_FOR_TARGET)"; export DLLTOOL; \
+ 	LD="$(COMPILER_LD_FOR_TARGET)"; export LD; \
+ 	LDFLAGS="$(LDFLAGS_FOR_TARGET)"; export LDFLAGS; \
+@@ -347,6 +350,7 @@ DLLTOOL_FOR_BUILD = @DLLTOOL_FOR_BUILD@
+ GCJ_FOR_BUILD = @GCJ_FOR_BUILD@
+ GFORTRAN_FOR_BUILD = @GFORTRAN_FOR_BUILD@
+ GOC_FOR_BUILD = @GOC_FOR_BUILD@
++GDC_FOR_BUILD = @GDC_FOR_BUILD@
+ LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
+ LD_FOR_BUILD = @LD_FOR_BUILD@
+ NM_FOR_BUILD = @NM_FOR_BUILD@
+@@ -529,6 +533,7 @@ RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @
+ GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@
+ GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@
+ GOC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GOC_FOR_TARGET@
++GDC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GDC_FOR_TARGET@
+ DLLTOOL_FOR_TARGET=@DLLTOOL_FOR_TARGET@
+ LD_FOR_TARGET=@LD_FOR_TARGET@
+ 
+@@ -751,6 +756,7 @@ BASE_FLAGS_TO_PASS = \
+ 	"GFORTRAN_FOR_TARGET=$(GFORTRAN_FOR_TARGET)" \
+ 	"GOC_FOR_TARGET=$(GOC_FOR_TARGET)" \
+ 	"GOCFLAGS_FOR_TARGET=$(GOCFLAGS_FOR_TARGET)" \
++	"GDC_FOR_TARGET=$(GDC_FOR_TARGET)" \
+ 	"LD_FOR_TARGET=$(LD_FOR_TARGET)" \
+ 	"LIPO_FOR_TARGET=$(LIPO_FOR_TARGET)" \
+ 	"LDFLAGS_FOR_TARGET=$(LDFLAGS_FOR_TARGET)" \
+@@ -804,6 +810,7 @@ EXTRA_HOST_FLAGS = \
+ 	'GCJ=$(GCJ)' \
+ 	'GFORTRAN=$(GFORTRAN)' \
+ 	'GOC=$(GOC)' \
++	'GDC=$(GDC)' \
+ 	'LD=$(LD)' \
+ 	'LIPO=$(LIPO)' \
+ 	'NM=$(NM)' \
+@@ -852,6 +859,7 @@ EXTRA_TARGET_FLAGS = \
+ 	'GFORTRAN=$$(GFORTRAN_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'GOC=$$(GOC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'GOCFLAGS=$$(GOCFLAGS_FOR_TARGET)' \
++	'GDC=$$(GDC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'LD=$(COMPILER_LD_FOR_TARGET)' \
+ 	'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \
+ 	'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \
+@@ -954,6 +962,7 @@ configure-target:  \
+     maybe-configure-target-libgfortran \
+     maybe-configure-target-libobjc \
+     maybe-configure-target-libgo \
++    maybe-configure-target-libphobos \
+     maybe-configure-target-libtermcap \
+     maybe-configure-target-winsup \
+     maybe-configure-target-libgloss \
+@@ -1123,6 +1132,7 @@ all-target: maybe-all-target-libquadmath
+ all-target: maybe-all-target-libgfortran
+ all-target: maybe-all-target-libobjc
+ all-target: maybe-all-target-libgo
++all-target: maybe-all-target-libphobos
+ all-target: maybe-all-target-libtermcap
+ all-target: maybe-all-target-winsup
+ all-target: maybe-all-target-libgloss
+@@ -1221,6 +1231,7 @@ info-target: maybe-info-target-libquadma
+ info-target: maybe-info-target-libgfortran
+ info-target: maybe-info-target-libobjc
+ info-target: maybe-info-target-libgo
++info-target: maybe-info-target-libphobos
+ info-target: maybe-info-target-libtermcap
+ info-target: maybe-info-target-winsup
+ info-target: maybe-info-target-libgloss
+@@ -1312,6 +1323,7 @@ dvi-target: maybe-dvi-target-libquadmath
+ dvi-target: maybe-dvi-target-libgfortran
+ dvi-target: maybe-dvi-target-libobjc
+ dvi-target: maybe-dvi-target-libgo
++dvi-target: maybe-dvi-target-libphobos
+ dvi-target: maybe-dvi-target-libtermcap
+ dvi-target: maybe-dvi-target-winsup
+ dvi-target: maybe-dvi-target-libgloss
+@@ -1403,6 +1415,7 @@ pdf-target: maybe-pdf-target-libquadmath
+ pdf-target: maybe-pdf-target-libgfortran
+ pdf-target: maybe-pdf-target-libobjc
+ pdf-target: maybe-pdf-target-libgo
++pdf-target: maybe-pdf-target-libphobos
+ pdf-target: maybe-pdf-target-libtermcap
+ pdf-target: maybe-pdf-target-winsup
+ pdf-target: maybe-pdf-target-libgloss
+@@ -1494,6 +1507,7 @@ html-target: maybe-html-target-libquadma
+ html-target: maybe-html-target-libgfortran
+ html-target: maybe-html-target-libobjc
+ html-target: maybe-html-target-libgo
++html-target: maybe-html-target-libphobos
+ html-target: maybe-html-target-libtermcap
+ html-target: maybe-html-target-winsup
+ html-target: maybe-html-target-libgloss
+@@ -1585,6 +1599,7 @@ TAGS-target: maybe-TAGS-target-libquadma
+ TAGS-target: maybe-TAGS-target-libgfortran
+ TAGS-target: maybe-TAGS-target-libobjc
+ TAGS-target: maybe-TAGS-target-libgo
++TAGS-target: maybe-TAGS-target-libphobos
+ TAGS-target: maybe-TAGS-target-libtermcap
+ TAGS-target: maybe-TAGS-target-winsup
+ TAGS-target: maybe-TAGS-target-libgloss
+@@ -1676,6 +1691,7 @@ install-info-target: maybe-install-info-
+ install-info-target: maybe-install-info-target-libgfortran
+ install-info-target: maybe-install-info-target-libobjc
+ install-info-target: maybe-install-info-target-libgo
++install-info-target: maybe-install-info-target-libphobos
+ install-info-target: maybe-install-info-target-libtermcap
+ install-info-target: maybe-install-info-target-winsup
+ install-info-target: maybe-install-info-target-libgloss
+@@ -1767,6 +1783,7 @@ install-pdf-target: maybe-install-pdf-ta
+ install-pdf-target: maybe-install-pdf-target-libgfortran
+ install-pdf-target: maybe-install-pdf-target-libobjc
+ install-pdf-target: maybe-install-pdf-target-libgo
++install-pdf-target: maybe-install-pdf-target-libphobos
+ install-pdf-target: maybe-install-pdf-target-libtermcap
+ install-pdf-target: maybe-install-pdf-target-winsup
+ install-pdf-target: maybe-install-pdf-target-libgloss
+@@ -1858,6 +1875,7 @@ install-html-target: maybe-install-html-
+ install-html-target: maybe-install-html-target-libgfortran
+ install-html-target: maybe-install-html-target-libobjc
+ install-html-target: maybe-install-html-target-libgo
++install-html-target: maybe-install-html-target-libphobos
+ install-html-target: maybe-install-html-target-libtermcap
+ install-html-target: maybe-install-html-target-winsup
+ install-html-target: maybe-install-html-target-libgloss
+@@ -1949,6 +1967,7 @@ installcheck-target: maybe-installcheck-
+ installcheck-target: maybe-installcheck-target-libgfortran
+ installcheck-target: maybe-installcheck-target-libobjc
+ installcheck-target: maybe-installcheck-target-libgo
++installcheck-target: maybe-installcheck-target-libphobos
+ installcheck-target: maybe-installcheck-target-libtermcap
+ installcheck-target: maybe-installcheck-target-winsup
+ installcheck-target: maybe-installcheck-target-libgloss
+@@ -2040,6 +2059,7 @@ mostlyclean-target: maybe-mostlyclean-ta
+ mostlyclean-target: maybe-mostlyclean-target-libgfortran
+ mostlyclean-target: maybe-mostlyclean-target-libobjc
+ mostlyclean-target: maybe-mostlyclean-target-libgo
++mostlyclean-target: maybe-mostlyclean-target-libphobos
+ mostlyclean-target: maybe-mostlyclean-target-libtermcap
+ mostlyclean-target: maybe-mostlyclean-target-winsup
+ mostlyclean-target: maybe-mostlyclean-target-libgloss
+@@ -2131,6 +2151,7 @@ clean-target: maybe-clean-target-libquad
+ clean-target: maybe-clean-target-libgfortran
+ clean-target: maybe-clean-target-libobjc
+ clean-target: maybe-clean-target-libgo
++clean-target: maybe-clean-target-libphobos
+ clean-target: maybe-clean-target-libtermcap
+ clean-target: maybe-clean-target-winsup
+ clean-target: maybe-clean-target-libgloss
+@@ -2222,6 +2243,7 @@ distclean-target: maybe-distclean-target
+ distclean-target: maybe-distclean-target-libgfortran
+ distclean-target: maybe-distclean-target-libobjc
+ distclean-target: maybe-distclean-target-libgo
++distclean-target: maybe-distclean-target-libphobos
+ distclean-target: maybe-distclean-target-libtermcap
+ distclean-target: maybe-distclean-target-winsup
+ distclean-target: maybe-distclean-target-libgloss
+@@ -2313,6 +2335,7 @@ maintainer-clean-target: maybe-maintaine
+ maintainer-clean-target: maybe-maintainer-clean-target-libgfortran
+ maintainer-clean-target: maybe-maintainer-clean-target-libobjc
+ maintainer-clean-target: maybe-maintainer-clean-target-libgo
++maintainer-clean-target: maybe-maintainer-clean-target-libphobos
+ maintainer-clean-target: maybe-maintainer-clean-target-libtermcap
+ maintainer-clean-target: maybe-maintainer-clean-target-winsup
+ maintainer-clean-target: maybe-maintainer-clean-target-libgloss
+@@ -2459,6 +2482,7 @@ check-target:  \
+     maybe-check-target-libgfortran \
+     maybe-check-target-libobjc \
+     maybe-check-target-libgo \
++    maybe-check-target-libphobos \
+     maybe-check-target-libtermcap \
+     maybe-check-target-winsup \
+     maybe-check-target-libgloss \
+@@ -2637,6 +2661,7 @@ install-target:  \
+     maybe-install-target-libgfortran \
+     maybe-install-target-libobjc \
+     maybe-install-target-libgo \
++    maybe-install-target-libphobos \
+     maybe-install-target-libtermcap \
+     maybe-install-target-winsup \
+     maybe-install-target-libgloss \
+@@ -2748,6 +2773,7 @@ install-strip-target:  \
+     maybe-install-strip-target-libgfortran \
+     maybe-install-strip-target-libobjc \
+     maybe-install-strip-target-libgo \
++    maybe-install-strip-target-libphobos \
+     maybe-install-strip-target-libtermcap \
+     maybe-install-strip-target-winsup \
+     maybe-install-strip-target-libgloss \
+@@ -41295,6 +41321,464 @@ maintainer-clean-target-libgo:
+ 
+ 
+ 
++.PHONY: configure-target-libphobos maybe-configure-target-libphobos
++maybe-configure-target-libphobos:
++@if gcc-bootstrap
++configure-target-libphobos: stage_current
++@endif gcc-bootstrap
++@if target-libphobos
++maybe-configure-target-libphobos: configure-target-libphobos
++configure-target-libphobos: 
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	echo "Checking multilib configuration for libphobos..."; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libphobos/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libphobos/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libphobos/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libphobos/Makefile; \
++	    mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libphobos/Makefile || exit 0; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	echo Configuring in $(TARGET_SUBDIR)/libphobos; \
++	cd "$(TARGET_SUBDIR)/libphobos" || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libphobos/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libphobos; \
++	rm -f no-such-file || : ; \
++	CONFIG_SITE=no-such-file $(SHELL) \
++	  $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias}  \
++	  || exit 1
++@endif target-libphobos
++
++
++
++
++
++.PHONY: all-target-libphobos maybe-all-target-libphobos
++maybe-all-target-libphobos:
++@if gcc-bootstrap
++all-target-libphobos: stage_current
++@endif gcc-bootstrap
++@if target-libphobos
++TARGET-target-libphobos=all
++maybe-all-target-libphobos: all-target-libphobos
++all-target-libphobos: configure-target-libphobos
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS)   \
++		$(TARGET-target-libphobos))
++@endif target-libphobos
++
++
++
++
++
++.PHONY: check-target-libphobos maybe-check-target-libphobos
++maybe-check-target-libphobos:
++@if target-libphobos
++maybe-check-target-libphobos: check-target-libphobos
++
++check-target-libphobos:
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)   check)
++
++@endif target-libphobos
++
++.PHONY: install-target-libphobos maybe-install-target-libphobos
++maybe-install-target-libphobos:
++@if target-libphobos
++maybe-install-target-libphobos: install-target-libphobos
++
++install-target-libphobos: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install)
++
++@endif target-libphobos
++
++.PHONY: install-strip-target-libphobos maybe-install-strip-target-libphobos
++maybe-install-strip-target-libphobos:
++@if target-libphobos
++maybe-install-strip-target-libphobos: install-strip-target-libphobos
++
++install-strip-target-libphobos: installdirs
++	@: $(MAKE); $(unstage)
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(TARGET_FLAGS_TO_PASS)  install-strip)
++
++@endif target-libphobos
++
++# Other targets (info, dvi, pdf, etc.)
++
++.PHONY: maybe-info-target-libphobos info-target-libphobos
++maybe-info-target-libphobos:
++@if target-libphobos
++maybe-info-target-libphobos: info-target-libphobos
++
++info-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing info in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           info) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-dvi-target-libphobos dvi-target-libphobos
++maybe-dvi-target-libphobos:
++@if target-libphobos
++maybe-dvi-target-libphobos: dvi-target-libphobos
++
++dvi-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing dvi in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           dvi) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-pdf-target-libphobos pdf-target-libphobos
++maybe-pdf-target-libphobos:
++@if target-libphobos
++maybe-pdf-target-libphobos: pdf-target-libphobos
++
++pdf-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing pdf in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           pdf) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-html-target-libphobos html-target-libphobos
++maybe-html-target-libphobos:
++@if target-libphobos
++maybe-html-target-libphobos: html-target-libphobos
++
++html-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing html in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           html) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-TAGS-target-libphobos TAGS-target-libphobos
++maybe-TAGS-target-libphobos:
++@if target-libphobos
++maybe-TAGS-target-libphobos: TAGS-target-libphobos
++
++TAGS-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing TAGS in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           TAGS) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-install-info-target-libphobos install-info-target-libphobos
++maybe-install-info-target-libphobos:
++@if target-libphobos
++maybe-install-info-target-libphobos: install-info-target-libphobos
++
++install-info-target-libphobos: \
++    configure-target-libphobos \
++    info-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-info in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-info) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-install-pdf-target-libphobos install-pdf-target-libphobos
++maybe-install-pdf-target-libphobos:
++@if target-libphobos
++maybe-install-pdf-target-libphobos: install-pdf-target-libphobos
++
++install-pdf-target-libphobos: \
++    configure-target-libphobos \
++    pdf-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-pdf in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-pdf) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-install-html-target-libphobos install-html-target-libphobos
++maybe-install-html-target-libphobos:
++@if target-libphobos
++maybe-install-html-target-libphobos: install-html-target-libphobos
++
++install-html-target-libphobos: \
++    configure-target-libphobos \
++    html-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing install-html in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           install-html) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-installcheck-target-libphobos installcheck-target-libphobos
++maybe-installcheck-target-libphobos:
++@if target-libphobos
++maybe-installcheck-target-libphobos: installcheck-target-libphobos
++
++installcheck-target-libphobos: \
++    configure-target-libphobos 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing installcheck in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           installcheck) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-mostlyclean-target-libphobos mostlyclean-target-libphobos
++maybe-mostlyclean-target-libphobos:
++@if target-libphobos
++maybe-mostlyclean-target-libphobos: mostlyclean-target-libphobos
++
++mostlyclean-target-libphobos: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing mostlyclean in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           mostlyclean) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-clean-target-libphobos clean-target-libphobos
++maybe-clean-target-libphobos:
++@if target-libphobos
++maybe-clean-target-libphobos: clean-target-libphobos
++
++clean-target-libphobos: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing clean in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           clean) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-distclean-target-libphobos distclean-target-libphobos
++maybe-distclean-target-libphobos:
++@if target-libphobos
++maybe-distclean-target-libphobos: distclean-target-libphobos
++
++distclean-target-libphobos: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing distclean in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           distclean) \
++	  || exit 1
++
++@endif target-libphobos
++
++.PHONY: maybe-maintainer-clean-target-libphobos maintainer-clean-target-libphobos
++maybe-maintainer-clean-target-libphobos:
++@if target-libphobos
++maybe-maintainer-clean-target-libphobos: maintainer-clean-target-libphobos
++
++maintainer-clean-target-libphobos: 
++	@: $(MAKE); $(unstage)
++	@[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(NORMAL_TARGET_EXPORTS) \
++	echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libphobos" ; \
++	for flag in $(EXTRA_TARGET_FLAGS); do \
++	  eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \
++	done; \
++	(cd $(TARGET_SUBDIR)/libphobos && \
++	  $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \
++	          "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \
++	          "RANLIB=$${RANLIB}" \
++	          "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \
++	           maintainer-clean) \
++	  || exit 1
++
++@endif target-libphobos
++
++
++
++
++
+ .PHONY: configure-target-libtermcap maybe-configure-target-libtermcap
+ maybe-configure-target-libtermcap:
+ @if gcc-bootstrap
+@@ -48714,6 +49198,14 @@ check-gcc-go:
+ 	(cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-go);
+ check-go: check-gcc-go check-target-libgo
+ 
++.PHONY: check-gcc-d check-d
++check-gcc-d:
++	r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	$(HOST_EXPORTS) \
++	(cd gcc && $(MAKE) $(GCC_FLAGS_TO_PASS) check-d);
++check-d: check-gcc-d check-target-libphobos
++
+ 
+ # The gcc part of install-no-fixedincludes, which relies on an intimate
+ # knowledge of how a number of gcc internal targets (inter)operate.  Delegate.
+@@ -50850,6 +51342,7 @@ configure-target-libquadmath: stage_last
+ configure-target-libgfortran: stage_last
+ configure-target-libobjc: stage_last
+ configure-target-libgo: stage_last
++configure-target-libphobos: stage_last
+ configure-target-libtermcap: stage_last
+ configure-target-winsup: stage_last
+ configure-target-libgloss: stage_last
+@@ -50888,6 +51381,7 @@ configure-target-libquadmath: maybe-all-
+ configure-target-libgfortran: maybe-all-gcc
+ configure-target-libobjc: maybe-all-gcc
+ configure-target-libgo: maybe-all-gcc
++configure-target-libphobos: maybe-all-gcc
+ configure-target-libtermcap: maybe-all-gcc
+ configure-target-winsup: maybe-all-gcc
+ configure-target-libgloss: maybe-all-gcc
+@@ -51693,6 +52187,8 @@ configure-target-libgo: maybe-all-target
+ all-target-libgo: maybe-all-target-libbacktrace
+ all-target-libgo: maybe-all-target-libffi
+ all-target-libgo: maybe-all-target-libatomic
++configure-target-libphobos: maybe-configure-target-zlib
++all-target-libphobos: maybe-all-target-zlib
+ configure-target-libjava: maybe-configure-target-zlib
+ configure-target-libjava: maybe-configure-target-boehm-gc
+ configure-target-libjava: maybe-configure-target-libffi
+@@ -51810,6 +52306,7 @@ configure-target-libquadmath: maybe-all-
+ configure-target-libgfortran: maybe-all-target-libgcc
+ configure-target-libobjc: maybe-all-target-libgcc
+ configure-target-libgo: maybe-all-target-libgcc
++configure-target-libphobos: maybe-all-target-libgcc
+ configure-target-libtermcap: maybe-all-target-libgcc
+ configure-target-winsup: maybe-all-target-libgcc
+ configure-target-libgloss: maybe-all-target-libgcc
+@@ -51857,6 +52354,8 @@ configure-target-libobjc: maybe-all-targ
+ 
+ configure-target-libgo: maybe-all-target-newlib maybe-all-target-libgloss
+ 
++configure-target-libphobos: maybe-all-target-newlib maybe-all-target-libgloss
++
+ configure-target-libtermcap: maybe-all-target-newlib maybe-all-target-libgloss
+ 
+ configure-target-winsup: maybe-all-target-newlib maybe-all-target-libgloss
+Index: b/src/Makefile.tpl
+===================================================================
+--- a/src/Makefile.tpl
++++ b/src/Makefile.tpl
+@@ -160,6 +160,7 @@ BUILD_EXPORTS = \
+ 	GFORTRAN="$(GFORTRAN_FOR_BUILD)"; export GFORTRAN; \
+ 	GOC="$(GOC_FOR_BUILD)"; export GOC; \
+ 	GOCFLAGS="$(GOCFLAGS_FOR_BUILD)"; export GOCFLAGS; \
++	GDC="$(GDC_FOR_BUILD)"; export GDC; \
+ 	DLLTOOL="$(DLLTOOL_FOR_BUILD)"; export DLLTOOL; \
+ 	LD="$(LD_FOR_BUILD)"; export LD; \
+ 	LDFLAGS="$(LDFLAGS_FOR_BUILD)"; export LDFLAGS; \
+@@ -197,6 +198,7 @@ HOST_EXPORTS = \
+ 	GCJ="$(GCJ)"; export GCJ; \
+ 	GFORTRAN="$(GFORTRAN)"; export GFORTRAN; \
+ 	GOC="$(GOC)"; export GOC; \
++	GDC="$(GDC)"; export GDC; \
+ 	AR="$(AR)"; export AR; \
+ 	AS="$(AS)"; export AS; \
+ 	CC_FOR_BUILD="$(CC_FOR_BUILD)"; export CC_FOR_BUILD; \
+@@ -283,6 +285,7 @@ BASE_TARGET_EXPORTS = \
+ 	GCJ="$(GCJ_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GCJ; \
+ 	GFORTRAN="$(GFORTRAN_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GFORTRAN; \
+ 	GOC="$(GOC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GOC; \
++	GDC="$(GDC_FOR_TARGET) $(XGCC_FLAGS_FOR_TARGET) $$TFLAGS"; export GDC; \
+ 	DLLTOOL="$(DLLTOOL_FOR_TARGET)"; export DLLTOOL; \
+ 	LD="$(COMPILER_LD_FOR_TARGET)"; export LD; \
+ 	LDFLAGS="$(LDFLAGS_FOR_TARGET)"; export LDFLAGS; \
+@@ -350,6 +353,7 @@ DLLTOOL_FOR_BUILD = @DLLTOOL_FOR_BUILD@
+ GCJ_FOR_BUILD = @GCJ_FOR_BUILD@
+ GFORTRAN_FOR_BUILD = @GFORTRAN_FOR_BUILD@
+ GOC_FOR_BUILD = @GOC_FOR_BUILD@
++GDC_FOR_BUILD = @GDC_FOR_BUILD@
+ LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@
+ LD_FOR_BUILD = @LD_FOR_BUILD@
+ NM_FOR_BUILD = @NM_FOR_BUILD@
+@@ -482,6 +486,7 @@ RAW_CXX_FOR_TARGET=$(STAGE_CC_WRAPPER) @
+ GCJ_FOR_TARGET=$(STAGE_CC_WRAPPER) @GCJ_FOR_TARGET@
+ GFORTRAN_FOR_TARGET=$(STAGE_CC_WRAPPER) @GFORTRAN_FOR_TARGET@
+ GOC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GOC_FOR_TARGET@
++GDC_FOR_TARGET=$(STAGE_CC_WRAPPER) @GDC_FOR_TARGET@
+ DLLTOOL_FOR_TARGET=@DLLTOOL_FOR_TARGET@
+ LD_FOR_TARGET=@LD_FOR_TARGET@
+ 
+@@ -605,6 +610,7 @@ EXTRA_HOST_FLAGS = \
+ 	'GCJ=$(GCJ)' \
+ 	'GFORTRAN=$(GFORTRAN)' \
+ 	'GOC=$(GOC)' \
++	'GDC=$(GDC)' \
+ 	'LD=$(LD)' \
+ 	'LIPO=$(LIPO)' \
+ 	'NM=$(NM)' \
+@@ -653,6 +659,7 @@ EXTRA_TARGET_FLAGS = \
+ 	'GFORTRAN=$$(GFORTRAN_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'GOC=$$(GOC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'GOCFLAGS=$$(GOCFLAGS_FOR_TARGET)' \
++	'GDC=$$(GDC_FOR_TARGET) $$(XGCC_FLAGS_FOR_TARGET) $$(TFLAGS)' \
+ 	'LD=$(COMPILER_LD_FOR_TARGET)' \
+ 	'LDFLAGS=$$(LDFLAGS_FOR_TARGET)' \
+ 	'LIBCFLAGS=$$(LIBCFLAGS_FOR_TARGET)' \
--- gcc-5-5.4.0.orig/debian/patches/gdc-multiarch.diff
+++ gcc-5-5.4.0/debian/patches/gdc-multiarch.diff
@@ -0,0 +1,17 @@
+# DP: Set the D target include directory to a multiarch location.
+
+--- a/src/gcc/d/Make-lang.in
++++ b/src/gcc/d/Make-lang.in
+@@ -61,7 +61,11 @@
+ 	$(D_DMD_H)
+ 
+ 
+-gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical)
++ifneq (,$(MULTIARCH_DIRNAME))
++  gcc_d_target_include_dir = /usr/include/$(MULTIARCH_DIRNAME)/d/$(version)
++else
++  gcc_d_target_include_dir=$(gcc_d_include_dir)/$(target_noncanonical)
++endif
+ 
+ # Name of phobos library
+ D_LIBPHOBOS = -DLIBPHOBOS=\"gphobos2\"
--- gcc-5-5.4.0.orig/debian/patches/gdc-profiledbuild.diff
+++ gcc-5-5.4.0/debian/patches/gdc-profiledbuild.diff
@@ -0,0 +1,19 @@
+# DP: Don't build gdc build tools idgen and impcnvgen with profiling flags
+
+--- a/src/gcc/d/Make-lang.in
++++ b/src/gcc/d/Make-lang.in
+@@ -97,6 +97,14 @@
+ d/impcvgen: d/impcnvgen.dmdgen.o
+ 	+$(LINKER_FOR_BUILD) $(BUILD_LINKER_FLAGS) $(BUILD_LDFLAGS) -o $@ $^
+ 
++d/idgen.dmdgen.o: d/dfrontend/idgen.c
++	$(filter-out -fprofile-%,$(DMD_COMPILE)) $(D_INCLUDES) $<
++	$(POSTCOMPILE)
++
++d/impcnvgen.dmdgen.o: $(srcdir)/d/dfrontend/impcnvgen.c
++	$(filter-out -fprofile-%,$(DMDGEN_COMPILE)) $(D_INCLUDES) $<
++	$(POSTCOMPILE)
++
+ # Generated sources.
+ d/id.c: d/idgen
+ 	cd d && ./idgen
--- gcc-5-5.4.0.orig/debian/patches/gdc-texinfo.diff
+++ gcc-5-5.4.0/debian/patches/gdc-texinfo.diff
@@ -0,0 +1,55 @@
+# DP: Add macros for the gdc texinfo documentation.
+
+Index: b/src/gcc/d/gdc.texi
+===================================================================
+--- a/src/gcc/d/gdc.texi
++++ b/src/gcc/d/gdc.texi
+@@ -43,6 +43,22 @@ man page gfdl(7).
+ @insertcopying
+ @end ifinfo
+ 
++@macro versionsubtitle
++@ifclear DEVELOPMENT
++@subtitle For @sc{gcc} version @value{version-GCC}
++@end ifclear
++@ifset DEVELOPMENT
++@subtitle For @sc{gcc} version @value{version-GCC} (pre-release)
++@end ifset
++@ifset VERSION_PACKAGE
++@sp 1
++@subtitle @value{VERSION_PACKAGE}
++@end ifset
++@c Even if there are no authors, the second titlepage line should be
++@c forced to the bottom of the page.
++@vskip 0pt plus 1filll
++@end macro
++
+ @titlepage
+ @title The GNU D Compiler
+ @versionsubtitle
+@@ -138,6 +154,25 @@ remainder.
+ 
+ @c man end
+ 
++@macro gcctabopt{body}
++@code{\body\}
++@end macro
++@macro gccoptlist{body}
++@smallexample
++\body\
++@end smallexample
++@end macro
++@c Makeinfo handles the above macro OK, TeX needs manual line breaks;
++@c they get lost at some point in handling the macro.  But if @macro is
++@c used here rather than @alias, it produces double line breaks.
++@iftex
++@alias gol = *
++@end iftex
++@ifnottex
++@macro gol
++@end macro
++@end ifnottex
++
+ @c man begin OPTIONS gdc
+ 
+ @table @gcctabopt
--- gcc-5-5.4.0.orig/debian/patches/gdc-updates.diff
+++ gcc-5-5.4.0/debian/patches/gdc-updates.diff
@@ -0,0 +1,2 @@
+# DP: gdc updates up to 2014xxyy.
+
--- gcc-5-5.4.0.orig/debian/patches/gdc-versym-cpu.diff
+++ gcc-5-5.4.0/debian/patches/gdc-versym-cpu.diff
@@ -0,0 +1,382 @@
+# DP: Implements D CPU version conditions.
+
+This implements the following versions:
+* D_HardFloat
+* D_SoftFloat
+
+for all supported architectures. And these where appropriate:
+* ARM
+** ARM_Thumb
+** ARM_HardFloat
+** ARM_SoftFloat
+** ARM_SoftFP
+* AArch64
+* Alpha
+** Alpha_SoftFloat
+** Alpha_HardFloat
+* X86
+* X86_64
+** D_X32
+* IA64
+* MIPS32
+* MIPS64
+** MIPS_O32
+** MIPS_O64
+** MIPS_N32
+** MIPS_N64
+** MIPS_EABI
+** MIPS_HardFloat
+** MIPS_SoftFloat
+* HPPA
+* HPPA64
+* PPC
+* PPC64
+** PPC_HardFloat
+** PPC_SoftFloat
+* S390
+* S390X
+* SH
+* SH64
+* SPARC
+* SPARC64
+* SPARC_V8Plus
+** SPARC_HardFloat
+** SPARC_SoftFloat
+
+Index: b/src/gcc/config/aarch64/aarch64.h
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.h
++++ b/src/gcc/config/aarch64/aarch64.h
+@@ -95,6 +95,14 @@
+ 	builtin_define ("__ARM_FEATURE_CRYPTO");	\
+     } while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()				\
++  do							\
++    {							\
++      builtin_define ("AArch64");			\
++      builtin_define ("D_HardFloat");			\
++    } while (0)
++
+ 
+ 
+ /* Target machine storage layout.  */
+Index: b/src/gcc/config/alpha/alpha.h
+===================================================================
+--- a/src/gcc/config/alpha/alpha.h
++++ b/src/gcc/config/alpha/alpha.h
+@@ -72,6 +72,23 @@ along with GCC; see the file COPYING3.
+ 	SUBTARGET_LANGUAGE_CPP_BUILTINS();		\
+ } while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()				\
++  do							\
++    {							\
++	builtin_define ("Alpha");			\
++	if (TARGET_SOFT_FP)				\
++	  {						\
++	    builtin_define ("D_SoftFloat");		\
++	    builtin_define ("Alpha_SoftFloat");		\
++	  }						\
++	else						\
++	  {						\
++	    builtin_define ("D_HardFloat");		\
++	    builtin_define ("Alpha_HardFloat");		\
++	  }						\
++} while (0)
++
+ #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
+ #define SUBTARGET_LANGUAGE_CPP_BUILTINS()		\
+   do							\
+Index: b/src/gcc/config/arm/arm.h
+===================================================================
+--- a/src/gcc/config/arm/arm.h
++++ b/src/gcc/config/arm/arm.h
+@@ -172,6 +172,31 @@ extern char arm_arch_name[];
+ 	  builtin_define ("__ARM_ASM_SYNTAX_UNIFIED__");\
+     } while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()				\
++  do							\
++    {							\
++	builtin_define ("ARM");				\
++							\
++	if (TARGET_THUMB || TARGET_THUMB2)		\
++	  builtin_define ("ARM_Thumb");			\
++							\
++	if (TARGET_HARD_FLOAT_ABI)			\
++	  builtin_define ("ARM_HardFloat");		\
++	else						\
++	  {						\
++	    if(TARGET_SOFT_FLOAT)			\
++	      builtin_define ("ARM_SoftFloat");		\
++	    else if(TARGET_HARD_FLOAT)			\
++	      builtin_define ("ARM_SoftFP");		\
++	  }						\
++							\
++	if(TARGET_SOFT_FLOAT)				\
++	  builtin_define ("D_SoftFloat");		\
++	else if(TARGET_HARD_FLOAT)			\
++	  builtin_define ("D_HardFloat");		\
++    } while (0)
++
+ #include "config/arm/arm-opts.h"
+ 
+ enum target_cpus
+Index: b/src/gcc/config/i386/i386.h
+===================================================================
+--- a/src/gcc/config/i386/i386.h
++++ b/src/gcc/config/i386/i386.h
+@@ -649,6 +649,24 @@ extern const char *host_detect_local_cpu
+ /* Target CPU builtins.  */
+ #define TARGET_CPU_CPP_BUILTINS() ix86_target_macros ()
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()			\
++  do {						\
++    if (TARGET_64BIT)				\
++    {						\
++      builtin_define("X86_64");			\
++      if (TARGET_X32)				\
++        builtin_define("D_X32");		\
++    }						\
++    else					\
++      builtin_define("X86");			\
++						\
++    if (TARGET_80387)				\
++      builtin_define("D_HardFloat");		\
++    else					\
++      builtin_define("D_SoftFloat");		\
++  } while (0)
++
+ /* Target Pragmas.  */
+ #define REGISTER_TARGET_PRAGMAS() ix86_register_pragmas ()
+ 
+Index: b/src/gcc/config/ia64/ia64.h
+===================================================================
+--- a/src/gcc/config/ia64/ia64.h
++++ b/src/gcc/config/ia64/ia64.h
+@@ -40,6 +40,13 @@ do {						\
+ 	  builtin_define("__BIG_ENDIAN__");	\
+ } while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()			\
++do {						\
++	builtin_define ("IA64");		\
++	builtin_define ("D_HardFloat");		\
++} while (0)
++
+ #ifndef SUBTARGET_EXTRA_SPECS
+ #define SUBTARGET_EXTRA_SPECS
+ #endif
+Index: b/src/gcc/config/mips/mips.h
+===================================================================
+--- a/src/gcc/config/mips/mips.h
++++ b/src/gcc/config/mips/mips.h
+@@ -593,6 +593,54 @@ struct mips_cpu_info {
+     }									\
+   while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()						\
++  do									\
++  {									\
++    if (TARGET_64BIT)							\
++      builtin_define("MIPS64");						\
++    else								\
++      builtin_define("MIPS32");						\
++									\
++    switch (mips_abi)							\
++    {									\
++      case ABI_32:							\
++	builtin_define("MIPS_O32");					\
++	break;								\
++									\
++      case ABI_O64:							\
++	builtin_define("MIPS_O64");					\
++	break;								\
++									\
++      case ABI_N32:							\
++	builtin_define("MIPS_N32");					\
++	break;								\
++									\
++      case ABI_64:							\
++	builtin_define("MIPS_N64");					\
++	break;								\
++									\
++      case ABI_EABI:							\
++	builtin_define("MIPS_EABI");					\
++	break;								\
++									\
++      default:								\
++	gcc_unreachable();						\
++    }									\
++									\
++    if (TARGET_HARD_FLOAT_ABI)						\
++    {									\
++      builtin_define("MIPS_HardFloat");					\
++      builtin_define("D_HardFloat");					\
++    }									\
++    else if (TARGET_SOFT_FLOAT_ABI)					\
++    {									\
++      builtin_define("MIPS_SoftFloat");					\
++      builtin_define("D_SoftFloat");					\
++    }									\
++  }									\
++  while (0)
++
+ /* Default target_flags if no switches are specified  */
+ 
+ #ifndef TARGET_DEFAULT
+Index: b/src/gcc/config/pa/pa.h
+===================================================================
+--- a/src/gcc/config/pa/pa.h
++++ b/src/gcc/config/pa/pa.h
+@@ -185,6 +185,20 @@ do {								\
+        builtin_define("_PA_RISC1_0");				\
+ } while (0)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()					\
++do {								\
++     if(TARGET_64BIT)						\
++       builtin_define("HPPA64");				\
++     else							\
++       builtin_define("HPPA");					\
++								\
++     if(TARGET_SOFT_FLOAT)					\
++       builtin_define ("D_SoftFloat");				\
++     else							\
++       builtin_define ("D_HardFloat");				\
++} while (0)
++
+ /* An old set of OS defines for various BSD-like systems.  */
+ #define TARGET_OS_CPP_BUILTINS()				\
+   do								\
+Index: b/src/gcc/config/rs6000/rs6000.h
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.h
++++ b/src/gcc/config/rs6000/rs6000.h
+@@ -704,6 +704,28 @@ extern unsigned char rs6000_recip_bits[]
+ #define TARGET_CPU_CPP_BUILTINS() \
+   rs6000_cpu_cpp_builtins (pfile)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()			\
++  do						\
++    {						\
++      if (TARGET_64BIT)				\
++	builtin_define ("PPC64");		\
++      else					\
++	builtin_define ("PPC");			\
++						\
++      if (TARGET_HARD_FLOAT)			\
++	{					\
++	  builtin_define ("PPC_HardFloat");	\
++	  builtin_define ("D_HardFloat");	\
++	}					\
++      else if (TARGET_SOFT_FLOAT)		\
++	{					\
++	  builtin_define ("PPC_SoftFloat");	\
++	  builtin_define ("D_SoftFloat");	\
++	}					\
++    }						\
++  while (0)
++
+ /* This is used by rs6000_cpu_cpp_builtins to indicate the byte order
+    we're compiling for.  Some configurations may need to override it.  */
+ #define RS6000_CPU_CPP_ENDIAN_BUILTINS()	\
+Index: b/src/gcc/config/s390/s390.h
+===================================================================
+--- a/src/gcc/config/s390/s390.h
++++ b/src/gcc/config/s390/s390.h
+@@ -113,6 +113,22 @@ enum processor_flags
+ /* Target CPU builtins.  */
+ #define TARGET_CPU_CPP_BUILTINS() s390_cpu_cpp_builtins (pfile)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()				\
++  do							\
++    {							\
++      if (TARGET_64BIT)					\
++        builtin_define ("S390X");			\
++      else						\
++        builtin_define ("S390");			\
++							\
++      if(TARGET_SOFT_FLOAT)				\
++        builtin_define ("D_SoftFloat");			\
++      else if(TARGET_HARD_FLOAT)			\
++        builtin_define ("D_HardFloat");			\
++    }							\
++  while (0)
++
+ #ifdef DEFAULT_TARGET_64BIT
+ #define TARGET_DEFAULT     (MASK_64BIT | MASK_ZARCH | MASK_HARD_DFP	\
+                             | MASK_OPT_HTM | MASK_OPT_VX)
+Index: b/src/gcc/config/sh/sh.h
+===================================================================
+--- a/src/gcc/config/sh/sh.h
++++ b/src/gcc/config/sh/sh.h
+@@ -31,6 +31,22 @@ extern int code_for_indirect_jump_scratc
+ 
+ #define TARGET_CPU_CPP_BUILTINS() sh_cpu_cpp_builtins (pfile)
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()			\
++  do						\
++    {						\
++      if (TARGET_SHMEDIA64)			\
++	builtin_define ("SH64");		\
++      else					\
++	builtin_define ("SH");			\
++						\
++      if (TARGET_FPU_ANY)			\
++	builtin_define ("D_HardFloat");		\
++      else					\
++	builtin_define ("D_SoftFloat");		\
++    }						\
++  while (0)
++
+ /* Value should be nonzero if functions must have frame pointers.
+    Zero means the frame pointer need not be set up (and parms may be accessed
+    via the stack pointer) in functions that seem suitable.  */
+Index: b/src/gcc/config/sparc/sparc.h
+===================================================================
+--- a/src/gcc/config/sparc/sparc.h
++++ b/src/gcc/config/sparc/sparc.h
+@@ -27,6 +27,31 @@ along with GCC; see the file COPYING3.
+ 
+ #define TARGET_CPU_CPP_BUILTINS() sparc_target_macros ()
+ 
++/* Target CPU builtins for D.  */
++#define TARGET_CPU_D_BUILTINS()			\
++do						\
++    {						\
++      if (TARGET_64BIT)				\
++	builtin_define ("SPARC64");		\
++      else					\
++	builtin_define ("SPARC");		\
++						\
++      if(TARGET_V8PLUS)				\
++	builtin_define ("SPARC_V8Plus");	\
++						\
++      if(TARGET_FPU)				\
++	{					\
++	  builtin_define ("D_HardFloat");	\
++	  builtin_define ("SPARC_HardFloat");	\
++	}					\
++      else					\
++	{					\
++	  builtin_define ("D_SoftFloat");	\
++	  builtin_define ("SPARC_SoftFloat");	\
++	}					\
++    }						\
++  while (0)
++
+ /* Specify this in a cover file to provide bi-architecture (32/64) support.  */
+ /* #define SPARC_BI_ARCH */
+ 
--- gcc-5-5.4.0.orig/debian/patches/gdc-versym-os.diff
+++ gcc-5-5.4.0/debian/patches/gdc-versym-os.diff
@@ -0,0 +1,430 @@
+# DP: Implements D OS version conditions.
+
+This implements the following official versions:
+* Windows
+** Win32
+** Win64
+** Cygwin
+** MinGW
+* linux
+* OSX
+* FreeBSD
+* OpenBSD
+* NetBSD
+* Solaris
+* Posix
+* AIX
+* SysV4
+* Hurd
+* Android
+
+These gdc specific versions are also implemented:
+* GNU_MinGW64 (for mingw-w64)
+* GNU_OpenSolaris (for opensolaris)
+* GNU_GLibc (implemented for linux & bsd & opensolaris)
+* GNU_UCLibc (implemented for linux)
+* GNU_Bionic (implemented for linux)
+
+These official OS versions are not implemented:
+* DragonFlyBSD
+* BSD (other BSDs)
+* Haiku
+* SkyOS
+* SysV3
+
+Index: b/src/gcc/config/alpha/linux.h
+===================================================================
+--- a/src/gcc/config/alpha/linux.h
++++ b/src/gcc/config/alpha/linux.h
+@@ -33,6 +33,16 @@ along with GCC; see the file COPYING3.
+ 	  builtin_define ("_GNU_SOURCE");			\
+     } while (0)
+ 
++#undef TARGET_OS_D_BUILTINS 
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++	if (OPTION_GLIBC)					\
++	  builtin_define ("GNU_GLibc");				\
++								\
++	builtin_define ("linux");				\
++	builtin_define ("Posix");				\
++    } while (0)
++
+ #undef LIB_SPEC
+ #define LIB_SPEC \
+   "%{pthread:-lpthread} \
+Index: b/src/gcc/config/arm/linux-eabi.h
+===================================================================
+--- a/src/gcc/config/arm/linux-eabi.h
++++ b/src/gcc/config/arm/linux-eabi.h
+@@ -30,6 +30,15 @@
+     }						\
+   while (false)
+ 
++#undef  TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS() 			\
++  do 						\
++    {						\
++      TARGET_GENERIC_LINUX_OS_D_BUILTINS();	\
++      ANDROID_TARGET_OS_D_BUILTINS();		\
++    }						\
++  while (false)
++
+ /* We default to a soft-float ABI so that binaries can run on all
+    target hardware.  If you override this to use the hard-float ABI then
+    change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well.  */
+Index: b/src/gcc/config/darwin.h
+===================================================================
+--- a/src/gcc/config/darwin.h
++++ b/src/gcc/config/darwin.h
+@@ -924,4 +924,10 @@ extern void darwin_driver_init (unsigned
+    providing an osx-version-min of this unless overridden by the User.  */
+ #define DEF_MIN_OSX_VERSION "10.4"
+ 
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++	builtin_define ("OSX");					\
++	builtin_define ("Posix");				\
++    } while (0)
++
+ #endif /* CONFIG_DARWIN_H */
+Index: b/src/gcc/config/freebsd.h
+===================================================================
+--- a/src/gcc/config/freebsd.h
++++ b/src/gcc/config/freebsd.h
+@@ -32,6 +32,13 @@ along with GCC; see the file COPYING3.
+ #undef  TARGET_OS_CPP_BUILTINS
+ #define TARGET_OS_CPP_BUILTINS() FBSD_TARGET_OS_CPP_BUILTINS()
+ 
++#undef TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++	builtin_define ("FreeBSD");				\
++	builtin_define ("Posix");				\
++    } while (0)
++
+ #undef  CPP_SPEC
+ #define CPP_SPEC FBSD_CPP_SPEC
+ 
+Index: b/src/gcc/config/gnu.h
+===================================================================
+--- a/src/gcc/config/gnu.h
++++ b/src/gcc/config/gnu.h
+@@ -31,3 +31,11 @@ along with GCC.  If not, see <http://www
+ 	builtin_assert ("system=unix");		\
+ 	builtin_assert ("system=posix");	\
+     } while (0)
++
++#undef TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++								\
++	builtin_define ("Hurd");				\
++	builtin_define ("Posix");				\
++    } while (0)
+Index: b/src/gcc/config/i386/cygwin.h
+===================================================================
+--- a/src/gcc/config/i386/cygwin.h
++++ b/src/gcc/config/i386/cygwin.h
+@@ -29,6 +29,13 @@ along with GCC; see the file COPYING3.
+     }								\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++      builtin_define ("Windows");				\
++      builtin_define ("Cygwin");				\
++      builtin_define ("Posix");					\
++    } while (0)
++
+ #undef CPP_SPEC
+ #define CPP_SPEC "%(cpp_cpu) %{posix:-D_POSIX_SOURCE} \
+   %{!ansi:-Dunix} \
+Index: b/src/gcc/config/i386/linux-common.h
+===================================================================
+--- a/src/gcc/config/i386/linux-common.h
++++ b/src/gcc/config/i386/linux-common.h
+@@ -27,6 +27,15 @@ along with GCC; see the file COPYING3.
+     }                                          \
+   while (0)
+ 
++#undef  TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS() 			\
++  do 						\
++    {						\
++      TARGET_GENERIC_LINUX_OS_D_BUILTINS();	\
++      ANDROID_TARGET_OS_D_BUILTINS();		\
++    }						\
++  while (0)
++
+ #undef CC1_SPEC
+ #define CC1_SPEC \
+   LINUX_OR_ANDROID_CC (GNU_USER_TARGET_CC1_SPEC, \
+Index: b/src/gcc/config/i386/mingw-w64.h
+===================================================================
+--- a/src/gcc/config/i386/mingw-w64.h
++++ b/src/gcc/config/i386/mingw-w64.h
+@@ -89,3 +89,10 @@ along with GCC; see the file COPYING3.
+   %{static:-Bstatic} %{!static:-Bdynamic} \
+   %{shared|mdll: " SUB_LINK_ENTRY " --enable-auto-image-base} \
+   %(shared_libgcc_undefs)"
++
++#undef TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++      TARGET_GENERIC_MINGW_OS_D_BUILTINS();			\
++      builtin_define ("GNU_MinGW64");				\
++    } while (0)
+Index: b/src/gcc/config/i386/mingw32.h
+===================================================================
+--- a/src/gcc/config/i386/mingw32.h
++++ b/src/gcc/config/i386/mingw32.h
+@@ -53,6 +53,18 @@ along with GCC; see the file COPYING3.
+     }								\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS() TARGET_GENERIC_MINGW_OS_D_BUILTINS()
++#define TARGET_GENERIC_MINGW_OS_D_BUILTINS()			\
++    do {							\
++      builtin_define ("Windows");				\
++      builtin_define ("MinGW");					\
++								\
++      if (TARGET_64BIT && ix86_abi == MS_ABI)			\
++	  builtin_define ("Win64");				\
++      else if (!TARGET_64BIT)					\
++        builtin_define ("Win32");				\
++    } while (0)
++
+ #ifndef TARGET_USE_PTHREAD_BY_DEFAULT
+ #define SPEC_PTHREAD1 "pthread"
+ #define SPEC_PTHREAD2 "!no-pthread"
+Index: b/src/gcc/config/kfreebsd-gnu.h
+===================================================================
+--- a/src/gcc/config/kfreebsd-gnu.h
++++ b/src/gcc/config/kfreebsd-gnu.h
+@@ -29,6 +29,14 @@ along with GCC; see the file COPYING3.
+     }						\
+   while (0)
+ 
++#undef TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++	builtin_define ("FreeBSD");				\
++	builtin_define ("Posix");				\
++	builtin_define ("GNU_GLibc");				\
++    } while (0)
++
+ #define GNU_USER_DYNAMIC_LINKER        GLIBC_DYNAMIC_LINKER
+ #define GNU_USER_DYNAMIC_LINKER32      GLIBC_DYNAMIC_LINKER32
+ #define GNU_USER_DYNAMIC_LINKER64      GLIBC_DYNAMIC_LINKER64
+Index: b/src/gcc/config/knetbsd-gnu.h
+===================================================================
+--- a/src/gcc/config/knetbsd-gnu.h
++++ b/src/gcc/config/knetbsd-gnu.h
+@@ -30,6 +30,16 @@ along with GCC; see the file COPYING3.
+     }						\
+   while (0)
+ 
++#undef TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()			\
++  do						\
++    {						\
++      builtin_define ("NetBSD");		\
++      builtin_define ("Posix");			\
++      builtin_define ("GNU_GLibc");		\
++    }						\
++  while (0)
++
+ 
+ #undef GNU_USER_DYNAMIC_LINKER
+ #define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
+Index: b/src/gcc/config/kopensolaris-gnu.h
+===================================================================
+--- a/src/gcc/config/kopensolaris-gnu.h
++++ b/src/gcc/config/kopensolaris-gnu.h
+@@ -30,5 +30,15 @@ along with GCC; see the file COPYING3.
+     }						\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS()				\
++  do							\
++    {							\
++	builtin_define ("Solaris");			\
++	builtin_define ("Posix");			\
++	builtin_define ("GNU_OpenSolaris");		\
++	builtin_define ("GNU_GLibc");			\
++    }							\
++  while (0)
++
+ #undef GNU_USER_DYNAMIC_LINKER
+ #define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
+Index: b/src/gcc/config/linux-android.h
+===================================================================
+--- a/src/gcc/config/linux-android.h
++++ b/src/gcc/config/linux-android.h
+@@ -25,6 +25,12 @@
+ 	  builtin_define ("__ANDROID__");			\
+     } while (0)
+ 
++#define ANDROID_TARGET_OS_D_BUILTINS()				\
++    do {							\
++	if (TARGET_ANDROID)					\
++	  builtin_define ("Android");				\
++    } while (0)
++
+ #if ANDROID_DEFAULT
+ # define NOANDROID "mno-android"
+ #else
+Index: b/src/gcc/config/linux.h
+===================================================================
+--- a/src/gcc/config/linux.h
++++ b/src/gcc/config/linux.h
+@@ -49,6 +49,28 @@ see the files COPYING3 and COPYING.RUNTI
+ 	builtin_assert ("system=posix");			\
+     } while (0)
+ 
++#define TARGET_OS_D_BUILTINS() TARGET_GENERIC_LINUX_OS_D_BUILTINS()
++#define TARGET_GENERIC_LINUX_OS_D_BUILTINS()			\
++    do {							\
++	if (OPTION_GLIBC)					\
++	  {							\
++	    builtin_define ("GNU_GLibc");			\
++	    builtin_define ("CRuntime_Glibc");			\
++	  }							\
++	else if (OPTION_UCLIBC)					\
++	  {							\
++	    builtin_define ("GNU_UCLibc");			\
++	  }							\
++	else if (OPTION_BIONIC)					\
++	  {							\
++	    builtin_define ("GNU_Bionic");			\
++	    builtin_define ("CRuntime_Bionic");			\
++	  }							\
++								\
++	builtin_define ("linux");				\
++	builtin_define ("Posix");				\
++    } while (0)
++
+ /* Determine which dynamic linker to use depending on whether GLIBC or
+    uClibc or Bionic is the default C library and whether
+    -muclibc or -mglibc or -mbionic has been passed to change the default.  */
+Index: b/src/gcc/config/mips/linux-common.h
+===================================================================
+--- a/src/gcc/config/mips/linux-common.h
++++ b/src/gcc/config/mips/linux-common.h
+@@ -27,6 +27,15 @@ along with GCC; see the file COPYING3.
+     ANDROID_TARGET_OS_CPP_BUILTINS();				\
+   } while (0)
+ 
++#undef  TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS() 			\
++  do 						\
++    {						\
++      TARGET_GENERIC_LINUX_OS_D_BUILTINS();	\
++      ANDROID_TARGET_OS_D_BUILTINS();		\
++    }						\
++  while (0)
++
+ #undef  LINK_SPEC
+ #define LINK_SPEC							\
+   LINUX_OR_ANDROID_LD (GNU_USER_TARGET_LINK_SPEC,			\
+Index: b/src/gcc/config/netbsd.h
+===================================================================
+--- a/src/gcc/config/netbsd.h
++++ b/src/gcc/config/netbsd.h
+@@ -29,6 +29,14 @@ along with GCC; see the file COPYING3.
+     }						\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS()			\
++  do						\
++    {						\
++      builtin_define ("NetBSD");		\
++      builtin_define ("Posix");			\
++    }						\
++  while (0)
++
+ /* CPP_SPEC parts common to all NetBSD targets.  */
+ #define NETBSD_CPP_SPEC				\
+   "%{posix:-D_POSIX_SOURCE} \
+Index: b/src/gcc/config/openbsd.h
+===================================================================
+--- a/src/gcc/config/openbsd.h
++++ b/src/gcc/config/openbsd.h
+@@ -84,6 +84,14 @@ along with GCC; see the file COPYING3.
+     }						\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS()			\
++  do						\
++    {						\
++      builtin_define ("OpenBSD");		\
++      builtin_define ("Posix");			\
++    }						\
++  while (0)
++
+ /* TARGET_OS_CPP_BUILTINS() common to all OpenBSD ELF targets.  */
+ #define OPENBSD_OS_CPP_BUILTINS_ELF()		\
+   do						\
+Index: b/src/gcc/config/rs6000/aix.h
+===================================================================
+--- a/src/gcc/config/rs6000/aix.h
++++ b/src/gcc/config/rs6000/aix.h
+@@ -115,6 +115,13 @@
+     }						\
+   while (0)
+ 
++#define TARGET_OS_D_BUILTINS()					\
++    do {							\
++								\
++	builtin_define ("AIX");					\
++	builtin_define ("Posix");				\
++    } while (0)
++
+ /* Define appropriate architecture macros for preprocessor depending on
+    target switches.  */
+ 
+Index: b/src/gcc/config/rs6000/linux.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux.h
++++ b/src/gcc/config/rs6000/linux.h
+@@ -53,6 +53,17 @@
+     }						\
+   while (0)
+ 
++#undef  TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()			\
++  do						\
++    {						\
++      builtin_define ("linux");			\
++      builtin_define ("Posix");			\
++      if (OPTION_GLIBC)				\
++	builtin_define ("GNU_GLibc");		\
++    }						\
++  while (0)
++
+ #undef	CPP_OS_DEFAULT_SPEC
+ #define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux)"
+ 
+Index: b/src/gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h
++++ b/src/gcc/config/rs6000/linux64.h
+@@ -336,6 +336,17 @@ extern int dot_symbols;
+     }							\
+   while (0)
+ 
++#undef  TARGET_OS_D_BUILTINS
++#define TARGET_OS_D_BUILTINS()				\
++  do							\
++    {							\
++      builtin_define ("linux");				\
++      builtin_define ("Posix");				\
++      if (OPTION_GLIBC)					\
++	builtin_define ("GNU_GLibc");			\
++    }							\
++  while (0)
++
+ #undef  CPP_OS_DEFAULT_SPEC
+ #define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux)"
+ 
--- gcc-5-5.4.0.orig/debian/patches/go-testsuite.diff
+++ gcc-5-5.4.0/debian/patches/go-testsuite.diff
@@ -0,0 +1,21 @@
+# DP: Skip Go testcase on AArch64 which hangs on the buildds.
+
+Index: b/src/gcc/testsuite/go.test/go-test.exp
+===================================================================
+--- a/src/gcc/testsuite/go.test/go-test.exp
++++ b/src/gcc/testsuite/go.test/go-test.exp
+@@ -398,6 +398,14 @@ proc go-gc-tests { } {
+ 	    }
+ 	}
+ 
++	# Hangs on the buildds
++	if { [istarget "aarch64*-*-*"] } {
++	    if { [string match "*go.test/test/chan/select5.go" $test] } {
++		untested $test
++		continue
++	    }
++	}
++
+ 	if { [file tail $test] == "init1.go" } {
+ 	    # This tests whether GC runs during init, which for gccgo
+ 	    # it currently does not.
--- gcc-5-5.4.0.orig/debian/patches/go-use-gold.diff
+++ gcc-5-5.4.0/debian/patches/go-use-gold.diff
@@ -0,0 +1,103 @@
+# DP: Pass -fuse-ld=gold to gccgo on targets supporting -fsplit-stack
+
+gcc/go/                                                                                      
+                                                                                             
+        * gospec.c (lang_specific_driver): Pass -fuse-ld=gold on targets                     
+        supporting -fsplit-stack, unless overwritten.                                        
+                                                                                             
+gcc/                                                                                         
+        * configure.ac: New define HAVE_GOLD_NON_DEFAULT.                                    
+        * config.in: Regenerate.                                                             
+                                                                                             
+Index: b/src/gcc/go/gospec.c
+===================================================================
+--- a/src/gcc/go/gospec.c
++++ b/src/gcc/go/gospec.c
+@@ -117,6 +117,10 @@ lang_specific_driver (struct cl_decoded_
+   /* Whether the -S option was used.  */
+   bool saw_opt_S = false;
+ 
++  /* "-fuse-ld=" if it appears on the command line.  */
++  bool saw_use_ld ATTRIBUTE_UNUSED = false;
++  int need_gold = 0;
++
+   /* The first input file with an extension of .go.  */
+   const char *first_go_file = NULL;  
+ 
+@@ -217,6 +221,11 @@ lang_specific_driver (struct cl_decoded_
+ 	    }
+ 
+ 	  break;
++
++	case OPT_fuse_ld_bfd:
++	case OPT_fuse_ld_gold:
++	  saw_use_ld = true;
++	  break;
+ 	}
+     }
+ 
+@@ -226,8 +235,14 @@ lang_specific_driver (struct cl_decoded_
+   shared_libgcc = 0;
+ #endif
+ 
++#if defined(TARGET_CAN_SPLIT_STACK) && defined(HAVE_GOLD_NON_DEFAULT)
++  if (!saw_use_ld)
++    need_gold = 1;
++#endif
++
+   /* Make sure to have room for the trailing NULL argument.  */
+-  num_args = argc + need_math + shared_libgcc + (library > 0) * 5 + 10;
++  num_args = argc + need_math + shared_libgcc + need_gold +
++    (library > 0) * 5 + 10;
+   new_decoded_options = XNEWVEC (struct cl_decoded_option, num_args);
+ 
+   i = 0;
+@@ -244,6 +259,14 @@ lang_specific_driver (struct cl_decoded_
+ 		       &new_decoded_options[j]);
+       j++;
+     }
++#ifdef HAVE_GOLD_NON_DEFAULT
++  if (need_gold)
++    {
++      generate_option (OPT_fuse_ld_gold, NULL, 1, CL_DRIVER,
++		       &new_decoded_options[j]);
++      j++;
++    }
++#endif
+ #endif
+ 
+   /* NOTE: We start at 1 now, not 0.  */
+Index: b/src/gcc/config.in
+===================================================================
+--- a/src/gcc/config.in
++++ b/src/gcc/config.in
+@@ -1289,6 +1289,12 @@
+ #endif
+ 
+ 
++/* Define if the gold linker is available as a non-default */
++#ifndef USED_FOR_TARGET
++#undef HAVE_GOLD_NON_DEFAULT
++#endif
++
++
+ /* Define if you have the iconv() function. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_ICONV
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -2226,6 +2226,12 @@ if test x$gcc_cv_ld != x; then
+ fi
+ AC_MSG_RESULT($ld_is_gold)
+ 
++# Check to see if ld is used, and gold is available
++if test x$ld_is_gold = xno && which ${gcc_cv_ld}.gold >/dev/null 2>&1; then
++  AC_DEFINE(HAVE_GOLD_NON_DEFAULT, 1,
++  	    [Define if the gold linker is available as a non-default])
++fi
++
+ ORIGINAL_LD_FOR_TARGET=$gcc_cv_ld
+ AC_SUBST(ORIGINAL_LD_FOR_TARGET)
+ case "$ORIGINAL_LD_FOR_TARGET" in
--- gcc-5-5.4.0.orig/debian/patches/gotools-configury.diff
+++ gcc-5-5.4.0/debian/patches/gotools-configury.diff
@@ -0,0 +1,45 @@
+# DP: Fix gotools cross build.
+
+	* Makefile.am: Use GOC configured in configure.ac for cross builds.
+	* configure.ac: Fix NATIVE conditional.
+	* Makefile.in, configure: Regenerate.
+
+Index: b/src/gotools/Makefile.am
+===================================================================
+--- a/src/gotools/Makefile.am
++++ b/src/gotools/Makefile.am
+@@ -33,7 +33,7 @@ if NATIVE
+ # Use the compiler we just built.
+ GOCOMPILER = $(GOC_FOR_TARGET)
+ else
+-GOCOMPILER = $(GOC)
++GOCOMPILER = @GOC@
+ endif
+ 
+ GOCFLAGS = $(CFLAGS_FOR_TARGET)
+Index: b/src/gotools/Makefile.in
+===================================================================
+--- a/src/gotools/Makefile.in
++++ b/src/gotools/Makefile.in
+@@ -226,7 +226,7 @@ PWD_COMMAND = $${PWDCMD-pwd}
+ STAMP = echo timestamp >
+ libgodir = ../$(target_noncanonical)/libgo
+ LIBGODEP = $(libgodir)/libgo.la
+-@NATIVE_FALSE@GOCOMPILER = $(GOC)
++@NATIVE_FALSE@GOCOMPILER = @GOC@
+ 
+ # Use the compiler we just built.
+ @NATIVE_TRUE@GOCOMPILER = $(GOC_FOR_TARGET)
+Index: b/src/gotools/configure.ac
+===================================================================
+--- a/src/gotools/configure.ac
++++ b/src/gotools/configure.ac
+@@ -46,7 +46,7 @@ AC_PROG_INSTALL
+ AC_PROG_CC
+ AC_PROG_GO
+ 
+-AM_CONDITIONAL(NATIVE, test "$cross_compiling" = no)
++AM_CONDITIONAL(NATIVE, test "$host" = "$target")
+ 
+ dnl Test for -lsocket and -lnsl.  Copied from libjava/configure.ac.
+ AC_CACHE_CHECK([for socket libraries], gotools_cv_lib_sockets,
--- gcc-5-5.4.0.orig/debian/patches/hurd-boehm-gc.diff
+++ gcc-5-5.4.0/debian/patches/hurd-boehm-gc.diff
@@ -0,0 +1,26 @@
+Index: b/src/boehm-gc/configure.host
+===================================================================
+--- a/src/boehm-gc/configure.host
++++ b/src/boehm-gc/configure.host
+@@ -41,7 +41,7 @@ else
+ fi
+ 
+ case "${host}" in
+-  *-linux*|*-kfreebsd*-gnu*)
++  *-linux*|*-kfreebsd*-gnu*|*-gnu*)
+     gc_use_mmap=yes
+     ;;
+ esac
+Index: b/src/boehm-gc/include/private/gcconfig.h
+===================================================================
+--- a/src/boehm-gc/include/private/gcconfig.h
++++ b/src/boehm-gc/include/private/gcconfig.h
+@@ -2132,7 +2132,7 @@
+ #   endif
+ # endif
+ 
+-#if defined(LINUX) && defined(USE_MMAP)
++#if (defined(LINUX) || defined(HURD)) && defined(USE_MMAP)
+     /* The kernel may do a somewhat better job merging mappings etc.	*/
+     /* with anonymous mappings.						*/
+ #   define USE_MMAP_ANON
--- gcc-5-5.4.0.orig/debian/patches/hurd-changes.diff
+++ gcc-5-5.4.0/debian/patches/hurd-changes.diff
@@ -0,0 +1,20 @@
+# DP: Traditional GNU systems don't have a /usr directory.  However, Debian
+# DP: systems do, and we support both having a /usr -> . symlink, and having a
+# DP: /usr directory like the other ports.  So this patch should NOT go
+# DP: upstream.
+
+---
+ config.gcc |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/src/gcc/config.gcc	(r�vision 182461)
++++ b/src/gcc/config.gcc	(copie de travail)
+@@ -583,7 +583,7 @@
+     *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu | *-*-kopensolaris*-gnu)
+       :;;
+     *-*-gnu*)
+-      native_system_header_dir=/include
++      # native_system_header_dir=/include
+       ;;
+   esac
+   # glibc / uclibc / bionic switch.
--- gcc-5-5.4.0.orig/debian/patches/hurd-gprof.diff
+++ gcc-5-5.4.0/debian/patches/hurd-gprof.diff
@@ -0,0 +1,47 @@
+From svn trunk r234535
+
+2016-03-29  Thomas Schwinge  <thomas@codesourcery.com>
+
+[Hurd] Specs maintenance
+
+	* config/gnu.h (CPP_SPEC, LIB_SPEC): Don't override.
+	* config/i386/gnu.h (STARTFILE_SPEC): Use gcrt1.o instead of
+	gcrt0.o if linking dynamically.
+
+Index: a/src/gcc/config/i386/gnu.h
+===================================================================
+--- a/src/gcc/config/i386/gnu.h	(révision 234534)
++++ b/src/gcc/config/i386/gnu.h	(révision 234535)
+@@ -27,11 +27,11 @@
+ #undef	STARTFILE_SPEC
+ #if defined HAVE_LD_PIE
+ #define STARTFILE_SPEC \
+-  "%{!shared: %{pg|p|profile:gcrt0.o%s;pie:Scrt1.o%s;static:crt0.o%s;:crt1.o%s}} \
++  "%{!shared: %{pg|p|profile:%{static:gcrt0.o%s;:gcrt1.o%s};pie:Scrt1.o%s;static:crt0.o%s;:crt1.o%s}} \
+    crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+ #else
+ #define STARTFILE_SPEC \
+-  "%{!shared: %{pg|p|profile:gcrt0.o%s;static:crt0.o%s;:crt1.o%s}} \
++  "%{!shared: %{pg|p|profile:%{static:gcrt0.o%s;:gcrt1.o%s};static:crt0.o%s;:crt1.o%s}} \
+    crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}"
+ #endif
+ 
+Index: a/src/gcc/config/gnu.h
+===================================================================
+--- a/src/gcc/config/gnu.h	(révision 234534)
++++ b/src/gcc/config/gnu.h	(révision 234535)
+@@ -19,14 +19,6 @@
+ along with GCC.  If not, see <http://www.gnu.org/licenses/>.
+ */
+ 
+-/* Provide GCC options for standard feature-test macros.  */
+-#undef CPP_SPEC
+-#define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
+-
+-/* Default C library spec.  */
+-#undef LIB_SPEC
+-#define LIB_SPEC "%{pthread:-lpthread} %{pg|p|profile:-lc_p;:-lc}"
+-
+ #undef GNU_USER_TARGET_OS_CPP_BUILTINS
+ #define GNU_USER_TARGET_OS_CPP_BUILTINS()		\
+     do {					\
--- gcc-5-5.4.0.orig/debian/patches/ibm-branch.diff
+++ gcc-5-5.4.0/debian/patches/ibm-branch.diff
@@ -0,0 +1,15457 @@
+# DP: updates from the ibm/5 branch upto 20160526 (r236756).
+
+svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-5-branch@236741 svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-5-branch \
+	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
+	| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'
+
+Index: libgcc/config.host
+===================================================================
+--- a/src/libgcc/config.host	(.../gcc-5-branch)
++++ b/src/libgcc/config.host	(.../ibm/gcc-5-branch)
+@@ -1018,6 +1018,7 @@
+ 	;;
+ powerpc*-*-linux*)
+ 	tmake_file="${tmake_file} rs6000/t-ppccomm rs6000/t-savresfgpr rs6000/t-crtstuff rs6000/t-linux t-dfprules rs6000/t-ppc64-fp t-slibgcc-libgcc"
++	tmake_file="${tmake_file} t-stack rs6000/t-stack-rs6000"
+ 	case $ppc_fp_type in
+ 	64)
+ 		;;
+@@ -1038,6 +1039,15 @@
+ 		exit 1
+ 		;;
+ 	esac
++
++	if test $libgcc_cv_powerpc_float128 = yes; then
++		tmake_file="${tmake_file} rs6000/t-float128"
++	fi
++
++	if test $libgcc_cv_powerpc_float128_hw = yes; then
++		tmake_file="${tmake_file} rs6000/t-float128-hw"
++	fi
++
+ 	extra_parts="$extra_parts ecrti.o ecrtn.o ncrti.o ncrtn.o"
+ 	md_unwind_header=rs6000/linux-unwind.h
+ 	;;
+Index: libgcc/generic-morestack.c
+===================================================================
+--- a/src/libgcc/generic-morestack.c	(.../gcc-5-branch)
++++ b/src/libgcc/generic-morestack.c	(.../ibm/gcc-5-branch)
+@@ -23,6 +23,9 @@
+ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ <http://www.gnu.org/licenses/>.  */
+ 
++/* powerpc 32-bit not supported.  */
++#if !defined __powerpc__ || defined __powerpc64__
++
+ #include "tconfig.h"
+ #include "tsystem.h"
+ #include "coretypes.h"
+@@ -935,6 +938,7 @@
+       nsp -= 12 * sizeof (void *);
+ #elif defined (__i386__)
+       nsp -= 6 * sizeof (void *);
++#elif defined __powerpc64__
+ #else
+ #error "unrecognized target"
+ #endif
+@@ -1170,3 +1174,4 @@
+ }
+ 
+ #endif /* !defined (inhibit_libc) */
++#endif /* not powerpc 32-bit */
+Index: libgcc/configure.ac
+===================================================================
+--- a/src/libgcc/configure.ac	(.../gcc-5-branch)
++++ b/src/libgcc/configure.ac	(.../ibm/gcc-5-branch)
+@@ -423,6 +423,41 @@
+ ;;
+ esac
+ 
++case ${host} in
++# At present, we cannot turn -mfloat128 on via #pragma GCC target,
++# so just check if we have VSX (ISA 2.06) support to build the
++# software libraries, and whether the assembler can handle xsaddqp
++# for hardware support.
++powerpc*-*-linux*)
++  AC_CACHE_CHECK([for PowerPC ISA 2.06 to build __float128 libraries],
++		 [libgcc_cv_powerpc_float128],
++		 [AC_COMPILE_IFELSE(
++    [#pragma GCC target ("vsx")
++     vector double dadd (vector double a, vector double b) { return a + b; }],
++    [libgcc_cv_powerpc_float128=yes],
++    [libgcc_cv_powerpc_float128=no])])
++
++  AC_CACHE_CHECK([for PowerPC ISA 3.0 to build hardware __float128 libraries],
++		 [libgcc_cv_powerpc_float128_hw],
++		 [AC_COMPILE_IFELSE(
++    [#pragma GCC target ("vsx,power9-vector")
++     #include <sys/auxv.h>
++     #ifndef AT_PLATFORM
++     #error "AT_PLATFORM is not defined"
++     #endif
++     vector unsigned char (vector unsigned char a, vector unsigned char b)
++     {
++       vector unsigned char ret;
++       __asm__ ("xsaddqp %0,%1,%2" : "=v" (ret) : "v" (a), "v" (b));
++       return ret;
++     }
++     void *add_resolver (void) { return (void *) add; }
++     __float128 add_ifunc (__float128, __float128)
++	__attribute__ ((__ifunc__ ("add_resolver")));],
++    [libgcc_cv_powerpc_float128_hw=yes],
++    [libgcc_cv_powerpc_float128_hw=no])])
++esac
++
+ # Collect host-machine-specific information.
+ . ${srcdir}/config.host
+ 
+Index: libgcc/config/rs6000/float128-sed-hw
+===================================================================
+--- a/src/libgcc/config/rs6000/float128-sed-hw	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/float128-sed-hw	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,25 @@
++s/__addtf3/__addkf3_sw/g
++s/__divtf3/__divkf3_sw/g
++s/__eqtf2/__eqkf2_sw/g
++s/__extenddftf2/__extenddfkf2_sw/g
++s/__extendsftf2/__extendsfkf2_sw/g
++s/__fixtfdi/__fixkfdi_sw/g
++s/__fixtfsi/__fixkfsi_sw/g
++s/__fixunstfdi/__fixunskfdi_sw/g
++s/__fixunstfsi/__fixunskfsi_sw/g
++s/__floatditf/__floatdikf_sw/g
++s/__floatsitf/__floatsikf_sw/g
++s/__floatunditf/__floatundikf_sw/g
++s/__floatunsitf/__floatunsikf_sw/g
++s/__getf2/__gekf2_sw/g
++s/__gttf2/__gtkf2_sw/g
++s/__letf2/__lekf2_sw/g
++s/__lttf2/__ltkf2_sw/g
++s/__multf3/__mulkf3_sw/g
++s/__negtf2/__negkf2_sw/g
++s/__netf2/__nekf2_sw/g
++s/quad[.]h/quad-float128.h/g
++s/__subtf3/__subkf3_sw/g
++s/__trunctfdf2/__trunckfdf2_sw/g
++s/__trunctfsf2/__trunckfsf2_sw/g
++s/__unordtf2/__unordkf2_sw/g
+Index: libgcc/config/rs6000/sfp-exceptions.c
+===================================================================
+--- a/src/libgcc/config/rs6000/sfp-exceptions.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/sfp-exceptions.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,72 @@
++/* Copyright (C) 2016 Free Software Foundation, Inc.
++
++   This file is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published by the
++   Free Software Foundation; either version 3, or (at your option) any
++   later version.
++
++   This file is distributed in the hope that it will be useful, but
++   WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   General Public License for more details.
++
++   Under Section 7 of GPL version 3, you are granted additional
++   permissions described in the GCC Runtime Library Exception, version
++   3.1, as published by the Free Software Foundation.
++
++   You should have received a copy of the GNU General Public License and
++   a copy of the GCC Runtime Library Exception along with this program;
++   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include "sfp-machine.h"
++
++/* Only provide exception support if we have hardware floating point and we can
++   execute the mtfsf instruction.  This would only be true if we are using the
++   emulation routines for IEEE 128-bit floating point on pre-ISA 3.0 machines
++   without the IEEE 128-bit floating point support.  */
++
++#ifndef __NO_FPRS__ 
++
++void
++__sfp_handle_exceptions (int _fex)
++{
++  const double fp_max = __DBL_MAX__;
++  const double fp_min = __DBL_MIN__;
++  const double fp_zero = (double) 0.0;
++  const double fp_one = 1.0;
++  double tmp;
++
++  if (_fex & FP_EX_INVALID)
++    {
++      __asm__ __volatile__ ("fdiv %0, %1, %1"
++			    : "=f" (tmp)
++			    : "f" (fp_zero));
++    }
++  if (_fex & FP_EX_DIVZERO)
++    {
++      __asm__ __volatile__ ("fdiv %0, %1, %2"
++			    : "=f" (tmp)
++			    : "f" (fp_one), "f" (fp_zero));
++    }
++  if (_fex & FP_EX_OVERFLOW)
++    {
++      __asm__ __volatile__ ("fadd %0, %1, %1"
++			    : "=f" (tmp)
++			    : "f" (fp_max));
++    }
++  if (_fex & FP_EX_UNDERFLOW)
++    {
++      __asm__ __volatile__ ("fmul %0, %1, %1"
++			    : "=f" (tmp)
++			    : "f" (fp_min));
++    }
++  if (_fex & FP_EX_INEXACT)
++    {
++      __asm__ __volatile__ ("fsub %0, %1, %2"
++			    : "=f" (tmp)
++			    : "f" (fp_max), "f" (fp_one));
++    }
++}
++
++#endif	/* !__NO_FPRS__   */
+Index: libgcc/config/rs6000/float128-hw.c
+===================================================================
+--- a/src/libgcc/config/rs6000/float128-hw.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/float128-hw.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,207 @@
++/* Automatic switching between software and hardware IEEE 128-bit
++   floating-point emulation for PowerPC.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++	Richard Henderson (rth@cygnus.com) and
++	Jakub Jelinek (jj@ultra.linux.cz).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <soft-fp.h>
++#include <quad-float128.h>
++
++#ifndef __FLOAT128_HARDWARE__
++#error "This module must be compiled with IEEE 128-bit hardware support"
++#endif
++
++TFtype
++__addkf3_hw (TFtype a, TFtype b)
++{
++  return a + b;
++}
++
++TFtype
++__subkf3_hw (TFtype a, TFtype b)
++{
++  return a - b;
++}
++
++TFtype
++__mulkf3_hw (TFtype a, TFtype b)
++{
++  return a * b;
++}
++
++TFtype
++__divkf3_hw (TFtype a, TFtype b)
++{
++  return a / b;
++}
++
++TFtype
++__negkf2_hw (TFtype a)
++{
++  return -a;
++}
++
++TFtype
++__floatsikf_hw (SItype_ppc a)
++{
++  return (TFtype) a;
++}
++
++TFtype
++__floatunsikf_hw (USItype_ppc a)
++{
++  return (TFtype) a;
++}
++
++TFtype
++__floatdikf_hw (DItype_ppc a)
++{
++  return (TFtype) a;
++}
++
++TFtype
++__floatundikf_hw (UDItype_ppc a)
++{
++  return (TFtype) a;
++}
++
++SItype_ppc
++__fixkfsi_hw (TFtype a)
++{
++  return (SItype_ppc) a;
++}
++
++USItype_ppc
++__fixunskfsi_hw (TFtype a)
++{
++  return (USItype_ppc) a;
++}
++
++DItype_ppc
++__fixkfdi_hw (TFtype a)
++{
++  return (DItype_ppc) a;
++}
++
++UDItype_ppc
++__fixunskfdi_hw (TFtype a)
++{
++  return (UDItype_ppc) a;
++}
++
++TFtype
++__extendsfkf2_hw (float a)
++{
++  return (TFtype) a;
++}
++
++TFtype
++__extenddfkf2_hw (double a)
++{
++  return (TFtype) a;
++}
++
++float
++__trunckfsf2_hw (TFtype a)
++{
++  return (float) a;
++}
++
++double
++__trunckfdf2_hw (TFtype a)
++{
++  return (double) a;
++}
++
++/* __eqkf2 returns 0 if equal, or 1 if not equal or NaN.  */
++CMPtype
++__eqkf2_hw (TFtype a, TFtype b)
++{
++  return (a != b);
++}
++
++/* __gekf2 returns -1 if a < b, 0 if a == b, +1 if a > b, or -2 if NaN.  */
++CMPtype
++__gekf2_hw (TFtype a, TFtype b)
++{
++  if (a < b)
++    return -1;
++
++  else if (__builtin_isunordered (a, b))
++    return -2;
++
++  else if (a == b)
++    return 0;
++
++  return 1;
++}
++
++/* __lekf2 returns -1 if a < b, 0 if a == b, +1 if a > b, or +2 if NaN.  */
++CMPtype
++__lekf2_hw (TFtype a, TFtype b)
++{
++  if (a < b)
++    return -1;
++
++  else if (__builtin_isunordered (a, b))
++    return 2;
++
++  else if (a == b)
++    return 0;
++
++  return 1;
++}
++
++/* __unordkf2 returns 1 if NaN or 0 otherwise.  */
++CMPtype
++__unordkf2_hw (TFtype a, TFtype b)
++{
++  return (__builtin_isunordered (a, b)) ? 1 : 0;
++}
++
++/* Convert __float128 to __ibm128.  */
++IBM128_TYPE
++__extendkftf2_hw (TFtype value)
++{
++  IBM128_TYPE ret;
++
++  CVT_FLOAT128_TO_IBM128 (ret, value);
++  return ret;
++}
++
++/* Convert __ibm128 to __float128.  */
++TFtype
++__trunctfkf2_hw (IBM128_TYPE value)
++{
++  TFtype ret;
++
++  CVT_IBM128_TO_FLOAT128 (ret, value);
++  return ret;
++}
+Index: libgcc/config/rs6000/floattikf.c
+===================================================================
+--- a/src/libgcc/config/rs6000/floattikf.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/floattikf.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,51 @@
++/* Software floating-point emulation, convert a 128bit signed integer to IEEE
++   quad.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++   	   Uros Bizjak (ubizjak@gmail.com).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifdef _ARCH_PPC64
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++TFtype
++__floattikf (TItype i)
++{
++  FP_DECL_EX;
++  FP_DECL_Q (A);
++  TFtype a;
++
++  FP_INIT_ROUNDMODE;
++  FP_FROM_INT_Q (A, i, TI_BITS, UTItype);
++  FP_PACK_RAW_Q (a, A);
++  FP_HANDLE_EXCEPTIONS;
++
++  return a;
++}
++#endif
+Index: libgcc/config/rs6000/sfp-machine.h
+===================================================================
+--- a/src/libgcc/config/rs6000/sfp-machine.h	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/sfp-machine.h	(.../ibm/gcc-5-branch)
+@@ -1,7 +1,26 @@
++/* Decide whether to use 64 or 32-bit types to do the emulation.  If we are
++   doing IEEE-128 with VSX, use 64-bit emulation even if we are compiling for a
++   32-bit target.  */
++
++#if defined(_ARCH_PPC64) || defined(__VSX__) || defined(__FLOAT128__)
++#define _FP_W_TYPE_SIZE		64
++#define _FP_W_TYPE		unsigned long long
++#define _FP_WS_TYPE		signed long long
++#define _FP_I_TYPE		long long
++
++#ifdef _ARCH_PPC64
++typedef int TItype __attribute__ ((mode (TI)));
++typedef unsigned int UTItype __attribute__ ((mode (TI)));
++
++#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype))
++#endif
++
++#else	/* 32-bits  */
+ #define _FP_W_TYPE_SIZE		32
+-#define _FP_W_TYPE		unsigned long
+-#define _FP_WS_TYPE		signed long
+-#define _FP_I_TYPE		long
++#define _FP_W_TYPE		unsigned int
++#define _FP_WS_TYPE		signed int
++#define _FP_I_TYPE		int
++#endif	/* 32-bits  */
+ 
+ /* The type of the result of a floating point comparison.  This must
+    match `__libgcc_cmp_return__' in GCC for the target.  */
+@@ -10,18 +29,39 @@
+ 
+ #define _FP_MUL_MEAT_S(R,X,Y)				\
+   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
++
++#if (_FP_W_TYPE_SIZE==64)
+ #define _FP_MUL_MEAT_D(R,X,Y)				\
++  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
++#define _FP_MUL_MEAT_Q(R,X,Y)				\
++  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
++#else
++#define _FP_MUL_MEAT_D(R,X,Y)				\
+   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+ #define _FP_MUL_MEAT_Q(R,X,Y)				\
+   _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
++#endif
+ 
+ #define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
++
++#if (_FP_W_TYPE_SIZE==64)
++#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_1_udiv(D,R,X,Y)
++#define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
++#else
+ #define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+ #define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
++#endif
+ 
+ #define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
++
++#if (_FP_W_TYPE_SIZE==64)
++#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1)
++#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1
++#else
+ #define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+ #define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
++#endif
++
+ #define _FP_NANSIGN_S		0
+ #define _FP_NANSIGN_D		0
+ #define _FP_NANSIGN_Q		0
+@@ -64,7 +104,59 @@
+ # endif
+ #endif
+ 
++/* Only provide exception support if we have hardware floating point using
++   floating point registers and we can execute the mtfsf instruction.  This
++   would only be true if we are using the emulation routines for IEEE 128-bit
++   floating point on pre-ISA 3.0 machines without the IEEE 128-bit floating
++   point support.  */
+ 
++#ifndef ___NO_FPRS__
++#define ISA_BIT(x) (1LL << (63 - x))
++
++/* Use the same bits of the FPSCR.  */
++# define FP_EX_INVALID		ISA_BIT(34)
++# define FP_EX_OVERFLOW		ISA_BIT(35)
++# define FP_EX_UNDERFLOW	ISA_BIT(36)
++# define FP_EX_DIVZERO		ISA_BIT(37)
++# define FP_EX_INEXACT		ISA_BIT(38)
++# define FP_EX_ALL		(FP_EX_INVALID | FP_EX_OVERFLOW 	\
++				 | FP_EX_UNDERFLOW | FP_EX_DIVZERO	\
++				 | FP_EX_INEXACT)
++
++void __sfp_handle_exceptions (int);
++
++# define FP_HANDLE_EXCEPTIONS			\
++  do {						\
++    if (__builtin_expect (_fex, 0))		\
++      __sfp_handle_exceptions (_fex);		\
++  } while (0);
++
++/* The FP_EX_* bits track whether the exception has occurred.  This macro
++   must set the FP_EX_* bits of those exceptions which are configured to
++   trap.  The FPSCR bit which indicates this is 22 ISA bits above the
++   respective FP_EX_* bit.  Note, the ISA labels bits from msb to lsb,
++   so 22 ISA bits above is 22 bits below when counted from the lsb.  */
++# define FP_TRAPPING_EXCEPTIONS ((_fpscr.i << 22) & FP_EX_ALL)
++  
++# define FP_RND_NEAREST	0x0
++# define FP_RND_ZERO	0x1
++# define FP_RND_PINF	0x2
++# define FP_RND_MINF	0x3
++# define FP_RND_MASK	0x3
++
++# define _FP_DECL_EX \
++  union { unsigned long long i; double d; } _fpscr __attribute__ ((unused)) = \
++        { .i = FP_RND_NEAREST }
++ 
++#define FP_INIT_ROUNDMODE			\
++  do {						\
++    __asm__ __volatile__ ("mffs %0"		\
++			  : "=f" (_fpscr.d));	\
++  } while (0)
++
++# define FP_ROUNDMODE	(_fpscr.i & FP_RND_MASK)
++#endif	/* !__NO_FPRS__ */
++
+ /* Define ALIASNAME as a strong alias for NAME.  */
+ # define strong_alias(name, aliasname) _strong_alias(name, aliasname)
+ # define _strong_alias(name, aliasname) \
+Index: libgcc/config/rs6000/morestack.S
+===================================================================
+--- a/src/libgcc/config/rs6000/morestack.S	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/morestack.S	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,351 @@
++#ifdef __powerpc64__
++# PowerPC64 support for -fsplit-stack.
++# Copyright (C) 2009-2015 Free Software Foundation, Inc.
++# Contributed by Alan Modra <amodra@gmail.com>.
++
++# This file is part of GCC.
++
++# GCC is free software; you can redistribute it and/or modify it under
++# the terms of the GNU General Public License as published by the Free
++# Software Foundation; either version 3, or (at your option) any later
++# version.
++
++# GCC is distributed in the hope that it will be useful, but WITHOUT ANY
++# WARRANTY; without even the implied warranty of MERCHANTABILITY or
++# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++# for more details.
++
++# Under Section 7 of GPL version 3, you are granted additional
++# permissions described in the GCC Runtime Library Exception, version
++# 3.1, as published by the Free Software Foundation.
++
++# You should have received a copy of the GNU General Public License and
++# a copy of the GCC Runtime Library Exception along with this program;
++# see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++# <http://www.gnu.org/licenses/>.
++
++#if _CALL_ELF == 2
++	.abiversion 2
++#define PARAMS 32
++#else
++	.abiversion 1
++#define PARAMS 48
++#endif
++#define MORESTACK_FRAMESIZE	(PARAMS+96)
++#define PARAMREG_SAVE		-MORESTACK_FRAMESIZE+PARAMS+0
++#define STATIC_CHAIN_SAVE	-MORESTACK_FRAMESIZE+PARAMS+64
++#define R29_SAVE		-MORESTACK_FRAMESIZE+PARAMS+72
++#define LINKREG_SAVE		-MORESTACK_FRAMESIZE+PARAMS+80
++#define NEWSTACKSIZE_SAVE	-MORESTACK_FRAMESIZE+PARAMS+88
++
++# Excess space needed to call ld.so resolver for lazy plt
++# resolution.  Go uses sigaltstack so this doesn't need to
++# also cover signal frame size.
++#define BACKOFF 4096
++# Large excess allocated when calling non-split-stack code.
++#define NON_SPLIT_STACK 0x100000
++
++
++#if _CALL_ELF == 2
++
++#define BODY_LABEL(name) name
++
++#define ENTRY0(name)					\
++	.global name;					\
++	.hidden	name;					\
++	.type name,@function;				\
++name##:
++
++#define ENTRY(name)					\
++	ENTRY0(name);					\
++0:	addis %r2,%r12,.TOC.-0b@ha;			\
++        addi %r2,%r2,.TOC.-0b@l;			\
++	.localentry name, .-name
++
++#else
++
++#define BODY_LABEL(name) .L.##name
++
++#define ENTRY0(name)					\
++	.global name;					\
++	.hidden	name;					\
++	.type name,@function;				\
++	.pushsection ".opd","aw";			\
++	.p2align 3;					\
++name##: .quad BODY_LABEL (name), .TOC.@tocbase, 0;	\
++	.popsection;					\
++BODY_LABEL(name)##:
++
++#define ENTRY(name) ENTRY0(name)
++
++#endif
++
++#define SIZE(name) .size name, .-BODY_LABEL(name)
++
++
++	.text
++# Just like __morestack, but with larger excess allocation
++ENTRY0(__morestack_non_split)
++.LFB1:
++	.cfi_startproc
++# We use a cleanup to restore the tcbhead_t.__private_ss if
++# an exception is thrown through this code.
++#ifdef __PIC__
++	.cfi_personality 0x9b,DW.ref.__gcc_personality_v0
++	.cfi_lsda 0x1b,.LLSDA1
++#else
++	.cfi_personality 0x3,__gcc_personality_v0
++	.cfi_lsda 0x3,.LLSDA1
++#endif
++# LR is already saved by the split-stack prologue code.
++# We may as well have the unwinder skip over the call in the
++# prologue too.
++	.cfi_offset %lr,16
++
++	addis %r12,%r12,-NON_SPLIT_STACK@h
++	SIZE (__morestack_non_split)
++# Fall through into __morestack
++
++
++# This function is called with non-standard calling conventions.
++# On entry, r12 is the requested stack pointer.  One version of the
++# split-stack prologue that calls __morestack looks like
++#	ld %r0,-0x7000-64(%r13)
++#	addis %r12,%r1,-allocate@ha
++#	addi %r12,%r12,-allocate@l
++#	cmpld %r12,%r0
++#	bge+ enough
++#	mflr %r0
++#	std %r0,16(%r1)
++#	bl __morestack
++#	ld %r0,16(%r1)
++#	mtlr %r0
++#	blr
++# enough:
++# The normal function prologue follows here, with a small addition at
++# the end to set up the arg pointer.  The arg pointer is set up with:
++#	addi %r12,%r1,offset
++#	bge %cr7,.+8
++#	mr %r12,%r29
++#
++# Note that the lr save slot 16(%r1) has already been used.
++# r3 thru r11 possibly contain arguments and a static chain
++# pointer for the function we're calling, so must be preserved.
++# cr7 must also be preserved.
++
++ENTRY0(__morestack)
++# Save parameter passing registers, our arguments, lr, r29
++# and use r29 as a frame pointer.
++	std %r3,PARAMREG_SAVE+0(%r1)
++	sub %r3,%r1,%r12		# calculate requested stack size
++	mflr %r12
++	std %r4,PARAMREG_SAVE+8(%r1)
++	std %r5,PARAMREG_SAVE+16(%r1)
++	std %r6,PARAMREG_SAVE+24(%r1)
++	std %r7,PARAMREG_SAVE+32(%r1)
++	addi %r3,%r3,BACKOFF
++	std %r8,PARAMREG_SAVE+40(%r1)
++	std %r9,PARAMREG_SAVE+48(%r1)
++	std %r10,PARAMREG_SAVE+56(%r1)
++	std %r11,STATIC_CHAIN_SAVE(%r1)
++	std %r29,R29_SAVE(%r1)
++	std %r12,LINKREG_SAVE(%r1)
++	std %r3,NEWSTACKSIZE_SAVE(%r1)	# new stack size
++	mr %r29,%r1
++	.cfi_offset %r29,R29_SAVE
++	.cfi_def_cfa_register %r29
++	stdu %r1,-MORESTACK_FRAMESIZE(%r1)
++
++	# void __morestack_block_signals (void)
++	bl __morestack_block_signals
++
++	# void *__generic_morestack (size_t *pframe_size,
++	#			     void *old_stack,
++	#			     size_t param_size)
++	addi %r3,%r29,NEWSTACKSIZE_SAVE
++	mr %r4,%r29
++	li %r5,0			# no copying from old stack
++	bl __generic_morestack
++
++# Start using new stack
++	stdu %r29,-32(%r3)		# back-chain
++	mr %r1,%r3
++
++# Set __private_ss stack guard for the new stack.
++	ld %r12,NEWSTACKSIZE_SAVE(%r29)	# modified size
++	addi %r3,%r3,BACKOFF-32
++	sub %r3,%r3,%r12
++# Note that a signal frame has $pc pointing at the instruction
++# where the signal occurred.  For something like a timer
++# interrupt this means the instruction has already executed,
++# thus the region starts at the instruction modifying
++# __private_ss, not one instruction after.
++.LEHB0:
++	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
++
++	# void __morestack_unblock_signals (void)
++	bl __morestack_unblock_signals
++
++# Set up for a call to the target function, located 3
++# instructions after __morestack's return address.
++#
++	ld %r12,LINKREG_SAVE(%r29)
++	ld %r3,PARAMREG_SAVE+0(%r29)	# restore arg regs
++	ld %r4,PARAMREG_SAVE+8(%r29)
++	ld %r5,PARAMREG_SAVE+16(%r29)
++	ld %r6,PARAMREG_SAVE+24(%r29)
++	ld %r7,PARAMREG_SAVE+32(%r29)
++	ld %r8,PARAMREG_SAVE+40(%r29)
++	ld %r9,PARAMREG_SAVE+48(%r29)
++	addi %r0,%r12,12		# add 3 instructions
++	ld %r10,PARAMREG_SAVE+56(%r29)
++	ld %r11,STATIC_CHAIN_SAVE(%r29)
++	cmpld %cr7,%r12,%r0		# indicate we were called
++	mtctr %r0
++	bctrl				# call caller!
++
++# On return, save regs possibly used to return a value, and
++# possibly trashed by calls to __morestack_block_signals,
++# __generic_releasestack and __morestack_unblock_signals.
++# Assume those calls don't use vector or floating point regs.
++	std %r3,PARAMREG_SAVE+0(%r29)
++	std %r4,PARAMREG_SAVE+8(%r29)
++	std %r5,PARAMREG_SAVE+16(%r29)
++	std %r6,PARAMREG_SAVE+24(%r29)
++#if _CALL_ELF == 2
++	std %r7,PARAMREG_SAVE+32(%r29)
++	std %r8,PARAMREG_SAVE+40(%r29)
++	std %r9,PARAMREG_SAVE+48(%r29)
++	std %r10,PARAMREG_SAVE+56(%r29)
++#endif
++
++	bl __morestack_block_signals
++
++	# void *__generic_releasestack (size_t *pavailable)
++	addi %r3,%r29,NEWSTACKSIZE_SAVE
++	bl __generic_releasestack
++
++# Reset __private_ss stack guard to value for old stack
++	ld %r12,NEWSTACKSIZE_SAVE(%r29)
++	addi %r3,%r3,BACKOFF
++	sub %r3,%r3,%r12
++.LEHE0:
++	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
++
++	bl __morestack_unblock_signals
++
++# Use old stack again.
++	mr %r1,%r29
++
++# Restore return value regs, and return.
++	ld %r0,LINKREG_SAVE(%r29)
++	mtlr %r0
++	ld %r3,PARAMREG_SAVE+0(%r29)
++	ld %r4,PARAMREG_SAVE+8(%r29)
++	ld %r5,PARAMREG_SAVE+16(%r29)
++	ld %r6,PARAMREG_SAVE+24(%r29)
++#if _CALL_ELF == 2
++	ld %r7,PARAMREG_SAVE+32(%r29)
++	ld %r8,PARAMREG_SAVE+40(%r29)
++	ld %r9,PARAMREG_SAVE+48(%r29)
++	ld %r10,PARAMREG_SAVE+56(%r29)
++#endif
++	ld %r29,R29_SAVE(%r29)
++	.cfi_def_cfa_register %r1
++	blr
++
++# This is the cleanup code called by the stack unwinder when
++# unwinding through code between .LEHB0 and .LEHE0 above.
++cleanup:
++	.cfi_def_cfa_register %r29
++	std %r3,PARAMREG_SAVE(%r29)	# Save exception header
++	# size_t __generic_findstack (void *stack)
++	mr %r3,%r29
++	bl __generic_findstack
++	sub %r3,%r29,%r3
++	addi %r3,%r3,BACKOFF
++	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
++	ld %r3,PARAMREG_SAVE(%r29)
++	bl _Unwind_Resume
++	nop
++	.cfi_endproc
++	SIZE (__morestack)
++
++
++	.section .gcc_except_table,"a",@progbits
++	.p2align 2
++.LLSDA1:
++	.byte	0xff	# @LPStart format (omit)
++	.byte	0xff	# @TType format (omit)
++	.byte	0x1	# call-site format (uleb128)
++	.uleb128 .LLSDACSE1-.LLSDACSB1	# Call-site table length
++.LLSDACSB1:
++	.uleb128 .LEHB0-.LFB1	# region 0 start
++	.uleb128 .LEHE0-.LEHB0	# length
++	.uleb128 cleanup-.LFB1	# landing pad
++	.uleb128 0		# no action, ie. a cleanup
++.LLSDACSE1:
++
++
++#ifdef __PIC__
++# Build a position independent reference to the personality function.
++	.hidden DW.ref.__gcc_personality_v0
++	.weak DW.ref.__gcc_personality_v0
++	.section .data.DW.ref.__gcc_personality_v0,"awG",@progbits,DW.ref.__gcc_personality_v0,comdat
++	.p2align 3
++DW.ref.__gcc_personality_v0:
++	.quad __gcc_personality_v0
++	.type DW.ref.__gcc_personality_v0, @object
++	.size DW.ref.__gcc_personality_v0, 8
++#endif
++
++
++	.text
++# Initialize the stack guard when the program starts or when a
++# new thread starts.  This is called from a constructor.
++# void __stack_split_initialize (void)
++ENTRY(__stack_split_initialize)
++	addi %r3,%r1,-0x4000		# We should have at least 16K.
++	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
++	# void __generic_morestack_set_initial_sp (void *sp, size_t len)
++	mr %r3,%r1
++	li %r4, 0x4000
++	b __generic_morestack_set_initial_sp
++	SIZE (__stack_split_initialize)
++
++
++# Return current __private_ss
++# void *__morestack_get_guard (void)
++ENTRY0(__morestack_get_guard)
++	ld %r3,-0x7000-64(%r13)		# tcbhead_t.__private_ss
++	blr
++	SIZE (__morestack_get_guard)
++
++
++# Set __private_ss
++# void __morestack_set_guard (void *ptr)
++ENTRY0(__morestack_set_guard)
++	std %r3,-0x7000-64(%r13)	# tcbhead_t.__private_ss
++	blr
++	SIZE (__morestack_set_guard)
++
++
++# Return the stack guard value for given stack
++# void *__morestack_make_guard (void *stack, size_t size)
++ENTRY0(__morestack_make_guard)
++	sub %r3,%r3,%r4
++	addi %r3,%r3,BACKOFF
++	blr
++	SIZE (__morestack_make_guard)
++
++
++# Make __stack_split_initialize a high priority constructor.
++	.section .ctors.65535,"aw",@progbits
++	.p2align 3
++	.quad __stack_split_initialize
++	.quad __morestack_load_mmap
++
++	.section .note.GNU-stack,"",@progbits
++	.section .note.GNU-split-stack,"",@progbits
++	.section .note.GNU-no-split-stack,"",@progbits
++#endif /* __powerpc64__ */
+Index: libgcc/config/rs6000/t-stack-rs6000
+===================================================================
+--- a/src/libgcc/config/rs6000/t-stack-rs6000	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/t-stack-rs6000	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,2 @@
++# Makefile fragment to support -fsplit-stack for powerpc.
++LIB2ADD_ST += $(srcdir)/config/rs6000/morestack.S
+Index: libgcc/config/rs6000/fixunskfti.c
+===================================================================
+--- a/src/libgcc/config/rs6000/fixunskfti.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/fixunskfti.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,51 @@
++/* Software floating-point emulation, convert IEEE quad to 128bit unsigned
++   integer.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++   	   Uros Bizjak (ubizjak@gmail.com).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifdef _ARCH_PPC64
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++UTItype
++__fixunskfti (TFtype a)
++{
++  FP_DECL_EX;
++  FP_DECL_Q (A);
++  UTItype r;
++
++  FP_INIT_EXCEPTIONS;
++  FP_UNPACK_RAW_Q (A, a);
++  FP_TO_INT_Q (r, A, TI_BITS, 0);
++  FP_HANDLE_EXCEPTIONS;
++
++  return r;
++}
++#endif
+Index: libgcc/config/rs6000/float128-ifunc.c
+===================================================================
+--- a/src/libgcc/config/rs6000/float128-ifunc.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/float128-ifunc.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,362 @@
++/* Automatic switching between software and hardware IEEE 128-bit
++   floating-point emulation for PowerPC.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++	Richard Henderson (rth@cygnus.com) and
++	Jakub Jelinek (jj@ultra.linux.cz).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#include <soft-fp.h>
++#include <quad-float128.h>
++#include <string.h>
++#include <stdlib.h>
++#include <ctype.h>
++
++#ifndef FLOAT128_HW_INSNS
++#error "float128-ifunc.c needs access to ISA 3.0 instructions and ifunc"
++#endif
++
++#ifdef __FLOAT128_HARDWARE__
++#error "This module must not be compiled with IEEE 128-bit hardware support"
++#endif
++
++#include <sys/auxv.h>
++
++/* Use the namespace clean version of getauxval.  However, not all versions of
++   sys/auxv.h declare it, so declare it here.  This code is intended to be
++   temporary until a suitable version of __builtin_cpu_supports is added that
++   allows us to tell quickly if the machine supports IEEE 128-bit hardware.  */
++extern unsigned long __getauxval (unsigned long);
++
++static int
++have_ieee_hw_p (void)
++{
++  static int ieee_hw_p = -1;
++
++  if (ieee_hw_p < 0)
++    {
++      char *p = (char *) __getauxval (AT_PLATFORM);
++
++      ieee_hw_p = 0;
++
++      /* Don't use atoi/strtol/strncmp/etc.  These may require the normal
++	 environment to be setup to set errno to 0, and the ifunc resolvers run
++	 before the whole glibc environment is initialized.  */
++      if (p && p[0] == 'p' && p[1] == 'o' && p[2] == 'w' && p[3] == 'e'
++	  && p[4] == 'r')
++	{
++	  long n = 0;
++	  char ch;
++
++	  p += 5;
++	  while ((ch = *p++) >= '0' && (ch <= '9'))
++	    n = (n * 10) + (ch - '0');
++
++	  if (n >= 9)
++	    ieee_hw_p = 1;
++	}
++    }
++
++  return ieee_hw_p;
++}
++
++#define SW_OR_HW(SW, HW) (have_ieee_hw_p () ? HW : SW)
++
++/* Resolvers.  */
++
++/* We do not provide ifunc resolvers for __fixkfti, __fixunskfti, __floattikf,
++   and __floatuntikf.  There is no ISA 3.0 instruction that converts between
++   128-bit integer types and 128-bit IEEE floating point, or vice versa.  So
++   use the emulator functions for these conversions.  */
++
++static void *__addkf3_resolve (void);
++static void *__subkf3_resolve (void);
++static void *__mulkf3_resolve (void);
++static void *__divkf3_resolve (void);
++static void *__negkf2_resolve (void);
++static void *__eqkf2_resolve (void);
++static void *__nekf2_resolve (void);
++static void *__gekf2_resolve (void);
++static void *__gtkf2_resolve (void);
++static void *__lekf2_resolve (void);
++static void *__ltkf2_resolve (void);
++static void *__unordkf2_resolve (void);
++static void *__extendsfkf2_resolve (void);
++static void *__extenddfkf2_resolve (void);
++static void *__trunckfsf2_resolve (void);
++static void *__trunckfdf2_resolve (void);
++static void *__fixkfsi_resolve (void);
++static void *__fixkfdi_resolve (void);
++static void *__fixunskfsi_resolve (void);
++static void *__fixunskfdi_resolve (void);
++static void *__floatsikf_resolve (void);
++static void *__floatdikf_resolve (void);
++static void *__floatunsikf_resolve (void);
++static void *__floatundikf_resolve (void);
++static void *__extendkftf2_resolve (void);
++static void *__trunctfkf2_resolve (void);
++
++static void *
++__addkf3_resolve (void)
++{
++  return (void *) SW_OR_HW (__addkf3_sw, __addkf3_hw);
++}
++
++static void *
++__subkf3_resolve (void)
++{
++  return (void *) SW_OR_HW (__subkf3_sw, __subkf3_hw);
++}
++
++static void *
++__mulkf3_resolve (void)
++{
++  return (void *) SW_OR_HW (__mulkf3_sw, __mulkf3_hw);
++}
++
++static void *
++__divkf3_resolve (void)
++{
++  return (void *) SW_OR_HW (__divkf3_sw, __divkf3_hw);
++}
++
++static void *
++__negkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__negkf2_sw, __negkf2_hw);
++}
++
++static void *
++__floatsikf_resolve (void)
++{
++  return (void *) SW_OR_HW (__floatsikf_sw, __floatsikf_hw);
++}
++
++static void *
++__floatdikf_resolve (void)
++{
++  return (void *) SW_OR_HW (__floatdikf_sw, __floatdikf_hw);
++}
++
++static void *
++__floatunsikf_resolve (void)
++{
++  return (void *) SW_OR_HW (__floatunsikf_sw, __floatunsikf_hw);
++}
++
++static void *
++__floatundikf_resolve (void)
++{
++  return (void *) SW_OR_HW (__floatundikf_sw, __floatundikf_hw);
++}
++
++static void *
++__fixkfsi_resolve (void)
++{
++  return (void *) SW_OR_HW (__fixkfsi_sw, __fixkfsi_hw);
++}
++
++static void *
++__fixkfdi_resolve (void)
++{
++  return (void *) SW_OR_HW (__fixkfdi_sw, __fixkfdi_hw);
++}
++
++static void *
++__fixunskfsi_resolve (void)
++{
++  return (void *) SW_OR_HW (__fixunskfsi_sw, __fixunskfsi_hw);
++}
++
++static void *
++__fixunskfdi_resolve (void)
++{
++  return (void *) SW_OR_HW (__fixunskfdi_sw, __fixunskfdi_hw);
++}
++
++static void *
++__extendsfkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__extendsfkf2_sw, __extendsfkf2_hw);
++}
++
++static void *
++__extenddfkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__extenddfkf2_sw, __extenddfkf2_hw);
++}
++
++static void *
++__trunckfsf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__trunckfsf2_sw, __trunckfsf2_hw);
++}
++
++static void *
++__trunckfdf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__trunckfdf2_sw, __trunckfdf2_hw);
++}
++
++static void *
++__extendkftf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__extendkftf2_sw, __extendkftf2_hw);
++}
++
++static void *
++__trunctfkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__trunctfkf2_sw, __trunctfkf2_hw);
++}
++
++static void *
++__eqkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__eqkf2_sw, __eqkf2_hw);
++}
++
++static void *
++__gekf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__gekf2_sw, __gekf2_hw);
++}
++
++static void *
++__lekf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__lekf2_sw, __lekf2_hw);
++}
++
++static void *
++__unordkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__unordkf2_sw, __unordkf2_hw);
++}
++
++/* Resolve __nekf2, __gtkf2, __ltkf2 like __eqkf2, __gekf2, and __lekf2, since
++   the functions return the same values.  */
++
++static void *
++__nekf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__eqkf2_sw, __eqkf2_hw);
++}
++
++static void *
++__gtkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__gekf2_sw, __gekf2_hw);
++}
++
++static void *
++__ltkf2_resolve (void)
++{
++  return (void *) SW_OR_HW (__lekf2_sw, __lekf2_hw);
++}
++
++
++
++/* Ifunc definitions.  */
++TFtype __addkf3 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__addkf3_resolve")));
++
++TFtype __subkf3 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__subkf3_resolve")));
++
++TFtype __mulkf3 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__mulkf3_resolve")));
++
++TFtype __divkf3 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__divkf3_resolve")));
++
++TFtype __negkf2 (TFtype)
++  __attribute__ ((__ifunc__ ("__negkf2_resolve")));
++
++CMPtype __eqkf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__eqkf2_resolve")));
++
++CMPtype __nekf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__nekf2_resolve")));
++
++CMPtype __gekf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__gekf2_resolve")));
++
++CMPtype __gtkf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__gtkf2_resolve")));
++
++CMPtype __lekf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__lekf2_resolve")));
++
++CMPtype __ltkf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__ltkf2_resolve")));
++
++CMPtype __unordkf2 (TFtype, TFtype)
++  __attribute__ ((__ifunc__ ("__unordkf2_resolve")));
++
++TFtype __extendsfkf2 (float)
++  __attribute__ ((__ifunc__ ("__extendsfkf2_resolve")));
++
++TFtype __extenddfkf2 (double)
++  __attribute__ ((__ifunc__ ("__extenddfkf2_resolve")));
++
++float __trunckfsf2 (TFtype)
++  __attribute__ ((__ifunc__ ("__trunckfsf2_resolve")));
++
++double __trunckfdf2 (TFtype)
++  __attribute__ ((__ifunc__ ("__trunckfdf2_resolve")));
++
++SItype_ppc __fixkfsi (TFtype)
++  __attribute__ ((__ifunc__ ("__fixkfsi_resolve")));
++
++DItype_ppc __fixkfdi (TFtype)
++  __attribute__ ((__ifunc__ ("__fixkfdi_resolve")));
++
++USItype_ppc __fixunskfsi (TFtype)
++  __attribute__ ((__ifunc__ ("__fixunskfsi_resolve")));
++
++UDItype_ppc __fixunskfdi (TFtype)
++  __attribute__ ((__ifunc__ ("__fixunskfdi_resolve")));
++
++TFtype __floatsikf (SItype_ppc)
++  __attribute__ ((__ifunc__ ("__floatsikf_resolve")));
++
++TFtype __floatdikf (DItype_ppc)
++  __attribute__ ((__ifunc__ ("__floatdikf_resolve")));
++
++TFtype __floatunsikf (USItype_ppc)
++  __attribute__ ((__ifunc__ ("__floatunsikf_resolve")));
++
++TFtype __floatundikf (UDItype_ppc)
++  __attribute__ ((__ifunc__ ("__floatundikf_resolve")));
++
++IBM128_TYPE __extendkftf2 (TFtype)
++  __attribute__ ((__ifunc__ ("__extendkftf2_resolve")));
++
++TFtype __trunctfkf2 (IBM128_TYPE)
++  __attribute__ ((__ifunc__ ("__trunctfkf2_resolve")));
+Index: libgcc/config/rs6000/fixkfti.c
+===================================================================
+--- a/src/libgcc/config/rs6000/fixkfti.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/fixkfti.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,51 @@
++/* Software floating-point emulation, convert IEEE quad to 128bit signed
++   integer.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++   	   Uros Bizjak (ubizjak@gmail.com).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifdef _ARCH_PPC64
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++TItype
++__fixkfti (TFtype a)
++{
++  FP_DECL_EX;
++  FP_DECL_Q (A);
++  UTItype r;
++
++  FP_INIT_EXCEPTIONS;
++  FP_UNPACK_RAW_Q (A, a);
++  FP_TO_INT_Q (r, A, TI_BITS, 1);
++  FP_HANDLE_EXCEPTIONS;
++
++  return r;
++}
++#endif
+Index: libgcc/config/rs6000/floatuntikf.c
+===================================================================
+--- a/src/libgcc/config/rs6000/floatuntikf.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/floatuntikf.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,51 @@
++/* Software floating-point emulation, convert a 128bit unsigned integer to IEEE
++   quad.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++   	   Uros Bizjak (ubizjak@gmail.com).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifdef _ARCH_PPC64
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++TFtype
++__floatuntikf (UTItype i)
++{
++  FP_DECL_EX;
++  FP_DECL_Q (A);
++  TFtype a;
++
++  FP_INIT_ROUNDMODE;
++  FP_FROM_INT_Q (A, i, TI_BITS, UTItype);
++  FP_PACK_RAW_Q (a, A);
++  FP_HANDLE_EXCEPTIONS;
++
++  return a;
++}
++#endif
+Index: libgcc/config/rs6000/quad-float128.h
+===================================================================
+--- a/src/libgcc/config/rs6000/quad-float128.h	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/quad-float128.h	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,213 @@
++/* Software floating-point emulation.
++   Definitions for IEEE Quad Precision on the PowerPC.
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++/* quad.h defines the TFtype type by:
++   typedef float TFtype __attribute__ ((mode (TF)));
++
++   This define forces it to use KFmode (aka, ieee 128-bit floating point).  */
++#define TF KF
++
++/* Force the use of the VSX instruction set.  */
++#if defined(_ARCH_PPC) && (!defined(__VSX__) || !defined(__FLOAT128__))
++#pragma GCC target ("vsx,float128")
++#endif
++
++#include <quad.h>
++
++#ifdef __LONG_DOUBLE_IEEE128__
++#define IBM128_TYPE		__ibm128
++
++#else
++#define IBM128_TYPE		long double
++#endif
++
++/* Add prototypes of the library functions created.  In case the appropriate
++   int/long types are not declared in scope by the time quad.h is included,
++   provide our own version.  */
++typedef int	 SItype_ppc  __attribute__ ((__mode__ (__SI__)));
++typedef int	 DItype_ppc  __attribute__ ((__mode__ (__DI__)));
++typedef unsigned USItype_ppc __attribute__ ((__mode__ (__SI__)));
++typedef unsigned UDItype_ppc __attribute__ ((__mode__ (__DI__)));
++
++#ifdef _ARCH_PPC64
++typedef int	 TItype_ppc  __attribute__ ((__mode__ (__TI__)));
++typedef unsigned UTItype_ppc __attribute__ ((__mode__ (__TI__)));
++#endif
++
++/* Software emulation functions.  */
++extern TFtype __addkf3_sw (TFtype, TFtype);
++extern TFtype __subkf3_sw (TFtype, TFtype);
++extern TFtype __mulkf3_sw (TFtype, TFtype);
++extern TFtype __divkf3_sw (TFtype, TFtype);
++extern TFtype __negkf2_sw (TFtype);
++extern CMPtype __eqkf2_sw (TFtype, TFtype);
++extern CMPtype __gekf2_sw (TFtype, TFtype);
++extern CMPtype __lekf2_sw (TFtype, TFtype);
++extern CMPtype __unordkf2_sw (TFtype, TFtype);
++extern TFtype __extendsfkf2_sw (float);
++extern TFtype __extenddfkf2_sw (double);
++extern float __trunckfsf2_sw (TFtype);
++extern double __trunckfdf2_sw (TFtype);
++extern SItype_ppc __fixkfsi_sw (TFtype);
++extern DItype_ppc __fixkfdi_sw (TFtype);
++extern USItype_ppc __fixunskfsi_sw (TFtype);
++extern UDItype_ppc __fixunskfdi_sw (TFtype);
++extern TFtype __floatsikf_sw (SItype_ppc);
++extern TFtype __floatdikf_sw (DItype_ppc);
++extern TFtype __floatunsikf_sw (USItype_ppc);
++extern TFtype __floatundikf_sw (UDItype_ppc);
++extern IBM128_TYPE __extendkftf2_sw (TFtype);
++extern TFtype __trunctfkf2_sw (IBM128_TYPE);
++
++#ifdef _ARCH_PPC64
++/* We do not provide ifunc resolvers for __fixkfti, __fixunskfti, __floattikf,
++   and __floatuntikf.  There is no ISA 3.0 instruction that converts between
++   128-bit integer types and 128-bit IEEE floating point, or vice versa.  So
++   use the emulator functions for these conversions.  */
++
++extern TItype_ppc __fixkfti (TFtype);
++extern UTItype_ppc __fixunskfti (TFtype);
++extern TFtype __floattikf (TItype_ppc);
++extern TFtype __floatuntikf (UTItype_ppc);
++#endif
++
++/* Functions using the ISA 3.0 hardware support.  If the code is compiled with
++   -mcpu=power9, it will not use these functions, but if it was compiled with
++   -mcpu=power7 or -mcpu=power8 and run on a ISA 3.0 system, it will use the
++   hardware instruction.  */
++extern TFtype __addkf3_hw (TFtype, TFtype);
++extern TFtype __subkf3_hw (TFtype, TFtype);
++extern TFtype __mulkf3_hw (TFtype, TFtype);
++extern TFtype __divkf3_hw (TFtype, TFtype);
++extern TFtype __negkf2_hw (TFtype);
++extern CMPtype __eqkf2_hw (TFtype, TFtype);
++extern CMPtype __gekf2_hw (TFtype, TFtype);
++extern CMPtype __lekf2_hw (TFtype, TFtype);
++extern CMPtype __unordkf2_hw (TFtype, TFtype);
++extern TFtype __extendsfkf2_hw (float);
++extern TFtype __extenddfkf2_hw (double);
++extern float __trunckfsf2_hw (TFtype);
++extern double __trunckfdf2_hw (TFtype);
++extern SItype_ppc __fixkfsi_hw (TFtype);
++extern DItype_ppc __fixkfdi_hw (TFtype);
++extern USItype_ppc __fixunskfsi_hw (TFtype);
++extern UDItype_ppc __fixunskfdi_hw (TFtype);
++extern TFtype __floatsikf_hw (SItype_ppc);
++extern TFtype __floatdikf_hw (DItype_ppc);
++extern TFtype __floatunsikf_hw (USItype_ppc);
++extern TFtype __floatundikf_hw (UDItype_ppc);
++extern IBM128_TYPE __extendkftf2_hw (TFtype);
++extern TFtype __trunctfkf2_hw (IBM128_TYPE);
++
++/* Ifunc function declarations, to automatically switch between software
++   emulation and hardware support.  */
++extern TFtype __addkf3 (TFtype, TFtype);
++extern TFtype __subkf3 (TFtype, TFtype);
++extern TFtype __mulkf3 (TFtype, TFtype);
++extern TFtype __divkf3 (TFtype, TFtype);
++extern TFtype __negkf2 (TFtype);
++extern CMPtype __eqkf2 (TFtype, TFtype);
++extern CMPtype __nekf2 (TFtype, TFtype);
++extern CMPtype __gekf2 (TFtype, TFtype);
++extern CMPtype __gtkf2 (TFtype, TFtype);
++extern CMPtype __lekf2 (TFtype, TFtype);
++extern CMPtype __ltkf2 (TFtype, TFtype);
++extern CMPtype __unordkf2 (TFtype, TFtype);
++extern TFtype __extendsfkf2 (float);
++extern TFtype __extenddfkf2 (double);
++extern float __trunckfsf2 (TFtype);
++extern double __trunckfdf2 (TFtype);
++extern SItype_ppc __fixkfsi (TFtype);
++extern DItype_ppc __fixkfdi (TFtype);
++extern USItype_ppc __fixunskfsi (TFtype);
++extern UDItype_ppc __fixunskfdi (TFtype);
++extern TFtype __floatsikf (SItype_ppc);
++extern TFtype __floatdikf (DItype_ppc);
++extern TFtype __floatunsikf (USItype_ppc);
++extern TFtype __floatundikf (UDItype_ppc);
++extern IBM128_TYPE __extendkftf2 (TFtype);
++extern TFtype __trunctfkf2 (IBM128_TYPE);
++
++/* Implementation of conversions between __ibm128 and __float128, to allow the
++   same code to be used on systems with IEEE 128-bit emulation and with IEEE
++   128-bit hardware support.  */
++
++union ibm128_union {
++  IBM128_TYPE ibm128;
++  double dbl[2];
++};
++
++#define CVT_FLOAT128_TO_IBM128(RESULT, VALUE)				\
++{									\
++  double __high, __low;							\
++  __float128 __value = (VALUE);						\
++  union ibm128_union u;							\
++									\
++  __high = (double) __value;						\
++  if (__builtin_isnan (__high) || __builtin_isinf (__high))		\
++    __low = 0.0;							\
++									\
++  else									\
++    {									\
++      double __high_temp;						\
++									\
++      __low = (double) (__value - (__float128) __high);			\
++      /* Renormalize low/high and move them into canonical IBM long	\
++	 double form.  */						\
++      __high_temp = __high + __low;					\
++      __low = (__high - __high_temp) + __low;				\
++      __high = __high_temp;						\
++    }									\
++									\
++  u.dbl[0] = __high;							\
++  u.dbl[1] = __low;							\
++  RESULT = u.ibm128;							\
++}
++
++#define CVT_IBM128_TO_FLOAT128(RESULT, VALUE)				\
++{									\
++  union ibm128_union u;							\
++  double __high, __low;							\
++									\
++  u.ibm128 = (VALUE);							\
++  __high = u.dbl[0];							\
++  __low = u.dbl[1];							\
++									\
++  /* Handle the special cases of NAN and infinity.  */			\
++  if (__builtin_isnan (__high) || __builtin_isinf (__high))		\
++    RESULT = (__float128) __high;					\
++									\
++  /* If low is 0.0, there no need to do the add.  In addition,		\
++     avoiding the add produces the correct sign if high is -0.0.  */	\
++  else if (__low == 0.0)						\
++    RESULT = (__float128) __high;					\
++									\
++  else									\
++    RESULT = ((__float128) __high) + ((__float128) __low);		\
++}
+Index: libgcc/config/rs6000/extendkftf2-sw.c
+===================================================================
+--- a/src/libgcc/config/rs6000/extendkftf2-sw.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/extendkftf2-sw.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,53 @@
++/* Software IEEE 128-bit floating-point emulation for PowerPC.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++	Richard Henderson (rth@cygnus.com) and
++	Jakub Jelinek (jj@ultra.linux.cz).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++/* Convert IEEE 128-bit floating point to IBM long double.  */
++
++#ifdef __FLOAT128_HARDWARE__
++#error "This module must not be compiled with IEEE 128-bit hardware support"
++#endif
++
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++#ifndef FLOAT128_HW_INSNS
++#define __extendkftf2_sw __extendkftf2
++#endif
++
++IBM128_TYPE
++__extendkftf2_sw (__float128 value)
++{
++  IBM128_TYPE ret;
++
++  CVT_FLOAT128_TO_IBM128 (ret, value);
++  return ret;
++}
+Index: libgcc/config/rs6000/trunctfkf2-sw.c
+===================================================================
+--- a/src/libgcc/config/rs6000/trunctfkf2-sw.c	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/trunctfkf2-sw.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,53 @@
++/* Software IEEE 128-bit floating-point emulation for PowerPC.
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   This file is part of the GNU C Library.
++   Contributed by Michael Meissner (meissner@linux.vnet.ibm.com)
++   Code is based on the main soft-fp library written by:
++	Richard Henderson (rth@cygnus.com) and
++	Jakub Jelinek (jj@ultra.linux.cz).
++
++   The GNU C Library is free software; you can redistribute it and/or
++   modify it under the terms of the GNU Lesser General Public
++   License as published by the Free Software Foundation; either
++   version 2.1 of the License, or (at your option) any later version.
++
++   In addition to the permissions in the GNU Lesser General Public
++   License, the Free Software Foundation gives you unlimited
++   permission to link the compiled version of this file into
++   combinations with other programs, and to distribute those
++   combinations without any restriction coming from the use of this
++   file.  (The Lesser General Public License restrictions do apply in
++   other respects; for example, they cover modification of the file,
++   and distribution when not linked into a combine executable.)
++
++   The GNU C Library is distributed in the hope that it will be useful,
++   but WITHOUT ANY WARRANTY; without even the implied warranty of
++   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++   Lesser General Public License for more details.
++
++   You should have received a copy of the GNU Lesser General Public
++   License along with the GNU C Library; if not, see
++   <http://www.gnu.org/licenses/>.  */
++
++/* Convert IBM long double to IEEE 128-bit floating point.  */
++
++#ifdef __FLOAT128_HARDWARE__
++#error "This module must not be compiled with IEEE 128-bit hardware support"
++#endif
++
++#include "soft-fp.h"
++#include "quad-float128.h"
++
++#ifndef FLOAT128_HW_INSNS
++#define __trunctfkf2_sw __trunctfkf2
++#endif
++
++__float128
++__trunctfkf2_sw (IBM128_TYPE value)
++{
++  __float128 ret;
++
++  CVT_IBM128_TO_FLOAT128 (ret, value);
++  return ret;
++}
+Index: libgcc/config/rs6000/t-float128
+===================================================================
+--- a/src/libgcc/config/rs6000/t-float128	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/t-float128	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,95 @@
++# Support for adding __float128 to the powerpc.
++
++# The standard 128-bit floating point support functions are TFmode.  Most
++# PowerPC targets use a long double format that has a pair of doubles to give
++# you more precision, but no extra expoenent range.  This long double format is
++# mostly compatible with the format used by the IBM XL compilers.  Some of the
++# names used by the IBM double-double format use TF in them, so we rename
++# all of the functions provided for the new IEEE 128-bit support.
++#
++# We use the TF functions in soft-fp for 128-bit floating point support, using
++# sed to transform the names in the files from TF names to KF names.
++
++# Emulator functions from the soft-fp directory
++fp128_softfp_funcs	= addkf3 subkf3 mulkf3 divkf3 negkf2 \
++			  unordkf2 eqkf2 gekf2 lekf2 \
++			  extendsfkf2 extenddfkf2 trunckfsf2 trunckfdf2 \
++			  fixkfsi fixkfdi fixunskfsi fixunskfdi \
++			  floatsikf floatdikf floatunsikf floatundikf
++
++fp128_softfp_src	= $(addsuffix -sw.c,$(fp128_softfp_funcs))
++fp128_softfp_static_obj	= $(addsuffix -sw$(objext),$(fp128_softfp_funcs))
++fp128_softfp_shared_obj	= $(addsuffix -sw_s$(objext),$(fp128_softfp_funcs))
++fp128_softfp_obj	= $(fp128_softfp_static_obj) $(fp128_softfp_shared_obj)
++
++# New functions for software emulation
++fp128_ppc_funcs		= floattikf floatuntikf fixkfti fixunskfti \
++			  extendkftf2-sw trunctfkf2-sw \
++			  sfp-exceptions
++
++fp128_ppc_src		= $(addprefix $(srcdir)/config/rs6000/,$(addsuffix \
++				.c,$(fp128_ppc_funcs)))
++fp128_ppc_static_obj	= $(addsuffix $(objext),$(fp128_ppc_funcs))
++fp128_ppc_shared_obj	= $(addsuffix _s$(objext),$(fp128_ppc_funcs))
++fp128_ppc_obj		= $(fp128_ppc_static_obj) $(fp128_ppc_shared_obj)
++
++# All functions
++fp128_funcs		= $(fp128_softfp_funcs) $(fp128_ppc_funcs) \
++			  $(fp128_hw_funcs) $(fp128_ifunc_funcs)
++
++fp128_src		= $(fp128_softfp_src) $(fp128_ppc_src) \
++			  $(fp128_hw_src) $(fp128_ifunc_src)
++
++fp128_obj		= $(fp128_softfp_obj) $(fp128_ppc_obj) \
++			  $(fp128_hw_obj) $(fp128_ifunc_obj)
++
++fp128_sed		= $(srcdir)/config/rs6000/float128-sed$(fp128_sed_hw)
++fp128_dep		= $(fp128_sed) $(srcdir)/config/rs6000/t-float128
++
++fp128_includes		= $(srcdir)/soft-fp/double.h \
++			  $(srcdir)/soft-fp/op-1.h \
++			  $(srcdir)/soft-fp/op-4.h \
++			  $(srcdir)/soft-fp/op-common.h \
++			  $(srcdir)/soft-fp/single.h \
++			  $(srcdir)/soft-fp/extended.h \
++			  $(srcdir)/soft-fp/op-2.h \
++			  $(srcdir)/soft-fp/op-8.h \
++			  $(srcdir)/soft-fp/quad.h \
++			  $(srcdir)/soft-fp/soft-fp.h
++
++# Build the emulator without ISA 3.0 hardware support.
++FP128_CFLAGS_SW		 = -Wno-type-limits -mvsx -mfloat128 \
++			   -mno-float128-hardware \
++			   -I$(srcdir)/soft-fp \
++			   -I$(srcdir)/config/rs6000 \
++			   $(FLOAT128_HW_INSNS)
++
++$(fp128_softfp_obj)	 : INTERNAL_CFLAGS += $(FP128_CFLAGS_SW)
++$(fp128_ppc_obj)	 : INTERNAL_CFLAGS += $(FP128_CFLAGS_SW)
++$(fp128_obj)		 : $(fp128_includes)
++$(fp128_obj)		 : $(srcdir)/config/rs6000/quad-float128.h
++
++$(fp128_softfp_src) : $(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@)) $(fp128_dep)
++	@src="$(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@))"; \
++	echo "Create $@"; \
++	(echo "/* file created from $$src */"; \
++	 echo; \
++	 sed -f $(fp128_sed) < $$src) > $@
++
++.PHONY: test clean-float128
++
++test:
++	@echo "fp128_src:"; \
++	for x in $(fp128_src); do echo "    $$x"; done; \
++	echo; \
++	echo "fp128_obj:"; \
++	for x in $(fp128_obj); do echo "    $$x"; done;
++
++clean-float128:
++	rm -rf $(fp128_softfp_src)
++	@$(MULTICLEAN) multi-clean DO=clean-float128
++
++# For now, only put it in the static library
++# LIB2ADD += $(fp128_src)
++
++LIB2ADD_ST += $(fp128_src)
+Index: libgcc/config/rs6000/float128-sed
+===================================================================
+--- a/src/libgcc/config/rs6000/float128-sed	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/float128-sed	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,25 @@
++s/__addtf3/__addkf3/g
++s/__divtf3/__divkf3/g
++s/__eqtf2/__eqkf2/g
++s/__extenddftf2/__extenddfkf2/g
++s/__extendsftf2/__extendsfkf2/g
++s/__fixtfdi/__fixkfdi/g
++s/__fixtfsi/__fixkfsi/g
++s/__fixunstfdi/__fixunskfdi/g
++s/__fixunstfsi/__fixunskfsi/g
++s/__floatditf/__floatdikf/g
++s/__floatsitf/__floatsikf/g
++s/__floatunditf/__floatundikf/g
++s/__floatunsitf/__floatunsikf/g
++s/__getf2/__gekf2/g
++s/__gttf2/__gtkf2/g
++s/__letf2/__lekf2/g
++s/__lttf2/__ltkf2/g
++s/__multf3/__mulkf3/g
++s/__negtf2/__negkf2/g
++s/__netf2/__nekf2/g
++s/quad[.]h/quad-float128.h/g
++s/__subtf3/__subkf3/g
++s/__trunctfdf2/__trunckfdf2/g
++s/__trunctfsf2/__trunckfsf2/g
++s/__unordtf2/__unordkf2/g
+Index: libgcc/config/rs6000/t-float128-hw
+===================================================================
+--- a/src/libgcc/config/rs6000/t-float128-hw	(.../gcc-5-branch)
++++ b/src/libgcc/config/rs6000/t-float128-hw	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,35 @@
++# Support for adding __float128 hardware support to the powerpc.
++# Tell the float128 functions that the ISA 3.0 hardware support can
++# be compiled it to be selected via IFUNC functions.
++
++FLOAT128_HW_INSNS	= -DFLOAT128_HW_INSNS
++
++# New functions for hardware support
++fp128_hw_funcs		= float128-hw
++fp128_hw_src		= $(srcdir)/config/rs6000/float128-hw.c
++fp128_hw_static_obj	= float128-hw$(objext)
++fp128_hw_shared_obj	= float128-hw_s$(objext)
++fp128_hw_obj		= $(fp128_hw_static_obj) $(fp128_hw_shared_obj)
++
++fp128_ifunc_funcs	= float128-ifunc
++fp128_ifunc_src		= $(srcdir)/config/rs6000/float128-ifunc.c
++fp128_ifunc_static_obj	= float128-ifunc$(objext)
++fp128_ifunc_shared_obj	= float128-ifunc_s$(objext)
++fp128_ifunc_obj		= $(fp128_ifunc_static_obj) $(fp128_ifunc_shared_obj)
++
++# Add _sw suffix to names to allow ifunc support.
++fp128_sed_hw		= -hw
++
++# Build the hardware support functions with appropriate hardware support
++FP128_CFLAGS_HW		 = -Wno-type-limits -mvsx -mfloat128 \
++			   -mpower8-vector -mpower9-vector \
++			   -mfloat128-hardware \
++			   -I$(srcdir)/soft-fp \
++			   -I$(srcdir)/config/rs6000 \
++			   $(FLOAT128_HW_INSNS)
++
++$(fp128_hw_obj)		 : INTERNAL_CFLAGS += $(FP128_CFLAGS_HW)
++$(fp128_hw_obj)		 : $(srcdir)/config/rs6000/t-float128-hw
++
++$(fp128_ifunc_obj)	 : INTERNAL_CFLAGS += $(FP128_CFLAGS_SW)
++$(fp128_ifunc_obj)	 : $(srcdir)/config/rs6000/t-float128-hw
+Index: libgcc/configure
+===================================================================
+--- a/src/libgcc/configure	(.../gcc-5-branch)
++++ b/src/libgcc/configure	(.../ibm/gcc-5-branch)
+@@ -4805,6 +4805,65 @@
+ ;;
+ esac
+ 
++case ${host} in
++# At present, we cannot turn -mfloat128 on via #pragma GCC target,
++# so just check if we have VSX (ISA 2.06) support to build the
++# software libraries, and whether the assembler can handle xsaddqp
++# for hardware support.
++powerpc*-*-linux*)
++  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PowerPC ISA 2.06 to build __float128 libraries" >&5
++$as_echo_n "checking for PowerPC ISA 2.06 to build __float128 libraries... " >&6; }
++if test "${libgcc_cv_powerpc_float128+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++#pragma GCC target ("vsx")
++     vector double dadd (vector double a, vector double b) { return a + b; }
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  libgcc_cv_powerpc_float128=yes
++else
++  libgcc_cv_powerpc_float128=no
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgcc_cv_powerpc_float128" >&5
++$as_echo "$libgcc_cv_powerpc_float128" >&6; }
++
++  { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PowerPC ISA 3.0 to build hardware __float128 libraries" >&5
++$as_echo_n "checking for PowerPC ISA 3.0 to build hardware __float128 libraries... " >&6; }
++if test "${libgcc_cv_powerpc_float128_hw+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++#pragma GCC target ("vsx,power9-vector")
++     #include <sys/auxv.h>
++     #ifndef AT_PLATFORM
++     #error "AT_PLATFORM is not defined"
++     #endif
++     vector unsigned char (vector unsigned char a, vector unsigned char b)
++     {
++       vector unsigned char ret;
++       __asm__ ("xsaddqp %0,%1,%2" : "=v" (ret) : "v" (a), "v" (b));
++       return ret;
++     }
++     void *add_resolver (void) { return (void *) add; }
++     __float128 add_ifunc (__float128, __float128)
++	__attribute__ ((__ifunc__ ("add_resolver")));
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  libgcc_cv_powerpc_float128_hw=yes
++else
++  libgcc_cv_powerpc_float128_hw=no
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgcc_cv_powerpc_float128_hw" >&5
++$as_echo "$libgcc_cv_powerpc_float128_hw" >&6; }
++esac
++
+ # Collect host-machine-specific information.
+ . ${srcdir}/config.host
+ 
+Index: libgcc/ChangeLog.ibm
+===================================================================
+--- a/src/libgcc/ChangeLog.ibm	(.../gcc-5-branch)
++++ b/src/libgcc/ChangeLog.ibm	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,131 @@
++2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234917.
++
++2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234888.
++
++	Back port from mainline
++	2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/70381
++	* configure.ac (powerpc*-*-linux*): Rework tests to build
++	__float128 emulation routines to not depend on using #pragma GCC
++	target to enable -mfloat128.
++	* configure: Regnerate.
++
++2016-03-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234461.
++
++2016-03-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline
++	2016-03-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR libgcc/70363
++	* config/rs6000/extendkftf2-sw.c (__extendkftf2_sw): If libgcc was
++	built with an assembler that does not support ISA 3.0
++	instructions, rename __extendkftf2_sw to __extendkftf2.
++
++2016-03-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234186.
++
++2016-02-29  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	Backport from mainline
++	2016-02-26  Paul E. Murphy  <murphyp@linux.vnet.ibm.com>
++		    Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	* config/rs6000/sfp-machine.h (_FP_DECL_EX): Declare _fpsr as a
++	union of u64 and double.
++	(FP_TRAPPING_EXCEPTIONS): Return a bitmask of trapping exceptions.
++	(FP_INIT_ROUNDMODE): Read the fpscr instead of writing a mystery
++	value.
++	(FP_ROUNDMODE): Update the usage of _fpscr.
++
++2016-01-21  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline
++	2016-01-21  Michael Meissner  <meissner@linux.vnet.ibm.com>
++		    Steven Munroe <munroesj@linux.vnet.ibm.com>
++		    Tulio Magno Quites Machado Filho <tulioqm@br.ibm.com>
++
++	* config/rs6000/float128-sed: New files to convert TF names to KF
++	names for PowerPC IEEE 128-bit floating point support.
++	* config/rs6000/float128-sed-hw: Likewise.
++
++	* config/rs6000/float128-hw.c: New file for ISA 3.0 IEEE 128-bit
++	floating point hardware support.
++
++	* config/rs6000/float128-ifunc.c: New file to pick either IEEE
++	128-bit floating point software emulation or use ISA 3.0 hardware
++	support if it is available.
++
++	* config/rs6000/quad-float128.h: New file to support IEEE 128-bit
++	floating point.
++
++	* config/rs6000/extendkftf2-sw.c: New file, convert IEEE 128-bit
++	floating point to IBM extended double.
++
++	* config/rs6000/trunctfkf2-sw.c: New file, convert IBM extended
++	double to IEEE 128-bit floating point.
++
++	* config/rs6000/t-float128: New Makefile fragments to enable
++	building __float128 emulation support.
++	* config/rs6000/t-float128-hw: Likewise.
++
++	* config/rs6000/sfp-exceptions.c: New file to provide exception
++	support for IEEE 128-bit floating point.
++
++	* config/rs6000/floattikf.c: New files for converting between IEEE
++	128-bit floating point and signed/unsigned 128-bit integers.
++	* config/rs6000/fixunskfti.c: Likewise.
++	* config/rs6000/fixkfti.c: Likewise.
++	* config/rs6000/floatuntikf.c: Likewise.
++
++	* config/rs6000/sfp-machine.h (_FP_W_TYPE_SIZE): Use 64-bit types
++	when building on 64-bit systems, or when VSX is enabled.
++	(_FP_W_TYPE): Likewise.
++	(_FP_WS_TYPE): Likewise.
++	(_FP_I_TYPE): Likewise.
++	(TItype): Define on 64-bit systems.
++	(UTItype): Likewise.
++	(TI_BITS): Likewise.
++	(_FP_MUL_MEAT_D): Add support for using 64-bit types.
++	(_FP_MUL_MEAT_Q): Likewise.
++	(_FP_DIV_MEAT_D): Likewise.
++	(_FP_DIV_MEAT_Q): Likewise.
++	(_FP_NANFRAC_D): Likewise.
++	(_FP_NANFRAC_Q): Likewise.
++	(ISA_BIT): Add exception support if we are being compiled on a
++	machine with hardware floating point support to build the IEEE
++	128-bit emulation functions.
++	(FP_EX_INVALID): Likewise.
++	(FP_EX_OVERFLOW): Likewise.
++	(FP_EX_UNDERFLOW): Likewise.
++	(FP_EX_DIVZERO): Likewise.
++	(FP_EX_INEXACT): Likewise.
++	(FP_EX_ALL): Likewise.
++	(__sfp_handle_exceptions): Likewise.
++	(FP_HANDLE_EXCEPTIONS): Likewise.
++	(FP_RND_NEAREST): Likewise.
++	(FP_RND_ZERO): Likewise.
++	(FP_RND_PINF): Likewise.
++	(FP_RND_MINF): Likewise.
++	(FP_RND_MASK): Likewise.
++	(_FP_DECL_EX): Likewise.
++	(FP_INIT_ROUNDMODE): Likewise.
++	(FP_ROUNDMODE): Likewise.
++
++	* libgcc/config.host (powerpc*-*-linux*): If compiler can compile
++	VSX code, enable IEEE 128-bit floating point.  If the compiler can
++	compile IEEE 128-bit floating point code with ISA 3.0 IEEE 128-bit
++	floating point hardware instructions and it supports declaring
++	functions with the ifunc attribute, enable ifunc functions to
++	switch between software and hardware support.
++	* configure.ac (powerpc*-*-linux*): Likewise.
++	* configure: Regenerate.
++
+Index: gcc/configure
+===================================================================
+--- a/src/gcc/configure	(.../gcc-5-branch)
++++ b/src/gcc/configure	(.../ibm/gcc-5-branch)
+@@ -21791,7 +21791,45 @@
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ld_is_gold" >&5
+ $as_echo "$ld_is_gold" >&6; }
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking gold linker with split stack support as non default" >&5
++$as_echo_n "checking gold linker with split stack support as non default... " >&6; }
++# Check to see if default ld is not gold, but gold is
++# available and has support for split stack.  If gcc was configured
++# with gold then no checking is done.
++#
++if test x$ld_is_gold = xno && which ${gcc_cv_ld}.gold >/dev/null 2>&1; then
+ 
++# For platforms other than powerpc64*, enable as appropriate.
++
++  gold_non_default=no
++  ld_gold=`which ${gcc_cv_ld}.gold`
++# Make sure this gold has minimal split stack support
++  if $ld_gold --help 2>/dev/null | grep split-stack-adjust-size >/dev/null 2>&1; then
++    ld_vers=`$ld_gold --version | sed 1q`
++    gold_vers=`echo $ld_vers | sed -n \
++          -e 's,^[^)]*[  ]\([0-9][0-9]*\.[0-9][0-9]*[^)]*\)) .*$,\1,p'`
++    case $target in
++# check that the gold version contains the complete split stack support
++# on powerpc64 big and little endian
++      powerpc64*-*-*)
++        case "$gold_vers" in
++          2.25.[1-9]*|2.2[6-9][.0-9]*|2.[3-9][.0-9]*|[3-9].[.0-9]*) gold_non_default=yes
++          ;;
++          *) gold_non_default=no
++          ;;
++        esac
++        ;;
++    esac
++  fi
++  if test $gold_non_default = yes; then
++
++$as_echo "#define HAVE_GOLD_NON_DEFAULT_SPLIT_STACK 1" >>confdefs.h
++
++  fi
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gold_non_default" >&5
++$as_echo "$gold_non_default" >&6; }
++
+ ORIGINAL_LD_FOR_TARGET=$gcc_cv_ld
+ 
+ case "$ORIGINAL_LD_FOR_TARGET" in
+@@ -26028,6 +26066,48 @@
+ fi
+ 
+     case $target in
++      *-*-aix*) conftest_s='	.machine "pwr9"
++	.csect .text[PR]';;
++      *) conftest_s='	.machine power9
++	.text';;
++    esac
++
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for power9 support" >&5
++$as_echo_n "checking assembler for power9 support... " >&6; }
++if test "${gcc_cv_as_powerpc_power9+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  gcc_cv_as_powerpc_power9=no
++    if test $in_tree_gas = yes; then
++    if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
++  then gcc_cv_as_powerpc_power9=yes
++fi
++  elif test x$gcc_cv_as != x; then
++    $as_echo "$conftest_s" > conftest.s
++    if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
++  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
++  (eval $ac_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }; }
++    then
++	gcc_cv_as_powerpc_power9=yes
++    else
++      echo "configure: failed program was" >&5
++      cat conftest.s >&5
++    fi
++    rm -f conftest.o conftest.s
++  fi
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_power9" >&5
++$as_echo "$gcc_cv_as_powerpc_power9" >&6; }
++if test $gcc_cv_as_powerpc_power9 = yes; then
++
++$as_echo "#define HAVE_AS_POWER9 1" >>confdefs.h
++
++fi
++
++    case $target in
+       *-*-aix*) conftest_s='	.csect .text[PR]
+ 	lwsync';;
+       *) conftest_s='	.text
+@@ -27648,6 +27728,82 @@
+ $as_echo "#define HAVE_LD_LARGE_TOC 1" >>confdefs.h
+ 
+     fi
++
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking linker toc pointer alignment" >&5
++$as_echo_n "checking linker toc pointer alignment... " >&6; }
++if test "${gcc_cv_ld_toc_align+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test x$gcc_cv_as != x -a x$gcc_cv_ld != x -a x$gcc_cv_nm != x; then
++      cat > conftest.s <<EOF
++	.global _start
++	.text
++_start:
++	addis 9,2,x@got@ha
++	.section .data.rel.ro,"aw",@progbits
++	.p2align 16
++	.space 32768
++x:	.quad .TOC.
++EOF
++      if $gcc_cv_as -a64 -o conftest.o conftest.s > /dev/null 2>&1 \
++         && $gcc_cv_ld $emul_name -o conftest conftest.o > /dev/null 2>&1; then
++        gcc_cv_ld_toc_align=`$gcc_cv_nm conftest | ${AWK} '/\.TOC\./ { match ($0, "0[[:xdigit:]]*", a); print strtonum ("0x" substr(a[0], length(a[0])-3)) }'`
++      fi
++      rm -f conftest conftest.o conftest.s
++    fi
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld_toc_align" >&5
++$as_echo "$gcc_cv_ld_toc_align" >&6; }
++    if test -n "$gcc_cv_ld_toc_align" && test $gcc_cv_ld_toc_align -gt 8; then
++
++cat >>confdefs.h <<_ACEOF
++#define POWERPC64_TOC_POINTER_ALIGNMENT $gcc_cv_ld_toc_align
++_ACEOF
++
++    fi
++
++     # Check for split stack support within the gold linker
++     { $as_echo "$as_me:${as_lineno-$LINENO}: checking gold linker supports split stack" >&5
++$as_echo_n "checking gold linker supports split stack... " >&6; }
++if test "${gcc_cv_ld_gold_supports_split_stack+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  gcc_cv_ld_gold_supports_split_stack=no
++     if test x"$ld_is_gold" = xyes; then
++         gold_linker=$gcc_cv_ld
++     elif "$ORIGINAL_LD_GOLD_FOR_TARGET" --version | grep gold >/dev/null 2>&1; then
++         gold_linker=$ORIGINAL_LD_GOLD_FOR_TARGET
++     else
++         gold_linker=""
++     fi
++     if test "$gold_linker" != ""; then
++         gold_vers=`$gold_linker --version | sed 1q | sed -n -e 's/.*Binutils.* \([0-9][0-9]*\.[^)]*\)).*$/\1/p'`
++         gold_vers_major=`expr "$gold_vers" : '\([0-9]*\)'`
++         gold_vers_minor=`expr "$gold_vers" : '[0-9]*\.\([0-9]*\)'`
++         gold_vers_patch=`expr "$gold_vers" : '[0-9]*\.[0-9]*\.\([0-9]*\)'`
++
++         case x"$gold_vers_minor" in
++           x25)
++             if test x"$gold_vers_patch" != ""; then
++               gcc_cv_ld_gold_supports_split_stack=yes
++             fi
++             ;;
++           x2[6-9])
++             gcc_cv_ld_gold_supports_split_stack=yes
++             ;;
++         esac
++    fi
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_ld_gold_supports_split_stack" >&5
++$as_echo "$gcc_cv_ld_gold_supports_split_stack" >&6; }
++    if test x"$gcc_cv_ld_gold_supports_split_stack" = xyes; then
++
++$as_echo "#define HAVE_LD_GOLD_SUPPORTS_SPLIT_STACK 1" >>confdefs.h
++
++    fi
++
+     ;;
+ esac
+ 
+@@ -27936,6 +28092,24 @@
+ 
+ fi
+ 
++# Check if the target LIBC supports exporting the AT_PLATFORM and AT_HWCAP
++# values in the TCB.  Currently, only GLIBC 2.23 and later support this.
++gcc_cv_libc_provides_hwcap_in_tcb=no
++case "$target" in
++  powerpc*-*-linux*)
++
++if test $glibc_version_major -gt 2 \
++  || ( test $glibc_version_major -eq 2 && test $glibc_version_minor -ge 23 ); then :
++  gcc_cv_libc_provides_hwcap_in_tcb=yes
++fi
++    ;;
++esac
++if test x$gcc_cv_libc_provides_hwcap_in_tcb = xyes; then
++
++$as_echo "#define TARGET_LIBC_PROVIDES_HWCAP_IN_TCB 1" >>confdefs.h
++
++fi
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking dl_iterate_phdr in target C library" >&5
+ $as_echo_n "checking dl_iterate_phdr in target C library... " >&6; }
+ gcc_cv_target_dl_iterate_phdr=unknown
+Index: gcc/gcc.c
+===================================================================
+--- a/src/gcc/gcc.c	(.../gcc-5-branch)
++++ b/src/gcc/gcc.c	(.../ibm/gcc-5-branch)
+@@ -541,7 +541,11 @@
+    libgcc.  This is not yet a real spec, though it could become one;
+    it is currently just stuffed into LINK_SPEC.  FIXME: This wrapping
+    only works with GNU ld and gold.  */
++#ifdef HAVE_GOLD_NON_DEFAULT_SPLIT_STACK
++#define STACK_SPLIT_SPEC " %{fsplit-stack: -fuse-ld=gold --wrap=pthread_create}"
++#else
+ #define STACK_SPLIT_SPEC " %{fsplit-stack: --wrap=pthread_create}"
++#endif
+ 
+ #ifndef LIBASAN_SPEC
+ #define STATIC_LIBASAN_LIBS \
+Index: gcc/testsuite/gcc.target/powerpc/extswsli-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/extswsli-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/extswsli-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,20 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++static int mem;
++int *ptr = &mem;
++
++long
++add (long *p, int reg)
++{
++  __asm__ (" #foo %0" : "+r" (reg));
++  return p[reg] + p[mem];
++}
++
++/* { dg-final { scan-assembler-times "extswsli " 2 } } */
++/* { dg-final { scan-assembler-times "lwz "      1 } } */
++/* { dg-final { scan-assembler-not   "lwa "        } } */
++/* { dg-final { scan-assembler-not   "sldi "       } } */
++/* { dg-final { scan-assembler-not   "extsw "      } } */
+Index: gcc/testsuite/gcc.target/powerpc/dform-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/dform-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/dform-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,207 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
++
++#ifndef TYPE
++#define TYPE double
++#endif
++
++#ifndef TYPE_IN
++#define TYPE_IN TYPE
++#endif
++
++#ifndef TYPE_OUT
++#define TYPE_OUT TYPE
++#endif
++
++#ifndef ITYPE
++#define ITYPE long
++#endif
++
++#ifdef DO_CALL
++extern ITYPE get_bits (ITYPE);
++
++#else
++#define get_bits(X) (X)
++#endif
++
++void test (ITYPE *bits, ITYPE n, TYPE one, TYPE_IN *p, TYPE_OUT *q)
++{
++  TYPE x_00 = p[ 0];
++  TYPE x_01 = p[ 1];
++  TYPE x_02 = p[ 2];
++  TYPE x_03 = p[ 3];
++  TYPE x_04 = p[ 4];
++  TYPE x_05 = p[ 5];
++  TYPE x_06 = p[ 6];
++  TYPE x_07 = p[ 7];
++  TYPE x_08 = p[ 8];
++  TYPE x_09 = p[ 9];
++
++  TYPE x_10 = p[10];
++  TYPE x_11 = p[11];
++  TYPE x_12 = p[12];
++  TYPE x_13 = p[13];
++  TYPE x_14 = p[14];
++  TYPE x_15 = p[15];
++  TYPE x_16 = p[16];
++  TYPE x_17 = p[17];
++  TYPE x_18 = p[18];
++  TYPE x_19 = p[19];
++
++  TYPE x_20 = p[20];
++  TYPE x_21 = p[21];
++  TYPE x_22 = p[22];
++  TYPE x_23 = p[23];
++  TYPE x_24 = p[24];
++  TYPE x_25 = p[25];
++  TYPE x_26 = p[26];
++  TYPE x_27 = p[27];
++  TYPE x_28 = p[28];
++  TYPE x_29 = p[29];
++
++  TYPE x_30 = p[30];
++  TYPE x_31 = p[31];
++  TYPE x_32 = p[32];
++  TYPE x_33 = p[33];
++  TYPE x_34 = p[34];
++  TYPE x_35 = p[35];
++  TYPE x_36 = p[36];
++  TYPE x_37 = p[37];
++  TYPE x_38 = p[38];
++  TYPE x_39 = p[39];
++
++  TYPE x_40 = p[40];
++  TYPE x_41 = p[41];
++  TYPE x_42 = p[42];
++  TYPE x_43 = p[43];
++  TYPE x_44 = p[44];
++  TYPE x_45 = p[45];
++  TYPE x_46 = p[46];
++  TYPE x_47 = p[47];
++  TYPE x_48 = p[48];
++  TYPE x_49 = p[49];
++
++  ITYPE i;
++
++  for (i = 0; i < n; i++)
++    {
++      ITYPE bit = get_bits (bits[i]);
++
++      if ((bit & ((ITYPE)1) << 	0) != 0) x_00 += one;
++      if ((bit & ((ITYPE)1) << 	1) != 0) x_01 += one;
++      if ((bit & ((ITYPE)1) << 	2) != 0) x_02 += one;
++      if ((bit & ((ITYPE)1) << 	3) != 0) x_03 += one;
++      if ((bit & ((ITYPE)1) << 	4) != 0) x_04 += one;
++      if ((bit & ((ITYPE)1) << 	5) != 0) x_05 += one;
++      if ((bit & ((ITYPE)1) << 	6) != 0) x_06 += one;
++      if ((bit & ((ITYPE)1) << 	7) != 0) x_07 += one;
++      if ((bit & ((ITYPE)1) << 	8) != 0) x_08 += one;
++      if ((bit & ((ITYPE)1) << 	9) != 0) x_09 += one;
++
++      if ((bit & ((ITYPE)1) << 10) != 0) x_10 += one;
++      if ((bit & ((ITYPE)1) << 11) != 0) x_11 += one;
++      if ((bit & ((ITYPE)1) << 12) != 0) x_12 += one;
++      if ((bit & ((ITYPE)1) << 13) != 0) x_13 += one;
++      if ((bit & ((ITYPE)1) << 14) != 0) x_14 += one;
++      if ((bit & ((ITYPE)1) << 15) != 0) x_15 += one;
++      if ((bit & ((ITYPE)1) << 16) != 0) x_16 += one;
++      if ((bit & ((ITYPE)1) << 17) != 0) x_17 += one;
++      if ((bit & ((ITYPE)1) << 18) != 0) x_18 += one;
++      if ((bit & ((ITYPE)1) << 19) != 0) x_19 += one;
++
++      if ((bit & ((ITYPE)1) << 20) != 0) x_20 += one;
++      if ((bit & ((ITYPE)1) << 21) != 0) x_21 += one;
++      if ((bit & ((ITYPE)1) << 22) != 0) x_22 += one;
++      if ((bit & ((ITYPE)1) << 23) != 0) x_23 += one;
++      if ((bit & ((ITYPE)1) << 24) != 0) x_24 += one;
++      if ((bit & ((ITYPE)1) << 25) != 0) x_25 += one;
++      if ((bit & ((ITYPE)1) << 26) != 0) x_26 += one;
++      if ((bit & ((ITYPE)1) << 27) != 0) x_27 += one;
++      if ((bit & ((ITYPE)1) << 28) != 0) x_28 += one;
++      if ((bit & ((ITYPE)1) << 29) != 0) x_29 += one;
++
++      if ((bit & ((ITYPE)1) << 30) != 0) x_30 += one;
++      if ((bit & ((ITYPE)1) << 31) != 0) x_31 += one;
++      if ((bit & ((ITYPE)1) << 32) != 0) x_32 += one;
++      if ((bit & ((ITYPE)1) << 33) != 0) x_33 += one;
++      if ((bit & ((ITYPE)1) << 34) != 0) x_34 += one;
++      if ((bit & ((ITYPE)1) << 35) != 0) x_35 += one;
++      if ((bit & ((ITYPE)1) << 36) != 0) x_36 += one;
++      if ((bit & ((ITYPE)1) << 37) != 0) x_37 += one;
++      if ((bit & ((ITYPE)1) << 38) != 0) x_38 += one;
++      if ((bit & ((ITYPE)1) << 39) != 0) x_39 += one;
++
++      if ((bit & ((ITYPE)1) << 40) != 0) x_40 += one;
++      if ((bit & ((ITYPE)1) << 41) != 0) x_41 += one;
++      if ((bit & ((ITYPE)1) << 42) != 0) x_42 += one;
++      if ((bit & ((ITYPE)1) << 43) != 0) x_43 += one;
++      if ((bit & ((ITYPE)1) << 44) != 0) x_44 += one;
++      if ((bit & ((ITYPE)1) << 45) != 0) x_45 += one;
++      if ((bit & ((ITYPE)1) << 46) != 0) x_46 += one;
++      if ((bit & ((ITYPE)1) << 47) != 0) x_47 += one;
++      if ((bit & ((ITYPE)1) << 48) != 0) x_48 += one;
++      if ((bit & ((ITYPE)1) << 49) != 0) x_49 += one;
++    }
++
++  q[ 0] = x_00;
++  q[ 1] = x_01;
++  q[ 2] = x_02;
++  q[ 3] = x_03;
++  q[ 4] = x_04;
++  q[ 5] = x_05;
++  q[ 6] = x_06;
++  q[ 7] = x_07;
++  q[ 8] = x_08;
++  q[ 9] = x_09;
++
++  q[10] = x_10;
++  q[11] = x_11;
++  q[12] = x_12;
++  q[13] = x_13;
++  q[14] = x_14;
++  q[15] = x_15;
++  q[16] = x_16;
++  q[17] = x_17;
++  q[18] = x_18;
++  q[19] = x_19;
++
++  q[20] = x_20;
++  q[21] = x_21;
++  q[22] = x_22;
++  q[23] = x_23;
++  q[24] = x_24;
++  q[25] = x_25;
++  q[26] = x_26;
++  q[27] = x_27;
++  q[28] = x_28;
++  q[29] = x_29;
++
++  q[30] = x_30;
++  q[31] = x_31;
++  q[32] = x_32;
++  q[33] = x_33;
++  q[34] = x_34;
++  q[35] = x_35;
++  q[36] = x_36;
++  q[37] = x_37;
++  q[38] = x_38;
++  q[39] = x_39;
++
++  q[40] = x_40;
++  q[41] = x_41;
++  q[42] = x_42;
++  q[43] = x_43;
++  q[44] = x_44;
++  q[45] = x_45;
++  q[46] = x_46;
++  q[47] = x_47;
++  q[48] = x_48;
++  q[49] = x_49;
++}
++
++/* { dg-final { scan-assembler     "lxsd "   } } */
++/* { dg-final { scan-assembler     "stxsd "  } } */
++/* { dg-final { scan-assembler-not "mfvsrd " } } */
++/* { dg-final { scan-assembler-not "mtvsrd " } } */
+Index: gcc/testsuite/gcc.target/powerpc/extswsli-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/extswsli-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/extswsli-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,37 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++long
++func1 (int reg, int *is_zero)
++{
++  long value;
++
++  __asm__ (" #foo %0" : "+r" (reg));
++  value = ((long)reg) << 4;
++
++  if (!value)
++    *is_zero = 1;
++
++  return value;
++}
++
++long
++func2 (int *ptr, int *is_zero)
++{
++  int reg = *ptr;
++  long value = ((long)reg) << 4;
++
++  if (!value)
++    *is_zero = 1;
++
++  return value;
++}
++
++/* { dg-final { scan-assembler     "extswsli\\. " } } */
++/* { dg-final { scan-assembler     "lwz "         } } */
++/* { dg-final { scan-assembler-not "lwa "         } } */
++/* { dg-final { scan-assembler-not "sldi "        } } */
++/* { dg-final { scan-assembler-not "sldi\\. "     } } */
++/* { dg-final { scan-assembler-not "extsw "       } } */
+Index: gcc/testsuite/gcc.target/powerpc/dform-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/dform-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/dform-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,209 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -mpower9-dform -O2" } */
++
++#ifndef TYPE
++#define TYPE float
++#endif
++
++#ifndef TYPE_IN
++#define TYPE_IN TYPE
++#endif
++
++#ifndef TYPE_OUT
++#define TYPE_OUT TYPE
++#endif
++
++#ifndef ITYPE
++#define ITYPE long
++#endif
++
++#ifdef DO_CALL
++extern ITYPE get_bits (ITYPE);
++
++#else
++#define get_bits(X) (X)
++#endif
++
++void test (ITYPE *bits, ITYPE n, TYPE one, TYPE_IN *p, TYPE_OUT *q)
++{
++  TYPE x_00 = p[ 0];
++  TYPE x_01 = p[ 1];
++  TYPE x_02 = p[ 2];
++  TYPE x_03 = p[ 3];
++  TYPE x_04 = p[ 4];
++  TYPE x_05 = p[ 5];
++  TYPE x_06 = p[ 6];
++  TYPE x_07 = p[ 7];
++  TYPE x_08 = p[ 8];
++  TYPE x_09 = p[ 9];
++
++  TYPE x_10 = p[10];
++  TYPE x_11 = p[11];
++  TYPE x_12 = p[12];
++  TYPE x_13 = p[13];
++  TYPE x_14 = p[14];
++  TYPE x_15 = p[15];
++  TYPE x_16 = p[16];
++  TYPE x_17 = p[17];
++  TYPE x_18 = p[18];
++  TYPE x_19 = p[19];
++
++  TYPE x_20 = p[20];
++  TYPE x_21 = p[21];
++  TYPE x_22 = p[22];
++  TYPE x_23 = p[23];
++  TYPE x_24 = p[24];
++  TYPE x_25 = p[25];
++  TYPE x_26 = p[26];
++  TYPE x_27 = p[27];
++  TYPE x_28 = p[28];
++  TYPE x_29 = p[29];
++
++  TYPE x_30 = p[30];
++  TYPE x_31 = p[31];
++  TYPE x_32 = p[32];
++  TYPE x_33 = p[33];
++  TYPE x_34 = p[34];
++  TYPE x_35 = p[35];
++  TYPE x_36 = p[36];
++  TYPE x_37 = p[37];
++  TYPE x_38 = p[38];
++  TYPE x_39 = p[39];
++
++  TYPE x_40 = p[40];
++  TYPE x_41 = p[41];
++  TYPE x_42 = p[42];
++  TYPE x_43 = p[43];
++  TYPE x_44 = p[44];
++  TYPE x_45 = p[45];
++  TYPE x_46 = p[46];
++  TYPE x_47 = p[47];
++  TYPE x_48 = p[48];
++  TYPE x_49 = p[49];
++
++  ITYPE i;
++
++  for (i = 0; i < n; i++)
++    {
++      ITYPE bit = get_bits (bits[i]);
++
++      if ((bit & ((ITYPE)1) << 	0) != 0) x_00 += one;
++      if ((bit & ((ITYPE)1) << 	1) != 0) x_01 += one;
++      if ((bit & ((ITYPE)1) << 	2) != 0) x_02 += one;
++      if ((bit & ((ITYPE)1) << 	3) != 0) x_03 += one;
++      if ((bit & ((ITYPE)1) << 	4) != 0) x_04 += one;
++      if ((bit & ((ITYPE)1) << 	5) != 0) x_05 += one;
++      if ((bit & ((ITYPE)1) << 	6) != 0) x_06 += one;
++      if ((bit & ((ITYPE)1) << 	7) != 0) x_07 += one;
++      if ((bit & ((ITYPE)1) << 	8) != 0) x_08 += one;
++      if ((bit & ((ITYPE)1) << 	9) != 0) x_09 += one;
++
++      if ((bit & ((ITYPE)1) << 10) != 0) x_10 += one;
++      if ((bit & ((ITYPE)1) << 11) != 0) x_11 += one;
++      if ((bit & ((ITYPE)1) << 12) != 0) x_12 += one;
++      if ((bit & ((ITYPE)1) << 13) != 0) x_13 += one;
++      if ((bit & ((ITYPE)1) << 14) != 0) x_14 += one;
++      if ((bit & ((ITYPE)1) << 15) != 0) x_15 += one;
++      if ((bit & ((ITYPE)1) << 16) != 0) x_16 += one;
++      if ((bit & ((ITYPE)1) << 17) != 0) x_17 += one;
++      if ((bit & ((ITYPE)1) << 18) != 0) x_18 += one;
++      if ((bit & ((ITYPE)1) << 19) != 0) x_19 += one;
++
++      if ((bit & ((ITYPE)1) << 20) != 0) x_20 += one;
++      if ((bit & ((ITYPE)1) << 21) != 0) x_21 += one;
++      if ((bit & ((ITYPE)1) << 22) != 0) x_22 += one;
++      if ((bit & ((ITYPE)1) << 23) != 0) x_23 += one;
++      if ((bit & ((ITYPE)1) << 24) != 0) x_24 += one;
++      if ((bit & ((ITYPE)1) << 25) != 0) x_25 += one;
++      if ((bit & ((ITYPE)1) << 26) != 0) x_26 += one;
++      if ((bit & ((ITYPE)1) << 27) != 0) x_27 += one;
++      if ((bit & ((ITYPE)1) << 28) != 0) x_28 += one;
++      if ((bit & ((ITYPE)1) << 29) != 0) x_29 += one;
++
++      if ((bit & ((ITYPE)1) << 30) != 0) x_30 += one;
++      if ((bit & ((ITYPE)1) << 31) != 0) x_31 += one;
++      if ((bit & ((ITYPE)1) << 32) != 0) x_32 += one;
++      if ((bit & ((ITYPE)1) << 33) != 0) x_33 += one;
++      if ((bit & ((ITYPE)1) << 34) != 0) x_34 += one;
++      if ((bit & ((ITYPE)1) << 35) != 0) x_35 += one;
++      if ((bit & ((ITYPE)1) << 36) != 0) x_36 += one;
++      if ((bit & ((ITYPE)1) << 37) != 0) x_37 += one;
++      if ((bit & ((ITYPE)1) << 38) != 0) x_38 += one;
++      if ((bit & ((ITYPE)1) << 39) != 0) x_39 += one;
++
++      if ((bit & ((ITYPE)1) << 40) != 0) x_40 += one;
++      if ((bit & ((ITYPE)1) << 41) != 0) x_41 += one;
++      if ((bit & ((ITYPE)1) << 42) != 0) x_42 += one;
++      if ((bit & ((ITYPE)1) << 43) != 0) x_43 += one;
++      if ((bit & ((ITYPE)1) << 44) != 0) x_44 += one;
++      if ((bit & ((ITYPE)1) << 45) != 0) x_45 += one;
++      if ((bit & ((ITYPE)1) << 46) != 0) x_46 += one;
++      if ((bit & ((ITYPE)1) << 47) != 0) x_47 += one;
++      if ((bit & ((ITYPE)1) << 48) != 0) x_48 += one;
++      if ((bit & ((ITYPE)1) << 49) != 0) x_49 += one;
++    }
++
++  q[ 0] = x_00;
++  q[ 1] = x_01;
++  q[ 2] = x_02;
++  q[ 3] = x_03;
++  q[ 4] = x_04;
++  q[ 5] = x_05;
++  q[ 6] = x_06;
++  q[ 7] = x_07;
++  q[ 8] = x_08;
++  q[ 9] = x_09;
++
++  q[10] = x_10;
++  q[11] = x_11;
++  q[12] = x_12;
++  q[13] = x_13;
++  q[14] = x_14;
++  q[15] = x_15;
++  q[16] = x_16;
++  q[17] = x_17;
++  q[18] = x_18;
++  q[19] = x_19;
++
++  q[20] = x_20;
++  q[21] = x_21;
++  q[22] = x_22;
++  q[23] = x_23;
++  q[24] = x_24;
++  q[25] = x_25;
++  q[26] = x_26;
++  q[27] = x_27;
++  q[28] = x_28;
++  q[29] = x_29;
++
++  q[30] = x_30;
++  q[31] = x_31;
++  q[32] = x_32;
++  q[33] = x_33;
++  q[34] = x_34;
++  q[35] = x_35;
++  q[36] = x_36;
++  q[37] = x_37;
++  q[38] = x_38;
++  q[39] = x_39;
++
++  q[40] = x_40;
++  q[41] = x_41;
++  q[42] = x_42;
++  q[43] = x_43;
++  q[44] = x_44;
++  q[45] = x_45;
++  q[46] = x_46;
++  q[47] = x_47;
++  q[48] = x_48;
++  q[49] = x_49;
++}
++
++/* { dg-final { scan-assembler     "lxssp "     } } */
++/* { dg-final { scan-assembler     "stxssp "    } } */
++/* { dg-final { scan-assembler-not "mfvsrd "    } } */
++/* { dg-final { scan-assembler-not "mtvsrd "    } } */
++/* { dg-final { scan-assembler-not "xscvdpspn " } } */
++
+Index: gcc/testsuite/gcc.target/powerpc/direct-move-vector.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/direct-move-vector.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/direct-move-vector.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,33 @@
++/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++/* Check code generation for direct move for long types.  */
++
++void
++test (vector double *p)
++{
++  vector double v1 = *p;
++  vector double v2;
++  vector double v3;
++  vector double v4;
++
++  /* Force memory -> FPR load.  */
++  __asm__ (" # reg %x0" : "+d" (v1));
++
++  /* force VSX -> GPR direct move.  */
++  v2 = v1;
++  __asm__ (" # reg %0" : "+r" (v2));
++
++  /* Force GPR -> Altivec direct move.  */
++  v3 = v2;
++  __asm__ (" # reg %x0" : "+v" (v3));
++  *p = v3;
++}
++
++/* { dg-final { scan-assembler "mfvsrd"  } } */
++/* { dg-final { scan-assembler "mfvsrld" } } */
++/* { dg-final { scan-assembler "mtvsrdd" } } */
++
++
+Index: gcc/testsuite/gcc.target/powerpc/extswsli-3.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/extswsli-3.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/extswsli-3.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,22 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++long
++do_ext_add (int *p, long a, long b)
++{
++  long l = *p;
++  long l2 = l << 4;
++  return l2 + ((l2 == 0) ? a : b);
++}
++
++long
++do_ext (int *p, long a, long b)
++{
++  long l = *p;
++  long l2 = l << 4;
++  return ((l2 == 0) ? a : b);
++}
++
++/* { dg-final { scan-assembler "extswsli\\. "} } */
+Index: gcc/testsuite/gcc.target/powerpc/ctz-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/ctz-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/ctz-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,13 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++int i_trailing_zero (int a) { return __builtin_ctz (a); }
++int l_trailing_zero (long a) { return __builtin_ctzl (a); }
++int ll_trailing_zero (long long a) { return __builtin_ctzll (a); }
++
++/* { dg-final { scan-assembler     "cnttzw " } } */
++/* { dg-final { scan-assembler     "cnttzd " } } */
++/* { dg-final { scan-assembler-not "cntlzw " } } */
++/* { dg-final { scan-assembler-not "cntlzd " } } */
+Index: gcc/testsuite/gcc.target/powerpc/float128-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/float128-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/float128-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,147 @@
++/* { dg-do run { target { powerpc*-*-linux* } } } */
++/* { dg-require-effective-target ppc_float128_sw } */
++/* { dg-options "-mcpu=power7 -O2 -mfloat128 -static-libgcc" } */
++
++#ifdef DEBUG
++#include <stdio.h>
++#include <stddef.h>
++#include <stdint.h>
++#include <inttypes.h>
++#endif
++
++#if !defined(__FLOAT128__) || !defined(_ARCH_PPC)
++static __float128
++pass_through (__float128 x)
++{
++  return x;
++}
++
++__float128 (*no_optimize) (__float128) = pass_through;
++#endif
++
++#ifdef DEBUG
++__attribute__((__noinline__))
++static void
++print_f128 (__float128 x)
++{
++  unsigned sign;
++  unsigned exponent;
++  uint64_t mantissa1;
++  uint64_t mantissa2;
++  uint64_t upper;
++  uint64_t lower;
++
++#if defined(_ARCH_PPC) && defined(__BIG_ENDIAN__)
++  struct ieee128 {
++    uint64_t upper;
++    uint64_t lower;
++  };
++
++#elif (defined(_ARCH_PPC) && defined(__LITTLE_ENDIAN__)) || defined(__x86_64__)
++  struct ieee128 {
++    uint64_t lower;
++    uint64_t upper;
++  };
++
++#else
++#error "Unknown system"
++#endif
++
++  union {
++    __float128 f128;
++    struct ieee128 s128;
++  } u;
++
++  u.f128 = x;
++  upper  = u.s128.upper;
++  lower  = u.s128.lower;
++
++  sign      = (unsigned)((upper >> 63) & 1);
++  exponent  = (unsigned)((upper >> 48) & ((((uint64_t)1) << 16) - 1));
++  mantissa1 = (upper & ((((uint64_t)1) << 48) - 1));
++  mantissa2 = lower;
++
++  printf ("%c 0x%.4x 0x%.12" PRIx64 " 0x%.16" PRIx64,
++	  sign ? '-' : '+',
++	  exponent,
++	  mantissa1,
++	  mantissa2);
++}
++#endif
++
++__attribute__((__noinline__))
++static void
++do_test (__float128 expected, __float128 got, const char *name)
++{
++  int equal_p = (expected == got);
++
++#ifdef DEBUG
++  printf ("Test %s, expected: ", name);
++  print_f128 (expected);
++  printf (" %5g, got: ", (double) expected);
++  print_f128 (got);
++  printf (" %5g, result %s\n",
++	  (double) got,
++	  (equal_p) ? "equal" : "not equal");
++#endif
++
++  if (!equal_p)
++    __builtin_abort ();
++}
++
++
++int
++main (void)
++{
++  __float128 one	= 1.0q;
++  __float128 two	= 2.0q;
++  __float128 three	= 3.0q;
++  __float128 four	= 4.0q;
++  __float128 five	= 5.0q;
++  __float128 add_result = (1.0q + 2.0q);
++  __float128 mul_result = ((1.0q + 2.0q) * 3.0q);
++  __float128 div_result = (((1.0q + 2.0q) * 3.0q) / 4.0q);
++  __float128 sub_result = ((((1.0q + 2.0q) * 3.0q) / 4.0q) - 5.0q);
++  __float128 neg_result = - sub_result;
++  __float128 add_xresult;
++  __float128 mul_xresult;
++  __float128 div_xresult;
++  __float128 sub_xresult;
++  __float128 neg_xresult;
++
++#if defined(__FLOAT128__) && defined(_ARCH_PPC)
++  __asm__ (" #prevent constant folding, %x0" : "+wa" (one));
++  __asm__ (" #prevent constant folding, %x0" : "+wa" (two));
++  __asm__ (" #prevent constant folding, %x0" : "+wa" (three));
++  __asm__ (" #prevent constant folding, %x0" : "+wa" (four));
++  __asm__ (" #prevent constant folding, %x0" : "+wa" (five));
++
++#else
++  one   = no_optimize (one);
++  two   = no_optimize (two);
++  three = no_optimize (three);
++  four  = no_optimize (four);
++  five  = no_optimize (five);
++#endif
++
++  add_xresult = (one + two);
++  do_test (add_result, add_xresult, "add");
++
++  mul_xresult = add_xresult * three;
++  do_test (mul_result, mul_xresult, "mul");
++
++  div_xresult = mul_xresult / four;
++  do_test (div_result, div_xresult, "div");
++
++  sub_xresult = div_xresult - five;
++  do_test (sub_result, sub_xresult, "sub");
++
++  neg_xresult = - sub_xresult;
++  do_test (neg_result, neg_xresult, "neg");
++
++#ifdef DEBUG
++  printf ("Passed\n");
++#endif
++
++  return 0;
++}
+Index: gcc/testsuite/gcc.target/powerpc/ctz-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/ctz-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/ctz-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,9 @@
++/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++int i_trailing_zero (int a) { return __builtin_ctz (a); }
++
++/* { dg-final { scan-assembler     "cnttzw " } } */
++/* { dg-final { scan-assembler-not "cntlzw " } } */
+Index: gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,26 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O3" } */
++/* { dg-final { scan-assembler "lxvx" } } */
++/* { dg-final { scan-assembler "stxvx" } } */
++/* { dg-final { scan-assembler-not "lxvd2x" } } */
++/* { dg-final { scan-assembler-not "stxvd2x" } } */
++/* { dg-final { scan-assembler-not "xxpermdi" } } */
++
++/* Verify P9 vector loads and stores are used rather than the
++   load-swap/swap-store workarounds for P8.  */
++#define N 16
++
++signed char ca[N] __attribute__((aligned(16)));
++signed char cb[] __attribute__((aligned(16)))
++  = {8, 7, 6, 5, 4, 3, 2,  1,  0, -1, -2, -3, -4, -5, -6, -7};
++signed char cc[] __attribute__((aligned(16)))
++  = {1, 1, 2, 2, 3, 3, 2,  2,  1,  1,  0,  0, -1, -1, -2, -2};
++
++__attribute__((noinline)) void foo ()
++{
++  int i;
++  for (i = 0; i < N; i++) {
++    ca[i] = cb[i] - cc[i];
++  }
++}
+Index: gcc/testsuite/gcc.target/powerpc/float128-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/float128-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/float128-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,226 @@
++/* { dg-do run { target { powerpc*-*-linux* } } } */
++/* { dg-require-effective-target ppc_float128_sw } */
++/* { dg-options "-mcpu=power7 -O2 -mfloat128 -static-libgcc" } */
++
++/*
++ * Test program to make sure we are getting more precision than the 53 bits we
++ * get with IEEE double.
++ */
++
++#include <stdio.h>
++#include <math.h>
++#include <stdlib.h>
++#include <stddef.h>
++
++#ifndef TYPE
++#define TYPE __float128
++#endif
++
++#ifndef NO_INLINE
++#define NO_INLINE __attribute__((__noinline__))
++#endif
++
++static TYPE power_of_two (ssize_t) NO_INLINE;
++static TYPE calc1 (TYPE) NO_INLINE;
++static TYPE calc2 (TYPE) NO_INLINE;
++static TYPE calc3 (TYPE) NO_INLINE;
++
++#ifndef POWER2
++#define POWER2 60
++#endif
++
++
++/*
++ * Print TYPE in hex.
++ */
++
++
++#if defined(DEBUG) || defined(DEBUG2)
++static void print_hex (const char *prefix, TYPE, const char *suffix) NO_INLINE;
++
++#if defined (__i386__) || defined (__x86_64__) || defined (__LITTLE_ENDIAN__)
++#define ENDIAN_REVERSE(N, MAX)        ((MAX) - 1 - (N))
++
++#else
++#define ENDIAN_REVERSE(N, MAX)        (N)
++#endif
++
++static void
++print_hex (const char *prefix, TYPE value, const char *suffix)
++{
++  union {
++    TYPE f128;
++    unsigned char uc[sizeof (TYPE)];
++  } u;
++
++  size_t i;
++
++  u.f128 = value;
++  printf ("%s0x", prefix);
++  for (i = 0; i < sizeof (TYPE); i++)
++    printf ("%.2x", u.uc[ ENDIAN_REVERSE (i, sizeof (TYPE)) ]);
++
++  printf (", %24.2Lf%s", (long double)value, suffix);
++}
++#endif
++
++
++/*
++ * Return a power of two.
++ */
++
++static TYPE
++power_of_two (ssize_t num)
++{
++  TYPE ret = (TYPE) 1.0;
++  ssize_t i;
++
++  if (num >= 0)
++    {
++      for (i = 0; i < num; i++)
++	ret *= (TYPE) 2.0;
++    }
++  else
++    {
++      ssize_t num2 = -num;
++      for (i = 0; i < num2; i++)
++	ret /= (TYPE) 2.0;
++    }
++
++#ifdef DEBUG
++  printf ("power_of_two (%2ld)   = ", (long) num);
++  print_hex ("", ret, "\n");
++#endif
++
++  return ret;
++}
++
++
++#ifdef ADDSUB
++static TYPE add (TYPE a, TYPE b) NO_INLINE;
++static TYPE sub (TYPE a, TYPE b) NO_INLINE;
++
++static TYPE
++add (TYPE a, TYPE b)
++{
++  TYPE c;
++#ifdef DEBUG
++  print_hex ("add, arg1           = ", a, "\n");
++  print_hex ("add, arg2           = ", b, "\n");
++#endif
++  c = a + b;
++#ifdef DEBUG
++  print_hex ("add, result         = ", c, "\n");
++#endif
++  return c;
++}
++
++static TYPE
++sub (TYPE a, TYPE b)
++{
++  TYPE c;
++#ifdef DEBUG
++  print_hex ("sub, arg1           = ", a, "\n");
++  print_hex ("sub, arg2           = ", b, "\n");
++#endif
++  c = a - b;
++#ifdef DEBUG
++  print_hex ("sub, result         = ", c, "\n");
++#endif
++  return c;
++}
++
++#else
++#define add(x, y) ((x) + (y))
++#define sub(x, y) ((x) - (y))
++#endif
++
++/*
++ * Various calculations.  Add in 2**POWER2, and subtract 2**(POWER2-1) twice, and we should
++ * get the original value.
++ */
++
++static TYPE
++calc1 (TYPE num)
++{
++  TYPE num2 = add (power_of_two (POWER2), num);
++  TYPE ret;
++
++#ifdef DEBUG
++  print_hex ("calc1 (before call) = ", num2, "\n");
++#endif
++
++  ret = calc2 (num2);
++
++#ifdef DEBUG
++  print_hex ("calc1 (after call)  = ", ret, "\n");
++#endif
++
++  return ret;
++}
++
++static TYPE
++calc2 (TYPE num)
++{
++  TYPE num2 = sub (num, power_of_two (POWER2-1));
++  TYPE ret;
++
++#ifdef DEBUG
++  print_hex ("calc2 (before call) = ", num2, "\n");
++#endif
++
++  ret = calc3 (num2);
++
++#ifdef DEBUG
++  print_hex ("calc2 (after call)  = ", ret, "\n");
++#endif
++
++  return ret;
++}
++
++static TYPE
++calc3 (TYPE num)
++{
++  TYPE ret = sub (num, (((TYPE) 2.0) * power_of_two (POWER2-2)));
++
++#ifdef DEBUG
++  print_hex ("calc3               = ", ret, "\n");
++#endif
++
++  return ret;
++}
++
++
++int
++main (void)
++{
++  TYPE input, output;
++
++#ifdef DEBUG
++  printf ("Testing, %ld bytes\n", (long) sizeof (TYPE));
++#endif
++
++  input = power_of_two (-1);
++  if ((double)input != 0.5)
++    {
++#if defined(DEBUG) || defined(DEBUG2)
++      print_hex ("Input should be 0.5:  ", output, "\n");
++      return 1;
++#else
++      __builtin_abort ();
++#endif
++    }
++
++  output = calc1 (input);
++  if ((double)output != 0.5)
++    {
++#if defined(DEBUG) || defined(DEBUG2)
++      print_hex ("Output should be 0.5: ", output, "\n");
++      return 1;
++#else
++      __builtin_abort ();
++#endif
++    }
++
++  return 0;
++}
+Index: gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-lxvx-stxvx-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,15 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O1" } */
++/* { dg-final { scan-assembler "lxvx" } } */
++/* { dg-final { scan-assembler "stvewx" } } */
++/* { dg-final { scan-assembler-not "lxvd2x" } } */
++
++/* Verify we don't perform P8 load-vector fusion on P9.  */
++#include <altivec.h>
++
++void f (void *p)
++{
++  vector unsigned int u32 = vec_vsx_ld (1, (const unsigned int *)p);
++  vec_ste (u32, 1, (unsigned int *)p);
++}
+Index: gcc/testsuite/gcc.target/powerpc/pr70640.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr70640.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr70640.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,11 @@
++/* { dg-do compile { target { powerpc*-*-linux* } } } */
++/* { dg-require-effective-target powerpc_float128_sw_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
++/* { dg-options "-O2 -mcpu=power8 -mfloat128" } */
++
++__float128 foo (__float128 a) { return -a; }
++
++/* { dg-final { scan-assembler "xxlorc" } } */
++/* { dg-final { scan-assembler "xxlxor" } } */
++/* { dg-final { scan-assembler "vslb"   } } */
++/* { dg-final { scan-assembler "vsldoi" } } */
+Index: gcc/testsuite/gcc.target/powerpc/float128-hw.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/float128-hw.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/float128-hw.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,18 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_float128_hw_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++__float128 f128_add (__float128 a, __float128 b) { return a+b; }
++__float128 f128_sub (__float128 a, __float128 b) { return a-b; }
++__float128 f128_mul (__float128 a, __float128 b) { return a*b; }
++__float128 f128_div (__float128 a, __float128 b) { return a/b; }
++__float128 f128_fma (__float128 a, __float128 b, __float128 c) { return (a*b)+c; }
++long f128_cmove (__float128 a, __float128 b, long c, long d) { return (a == b) ? c : d; }
++
++/* { dg-final { scan-assembler "xsaddqp"  } } */
++/* { dg-final { scan-assembler "xssubqp"  } } */
++/* { dg-final { scan-assembler "xsmulqp"  } } */
++/* { dg-final { scan-assembler "xsdivqp"  } } */
++/* { dg-final { scan-assembler "xsmaddqp" } } */
++/* { dg-final { scan-assembler "xscmpuqp" } } */
+Index: gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,65 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++
++void
++use_cpu_is_builtins (unsigned int *p)
++{
++  p[0] = __builtin_cpu_is ("power9");
++  p[1] = __builtin_cpu_is ("power8");
++  p[2] = __builtin_cpu_is ("power7");
++  p[3] = __builtin_cpu_is ("power6x");
++  p[4] = __builtin_cpu_is ("power6");
++  p[5] = __builtin_cpu_is ("power5+");
++  p[6] = __builtin_cpu_is ("power5");
++  p[7] = __builtin_cpu_is ("ppc970");
++  p[8] = __builtin_cpu_is ("power4");
++  p[9] = __builtin_cpu_is ("ppca2");
++  p[10] = __builtin_cpu_is ("ppc476");
++  p[11] = __builtin_cpu_is ("ppc464");
++  p[12] = __builtin_cpu_is ("ppc440");
++  p[13] = __builtin_cpu_is ("ppc405");
++  p[14] = __builtin_cpu_is ("ppc-cell-be");
++}
++
++void
++use_cpu_supports_builtins (unsigned int *p)
++{
++  p[0] = __builtin_cpu_supports ("4xxmac");
++  p[1] = __builtin_cpu_supports ("altivec");
++  p[2] = __builtin_cpu_supports ("arch_2_05");
++  p[3] = __builtin_cpu_supports ("arch_2_06");
++  p[4] = __builtin_cpu_supports ("arch_2_07");
++  p[5] = __builtin_cpu_supports ("arch_3_00");
++  p[6] = __builtin_cpu_supports ("archpmu");
++  p[7] = __builtin_cpu_supports ("booke");
++  p[8] = __builtin_cpu_supports ("cellbe");
++  p[9] = __builtin_cpu_supports ("dfp");
++  p[10] = __builtin_cpu_supports ("dscr");
++  p[11] = __builtin_cpu_supports ("ebb");
++  p[12] = __builtin_cpu_supports ("efpdouble");
++  p[13] = __builtin_cpu_supports ("efpsingle");
++  p[14] = __builtin_cpu_supports ("fpu");
++  p[15] = __builtin_cpu_supports ("htm");
++  p[16] = __builtin_cpu_supports ("htm-nosc");
++  p[17] = __builtin_cpu_supports ("ic_snoop");
++  p[18] = __builtin_cpu_supports ("ieee128");
++  p[19] = __builtin_cpu_supports ("isel");
++  p[20] = __builtin_cpu_supports ("mmu");
++  p[21] = __builtin_cpu_supports ("notb");
++  p[22] = __builtin_cpu_supports ("pa6t");
++  p[23] = __builtin_cpu_supports ("power4");
++  p[24] = __builtin_cpu_supports ("power5");
++  p[25] = __builtin_cpu_supports ("power5+");
++  p[26] = __builtin_cpu_supports ("power6x");
++  p[27] = __builtin_cpu_supports ("ppc32");
++  p[28] = __builtin_cpu_supports ("ppc601");
++  p[29] = __builtin_cpu_supports ("ppc64");
++  p[30] = __builtin_cpu_supports ("ppcle");
++  p[31] = __builtin_cpu_supports ("smt");
++  p[32] = __builtin_cpu_supports ("spe");
++  p[33] = __builtin_cpu_supports ("tar");
++  p[34] = __builtin_cpu_supports ("true_le");
++  p[35] = __builtin_cpu_supports ("ucache");
++  p[36] = __builtin_cpu_supports ("vcrypto");
++  p[37] = __builtin_cpu_supports ("vsx");
++}
+Index: gcc/testsuite/gcc.target/powerpc/mod-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/mod-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/mod-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,20 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++int ismod (int a, int b) { return a%b; }
++long lsmod (long a, long b) { return a%b; }
++unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
++unsigned long lumod (unsigned long a, unsigned long b) { return a%b; }
++
++/* { dg-final { scan-assembler-times "modsw " 1 } } */
++/* { dg-final { scan-assembler-times "modsd " 1 } } */
++/* { dg-final { scan-assembler-times "moduw " 1 } } */
++/* { dg-final { scan-assembler-times "modud " 1 } } */
++/* { dg-final { scan-assembler-not   "mullw "   } } */
++/* { dg-final { scan-assembler-not   "mulld "   } } */
++/* { dg-final { scan-assembler-not   "divw "    } } */
++/* { dg-final { scan-assembler-not   "divd "    } } */
++/* { dg-final { scan-assembler-not   "divwu "   } } */
++/* { dg-final { scan-assembler-not   "divdu "   } } */
+Index: gcc/testsuite/gcc.target/powerpc/mod-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/mod-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/mod-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,13 @@
++/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++int ismod (int a, int b) { return a%b; }
++unsigned int iumod (unsigned int a, unsigned int b) { return a%b; }
++
++/* { dg-final { scan-assembler-times "modsw " 1 } } */
++/* { dg-final { scan-assembler-times "moduw " 1 } } */
++/* { dg-final { scan-assembler-not   "mullw "   } } */
++/* { dg-final { scan-assembler-not   "divw "    } } */
++/* { dg-final { scan-assembler-not   "divwu "   } } */
+Index: gcc/testsuite/gcc.target/powerpc/fusion2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/fusion2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/fusion2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_p8vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
++/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */
++
++vector double fusion_vector (vector double *p) { return p[2]; }
++
++/* { dg-final { scan-assembler-times "vector load fusion" 1 } } */
+Index: gcc/testsuite/gcc.target/powerpc/maddld.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/maddld.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/maddld.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,20 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-require-effective-target powerpc_p9modulo_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++long
++s_madd (long a, long b, long c)
++{
++  return (a * b) + c;
++}
++
++unsigned long
++u_madd (unsigned long a, unsigned long b, unsigned long c)
++{
++  return (a * b) + c;
++}
++
++/* { dg-final { scan-assembler-times "maddld " 2 } } */
++/* { dg-final { scan-assembler-not   "mulld "    } } */
++/* { dg-final { scan-assembler-not   "add "      } } */
+Index: gcc/testsuite/gcc.target/powerpc/fusion3.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/fusion3.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/fusion3.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,18 @@
++/* { dg-do compile { target { powerpc*-*-* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_p9vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
++/* { dg-options "-mcpu=power7 -mtune=power9 -O3" } */
++
++#define LARGE 0x12345
++
++int fusion_float_read (float *p){ return p[LARGE]; }
++int fusion_double_read (double *p){ return p[LARGE]; }
++
++void fusion_float_write (float *p, float f){ p[LARGE] = f; }
++void fusion_double_write (double *p, double d){ p[LARGE] = d; }
++
++/* { dg-final { scan-assembler "load fusion, type SF"  } } */
++/* { dg-final { scan-assembler "load fusion, type DF"  } } */
++/* { dg-final { scan-assembler "store fusion, type SF" } } */
++/* { dg-final { scan-assembler "store fusion, type DF" } } */
+Index: gcc/testsuite/gcc.target/powerpc/pr67071-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr67071-1.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr67071-1.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,34 @@
++/* { dg-do compile { target powerpc*-*-* } } */
++/* { dg-require-effective-target powerpc_altivec_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
++/* { dg-options "-mcpu=power6 -maltivec" } */
++
++vector unsigned char
++foo_char (void)
++{
++  return (vector unsigned char) {
++    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
++    0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80
++  };
++}
++
++vector unsigned short
++foo_short (void)
++{
++  return (vector unsigned short) {
++    0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000
++  };
++}
++
++vector unsigned int
++foo_int (void)
++{
++  return (vector unsigned int) {
++    0x80000000u, 0x80000000u, 0x80000000u, 0x80000000u,
++  };
++}
++
++/* { dg-final { scan-assembler-times "vspltisw" 3 } } */
++/* { dg-final { scan-assembler-times "vslb"     1 } } */
++/* { dg-final { scan-assembler-times "vslh"     1 } } */
++/* { dg-final { scan-assembler-times "vslw"     1 } } */
+Index: gcc/testsuite/gcc.target/powerpc/pr67071-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr67071-2.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr67071-2.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,48 @@
++/* { dg-do compile { target powerpc*-*-* } } */
++/* { dg-require-effective-target powerpc_altivec_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
++/* { dg-options "-mcpu=power6 -maltivec" } */
++
++vector unsigned char
++foo_char (void)
++{
++  return (vector unsigned char) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
++#else
++    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80
++#endif
++  };
++}
++
++vector unsigned short
++foo_short (void)
++{
++  return (vector unsigned short) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x8000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
++#else
++    0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x8000
++#endif
++  };
++}
++
++vector unsigned int
++foo_int (void)
++{
++  return (vector unsigned int) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x80000000u, 0x00000000u, 0x00000000u, 0x00000000u,
++#else
++    0x00000000u, 0x00000000u, 0x00000000u, 0x80000000u,
++#endif
++  };
++}
++
++/* { dg-final { scan-assembler-times "vspltisw" 3 } } */
++/* { dg-final { scan-assembler-times "vsldoi"   3 } } */
++/* { dg-final { scan-assembler-times "vslb"     1 } } */
++/* { dg-final { scan-assembler-times "vslh"     1 } } */
++/* { dg-final { scan-assembler-times "vslw"     1 } } */
+Index: gcc/testsuite/gcc.target/powerpc/p9-permute.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/p9-permute.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/p9-permute.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,20 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
++/* { dg-options "-mcpu=power9 -O2" } */
++
++#include <altivec.h>
++
++vector long long
++permute (vector long long *p, vector long long *q, vector unsigned char mask)
++{
++  vector long long a = *p;
++  vector long long b = *q;
++
++  /* Force a, b to be in FPR registers.  */
++  __asm__ (" # a: %x0, b: %x1" : "+d" (a), "+d" (b));
++
++  return vec_perm (a, b, mask);
++}
++
++/* { dg-final { scan-assembler	   "xxperm" } } */
++/* { dg-final { scan-assembler-not "vperm"  } } */
+Index: gcc/testsuite/gcc.target/powerpc/fusion.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/fusion.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/fusion.c	(.../ibm/gcc-5-branch)
+@@ -1,6 +1,5 @@
+ /* { dg-do compile { target { powerpc*-*-* } } } */
+ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+-/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */
+ /* { dg-require-effective-target powerpc_p8vector_ok } */
+ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+ /* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */
+@@ -14,10 +13,7 @@
+ int fusion_int (int *p){ return p[LARGE]; }
+ unsigned fusion_uns (unsigned *p){ return p[LARGE]; }
+ 
+-vector double fusion_vector (vector double *p) { return p[2]; }
+-
+ /* { dg-final { scan-assembler-times "gpr load fusion"    6 } } */
+-/* { dg-final { scan-assembler-times "vector load fusion" 1 } } */
+ /* { dg-final { scan-assembler-times "lbz"                2 } } */
+ /* { dg-final { scan-assembler-times "extsb"              1 } } */
+ /* { dg-final { scan-assembler-times "lhz"                2 } } */
+Index: gcc/testsuite/gcc.target/powerpc/float128-call.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/float128-call.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/float128-call.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,27 @@
++/* { dg-do compile { target { powerpc*-*-linux* } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_vsx_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
++/* { dg-options "-O2 -mcpu=power7 -mfloat128 -mno-regnames" } */
++
++#ifndef __FLOAT128__
++#error "-mfloat128 is not supported."
++#endif
++
++#ifdef __LONG_DOUBLE_IEEE128__
++#define TYPE long double
++#define ONE  1.0L
++
++#else
++#define TYPE __float128
++#define ONE  1.0Q
++#endif
++
++/* Test to make sure vector registers are used for passing IEEE 128-bit
++   floating point values and returning them. Also make sure the 'q' suffix is
++   handled.  */
++TYPE one (void) { return ONE; }
++void store (TYPE a, TYPE *p) { *p = a; }
++
++/* { dg-final { scan-assembler "lxvd2x 34"  } } */
++/* { dg-final { scan-assembler "stxvd2x 34" } } */
+Index: gcc/testsuite/gcc.target/powerpc/pr67071-3.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr67071-3.c	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/gcc.target/powerpc/pr67071-3.c	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,48 @@
++/* { dg-do compile { target powerpc*-*-* } } */
++/* { dg-require-effective-target powerpc_altivec_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
++/* { dg-options "-mcpu=power6 -maltivec" } */
++
++
++vector unsigned char
++foo_char (void)
++{
++  return (vector unsigned char) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x80, 0x80, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
++#else
++    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
++    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80, 0x80
++#endif
++  };
++}
++
++vector unsigned short
++foo_short (void)
++{
++  return (vector unsigned short) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x8000, 0x8000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff
++#else
++    0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x8000, 0x8000
++#endif
++  };
++}
++
++vector unsigned int
++foo_int (void)
++{
++  return (vector unsigned int) {
++#if __VEC_ELEMENT_REG_ORDER__ == __ORDER_BIG_ENDIAN__
++    0x80000000u, 0x80000000u, 0xffffffffu, 0xffffffffu,
++#else
++    0xffffffffu, 0xffffffffu, 0x80000000u, 0x80000000u,
++#endif
++  };
++}
++
++/* { dg-final { scan-assembler-times "vslb"   1 } } */
++/* { dg-final { scan-assembler-times "vslh"   1 } } */
++/* { dg-final { scan-assembler-times "vslw"   1 } } */
++/* { dg-final { scan-assembler-times "vsldoi" 3 } } */
+Index: gcc/testsuite/ChangeLog.ibm
+===================================================================
+--- a/src/gcc/testsuite/ChangeLog.ibm	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/ChangeLog.ibm	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,167 @@
++2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234917.
++
++2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from the trunk
++	2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/70680
++	* gcc.target/powerpc/pr70640.c: New test.
++
++2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234888.
++
++	Backport from mainline
++	2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/70381
++	* gcc.target/powerpc/float128-1.c: New tests to make sure the
++	__float128 emulator is built and runs.
++	* gcc.target/powerpc/float128-1.c: Likewise.
++
++	* lib/target-supports.exp (check_ppc_float128_sw_available):
++	Rework tests for __float128 software and hardware
++	availability. Fix exit condition to return 0 on success.
++
++2016-03-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234461.
++
++2016-03-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from mainline
++	2015-08-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/67071
++	* gcc.target/powerpc/pr67071-1.c: New file to test PR 67071 new
++	vector constants.
++	* gcc.target/powerpc/pr67071-2.c: Likewise.
++	* gcc.target/powerpc/pr67071-3.c: Likewise.
++
++2016-03-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234186.
++
++2016-02-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from trunk
++	2016-02-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/69667
++	* g++.dg/pr69667.C: New file.
++
++2016-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2015-11-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/float128-hw.c: New test for IEEE 128-bit
++	hardware floating point support.
++
++	Backport from mainline:
++	2015-10-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/float128-call.c: New test for -mfloat128 on
++	PowerPC.
++	* gcc.target/powerpc/float128-mix.c: Likewise.
++
++2016-01-20  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Backport from mainline:
++	2016-01-20  Peter Bergner  <bergner@vnet.ibm.com>
++
++	* gcc.target/powerpc/cpu-builtin-1.c: New test.
++
++2016-01-19  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2016-01-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/p9-permute.c: New test for xxperm code
++	generation.
++
++2015-01-13  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2015-12-28  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/p9-lxvx-stxvx-1.c: New.
++	* gcc.target/powerpc/p9-lxvx-stxvx-2.c: New.
++
++2015-11-25  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2015-11-25  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/dform-1.c: New test.
++	* gcc.target/powerpc/dform-2.c: Likewise.
++
++2015-11-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 230841.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 230686.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk.
++	2015-11-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/maddld.c: New test.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk
++	2015-11-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* gcc.target/powerpc/direct-move-vector.c: New test for 128-bit
++	vector direct move instructions.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk
++	2015-11-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* lib/target-supports.exp (check_p8vector_hw_available): Split
++	long line.
++	(check_vsx_hw_available): Likewise.
++	(check_p9vector_hw_available): Add new checks for ISA 3.0 hardware
++	support and for PowerPC float128 support.
++	(check_p9modulo_hw_available): Likewise.
++	(check_ppc_float128_sw_available): Likewise.
++	(check_ppc_float128_hw_available): Likewise.
++	(check_effective_target_powerpc_p9vector_ok): Likewise.
++	(check_effective_target_powerpc_p9modulo_ok): Likewise.
++	(check_effective_target_powerpc_float128_sw_ok): Likewise.
++	(check_effective_target_powerpc_float128_hw_ok): Likewise.
++	(is-effective-target): Add new PowerPc targets.
++	(is-effective-target-keyword): Likewise.
++	(check_vect_support_and_set_flags): If we have ISA 3.0 vector
++	instructions, use it.
++
++	* gcc.target/powerpc/mod-1.c: New test for ISA 3.0 instructions.
++	* gcc.target/powerpc/mod-2.c: Likewise.
++	* gcc.target/powerpc/ctz-1.c: Likewise.
++	* gcc.target/powerpc/ctz-2.c: Likewise.
++	* gcc.target/powerpc/extswsli-1.c: Likewise.
++	* gcc.target/powerpc/extswsli-2.c: Likewise.
++	* gcc.target/powerpc/extswsli-3.c: Likewise.
++
++	* gcc.target/powerpc/fusion.c (fusion_vector): Move to fusion2.c
++	and allow the test on PowerPC LE.
++	* gcc.target/powerpc/fusion2.c (fusion_vector): Likewise.
++	* gcc.target/powerpc/fusion3.c: New file, test power9 fusion.
++
++2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 227146.
++
++2015-04-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Clone gcc-5-branch, subversion id 222422.
++
+Index: gcc/testsuite/lib/target-supports.exp
+===================================================================
+--- a/src/gcc/testsuite/lib/target-supports.exp	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/lib/target-supports.exp	(.../ibm/gcc-5-branch)
+@@ -1538,7 +1538,9 @@
+     return [check_cached_effective_target p8vector_hw_available {
+ 	# Some simulators are known to not support VSX/power8 instructions.
+ 	# For now, disable on Darwin
+-	if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
+ 	    expr 0
+ 	} else {
+ 	    set options "-mpower8-vector"
+@@ -1557,6 +1559,112 @@
+     }]
+ }
+ 
++# Return 1 if the target supports executing power9 vector instructions, 0
++# otherwise.  Cache the result.
++
++proc check_p9vector_hw_available { } {
++    return [check_cached_effective_target p9vector_hw_available {
++	# Some simulators are known to not support VSX/power8/power9
++	# instructions.	For now, disable on Darwin.
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
++	    expr 0
++	} else {
++	    set options "-mpower9-vector"
++	    check_runtime_nocache p9vector_hw_available {
++		int main()
++		{
++		    long e = -1;
++		    vector double v = (vector double) { 0.0, 0.0 };
++		    asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
++		    return e;
++		}
++	    } $options
++	}
++    }]
++}
++
++# Return 1 if the target supports executing power9 modulo instructions, 0
++# otherwise.  Cache the result.
++
++proc check_p9modulo_hw_available { } {
++    return [check_cached_effective_target p9modulo_hw_available {
++	# Some simulators are known to not support VSX/power8/power9
++	# instructions.	For now, disable on Darwin.
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
++	    expr 0
++	} else {
++	    set options "-mmodulo"
++	    check_runtime_nocache p9modulo_hw_available {
++		int main()
++		{
++		    int i = 5, j = 3, r = -1;
++		    asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
++		    return (r == 2);
++		}
++	    } $options
++	}
++    }]
++}
++
++# Return 1 if the target supports executing __float128 on PowerPC via software
++# emulation, 0 otherwise.  Cache the result.
++
++proc check_ppc_float128_sw_available { } {
++    return [check_cached_effective_target ppc_float128_sw_available {
++	# Some simulators are known to not support VSX/power8/power9
++	# instructions.	For now, disable on Darwin.
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
++	    expr 0
++	} else {
++	    set options "-mfloat128 -mvsx"
++	    check_runtime_nocache ppc_float128_sw_available {
++		volatile __float128 x = 1.0q;
++		volatile __float128 y = 2.0q;
++		int main()
++		{
++		    __float128 z = x + y;
++		    return (z != 3.0q);
++		}
++	    } $options
++	}
++    }]
++}
++
++# Return 1 if the target supports executing __float128 on PowerPC via power9
++# hardware instructions, 0 otherwise.  Cache the result.
++
++proc check_ppc_float128_hw_available { } {
++    return [check_cached_effective_target ppc_float128_hw_available {
++	# Some simulators are known to not support VSX/power8/power9
++	# instructions.	For now, disable on Darwin.
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
++	    expr 0
++	} else {
++	    set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
++	    check_runtime_nocache ppc_float128_hw_available {
++		volatile __float128 x = 1.0q;
++		volatile __float128 y = 2.0q;
++		int main()
++		{
++		    __float128 z = x + y;
++		    __float128 w = -1.0q;
++
++		    __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
++		    return ((z != 3.0q) || (z != w);
++		}
++	    } $options
++	}
++    }]
++}
++
+ # Return 1 if the target supports executing VSX instructions, 0
+ # otherwise.  Cache the result.
+ 
+@@ -1564,7 +1672,9 @@
+     return [check_cached_effective_target vsx_hw_available {
+ 	# Some simulators are known to not support VSX instructions.
+ 	# For now, disable on Darwin
+-	if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
++	if { [istarget powerpc-*-eabi]
++	     || [istarget powerpc*-*-eabispe]
++	     || [istarget *-*-darwin*]} {
+ 	    expr 0
+ 	} else {
+ 	    set options "-mvsx"
+@@ -3282,6 +3392,108 @@
+     }
+ }
+ 
++# Return 1 if this is a PowerPC target supporting -mpower9-vector
++
++proc check_effective_target_powerpc_p9vector_ok { } {
++    if { ([istarget powerpc*-*-*]
++         && ![istarget powerpc-*-linux*paired*])
++	 || [istarget rs6000-*-*] } {
++	# AltiVec is not supported on AIX before 5.3.
++	if { [istarget powerpc*-*-aix4*]
++	     || [istarget powerpc*-*-aix5.1*] 
++	     || [istarget powerpc*-*-aix5.2*] } {
++	    return 0
++	}
++	return [check_no_compiler_messages powerpc_p9vector_ok object {
++	    int main (void) {
++		long e = -1;
++		vector double v = (vector double) { 0.0, 0.0 };
++		asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
++		return e;
++	    }
++	} "-mpower9-vector"]
++    } else {
++	return 0
++    }
++}
++
++# Return 1 if this is a PowerPC target supporting -mmodulo
++
++proc check_effective_target_powerpc_p9modulo_ok { } {
++    if { ([istarget powerpc*-*-*]
++         && ![istarget powerpc-*-linux*paired*])
++	 || [istarget rs6000-*-*] } {
++	# AltiVec is not supported on AIX before 5.3.
++	if { [istarget powerpc*-*-aix4*]
++	     || [istarget powerpc*-*-aix5.1*] 
++	     || [istarget powerpc*-*-aix5.2*] } {
++	    return 0
++	}
++	return [check_no_compiler_messages powerpc_p9modulo_ok object {
++	    int main (void) {
++		int i = 5, j = 3, r = -1;
++		asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
++		return (r == 2);
++	    }
++	} "-mmodulo"]
++    } else {
++	return 0
++    }
++}
++
++# Return 1 if this is a PowerPC target supporting -mfloat128 via either
++# software emulation on power7/power8 systems or hardware support on power9.
++
++proc check_effective_target_powerpc_float128_sw_ok { } {
++    if { ([istarget powerpc*-*-*]
++         && ![istarget powerpc-*-linux*paired*])
++	 || [istarget rs6000-*-*] } {
++	# AltiVec is not supported on AIX before 5.3.
++	if { [istarget powerpc*-*-aix4*]
++	     || [istarget powerpc*-*-aix5.1*] 
++	     || [istarget powerpc*-*-aix5.2*] } {
++	    return 0
++	}
++	return [check_no_compiler_messages powerpc_float128_sw_ok object {
++		volatile __float128 x = 1.0q;
++		volatile __float128 y = 2.0q;
++		int main() {
++		    __float128 z = x + y;
++		    return (z == 3.0q);
++		}
++	    } "-mfloat128 -mvsx"]
++    } else {
++	return 0
++    }
++}
++
++# Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
++# support on power9.
++
++proc check_effective_target_powerpc_float128_hw_ok { } {
++    if { ([istarget powerpc*-*-*]
++         && ![istarget powerpc-*-linux*paired*])
++	 || [istarget rs6000-*-*] } {
++	# AltiVec is not supported on AIX before 5.3.
++	if { [istarget powerpc*-*-aix4*]
++	     || [istarget powerpc*-*-aix5.1*] 
++	     || [istarget powerpc*-*-aix5.2*] } {
++	    return 0
++	}
++	return [check_no_compiler_messages powerpc_float128_hw_ok object {
++		volatile __float128 x = 1.0q;
++		volatile __float128 y = 2.0q;
++		int main() {
++		    __float128 z;
++		    __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
++		    return (z == 3.0q);
++		}
++	} "-mfloat128-hardware"]
++    } else {
++	return 0
++    }
++}
++
+ # Return 1 if this is a PowerPC target supporting -mvsx
+ 
+ proc check_effective_target_powerpc_vsx_ok { } {
+@@ -5349,6 +5561,10 @@
+ 	  "vmx_hw"         { set selected [check_vmx_hw_available] }
+ 	  "vsx_hw"         { set selected [check_vsx_hw_available] }
+ 	  "p8vector_hw"    { set selected [check_p8vector_hw_available] }
++	  "p9vector_hw"    { set selected [check_p9vector_hw_available] }
++	  "p9modulo_hw"    { set selected [check_p9modulo_hw_available] }
++	  "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
++	  "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
+ 	  "ppc_recip_hw"   { set selected [check_ppc_recip_hw_available] }
+ 	  "dfp_hw"         { set selected [check_dfp_hw_available] }
+ 	  "htm_hw"         { set selected [check_htm_hw_available] }
+@@ -5373,6 +5589,10 @@
+ 	  "vmx_hw"         { return 1 }
+ 	  "vsx_hw"         { return 1 }
+ 	  "p8vector_hw"    { return 1 }
++	  "p9vector_hw"    { return 1 }
++	  "p9modulo_hw"    { return 1 }
++	  "ppc_float128_sw" { return 1 }
++	  "ppc_float128_hw" { return 1 }
+ 	  "ppc_recip_hw"   { return 1 }
+ 	  "dfp_hw"         { return 1 }
+ 	  "htm_hw"         { return 1 }
+@@ -6047,7 +6267,9 @@
+         }
+ 
+         lappend DEFAULT_VECTCFLAGS "-maltivec"
+-        if [check_p8vector_hw_available] {
++        if [check_p9vector_hw_available] {
++            lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
++        } elseif [check_p8vector_hw_available] {
+             lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
+         } elseif [check_vsx_hw_available] {
+             lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
+Index: gcc/testsuite/g++.dg/pr69667.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/pr69667.C	(.../gcc-5-branch)
++++ b/src/gcc/testsuite/g++.dg/pr69667.C	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,105 @@
++/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
++/* { dg-require-effective-target powerpc_p8vector_ok } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
++/* { dg-options "-mcpu=power8 -w -std=c++14 -mlra" } */
++
++/* target/69667, compiler got
++   internal compiler error: Max. number of generated reload insns per insn is achieved (90)  */
++
++struct A {
++  typedef int evaluation_error_type;
++};
++template <class T, class> T get_epsilon();
++template <class E> __attribute__((__noreturn__)) void throw_exception(E);
++template <class Formatter, class Group> char do_format(Formatter, Group &);
++int raise_error_e, non_central_beta_p_k;
++template <class, class T> void raise_error(T &p1) {
++  char msg = do_format(msg, p1);
++  throw_exception(raise_error_e);
++}
++char raise_evaluation_error_function;
++template <class T1, class T2, class Policy>
++T1 gamma_p_derivative(T1, T2, Policy);
++template <class T, class Policy> T ibeta_imp(Policy, bool, T *);
++template <class> struct B {};
++template <class Dist, class RealType> B<Dist> complement(Dist, RealType);
++template <class, class> class C;
++template <class T, class Policy> struct D {
++  D(C<T, Policy> p1, T, bool) : dist(p1) {}
++  void operator()(T p1) { comp ? cdf(complement(dist, p1)) : T(); }
++  C<T, Policy> dist;
++  bool comp;
++};
++template <class, class = A> class C {
++public:
++  C(int, int, int);
++};
++template <class RealType, class Policy> void quantile(Policy p1, RealType) {
++  nc_beta_quantile(p1, false);
++}
++double quantile_sanity_check___trans_tmp_1, quantile_sanity_check___trans_tmp_3,
++    quantile_sanity_check___trans_tmp_5, quantile_sanity_check___trans_tmp_7;
++void Trans_NS_detail_raise_evaluation_error(char *, char *, long double &p3,
++                                            int) {
++  raise_error<int>(p3);
++}
++template <class T, class Policy>
++void raise_evaluation_error(char *, T &p2, Policy) {
++  Trans_NS_detail_raise_evaluation_error(
++      &raise_evaluation_error_function, "", p2,
++      typename Policy::evaluation_error_type());
++}
++template <class T, class Policy>
++T non_central_beta_p(T p1, T p2, T p3, Policy p4, T p5 = 0) {
++  T y, errtol = get_epsilon<T, Policy>(), l2,
++       pois = gamma_p_derivative(T(), l2, p4), xterm, last_term = 0;
++  if (pois)
++    return p5;
++  T beta = y ? ibeta_imp(p4, false, &xterm) : ibeta_imp(p4, true, &xterm);
++  xterm = y - 1;
++  T sum = p5;
++  if (beta && xterm)
++    return p5;
++  for (; non_central_beta_p_k;) {
++    sum += beta;
++    if (errtol && last_term || beta)
++      break;
++    xterm *=
++        p1 + non_central_beta_p_k - 1 / p3 * p1 + p2 + non_central_beta_p_k - 2;
++    last_term = beta;
++  }
++  raise_evaluation_error("", sum, p4);
++}
++template <class RealType, class Policy>
++RealType non_central_beta_cdf(RealType, bool, Policy) {
++  RealType b, a, x;
++  non_central_beta_p(a, b, x, A());
++}
++template <class F, class T, class Tol, class Policy>
++int bracket_and_solve_root_01(F p1, T, bool, Tol, unsigned, Policy) {
++  T guess;
++  p1(guess);
++}
++template <class RealType, class Policy>
++void nc_beta_quantile(C<RealType, Policy>, bool p2) {
++  RealType p;
++  typedef RealType value_type;
++  D<value_type, Policy> f(C<value_type, Policy>(0, 0, 0), p, p2);
++  void tol();
++  long max_iter =
++      bracket_and_solve_root_01(f, value_type(), true, tol, max_iter, Policy());
++}
++template <class RealType, class Policy> RealType cdf(B<C<RealType, Policy>>) {
++  RealType l = non_central_beta_cdf(l, true, Policy());
++}
++template <typename T> void quantile_sanity_check(T) {
++  quantile(C<long double>(quantile_sanity_check___trans_tmp_1,
++                          quantile_sanity_check___trans_tmp_3,
++                          quantile_sanity_check___trans_tmp_5),
++           quantile_sanity_check___trans_tmp_7);
++}
++void test_accuracy() {
++  int ncbeta;
++  quantile_sanity_check(ncbeta);
++}
+Index: gcc/config.in
+===================================================================
+--- a/src/gcc/config.in	(.../gcc-5-branch)
++++ b/src/gcc/config.in	(.../ibm/gcc-5-branch)
+@@ -544,6 +544,12 @@
+ #endif
+ 
+ 
++/* Define if your assembler supports POWER9 instructions. */
++#ifndef USED_FOR_TARGET
++#undef HAVE_AS_POWER9
++#endif
++
++
+ /* Define if your assembler supports .ref */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_AS_REF
+@@ -1283,6 +1289,13 @@
+ #endif
+ 
+ 
++/* Define if the gold linker supports split stack and is available as a
++   non-default */
++#ifndef USED_FOR_TARGET
++#undef HAVE_GOLD_NON_DEFAULT_SPLIT_STACK
++#endif
++
++
+ /* Define if you have the iconv() function. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_ICONV
+@@ -1416,6 +1429,12 @@
+ #endif
+ 
+ 
++/* Define if your PowerPC64 gold linker supports split stack. */
++#ifndef USED_FOR_TARGET
++#undef HAVE_LD_GOLD_SUPPORTS_SPLIT_STACK
++#endif
++
++
+ /* Define if your PowerPC64 linker supports a large TOC. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_LD_LARGE_TOC
+@@ -1928,6 +1947,12 @@
+ #endif
+ 
+ 
++/* Define to .TOC. alignment forced by your linker. */
++#ifndef USED_FOR_TARGET
++#undef POWERPC64_TOC_POINTER_ALIGNMENT
++#endif
++
++
+ /* Define to PREFIX/include if cpp should also search that directory. */
+ #ifndef USED_FOR_TARGET
+ #undef PREFIX_INCLUDE_DIR
+@@ -1997,6 +2022,12 @@
+ #endif
+ 
+ 
++/* Define if your target C Library provides the AT_HWCAP value in the TCB */
++#ifndef USED_FOR_TARGET
++#undef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
++#endif
++
++
+ /* Define if your target C library provides stack protector support */
+ #ifndef USED_FOR_TARGET
+ #undef TARGET_LIBC_PROVIDES_SSP
+Index: gcc/go/gospec.c
+===================================================================
+--- a/src/gcc/go/gospec.c	(.../gcc-5-branch)
++++ b/src/gcc/go/gospec.c	(.../ibm/gcc-5-branch)
+@@ -106,6 +106,9 @@
+   /* The total number of arguments with the new stuff.  */
+   int num_args = 1;
+ 
++  /* Supports split stack */
++  int supports_split_stack = 0;
++
+   /* Whether the -o option was used.  */
+   bool saw_opt_o = false;
+ 
+@@ -117,6 +120,11 @@
+   /* Whether the -S option was used.  */
+   bool saw_opt_S = false;
+ 
++#ifdef TARGET_CAN_SPLIT_STACK_64BIT
++  /* Whether the -m64 option is in force. */
++  bool is_m64 = TARGET_CAN_SPLIT_STACK_64BIT;
++#endif
++
+   /* The first input file with an extension of .go.  */
+   const char *first_go_file = NULL;  
+ 
+@@ -152,6 +160,16 @@
+ 	    library = (library == 0) ? 1 : library;
+ 	  break;
+ 
++#ifdef TARGET_CAN_SPLIT_STACK_64BIT
++	case OPT_m32:
++	  is_m64 = false;
++	  break;
++
++	case OPT_m64:
++	  is_m64 = true;
++	  break;
++#endif
++
+ 	case OPT_pg:
+ 	case OPT_p:
+ 	  saw_profile_flag = true;
+@@ -236,15 +254,22 @@
+   /* Copy the 0th argument, i.e., the name of the program itself.  */
+   new_decoded_options[j++] = decoded_options[i++];
+ 
++#ifdef TARGET_CAN_SPLIT_STACK
++  supports_split_stack = 1;
++#endif
++
++#ifdef TARGET_CAN_SPLIT_STACK_64BIT
++  if (is_m64)
++    supports_split_stack = 1;
++#endif
++
+   /* If we are linking, pass -fsplit-stack if it is supported.  */
+-#ifdef TARGET_CAN_SPLIT_STACK
+-  if (library >= 0)
++  if ((library >= 0) && supports_split_stack)
+     {
+       generate_option (OPT_fsplit_stack, NULL, 1, CL_DRIVER,
+ 		       &new_decoded_options[j]);
+       j++;
+     }
+-#endif
+ 
+   /* NOTE: We start at 1 now, not 0.  */
+   while (i < argc)
+@@ -381,19 +406,17 @@
+     generate_option (OPT_shared_libgcc, NULL, 1, CL_DRIVER,
+ 		     &new_decoded_options[j++]);
+ 
+-#ifdef TARGET_CAN_SPLIT_STACK
+   /* libgcc wraps pthread_create to support split stack, however, due to
+      relative ordering of -lpthread and -lgcc, we can't just mark
+      __real_pthread_create in libgcc as non-weak.  But we need to link in
+      pthread_create from pthread if we are statically linking, so we work-
+-     around by passing -u pthread_create to to the linker. */
+-  if (static_link)
++     around by passing -u pthread_create to the linker. */
++  if (static_link && supports_split_stack)
+     {
+       generate_option (OPT_Wl_, "-u,pthread_create", 1, CL_DRIVER,
+ 		       &new_decoded_options[j]);
+       j++;
+     }
+-#endif
+ 
+ #if defined(TARGET_SOLARIS) && !defined(USE_GLD)
+   /* We use a common symbol for go$zerovalue.  On Solaris, when not
+Index: gcc/go/go-lang.c
+===================================================================
+--- a/src/gcc/go/go-lang.c	(.../gcc-5-branch)
++++ b/src/gcc/go/go-lang.c	(.../ibm/gcc-5-branch)
+@@ -164,10 +164,6 @@
+   opts->x_flag_errno_math = 0;
+   opts->frontend_set_flag_errno_math = true;
+ 
+-  /* We turn on stack splitting if we can.  */
+-  if (targetm_common.supports_split_stack (false, opts))
+-    opts->x_flag_split_stack = 1;
+-
+   /* Exceptions are used to handle recovering from panics.  */
+   opts->x_flag_exceptions = 1;
+   opts->x_flag_non_call_exceptions = 1;
+@@ -301,6 +297,11 @@
+       && global_options.x_write_symbols == NO_DEBUG)
+     global_options.x_write_symbols = PREFERRED_DEBUGGING_TYPE;
+ 
++  /* We turn on stack splitting if we can. */
++  if (!global_options_set.x_flag_split_stack 
++      && targetm_common.supports_split_stack (false, &global_options))
++    global_options.x_flag_split_stack = 1;
++  
+   /* Returning false means that the backend should be used.  */
+   return false;
+ }
+Index: gcc/common/config/rs6000/rs6000-common.c
+===================================================================
+--- a/src/gcc/common/config/rs6000/rs6000-common.c	(.../gcc-5-branch)
++++ b/src/gcc/common/config/rs6000/rs6000-common.c	(.../ibm/gcc-5-branch)
+@@ -288,6 +288,29 @@
+   return true;
+ }
+ 
++/* -fsplit-stack uses a field in the TCB, available with glibc-2.18.  */
++
++static bool
++rs6000_supports_split_stack (bool report,
++			     struct gcc_options *opts ATTRIBUTE_UNUSED)
++{
++#ifndef TARGET_GLIBC_MAJOR
++#define TARGET_GLIBC_MAJOR 0
++#endif
++#ifndef TARGET_GLIBC_MINOR
++#define TARGET_GLIBC_MINOR 0
++#endif
++  /* Note: Can't test DEFAULT_ABI here, it isn't set until later.  */
++  if (TARGET_GLIBC_MAJOR * 1000 + TARGET_GLIBC_MINOR >= 2018
++      && TARGET_64BIT
++      && TARGET_ELF)
++    return true;
++
++  if (report)
++    error ("%<-fsplit-stack%> currently only supported on PowerPC64 GNU/Linux with glibc-2.18 or later");
++  return false;
++}
++
+ #undef TARGET_HANDLE_OPTION
+ #define TARGET_HANDLE_OPTION rs6000_handle_option
+ 
+@@ -300,4 +323,7 @@
+ #undef TARGET_OPTION_OPTIMIZATION_TABLE
+ #define TARGET_OPTION_OPTIMIZATION_TABLE rs6000_option_optimization_table
+ 
++#undef TARGET_SUPPORTS_SPLIT_STACK
++#define TARGET_SUPPORTS_SPLIT_STACK rs6000_supports_split_stack
++
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+Index: gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac	(.../gcc-5-branch)
++++ b/src/gcc/configure.ac	(.../ibm/gcc-5-branch)
+@@ -2221,7 +2221,42 @@
+   fi
+ fi
+ AC_MSG_RESULT($ld_is_gold)
++AC_MSG_CHECKING(gold linker with split stack support as non default)
++# Check to see if default ld is not gold, but gold is
++# available and has support for split stack.  If gcc was configured
++# with gold then no checking is done.
++# 
++if test x$ld_is_gold = xno && which ${gcc_cv_ld}.gold >/dev/null 2>&1; then
+ 
++# For platforms other than powerpc64*, enable as appropriate.
++
++  gold_non_default=no
++  ld_gold=`which ${gcc_cv_ld}.gold`
++# Make sure this gold has minimal split stack support
++  if $ld_gold --help 2>/dev/null | grep split-stack-adjust-size >/dev/null 2>&1; then
++    ld_vers=`$ld_gold --version | sed 1q`
++    gold_vers=`echo $ld_vers | sed -n \
++          -e 's,^[[^)]]*[[  ]]\([[0-9]][[0-9]]*\.[[0-9]][[0-9]]*[[^)]]*\)) .*$,\1,p'`
++    case $target in
++# check that the gold version contains the complete split stack support
++# on powerpc64 big and little endian
++      powerpc64*-*-*)
++        case "$gold_vers" in
++          2.25.[[1-9]]*|2.2[[6-9]][[.0-9]]*|2.[[3-9]][[.0-9]]*|[[3-9]].[[.0-9]]*) gold_non_default=yes
++          ;;
++          *) gold_non_default=no
++          ;;
++        esac
++        ;;
++    esac
++  fi
++  if test $gold_non_default = yes; then
++    AC_DEFINE(HAVE_GOLD_NON_DEFAULT_SPLIT_STACK, 1,
++           [Define if the gold linker supports split stack and is available as a non-default])
++  fi
++fi
++AC_MSG_RESULT($gold_non_default)
++
+ ORIGINAL_LD_FOR_TARGET=$gcc_cv_ld
+ AC_SUBST(ORIGINAL_LD_FOR_TARGET)
+ case "$ORIGINAL_LD_FOR_TARGET" in
+@@ -4246,6 +4281,19 @@
+ 	  [Define if your assembler supports POWER8 instructions.])])
+ 
+     case $target in
++      *-*-aix*) conftest_s='	.machine "pwr9"
++	.csect .text[[PR]]';;
++      *) conftest_s='	.machine power9
++	.text';;
++    esac
++
++    gcc_GAS_CHECK_FEATURE([power9 support],
++      gcc_cv_as_powerpc_power9, [2,19,2], -a32,
++      [$conftest_s],,
++      [AC_DEFINE(HAVE_AS_POWER9, 1,
++	  [Define if your assembler supports POWER9 instructions.])])
++
++    case $target in
+       *-*-aix*) conftest_s='	.csect .text[[PR]]
+ 	lwsync';;
+       *) conftest_s='	.text
+@@ -5144,6 +5192,66 @@
+       AC_DEFINE(HAVE_LD_LARGE_TOC, 1,
+     [Define if your PowerPC64 linker supports a large TOC.])
+     fi
++
++    AC_CACHE_CHECK(linker toc pointer alignment,
++    gcc_cv_ld_toc_align,
++    [if test x$gcc_cv_as != x -a x$gcc_cv_ld != x -a x$gcc_cv_nm != x; then
++      cat > conftest.s <<EOF
++	.global _start
++	.text
++_start:
++	addis 9,2,x@got@ha
++	.section .data.rel.ro,"aw",@progbits
++	.p2align 16
++	.space 32768
++x:	.quad .TOC.
++EOF
++      if $gcc_cv_as -a64 -o conftest.o conftest.s > /dev/null 2>&1 \
++         && $gcc_cv_ld $emul_name -o conftest conftest.o > /dev/null 2>&1; then
++        gcc_cv_ld_toc_align=`$gcc_cv_nm conftest | ${AWK} '/\.TOC\./ { match ($0, "0[[[:xdigit:]]]*", a); print strtonum ("0x" substr(a[[0]], length(a[[0]])-3)) }'`
++      fi
++      rm -f conftest conftest.o conftest.s
++    fi
++    ])
++    if test -n "$gcc_cv_ld_toc_align" && test $gcc_cv_ld_toc_align -gt 8; then
++      AC_DEFINE_UNQUOTED(POWERPC64_TOC_POINTER_ALIGNMENT, $gcc_cv_ld_toc_align,
++    [Define to .TOC. alignment forced by your linker.])
++    fi
++
++     # Check for split stack support within the gold linker
++     AC_CACHE_CHECK(gold linker supports split stack,
++     gcc_cv_ld_gold_supports_split_stack,
++     [gcc_cv_ld_gold_supports_split_stack=no
++     if test x"$ld_is_gold" = xyes; then
++         gold_linker=$gcc_cv_ld
++     elif "$ORIGINAL_LD_GOLD_FOR_TARGET" --version | grep gold >/dev/null 2>&1; then
++         gold_linker=$ORIGINAL_LD_GOLD_FOR_TARGET
++     else
++         gold_linker=""
++     fi
++     if test "$gold_linker" != ""; then
++         gold_vers=`$gold_linker --version | sed 1q | sed -n -e 's/.*Binutils.* \([[0-9]][[0-9]]*\.[[^)]]*\)).*$/\1/p'`
++         gold_vers_major=`expr "$gold_vers" : '\([[0-9]]*\)'`
++         gold_vers_minor=`expr "$gold_vers" : '[[0-9]]*\.\([[0-9]]*\)'`
++         gold_vers_patch=`expr "$gold_vers" : '[[0-9]]*\.[[0-9]]*\.\([[0-9]]*\)'`
++
++         case x"$gold_vers_minor" in
++           x25)
++             if test x"$gold_vers_patch" != ""; then
++               gcc_cv_ld_gold_supports_split_stack=yes
++             fi
++             ;;
++           x2[[6-9]])
++             gcc_cv_ld_gold_supports_split_stack=yes
++             ;;
++         esac
++    fi
++    ])
++    if test x"$gcc_cv_ld_gold_supports_split_stack" = xyes; then
++       AC_DEFINE(HAVE_LD_GOLD_SUPPORTS_SPLIT_STACK, 1,
++    [Define if your PowerPC64 gold linker supports split stack.])
++    fi
++
+     ;;
+ esac
+ 
+@@ -5362,6 +5470,19 @@
+ 	    [Define if TFmode long double should be the default])
+ fi
+ 
++# Check if the target LIBC supports exporting the AT_PLATFORM and AT_HWCAP
++# values in the TCB.  Currently, only GLIBC 2.23 and later support this.
++gcc_cv_libc_provides_hwcap_in_tcb=no
++case "$target" in
++  powerpc*-*-linux*)
++    GCC_GLIBC_VERSION_GTE_IFELSE([2], [23], [gcc_cv_libc_provides_hwcap_in_tcb=yes], )
++    ;;
++esac
++if test x$gcc_cv_libc_provides_hwcap_in_tcb = xyes; then
++  AC_DEFINE(TARGET_LIBC_PROVIDES_HWCAP_IN_TCB, 1,
++	    [Define if your target C Library provides the AT_HWCAP value in the TCB])
++fi
++
+ AC_MSG_CHECKING(dl_iterate_phdr in target C library)
+ gcc_cv_target_dl_iterate_phdr=unknown
+ case "$target" in
+Index: gcc/ChangeLog.ibm
+===================================================================
+--- a/src/gcc/ChangeLog.ibm	(.../gcc-5-branch)
++++ b/src/gcc/ChangeLog.ibm	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,1182 @@
++2016-05-25  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 236741.
++	* REVISION: Update subversion id.
++
++2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234917.
++	* REVISION: Update subversion id.
++
++	Backport from the trunk
++	2016-04-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/70680
++	* config/rs6000/rs6000.md (ieee_128bit_vsx_neg<mode>2_internal):
++	Do not use "=" constraint on an input constraint.
++	(ieee_128bit_vsx_abs<mode>2_internal): Likewise.
++	(ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
++	(ieee_128bit_vsx_nabs<mode>2): Correct splitter so that it
++	generates (neg (abs ...)) instead of (abs ...).
++
++2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to branches/gcc-5-branch, subversion id 234888.
++	* REVISION: Update subversion id.
++
++	Back port from mainline
++	2016-04-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/70381
++	* config/rs6000/rs6000.c (rs6000_opt_masks): Disable using the
++	target attribute and pragma from changing the -mfloat128
++	and -mfloat128-hardware options.
++
++	* doc/extend.texi (Additional Floating Types): Document PowerPC
++	__float128 restrictions.
++
++2016-04-04  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 234723.
++	* REVISION: Update subversion id.
++
++2016-03-31  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 234658.
++	* REVISION: Update subversion id.
++
++2016-03-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234461.
++	* REVISION: Update subversion id.
++
++2016-03-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from mainline
++	2015-08-12  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/67071
++	* config/rs6000/predicates.md (easy_vector_constant_vsldoi): New
++	predicate to allow construction of vector constants using the
++	VSLDOI vector shift instruction.
++
++	* config/rs6000/rs6000-protos.h (vspltis_shifted): Add
++	declaration.
++
++	* config/rs6000/rs6000.c (vspltis_shifted): New function to return
++	the number of bytes to be shifted left and filled in with either
++	all zero or all one bits.
++	(gen_easy_altivec_constant): Call vsplitis_shifted if no other
++	methods exist.
++	(output_vec_const_move): On power8, generate XXLORC to generate
++	a vector constant with all 1's. Do a split if we need to use a
++	VSLDOI instruction.
++
++	* config/rs6000/rs6000.h (EASY_VECTOR_MSB): Use mode mask to
++	properly test for the MSB.
++
++	* config/rs6000/altivec.md (VSLDOI splitter): Add splitter for
++	vector constants that can be created with VSLDOI.
++
++2016-03-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from mainline
++	2016-02-26  Jakub Jelinek  <jakub@redhat.com>
++
++	PR target/69969
++	* config/rs6000/rs6000.c (rs6000_option_override_internal): Don't
++	complain about -mallow-movmisalign without -mvsx if
++	TARGET_ALLOW_MOVMISALIGN was not set explicitly.
++
++2016-03-23  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Move
++	setting wq/wp constraints to the same location as the trunk.
++	(rs6000_option_override_internal): Disable setting -mfloat128
++	automatically if -mvsx.  Add warnings from trunk for -mfloat128.
++	(rs6000_opt_masks): Add -mfloat128-hardware to be compatible with
++	trunk.
++
++2016-03-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (cpu_expand_builtin): Provide correct
++	number of arguments to gen_rtx_SET calls in code dependent on
++	glibc 2.23 or later.
++
++2016-03-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 234186.
++
++2016-03-10  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 234111.
++	* REVISION: Update subversion id.
++
++2016-03-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	PR target/69868 + swap optimization backports
++	* config/rs6000/rs6000.c (class swap_web_entry): Enlarge
++	special-handling field.
++	(enum special_handling_values): Add four new values.
++	(const_load_sequence_p): New function.
++	(load_comp_mask_p): Likewise.
++	(v2df_reduction_p): Likewise.
++	(rtx_is_swappable_p): Add handling for XXPERMDI and reductions.
++	(insn_is_swappable_p): Add handling for CONCAT, reductions, and
++	VPERM.
++	(adjust_xxpermdi): New function.
++	(adjust_concat): Likewise.
++	(find_swapped_load_and_const_vector): Likewise.
++	(replace_const_vector_in_load): Likewise.
++	(adjust_vperm): Likewise.
++	(adjust_vperm_comp): Likewise.
++	(handle_special_swappables): Add support for XXPERMDI, CONCAT,
++	and VPERM.
++	(replace_swap_with_copy): Permit replacements of VNOR by copies as
++	well.
++	(dump_swap_insn_table): Add  handling for XXPERMDI, CONCAT, and
++	VPERM.
++
++2016-02-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from trunk
++	2016-02-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/69667
++	* config/rs6000/rs6000.md (mov<mode>_64bit_dm): Use 'd' constraint
++	instead of 'ws', and 'wh' instead of 'wm' since TFmode/IFmode are
++	not allowed into the traditional Altivec registers.
++	(movtd_64bit_nodm): Likewise.
++	(mov<mode>_32bit, FMOVE128_FPR iterator): Likewise.
++
++	Backport from trunk
++	2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
++		    Vladimir Makarov  <vmakarov@redhat.com>
++
++	PR target/69461
++	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Fix thinko
++	in validating fused toc addresses.
++
++2016-01-25  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 232799.
++	* REVISION: Update subversion id.
++
++2016-01-25  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 232794.
++	* REVISION: Update subversion id.
++
++2016-01-22   Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
++	-mfloat128 by default on PowerPC Linux systems with the VSX
++	instruction enabled.
++
++2016-01-22  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2016-01-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
++	OPTION_MASK_P9_DFORM.
++
++	* config/rs6000/constraints.md (wo constraint): New constraint for
++	ISA 3.0 (power9).
++
++	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Add support
++	for wo constraint.
++	(rs6000_init_hard_regno_mode_ok): Likewise.
++
++	* config/rs6000/rs6000.h (r6000_reg_class_enum): Add support for
++	wo constraint.
++
++	* config/rs6000/altivec.md (altivec_vperm_<mode>): Clean up vperm
++	expanders not to have constraints.  Add support for ISA 3.0 xxperm
++	instruction.  Add support for fusing xxlor with xxperm.
++	(altivec_vperm_<mode>_internal): Likewise.
++	(altivec_vperm_v8hiv16qi): Likewise.
++	(altivec_vperm_<mode>v16q): Likewise.
++	(altivec_vperm_<mode>_uns): Likewise.
++	(vperm_v8hiv4si): Likewise.
++	(vperm_v16qiv8hi): Likewise.
++
++	* doc/md.texi (RS/6000 constraints): Document wo constraint.
++
++	Backport from mainline:
++	2015-12-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (init_float128_ieee): Remove IEEE 128-bit
++	comparison functions in cmp_optab and ucmp_optab.
++	(rs6000_generate_compare): Rewrite IEEE 128-bit floating point
++	software emulation comparisons to only use __eqkf2, __gekf2,
++	__lekf2, and __unordkf2 functions.
++	(rs6000_invalid_binary_op): Add support for -mfloat128-convert.
++
++	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
++	__FLOAT128_HARDWARE__ if hardware IEEE 128-bit support is
++	available.
++
++	* config/rs6000/rs6000.opt (-mfloat128-convert): Add debug switch
++	to allow IBM extended double and IEEE 128-bit floating point to be
++	converted with default conversions.
++
++	* config/rs6000/rs6000.md (extendkftf2): Add converters between
++	KFmode and TFmode if -mabi=ieeelongdouble.
++	(trunctfkf2): Likewise.
++	(ieee128_mfvsrd): Split 64-bit integer conversions into 32-bit and
++	64-bit insns.
++	(ieee128_mfvsrd_64bit): Likewise.
++	(ieee128_mfvsrd_32bit): Likewise.
++	(ieee128_mtvsrd): Likewise.
++	(ieee128_mtvsrd_64bit): Likewise.
++	(ieee128_mtvsrd_32bit): Likewise.
++
++	* doc/extend.texi (Floating Types): Document that complex
++	__float128 does not work currently.
++
++	* doc/invoke.texi (RS/6000 and PowerPC Options): Document that
++	-mfloat128 is only supported on PowerPC 64-bit Linux systems.
++
++	Backport from mainline:
++	2015-12-15  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/68805
++	* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Use ROTATE
++	instead of VEC_SELECT for TImode.
++
++	* config/rs6000/vsx.md (VSX_LE): Move TImode from VSX_LE to
++	VSX_LE_128, so that we use ROTATE to swap the 64-bit words instead
++	of using VEC_SELECT.
++	(VSX_LE_128): Likewise.
++	(define_peephole2): Add peephole to eliminate double xxpermdi when
++	copying TImode.
++
++	Backport from mainline:
++	2015-11-16  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/vsx.md (VSX_L): Do not include IBM extended double
++	128-bit types, just types that fit in a single vector.
++	* config/rs6000/rs6000.md (FMOVE128_GPR): Likewise.
++
++	Backport from mainline:
++	2015-11-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/constraints.md (we constraint): New constraint for
++	64-bit power9 vector support.
++	(wL constraint): New constraint for the element in a vector that
++	can be addressed by the MFVSRLD instruction.
++
++	* config/rs6000/rs6000-protos.h (convert_float128_to_int): Add
++	declaration.
++	(convert_int_to_float128): Likewise.
++	(rs6000_generate_compare): Add support for ISA 3.0 (power9)
++	hardware support for IEEE 128-bit floating point.
++	(rs6000_expand_float128_convert): Likewise.
++	(convert_float128_to_int): Likewise.
++	(convert_int_to_float128): Likewise.
++
++	* config/rs6000/rs6000.md (UNSPEC_ROUND_TO_ODD): New unspecs for
++	ISA 3.0 hardware IEEE 128-bit floating point.
++	(UNSPEC_IEEE128_MOVE): Likewise.
++	(UNSPEC_IEEE128_CONVERT): Likewise.
++	(FMA_F): Add support for IEEE 128-bit floating point hardware support.
++	(Ff): Add support for DImode.
++	(Fv): Likewise.
++	(any_fix code iterator): New and updated iterators for IEEE
++	128-bit floating point hardware support.
++	(any_float code iterator): Likewise.
++	(s code attribute): Likewise.
++	(su code attribute): Likewise.
++	(az code attribute): Likewise.
++	(uns code attribute): Likewise.
++	(neg<mode>2, FLOAT128 iterator): Add support for IEEE 128-bit
++	floating point hardware support.
++	(abs<mode>2, FLOAT128 iterator): Likewise.
++	(add<mode>3, IEEE128 iterator): New insns for IEEE 128-bit
++	floating point hardware.
++	(sub<mode>3, IEEE128 iterator): Likewise.
++	(mul<mode>3, IEEE128 iterator): Likewise.
++	(div<mode>3, IEEE128 iterator): Likewise.
++	(copysign<mode>3, IEEE128 iterator): Likewise.
++	(sqrt<mode>2, IEEE128 iterator): Likewise.
++	(neg<mode>2, IEEE128 iterator): Likewise.
++	(abs<mode>2, IEEE128 iterator): Likewise.
++	(nabs<mode>2, IEEE128 iterator): Likewise.
++	(fma<mode>4_hw, IEEE128 iterator): Likewise.
++	(fms<mode>4_hw, IEEE128 iterator): Likewise.
++	(nfma<mode>4_hw, IEEE128 iterator): Likewise.
++	(nfms<mode>4_hw, IEEE128 iterator): Likewise.
++	(extend<SFDF:mode><IEEE128:mode>2_hw): Likewise.
++	(trunc<mode>df2_hw, IEEE128 iterator): Likewise.
++	(trunc<mode>sf2_hw, IEEE128 iterator): Likewise.
++	(fix_fixuns code attribute): Likewise.
++	(float_floatuns code attribute): Likewise.
++	(fix<uns>_<mode>si2_hw): Likewise.
++	(fix<uns>_<mode>di2_hw): Likewise.
++	(float<uns>_<mode>si2_hw): Likewise.
++	(float<uns>_<mode>di2_hw): Likewise.
++	(xscvqp<su>wz_<mode>): Likewise.
++	(xscvqp<su>dz_<mode>): Likewise.
++	(xscv<su>dqp_<mode): Likewise.
++	(ieee128_mfvsrd): Likewise.
++	(ieee128_mfvsrwz): Likewise.
++	(ieee128_mtvsrw): Likewise.
++	(ieee128_mtvsrd): Likewise.
++	(trunc<mode>df2_odd): Likewise.
++	(cmp<mode>_h): Likewise.
++	(128-bit GPR splitters): Don't split a 128-bit move that is a
++	direct move between GPR and vector registers using ISA 3.0 direct
++	move instructions.
++	(maddld4): Add support for the ISA 3.0 integer multiply-add
++	instruction.
++
++	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Add ISA 3.0
++	debugging.
++	(rs6000_init_hard_regno_mode_ok): If ISA 3.0 and 64-bit, enable we
++	constraint.  Disable the VSX<->GPR direct move helpers if we have
++	the MFVSRLD and MTVSRDD instructions.
++	(rs6000_secondary_reload_simple_move): Add support for doing
++	vector direct moves directly without additional scratch registers
++	if we have ISA 3.0 instructions.
++	(rs6000_secondary_reload_direct_move): Update comments.
++	(rs6000_output_move_128bit): Add support for ISA 3.0 vector
++	instructions.
++
++	* config/rs6000/vsx.md (vsx_mov<mode>): Add support for ISA 3.0
++	direct move instructions.
++	(vsx_movti_64bit): Likewise.
++	(vsx_extract_<mode>): Likewise.
++
++	* config/rs6000/rs6000.h (VECTOR_ELEMENT_MFVSRLD_64BIT): New
++	macros for ISA 3.0 direct move instructions.
++	(TARGET_DIRECT_MOVE_128): Likewise.
++	(TARGET_MADDLD): Add support for the ISA 3.0 integer multiply-add
++	instruction.
++
++	* doc/md.texi (RS/6000 constraints): Document we, wF, wG, wL
++	constraints.  Update wa documentation to say not to use %x<n> on
++	instructions that only take Altivec registers.
++
++	Backport from mainline:
++	2015-10-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (rs6000_init_libfuncs): Split libfunc
++	setup into 3 functions: init_float128_ibm, init_float128_ieee, and
++	rs6000_init_libfuncs. If -mfloat128, add IFmode functions for all
++	of the traditional names that TFmode uses for handling IEEE
++	extended double. If -mfloat128, add KFmode functions for all of
++	the emulation functions. If -mabi=ieeelongdouble and -mfloat128,
++	make TFmode use the same emulation functions as KFmode.
++	(init_float128_ibm): Likewise.
++	(init_float128_ieee): Likewise.
++	(rs6000_generate_compare): For IEEE 128-bit floating point
++	comparisons, call the unordered comparison function instead of the
++	ordered comparison function.
++	(rs6000_expand_float128_convert): Deal with operands that are
++	memory operands. Restructure the code to use a switch statement on
++	the mode. Add support for TFmode defaulting to either IBM extended
++	double or IEEE 128-bit floating point. If the underlying types are
++	the same, use a move instead of a conversion function.
++	(TARGET_C_MODE_FOR_SUFFIX): Define 'q' and 'Q' as the suffix to
++	use for IEEE 128-bit floating point constants with -mfloat128.
++	(rs6000_c_mode_for_suffix): Likewise.
++	(TARGET_INVALID_BINARY_OP): Do not allow inter-mixing of IEEE
++	128-bit floating point with IBM extended double floating point.
++	(rs6000_invalid_binary_op): Likewise.
++	(rs6000_gen_le_vsx_permute): On little endian systems generate a
++	ROTATE insn instead of VEC_SELECT for IEEE 128-bit floating point
++	types that can go in vector registers.
++	(chain_contains_only_swaps): Properly swap IEEE 128-bit floating
++	point types that can go in vector registers on little endian
++	PowerPC systems.
++	(mark_swaps_for_removal): Likewise.
++	(rs6000_analyze_swaps): Likewise.
++	(rs6000_mangle_type): Use U10__float128 for IEEE 128-bit floating point.
++
++	* config/rs6000/rs6000.md (FLOAT128_SFDFTF): Delete iterator,
++	rework IEEE 128-bit floating point insns to deal with TFmode being
++	either IBM extended double or IEEE 128-bit floating point.
++	(IFKF): Likewise.
++	(IBM128): Update iterator to add condition that the mode is IBM
++	extended double.
++	(IEEE128): New iterator for IEEE 128-bit floating point.
++	(TFIFKF): Rename TFIFKF iterator to FLOAT128.
++	(FLOAT128): Likewise.
++	(signbit<mode>2): FLOAT128_IBM_P condition test moved into IBM128
++	iterator.
++	(neg<mode>2): Replace TFIFKF iterator with FLOAT128. Add support
++	for TFmode being IEEE 128-bit floating point. Use IEEE128 iterator
++	instead of hard coding TFmode or KFmode.
++	(negtf2_internal): Likewise.
++	(neg<mode>2_internal): Likewise.
++	(abs<mode>2): Likewise.
++	(abstf2_internal): Likewise.
++	(abs<mode>2_internal): Likewise.
++	(ieee_128bit_neg<mode>2): Likewise.
++	(ieee_128bit_neg<mode>2_internal): Likewise.
++	(ieee_128bit_abs<mode>2): Likewise.
++	(ieee_128bit_abs<mode>2_internal): Likewise.
++	(ieee_128bit_nabs<mode>2): Likewise.
++	(ieee_128bit_nabs<mode>2_internal): Likewise.
++	(extendiftf2): Add explicit conversions between 128-bit floating
++	point types. Drop the old conversions that had become unwieldy.
++	(extend<FLOAT128_SFDFTF:mode><IFKF:mode>2): Likewise.
++	(extendifkf2): Likewise.
++	(trunc<IFKF:mode><FLOAT128_SFDFTF:mode>2): Likewise.
++	(extendtfkf2): Likewise.
++	(fix_trunc<IFKF:mode><SDI:mode>2): Likewise.
++	(trunciftf2): Likewise.
++	(fixuns_trunc<IFKF:mode><SDI:mode>2): Likewise.
++	(truncifkf2): Likewise.
++	(float<SDI:mode><IFKF:mode>2): Likewise.
++	(trunckftf2): Likewise.
++	(floatuns<SDI:mode><IFKF:mode>2): Likewise.
++	(trunctfif2): Likewise.
++	(FP iterator): Allow TFmode to be IEEE 128-bit floating point.
++	(extenddftf2): Rework 128-bit floating point conversions to
++	properly handle -mabi=ieeelongdouble. Merge IFmode, TFmode, and
++	KFmode expanders into one function.
++	(extenddf<mode>2): Likewise.
++	(extenddftf2_fprs): Likewise.
++	(extenddf<mode>2_fprs): Likewise.
++	(extenddftf2_vsx): Likewise.
++	(extenddf<mode>2_vsx): Likewise.
++	(extendsftf2): Likewise.
++	(extendsf<mode>2): Likewise.
++	(trunctfdf2): Likewise.
++	(trunc<mode>df2): Likewise.
++	(trunctfdf2_internal1): Likewise.
++	(trunc<mode>df2_internal1): Likewise.
++	(trunctfdf2_internal2): Likewise.
++	(trunc<mode>df2_internal2): Likewise.
++	(trunctfsf2): Likewise.
++	(trunc<mode>sf2): Likewise.
++	(trunctfsf2_fprs): Likewise.
++	(trunc<mode>sf2_fprs): Likewise.
++	(floatsit2f): Likewise.
++	(floatsi<mode>2): Likewise.
++	(fix_trunc_helper): Likewise.
++	(fix_trunc_helper<mode>): Likewise.
++	(fix_trunctfsi2): Likewise.
++	(fix_trunc<mode>si2): Likewise.
++	(fix_trunctfsi2_fprs): Likewise.
++	(fix_trunc<mode>si2_fprs): Likewise.
++	(fix_trunctfsi2_internal): Likewise.
++	(fix_trunc<mode>si2_internal): Likewise.
++	(fix_trunctfdi2): Likewise.
++	(fix_trunc<mode>di2): Likewise.
++	(fixuns_trunctf<mode>2): Likewise.
++	(fixuns_trunc<IEEE128:mode><SDI:mode>2): Likewise.
++	(floatditf2): Likewise.
++	(floatdi<mode>2): Likewise.
++	(floatuns<mode>tf2): Likewise.
++	(floatuns<SDI:mode><IEEE128:mode>): Likewise.
++	(cmptf_internal1): Use a mode iterator to add support for both
++	types (IFmode, TFmode) that support IBM extended double.
++	(cmp<mode>_internal1): Likewise.
++	(cmptf_internal2): Likewise.
++	(cmp<mode>_internal2): Likewise.
++
++	* doc/extend.texi (Floating Types): Document __ibm128 and
++	__float128 on PowerPC.
++
++	* doc/invoke.texi (RS/6000 and PowerPC Options): Document
++	-mfloat128 and -mno-float128.
++
++	Backport from mainline:
++	2015-10-29  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.h (ALTIVEC_VECTOR_MODE): Add IEEE 128-bit
++	floating point modes that can go in vector registers.
++	(MODES_TIEABLE_P): Move tests for vector modes before tests for
++	scalar floating point, so that IEEE 128-bit floating point that
++	can go in vector registers bind with vectors and not FP.
++	(struct rs6000_args): Add libcall field.
++
++	* config/rs6000/rs6000.opt (-mfloat128-*): Delete -mfloat128-none
++	and -mfloat128-software switches.  Replace them with a binary
++	-mfloat128 switch.
++	(-mfloat128): Likewise.
++
++	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Allow
++	128-bit floating point types in GPRs, even if the appropriate
++	option enabling the type was not used.
++	(rs6000_debug_reg_global): Remove -mfloat128-{software,none}
++	debugging.
++	(rs6000_setup_reg_addr_masks): Do not allow pre-increment and
++	pre-decrement on IEEE 128-bit floating point values.
++	(rs6000_init_hard_regno_mode_ok): Change test for whether TFmode
++	is IEEE 128-bit floating point.
++	(rs6000_init_hard_regno_mode_ok): Add reload handlers for IEEE
++	128-bit floating point types that can go in vector registers.
++	(rs6000_option_override_internal): Change -mfloat128-none and
++	-mfloat128-software to -mfloat128, and move code to be near other
++	VSX option handling.
++	(rs6000_option_override_internal): Disable -mfloat128 if we don't
++	have the Altivec ABI.
++	(rs6000_init_builtins): Don't make TFmode use either IFmode or
++	KFmode floating point nodes. Instead, have three separate nodes.
++	(rs6000_scalar_mode_supported_p): Add support for IFmode to allow
++	eventually moving the long double default to IEEE 128-bit floating
++	point.
++	(rs6000_opt_masks): Add -mfloat128.
++	(struct rs6000_opt_var): Fix typo in comment.
++	(init_cumulative_args): Initialize libcall field in
++	CUMULATIVE_ARGS.
++	(rs6000_function_arg): Treat library functions as if they had
++	prototypes to prevent IEEE 128-bit support functions from passing
++	arguments in both GPRs and vector registers.
++	(rs6000_arg_partial_bytes): Likewise.
++
++	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add -mfloat128 as
++	an option that can be turned on via -mcpu=<xxx>.
++
++	* config/rs6000/rs6000-opts.h (enum float128_type_t): Delete, no
++	longer used.
++
++	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
++	__FLOAT128__ if -mfloat128. Define __LONG_DOUBLE_IEEE128__ if long
++	double is IEEE 128-bit. Define __LONG_DOUBLE_IBM128__ if long
++	double is IBM extended double.
++
++	* config/rs6000/predicates.md (reg_or_indexed_operand): Allow
++	SUBREGs.
++
++	Backport from mainline:
++	2015-10-05  Michael Meissner  <meissner@linux.vnet.ibm.com>
++		    Peter Bergner  <bergner@vnet.ibm.com>
++
++	PR target/67808
++	* config/rs6000/rs6000.md (extenddftf2): In the expander, only
++	allow registers, but provide insns for the combiner to create for
++	loads from memory. Separate VSX code from non-VSX code. For
++	non-VSX code, combine extenddftf2_fprs into extenddftf2 and rename
++	externaldftf2_internal to externaldftf2_fprs. Reorder constraints
++	so that registers come before memory operations. Drop support from
++	converting DFmode to TFmode, if the DFmode value is in a GPR
++	register.
++	(extenddftf2_fprs): Likewise.
++	(extenddftf2_internal): Likewise.
++	(extenddftf2_vsx): Likewise.
++	(extendsftf2): In the expander, only allow registers, but provide
++	insns for the combiner to create for stores and loads.
++
++	Backport from mainline:
++	2015-08-26  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000-protos.h (rs6000_expand_float128_convert):
++	Add declaration.
++
++	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Fix a
++	comment.
++	(rs6000_cannot_change_mode_class): Add support for IEEE 128-bit
++	floating point in VSX registers.
++	(rs6000_output_move_128bit): Always print out the set insn if we
++	can't generate an appropriate 128-bit move.
++	(rs6000_generate_compare): Add support for IEEE 128-bit floating
++	point in VSX registers comparisons.
++	(rs6000_expand_float128_convert): Likewise.
++
++	* config/rs6000/predicates.md (int_reg_operand_not_pseudo): New
++	predicate for only GPR hard registers.
++
++	* config/rs6000/rs6000.md (FP): Add IEEE 128-bit floating point
++	modes to iterators. Add new iterators for moving 128-bit values in
++	scalar FPR registers and VSX registers.
++	(FMOVE128): Likewise.
++	(FMOVE128_FPR): Likewise.
++	(FMOVE128_GPR): Likewise.
++	(FMOVE128_VSX): Likewise.
++	(FLOAT128_SFDFTF): New iterators for IEEE 128-bit floating point
++	in VSX registers.
++	(IFKF): Likewise.
++	(IBM128): Likewise.
++	(TFIFKF): Likewise.
++	(RELOAD): Add IEEE 128-bit floating point modes.
++	(signbittf2): Convert TF insns to add support for new IEEE 128-bit
++	floating point in VSX registers modes.
++	(signbit<mode>2, IBM128 iterator): Likewise.
++	(mov<mode>_64bit_dm, FMOVE128_FPR iterator): Likewise.
++	(mov<mode>_32bit, FMOVE128_FPR iterator): Likewise.
++	(negtf2): Likewise.
++	(neg<mode>2, TFIFKF iterator): Likewise.
++	(negtf2_internal): Likewise.
++	(abstf2): Likewise.
++	(abs<mode>2, TFIFKF iterator): Likewise.
++	(ieee_128bit_negative_zero): New IEEE 128-bit floating point in
++	VSX insn support for negate, absolute value, and negative absolute
++	value.
++	(ieee_128bit_vsx_neg<mode>2): Likewise.
++	(ieee_128bit_vsx_neg<mode>2_internal): Likewise.
++	(ieee_128bit_vsx_abs<mode>2): Likewise.
++	(ieee_128bit_vsx_abs<mode>2_internal): Likewise.
++	(ieee_128bit_vsx_nabs<mode>2): Likewise.
++	(ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
++	(FP128_64): Update pack/unpack 128-bit insns for IEEE 128-bit
++	floating point in VSX registers.
++	(unpack<mode>_dm): Likewise.
++	(unpack<mode>_nodm): Likewise.
++	(pack<mode>): Likewise.
++	(unpackv1ti): Likewise.
++	(unpack<mode>, FMOVE128_VSX iterator): Likewise.
++	(packv1ti): Likewise.
++	(pack<mode>, FMOVE128_VSX iterator): Likewise.
++	(extenddftf2): Add support for IEEE 128-bit floating point in VSX
++	registers.
++	(extenddftf2_internal): Likewise.
++	(trunctfdf2): Likewise.
++	(trunctfdf2_internal2): Likewise.
++	(fix_trunc_helper): Likewise.
++	(fix_trunctfdi2"): Likewise.
++	(floatditf2): Likewise.
++	(floatuns<mode>tf2): Likewise.
++	(extend<FLOAT128_SFDFTF:mode><IFKF:mode>2): Likewise.
++	(trunc<IFKF:mode><FLOAT128_SFDFTF:mode>2): Likewise.
++	(fix_trunc<IFKF:mode><SDI:mode>2): Likewise.
++	(fixuns_trunc<IFKF:mode><SDI:mode>2): Likewise.
++	(float<SDI:mode><IFKF:mode>2): Likewise.
++	(floatuns<SDI:mode><IFKF:mode>2): Likewise.
++
++	Backport from mainline:
++	2015-08-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/vector.md (VEC_L): Add KFmode and TFmode.
++	(VEC_M): Likewise.
++	(VEC_N): Likewise.
++	(mov<mode>, VEC_M iterator): Add support for IEEE 128-bit floating
++	point in VSX registers.
++
++	* config/rs6000/constraints.md (wb constraint): Document unused
++	w<x> constraint.
++	(we constraint): Likewise.
++	(wo constraint): Likewise.
++	(wp constraint): New constraint for IEEE 128-bit floating point in
++	VSX registers.
++	(wq constraint): Likewise.
++
++	* config/rs6000/predicates.md (easy_fp_constant): Add support for
++	IEEE 128-bit floating point in VSX registers.
++	(easy_scalar_constant): Likewise.
++
++	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Add new
++	constraints (wp, wq) for IEEE 128-bit floating point in VSX
++	registers.
++	(rs6000_init_hard_regno_mode_ok): Likewise.
++
++	* config/rs6000/vsx.md (VSX_LE_128): Add support for IEEE 128-bit
++	floating point in VSX registers.
++	(VSX_L): Likewise.
++	(VSX_M): Likewise.
++	(VSX_M2): Likewise.
++	(VSm): Likewise.
++	(VSs): Likewise.
++	(VSr): Likewise.
++	(VSa): Likewise.
++	(VSv): Likewise.
++	(vsx_le_permute_<mode>): Add support to properly swap bytes for
++	IEEE 128-bit floating point in VSX registers on little endian.
++	(vsx_le_undo_permute_<mode>): Likewise.
++	(vsx_le_perm_load_<mode>): Likewise.
++	(vsx_le_perm_store_<mode>): Likewise.
++	(splitters for IEEE 128-bit fp moves): Likewise.
++
++	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wp and
++	wq constraints.
++
++	* config/rs6000/altivec.md (VM): Add support for IEEE 128-bit
++	floating point in VSX registers.
++	(VM2): Likewise.
++
++	* doc/md.text (Machine Constraints): Document wp and wq
++	constraints on PowerPC.
++
++	Backport from mainline:
++	2015-07-14  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	PR target/66854
++	* config/rs6000/rs6000.c (rs6000_pass_by_reference): Move test for
++	null before IEEE 128-bit floating point support patch.
++
++	Backport from mainline:
++	2015-07-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000-protos.h (rs6000_secondary_reload_memory):
++	Use machine mode, not enum machine_mode in the prototype.
++
++	* config/rs6000/rs6000.h (FLOAT128_IEEE_P): New helper macros to
++	classify 128-bit floating point support.
++	(FLOAT128_IBM_P): Likewise.
++	(FLOAT128_VECTOR_P): Likewise.
++	(FLOAT128_2REG_P): Likewise.
++	(SCALAR_FLOAT_MODE_NOT_VECTOR_P): Likewise.
++	(SLOW_UNALIGNED_ACCESS): Add IEEE 128-bit floating point support.
++	(HARD_REGNO_CALLER_SAVE_MODE): Likewise.
++	(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
++
++	* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Drop
++	tests against TFmode/TDmode, since those modes do not use VSX
++	addresses.
++	(rs6000_hard_regno_mode_ok): Add IEEE 128-bit floating point
++	support.
++	(rs6000_init_hard_regno_mode_ok): Use new helper macros instead of
++	tests against TFmode, etc.
++	(invalid_e500_subreg): Add tests against IFmode/KFmode.
++	(reg_offset_addressing_ok_p): Likewise.
++	(rs6000_legitimate_offset_address_p): Likewise.
++	(rs6000_legitimize_address): Likewise.
++	(rs6000_legitimize_reload_address): Likewise.
++	(rs6000_legitimate_address_p): Clean up tests against TFmode and
++	TDmode to use the new helper macros, which will include IFmode and
++	KFmode.
++	(rs6000_emit_move): Likewise.
++	(rs6000_darwin64_record_arg_recurse): Likewise.
++	(print_operand): Likewise.
++	(rs6000_member_type_forces_blk): Treat IEEE 128-bit floating point
++	that uses a single vector register as a vector and not as a
++	floating point register in terms of the calling sequence.
++	(rs6000_discover_homogeneous_aggregate): Likewise.
++	(rs6000_return_in_memory): Likewise.
++	(init_cumulative_args): Likewise.
++	(rs6000_function_arg_boundary): Likewise.
++	(rs6000_function_arg_advance_1): Likewise.
++	(rs6000_function_arg): Likewise.
++	(rs6000_pass_by_reference): Likewise.
++	(rs6000_gimplify_va_arg): Likewise.
++	(rs6000_secondary_reload_memory): Use machine_mode not enum
++	machine mode.
++	(rs6000_split_multireg_move): Use new helper macros.
++	(spe_func_has_64bit_regs_p): Likewise.
++	(rs6000_output_function_epilogue): Add IFmode/KFmode support.
++	(output_toc): Use new helper macros.
++	(rs6000_register_move_cost): Likewise.
++	(rs6000_function_value): Add IEEE 128-bit floating point calling
++	sequence support.
++	(rs6000_libcall_value): Likewise.
++	(rs6000_scalar_mode_supported_p): Add support for IEEE 128-bit
++	floating point support.
++	(rs6000_vector_mode_supported_p): Likewise.
++
++	Backport from mainline:
++	2015-06-02  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000-modes.def (IFmode): Define IFmode to
++	provide access to the IBM extended double floating point mode if
++	long double is IEEE 128-bit floating point.
++	(KFmode): Define KFmode to provide access to IEEE 128-bit floating
++	point if long double is the IBM extended double type.
++
++	* config/rs6000/rs6000.opt (-mfloat128-none): New switches to
++	enable adding IEEE 128-bit floating point support.
++	(-mfloat128-software): Likewise.
++	(-mfloat128-sw): Likewise.
++
++	* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Do not allow
++	128-bit floating point types to occupy any register if
++	-mlong-double-64.  Do not allow use of IFmode/KFmode unless
++	-mfloat128-software is enabled.
++	(rs6000_debug_reg_global): Add IEEE 128-bit floating point debug
++	support.
++	(rs6000_option_override_internal): Add -mfloat128-* support.
++	(rs6000_init_builtins): Setup __ibm128 and __float128 type modes.
++
++	* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add ibm128
++	and float128 type nodes.
++	(ieee128_float_type_node): Likewise.
++	(ibm128_float_type_node): Likewise.
++
++2016-01-20  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Backport from mainline:
++	2016-01-20  Peter Bergner  <bergner@vnet.ibm.com>
++
++	* config/rs6000/ppc-auxv.h: New file.
++	* config/rs6000/rs6000-builtin.def (cpu_init): Add new builtin.
++	(cpu_is): Likewise.
++	(cpu_supports): Likewise.
++	* config/rs6000/rs6000.c: include "ppc-auxv.h".
++	(cpu_is_info): New variable.
++	(cpu_supports_info): Likewise.
++	(tcb_verification_symbol): Likewise.
++	(cpu_builtin_p): Likewise.
++	(cpu_expand_builtin): New function.
++	(rs6000_expand_ternop_builtin): Add support for CPU builtin functions.
++	(rs6000_init_builtins): Likewise.
++	(rs6000_elf_file_end): Emit HWCAP in TCB verification symbol.
++	* config/rs6000/rs6000.h (TLS_REGNUM): New define.
++	* configure.ac (gcc_cv_libc_provides_hwcap_in_tcb): New test.
++	* configure: Regenerate.
++	* config.in: Likewise.
++	* doc/extend.texi (PowerPC Built-in Functions): Document
++	__builtin_cpu_init, __builtin_cpu_is and __builtin_cpu_supports.
++
++2016-01-19  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2016-01-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/constraints.md (wo constraint): New constraint for
++	ISA 3.0 (power9).
++
++	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Add support
++	for wo constraint.
++	(rs6000_init_hard_regno_mode_ok): Likewise.
++
++	* config/rs6000/rs6000.h (r6000_reg_class_enum): Add support for
++	wo constraint.
++
++	* config/rs6000/altivec.md (altivec_vperm_<mode>): Clean up vperm
++	expanders not to have constraints.  Add support for ISA 3.0 xxperm
++	instruction.  Add support for fusing xxlor with xxperm.
++	(altivec_vperm_<mode>_internal): Likewise.
++	(altivec_vperm_v8hiv16qi): Likewise.
++	(altivec_vperm_<mode>v16q): Likewise.
++	(altivec_vperm_<mode>_uns): Likewise.
++	(vperm_v8hiv4si): Likewise.
++	(vperm_v16qiv8hi): Likewise.
++
++	* doc/md.texi (RS/6000 constraints): Document wo constraint.
++
++	Backport from mainline:
++	2016-01-04  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
++	OPTION_MASK_P9_DFORM.
++
++2016-01-13  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	Backport from mainline:
++	2015-12-28  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
++
++	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Verify that
++	this is never called when lxvx/stxvx are available.
++	(pass_analyze_swaps::gate): Don't perform swap optimization when
++	lxvx/stxvx are available.
++	* config/rs6000/vector.md (mov<mode>): Don't call
++	rs6000_emit_le_vsx_move when lxvx/stxvx are available.
++	* config/rs6000/vsx.md (*p9_vecload_<mode>): New define_insn.
++	(*p9_vecstore_<mode>): Likewise.
++	(*vsx_le_perm_load_<mode>:VSX_LE): Disable when lxvx/stxvx are
++	available.
++	(*vsx_le_perm_load_<mode>:VSX_W): Likewise.
++	(*vsx_le_perm_load_v8hi): Likewise.
++	(*vsx_le_perm_load_v16qi): Likewise.
++	(*vsx_le_perm_store_<mode>:VSX_LE): Likewise.
++	([related define_splits]): Likewise.
++	(*vsx_le_perm_store_<mode>:VSX_W): Likewise.
++	([related define_splits]): Likewise.
++	(*vsx_le_perm_store_v8hi): Likewise.
++	([related define_splits]): Likewise.
++	(*vsx_le_perm_store_v16qi): Likewise.
++	([related define_splits]): Likewise.
++	(*vsx_lxvd2x2_le_<mode>): Likewise.
++	(*vsx_lxvd2x4_le_<mode>): Likewise.
++	(*vsx_lxvd2x8_le_V8HI): Likewise.
++	(*vsx_lvxd2x16_le_V16QI): Likewise.
++	(*vsx_stxvd2x2_le_<mode>): Likewise.
++	(*vsx_stxvd2x4_le_<mode>): Likewise.
++	(*vsx_stxvd2x8_le_V8HI): Likewise.
++	(*vsx_stxvdx16_le_V16QI): Likewise.
++	([define_peepholes for vector load fusion]): Likewise.
++
++2015-12-14  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 231573.
++	* REVISION: Update subversion id.
++
++2015-11-25  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from mainline:
++	2015-11-25  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/constraints.md (wb constraint): New constraint for
++	ISA 3.0 d-form scalar addressing.
++
++	* config/rs6000/rs6000.c (mode_supports_vmx_dform): Add support
++	for ISA 3.0 D-form addressing to load SFmode/DFmode scalars into
++	Altivec registers.  Add wb constraint for Altivec registers with
++	D-form addressing.  If we have ISA 3.0 d-form support, undo
++	secondary reload support for using FPR registers if we want to do
++	D-form addressing.
++	(rs6000_debug_reg_global): Likewise.
++	(rs6000_setup_reg_addr_masks): Likewise.
++	(rs6000_init_hard_regno_mode_ok): Likewise.
++	(rs6000_secondary_reload): Likewise.
++	(rs6000_preferred_reload_class): Likewise.
++	(rs6000_secondary_reload_class): Likewise.
++
++	* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Add wb
++	constraint.
++
++	* config/rs6000/rs6000.md (f32_lr2 mode attribute): Add support
++	for ISA 3.0 SFmode/DFmode d-form addressing to Altivec registers.
++	(f32_lm2): Likewise.
++	(f32_li2): Likewise.
++	(f32_sr2): Likewise.
++	(f32_sm2): Likewise.
++	(f32_si2): Likewise.
++	(f64_p9): Likewise.
++	(extendsfdf2_fpr): Likewise.
++	(mov<mode>_hardfloat): Likewise.
++	(mov<mode>_hardfloat32): Likewise.
++	(mov<mode>_hardfloat64): Likewise.
++
++	* doc/md.texi (RS/6000 constraints): Document wb constraint.
++	Fixup we constraint documentation.
++
++2015-11-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 230841.
++	* REVISION: Update subversion id.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 230686.
++	* REVISION: Update subversion id.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Partial back port from trunk (not IEEE 128-bit HW support)
++	2015-11-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/constraints.md (we constraint): New constraint for
++	64-bit power9 vector support.
++	(wL constraint): New constraint for the element in a vector that
++	can be addressed by the MFVSRLD instruction.
++
++	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Add ISA 3.0
++	debugging.
++	(rs6000_init_hard_regno_mode_ok): If ISA 3.0 and 64-bit, enable we
++	constraint.  Disable the VSX<->GPR direct move helpers if we have
++	the MFVSRLD and MTVSRDD instructions.
++	(rs6000_secondary_reload_simple_move): Add support for doing
++	vector direct moves directly without additional scratch registers
++	if we have ISA 3.0 instructions.
++	(rs6000_secondary_reload_direct_move): Update comments.
++	(rs6000_output_move_128bit): Add support for ISA 3.0 vector
++	instructions.
++
++	* config/rs6000/vsx.md (vsx_mov<mode>): Add support for ISA 3.0
++	direct move instructions.
++	(vsx_movti_64bit): Likewise.
++	(vsx_extract_<mode>): Likewise.
++
++	* config/rs6000/rs6000.h (VECTOR_ELEMENT_MFVSRLD_64BIT): New
++	macros for ISA 3.0 direct move instructions.
++	(TARGET_DIRECT_MOVE_128): Likewise.
++	* config/rs6000/rs6000.h (TARGET_MADDLD): Add support for the ISA
++	3.0 integer multiply-add instruction.
++
++	* config/rs6000/rs6000.md (128-bit GPR splitters): Don't split a
++	128-bit move that is a direct move between GPR and vector
++	registers using ISA 3.0 direct move instructions.
++	(maddld4): Add support for the ISA 3.0 integer multiply-add
++	instruction.
++
++	* doc/md.texi (RS/6000 constraints): Document we, wF, wG, wL
++	constraints.  Update wa documentation to say not to use %x<n> on
++	instructions that only take Altivec registers.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk
++	2015-11-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
++		    Peter Bergner  <bergner@vnet.ibm.com>
++
++	* config/rs6000/rs6000.opt (-mpower9-fusion): Add new switches for
++	ISA 3.0 (power9).
++	(-mpower9-vector): Likewise.
++	(-mpower9-dform): Likewise.
++	(-mpower9-minmax): Likewise.
++	(-mtoc-fusion): Likewise.
++	(-mmodulo): Likewise.
++	(-mfloat128): Likewise.
++	(-mfloat128-hardware): Likewise.
++
++	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add option
++	mask for ISA 3.0 (power9).
++	(POWERPC_MASKS): Add new ISA 3.0 switches.
++	(power9 cpu): Add power9 cpu.
++
++	* config/rs6000/rs6000.h (ASM_CPU_POWER9_SPEC): Add support for
++	power9.
++	(ASM_CPU_SPEC): Likewise.
++	(EXTRA_SPECS): Likewise.
++
++	* config/rs6000/rs6000-opts.h (enum processor_type): Add
++	PROCESSOR_POWER9.
++
++	* config/rs6000/rs6000.c (power9_cost): Initial cost setup for
++	power9.
++	(rs6000_debug_reg_global): Add support for power9 fusion.
++	(rs6000_setup_reg_addr_masks): Cache mode size.
++	(rs6000_option_override_internal): Until real power9 tuning is
++	added, use -mtune=power8 for -mcpu=power9.
++	(rs6000_setup_reg_addr_masks): Do not allow pre-increment,
++	pre-decrement, or pre-modify on SFmode/DFmode if we allow the use
++	of Altivec registers.
++	(rs6000_option_override_internal): Add support for ISA 3.0
++	switches.  Do not allow -mfloat128 or -mfloat128-hardware at this
++	time.
++	(rs6000_loop_align): Add support for power9 cpu.
++	(rs6000_file_start): Likewise.
++	(rs6000_adjust_cost): Likewise.
++	(rs6000_issue_rate): Likewise.
++	(insn_must_be_first_in_group): Likewise.
++	(insn_must_be_last_in_group): Likewise.
++	(force_new_group): Likewise.
++	(rs6000_register_move_cost): Likewise.
++	(rs6000_opt_masks): Likewise.
++
++	* config/rs6000/rs6000.md (cpu attribute): Add power9.
++	* config/rs6000/rs6000-tables.opt: Regenerate.
++
++	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
++	_ARCH_PWR9 if power9 support is available.
++
++	* config/rs6000/aix61.h (ASM_CPU_SPEC): Add power9.
++	* config/rs6000/aix53.h (ASM_CPU_SPEC): Likewise.
++
++	* configure.ac: Determine if the assembler supports the ISA 3.0
++	instructions.
++	* config.in (HAVE_AS_POWER9): Likewise.
++	* configure: Regenerate.
++
++	* doc/invoke.texi (RS/6000 and PowerPC Options): Document ISA 3.0
++	switches.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk
++	2015-11-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config.gcc (powerpc*-*-*, rs6000*-*-*): Add power9 to hosts that
++	default to 64-bit.
++
++2015-11-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Back port from trunk
++	2015-11-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	* config/rs6000/constraints.md (wF constraint): New constraints
++	for power9/toc fusion.
++	(wG constraint): Likewise.
++
++	* config/rs6000/predicates.md (u6bit_cint_operand): New
++	predicate, recognize 0..63.
++	(upper16_cint_operand): New predicate for power9 and toc fusion.
++	(fpr_reg_operand): Likewise.
++	(toc_fusion_or_p9_reg_operand): Likewise.
++	(toc_fusion_mem_raw): Likewise.
++	(toc_fusion_mem_wrapped): Likewise.
++	(fusion_gpr_addis): If power9 fusion, allow fusion for a larger
++	address range.
++	(fusion_gpr_mem_combo): Delete, use fusion_addis_mem_combo_load
++	instead.
++	(fusion_addis_mem_combo_load): Add support for power9 fusion of
++	floating point loads, floating point stores, and gpr stores.
++	(fusion_addis_mem_combo_store): Likewise.
++	(fusion_offsettable_mem_operand): Likewise.
++
++	* config/rs6000/rs6000-protos.h (emit_fusion_addis): Add
++	declarations.
++	(emit_fusion_load_store): Likewise.
++	(fusion_p9_p): Likewise.
++	(expand_fusion_p9_load): Likewise.
++	(expand_fusion_p9_store): Likewise.
++	(emit_fusion_p9_load): Likewise.
++	(emit_fusion_p9_store): Likewise.
++	(fusion_wrap_memory_address): Likewise.
++
++	* config/rs6000/rs6000.c (struct rs6000_reg_addr): Add new
++	elements for power9 fusion.
++	(rs6000_debug_print_mode): Rework debug information to print more
++	information about fusion.
++	(rs6000_init_hard_regno_mode_ok): Setup for power9 fusion
++	support.
++	(rs6000_legitimate_address_p): Recognize toc fusion as a valid
++	offsettable memory address.
++	(rs6000_rtx_costs): Update costs for new ISA 3.0 instructions.
++	(emit_fusion_gpr_load): Move most of the code from
++	emit_fusion_gpr_load into emit_fusion-addis that handles both
++	power8 and power9 fusion.
++	(emit_fusion_addis): Likewise.
++	(emit_fusion_load_store): Likewise.
++	(fusion_wrap_memory_address): Add support for TOC fusion.
++	(fusion_split_address): Likewise.
++	(fusion_p9_p): Add support for power9 fusion.
++	(expand_fusion_p9_load): Likewise.
++	(expand_fusion_p9_store): Likewise.
++	(emit_fusion_p9_load): Likewise.
++	(emit_fusion_p9_store): Likewise.
++
++	* config/rs6000/rs6000.h (TARGET_EXTSWSLI): Macros for support for
++	new instructions in ISA 3.0.
++	(TARGET_CTZ): Likewise.
++	(TARGET_TOC_FUSION_INT): Macros for power9 fusion support.
++	(TARGET_TOC_FUSION_FP): Likewise.
++
++	* config/rs6000/rs6000.md (UNSPEC_FUSION_P9): New power9/toc
++	fusion unspecs.
++	(UNSPEC_FUSION_ADDIS): Likewise.
++	(QHSI mode iterator): New iterator for power9 fusion.
++	(GPR_FUSION): Likewise.
++	(FPR_FUSION): Likewise.
++	(mod<mode>3): Add support for ISA 3.0
++	modulus instructions.
++	(umod<mode>3): Likewise.
++	(divmod peephole): Likewise.
++	(udivmod peephole): Likewise.
++	(ctz<mode>2): Add support for ISA 3.0 count trailing zeros scalar
++	instructions.
++	(ctz<mode>2_h): Likewise.
++	(ashdi3_extswsli): Add support for ISA 3.0 EXTSWSLI instruction.
++	(ashdi3_extswsli_dot): Likewise.
++	(ashdi3_extswsli_dot2): Likewise.
++	(power9 fusion splitter): New power9/toc fusion support.
++	(toc_fusionload_<mode>): Likewise.
++	(toc_fusionload_di): Likewise.
++	(fusion_gpr_load_<mode>): Update predicate function.
++	(power9 fusion peephole2s): New power9/toc fusion support.
++	(fusion_gpr_<P:mode>_<GPR_FUSION:mode>_load): Likewise.
++	(fusion_gpr_<P:mode>_<GPR_FUSION:mode>_store): Likewise.
++	(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_load): Likewise.
++	(fusion_fpr_<P:mode>_<FPR_FUSION:mode>_store): Likewise.
++	(fusion_p9_<mode>_constant): Likewise.
++
++2015-11-13  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 230331.
++	* REVISION: Update subversion id.
++
++2015-10-16  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 228917.
++	* REVISION: Update subversion id.
++
++2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 227146.
++	* REVISION: Update subversion id.
++
++2015-08-13  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Merge up to 226873.
++	* REVISION: Update subversion id .
++
++2015-08012  Lynn Boger <laboger@linux.vnet.ibm.com>
++
++	Backport of trunk r223426 split stack implementation for
++	ppc64le and ppc64.
++
++2015-05-12  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Merge up to 223014.
++	* REVISION: Update subversion id.
++
++2015-04-24  Michael Meissner  <meissner@linux.vnet.ibm.com>
++
++	Clone gcc-5-branch, subversion id 222422.
++
++	* REVISION: New file, track subversion merges.
++
+Index: gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc	(.../gcc-5-branch)
++++ b/src/gcc/config.gcc	(.../ibm/gcc-5-branch)
+@@ -433,7 +433,7 @@
+ 	cpu_type=rs6000
+ 	extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h htmintrin.h htmxlintrin.h"
+ 	case x$with_cpu in
+-	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[345678]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
++	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
+ 		cpu_is_64bit=yes
+ 		;;
+ 	esac
+@@ -4048,7 +4048,7 @@
+ 				eval "with_$which=405"
+ 				;;
+ 			"" | common | native \
+-			| power | power[2345678] | power6x | powerpc | powerpc64 \
++			| power | power[23456789] | power6x | powerpc | powerpc64 \
+ 			| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
+ 			| 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
+ 			| 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
+Index: gcc/config/rs6000/aix53.h
+===================================================================
+--- a/src/gcc/config/rs6000/aix53.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/aix53.h	(.../ibm/gcc-5-branch)
+@@ -63,6 +63,7 @@
+ %{mcpu=power6x: -mpwr6} \
+ %{mcpu=power7: -mpwr7} \
+ %{mcpu=power8: -mpwr8} \
++%{mcpu=power9: -mpwr9} \
+ %{mcpu=powerpc: -mppc} \
+ %{mcpu=rs64a: -mppc} \
+ %{mcpu=603: -m603} \
+Index: gcc/config/rs6000/vector.md
+===================================================================
+--- a/src/gcc/config/rs6000/vector.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/vector.md	(.../ibm/gcc-5-branch)
+@@ -36,13 +36,14 @@
+ (define_mode_iterator VEC_K [V16QI V8HI V4SI V4SF])
+ 
+ ;; Vector logical modes
+-(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])
++(define_mode_iterator VEC_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI KF TF])
+ 
+-;; Vector modes for moves.  Don't do TImode here.
+-(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])
++;; Vector modes for moves.  Don't do TImode or TFmode here, since their
++;; moves are handled elsewhere.
++(define_mode_iterator VEC_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI KF])
+ 
+ ;; Vector modes for types that don't need a realignment under VSX
+-(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF V1TI])
++(define_mode_iterator VEC_N [V4SI V4SF V2DI V2DF V1TI KF TF])
+ 
+ ;; Vector comparison modes
+ (define_mode_iterator VEC_C [V16QI V8HI V4SI V2DI V4SF V2DF])
+@@ -95,16 +96,24 @@
+ {
+   if (can_create_pseudo_p ())
+     {
+-      if (CONSTANT_P (operands[1])
+-	  && !easy_vector_constant (operands[1], <MODE>mode))
+-	operands[1] = force_const_mem (<MODE>mode, operands[1]);
++      if (CONSTANT_P (operands[1]))
++	{
++	  if (FLOAT128_VECTOR_P (<MODE>mode))
++	    {
++	      if (!easy_fp_constant (operands[1], <MODE>mode))
++		operands[1] = force_const_mem (<MODE>mode, operands[1]);
++	    }
++	  else if (!easy_vector_constant (operands[1], <MODE>mode))
++	    operands[1] = force_const_mem (<MODE>mode, operands[1]);
++	}
+ 
+-      else if (!vlogical_operand (operands[0], <MODE>mode)
+-	       && !vlogical_operand (operands[1], <MODE>mode))
++      if (!vlogical_operand (operands[0], <MODE>mode)
++	  && !vlogical_operand (operands[1], <MODE>mode))
+ 	operands[1] = force_reg (<MODE>mode, operands[1]);
+     }
+   if (!BYTES_BIG_ENDIAN
+       && VECTOR_MEM_VSX_P (<MODE>mode)
++      && !TARGET_P9_VECTOR
+       && !gpr_or_gpr_p (operands[0], operands[1])
+       && (memory_operand (operands[0], <MODE>mode)
+           ^ memory_operand (operands[1], <MODE>mode)))
+Index: gcc/config/rs6000/rs6000-tables.opt
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-tables.opt	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-tables.opt	(.../ibm/gcc-5-branch)
+@@ -180,14 +180,17 @@
+ Enum(rs6000_cpu_opt_value) String(power8) Value(50)
+ 
+ EnumValue
+-Enum(rs6000_cpu_opt_value) String(powerpc) Value(51)
++Enum(rs6000_cpu_opt_value) String(power9) Value(51)
+ 
+ EnumValue
+-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
++Enum(rs6000_cpu_opt_value) String(powerpc) Value(52)
+ 
+ EnumValue
+-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(53)
++Enum(rs6000_cpu_opt_value) String(powerpc64) Value(53)
+ 
+ EnumValue
+-Enum(rs6000_cpu_opt_value) String(rs64) Value(54)
++Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(54)
+ 
++EnumValue
++Enum(rs6000_cpu_opt_value) String(rs64) Value(55)
++
+Index: gcc/config/rs6000/constraints.md
+===================================================================
+--- a/src/gcc/config/rs6000/constraints.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/constraints.md	(.../ibm/gcc-5-branch)
+@@ -1,5 +1,5 @@
+ ;; Constraint definitions for RS6000
+-;; Copyright (C) 2006-2015 Free Software Foundation, Inc.
++;; Copyright (C) 2006-2016 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+@@ -56,6 +56,9 @@
+ (define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"
+   "Any VSX register if the -mvsx option was used or NO_REGS.")
+ 
++(define_register_constraint "wb" "rs6000_constraints[RS6000_CONSTRAINT_wb]"
++  "Altivec register if the -mpower9-dform option was used or NO_REGS.")
++
+ ;; NOTE: For compatibility, "wc" is reserved to represent individual CR bits.
+ ;; It is currently used for that purpose in LLVM.
+ 
+@@ -62,6 +65,9 @@
+ (define_register_constraint "wd" "rs6000_constraints[RS6000_CONSTRAINT_wd]"
+   "VSX vector register to hold vector double data or NO_REGS.")
+ 
++(define_register_constraint "we" "rs6000_constraints[RS6000_CONSTRAINT_we]"
++  "VSX register if the -mpower9-vector -m64 options were used or NO_REGS.")
++
+ (define_register_constraint "wf" "rs6000_constraints[RS6000_CONSTRAINT_wf]"
+   "VSX vector register to hold vector float data or NO_REGS.")
+ 
+@@ -93,6 +99,15 @@
+ ;; There is a mode_attr that resolves to wm for SDmode and wn for SFmode
+ (define_register_constraint "wn" "NO_REGS" "No register (NO_REGS).")
+ 
++(define_register_constraint "wo" "rs6000_constraints[RS6000_CONSTRAINT_wo]"
++  "VSX register if the -mpower9-vector option was used or NO_REGS.")
++
++(define_register_constraint "wp" "rs6000_constraints[RS6000_CONSTRAINT_wp]"
++  "VSX register to use for IEEE 128-bit fp TFmode, or NO_REGS.")
++
++(define_register_constraint "wq" "rs6000_constraints[RS6000_CONSTRAINT_wq]"
++  "VSX register to use for IEEE 128-bit fp KFmode, or NO_REGS.")
++
+ (define_register_constraint "wr" "rs6000_constraints[RS6000_CONSTRAINT_wr]"
+   "General purpose register if 64-bit instructions are enabled or NO_REGS.")
+ 
+@@ -125,6 +140,22 @@
+   (and (match_code "const_int")
+        (match_test "TARGET_VSX && (ival == VECTOR_ELEMENT_SCALAR_64BIT)")))
+ 
++;; Extended fusion store
++(define_memory_constraint "wF"
++  "Memory operand suitable for power9 fusion load/stores"
++  (match_operand 0 "fusion_addis_mem_combo_load"))
++
++;; Fusion gpr load.
++(define_memory_constraint "wG"
++  "Memory operand suitable for TOC fusion memory references"
++  (match_operand 0 "toc_fusion_mem_wrapped"))
++
++(define_constraint "wL"
++  "Int constant that is the element number mfvsrld accesses in a vector."
++  (and (match_code "const_int")
++       (and (match_test "TARGET_DIRECT_MOVE_128")
++	    (match_test "(ival == VECTOR_ELEMENT_MFVSRLD_64BIT)"))))
++
+ ;; Lq/stq validates the address for load/store quad
+ (define_memory_constraint "wQ"
+   "Memory operand suitable for the load/store quad instructions"
+Index: gcc/config/rs6000/predicates.md
+===================================================================
+--- a/src/gcc/config/rs6000/predicates.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/predicates.md	(.../ibm/gcc-5-branch)
+@@ -142,6 +142,11 @@
+   (and (match_code "const_int")
+        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 31")))
+ 
++;; Return 1 if op is a unsigned 6-bit constant integer.
++(define_predicate "u6bit_cint_operand"
++  (and (match_code "const_int")
++       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 63")))
++
+ ;; Return 1 if op is a signed 8-bit constant integer.
+ ;; Integer multiplication complete more quickly
+ (define_predicate "s8bit_cint_operand"
+@@ -163,6 +168,12 @@
+   (and (match_code "const_int")
+        (match_test "satisfies_constraint_K (op)")))
+ 
++;; Return 1 if op is a constant integer that is a signed 16-bit constant
++;; shifted left 16 bits
++(define_predicate "upper16_cint_operand"
++  (and (match_code "const_int")
++       (match_test "satisfies_constraint_L (op)")))
++
+ ;; Return 1 if op is a constant integer that cannot fit in a signed D field.
+ (define_predicate "non_short_cint_operand"
+   (and (match_code "const_int")
+@@ -207,9 +218,15 @@
+   if (!REG_P (op))
+     return 0;
+ 
+-  if (REGNO (op) >= ARG_POINTER_REGNUM && !CA_REGNO_P (REGNO (op)))
++  if (REGNO (op) >= FIRST_PSEUDO_REGISTER)
+     return 1;
+ 
++  if (CR_REGNO_P (REGNO (op)))
++    return 1;
++
++  if (TARGET_ALTIVEC && ALTIVEC_REGNO_P (REGNO (op)))
++    return 1;
++
+   if (TARGET_VSX && VSX_REGNO_P (REGNO (op)))
+     return 1;
+ 
+@@ -236,6 +253,25 @@
+   return INT_REGNO_P (REGNO (op));
+ })
+ 
++;; Like int_reg_operand, but don't return true for pseudo registers
++(define_predicate "int_reg_operand_not_pseudo"
++  (match_operand 0 "register_operand")
++{
++  if ((TARGET_E500_DOUBLE || TARGET_SPE) && invalid_e500_subreg (op, mode))
++    return 0;
++
++  if (GET_CODE (op) == SUBREG)
++    op = SUBREG_REG (op);
++
++  if (!REG_P (op))
++    return 0;
++
++  if (REGNO (op) >= FIRST_PSEUDO_REGISTER)
++    return 0;
++
++  return INT_REGNO_P (REGNO (op));
++})
++
+ ;; Like int_reg_operand, but only return true for base registers
+ (define_predicate "base_reg_operand"
+   (match_operand 0 "int_reg_operand")
+@@ -249,6 +285,70 @@
+   return (REGNO (op) != FIRST_GPR_REGNO);
+ })
+ 
++
++;; Return true if this is a traditional floating point register
++(define_predicate "fpr_reg_operand"
++  (match_code "reg,subreg")
++{
++  HOST_WIDE_INT r;
++
++  if (GET_CODE (op) == SUBREG)
++    op = SUBREG_REG (op);
++
++  if (!REG_P (op))
++    return 0;
++
++  r = REGNO (op);
++  if (r >= FIRST_PSEUDO_REGISTER)
++    return 1;
++
++  return FP_REGNO_P (r);
++})
++
++;; Return true if this is a register that can has D-form addressing (GPR and
++;; traditional FPR registers for scalars).  ISA 3.0 (power9) adds D-form
++;; addressing for scalars in Altivec registers.
++;;
++;; If this is a pseudo only allow for GPR fusion in power8.  If we have the
++;; power9 fusion allow the floating point types.
++(define_predicate "toc_fusion_or_p9_reg_operand"
++  (match_code "reg,subreg")
++{
++  HOST_WIDE_INT r;
++  bool gpr_p = (mode == QImode || mode == HImode || mode == SImode
++		|| mode == SFmode
++		|| (TARGET_POWERPC64 && (mode == DImode || mode == DFmode)));
++  bool fpr_p = (TARGET_P9_FUSION
++		&& (mode == DFmode || mode == SFmode
++		    || (TARGET_POWERPC64 && mode == DImode)));
++  bool vmx_p = (TARGET_P9_FUSION && TARGET_P9_VECTOR
++		&& (mode == DFmode || mode == SFmode));
++
++  if (!TARGET_P8_FUSION)
++    return 0;
++
++  if (GET_CODE (op) == SUBREG)
++    op = SUBREG_REG (op);
++
++  if (!REG_P (op))
++    return 0;
++
++  r = REGNO (op);
++  if (r >= FIRST_PSEUDO_REGISTER)
++    return (gpr_p || fpr_p || vmx_p);
++
++  if (INT_REGNO_P (r))
++    return gpr_p;
++
++  if (FP_REGNO_P (r))
++    return fpr_p;
++
++  if (ALTIVEC_REGNO_P (r))
++    return vmx_p;
++
++  return 0;
++})
++
+ ;; Return 1 if op is a HTM specific SPR register.
+ (define_predicate "htm_spr_reg_operand"
+   (match_operand 0 "register_operand")
+@@ -468,6 +568,8 @@
+ 
+   switch (mode)
+     {
++    case KFmode:
++    case IFmode:
+     case TFmode:
+     case DFmode:
+     case SFmode:
+@@ -494,6 +596,12 @@
+   if (TARGET_PAIRED_FLOAT)
+     return false;
+ 
++  /* Because IEEE 128-bit floating point is considered a vector type
++     in order to pass it in VSX registers, it might use this function
++     instead of easy_fp_constant.  */
++  if (FLOAT128_VECTOR_P (mode))
++    return easy_fp_constant (op, mode);
++
+   if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))
+     {
+       if (zero_constant (op, mode))
+@@ -562,6 +670,14 @@
+   return EASY_VECTOR_MSB (val, GET_MODE_INNER (mode));
+ })
+ 
++;; Return true if this is an easy altivec constant that we form
++;; by using VSLDOI.
++(define_predicate "easy_vector_constant_vsldoi"
++  (and (match_code "const_vector")
++       (and (match_test "TARGET_ALTIVEC")
++	    (and (match_test "easy_altivec_constant (op, mode)")
++		 (match_test "vspltis_shifted (op) != 0")))))
++
+ ;; Return 1 if operand is constant zero (scalars and vectors).
+ (define_predicate "zero_constant"
+   (and (match_code "const_int,const_double,const_wide_int,const_vector")
+@@ -657,7 +773,7 @@
+ ;; Like indexed_or_indirect_operand, but also allow a GPR register if direct
+ ;; moves are supported.
+ (define_predicate "reg_or_indexed_operand"
+-  (match_code "mem,reg")
++  (match_code "mem,reg,subreg")
+ {
+   if (MEM_P (op))
+     return indexed_or_indirect_operand (op, mode);
+@@ -1740,6 +1856,35 @@
+   return GET_CODE (op) == UNSPEC && XINT (op, 1) == UNSPEC_TOCREL;
+ })
+ 
++;; Match the TOC memory operand that can be fused with an addis instruction.
++;; This is used in matching a potential fused address before register
++;; allocation.
++(define_predicate "toc_fusion_mem_raw"
++  (match_code "mem")
++{
++  if (!TARGET_TOC_FUSION_INT || !can_create_pseudo_p ())
++    return false;
++
++  return small_toc_ref (XEXP (op, 0), Pmode);
++})
++
++;; Match the memory operand that has been fused with an addis instruction and
++;; wrapped inside of an (unspec [...] UNSPEC_FUSION_ADDIS) wrapper.
++(define_predicate "toc_fusion_mem_wrapped"
++  (match_code "mem")
++{
++  rtx addr;
++
++  if (!TARGET_TOC_FUSION_INT)
++    return false;
++
++  if (!MEM_P (op))
++    return false;
++
++  addr = XEXP (op, 0);
++  return (GET_CODE (addr) == UNSPEC && XINT (addr, 1) == UNSPEC_FUSION_ADDIS);
++})
++
+ ;; Match the first insn (addis) in fusing the combination of addis and loads to
+ ;; GPR registers on power8.
+ (define_predicate "fusion_gpr_addis"
+@@ -1762,8 +1907,6 @@
+   else
+     return 0;
+ 
+-  /* Power8 currently will only do the fusion if the top 11 bits of the addis
+-     value are all 1's or 0's.  */
+   value = INTVAL (int_const);
+   if ((value & (HOST_WIDE_INT)0xffff) != 0)
+     return 0;
+@@ -1771,6 +1914,12 @@
+   if ((value & (HOST_WIDE_INT)0xffff0000) == 0)
+     return 0;
+ 
++  /* Power8 currently will only do the fusion if the top 11 bits of the addis
++     value are all 1's or 0's.  Ignore this restriction if we are testing
++     advanced fusion.  */
++  if (TARGET_P9_FUSION)
++    return 1;
++
+   return (IN_RANGE (value >> 16, -32, 31));
+ })
+ 
+@@ -1836,13 +1985,14 @@
+ ;; Match a GPR load (lbz, lhz, lwz, ld) that uses a combined address in the
+ ;; memory field with both the addis and the memory offset.  Sign extension
+ ;; is not handled here, since lha and lwa are not fused.
+-(define_predicate "fusion_gpr_mem_combo"
+-  (match_code "mem,zero_extend")
++;; With extended fusion, also match a FPR load (lfd, lfs) and float_extend
++(define_predicate "fusion_addis_mem_combo_load"
++  (match_code "mem,zero_extend,float_extend")
+ {
+   rtx addr, base, offset;
+ 
+-  /* Handle zero extend.  */
+-  if (GET_CODE (op) == ZERO_EXTEND)
++  /* Handle zero/float extend.  */
++  if (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == FLOAT_EXTEND)
+     {
+       op = XEXP (op, 0);
+       mode = GET_MODE (op);
+@@ -1863,6 +2013,12 @@
+ 	return 0;
+       break;
+ 
++    case SFmode:
++    case DFmode:
++      if (!TARGET_P9_FUSION)
++	return 0;
++      break;
++
+     default:
+       return 0;
+     }
+@@ -1890,3 +2046,79 @@
+ 
+   return 0;
+ })
++
++;; Like fusion_addis_mem_combo_load, but for stores
++(define_predicate "fusion_addis_mem_combo_store"
++  (match_code "mem")
++{
++  rtx addr, base, offset;
++
++  if (!MEM_P (op) || !TARGET_P9_FUSION)
++    return 0;
++
++  switch (mode)
++    {
++    case QImode:
++    case HImode:
++    case SImode:
++      break;
++
++    case DImode:
++      if (!TARGET_POWERPC64)
++	return 0;
++      break;
++
++    case SFmode:
++      if (!TARGET_SF_FPR)
++	return 0;
++      break;
++
++    case DFmode:
++      if (!TARGET_DF_FPR)
++	return 0;
++      break;
++
++    default:
++      return 0;
++    }
++
++  addr = XEXP (op, 0);
++  if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)
++    return 0;
++
++  base = XEXP (addr, 0);
++  if (!fusion_gpr_addis (base, GET_MODE (base)))
++    return 0;
++
++  offset = XEXP (addr, 1);
++  if (GET_CODE (addr) == PLUS)
++    return satisfies_constraint_I (offset);
++
++  else if (GET_CODE (addr) == LO_SUM)
++    {
++      if (TARGET_XCOFF || (TARGET_ELF && TARGET_POWERPC64))
++	return small_toc_ref (offset, GET_MODE (offset));
++
++      else if (TARGET_ELF && !TARGET_POWERPC64)
++	return CONSTANT_P (offset);
++    }
++
++  return 0;
++})
++
++;; Return true if the operand is a float_extend or zero extend of an
++;; offsettable memory operand suitable for use in fusion
++(define_predicate "fusion_offsettable_mem_operand"
++  (match_code "mem,zero_extend,float_extend")
++{
++  if (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == FLOAT_EXTEND)
++    {
++      op = XEXP (op, 0);
++      mode = GET_MODE (op);
++    }
++
++  if (!memory_operand (op, mode))
++    return 0;
++
++  return offsettable_nonstrict_memref_p (op);
++})
+Index: gcc/config/rs6000/rs6000-modes.def
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-modes.def	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-modes.def	(.../ibm/gcc-5-branch)
+@@ -18,6 +18,13 @@
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
++/* IBM 128-bit floating point.  IFmode and KFmode use the fractional float
++   support in order to declare 3 128-bit floating point types.  */
++FRACTIONAL_FLOAT_MODE (IF, 106, 16, ibm_extended_format);
++
++/* Explicit IEEE 128-bit floating point.  */
++FRACTIONAL_FLOAT_MODE (KF, 113, 16, ieee_quad_format);
++
+ /* 128-bit floating point.  ABI_V4 uses IEEE quad, AIX/Darwin
+    adjust this in rs6000_option_override_internal.  */
+ FLOAT_MODE (TF, 16, ieee_quad_format);
+Index: gcc/config/rs6000/rs6000-cpus.def
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-cpus.def	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-cpus.def	(.../ibm/gcc-5-branch)
+@@ -59,6 +59,16 @@
+   				 | OPTION_MASK_QUAD_MEMORY_ATOMIC	\
+ 				 | OPTION_MASK_UPPER_REGS_SF)
+ 
++/* Add ISEL back into ISA 3.0, since it is supposed to be a win.  Do not add
++   P9_DFORM or P9_MINMAX until they are fully debugged.  */
++#define ISA_3_0_MASKS_SERVER	(ISA_2_7_MASKS_SERVER			\
++				 | OPTION_MASK_FLOAT128_HW		\
++				 | OPTION_MASK_ISEL			\
++				 | OPTION_MASK_MODULO			\
++				 | OPTION_MASK_P9_FUSION		\
++				 | OPTION_MASK_P9_DFORM			\
++				 | OPTION_MASK_P9_VECTOR)
++
+ #define POWERPC_7400_MASK	(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC)
+ 
+ /* Deal with ports that do not have -mstrict-align.  */
+@@ -80,15 +90,22 @@
+ 				 | OPTION_MASK_DIRECT_MOVE		\
+ 				 | OPTION_MASK_DLMZB			\
+ 				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
++				 | OPTION_MASK_FLOAT128			\
++				 | OPTION_MASK_FLOAT128_HW		\
+ 				 | OPTION_MASK_FPRND			\
+ 				 | OPTION_MASK_HTM			\
+ 				 | OPTION_MASK_ISEL			\
+ 				 | OPTION_MASK_MFCRF			\
+ 				 | OPTION_MASK_MFPGPR			\
++				 | OPTION_MASK_MODULO			\
+ 				 | OPTION_MASK_MULHW			\
+ 				 | OPTION_MASK_NO_UPDATE		\
+ 				 | OPTION_MASK_P8_FUSION		\
+ 				 | OPTION_MASK_P8_VECTOR		\
++				 | OPTION_MASK_P9_DFORM			\
++				 | OPTION_MASK_P9_FUSION		\
++				 | OPTION_MASK_P9_MINMAX		\
++				 | OPTION_MASK_P9_VECTOR		\
+ 				 | OPTION_MASK_POPCNTB			\
+ 				 | OPTION_MASK_POPCNTD			\
+ 				 | OPTION_MASK_POWERPC64		\
+@@ -99,6 +116,7 @@
+ 				 | OPTION_MASK_RECIP_PRECISION		\
+ 				 | OPTION_MASK_SOFT_FLOAT		\
+ 				 | OPTION_MASK_STRICT_ALIGN_OPTIONAL	\
++				 | OPTION_MASK_TOC_FUSION		\
+ 				 | OPTION_MASK_UPPER_REGS_DF		\
+ 				 | OPTION_MASK_UPPER_REGS_SF		\
+ 				 | OPTION_MASK_VSX			\
+@@ -193,6 +211,7 @@
+ 	    | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
+ 	    | MASK_VSX | MASK_RECIP_PRECISION | OPTION_MASK_UPPER_REGS_DF)
+ RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
++RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER)
+ RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
+ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
+ RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
+Index: gcc/config/rs6000/rs6000-protos.h
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-protos.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-protos.h	(.../ibm/gcc-5-branch)
+@@ -31,6 +31,7 @@
+ #endif /* TREE_CODE */
+ 
+ extern bool easy_altivec_constant (rtx, machine_mode);
++extern int vspltis_shifted (rtx);
+ extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
+ extern bool macho_lo_sum_memory_operand (rtx, machine_mode);
+ extern int num_insns_constant (rtx, machine_mode);
+@@ -53,6 +54,9 @@
+ extern const char *rs6000_output_move_128bit (rtx *);
+ extern bool rs6000_move_128bit_ok_p (rtx []);
+ extern bool rs6000_split_128bit_ok_p (rtx []);
++extern void rs6000_expand_float128_convert (rtx, rtx, bool);
++extern void convert_float128_to_int (rtx *, enum rtx_code);
++extern void convert_int_to_float128 (rtx *, enum rtx_code);
+ extern void rs6000_expand_vector_init (rtx, rtx);
+ extern void paired_expand_vector_init (rtx, rtx);
+ extern void rs6000_expand_vector_set (rtx, rtx, int);
+@@ -82,7 +86,15 @@
+ extern bool quad_load_store_p (rtx, rtx);
+ extern bool fusion_gpr_load_p (rtx, rtx, rtx, rtx);
+ extern void expand_fusion_gpr_load (rtx *);
++extern void emit_fusion_addis (rtx, rtx, const char *, const char *);
++extern void emit_fusion_load_store (rtx, rtx, rtx, const char *);
+ extern const char *emit_fusion_gpr_load (rtx, rtx);
++extern bool fusion_p9_p (rtx, rtx, rtx, rtx);
++extern void expand_fusion_p9_load (rtx *);
++extern void expand_fusion_p9_store (rtx *);
++extern const char *emit_fusion_p9_load (rtx, rtx, rtx);
++extern const char *emit_fusion_p9_store (rtx, rtx, rtx);
++extern rtx fusion_wrap_memory_address (rtx);
+ extern enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx,
+ 							    enum reg_class);
+ extern enum reg_class (*rs6000_secondary_reload_class_ptr) (enum reg_class,
+@@ -133,8 +145,7 @@
+ extern void rs6000_emit_le_vsx_move (rtx, rtx, machine_mode);
+ extern void rs6000_emit_move (rtx, rtx, machine_mode);
+ extern rtx rs6000_secondary_memory_needed_rtx (machine_mode);
+-extern machine_mode rs6000_secondary_memory_needed_mode (enum
+-							      machine_mode);
++extern machine_mode rs6000_secondary_memory_needed_mode (machine_mode);
+ extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, machine_mode,
+ 						    int, int, int, int *);
+ extern bool rs6000_legitimate_offset_address_p (machine_mode, rtx,
+@@ -191,6 +202,8 @@
+ extern void rs6000_emit_load_toc_table (int);
+ extern unsigned int rs6000_dbx_register_number (unsigned int, unsigned int);
+ extern void rs6000_emit_epilogue (int);
++extern void rs6000_expand_split_stack_prologue (void);
++extern void rs6000_split_stack_space_check (rtx, rtx);
+ extern void rs6000_emit_eh_reg_restore (rtx, rtx);
+ extern const char * output_isel (rtx *);
+ extern void rs6000_call_aix (rtx, rtx, rtx, rtx);
+Index: gcc/config/rs6000/ppc-auxv.h
+===================================================================
+--- a/src/gcc/config/rs6000/ppc-auxv.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/ppc-auxv.h	(.../ibm/gcc-5-branch)
+@@ -0,0 +1,105 @@
++/* PowerPC support for accessing the AUXV AT_PLATFORM, AT_HWCAP and AT_HWCAP2
++   values from the Thread Control Block (TCB).
++
++   Copyright (C) 2016 Free Software Foundation, Inc.
++   Contributed by Peter Bergner <bergner@vnet.ibm.com>.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   Under Section 7 of GPL version 3, you are granted additional
++   permissions described in the GCC Runtime Library Exception, version
++   3.1, as published by the Free Software Foundation.
++
++   You should have received a copy of the GNU General Public License and
++   a copy of the GCC Runtime Library Exception along with this program;
++   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++#ifndef _PPC_AUXV_H
++#define _PPC_AUXV_H
++
++/* The PLATFORM value stored in the TCB is offset by _DL_FIRST_PLATFORM.  */
++#define _DL_FIRST_PLATFORM             32
++
++/* AT_PLATFORM bits.  These must match the values defined in GLIBC. */
++#define PPC_PLATFORM_POWER4            0
++#define PPC_PLATFORM_PPC970            1
++#define PPC_PLATFORM_POWER5            2
++#define PPC_PLATFORM_POWER5_PLUS       3
++#define PPC_PLATFORM_POWER6            4
++#define PPC_PLATFORM_CELL_BE           5
++#define PPC_PLATFORM_POWER6X           6
++#define PPC_PLATFORM_POWER7            7
++#define PPC_PLATFORM_PPCA2             8
++#define PPC_PLATFORM_PPC405            9
++#define PPC_PLATFORM_PPC440            10
++#define PPC_PLATFORM_PPC464            11
++#define PPC_PLATFORM_PPC476            12
++#define PPC_PLATFORM_POWER8            13
++#define PPC_PLATFORM_POWER9            14
++
++/* AT_HWCAP bits.  These must match the values defined in the Linux kernel.  */
++#define PPC_FEATURE_32              0x80000000
++#define PPC_FEATURE_64              0x40000000
++#define PPC_FEATURE_601_INSTR       0x20000000
++#define PPC_FEATURE_HAS_ALTIVEC     0x10000000
++#define PPC_FEATURE_HAS_FPU         0x08000000
++#define PPC_FEATURE_HAS_MMU         0x04000000
++#define PPC_FEATURE_HAS_4xxMAC      0x02000000
++#define PPC_FEATURE_UNIFIED_CACHE   0x01000000
++#define PPC_FEATURE_HAS_SPE         0x00800000
++#define PPC_FEATURE_HAS_EFP_SINGLE  0x00400000
++#define PPC_FEATURE_HAS_EFP_DOUBLE  0x00200000
++#define PPC_FEATURE_NO_TB           0x00100000
++#define PPC_FEATURE_POWER4          0x00080000
++#define PPC_FEATURE_POWER5          0x00040000
++#define PPC_FEATURE_POWER5_PLUS     0x00020000
++#define PPC_FEATURE_CELL_BE         0x00010000
++#define PPC_FEATURE_BOOKE           0x00008000
++#define PPC_FEATURE_SMT             0x00004000
++#define PPC_FEATURE_ICACHE_SNOOP    0x00002000
++#define PPC_FEATURE_ARCH_2_05       0x00001000
++#define PPC_FEATURE_PA6T            0x00000800
++#define PPC_FEATURE_HAS_DFP         0x00000400
++#define PPC_FEATURE_POWER6_EXT      0x00000200
++#define PPC_FEATURE_ARCH_2_06       0x00000100
++#define PPC_FEATURE_HAS_VSX         0x00000080
++#define PPC_FEATURE_PERFMON_COMPAT  0x00000040
++#define PPC_FEATURE_TRUE_LE         0x00000002
++#define PPC_FEATURE_PPC_LE          0x00000001
++
++/* AT_HWCAP2 bits.  These must match the values defined in the Linux kernel.  */
++#define PPC_FEATURE2_ARCH_2_07      0x80000000
++#define PPC_FEATURE2_HAS_HTM        0x40000000
++#define PPC_FEATURE2_HAS_DSCR       0x20000000
++#define PPC_FEATURE2_HAS_EBB        0x10000000
++#define PPC_FEATURE2_HAS_ISEL       0x08000000
++#define PPC_FEATURE2_HAS_TAR        0x04000000
++#define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000
++#define PPC_FEATURE2_HTM_NOSC       0x01000000
++#define PPC_FEATURE2_ARCH_3_00      0x00800000
++#define PPC_FEATURE2_HAS_IEEE128    0x00400000
++
++
++/* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and
++   AT_HWCAP2 values.  These must match the values defined in GLIBC.  */
++#define TCB_PLATFORM_OFFSET ((TARGET_64BIT) ? -28764 : -28724)
++#define TCB_HWCAP_BASE_OFFSET ((TARGET_64BIT) ? -28776 : -28736)
++#define TCB_HWCAP1_OFFSET \
++  ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET : TCB_HWCAP_BASE_OFFSET+4)
++#define TCB_HWCAP2_OFFSET \
++  ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET+4 : TCB_HWCAP_BASE_OFFSET)
++#define TCB_HWCAP_OFFSET(ID) \
++  (((ID) == 0) ? TCB_HWCAP1_OFFSET : TCB_HWCAP2_OFFSET)
++
++#endif /* _PPC_AUXV_H */
+Index: gcc/config/rs6000/rs6000-builtin.def
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-builtin.def	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-builtin.def	(.../ibm/gcc-5-branch)
+@@ -1985,6 +1985,15 @@
+ 	          RS6000_BTC_MISC | RS6000_BTC_UNARY | RS6000_BTC_VOID,
+ 		  CODE_FOR_rs6000_mtfsf)
+ 
++BU_SPECIAL_X (RS6000_BUILTIN_CPU_INIT, "__builtin_cpu_init",
++	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
++
++BU_SPECIAL_X (RS6000_BUILTIN_CPU_IS, "__builtin_cpu_is",
++	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
++
++BU_SPECIAL_X (RS6000_BUILTIN_CPU_SUPPORTS, "__builtin_cpu_supports",
++	      RS6000_BTM_ALWAYS, RS6000_BTC_MISC)
++
+ /* Darwin CfString builtin.  */
+ BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_ALWAYS,
+ 	      RS6000_BTC_MISC)
+Index: gcc/config/rs6000/rs6000-c.c
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-c.c	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-c.c	(.../ibm/gcc-5-branch)
+@@ -378,6 +378,8 @@
+     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
+   if ((flags & OPTION_MASK_DIRECT_MOVE) != 0)
+     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
++  if ((flags & OPTION_MASK_MODULO) != 0)
++    rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
+   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
+     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
+   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
+@@ -437,6 +439,10 @@
+     builtin_define ("__RSQRTE__");
+   if (TARGET_FRSQRTES)
+     builtin_define ("__RSQRTEF__");
++  if (TARGET_FLOAT128)
++    builtin_define ("__FLOAT128__");
++  if (TARGET_FLOAT128_HW)
++    builtin_define ("__FLOAT128_HARDWARE__");
+ 
+   if (TARGET_EXTRA_BUILTINS && cpp_get_options (pfile)->lang != CLK_ASM)
+     {
+@@ -510,6 +516,11 @@
+     {
+       builtin_define ("__LONG_DOUBLE_128__");
+       builtin_define ("__LONGDOUBLE128");
++
++      if (TARGET_IEEEQUAD)
++	builtin_define ("__LONG_DOUBLE_IEEE128__");
++      else
++	builtin_define ("__LONG_DOUBLE_IBM128__");
+     }
+ 
+   switch (TARGET_CMODEL)
+Index: gcc/config/rs6000/rs6000.opt
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.opt	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000.opt	(.../ibm/gcc-5-branch)
+@@ -600,3 +600,39 @@
+ moptimize-swaps
+ Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
+ Analyze and remove doubleword swaps from VSX computations.
++
++mpower9-fusion
++Target Report Mask(P9_FUSION) Var(rs6000_isa_flags)
++Fuse certain operations together for better performance on power9.
++
++mpower9-vector
++Target Report Mask(P9_VECTOR) Var(rs6000_isa_flags)
++Use/do not use vector and scalar instructions added in ISA 3.0.
++
++mpower9-dform
++Target Undocumented Mask(P9_DFORM) Var(rs6000_isa_flags)
++Use/do not use vector and scalar instructions added in ISA 3.0.
++
++mpower9-minmax
++Target Undocumented Mask(P9_MINMAX) Var(rs6000_isa_flags)
++Use/do not use the new min/max instructions defined in ISA 3.0.
++
++mtoc-fusion
++Target Undocumented Mask(TOC_FUSION) Var(rs6000_isa_flags)
++Fuse medium/large code model toc references with the memory instruction.
++
++mmodulo
++Target Report Mask(MODULO) Var(rs6000_isa_flags)
++Generate the integer modulo instructions.
++
++mfloat128
++Target Report Mask(FLOAT128) Var(rs6000_isa_flags)
++Enable/disable IEEE 128-bit floating point via the __float128 keyword.
++
++mfloat128-hardware
++Target Report Mask(FLOAT128_HW) Var(rs6000_isa_flags)
++Enable/disable using IEEE 128-bit floating point instructions.
++
++mfloat128-convert
++Target Undocumented Mask(FLOAT128_CVT) Var(rs6000_isa_flags)
++Enable/disable default conversions between __float128 & long double.
+Index: gcc/config/rs6000/linux64.h
+===================================================================
+--- a/src/gcc/config/rs6000/linux64.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/linux64.h	(.../ibm/gcc-5-branch)
+@@ -216,6 +216,21 @@
+ #define MULTILIB_DEFAULTS { "m32" }
+ #endif
+ 
++/* Split stack is only supported for 64 bit, and requires glibc >= 2.18.  */
++#if TARGET_GLIBC_MAJOR * 1000 + TARGET_GLIBC_MINOR >= 2018
++# ifndef RS6000_BI_ARCH
++#  define TARGET_CAN_SPLIT_STACK
++# else
++#  if DEFAULT_ARCH64_P
++/* Supported, and the default is -m64  */
++#   define TARGET_CAN_SPLIT_STACK_64BIT 1
++#  else
++/* Supported, and the default is -m32  */
++#   define TARGET_CAN_SPLIT_STACK_64BIT 0
++#  endif
++# endif
++#endif
++
+ #ifndef RS6000_BI_ARCH
+ 
+ /* 64-bit PowerPC Linux always has a TOC.  */
+Index: gcc/config/rs6000/rs6000.c
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.c	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000.c	(.../ibm/gcc-5-branch)
+@@ -1,5 +1,5 @@
+ /* Subroutines used for code generation on IBM RS/6000.
+-   Copyright (C) 1991-2015 Free Software Foundation, Inc.
++   Copyright (C) 1991-2016 Free Software Foundation, Inc.
+    Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
+ 
+    This file is part of GCC.
+@@ -115,6 +115,7 @@
+ #if TARGET_MACHO
+ #include "gstab.h"  /* for N_SLINE */
+ #endif
++#include "ppc-auxv.h"
+ 
+ #ifndef TARGET_NO_PROTOTYPE
+ #define TARGET_NO_PROTOTYPE 0
+@@ -155,10 +156,9 @@
+   int gp_size;			/* size of saved GP registers */
+   int fp_size;			/* size of saved FP registers */
+   int altivec_size;		/* size of saved AltiVec registers */
+-  int cr_size;			/* size to hold CR if not in save_size */
+-  int vrsave_size;		/* size to hold VRSAVE if not in save_size */
+-  int altivec_padding_size;	/* size of altivec alignment padding if
+-				   not in save_size */
++  int cr_size;			/* size to hold CR if not in fixed area */
++  int vrsave_size;		/* size to hold VRSAVE */
++  int altivec_padding_size;	/* size of altivec alignment padding */
+   int spe_gp_size;		/* size of 64-bit GPR save size for SPE */
+   int spe_padding_size;
+   HOST_WIDE_INT total_size;	/* total bytes allocated for stack */
+@@ -188,6 +188,9 @@
+      64-bits wide and is allocated early enough so that the offset
+      does not overflow the 16-bit load/store offset field.  */
+   rtx sdmode_stack_slot;
++  /* Alternative internal arg pointer for -fsplit-stack.  */
++  rtx split_stack_arg_pointer;
++  bool split_stack_argp_used;
+   /* Flag if r2 setup is needed with ELFv2 ABI.  */
+   bool r2_setup_needed;
+ } machine_function;
+@@ -332,6 +335,88 @@
+   { "rsqrtd",	 (RECIP_DF_RSQRT | RECIP_V2DF_RSQRT) },
+ };
+ 
++/* Used by __builtin_cpu_is(), mapping from PLATFORM names to values.  */
++static const struct
++{
++  const char *cpu;
++  unsigned int cpuid;
++} cpu_is_info[] = {
++  { "power9",	   PPC_PLATFORM_POWER9 },
++  { "power8",	   PPC_PLATFORM_POWER8 },
++  { "power7",	   PPC_PLATFORM_POWER7 },
++  { "power6x",	   PPC_PLATFORM_POWER6X },
++  { "power6",	   PPC_PLATFORM_POWER6 },
++  { "power5+",	   PPC_PLATFORM_POWER5_PLUS },
++  { "power5",	   PPC_PLATFORM_POWER5 },
++  { "ppc970",	   PPC_PLATFORM_PPC970 },
++  { "power4",	   PPC_PLATFORM_POWER4 },
++  { "ppca2",	   PPC_PLATFORM_PPCA2 },
++  { "ppc476",	   PPC_PLATFORM_PPC476 },
++  { "ppc464",	   PPC_PLATFORM_PPC464 },
++  { "ppc440",	   PPC_PLATFORM_PPC440 },
++  { "ppc405",	   PPC_PLATFORM_PPC405 },
++  { "ppc-cell-be", PPC_PLATFORM_CELL_BE }
++};
++
++/* Used by __builtin_cpu_supports(), mapping from HWCAP names to masks.  */
++static const struct
++{
++  const char *hwcap;
++  int mask;
++  unsigned int id;
++} cpu_supports_info[] = {
++  /* AT_HWCAP masks.  */
++  { "4xxmac",		PPC_FEATURE_HAS_4xxMAC,		0 },
++  { "altivec",		PPC_FEATURE_HAS_ALTIVEC,	0 },
++  { "arch_2_05",	PPC_FEATURE_ARCH_2_05,		0 },
++  { "arch_2_06",	PPC_FEATURE_ARCH_2_06,		0 },
++  { "archpmu",		PPC_FEATURE_PERFMON_COMPAT,	0 },
++  { "booke",		PPC_FEATURE_BOOKE,		0 },
++  { "cellbe",		PPC_FEATURE_CELL_BE,		0 },
++  { "dfp",		PPC_FEATURE_HAS_DFP,		0 },
++  { "efpdouble",	PPC_FEATURE_HAS_EFP_DOUBLE,	0 },
++  { "efpsingle",	PPC_FEATURE_HAS_EFP_SINGLE,	0 },
++  { "fpu",		PPC_FEATURE_HAS_FPU,		0 },
++  { "ic_snoop",		PPC_FEATURE_ICACHE_SNOOP,	0 },
++  { "mmu",		PPC_FEATURE_HAS_MMU,		0 },
++  { "notb",		PPC_FEATURE_NO_TB,		0 },
++  { "pa6t",		PPC_FEATURE_PA6T,		0 },
++  { "power4",		PPC_FEATURE_POWER4,		0 },
++  { "power5",		PPC_FEATURE_POWER5,		0 },
++  { "power5+",		PPC_FEATURE_POWER5_PLUS,	0 },
++  { "power6x",		PPC_FEATURE_POWER6_EXT,		0 },
++  { "ppc32",		PPC_FEATURE_32,			0 },
++  { "ppc601",		PPC_FEATURE_601_INSTR,		0 },
++  { "ppc64",		PPC_FEATURE_64,			0 },
++  { "ppcle",		PPC_FEATURE_PPC_LE,		0 },
++  { "smt",		PPC_FEATURE_SMT,		0 },
++  { "spe",		PPC_FEATURE_HAS_SPE,		0 },
++  { "true_le",		PPC_FEATURE_TRUE_LE,		0 },
++  { "ucache",		PPC_FEATURE_UNIFIED_CACHE,	0 },
++  { "vsx",		PPC_FEATURE_HAS_VSX,		0 },
++
++  /* AT_HWCAP2 masks.  */
++  { "arch_2_07",	PPC_FEATURE2_ARCH_2_07,		1 },
++  { "dscr",		PPC_FEATURE2_HAS_DSCR,		1 },
++  { "ebb",		PPC_FEATURE2_HAS_EBB,		1 },
++  { "htm",		PPC_FEATURE2_HAS_HTM,		1 },
++  { "htm-nosc",		PPC_FEATURE2_HTM_NOSC,		1 },
++  { "isel",		PPC_FEATURE2_HAS_ISEL,		1 },
++  { "tar",		PPC_FEATURE2_HAS_TAR,		1 },
++  { "vcrypto",		PPC_FEATURE2_HAS_VEC_CRYPTO,	1 },
++  { "arch_3_00",	PPC_FEATURE2_ARCH_3_00,		1 },
++  { "ieee128",		PPC_FEATURE2_HAS_IEEE128,	1 }
++};
++
++/* Newer LIBCs explicitly export this symbol to declare that they provide
++   the AT_PLATFORM and AT_HWCAP/AT_HWCAP2 values in the TCB.  We emit a
++   reference to this symbol whenever we expand a CPU builtin, so that
++   we never link against an old LIBC.  */
++const char *tcb_verification_symbol = "__parse_hwcap_and_convert_at_platform";
++
++/* True if we have expanded a CPU builtin.  */
++bool cpu_builtin_p;
++
+ /* Pointer to function (in rs6000-c.c) that can define or undefine target
+    macros that have changed.  Languages that don't support the preprocessor
+    don't link in rs6000-c.c, so we can't call it directly.  */
+@@ -416,8 +501,18 @@
+   enum insn_code reload_fpr_gpr;	/* INSN to move from FPR to GPR.  */
+   enum insn_code reload_gpr_vsx;	/* INSN to move from GPR to VSX.  */
+   enum insn_code reload_vsx_gpr;	/* INSN to move from VSX to GPR.  */
++  enum insn_code fusion_gpr_ld;		/* INSN for fusing gpr ADDIS/loads.  */
++					/* INSNs for fusing addi with loads
++					   or stores for each reg. class.  */					   
++  enum insn_code fusion_addi_ld[(int)N_RELOAD_REG];
++  enum insn_code fusion_addi_st[(int)N_RELOAD_REG];
++					/* INSNs for fusing addis with loads
++					   or stores for each reg. class.  */					   
++  enum insn_code fusion_addis_ld[(int)N_RELOAD_REG];
++  enum insn_code fusion_addis_st[(int)N_RELOAD_REG];
+   addr_mask_type addr_mask[(int)N_RELOAD_REG]; /* Valid address masks.  */
+   bool scalar_in_vmx_p;			/* Scalar value can go in VMX.  */
++  bool fused_toc;			/* Mode supports TOC fusion.  */
+ };
+ 
+ static struct rs6000_reg_addr reg_addr[NUM_MACHINE_MODES];
+@@ -438,6 +533,13 @@
+ 	  != 0);
+ }
+ 
++/* Return true if we have D-form addressing in altivec registers.  */
++static inline bool
++mode_supports_vmx_dform (machine_mode mode)
++{
++  return ((reg_addr[mode].addr_mask[RELOAD_REG_VMX] & RELOAD_REG_OFFSET) != 0);
++}
++
+ 
+ /* Target cpu costs.  */
+ 
+@@ -1025,6 +1127,26 @@
+   COSTS_N_INSNS (3),	/* SF->DF convert */
+ };
+ 
++/* Instruction costs on POWER9 processors.  */
++static const
++struct processor_costs power9_cost = {
++  COSTS_N_INSNS (3),	/* mulsi */
++  COSTS_N_INSNS (3),	/* mulsi_const */
++  COSTS_N_INSNS (3),	/* mulsi_const9 */
++  COSTS_N_INSNS (3),	/* muldi */
++  COSTS_N_INSNS (19),	/* divsi */
++  COSTS_N_INSNS (35),	/* divdi */
++  COSTS_N_INSNS (3),	/* fp */
++  COSTS_N_INSNS (3),	/* dmul */
++  COSTS_N_INSNS (14),	/* sdiv */
++  COSTS_N_INSNS (17),	/* ddiv */
++  128,			/* cache line size */
++  32,			/* l1 cache */
++  256,			/* l2 cache */
++  12,			/* prefetch streams */
++  COSTS_N_INSNS (3),	/* SF->DF convert */
++};
++
+ /* Instruction costs on POWER A2 processors.  */
+ static const
+ struct processor_costs ppca2_cost = {
+@@ -1191,6 +1313,7 @@
+ 						   machine_mode,
+ 						   enum reg_class);
+ static bool rs6000_save_toc_in_prologue_p (void);
++static rtx rs6000_internal_arg_pointer (void);
+ 
+ rtx (*rs6000_legitimize_reload_address_ptr) (rtx, machine_mode, int, int,
+ 					     int, int *)
+@@ -1412,6 +1535,12 @@
+ #undef TARGET_SET_UP_BY_PROLOGUE
+ #define TARGET_SET_UP_BY_PROLOGUE rs6000_set_up_by_prologue
+ 
++#undef TARGET_EXTRA_LIVE_ON_ENTRY
++#define TARGET_EXTRA_LIVE_ON_ENTRY rs6000_live_on_entry
++
++#undef TARGET_INTERNAL_ARG_POINTER
++#define TARGET_INTERNAL_ARG_POINTER rs6000_internal_arg_pointer
++
+ #undef TARGET_HAVE_TLS
+ #define TARGET_HAVE_TLS HAVE_AS_TLS
+ 
+@@ -1713,6 +1842,12 @@
+ #define TARGET_LIBGCC_SHIFT_COUNT_MODE rs6000_abi_word_mode
+ #undef TARGET_UNWIND_WORD_MODE
+ #define TARGET_UNWIND_WORD_MODE rs6000_abi_word_mode
++
++#undef TARGET_C_MODE_FOR_SUFFIX
++#define TARGET_C_MODE_FOR_SUFFIX rs6000_c_mode_for_suffix
++
++#undef TARGET_INVALID_BINARY_OP
++#define TARGET_INVALID_BINARY_OP rs6000_invalid_binary_op
+ 
+ 
+ /* Processor table.  */
+@@ -1766,9 +1901,11 @@
+ {
+   unsigned HOST_WIDE_INT reg_size;
+ 
+-  /* TF/TD modes are special in that they always take 2 registers.  */
++  /* 128-bit floating point usually takes 2 registers, unless it is IEEE
++     128-bit floating point that can go in vector registers, which has VSX
++     memory addressing.  */
+   if (FP_REGNO_P (regno))
+-    reg_size = ((VECTOR_MEM_VSX_P (mode) && mode != TDmode && mode != TFmode)
++    reg_size = (VECTOR_MEM_VSX_P (mode)
+ 		? UNITS_PER_VSX_WORD
+ 		: UNITS_PER_FP_WORD);
+ 
+@@ -1815,6 +1952,7 @@
+      asked for it.  */
+   if (TARGET_VSX && VSX_REGNO_P (regno)
+       && (VECTOR_MEM_VSX_P (mode)
++	  || FLOAT128_VECTOR_P (mode)
+ 	  || reg_addr[mode].scalar_in_vmx_p
+ 	  || (TARGET_VSX_TIMODE && mode == TImode)
+ 	  || (TARGET_VADDUQM && mode == V1TImode)))
+@@ -1840,6 +1978,9 @@
+      modes and DImode.  */
+   if (FP_REGNO_P (regno))
+     {
++      if (FLOAT128_VECTOR_P (mode))
++	return false;
++
+       if (SCALAR_FLOAT_MODE_P (mode)
+ 	  && (mode != TDmode || (regno % 2) == 0)
+ 	  && FP_REGNO_P (last_regno))
+@@ -2033,6 +2174,8 @@
+ rs6000_debug_print_mode (ssize_t m)
+ {
+   ssize_t rc;
++  int spaces = 0;
++  bool fuse_extra_p;
+ 
+   fprintf (stderr, "Mode: %-5s", GET_MODE_NAME (m));
+   for (rc = 0; rc < N_RELOAD_REG; rc++)
+@@ -2039,19 +2182,105 @@
+     fprintf (stderr, " %s: %s", reload_reg_map[rc].name,
+ 	     rs6000_debug_addr_mask (reg_addr[m].addr_mask[rc], true));
+ 
++  if ((reg_addr[m].reload_store != CODE_FOR_nothing)
++      || (reg_addr[m].reload_load != CODE_FOR_nothing))
++    fprintf (stderr, "  Reload=%c%c",
++	     (reg_addr[m].reload_store != CODE_FOR_nothing) ? 's' : '*',
++	     (reg_addr[m].reload_load != CODE_FOR_nothing) ? 'l' : '*');
++  else
++    spaces += sizeof ("  Reload=sl") - 1;
++
++  if (reg_addr[m].scalar_in_vmx_p)
++    {
++      fprintf (stderr, "%*s  Upper=y", spaces, "");
++      spaces = 0;
++    }
++  else
++    spaces += sizeof ("  Upper=y") - 1;
++
++  fuse_extra_p = ((reg_addr[m].fusion_gpr_ld != CODE_FOR_nothing)
++		  || reg_addr[m].fused_toc);
++  if (!fuse_extra_p)
++    {
++      for (rc = 0; rc < N_RELOAD_REG; rc++)
++	{
++	  if (rc != RELOAD_REG_ANY)
++	    {
++	      if (reg_addr[m].fusion_addi_ld[rc]     != CODE_FOR_nothing
++		  || reg_addr[m].fusion_addi_ld[rc]  != CODE_FOR_nothing
++		  || reg_addr[m].fusion_addi_st[rc]  != CODE_FOR_nothing
++		  || reg_addr[m].fusion_addis_ld[rc] != CODE_FOR_nothing
++		  || reg_addr[m].fusion_addis_st[rc] != CODE_FOR_nothing)
++		{
++		  fuse_extra_p = true;
++		  break;
++		}
++	    }
++	}
++    }
++
++  if (fuse_extra_p)
++    {
++      fprintf (stderr, "%*s  Fuse:", spaces, "");
++      spaces = 0;
++
++      for (rc = 0; rc < N_RELOAD_REG; rc++)
++	{
++	  if (rc != RELOAD_REG_ANY)
++	    {
++	      char load, store;
++
++	      if (reg_addr[m].fusion_addis_ld[rc] != CODE_FOR_nothing)
++		load = 'l';
++	      else if (reg_addr[m].fusion_addi_ld[rc] != CODE_FOR_nothing)
++		load = 'L';
++	      else
++		load = '-';
++
++	      if (reg_addr[m].fusion_addis_st[rc] != CODE_FOR_nothing)
++		store = 's';
++	      else if (reg_addr[m].fusion_addi_st[rc] != CODE_FOR_nothing)
++		store = 'S';
++	      else
++		store = '-';
++
++	      if (load == '-' && store == '-')
++		spaces += 5;
++	      else
++		{
++		  fprintf (stderr, "%*s%c=%c%c", (spaces + 1), "",
++			   reload_reg_map[rc].name[0], load, store);
++		  spaces = 0;
++		}
++	    }
++	}
++
++      if (reg_addr[m].fusion_gpr_ld != CODE_FOR_nothing)
++	{
++	  fprintf (stderr, "%*sP8gpr", (spaces + 1), "");
++	  spaces = 0;
++	}
++      else
++	spaces += sizeof (" P8gpr") - 1;
++
++      if (reg_addr[m].fused_toc)
++	{
++	  fprintf (stderr, "%*sToc", (spaces + 1), "");
++	  spaces = 0;
++	}
++      else
++	spaces += sizeof (" Toc") - 1;
++    }
++  else
++    spaces += sizeof ("  Fuse: G=ls F=ls v=ls P8gpr Toc") - 1;
++
+   if (rs6000_vector_unit[m] != VECTOR_NONE
+-      || rs6000_vector_mem[m] != VECTOR_NONE
+-      || (reg_addr[m].reload_store != CODE_FOR_nothing)
+-      || (reg_addr[m].reload_load != CODE_FOR_nothing)
+-      || reg_addr[m].scalar_in_vmx_p)
++      || rs6000_vector_mem[m] != VECTOR_NONE)
+     {
+-      fprintf (stderr,
+-	       "  Vector-arith=%-10s Vector-mem=%-10s Reload=%c%c Upper=%c",
++      fprintf (stderr, "%*s  vector: arith=%-10s mem=%s",
++	       spaces, "",
+ 	       rs6000_debug_vector_unit (rs6000_vector_unit[m]),
+-	       rs6000_debug_vector_unit (rs6000_vector_mem[m]),
+-	       (reg_addr[m].reload_store != CODE_FOR_nothing) ? 's' : '*',
+-	       (reg_addr[m].reload_load != CODE_FOR_nothing) ? 'l' : '*',
+-	       (reg_addr[m].scalar_in_vmx_p) ? 'y' : 'n');
++	       rs6000_debug_vector_unit (rs6000_vector_mem[m]));
+     }
+ 
+   fputs ("\n", stderr);
+@@ -2091,6 +2320,8 @@
+     SFmode,
+     DFmode,
+     TFmode,
++    IFmode,
++    KFmode,
+     SDmode,
+     DDmode,
+     TDmode,
+@@ -2165,7 +2396,9 @@
+ 	   "f  reg_class = %s\n"
+ 	   "v  reg_class = %s\n"
+ 	   "wa reg_class = %s\n"
++	   "wb reg_class = %s\n"
+ 	   "wd reg_class = %s\n"
++	   "we reg_class = %s\n"
+ 	   "wf reg_class = %s\n"
+ 	   "wg reg_class = %s\n"
+ 	   "wh reg_class = %s\n"
+@@ -2174,6 +2407,9 @@
+ 	   "wk reg_class = %s\n"
+ 	   "wl reg_class = %s\n"
+ 	   "wm reg_class = %s\n"
++	   "wo reg_class = %s\n"
++	   "wp reg_class = %s\n"
++	   "wq reg_class = %s\n"
+ 	   "wr reg_class = %s\n"
+ 	   "ws reg_class = %s\n"
+ 	   "wt reg_class = %s\n"
+@@ -2188,7 +2424,9 @@
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_f]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_v]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wa]],
++	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wb]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wd]],
++	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_we]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wf]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wg]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wh]],
+@@ -2197,6 +2435,9 @@
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wk]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wl]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wm]],
++	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wo]],
++	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wp]],
++	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wq]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wr]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_ws]],
+ 	   reg_class_names[rs6000_constraints[RS6000_CONSTRAINT_wt]],
+@@ -2444,9 +2685,19 @@
+     fprintf (stderr, DEBUG_FMT_S, "lra", "true");
+ 
+   if (TARGET_P8_FUSION)
+-    fprintf (stderr, DEBUG_FMT_S, "p8 fusion",
+-	     (TARGET_P8_FUSION_SIGN) ? "zero+sign" : "zero");
++    {
++      char options[80];
+ 
++      strcpy (options, (TARGET_P9_FUSION) ? "power9" : "power8");
++      if (TARGET_TOC_FUSION)
++	strcat (options, ", toc");
++
++      if (TARGET_P8_FUSION_SIGN)
++	strcat (options, ", sign");
++
++      fprintf (stderr, DEBUG_FMT_S, "fusion", options);
++    }
++
+   fprintf (stderr, DEBUG_FMT_S, "plt-format",
+ 	   TARGET_SECURE_PLT ? "secure" : "bss");
+   fprintf (stderr, DEBUG_FMT_S, "struct-return",
+@@ -2468,6 +2719,10 @@
+   if (TARGET_VSX)
+     fprintf (stderr, DEBUG_FMT_D, "VSX easy 64-bit scalar element",
+ 	     (int)VECTOR_ELEMENT_SCALAR_64BIT);
++
++  if (TARGET_DIRECT_MOVE_128)
++    fprintf (stderr, DEBUG_FMT_D, "VSX easy 64-bit mfvsrld element",
++	     (int)VECTOR_ELEMENT_MFVSRLD_64BIT);
+ }
+ 
+ 
+@@ -2484,6 +2739,7 @@
+   for (m = 0; m < NUM_MACHINE_MODES; ++m)
+     {
+       machine_mode m2 = (machine_mode)m;
++      unsigned short msize = GET_MODE_SIZE (m2);
+ 
+       /* SDmode is special in that we want to access it only via REG+REG
+ 	 addressing on power7 and above, since we want to use the LFIWZX and
+@@ -2513,15 +2769,19 @@
+ 	      /* Figure out if we can do PRE_INC, PRE_DEC, or PRE_MODIFY
+ 		 addressing.  Restrict addressing on SPE for 64-bit types
+ 		 because of the SUBREG hackery used to address 64-bit floats in
+-		 '32-bit' GPRs.  */
++		 '32-bit' GPRs.  If we allow scalars into Altivec registers,
++		 don't allow PRE_INC, PRE_DEC, or PRE_MODIFY.  */
+ 
+ 	      if (TARGET_UPDATE
+ 		  && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR)
+ 		  && GET_MODE_SIZE (m2) <= 8
+ 		  && !VECTOR_MODE_P (m2)
++		  && !FLOAT128_VECTOR_P (m2)
+ 		  && !COMPLEX_MODE_P (m2)
+ 		  && !indexed_only_p
+-		  && !(TARGET_E500_DOUBLE && GET_MODE_SIZE (m2) == 8))
++		  && !(TARGET_E500_DOUBLE && GET_MODE_SIZE (m2) == 8)
++		  && (m2 != DFmode || !TARGET_UPPER_REGS_DF)
++		  && (m2 != SFmode || !TARGET_UPPER_REGS_SF))
+ 		{
+ 		  addr_mask |= RELOAD_REG_PRE_INCDEC;
+ 
+@@ -2549,14 +2809,20 @@
+ 	    }
+ 
+ 	  /* GPR and FPR registers can do REG+OFFSET addressing, except
+-	     possibly for SDmode.  */
++	     possibly for SDmode.  ISA 3.0 (i.e. power9) adds D-form
++	     addressing for scalars to altivec registers.  */
+ 	  if ((addr_mask != 0) && !indexed_only_p
+-	      && (rc == RELOAD_REG_GPR || rc == RELOAD_REG_FPR))
++	      && msize <= 8
++	      && (rc == RELOAD_REG_GPR
++		  || rc == RELOAD_REG_FPR
++		  || (rc == RELOAD_REG_VMX
++		      && TARGET_P9_DFORM
++		      && (m2 == DFmode || m2 == SFmode))))
+ 	    addr_mask |= RELOAD_REG_OFFSET;
+ 
+ 	  /* VMX registers can do (REG & -16) and ((REG+REG) & -16)
+ 	     addressing on 128-bit types.  */
+-	  if (rc == RELOAD_REG_VMX && GET_MODE_SIZE (m2) == 16
++	  if (rc == RELOAD_REG_VMX && msize == 16
+ 	      && (addr_mask & RELOAD_REG_VALID) != 0)
+ 	    addr_mask |= RELOAD_REG_AND_M16;
+ 
+@@ -2664,6 +2930,20 @@
+       align32 = 128;
+     }
+ 
++  /* KF mode (IEEE 128-bit in VSX registers).  We do not have arithmetic, so
++     only set the memory modes.  Include TFmode if -mabi=ieeelongdouble.  */
++  if (TARGET_FLOAT128)
++    {
++      rs6000_vector_mem[KFmode] = VECTOR_VSX;
++      rs6000_vector_align[KFmode] = 128;
++
++      if (FLOAT128_IEEE_P (TFmode))
++	{
++	  rs6000_vector_mem[TFmode] = VECTOR_VSX;
++	  rs6000_vector_align[TFmode] = 128;
++	}
++    }
++
+   /* V2DF mode, VSX only.  */
+   if (TARGET_VSX)
+     {
+@@ -2854,6 +3134,25 @@
+   if (TARGET_LFIWZX)
+     rs6000_constraints[RS6000_CONSTRAINT_wz] = FLOAT_REGS;	/* DImode  */
+ 
++  if (TARGET_FLOAT128)
++    {
++      rs6000_constraints[RS6000_CONSTRAINT_wq] = VSX_REGS;	/* KFmode  */
++      if (FLOAT128_IEEE_P (TFmode))
++	rs6000_constraints[RS6000_CONSTRAINT_wp] = VSX_REGS;	/* TFmode  */
++    }
++
++  /* Support for new D-form instructions.  */
++  if (TARGET_P9_DFORM)
++    rs6000_constraints[RS6000_CONSTRAINT_wb] = ALTIVEC_REGS;
++
++  /* Support for ISA 3.0 (power9) vectors.  */
++  if (TARGET_P9_VECTOR)
++    rs6000_constraints[RS6000_CONSTRAINT_wo] = VSX_REGS;
++
++  /* Support for new direct moves (ISA 3.0 + 64bit).  */
++  if (TARGET_DIRECT_MOVE_128)
++    rs6000_constraints[RS6000_CONSTRAINT_we] = VSX_REGS;
++
+   /* Set up the reload helper and direct move functions.  */
+   if (TARGET_VSX || TARGET_ALTIVEC)
+     {
+@@ -2873,6 +3172,8 @@
+ 	  reg_addr[V4SFmode].reload_load   = CODE_FOR_reload_v4sf_di_load;
+ 	  reg_addr[V2DFmode].reload_store  = CODE_FOR_reload_v2df_di_store;
+ 	  reg_addr[V2DFmode].reload_load   = CODE_FOR_reload_v2df_di_load;
++	  reg_addr[KFmode].reload_store    = CODE_FOR_reload_kf_di_store;
++	  reg_addr[KFmode].reload_load     = CODE_FOR_reload_kf_di_load;
+ 	  reg_addr[DFmode].reload_store    = CODE_FOR_reload_df_di_store;
+ 	  reg_addr[DFmode].reload_load     = CODE_FOR_reload_df_di_load;
+ 	  reg_addr[DDmode].reload_store    = CODE_FOR_reload_dd_di_store;
+@@ -2880,6 +3181,12 @@
+ 	  reg_addr[SFmode].reload_store    = CODE_FOR_reload_sf_di_store;
+ 	  reg_addr[SFmode].reload_load     = CODE_FOR_reload_sf_di_load;
+ 
++	  if (FLOAT128_IEEE_P (TFmode))
++	    {
++	      reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_di_store;
++	      reg_addr[TFmode].reload_load  = CODE_FOR_reload_tf_di_load;
++	    }
++
+ 	  /* Only provide a reload handler for SDmode if lfiwzx/stfiwx are
+ 	     available.  */
+ 	  if (TARGET_NO_SDMODE_STACK)
+@@ -2894,7 +3201,7 @@
+ 	      reg_addr[TImode].reload_load   = CODE_FOR_reload_ti_di_load;
+ 	    }
+ 
+-	  if (TARGET_DIRECT_MOVE)
++	  if (TARGET_DIRECT_MOVE && !TARGET_DIRECT_MOVE_128)
+ 	    {
+ 	      reg_addr[TImode].reload_gpr_vsx    = CODE_FOR_reload_gpr_from_vsxti;
+ 	      reg_addr[V1TImode].reload_gpr_vsx  = CODE_FOR_reload_gpr_from_vsxv1ti;
+@@ -2933,6 +3240,8 @@
+ 	  reg_addr[V4SFmode].reload_load   = CODE_FOR_reload_v4sf_si_load;
+ 	  reg_addr[V2DFmode].reload_store  = CODE_FOR_reload_v2df_si_store;
+ 	  reg_addr[V2DFmode].reload_load   = CODE_FOR_reload_v2df_si_load;
++	  reg_addr[KFmode].reload_store    = CODE_FOR_reload_kf_si_store;
++	  reg_addr[KFmode].reload_load     = CODE_FOR_reload_kf_si_load;
+ 	  reg_addr[DFmode].reload_store    = CODE_FOR_reload_df_si_store;
+ 	  reg_addr[DFmode].reload_load     = CODE_FOR_reload_df_si_load;
+ 	  reg_addr[DDmode].reload_store    = CODE_FOR_reload_dd_si_store;
+@@ -2940,6 +3249,12 @@
+ 	  reg_addr[SFmode].reload_store    = CODE_FOR_reload_sf_si_store;
+ 	  reg_addr[SFmode].reload_load     = CODE_FOR_reload_sf_si_load;
+ 
++	  if (FLOAT128_IEEE_P (TFmode))
++	    {
++	      reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_si_store;
++	      reg_addr[TFmode].reload_load  = CODE_FOR_reload_tf_si_load;
++	    }
++
+ 	  /* Only provide a reload handler for SDmode if lfiwzx/stfiwx are
+ 	     available.  */
+ 	  if (TARGET_NO_SDMODE_STACK)
+@@ -2969,6 +3284,130 @@
+ 	reg_addr[SFmode].scalar_in_vmx_p = true;
+     }
+ 
++  /* Setup the fusion operations.  */
++  if (TARGET_P8_FUSION)
++    {
++      reg_addr[QImode].fusion_gpr_ld = CODE_FOR_fusion_gpr_load_qi;
++      reg_addr[HImode].fusion_gpr_ld = CODE_FOR_fusion_gpr_load_hi;
++      reg_addr[SImode].fusion_gpr_ld = CODE_FOR_fusion_gpr_load_si;
++      if (TARGET_64BIT)
++	reg_addr[DImode].fusion_gpr_ld = CODE_FOR_fusion_gpr_load_di;
++    }
++
++  if (TARGET_P9_FUSION)
++    {
++      struct fuse_insns {
++	enum machine_mode mode;			/* mode of the fused type.  */
++	enum machine_mode pmode;		/* pointer mode.  */
++	enum rs6000_reload_reg_type rtype;	/* register type.  */
++	enum insn_code load;			/* load insn.  */
++	enum insn_code store;			/* store insn.  */
++      };
++
++      static const struct fuse_insns addis_insns[] = {
++	{ SFmode, DImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_di_sf_load,
++	  CODE_FOR_fusion_fpr_di_sf_store },
++
++	{ SFmode, SImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_si_sf_load,
++	  CODE_FOR_fusion_fpr_si_sf_store },
++
++	{ DFmode, DImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_di_df_load,
++	  CODE_FOR_fusion_fpr_di_df_store },
++
++	{ DFmode, SImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_si_df_load,
++	  CODE_FOR_fusion_fpr_si_df_store },
++
++	{ DImode, DImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_di_di_load,
++	  CODE_FOR_fusion_fpr_di_di_store },
++
++	{ DImode, SImode, RELOAD_REG_FPR,
++	  CODE_FOR_fusion_fpr_si_di_load,
++	  CODE_FOR_fusion_fpr_si_di_store },
++
++	{ QImode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_qi_load,
++	  CODE_FOR_fusion_gpr_di_qi_store },
++
++	{ QImode, SImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_si_qi_load,
++	  CODE_FOR_fusion_gpr_si_qi_store },
++
++	{ HImode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_hi_load,
++	  CODE_FOR_fusion_gpr_di_hi_store },
++
++	{ HImode, SImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_si_hi_load,
++	  CODE_FOR_fusion_gpr_si_hi_store },
++
++	{ SImode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_si_load,
++	  CODE_FOR_fusion_gpr_di_si_store },
++
++	{ SImode, SImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_si_si_load,
++	  CODE_FOR_fusion_gpr_si_si_store },
++
++	{ SFmode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_sf_load,
++	  CODE_FOR_fusion_gpr_di_sf_store },
++
++	{ SFmode, SImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_si_sf_load,
++	  CODE_FOR_fusion_gpr_si_sf_store },
++
++	{ DImode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_di_load,
++	  CODE_FOR_fusion_gpr_di_di_store },
++
++	{ DFmode, DImode, RELOAD_REG_GPR,
++	  CODE_FOR_fusion_gpr_di_df_load,
++	  CODE_FOR_fusion_gpr_di_df_store },
++      };
++
++      enum machine_mode cur_pmode = Pmode;
++      size_t i;
++
++      for (i = 0; i < ARRAY_SIZE (addis_insns); i++)
++	{
++	  enum machine_mode xmode = addis_insns[i].mode;
++	  enum rs6000_reload_reg_type rtype = addis_insns[i].rtype;
++
++	  if (addis_insns[i].pmode != cur_pmode)
++	    continue;
++
++	  if (rtype == RELOAD_REG_FPR
++	      && (!TARGET_HARD_FLOAT || !TARGET_FPRS))
++	    continue;
++
++	  reg_addr[xmode].fusion_addis_ld[rtype] = addis_insns[i].load;
++	  reg_addr[xmode].fusion_addis_st[rtype] = addis_insns[i].store;
++	}
++    }
++
++  /* Note which types we support fusing TOC setup plus memory insn.  We only do
++     fused TOCs for medium/large code models.  */
++  if (TARGET_P8_FUSION && TARGET_TOC_FUSION && TARGET_POWERPC64
++      && (TARGET_CMODEL != CMODEL_SMALL))
++    {
++      reg_addr[QImode].fused_toc = true;
++      reg_addr[HImode].fused_toc = true;
++      reg_addr[SImode].fused_toc = true;
++      reg_addr[DImode].fused_toc = true;
++      if (TARGET_HARD_FLOAT && TARGET_FPRS)
++	{
++	  if (TARGET_SINGLE_FLOAT)
++	    reg_addr[SFmode].fused_toc = true;
++	  if (TARGET_DOUBLE_FLOAT)
++	    reg_addr[DFmode].fused_toc = true;
++	}
++    }
++
+   /* Precalculate HARD_REGNO_NREGS.  */
+   for (r = 0; r < FIRST_PSEUDO_REGISTER; ++r)
+     for (m = 0; m < NUM_MACHINE_MODES; ++m)
+@@ -3003,9 +3442,9 @@
+ 	  machine_mode m2 = (machine_mode)m;
+ 	  int reg_size2 = reg_size;
+ 
+-	  /* TFmode/TDmode always takes 2 registers, even in VSX.  */
+-	  if (TARGET_VSX && VSX_REG_CLASS_P (c)
+-	      && (m == TDmode || m == TFmode))
++	  /* TDmode & IBM 128-bit floating point always takes 2 registers, even
++	     in VSX.  */
++	  if (TARGET_VSX && VSX_REG_CLASS_P (c) && FLOAT128_2REG_P (m))
+ 	    reg_size2 = UNITS_PER_FP_WORD;
+ 
+ 	  rs6000_class_max_nregs[m][c]
+@@ -3362,7 +3801,22 @@
+   if (rs6000_tune_index >= 0)
+     tune_index = rs6000_tune_index;
+   else if (have_cpu)
+-    rs6000_tune_index = tune_index = cpu_index;
++    {
++      /* Until power9 tuning is available, use power8 tuning if -mcpu=power9.  */
++      if (processor_target_table[cpu_index].processor != PROCESSOR_POWER9)
++	rs6000_tune_index = tune_index = cpu_index;
++      else
++	{
++	  size_t i;
++	  tune_index = -1;
++	  for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
++	    if (processor_target_table[i].processor == PROCESSOR_POWER8)
++	      {
++		rs6000_tune_index = tune_index = i;
++		break;
++	      }
++	}
++    }
+   else
+     {
+       size_t i;
+@@ -3537,7 +3991,9 @@
+ 
+   /* For the newer switches (vsx, dfp, etc.) set some of the older options,
+      unless the user explicitly used the -mno-<option> to disable the code.  */
+-  if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)
++  if (TARGET_P9_VECTOR || TARGET_MODULO || TARGET_P9_DFORM || TARGET_P9_MINMAX)
++    rs6000_isa_flags |= (ISA_3_0_MASKS_SERVER & ~rs6000_isa_flags_explicit);
++  else if (TARGET_P8_VECTOR || TARGET_DIRECT_MOVE || TARGET_CRYPTO)
+     rs6000_isa_flags |= (ISA_2_7_MASKS_SERVER & ~rs6000_isa_flags_explicit);
+   else if (TARGET_VSX)
+     rs6000_isa_flags |= (ISA_2_6_MASKS_SERVER & ~rs6000_isa_flags_explicit);
+@@ -3683,6 +4139,41 @@
+     rs6000_isa_flags |= (processor_target_table[tune_index].target_enable
+ 			 & OPTION_MASK_P8_FUSION);
+ 
++  /* Setting additional fusion flags turns on base fusion.  */
++  if (!TARGET_P8_FUSION && (TARGET_P8_FUSION_SIGN || TARGET_TOC_FUSION))
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION)
++	{
++	  if (TARGET_P8_FUSION_SIGN)
++	    error ("-mpower8-fusion-sign requires -mpower8-fusion");
++
++	  if (TARGET_TOC_FUSION)
++	    error ("-mtoc-fusion requires -mpower8-fusion");
++
++	  rs6000_isa_flags &= ~OPTION_MASK_P8_FUSION;
++	}
++      else
++	rs6000_isa_flags |= OPTION_MASK_P8_FUSION;
++    }
++
++  /* Power9 fusion is a superset over power8 fusion.  */
++  if (TARGET_P9_FUSION && !TARGET_P8_FUSION)
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_P8_FUSION)
++	{
++	  error ("-mpower9-fusion requires -mpower8-fusion");
++	  rs6000_isa_flags &= ~OPTION_MASK_P9_FUSION;
++	}
++      else
++	rs6000_isa_flags |= OPTION_MASK_P8_FUSION;
++    }
++
++  /* Enable power9 fusion if we are tuning for power9, even if we aren't
++     generating power9 instructions.  */
++  if (!(rs6000_isa_flags_explicit & OPTION_MASK_P9_FUSION))
++    rs6000_isa_flags |= (processor_target_table[tune_index].target_enable
++			 & OPTION_MASK_P9_FUSION);
++
+   /* Power8 does not fuse sign extended loads with the addis.  If we are
+      optimizing at high levels for speed, convert a sign extended load into a
+      zero extending load, and an explicit sign extension.  */
+@@ -3692,6 +4183,58 @@
+       && optimize >= 3)
+     rs6000_isa_flags |= OPTION_MASK_P8_FUSION_SIGN;
+ 
++  /* TOC fusion requires 64-bit and medium/large code model.  */
++  if (TARGET_TOC_FUSION && !TARGET_POWERPC64)
++    {
++      rs6000_isa_flags &= ~OPTION_MASK_TOC_FUSION;
++      if ((rs6000_isa_flags_explicit & OPTION_MASK_TOC_FUSION) != 0)
++	warning (0, N_("-mtoc-fusion requires 64-bit"));
++    }
++
++  if (TARGET_TOC_FUSION && (TARGET_CMODEL == CMODEL_SMALL))
++    {
++      rs6000_isa_flags &= ~OPTION_MASK_TOC_FUSION;
++      if ((rs6000_isa_flags_explicit & OPTION_MASK_TOC_FUSION) != 0)
++	warning (0, N_("-mtoc-fusion requires medium/large code model"));
++    }
++
++  /* Turn on -mtoc-fusion by default if p8-fusion and 64-bit medium/large code
++     model.  */
++  if (TARGET_P8_FUSION && !TARGET_TOC_FUSION && TARGET_POWERPC64
++      && (TARGET_CMODEL != CMODEL_SMALL)
++      && !(rs6000_isa_flags_explicit & OPTION_MASK_TOC_FUSION))
++    rs6000_isa_flags |= OPTION_MASK_TOC_FUSION;
++
++  /* ISA 3.0 D-form instructions require p9-vector and upper-regs.  */
++  if (TARGET_P9_DFORM && !TARGET_P9_VECTOR)
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_P9_VECTOR)
++	error ("-mpower9-dform requires -mpower9-vector");
++      rs6000_isa_flags &= ~OPTION_MASK_P9_DFORM;
++    }
++
++  if (TARGET_P9_DFORM && !TARGET_UPPER_REGS_DF)
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_UPPER_REGS_DF)
++	error ("-mpower9-dform requires -mupper-regs-df");
++      rs6000_isa_flags &= ~OPTION_MASK_P9_DFORM;
++    }
++
++  if (TARGET_P9_DFORM && !TARGET_UPPER_REGS_SF)
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_UPPER_REGS_SF)
++	error ("-mpower9-dform requires -mupper-regs-sf");
++      rs6000_isa_flags &= ~OPTION_MASK_P9_DFORM;
++    }
++
++  /* ISA 3.0 vector instructions include ISA 2.07.  */
++  if (TARGET_P9_VECTOR && !TARGET_P8_VECTOR)
++    {
++      if (rs6000_isa_flags_explicit & OPTION_MASK_P8_VECTOR)
++	error ("-mpower9-vector requires -mpower8-vector");
++      rs6000_isa_flags &= ~OPTION_MASK_P9_VECTOR;
++    }
++
+   /* Set -mallow-movmisalign to explicitly on if we have full ISA 2.07
+      support. If we only have ISA 2.06 support, and the user did not specify
+      the switch, leave it set to -1 so the movmisalign patterns are enabled,
+@@ -3732,6 +4275,38 @@
+ 	}
+     }
+ 
++  /* __float128 requires VSX support.  */
++  if (TARGET_FLOAT128 && !TARGET_VSX)
++    {
++      if ((rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128) != 0)
++	error ("-mfloat128 requires VSX support");
++
++      rs6000_isa_flags &= ~(OPTION_MASK_FLOAT128 | OPTION_MASK_FLOAT128_HW);
++    }
++
++  /* IEEE 128-bit floating point hardware instructions imply enabling
++     __float128.  */
++  if (TARGET_FLOAT128_HW
++      && (rs6000_isa_flags & (OPTION_MASK_P9_VECTOR
++			      | OPTION_MASK_DIRECT_MOVE
++			      | OPTION_MASK_UPPER_REGS_DF
++			      | OPTION_MASK_UPPER_REGS_SF)) == 0)
++    {
++      if ((rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) != 0)
++	error ("-mfloat128-hardware requires full ISA 3.0 support");
++
++      rs6000_isa_flags &= ~OPTION_MASK_FLOAT128_HW;
++    }
++
++  else if (TARGET_P9_VECTOR && !TARGET_FLOAT128_HW
++	   && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128_HW) == 0)
++    rs6000_isa_flags |= OPTION_MASK_FLOAT128_HW;
++
++  if (TARGET_FLOAT128_HW
++      && (rs6000_isa_flags_explicit & OPTION_MASK_FLOAT128) == 0)
++    rs6000_isa_flags |= OPTION_MASK_FLOAT128;
++
++  /* Print the options after updating the defaults.  */
+   if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
+     rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);
+ 
+@@ -3812,7 +4387,8 @@
+      unless the altivec ABI was set.  This is set by default for 64-bit, but
+      not for 32-bit.  */
+   if (main_target_opt != NULL && !main_target_opt->x_rs6000_altivec_abi)
+-    rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC)
++    rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC
++			   | OPTION_MASK_FLOAT128)
+ 			  & ~rs6000_isa_flags_explicit);
+ 
+   /* Enable Altivec ABI for AIX -maltivec.  */
+@@ -3928,6 +4504,7 @@
+ 			&& rs6000_cpu != PROCESSOR_POWER6
+ 			&& rs6000_cpu != PROCESSOR_POWER7
+ 			&& rs6000_cpu != PROCESSOR_POWER8
++			&& rs6000_cpu != PROCESSOR_POWER9
+ 			&& rs6000_cpu != PROCESSOR_PPCA2
+ 			&& rs6000_cpu != PROCESSOR_CELL
+ 			&& rs6000_cpu != PROCESSOR_PPC476);
+@@ -3934,12 +4511,14 @@
+   rs6000_sched_groups = (rs6000_cpu == PROCESSOR_POWER4
+ 			 || rs6000_cpu == PROCESSOR_POWER5
+ 			 || rs6000_cpu == PROCESSOR_POWER7
+-			 || rs6000_cpu == PROCESSOR_POWER8);
++			 || rs6000_cpu == PROCESSOR_POWER8
++			 || rs6000_cpu == PROCESSOR_POWER9);
+   rs6000_align_branch_targets = (rs6000_cpu == PROCESSOR_POWER4
+ 				 || rs6000_cpu == PROCESSOR_POWER5
+ 				 || rs6000_cpu == PROCESSOR_POWER6
+ 				 || rs6000_cpu == PROCESSOR_POWER7
+ 				 || rs6000_cpu == PROCESSOR_POWER8
++				 || rs6000_cpu == PROCESSOR_POWER9
+ 				 || rs6000_cpu == PROCESSOR_PPCE500MC
+ 				 || rs6000_cpu == PROCESSOR_PPCE500MC64
+ 				 || rs6000_cpu == PROCESSOR_PPCE5500
+@@ -4187,6 +4766,10 @@
+ 	rs6000_cost = &power8_cost;
+ 	break;
+ 
++      case PROCESSOR_POWER9:
++	rs6000_cost = &power9_cost;
++	break;
++
+       case PROCESSOR_PPCA2:
+ 	rs6000_cost = &ppca2_cost;
+ 	break;
+@@ -4367,7 +4950,8 @@
+ 	  || rs6000_cpu == PROCESSOR_POWER5
+ 	  || rs6000_cpu == PROCESSOR_POWER6
+ 	  || rs6000_cpu == PROCESSOR_POWER7
+-	  || rs6000_cpu == PROCESSOR_POWER8))
++	  || rs6000_cpu == PROCESSOR_POWER8
++	  || rs6000_cpu == PROCESSOR_POWER9))
+     return 5;
+   else
+     return align_loops_log;
+@@ -5184,7 +5768,9 @@
+       || !global_options_set.x_rs6000_cpu_index)
+     {
+       fputs ("\t.machine ", asm_out_file);
+-      if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
++      if ((rs6000_isa_flags & OPTION_MASK_MODULO) != 0)
++	fputs ("power9\n", asm_out_file);
++      else if ((rs6000_isa_flags & OPTION_MASK_DIRECT_MOVE) != 0)
+ 	fputs ("power8\n", asm_out_file);
+       else if ((rs6000_isa_flags & OPTION_MASK_POPCNTD) != 0)
+ 	fputs ("power7\n", asm_out_file);
+@@ -5227,7 +5813,7 @@
+ 	  && info->first_altivec_reg_save == LAST_ALTIVEC_REGNO + 1
+ 	  && ! info->lr_save_p
+ 	  && ! info->cr_save_p
+-	  && info->vrsave_mask == 0
++	  && info->vrsave_size == 0
+ 	  && ! info->push_p)
+ 	return 1;
+     }
+@@ -5449,7 +6035,97 @@
+   return true;
+ }
+ 
++/* Like vsplitis_constant, but allow the value to be shifted left with a VSLDOI
++   instruction, filling in the bottom elements with 0 or -1.
+ 
++   Return 0 if the constant cannot be generated with VSLDOI.  Return positive
++   for the number of zeroes to shift in, or negative for the number of 0xff
++   bytes to shift in.
++
++   OP is a CONST_VECTOR.  */
++
++int
++vspltis_shifted (rtx op)
++{
++  machine_mode mode = GET_MODE (op);
++  machine_mode inner = GET_MODE_INNER (mode);
++
++  unsigned i, j;
++  unsigned nunits;
++  unsigned mask;
++
++  HOST_WIDE_INT val;
++
++  if (mode != V16QImode && mode != V8HImode && mode != V4SImode)
++    return false;
++
++  /* We need to create pseudo registers to do the shift, so don't recognize
++     shift vector constants after reload.  */
++  if (!can_create_pseudo_p ())
++    return false;
++
++  nunits = GET_MODE_NUNITS (mode);
++  mask = GET_MODE_MASK (inner);
++
++  val = const_vector_elt_as_int (op, BYTES_BIG_ENDIAN ? 0 : nunits - 1);
++
++  /* Check if the value can really be the operand of a vspltis[bhw].  */
++  if (EASY_VECTOR_15 (val))
++    ;
++
++  /* Also check if we are loading up the most significant bit which can be done
++     by loading up -1 and shifting the value left by -1.  */
++  else if (EASY_VECTOR_MSB (val, inner))
++    ;
++
++  else
++    return 0;
++
++  /* Check if VAL is present in every STEP-th element until we find elements
++     that are 0 or all 1 bits.  */
++  for (i = 1; i < nunits; ++i)
++    {
++      unsigned elt = BYTES_BIG_ENDIAN ? i : nunits - 1 - i;
++      HOST_WIDE_INT elt_val = const_vector_elt_as_int (op, elt);
++
++      /* If the value isn't the splat value, check for the remaining elements
++	 being 0/-1.  */
++      if (val != elt_val)
++	{
++	  if (elt_val == 0)
++	    {
++	      for (j = i+1; j < nunits; ++j)
++		{
++		  unsigned elt2 = BYTES_BIG_ENDIAN ? j : nunits - 1 - j;
++		  if (const_vector_elt_as_int (op, elt2) != 0)
++		    return 0;
++		}
++
++	      return (nunits - i) * GET_MODE_SIZE (inner);
++	    }
++
++	  else if ((elt_val & mask) == mask)
++	    {
++	      for (j = i+1; j < nunits; ++j)
++		{
++		  unsigned elt2 = BYTES_BIG_ENDIAN ? j : nunits - 1 - j;
++		  if ((const_vector_elt_as_int (op, elt2) & mask) != mask)
++		    return 0;
++		}
++
++	      return -((nunits - i) * GET_MODE_SIZE (inner));
++	    }
++
++	  else
++	    return 0;
++	}
++    }
++
++  /* If all elements are equal, we don't need to do VLSDOI.  */
++  return 0;
++}
++
++
+ /* Return true if OP is of the given MODE and can be synthesized
+    with a vspltisb, vspltish or vspltisw.  */
+ 
+@@ -5513,6 +6189,9 @@
+   if (vspltis_constant (op, step, copies))
+     return true;
+ 
++  if (vspltis_shifted (op) != 0)
++    return true;
++
+   return false;
+ }
+ 
+@@ -5556,7 +6235,7 @@
+ const char *
+ output_vec_const_move (rtx *operands)
+ {
+-  int cst, cst2;
++  int cst, cst2, shift;
+   machine_mode mode;
+   rtx dest, vec;
+ 
+@@ -5569,10 +6248,13 @@
+       if (zero_constant (vec, mode))
+ 	return "xxlxor %x0,%x0,%x0";
+ 
++      if (TARGET_P8_VECTOR && vec == CONSTM1_RTX (mode))
++	return "xxlorc %x0,%x0,%x0";
++
+       if ((mode == V2DImode || mode == V1TImode)
+ 	  && INTVAL (CONST_VECTOR_ELT (vec, 0)) == -1
+ 	  && INTVAL (CONST_VECTOR_ELT (vec, 1)) == -1)
+-	return "vspltisw %0,-1";
++	return (TARGET_P8_VECTOR) ? "xxlorc %x0,%x0,%x0" : "vspltisw %0,-1";
+     }
+ 
+   if (TARGET_ALTIVEC)
+@@ -5581,6 +6263,11 @@
+       if (zero_constant (vec, mode))
+ 	return "vxor %0,%0,%0";
+ 
++      /* Do we need to construct a value using VSLDOI?  */
++      shift = vspltis_shifted (vec);
++      if (shift != 0)
++	return "#";
++
+       splat_vec = gen_easy_altivec_constant (vec);
+       gcc_assert (GET_CODE (splat_vec) == VEC_DUPLICATE);
+       operands[1] = XEXP (splat_vec, 0);
+@@ -6128,13 +6815,16 @@
+ 	      || mode == DDmode || mode == TDmode || mode == PTImode)
+ 	  && REG_P (SUBREG_REG (op))
+ 	  && (GET_MODE (SUBREG_REG (op)) == DFmode
+-	      || GET_MODE (SUBREG_REG (op)) == TFmode))
++	      || GET_MODE (SUBREG_REG (op)) == TFmode
++	      || GET_MODE (SUBREG_REG (op)) == IFmode
++	      || GET_MODE (SUBREG_REG (op)) == KFmode))
+ 	return true;
+ 
+       /* Reject (subreg:DF (reg:DI)); likewise with subreg:TF and
+ 	 reg:TI.  */
+       if (GET_CODE (op) == SUBREG
+-	  && (mode == DFmode || mode == TFmode)
++	  && (mode == DFmode || mode == TFmode || mode == IFmode
++	      || mode == KFmode)
+ 	  && REG_P (SUBREG_REG (op))
+ 	  && (GET_MODE (SUBREG_REG (op)) == DImode
+ 	      || GET_MODE (SUBREG_REG (op)) == TImode
+@@ -6496,10 +7186,13 @@
+     case V2DImode:
+     case V1TImode:
+     case TImode:
++    case TFmode:
++    case KFmode:
+       /* AltiVec/VSX vector modes.  Only reg+reg addressing is valid.  While
+ 	 TImode is not a vector mode, if we want to use the VSX registers to
+-	 move it around, we need to restrict ourselves to reg+reg
+-	 addressing.  */
++	 move it around, we need to restrict ourselves to reg+reg addressing.
++	 Similarly for IEEE 128-bit floating point that is passed in a single
++	 vector register.  */
+       if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))
+ 	return false;
+       break;
+@@ -6548,13 +7241,21 @@
+ }
+ 
+ /* Return true if a MODE sized memory accesses to OP plus OFFSET
+-   is known to not straddle a 32k boundary.  */
++   is known to not straddle a 32k boundary.  This function is used
++   to determine whether -mcmodel=medium code can use TOC pointer
++   relative addressing for OP.  This means the alignment of the TOC
++   pointer must also be taken into account, and unfortunately that is
++   only 8 bytes.  */ 
+ 
++#ifndef POWERPC64_TOC_POINTER_ALIGNMENT
++#define POWERPC64_TOC_POINTER_ALIGNMENT 8
++#endif
++
+ static bool
+ offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset,
+ 			     machine_mode mode)
+ {
+-  tree decl, type;
++  tree decl;
+   unsigned HOST_WIDE_INT dsize, dalign, lsb, mask;
+ 
+   if (GET_CODE (op) != SYMBOL_REF)
+@@ -6607,38 +7308,20 @@
+ 	  if (dsize > 32768)
+ 	    return false;
+ 
+-	  return dalign / BITS_PER_UNIT >= dsize;
++	  dalign /= BITS_PER_UNIT;
++	  if (dalign > POWERPC64_TOC_POINTER_ALIGNMENT)
++	    dalign = POWERPC64_TOC_POINTER_ALIGNMENT;
++	  return dalign >= dsize;
+ 	}
+     }
+   else
+-    {
+-      type = TREE_TYPE (decl);
++    gcc_unreachable ();
+ 
+-      dalign = TYPE_ALIGN (type);
+-      if (CONSTANT_CLASS_P (decl))
+-	dalign = CONSTANT_ALIGNMENT (decl, dalign);
+-      else
+-	dalign = DATA_ALIGNMENT (decl, dalign);
+-
+-      if (dsize == 0)
+-	{
+-	  /* BLKmode, check the entire object.  */
+-	  if (TREE_CODE (decl) == STRING_CST)
+-	    dsize = TREE_STRING_LENGTH (decl);
+-	  else if (TYPE_SIZE_UNIT (type)
+-		   && tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)))
+-	    dsize = tree_to_uhwi (TYPE_SIZE_UNIT (type));
+-	  else
+-	    return false;
+-	  if (dsize > 32768)
+-	    return false;
+-
+-	  return dalign / BITS_PER_UNIT >= dsize;
+-	}
+-    }
+-
+   /* Find how many bits of the alignment we know for this access.  */
+-  mask = dalign / BITS_PER_UNIT - 1;
++  dalign /= BITS_PER_UNIT;
++  if (dalign > POWERPC64_TOC_POINTER_ALIGNMENT)
++    dalign = POWERPC64_TOC_POINTER_ALIGNMENT;
++  mask = dalign - 1;
+   lsb = offset & -offset;
+   mask &= lsb - 1;
+   dalign = mask + 1;
+@@ -6775,6 +7458,8 @@
+       break;
+ 
+     case TFmode:
++    case IFmode:
++    case KFmode:
+       if (TARGET_E500_DOUBLE)
+ 	return (SPE_CONST_OFFSET_OK (offset)
+ 		&& SPE_CONST_OFFSET_OK (offset + 8));
+@@ -6968,6 +7653,8 @@
+     case TDmode:
+     case TImode:
+     case PTImode:
++    case IFmode:
++    case KFmode:
+       /* As in legitimate_offset_address_p we do not assume
+ 	 worst-case.  The mode here is just a hint as to the registers
+ 	 used.  A TImode is usually in gprs, but may actually be in
+@@ -7577,13 +8264,14 @@
+    can be addressed relative to the toc pointer.  */
+ 
+ static bool
+-use_toc_relative_ref (rtx sym)
++use_toc_relative_ref (rtx sym, machine_mode mode)
+ {
+   return ((constant_pool_expr_p (sym)
+ 	   && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (sym),
+ 					       get_pool_mode (sym)))
+ 	  || (TARGET_CMODEL == CMODEL_MEDIUM
+-	      && SYMBOL_REF_LOCAL_P (sym)));
++	      && SYMBOL_REF_LOCAL_P (sym)
++	      && GET_MODE_SIZE (mode) <= POWERPC64_TOC_POINTER_ALIGNMENT));
+ }
+ 
+ /* Our implementation of LEGITIMIZE_RELOAD_ADDRESS.  Returns a value to
+@@ -7740,6 +8428,8 @@
+       && !reg_addr[mode].scalar_in_vmx_p
+       && mode != TFmode
+       && mode != TDmode
++      && mode != IFmode
++      && mode != KFmode
+       && (mode != TImode || !TARGET_VSX_TIMODE)
+       && mode != PTImode
+       && (mode != DImode || TARGET_POWERPC64)
+@@ -7788,7 +8478,7 @@
+   if (TARGET_TOC
+       && reg_offset_p
+       && GET_CODE (x) == SYMBOL_REF
+-      && use_toc_relative_ref (x))
++      && use_toc_relative_ref (x, mode))
+     {
+       x = create_TOC_reference (x, NULL_RTX);
+       if (TARGET_CMODEL != CMODEL_SMALL)
+@@ -7875,6 +8565,9 @@
+       && legitimate_constant_pool_address_p (x, mode,
+ 					     reg_ok_strict || lra_in_progress))
+     return 1;
++  if (reg_offset_p && reg_addr[mode].fused_toc && GET_CODE (x) == UNSPEC
++      && XINT (x, 1) == UNSPEC_FUSION_ADDIS)
++    return 1;
+   /* For TImode, if we have load/store quad and TImode in VSX registers, only
+      allow register indirect addresses.  This will allow the values to go in
+      either GPRs or VSX registers without reloading.  The vector types would
+@@ -7893,8 +8586,7 @@
+     return 1;
+   if (rs6000_legitimate_offset_address_p (mode, x, reg_ok_strict, false))
+     return 1;
+-  if (mode != TFmode
+-      && mode != TDmode
++  if (!FLOAT128_2REG_P (mode)
+       && ((TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT)
+ 	  || TARGET_POWERPC64
+ 	  || (mode != DFmode && mode != DDmode)
+@@ -8386,8 +9078,14 @@
+ rtx
+ rs6000_gen_le_vsx_permute (rtx source, machine_mode mode)
+ {
+-  rtx par = gen_rtx_PARALLEL (VOIDmode, rs6000_const_vec (mode));
+-  return gen_rtx_VEC_SELECT (mode, source, par);
++  /* Use ROTATE instead of VEC_SELECT on IEEE 128-bit floating point.  */
++  if (FLOAT128_VECTOR_P (mode))
++    return gen_rtx_ROTATE (mode, source, GEN_INT (64));
++  else
++    {
++      rtx par = gen_rtx_PARALLEL (VOIDmode, rs6000_const_vec (mode));
++      return gen_rtx_VEC_SELECT (mode, source, par);
++    }
+ }
+ 
+ /* Emit a little-endian load from vector memory location SOURCE to VSX
+@@ -8427,7 +9125,7 @@
+      during expand.  */
+   gcc_assert (!reload_in_progress && !lra_in_progress && !reload_completed);
+ 
+-  /* Use V2DImode to do swaps of types with 128-bit scalare parts (TImode,
++  /* Use V2DImode to do swaps of types with 128-bit scalar parts (TImode,
+      V1TImode).  */
+   if (mode == TImode || mode == V1TImode)
+     {
+@@ -8454,6 +9152,7 @@
+ {
+   gcc_assert (!BYTES_BIG_ENDIAN
+ 	      && VECTOR_MEM_VSX_P (mode)
++	      && !TARGET_P9_VECTOR
+ 	      && !gpr_or_gpr_p (dest, source)
+ 	      && (MEM_P (source) ^ MEM_P (dest)));
+ 
+@@ -8562,9 +9261,8 @@
+   /* 128-bit constant floating-point values on Darwin should really be loaded
+      as two parts.  However, this premature splitting is a problem when DFmode
+      values can go into Altivec registers.  */
+-  if (!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
+-      && !reg_addr[DFmode].scalar_in_vmx_p
+-      && mode == TFmode && GET_CODE (operands[1]) == CONST_DOUBLE)
++  if (FLOAT128_IBM_P (mode) && !reg_addr[DFmode].scalar_in_vmx_p
++      && GET_CODE (operands[1]) == CONST_DOUBLE)
+     {
+       rs6000_emit_move (simplify_gen_subreg (DFmode, operands[0], mode, 0),
+ 			simplify_gen_subreg (DFmode, operands[1], mode, 0),
+@@ -8756,7 +9454,10 @@
+ 
+     case TFmode:
+     case TDmode:
+-      rs6000_eliminate_indexed_memrefs (operands);
++    case IFmode:
++    case KFmode:
++      if (FLOAT128_2REG_P (mode))
++	rs6000_eliminate_indexed_memrefs (operands);
+       /* fall through */
+ 
+     case DFmode:
+@@ -8866,7 +9567,7 @@
+ 	 reference to it.  */
+       if (TARGET_TOC
+ 	  && GET_CODE (operands[1]) == SYMBOL_REF
+-	  && use_toc_relative_ref (operands[1]))
++	  && use_toc_relative_ref (operands[1], mode))
+ 	operands[1] = create_TOC_reference (operands[1], operands[0]);
+       else if (mode == Pmode
+ 	       && CONSTANT_P (operands[1])
+@@ -8981,7 +9682,7 @@
+ 
+ /* Nonzero if we can use a floating-point register to pass this arg.  */
+ #define USE_FP_FOR_ARG_P(CUM,MODE)		\
+-  (SCALAR_FLOAT_MODE_P (MODE)			\
++  (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE)		\
+    && (CUM)->fregno <= FP_ARG_MAX_REG		\
+    && TARGET_HARD_FLOAT && TARGET_FPRS)
+ 
+@@ -9182,7 +9883,7 @@
+ 
+       if (field_count > 0)
+ 	{
+-	  int n_regs = (SCALAR_FLOAT_MODE_P (field_mode)?
++	  int n_regs = (SCALAR_FLOAT_MODE_P (field_mode) ?
+ 			(GET_MODE_SIZE (field_mode) + 7) >> 3 : 1);
+ 
+ 	  /* The ELFv2 ABI allows homogeneous aggregates to occupy
+@@ -9292,7 +9993,8 @@
+       return true;
+     }
+ 
+-  if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD && TYPE_MODE (type) == TFmode)
++  if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD
++      && FLOAT128_IEEE_P (TYPE_MODE (type)))
+     return true;
+ 
+   return false;
+@@ -9364,6 +10066,7 @@
+ 		      ? CALL_LIBCALL : CALL_NORMAL);
+   cum->sysv_gregno = GP_ARG_MIN_REG;
+   cum->stdarg = stdarg_p (fntype);
++  cum->libcall = libcall;
+ 
+   cum->nargs_prototype = 0;
+   if (incoming || cum->prototype)
+@@ -9422,7 +10125,7 @@
+ 		      <= 8))
+ 		rs6000_returns_struct = true;
+ 	    }
+-	  if (SCALAR_FLOAT_MODE_P (return_mode))
++	  if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (return_mode))
+ 	    rs6000_passes_float = true;
+ 	  else if (ALTIVEC_OR_VSX_VECTOR_MODE (return_mode)
+ 		   || SPE_VECTOR_MODE (return_mode))
+@@ -9560,8 +10263,10 @@
+       && (GET_MODE_SIZE (mode) == 8
+ 	  || (TARGET_HARD_FLOAT
+ 	      && TARGET_FPRS
+-	      && (mode == TFmode || mode == TDmode))))
++	      && FLOAT128_2REG_P (mode))))
+     return 64;
++  else if (FLOAT128_VECTOR_P (mode))
++    return 128;
+   else if (SPE_VECTOR_MODE (mode)
+ 	   || (type && TREE_CODE (type) == VECTOR_TYPE
+ 	       && int_size_in_bytes (type) >= 8
+@@ -9833,7 +10538,7 @@
+   if (DEFAULT_ABI == ABI_V4
+       && cum->escapes)
+     {
+-      if (SCALAR_FLOAT_MODE_P (mode))
++      if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (mode))
+ 	rs6000_passes_float = true;
+       else if (named && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
+ 	rs6000_passes_vector = true;
+@@ -9940,8 +10645,8 @@
+       if (TARGET_HARD_FLOAT && TARGET_FPRS
+ 	  && ((TARGET_SINGLE_FLOAT && mode == SFmode)
+ 	      || (TARGET_DOUBLE_FLOAT && mode == DFmode)
+-	      || (mode == TFmode && !TARGET_IEEEQUAD)
+-	      || mode == SDmode || mode == DDmode || mode == TDmode))
++	      || FLOAT128_2REG_P (mode)
++	      || DECIMAL_FLOAT_MODE_P (mode)))
+ 	{
+ 	  /* _Decimal128 must use an even/odd register pair.  This assumes
+ 	     that the register number is odd when fregno is odd.  */
+@@ -9948,13 +10653,13 @@
+ 	  if (mode == TDmode && (cum->fregno % 2) == 1)
+ 	    cum->fregno++;
+ 
+-	  if (cum->fregno + (mode == TFmode || mode == TDmode ? 1 : 0)
++	  if (cum->fregno + (FLOAT128_2REG_P (mode) ? 1 : 0)
+ 	      <= FP_ARG_V4_MAX_REG)
+ 	    cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3;
+ 	  else
+ 	    {
+ 	      cum->fregno = FP_ARG_V4_MAX_REG + 1;
+-	      if (mode == DFmode || mode == TFmode
++	      if (mode == DFmode || FLOAT128_IBM_P (mode)
+ 		  || mode == DDmode || mode == TDmode)
+ 		cum->words += cum->words & 1;
+ 	      cum->words += rs6000_arg_size (mode, type);
+@@ -10006,8 +10711,7 @@
+ 
+       cum->words = align_words + n_words;
+ 
+-      if (SCALAR_FLOAT_MODE_P (elt_mode)
+-	  && TARGET_HARD_FLOAT && TARGET_FPRS)
++      if (SCALAR_FLOAT_MODE_P (elt_mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
+ 	{
+ 	  /* _Decimal128 must be passed in an even/odd float register pair.
+ 	     This assumes that the register number is odd when fregno is
+@@ -10249,7 +10953,7 @@
+ 	      = gen_rtx_EXPR_LIST (VOIDmode,
+ 				   gen_rtx_REG (mode, cum->fregno++),
+ 				   GEN_INT (bitpos / BITS_PER_UNIT));
+-	    if (mode == TFmode || mode == TDmode)
++	    if (FLOAT128_2REG_P (mode))
+ 	      cum->fregno++;
+ 	  }
+ 	else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, 1))
+@@ -10525,9 +11229,11 @@
+       rtx r, off;
+       int i, k = 0;
+ 
+-      /* Do we also need to pass this argument in the parameter
+-	 save area?  */
+-      if (TARGET_64BIT && ! cum->prototype)
++      /* Do we also need to pass this argument in the parameter save area?
++	 Library support functions for IEEE 128-bit are assumed to not need the
++	 value passed both in GPRs and in vector registers.  */
++      if (TARGET_64BIT && !cum->prototype
++	  && (!cum->libcall || !FLOAT128_VECTOR_P (elt_mode)))
+ 	{
+ 	  int align_words = (cum->words + 1) & ~1;
+ 	  k = rs6000_psave_function_arg (mode, type, align_words, rvec);
+@@ -10600,8 +11306,8 @@
+       if (TARGET_HARD_FLOAT && TARGET_FPRS
+ 	  && ((TARGET_SINGLE_FLOAT && mode == SFmode)
+ 	      || (TARGET_DOUBLE_FLOAT && mode == DFmode)
+-	      || (mode == TFmode && !TARGET_IEEEQUAD)
+-	      || mode == SDmode || mode == DDmode || mode == TDmode))
++	      || FLOAT128_2REG_P (mode)
++	      || DECIMAL_FLOAT_MODE_P (mode)))
+ 	{
+ 	  /* _Decimal128 must use an even/odd register pair.  This assumes
+ 	     that the register number is odd when fregno is odd.  */
+@@ -10608,7 +11314,7 @@
+ 	  if (mode == TDmode && (cum->fregno % 2) == 1)
+ 	    cum->fregno++;
+ 
+-	  if (cum->fregno + (mode == TFmode || mode == TDmode ? 1 : 0)
++	  if (cum->fregno + (FLOAT128_2REG_P (mode) ? 1 : 0)
+ 	      <= FP_ARG_V4_MAX_REG)
+ 	    return gen_rtx_REG (mode, cum->fregno);
+ 	  else
+@@ -10670,7 +11376,7 @@
+ 	      machine_mode fmode = elt_mode;
+ 	      if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1)
+ 		{
+-		  gcc_assert (fmode == TFmode || fmode == TDmode);
++		  gcc_assert (FLOAT128_2REG_P (fmode));
+ 		  fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode;
+ 		}
+ 
+@@ -10758,11 +11464,14 @@
+ 
+   if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named))
+     {
+-      /* If we are passing this arg in the fixed parameter save area
+-         (gprs or memory) as well as VRs, we do not use the partial
+-	 bytes mechanism; instead, rs6000_function_arg will return a
+-	 PARALLEL including a memory element as necessary.  */
+-      if (TARGET_64BIT && ! cum->prototype)
++      /* If we are passing this arg in the fixed parameter save area (gprs or
++         memory) as well as VRs, we do not use the partial bytes mechanism;
++         instead, rs6000_function_arg will return a PARALLEL including a memory
++         element as necessary.  Library support functions for IEEE 128-bit are
++         assumed to not need the value passed both in GPRs and in vector
++         registers.  */
++      if (TARGET_64BIT && !cum->prototype
++	  && (!cum->libcall || !FLOAT128_VECTOR_P (elt_mode)))
+ 	return 0;
+ 
+       /* Otherwise, we pass in VRs only.  Check for partial copies.  */
+@@ -10844,16 +11553,17 @@
+ 			  machine_mode mode, const_tree type,
+ 			  bool named ATTRIBUTE_UNUSED)
+ {
+-  if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD && mode == TFmode)
++  if (!type)
++    return 0;
++
++  if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD
++      && FLOAT128_IEEE_P (TYPE_MODE (type)))
+     {
+       if (TARGET_DEBUG_ARG)
+-	fprintf (stderr, "function_arg_pass_by_reference: V4 long double\n");
++	fprintf (stderr, "function_arg_pass_by_reference: V4 IEEE 128-bit\n");
+       return 1;
+     }
+ 
+-  if (!type)
+-    return 0;
+-
+   if (DEFAULT_ABI == ABI_V4 && AGGREGATE_TYPE_P (type))
+     {
+       if (TARGET_DEBUG_ARG)
+@@ -11024,10 +11734,10 @@
+   return false;
+ }
+ 
+-/* Return the size of the REG_PARM_STACK_SPACE are for FUN.  This is
++/* Return the size of the REG_PARM_STACK_SPACE area for FUN.  This is
+    usually a constant depending on the ABI.  However, in the ELFv2 ABI
+    the register parameter area is optional when calling a function that
+-   has a prototype is scope, has no variable argument list, and passes
++   has a prototype in scope, has no variable argument list, and passes
+    all parameters in registers.  */
+ 
+ int
+@@ -11187,7 +11897,7 @@
+   else
+     {
+       first_reg_offset = next_cum.words;
+-      save_area = virtual_incoming_args_rtx;
++      save_area = crtl->args.internal_arg_pointer;
+ 
+       if (targetm.calls.must_pass_in_stack (mode, type))
+ 	first_reg_offset += rs6000_arg_size (TYPE_MODE (type), type);
+@@ -11382,7 +12092,7 @@
+     }
+ 
+   /* Find the overflow area.  */
+-  t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
++  t = make_tree (TREE_TYPE (ovf), crtl->args.internal_arg_pointer);
+   if (words != 0)
+     t = fold_build_pointer_plus_hwi (t, words * MIN_UNITS_PER_WORD);
+   t = build2 (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
+@@ -11524,10 +12234,8 @@
+       && ((TARGET_SINGLE_FLOAT && TYPE_MODE (type) == SFmode)
+           || (TARGET_DOUBLE_FLOAT 
+               && (TYPE_MODE (type) == DFmode 
+- 	          || TYPE_MODE (type) == TFmode
+-	          || TYPE_MODE (type) == SDmode
+-	          || TYPE_MODE (type) == DDmode
+-	          || TYPE_MODE (type) == TDmode))))
++		  || FLOAT128_2REG_P (TYPE_MODE (type))
++		  || DECIMAL_FLOAT_MODE_P (TYPE_MODE (type))))))
+     {
+       /* FP args go in FP registers, if present.  */
+       reg = fpr;
+@@ -12907,7 +13615,104 @@
+   return NULL_RTX;
+ }
+ 
++/* Expand the CPU builtin in FCODE and store the result in TARGET.  */
++
+ static rtx
++cpu_expand_builtin (enum rs6000_builtins fcode, tree exp ATTRIBUTE_UNUSED,
++		    rtx target)
++{
++  /* __builtin_cpu_init () is a nop, so expand to nothing.  */
++  if (fcode == RS6000_BUILTIN_CPU_INIT)
++    return const0_rtx;
++
++  if (target == 0 || GET_MODE (target) != SImode)
++    target = gen_reg_rtx (SImode);
++
++#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
++  tree arg = TREE_OPERAND (CALL_EXPR_ARG (exp, 0), 0);
++  if (TREE_CODE (arg) != STRING_CST)
++    {
++      error ("builtin %s only accepts a string argument",
++	     rs6000_builtin_info[(size_t) fcode].name);
++      return const0_rtx;
++    }
++
++  if (fcode == RS6000_BUILTIN_CPU_IS)
++    {
++      const char *cpu = TREE_STRING_POINTER (arg);
++      rtx cpuid = NULL_RTX;
++      for (size_t i = 0; i < ARRAY_SIZE (cpu_is_info); i++)
++	if (strcmp (cpu, cpu_is_info[i].cpu) == 0)
++	  {
++	    /* The CPUID value in the TCB is offset by _DL_FIRST_PLATFORM.  */
++	    cpuid = GEN_INT (cpu_is_info[i].cpuid + _DL_FIRST_PLATFORM);
++	    break;
++	  }
++      if (cpuid == NULL_RTX)
++	{
++	  /* Invalid CPU argument.  */
++	  error ("cpu %s is an invalid argument to builtin %s",
++		 cpu, rs6000_builtin_info[(size_t) fcode].name);
++	  return const0_rtx;
++	}
++
++      rtx platform = gen_reg_rtx (SImode);
++      rtx tcbmem = gen_const_mem (SImode,
++				  gen_rtx_PLUS (Pmode,
++						gen_rtx_REG (Pmode, TLS_REGNUM),
++						GEN_INT (TCB_PLATFORM_OFFSET)));
++      emit_move_insn (platform, tcbmem);
++      emit_insn (gen_eqsi3 (target, platform, cpuid));
++    }
++  else if (fcode == RS6000_BUILTIN_CPU_SUPPORTS)
++    {
++      const char *hwcap = TREE_STRING_POINTER (arg);
++      rtx mask = NULL_RTX;
++      int hwcap_offset;
++      for (size_t i = 0; i < ARRAY_SIZE (cpu_supports_info); i++)
++	if (strcmp (hwcap, cpu_supports_info[i].hwcap) == 0)
++	  {
++	    mask = GEN_INT (cpu_supports_info[i].mask);
++	    hwcap_offset = TCB_HWCAP_OFFSET (cpu_supports_info[i].id);
++	    break;
++	  }
++      if (mask == NULL_RTX)
++	{
++	  /* Invalid HWCAP argument.  */
++	  error ("hwcap %s is an invalid argument to builtin %s",
++		 hwcap, rs6000_builtin_info[(size_t) fcode].name);
++	  return const0_rtx;
++	}
++
++      rtx tcb_hwcap = gen_reg_rtx (SImode);
++      rtx tcbmem = gen_const_mem (SImode,
++				  gen_rtx_PLUS (Pmode,
++						gen_rtx_REG (Pmode, TLS_REGNUM),
++						GEN_INT (hwcap_offset)));
++      emit_move_insn (tcb_hwcap, tcbmem);
++      rtx scratch1 = gen_reg_rtx (SImode);
++      emit_insn (gen_rtx_SET (VOIDmode, scratch1,
++			      gen_rtx_AND (SImode, tcb_hwcap, mask)));
++      rtx scratch2 = gen_reg_rtx (SImode);
++      emit_insn (gen_eqsi3 (scratch2, scratch1, const0_rtx));
++      emit_insn (gen_rtx_SET (VOIDmode, target,
++			      gen_rtx_XOR (SImode, scratch2, const1_rtx)));
++    }
++
++  /* Record that we have expanded a CPU builtin, so that we can later
++     emit a reference to the special symbol exported by LIBC to ensure we
++     do not link against an old LIBC that doesn't support this feature.  */
++  cpu_builtin_p = true;
++
++#else
++  /* For old LIBCs, always return FALSE.  */
++  emit_move_insn (target, GEN_INT (0));
++#endif /* TARGET_LIBC_PROVIDES_HWCAP_IN_TCB */
++
++  return target;
++}
++
++static rtx
+ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target)
+ {
+   rtx pat;
+@@ -14233,6 +15038,11 @@
+     case RS6000_BUILTIN_MTFSF:
+       return rs6000_expand_mtfsf_builtin (CODE_FOR_rs6000_mtfsf, exp);
+ 
++    case RS6000_BUILTIN_CPU_INIT:
++    case RS6000_BUILTIN_CPU_IS:
++    case RS6000_BUILTIN_CPU_SUPPORTS:
++      return cpu_expand_builtin (fcode, exp, target);
++
+     case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
+     case ALTIVEC_BUILTIN_MASK_FOR_STORE:
+       {
+@@ -14418,6 +15228,30 @@
+   dfloat128_type_internal_node = dfloat128_type_node;
+   void_type_internal_node = void_type_node;
+ 
++  /* 128-bit floating point support.  KFmode is IEEE 128-bit floating point.
++     IFmode is the IBM extended 128-bit format that is a pair of doubles.
++     TFmode will be either IEEE 128-bit floating point or the IBM double-double
++     format that uses a pair of doubles, depending on the switches and
++     defaults.  */
++  if (TARGET_FLOAT128)
++    {
++      ibm128_float_type_node = make_node (REAL_TYPE);
++      TYPE_PRECISION (ibm128_float_type_node) = 128;
++      layout_type (ibm128_float_type_node);
++      SET_TYPE_MODE (ibm128_float_type_node, IFmode);
++
++      ieee128_float_type_node = make_node (REAL_TYPE);
++      TYPE_PRECISION (ieee128_float_type_node) = 128;
++      layout_type (ieee128_float_type_node);
++      SET_TYPE_MODE (ieee128_float_type_node, KFmode);
++
++      lang_hooks.types.register_builtin_type (ieee128_float_type_node,
++					      "__float128");
++
++      lang_hooks.types.register_builtin_type (ibm128_float_type_node,
++					      "__ibm128");
++    }
++
+   /* Initialize the modes for builtin_function_type, mapping a machine mode to
+      tree type node.  */
+   builtin_mode_to_type[QImode][0] = integer_type_node;
+@@ -14430,6 +15264,8 @@
+   builtin_mode_to_type[TImode][1] = unsigned_intTI_type_node;
+   builtin_mode_to_type[SFmode][0] = float_type_node;
+   builtin_mode_to_type[DFmode][0] = double_type_node;
++  builtin_mode_to_type[IFmode][0] = ibm128_float_type_node;
++  builtin_mode_to_type[KFmode][0] = ieee128_float_type_node;
+   builtin_mode_to_type[TFmode][0] = long_double_type_node;
+   builtin_mode_to_type[DDmode][0] = dfloat64_type_node;
+   builtin_mode_to_type[TDmode][0] = dfloat128_type_node;
+@@ -14597,6 +15433,14 @@
+ 				    NULL_TREE);
+   def_builtin ("__builtin_mtfsf", ftype, RS6000_BUILTIN_MTFSF);
+ 
++  ftype = build_function_type_list (void_type_node, NULL_TREE);
++  def_builtin ("__builtin_cpu_init", ftype, RS6000_BUILTIN_CPU_INIT);
++
++  ftype = build_function_type_list (bool_int_type_node, const_ptr_type_node,
++				    NULL_TREE);
++  def_builtin ("__builtin_cpu_is", ftype, RS6000_BUILTIN_CPU_IS);
++  def_builtin ("__builtin_cpu_supports", ftype, RS6000_BUILTIN_CPU_SUPPORTS);
++
+ #if TARGET_XCOFF
+   /* AIX libm provides clog as __clog.  */
+   if ((tdecl = builtin_decl_explicit (BUILT_IN_CLOG)) != NULL_TREE)
+@@ -15920,78 +16764,185 @@
+     }
+ }
+ 
++/* Set up AIX/Darwin/64-bit Linux quad floating point routines.  */
+ static void
+-rs6000_init_libfuncs (void)
++init_float128_ibm (machine_mode mode)
+ {
+-  if (!TARGET_IEEEQUAD)
+-      /* AIX/Darwin/64-bit Linux quad floating point routines.  */
+-    if (!TARGET_XL_COMPAT)
+-      {
+-	set_optab_libfunc (add_optab, TFmode, "__gcc_qadd");
+-	set_optab_libfunc (sub_optab, TFmode, "__gcc_qsub");
+-	set_optab_libfunc (smul_optab, TFmode, "__gcc_qmul");
+-	set_optab_libfunc (sdiv_optab, TFmode, "__gcc_qdiv");
++  if (!TARGET_XL_COMPAT)
++    {
++      set_optab_libfunc (add_optab, mode, "__gcc_qadd");
++      set_optab_libfunc (sub_optab, mode, "__gcc_qsub");
++      set_optab_libfunc (smul_optab, mode, "__gcc_qmul");
++      set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv");
+ 
+-	if (!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
+-	  {
+-	    set_optab_libfunc (neg_optab, TFmode, "__gcc_qneg");
+-	    set_optab_libfunc (eq_optab, TFmode, "__gcc_qeq");
+-	    set_optab_libfunc (ne_optab, TFmode, "__gcc_qne");
+-	    set_optab_libfunc (gt_optab, TFmode, "__gcc_qgt");
+-	    set_optab_libfunc (ge_optab, TFmode, "__gcc_qge");
+-	    set_optab_libfunc (lt_optab, TFmode, "__gcc_qlt");
+-	    set_optab_libfunc (le_optab, TFmode, "__gcc_qle");
++      if (!(TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)))
++	{
++	  set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
++	  set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
++	  set_optab_libfunc (ne_optab, mode, "__gcc_qne");
++	  set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
++	  set_optab_libfunc (ge_optab, mode, "__gcc_qge");
++	  set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
++	  set_optab_libfunc (le_optab, mode, "__gcc_qle");
+ 
+-	    set_conv_libfunc (sext_optab, TFmode, SFmode, "__gcc_stoq");
+-	    set_conv_libfunc (sext_optab, TFmode, DFmode, "__gcc_dtoq");
+-	    set_conv_libfunc (trunc_optab, SFmode, TFmode, "__gcc_qtos");
+-	    set_conv_libfunc (trunc_optab, DFmode, TFmode, "__gcc_qtod");
+-	    set_conv_libfunc (sfix_optab, SImode, TFmode, "__gcc_qtoi");
+-	    set_conv_libfunc (ufix_optab, SImode, TFmode, "__gcc_qtou");
+-	    set_conv_libfunc (sfloat_optab, TFmode, SImode, "__gcc_itoq");
+-	    set_conv_libfunc (ufloat_optab, TFmode, SImode, "__gcc_utoq");
+-	  }
++	  set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
++	  set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
++	  set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
++	  set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
++	  set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
++	  set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
++	  set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
++	  set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
++	}
+ 
+-	if (!(TARGET_HARD_FLOAT && TARGET_FPRS))
+-	  set_optab_libfunc (unord_optab, TFmode, "__gcc_qunord");
+-      }
+-    else
+-      {
+-	set_optab_libfunc (add_optab, TFmode, "_xlqadd");
+-	set_optab_libfunc (sub_optab, TFmode, "_xlqsub");
+-	set_optab_libfunc (smul_optab, TFmode, "_xlqmul");
+-	set_optab_libfunc (sdiv_optab, TFmode, "_xlqdiv");
+-      }
++      if (!(TARGET_HARD_FLOAT && TARGET_FPRS))
++	set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
++    }
+   else
+     {
+-      /* 32-bit SVR4 quad floating point routines.  */
++      set_optab_libfunc (add_optab, mode, "_xlqadd");
++      set_optab_libfunc (sub_optab, mode, "_xlqsub");
++      set_optab_libfunc (smul_optab, mode, "_xlqmul");
++      set_optab_libfunc (sdiv_optab, mode, "_xlqdiv");
++    }
+ 
+-      set_optab_libfunc (add_optab, TFmode, "_q_add");
+-      set_optab_libfunc (sub_optab, TFmode, "_q_sub");
+-      set_optab_libfunc (neg_optab, TFmode, "_q_neg");
+-      set_optab_libfunc (smul_optab, TFmode, "_q_mul");
+-      set_optab_libfunc (sdiv_optab, TFmode, "_q_div");
++  /* Add various conversions for IFmode to use the traditional TFmode
++     names.  */
++  if (mode == IFmode)
++    {
++      set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdtf2");
++      set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddtf2");
++      set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunctftd2");
++      set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunctfsd2");
++      set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunctfdd2");
++      set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtdtf2");
++
++      if (TARGET_POWERPC64)
++	{
++	  set_conv_libfunc (sfix_optab, TImode, mode, "__fixtfti");
++	  set_conv_libfunc (ufix_optab, TImode, mode, "__fixunstfti");
++	  set_conv_libfunc (sfloat_optab, mode, TImode, "__floattitf");
++	  set_conv_libfunc (ufloat_optab, mode, TImode, "__floatuntitf");
++	}
++    }
++}
++
++/* Set up IEEE 128-bit floating point routines.  Use different names if the
++   arguments can be passed in a vector register.  The historical PowerPC
++   implementation of IEEE 128-bit floating point used _q_<op> for the names, so
++   continue to use that if we aren't using vector registers to pass IEEE
++   128-bit floating point.  */
++
++static void
++init_float128_ieee (machine_mode mode)
++{
++  if (FLOAT128_VECTOR_P (mode))
++    {
++      set_optab_libfunc (add_optab, mode, "__addkf3");
++      set_optab_libfunc (sub_optab, mode, "__subkf3");
++      set_optab_libfunc (neg_optab, mode, "__negkf2");
++      set_optab_libfunc (smul_optab, mode, "__mulkf3");
++      set_optab_libfunc (sdiv_optab, mode, "__divkf3");
++      set_optab_libfunc (sqrt_optab, mode, "__sqrtkf2");
++      set_optab_libfunc (abs_optab, mode, "__abstkf2");
++
++      set_optab_libfunc (eq_optab, mode, "__eqkf2");
++      set_optab_libfunc (ne_optab, mode, "__nekf2");
++      set_optab_libfunc (gt_optab, mode, "__gtkf2");
++      set_optab_libfunc (ge_optab, mode, "__gekf2");
++      set_optab_libfunc (lt_optab, mode, "__ltkf2");
++      set_optab_libfunc (le_optab, mode, "__lekf2");
++      set_optab_libfunc (unord_optab, mode, "__unordkf2");
++
++      set_conv_libfunc (sext_optab, mode, SFmode, "__extendsfkf2");
++      set_conv_libfunc (sext_optab, mode, DFmode, "__extenddfkf2");
++      set_conv_libfunc (trunc_optab, SFmode, mode, "__trunckfsf2");
++      set_conv_libfunc (trunc_optab, DFmode, mode, "__trunckfdf2");
++
++      set_conv_libfunc (sext_optab, mode, IFmode, "__extendtfkf2");
++      if (mode != TFmode && FLOAT128_IBM_P (TFmode))
++	set_conv_libfunc (sext_optab, mode, TFmode, "__extendtfkf2");
++
++      set_conv_libfunc (trunc_optab, IFmode, mode, "__trunckftf2");
++      if (mode != TFmode && FLOAT128_IBM_P (TFmode))
++	set_conv_libfunc (trunc_optab, TFmode, mode, "__trunckftf2");
++
++      set_conv_libfunc (sext_optab, mode, SDmode, "__dpd_extendsdkf2");
++      set_conv_libfunc (sext_optab, mode, DDmode, "__dpd_extendddkf2");
++      set_conv_libfunc (trunc_optab, mode, TDmode, "__dpd_trunckftd2");
++      set_conv_libfunc (trunc_optab, SDmode, mode, "__dpd_trunckfsd2");
++      set_conv_libfunc (trunc_optab, DDmode, mode, "__dpd_trunckfdd2");
++      set_conv_libfunc (sext_optab, TDmode, mode, "__dpd_extendtdkf2");
++
++      set_conv_libfunc (sfix_optab, SImode, mode, "__fixkfsi");
++      set_conv_libfunc (ufix_optab, SImode, mode, "__fixunskfsi");
++      set_conv_libfunc (sfix_optab, DImode, mode, "__fixkfdi");
++      set_conv_libfunc (ufix_optab, DImode, mode, "__fixunskfdi");
++
++      set_conv_libfunc (sfloat_optab, mode, SImode, "__floatsikf");
++      set_conv_libfunc (ufloat_optab, mode, SImode, "__floatunsikf");
++      set_conv_libfunc (sfloat_optab, mode, DImode, "__floatdikf");
++      set_conv_libfunc (ufloat_optab, mode, DImode, "__floatundikf");
++
++      if (TARGET_POWERPC64)
++	{
++	  set_conv_libfunc (sfix_optab, TImode, mode, "__fixkfti");
++	  set_conv_libfunc (ufix_optab, TImode, mode, "__fixunskfti");
++	  set_conv_libfunc (sfloat_optab, mode, TImode, "__floattikf");
++	  set_conv_libfunc (ufloat_optab, mode, TImode, "__floatuntikf");
++	}
++    }
++
++  else
++    {
++      set_optab_libfunc (add_optab, mode, "_q_add");
++      set_optab_libfunc (sub_optab, mode, "_q_sub");
++      set_optab_libfunc (neg_optab, mode, "_q_neg");
++      set_optab_libfunc (smul_optab, mode, "_q_mul");
++      set_optab_libfunc (sdiv_optab, mode, "_q_div");
+       if (TARGET_PPC_GPOPT)
+-	set_optab_libfunc (sqrt_optab, TFmode, "_q_sqrt");
++	set_optab_libfunc (sqrt_optab, mode, "_q_sqrt");
+ 
+-      set_optab_libfunc (eq_optab, TFmode, "_q_feq");
+-      set_optab_libfunc (ne_optab, TFmode, "_q_fne");
+-      set_optab_libfunc (gt_optab, TFmode, "_q_fgt");
+-      set_optab_libfunc (ge_optab, TFmode, "_q_fge");
+-      set_optab_libfunc (lt_optab, TFmode, "_q_flt");
+-      set_optab_libfunc (le_optab, TFmode, "_q_fle");
++      set_optab_libfunc (eq_optab, mode, "_q_feq");
++      set_optab_libfunc (ne_optab, mode, "_q_fne");
++      set_optab_libfunc (gt_optab, mode, "_q_fgt");
++      set_optab_libfunc (ge_optab, mode, "_q_fge");
++      set_optab_libfunc (lt_optab, mode, "_q_flt");
++      set_optab_libfunc (le_optab, mode, "_q_fle");
+ 
+-      set_conv_libfunc (sext_optab, TFmode, SFmode, "_q_stoq");
+-      set_conv_libfunc (sext_optab, TFmode, DFmode, "_q_dtoq");
+-      set_conv_libfunc (trunc_optab, SFmode, TFmode, "_q_qtos");
+-      set_conv_libfunc (trunc_optab, DFmode, TFmode, "_q_qtod");
+-      set_conv_libfunc (sfix_optab, SImode, TFmode, "_q_qtoi");
+-      set_conv_libfunc (ufix_optab, SImode, TFmode, "_q_qtou");
+-      set_conv_libfunc (sfloat_optab, TFmode, SImode, "_q_itoq");
+-      set_conv_libfunc (ufloat_optab, TFmode, SImode, "_q_utoq");
++      set_conv_libfunc (sext_optab, mode, SFmode, "_q_stoq");
++      set_conv_libfunc (sext_optab, mode, DFmode, "_q_dtoq");
++      set_conv_libfunc (trunc_optab, SFmode, mode, "_q_qtos");
++      set_conv_libfunc (trunc_optab, DFmode, mode, "_q_qtod");
++      set_conv_libfunc (sfix_optab, SImode, mode, "_q_qtoi");
++      set_conv_libfunc (ufix_optab, SImode, mode, "_q_qtou");
++      set_conv_libfunc (sfloat_optab, mode, SImode, "_q_itoq");
++      set_conv_libfunc (ufloat_optab, mode, SImode, "_q_utoq");
+     }
+ }
+ 
++static void
++rs6000_init_libfuncs (void)
++{
++  /* __float128 support.  */
++  if (TARGET_FLOAT128)
++    {
++      init_float128_ibm (IFmode);
++      init_float128_ieee (KFmode);
++    }
++
++  /* AIX/Darwin/64-bit Linux quad floating point routines.  */
++  if (TARGET_LONG_DOUBLE_128)
++    {
++      if (!TARGET_IEEEQUAD)
++	init_float128_ibm (TFmode);
++
++      /* IEEE 128-bit including 32-bit SVR4 quad floating point routines.  */
++      else
++	init_float128_ieee (TFmode);
++    }
++}
++
+ 
+ /* Expand a block clear operation, and return 1 if successful.  Return 0
+    if we should let the compiler generate normal code.
+@@ -16761,7 +17712,7 @@
+ static int
+ rs6000_secondary_reload_memory (rtx addr,
+ 				enum reg_class rclass,
+-				enum machine_mode mode)
++				machine_mode mode)
+ {
+   int extra_cost = 0;
+   rtx reg, and_arg, plus_arg0, plus_arg1;
+@@ -17041,6 +17992,11 @@
+ 	  || (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)))
+     return true;
+ 
++  else if (TARGET_DIRECT_MOVE_128 && size == 16
++	   && ((to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
++	       || (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)))
++    return true;
++
+   else if (TARGET_MFPGPR && TARGET_POWERPC64 && size == 8
+ 	   && ((to_type == GPR_REG_TYPE && from_type == FPR_REG_TYPE)
+ 	       || (to_type == FPR_REG_TYPE && from_type == GPR_REG_TYPE)))
+@@ -17054,7 +18010,7 @@
+   return false;
+ }
+ 
+-/* Power8 helper function for rs6000_secondary_reload, handle all of the
++/* Direct move helper function for rs6000_secondary_reload, handle all of the
+    special direct moves that involve allocating an extra register, return the
+    insn code of the helper function if there is such a function or
+    CODE_FOR_nothing if not.  */
+@@ -17076,8 +18032,8 @@
+       if (size == 16)
+ 	{
+ 	  /* Handle moving 128-bit values from GPRs to VSX point registers on
+-	     power8 when running in 64-bit mode using XXPERMDI to glue the two
+-	     64-bit values back together.  */
++	     ISA 2.07 (power8, power9) when running in 64-bit mode using
++	     XXPERMDI to glue the two 64-bit values back together.  */
+ 	  if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
+ 	    {
+ 	      cost = 3;			/* 2 mtvsrd's, 1 xxpermdi.  */
+@@ -17085,7 +18041,7 @@
+ 	    }
+ 
+ 	  /* Handle moving 128-bit values from VSX point registers to GPRs on
+-	     power8 when running in 64-bit mode using XXPERMDI to get access to the
++	     ISA 2.07 when running in 64-bit mode using XXPERMDI to get access to the
+ 	     bottom 64-bit value.  */
+ 	  else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)
+ 	    {
+@@ -17113,7 +18069,7 @@
+   if (TARGET_POWERPC64 && size == 16)
+     {
+       /* Handle moving 128-bit values from GPRs to VSX point registers on
+-	 power8 when running in 64-bit mode using XXPERMDI to glue the two
++	 ISA 2.07 when running in 64-bit mode using XXPERMDI to glue the two
+ 	 64-bit values back together.  */
+       if (to_type == VSX_REG_TYPE && from_type == GPR_REG_TYPE)
+ 	{
+@@ -17122,7 +18078,7 @@
+ 	}
+ 
+       /* Handle moving 128-bit values from VSX point registers to GPRs on
+-	 power8 when running in 64-bit mode using XXPERMDI to get access to the
++	 ISA 2.07 when running in 64-bit mode using XXPERMDI to get access to the
+ 	 bottom 64-bit value.  */
+       else if (to_type == GPR_REG_TYPE && from_type == VSX_REG_TYPE)
+ 	{
+@@ -17134,8 +18090,8 @@
+   else if (!TARGET_POWERPC64 && size == 8)
+     {
+       /* Handle moving 64-bit values from GPRs to floating point registers on
+-	 power8 when running in 32-bit mode using FMRGOW to glue the two 32-bit
+-	 values back together.  Altivec register classes must be handled
++	 ISA 2.07 when running in 32-bit mode using FMRGOW to glue the two
++	 32-bit values back together.  Altivec register classes must be handled
+ 	 specially since a different instruction is used, and the secondary
+ 	 reload support requires a single instruction class in the scratch
+ 	 register constraint.  However, right now TFmode is not allowed in
+@@ -17162,7 +18118,7 @@
+ 
+ /* Return whether a move between two register classes can be done either
+    directly (simple move) or via a pattern that uses a single extra temporary
+-   (using power8's direct move in this case.  */
++   (using ISA 2.07's direct move in this case.  */
+ 
+ static bool
+ rs6000_secondary_reload_move (enum rs6000_reg_type to_type,
+@@ -17271,8 +18227,10 @@
+ 
+   /* If this is a scalar floating point value and we want to load it into the
+      traditional Altivec registers, do it via a move via a traditional floating
+-     point register.  Also make sure that non-zero constants use a FPR.  */
++     point register, unless we have D-form addressing.  Also make sure that
++     non-zero constants use a FPR.  */
+   if (!done_p && reg_addr[mode].scalar_in_vmx_p
++      && !mode_supports_vmx_dform (mode)
+       && (rclass == VSX_REGS || rclass == ALTIVEC_REGS)
+       && (memory_p || (GET_CODE (x) == CONST_DOUBLE)))
+     {
+@@ -17836,10 +18794,14 @@
+ 	  return NO_REGS;
+ 	}
+ 
+-      /* If this is a scalar floating point value, prefer the traditional
+-	 floating point registers so that we can use D-form (register+offset)
+-	 addressing.  */
+-      if (GET_MODE_SIZE (mode) < 16)
++      /* D-form addressing can easily reload the value.  */
++      if (mode_supports_vmx_dform (mode))
++	return rclass;
++
++      /* If this is a scalar floating point value and we don't have D-form
++	 addressing, prefer the traditional floating point registers so that we
++	 can use D-form (register+offset) addressing.  */
++      if (GET_MODE_SIZE (mode) < 16 && rclass == VSX_REGS)
+ 	return FLOAT_REGS;
+ 
+       /* Prefer the Altivec registers if Altivec is handling the vector
+@@ -17988,6 +18950,7 @@
+      instead of reloading the secondary memory address for Altivec moves.  */
+   if (TARGET_VSX
+       && GET_MODE_SIZE (mode) < 16
++      && !mode_supports_vmx_dform (mode)
+       && (((rclass == GENERAL_REGS || rclass == BASE_REGS)
+            && (regno >= 0 && ALTIVEC_REGNO_P (regno)))
+           || ((rclass == VSX_REGS || rclass == ALTIVEC_REGS)
+@@ -18059,6 +19022,8 @@
+ 	{
+ 	  unsigned to_nregs = hard_regno_nregs[FIRST_FPR_REGNO][to];
+ 	  unsigned from_nregs = hard_regno_nregs[FIRST_FPR_REGNO][from];
++	  bool to_float128_vector_p = FLOAT128_VECTOR_P (to);
++	  bool from_float128_vector_p = FLOAT128_VECTOR_P (from);
+ 
+ 	  /* Don't allow 64-bit types to overlap with 128-bit types that take a
+ 	     single register under VSX because the scalar part of the register
+@@ -18067,7 +19032,10 @@
+ 	     IEEE floating point can't overlap, and neither can small
+ 	     values.  */
+ 
+-	  if (TARGET_IEEEQUAD && (to == TFmode || from == TFmode))
++	  if (to_float128_vector_p && from_float128_vector_p)
++	    return false;
++
++	  else if (to_float128_vector_p || from_float128_vector_p)
+ 	    return true;
+ 
+ 	  /* TDmode in floating-mode registers must always go into a register
+@@ -18095,6 +19063,8 @@
+   if (TARGET_E500_DOUBLE
+       && ((((to) == DFmode) + ((from) == DFmode)) == 1
+ 	  || (((to) == TFmode) + ((from) == TFmode)) == 1
++	  || (((to) == IFmode) + ((from) == IFmode)) == 1
++	  || (((to) == KFmode) + ((from) == KFmode)) == 1
+ 	  || (((to) == DDmode) + ((from) == DDmode)) == 1
+ 	  || (((to) == TDmode) + ((from) == TDmode)) == 1
+ 	  || (((to) == DImode) + ((from) == DImode)) == 1))
+@@ -18194,6 +19164,11 @@
+ 	  if (src_gpr_p)
+ 	    return "#";
+ 
++	  if (TARGET_DIRECT_MOVE_128 && src_vsx_p)
++	    return (WORDS_BIG_ENDIAN
++		    ? "mfvsrd %0,%x1\n\tmfvsrld %L0,%x1"
++		    : "mfvsrd %L0,%x1\n\tmfvsrld %0,%x1");
++
+ 	  else if (TARGET_VSX && TARGET_DIRECT_MOVE && src_vsx_p)
+ 	    return "#";
+ 	}
+@@ -18203,6 +19178,11 @@
+ 	  if (src_vsx_p)
+ 	    return "xxlor %x0,%x1,%x1";
+ 
++	  else if (TARGET_DIRECT_MOVE_128 && src_gpr_p)
++	    return (WORDS_BIG_ENDIAN
++		    ? "mtvsrdd %x0,%1,%L1"
++		    : "mtvsrdd %x0,%L1,%1");
++
+ 	  else if (TARGET_DIRECT_MOVE && src_gpr_p)
+ 	    return "#";
+ 	}
+@@ -18291,13 +19271,7 @@
+ 	return output_vec_const_move (operands);
+     }
+ 
+-  if (TARGET_DEBUG_ADDR)
+-    {
+-      fprintf (stderr, "\n===== Bad 128 bit move:\n");
+-      debug_rtx (gen_rtx_SET (VOIDmode, dest, src));
+-    }
+-
+-  gcc_unreachable ();
++  fatal_insn ("Bad 128-bit move", gen_rtx_SET (VOIDmode, dest, src));
+ }
+ 
+ /* Validate a 128-bit move.  */
+@@ -19072,7 +20046,7 @@
+ 	/* Ugly hack because %y is overloaded.  */
+ 	if ((TARGET_SPE || TARGET_E500_DOUBLE)
+ 	    && (GET_MODE_SIZE (GET_MODE (x)) == 8
+-		|| GET_MODE (x) == TFmode
++		|| FLOAT128_2REG_P (GET_MODE (x))
+ 		|| GET_MODE (x) == TImode
+ 		|| GET_MODE (x) == PTImode))
+ 	  {
+@@ -19400,7 +20374,9 @@
+   rtx op0 = XEXP (cmp, 0);
+   rtx op1 = XEXP (cmp, 1);
+ 
+-  if (FLOAT_MODE_P (mode))
++  if (!TARGET_FLOAT128_HW && FLOAT128_VECTOR_P (mode))
++    comp_mode = CCmode;
++  else if (FLOAT_MODE_P (mode))
+     comp_mode = CCFPmode;
+   else if (code == GTU || code == LTU
+ 	   || code == GEU || code == LEU)
+@@ -19484,6 +20460,8 @@
+ 	      break;
+ 
+ 	    case TFmode:
++	    case IFmode:
++	    case KFmode:
+ 	      cmp = (flag_finite_math_only && !flag_trapping_math)
+ 		? gen_tsttfeq_gpr (compare_result, op0, op1)
+ 		: gen_cmptfeq_gpr (compare_result, op0, op1);
+@@ -19511,6 +20489,8 @@
+ 	      break;
+ 
+ 	    case TFmode:
++	    case IFmode:
++	    case KFmode:
+ 	      cmp = (flag_finite_math_only && !flag_trapping_math)
+ 		? gen_tsttfgt_gpr (compare_result, op0, op1)
+ 		: gen_cmptfgt_gpr (compare_result, op0, op1);
+@@ -19538,6 +20518,8 @@
+ 	      break;
+ 
+ 	    case TFmode:
++	    case IFmode:
++	    case KFmode:
+ 	      cmp = (flag_finite_math_only && !flag_trapping_math)
+ 		? gen_tsttflt_gpr (compare_result, op0, op1)
+ 		: gen_cmptflt_gpr (compare_result, op0, op1);
+@@ -19575,6 +20557,8 @@
+ 	      break;
+ 
+ 	    case TFmode:
++	    case IFmode:
++	    case KFmode:
+ 	      cmp = (flag_finite_math_only && !flag_trapping_math)
+ 		? gen_tsttfeq_gpr (compare_result2, op0, op1)
+ 		: gen_cmptfeq_gpr (compare_result2, op0, op1);
+@@ -19597,14 +20581,90 @@
+ 
+       emit_insn (cmp);
+     }
++
++  /* IEEE 128-bit support in VSX registers when we do not have hardware
++     support.  */
++  else if (!TARGET_FLOAT128_HW && FLOAT128_VECTOR_P (mode))
++    {
++      rtx libfunc = NULL_RTX;
++      bool uneq_or_ltgt = false;
++      rtx dest = gen_reg_rtx (SImode);
++
++      switch (code)
++	{
++	case EQ:
++	case NE:
++	  libfunc = optab_libfunc (eq_optab, mode);
++	  break;
++
++	case GT:
++	case GE:
++	  libfunc = optab_libfunc (ge_optab, mode);
++	  break;
++
++	case LT:
++	case LE:
++	  libfunc = optab_libfunc (le_optab, mode);
++	  break;
++
++	case UNORDERED:
++	case ORDERED:
++	  libfunc = optab_libfunc (unord_optab, mode);
++	  code = (code == UNORDERED) ? NE : EQ;
++	  break;
++
++	case UNGE:
++	case UNGT:
++	  libfunc = optab_libfunc (le_optab, mode);
++	  code = (code == UNGE) ? GE : GT;
++	  break;
++
++	case UNLE:
++	case UNLT:
++	  libfunc = optab_libfunc (ge_optab, mode);
++	  code = (code == UNLE) ? LE : LT;
++	  break;
++
++	case UNEQ:
++	case LTGT:
++	  libfunc = optab_libfunc (le_optab, mode);
++	  uneq_or_ltgt = true;
++	  code = (code = UNEQ) ? NE : EQ;
++	  break;
++
++	default:
++	  gcc_unreachable ();
++	}
++
++      gcc_assert (libfunc);
++      dest = emit_library_call_value (libfunc, NULL_RTX, LCT_CONST,
++				      SImode, 2, op0, mode, op1, mode);
++
++      /* If this is UNEQ or LTGT, we call __lekf2, which returns -1 for less
++	 than, 0 for equal, +1 for greater, and +2 for nan.  We add 1, to give
++	 a value of 0..3, and then do and AND immediate of 1 to isolate whether
++	 it is 0/Nan (i.e. bottom bit is 0), or less than/greater than
++	 (i.e. bottom bit is 1).  */
++      if (uneq_or_ltgt)
++	{
++	  rtx add_result = gen_reg_rtx (SImode);
++	  rtx and_result = gen_reg_rtx (SImode);
++	  emit_insn (gen_addsi3 (add_result, dest, GEN_INT (1)));
++	  emit_insn (gen_andsi3 (and_result, add_result, GEN_INT (1)));
++	  dest = and_result;
++	}
++
++      emit_insn (gen_rtx_SET (VOIDmode, compare_result,
++			      gen_rtx_COMPARE (comp_mode, dest, const0_rtx)));
++    }
++
+   else
+     {
+       /* Generate XLC-compatible TFmode compare as PARALLEL with extra
+ 	 CLOBBERs to match cmptf_internal2 pattern.  */
+       if (comp_mode == CCFPmode && TARGET_XL_COMPAT
+-	  && GET_MODE (op0) == TFmode
+-	  && !TARGET_IEEEQUAD
+-	  && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128)
++	  && FLOAT128_IBM_P (GET_MODE (op0))
++	  && TARGET_HARD_FLOAT && TARGET_FPRS)
+ 	emit_insn (gen_rtx_PARALLEL (VOIDmode,
+ 	  gen_rtvec (10,
+ 		     gen_rtx_SET (VOIDmode,
+@@ -19638,6 +20698,7 @@
+   /* Some kinds of FP comparisons need an OR operation;
+      under flag_finite_math_only we don't bother.  */
+   if (FLOAT_MODE_P (mode)
++      && (!FLOAT128_IEEE_P (mode) || TARGET_FLOAT128_HW)
+       && !flag_finite_math_only
+       && !(TARGET_HARD_FLOAT && !TARGET_FPRS)
+       && (code == LE || code == GE
+@@ -19676,7 +20737,377 @@
+   return gen_rtx_fmt_ee (code, VOIDmode, compare_result, const0_rtx);
+ }
+ 
++
++/* Return the diagnostic message string if the binary operation OP is
++   not permitted on TYPE1 and TYPE2, NULL otherwise.  */
+ 
++static const char*
++rs6000_invalid_binary_op (int op ATTRIBUTE_UNUSED,
++			  const_tree type1,
++			  const_tree type2)
++{
++  enum machine_mode mode1 = TYPE_MODE (type1);
++  enum machine_mode mode2 = TYPE_MODE (type2);
++
++  /* For complex modes, use the inner type.  */
++  if (COMPLEX_MODE_P (mode1))
++    mode1 = GET_MODE_INNER (mode1);
++
++  if (COMPLEX_MODE_P (mode2))
++    mode2 = GET_MODE_INNER (mode2);
++
++  /* Don't allow IEEE 754R 128-bit binary floating point and IBM extended
++     double to intermix unless -mfloat128-convert.  */
++  if (mode1 == mode2)
++    return NULL;
++
++  if (!TARGET_FLOAT128_CVT)
++    {
++      if ((mode1 == KFmode && mode2 == IFmode)
++	  || (mode1 == IFmode && mode2 == KFmode))
++	return N_("__float128 and __ibm128 cannot be used in the same "
++		  "expression");
++
++      if (TARGET_IEEEQUAD
++	  && ((mode1 == IFmode && mode2 == TFmode)
++	      || (mode1 == TFmode && mode2 == IFmode)))
++	return N_("__ibm128 and long double cannot be used in the same "
++		  "expression");
++
++      if (!TARGET_IEEEQUAD
++	  && ((mode1 == KFmode && mode2 == TFmode)
++	      || (mode1 == TFmode && mode2 == KFmode)))
++	return N_("__float128 and long double cannot be used in the same "
++		  "expression");
++    }
++
++  return NULL;
++}
++
++
++/* Expand floating point conversion to/from __float128 and __ibm128.  */
++
++void
++rs6000_expand_float128_convert (rtx dest, rtx src, bool unsigned_p)
++{
++  machine_mode dest_mode = GET_MODE (dest);
++  machine_mode src_mode = GET_MODE (src);
++  convert_optab cvt = unknown_optab;
++  bool do_move = false;
++  rtx libfunc = NULL_RTX;
++  rtx dest2;
++  typedef rtx (*rtx_2func_t) (rtx, rtx);
++  rtx_2func_t hw_convert = (rtx_2func_t)0;
++  size_t kf_or_tf;
++
++  struct hw_conv_t {
++    rtx_2func_t	from_df;
++    rtx_2func_t from_sf;
++    rtx_2func_t from_si_sign;
++    rtx_2func_t from_si_uns;
++    rtx_2func_t from_di_sign;
++    rtx_2func_t from_di_uns;
++    rtx_2func_t to_df;
++    rtx_2func_t to_sf;
++    rtx_2func_t to_si_sign;
++    rtx_2func_t to_si_uns;
++    rtx_2func_t to_di_sign;
++    rtx_2func_t to_di_uns;
++  } hw_conversions[2] = {
++    /* convertions to/from KFmode */
++    {
++      gen_extenddfkf2_hw,		/* KFmode <- DFmode.  */
++      gen_extendsfkf2_hw,		/* KFmode <- SFmode.  */
++      gen_float_kfsi2_hw,		/* KFmode <- SImode (signed).  */
++      gen_floatuns_kfsi2_hw,		/* KFmode <- SImode (unsigned).  */
++      gen_float_kfdi2_hw,		/* KFmode <- DImode (signed).  */
++      gen_floatuns_kfdi2_hw,		/* KFmode <- DImode (unsigned).  */
++      gen_trunckfdf2_hw,		/* DFmode <- KFmode.  */
++      gen_trunckfsf2_hw,		/* SFmode <- KFmode.  */
++      gen_fix_kfsi2_hw,			/* SImode <- KFmode (signed).  */
++      gen_fixuns_kfsi2_hw,		/* SImode <- KFmode (unsigned).  */
++      gen_fix_kfdi2_hw,			/* DImode <- KFmode (signed).  */
++      gen_fixuns_kfdi2_hw,		/* DImode <- KFmode (unsigned).  */
++    },
++
++    /* convertions to/from TFmode */
++    {
++      gen_extenddftf2_hw,		/* TFmode <- DFmode.  */
++      gen_extendsftf2_hw,		/* TFmode <- SFmode.  */
++      gen_float_tfsi2_hw,		/* TFmode <- SImode (signed).  */
++      gen_floatuns_tfsi2_hw,		/* TFmode <- SImode (unsigned).  */
++      gen_float_tfdi2_hw,		/* TFmode <- DImode (signed).  */
++      gen_floatuns_tfdi2_hw,		/* TFmode <- DImode (unsigned).  */
++      gen_trunctfdf2_hw,		/* DFmode <- TFmode.  */
++      gen_trunctfsf2_hw,		/* SFmode <- TFmode.  */
++      gen_fix_tfsi2_hw,			/* SImode <- TFmode (signed).  */
++      gen_fixuns_tfsi2_hw,		/* SImode <- TFmode (unsigned).  */
++      gen_fix_tfdi2_hw,			/* DImode <- TFmode (signed).  */
++      gen_fixuns_tfdi2_hw,		/* DImode <- TFmode (unsigned).  */
++    },
++  };
++
++  if (dest_mode == src_mode)
++    gcc_unreachable ();
++
++  /* Eliminate memory operations.  */
++  if (MEM_P (src))
++    src = force_reg (src_mode, src);
++
++  if (MEM_P (dest))
++    {
++      rtx tmp = gen_reg_rtx (dest_mode);
++      rs6000_expand_float128_convert (tmp, src, unsigned_p);
++      rs6000_emit_move (dest, tmp, dest_mode);
++      return;
++    }
++
++  /* Convert to IEEE 128-bit floating point.  */
++  if (FLOAT128_IEEE_P (dest_mode))
++    {
++      if (dest_mode == KFmode)
++	kf_or_tf = 0;
++      else if (dest_mode == TFmode)
++	kf_or_tf = 1;
++      else
++	gcc_unreachable ();
++
++      switch (src_mode)
++	{
++	case DFmode:
++	  cvt = sext_optab;
++	  hw_convert = hw_conversions[kf_or_tf].from_df;
++	  break;
++
++	case SFmode:
++	  cvt = sext_optab;
++	  hw_convert = hw_conversions[kf_or_tf].from_sf;
++	  break;
++
++	case KFmode:
++	case IFmode:
++	case TFmode:
++	  if (FLOAT128_IBM_P (src_mode))
++	    cvt = sext_optab;
++	  else
++	    do_move = true;
++	  break;
++
++	case SImode:
++	  if (unsigned_p)
++	    {
++	      cvt = ufloat_optab;
++	      hw_convert = hw_conversions[kf_or_tf].from_si_uns;
++	    }
++	  else
++	    {
++	      cvt = sfloat_optab;
++	      hw_convert = hw_conversions[kf_or_tf].from_si_sign;
++	    }
++	  break;
++
++	case DImode:
++	  if (unsigned_p)
++	    {
++	      cvt = ufloat_optab;
++	      hw_convert = hw_conversions[kf_or_tf].from_di_uns;
++	    }
++	  else
++	    {
++	      cvt = sfloat_optab;
++	      hw_convert = hw_conversions[kf_or_tf].from_di_sign;
++	    }
++	  break;
++
++	default:
++	  gcc_unreachable ();
++	}
++    }
++
++  /* Convert from IEEE 128-bit floating point.  */
++  else if (FLOAT128_IEEE_P (src_mode))
++    {
++      if (src_mode == KFmode)
++	kf_or_tf = 0;
++      else if (src_mode == TFmode)
++	kf_or_tf = 1;
++      else
++	gcc_unreachable ();
++
++      switch (dest_mode)
++	{
++	case DFmode:
++	  cvt = trunc_optab;
++	  hw_convert = hw_conversions[kf_or_tf].to_df;
++	  break;
++
++	case SFmode:
++	  cvt = trunc_optab;
++	  hw_convert = hw_conversions[kf_or_tf].to_sf;
++	  break;
++
++	case KFmode:
++	case IFmode:
++	case TFmode:
++	  if (FLOAT128_IBM_P (dest_mode))
++	    cvt = trunc_optab;
++	  else
++	    do_move = true;
++	  break;
++
++	case SImode:
++	  if (unsigned_p)
++	    {
++	      cvt = ufix_optab;
++	      hw_convert = hw_conversions[kf_or_tf].to_si_uns;
++	    }
++	  else
++	    {
++	      cvt = sfix_optab;
++	      hw_convert = hw_conversions[kf_or_tf].to_si_sign;
++	    }
++	  break;
++
++	case DImode:
++	  if (unsigned_p)
++	    {
++	      cvt = ufix_optab;
++	      hw_convert = hw_conversions[kf_or_tf].to_di_uns;
++	    }
++	  else
++	    {
++	      cvt = sfix_optab;
++	      hw_convert = hw_conversions[kf_or_tf].to_di_sign;
++	    }
++	  break;
++
++	default:
++	  gcc_unreachable ();
++	}
++    }
++
++  /* Both IBM format.  */
++  else if (FLOAT128_IBM_P (dest_mode) && FLOAT128_IBM_P (src_mode))
++    do_move = true;
++
++  else
++    gcc_unreachable ();
++
++  /* Handle conversion between TFmode/KFmode.  */
++  if (do_move)
++    emit_move_insn (dest, gen_lowpart (dest_mode, src));
++
++  /* Handle conversion if we have hardware support.  */
++  else if (TARGET_FLOAT128_HW && hw_convert)
++    emit_insn ((hw_convert) (dest, src));
++
++  /* Call an external function to do the conversion.  */
++  else if (cvt != unknown_optab)
++    {
++      libfunc = convert_optab_libfunc (cvt, dest_mode, src_mode);
++      gcc_assert (libfunc != NULL_RTX);
++
++      dest2 = emit_library_call_value (libfunc, dest, LCT_CONST, dest_mode, 1, src,
++				       src_mode);
++
++      gcc_assert (dest2 != NULL_RTX);
++      if (!rtx_equal_p (dest, dest2))
++	emit_move_insn (dest, dest2);
++    }
++
++  else
++    gcc_unreachable ();
++
++  return;
++}
++
++/* Split a conversion from __float128 to an integer type into separate insns.
++   OPERANDS points to the destination, source, and V2DI temporary
++   register. CODE is either FIX or UNSIGNED_FIX.  */
++
++void
++convert_float128_to_int (rtx *operands, enum rtx_code code)
++{
++  rtx dest = operands[0];
++  rtx src = operands[1];
++  rtx tmp = operands[2];
++  rtx cvt;
++  rtvec cvt_vec;
++  rtx cvt_unspec;
++  rtvec move_vec;
++  rtx move_unspec;
++
++  if (GET_CODE (tmp) == SCRATCH)
++    tmp = gen_reg_rtx (V2DImode);
++
++  if (MEM_P (dest))
++    dest = rs6000_address_for_fpconvert (dest);
++
++  /* Generate the actual convert insn of the form:
++     (set (tmp) (unspec:V2DI [(fix:SI (reg:KF))] UNSPEC_IEEE128_CONVERT)).  */
++  cvt = gen_rtx_fmt_e (code, GET_MODE (dest), src);
++  cvt_vec = gen_rtvec (1, cvt);
++  cvt_unspec = gen_rtx_UNSPEC (V2DImode, cvt_vec, UNSPEC_IEEE128_CONVERT);
++  emit_insn (gen_rtx_SET (VOIDmode, tmp, cvt_unspec));
++
++  /* Generate the move insn of the form:
++     (set (dest:SI) (unspec:SI [(tmp:V2DI))] UNSPEC_IEEE128_MOVE)).  */
++  move_vec = gen_rtvec (1, tmp);
++  move_unspec = gen_rtx_UNSPEC (GET_MODE (dest), move_vec, UNSPEC_IEEE128_MOVE);
++  emit_insn (gen_rtx_SET (VOIDmode, dest, move_unspec));
++}
++
++/* Split a conversion from an integer type to __float128 into separate insns.
++   OPERANDS points to the destination, source, and V2DI temporary
++   register. CODE is either FLOAT or UNSIGNED_FLOAT.  */
++
++void
++convert_int_to_float128 (rtx *operands, enum rtx_code code)
++{
++  rtx dest = operands[0];
++  rtx src = operands[1];
++  rtx tmp = operands[2];
++  rtx cvt;
++  rtvec cvt_vec;
++  rtx cvt_unspec;
++  rtvec move_vec;
++  rtx move_unspec;
++  rtx unsigned_flag;
++
++  if (GET_CODE (tmp) == SCRATCH)
++    tmp = gen_reg_rtx (V2DImode);
++
++  if (MEM_P (src))
++    src = rs6000_address_for_fpconvert (src);
++
++  /* Generate the move of the integer into the Altivec register of the form:
++     (set (tmp:V2DI) (unspec:V2DI [(src:SI)
++				   (const_int 0)] UNSPEC_IEEE128_MOVE)).
++
++     or:
++     (set (tmp:V2DI) (unspec:V2DI [(src:DI)] UNSPEC_IEEE128_MOVE)).  */
++
++  if (GET_MODE (src) == SImode)
++    {
++      unsigned_flag = (code == UNSIGNED_FLOAT) ? const1_rtx : const0_rtx;
++      move_vec = gen_rtvec (2, src, unsigned_flag);
++    }
++  else
++    move_vec = gen_rtvec (1, src);
++
++  move_unspec = gen_rtx_UNSPEC (V2DImode, move_vec, UNSPEC_IEEE128_MOVE);
++  emit_insn (gen_rtx_SET (VOIDmode, tmp, move_unspec));
++
++  /* Generate the actual convert insn of the form:
++     (set (dest:KF) (float:KF (unspec:DI [(tmp:V2DI)]
++					 UNSPEC_IEEE128_CONVERT))).  */
++  cvt_vec = gen_rtvec (1, tmp);
++  cvt_unspec = gen_rtx_UNSPEC (DImode, cvt_vec, UNSPEC_IEEE128_CONVERT);
++  cvt = gen_rtx_fmt_e (code, GET_MODE (dest), cvt_unspec);
++  emit_insn (gen_rtx_SET (VOIDmode, dest, cvt));
++}
++
++
+ /* Emit the RTL for an sISEL pattern.  */
+ 
+ void
+@@ -21038,7 +22469,7 @@
+ 	((TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT) ? DFmode : SFmode);
+   else if (ALTIVEC_REGNO_P (reg))
+     reg_mode = V16QImode;
+-  else if (TARGET_E500_DOUBLE && mode == TFmode)
++  else if (TARGET_E500_DOUBLE && FLOAT128_2REG_P (mode))
+     reg_mode = DFmode;
+   else
+     reg_mode = word_mode;
+@@ -22075,31 +23506,6 @@
+   else
+     info_ptr->push_p = non_fixed_size > (TARGET_32BIT ? 220 : 288);
+ 
+-  /* Zero offsets if we're not saving those registers.  */
+-  if (info_ptr->fp_size == 0)
+-    info_ptr->fp_save_offset = 0;
+-
+-  if (info_ptr->gp_size == 0)
+-    info_ptr->gp_save_offset = 0;
+-
+-  if (! TARGET_ALTIVEC_ABI || info_ptr->altivec_size == 0)
+-    info_ptr->altivec_save_offset = 0;
+-
+-  /* Zero VRSAVE offset if not saved and restored.  */
+-  if (! TARGET_ALTIVEC_VRSAVE || info_ptr->vrsave_mask == 0)
+-    info_ptr->vrsave_save_offset = 0;
+-
+-  if (! TARGET_SPE_ABI
+-      || info_ptr->spe_64bit_regs_used == 0
+-      || info_ptr->spe_gp_size == 0)
+-    info_ptr->spe_gp_save_offset = 0;
+-
+-  if (! info_ptr->lr_save_p)
+-    info_ptr->lr_save_offset = 0;
+-
+-  if (! info_ptr->cr_save_p)
+-    info_ptr->cr_save_offset = 0;
+-
+   return info_ptr;
+ }
+ 
+@@ -22140,7 +23546,8 @@
+ 
+ 	      if (SPE_VECTOR_MODE (mode))
+ 		return true;
+-	      if (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode))
++	      if (TARGET_E500_DOUBLE
++		  && (mode == DFmode || FLOAT128_2REG_P (mode)))
+ 		return true;
+ 	    }
+ 	}
+@@ -22205,28 +23612,28 @@
+   if (info->calls_p)
+     fprintf (stderr, "\tcalls_p             = %5d\n", info->calls_p);
+ 
+-  if (info->gp_save_offset)
++  if (info->gp_size)
+     fprintf (stderr, "\tgp_save_offset      = %5d\n", info->gp_save_offset);
+ 
+-  if (info->fp_save_offset)
++  if (info->fp_size)
+     fprintf (stderr, "\tfp_save_offset      = %5d\n", info->fp_save_offset);
+ 
+-  if (info->altivec_save_offset)
++  if (info->altivec_size)
+     fprintf (stderr, "\taltivec_save_offset = %5d\n",
+ 	     info->altivec_save_offset);
+ 
+-  if (info->spe_gp_save_offset)
++  if (info->spe_gp_size == 0)
+     fprintf (stderr, "\tspe_gp_save_offset  = %5d\n",
+ 	     info->spe_gp_save_offset);
+ 
+-  if (info->vrsave_save_offset)
++  if (info->vrsave_size)
+     fprintf (stderr, "\tvrsave_save_offset  = %5d\n",
+ 	     info->vrsave_save_offset);
+ 
+-  if (info->lr_save_offset)
++  if (info->lr_save_p)
+     fprintf (stderr, "\tlr_save_offset      = %5d\n", info->lr_save_offset);
+ 
+-  if (info->cr_save_offset)
++  if (info->cr_save_p)
+     fprintf (stderr, "\tcr_save_offset      = %5d\n", info->cr_save_offset);
+ 
+   if (info->varargs_save_offset)
+@@ -22687,7 +24094,7 @@
+    If COPY_REG, make sure a copy of the old frame is left there.
+    The generated code may use hard register 0 as a temporary.  */
+ 
+-static void
++static rtx_insn *
+ rs6000_emit_allocate_stack (HOST_WIDE_INT size, rtx copy_reg, int copy_off)
+ {
+   rtx_insn *insn;
+@@ -22700,7 +24107,7 @@
+     {
+       warning (0, "stack frame too large");
+       emit_insn (gen_trap ());
+-      return;
++      return 0;
+     }
+ 
+   if (crtl->limit_stack)
+@@ -22751,9 +24158,9 @@
+   
+   insn = emit_insn (TARGET_32BIT
+ 		    ? gen_movsi_update_stack (stack_reg, stack_reg,
+-					todec, stack_reg)
++					      todec, stack_reg)
+ 		    : gen_movdi_di_update_stack (stack_reg, stack_reg,
+-					   todec, stack_reg));
++						 todec, stack_reg));
+   /* Since we didn't use gen_frame_mem to generate the MEM, grab
+      it now and set the alias set/attributes. The above gen_*_update
+      calls will generate a PARALLEL with the MEM set being the first
+@@ -22772,6 +24179,7 @@
+ 		gen_rtx_SET (VOIDmode, stack_reg,
+ 			     gen_rtx_PLUS (Pmode, stack_reg,
+ 					   GEN_INT (-size))));
++  return insn;
+ }
+ 
+ #define PROBE_INTERVAL (1 << STACK_CHECK_PROBE_INTERVAL_EXP)
+@@ -23518,6 +24926,48 @@
+                   || (DEFAULT_ABI == ABI_DARWIN && flag_pic))));
+ }
+ 
++/* Return whether the split-stack arg pointer (r12) is used.  */
++
++static bool
++split_stack_arg_pointer_used_p (void)
++{
++  /* If the pseudo holding the arg pointer is no longer a pseudo,
++     then the arg pointer is used.  */
++  if (cfun->machine->split_stack_arg_pointer != NULL_RTX
++      && (!REG_P (cfun->machine->split_stack_arg_pointer)
++	  || (REGNO (cfun->machine->split_stack_arg_pointer)
++	      < FIRST_PSEUDO_REGISTER)))
++    return true;
++
++  /* Unfortunately we also need to do some code scanning, since
++     r12 may have been substituted for the pseudo.  */
++  rtx_insn *insn;
++  basic_block bb = ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb;
++  FOR_BB_INSNS (bb, insn)
++    if (NONDEBUG_INSN_P (insn))
++      {
++	/* A call destroys r12.  */
++	if (CALL_P (insn))
++	  return false;
++
++	df_ref use;
++	FOR_EACH_INSN_USE (use, insn)
++	  {
++	    rtx x = DF_REF_REG (use);
++	    if (REG_P (x) && REGNO (x) == 12)
++	      return true;
++	  }
++	df_ref def;
++	FOR_EACH_INSN_DEF (def, insn)
++	  {
++	    rtx x = DF_REF_REG (def);
++	    if (REG_P (x) && REGNO (x) == 12)
++	      return false;
++	  }
++      }
++  return bitmap_bit_p (DF_LR_OUT (bb), 12);
++}
++
+ /* Emit function prologue as insns.  */
+ 
+ void
+@@ -23535,9 +24985,18 @@
+   int using_static_chain_p = (cfun->static_chain_decl != NULL_TREE
+ 			      && df_regs_ever_live_p (STATIC_CHAIN_REGNUM)
+ 			      && call_used_regs[STATIC_CHAIN_REGNUM]);
++  int using_split_stack = (flag_split_stack
++                           && (lookup_attribute ("no_split_stack",
++                                                 DECL_ATTRIBUTES (cfun->decl))
++                               == NULL));
++ 
+   /* Offset to top of frame for frame_reg and sp respectively.  */
+   HOST_WIDE_INT frame_off = 0;
+   HOST_WIDE_INT sp_off = 0;
++  /* sp_adjust is the stack adjusting instruction, tracked so that the
++     insn setting up the split-stack arg pointer can be emitted just
++     prior to it, when r12 is not used here for other purposes.  */
++  rtx_insn *sp_adjust = 0;
+ 
+ #ifdef ENABLE_CHECKING
+   /* Track and check usage of r0, r11, r12.  */
+@@ -23572,7 +25031,6 @@
+ 	cfun->machine->r2_setup_needed = true;
+     }
+ 
+-
+   if (flag_stack_usage_info)
+     current_function_static_stack_size = info->total_size;
+ 
+@@ -23729,7 +25187,7 @@
+ 	       || info->first_fp_reg_save < 64
+ 	       || info->first_gp_reg_save < 32
+ 	       || info->altivec_size != 0
+-	       || info->vrsave_mask != 0
++	       || info->vrsave_size != 0
+ 	       || crtl->calls_eh_return)
+ 	ptr_regno = 12;
+       else
+@@ -23756,7 +25214,10 @@
+ 	    ptr_off = info->altivec_save_offset + info->altivec_size;
+ 	  frame_off = -ptr_off;
+ 	}
+-      rs6000_emit_allocate_stack (info->total_size, ptr_reg, ptr_off);
++      sp_adjust = rs6000_emit_allocate_stack (info->total_size,
++					      ptr_reg, ptr_off);
++      if (REGNO (frame_reg_rtx) == 12)
++	sp_adjust = 0;
+       sp_off = info->total_size;
+       if (frame_reg_rtx != sp_reg_rtx)
+ 	rs6000_emit_stack_tie (frame_reg_rtx, false);
+@@ -23797,7 +25258,8 @@
+   if (!WORLD_SAVE_P (info)
+       && info->cr_save_p
+       && REGNO (frame_reg_rtx) != cr_save_regno
+-      && !(using_static_chain_p && cr_save_regno == 11))
++      && !(using_static_chain_p && cr_save_regno == 11)
++      && !(using_split_stack && cr_save_regno == 12 && sp_adjust))
+     {
+       cr_save_rtx = gen_rtx_REG (SImode, cr_save_regno);
+       START_USE (cr_save_regno);
+@@ -23943,6 +25405,8 @@
+       int end_save = info->gp_save_offset + info->gp_size;
+       int ptr_off;
+ 
++      if (ptr_regno == 12)
++	sp_adjust = 0;
+       if (!ptr_set_up)
+ 	ptr_reg = gen_rtx_REG (Pmode, ptr_regno);
+ 
+@@ -24263,7 +25727,10 @@
+ 	}
+       else if (REGNO (frame_reg_rtx) == 1)
+ 	frame_off = info->total_size;
+-      rs6000_emit_allocate_stack (info->total_size, ptr_reg, ptr_off);
++      sp_adjust = rs6000_emit_allocate_stack (info->total_size,
++					      ptr_reg, ptr_off);
++      if (REGNO (frame_reg_rtx) == 12)
++	sp_adjust = 0;
+       sp_off = info->total_size;
+       if (frame_reg_rtx != sp_reg_rtx)
+ 	rs6000_emit_stack_tie (frame_reg_rtx, false);
+@@ -24279,7 +25746,7 @@
+ 
+   /* Save AltiVec registers if needed.  Save here because the red zone does
+      not always include AltiVec registers.  */
+-  if (!WORLD_SAVE_P (info) && TARGET_ALTIVEC_ABI
++  if (!WORLD_SAVE_P (info)
+       && info->altivec_size != 0 && (strategy & SAVE_INLINE_VRS) == 0)
+     {
+       int end_save = info->altivec_save_offset + info->altivec_size;
+@@ -24293,6 +25760,8 @@
+ 
+       gcc_checking_assert (scratch_regno == 11 || scratch_regno == 12);
+       NOT_INUSE (0);
++      if (scratch_regno == 12)
++	sp_adjust = 0;
+       if (end_save + frame_off != 0)
+ 	{
+ 	  rtx offset = GEN_INT (end_save + frame_off);
+@@ -24315,7 +25784,7 @@
+ 	  frame_off = ptr_off;
+ 	}
+     }
+-  else if (!WORLD_SAVE_P (info) && TARGET_ALTIVEC_ABI
++  else if (!WORLD_SAVE_P (info)
+ 	   && info->altivec_size != 0)
+     {
+       int i;
+@@ -24357,9 +25826,7 @@
+      epilogue.  */
+ 
+   if (!WORLD_SAVE_P (info)
+-      && TARGET_ALTIVEC
+-      && TARGET_ALTIVEC_VRSAVE
+-      && info->vrsave_mask != 0)
++      && info->vrsave_size != 0)
+     {
+       rtx reg, vrsave;
+       int offset;
+@@ -24372,7 +25839,7 @@
+       if ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)
+ 	  && !using_static_chain_p)
+ 	save_regno = 11;
+-      else if (REGNO (frame_reg_rtx) == 12)
++      else if (using_split_stack || REGNO (frame_reg_rtx) == 12)
+ 	{
+ 	  save_regno = 11;
+ 	  if (using_static_chain_p)
+@@ -24418,6 +25885,7 @@
+ 	  rtx lr = gen_rtx_REG (Pmode, LR_REGNO);
+ 	  rtx tmp = gen_rtx_REG (Pmode, 12);
+ 
++	  sp_adjust = 0;
+ 	  insn = emit_move_insn (tmp, lr);
+ 	  RTX_FRAME_RELATED_P (insn) = 1;
+ 
+@@ -24473,6 +25941,47 @@
+       rtx reg = gen_rtx_REG (reg_mode, TOC_REGNUM);
+       emit_insn (gen_frame_store (reg, sp_reg_rtx, RS6000_TOC_SAVE_SLOT));
+     }
++
++  if (using_split_stack && split_stack_arg_pointer_used_p ())
++    {
++      /* Set up the arg pointer (r12) for -fsplit-stack code.  If
++	 __morestack was called, it left the arg pointer to the old
++	 stack in r29.  Otherwise, the arg pointer is the top of the
++	 current frame.  */
++      cfun->machine->split_stack_argp_used = true;
++      if (sp_adjust)
++	{
++	  rtx r12 = gen_rtx_REG (Pmode, 12);
++	  rtx set_r12 = gen_rtx_SET (VOIDmode, r12, sp_reg_rtx);
++	  emit_insn_before (set_r12, sp_adjust);
++	}
++      else if (frame_off != 0 || REGNO (frame_reg_rtx) != 12)
++	{
++	  rtx r12 = gen_rtx_REG (Pmode, 12);
++	  if (frame_off == 0)
++	    emit_move_insn (r12, frame_reg_rtx);
++	  else
++	    emit_insn (gen_add3_insn (r12, frame_reg_rtx, GEN_INT (frame_off)));
++	}
++      if (info->push_p)
++	{
++	  rtx r12 = gen_rtx_REG (Pmode, 12);
++	  rtx r29 = gen_rtx_REG (Pmode, 29);
++	  rtx cr7 = gen_rtx_REG (CCUNSmode, CR7_REGNO);
++	  rtx not_more = gen_label_rtx ();
++	  rtx jump;
++
++	  jump = gen_rtx_IF_THEN_ELSE (VOIDmode,
++				       gen_rtx_GEU (VOIDmode, cr7, const0_rtx),
++				       gen_rtx_LABEL_REF (VOIDmode, not_more),
++				       pc_rtx);
++	  jump = emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, jump));
++	  JUMP_LABEL (jump) = not_more;
++	  LABEL_NUSES (not_more) += 1;
++	  emit_move_insn (r12, r29);
++	  emit_label (not_more);
++	}
++    }
+ }
+ 
+ /* Output .extern statements for the save/restore routines we use.  */
+@@ -24806,7 +26315,9 @@
+      here will not trigger at the moment;  We don't actually need a
+      frame pointer for alloca, but the generic parts of the compiler
+      give us one anyway.  */
+-  use_backchain_to_restore_sp = (info->total_size > 32767 - info->lr_save_offset
++  use_backchain_to_restore_sp = (info->total_size + (info->lr_save_p
++						     ? info->lr_save_offset
++						     : 0) > 32767
+ 				 || (cfun->calls_alloca
+ 				     && !frame_pointer_needed));
+   restore_lr = (info->lr_save_p
+@@ -24920,8 +26431,7 @@
+ 
+   /* Restore AltiVec registers if we must do so before adjusting the
+      stack.  */
+-  if (TARGET_ALTIVEC_ABI
+-      && info->altivec_size != 0
++  if (info->altivec_size != 0
+       && (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ 	  || (DEFAULT_ABI != ABI_V4
+ 	      && offset_below_red_zone_p (info->altivec_save_offset))))
+@@ -25008,9 +26518,7 @@
+     }
+ 
+   /* Restore VRSAVE if we must do so before adjusting the stack.  */
+-  if (TARGET_ALTIVEC
+-      && TARGET_ALTIVEC_VRSAVE
+-      && info->vrsave_mask != 0
++  if (info->vrsave_size != 0
+       && (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ 	  || (DEFAULT_ABI != ABI_V4
+ 	      && offset_below_red_zone_p (info->vrsave_save_offset))))
+@@ -25104,7 +26612,6 @@
+ 
+   /* Restore AltiVec registers if we have not done so already.  */
+   if (!ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+-      && TARGET_ALTIVEC_ABI
+       && info->altivec_size != 0
+       && (DEFAULT_ABI == ABI_V4
+ 	  || !offset_below_red_zone_p (info->altivec_save_offset)))
+@@ -25212,9 +26719,7 @@
+ 
+   /* Restore VRSAVE if we have not done so already.  */
+   if (!ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+-      && TARGET_ALTIVEC
+-      && TARGET_ALTIVEC_VRSAVE
+-      && info->vrsave_mask != 0
++      && info->vrsave_size != 0
+       && (DEFAULT_ABI == ABI_V4
+ 	  || !offset_below_red_zone_p (info->vrsave_save_offset)))
+     {
+@@ -25819,6 +27324,8 @@
+ 			case DDmode:
+ 			case TFmode:
+ 			case TDmode:
++			case IFmode:
++			case KFmode:
+ 			  bits = 0x3;
+ 			  break;
+ 
+@@ -25905,6 +27412,190 @@
+       fputs ("\t.align 2\n", file);
+     }
+ }
++
++/* -fsplit-stack support.  */
++
++/* A SYMBOL_REF for __morestack.  */
++static GTY(()) rtx morestack_ref;
++
++static rtx
++gen_add3_const (rtx rt, rtx ra, long c)
++{
++  if (TARGET_64BIT)
++    return gen_adddi3 (rt, ra, GEN_INT (c));
++ else
++    return gen_addsi3 (rt, ra, GEN_INT (c));
++}
++
++/* Emit -fsplit-stack prologue, which goes before the regular function
++   prologue (at local entry point in the case of ELFv2).  */
++
++void
++rs6000_expand_split_stack_prologue (void)
++{
++  rs6000_stack_t *info = rs6000_stack_info ();
++  unsigned HOST_WIDE_INT allocate;
++  long alloc_hi, alloc_lo;
++  rtx r0, r1, r12, lr, ok_label, compare, jump, call_fusage;
++  rtx_insn *insn;
++
++  gcc_assert (flag_split_stack && reload_completed);
++
++  if (!info->push_p)
++    return;
++
++  if (global_regs[29])
++    {
++      error ("-fsplit-stack uses register r29");
++      inform (DECL_SOURCE_LOCATION (global_regs_decl[29]),
++	      "conflicts with %qD", global_regs_decl[29]);
++    }
++
++  allocate = info->total_size;
++  if (allocate > (unsigned HOST_WIDE_INT) 1 << 31)
++    {
++      sorry ("Stack frame larger than 2G is not supported for -fsplit-stack");
++      return;
++    }
++  if (morestack_ref == NULL_RTX)
++    {
++      morestack_ref = gen_rtx_SYMBOL_REF (Pmode, "__morestack");
++      SYMBOL_REF_FLAGS (morestack_ref) |= (SYMBOL_FLAG_LOCAL
++					   | SYMBOL_FLAG_FUNCTION);
++    }
++
++  r0 = gen_rtx_REG (Pmode, 0);
++  r1 = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
++  r12 = gen_rtx_REG (Pmode, 12);
++  emit_insn (gen_load_split_stack_limit (r0));
++  /* Always emit two insns here to calculate the requested stack,
++     so that the linker can edit them when adjusting size for calling
++     non-split-stack code.  */
++  alloc_hi = (-allocate + 0x8000) & ~0xffffL;
++  alloc_lo = -allocate - alloc_hi;
++  if (alloc_hi != 0)
++    {
++      emit_insn (gen_add3_const (r12, r1, alloc_hi));
++      if (alloc_lo != 0)
++	emit_insn (gen_add3_const (r12, r12, alloc_lo));
++      else
++	emit_insn (gen_nop ());
++    }
++  else
++    {
++      emit_insn (gen_add3_const (r12, r1, alloc_lo));
++      emit_insn (gen_nop ());
++    }
++
++  compare = gen_rtx_REG (CCUNSmode, CR7_REGNO);
++  emit_insn (gen_rtx_SET (VOIDmode, compare,
++			  gen_rtx_COMPARE (CCUNSmode, r12, r0)));
++  ok_label = gen_label_rtx ();
++  jump = gen_rtx_IF_THEN_ELSE (VOIDmode,
++			       gen_rtx_GEU (VOIDmode, compare, const0_rtx),
++			       gen_rtx_LABEL_REF (VOIDmode, ok_label),
++			       pc_rtx);
++  jump = emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, jump));
++  JUMP_LABEL (jump) = ok_label;
++  /* Mark the jump as very likely to be taken.  */
++  add_int_reg_note (jump, REG_BR_PROB,
++		    REG_BR_PROB_BASE - REG_BR_PROB_BASE / 100);
++
++  lr = gen_rtx_REG (Pmode, LR_REGNO);
++  insn = emit_move_insn (r0, lr);
++  RTX_FRAME_RELATED_P (insn) = 1;
++  insn = emit_insn (gen_frame_store (r0, r1, info->lr_save_offset));
++  RTX_FRAME_RELATED_P (insn) = 1;
++
++  insn = emit_call_insn (gen_call (gen_rtx_MEM (SImode, morestack_ref),
++				   const0_rtx, const0_rtx));
++  call_fusage = NULL_RTX;
++  use_reg (&call_fusage, r12);
++  add_function_usage_to (insn, call_fusage);
++  emit_insn (gen_frame_load (r0, r1, info->lr_save_offset));
++  insn = emit_move_insn (lr, r0);
++  add_reg_note (insn, REG_CFA_RESTORE, lr);
++  RTX_FRAME_RELATED_P (insn) = 1;
++  emit_insn (gen_split_stack_return ());
++
++  emit_label (ok_label);
++  LABEL_NUSES (ok_label) = 1;
++}
++
++/* Return the internal arg pointer used for function incoming
++   arguments.  When -fsplit-stack, the arg pointer is r12 so we need
++   to copy it to a pseudo in order for it to be preserved over calls
++   and suchlike.  We'd really like to use a pseudo here for the
++   internal arg pointer but data-flow analysis is not prepared to
++   accept pseudos as live at the beginning of a function.  */
++
++static rtx
++rs6000_internal_arg_pointer (void)
++{
++  if (flag_split_stack
++     && (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (cfun->decl))
++         == NULL))
++    {
++      if (cfun->machine->split_stack_arg_pointer == NULL_RTX)
++	{
++	  rtx pat;
++
++	  cfun->machine->split_stack_arg_pointer = gen_reg_rtx (Pmode);
++	  REG_POINTER (cfun->machine->split_stack_arg_pointer) = 1;
++
++	  /* Put the pseudo initialization right after the note at the
++	     beginning of the function.  */
++	  pat = gen_rtx_SET (VOIDmode,
++			     cfun->machine->split_stack_arg_pointer,
++			     gen_rtx_REG (Pmode, 12));
++	  push_topmost_sequence ();
++	  emit_insn_after (pat, get_insns ());
++	  pop_topmost_sequence ();
++	}
++      return plus_constant (Pmode, cfun->machine->split_stack_arg_pointer,
++			    FIRST_PARM_OFFSET (current_function_decl));
++    }
++  return virtual_incoming_args_rtx;
++}
++
++/* We may have to tell the dataflow pass that the split stack prologue
++   is initializing a register.  */
++
++static void
++rs6000_live_on_entry (bitmap regs)
++{
++  if (flag_split_stack)
++    bitmap_set_bit (regs, 12);
++}
++
++/* Emit -fsplit-stack dynamic stack allocation space check.  */
++
++void
++rs6000_split_stack_space_check (rtx size, rtx label)
++{
++  rtx sp = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
++  rtx limit = gen_reg_rtx (Pmode);
++  rtx requested = gen_reg_rtx (Pmode);
++  rtx cmp = gen_reg_rtx (CCUNSmode);
++  rtx jump;
++
++  emit_insn (gen_load_split_stack_limit (limit));
++  if (CONST_INT_P (size))
++    emit_insn (gen_add3_insn (requested, sp, GEN_INT (-INTVAL (size))));
++  else
++    {
++      size = force_reg (Pmode, size);
++      emit_move_insn (requested, gen_rtx_MINUS (Pmode, sp, size));
++    }
++  emit_insn (gen_rtx_SET (VOIDmode, cmp,
++			  gen_rtx_COMPARE (CCUNSmode, requested, limit)));
++  jump = gen_rtx_IF_THEN_ELSE (VOIDmode,
++			       gen_rtx_GEU (VOIDmode, cmp, const0_rtx),
++			       gen_rtx_LABEL_REF (VOIDmode, label),
++			       pc_rtx);
++  jump = emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, jump));
++  JUMP_LABEL (jump) = label;
++}
+ 
+ /* A C compound statement that outputs the assembler code for a thunk
+    function, used to implement C++ virtual function calls with
+@@ -26313,7 +28004,8 @@
+      TOC, things we put here aren't actually in the TOC, so we can allow
+      FP constants.  */
+   if (GET_CODE (x) == CONST_DOUBLE &&
+-      (GET_MODE (x) == TFmode || GET_MODE (x) == TDmode))
++      (GET_MODE (x) == TFmode || GET_MODE (x) == TDmode
++       || GET_MODE (x) == IFmode || GET_MODE (x) == KFmode))
+     {
+       REAL_VALUE_TYPE rv;
+       long k[4];
+@@ -26983,6 +28675,7 @@
+                  || rs6000_cpu_attr == CPU_POWER5
+ 		 || rs6000_cpu_attr == CPU_POWER7
+ 		 || rs6000_cpu_attr == CPU_POWER8
++		 || rs6000_cpu_attr == CPU_POWER9
+                  || rs6000_cpu_attr == CPU_CELL)
+                 && recog_memoized (dep_insn)
+                 && (INSN_CODE (dep_insn) >= 0))
+@@ -27555,6 +29248,7 @@
+   case CPU_POWER7:
+     return 5;
+   case CPU_POWER8:
++  case CPU_POWER9:
+     return 7;
+   default:
+     return 1;
+@@ -28188,6 +29882,7 @@
+         }
+       break;
+     case PROCESSOR_POWER8:
++    case PROCESSOR_POWER9:
+       type = get_attr_type (insn);
+ 
+       switch (type)
+@@ -28318,6 +30013,7 @@
+     }
+     break;
+   case PROCESSOR_POWER8:
++  case PROCESSOR_POWER9:
+     type = get_attr_type (insn);
+ 
+     switch (type)
+@@ -28436,7 +30132,7 @@
+ 
+       /* Do we have a special group ending nop? */
+       if (rs6000_cpu_attr == CPU_POWER6 || rs6000_cpu_attr == CPU_POWER7
+-	  || rs6000_cpu_attr == CPU_POWER8)
++	  || rs6000_cpu_attr == CPU_POWER8 || rs6000_cpu_attr == CPU_POWER9)
+ 	{
+ 	  nop = gen_group_ending_nop ();
+ 	  emit_insn_before (nop, next_insn);
+@@ -29036,6 +30732,21 @@
+   if (type == bool_int_type_node) return "U6__booli";
+   if (type == bool_long_type_node) return "U6__booll";
+ 
++  /* Use a unique name for __float128 rather than trying to use "e" or "g". Use
++     "g" for IBM extended double, no matter whether it is long double (using
++     -mabi=ibmlongdouble) or the distinct __ibm128 type.  */
++  if (TARGET_FLOAT128)
++    {
++      if (type == ieee128_float_type_node)
++	return "U10__float128";
++
++      if (type == ibm128_float_type_node)
++	return "g";
++
++      if (type == long_double_type_node && TARGET_LONG_DOUBLE_128)
++	return (TARGET_IEEEQUAD) ? "U10__float128" : "g";
++    }
++
+   /* Mangle IBM extended float long double as `g' (__float128) on
+      powerpc*-linux where long-double-64 previously was the default.  */
+   if (TYPE_MAIN_VARIANT (type) == long_double_type_node
+@@ -29913,6 +31624,20 @@
+   if (TARGET_32BIT || DEFAULT_ABI == ABI_ELFv2)
+     file_end_indicate_exec_stack ();
+ #endif
++
++  if (flag_split_stack)
++    file_end_indicate_split_stack ();
++
++  if (cpu_builtin_p)
++    {
++      /* We have expanded a CPU builtin, so we need to emit a reference to
++	 the special symbol that LIBC uses to declare it supports the
++	 AT_PLATFORM and AT_HWCAP/AT_HWCAP2 in the TCB feature.  */
++      switch_to_section (data_section);
++      fprintf (asm_out_file, "\t.align %u\n", TARGET_32BIT ? 2 : 3);
++      fprintf (asm_out_file, "\t%s %s\n",
++	       TARGET_32BIT ? ".long" : ".quad", tcb_verification_symbol);
++    }
+ }
+ #endif
+ 
+@@ -30577,12 +32302,15 @@
+ 	  else
+ 	    *total = rs6000_cost->divsi;
+ 	}
+-      /* Add in shift and subtract for MOD. */
+-      if (code == MOD || code == UMOD)
++      /* Add in shift and subtract for MOD unless we have a mod instruction. */
++      if (!TARGET_MODULO && (code == MOD || code == UMOD))
+ 	*total += COSTS_N_INSNS (2);
+       return false;
+ 
+     case CTZ:
++      *total = COSTS_N_INSNS (TARGET_CTZ ? 1 : 4);
++      return false;
++
+     case FFS:
+       *total = COSTS_N_INSNS (4);
+       return false;
+@@ -30612,6 +32340,17 @@
+       return false;
+ 
+     case ASHIFT:
++      /* The EXTSWSLI instruction is a combined instruction.  Don't count both
++	 the sign extend and shift separately within the insn.  */
++      if (TARGET_EXTSWSLI && mode == DImode
++	  && GET_CODE (XEXP (x, 0)) == SIGN_EXTEND
++	  && GET_MODE (XEXP (XEXP (x, 0), 0)) == SImode)
++	{
++	  *total = 0;
++	  return false;
++	}
++      /* fall through */
++	  
+     case ASHIFTRT:
+     case LSHIFTRT:
+     case ROTATE:
+@@ -30821,7 +32560,8 @@
+          expensive than memory in order to bias spills to memory .*/
+       else if ((rs6000_cpu == PROCESSOR_POWER6
+ 		|| rs6000_cpu == PROCESSOR_POWER7
+-		|| rs6000_cpu == PROCESSOR_POWER8)
++		|| rs6000_cpu == PROCESSOR_POWER8
++		|| rs6000_cpu == PROCESSOR_POWER9)
+ 	       && reg_classes_intersect_p (rclass, LINK_OR_CTR_REGS))
+         ret = 6 * hard_regno_nregs[0][mode];
+ 
+@@ -30838,7 +32578,7 @@
+ 
+   /* Moving between two similar registers is just one instruction.  */
+   else if (reg_classes_intersect_p (to, from))
+-    ret = (mode == TFmode || mode == TDmode) ? 4 : 2;
++    ret = (FLOAT128_2REG_P (mode)) ? 4 : 2;
+ 
+   /* Everything else has to go through GENERAL_REGS.  */
+   else
+@@ -31907,7 +33647,7 @@
+     {
+       int first_reg, n_regs;
+ 
+-      if (SCALAR_FLOAT_MODE_P (elt_mode))
++      if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (elt_mode))
+ 	{
+ 	  /* _Decimal128 must use even/odd register pairs.  */
+ 	  first_reg = (elt_mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;
+@@ -31944,7 +33684,7 @@
+   if (DECIMAL_FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
+     /* _Decimal128 must use an even/odd register pair.  */
+     regno = (mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;
+-  else if (SCALAR_FLOAT_TYPE_P (valtype) && TARGET_HARD_FLOAT && TARGET_FPRS
++  else if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS
+ 	   && ((TARGET_SINGLE_FLOAT && (mode == SFmode)) || TARGET_DOUBLE_FLOAT))
+     regno = FP_ARG_RETURN;
+   else if (TREE_CODE (valtype) == COMPLEX_TYPE
+@@ -31953,13 +33693,13 @@
+   /* VSX is a superset of Altivec and adds V2DImode/V2DFmode.  Since the same
+      return register is used in both cases, and we won't see V2DImode/V2DFmode
+      for pure altivec, combine the two cases.  */
+-  else if (TREE_CODE (valtype) == VECTOR_TYPE
++  else if ((TREE_CODE (valtype) == VECTOR_TYPE || FLOAT128_VECTOR_P (mode))
+ 	   && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI
+ 	   && ALTIVEC_OR_VSX_VECTOR_MODE (mode))
+     regno = ALTIVEC_ARG_RETURN;
+   else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
+ 	   && (mode == DFmode || mode == DCmode
+-	       || mode == TFmode || mode == TCmode))
++	       || FLOAT128_IBM_P (mode) || mode == TCmode))
+     return spe_build_register_parallel (mode, GP_ARG_RETURN);
+   else
+     regno = GP_ARG_RETURN;
+@@ -31981,7 +33721,7 @@
+   if (DECIMAL_FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
+     /* _Decimal128 must use an even/odd register pair.  */
+     regno = (mode == TDmode) ? FP_ARG_RETURN + 1 : FP_ARG_RETURN;
+-  else if (SCALAR_FLOAT_MODE_P (mode)
++  else if (SCALAR_FLOAT_MODE_NOT_VECTOR_P (mode)
+ 	   && TARGET_HARD_FLOAT && TARGET_FPRS
+            && ((TARGET_SINGLE_FLOAT && mode == SFmode) || TARGET_DOUBLE_FLOAT))
+     regno = FP_ARG_RETURN;
+@@ -31995,7 +33735,7 @@
+     return rs6000_complex_function_value (mode);
+   else if (TARGET_E500_DOUBLE && TARGET_HARD_FLOAT
+ 	   && (mode == DFmode || mode == DCmode
+-	       || mode == TFmode || mode == TCmode))
++	       || FLOAT128_IBM_P (mode) || mode == TCmode))
+     return spe_build_register_parallel (mode, GP_ARG_RETURN);
+   else
+     regno = GP_ARG_RETURN;
+@@ -32221,6 +33961,8 @@
+ 
+   if (DECIMAL_FLOAT_MODE_P (mode))
+     return default_decimal_float_supported_p ();
++  else if (TARGET_FLOAT128 && (mode == KFmode || mode == IFmode))
++    return true;
+   else
+     return default_scalar_mode_supported_p (mode);
+ }
+@@ -32236,7 +33978,10 @@
+   if (TARGET_SPE && SPE_VECTOR_MODE (mode))
+     return true;
+ 
+-  else if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode))
++  /* There is no vector form for IEEE 128-bit.  If we return true for IEEE
++     128-bit, the compiler might try to widen IEEE 128-bit to IBM
++     double-double.  */
++  else if (VECTOR_MEM_ALTIVEC_OR_VSX_P (mode) && !FLOAT128_IEEE_P (mode))
+     return true;
+ 
+   else
+@@ -32243,6 +33988,26 @@
+     return false;
+ }
+ 
++/* Target hook for c_mode_for_suffix.  */
++static machine_mode
++rs6000_c_mode_for_suffix (char suffix)
++{
++  if (TARGET_FLOAT128)
++    {
++      if (suffix == 'q' || suffix == 'Q')
++	return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
++
++      /* At the moment, we are not defining a suffix for IBM extended double.
++	 If/when the default for -mabi=ieeelongdouble is changed, and we want
++	 to support __ibm128 constants in legacy library code, we may need to
++	 re-evalaute this decision.  Currently, c-lex.c only supports 'w' and
++	 'q' as machine dependent suffixes.  The x86_64 port uses 'w' for
++	 __float80 constants.  */
++    }
++
++  return VOIDmode;
++}
++
+ /* Target hook for invalid_arg_for_unprototyped_fn. */
+ static const char *
+ invalid_arg_for_unprototyped_fn (const_tree typelist, const_tree funcdecl, const_tree val)
+@@ -32328,6 +34093,8 @@
+   { "dlmzb",			OPTION_MASK_DLMZB,		false, true  },
+   { "efficient-unaligned-vsx",	OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
+ 								false, true  },
++  { "float128",			OPTION_MASK_FLOAT128,		false, false },
++  { "float128-hardware",	OPTION_MASK_FLOAT128_HW,	false, false },
+   { "fprnd",			OPTION_MASK_FPRND,		false, true  },
+   { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
+   { "htm",			OPTION_MASK_HTM,		false, true  },
+@@ -32334,6 +34101,7 @@
+   { "isel",			OPTION_MASK_ISEL,		false, true  },
+   { "mfcrf",			OPTION_MASK_MFCRF,		false, true  },
+   { "mfpgpr",			OPTION_MASK_MFPGPR,		false, true  },
++  { "modulo",			OPTION_MASK_MODULO,		false, true  },
+   { "mulhw",			OPTION_MASK_MULHW,		false, true  },
+   { "multiple",			OPTION_MASK_MULTIPLE,		false, true  },
+   { "popcntb",			OPTION_MASK_POPCNTB,		false, true  },
+@@ -32341,6 +34109,10 @@
+   { "power8-fusion",		OPTION_MASK_P8_FUSION,		false, true  },
+   { "power8-fusion-sign",	OPTION_MASK_P8_FUSION_SIGN,	false, true  },
+   { "power8-vector",		OPTION_MASK_P8_VECTOR,		false, true  },
++  { "power9-dform",		OPTION_MASK_P9_DFORM,		false, true  },
++  { "power9-fusion",		OPTION_MASK_P9_FUSION,		false, true  },
++  { "power9-minmax",		OPTION_MASK_P9_MINMAX,		false, true  },
++  { "power9-vector",		OPTION_MASK_P9_VECTOR,		false, true  },
+   { "powerpc-gfxopt",		OPTION_MASK_PPC_GFXOPT,		false, true  },
+   { "powerpc-gpopt",		OPTION_MASK_PPC_GPOPT,		false, true  },
+   { "quad-memory",		OPTION_MASK_QUAD_MEMORY,	false, true  },
+@@ -32348,6 +34120,7 @@
+   { "recip-precision",		OPTION_MASK_RECIP_PRECISION,	false, true  },
+   { "save-toc-indirect",	OPTION_MASK_SAVE_TOC_INDIRECT,	false, true  },
+   { "string",			OPTION_MASK_STRING,		false, true  },
++  { "toc-fusion",		OPTION_MASK_TOC_FUSION,		false, true  },
+   { "update",			OPTION_MASK_NO_UPDATE,		true , true  },
+   { "upper-regs-df",		OPTION_MASK_UPPER_REGS_DF,	false, true  },
+   { "upper-regs-sf",		OPTION_MASK_UPPER_REGS_SF,	false, true  },
+@@ -32406,7 +34179,7 @@
+ struct rs6000_opt_var {
+   const char *name;		/* option name */
+   size_t global_offset;		/* offset of the option in global_options.  */
+-  size_t target_offset;		/* offset of the option in target optiosn.  */
++  size_t target_offset;		/* offset of the option in target options.  */
+ };
+ 
+ static struct rs6000_opt_var const rs6000_opt_vars[] =
+@@ -33458,6 +35231,8 @@
+       && TARGET_MINIMAL_TOC
+       && get_pool_size () != 0)
+     add_to_hard_reg_set (&set->set, Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM);
++  if (cfun->machine->split_stack_argp_used)
++    add_to_hard_reg_set (&set->set, Pmode, 12);
+ }
+ 
+ 
+@@ -33849,72 +35624,21 @@
+   return;
+ }
+ 
+-/* Return a string to fuse an addis instruction with a gpr load to the same
+-   register that we loaded up the addis instruction.  The address that is used
+-   is the logical address that was formed during peephole2:
+-	(lo_sum (high) (low-part))
++/* Emit the addis instruction that will be part of a fused instruction
++   sequence.  */
+ 
+-   The code is complicated, so we call output_asm_insn directly, and just
+-   return "".  */
+-
+-const char *
+-emit_fusion_gpr_load (rtx target, rtx mem)
++void
++emit_fusion_addis (rtx target, rtx addis_value, const char *comment,
++		   const char *mode_name)
+ {
+-  rtx addis_value;
+   rtx fuse_ops[10];
+-  rtx addr;
+-  rtx load_offset;
++  char insn_template[80];
+   const char *addis_str = NULL;
+-  const char *load_str = NULL;
+-  const char *mode_name = NULL;
+-  char insn_template[80];
+-  machine_mode mode;
+   const char *comment_str = ASM_COMMENT_START;
+ 
+-  if (GET_CODE (mem) == ZERO_EXTEND)
+-    mem = XEXP (mem, 0);
+-
+-  gcc_assert (REG_P (target) && MEM_P (mem));
+-
+   if (*comment_str == ' ')
+     comment_str++;
+ 
+-  addr = XEXP (mem, 0);
+-  if (GET_CODE (addr) != PLUS && GET_CODE (addr) != LO_SUM)
+-    gcc_unreachable ();
+-
+-  addis_value = XEXP (addr, 0);
+-  load_offset = XEXP (addr, 1);
+-
+-  /* Now emit the load instruction to the same register.  */
+-  mode = GET_MODE (mem);
+-  switch (mode)
+-    {
+-    case QImode:
+-      mode_name = "char";
+-      load_str = "lbz";
+-      break;
+-
+-    case HImode:
+-      mode_name = "short";
+-      load_str = "lhz";
+-      break;
+-
+-    case SImode:
+-      mode_name = "int";
+-      load_str = "lwz";
+-      break;
+-
+-    case DImode:
+-      gcc_assert (TARGET_POWERPC64);
+-      mode_name = "long";
+-      load_str = "ld";
+-      break;
+-
+-    default:
+-      gcc_unreachable ();
+-    }
+-
+   /* Emit the addis instruction.  */
+   fuse_ops[0] = target;
+   if (satisfies_constraint_L (addis_value))
+@@ -33993,68 +35717,531 @@
+   if (!addis_str)
+     fatal_insn ("Could not generate addis value for fusion", addis_value);
+ 
+-  sprintf (insn_template, "%s\t\t%s gpr load fusion, type %s", addis_str,
+-	   comment_str, mode_name);
++  sprintf (insn_template, "%s\t\t%s %s, type %s", addis_str, comment_str,
++	   comment, mode_name);
+   output_asm_insn (insn_template, fuse_ops);
++}
+ 
+-  /* Emit the D-form load instruction.  */
+-  if (CONST_INT_P (load_offset) && satisfies_constraint_I (load_offset))
++/* Emit a D-form load or store instruction that is the second instruction
++   of a fusion sequence.  */
++
++void
++emit_fusion_load_store (rtx load_store_reg, rtx addis_reg, rtx offset,
++			const char *insn_str)
++{
++  rtx fuse_ops[10];
++  char insn_template[80];
++
++  fuse_ops[0] = load_store_reg;
++  fuse_ops[1] = addis_reg;
++
++  if (CONST_INT_P (offset) && satisfies_constraint_I (offset))
+     {
+-      sprintf (insn_template, "%s %%0,%%1(%%0)", load_str);
+-      fuse_ops[1] = load_offset;
++      sprintf (insn_template, "%s %%0,%%2(%%1)", insn_str);
++      fuse_ops[2] = offset;
+       output_asm_insn (insn_template, fuse_ops);
+     }
+ 
+-  else if (GET_CODE (load_offset) == UNSPEC
+-	   && XINT (load_offset, 1) == UNSPEC_TOCREL)
++  else if (GET_CODE (offset) == UNSPEC
++	   && XINT (offset, 1) == UNSPEC_TOCREL)
+     {
+       if (TARGET_ELF)
+-	sprintf (insn_template, "%s %%0,%%1@toc@l(%%0)", load_str);
++	sprintf (insn_template, "%s %%0,%%2@toc@l(%%1)", insn_str);
+ 
+       else if (TARGET_XCOFF)
+-	sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);
++	sprintf (insn_template, "%s %%0,%%2@l(%%1)", insn_str);
+ 
+       else
+ 	gcc_unreachable ();
+ 
+-      fuse_ops[1] = XVECEXP (load_offset, 0, 0);
++      fuse_ops[2] = XVECEXP (offset, 0, 0);
+       output_asm_insn (insn_template, fuse_ops);
+     }
+ 
+-  else if (GET_CODE (load_offset) == PLUS
+-	   && GET_CODE (XEXP (load_offset, 0)) == UNSPEC
+-	   && XINT (XEXP (load_offset, 0), 1) == UNSPEC_TOCREL
+-	   && CONST_INT_P (XEXP (load_offset, 1)))
++  else if (GET_CODE (offset) == PLUS
++	   && GET_CODE (XEXP (offset, 0)) == UNSPEC
++	   && XINT (XEXP (offset, 0), 1) == UNSPEC_TOCREL
++	   && CONST_INT_P (XEXP (offset, 1)))
+     {
+-      rtx tocrel_unspec = XEXP (load_offset, 0);
++      rtx tocrel_unspec = XEXP (offset, 0);
+       if (TARGET_ELF)
+-	sprintf (insn_template, "%s %%0,%%1+%%2@toc@l(%%0)", load_str);
++	sprintf (insn_template, "%s %%0,%%2+%%3@toc@l(%%1)", insn_str);
+ 
+       else if (TARGET_XCOFF)
+-	sprintf (insn_template, "%s %%0,%%1+%%2@l(%%0)", load_str);
++	sprintf (insn_template, "%s %%0,%%2+%%3@l(%%1)", insn_str);
+ 
+       else
+ 	gcc_unreachable ();
+ 
+-      fuse_ops[1] = XVECEXP (tocrel_unspec, 0, 0);
+-      fuse_ops[2] = XEXP (load_offset, 1);
++      fuse_ops[2] = XVECEXP (tocrel_unspec, 0, 0);
++      fuse_ops[3] = XEXP (offset, 1);
+       output_asm_insn (insn_template, fuse_ops);
+     }
+ 
+-  else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (load_offset))
++  else if (TARGET_ELF && !TARGET_POWERPC64 && CONSTANT_P (offset))
+     {
+-      sprintf (insn_template, "%s %%0,%%1@l(%%0)", load_str);
++      sprintf (insn_template, "%s %%0,%%2@l(%%1)", insn_str);
+ 
+-      fuse_ops[1] = load_offset;
++      fuse_ops[2] = offset;
+       output_asm_insn (insn_template, fuse_ops);
+     }
+ 
+   else
+-    fatal_insn ("Unable to generate load offset for fusion", load_offset);
++    fatal_insn ("Unable to generate load/store offset for fusion", offset);
+ 
++  return;
++}
++
++/* Wrap a TOC address that can be fused to indicate that special fusion
++   processing is needed.  */
++
++rtx
++fusion_wrap_memory_address (rtx old_mem)
++{
++  rtx old_addr = XEXP (old_mem, 0);
++  rtvec v = gen_rtvec (1, old_addr);
++  rtx new_addr = gen_rtx_UNSPEC (Pmode, v, UNSPEC_FUSION_ADDIS);
++  return replace_equiv_address_nv (old_mem, new_addr, false);
++}
++
++/* Given an address, convert it into the addis and load offset parts.  Addresses
++   created during the peephole2 process look like:
++	(lo_sum (high (unspec [(sym)] UNSPEC_TOCREL))
++		(unspec [(...)] UNSPEC_TOCREL))
++
++   Addresses created via toc fusion look like:
++	(unspec [(unspec [(...)] UNSPEC_TOCREL)] UNSPEC_FUSION_ADDIS))  */
++
++static void
++fusion_split_address (rtx addr, rtx *p_hi, rtx *p_lo)
++{
++  rtx hi, lo;
++
++  if (GET_CODE (addr) == UNSPEC && XINT (addr, 1) == UNSPEC_FUSION_ADDIS)
++    {
++      lo = XVECEXP (addr, 0, 0);
++      hi = gen_rtx_HIGH (Pmode, lo);
++    }
++  else if (GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM)
++    {
++      hi = XEXP (addr, 0);
++      lo = XEXP (addr, 1);
++    }
++  else
++    gcc_unreachable ();
++
++  *p_hi = hi;
++  *p_lo = lo;
++}
++
++/* Return a string to fuse an addis instruction with a gpr load to the same
++   register that we loaded up the addis instruction.  The address that is used
++   is the logical address that was formed during peephole2:
++	(lo_sum (high) (low-part))
++
++   Or the address is the TOC address that is wrapped before register allocation:
++	(unspec [(addr) (toc-reg)] UNSPEC_FUSION_ADDIS)
++
++   The code is complicated, so we call output_asm_insn directly, and just
++   return "".  */
++
++const char *
++emit_fusion_gpr_load (rtx target, rtx mem)
++{
++  rtx addis_value;
++  rtx addr;
++  rtx load_offset;
++  const char *load_str = NULL;
++  const char *mode_name = NULL;
++  machine_mode mode;
++
++  if (GET_CODE (mem) == ZERO_EXTEND)
++    mem = XEXP (mem, 0);
++
++  gcc_assert (REG_P (target) && MEM_P (mem));
++
++  addr = XEXP (mem, 0);
++  fusion_split_address (addr, &addis_value, &load_offset);
++
++  /* Now emit the load instruction to the same register.  */
++  mode = GET_MODE (mem);
++  switch (mode)
++    {
++    case QImode:
++      mode_name = "char";
++      load_str = "lbz";
++      break;
++
++    case HImode:
++      mode_name = "short";
++      load_str = "lhz";
++      break;
++
++    case SImode:
++    case SFmode:
++      mode_name = (mode == SFmode) ? "float" : "int";
++      load_str = "lwz";
++      break;
++
++    case DImode:
++    case DFmode:
++      gcc_assert (TARGET_POWERPC64);
++      mode_name = (mode == DFmode) ? "double" : "long";
++      load_str = "ld";
++      break;
++
++    default:
++      fatal_insn ("Bad GPR fusion", gen_rtx_SET (VOIDmode, target, mem));
++    }
++
++  /* Emit the addis instruction.  */
++  emit_fusion_addis (target, addis_value, "gpr load fusion", mode_name);
++
++  /* Emit the D-form load instruction.  */
++  emit_fusion_load_store (target, target, load_offset, load_str);
++
+   return "";
+ }
+ 
++
++/* Return true if the peephole2 can combine a load/store involving a
++   combination of an addis instruction and the memory operation.  This was
++   added to the ISA 3.0 (power9) hardware.  */
++
++bool
++fusion_p9_p (rtx addis_reg,		/* register set via addis.  */
++	     rtx addis_value,		/* addis value.  */
++	     rtx dest,			/* destination (memory or register). */
++	     rtx src)			/* source (register or memory).  */
++{
++  rtx addr, mem, offset;
++  enum machine_mode mode = GET_MODE (src);
++
++  /* Validate arguments.  */
++  if (!base_reg_operand (addis_reg, GET_MODE (addis_reg)))
++    return false;
++
++  if (!fusion_gpr_addis (addis_value, GET_MODE (addis_value)))
++    return false;
++
++  /* Ignore extend operations that are part of the load.  */
++  if (GET_CODE (src) == FLOAT_EXTEND || GET_CODE (src) == ZERO_EXTEND)
++    src = XEXP (src, 0);
++
++  /* Test for memory<-register or register<-memory.  */
++  if (fpr_reg_operand (src, mode) || int_reg_operand (src, mode))
++    {
++      if (!MEM_P (dest))
++	return false;
++
++      mem = dest;
++    }
++
++  else if (MEM_P (src))
++    {
++      if (!fpr_reg_operand (dest, mode) && !int_reg_operand (dest, mode))
++	return false;
++
++      mem = src;
++    }
++
++  else
++    return false;
++
++  addr = XEXP (mem, 0);			/* either PLUS or LO_SUM.  */
++  if (GET_CODE (addr) == PLUS)
++    {
++      if (!rtx_equal_p (addis_reg, XEXP (addr, 0)))
++	return false;
++
++      return satisfies_constraint_I (XEXP (addr, 1));
++    }
++
++  else if (GET_CODE (addr) == LO_SUM)
++    {
++      if (!rtx_equal_p (addis_reg, XEXP (addr, 0)))
++	return false;
++
++      offset = XEXP (addr, 1);
++      if (TARGET_XCOFF || (TARGET_ELF && TARGET_POWERPC64))
++	return small_toc_ref (offset, GET_MODE (offset));
++
++      else if (TARGET_ELF && !TARGET_POWERPC64)
++	return CONSTANT_P (offset);
++    }
++
++  return false;
++}
++
++/* During the peephole2 pass, adjust and expand the insns for an extended fusion
++   load sequence.
++
++   The operands are:
++	operands[0]	register set with addis
++	operands[1]	value set via addis
++	operands[2]	target register being loaded
++	operands[3]	D-form memory reference using operands[0].
++
++  This is similar to the fusion introduced with power8, except it scales to
++  both loads/stores and does not require the result register to be the same as
++  the base register.  At the moment, we only do this if register set with addis
++  is dead.  */
++
++void
++expand_fusion_p9_load (rtx *operands)
++{
++  rtx tmp_reg = operands[0];
++  rtx addis_value = operands[1];
++  rtx target = operands[2];
++  rtx orig_mem = operands[3];
++  rtx  new_addr, new_mem, orig_addr, offset, set, clobber, insn;
++  enum rtx_code plus_or_lo_sum;
++  machine_mode target_mode = GET_MODE (target);
++  machine_mode extend_mode = target_mode;
++  machine_mode ptr_mode = Pmode;
++  enum rtx_code extend = UNKNOWN;
++
++  if (GET_CODE (orig_mem) == FLOAT_EXTEND || GET_CODE (orig_mem) == ZERO_EXTEND)
++    {
++      extend = GET_CODE (orig_mem);
++      orig_mem = XEXP (orig_mem, 0);
++      target_mode = GET_MODE (orig_mem);
++    }
++
++  gcc_assert (MEM_P (orig_mem));
++
++  orig_addr = XEXP (orig_mem, 0);
++  plus_or_lo_sum = GET_CODE (orig_addr);
++  gcc_assert (plus_or_lo_sum == PLUS || plus_or_lo_sum == LO_SUM);
++
++  offset = XEXP (orig_addr, 1);
++  new_addr = gen_rtx_fmt_ee (plus_or_lo_sum, ptr_mode, addis_value, offset);
++  new_mem = replace_equiv_address_nv (orig_mem, new_addr, false);
++
++  if (extend != UNKNOWN)
++    new_mem = gen_rtx_fmt_e (extend, extend_mode, new_mem);
++
++  new_mem = gen_rtx_UNSPEC (extend_mode, gen_rtvec (1, new_mem),
++			    UNSPEC_FUSION_P9);
++
++  set = gen_rtx_SET (VOIDmode, target, new_mem);
++  clobber = gen_rtx_CLOBBER (VOIDmode, tmp_reg);
++  insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber));
++  emit_insn (insn);
++
++  return;
++}
++
++/* During the peephole2 pass, adjust and expand the insns for an extended fusion
++   store sequence.
++
++   The operands are:
++	operands[0]	register set with addis
++	operands[1]	value set via addis
++	operands[2]	target D-form memory being stored to
++	operands[3]	register being stored
++
++  This is similar to the fusion introduced with power8, except it scales to
++  both loads/stores and does not require the result register to be the same as
++  the base register.  At the moment, we only do this if register set with addis
++  is dead.  */
++
++void
++expand_fusion_p9_store (rtx *operands)
++{
++  rtx tmp_reg = operands[0];
++  rtx addis_value = operands[1];
++  rtx orig_mem = operands[2];
++  rtx src = operands[3];
++  rtx  new_addr, new_mem, orig_addr, offset, set, clobber, insn, new_src;
++  enum rtx_code plus_or_lo_sum;
++  machine_mode target_mode = GET_MODE (orig_mem);
++  machine_mode ptr_mode = Pmode;
++
++  gcc_assert (MEM_P (orig_mem));
++
++  orig_addr = XEXP (orig_mem, 0);
++  plus_or_lo_sum = GET_CODE (orig_addr);
++  gcc_assert (plus_or_lo_sum == PLUS || plus_or_lo_sum == LO_SUM);
++
++  offset = XEXP (orig_addr, 1);
++  new_addr = gen_rtx_fmt_ee (plus_or_lo_sum, ptr_mode, addis_value, offset);
++  new_mem = replace_equiv_address_nv (orig_mem, new_addr, false);
++
++  new_src = gen_rtx_UNSPEC (target_mode, gen_rtvec (1, src),
++			    UNSPEC_FUSION_P9);
++
++  set = gen_rtx_SET (VOIDmode, new_mem, new_src);
++  clobber = gen_rtx_CLOBBER (VOIDmode, tmp_reg);
++  insn = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber));
++  emit_insn (insn);
++
++  return;
++}
++
++/* Return a string to fuse an addis instruction with a load using extended
++   fusion.  The address that is used is the logical address that was formed
++   during peephole2: (lo_sum (high) (low-part))
++
++   The code is complicated, so we call output_asm_insn directly, and just
++   return "".  */
++
++const char *
++emit_fusion_p9_load (rtx reg, rtx mem, rtx tmp_reg)
++{
++  enum machine_mode mode = GET_MODE (reg);
++  rtx hi;
++  rtx lo;
++  rtx addr;
++  const char *load_string;
++  int r;
++
++  if (GET_CODE (mem) == FLOAT_EXTEND || GET_CODE (mem) == ZERO_EXTEND)
++    {
++      mem = XEXP (mem, 0);
++      mode = GET_MODE (mem);
++    }
++
++  if (GET_CODE (reg) == SUBREG)
++    {
++      gcc_assert (SUBREG_BYTE (reg) == 0);
++      reg = SUBREG_REG (reg);
++    }
++
++  if (!REG_P (reg))
++    fatal_insn ("emit_fusion_p9_load, bad reg #1", reg);
++
++  r = REGNO (reg);
++  if (FP_REGNO_P (r))
++    {
++      if (mode == SFmode)
++	load_string = "lfs";
++      else if (mode == DFmode || mode == DImode)
++	load_string = "lfd";
++      else
++	gcc_unreachable ();
++    }
++  else if (INT_REGNO_P (r))
++    {
++      switch (mode)
++	{
++	case QImode:
++	  load_string = "lbz";
++	  break;
++	case HImode:
++	  load_string = "lhz";
++	  break;
++	case SImode:
++	case SFmode:
++	  load_string = "lwz";
++	  break;
++	case DImode:
++	case DFmode:
++	  if (!TARGET_POWERPC64)
++	    gcc_unreachable ();
++	  load_string = "ld";
++	  break;
++	default:
++	  gcc_unreachable ();
++	}
++    }
++  else
++    fatal_insn ("emit_fusion_p9_load, bad reg #2", reg);
++
++  if (!MEM_P (mem))
++    fatal_insn ("emit_fusion_p9_load not MEM", mem);
++
++  addr = XEXP (mem, 0);
++  fusion_split_address (addr, &hi, &lo);
++
++  /* Emit the addis instruction.  */
++  emit_fusion_addis (tmp_reg, hi, "power9 load fusion", GET_MODE_NAME (mode));
++
++  /* Emit the D-form load instruction.  */
++  emit_fusion_load_store (reg, tmp_reg, lo, load_string);
++
++  return "";
++}
++
++/* Return a string to fuse an addis instruction with a store using extended
++   fusion.  The address that is used is the logical address that was formed
++   during peephole2: (lo_sum (high) (low-part))
++
++   The code is complicated, so we call output_asm_insn directly, and just
++   return "".  */
++
++const char *
++emit_fusion_p9_store (rtx mem, rtx reg, rtx tmp_reg)
++{
++  enum machine_mode mode = GET_MODE (reg);
++  rtx hi;
++  rtx lo;
++  rtx addr;
++  const char *store_string;
++  int r;
++
++  if (GET_CODE (reg) == SUBREG)
++    {
++      gcc_assert (SUBREG_BYTE (reg) == 0);
++      reg = SUBREG_REG (reg);
++    }
++
++  if (!REG_P (reg))
++    fatal_insn ("emit_fusion_p9_store, bad reg #1", reg);
++
++  r = REGNO (reg);
++  if (FP_REGNO_P (r))
++    {
++      if (mode == SFmode)
++	store_string = "stfs";
++      else if (mode == DFmode)
++	store_string = "stfd";
++      else
++	gcc_unreachable ();
++    }
++  else if (INT_REGNO_P (r))
++    {
++      switch (mode)
++	{
++	case QImode:
++	  store_string = "stb";
++	  break;
++	case HImode:
++	  store_string = "sth";
++	  break;
++	case SImode:
++	case SFmode:
++	  store_string = "stw";
++	  break;
++	case DImode:
++	case DFmode:
++	  if (!TARGET_POWERPC64)
++	    gcc_unreachable ();
++	  store_string = "std";
++	  break;
++	default:
++	  gcc_unreachable ();
++	}
++    }
++  else
++    fatal_insn ("emit_fusion_p9_store, bad reg #2", reg);
++
++  if (!MEM_P (mem))
++    fatal_insn ("emit_fusion_p9_store not MEM", mem);
++
++  addr = XEXP (mem, 0);
++  fusion_split_address (addr, &hi, &lo);
++
++  /* Emit the addis instruction.  */
++  emit_fusion_addis (tmp_reg, hi, "power9 store fusion", GET_MODE_NAME (mode));
++
++  /* Emit the D-form load instruction.  */
++  emit_fusion_load_store (reg, tmp_reg, lo, store_string);
++
++  return "";
++}
++
++
+ /* Analyze vector computations and remove unnecessary doubleword
+    swaps (xxswapdi instructions).  This pass is performed only
+    for little-endian VSX code generation.
+@@ -34134,10 +36321,8 @@
+    throughout the computation, we can get correct behavior by replacing
+    M with M' as follows:
+ 
+-            { M[i+8]+8 : i < 8, M[i+8] in [0,7] U [16,23]
+-    M'[i] = { M[i+8]-8 : i < 8, M[i+8] in [8,15] U [24,31]
+-            { M[i-8]+8 : i >= 8, M[i-8] in [0,7] U [16,23]
+-            { M[i-8]-8 : i >= 8, M[i-8] in [8,15] U [24,31]
++    M'[i] = { (M[i]+8)%16      : M[i] in [0,15]
++            { ((M[i]+8)%16)+16 : M[i] in [16,31]
+ 
+    This seems promising at first, since we are just replacing one mask
+    with another.  But certain masks are preferable to others.  If M
+@@ -34155,8 +36340,12 @@
+    mask to be produced by an UNSPEC_LVSL, in which case the mask 
+    cannot be known at compile time.  In such a case we would have to
+    generate several instructions to compute M' as above at run time,
+-   and a cost model is needed again.  */
++   and a cost model is needed again.
+ 
++   However, when the mask M for an UNSPEC_VPERM is loaded from the
++   constant pool, we can replace M with M' as above at no cost
++   beyond adding a constant pool entry.  */
++
+ /* This is based on the union-find logic in web.c.  web_entry_base is
+    defined in df.h.  */
+ class swap_web_entry : public web_entry_base
+@@ -34191,7 +36380,7 @@
+   /* A nonzero value indicates what kind of special handling for this
+      insn is required if doublewords are swapped.  Undefined if
+      is_swappable is not set.  */
+-  unsigned int special_handling : 3;
++  unsigned int special_handling : 4;
+   /* Set if the web represented by this entry cannot be optimized.  */
+   unsigned int web_not_optimizable : 1;
+   /* Set if this insn should be deleted.  */
+@@ -34205,7 +36394,11 @@
+   SH_NOSWAP_LD,
+   SH_NOSWAP_ST,
+   SH_EXTRACT,
+-  SH_SPLAT
++  SH_SPLAT,
++  SH_XXPERMDI,
++  SH_CONCAT,
++  SH_VPERM,
++  SH_VPERM_COMP
+ };
+ 
+ /* Union INSN with all insns containing definitions that reach USE.
+@@ -34340,6 +36533,164 @@
+   return 1;
+ }
+ 
++/* Return TRUE if insn is a swap fed by a load from the constant pool.  */
++static bool
++const_load_sequence_p (swap_web_entry *insn_entry, rtx insn)
++{
++  unsigned uid = INSN_UID (insn);
++  if (!insn_entry[uid].is_swap || insn_entry[uid].is_load)
++    return false;
++
++  /* Find the unique use in the swap and locate its def.  If the def
++     isn't unique, punt.  */
++  struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
++  df_ref use;
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    {
++      struct df_link *def_link = DF_REF_CHAIN (use);
++      if (!def_link || def_link->next)
++	return false;
++
++      rtx def_insn = DF_REF_INSN (def_link->ref);
++      unsigned uid2 = INSN_UID (def_insn);
++      if (!insn_entry[uid2].is_load || !insn_entry[uid2].is_swap)
++	return false;
++
++      rtx body = PATTERN (def_insn);
++      if (GET_CODE (body) != SET
++	  || GET_CODE (SET_SRC (body)) != VEC_SELECT
++	  || GET_CODE (XEXP (SET_SRC (body), 0)) != MEM)
++	return false;
++
++      rtx mem = XEXP (SET_SRC (body), 0);
++      rtx base_reg = XEXP (mem, 0);
++
++      if (!REG_P (base_reg))
++	{
++	  gcc_assert (GET_CODE (base_reg) == PLUS);
++	  base_reg = XEXP (base_reg, 0);
++	}
++
++      df_ref base_use;
++      rtx_insn *tocrel_insn = 0;
++      insn_info = DF_INSN_INFO_GET (def_insn);
++      FOR_EACH_INSN_INFO_USE (base_use, insn_info)
++	{
++	  if (!rtx_equal_p (DF_REF_REG (base_use), base_reg))
++	    continue;
++
++	  struct df_link *base_def_link = DF_REF_CHAIN (base_use);
++	  if (!base_def_link || base_def_link->next)
++	    return false;
++
++	  tocrel_insn = DF_REF_INSN (base_def_link->ref);
++	  rtx tocrel_body = PATTERN (tocrel_insn);
++	  rtx base, offset;
++	  if (GET_CODE (tocrel_body) != SET)
++	    return false;
++	  /* There is an extra level of indirection for small/large
++	     code models.  */
++	  rtx tocrel_expr = SET_SRC (tocrel_body);
++	  if (GET_CODE (tocrel_expr) == MEM)
++	    tocrel_expr = XEXP (tocrel_expr, 0);
++	  if (!toc_relative_expr_p (tocrel_expr, false))
++	    return false;
++	  split_const (XVECEXP (tocrel_base, 0, 0), &base, &offset);
++	  if (GET_CODE (base) != SYMBOL_REF || !CONSTANT_POOL_ADDRESS_P (base))
++	    return false;
++	  rtx const_vector = get_pool_constant (base);
++	  /* With the extra indirection, get_pool_constant will produce the
++	     real constant from the reg_equal expression, so get the real
++	     constant.  It's still possible that the reg_equal doesn't
++	     represent a constant, so punt in that case.  */
++	  if (GET_CODE (const_vector) == SYMBOL_REF)
++	    {
++	      if (!CONSTANT_POOL_ADDRESS_P (const_vector))
++		return false;
++	      const_vector = get_pool_constant (const_vector);
++	    }
++	  if (GET_CODE (const_vector) != CONST_VECTOR)
++	    return false;
++	}
++      gcc_assert (tocrel_insn);
++    }
++  return true;
++}
++
++/* Return TRUE if insn is a swap fed by a load from the constant pool
++   and subsequently complemented.  */
++static bool
++load_comp_mask_p (swap_web_entry *insn_entry, rtx insn)
++{
++  rtx body = PATTERN (insn);
++  if (GET_CODE (body) != SET)
++    return false;
++  rtx ior = SET_SRC (body);
++  if (GET_CODE (ior) != IOR)
++    return false;
++  rtx not1 = XEXP (ior, 0);
++  rtx not2 = XEXP (ior, 1);
++  if (GET_CODE (not1) != NOT || GET_CODE (not2) != NOT)
++    return false;
++  rtx reg1 = XEXP (not1, 0);
++  rtx reg2 = XEXP (not2, 0);
++  if (!REG_P (reg1) || !rtx_equal_p (reg1, reg2))
++    return false;
++
++  /* We have a VNOR operation.  Find the def of its source reg and
++     check for the remaining conditions.  */
++  struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
++  df_ref use;
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    {
++      struct df_link *def_link = DF_REF_CHAIN (use);
++      if (!def_link || def_link->next)
++	return false;
++      rtx def_insn = DF_REF_INSN (def_link->ref);
++      return const_load_sequence_p (insn_entry, def_insn);
++    }
++
++  gcc_unreachable ();
++}
++
++/* Return TRUE iff OP matches a V2DF reduction pattern.  See the
++   definition of vsx_reduc_<VEC_reduc_name>_v2df in vsx.md.  */
++static bool
++v2df_reduction_p (rtx op)
++{
++  if (GET_MODE (op) != V2DFmode)
++    return false;
++  
++  enum rtx_code code = GET_CODE (op);
++  if (code != PLUS && code != SMIN && code != SMAX)
++    return false;
++
++  rtx concat = XEXP (op, 0);
++  if (GET_CODE (concat) != VEC_CONCAT)
++    return false;
++
++  rtx select0 = XEXP (concat, 0);
++  rtx select1 = XEXP (concat, 1);
++  if (GET_CODE (select0) != VEC_SELECT || GET_CODE (select1) != VEC_SELECT)
++    return false;
++
++  rtx reg0 = XEXP (select0, 0);
++  rtx reg1 = XEXP (select1, 0);
++  if (!rtx_equal_p (reg0, reg1) || !REG_P (reg0))
++    return false;
++
++  rtx parallel0 = XEXP (select0, 1);
++  rtx parallel1 = XEXP (select1, 1);
++  if (GET_CODE (parallel0) != PARALLEL || GET_CODE (parallel1) != PARALLEL)
++    return false;
++
++  if (!rtx_equal_p (XVECEXP (parallel0, 0, 0), const1_rtx)
++      || !rtx_equal_p (XVECEXP (parallel1, 0, 0), const0_rtx))
++    return false;
++
++  return true;
++}
++
+ /* Return 1 iff OP is an operand that will not be affected by having
+    vector doublewords swapped in memory.  */
+ static unsigned int
+@@ -34397,6 +36748,22 @@
+ 	  *special = SH_EXTRACT;
+ 	  return 1;
+ 	}
++      /* An XXPERMDI is ok if we adjust the lanes.  Note that if the
++	 XXPERMDI is a swap operation, it will be identified by
++	 insn_is_swap_p and therefore we won't get here.  */
++      else if (GET_CODE (XEXP (op, 0)) == VEC_CONCAT
++	       && (GET_MODE (XEXP (op, 0)) == V4DFmode
++		   || GET_MODE (XEXP (op, 0)) == V4DImode)
++	       && GET_CODE ((parallel = XEXP (op, 1))) == PARALLEL
++	       && XVECLEN (parallel, 0) == 2
++	       && GET_CODE (XVECEXP (parallel, 0, 0)) == CONST_INT
++	       && GET_CODE (XVECEXP (parallel, 0, 1)) == CONST_INT)
++	{
++	  *special = SH_XXPERMDI;
++	  return 1;
++	}
++      else if (v2df_reduction_p (op))
++	return 1;
+       else
+ 	return 0;
+ 
+@@ -34461,6 +36828,9 @@
+ 	  case UNSPEC_VSPLT_DIRECT:
+ 	    *special = SH_SPLAT;
+ 	    return 1;
++	  case UNSPEC_REDUC_PLUS:
++	  case UNSPEC_REDUC:
++	    return 1;
+ 	  }
+       }
+ 
+@@ -34574,6 +36944,59 @@
+       return 1;
+     }
+ 
++  /* A concatenation of two doublewords is ok if we reverse the
++     order of the inputs.  */
++  if (GET_CODE (body) == SET
++      && GET_CODE (SET_SRC (body)) == VEC_CONCAT
++      && (GET_MODE (SET_SRC (body)) == V2DFmode
++	  || GET_MODE (SET_SRC (body)) == V2DImode))
++    {
++      *special = SH_CONCAT;
++      return 1;
++    }
++
++  /* V2DF reductions are always swappable.  */
++  if (GET_CODE (body) == PARALLEL)
++    {
++      rtx expr = XVECEXP (body, 0, 0);
++      if (GET_CODE (expr) == SET
++	  && v2df_reduction_p (SET_SRC (expr)))
++	return 1;
++    }
++
++  /* An UNSPEC_VPERM is ok if the mask operand is loaded from the
++     constant pool, and optionally complemented afterwards.  */
++  if (GET_CODE (body) == SET
++      && GET_CODE (SET_SRC (body)) == UNSPEC
++      && XINT (SET_SRC (body), 1) == UNSPEC_VPERM
++      && XVECLEN (SET_SRC (body), 0) == 3
++      && GET_CODE (XVECEXP (SET_SRC (body), 0, 2)) == REG)
++    {
++      rtx mask_reg = XVECEXP (SET_SRC (body), 0, 2);
++      struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
++      df_ref use;
++      FOR_EACH_INSN_INFO_USE (use, insn_info)
++	if (rtx_equal_p (DF_REF_REG (use), mask_reg))
++	  {
++	    struct df_link *def_link = DF_REF_CHAIN (use);
++	    /* Punt if multiple definitions for this reg.  */
++	    if (def_link && !def_link->next &&
++		const_load_sequence_p (insn_entry,
++				       DF_REF_INSN (def_link->ref)))
++	      {
++		*special = SH_VPERM;
++		return 1;
++	      }
++	    else if (def_link && !def_link->next &&
++		     load_comp_mask_p (insn_entry,
++				       DF_REF_INSN (def_link->ref)))
++	      {
++		*special = SH_VPERM_COMP;
++		return 1;
++	      }
++	  }
++    }
++
+   /* Otherwise check the operands for vector lane violations.  */
+   return rtx_is_swappable_p (body, special);
+ }
+@@ -34595,7 +37018,7 @@
+ 
+   for (; link; link = link->next)
+     {
+-      if (!VECTOR_MODE_P (GET_MODE (DF_REF_REG (link->ref))))
++      if (!ALTIVEC_OR_VSX_VECTOR_MODE (GET_MODE (DF_REF_REG (link->ref))))
+ 	continue;
+ 
+       if (DF_REF_IS_ARTIFICIAL (link->ref))
+@@ -34694,7 +37117,7 @@
+ 	{
+ 	  /* Ignore uses for addressability.  */
+ 	  machine_mode mode = GET_MODE (DF_REF_REG (use));
+-	  if (!VECTOR_MODE_P (mode))
++	  if (!ALTIVEC_OR_VSX_VECTOR_MODE (mode))
+ 	    continue;
+ 
+ 	  struct df_link *link = DF_REF_CHAIN (use);
+@@ -34863,6 +37286,235 @@
+     fprintf (dump_file, "Changing lane for splat %d\n", INSN_UID (insn));
+ }
+ 
++/* Given OP that contains an XXPERMDI operation (that is not a doubleword
++   swap), reverse the order of the source operands and adjust the indices
++   of the source lanes to account for doubleword reversal.  */
++static void
++adjust_xxpermdi (rtx_insn *insn)
++{
++  rtx set = PATTERN (insn);
++  rtx select = XEXP (set, 1);
++  rtx concat = XEXP (select, 0);
++  rtx src0 = XEXP (concat, 0);
++  XEXP (concat, 0) = XEXP (concat, 1);
++  XEXP (concat, 1) = src0;
++  rtx parallel = XEXP (select, 1);
++  int lane0 = INTVAL (XVECEXP (parallel, 0, 0));
++  int lane1 = INTVAL (XVECEXP (parallel, 0, 1));
++  int new_lane0 = 3 - lane1;
++  int new_lane1 = 3 - lane0;
++  XVECEXP (parallel, 0, 0) = GEN_INT (new_lane0);
++  XVECEXP (parallel, 0, 1) = GEN_INT (new_lane1);
++  INSN_CODE (insn) = -1; /* Force re-recognition.  */
++  df_insn_rescan (insn);
++
++  if (dump_file)
++    fprintf (dump_file, "Changing lanes for xxpermdi %d\n", INSN_UID (insn));
++}
++
++/* Given OP that contains a VEC_CONCAT operation of two doublewords,
++   reverse the order of those inputs.  */
++static void
++adjust_concat (rtx_insn *insn)
++{
++  rtx set = PATTERN (insn);
++  rtx concat = XEXP (set, 1);
++  rtx src0 = XEXP (concat, 0);
++  XEXP (concat, 0) = XEXP (concat, 1);
++  XEXP (concat, 1) = src0;
++  INSN_CODE (insn) = -1; /* Force re-recognition.  */
++  df_insn_rescan (insn);
++
++  if (dump_file)
++    fprintf (dump_file, "Reversing inputs for concat %d\n", INSN_UID (insn));
++}
++
++/* We previously determined that a use of MASK_REG in INSN was fed by a
++   swap of a swapping load of a TOC-relative constant pool symbol.  Return
++   the CONST_VECTOR that was loaded, as well as the LOAD_INSN (by
++   reference).  */
++static rtx
++find_swapped_load_and_const_vector (rtx_insn *insn, rtx_insn **load_insn,
++				    rtx mask_reg)
++{
++  /* Find the swap.  */
++  struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
++  df_ref use;
++  rtx_insn *swap_insn = 0;
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    if (rtx_equal_p (DF_REF_REG (use), mask_reg))
++      {
++	struct df_link *def_link = DF_REF_CHAIN (use);
++	gcc_assert (def_link && !def_link->next);
++	swap_insn = DF_REF_INSN (def_link->ref);
++	break;
++      }
++  gcc_assert (swap_insn);
++  
++  /* Find the load.  */
++  insn_info = DF_INSN_INFO_GET (swap_insn);
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    {
++      struct df_link *def_link = DF_REF_CHAIN (use);
++      gcc_assert (def_link && !def_link->next);
++      *load_insn = DF_REF_INSN (def_link->ref);
++      break;
++    }
++  gcc_assert (*load_insn);
++
++  /* Find the TOC-relative symbol access.  */
++  insn_info = DF_INSN_INFO_GET (*load_insn);
++  rtx_insn *tocrel_insn = 0;
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    {
++      struct df_link *def_link = DF_REF_CHAIN (use);
++      gcc_assert (def_link && !def_link->next);
++      tocrel_insn = DF_REF_INSN (def_link->ref);
++      break;
++    }
++  gcc_assert (tocrel_insn);
++
++  /* Find the embedded CONST_VECTOR.  We have to call toc_relative_expr_p
++     to set tocrel_base; otherwise it would be unnecessary as we've
++     already established it will return true.  */
++  rtx base, offset;
++  rtx tocrel_expr = SET_SRC (PATTERN (tocrel_insn));
++  /* There is an extra level of indirection for small/large code models.  */
++  if (GET_CODE (tocrel_expr) == MEM)
++    tocrel_expr = XEXP (tocrel_expr, 0);
++  if (!toc_relative_expr_p (tocrel_expr, false))
++    gcc_unreachable ();
++  split_const (XVECEXP (tocrel_base, 0, 0), &base, &offset);
++  rtx const_vector = get_pool_constant (base);
++  /* With the extra indirection, get_pool_constant will produce the
++     real constant from the reg_equal expression, so get the real
++     constant.  */
++  if (GET_CODE (const_vector) == SYMBOL_REF)
++    const_vector = get_pool_constant (const_vector);
++  gcc_assert (GET_CODE (const_vector) == CONST_VECTOR);
++
++  return const_vector;
++}
++
++/* Create a new CONST_VECTOR from NEW_MASK, and replace the MEM in
++   LOAD_INSN with a MEM referencing that CONST_VECTOR.  */
++static void
++replace_const_vector_in_load (rtx_insn *load_insn, unsigned int *new_mask)
++{
++  unsigned int i;
++  rtx vals = gen_rtx_PARALLEL (V16QImode, rtvec_alloc (16));
++  for (i = 0; i < 16; ++i)
++    XVECEXP (vals, 0, i) = GEN_INT (new_mask[i]);
++  rtx new_const_vector = gen_rtx_CONST_VECTOR (V16QImode, XVEC (vals, 0));
++  rtx new_mem = force_const_mem (V16QImode, new_const_vector);
++  /* This gives us a MEM whose base operand is a SYMBOL_REF, which we
++     can't recognize.  Force the SYMBOL_REF into a register.  */
++  if (!REG_P (XEXP (new_mem, 0))) {
++    rtx base_reg = force_reg (Pmode, XEXP (new_mem, 0));
++    XEXP (new_mem, 0) = base_reg;
++    /* Move the newly created insn ahead of the load insn.  */
++    rtx_insn *force_insn = get_last_insn ();
++    remove_insn (force_insn);
++    rtx_insn *before_load_insn = PREV_INSN (load_insn);
++    add_insn_after (force_insn, before_load_insn, BLOCK_FOR_INSN (load_insn));
++    df_insn_rescan (before_load_insn);
++    df_insn_rescan (force_insn);
++  }
++
++  XEXP (SET_SRC (PATTERN (load_insn)), 0) = new_mem;
++  INSN_CODE (load_insn) = -1; /* Force re-recognition.  */
++  df_insn_rescan (load_insn);
++}
++
++/* Given an UNSPEC_VPERM insn, modify the mask loaded from the
++   constant pool to reflect swapped doublewords.  */
++static void
++adjust_vperm (rtx_insn *insn)
++{
++  /* We previously determined that the UNSPEC_VPERM was fed by a
++     swap of a swapping load of a TOC-relative constant pool symbol.
++     Find the MEM in the swapping load and replace it with a MEM for
++     the adjusted mask constant.  */
++  rtx set = PATTERN (insn);
++  rtx mask_reg = XVECEXP (SET_SRC (set), 0, 2);
++  rtx_insn *load_insn = 0;
++  rtx const_vector = find_swapped_load_and_const_vector (insn, &load_insn,
++							 mask_reg);
++
++  /* Create an adjusted mask from the initial mask.  */
++  unsigned int new_mask[16], i, val;
++  for (i = 0; i < 16; ++i) {
++    val = INTVAL (XVECEXP (const_vector, 0, i));
++    if (val < 16)
++      new_mask[i] = (val + 8) % 16;
++    else
++      new_mask[i] = ((val + 8) % 16) + 16;
++  }
++
++  /* Update the load instruction to load the new constant vector.  */
++  replace_const_vector_in_load (load_insn, new_mask);
++
++  if (dump_file)
++    fprintf (dump_file, "Adjusting mask for vperm %d\n", INSN_UID (insn));
++}
++
++/* Given an UNSPEC_VPERM insn fed by a complement operation, modify
++   the mask loaded from the constant pool to reflect swapped doublewords
++   and the complement.  */
++static void
++adjust_vperm_comp (rtx_insn *insn, swap_web_entry *insn_entry)
++{
++  /* We previously determined that the UNSPEC_VPERM was fed by a
++     VNOR, itself fed by a swap of a swapping load of a TOC-relative
++     constant pool symbol.  Find the MEM in the swapping load and
++     replace it with a MEM for the adjusted mask constant.  */
++  rtx set = PATTERN (insn);
++  rtx mask_reg = XVECEXP (SET_SRC (set), 0, 2);
++
++  /* Find the VNOR and mark it for removal.  */
++  struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
++  df_ref use;
++  rtx_insn *vnor_insn = 0;
++  FOR_EACH_INSN_INFO_USE (use, insn_info)
++    if (rtx_equal_p (DF_REF_REG (use), mask_reg))
++      {
++	struct df_link *def_link = DF_REF_CHAIN (use);
++	gcc_assert (def_link && !def_link->next);
++	vnor_insn = DF_REF_INSN (def_link->ref);
++	break;
++      }
++  gcc_assert (vnor_insn);
++
++  unsigned uid = INSN_UID (vnor_insn);
++  insn_entry[uid].will_delete = 1;
++
++  /* Identify the original mask register from the VNOR.  */
++  set = PATTERN (vnor_insn);
++  mask_reg = XEXP (XEXP (SET_SRC (set), 0), 0);
++
++  /* Find the load insn and the CONST_VECTOR that it loads.  */
++  rtx_insn *load_insn = 0;
++  rtx const_vector
++    = find_swapped_load_and_const_vector (vnor_insn, &load_insn, mask_reg);
++
++  /* Create an adjusted mask from the initial mask, which reflects
++     both the effect of the swap and of the complement. */
++  unsigned int new_mask[16], i, val;
++  for (i = 0; i < 16; ++i) {
++    val = 31 - INTVAL (XVECEXP (const_vector, 0, i));
++    if (val < 16)
++      new_mask[i] = (val + 8) % 16;
++    else
++      new_mask[i] = ((val + 8) % 16) + 16;
++  }
++
++  /* Update the load instruction to load the new constant vector.  */
++  replace_const_vector_in_load (load_insn, new_mask);
++
++  if (dump_file)
++    fprintf (dump_file, "Adjusting mask for vperm %d\n", INSN_UID (insn));
++}
++
+ /* The insn described by INSN_ENTRY[I] can be swapped, but only
+    with special handling.  Take care of that here.  */
+ static void
+@@ -34909,17 +37561,38 @@
+       /* Change the lane on a direct-splat operation.  */
+       adjust_splat (insn);
+       break;
++    case SH_XXPERMDI:
++      /* Change the lanes on an XXPERMDI operation.  */
++      adjust_xxpermdi (insn);
++      break;
++    case SH_CONCAT:
++      /* Reverse the order of a concatenation operation.  */
++      adjust_concat (insn);
++      break;
++    case SH_VPERM:
++      /* Change the mask loaded from the constant pool for a VPERM.  */
++      adjust_vperm (insn);
++      break;
++    case SH_VPERM_COMP:
++      /* Change the mask loaded from the constant pool and
++	 complemented for a vec_perm built-in.  */
++      adjust_vperm_comp (insn, insn_entry);
+     }
+ }
+ 
+ /* Find the insn from the Ith table entry, which is known to be a
+-   register swap Y = SWAP(X).  Replace it with a copy Y = X.  */
++   register swap Y = SWAP(X).  Replace it with a copy Y = X.
++   There is now one exception to this.  The table entry may also
++   refer to Y = VNOR(X, X).  */
+ static void
+ replace_swap_with_copy (swap_web_entry *insn_entry, unsigned i)
+ {
+   rtx_insn *insn = insn_entry[i].insn;
+   rtx body = PATTERN (insn);
+-  rtx src_reg = XEXP (SET_SRC (body), 0);
++  enum rtx_code code = GET_CODE (SET_SRC (body));
++  rtx src_reg = (code == IOR
++		 ? XEXP (XEXP (SET_SRC (body), 0), 0)
++		 : XEXP (SET_SRC (body), 0));
+   rtx copy = gen_rtx_SET (VOIDmode, SET_DEST (body), src_reg);
+   rtx_insn *new_insn = emit_insn_before (copy, insn);
+   set_block_for_insn (new_insn, BLOCK_FOR_INSN (insn));
+@@ -34928,7 +37601,10 @@
+   if (dump_file)
+     {
+       unsigned int new_uid = INSN_UID (new_insn);
+-      fprintf (dump_file, "Replacing swap %d with copy %d\n", i, new_uid);
++      if (code == IOR)
++	fprintf (dump_file, "Replacing vnor %d with copy %d\n", i, new_uid);
++      else
++	fprintf (dump_file, "Replacing swap %d with copy %d\n", i, new_uid);
+     }
+ 
+   df_insn_delete (insn);
+@@ -34981,6 +37657,14 @@
+ 	      fputs ("special:extract ", dump_file);
+ 	    else if (insn_entry[i].special_handling == SH_SPLAT)
+ 	      fputs ("special:splat ", dump_file);
++	    else if (insn_entry[i].special_handling == SH_XXPERMDI)
++	      fputs ("special:xxpermdi ", dump_file);
++	    else if (insn_entry[i].special_handling == SH_CONCAT)
++	      fputs ("special:concat ", dump_file);
++	    else if (insn_entry[i].special_handling == SH_VPERM)
++	      fputs ("special:vperm ", dump_file);
++	    else if (insn_entry[i].special_handling == SH_VPERM_COMP)
++	      fputs ("special:vperm_c ", dump_file);
+ 	  }
+ 	if (insn_entry[i].web_not_optimizable)
+ 	  fputs ("unoptimizable ", dump_file);
+@@ -35048,10 +37732,11 @@
+ 		    mode = V4SImode;
+ 		}
+ 
+-	      if (VECTOR_MODE_P (mode) || mode == TImode)
++	      if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || mode == TImode)
+ 		{
+ 		  insn_entry[uid].is_relevant = 1;
+-		  if (mode == TImode || mode == V1TImode)
++		  if (mode == TImode || mode == V1TImode
++		      || FLOAT128_VECTOR_P (mode))
+ 		    insn_entry[uid].is_128_int = 1;
+ 		  if (DF_REF_INSN_INFO (mention))
+ 		    insn_entry[uid].contains_subreg
+@@ -35072,13 +37757,14 @@
+ 		 isn't sufficient to ensure we union the call into the
+ 		 web with the parameter setup code.  */
+ 	      if (mode == DImode && GET_CODE (insn) == SET
+-		  && VECTOR_MODE_P (GET_MODE (SET_DEST (insn))))
++		  && ALTIVEC_OR_VSX_VECTOR_MODE (GET_MODE (SET_DEST (insn))))
+ 		mode = GET_MODE (SET_DEST (insn));
+ 
+-	      if (VECTOR_MODE_P (mode) || mode == TImode)
++	      if (ALTIVEC_OR_VSX_VECTOR_MODE (mode) || mode == TImode)
+ 		{
+ 		  insn_entry[uid].is_relevant = 1;
+-		  if (mode == TImode || mode == V1TImode)
++		  if (mode == TImode || mode == V1TImode
++		      || FLOAT128_VECTOR_P (mode))
+ 		    insn_entry[uid].is_128_int = 1;
+ 		  if (DF_REF_INSN_INFO (mention))
+ 		    insn_entry[uid].contains_subreg
+@@ -35246,7 +37932,7 @@
+   virtual bool gate (function *)
+     {
+       return (optimize > 0 && !BYTES_BIG_ENDIAN && TARGET_VSX
+-	      && rs6000_optimize_swaps);
++	      && !TARGET_P9_VECTOR && rs6000_optimize_swaps);
+     }
+ 
+   virtual unsigned int execute (function *fun)
+Index: gcc/config/rs6000/vsx.md
+===================================================================
+--- a/src/gcc/config/rs6000/vsx.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/vsx.md	(.../ibm/gcc-5-branch)
+@@ -31,6 +31,11 @@
+ 			      V1TI
+ 			      (TI	"VECTOR_MEM_VSX_P (TImode)")])
+ 
++;; Mode iterator to handle swapping words on little endian for the 128-bit
++;; types that goes in a single vector register.
++(define_mode_iterator VSX_LE_128 [(KF   "FLOAT128_VECTOR_P (KFmode)")
++				  (TF   "FLOAT128_VECTOR_P (TFmode)")])
++
+ ;; Iterator for the 2 32-bit vector types
+ (define_mode_iterator VSX_W [V4SF V4SI])
+ 
+@@ -41,11 +46,31 @@
+ (define_mode_iterator VSX_F [V4SF V2DF])
+ 
+ ;; Iterator for logical types supported by VSX
+-(define_mode_iterator VSX_L [V16QI V8HI V4SI V2DI V4SF V2DF V1TI TI])
++;; Note, IFmode won't actually be used since it isn't a VSX type, but it simplifies
++;; the code by using 128-bit iterators for floating point.
++(define_mode_iterator VSX_L [V16QI
++			     V8HI
++			     V4SI
++			     V2DI
++			     V4SF
++			     V2DF
++			     V1TI
++			     TI
++			     (KF	"FLOAT128_VECTOR_P (KFmode)")
++			     (TF	"FLOAT128_VECTOR_P (TFmode)")
++			     (IF	"FLOAT128_VECTOR_P (IFmode)")])
+ 
+ ;; Iterator for memory move.  Handle TImode specially to allow
+ ;; it to use gprs as well as vsx registers.
+-(define_mode_iterator VSX_M [V16QI V8HI V4SI V2DI V4SF V2DF V1TI])
++(define_mode_iterator VSX_M [V16QI
++			     V8HI
++			     V4SI
++			     V2DI
++			     V4SF
++			     V2DF
++			     V1TI
++			     (KF	"FLOAT128_VECTOR_P (KFmode)")
++			     (TF	"FLOAT128_VECTOR_P (TFmode)")])
+ 
+ (define_mode_iterator VSX_M2 [V16QI
+ 			      V8HI
+@@ -54,6 +79,8 @@
+ 			      V4SF
+ 			      V2DF
+ 			      V1TI
++			      (KF	"FLOAT128_VECTOR_P (KFmode)")
++			      (TF	"FLOAT128_VECTOR_P (TFmode)")
+ 			      (TI	"TARGET_VSX_TIMODE")])
+ 
+ ;; Map into the appropriate load/store name based on the type
+@@ -64,6 +91,8 @@
+ 			(V2DF  "vd2")
+ 			(V2DI  "vd2")
+ 			(DF    "d")
++			(TF    "vd2")
++			(KF    "vd2")
+ 			(V1TI  "vd2")
+ 			(TI    "vd2")])
+ 
+@@ -76,6 +105,8 @@
+ 			 (V2DI  "dp")
+ 			 (DF    "dp")
+ 			 (SF	"sp")
++			 (TF    "dp")
++			 (KF    "dp")
+ 			 (V1TI  "dp")
+ 			 (TI    "dp")])
+ 
+@@ -89,6 +120,8 @@
+ 			 (DI	"wi")
+ 			 (DF    "ws")
+ 			 (SF	"ww")
++			 (TF	"wp")
++			 (KF	"wq")
+ 			 (V1TI  "v")
+ 			 (TI    "wt")])
+ 
+@@ -132,7 +165,9 @@
+ 			 (DF    "ws")
+ 			 (SF	"ww")
+ 			 (V1TI	"wa")
+-			 (TI    "wt")])
++			 (TI    "wt")
++			 (TF	"wp")
++			 (KF	"wq")])
+ 
+ ;; Same size integer type for floating point data
+ (define_mode_attr VSi [(V4SF  "v4si")
+@@ -157,7 +192,8 @@
+ 			 (V2DI  "v")
+ 			 (V2DF  "v")
+ 			 (V1TI  "v")
+-			 (DF    "s")])
++			 (DF    "s")
++			 (KF	"v")])
+ 
+ ;; Appropriate type for add ops (and other simple FP ops)
+ (define_mode_attr VStype_simple	[(V2DF "vecdouble")
+@@ -270,6 +306,24 @@
+    UNSPEC_VSX_XVCVDPUXDS
+   ])
+ 
++;; VSX (P9) moves
++
++(define_insn "*p9_vecload_<mode>"
++  [(set (match_operand:VSX_M 0 "vsx_register_operand" "=<VSa>")
++        (match_operand:VSX_M 1 "memory_operand" "Z"))]
++  "TARGET_P9_VECTOR"
++  "lxvx %x0,%y1"
++  [(set_attr "type" "vecload")
++   (set_attr "length" "4")])
++
++(define_insn "*p9_vecstore_<mode>"
++  [(set (match_operand:VSX_M 0 "memory_operand" "=Z")
++        (match_operand:VSX_M 1 "vsx_register_operand" "<VSa>"))]
++  "TARGET_P9_VECTOR"
++  "stxvx %x1,%y0"
++  [(set_attr "type" "vecstore")
++   (set_attr "length" "4")])
++
+ ;; VSX moves
+ 
+ ;; The patterns for LE permuted loads and stores come before the general
+@@ -277,9 +331,9 @@
+ (define_insn_and_split "*vsx_le_perm_load_<mode>"
+   [(set (match_operand:VSX_LE 0 "vsx_register_operand" "=<VSa>")
+         (match_operand:VSX_LE 1 "memory_operand" "Z"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   [(set (match_dup 2)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -300,9 +354,9 @@
+ (define_insn_and_split "*vsx_le_perm_load_<mode>"
+   [(set (match_operand:VSX_W 0 "vsx_register_operand" "=<VSa>")
+         (match_operand:VSX_W 1 "memory_operand" "Z"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   [(set (match_dup 2)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -325,9 +379,9 @@
+ (define_insn_and_split "*vsx_le_perm_load_v8hi"
+   [(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")
+         (match_operand:V8HI 1 "memory_operand" "Z"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   [(set (match_dup 2)
+         (vec_select:V8HI
+           (match_dup 1)
+@@ -354,9 +408,9 @@
+ (define_insn_and_split "*vsx_le_perm_load_v16qi"
+   [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
+         (match_operand:V16QI 1 "memory_operand" "Z"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   [(set (match_dup 2)
+         (vec_select:V16QI
+           (match_dup 1)
+@@ -391,7 +445,7 @@
+ (define_insn "*vsx_le_perm_store_<mode>"
+   [(set (match_operand:VSX_LE 0 "memory_operand" "=Z")
+         (match_operand:VSX_LE 1 "vsx_register_operand" "+<VSa>"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+   [(set_attr "type" "vecstore")
+    (set_attr "length" "12")])
+@@ -399,7 +453,7 @@
+ (define_split
+   [(set (match_operand:VSX_LE 0 "memory_operand" "")
+         (match_operand:VSX_LE 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && !reload_completed"
+   [(set (match_dup 2)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -418,7 +472,7 @@
+ (define_split
+   [(set (match_operand:VSX_LE 0 "memory_operand" "")
+         (match_operand:VSX_LE 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && reload_completed"
+   [(set (match_dup 1)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -436,7 +490,7 @@
+ (define_insn "*vsx_le_perm_store_<mode>"
+   [(set (match_operand:VSX_W 0 "memory_operand" "=Z")
+         (match_operand:VSX_W 1 "vsx_register_operand" "+<VSa>"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+   [(set_attr "type" "vecstore")
+    (set_attr "length" "12")])
+@@ -444,7 +498,7 @@
+ (define_split
+   [(set (match_operand:VSX_W 0 "memory_operand" "")
+         (match_operand:VSX_W 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && !reload_completed"
+   [(set (match_dup 2)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -465,7 +519,7 @@
+ (define_split
+   [(set (match_operand:VSX_W 0 "memory_operand" "")
+         (match_operand:VSX_W 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && reload_completed"
+   [(set (match_dup 1)
+         (vec_select:<MODE>
+           (match_dup 1)
+@@ -486,7 +540,7 @@
+ (define_insn "*vsx_le_perm_store_v8hi"
+   [(set (match_operand:V8HI 0 "memory_operand" "=Z")
+         (match_operand:V8HI 1 "vsx_register_operand" "+wa"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+   [(set_attr "type" "vecstore")
+    (set_attr "length" "12")])
+@@ -494,7 +548,7 @@
+ (define_split
+   [(set (match_operand:V8HI 0 "memory_operand" "")
+         (match_operand:V8HI 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && !reload_completed"
+   [(set (match_dup 2)
+         (vec_select:V8HI
+           (match_dup 1)
+@@ -519,7 +573,7 @@
+ (define_split
+   [(set (match_operand:V8HI 0 "memory_operand" "")
+         (match_operand:V8HI 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && reload_completed"
+   [(set (match_dup 1)
+         (vec_select:V8HI
+           (match_dup 1)
+@@ -546,7 +600,7 @@
+ (define_insn "*vsx_le_perm_store_v16qi"
+   [(set (match_operand:V16QI 0 "memory_operand" "=Z")
+         (match_operand:V16QI 1 "vsx_register_operand" "+wa"))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR"
+   "#"
+   [(set_attr "type" "vecstore")
+    (set_attr "length" "12")])
+@@ -554,7 +608,7 @@
+ (define_split
+   [(set (match_operand:V16QI 0 "memory_operand" "")
+         (match_operand:V16QI 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && !reload_completed"
+   [(set (match_dup 2)
+         (vec_select:V16QI
+           (match_dup 1)
+@@ -587,7 +641,7 @@
+ (define_split
+   [(set (match_operand:V16QI 0 "memory_operand" "")
+         (match_operand:V16QI 1 "vsx_register_operand" ""))]
+-  "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !TARGET_P9_VECTOR && reload_completed"
+   [(set (match_dup 1)
+         (vec_select:V16QI
+           (match_dup 1)
+@@ -623,10 +677,109 @@
+                      (const_int 6) (const_int 7)])))]
+   "")
+ 
++;; Little endian word swapping for 128-bit types that are either scalars or the
++;; special V1TI container class, which it is not appropriate to use vec_select
++;; for the type.
++(define_insn "*vsx_le_permute_<mode>"
++  [(set (match_operand:VSX_LE_128 0 "nonimmediate_operand" "=<VSa>,<VSa>,Z")
++	(rotate:VSX_LE_128
++	 (match_operand:VSX_LE_128 1 "input_operand" "<VSa>,Z,<VSa>")
++	 (const_int 64)))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "@
++   xxpermdi %x0,%x1,%x1,2
++   lxvd2x %x0,%y1
++   stxvd2x %x1,%y0"
++  [(set_attr "length" "4")
++   (set_attr "type" "vecperm,vecload,vecstore")])
+ 
++(define_insn_and_split "*vsx_le_undo_permute_<mode>"
++  [(set (match_operand:VSX_LE_128 0 "vsx_register_operand" "=<VSa>,<VSa>")
++	(rotate:VSX_LE_128
++	 (rotate:VSX_LE_128
++	  (match_operand:VSX_LE_128 1 "vsx_register_operand" "0,<VSa>")
++	  (const_int 64))
++	 (const_int 64)))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "@
++   #
++   xxlor %x0,%x1"
++  ""
++  [(set (match_dup 0) (match_dup 1))]
++{
++  if (reload_completed && REGNO (operands[0]) == REGNO (operands[1]))
++    {
++      emit_note (NOTE_INSN_DELETED);
++      DONE;
++    }
++}
++  [(set_attr "length" "0,4")
++   (set_attr "type" "vecsimple")])
++
++(define_insn_and_split "*vsx_le_perm_load_<mode>"
++  [(set (match_operand:VSX_LE_128 0 "vsx_register_operand" "=<VSa>")
++        (match_operand:VSX_LE_128 1 "memory_operand" "Z"))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "#"
++  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  [(set (match_dup 2)
++	(rotate:VSX_LE_128 (match_dup 1)
++			   (const_int 64)))
++   (set (match_dup 0)
++	(rotate:VSX_LE_128 (match_dup 2)
++			   (const_int 64)))]
++  "
++{
++  operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])
++                                       : operands[0];
++}
++  "
++  [(set_attr "type" "vecload")
++   (set_attr "length" "8")])
++
++(define_insn "*vsx_le_perm_store_<mode>"
++  [(set (match_operand:VSX_LE_128 0 "memory_operand" "=Z")
++        (match_operand:VSX_LE_128 1 "vsx_register_operand" "+<VSa>"))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX"
++  "#"
++  [(set_attr "type" "vecstore")
++   (set_attr "length" "12")])
++
++(define_split
++  [(set (match_operand:VSX_LE_128 0 "memory_operand" "")
++        (match_operand:VSX_LE_128 1 "vsx_register_operand" ""))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && !reload_completed"
++  [(set (match_dup 2)
++	(rotate:VSX_LE_128 (match_dup 1)
++			   (const_int 64)))
++   (set (match_dup 0)
++	(rotate:VSX_LE_128 (match_dup 2)
++			   (const_int 64)))]
++{
++  operands[2] = can_create_pseudo_p () ? gen_reg_rtx_and_attrs (operands[0])
++                                       : operands[0];
++})
++
++;; The post-reload split requires that we re-permute the source
++;; register in case it is still live.
++(define_split
++  [(set (match_operand:VSX_LE_128 0 "memory_operand" "")
++        (match_operand:VSX_LE_128 1 "vsx_register_operand" ""))]
++  "!BYTES_BIG_ENDIAN && TARGET_VSX && reload_completed"
++  [(set (match_dup 1)
++	(rotate:VSX_LE_128 (match_dup 1)
++			   (const_int 64)))
++   (set (match_dup 0)
++	(rotate:VSX_LE_128 (match_dup 1)
++			   (const_int 64)))
++   (set (match_dup 1)
++	(rotate:VSX_LE_128 (match_dup 1)
++			   (const_int 64)))]
++  "")
++
+ (define_insn "*vsx_mov<mode>"
+-  [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?<VSa>,?<VSa>,wQ,?&r,??Y,??r,??r,<VSr>,?<VSa>,*r,v,wZ, v")
+-	(match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,<VSa>,Z,<VSa>,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]
++  [(set (match_operand:VSX_M 0 "nonimmediate_operand" "=Z,<VSr>,<VSr>,?Z,?<VSa>,?<VSa>,r,we,wQ,?&r,??Y,??r,??r,<VSr>,?<VSa>,*r,v,wZ,v")
++	(match_operand:VSX_M 1 "input_operand" "<VSr>,Z,<VSr>,<VSa>,Z,<VSa>,we,b,r,wQ,r,Y,r,j,j,j,W,v,wZ"))]
+   "VECTOR_MEM_VSX_P (<MODE>mode)
+    && (register_operand (operands[0], <MODE>mode) 
+        || register_operand (operands[1], <MODE>mode))"
+@@ -633,15 +786,15 @@
+ {
+   return rs6000_output_move_128bit (operands);
+ }
+-  [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,load,store,store,load, *,vecsimple,vecsimple,*, *,vecstore,vecload")
+-   (set_attr "length" "4,4,4,4,4,4,12,12,12,12,16,4,4,*,16,4,4")])
++  [(set_attr "type" "vecstore,vecload,vecsimple,vecstore,vecload,vecsimple,mffgpr,mftgpr,load,store,store,load, *,vecsimple,vecsimple,*, *,vecstore,vecload")
++   (set_attr "length" "4,4,4,4,4,4,8,4,12,12,12,12,16,4,4,*,16,4,4")])
+ 
+ ;; Unlike other VSX moves, allow the GPRs even for reloading, since a normal
+ ;; use of TImode is for unions.  However for plain data movement, slightly
+ ;; favor the vector loads
+ (define_insn "*vsx_movti_64bit"
+-  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v,v,wZ,wQ,&r,Y,r,r,?r")
+-	(match_operand:TI 1 "input_operand" "wa,Z,wa,O,W,wZ,v,r,wQ,r,Y,r,n"))]
++  [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,r,we,v,v,wZ,wQ,&r,Y,r,r,?r")
++	(match_operand:TI 1 "input_operand" "wa,Z,wa,O,we,b,W,wZ,v,r,wQ,r,Y,r,n"))]
+   "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (TImode)
+    && (register_operand (operands[0], TImode) 
+        || register_operand (operands[1], TImode))"
+@@ -648,8 +801,8 @@
+ {
+   return rs6000_output_move_128bit (operands);
+ }
+-  [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,vecsimple,vecstore,vecload,store,load,store,load,*,*")
+-   (set_attr "length" "4,4,4,4,16,4,4,8,8,8,8,8,8")])
++  [(set_attr "type" "vecstore,vecload,vecsimple,vecsimple,mffgpr,mftgpr,vecsimple,vecstore,vecload,store,load,store,load,*,*")
++   (set_attr "length" "4,4,4,4,8,4,16,4,4,8,8,8,8,8,8")])
+ 
+ (define_insn "*vsx_movti_32bit"
+   [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,wa,wa,wa,v, v,wZ,Q,Y,????r,????r,????r,r")
+@@ -780,6 +933,7 @@
+   emit_insn (gen_vsx_extract_v2di (op4, op2, GEN_INT (1)));
+   emit_insn (gen_muldi3 (op3, op3, op4));
+   emit_insn (gen_vsx_concat_v2di (op0, op5, op3));
++  DONE;
+ }"
+   [(set_attr "type" "mul")])
+ 
+@@ -817,6 +971,7 @@
+   emit_insn (gen_vsx_extract_v2di (op4, op2, GEN_INT (1)));
+   emit_insn (gen_divdi3 (op3, op3, op4));
+   emit_insn (gen_vsx_concat_v2di (op0, op5, op3));
++  DONE;
+ }"
+   [(set_attr "type" "div")])
+ 
+@@ -844,6 +999,7 @@
+   emit_insn (gen_vsx_extract_v2di (op4, op2, GEN_INT (1)));
+   emit_insn (gen_udivdi3 (op3, op3, op4));
+   emit_insn (gen_vsx_concat_v2di (op0, op5, op3));
++  DONE;
+ }"
+   [(set_attr "type" "div")])
+ 
+@@ -1642,7 +1798,7 @@
+         (vec_select:VSX_LE
+           (match_operand:VSX_LE 1 "memory_operand" "Z")
+           (parallel [(const_int 1) (const_int 0)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode) && !TARGET_P9_VECTOR"
+   "lxvd2x %x0,%y1"
+   [(set_attr "type" "vecload")])
+ 
+@@ -1652,7 +1808,7 @@
+           (match_operand:VSX_W 1 "memory_operand" "Z")
+           (parallel [(const_int 2) (const_int 3)
+                      (const_int 0) (const_int 1)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode) && !TARGET_P9_VECTOR"
+   "lxvd2x %x0,%y1"
+   [(set_attr "type" "vecload")])
+ 
+@@ -1664,7 +1820,7 @@
+                      (const_int 6) (const_int 7)
+                      (const_int 0) (const_int 1)
+                      (const_int 2) (const_int 3)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode) && !TARGET_P9_VECTOR"
+   "lxvd2x %x0,%y1"
+   [(set_attr "type" "vecload")])
+ 
+@@ -1680,7 +1836,7 @@
+                      (const_int 2) (const_int 3)
+                      (const_int 4) (const_int 5)
+                      (const_int 6) (const_int 7)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode) && !TARGET_P9_VECTOR"
+   "lxvd2x %x0,%y1"
+   [(set_attr "type" "vecload")])
+ 
+@@ -1691,7 +1847,7 @@
+         (vec_select:VSX_LE
+           (match_operand:VSX_LE 1 "vsx_register_operand" "<VSa>")
+           (parallel [(const_int 1) (const_int 0)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode) && !TARGET_P9_VECTOR"
+   "stxvd2x %x1,%y0"
+   [(set_attr "type" "vecstore")])
+ 
+@@ -1701,7 +1857,7 @@
+           (match_operand:VSX_W 1 "vsx_register_operand" "<VSa>")
+           (parallel [(const_int 2) (const_int 3)
+                      (const_int 0) (const_int 1)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (<MODE>mode) && !TARGET_P9_VECTOR"
+   "stxvd2x %x1,%y0"
+   [(set_attr "type" "vecstore")])
+ 
+@@ -1713,7 +1869,7 @@
+                      (const_int 6) (const_int 7)
+                      (const_int 0) (const_int 1)
+                      (const_int 2) (const_int 3)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V8HImode) && !TARGET_P9_VECTOR"
+   "stxvd2x %x1,%y0"
+   [(set_attr "type" "vecstore")])
+ 
+@@ -1729,7 +1885,7 @@
+                      (const_int 2) (const_int 3)
+                      (const_int 4) (const_int 5)
+                      (const_int 6) (const_int 7)])))]
+-  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode)"
++  "!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (V16QImode) && !TARGET_P9_VECTOR"
+   "stxvd2x %x1,%y0"
+   [(set_attr "type" "vecstore")])
+ 
+@@ -1780,11 +1936,11 @@
+ ;; Optimize cases were we can do a simple or direct move.
+ ;; Or see if we can avoid doing the move at all
+ (define_insn "*vsx_extract_<mode>_internal1"
+-  [(set (match_operand:<VS_scalar> 0 "register_operand" "=d,<VS_64reg>,r")
++  [(set (match_operand:<VS_scalar> 0 "register_operand" "=d,<VS_64reg>,r,r")
+ 	(vec_select:<VS_scalar>
+-	 (match_operand:VSX_D 1 "register_operand" "d,<VS_64reg>,<VS_64dm>")
++	 (match_operand:VSX_D 1 "register_operand" "d,<VS_64reg>,<VS_64dm>,<VS_64dm>")
+ 	 (parallel
+-	  [(match_operand:QI 2 "vsx_scalar_64bit" "wD,wD,wD")])))]
++	  [(match_operand:QI 2 "vsx_scalar_64bit" "wD,wD,wD,wL")])))]
+   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_POWERPC64 && TARGET_DIRECT_MOVE"
+ {
+   int op0_regno = REGNO (operands[0]);
+@@ -1794,7 +1950,9 @@
+     return "nop";
+ 
+   if (INT_REGNO_P (op0_regno))
+-    return "mfvsrd %0,%x1";
++    return ((INTVAL (operands[2]) == VECTOR_ELEMENT_MFVSRLD_64BIT)
++	    ? "mfvsrdl %0,%x1"
++	    : "mfvsrd %0,%x1");
+ 
+   if (FP_REGNO_P (op0_regno) && FP_REGNO_P (op1_regno))
+     return "fmr %0,%1";
+@@ -1801,7 +1959,7 @@
+ 
+   return "xxlor %x0,%x1,%x1";
+ }
+-  [(set_attr "type" "fp,vecsimple,mftgpr")
++  [(set_attr "type" "fp,vecsimple,mftgpr,mftgpr")
+    (set_attr "length" "4")])
+ 
+ (define_insn "*vsx_extract_<mode>_internal2"
+@@ -2315,7 +2473,7 @@
+    (set (match_operand:VSX_M2 2 "vsx_register_operand" "")
+ 	(mem:VSX_M2 (plus:P (match_dup 0)
+ 			    (match_operand:P 3 "int_reg_operand" ""))))]
+-  "TARGET_VSX && TARGET_P8_FUSION"
++  "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
+   "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"  
+   [(set_attr "length" "8")
+    (set_attr "type" "vecload")])
+@@ -2326,7 +2484,7 @@
+    (set (match_operand:VSX_M2 2 "vsx_register_operand" "")
+ 	(mem:VSX_M2 (plus:P (match_operand:P 3 "int_reg_operand" "")
+ 			    (match_dup 0))))]
+-  "TARGET_VSX && TARGET_P8_FUSION"
++  "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR"
+   "li %0,%1\t\t\t# vector load fusion\;lx<VSX_M2:VSm>x %x2,%0,%3"  
+   [(set_attr "length" "8")
+    (set_attr "type" "vecload")])
+Index: gcc/config/rs6000/rs6000.h
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000.h	(.../ibm/gcc-5-branch)
+@@ -95,6 +95,12 @@
+ #define ASM_CPU_POWER8_SPEC ASM_CPU_POWER7_SPEC
+ #endif
+ 
++#ifdef HAVE_AS_POWER9
++#define ASM_CPU_POWER9_SPEC "-mpower9"
++#else
++#define ASM_CPU_POWER9_SPEC ASM_CPU_POWER8_SPEC
++#endif
++
+ #ifdef HAVE_AS_DCI
+ #define ASM_CPU_476_SPEC "-m476"
+ #else
+@@ -119,6 +125,7 @@
+ %{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
+ %{mcpu=power7: %(asm_cpu_power7)} \
+ %{mcpu=power8: %(asm_cpu_power8)} \
++%{mcpu=power9: %(asm_cpu_power9)} \
+ %{mcpu=a2: -ma2} \
+ %{mcpu=powerpc: -mppc} \
+ %{mcpu=powerpc64le: %(asm_cpu_power8)} \
+@@ -194,6 +201,7 @@
+   { "asm_cpu_power6",		ASM_CPU_POWER6_SPEC },			\
+   { "asm_cpu_power7",		ASM_CPU_POWER7_SPEC },			\
+   { "asm_cpu_power8",		ASM_CPU_POWER8_SPEC },			\
++  { "asm_cpu_power9",		ASM_CPU_POWER9_SPEC },			\
+   { "asm_cpu_476",		ASM_CPU_476_SPEC },			\
+   SUBTARGET_EXTRA_SPECS
+ 
+@@ -403,6 +411,33 @@
+ #define TARGET_DEBUG_TARGET	(rs6000_debug & MASK_DEBUG_TARGET)
+ #define TARGET_DEBUG_BUILTIN	(rs6000_debug & MASK_DEBUG_BUILTIN)
+ 
++/* Helper macros for TFmode.  Quad floating point (TFmode) can be either IBM
++   long double format that uses a pair of doubles, or IEEE 128-bit floating
++   point.  KFmode was added as a way to represent IEEE 128-bit floating point,
++   even if the default for long double is the IBM long double format.
++   Similarly IFmode is the IBM long double format even if the default is IEEE
++   128-bit.  */
++#define FLOAT128_IEEE_P(MODE)						\
++  (((MODE) == TFmode && TARGET_IEEEQUAD)				\
++   || ((MODE) == KFmode))
++
++#define FLOAT128_IBM_P(MODE)						\
++  (((MODE) == TFmode && !TARGET_IEEEQUAD)				\
++   || ((MODE) == IFmode))
++
++/* Helper macros to say whether a 128-bit floating point type can go in a
++   single vector register, or whether it needs paired scalar values.  */
++#define FLOAT128_VECTOR_P(MODE) (TARGET_FLOAT128 && FLOAT128_IEEE_P (MODE))
++
++#define FLOAT128_2REG_P(MODE)						\
++  (FLOAT128_IBM_P (MODE)						\
++   || ((MODE) == TDmode)						\
++   || (!TARGET_FLOAT128 && FLOAT128_IEEE_P (MODE)))
++
++/* Return true for floating point that does not use a vector register.  */
++#define SCALAR_FLOAT_MODE_NOT_VECTOR_P(MODE)				\
++  (SCALAR_FLOAT_MODE_P (MODE) && !FLOAT128_VECTOR_P (MODE))
++
+ /* Describe the vector unit used for arithmetic operations.  */
+ extern enum rs6000_vector rs6000_vector_unit[];
+ 
+@@ -482,6 +517,10 @@
+    with scalar instructions.  */
+ #define VECTOR_ELEMENT_SCALAR_64BIT	((BYTES_BIG_ENDIAN) ? 0 : 1)
+ 
++/* Element number of the 64-bit value in a 128-bit vector that can be accessed
++   with the ISA 3.0 MFVSRLD instructions.  */
++#define VECTOR_ELEMENT_MFVSRLD_64BIT	((BYTES_BIG_ENDIAN) ? 1 : 0)
++
+ /* Alignment options for fields in structures for sub-targets following
+    AIX-like ABI.
+    ALIGN_POWER word-aligns FP doubles (default AIX ABI).
+@@ -531,10 +570,15 @@
+ #define TARGET_FCFIDUS	TARGET_POPCNTD
+ #define TARGET_FCTIDUZ	TARGET_POPCNTD
+ #define TARGET_FCTIWUZ	TARGET_POPCNTD
++#define TARGET_CTZ	TARGET_MODULO
++#define TARGET_EXTSWSLI	(TARGET_MODULO && TARGET_POWERPC64)
++#define TARGET_MADDLD	(TARGET_MODULO && TARGET_POWERPC64)
+ 
+ #define TARGET_XSCVDPSPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
+ #define TARGET_XSCVSPDPN	(TARGET_DIRECT_MOVE || TARGET_P8_VECTOR)
+ #define TARGET_VADDUQM		(TARGET_P8_VECTOR && TARGET_POWERPC64)
++#define TARGET_DIRECT_MOVE_128	(TARGET_P9_VECTOR && TARGET_DIRECT_MOVE \
++				 && TARGET_POWERPC64)
+ 
+ /* Byte/char syncs were added as phased in for ISA 2.06B, but are not present
+    in power7, so conditionalize them on p8 features.  TImode syncs need quad
+@@ -667,6 +711,22 @@
+ 			 && TARGET_DOUBLE_FLOAT \
+ 			 && (TARGET_PPC_GFXOPT || VECTOR_UNIT_VSX_P (DFmode)))
+ 
++/* Conditions to allow TOC fusion for loading/storing integers.  */
++#define TARGET_TOC_FUSION_INT	(TARGET_P8_FUSION			\
++				 && TARGET_TOC_FUSION			\
++				 && (TARGET_CMODEL != CMODEL_SMALL)	\
++				 && TARGET_POWERPC64)
++
++/* Conditions to allow TOC fusion for loading/storing floating point.  */
++#define TARGET_TOC_FUSION_FP	(TARGET_P9_FUSION			\
++				 && TARGET_TOC_FUSION			\
++				 && (TARGET_CMODEL != CMODEL_SMALL)	\
++				 && TARGET_POWERPC64			\
++				 && TARGET_HARD_FLOAT			\
++				 && TARGET_FPRS				\
++				 && TARGET_SINGLE_FLOAT			\
++				 && TARGET_DOUBLE_FLOAT)
++
+ /* Whether the various reciprocal divide/square root estimate instructions
+    exist, and whether we should automatically generate code for the instruction
+    by default.  */
+@@ -889,11 +949,10 @@
+    aligned to 4 or 8 bytes.  */
+ #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)				\
+   (STRICT_ALIGNMENT							\
+-   || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode	\
+-	|| (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode)	\
+-       && (ALIGN) < 32)							\
++   || (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32)		\
+    || (!TARGET_EFFICIENT_UNALIGNED_VSX                                  \
+-       && (VECTOR_MODE_P ((MODE)) && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))))
++       && ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE))		\
++	   && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))))
+ 
+ 
+ /* Standard register usage.  */
+@@ -1175,7 +1234,7 @@
+    ? V2DFmode								\
+    : TARGET_E500_DOUBLE && ((MODE) == VOIDmode || (MODE) == DFmode)	\
+    ? DFmode								\
+-   : !TARGET_E500_DOUBLE && (MODE) == TFmode && FP_REGNO_P (REGNO)	\
++   : !TARGET_E500_DOUBLE && FLOAT128_IBM_P (MODE) && FP_REGNO_P (REGNO)	\
+    ? DFmode								\
+    : !TARGET_E500_DOUBLE && (MODE) == TDmode && FP_REGNO_P (REGNO)	\
+    ? DImode								\
+@@ -1186,19 +1245,23 @@
+      && (GET_MODE_SIZE (MODE) > 4)					\
+      && INT_REGNO_P (REGNO)) ? 1 : 0)					\
+    || (TARGET_VSX && FP_REGNO_P (REGNO)					\
+-       && GET_MODE_SIZE (MODE) > 8 && ((MODE) != TDmode) 		\
+-       && ((MODE) != TFmode)))
++       && GET_MODE_SIZE (MODE) > 8 && !FLOAT128_2REG_P (MODE)))
+ 
+ #define VSX_VECTOR_MODE(MODE)		\
+ 	 ((MODE) == V4SFmode		\
+ 	  || (MODE) == V2DFmode)	\
+ 
+-#define ALTIVEC_VECTOR_MODE(MODE)	\
+-	 ((MODE) == V16QImode		\
+-	  || (MODE) == V8HImode		\
+-	  || (MODE) == V4SFmode		\
+-	  || (MODE) == V4SImode)
++/* Note KFmode and possibly TFmode (i.e. IEEE 128-bit floating point) are not
++   really a vector, but we want to treat it as a vector for moves, and
++   such.  */
+ 
++#define ALTIVEC_VECTOR_MODE(MODE)					\
++  ((MODE) == V16QImode							\
++   || (MODE) == V8HImode						\
++   || (MODE) == V4SFmode						\
++   || (MODE) == V4SImode						\
++   || FLOAT128_VECTOR_P (MODE))
++
+ #define ALTIVEC_OR_VSX_VECTOR_MODE(MODE)				\
+   (ALTIVEC_VECTOR_MODE (MODE) || VSX_VECTOR_MODE (MODE)			\
+    || (MODE) == V2DImode || (MODE) == V1TImode)
+@@ -1224,12 +1287,19 @@
+ 
+    PTImode cannot tie with other modes because PTImode is restricted to even
+    GPR registers, and TImode can go in any GPR as well as VSX registers (PR
+-   57744).  */
++   57744).
++
++   Altivec/VSX vector tests were moved ahead of scalar float mode, so that IEEE
++   128-bit floating point on VSX systems ties with other vectors.  */
+ #define MODES_TIEABLE_P(MODE1, MODE2)		\
+   ((MODE1) == PTImode				\
+    ? (MODE2) == PTImode				\
+    : (MODE2) == PTImode				\
+    ? 0						\
++   : ALTIVEC_OR_VSX_VECTOR_MODE (MODE1)		\
++   ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2)		\
++   : ALTIVEC_OR_VSX_VECTOR_MODE (MODE2)		\
++   ? 0						\
+    : SCALAR_FLOAT_MODE_P (MODE1)		\
+    ? SCALAR_FLOAT_MODE_P (MODE2)		\
+    : SCALAR_FLOAT_MODE_P (MODE2)		\
+@@ -1242,10 +1312,6 @@
+    ? SPE_VECTOR_MODE (MODE2)			\
+    : SPE_VECTOR_MODE (MODE2)			\
+    ? 0						\
+-   : ALTIVEC_OR_VSX_VECTOR_MODE (MODE1)		\
+-   ? ALTIVEC_OR_VSX_VECTOR_MODE (MODE2)		\
+-   : ALTIVEC_OR_VSX_VECTOR_MODE (MODE2)		\
+-   ? 0						\
+    : 1)
+ 
+ /* Post-reload, we can't use any new AltiVec registers, as we already
+@@ -1295,6 +1361,9 @@
+ /* Place to put static chain when calling a function that requires it.  */
+ #define STATIC_CHAIN_REGNUM 11
+ 
++/* Base register for access to thread local storage variables.  */
++#define TLS_REGNUM ((TARGET_64BIT) ? 13 : 2)
++
+ 
+ /* Define the classes of registers for register constraints in the
+    machine description.  Also define ranges of constants.
+@@ -1463,7 +1532,9 @@
+   RS6000_CONSTRAINT_f,		/* fpr registers for single values */
+   RS6000_CONSTRAINT_v,		/* Altivec registers */
+   RS6000_CONSTRAINT_wa,		/* Any VSX register */
++  RS6000_CONSTRAINT_wb,		/* Altivec register if ISA 3.0 vector. */
+   RS6000_CONSTRAINT_wd,		/* VSX register for V2DF */
++  RS6000_CONSTRAINT_we,		/* VSX register if ISA 3.0 vector. */
+   RS6000_CONSTRAINT_wf,		/* VSX register for V4SF */
+   RS6000_CONSTRAINT_wg,		/* FPR register for -mmfpgpr */
+   RS6000_CONSTRAINT_wh,		/* FPR register for direct moves.  */
+@@ -1472,6 +1543,9 @@
+   RS6000_CONSTRAINT_wk,		/* FPR/VSX register for DFmode direct moves. */
+   RS6000_CONSTRAINT_wl,		/* FPR register for LFIWAX */
+   RS6000_CONSTRAINT_wm,		/* VSX register for direct move */
++  RS6000_CONSTRAINT_wo,		/* VSX register for power9 vector.  */
++  RS6000_CONSTRAINT_wp,		/* VSX reg for IEEE 128-bit fp TFmode. */
++  RS6000_CONSTRAINT_wq,		/* VSX reg for IEEE 128-bit fp KFmode.  */
+   RS6000_CONSTRAINT_wr,		/* GPR register if 64-bit  */
+   RS6000_CONSTRAINT_ws,		/* VSX register for DF */
+   RS6000_CONSTRAINT_wt,		/* VSX register for TImode */
+@@ -1629,8 +1703,11 @@
+ #define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA
+ 
+ /* Offset from the argument pointer register value to the top of
+-   stack.  This is different from FIRST_PARM_OFFSET because of the
+-   register save area.  */
++   stack.  Note that we can't use FRAME_POINTER_CFA_OFFSET because
++   the soft frame pointer (which points to the local var area) has an
++   offset to the top of the stack depending on the size of the
++   register save area.  The size of the register save area isn't
++   known at the time FRAME_POINTER_CFA_OFFSET is first used.  */
+ #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
+ 
+ /* Define this if stack space is still allocated for a parameter passed
+@@ -1775,6 +1852,7 @@
+ 				   GPR space (darwin64) */
+   int named;			/* false for varargs params */
+   int escapes;			/* if function visible outside tu */
++  int libcall;			/* If this is a compiler generated call.  */
+ } CUMULATIVE_ARGS;
+ 
+ /* Initialize a variable CUM of type CUMULATIVE_ARGS
+@@ -1954,7 +2032,7 @@
+ 				    && ((n) & 1) == 0)
+ 
+ #define EASY_VECTOR_MSB(n,mode)						\
+-  (((unsigned HOST_WIDE_INT)n) ==					\
++  ((((unsigned HOST_WIDE_INT) (n)) & GET_MODE_MASK (mode)) ==		\
+    ((((unsigned HOST_WIDE_INT)GET_MODE_MASK (mode)) + 1) >> 1))
+ 
+ 
+@@ -2061,8 +2139,12 @@
+ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
+   ((VALUE) = ((MODE) == SImode ? 32 : 64), 1)
+ 
+-/* The CTZ patterns return -1 for input of zero.  */
+-#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = -1, 1)
++/* The CTZ patterns that are implemented in terms of CLZ return -1 for input of
++   zero.  The hardware instructions added in Power9 return 32 or 64.  */
++#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)				\
++  ((!TARGET_CTZ)							\
++   ? ((VALUE) = -1, 1)							\
++   : ((VALUE) = ((MODE) == SImode ? 32 : 64), 1))
+ 
+ /* Specify the machine mode that pointers have.
+    After generation of rtl, the compiler makes no further distinction
+@@ -2716,6 +2798,8 @@
+   RS6000_BTI_dfloat64,		 /* dfloat64_type_node */
+   RS6000_BTI_dfloat128,		 /* dfloat128_type_node */
+   RS6000_BTI_void,	         /* void_type_node */
++  RS6000_BTI_ieee128_float,	 /* ieee 128-bit floating point */
++  RS6000_BTI_ibm128_float,	 /* IBM 128-bit floating point */
+   RS6000_BTI_MAX
+ };
+ 
+@@ -2770,6 +2854,8 @@
+ #define dfloat64_type_internal_node	 (rs6000_builtin_types[RS6000_BTI_dfloat64])
+ #define dfloat128_type_internal_node	 (rs6000_builtin_types[RS6000_BTI_dfloat128])
+ #define void_type_internal_node		 (rs6000_builtin_types[RS6000_BTI_void])
++#define ieee128_float_type_node		 (rs6000_builtin_types[RS6000_BTI_ieee128_float])
++#define ibm128_float_type_node		 (rs6000_builtin_types[RS6000_BTI_ibm128_float])
+ 
+ extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX];
+ extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT];
+Index: gcc/config/rs6000/altivec.md
+===================================================================
+--- a/src/gcc/config/rs6000/altivec.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/altivec.md	(.../ibm/gcc-5-branch)
+@@ -168,10 +168,27 @@
+ (define_mode_iterator V [V4SI V8HI V16QI V4SF])
+ ;; Vec modes for move/logical/permute ops, include vector types for move not
+ ;; otherwise handled by altivec (v2df, v2di, ti)
+-(define_mode_iterator VM [V4SI V8HI V16QI V4SF V2DF V2DI V1TI TI])
++(define_mode_iterator VM [V4SI
++			  V8HI
++			  V16QI
++			  V4SF
++			  V2DF
++			  V2DI
++			  V1TI
++			  TI
++			  (KF "FLOAT128_VECTOR_P (KFmode)")
++			  (TF "FLOAT128_VECTOR_P (TFmode)")])
+ 
+ ;; Like VM, except don't do TImode
+-(define_mode_iterator VM2 [V4SI V8HI V16QI V4SF V2DF V2DI V1TI])
++(define_mode_iterator VM2 [V4SI
++			   V8HI
++			   V16QI
++			   V4SF
++			   V2DF
++			   V2DI
++			   V1TI
++			   (KF "FLOAT128_VECTOR_P (KFmode)")
++			   (TF "FLOAT128_VECTOR_P (TFmode)")])
+ 
+ (define_mode_attr VI_char [(V2DI "d") (V4SI "w") (V8HI "h") (V16QI "b")])
+ (define_mode_attr VI_scalar [(V2DI "DI") (V4SI "SI") (V8HI "HI") (V16QI "QI")])
+@@ -295,6 +312,47 @@
+   operands[4] = gen_rtx_PLUS (op_mode, operands[0], operands[0]);
+ })
+ 
++(define_split
++  [(set (match_operand:VM 0 "altivec_register_operand" "")
++	(match_operand:VM 1 "easy_vector_constant_vsldoi" ""))]
++  "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode) && can_create_pseudo_p ()"
++  [(set (match_dup 2) (match_dup 3))
++   (set (match_dup 4) (match_dup 5))
++   (set (match_dup 0)
++        (unspec:VM [(match_dup 2)
++		    (match_dup 4)
++		    (match_dup 6)]
++		   UNSPEC_VSLDOI))]
++{
++  rtx op1 = operands[1];
++  int elt = (BYTES_BIG_ENDIAN) ? 0 : GET_MODE_NUNITS (<MODE>mode) - 1;
++  HOST_WIDE_INT val = const_vector_elt_as_int (op1, elt);
++  rtx rtx_val = GEN_INT (val);
++  int shift = vspltis_shifted (op1);
++  int nunits = GET_MODE_NUNITS (<MODE>mode);
++  int i;
++
++  gcc_assert (shift != 0);
++  operands[2] = gen_reg_rtx (<MODE>mode);
++  operands[3] = gen_rtx_CONST_VECTOR (<MODE>mode, rtvec_alloc (nunits));
++  operands[4] = gen_reg_rtx (<MODE>mode);
++
++  if (shift < 0)
++    {
++      operands[5] = CONSTM1_RTX (<MODE>mode);
++      operands[6] = GEN_INT (-shift);
++    }
++  else
++    {
++      operands[5] = CONST0_RTX (<MODE>mode);
++      operands[6] = GEN_INT (shift);
++    }
++
++  /* Populate the constant vectors.  */
++  for (i = 0; i < nunits; i++)
++    XVECEXP (operands[3], 0, i) = rtx_val;
++})
++
+ (define_insn "get_vrsave_internal"
+   [(set (match_operand:SI 0 "register_operand" "=r")
+ 	(unspec:SI [(reg:SI 109)] UNSPEC_GET_VRSAVE))]
+@@ -1882,10 +1940,10 @@
+   [(set_attr "type" "vecfloat")])
+ 
+ (define_expand "altivec_vperm_<mode>"
+-  [(set (match_operand:VM 0 "register_operand" "=v")
+-	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
+-		    (match_operand:VM 2 "register_operand" "v")
+-		    (match_operand:V16QI 3 "register_operand" "v")]
++  [(set (match_operand:VM 0 "register_operand" "")
++	(unspec:VM [(match_operand:VM 1 "register_operand" "")
++		    (match_operand:VM 2 "register_operand" "")
++		    (match_operand:V16QI 3 "register_operand" "")]
+ 		   UNSPEC_VPERM))]
+   "TARGET_ALTIVEC"
+ {
+@@ -1896,21 +1954,40 @@
+     }
+ })
+ 
++;; Slightly prefer vperm, since the target does not overlap the source
+ (define_insn "*altivec_vperm_<mode>_internal"
+-  [(set (match_operand:VM 0 "register_operand" "=v")
+-	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
+-		    (match_operand:VM 2 "register_operand" "v")
+-		    (match_operand:V16QI 3 "register_operand" "v")]
++  [(set (match_operand:VM 0 "register_operand" "=v,?wo,?&wo")
++	(unspec:VM [(match_operand:VM 1 "register_operand" "v,0,wo")
++		    (match_operand:VM 2 "register_operand" "v,wo,wo")
++		    (match_operand:V16QI 3 "register_operand" "v,wo,wo")]
+ 		   UNSPEC_VPERM))]
+   "TARGET_ALTIVEC"
+-  "vperm %0,%1,%2,%3"
+-  [(set_attr "type" "vecperm")])
++  "@
++   vperm %0,%1,%2,%3
++   xxperm %x0,%x2,%x3
++   xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3"
++  [(set_attr "type" "vecperm")
++   (set_attr "length" "4,4,8")])
+ 
++(define_insn "altivec_vperm_v8hiv16qi"
++  [(set (match_operand:V16QI 0 "register_operand" "=v,?wo,?&wo")
++	(unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v,0,wo")
++   	               (match_operand:V8HI 2 "register_operand" "v,wo,wo")
++		       (match_operand:V16QI 3 "register_operand" "v,wo,wo")]
++		   UNSPEC_VPERM))]
++  "TARGET_ALTIVEC"
++  "@
++   vperm %0,%1,%2,%3
++   xxperm %x0,%x2,%x3
++   xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3"
++  [(set_attr "type" "vecperm")
++   (set_attr "length" "4,4,8")])
++
+ (define_expand "altivec_vperm_<mode>_uns"
+-  [(set (match_operand:VM 0 "register_operand" "=v")
+-	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
+-		    (match_operand:VM 2 "register_operand" "v")
+-		    (match_operand:V16QI 3 "register_operand" "v")]
++  [(set (match_operand:VM 0 "register_operand" "")
++	(unspec:VM [(match_operand:VM 1 "register_operand" "")
++		    (match_operand:VM 2 "register_operand" "")
++		    (match_operand:V16QI 3 "register_operand" "")]
+ 		   UNSPEC_VPERM_UNS))]
+   "TARGET_ALTIVEC"
+ {
+@@ -1922,14 +1999,18 @@
+ })
+ 
+ (define_insn "*altivec_vperm_<mode>_uns_internal"
+-  [(set (match_operand:VM 0 "register_operand" "=v")
+-	(unspec:VM [(match_operand:VM 1 "register_operand" "v")
+-		    (match_operand:VM 2 "register_operand" "v")
+-		    (match_operand:V16QI 3 "register_operand" "v")]
++  [(set (match_operand:VM 0 "register_operand" "=v,?wo,?&wo")
++	(unspec:VM [(match_operand:VM 1 "register_operand" "v,0,wo")
++		    (match_operand:VM 2 "register_operand" "v,wo,wo")
++		    (match_operand:V16QI 3 "register_operand" "v,wo,wo")]
+ 		   UNSPEC_VPERM_UNS))]
+   "TARGET_ALTIVEC"
+-  "vperm %0,%1,%2,%3"
+-  [(set_attr "type" "vecperm")])
++  "@
++   vperm %0,%1,%2,%3
++   xxperm %x0,%x2,%x3
++   xxlor %x0,%x1,%x1\t\t# xxperm fusion\;xxperm %x0,%x2,%x3"
++  [(set_attr "type" "vecperm")
++   (set_attr "length" "4,4,8")])
+ 
+ (define_expand "vec_permv16qi"
+   [(set (match_operand:V16QI 0 "register_operand" "")
+@@ -3496,3 +3577,32 @@
+ 				  (match_dup 3)]
+ 				 UNSPEC_BCD_ADD_SUB)
+ 		    (match_dup 4)))])])
++
++
++;; Return constant 0x80000000000000000000000000000000 in an Altivec register.
++
++(define_expand "altivec_high_bit"
++  [(set (match_dup 1)
++	(vec_duplicate:V16QI (const_int 7)))
++   (set (match_dup 2)
++	(ashift:V16QI (match_dup 1)
++		      (match_dup 1)))
++   (set (match_dup 3)
++	(match_dup 4))
++   (set (match_operand:V16QI 0 "register_operand" "")
++	(unspec:V16QI [(match_dup 2)
++		       (match_dup 3)
++		       (const_int 15)] UNSPEC_VSLDOI))]
++  "TARGET_ALTIVEC"
++{
++  if (can_create_pseudo_p ())
++    {
++      operands[1] = gen_reg_rtx (V16QImode);
++      operands[2] = gen_reg_rtx (V16QImode);
++      operands[3] = gen_reg_rtx (V16QImode);
++    }
++  else
++    operands[1] = operands[2] = operands[3] = operands[0];
++
++  operands[4] = CONST0_RTX (V16QImode);
++})
+Index: gcc/config/rs6000/aix61.h
+===================================================================
+--- a/src/gcc/config/rs6000/aix61.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/aix61.h	(.../ibm/gcc-5-branch)
+@@ -80,6 +80,7 @@
+ %{mcpu=power6x: -mpwr6} \
+ %{mcpu=power7: -mpwr7} \
+ %{mcpu=power8: -mpwr8} \
++%{mcpu=power9: -mpwr9} \
+ %{mcpu=powerpc: -mppc} \
+ %{mcpu=rs64a: -mppc} \
+ %{mcpu=603: -m603} \
+Index: gcc/config/rs6000/rs6000.md
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000.md	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000.md	(.../ibm/gcc-5-branch)
+@@ -122,6 +122,7 @@
+    UNSPEC_LFIWAX
+    UNSPEC_LFIWZX
+    UNSPEC_FCTIWUZ
++   UNSPEC_NOP
+    UNSPEC_GRP_END_NOP
+    UNSPEC_P8V_FMRGOW
+    UNSPEC_P8V_MTVSRWZ
+@@ -140,6 +141,12 @@
+    UNSPEC_PACK_128BIT
+    UNSPEC_LSQ
+    UNSPEC_FUSION_GPR
++   UNSPEC_STACK_CHECK
++   UNSPEC_FUSION_P9
++   UNSPEC_FUSION_ADDIS
++   UNSPEC_ROUND_TO_ODD
++   UNSPEC_IEEE128_MOVE
++   UNSPEC_IEEE128_CONVERT
+   ])
+ 
+ ;;
+@@ -157,6 +164,7 @@
+    UNSPECV_NLGR			; non-local goto receiver
+    UNSPECV_MFFS			; Move from FPSCR
+    UNSPECV_MTFSF		; Move to FPSCR Fields
++   UNSPECV_SPLIT_STACK_RETURN   ; A camouflaged return
+   ])
+ 
+ 
+@@ -247,7 +255,7 @@
+    ppc750,ppc7400,ppc7450,
+    ppc403,ppc405,ppc440,ppc476,
+    ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
+-   power4,power5,power6,power7,power8,
++   power4,power5,power6,power7,power8,power9,
+    rs64a,mpccore,cell,ppca2,titan"
+   (const (symbol_ref "rs6000_cpu_attr")))
+ 
+@@ -322,6 +330,9 @@
+ ; QImode or HImode for small atomic ops
+ (define_mode_iterator QHI [QI HI])
+ 
++; QImode, HImode, SImode for fused ops only for GPR loads
++(define_mode_iterator QHSI [QI HI SI])
++
+ ; HImode or SImode for sign extended fusion ops
+ (define_mode_iterator HSI [HI SI])
+ 
+@@ -328,6 +339,19 @@
+ ; SImode or DImode, even if DImode doesn't fit in GPRs.
+ (define_mode_iterator SDI [SI DI])
+ 
++; Types that can be fused with an ADDIS instruction to load or store a GPR
++; register that has reg+offset addressing.
++(define_mode_iterator GPR_FUSION [QI
++				  HI
++				  SI
++				  (DI	"TARGET_POWERPC64")
++				  SF
++				  (DF	"TARGET_POWERPC64")])
++
++; Types that can be fused with an ADDIS instruction to load or store a FPR
++; register that has reg+offset addressing.
++(define_mode_iterator FPR_FUSION [DI SF DF])
++
+ ; The size of a pointer.  Also, the size of the value that a record-condition
+ ; (one with a '.') will compare; and the size used for arithmetic carries.
+ (define_mode_iterator P [(SI "TARGET_32BIT") (DI "TARGET_64BIT")])
+@@ -342,10 +366,11 @@
+    && ((TARGET_FPRS && TARGET_SINGLE_FLOAT) || TARGET_E500_SINGLE)")
+   (DF "TARGET_HARD_FLOAT 
+    && ((TARGET_FPRS && TARGET_DOUBLE_FLOAT) || TARGET_E500_DOUBLE)")
+-  (TF "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
++  (TF "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128")
++  (IF "TARGET_FLOAT128")
++  (KF "TARGET_FLOAT128")
+   (DD "TARGET_DFP")
+   (TD "TARGET_DFP")])
+ 
+@@ -357,6 +382,8 @@
+   (V2SF "TARGET_PAIRED_FLOAT")
+   (V4SF "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V4SFmode)")
+   (V2DF "VECTOR_UNIT_ALTIVEC_OR_VSX_P (V2DFmode)")
++  (KF "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (KFmode)")
++  (TF "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (TFmode)")
+   ])
+ 
+ ; Floating point move iterators to combine binary and decimal moves
+@@ -363,9 +390,14 @@
+ (define_mode_iterator FMOVE32 [SF SD])
+ (define_mode_iterator FMOVE64 [DF DD])
+ (define_mode_iterator FMOVE64X [DI DF DD])
+-(define_mode_iterator FMOVE128 [(TF "!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128")
++(define_mode_iterator FMOVE128 [(TF "TARGET_LONG_DOUBLE_128")
++				(IF "TARGET_LONG_DOUBLE_128")
+ 				(TD "TARGET_HARD_FLOAT && TARGET_FPRS")])
+ 
++(define_mode_iterator FMOVE128_FPR [(TF "FLOAT128_2REG_P (TFmode)")
++				    (IF "FLOAT128_2REG_P (IFmode)")
++				    (TD "TARGET_HARD_FLOAT && TARGET_FPRS")])
++
+ ; Iterators for 128 bit types for direct move
+ (define_mode_iterator FMOVE128_GPR [(TI    "TARGET_VSX_TIMODE")
+ 				    (V16QI "")
+@@ -374,8 +406,14 @@
+ 				    (V4SF  "")
+ 				    (V2DI  "")
+ 				    (V2DF  "")
+-				    (V1TI  "")])
++				    (V1TI  "")
++				    (KF    "")
++				    (TF    "")
++				    (IF    "")])
+ 
++; Iterator for 128-bit VSX types for pack/unpack
++(define_mode_iterator FMOVE128_VSX [V1TI KF])
++
+ ; Whether a floating point move is ok, don't allow SD without hardware FP
+ (define_mode_attr fmove_ok [(SF "")
+ 			    (DF "")
+@@ -392,21 +430,29 @@
+ (define_mode_attr zero_fp [(SF "j")
+ 			   (DF "j")
+ 			   (TF "j")
++			   (IF "j")
++			   (KF "j")
+ 			   (SD "wn")
+ 			   (DD "wn")
+ 			   (TD "wn")])
+ 
+ ; Definitions for load to 32-bit fpr register
+-(define_mode_attr f32_lr [(SF "f")		 (SD "wz")])
+-(define_mode_attr f32_lm [(SF "m")		 (SD "Z")])
+-(define_mode_attr f32_li [(SF "lfs%U1%X1 %0,%1") (SD "lfiwzx %0,%y1")])
+-(define_mode_attr f32_lv [(SF "lxsspx %x0,%y1")	 (SD "lxsiwzx %x0,%y1")])
++(define_mode_attr f32_lr  [(SF "f")		  (SD "wz")])
++(define_mode_attr f32_lr2 [(SF "wb")		  (SD "wn")])
++(define_mode_attr f32_lm  [(SF "m")		  (SD "Z")])
++(define_mode_attr f32_lm2 [(SF "o")		  (SD "wn")])
++(define_mode_attr f32_li  [(SF "lfs%U1%X1 %0,%1") (SD "lfiwzx %0,%y1")])
++(define_mode_attr f32_li2 [(SF "lxssp %0,%1")     (SD "lfiwzx %0,%y1")])
++(define_mode_attr f32_lv  [(SF "lxsspx %x0,%y1")  (SD "lxsiwzx %x0,%y1")])
+ 
+ ; Definitions for store from 32-bit fpr register
+-(define_mode_attr f32_sr [(SF "f")		  (SD "wx")])
+-(define_mode_attr f32_sm [(SF "m")		  (SD "Z")])
+-(define_mode_attr f32_si [(SF "stfs%U0%X0 %1,%0") (SD "stfiwx %1,%y0")])
+-(define_mode_attr f32_sv [(SF "stxsspx %x1,%y0")  (SD "stxsiwzx %x1,%y0")])
++(define_mode_attr f32_sr  [(SF "f")		   (SD "wx")])
++(define_mode_attr f32_sr2 [(SF "wb")		   (SD "wn")])
++(define_mode_attr f32_sm  [(SF "m")		   (SD "Z")])
++(define_mode_attr f32_sm2 [(SF "o")		   (SD "wn")])
++(define_mode_attr f32_si  [(SF "stfs%U0%X0 %1,%0") (SD "stfiwx %1,%y0")])
++(define_mode_attr f32_si2 [(SF "stxssp %1,%0")     (SD "stfiwx %1,%y0")])
++(define_mode_attr f32_sv  [(SF "stxsspx %x1,%y0")  (SD "stxsiwzx %x1,%y0")])
+ 
+ ; Definitions for 32-bit fpr direct move
+ ; At present, the decimal modes are not allowed in the traditional altivec
+@@ -428,6 +474,9 @@
+ ; Definitions for 64-bit use of altivec registers
+ (define_mode_attr f64_av  [(DF "wv") (DD "wn")])
+ 
++; Definitions for 64-bit access to ISA 3.0 (power9) vector
++(define_mode_attr f64_p9  [(DF "wb") (DD "wn")])
++
+ ; These modes do not fit in integer registers in 32-bit mode.
+ ; but on e500v2, the gpr are 64 bit registers
+ (define_mode_iterator DIFD [DI (DF "!TARGET_E500_DOUBLE") DD])
+@@ -438,6 +487,19 @@
+ ; Iterator for just SF/DF
+ (define_mode_iterator SFDF [SF DF])
+ 
++; Iterator for 128-bit floating point that uses the IBM double-double format
++(define_mode_iterator IBM128 [(IF "FLOAT128_IBM_P (IFmode)")
++			      (TF "FLOAT128_IBM_P (TFmode)")])
++
++; Iterator for 128-bit floating point that uses IEEE 128-bit float
++(define_mode_iterator IEEE128 [(KF "FLOAT128_IEEE_P (KFmode)")
++			       (TF "FLOAT128_IEEE_P (TFmode)")])
++
++; Iterator for 128-bit floating point
++(define_mode_iterator FLOAT128 [(KF "TARGET_FLOAT128")
++				(IF "TARGET_FLOAT128")
++				(TF "TARGET_LONG_DOUBLE_128")])
++
+ ; SF/DF suffix for traditional floating instructions
+ (define_mode_attr Ftrad		[(SF "s") (DF "")])
+ 
+@@ -445,7 +507,7 @@
+ (define_mode_attr Fvsx		[(SF "sp") (DF	"dp")])
+ 
+ ; SF/DF constraint for arithmetic on traditional floating point registers
+-(define_mode_attr Ff		[(SF "f") (DF "d")])
++(define_mode_attr Ff		[(SF "f") (DF "d") (DI "d")])
+ 
+ ; SF/DF constraint for arithmetic on VSX registers using instructions added in
+ ; ISA 2.06 (power7).  This includes instructions that normally target DF mode,
+@@ -478,10 +540,27 @@
+ (define_code_iterator iorxor [ior xor])
+ 
+ ; Signed/unsigned variants of ops.
+-(define_code_iterator any_extend [sign_extend zero_extend])
+-(define_code_attr u [(sign_extend "") (zero_extend "u")])
+-(define_code_attr su [(sign_extend "s") (zero_extend "u")])
++(define_code_iterator any_extend	[sign_extend zero_extend])
++(define_code_iterator any_fix		[fix unsigned_fix])
++(define_code_iterator any_float		[float unsigned_float])
+ 
++(define_code_attr u  [(sign_extend	"")
++		      (zero_extend	"u")])
++
++(define_code_attr su [(sign_extend	"s")
++		      (zero_extend	"u")
++		      (fix		"s")
++		      (unsigned_fix	"s")
++		      (float		"s")
++		      (unsigned_float	"u")])
++
++(define_code_attr az [(sign_extend	"a")
++		      (zero_extend	"z")
++		      (fix		"a")
++		      (unsigned_fix	"z")
++		      (float		"a")
++		      (unsigned_float	"z")])
++
+ ; Various instructions that come in SI and DI forms.
+ ; A generic w/d attribute, for things like cmpw/cmpd.
+ (define_mode_attr wd [(QI    "b")
+@@ -610,7 +689,7 @@
+ ;; Reload iterator for creating the function to allocate a base register to
+ ;; supplement addressing modes.
+ (define_mode_iterator RELOAD [V16QI V8HI V4SI V2DI V4SF V2DF V1TI
+-			      SF SD SI DF DD DI TI PTI])
++			      SF SD SI DF DD DI TI PTI KF IF TF])
+ 
+ 
+ ;; Start with fixed-point load and store insns.  Here we put only the more
+@@ -2089,6 +2168,12 @@
+ 	      (clobber (reg:GPR CA_REGNO))])]
+   ""
+ {
++  if (TARGET_CTZ)
++    {
++      emit_insn (gen_ctz<mode>2_hw (operands[0], operands[1]));
++      DONE;
++    }
++
+   operands[2] = gen_reg_rtx (<MODE>mode);
+   operands[3] = gen_reg_rtx (<MODE>mode);
+   operands[4] = gen_reg_rtx (<MODE>mode);
+@@ -2095,6 +2180,13 @@
+   operands[5] = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - 1);
+ })
+ 
++(define_insn "ctz<mode>2_hw"
++  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
++	(ctz:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))]
++  "TARGET_CTZ"
++  "cnttz<wd> %0,%1"
++  [(set_attr "type" "cntlz")])
++
+ (define_expand "ffs<mode>2"
+   [(set (match_dup 2)
+ 	(neg:GPR (match_operand:GPR 1 "gpc_reg_operand" "")))
+@@ -2768,6 +2860,14 @@
+   DONE;
+ })
+ 
++(define_insn "*maddld4"
++  [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
++	(plus:DI (mult:DI (match_operand:DI 1 "gpc_reg_operand" "r")
++			  (match_operand:DI 2 "gpc_reg_operand" "r"))
++		 (match_operand:DI 3 "gpc_reg_operand" "r")))]
++  "TARGET_MADDLD"
++  "maddld %0,%1,%2,%3"
++  [(set_attr "type" "mul")])
+ 
+ (define_insn "udiv<mode>3"
+   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+@@ -2869,9 +2969,9 @@
+    (set_attr "cell_micro" "not")])
+ 
+ (define_expand "mod<mode>3"
+-  [(use (match_operand:GPR 0 "gpc_reg_operand" ""))
+-   (use (match_operand:GPR 1 "gpc_reg_operand" ""))
+-   (use (match_operand:GPR 2 "reg_or_cint_operand" ""))]
++  [(set (match_operand:GPR 0 "gpc_reg_operand")
++	(mod:GPR (match_operand:GPR 1 "gpc_reg_operand")
++		 (match_operand:GPR 2 "reg_or_cint_operand")))]
+   ""
+ {
+   int i;
+@@ -2881,16 +2981,93 @@
+   if (GET_CODE (operands[2]) != CONST_INT
+       || INTVAL (operands[2]) <= 0
+       || (i = exact_log2 (INTVAL (operands[2]))) < 0)
+-    FAIL;
++    {
++      if (!TARGET_MODULO)
++	FAIL;
+ 
+-  temp1 = gen_reg_rtx (<MODE>mode);
+-  temp2 = gen_reg_rtx (<MODE>mode);
++      operands[2] = force_reg (<MODE>mode, operands[2]);
++    }
++  else
++    {
++      temp1 = gen_reg_rtx (<MODE>mode);
++      temp2 = gen_reg_rtx (<MODE>mode);
+ 
+-  emit_insn (gen_div<mode>3 (temp1, operands[1], operands[2]));
+-  emit_insn (gen_ashl<mode>3 (temp2, temp1, GEN_INT (i)));
+-  emit_insn (gen_sub<mode>3 (operands[0], operands[1], temp2));
+-  DONE;
++      emit_insn (gen_div<mode>3 (temp1, operands[1], operands[2]));
++      emit_insn (gen_ashl<mode>3 (temp2, temp1, GEN_INT (i)));
++      emit_insn (gen_sub<mode>3 (operands[0], operands[1], temp2));
++      DONE;
++    }
+ })
++
++;; In order to enable using a peephole2 for combining div/mod to eliminate the
++;; mod, prefer putting the result of mod into a different register
++(define_insn "*mod<mode>3"
++  [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
++        (mod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
++		 (match_operand:GPR 2 "gpc_reg_operand" "r")))]
++  "TARGET_MODULO"
++  "mods<wd> %0,%1,%2"
++  [(set_attr "type" "div")
++   (set_attr "size" "<bits>")])
++
++
++(define_insn "umod<mode>3"
++  [(set (match_operand:GPR 0 "gpc_reg_operand" "=&r")
++        (umod:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
++		  (match_operand:GPR 2 "gpc_reg_operand" "r")))]
++  "TARGET_MODULO"
++  "modu<wd> %0,%1,%2"
++  [(set_attr "type" "div")
++   (set_attr "size" "<bits>")])
++
++;; On machines with modulo support, do a combined div/mod the old fashioned
++;; method, since the multiply/subtract is faster than doing the mod instruction
++;; after a divide.
++
++(define_peephole2
++  [(set (match_operand:GPR 0 "gpc_reg_operand" "")
++	(div:GPR (match_operand:GPR 1 "gpc_reg_operand" "")
++		 (match_operand:GPR 2 "gpc_reg_operand" "")))
++   (set (match_operand:GPR 3 "gpc_reg_operand" "")
++	(mod:GPR (match_dup 1)
++		 (match_dup 2)))]
++  "TARGET_MODULO
++   && ! reg_mentioned_p (operands[0], operands[1])
++   && ! reg_mentioned_p (operands[0], operands[2])
++   && ! reg_mentioned_p (operands[3], operands[1])
++   && ! reg_mentioned_p (operands[3], operands[2])"
++  [(set (match_dup 0)
++	(div:GPR (match_dup 1)
++		 (match_dup 2)))
++   (set (match_dup 3)
++	(mult:GPR (match_dup 0)
++		  (match_dup 2)))
++   (set (match_dup 3)
++	(minus:GPR (match_dup 1)
++		   (match_dup 3)))])
++
++(define_peephole2
++  [(set (match_operand:GPR 0 "gpc_reg_operand" "")
++	(udiv:GPR (match_operand:GPR 1 "gpc_reg_operand" "")
++		  (match_operand:GPR 2 "gpc_reg_operand" "")))
++   (set (match_operand:GPR 3 "gpc_reg_operand" "")
++	(umod:GPR (match_dup 1)
++		  (match_dup 2)))]
++  "TARGET_MODULO
++   && ! reg_mentioned_p (operands[0], operands[1])
++   && ! reg_mentioned_p (operands[0], operands[2])
++   && ! reg_mentioned_p (operands[3], operands[1])
++   && ! reg_mentioned_p (operands[3], operands[2])"
++  [(set (match_dup 0)
++	(div:GPR (match_dup 1)
++		 (match_dup 2)))
++   (set (match_dup 3)
++	(mult:GPR (match_dup 0)
++		  (match_dup 2)))
++   (set (match_dup 3)
++	(minus:GPR (match_dup 1)
++		   (match_dup 3)))])
++
+ 
+ ;; Logical instructions
+ ;; The logical instructions are mostly combined by using match_operator,
+@@ -3826,7 +4003,130 @@
+   [(set_attr "type" "shift")
+    (set_attr "dot" "yes")])
+ 
++;; Pretend we have a memory form of extswsli until register allocation is done
++;; so that we use LWZ to load the value from memory, instead of LWA.
++(define_insn_and_split "ashdi3_extswsli"
++  [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
++	(ashift:DI
++	 (sign_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "r,m"))
++	 (match_operand:DI 2 "u6bit_cint_operand" "n,n")))]
++  "TARGET_EXTSWSLI"
++  "@
++   extswsli %0,%1,%2
++   #"
++  "&& reload_completed && MEM_P (operands[1])"
++  [(set (match_dup 3)
++	(match_dup 1))
++   (set (match_dup 0)
++	(ashift:DI (sign_extend:DI (match_dup 3))
++		   (match_dup 2)))]
++{
++  operands[3] = gen_lowpart (SImode, operands[0]);
++}
++  [(set_attr "type" "shift")
++   (set_attr "maybe_var_shift" "no")])
+ 
++
++(define_insn_and_split "ashdi3_extswsli_dot"
++  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y,?x,??y")
++	(compare:CC
++	 (ashift:DI
++	  (sign_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "r,r,m,m"))
++	  (match_operand:DI 2 "u6bit_cint_operand" "n,n,n,n"))
++	 (const_int 0)))
++   (clobber (match_scratch:DI 0 "=r,r,r,r"))]
++  "TARGET_EXTSWSLI"
++  "@
++   extswsli. %0,%1,%2
++   #
++   #
++   #"
++  "&& reload_completed
++   && (cc_reg_not_cr0_operand (operands[3], CCmode)
++       || memory_operand (operands[1], SImode))"
++  [(pc)]
++{
++  rtx dest = operands[0];
++  rtx src = operands[1];
++  rtx shift = operands[2];
++  rtx cr = operands[3];
++  rtx src2;
++
++  if (!MEM_P (src))
++    src2 = src;
++  else
++    {
++      src2 = gen_lowpart (SImode, dest);
++      emit_move_insn (src2, src);
++    }
++
++  if (REGNO (cr) == CR0_REGNO)
++    {
++      emit_insn (gen_ashdi3_extswsli_dot (dest, src2, shift, cr));
++      DONE;
++    }
++
++  emit_insn (gen_ashdi3_extswsli (dest, src2, shift));
++  emit_insn (gen_rtx_SET (VOIDmode, cr,
++			  gen_rtx_COMPARE (CCmode, dest, const0_rtx)));
++  DONE;
++}
++  [(set_attr "type" "shift")
++   (set_attr "maybe_var_shift" "no")
++   (set_attr "dot" "yes")
++   (set_attr "length" "4,8,8,12")])
++
++(define_insn_and_split "ashdi3_extswsli_dot2"
++  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y,?x,??y")
++	(compare:CC
++	 (ashift:DI
++	  (sign_extend:DI (match_operand:SI 1 "reg_or_mem_operand" "r,r,m,m"))
++	  (match_operand:DI 2 "u6bit_cint_operand" "n,n,n,n"))
++	 (const_int 0)))
++   (set (match_operand:DI 0 "gpc_reg_operand" "=r,r,r,r")
++	(ashift:DI (sign_extend:DI (match_dup 1))
++		   (match_dup 2)))]
++  "TARGET_EXTSWSLI"
++  "@
++   extswsli. %0,%1,%2
++   #
++   #
++   #"
++  "&& reload_completed
++   && (cc_reg_not_cr0_operand (operands[3], CCmode)
++       || memory_operand (operands[1], SImode))"
++  [(pc)]
++{
++  rtx dest = operands[0];
++  rtx src = operands[1];
++  rtx shift = operands[2];
++  rtx cr = operands[3];
++  rtx src2;
++
++  if (!MEM_P (src))
++    src2 = src;
++  else
++    {
++      src2 = gen_lowpart (SImode, dest);
++      emit_move_insn (src2, src);
++    }
++
++  if (REGNO (cr) == CR0_REGNO)
++    {
++      emit_insn (gen_ashdi3_extswsli_dot2 (dest, src2, shift, cr));
++      DONE;
++    }
++
++  emit_insn (gen_ashdi3_extswsli (dest, src2, shift));
++  emit_insn (gen_rtx_SET (VOIDmode, cr,
++			  gen_rtx_COMPARE (CCmode, dest, const0_rtx)));
++  DONE;
++}
++  [(set_attr "type" "shift")
++   (set_attr "maybe_var_shift" "no")
++   (set_attr "dot" "yes")
++   (set_attr "length" "4,8,8,12")])
++
+ (define_insn "rotl<mode>3"
+   [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+ 	(rotate:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")
+@@ -5231,8 +5531,8 @@
+   "")
+ 
+ (define_insn_and_split "*extendsfdf2_fpr"
+-  [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d,ws,?ws,wu")
+-	(float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z")))]
++  [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d,d,ws,?ws,wu,wb")
++	(float_extend:DF (match_operand:SF 1 "reg_or_mem_operand" "0,f,m,0,wy,Z,o")))]
+   "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"
+   "@
+    #
+@@ -5240,7 +5540,8 @@
+    lfs%U1%X1 %0,%1
+    #
+    xscpsgndp %x0,%x1,%x1
+-   lxsspx %x0,%y1"
++   lxsspx %x0,%y1
++   lxssp %0,%1"
+   "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])"
+   [(const_int 0)]
+ {
+@@ -5247,7 +5548,7 @@
+   emit_note (NOTE_INSN_DELETED);
+   DONE;
+ }
+-  [(set_attr "type" "fp,fp,fpload,fp,fp,fpload")])
++  [(set_attr "type" "fp,fp,fpload,fp,fp,fpload,fpload")])
+ 
+ (define_expand "truncdfsf2"
+   [(set (match_operand:SF 0 "gpc_reg_operand" "")
+@@ -5267,9 +5568,9 @@
+ ;; This expander is here to avoid FLOAT_WORDS_BIGENDIAN tests in
+ ;; builtins.c and optabs.c that are not correct for IBM long double
+ ;; when little-endian.
+-(define_expand "signbittf2"
++(define_expand "signbit<mode>2"
+   [(set (match_dup 2)
+-	(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "")))
++	(float_truncate:DF (match_operand:IBM128 1 "gpc_reg_operand" "")))
+    (set (match_dup 3)
+    	(subreg:DI (match_dup 2) 0))
+    (set (match_dup 4)
+@@ -5276,10 +5577,8 @@
+    	(match_dup 5))
+    (set (match_operand:SI 0 "gpc_reg_operand" "")
+   	(match_dup 6))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
+-   && (TARGET_FPRS || TARGET_E500_DOUBLE)
+-   && TARGET_LONG_DOUBLE_128"
++  "TARGET_HARD_FLOAT
++   && (TARGET_FPRS || TARGET_E500_DOUBLE)"
+ {
+   operands[2] = gen_reg_rtx (DFmode);
+   operands[3] = gen_reg_rtx (DImode);
+@@ -8090,8 +8389,8 @@
+ }")
+ 
+ (define_insn "mov<mode>_hardfloat"
+-  [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=!r,!r,m,f,<f32_vsx>,<f32_vsx>,!r,<f32_lr>,<f32_sm>,<f32_av>,Z,?<f32_dm>,?r,*c*l,!r,*h")
+-	(match_operand:FMOVE32 1 "input_operand" "r,m,r,f,<f32_vsx>,<zero_fp>,<zero_fp>,<f32_lm>,<f32_sr>,Z,<f32_av>,r,<f32_dm>,r,h,0"))]
++  [(set (match_operand:FMOVE32 0 "nonimmediate_operand" "=!r,!r,m,f,<f32_vsx>,<f32_vsx>,!r,<f32_lr>,<f32_lr2>,<f32_sm>,<f32_sm2>,<f32_av>,Z,?<f32_dm>,?r,*c*l,!r,*h")
++	(match_operand:FMOVE32 1 "input_operand" "r,m,r,f,<f32_vsx>,<zero_fp>,<zero_fp>,<f32_lm>,<f32_lm2>,<f32_sr>,<f32_sr2>,Z,<f32_av>,r,<f32_dm>,r,h,0"))]
+   "(gpc_reg_operand (operands[0], <MODE>mode)
+    || gpc_reg_operand (operands[1], <MODE>mode))
+    && (TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT)"
+@@ -8104,7 +8403,9 @@
+    xxlxor %x0,%x0,%x0
+    li %0,0
+    <f32_li>
++   <f32_li2>
+    <f32_si>
++   <f32_si2>
+    <f32_lv>
+    <f32_sv>
+    mtvsrwz %x0,%1
+@@ -8112,7 +8413,7 @@
+    mt%0 %1
+    mf%1 %0
+    nop"
+-  [(set_attr "type" "*,load,store,fp,fp,vecsimple,integer,fpload,fpstore,fpload,fpstore,mftgpr,mffgpr,mtjmpr,mfjmpr,*")
++  [(set_attr "type" "*,load,store,fp,fp,vecsimple,integer,fpload,fpload,fpstore,fpstore,fpload,fpstore,mftgpr,mffgpr,mtjmpr,mfjmpr,*")
+    (set_attr "length" "4")])
+ 
+ (define_insn "*mov<mode>_softfloat"
+@@ -8225,14 +8526,15 @@
+ ;; into a floating point register when it is needed for a floating point
+ ;; operation.  Prefer traditional floating point registers over VSX registers,
+ ;; since the D-form version of the memory instructions does not need a GPR for
+-;; reloading.
++;; reloading.  ISA 3.0 (power9) adds D-form addressing for scalars to Altivec
++;; registers.
+ 
+ ;; If we have FPR registers, rs6000_emit_move has moved all constants to memory,
+ ;; except for 0.0 which can be created on VSX with an xor instruction.
+ 
+ (define_insn "*mov<mode>_hardfloat32"
+-  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r")
+-	(match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))]
++  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_p9>,o,<f64_vsx>,<f64_vsx>,!r,Y,r,!r")
++	(match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,o,<f64_p9>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))]
+   "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
+    && (gpc_reg_operand (operands[0], <MODE>mode)
+        || gpc_reg_operand (operands[1], <MODE>mode))"
+@@ -8242,6 +8544,8 @@
+    fmr %0,%1
+    lxsd%U1x %x0,%y1
+    stxsd%U0x %x1,%y0
++   lxsd %0,%1
++   stxsd %1,%0
+    xxlor %x0,%x1,%x1
+    xxlxor %x0,%x0,%x0
+    #
+@@ -8248,8 +8552,8 @@
+    #
+    #
+    #"
+-  [(set_attr "type" "fpstore,fpload,fp,fpload,fpstore,vecsimple,vecsimple,two,store,load,two")
+-   (set_attr "length" "4,4,4,4,4,4,4,8,8,8,8")])
++  [(set_attr "type" "fpstore,fpload,fp,fpload,fpstore,fpload,fpstore,vecsimple,vecsimple,two,store,load,two")
++   (set_attr "length" "4,4,4,4,4,4,4,4,4,8,8,8,8")])
+ 
+ (define_insn "*mov<mode>_softfloat32"
+   [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=Y,r,r,r,r,r")
+@@ -8267,8 +8571,8 @@
+ ; ld/std require word-aligned displacements -> 'Y' constraint.
+ ; List Y->r and r->Y before r->r for reload.
+ (define_insn "*mov<mode>_hardfloat64"
+-  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r,*c*l,!r,*h,r,wg,r,<f64_dm>")
+-	(match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r,r,h,0,wg,r,<f64_dm>,r"))]
++  [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_p9>,o,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r,*c*l,!r,*h,r,wg,r,<f64_dm>")
++	(match_operand:FMOVE64 1 "input_operand" "d,m,d,o,<f64_p9>,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r,r,h,0,wg,r,<f64_dm>,r"))]
+   "TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
+    && (gpc_reg_operand (operands[0], <MODE>mode)
+        || gpc_reg_operand (operands[1], <MODE>mode))"
+@@ -8276,6 +8580,8 @@
+    stfd%U0%X0 %1,%0
+    lfd%U1%X1 %0,%1
+    fmr %0,%1
++   lxsd %0,%1
++   stxsd %1,%0
+    lxsd%U1x %x0,%y1
+    stxsd%U0x %x1,%y0
+    xxlor %x0,%x1,%x1
+@@ -8291,7 +8597,7 @@
+    mffgpr %0,%1
+    mfvsrd %0,%x1
+    mtvsrd %x0,%1"
+-  [(set_attr "type" "fpstore,fpload,fp,fpload,fpstore,vecsimple,vecsimple,integer,store,load,*,mtjmpr,mfjmpr,*,mftgpr,mffgpr,mftgpr,mffgpr")
++  [(set_attr "type" "fpstore,fpload,fp,fpload,fpstore,fpload,fpstore,vecsimple,vecsimple,integer,store,load,*,mtjmpr,mfjmpr,*,mftgpr,mffgpr,mftgpr,mffgpr")
+    (set_attr "length" "4")])
+ 
+ (define_insn "*mov<mode>_softfloat64"
+@@ -8328,9 +8634,10 @@
+ ;; problematical.  Don't allow direct move for this case.
+ 
+ (define_insn_and_split "*mov<mode>_64bit_dm"
+-  [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,ws,Y,r,r,r,wm")
+-	(match_operand:FMOVE128 1 "input_operand" "d,m,d,<zero_fp>,r,<zero_fp>Y,r,wm,r"))]
++  [(set (match_operand:FMOVE128_FPR 0 "nonimmediate_operand" "=m,d,d,d,Y,r,r,r,wh")
++	(match_operand:FMOVE128_FPR 1 "input_operand" "d,m,d,<zero_fp>,r,<zero_fp>Y,r,wh,r"))]
+   "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64
++   && FLOAT128_2REG_P (<MODE>mode)
+    && (<MODE>mode != TDmode || WORDS_BIG_ENDIAN)
+    && (gpc_reg_operand (operands[0], <MODE>mode)
+        || gpc_reg_operand (operands[1], <MODE>mode))"
+@@ -8353,9 +8660,12 @@
+   [(set_attr "length" "8,8,8,12,12,8")])
+ 
+ (define_insn_and_split "*mov<mode>_32bit"
+-  [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,ws,Y,r,r")
+-	(match_operand:FMOVE128 1 "input_operand" "d,m,d,<zero_fp>,r,<zero_fp>Y,r"))]
++  [(set (match_operand:FMOVE128_FPR 0 "nonimmediate_operand" "=m,d,d,d,Y,r,r")
++	(match_operand:FMOVE128_FPR 1 "input_operand" "d,m,d,<zero_fp>,r,<zero_fp>Y,r"))]
+   "TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_POWERPC64
++   && (FLOAT128_2REG_P (<MODE>mode)
++       || int_reg_operand_not_pseudo (operands[0], <MODE>mode)
++       || int_reg_operand_not_pseudo (operands[1], <MODE>mode))
+    && (gpc_reg_operand (operands[0], <MODE>mode)
+        || gpc_reg_operand (operands[1], <MODE>mode))"
+   "#"
+@@ -8376,34 +8686,51 @@
+ { rs6000_split_multireg_move (operands[0], operands[1]); DONE; }
+   [(set_attr "length" "20,20,16")])
+ 
+-(define_expand "extenddftf2"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-	(float_extend:TF (match_operand:DF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
+-   && (TARGET_FPRS || TARGET_E500_DOUBLE)
++(define_expand "extenddf<mode>2"
++  [(set (match_operand:FLOAT128 0 "gpc_reg_operand" "")
++	(float_extend:FLOAT128 (match_operand:DF 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128"
+ {
+-  if (TARGET_E500_DOUBLE)
+-    emit_insn (gen_spe_extenddftf2 (operands[0], operands[1]));
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    rs6000_expand_float128_convert (operands[0], operands[1], false);
++  else if (TARGET_E500_DOUBLE)
++    {
++      gcc_assert (<MODE>mode == TFmode);
++      emit_insn (gen_spe_extenddftf2 (operands[0], operands[1]));
++    }
+   else if (TARGET_VSX)
+-    emit_insn (gen_extenddftf2_vsx (operands[0], operands[1]));
+-  else
+     {
++      if (<MODE>mode == TFmode)
++	emit_insn (gen_extenddftf2_vsx (operands[0], operands[1]));
++      else if (<MODE>mode == IFmode)
++	emit_insn (gen_extenddfif2_vsx (operands[0], operands[1]));
++      else
++	gcc_unreachable ();
++    }
++   else
++    {
+       rtx zero = gen_reg_rtx (DFmode);
+       rs6000_emit_move (zero, CONST0_RTX (DFmode), DFmode);
+-      emit_insn (gen_extenddftf2_fprs (operands[0], operands[1], zero));
++
++      if (<MODE>mode == TFmode)
++	emit_insn (gen_extenddftf2_fprs (operands[0], operands[1], zero));
++      else if (<MODE>mode == IFmode)
++	emit_insn (gen_extenddfif2_fprs (operands[0], operands[1], zero));
++      else
++	gcc_unreachable ();
+     }
+   DONE;
+ })
+ 
+ ;; Allow memory operands for the source to be created by the combiner.
+-(define_insn_and_split "extenddftf2_fprs"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "=d,d,&d")
+-	(float_extend:TF (match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
++(define_insn_and_split "extenddf<mode>2_fprs"
++  [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d,&d")
++	(float_extend:IBM128
++	 (match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
+    (use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))]
+   "!TARGET_VSX && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
+-   && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD"
++   && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 3) (match_dup 1))
+@@ -8412,14 +8739,15 @@
+   const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
+   const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode);
+ 
+-  operands[3] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
+-  operands[4] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
++  operands[3] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, hi_word);
++  operands[4] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, lo_word);
+ })
+ 
+-(define_insn_and_split "extenddftf2_vsx"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "=d,d")
+-	(float_extend:TF (match_operand:DF 1 "nonimmediate_operand" "ws,m")))]
+-  "TARGET_LONG_DOUBLE_128 && TARGET_VSX && !TARGET_IEEEQUAD"
++(define_insn_and_split "extenddf<mode>2_vsx"
++  [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
++	(float_extend:IBM128
++	 (match_operand:DF 1 "nonimmediate_operand" "ws,m")))]
++  "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 2) (match_dup 1))
+@@ -8428,38 +8756,48 @@
+   const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
+   const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode);
+ 
+-  operands[2] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
+-  operands[3] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
++  operands[2] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, hi_word);
++  operands[3] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, lo_word);
+   operands[4] = CONST0_RTX (DFmode);
+ })
+ 
+-(define_expand "extendsftf2"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-	(float_extend:TF (match_operand:SF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
++(define_expand "extendsf<mode>2"
++  [(set (match_operand:FLOAT128 0 "gpc_reg_operand" "")
++	(float_extend:FLOAT128 (match_operand:SF 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128"
+ {
+-  rtx tmp = gen_reg_rtx (DFmode);
+-  emit_insn (gen_extendsfdf2 (tmp, operands[1]));
+-  emit_insn (gen_extenddftf2 (operands[0], tmp));
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    rs6000_expand_float128_convert (operands[0], operands[1], false);
++  else
++    {
++      rtx tmp = gen_reg_rtx (DFmode);
++      emit_insn (gen_extendsfdf2 (tmp, operands[1]));
++      emit_insn (gen_extenddf<mode>2 (operands[0], tmp));
++    }
+   DONE;
+ })
+ 
+-(define_expand "trunctfdf2"
++(define_expand "trunc<mode>df2"
+   [(set (match_operand:DF 0 "gpc_reg_operand" "")
+-	(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
++	(float_truncate:DF (match_operand:FLOAT128 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128"
+-  "")
++{
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    {
++      rs6000_expand_float128_convert (operands[0], operands[1], false);
++      DONE;
++    }
++})
+ 
+-(define_insn_and_split "trunctfdf2_internal1"
++(define_insn_and_split "trunc<mode>df2_internal1"
+   [(set (match_operand:DF 0 "gpc_reg_operand" "=d,?d")
+-	(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "0,d")))]
+-  "!TARGET_IEEEQUAD && !TARGET_XL_COMPAT
++	(float_truncate:DF
++	 (match_operand:IBM128 1 "gpc_reg_operand" "0,d")))]
++  "FLOAT128_IBM_P (<MODE>mode) && !TARGET_XL_COMPAT
+    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
+   "@
+    #
+@@ -8472,38 +8810,44 @@
+ }
+   [(set_attr "type" "fp")])
+ 
+-(define_insn "trunctfdf2_internal2"
++(define_insn "trunc<mode>df2_internal2"
+   [(set (match_operand:DF 0 "gpc_reg_operand" "=d")
+-	(float_truncate:DF (match_operand:TF 1 "gpc_reg_operand" "d")))]
+-  "!TARGET_IEEEQUAD && TARGET_XL_COMPAT
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
+-   && TARGET_LONG_DOUBLE_128"
++	(float_truncate:DF (match_operand:IBM128 1 "gpc_reg_operand" "d")))]
++  "FLOAT128_IBM_P (<MODE>mode) && TARGET_XL_COMPAT && TARGET_HARD_FLOAT
++   && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LONG_DOUBLE_128"
+   "fadd %0,%1,%L1"
+   [(set_attr "type" "fp")
+    (set_attr "fp_type" "fp_addsub_d")])
+ 
+-(define_expand "trunctfsf2"
++(define_expand "trunc<mode>sf2"
+   [(set (match_operand:SF 0 "gpc_reg_operand" "")
+-	(float_truncate:SF (match_operand:TF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
++	(float_truncate:SF (match_operand:FLOAT128 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128"
+ {
+-  if (TARGET_E500_DOUBLE)
+-    emit_insn (gen_spe_trunctfsf2 (operands[0], operands[1]));
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    rs6000_expand_float128_convert (operands[0], operands[1], false);
++  else if (TARGET_E500_DOUBLE)
++    {
++      gcc_assert (<MODE>mode == TFmode);
++      emit_insn (gen_spe_trunctfsf2 (operands[0], operands[1]));
++    }
++  else if (<MODE>mode == TFmode)
++    emit_insn (gen_trunctfsf2_fprs (operands[0], operands[1]));
++  else if (<MODE>mode == IFmode)
++    emit_insn (gen_truncifsf2_fprs (operands[0], operands[1]));
+   else
+-    emit_insn (gen_trunctfsf2_fprs (operands[0], operands[1]));
++    gcc_unreachable ();
+   DONE;
+ })
+ 
+-(define_insn_and_split "trunctfsf2_fprs"
++(define_insn_and_split "trunc<mode>sf2_fprs"
+   [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
+-	(float_truncate:SF (match_operand:TF 1 "gpc_reg_operand" "d")))
++	(float_truncate:SF (match_operand:IBM128 1 "gpc_reg_operand" "d")))
+    (clobber (match_scratch:DF 2 "=d"))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT 
+-   && TARGET_LONG_DOUBLE_128"
++  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_SINGLE_FLOAT 
++   && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 2)
+@@ -8512,54 +8856,69 @@
+ 	(float_truncate:SF (match_dup 2)))]
+   "")
+ 
+-(define_expand "floatsitf2"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-        (float:TF (match_operand:SI 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
++(define_expand "floatsi<mode>2"
++  [(set (match_operand:FLOAT128 0 "gpc_reg_operand" "")
++        (float:FLOAT128 (match_operand:SI 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE)
+    && TARGET_LONG_DOUBLE_128"
+ {
+-  rtx tmp = gen_reg_rtx (DFmode);
+-  expand_float (tmp, operands[1], false);
+-  emit_insn (gen_extenddftf2 (operands[0], tmp));
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    rs6000_expand_float128_convert (operands[0], operands[1], false);
++  else
++    {
++      rtx tmp = gen_reg_rtx (DFmode);
++      expand_float (tmp, operands[1], false);
++      if (<MODE>mode == TFmode)
++	emit_insn (gen_extenddftf2 (operands[0], tmp));
++      else if (<MODE>mode == IFmode)
++	emit_insn (gen_extenddfif2 (operands[0], tmp));
++      else
++	gcc_unreachable ();
++    }
+   DONE;
+ })
+ 
+ ; fadd, but rounding towards zero.
+ ; This is probably not the optimal code sequence.
+-(define_insn "fix_trunc_helper"
++(define_insn "fix_trunc_helper<mode>"
+   [(set (match_operand:DF 0 "gpc_reg_operand" "=d")
+-	(unspec:DF [(match_operand:TF 1 "gpc_reg_operand" "d")]
++	(unspec:DF [(match_operand:IBM128 1 "gpc_reg_operand" "d")]
+ 		   UNSPEC_FIX_TRUNC_TF))
+    (clobber (match_operand:DF 2 "gpc_reg_operand" "=&d"))]
+-  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"
++  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT
++   && FLOAT128_IBM_P (<MODE>mode)"
+   "mffs %2\n\tmtfsb1 31\n\tmtfsb0 30\n\tfadd %0,%1,%L1\n\tmtfsf 1,%2"
+   [(set_attr "type" "fp")
+    (set_attr "length" "20")])
+ 
+-(define_expand "fix_trunctfsi2"
++(define_expand "fix_trunc<mode>si2"
+   [(set (match_operand:SI 0 "gpc_reg_operand" "")
+-	(fix:SI (match_operand:TF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD && TARGET_HARD_FLOAT
++	(fix:SI (match_operand:FLOAT128 1 "gpc_reg_operand" "")))]
++  "TARGET_HARD_FLOAT
+    && (TARGET_FPRS || TARGET_E500_DOUBLE) && TARGET_LONG_DOUBLE_128"
+ {
+-  if (TARGET_E500_DOUBLE)
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    rs6000_expand_float128_convert (operands[0], operands[1], false);
++  else if (TARGET_E500_DOUBLE && <MODE>mode == TFmode)
+     emit_insn (gen_spe_fix_trunctfsi2 (operands[0], operands[1]));
++  else if (<MODE>mode == TFmode)
++    emit_insn (gen_fix_trunctfsi2_fprs (operands[0], operands[1]));
++  else if (<MODE>mode == IFmode)
++    emit_insn (gen_fix_truncifsi2_fprs (operands[0], operands[1]));
+   else
+-    emit_insn (gen_fix_trunctfsi2_fprs (operands[0], operands[1]));
++    gcc_unreachable ();
+   DONE;
+ })
+ 
+-(define_expand "fix_trunctfsi2_fprs"
++(define_expand "fix_trunc<mode>si2_fprs"
+   [(parallel [(set (match_operand:SI 0 "gpc_reg_operand" "")
+-		   (fix:SI (match_operand:TF 1 "gpc_reg_operand" "")))
++		   (fix:SI (match_operand:IBM128 1 "gpc_reg_operand" "")))
+ 	      (clobber (match_dup 2))
+ 	      (clobber (match_dup 3))
+ 	      (clobber (match_dup 4))
+ 	      (clobber (match_dup 5))])]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
++  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
+ {
+   operands[2] = gen_reg_rtx (DFmode);
+   operands[3] = gen_reg_rtx (DFmode);
+@@ -8567,21 +8926,21 @@
+   operands[5] = assign_stack_temp (DImode, GET_MODE_SIZE (DImode));
+ })
+ 
+-(define_insn_and_split "*fix_trunctfsi2_internal"
++(define_insn_and_split "*fix_trunc<mode>si2_internal"
+   [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+-        (fix:SI (match_operand:TF 1 "gpc_reg_operand" "d")))
++        (fix:SI (match_operand:IBM128 1 "gpc_reg_operand" "d")))
+    (clobber (match_operand:DF 2 "gpc_reg_operand" "=d"))
+    (clobber (match_operand:DF 3 "gpc_reg_operand" "=&d"))
+    (clobber (match_operand:DI 4 "gpc_reg_operand" "=d"))
+    (clobber (match_operand:DI 5 "offsettable_mem_operand" "=o"))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
++  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
+   "#"
+   ""
+   [(pc)]
+ {
+   rtx lowword;
+-  emit_insn (gen_fix_trunc_helper (operands[2], operands[1], operands[3]));
++  emit_insn (gen_fix_trunc_helper<mode> (operands[2], operands[1],
++					 operands[3]));
+ 
+   gcc_assert (MEM_P (operands[5]));
+   lowword = adjust_address (operands[5], SImode, WORDS_BIG_ENDIAN ? 4 : 0);
+@@ -8592,20 +8951,89 @@
+   DONE;
+ })
+ 
+-(define_expand "negtf2"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-	(neg:TF (match_operand:TF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
+-   && (TARGET_FPRS || TARGET_E500_DOUBLE)
+-   && TARGET_LONG_DOUBLE_128"
+-  "")
++(define_expand "fix_trunc<mode>di2"
++  [(set (match_operand:DI 0 "gpc_reg_operand" "")
++	(fix:DI (match_operand:IEEE128 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
+ 
+-(define_insn "negtf2_internal"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "=d")
+-	(neg:TF (match_operand:TF 1 "gpc_reg_operand" "d")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
++(define_expand "fixuns_trunc<IEEE128:mode><SDI:mode>2"
++  [(set (match_operand:SDI 0 "gpc_reg_operand" "")
++	(unsigned_fix:SDI (match_operand:IEEE128 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], true);
++  DONE;
++})
++
++(define_expand "floatdi<mode>2"
++  [(set (match_operand:IEEE128 0 "gpc_reg_operand" "")
++	(float:IEEE128 (match_operand:DI 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "floatuns<SDI:mode><IEEE128:mode>2"
++  [(set (match_operand:IEEE128 0 "gpc_reg_operand" "")
++	(unsigned_float:IEEE128 (match_operand:SDI 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], true);
++  DONE;
++})
++
++(define_expand "neg<mode>2"
++  [(set (match_operand:FLOAT128 0 "gpc_reg_operand" "")
++	(neg:FLOAT128 (match_operand:FLOAT128 1 "gpc_reg_operand" "")))]
++  "FLOAT128_IEEE_P (<MODE>mode)
++   || (FLOAT128_IBM_P (<MODE>mode)
++       && TARGET_HARD_FLOAT
++       && (TARGET_FPRS || TARGET_E500_DOUBLE))"
++  "
++{
++  if (FLOAT128_IEEE_P (<MODE>mode))
++    {
++      if (TARGET_FLOAT128_HW)
++	{
++	  if (<MODE>mode == TFmode)
++	    emit_insn (gen_negtf2_hw (operands[0], operands[1]));
++	  else if (<MODE>mode == KFmode)
++	    emit_insn (gen_negkf2_hw (operands[0], operands[1]));
++	  else
++	    gcc_unreachable ();
++	}
++      else if (TARGET_FLOAT128)
++	{
++	  if (<MODE>mode == TFmode)
++	    emit_insn (gen_ieee_128bit_vsx_negtf2 (operands[0], operands[1]));
++	  else if (<MODE>mode == KFmode)
++	    emit_insn (gen_ieee_128bit_vsx_negkf2 (operands[0], operands[1]));
++	  else
++	    gcc_unreachable ();
++	}
++      else
++	{
++	  rtx libfunc = optab_libfunc (neg_optab, <MODE>mode);
++	  rtx target = emit_library_call_value (libfunc, operands[0], LCT_CONST,
++						<MODE>mode, 1,
++						operands[1], <MODE>mode);
++
++	  if (target && !rtx_equal_p (target, operands[0]))
++	    emit_move_insn (operands[0], target);
++	}
++      DONE;
++    }
++}")
++
++(define_insn "neg<mode>2_internal"
++  [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d")
++	(neg:IBM128 (match_operand:IBM128 1 "gpc_reg_operand" "d")))]
++  "TARGET_HARD_FLOAT && TARGET_FPRS && FLOAT128_IBM_P (TFmode)"
+   "*
+ {
+   if (REGNO (operands[0]) == REGNO (operands[1]) + 1)
+@@ -8616,32 +9044,64 @@
+   [(set_attr "type" "fp")
+    (set_attr "length" "8")])
+ 
+-(define_expand "abstf2"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-	(abs:TF (match_operand:TF 1 "gpc_reg_operand" "")))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT
+-   && (TARGET_FPRS || TARGET_E500_DOUBLE)
+-   && TARGET_LONG_DOUBLE_128"
++(define_expand "abs<mode>2"
++  [(set (match_operand:FLOAT128 0 "gpc_reg_operand" "")
++	(abs:FLOAT128 (match_operand:FLOAT128 1 "gpc_reg_operand" "")))]
++  "FLOAT128_IEEE_P (<MODE>mode)
++   || (FLOAT128_IBM_P (<MODE>mode)
++       && TARGET_HARD_FLOAT
++       && (TARGET_FPRS || TARGET_E500_DOUBLE))"
+   "
+ {
+-  rtx label = gen_label_rtx ();
+-  if (TARGET_E500_DOUBLE)
++  rtx label;
++
++  if (FLOAT128_IEEE_P (<MODE>mode))
+     {
++      if (TARGET_FLOAT128_HW)
++	{
++	  if (<MODE>mode == TFmode)
++	    emit_insn (gen_abstf2_hw (operands[0], operands[1]));
++	  else if (<MODE>mode == KFmode)
++	    emit_insn (gen_abskf2_hw (operands[0], operands[1]));
++	  else
++	    FAIL;
++	  DONE;
++	}
++      else if (TARGET_FLOAT128)
++	{
++	  if (<MODE>mode == TFmode)
++	    emit_insn (gen_ieee_128bit_vsx_abstf2 (operands[0], operands[1]));
++	  else if (<MODE>mode == KFmode)
++	    emit_insn (gen_ieee_128bit_vsx_abskf2 (operands[0], operands[1]));
++	  else
++	    FAIL;
++	  DONE;
++	}
++      else
++	FAIL;
++    }
++
++  label = gen_label_rtx ();
++  if (TARGET_E500_DOUBLE && <MODE>mode == TFmode)
++    {
+       if (flag_finite_math_only && !flag_trapping_math)
+ 	emit_insn (gen_spe_abstf2_tst (operands[0], operands[1], label));
+       else
+ 	emit_insn (gen_spe_abstf2_cmp (operands[0], operands[1], label));
+     }
++  else if (<MODE>mode == TFmode)
++    emit_insn (gen_abstf2_internal (operands[0], operands[1], label));
++  else if (<MODE>mode == TFmode)
++    emit_insn (gen_absif2_internal (operands[0], operands[1], label));
+   else
+-    emit_insn (gen_abstf2_internal (operands[0], operands[1], label));
++    FAIL;
+   emit_label (label);
+   DONE;
+ }")
+ 
+-(define_expand "abstf2_internal"
+-  [(set (match_operand:TF 0 "gpc_reg_operand" "")
+-	(match_operand:TF 1 "gpc_reg_operand" ""))
++(define_expand "abs<mode>2_internal"
++  [(set (match_operand:IBM128 0 "gpc_reg_operand" "")
++	(match_operand:IBM128 1 "gpc_reg_operand" ""))
+    (set (match_dup 3) (match_dup 5))
+    (set (match_dup 5) (abs:DF (match_dup 5)))
+    (set (match_dup 4) (compare:CCFP (match_dup 3) (match_dup 5)))
+@@ -8649,8 +9109,7 @@
+ 			   (label_ref (match_operand 2 "" ""))
+ 			   (pc)))
+    (set (match_dup 6) (neg:DF (match_dup 6)))]
+-  "!TARGET_IEEEQUAD
+-   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
++  "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
+    && TARGET_LONG_DOUBLE_128"
+   "
+ {
+@@ -8658,10 +9117,196 @@
+   const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
+   operands[3] = gen_reg_rtx (DFmode);
+   operands[4] = gen_reg_rtx (CCFPmode);
+-  operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
+-  operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
++  operands[5] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, hi_word);
++  operands[6] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, lo_word);
+ }")
++
+ 
++;; Generate IEEE 128-bit -0.0 (0x80000000000000000000000000000000) in a vector
++;; register
++
++(define_expand "ieee_128bit_negative_zero"
++  [(set (match_operand:V16QI 0 "register_operand" "") (match_dup 1))]
++  "TARGET_FLOAT128"
++{
++  rtvec v = rtvec_alloc (16);
++  int i, high;
++
++  for (i = 0; i < 16; i++)
++    RTVEC_ELT (v, i) = const0_rtx;
++
++  high = (BYTES_BIG_ENDIAN) ? 0 : 15;
++  RTVEC_ELT (v, high) = GEN_INT (0x80);
++
++  rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v));
++  DONE;
++})
++
++;; IEEE 128-bit negate
++
++;; We have 2 insns here for negate and absolute value.  The first uses
++;; match_scratch so that phases like combine can recognize neg/abs as generic
++;; insns, and second insn after the first split pass loads up the bit to
++;; twiddle the sign bit.  Later GCSE passes can then combine multiple uses of
++;; neg/abs to create the constant just once.
++
++(define_insn_and_split "ieee_128bit_vsx_neg<mode>2"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(neg:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
++   (clobber (match_scratch:V16QI 2 "=v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
++  "#"
++  "&& 1"
++  [(parallel [(set (match_dup 0)
++		   (neg:IEEE128 (match_dup 1)))
++	      (use (match_dup 2))])]
++{
++  if (GET_CODE (operands[2]) == SCRATCH)
++    operands[2] = gen_reg_rtx (V16QImode);
++
++  operands[3] = gen_reg_rtx (V16QImode);
++  emit_insn (gen_ieee_128bit_negative_zero (operands[2]));
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "vecsimple")])
++
++(define_insn "*ieee_128bit_vsx_neg<mode>2_internal"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(neg:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
++   (use (match_operand:V16QI 2 "register_operand" "v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
++  "xxlxor %x0,%x1,%x2"
++  [(set_attr "type" "vecsimple")])
++
++;; IEEE 128-bit absolute value
++(define_insn_and_split "ieee_128bit_vsx_abs<mode>2"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(abs:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
++   (clobber (match_scratch:V16QI 2 "=v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(parallel [(set (match_dup 0)
++		   (abs:IEEE128 (match_dup 1)))
++	      (use (match_dup 2))])]
++{
++  if (GET_CODE (operands[2]) == SCRATCH)
++    operands[2] = gen_reg_rtx (V16QImode);
++
++  operands[3] = gen_reg_rtx (V16QImode);
++  emit_insn (gen_ieee_128bit_negative_zero (operands[2]));
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "vecsimple")])
++
++(define_insn "*ieee_128bit_vsx_abs<mode>2_internal"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(abs:IEEE128 (match_operand:IEEE128 1 "register_operand" "wa")))
++   (use (match_operand:V16QI 2 "register_operand" "v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
++  "xxlandc %x0,%x1,%x2"
++  [(set_attr "type" "vecsimple")])
++
++;; IEEE 128-bit negative absolute value
++(define_insn_and_split "*ieee_128bit_vsx_nabs<mode>2"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(neg:IEEE128
++	 (abs:IEEE128
++	  (match_operand:IEEE128 1 "register_operand" "wa"))))
++   (clobber (match_scratch:V16QI 2 "=v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(parallel [(set (match_dup 0)
++		   (neg:IEEE128 (abs:IEEE128 (match_dup 1))))
++	      (use (match_dup 2))])]
++{
++  if (GET_CODE (operands[2]) == SCRATCH)
++    operands[2] = gen_reg_rtx (V16QImode);
++
++  operands[3] = gen_reg_rtx (V16QImode);
++  emit_insn (gen_ieee_128bit_negative_zero (operands[2]));
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "vecsimple")])
++
++(define_insn "*ieee_128bit_vsx_nabs<mode>2_internal"
++  [(set (match_operand:IEEE128 0 "register_operand" "=wa")
++	(neg:IEEE128
++	 (abs:IEEE128
++	  (match_operand:IEEE128 1 "register_operand" "wa"))))
++   (use (match_operand:V16QI 2 "register_operand" "v"))]
++  "TARGET_FLOAT128 && !TARGET_FLOAT128_HW"
++  "xxlor %x0,%x1,%x2"
++  [(set_attr "type" "vecsimple")])
++
++;; Float128 conversion functions.  These expand to library function calls.
++;; We use expand to convert from IBM double double to IEEE 128-bit
++;; and trunc for the opposite.
++(define_expand "extendiftf2"
++  [(set (match_operand:TF 0 "gpc_reg_operand" "")
++	(float_extend:TF (match_operand:IF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "extendifkf2"
++  [(set (match_operand:KF 0 "gpc_reg_operand" "")
++	(float_extend:KF (match_operand:IF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "extendtfkf2"
++  [(set (match_operand:KF 0 "gpc_reg_operand" "")
++	(float_extend:KF (match_operand:TF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "trunciftf2"
++  [(set (match_operand:IF 0 "gpc_reg_operand" "")
++	(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "truncifkf2"
++  [(set (match_operand:IF 0 "gpc_reg_operand" "")
++	(float_truncate:IF (match_operand:KF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "trunckftf2"
++  [(set (match_operand:TF 0 "gpc_reg_operand" "")
++	(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++(define_expand "trunctfif2"
++  [(set (match_operand:IF 0 "gpc_reg_operand" "")
++	(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand" "")))]
++  "TARGET_FLOAT128"
++{
++  rs6000_expand_float128_convert (operands[0], operands[1], false);
++  DONE;
++})
++
++
+ ;; Reload helper functions used by rs6000_secondary_reload.  The patterns all
+ ;; must have 3 arguments, and scratch register constraint must be a single
+ ;; constraint.
+@@ -8828,6 +9473,7 @@
+   emit_insn (gen_p8_mtvsrd_df (tmp_lo, gpr_lo_reg));
+   emit_insn (gen_p8_xxpermdi_<mode> (dest, tmp_hi, tmp_lo));
+   DONE;
++  DONE;
+ }
+   [(set_attr "length" "12")
+    (set_attr "type" "three")])
+@@ -8837,7 +9483,10 @@
+ 	(match_operand:FMOVE128_GPR 1 "input_operand" ""))]
+   "reload_completed
+    && (int_reg_operand (operands[0], <MODE>mode)
+-       || int_reg_operand (operands[1], <MODE>mode))"
++       || int_reg_operand (operands[1], <MODE>mode))
++   && (!TARGET_DIRECT_MOVE_128
++       || (!vsx_register_operand (operands[0], <MODE>mode)
++           && !vsx_register_operand (operands[1], <MODE>mode)))"
+   [(pc)]
+ { rs6000_split_multireg_move (operands[0], operands[1]); DONE; })
+ 
+@@ -8907,6 +9556,7 @@
+   emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_hi_reg, src));
+   emit_insn (gen_vsx_xxpermdi_<mode> (tmp, src, src, GEN_INT (3)));
+   emit_insn (gen_p8_mfvsrd_3_<mode> (gpr_lo_reg, tmp));
++  DONE;
+ }
+   [(set_attr "length" "12")
+    (set_attr "type" "three")])
+@@ -12071,20 +12721,20 @@
+    (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 4)))])
+ 
+ ;; Only need to compare second words if first words equal
+-(define_insn "*cmptf_internal1"
++(define_insn "*cmp<mode>_internal1"
+   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
+-	(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "d")
+-		      (match_operand:TF 2 "gpc_reg_operand" "d")))]
+-  "!TARGET_IEEEQUAD && !TARGET_XL_COMPAT
++	(compare:CCFP (match_operand:IBM128 1 "gpc_reg_operand" "d")
++		      (match_operand:IBM128 2 "gpc_reg_operand" "d")))]
++  "!TARGET_XL_COMPAT
+    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LONG_DOUBLE_128"
+   "fcmpu %0,%1,%2\;bne %0,$+8\;fcmpu %0,%L1,%L2"
+   [(set_attr "type" "fpcompare")
+    (set_attr "length" "12")])
+ 
+-(define_insn_and_split "*cmptf_internal2"
++(define_insn_and_split "*cmp<mode>_internal2"
+   [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
+-	(compare:CCFP (match_operand:TF 1 "gpc_reg_operand" "d")
+-		      (match_operand:TF 2 "gpc_reg_operand" "d")))
++	(compare:CCFP (match_operand:IEEE128 1 "gpc_reg_operand" "d")
++		      (match_operand:IEEE128 2 "gpc_reg_operand" "d")))
+     (clobber (match_scratch:DF 3 "=d"))
+     (clobber (match_scratch:DF 4 "=d"))
+     (clobber (match_scratch:DF 5 "=d"))
+@@ -12094,7 +12744,7 @@
+     (clobber (match_scratch:DF 9 "=d"))
+     (clobber (match_scratch:DF 10 "=d"))
+     (clobber (match_scratch:GPR 11 "=b"))]
+-  "!TARGET_IEEEQUAD && TARGET_XL_COMPAT
++  "TARGET_XL_COMPAT
+    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT && TARGET_LONG_DOUBLE_128"
+   "#"
+   "&& reload_completed"
+@@ -12118,10 +12768,10 @@
+   const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
+   const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode);
+ 
+-  operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, hi_word);
+-  operands[6] = simplify_gen_subreg (DFmode, operands[1], TFmode, lo_word);
+-  operands[7] = simplify_gen_subreg (DFmode, operands[2], TFmode, hi_word);
+-  operands[8] = simplify_gen_subreg (DFmode, operands[2], TFmode, lo_word);
++  operands[5] = simplify_gen_subreg (DFmode, operands[1], <MODE>mode, hi_word);
++  operands[6] = simplify_gen_subreg (DFmode, operands[1], <MODE>mode, lo_word);
++  operands[7] = simplify_gen_subreg (DFmode, operands[2], <MODE>mode, hi_word);
++  operands[8] = simplify_gen_subreg (DFmode, operands[2], <MODE>mode, lo_word);
+   operands[12] = gen_label_rtx ();
+   operands[13] = gen_label_rtx ();
+   real_inf (&rv);
+@@ -12923,7 +13573,7 @@
+   [(set_attr "type" "jmpreg")])
+ 
+ (define_insn "nop"
+-  [(const_int 0)]
++  [(unspec [(const_int 0)] UNSPEC_NOP)]
+   ""
+   "nop")
+ 
+@@ -13590,6 +14240,72 @@
+ }"
+   [(set_attr "type" "load")])
+ 
++;; Handle -fsplit-stack.
++
++(define_expand "split_stack_prologue"
++  [(const_int 0)]
++  ""
++{
++  rs6000_expand_split_stack_prologue ();
++  DONE;
++})
++
++(define_expand "load_split_stack_limit"
++  [(set (match_operand 0)
++	(unspec [(const_int 0)] UNSPEC_STACK_CHECK))]
++  ""
++{
++  emit_insn (gen_rtx_SET (VOIDmode, operands[0],
++			  gen_rtx_UNSPEC (Pmode,
++					  gen_rtvec (1, const0_rtx),
++					  UNSPEC_STACK_CHECK)));
++  DONE;
++})
++
++(define_insn "load_split_stack_limit_di"
++  [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
++	(unspec:DI [(const_int 0)] UNSPEC_STACK_CHECK))]
++  ""
++  "ld %0,-0x7040(13)"
++  [(set_attr "type" "load")
++   (set_attr "update" "no")
++   (set_attr "indexed" "no")])
++
++(define_insn "load_split_stack_limit_si"
++  [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
++	(unspec:SI [(const_int 0)] UNSPEC_STACK_CHECK))]
++  ""
++  "lwz %0,-0x7020(2)"
++  [(set_attr "type" "load")
++   (set_attr "update" "no")
++   (set_attr "indexed" "no")])
++
++;; A return instruction which the middle-end doesn't see.
++(define_insn "split_stack_return"
++  [(unspec_volatile [(const_int 0)] UNSPECV_SPLIT_STACK_RETURN)]
++  ""
++  "blr"
++  [(set_attr "type" "jmpreg")])
++
++;; If there are operand 0 bytes available on the stack, jump to
++;; operand 1.
++(define_expand "split_stack_space_check"
++  [(set (match_dup 2)
++	(unspec [(const_int 0)] UNSPEC_STACK_CHECK))
++   (set (match_dup 3)
++	(minus (reg STACK_POINTER_REGNUM)
++	       (match_operand 0)))
++   (set (match_dup 4) (compare:CCUNS (match_dup 3) (match_dup 2)))
++   (set (pc) (if_then_else
++	      (geu (match_dup 4) (const_int 0))
++	      (label_ref (match_operand 1))
++	      (pc)))]
++  ""
++{
++  rs6000_split_stack_space_check (operands[0], operands[1]);
++  DONE;
++})
++
+ (define_insn "bpermd_<mode>"
+   [(set (match_operand:P 0 "gpc_reg_operand" "=r")
+ 	(unspec:P [(match_operand:P 1 "gpc_reg_operand" "r")
+@@ -13810,6 +14526,66 @@
+ ;; a GPR.  The addis instruction must be adjacent to the load, and use the same
+ ;; register that is being loaded.  The fused ops must be physically adjacent.
+ 
++;; There are two parts to addis fusion.  The support for fused TOCs occur
++;; before register allocation, and is meant to reduce the lifetime for the
++;; tempoary register that holds the ADDIS result.  On Power8 GPR loads, we try
++;; to use the register that is being load.  The peephole2 then gathers any
++;; other fused possibilities that it can find after register allocation.  If
++;; power9 fusion is selected, we also fuse floating point loads/stores.
++
++;; Fused TOC support: Replace simple GPR loads with a fused form.  This is done
++;; before register allocation, so that we can avoid allocating a temporary base
++;; register that won't be used, and that we try to load into base registers,
++;; and not register 0.  If we can't get a fused GPR load, generate a P9 fusion
++;; (addis followed by load) even on power8.
++
++(define_split
++  [(set (match_operand:INT1 0 "toc_fusion_or_p9_reg_operand" "")
++	(match_operand:INT1 1 "toc_fusion_mem_raw" ""))]
++  "TARGET_TOC_FUSION_INT && can_create_pseudo_p ()"
++  [(parallel [(set (match_dup 0) (match_dup 2))
++	      (unspec [(const_int 0)] UNSPEC_FUSION_ADDIS)
++	      (use (match_dup 3))
++	      (clobber (scratch:DI))])]
++{
++  operands[2] = fusion_wrap_memory_address (operands[1]);
++  operands[3] = gen_rtx_REG (Pmode, TOC_REGISTER);
++})
++
++(define_insn "*toc_fusionload_<mode>"
++  [(set (match_operand:QHSI 0 "int_reg_operand" "=&b,??r")
++	(match_operand:QHSI 1 "toc_fusion_mem_wrapped" "wG,wG"))
++   (unspec [(const_int 0)] UNSPEC_FUSION_ADDIS)
++   (use (match_operand:DI 2 "base_reg_operand" "r,r"))
++   (clobber (match_scratch:DI 3 "=X,&b"))]
++  "TARGET_TOC_FUSION_INT"
++{
++  if (base_reg_operand (operands[0], <MODE>mode))
++    return emit_fusion_gpr_load (operands[0], operands[1]);
++
++  return emit_fusion_p9_load (operands[0], operands[1], operands[3]);
++}
++  [(set_attr "type" "load")
++   (set_attr "length" "8")])
++
++(define_insn "*toc_fusionload_di"
++  [(set (match_operand:DI 0 "int_reg_operand" "=&b,??r,?d")
++	(match_operand:DI 1 "toc_fusion_mem_wrapped" "wG,wG,wG"))
++   (unspec [(const_int 0)] UNSPEC_FUSION_ADDIS)
++   (use (match_operand:DI 2 "base_reg_operand" "r,r,r"))
++   (clobber (match_scratch:DI 3 "=X,&b,&b"))]
++  "TARGET_TOC_FUSION_INT && TARGET_POWERPC64
++   && (MEM_P (operands[1]) || int_reg_operand (operands[0], DImode))"
++{
++  if (base_reg_operand (operands[0], DImode))
++    return emit_fusion_gpr_load (operands[0], operands[1]);
++
++  return emit_fusion_p9_load (operands[0], operands[1], operands[3]);
++}
++  [(set_attr "type" "load")
++   (set_attr "length" "8")])
++
++
+ ;; Find cases where the addis that feeds into a load instruction is either used
+ ;; once or is the same as the target register, and replace it with the fusion
+ ;; insn
+@@ -13833,7 +14609,7 @@
+ 
+ (define_insn "fusion_gpr_load_<mode>"
+   [(set (match_operand:INT1 0 "base_reg_operand" "=&b")
+-	(unspec:INT1 [(match_operand:INT1 1 "fusion_gpr_mem_combo" "")]
++	(unspec:INT1 [(match_operand:INT1 1 "fusion_addis_mem_combo_load" "")]
+ 		     UNSPEC_FUSION_GPR))]
+   "TARGET_P8_FUSION"
+ {
+@@ -13843,6 +14619,133 @@
+    (set_attr "length" "8")])
+ 
+ 
++;; ISA 3.0 (power9) fusion support
++;; Merge addis with floating load/store to FPRs (or GPRs).
++(define_peephole2
++  [(set (match_operand:P 0 "base_reg_operand" "")
++	(match_operand:P 1 "fusion_gpr_addis" ""))
++   (set (match_operand:SFDF 2 "toc_fusion_or_p9_reg_operand" "")
++	(match_operand:SFDF 3 "fusion_offsettable_mem_operand" ""))]
++  "TARGET_P9_FUSION && peep2_reg_dead_p (2, operands[0])
++   && fusion_p9_p (operands[0], operands[1], operands[2], operands[3])"
++  [(const_int 0)]
++{
++  expand_fusion_p9_load (operands);
++  DONE;
++})
++
++(define_peephole2
++  [(set (match_operand:P 0 "base_reg_operand" "")
++	(match_operand:P 1 "fusion_gpr_addis" ""))
++   (set (match_operand:SFDF 2 "offsettable_mem_operand" "")
++	(match_operand:SFDF 3 "toc_fusion_or_p9_reg_operand" ""))]
++  "TARGET_P9_FUSION && peep2_reg_dead_p (2, operands[0])
++   && fusion_p9_p (operands[0], operands[1], operands[2], operands[3])"
++  [(const_int 0)]
++{
++  expand_fusion_p9_store (operands);
++  DONE;
++})
++
++(define_peephole2
++  [(set (match_operand:SDI 0 "int_reg_operand" "")
++	(match_operand:SDI 1 "upper16_cint_operand" ""))
++   (set (match_dup 0)
++	(ior:SDI (match_dup 0)
++		 (match_operand:SDI 2 "u_short_cint_operand" "")))]
++  "TARGET_P9_FUSION"
++  [(set (match_dup 0)
++	(unspec:SDI [(match_dup 1)
++		     (match_dup 2)] UNSPEC_FUSION_P9))])
++
++(define_peephole2
++  [(set (match_operand:SDI 0 "int_reg_operand" "")
++	(match_operand:SDI 1 "upper16_cint_operand" ""))
++   (set (match_operand:SDI 2 "int_reg_operand" "")
++	(ior:SDI (match_dup 0)
++		 (match_operand:SDI 3 "u_short_cint_operand" "")))]
++  "TARGET_P9_FUSION
++   && !rtx_equal_p (operands[0], operands[2])
++   && peep2_reg_dead_p (2, operands[0])"
++  [(set (match_dup 2)
++	(unspec:SDI [(match_dup 1)
++		     (match_dup 3)] UNSPEC_FUSION_P9))])
++
++;; Fusion insns, created by the define_peephole2 above (and eventually by
++;; reload).  Because we want to eventually have secondary_reload generate
++;; these, they have to have a single alternative that gives the register
++;; classes.  This means we need to have separate gpr/fpr/altivec versions.
++(define_insn "fusion_gpr_<P:mode>_<GPR_FUSION:mode>_load"
++  [(set (match_operand:GPR_FUSION 0 "int_reg_operand" "=r")
++	(unspec:GPR_FUSION
++	 [(match_operand:GPR_FUSION 1 "fusion_addis_mem_combo_load" "wF")]
++	 UNSPEC_FUSION_P9))
++   (clobber (match_operand:P 2 "base_reg_operand" "=&b"))]
++  "TARGET_P9_FUSION"
++{
++  /* This insn is a secondary reload insn, which cannot have alternatives.
++     If we are not loading up register 0, use the power8 fusion instead.  */
++  if (base_reg_operand (operands[0], <GPR_FUSION:MODE>mode))
++    return emit_fusion_gpr_load (operands[0], operands[1]);
++
++  return emit_fusion_p9_load (operands[0], operands[1], operands[2]);
++}
++  [(set_attr "type" "load")
++   (set_attr "length" "8")])
++
++(define_insn "fusion_gpr_<P:mode>_<GPR_FUSION:mode>_store"
++  [(set (match_operand:GPR_FUSION 0 "fusion_addis_mem_combo_store" "=wF")
++	(unspec:GPR_FUSION
++	 [(match_operand:GPR_FUSION 1 "int_reg_operand" "r")]
++	 UNSPEC_FUSION_P9))
++   (clobber (match_operand:P 2 "base_reg_operand" "=&b"))]
++  "TARGET_P9_FUSION"
++{
++  return emit_fusion_p9_store (operands[0], operands[1], operands[2]);
++}
++  [(set_attr "type" "store")
++   (set_attr "length" "8")])
++
++(define_insn "fusion_fpr_<P:mode>_<FPR_FUSION:mode>_load"
++  [(set (match_operand:FPR_FUSION 0 "fpr_reg_operand" "=d")
++	(unspec:FPR_FUSION
++	 [(match_operand:FPR_FUSION 1 "fusion_addis_mem_combo_load" "wF")]
++	 UNSPEC_FUSION_P9))
++   (clobber (match_operand:P 2 "base_reg_operand" "=b"))]
++  "TARGET_P9_FUSION"
++{
++  return emit_fusion_p9_load (operands[0], operands[1], operands[2]);
++}
++  [(set_attr "type" "fpload")
++   (set_attr "length" "8")])
++
++(define_insn "fusion_fpr_<P:mode>_<FPR_FUSION:mode>_store"
++  [(set (match_operand:FPR_FUSION 0 "fusion_addis_mem_combo_store" "=wF")
++	(unspec:FPR_FUSION
++	 [(match_operand:FPR_FUSION 1 "fpr_reg_operand" "d")]
++	 UNSPEC_FUSION_P9))
++   (clobber (match_operand:P 2 "base_reg_operand" "=b"))]
++  "TARGET_P9_FUSION"
++{
++  return emit_fusion_p9_store (operands[0], operands[1], operands[2]);
++}
++  [(set_attr "type" "fpstore")
++   (set_attr "length" "8")])
++
++(define_insn "*fusion_p9_<mode>_constant"
++  [(set (match_operand:SDI 0 "int_reg_operand" "=r")
++	(unspec:SDI [(match_operand:SDI 1 "upper16_cint_operand" "L")
++		     (match_operand:SDI 2 "u_short_cint_operand" "K")]
++		    UNSPEC_FUSION_P9))]	
++  "TARGET_P9_FUSION"
++{
++  emit_fusion_addis (operands[0], operands[1], "constant", "<MODE>");
++  return "ori %0,%0,%2";
++}
++  [(set_attr "type" "two")
++   (set_attr "length" "8")])
++
++
+ ;; Miscellaneous ISA 2.06 (power7) instructions
+ (define_insn "addg6s"
+   [(set (match_operand:SI 0 "register_operand" "=r")
+@@ -13896,7 +14799,10 @@
+ ;; Pack/unpack 128-bit floating point types that take 2 scalar registers
+ 
+ ; Type of the 64-bit part when packing/unpacking 128-bit floating point types
+-(define_mode_attr FP128_64 [(TF "DF") (TD "DI")])
++(define_mode_attr FP128_64 [(TF "DF")
++			    (IF "DF")
++			    (TD "DI")
++			    (KF "DI")])
+ 
+ (define_expand "unpack<mode>"
+   [(set (match_operand:<FP128_64> 0 "nonimmediate_operand" "")
+@@ -13904,7 +14810,7 @@
+ 	 [(match_operand:FMOVE128 1 "register_operand" "")
+ 	  (match_operand:QI 2 "const_0_to_1_operand" "")]
+ 	 UNSPEC_UNPACK_128BIT))]
+-  ""
++  "FLOAT128_2REG_P (<MODE>mode)"
+   "")
+ 
+ (define_insn_and_split "unpack<mode>_dm"
+@@ -13913,7 +14819,7 @@
+ 	 [(match_operand:FMOVE128 1 "register_operand" "d,d,r,d,r")
+ 	  (match_operand:QI 2 "const_0_to_1_operand" "i,i,i,i,i")]
+ 	 UNSPEC_UNPACK_128BIT))]
+-  "TARGET_POWERPC64 && TARGET_DIRECT_MOVE"
++  "TARGET_POWERPC64 && TARGET_DIRECT_MOVE && FLOAT128_2REG_P (<MODE>mode)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 0) (match_dup 3))]
+@@ -13937,7 +14843,7 @@
+ 	 [(match_operand:FMOVE128 1 "register_operand" "d,d")
+ 	  (match_operand:QI 2 "const_0_to_1_operand" "i,i")]
+ 	 UNSPEC_UNPACK_128BIT))]
+-  "!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE"
++  "(!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE) && FLOAT128_2REG_P (<MODE>mode)"
+   "#"
+   "&& reload_completed"
+   [(set (match_dup 0) (match_dup 3))]
+@@ -13961,7 +14867,7 @@
+ 	 [(match_operand:<FP128_64> 1 "register_operand" "0,d")
+ 	  (match_operand:<FP128_64> 2 "register_operand" "d,d")]
+ 	 UNSPEC_PACK_128BIT))]
+-  ""
++  "FLOAT128_2REG_P (<MODE>mode)"
+   "@
+    fmr %L0,%2
+    #"
+@@ -13981,12 +14887,12 @@
+   [(set_attr "type" "fp,fp")
+    (set_attr "length" "4,8")])
+ 
+-(define_insn "unpackv1ti"
++(define_insn "unpack<mode>"
+   [(set (match_operand:DI 0 "register_operand" "=d,d")
+-	(unspec:DI [(match_operand:V1TI 1 "register_operand" "0,wa")
++	(unspec:DI [(match_operand:FMOVE128_VSX 1 "register_operand" "0,wa")
+ 		    (match_operand:QI 2 "const_0_to_1_operand" "O,i")]
+ 	 UNSPEC_UNPACK_128BIT))]
+-  "TARGET_VSX"
++  "VECTOR_MEM_ALTIVEC_OR_VSX_P (<MODE>mode)"
+ {
+   if (REGNO (operands[0]) == REGNO (operands[1]) && INTVAL (operands[2]) == 0)
+     return ASM_COMMENT_START " xxpermdi to same register";
+@@ -13994,22 +14900,405 @@
+   operands[3] = GEN_INT (INTVAL (operands[2]) == 0 ? 0 : 3);
+   return "xxpermdi %x0,%x1,%x1,%3";
+ }
+-  [(set_attr "type" "vecperm")
+-   (set_attr "length" "4")])
++  [(set_attr "type" "vecperm")])
+ 
+-(define_insn "packv1ti"
+-  [(set (match_operand:V1TI 0 "register_operand" "=wa")
+-	(unspec:V1TI
++(define_insn "pack<mode>"
++  [(set (match_operand:FMOVE128_VSX 0 "register_operand" "=wa")
++	(unspec:FMOVE128_VSX
+ 	 [(match_operand:DI 1 "register_operand" "d")
+ 	  (match_operand:DI 2 "register_operand" "d")]
+ 	 UNSPEC_PACK_128BIT))]
+   "TARGET_VSX"
+   "xxpermdi %x0,%x1,%x2,0"
+-  [(set_attr "type" "vecperm")
+-   (set_attr "length" "4")])
++  [(set_attr "type" "vecperm")])
+ 
++
+ 
++;; ISA 2.08 IEEE 128-bit floating point support.
+ 
++(define_insn "add<mode>3"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(plus:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsaddqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "sub<mode>3"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(minus:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xssubqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "mul<mode>3"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(mult:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsmulqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "div<mode>3"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(div:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsdivqp %0,%1,%2"
++  [(set_attr "type" "vecdiv")])
++
++(define_insn "sqrt<mode>2"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(sqrt:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++   "xssqrtqp %0,%1"
++  [(set_attr "type" "vecdiv")])
++
++(define_insn "copysign<mode>3"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(unspec:IEEE128
++	 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
++	  (match_operand:IEEE128 2 "altivec_register_operand" "v")]
++	 UNSPEC_COPYSIGN))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++   "xscpsgnqp %0,%2,%1"
++  [(set_attr "type" "vecsimple")])
++
++(define_insn "neg<mode>2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(neg:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsnegqp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++
++(define_insn "abs<mode>2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(abs:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsabsqp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++
++(define_insn "*nabs<mode>2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(neg:IEEE128
++	 (abs:IEEE128
++	  (match_operand:IEEE128 1 "altivec_register_operand" "v"))))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsnabsqp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++;; Initially don't worry about doing fusion
++(define_insn "*fma<mode>4_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(fma:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "%v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")
++	 (match_operand:IEEE128 3 "altivec_register_operand" "0")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsmaddqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*fms<mode>4_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(fma:IEEE128
++	 (match_operand:IEEE128 1 "altivec_register_operand" "%v")
++	 (match_operand:IEEE128 2 "altivec_register_operand" "v")
++	 (neg:IEEE128
++	  (match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsmsubqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*nfma<mode>4_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(neg:IEEE128
++	 (fma:IEEE128
++	  (match_operand:IEEE128 1 "altivec_register_operand" "%v")
++	  (match_operand:IEEE128 2 "altivec_register_operand" "v")
++	  (match_operand:IEEE128 3 "altivec_register_operand" "0"))))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsnmaddqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*nfms<mode>4_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(neg:IEEE128
++	 (fma:IEEE128
++	  (match_operand:IEEE128 1 "altivec_register_operand" "%v")
++	  (match_operand:IEEE128 2 "altivec_register_operand" "v")
++	  (neg:IEEE128
++	   (match_operand:IEEE128 3 "altivec_register_operand" "0")))))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xsnmsubqp %0,%1,%2"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "extend<SFDF:mode><IEEE128:mode>2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(float_extend:IEEE128
++	 (match_operand:SFDF 1 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<IEEE128:MODE>mode)"
++  "xscvdpqp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++;; Conversion between KFmode and TFmode if TFmode is ieee 128-bit floating
++;; point is a simple copy.
++(define_insn_and_split "extendkftf2"
++  [(set (match_operand:TF 0 "vsx_register_operand" "=wa,?wa")
++	(float_extend:TF (match_operand:KF 1 "vsx_register_operand" "0,wa")))]
++  "TARGET_FLOAT128 && TARGET_IEEEQUAD"
++  "@
++   #
++   xxlor %x0,%x1,%x1"
++  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
++  [(const_int 0)]
++{
++  emit_note (NOTE_INSN_DELETED);
++  DONE;
++}
++  [(set_attr "type" "*,vecsimple")
++   (set_attr "length" "0,4")])
++
++(define_insn_and_split "trunctfkf2"
++  [(set (match_operand:KF 0 "vsx_register_operand" "=wa,?wa")
++	(float_extend:KF (match_operand:TF 1 "vsx_register_operand" "0,wa")))]
++  "TARGET_FLOAT128 && TARGET_IEEEQUAD"
++  "@
++   #
++   xxlor %x0,%x1,%x1"
++  "&& reload_completed  && REGNO (operands[0]) == REGNO (operands[1])"
++  [(const_int 0)]
++{
++  emit_note (NOTE_INSN_DELETED);
++  DONE;
++}
++  [(set_attr "type" "*,vecsimple")
++   (set_attr "length" "0,4")])
++
++(define_insn "trunc<mode>df2_hw"
++  [(set (match_operand:DF 0 "altivec_register_operand" "=v")
++	(float_truncate:DF
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xscvqpdp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++;; There is no KFmode -> SFmode instruction. Preserve the accuracy by doing
++;; the KFmode -> DFmode conversion using round to odd rather than the normal
++;; conversion
++(define_insn_and_split "trunc<mode>sf2_hw"
++  [(set (match_operand:SF 0 "vsx_register_operand" "=wy")
++	(float_truncate:SF
++	 (match_operand:IEEE128 1 "altivec_register_operand" "v")))
++   (clobber (match_scratch:DF 2 "=v"))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(set (match_dup 2)
++	(unspec:DF [(match_dup 1)] UNSPEC_ROUND_TO_ODD))
++   (set (match_dup 0)
++	(float_truncate:SF (match_dup 2)))]
++{
++  if (GET_CODE (operands[2]) == SCRATCH)
++    operands[2] = gen_reg_rtx (DFmode);
++}
++  [(set_attr "type" "vecfloat")
++   (set_attr "length" "8")])
++
++;; At present SImode is not allowed in VSX registers at all, and DImode is only
++;; allowed in the traditional floating point registers. Use V2DImode so that
++;; we can get a value in an Altivec register.
++
++(define_code_attr fix_fixuns	 [(fix   "fix")   (unsigned_fix   "fixuns")])
++(define_code_attr float_floatuns [(float "float") (unsigned_float "floatuns")])
++
++(define_insn_and_split "<fix_fixuns>_<mode>si2_hw"
++  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,Z")
++	(any_fix:SI (match_operand:IEEE128 1 "altivec_register_operand" "v,v")))
++   (clobber (match_scratch:V2DI 2 "=v,v"))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(pc)]
++{
++  convert_float128_to_int (operands, <CODE>);
++  DONE;
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "mftgpr,fpstore")])
++
++(define_insn_and_split "<fix_fixuns>_<mode>di2_hw"
++  [(set (match_operand:DI 0 "nonimmediate_operand" "=wr,wi,Z")
++	(any_fix:DI (match_operand:IEEE128 1 "altivec_register_operand" "v,v,v")))
++   (clobber (match_scratch:V2DI 2 "=v,v,v"))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(pc)]
++{
++  convert_float128_to_int (operands, <CODE>);
++  DONE;
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "mftgpr,vecsimple,fpstore")])
++
++(define_insn_and_split "<float_floatuns>_<mode>si2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v,v")
++	(any_float:IEEE128 (match_operand:SI 1 "nonimmediate_operand" "r,Z")))
++   (clobber (match_scratch:V2DI 2 "=v,v"))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(pc)]
++{
++  convert_int_to_float128 (operands, <CODE>);
++  DONE;
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "vecfloat")])
++
++(define_insn_and_split "<float_floatuns>_<mode>di2_hw"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v,v,v")
++	(any_float:IEEE128 (match_operand:DI 1 "nonimmediate_operand" "wi,wr,Z")))
++   (clobber (match_scratch:V2DI 2 "=v,v,v"))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "#"
++  "&& 1"
++  [(pc)]
++{
++  convert_int_to_float128 (operands, <CODE>);
++  DONE;
++}
++  [(set_attr "length" "8")
++   (set_attr "type" "vecfloat")])
++
++;; Integer conversion instructions, using V2DImode to get an Altivec register
++(define_insn "*xscvqp<su>wz_<mode>"
++  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
++	(unspec:V2DI
++	 [(any_fix:SI
++	   (match_operand:IEEE128 1 "altivec_register_operand" "v"))]
++	 UNSPEC_IEEE128_CONVERT))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xscvqp<su>wz %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*xscvqp<su>dz_<mode>"
++  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
++	(unspec:V2DI
++	 [(any_fix:DI
++	   (match_operand:IEEE128 1 "altivec_register_operand" "v"))]
++	 UNSPEC_IEEE128_CONVERT))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xscvqp<su>dz %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*xscv<su>dqp_<mode>"
++  [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
++	(any_float:IEEE128
++	 (unspec:DI [(match_operand:V2DI 1 "altivec_register_operand" "v")]
++		    UNSPEC_IEEE128_CONVERT)))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xscv<su>dqp %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++(define_insn "*ieee128_mfvsrd_64bit"
++  [(set (match_operand:DI 0 "reg_or_indexed_operand" "=wr,Z,wi")
++	(unspec:DI [(match_operand:V2DI 1 "altivec_register_operand" "v,v,v")]
++		   UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW && TARGET_POWERPC64"
++  "@
++   mfvsrd %0,%x1
++   stxsdx %x1,%y0
++   xxlor %x0,%x1,%x1"
++  [(set_attr "type" "mftgpr,vecsimple,fpstore")])
++
++
++(define_insn "*ieee128_mfvsrd_32bit"
++  [(set (match_operand:DI 0 "reg_or_indexed_operand" "=Z,wi")
++	(unspec:DI [(match_operand:V2DI 1 "altivec_register_operand" "v,v")]
++		   UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW && !TARGET_POWERPC64"
++  "@
++   stxsdx %x1,%y0
++   xxlor %x0,%x1,%x1"
++  [(set_attr "type" "vecsimple,fpstore")])
++
++(define_insn "*ieee128_mfvsrwz"
++  [(set (match_operand:SI 0 "reg_or_indexed_operand" "=r,Z")
++	(unspec:SI [(match_operand:V2DI 1 "altivec_register_operand" "v,v")]
++		   UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW"
++  "@
++   mfvsrwz %0,%x1
++   stxsiwx %x1,%y0"
++  [(set_attr "type" "mftgpr,fpstore")])
++
++;; 0 says do sign-extension, 1 says zero-extension
++(define_insn "*ieee128_mtvsrw"
++  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v,v,v,v")
++	(unspec:V2DI [(match_operand:SI 1 "nonimmediate_operand" "r,Z,r,Z")
++		      (match_operand:SI 2 "const_0_to_1_operand" "O,O,n,n")]
++		     UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW"
++  "@
++   mtvsrwa %x0,%1
++   lxsiwax %x0,%y1
++   mtvsrwz %x0,%1
++   lxsiwzx %x0,%y1"
++  [(set_attr "type" "mffgpr,fpload,mffgpr,fpload")])
++
++
++(define_insn "*ieee128_mtvsrd_64bit"
++  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v,v,v")
++	(unspec:V2DI [(match_operand:DI 1 "nonimmediate_operand" "wr,Z,wi")]
++		     UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW && TARGET_POWERPC64"
++  "@
++   mtvsrd %x0,%1
++   lxsdx %x0,%y1
++   xxlor %x0,%x1,%x1"
++  [(set_attr "type" "mffgpr,fpload,vecsimple")])
++
++(define_insn "*ieee128_mtvsrd_32bit"
++  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v,v")
++	(unspec:V2DI [(match_operand:DI 1 "nonimmediate_operand" "Z,wi")]
++		     UNSPEC_IEEE128_MOVE))]
++  "TARGET_FLOAT128_HW && !TARGET_POWERPC64"
++  "@
++   lxsdx %x0,%y1
++   xxlor %x0,%x1,%x1"
++  [(set_attr "type" "fpload,vecsimple")])
++
++;; IEEE 128-bit instructions with round to odd semantics
++(define_insn "*trunc<mode>df2_odd"
++  [(set (match_operand:DF 0 "vsx_register_operand" "=v")
++	(unspec:DF [(match_operand:IEEE128 1 "altivec_register_operand" "v")]
++		   UNSPEC_ROUND_TO_ODD))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++  "xscvqpdpo %0,%1"
++  [(set_attr "type" "vecfloat")])
++
++;; IEEE 128-bit comparisons
++(define_insn "*cmp<mode>_hw"
++  [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
++	(compare:CCFP (match_operand:IEEE128 1 "altivec_register_operand" "v")
++		      (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
++  "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
++   "xscmpuqp %0,%1,%2"
++  [(set_attr "type" "fpcompare")])
++
++
++
+ (include "sync.md")
+ (include "vector.md")
+ (include "vsx.md")
+Index: gcc/config/rs6000/rs6000-opts.h
+===================================================================
+--- a/src/gcc/config/rs6000/rs6000-opts.h	(.../gcc-5-branch)
++++ b/src/gcc/config/rs6000/rs6000-opts.h	(.../ibm/gcc-5-branch)
+@@ -60,6 +60,7 @@
+    PROCESSOR_POWER6,
+    PROCESSOR_POWER7,
+    PROCESSOR_POWER8,
++   PROCESSOR_POWER9,
+ 
+    PROCESSOR_RS64A,
+    PROCESSOR_MPCCORE,
+@@ -79,6 +80,7 @@
+   FPU_DF_FULL			/* Full Double Single Precision FPU */
+ };
+ 
++
+ /* Types of costly dependences.  */
+ enum rs6000_dependence_cost
+ {
+Index: libgo/configure
+===================================================================
+--- a/src/libgo/configure	(.../gcc-5-branch)
++++ b/src/libgo/configure	(.../ibm/gcc-5-branch)
+@@ -14034,13 +14034,30 @@
+   $as_echo_n "(cached) " >&6
+ else
+   libgo_cv_c_linker_supports_split_stack=no
+-if $GOC -Wl,--help 2>/dev/null | grep split-stack-adjust-size >/dev/null 2>&1; then
+-  libgo_cv_c_linker_supports_split_stack=yes
++if test "$is_ppc64" == "yes" || test "$is_ppc64le" == "yes"; then
++  if $GOC -Wl,--version | grep -i gold >/dev/null 2>&1; then
++    gold_vers=`$GOC -Wl,--version | sed 1q | sed -n -e 's/.*Binutils.* \([0-9][0-9]*\.[^)]*\)).*$/\1/p'`
++    gold_vers_major=`expr "$gold_vers" : '\([0-9]*\)'`
++    gold_vers_minor=`expr "$gold_vers" : '[0-9]*\.\([0-9]*\)'`
++    gold_vers_patch=`expr "$gold_vers" : '[0-9]*\.[0-9]*\.\([0-9]*\)'`
++
++    case x"$gold_vers_minor" in
++      x25)
++        if test "$gold_vers_patch" != ""; then
++          libgo_cv_c_linker_supports_split_stack=yes
++        fi
++        ;;
++      x2[6-9])
++        libgo_cv_c_linker_supports_split_stack=yes
++        ;;
++      esac
++  fi
+ fi
++
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libgo_cv_c_linker_supports_split_stack" >&5
+ $as_echo "$libgo_cv_c_linker_supports_split_stack" >&6; }
+-if test "$libgo_cv_c_linker_supports_split_stack" = yes; then
++if test x"$libgo_cv_c_linker_supports_split_stack" = xyes; then
+ 
+ $as_echo "#define LINKER_SUPPORTS_SPLIT_STACK 1" >>confdefs.h
+ 
+Index: libgo/configure.ac
+===================================================================
+--- a/src/libgo/configure.ac	(.../gcc-5-branch)
++++ b/src/libgo/configure.ac	(.../ibm/gcc-5-branch)
+@@ -385,21 +385,34 @@
+ AM_CONDITIONAL(USING_SPLIT_STACK,
+ 	test "$libgo_cv_c_split_stack_supported" = yes)
+ 
+-dnl Check whether the linker does stack munging when calling from
+-dnl split-stack into non-split-stack code.  We check this by looking
+-dnl at the --help output.  FIXME: This is only half right: it's
+-dnl possible for the linker to support this for some targets but not
+-dnl others.
++dnl Check whether the linker supports split stack
+ AC_CACHE_CHECK([whether linker supports split stack],
+ [libgo_cv_c_linker_supports_split_stack],
+ [libgo_cv_c_linker_supports_split_stack=no
+-if $GOC -Wl,--help 2>/dev/null | grep split-stack-adjust-size >/dev/null 2>&1; then
+-  libgo_cv_c_linker_supports_split_stack=yes
+-fi])
+-if test "$libgo_cv_c_linker_supports_split_stack" = yes; then
+-  AC_DEFINE(LINKER_SUPPORTS_SPLIT_STACK, 1,
+-	    [Define if the linker support split stack adjustments])
++if test "$is_ppc64" == "yes" || test "$is_ppc64le" == "yes"; then
++  if $GOC -Wl,--version | grep -i gold >/dev/null 2>&1; then
++    gold_vers=`$GOC -Wl,--version | sed 1q | sed -n -e 's/.*Binutils.* \([[0-9]][[0-9]]*\.[[^)]]*\)).*$/\1/p'`
++    gold_vers_major=`expr "$gold_vers" : '\([[0-9]]*\)'`
++    gold_vers_minor=`expr "$gold_vers" : '[[0-9]]*\.\([[0-9]]*\)'`
++    gold_vers_patch=`expr "$gold_vers" : '[[0-9]]*\.[[0-9]]*\.\([[0-9]]*\)'`
++
++    case x"$gold_vers_minor" in
++      x25)
++        if test "$gold_vers_patch" != ""; then
++          libgo_cv_c_linker_supports_split_stack=yes
++        fi
++        ;;
++      x2[[6-9]])
++        libgo_cv_c_linker_supports_split_stack=yes
++        ;;
++      esac
++  fi
+ fi
++])
++if test x"$libgo_cv_c_linker_supports_split_stack" = xyes; then
++   AC_DEFINE(LINKER_SUPPORTS_SPLIT_STACK, 1,
++[Define if your PowerPC64 gold linker supports split stack.])
++fi
+ 
+ AC_CACHE_CHECK([whether compiler is llgo],
+ [libgo_cv_c_goc_is_llgo],
--- gcc-5-5.4.0.orig/debian/patches/kfreebsd-boehm-gc.diff
+++ gcc-5-5.4.0/debian/patches/kfreebsd-boehm-gc.diff
@@ -0,0 +1,15 @@
+# DP: boehm-gc: use mmap instead of brk also on kfreebsd-*.
+
+Index: b/src/boehm-gc/configure.host
+===================================================================
+--- a/src/boehm-gc/configure.host
++++ b/src/boehm-gc/configure.host
+@@ -41,7 +41,7 @@ else
+ fi
+ 
+ case "${host}" in
+-  *-linux*)
++  *-linux*|*-kfreebsd*-gnu*)
+     gc_use_mmap=yes
+     ;;
+ esac
--- gcc-5-5.4.0.orig/debian/patches/kfreebsd-unwind.diff
+++ gcc-5-5.4.0/debian/patches/kfreebsd-unwind.diff
@@ -0,0 +1,53 @@
+# DP: DWARF2 EH unwinding support for AMD x86-64 and x86 KFreeBSD.
+
+Index: b/src/libgcc/config.host
+===================================================================
+--- a/src/libgcc/config.host
++++ b/src/libgcc/config.host
+@@ -595,7 +595,12 @@ i[34567]86-*-linux*)
+ 	tm_file="${tm_file} i386/elf-lib.h"
+ 	md_unwind_header=i386/linux-unwind.h
+ 	;;
+-i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i[34567]86-*-gnu* | i[34567]86-*-kopensolaris*-gnu)
++i[34567]86-*-kfreebsd*-gnu)
++	extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o"
++	tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules"
++	md_unwind_header=i386/freebsd-unwind.h
++	;;
++i[34567]86-*-knetbsd*-gnu | i[34567]86-*-gnu* | i[34567]86-*-kopensolaris*-gnu)
+ 	extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o"
+ 	tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules"
+ 	tm_file="${tm_file} i386/elf-lib.h"
+@@ -606,7 +611,12 @@ x86_64-*-linux*)
+ 	tm_file="${tm_file} i386/elf-lib.h"
+ 	md_unwind_header=i386/linux-unwind.h
+ 	;;
+-x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu)
++x86_64-*-kfreebsd*-gnu)
++	extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o"
++	tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules"
++	md_unwind_header=i386/freebsd-unwind.h
++	;;
++x86_64-*-knetbsd*-gnu)
+ 	extra_parts="$extra_parts crtprec32.o crtprec64.o crtprec80.o crtfastmath.o"
+ 	tmake_file="${tmake_file} i386/t-crtpc i386/t-crtfm i386/t-crtstuff t-dfprules"
+ 	tm_file="${tm_file} i386/elf-lib.h"
+Index: b/src/libgcc/config/i386/freebsd-unwind.h
+===================================================================
+--- a/src/libgcc/config/i386/freebsd-unwind.h
++++ b/src/libgcc/config/i386/freebsd-unwind.h
+@@ -26,6 +26,8 @@ see the files COPYING3 and COPYING.RUNTI
+ /* Do code reading to identify a signal frame, and set the frame
+    state data appropriately.  See unwind-dw2.c for the structs. */
+ 
++#ifndef inhibit_libc
++
+ #include <sys/types.h>
+ #include <signal.h>
+ #include <sys/ucontext.h>
+@@ -171,3 +173,5 @@ x86_freebsd_fallback_frame_state
+   return _URC_NO_REASON;
+ }
+ #endif /* ifdef __x86_64__  */
++
++#endif /* ifndef inhibit_libc */
--- gcc-5-5.4.0.orig/debian/patches/libasan-sparc.diff
+++ gcc-5-5.4.0/debian/patches/libasan-sparc.diff
@@ -0,0 +1,163 @@
+# DP: Re-apply sanitizer patch for sparc, dropped upstream
+
+# don't remove, this is regularly overwritten, see PR sanitizer/63958.
+
+libsanitizer/
+
+2014-10-14  David S. Miller  <davem@davemloft.net>
+
+	* sanitizer_common/sanitizer_platform_limits_linux.cc (time_t):
+	Define at __kernel_time_t, as needed for sparc.
+	(struct __old_kernel_stat): Don't check if __sparc__ is defined.
+	* libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+	(__sanitizer): Define struct___old_kernel_stat_sz,
+	struct_kernel_stat_sz, and struct_kernel_stat64_sz for sparc.
+	(__sanitizer_ipc_perm): Adjust for sparc targets.
+	(__sanitizer_shmid_ds): Likewsie.
+	(__sanitizer_sigaction): Likewsie.
+	(IOC_SIZE): Likewsie.
+
+Index: libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+===================================================================
+--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h	(revision 216223)
++++ a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h	(revision 216224)
+@@ -72,6 +72,14 @@
+   const unsigned struct_kernel_stat_sz = 144;
+   #endif
+   const unsigned struct_kernel_stat64_sz = 104;
++#elif defined(__sparc__) && defined(__arch64__)
++  const unsigned struct___old_kernel_stat_sz = 0;
++  const unsigned struct_kernel_stat_sz = 104;
++  const unsigned struct_kernel_stat64_sz = 144;
++#elif defined(__sparc__) && !defined(__arch64__)
++  const unsigned struct___old_kernel_stat_sz = 0;
++  const unsigned struct_kernel_stat_sz = 64;
++  const unsigned struct_kernel_stat64_sz = 104;
+ #endif
+   struct __sanitizer_perf_event_attr {
+     unsigned type;
+@@ -94,7 +102,7 @@
+ 
+ #if defined(__powerpc64__)
+   const unsigned struct___old_kernel_stat_sz = 0;
+-#else
++#elif !defined(__sparc__)
+   const unsigned struct___old_kernel_stat_sz = 32;
+ #endif
+ 
+@@ -173,6 +181,18 @@
+     unsigned short __pad1;
+     unsigned long __unused1;
+     unsigned long __unused2;
++#elif defined(__sparc__)
++# if defined(__arch64__)
++    unsigned mode;
++    unsigned short __pad1;
++# else
++    unsigned short __pad1;
++    unsigned short mode;
++    unsigned short __pad2;
++# endif
++    unsigned short __seq;
++    unsigned long long __unused1;
++    unsigned long long __unused2;
+ #else
+     unsigned short mode;
+     unsigned short __pad1;
+@@ -190,6 +210,26 @@
+ 
+   struct __sanitizer_shmid_ds {
+     __sanitizer_ipc_perm shm_perm;
++  #if defined(__sparc__)
++  # if !defined(__arch64__)
++    u32 __pad1;
++  # endif
++    long shm_atime;
++  # if !defined(__arch64__)
++    u32 __pad2;
++  # endif
++    long shm_dtime;
++  # if !defined(__arch64__)
++    u32 __pad3;
++  # endif
++    long shm_ctime;
++    uptr shm_segsz;
++    int shm_cpid;
++    int shm_lpid;
++    unsigned long shm_nattch;
++    unsigned long __glibc_reserved1;
++    unsigned long __glibc_reserved2;
++  #else    
+   #ifndef __powerpc__
+     uptr shm_segsz;
+   #elif !defined(__powerpc64__)
+@@ -227,6 +267,7 @@
+     uptr __unused4;
+     uptr __unused5;
+   #endif
++#endif
+   };
+ #elif SANITIZER_FREEBSD
+   struct __sanitizer_ipc_perm {
+@@ -523,9 +564,13 @@
+ #else
+     __sanitizer_sigset_t sa_mask;
+ #ifndef __mips__
++#if defined(__sparc__)
++    unsigned long sa_flags;
++#else
+     int sa_flags;
+ #endif
+ #endif
++#endif
+ #if SANITIZER_LINUX
+     void (*sa_restorer)();
+ #endif
+@@ -745,7 +790,7 @@
+ 
+ #define IOC_NRBITS 8
+ #define IOC_TYPEBITS 8
+-#if defined(__powerpc__) || defined(__powerpc64__) || defined(__mips__)
++#if defined(__powerpc__) || defined(__powerpc64__) || defined(__mips__) || defined(__sparc__)
+ #define IOC_SIZEBITS 13
+ #define IOC_DIRBITS 3
+ #define IOC_NONE 1U
+@@ -775,7 +820,17 @@
+ #define IOC_DIR(nr) (((nr) >> IOC_DIRSHIFT) & IOC_DIRMASK)
+ #define IOC_TYPE(nr) (((nr) >> IOC_TYPESHIFT) & IOC_TYPEMASK)
+ #define IOC_NR(nr) (((nr) >> IOC_NRSHIFT) & IOC_NRMASK)
++
++#if defined(__sparc__)
++// In sparc the 14 bits SIZE field overlaps with the
++// least significant bit of DIR, so either IOC_READ or
++// IOC_WRITE shall be 1 in order to get a non-zero SIZE.
++# define IOC_SIZE(nr)                       \
++  ((((((nr) >> 29) & 0x7) & (4U|2U)) == 0)? \
++   0 : (((nr) >> 16) & 0x3fff))
++#else
+ #define IOC_SIZE(nr) (((nr) >> IOC_SIZESHIFT) & IOC_SIZEMASK)
++#endif
+ 
+   extern unsigned struct_arpreq_sz;
+   extern unsigned struct_ifreq_sz;
+Index: libsanitizer/sanitizer_common/sanitizer_platform_limits_linux.cc
+===================================================================
+--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_linux.cc	(revision 216223)
++++ a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_linux.cc	(revision 216224)
+@@ -36,6 +36,7 @@
+ #define uid_t __kernel_uid_t
+ #define gid_t __kernel_gid_t
+ #define off_t __kernel_off_t
++#define time_t __kernel_time_t
+ // This header seems to contain the definitions of _kernel_ stat* structs.
+ #include <asm/stat.h>
+ #undef ino_t
+@@ -60,7 +61,7 @@
+ }  // namespace __sanitizer
+ 
+ #if !defined(__powerpc64__) && !defined(__x86_64__) && !defined(__aarch64__)\
+-                            && !defined(__mips__)
++                            && !defined(__mips__) && !defined(__sparc__)
+ COMPILER_CHECK(struct___old_kernel_stat_sz == sizeof(struct __old_kernel_stat));
+ #endif
+ 
--- gcc-5-5.4.0.orig/debian/patches/libcilkrts-targets.diff
+++ gcc-5-5.4.0/debian/patches/libcilkrts-targets.diff
@@ -0,0 +1,21 @@
+# DP: Disable libcilkrts on KFreeBSD and the Hurd. See #734973.
+
+Index: b/src/libcilkrts/configure.tgt
+===================================================================
+--- a/src/libcilkrts/configure.tgt
++++ b/src/libcilkrts/configure.tgt
+@@ -44,3 +44,14 @@ esac
+ 
+ # Disable libcilkrts on non POSIX hosted systems.
+ . ${srcdir}/../config/target-posix
++
++# Disable libcilkrts on KFreeBSD and the Hurd.
++if test x$enable_libcilkrts = x ; then
++    case "${target}" in
++    *-*-linux*)
++        ;;
++    *-*-gnu* | *-*-k*bsd*-gnu)
++        UNSUPPORTED=1
++        ;;
++    esac
++fi
--- gcc-5-5.4.0.orig/debian/patches/libffi-ro-eh_frame_sect.diff
+++ gcc-5-5.4.0/debian/patches/libffi-ro-eh_frame_sect.diff
@@ -0,0 +1,15 @@
+# DP: PR libffi/47248, force a read only eh frame section.
+
+Index: b/src/libffi/configure.ac
+===================================================================
+--- a/src/libffi/configure.ac
++++ b/src/libffi/configure.ac
+@@ -270,6 +270,8 @@ if test "x$GCC" = "xyes"; then
+   		libffi_cv_hidden_visibility_attribute=yes
+   	    fi
+   	fi
++	# FIXME: see PR libffi/47248
++	libffi_cv_ro_eh_frame=yes
+   	rm -f conftest.*
+       ])
+   if test $libffi_cv_hidden_visibility_attribute = yes; then
--- gcc-5-5.4.0.orig/debian/patches/libgnatprj-cross-hack.diff
+++ gcc-5-5.4.0/debian/patches/libgnatprj-cross-hack.diff
@@ -0,0 +1,66 @@
+This is a gross hack to cross build libgnatprj without having the
+gmp.h header for the target architecture.  Are libgnatvsn and libgnatprj
+really target libraries, or host libraries? The odd thing is that
+the gnat cross build tools are not linked against these two libraries.
+
+Index: b/src/gcc/wide-int.h
+===================================================================
+--- a/src/gcc/wide-int.h
++++ b/src/gcc/wide-int.h
+@@ -3089,8 +3089,10 @@ namespace wi
+   wide_int from_buffer (const unsigned char *, unsigned int);
+ 
+ #ifndef GENERATOR_FILE
++#ifndef LIBGNATPRJ_CROSS_HACK
+   void to_mpz (const wide_int_ref &, mpz_t, signop);
+ #endif
++#endif
+ 
+   wide_int mask (unsigned int, bool, unsigned int);
+   wide_int shifted_mask (unsigned int, unsigned int, bool, unsigned int);
+Index: b/src/gcc/system.h
+===================================================================
+--- a/src/gcc/system.h
++++ b/src/gcc/system.h
+@@ -659,8 +659,10 @@ extern int vsnprintf (char *, size_t, co
+ 
+ /* Do not introduce a gmp.h dependency on the build system.  */
+ #ifndef GENERATOR_FILE
++#ifndef LIBGNATPRJ_CROSS_HACK
+ #include <gmp.h>
+ #endif
++#endif
+ 
+ /* Get libiberty declarations.  */
+ #include "libiberty.h"
+Index: b/src/libgnatprj/Makefile.in
+===================================================================
+--- a/src/libgnatprj/Makefile.in
++++ b/src/libgnatprj/Makefile.in
+@@ -37,7 +37,7 @@ TOOLS_TARGET_PAIRS := @TOOLS_TARGET_PAIR
+ LN_S := @LN_S@
+ 
+ ifneq (@build@,@host@)
+-   CFLAGS += -b @host@
++   override CFLAGS += -DLIBGNATPRJ_CROSS_HACK
+ endif
+ 
+ .PHONY: libgnatprj install
+Index: b/src/gcc/double-int.h
+===================================================================
+--- a/src/gcc/double-int.h
++++ b/src/gcc/double-int.h
+@@ -431,11 +431,13 @@ double_int::popcount () const
+ 
+ 
+ #ifndef GENERATOR_FILE
++#ifndef LIBGNATPRJ_CROSS_HACK
+ /* Conversion to and from GMP integer representations.  */
+ 
+ void mpz_set_double_int (mpz_t, double_int, bool);
+ double_int mpz_get_double_int (const_tree, mpz_t, bool);
+ #endif
++#endif
+ 
+ namespace wi
+ {
--- gcc-5-5.4.0.orig/debian/patches/libgnatprj-link.diff
+++ gcc-5-5.4.0/debian/patches/libgnatprj-link.diff
@@ -0,0 +1,21 @@
+# DP: Don't link libgnatprj using --no-allow-shlib-undefined on older releases.
+
+in precise:
+/lib/x86_64-linux-gnu/libc.so.6: undefined reference to `_rtld_global@GLIBC_PRIVATE'
+/lib/x86_64-linux-gnu/libc.so.6: undefined reference to `_dl_argv@GLIBC_PRIVATE'
+/lib/x86_64-linux-gnu/libc.so.6: undefined reference to `_rtld_global_ro@GLIBC_PRIVATE'
+/lib/x86_64-linux-gnu/libc.so.6: undefined reference to `__libc_enable_secure@GLIBC_PRIVATE'
+/lib/x86_64-linux-gnu/libc.so.6: undefined reference to `__tls_get_addr@GLIBC_2.3'
+collect2: error: ld returned 1 exit status
+
+--- a/src/libgnatprj/Makefile.in
++++ b/src/libgnatprj/Makefile.in
+@@ -74,7 +74,7 @@
+ 
+ libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS))
+ 	: # Make libgnatprj.so
+-	$(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ -Wl,--no-allow-shlib-undefined \
++	$(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ \
+ 	   $^ $(addprefix ../libiberty/pic/,$(LIBIBERTY_OBJECTS)) \
+ 	   -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \
+ 	   -L../libgnatvsn -lgnatvsn
--- gcc-5-5.4.0.orig/debian/patches/libgo-revert-timeout-exp.diff
+++ gcc-5-5.4.0/debian/patches/libgo-revert-timeout-exp.diff
@@ -0,0 +1,12 @@
+Index: b/src/libgo/testsuite/lib/libgo.exp
+===================================================================
+--- a/src/libgo/testsuite/lib/libgo.exp
++++ b/src/libgo/testsuite/lib/libgo.exp
+@@ -45,7 +45,6 @@ load_gcc_lib wrapper.exp
+ load_gcc_lib target-supports.exp
+ load_gcc_lib target-utils.exp
+ load_gcc_lib gcc-defs.exp
+-load_gcc_lib timeout.exp
+ load_gcc_lib go.exp
+ 
+ proc libgo_init { args } {
--- gcc-5-5.4.0.orig/debian/patches/libgo-setcontext-config.diff
+++ gcc-5-5.4.0/debian/patches/libgo-setcontext-config.diff
@@ -0,0 +1,21 @@
+# DP: libgo: Overwrite the setcontext_clobbers_tls check on mips*
+
+Index: b/src/libgo/configure.ac
+===================================================================
+--- a/src/libgo/configure.ac
++++ b/src/libgo/configure.ac
+@@ -797,6 +797,14 @@ main ()
+ CFLAGS="$CFLAGS_hold"
+ LIBS="$LIBS_hold"
+ ])
++dnl overwrite for the mips* 64bit multilibs, fails on some buildds
++if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then
++  case "$target" in
++  mips*-linux-*)
++    AC_MSG_WARN([FIXME: overwrite setcontext_clobbers_tls for $target:$ptr_type_size])
++    libgo_cv_lib_setcontext_clobbers_tls=no ;;
++  esac
++fi
+ if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then
+   AC_DEFINE(SETCONTEXT_CLOBBERS_TLS, 1,
+ 	    [Define if setcontext clobbers TLS variables])
--- gcc-5-5.4.0.orig/debian/patches/libgo-testsuite.diff
+++ gcc-5-5.4.0/debian/patches/libgo-testsuite.diff
@@ -0,0 +1,52 @@
+# DP: Only run the libgo testsuite for flags configured in RUNTESTFLAGS
+
+Index: b/src/libgo/Makefile.am
+===================================================================
+--- a/src/libgo/Makefile.am
++++ b/src/libgo/Makefile.am
+@@ -2109,6 +2109,12 @@ CHECK = \
+ 	export LD_LIBRARY_PATH; \
+ 	$(MKDIR_P) $(@D); \
+ 	rm -f $@-testsum $@-testlog; \
++	run_check=yes; \
++	MULTILIBDIR="$(MULTILIBDIR)"; \
++	case "$$MULTILIBDIR" in /64|/x32) \
++	  echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR\#/*}" || run_check=; \
++	esac; \
++	if test "$$run_check" = "yes"; then \
+ 	if test "$(USE_DEJAGNU)" = "yes"; then \
+ 	  $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS) $(go_$(subst /,_,$(@D))_test_files); \
+ 	elif test "$(GOBENCH)" != ""; then \
+@@ -2124,6 +2130,7 @@ CHECK = \
+ 	    echo "FAIL: $(@D)" > $@-testsum; \
+ 	    exit 1; \
+ 	  fi; \
++	fi; \
+ 	fi
+ 
+ # Build all packages before checking any.
+Index: b/src/libgo/Makefile.in
+===================================================================
+--- a/src/libgo/Makefile.in
++++ b/src/libgo/Makefile.in
+@@ -2196,6 +2196,12 @@ CHECK = \
+ 	export LD_LIBRARY_PATH; \
+ 	$(MKDIR_P) $(@D); \
+ 	rm -f $@-testsum $@-testlog; \
++	run_check=yes; \
++	MULTILIBDIR="$(MULTILIBDIR)"; \
++	case "$$MULTILIBDIR" in /64|/x32) \
++	  echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR\#/*}" || run_check=; \
++	esac; \
++	if test "$$run_check" = "yes"; then \
+ 	if test "$(USE_DEJAGNU)" = "yes"; then \
+ 	  $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS) $(go_$(subst /,_,$(@D))_test_files); \
+ 	elif test "$(GOBENCH)" != ""; then \
+@@ -2211,6 +2217,7 @@ CHECK = \
+ 	    echo "FAIL: $(@D)" > $@-testsum; \
+ 	    exit 1; \
+ 	  fi; \
++	fi; \
+ 	fi
+ 
+ 
--- gcc-5-5.4.0.orig/debian/patches/libgomp-kfreebsd-testsuite.diff
+++ gcc-5-5.4.0/debian/patches/libgomp-kfreebsd-testsuite.diff
@@ -0,0 +1,16 @@
+# DP: Disable lock-2.c test on kfreebsd-*
+
+Index: b/src/libgomp/testsuite/libgomp.c/lock-2.c
+===================================================================
+--- a/src/libgomp/testsuite/libgomp.c/lock-2.c
++++ b/src/libgomp/testsuite/libgomp.c/lock-2.c
+@@ -4,6 +4,9 @@
+ int
+ main (void)
+ {
++#ifdef __FreeBSD_kernel__
++  return 1;
++#endif
+   int l = 0;
+   omp_nest_lock_t lock;
+   omp_init_nest_lock (&lock);
--- gcc-5-5.4.0.orig/debian/patches/libgomp-omp_h-multilib.diff
+++ gcc-5-5.4.0/debian/patches/libgomp-omp_h-multilib.diff
@@ -0,0 +1,28 @@
+# DP: Fix up omp.h for multilibs.
+
+2008-06-09  Jakub Jelinek  <jakub@redhat.com>
+
+	* omp.h.in (omp_nest_lock_t): Fix up for Linux multilibs.
+
+2015-03-25  Matthias Klose  <doko@ubuntu.com>
+
+	* omp.h.in (omp_nest_lock_t): Limit the fix Linux.
+
+Index: b/src/libgomp/omp.h.in
+===================================================================
+--- a/src/libgomp/omp.h.in
++++ b/src/libgomp/omp.h.in
+@@ -40,8 +40,13 @@ typedef struct
+ 
+ typedef struct
+ {
++#if defined(__linux__)
++  unsigned char _x[8 + sizeof (void *)] 
++    __attribute__((__aligned__(sizeof (void *))));
++#else
+   unsigned char _x[@OMP_NEST_LOCK_SIZE@] 
+     __attribute__((__aligned__(@OMP_NEST_LOCK_ALIGN@)));
++#endif
+ } omp_nest_lock_t;
+ #endif
+ 
--- gcc-5-5.4.0.orig/debian/patches/libitm-no-fortify-source.diff
+++ gcc-5-5.4.0/debian/patches/libitm-no-fortify-source.diff
@@ -0,0 +1,19 @@
+# DP: Build libitm with -U_FORTIFY_SOURCE on x86 and x86_64.
+
+Index: b/src/libitm/configure.tgt
+===================================================================
+--- a/src/libitm/configure.tgt
++++ b/src/libitm/configure.tgt
+@@ -119,6 +119,12 @@ case "${target_cpu}" in
+ 	;;
+ esac
+ 
++# FIXME: ftbfs with -D_FORTIFY_SOURCE (error: invalid use of '__builtin_va_arg_pack ())
++case "${target}" in
++  *-*-linux*)
++	XCFLAGS="${XCFLAGS} -U_FORTIFY_SOURCE"
++esac
++
+ # For the benefit of top-level configure, determine if the cpu is supported.
+ test -d ${srcdir}/config/$ARCH || UNSUPPORTED=1
+ 
--- gcc-5-5.4.0.orig/debian/patches/libjava-armel-unwind.diff
+++ gcc-5-5.4.0/debian/patches/libjava-armel-unwind.diff
@@ -0,0 +1,19 @@
+# DP: On armel, apply kludge to fix unwinder infinitely looping 'til it runs out
+# DP: of memory (http://gcc.gnu.org/ml/java/2008-06/msg00010.html).
+
+---
+ libjava/stacktrace.cc |    3 +++
+ 1 files changed, 3 insertions(+), 0 deletions(-)
+
+--- a/src/libjava/stacktrace.cc
++++ b/src/libjava/stacktrace.cc
+@@ -115,6 +115,9 @@ _Jv_StackTrace::UnwindTraceFn (struct _Unwind_Context *context, void *state_ptr)
+   // Check if the trace buffer needs to be extended.
+   if (pos == state->length)
+     {
++      // http://gcc.gnu.org/ml/java/2008-06/msg00010.html
++      return _URC_END_OF_STACK;
++
+       int newLength = state->length * 2;
+       void *newFrames = _Jv_AllocBytes (newLength * sizeof(_Jv_StackFrame));
+       memcpy (newFrames, state->frames, state->length * sizeof(_Jv_StackFrame));      
--- gcc-5-5.4.0.orig/debian/patches/libjava-disable-plugin.diff
+++ gcc-5-5.4.0/debian/patches/libjava-disable-plugin.diff
@@ -0,0 +1,15 @@
+# DP: Don't build the gcjwebplugin, even when configured with --enable-plugin
+
+Index: b/src/libjava/configure.ac
+===================================================================
+--- a/src/libjava/configure.ac
++++ b/src/libjava/configure.ac
+@@ -67,6 +67,8 @@ AC_ARG_ENABLE(browser-plugin,
+      esac],
+     [browser_plugin_enabled=no]
+ )
++# FIXME: don't build the plugin, this option collides with GCC plugin support
++plugin_enabled=no
+ 
+ AC_ARG_ENABLE(gconf-peer,
+   AS_HELP_STRING([--enable-gconf-peer],
--- gcc-5-5.4.0.orig/debian/patches/libjava-fixed-symlinks.diff
+++ gcc-5-5.4.0/debian/patches/libjava-fixed-symlinks.diff
@@ -0,0 +1,28 @@
+# DP: Remove unneed '..' elements from symlinks in JAVA_HOME
+
+Index: b/src/libjava/Makefile.am
+===================================================================
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -836,7 +836,7 @@ if CREATE_JAVA_HOME
+ 	$(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS)
+ 	relative() { \
+ 	  $(PERL) -e 'use File::Spec; \
+-	    print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \
++	    print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \
+ 	}; \
+ 	RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \
+ 	ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \
+Index: b/src/libjava/Makefile.in
+===================================================================
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -12506,7 +12506,7 @@ install-data-local:
+ @CREATE_JAVA_HOME_TRUE@	$(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS)
+ @CREATE_JAVA_HOME_TRUE@	relative() { \
+ @CREATE_JAVA_HOME_TRUE@	  $(PERL) -e 'use File::Spec; \
+-@CREATE_JAVA_HOME_TRUE@	    print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \
++@CREATE_JAVA_HOME_TRUE@	    print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \
+ @CREATE_JAVA_HOME_TRUE@	}; \
+ @CREATE_JAVA_HOME_TRUE@	RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \
+ @CREATE_JAVA_HOME_TRUE@	ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \
--- gcc-5-5.4.0.orig/debian/patches/libjava-jnipath.diff
+++ gcc-5-5.4.0/debian/patches/libjava-jnipath.diff
@@ -0,0 +1,129 @@
+# DP: - Add /usr/lib/jni and /usr/lib/<multiarch>/jni to java.library.path.
+# DP: - When running the i386 binaries on amd64, look in
+# DP: - /usr/lib32/gcj-x.y and /usr/lib32/jni instead.
+
+Index: b/src/libjava/configure.ac
+===================================================================
+--- a/src/libjava/configure.ac
++++ b/src/libjava/configure.ac
+@@ -1520,6 +1520,9 @@ AC_CHECK_SIZEOF(void *)
+ 
+ AC_C_BIGENDIAN
+ 
++MULTIARCH_DIR=$(dpkg-architecture -qDEB_HOST_MULTIARCH 2>/dev/null || true)
++AC_SUBST(MULTIARCH_DIR)
++
+ ZLIBS=
+ SYS_ZLIBS=
+ ZINCS=
+Index: b/src/libjava/Makefile.am
+===================================================================
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -364,6 +364,7 @@ AM_CXXFLAGS = \
+ 	$(WARNINGS) \
+ 	-D_GNU_SOURCE \
+ 	-DPREFIX="\"$(prefix)\"" \
++	-DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \
+ 	-DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \
+         -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \
+         -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \
+Index: b/src/libjava/Makefile.in
+===================================================================
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -639,6 +639,7 @@ MAINT = @MAINT@
+ MAKE = @MAKE@
+ MAKEINFO = @MAKEINFO@
+ MKDIR_P = @MKDIR_P@
++MULTIARCH_DIR = @MULTIARCH_DIR@
+ NM = nm
+ NMEDIT = @NMEDIT@
+ OBJDUMP = @OBJDUMP@
+@@ -1022,6 +1023,7 @@ AM_CXXFLAGS = \
+ 	$(WARNINGS) \
+ 	-D_GNU_SOURCE \
+ 	-DPREFIX="\"$(prefix)\"" \
++	-DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \
+ 	-DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \
+         -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \
+         -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \
+Index: b/src/libjava/gnu/classpath/natSystemProperties.cc
+===================================================================
+--- a/src/libjava/gnu/classpath/natSystemProperties.cc
++++ b/src/libjava/gnu/classpath/natSystemProperties.cc
+@@ -141,6 +141,44 @@ PrependVersionedLibdir (::java::lang::St
+   return retval;
+ }
+ 
++static char*
++AppendJniLibdir (char *path, struct utsname *u)
++{
++  char* retval;
++  const char* jnilibdir = "/usr/lib/jni";
++#ifdef MULTIARCH_DIR
++  const char* jnilibdir2 = "/usr/lib/" MULTIARCH_DIR "/jni";
++  jsize len2 = strlen (jnilibdir2) + 2;
++#else
++  jsize len2 = 0;
++#endif
++
++#if defined(__linux__) && defined (__i386__)
++  if (! strcmp ("x86_64", u->machine))
++    jnilibdir = "/usr/lib32/jni";
++#endif
++
++  if (path)
++    {
++      jsize total = strlen (path)
++	+ (sizeof (PATH_SEPARATOR) - 1) + strlen (jnilibdir) +len2 + 1;
++      retval = (char*) _Jv_Malloc (total);
++      strcpy (retval, path);
++      strcat (retval, PATH_SEPARATOR);
++      strcat (retval, jnilibdir);
++    }
++  else
++    {
++      retval = (char*) _Jv_Malloc (strlen (jnilibdir) + len2 + 1);
++      strcpy (retval, jnilibdir);
++    }
++#ifdef MULTIARCH_DIR
++  strcat (retval, PATH_SEPARATOR);
++  strcat (retval, jnilibdir2);
++#endif
++  return retval;
++}
++
+ void
+ gnu::classpath::SystemProperties::insertSystemProperties (::java::util::Properties *newprops)
+ {
+@@ -373,8 +411,13 @@ gnu::classpath::SystemProperties::insert
+       // Prepend GCJ_VERSIONED_LIBDIR to the module load path so that
+       // libgcj will find its own JNI libraries, like libgtkpeer.so.
+       char* val = PrependVersionedLibdir (path);
+-      _Jv_SetDLLSearchPath (val);
++
++      // Append jnilibdir
++      char* val2 = AppendJniLibdir (val, &u);
++
++      _Jv_SetDLLSearchPath (val2);
+       _Jv_Free (val);
++      _Jv_Free (val2);
+     }
+   else
+     {
+@@ -382,9 +425,12 @@ gnu::classpath::SystemProperties::insert
+ #ifdef USE_LTDL
+       char *libpath = getenv (LTDL_SHLIBPATH_VAR);
+       char* val = _Jv_PrependVersionedLibdir (libpath);
+-      SET ("java.library.path", val);
+-      _Jv_SetDLLSearchPath (val);
++      // Append jnilibdir
++      char* val2 = AppendJniLibdir (val, &u);
++      SET ("java.library.path", val2);
++      _Jv_SetDLLSearchPath (val2);
+       _Jv_Free (val);
++      _Jv_Free (val2);
+ #else
+       SET ("java.library.path", "");
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/libjava-mips64el-proposed.diff
+++ gcc-5-5.4.0/debian/patches/libjava-mips64el-proposed.diff
@@ -0,0 +1,19 @@
+https://gcc.gnu.org/ml/java-patches/2016-q2/msg00020.html
+
+2016-06-22  Matthew Fortune <Matthew.Fortune@imgtec.com>
+
+libjava/
+
+	* interpret-run.cc: Return integers as ffi_arg instead of jint.
+
+--- a/src/libjava/interpret-run.cc
++++ b/src/libjava/interpret-run.cc
+@@ -1838,7 +1838,7 @@ details.  */
+       return;
+ 
+     insn_ireturn:
+-      *(jint *) retp = POPI ();
++      *(ffi_arg *) retp = POPI ();
+       return;
+ 
+     insn_return:
--- gcc-5-5.4.0.orig/debian/patches/libjava-multiarch.diff
+++ gcc-5-5.4.0/debian/patches/libjava-multiarch.diff
@@ -0,0 +1,82 @@
+# DP: Install libjava libraries to multiarch location
+
+Index: b/src/libjava/configure.ac
+===================================================================
+--- a/src/libjava/configure.ac
++++ b/src/libjava/configure.ac
+@@ -1580,6 +1580,10 @@ case ${version_specific_libs} in
+       .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /.
+       *) toolexeclibdir=$toolexecmainlibdir/$multi_os_directory ;;
+     esac
++    multiarch=`$CC -print-multiarch`
++    if test -n "$multiarch"; then
++        toolexeclibdir=$toolexecmainlibdir/$multiarch
++    fi
+     ;;
+ esac
+ AC_SUBST(toolexecdir)
+@@ -1597,6 +1601,10 @@ AC_DEFINE_UNQUOTED(GCJVERSION, "$GCJVERS
+ # libraries are found.
+ gcjsubdir=gcj-$gcjversion-$libgcj_soversion
+ dbexecdir='$(toolexeclibdir)/'$gcjsubdir
++multiarch=`$CC -print-multiarch`
++if test -n "$multiarch"; then
++    dbexecdir='$(libdir)/'$multiarch/$gcjsubdir
++fi
+ AC_SUBST(dbexecdir)
+ AC_SUBST(gcjsubdir)
+ 
+Index: b/src/libjava/Makefile.am
+===================================================================
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -373,7 +373,7 @@ AM_CXXFLAGS = \
+ 	-DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \
+ 	-DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \
+ 	-DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \
+-	-DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \
++	-DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-5/$(db_name)\"" \
+ 	-DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\""
+ 
+ AM_GCJFLAGS = \
+Index: b/src/libjava/Makefile.in
+===================================================================
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -1032,7 +1032,7 @@ AM_CXXFLAGS = \
+ 	-DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \
+ 	-DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \
+ 	-DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \
+-	-DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \
++	-DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-5/$(db_name)\"" \
+ 	-DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\""
+ 
+ AM_GCJFLAGS = \
+Index: b/src/libjava/classpath/m4/acinclude.m4
+===================================================================
+--- a/src/libjava/classpath/m4/acinclude.m4
++++ b/src/libjava/classpath/m4/acinclude.m4
+@@ -276,6 +276,10 @@ AC_DEFUN([CLASSPATH_TOOLEXECLIBDIR],
+       esac
+       ;;
+   esac
++  multiarch=`$CC -print-multiarch`
++  if test -n "$multiarch"; then
++    toolexeclibdir=${libdir}/${multiarch}
++  fi
+   AC_SUBST(toolexecdir)
+   AC_SUBST(toolexecmainlibdir)
+   AC_SUBST(toolexeclibdir)
+Index: b/src/libjava/classpath/configure.ac
+===================================================================
+--- a/src/libjava/classpath/configure.ac
++++ b/src/libjava/classpath/configure.ac
+@@ -16,6 +16,8 @@ dnl END GCJ LOCAL
+ 
+ AC_CANONICAL_TARGET
+ 
++dnl dummy change to run autoconf
++
+ dnl GCJ LOCAL
+ AC_ARG_ENABLE(java-maintainer-mode,
+ 	AS_HELP_STRING([--enable-java-maintainer-mode],
--- gcc-5-5.4.0.orig/debian/patches/libjava-nobiarch-check.diff
+++ gcc-5-5.4.0/debian/patches/libjava-nobiarch-check.diff
@@ -0,0 +1,27 @@
+# DP: For biarch builds, disable the testsuite for the non-default architecture
+# DP: for runtime libraries, which are not built by default (libjava).
+
+---
+ libjava/testsuite/Makefile.in |    4 +++-
+ 2 files changed, 25 insertions(+), 1 deletions(-)
+
+Index: b/src/libjava/testsuite/Makefile.in
+===================================================================
+--- a/src/libjava/testsuite/Makefile.in
++++ b/src/libjava/testsuite/Makefile.in
+@@ -384,12 +384,14 @@ CTAGS:
+ 
+ 
+ check-DEJAGNU: site.exp
++	runtestflags="`echo '$(RUNTESTFLAGS)' | sed -r 's/,-m(32|64|x32)//g;s/,-mabi=(n32|64)//g'`"; \
++	case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(RUNTEST); \
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  exit_status=0; l='$(DEJATOOL)'; for tool in $$l; do \
+-	    if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \
++	    if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $$runtestflags; \
+ 	    then :; else exit_status=1; fi; \
+ 	  done; \
+ 	else echo "WARNING: could not find \`runtest'" 1>&2; :;\
--- gcc-5-5.4.0.orig/debian/patches/libjava-rpath.diff
+++ gcc-5-5.4.0/debian/patches/libjava-rpath.diff
@@ -0,0 +1,29 @@
+# DP: - Link ecjx with -rpath $(dbexecdir)
+
+---
+ libjava/Makefile.am |    2 +-
+ libjava/Makefile.in |    2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/src/libjava/Makefile.am
++++ b/src/libjava/Makefile.am
+@@ -888,7 +888,7 @@ else !ENABLE_SHARED
+ ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR) -fbootclasspath=$(BOOTCLASSPATH)
+ endif !ENABLE_SHARED
+ 
+-ecjx_LDADD = -L$(here)/.libs $(extra_ldflags)
++ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) -rpath $(dbexecdir)
+ ecjx_DEPENDENCIES = libgcj.la libgcj.spec
+ if USE_LIBGCJ_BC
+ ecjx_DEPENDENCIES += libgcj_bc.la
+--- a/src/libjava/Makefile.in
++++ b/src/libjava/Makefile.in
+@@ -8360,7 +8360,7 @@ ECJX_BASE_FLAGS = -findirect-dispatch \
+ @NATIVE_FALSE@ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR)
+ @NATIVE_FALSE@ecjx_LDADD = 
+ @NATIVE_TRUE@ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) \
+-@NATIVE_TRUE@	$(am__append_21)
++@NATIVE_TRUE@	$(am__append_21) -rpath $(dbexecdir)
+ @NATIVE_FALSE@ecjx_DEPENDENCIES = 
+ @NATIVE_TRUE@ecjx_DEPENDENCIES = libgcj.la libgcj.spec \
+ @NATIVE_TRUE@	$(am__append_20)
--- gcc-5-5.4.0.orig/debian/patches/libjava-sjlj.diff
+++ gcc-5-5.4.0/debian/patches/libjava-sjlj.diff
@@ -0,0 +1,40 @@
+# DP: Don't try to use _Unwind_Backtrace on SJLJ targets.
+# DP: See bug #387875, #388505, GCC PR 29206.
+
+---
+ libjava/sysdep/generic/backtrace.h |   17 +++++++++++++++++
+ 1 files changed, 17 insertions(+), 0 deletions(-)
+
+Index: b/src/libjava/sysdep/generic/backtrace.h
+===================================================================
+--- a/src/libjava/sysdep/generic/backtrace.h
++++ b/src/libjava/sysdep/generic/backtrace.h
+@@ -13,6 +13,20 @@ details.  */
+ 
+ #include <java-stack.h>
+ 
++#ifdef SJLJ_EXCEPTIONS
++
++#undef _Unwind_GetIPInfo
++#define _Unwind_GetIPInfo(ctx,ip_before_insn) \
++  (abort (), (void) (ctx), *ip_before_insn = 1, 0)
++
++#undef _Unwind_GetRegionStart
++#define _Unwind_GetRegionStart(ctx) \
++  (abort (), (void) (ctx), 0)
++
++#undef _Unwind_Backtrace
++#define _Unwind_Backtrace(trace_fn,state_ptr) \
++  (fallback_backtrace (trace_fn, state_ptr))
++
+ /* Unwind through the call stack calling TRACE_FN with STATE for every stack
+    frame.  Returns the reason why the unwinding was stopped.  */
+ _Unwind_Reason_Code
+@@ -20,4 +34,7 @@ fallback_backtrace (_Unwind_Trace_Fn, _J
+ {
+   return _URC_NO_REASON;
+ }
++
++#endif /* SJLJ_EXCEPTIONS */
++
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/libjava-stacktrace.diff
+++ gcc-5-5.4.0/debian/patches/libjava-stacktrace.diff
@@ -0,0 +1,52 @@
+# DP: libgcj: Lookup source file name and line number in separated
+# DP: debug files found in /usr/lib/debug
+
+---
+ libjava/stacktrace.cc |   27 +++++++++++++++++++++++++++
+ 1 files changed, 27 insertions(+), 0 deletions(-)
+
+Index: b/src/libjava/stacktrace.cc
+===================================================================
+--- a/src/libjava/stacktrace.cc
++++ b/src/libjava/stacktrace.cc
+@@ -17,6 +17,11 @@ details.  */
+ #include <java-stack.h>
+ 
+ #include <stdio.h>
++#include <stdlib.h>
++#include <string.h>
++#ifdef HAVE_UNISTD_H
++#include <unistd.h>
++#endif
+ 
+ #include <java/lang/Boolean.h>
+ #include <java/lang/Class.h>
+@@ -260,6 +265,28 @@ _Jv_StackTrace::getLineNumberForFrame(_J
+       finder->lookup (binaryName, (jlong) offset);
+       *sourceFileName = finder->getSourceFile();
+       *lineNum = finder->getLineNum();
++      if (*lineNum == -1 && info.file_name[0] == '/')
++	{
++	  const char *debugPrefix = "/usr/lib/debug";
++	  char *debugPath = (char *) malloc (strlen(debugPrefix)
++					     + strlen(info.file_name)
++					     + 2);
++
++	  if (debugPath)
++	    {
++	      strcpy (debugPath, debugPrefix);
++	      strcat (debugPath, info.file_name);
++	      //printf ("%s: 0x%x\n", debugPath, offset);
++	      if (!access (debugPath, R_OK))
++		{
++		  binaryName = JvNewStringUTF (debugPath);
++		  finder->lookup (binaryName, (jlong) offset);
++		  *sourceFileName = finder->getSourceFile();
++		  *lineNum = finder->getLineNum();
++		}
++	      free (debugPath);
++	    }
++	}
+       if (*lineNum == -1 && NameFinder::showRaw())
+         {
+           gnu::gcj::runtime::StringBuffer *t =
--- gcc-5-5.4.0.orig/debian/patches/libjit-ldflags.diff
+++ gcc-5-5.4.0/debian/patches/libjit-ldflags.diff
@@ -0,0 +1,13 @@
+Index: b/src/gcc/jit/Make-lang.in
+===================================================================
+--- a/src/gcc/jit/Make-lang.in
++++ b/src/gcc/jit/Make-lang.in
+@@ -86,7 +86,7 @@ $(LIBGCCJIT_FILENAME): $(jit_OBJS) \
+ 	     $(CPPLIB) $(LIBDECNUMBER) $(LIBS) $(BACKENDLIBS) \
+ 	     $(EXTRA_GCC_OBJS) \
+ 	     -Wl,--version-script=$(srcdir)/jit/libgccjit.map \
+-	     -Wl,-soname,$(LIBGCCJIT_SONAME)
++	     -Wl,-soname,$(LIBGCCJIT_SONAME) $(LDFLAGS)
+ 
+ $(LIBGCCJIT_SONAME_SYMLINK): $(LIBGCCJIT_FILENAME)
+ 	ln -sf $(LIBGCCJIT_FILENAME) $(LIBGCCJIT_SONAME_SYMLINK)
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-doclink.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-doclink.diff
@@ -0,0 +1,68 @@
+# DP: adjust hrefs to point to the local documentation
+
+---
+ libstdc++-v3/doc/doxygen/mainpage.html |   10 +++++-----
+ 1 files changed, 5 insertions(+), 5 deletions(-)
+
+Index: b/src/libstdc++-v3/doc/doxygen/mainpage.html
+===================================================================
+--- a/src/libstdc++-v3/doc/doxygen/mainpage.html
++++ b/src/libstdc++-v3/doc/doxygen/mainpage.html
+@@ -27,10 +27,10 @@
+ <p class="smallertext">Generated on @DATE@.</p>
+ 
+ <p>There are two types of documentation for libstdc++.  One is the
+-   distribution documentation, which can be read online
+-   <a href="http://gcc.gnu.org/onlinedocs/libstdc++/index.html">here</a>
+-   or offline from the file doc/html/index.html in the library source
+-   directory.
++   distribution documentation, which can be read
++   <a href="../index.html">offline in the documentation directory</a>
++   or
++   <a href="http://gcc.gnu.org/onlinedocs/libstdc++/index.html">online</a>.
+ </p>
+ 
+ <p>The other type is the source documentation, of which this is the first page.
+@@ -81,9 +81,10 @@
+   This style guide can also be viewed on the <a href="http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01apas04.html">web</a>.
+ 
+ <h2>License, Copyright, and Other Lawyerly Verbosity</h2>
+-<p>The libstdc++ documentation is released under
+-   <a href="http://gcc.gnu.org/onlinedocs/libstdc++/manual/bk01pt01ch01s02.html">
+-   these terms</a>.
++<p>The libstdc++ documentation is released under these terms
++   (<a href="../manual/license.html">read offline</a> or
++    <a href="http://gcc.gnu.org/onlinedocs/libstdc++/manual/license.html">read online</a>.
++   ).
+ </p>
+ <p>Part of the generated documentation involved comments and notes from
+    SGI, who says we gotta say this:
+Index: b/src/libstdc++-v3/doc/html/api.html
+===================================================================
+--- a/src/libstdc++-v3/doc/html/api.html
++++ b/src/libstdc++-v3/doc/html/api.html
+@@ -20,6 +20,8 @@
+   member functions for the library classes, finding out what is in a
+   particular include file, looking at inheritance diagrams, etc.
+ </p><p>
++<a class="link" href="user/index.html">The API documentation, rendered into HTML, can be viewed offline.</a>
++</p><p>
+   The API documentation, rendered into HTML, can be viewed online:
+ </p><div class="itemizedlist"><ul class="itemizedlist" style="list-style-type: disc; "><li class="listitem"><p>
+       <a class="link" href="http://gcc.gnu.org/onlinedocs/libstdc++/libstdc++-html-USERS-3.4/index.html" target="_top">for the 3.4 release
+Index: b/src/libstdc++-v3/doc/xml/api.xml
+===================================================================
+--- a/src/libstdc++-v3/doc/xml/api.xml
++++ b/src/libstdc++-v3/doc/xml/api.xml
+@@ -40,6 +40,11 @@
+ </para>
+ 
+ <para>
++  <ulink url="user/index.html">The source-level documentation for this release can be viewed offline.
++  </ulink>
++</para>
++
++<para>
+   The API documentation, rendered into HTML, can be viewed online:
+ </para>
+ 
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-functexcept.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-functexcept.diff
@@ -0,0 +1,17 @@
+# DP: PR libstdc++/66145, std::ios_base::failure objects thrown from libstdc++.so use old ABI
+# DP: Just build src/c++11/functexcept.cc using the new ABI. It will break
+# DP: code, which will be handled in the archive by adding Breaks for the
+# DP: affected packages.  Third party code using such code will need a rebuild.
+
+--- a/src/libstdc++-v3/src/c++11/functexcept.cc
++++ b/src/libstdc++-v3/src/c++11/functexcept.cc
+@@ -20,9 +20,6 @@
+ // see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ // <http://www.gnu.org/licenses/>.
+ 
+-// We don't want to change the type thrown by __throw_ios_failure (yet?)
+-#define _GLIBCXX_USE_CXX11_ABI 0
+-
+ #include <bits/functexcept.h>
+ #include <cstdlib>
+ #include <exception>
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-man-3cxx.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-man-3cxx.diff
@@ -0,0 +1,67 @@
+# DP: Install libstdc++ man pages with suffix .3cxx instead of .3
+
+Index: b/src/libstdc++-v3/doc/doxygen/user.cfg.in
+===================================================================
+--- a/src/libstdc++-v3/doc/doxygen/user.cfg.in
++++ b/src/libstdc++-v3/doc/doxygen/user.cfg.in
+@@ -1949,7 +1949,7 @@ MAN_OUTPUT             = man
+ # The default value is: .3.
+ # This tag requires that the tag GENERATE_MAN is set to YES.
+ 
+-MAN_EXTENSION          = .3
++MAN_EXTENSION          = .3cxx
+ 
+ # If the MAN_LINKS tag is set to YES and doxygen generates man output, then it
+ # will generate one additional man file for each entity documented in the real
+Index: b/src/libstdc++-v3/scripts/run_doxygen
+===================================================================
+--- a/src/libstdc++-v3/scripts/run_doxygen
++++ b/src/libstdc++-v3/scripts/run_doxygen
+@@ -243,6 +243,9 @@ fi
+ if $do_man; then
+ echo ::
+ echo :: Fixing up the man pages...
++mkdir -p $outdir/man/man3
++mv $outdir/man/man3cxx/* $outdir/man/man3/
++rmdir $outdir/man/man3cxx
+ cd $outdir/man/man3
+ 
+ # File names with embedded spaces (EVIL!) need to be....?  renamed or removed?
+@@ -264,7 +267,7 @@ rm -f *.h.3 *.hpp.3 *config* *.cc.3 *.tc
+ # and I'm off getting coffee then anyhow, so I didn't care enough to make
+ # this super-fast.
+ g++ ${srcdir}/doc/doxygen/stdheader.cc -o ./stdheader
+-problematic=`egrep -l '#include <.*_.*>' [a-z]*.3`
++problematic=`egrep -l '#include <.*_.*>' [a-z]*.3 [a-z]*.3cxx`
+ for f in $problematic; do
+     # this is also slow, but safe and easy to debug
+     oldh=`sed -n '/fC#include </s/.*<\(.*\)>.*/\1/p' $f`
+@@ -277,7 +280,7 @@ rm stdheader
+ # Some of the pages for generated modules have text that confuses certain
+ # implementations of man(1), e.g. on GNU/Linux.  We need to have another
+ # top-level *roff tag to /stop/ the .SH NAME entry.
+-problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3`
++problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3cxx`
+ #problematic='Containers.3 Sequences.3 Assoc_containers.3 Iterator_types.3'
+ 
+ for f in $problematic; do
+@@ -291,7 +294,7 @@ a\
+ done
+ 
+ # Also, break this (generated) line up.  It's ugly as sin.
+-problematic=`grep -l '[^^]Definition at line' *.3`
++problematic=`grep -l '[^^]Definition at line' *.3 *.3cxx`
+ for f in $problematic; do
+     sed 's/Definition at line/\
+ .PP\
+@@ -408,8 +411,8 @@ for f in ios streambuf istream ostream i
+ 	 istringstream ostringstream stringstream filebuf ifstream \
+ 	 ofstream fstream string;
+ do
+-    echo ".so man3/std::basic_${f}.3" > std::${f}.3
+-    echo ".so man3/std::basic_${f}.3" > std::w${f}.3
++    echo ".so man3/std::basic_${f}.3cxx" > std::${f}.3cxx
++    echo ".so man3/std::basic_${f}.3cxx" > std::w${f}.3cxx
+ done
+ 
+ echo ::
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-no-testsuite.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-no-testsuite.diff
@@ -0,0 +1,12 @@
+# DP: Don't run the libstdc++ testsuite on arm, hppa and mipsel (timeouts on the buildds)
+
+--- a/src/libstdc++-v3/testsuite/Makefile.in
++++ b/src/libstdc++-v3/testsuite/Makefile.in
+@@ -567,6 +567,7 @@
+ 
+ # Run the testsuite in normal mode.
+ check-DEJAGNU $(check_DEJAGNU_normal_targets): check-DEJAGNU%: site.exp
++	case "$(target)" in arm*|hppa*|mipsel*) exit 0;; esac; \
+ 	$(if $*,@)AR="$(AR)"; export AR; \
+ 	RANLIB="$(RANLIB)"; export RANLIB; \
+ 	if [ -z "$*" ] && [ "$(filter -j, $(MFLAGS))" = "-j" ]; then \
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-nothumb-check.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-nothumb-check.diff
@@ -0,0 +1,38 @@
+# DP: Don't run the libstdc++-v3 testsuite in thumb mode on armel
+
+Index: testsuite/Makefile.in
+===================================================================
+--- a/src/libstdc++-v3/testsuite/Makefile.in	(revision 156820)
++++ b/src/libstdc++-v3/testsuite/Makefile.in	(working copy)
+@@ -583,6 +583,8 @@
+ 	srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \
+ 	EXPECT=$(EXPECT); export EXPECT; \
+ 	runtest=$(RUNTEST); \
++	runtestflags="`echo '$(RUNTESTFLAGS)' | sed 's/,-marm/-marm/'`"; \
++	case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \
+ 	if [ -z "$$runtest" ]; then runtest=runtest; fi; \
+ 	tool=libstdc++; \
+ 	dirs=; \
+@@ -590,7 +592,7 @@
+ 	  normal0) \
+ 	    if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	      $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+-			$(RUNTESTFLAGS) abi.exp; \
++			$$runtestflags abi.exp; \
+ 	    else echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	    fi; \
+ 	    dirs="`cd $$srcdir; echo [013-9][0-9]_*/* [abep]*/*`";; \
+@@ -605,11 +607,11 @@
+ 	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
+ 	  if [ -n "$$dirs" ]; then \
+ 	    $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+-		    $(RUNTESTFLAGS) \
++		    $$runtestflags \
+ 		    "conformance.exp=`echo $$dirs | sed 's/ /* /g;s/$$/*/'`"; \
+ 	  else \
+ 	    $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) \
+-		    $(RUNTESTFLAGS); \
++		    $$runtestflags; \
+ 	  fi; \
+ 	else echo "WARNING: could not find \`runtest'" 1>&2; :;\
+ 	fi
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-pic.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-pic.diff
@@ -0,0 +1,95 @@
+# DP: Build and install libstdc++_pic.a library.
+
+Index: b/src/libstdc++-v3/src/Makefile.am
+===================================================================
+--- a/src/libstdc++-v3/src/Makefile.am
++++ b/src/libstdc++-v3/src/Makefile.am
+@@ -310,10 +310,12 @@ if GLIBCXX_BUILD_DEBUG
+ STAMP_DEBUG = build-debug
+ STAMP_INSTALL_DEBUG = install-debug
+ CLEAN_DEBUG = debug
++STAMP_INSTALL_PIC = install-pic
+ else
+ STAMP_DEBUG =
+ STAMP_INSTALL_DEBUG =
+ CLEAN_DEBUG =
++STAMP_INSTALL_PIC =
+ endif
+ 
+ # Build a debug variant.
+@@ -348,6 +350,7 @@ build-debug: stamp-debug
+ 	  mv Makefile Makefile.tmp; \
+ 	  sed -e 's,all-local: all-once,all-local:,' \
+ 	      -e 's,install-data-local: install-data-once,install-data-local:,' \
++	      -e 's,install-exec-local:.*,install-exec-local:,' \
+ 	      -e '/vpath/!s,src/c,src/debug/c,' \
+ 	  < Makefile.tmp > Makefile ; \
+ 	  rm -f Makefile.tmp ; \
+@@ -358,3 +361,8 @@ build-debug: stamp-debug
+ install-debug: build-debug
+ 	(cd ${debugdir} && $(MAKE) CXXFLAGS='$(DEBUG_FLAGS)' \
+ 	toolexeclibdir=$(glibcxx_toolexeclibdir)/debug install) ;
++
++install-exec-local: $(STAMP_INSTALL_PIC)
++$(STAMP_INSTALL_PIC):
++	$(MKDIR_P) $(DESTDIR)$(toolexeclibdir)
++	$(INSTALL_DATA) .libs/libstdc++convenience.a $(DESTDIR)$(toolexeclibdir)/libstdc++_pic.a
+Index: b/src/libstdc++-v3/src/Makefile.in
+===================================================================
+--- a/src/libstdc++-v3/src/Makefile.in
++++ b/src/libstdc++-v3/src/Makefile.in
+@@ -530,6 +530,8 @@ CXXLINK = \
+ @GLIBCXX_BUILD_DEBUG_TRUE@STAMP_INSTALL_DEBUG = install-debug
+ @GLIBCXX_BUILD_DEBUG_FALSE@CLEAN_DEBUG = 
+ @GLIBCXX_BUILD_DEBUG_TRUE@CLEAN_DEBUG = debug
++@GLIBCXX_BUILD_DEBUG_FALSE@STAMP_INSTALL_PIC = 
++@GLIBCXX_BUILD_DEBUG_TRUE@STAMP_INSTALL_PIC = install-pic
+ 
+ # Build a debug variant.
+ # Take care to fix all possibly-relative paths.
+@@ -828,7 +830,7 @@ install-dvi: install-dvi-recursive
+ 
+ install-dvi-am:
+ 
+-install-exec-am: install-toolexeclibLTLIBRARIES
++install-exec-am: install-exec-local install-toolexeclibLTLIBRARIES
+ 
+ install-html: install-html-recursive
+ 
+@@ -879,11 +881,11 @@ uninstall-am: uninstall-toolexeclibLTLIB
+ 	distclean-libtool distclean-tags dvi dvi-am html html-am info \
+ 	info-am install install-am install-data install-data-am \
+ 	install-data-local install-dvi install-dvi-am install-exec \
+-	install-exec-am install-html install-html-am install-info \
+-	install-info-am install-man install-pdf install-pdf-am \
+-	install-ps install-ps-am install-strip \
+-	install-toolexeclibLTLIBRARIES installcheck installcheck-am \
+-	installdirs installdirs-am maintainer-clean \
++	install-exec-am install-exec-local install-html \
++	install-html-am install-info install-info-am install-man \
++	install-pdf install-pdf-am install-ps install-ps-am \
++	install-strip install-toolexeclibLTLIBRARIES installcheck \
++	installcheck-am installdirs installdirs-am maintainer-clean \
+ 	maintainer-clean-generic mostlyclean mostlyclean-compile \
+ 	mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \
+ 	tags tags-recursive uninstall uninstall-am \
+@@ -1016,6 +1018,7 @@ build-debug: stamp-debug
+ 	  mv Makefile Makefile.tmp; \
+ 	  sed -e 's,all-local: all-once,all-local:,' \
+ 	      -e 's,install-data-local: install-data-once,install-data-local:,' \
++	      -e 's,install-exec-local:.*,install-exec-local:,' \
+ 	      -e '/vpath/!s,src/c,src/debug/c,' \
+ 	  < Makefile.tmp > Makefile ; \
+ 	  rm -f Makefile.tmp ; \
+@@ -1027,6 +1030,11 @@ install-debug: build-debug
+ 	(cd ${debugdir} && $(MAKE) CXXFLAGS='$(DEBUG_FLAGS)' \
+ 	toolexeclibdir=$(glibcxx_toolexeclibdir)/debug install) ;
+ 
++install-exec-local: $(STAMP_INSTALL_PIC)
++$(STAMP_INSTALL_PIC):
++	$(MKDIR_P) $(DESTDIR)$(toolexeclibdir)
++	$(INSTALL_DATA) .libs/libstdc++convenience.a $(DESTDIR)$(toolexeclibdir)/libstdc++_pic.a
++
+ # Tell versions [3.59,3.63) of GNU make to not export all variables.
+ # Otherwise a system limit (for SysV at least) may be exceeded.
+ .NOEXPORT:
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-random-incl.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-random-incl.diff
@@ -0,0 +1,13 @@
+# DP: Revert a libstdc++ header reorg done after the 5.3.0 release
+
+--- a/src/libstdc++-v3/include/bits/stl_algo.h
++++ b/src/libstdc++-v3/include/bits/stl_algo.h
+@@ -63,7 +63,7 @@
+ #include <bits/predefined_ops.h>
+ 
+ #if __cplusplus >= 201103L
+-#include <bits/uniform_int_dist.h>
++#include <random>  // for std::uniform_int_distribution
+ #endif
+ 
+ // See concept_check.h for the __glibcxx_*_requires macros.
--- gcc-5-5.4.0.orig/debian/patches/libstdc++-test-installed.diff
+++ gcc-5-5.4.0/debian/patches/libstdc++-test-installed.diff
@@ -0,0 +1,78 @@
+# DP: Add support to run the libstdc++-v3 testsuite using the
+# DP: installed shared libraries.
+
+Index: b/src/libstdc++-v3/testsuite/lib/libstdc++.exp
+===================================================================
+--- a/src/libstdc++-v3/testsuite/lib/libstdc++.exp
++++ b/src/libstdc++-v3/testsuite/lib/libstdc++.exp
+@@ -37,6 +37,12 @@
+ # the last thing before testing begins.  This can be defined in, e.g.,
+ # ~/.dejagnurc or $DEJAGNU.
+ 
++set test_installed 0
++if [info exists env(TEST_INSTALLED)] {
++    verbose -log "test installed libstdc++-v3"
++    set test_installed 1
++}
++
+ proc load_gcc_lib { filename } {
+     global srcdir loaded_libs
+ 
+@@ -101,6 +107,7 @@ proc libstdc++_init { testfile } {
+     global tool_timeout
+     global DEFAULT_CXXFLAGS
+     global STATIC_LIBCXXFLAGS
++    global test_installed
+ 
+     # We set LC_ALL and LANG to C so that we get the same error
+     # messages as expected.
+@@ -120,6 +127,9 @@ proc libstdc++_init { testfile } {
+ 
+     set blddir [lookfor_file [get_multilibs] libstdc++-v3]
+     set flags_file "${blddir}/scripts/testsuite_flags"
++    if {$test_installed} {
++      set flags_file "${blddir}/scripts/testsuite_flags.installed"
++    }
+     set shlib_ext [get_shlib_extension]
+     v3track flags_file 2
+ 
+@@ -151,7 +161,11 @@ proc libstdc++_init { testfile } {
+ 
+     # Locate libgcc.a so we don't need to account for different values of
+     # SHLIB_EXT on different platforms
+-    set gccdir [lookfor_file $tool_root_dir gcc/libgcc.a]
++    if {$test_installed} {
++	set gccdir ""
++    } else {
++	set gccdir [lookfor_file $tool_root_dir gcc/libgcc.a]
++    }
+     if {$gccdir != ""} {
+         set gccdir [file dirname $gccdir]
+ 	append ld_library_path_tmp ":${gccdir}"
+@@ -160,7 +174,11 @@ proc libstdc++_init { testfile } {
+ 
+     # Locate libgomp. This is only required for parallel mode.
+     set v3-libgomp 0
+-    set libgompdir [lookfor_file $blddir/../libgomp .libs/libgomp.$shlib_ext]
++    if {$test_installed} {
++	set libgompdir ""
++    } else {
++	set libgompdir [lookfor_file $blddir/../libgomp .libs/libgomp.$shlib_ext]
++    }
+     if {$libgompdir != ""} {
+ 	set v3-libgomp 1
+         set libgompdir [file dirname $libgompdir]
+@@ -182,7 +200,12 @@ proc libstdc++_init { testfile } {
+ 
+     # Locate libstdc++ shared library. (ie libstdc++.so.)
+     set v3-sharedlib 0
+-    set sharedlibdir [lookfor_file $blddir src/.libs/libstdc++.$shlib_ext]
++    if {$test_installed} {
++	set sharedlibdir ""
++	set v3-sharedlib 1
++    } else {
++	set sharedlibdir [lookfor_file $blddir src/.libs/libstdc++.$shlib_ext]
++    }
+     if {$sharedlibdir != ""} {
+ 	if { ([string match "*-*-linux*" $target_triplet]
+ 	      || [string match "*-*-gnu*" $target_triplet])
--- gcc-5-5.4.0.orig/debian/patches/link-libs.diff
+++ gcc-5-5.4.0/debian/patches/link-libs.diff
@@ -0,0 +1,170 @@
+#DP: Link libraries with -01.
+
+---
+ gcc/config/t-slibgcc-elf-ver |    1 +
+ libffi/Makefile.am           |    2 +-
+ libffi/Makefile.in           |    2 +-
+ libgfortran/Makefile.am      |    2 +-
+ libgfortran/Makefile.in      |    2 +-
+ libjava/Makefile.am          |    2 +-
+ libjava/Makefile.in          |    2 +-
+ libmudflap/Makefile.am       |    4 ++--
+ libmudflap/Makefile.in       |    4 ++--
+ libobjc/Makefile.in          |    2 ++
+ libstdc++-v3/src/Makefile.am |    1 +
+ libstdc++-v3/src/Makefile.in |    1 +
+ 12 files changed, 15 insertions(+), 10 deletions(-)
+
+--- a/src/gcc/config/t-slibgcc-elf-ver.orig	2009-09-10
++++ b/src/gcc/config/t-slibgcc-elf-ver	2009-12-22
+@@ -35,6 +35,7 @@
+ SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
+ 	-Wl,--soname=$(SHLIB_SONAME) \
+ 	-Wl,--version-script=$(SHLIB_MAP) \
++	-Wl,-O1 \
+ 	-o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ \
+ 	$(SHLIB_OBJS) $(SHLIB_LC) && \
+ 	rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \
+--- a/src/libffi/Makefile.am.orig	2009-08-23
++++ b/src/libffi/Makefile.am	2009-12-22
+@@ -164,7 +164,7 @@
+ 
+ LTLDFLAGS = $(shell $(SHELL) $(top_srcdir)/../libtool-ldflags $(LDFLAGS))
+ 
+-libffi_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS)
++libffi_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -Wl,-O1
+ 
+ AM_CPPFLAGS = -I. -I$(top_srcdir)/include -Iinclude -I$(top_srcdir)/src
+ AM_CCASFLAGS = $(AM_CPPFLAGS)
+--- a/src/libffi/Makefile.in.orig	2009-12-07
++++ b/src/libffi/Makefile.in	2009-12-22
+@@ -468,7 +468,7 @@
+ nodist_libffi_convenience_la_SOURCES = $(nodist_libffi_la_SOURCES)
+ AM_CFLAGS = -Wall -g -fexceptions
+ LTLDFLAGS = $(shell $(SHELL) $(top_srcdir)/../libtool-ldflags $(LDFLAGS))
+-libffi_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS)
++libffi_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -Wl,-O1
+ AM_CPPFLAGS = -I. -I$(top_srcdir)/include -Iinclude -I$(top_srcdir)/src
+ AM_CCASFLAGS = $(AM_CPPFLAGS)
+ all: fficonfig.h
+--- a/src/libgfortran/Makefile.am.orig	2009-12-01
++++ b/src/libgfortran/Makefile.am	2009-12-22
+@@ -18,7 +18,7 @@
+ 
+ toolexeclib_LTLIBRARIES = libgfortran.la
+ libgfortran_la_LINK = $(LINK) $(libgfortran_la_LDFLAGS)
+-libgfortran_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -lm $(extra_ldflags_libgfortran) $(version_arg)
++libgfortran_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -lm $(extra_ldflags_libgfortran) $(version_arg) -Wl,-O1
+ 
+ myexeclib_LTLIBRARIES = libgfortranbegin.la
+ myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+--- a/src/libgfortran/Makefile.in.orig	2009-12-07
++++ b/src/libgfortran/Makefile.in	2009-12-22
+@@ -976,7 +976,7 @@
+ 
+ toolexeclib_LTLIBRARIES = libgfortran.la
+ libgfortran_la_LINK = $(LINK) $(libgfortran_la_LDFLAGS)
+-libgfortran_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -lm $(extra_ldflags_libgfortran) $(version_arg)
++libgfortran_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` $(LTLDFLAGS) -lm $(extra_ldflags_libgfortran) $(version_arg) -Wl,-O1
+ myexeclib_LTLIBRARIES = libgfortranbegin.la
+ myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR)
+ libgfortranbegin_la_SOURCES = fmain.c
+--- a/src/libjava/Makefile.am.orig	2009-12-21
++++ b/src/libjava/Makefile.am	2009-12-22
+@@ -299,7 +299,7 @@
+ GCJ_FOR_ECJX = @GCJ_FOR_ECJX@
+ GCJ_FOR_ECJX_LINK = $(GCJ_FOR_ECJX) -o $@
+ LIBLINK = $(LIBTOOL) --tag=CXX $(LIBTOOLFLAGS) --mode=link $(CXX) -L$(here) \
+-	  $(JC1FLAGS) $(LTLDFLAGS) $(extra_ldflags_libjava) $(extra_ldflags) -o $@
++	  $(JC1FLAGS) $(LTLDFLAGS) $(extra_ldflags_libjava) $(extra_ldflags) -Wl,-O1 -o $@
+ CXXLINK = $(LIBTOOL) --tag=CXX $(LIBTOOLFLAGS) --mode=link $(CXXLD) \
+ 	  $(AM_CXXFLAGS) $(CXXFLAGS) $(AM_LDFLAGS) $(LTLDFLAGS) -o $@
+ 
+--- a/src/libjava/Makefile.in.orig	2009-12-21
++++ b/src/libjava/Makefile.in	2009-12-22
+@@ -1073,7 +1073,7 @@
+ 
+ GCJ_FOR_ECJX_LINK = $(GCJ_FOR_ECJX) -o $@
+ LIBLINK = $(LIBTOOL) --tag=CXX $(LIBTOOLFLAGS) --mode=link $(CXX) -L$(here) \
+-	  $(JC1FLAGS) $(LTLDFLAGS) $(extra_ldflags_libjava) $(extra_ldflags) -o $@
++	  $(JC1FLAGS) $(LTLDFLAGS) $(extra_ldflags_libjava) $(extra_ldflags) -Wl,-O1 -o $@
+ 
+ CXXLINK = $(LIBTOOL) --tag=CXX $(LIBTOOLFLAGS) --mode=link $(CXXLD) \
+ 	  $(AM_CXXFLAGS) $(CXXFLAGS) $(AM_LDFLAGS) $(LTLDFLAGS) -o $@
+--- a/src/libmudflap/Makefile.am.orig	2009-08-23
++++ b/src/libmudflap/Makefile.am	2009-12-22
+@@ -34,7 +34,7 @@
+ 	mf-hooks2.c
+ libmudflap_la_LIBADD = 
+ libmudflap_la_DEPENDENCIES = $(libmudflap_la_LIBADD)
+-libmudflap_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version`
++libmudflap_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` -Wl,-O1
+ 
+ 
+ libmudflapth_la_SOURCES = \
+@@ -46,7 +46,7 @@
+ libmudflapth_la_CFLAGS = -DLIBMUDFLAPTH
+ libmudflapth_la_LIBADD =
+ libmudflapth_la_DEPENDENCIES = $(libmudflapth_la_LIBADD)
+-libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version`
++libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` -Wl,-O1
+ 
+ 
+ # XXX hack alert
+--- a/src/libmudflap/Makefile.in.orig	2009-12-07
++++ b/src/libmudflap/Makefile.in	2009-12-22
+@@ -320,7 +320,7 @@
+ 
+ libmudflap_la_LIBADD = 
+ libmudflap_la_DEPENDENCIES = $(libmudflap_la_LIBADD)
+-libmudflap_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version`
++libmudflap_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` -Wl,-O1
+ libmudflapth_la_SOURCES = \
+ 	mf-runtime.c \
+ 	mf-heuristics.c \
+@@ -331,7 +331,7 @@
+ libmudflapth_la_CFLAGS = -DLIBMUDFLAPTH
+ libmudflapth_la_LIBADD = 
+ libmudflapth_la_DEPENDENCIES = $(libmudflapth_la_LIBADD)
+-libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version`
++libmudflapth_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` -Wl,-O1
+ 
+ # XXX hack alert
+ # From libffi/Makefile.am
+--- a/src/libobjc/Makefile.in.orig	2009-08-23
++++ b/src/libobjc/Makefile.in	2009-12-22
+@@ -282,12 +282,14 @@
+ libobjc$(libsuffix).la: $(OBJS)
+ 	$(LIBTOOL_LINK) $(CC) -o $@ $(OBJS) \
+ 		-rpath $(toolexeclibdir) \
++		-Wl,-O1 \
+ 		-version-info $(LIBOBJC_VERSION) $(extra_ldflags_libobjc) \
+ 		$(LTLDFLAGS)
+ 
+ libobjc_gc$(libsuffix).la: $(OBJS_GC)
+ 	$(LIBTOOL_LINK) $(CC) -o $@ $(OBJS_GC) $(OBJC_BOEHM_GC_LIBS) \
+ 		-rpath $(toolexeclibdir) \
++		-Wl,-O1 \
+ 		-version-info $(LIBOBJC_GC_VERSION) $(extra_ldflags_libobjc) \
+ 		$(LTLDFLAGS)
+ 
+--- a/src/libstdc++-v3/src/Makefile.am.orig	2009-12-21
++++ b/src/libstdc++-v3/src/Makefile.am	2009-12-22
+@@ -207,6 +207,7 @@
+ 	$(top_builddir)/libsupc++/libsupc++convenience.la
+ 
+ libstdc___la_LDFLAGS = \
++	-Wl,-O1 \
+ 	-version-info $(libtool_VERSION) ${version_arg} -lm 
+ 
+ libstdc___la_LINK = $(CXXLINK) $(libstdc___la_LDFLAGS)
+--- a/src/libstdc++-v3/src/Makefile.in.orig	2009-12-21
++++ b/src/libstdc++-v3/src/Makefile.in	2009-12-22
+@@ -444,6 +444,7 @@
+ 	$(top_builddir)/libsupc++/libsupc++convenience.la
+ 
+ libstdc___la_LDFLAGS = \
++	-Wl,-O1 \
+ 	-version-info $(libtool_VERSION) ${version_arg} -lm 
+ 
+ libstdc___la_LINK = $(CXXLINK) $(libstdc___la_LDFLAGS)
--- gcc-5-5.4.0.orig/debian/patches/m68k-revert-pr45144.diff
+++ gcc-5-5.4.0/debian/patches/m68k-revert-pr45144.diff
@@ -0,0 +1,18 @@
+[revert the minor PR45144 missed-optimization fix because it
+ results in miscompilation of gnat on m68k with gcc-4.6 and 4.5;
+ with gcc-4.7 other changes mask the issue <mikpe@it.uu.se>]
+
+	PR ada/48835
+
+--- a/src/gcc/tree-sra.c
++++ b/src/gcc/tree-sra.c
+@@ -916,9 +916,6 @@ type_consists_of_records_p (tree type)
+       {
+ 	tree ft = TREE_TYPE (fld);
+ 
+-	if (DECL_BIT_FIELD (fld))
+-	  return false;
+-
+ 	if (!is_gimple_reg_type (ft)
+ 	    && !type_consists_of_records_p (ft))
+ 	  return false;
--- gcc-5-5.4.0.orig/debian/patches/note-gnu-stack.diff
+++ gcc-5-5.4.0/debian/patches/note-gnu-stack.diff
@@ -0,0 +1,186 @@
+# DP: Add .note.GNU-stack sections for gcc's crt files, libffi and boehm-gc
+# DP: Taken from FC.
+
+gcc/
+
+2004-09-20  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/rs6000/ppc-asm.h: Add .note.GNU-stack section also
+	on ppc64-linux.
+
+	* config/ia64/lib1funcs.asm: Add .note.GNU-stack section on
+	ia64-linux.
+	* config/ia64/crtbegin.asm: Likewise.
+	* config/ia64/crtend.asm: Likewise.
+	* config/ia64/crti.asm: Likewise.
+	* config/ia64/crtn.asm: Likewise.
+
+2004-05-14  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/ia64/linux.h (TARGET_ASM_FILE_END): Define.
+
+boehm-gc/
+
+2005-02-08  Jakub Jelinek  <jakub@redhat.com>
+
+	* ia64_save_regs_in_stack.s: Moved to...
+	* ia64_save_regs_in_stack.S: ... this.  Add .note.GNU-stack
+	on Linux.
+
+libffi/
+
+2007-05-11  Daniel Jacobowitz  <dan@debian.org>
+
+	* src/arm/sysv.S: Fix ARM comment marker.
+
+2005-02-08  Jakub Jelinek  <jakub@redhat.com>
+
+	* src/alpha/osf.S: Add .note.GNU-stack on Linux.
+	* src/s390/sysv.S: Likewise.
+	* src/powerpc/linux64.S: Likewise.
+	* src/powerpc/linux64_closure.S: Likewise.
+	* src/powerpc/ppc_closure.S: Likewise.
+	* src/powerpc/sysv.S: Likewise.
+	* src/x86/unix64.S: Likewise.
+	* src/x86/sysv.S: Likewise.
+	* src/sparc/v8.S: Likewise.
+	* src/sparc/v9.S: Likewise.
+	* src/m68k/sysv.S: Likewise.
+	* src/ia64/unix.S: Likewise.
+	* src/arm/sysv.S: Likewise.
+
+---
+ boehm-gc/ia64_save_regs_in_stack.S   |   15 +++++++++++++++
+ boehm-gc/ia64_save_regs_in_stack.s   |   12 ------------
+ gcc/config/ia64/linux.h              |    3 +++
+ gcc/config/rs6000/ppc-asm.h          |    2 +-
+ libgcc/config/ia64/crtbegin.S        |    4 ++++
+ libgcc/config/ia64/crtend.S          |    4 ++++
+ libgcc/config/ia64/crti.S            |    4 ++++
+ libgcc/config/ia64/crtn.S            |    4 ++++
+ libgcc/config/ia64/lib1funcs.S       |    4 ++++
+ 9 files changed, 39 insertions(+), 13 deletions(-)
+
+Index: b/src/boehm-gc/ia64_save_regs_in_stack.s
+===================================================================
+--- a/src/boehm-gc/ia64_save_regs_in_stack.s
++++ /dev/null
+@@ -1,12 +0,0 @@
+-        .text
+-        .align 16
+-        .global GC_save_regs_in_stack
+-        .proc GC_save_regs_in_stack
+-GC_save_regs_in_stack:
+-        .body
+-        flushrs
+-        ;;
+-        mov r8=ar.bsp
+-        br.ret.sptk.few rp
+-        .endp GC_save_regs_in_stack
+-
+Index: b/src/boehm-gc/ia64_save_regs_in_stack.S
+===================================================================
+--- /dev/null
++++ b/src/boehm-gc/ia64_save_regs_in_stack.S
+@@ -0,0 +1,15 @@
++        .text
++        .align 16
++        .global GC_save_regs_in_stack
++        .proc GC_save_regs_in_stack
++GC_save_regs_in_stack:
++        .body
++        flushrs
++        ;;
++        mov r8=ar.bsp
++        br.ret.sptk.few rp
++        .endp GC_save_regs_in_stack
++
++#ifdef __linux__
++	.section .note.GNU-stack,"",@progbits
++#endif
+Index: b/src/libgcc/config/ia64/crtbegin.S
+===================================================================
+--- a/src/libgcc/config/ia64/crtbegin.S
++++ b/src/libgcc/config/ia64/crtbegin.S
+@@ -252,3 +252,7 @@ __do_jv_register_classes:
+ .weak __cxa_finalize
+ #endif
+ .weak _Jv_RegisterClasses
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+Index: b/src/libgcc/config/ia64/crtend.S
+===================================================================
+--- a/src/libgcc/config/ia64/crtend.S
++++ b/src/libgcc/config/ia64/crtend.S
+@@ -119,3 +119,7 @@ __do_global_ctors_aux:
+ 
+ 	br.ret.sptk.many rp
+ 	.endp __do_global_ctors_aux
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+Index: b/src/libgcc/config/ia64/crti.S
+===================================================================
+--- a/src/libgcc/config/ia64/crti.S
++++ b/src/libgcc/config/ia64/crti.S
+@@ -51,3 +51,7 @@ _fini:
+ 	.body
+ 
+ # end of crti.S
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+Index: b/src/libgcc/config/ia64/crtn.S
+===================================================================
+--- a/src/libgcc/config/ia64/crtn.S
++++ b/src/libgcc/config/ia64/crtn.S
+@@ -41,3 +41,7 @@
+ 	br.ret.sptk.many b0
+ 
+ # end of crtn.S
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+Index: b/src/libgcc/config/ia64/lib1funcs.S
+===================================================================
+--- a/src/libgcc/config/ia64/lib1funcs.S
++++ b/src/libgcc/config/ia64/lib1funcs.S
+@@ -793,3 +793,7 @@ __floattitf:
+ 	.endp __floattitf
+ #endif
+ #endif
++
++#ifdef __linux__
++.section .note.GNU-stack; .previous
++#endif
+Index: b/src/gcc/config/ia64/linux.h
+===================================================================
+--- a/src/gcc/config/ia64/linux.h
++++ b/src/gcc/config/ia64/linux.h
+@@ -79,5 +79,8 @@ do {						\
+ #undef TARGET_INIT_LIBFUNCS
+ #define TARGET_INIT_LIBFUNCS ia64_soft_fp_init_libfuncs
+ 
++#undef TARGET_ASM_FILE_END
++#define TARGET_ASM_FILE_END file_end_indicate_exec_stack
++
+ /* Define this to be nonzero if static stack checking is supported.  */
+ #define STACK_CHECK_STATIC_BUILTIN 1
+Index: b/src/gcc/config/rs6000/ppc-asm.h
+===================================================================
+--- a/src/gcc/config/rs6000/ppc-asm.h
++++ b/src/gcc/config/rs6000/ppc-asm.h
+@@ -375,7 +375,7 @@ GLUE(.L,name): \
+ #endif
+ #endif
+ 
+-#if defined __linux__ && !defined __powerpc64__
++#if defined __linux__
+ 	.section .note.GNU-stack
+ 	.previous
+ #endif
--- gcc-5-5.4.0.orig/debian/patches/powerpc_nofprs.diff
+++ gcc-5-5.4.0/debian/patches/powerpc_nofprs.diff
@@ -0,0 +1,75 @@
+--- a/src/libgcc/config/rs6000/crtsavfpr.S
++++ b/src/libgcc/config/rs6000/crtsavfpr.S
+@@ -33,6 +33,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
++#ifndef __NO_FPRS__
+ 
+ /* Routines for saving floating point registers, called by the compiler.  */
+ /* Called with r11 pointing to the stack header word of the caller of the */
+@@ -79,3 +80,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+--- a/src/libgcc/config/rs6000/crtresfpr.S
++++ b/src/libgcc/config/rs6000/crtresfpr.S
+@@ -33,6 +33,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
++#ifndef __NO_FPRS__
+ 
+ /* Routines for restoring floating point registers, called by the compiler.  */
+ /* Called with r11 pointing to the stack header word of the caller of the */
+@@ -79,3 +80,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+--- a/src/libgcc/config/rs6000/crtresxfpr.S
++++ b/src/libgcc/config/rs6000/crtresxfpr.S
+@@ -33,6 +33,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
++#ifndef __NO_FPRS__
+ 
+ /* Routines for restoring floating point registers, called by the compiler.  */
+ /* Called with r11 pointing to the stack header word of the caller of the */
+@@ -124,3 +125,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+--- a/src/libgcc/config/rs6000/crtsavevr.S	2013-03-13 22:25:25.802681336 +0000
++++ b/src/libgcc/config/rs6000/crtsavevr.S	2013-03-13 22:26:21.054695066 +0000
+@@ -24,6 +24,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
++#ifndef __NO_FPRS__
+ 
+ #undef __ALTIVEC__
+ #define __ALTIVEC__ 1
+@@ -85,3 +86,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+--- a/src/libgcc/config/rs6000/crtrestvr.S	2013-03-13 22:25:28.394681980 +0000
++++ b/src/libgcc/config/rs6000/crtrestvr.S	2013-03-13 22:26:21.058695067 +0000
+@@ -24,6 +24,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
++#ifndef __NO_FPRS__
+ 
+ #undef __ALTIVEC__
+ #define __ALTIVEC__ 1
+@@ -85,3 +86,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
--- gcc-5-5.4.0.orig/debian/patches/powerpc_remove_many.diff
+++ gcc-5-5.4.0/debian/patches/powerpc_remove_many.diff
@@ -0,0 +1,32 @@
+# DP: Subject: [PATCH] remove -many on __SPE__ target
+# DP: this helps to to detect opcodes which are not part of the current
+# DP: CPU because without -many gas won't touch them. This currently could
+# DP: break the kernel build as the 603 on steroids cpus use performance
+# DP: counter opcodes which are not available on the steroid less 603 core.
+
+--- a/src/gcc/config/rs6000/rs6000.h
++++ b/src/gcc/config/rs6000/rs6000.h
+@@ -98,6 +98,12 @@
+ #define ASM_CPU_476_SPEC "-mpower4"
+ #endif
+ 
++#ifndef __SPE__
++#define ASM_CPU_SPU_MANY_NOT_SPE "-many"
++#else
++#define ASM_CPU_SPU_MANY_NOT_SPE
++#endif
++
+ /* Common ASM definitions used by ASM_SPEC among the various targets for
+    handling -mcpu=xxx switches.  There is a parallel list in driver-rs6000.c to
+    provide the default assembler options if the user uses -mcpu=native, so if
+@@ -170,7 +176,8 @@
+ %{mcpu=e500mc64: -me500mc64} \
+ %{maltivec: -maltivec} \
+ %{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: %(asm_cpu_power7)}} \
+ %{mpower8-vector|mcrypto|mdirect-move|mhtm: %{!mcpu*: %(asm_cpu_power8)}} \
+--many"
++" \
++ASM_CPU_SPU_MANY_NOT_SPE
+ 
+ #define CPP_DEFAULT_SPEC ""
+ 
--- gcc-5-5.4.0.orig/debian/patches/pr39491.diff
+++ gcc-5-5.4.0/debian/patches/pr39491.diff
@@ -0,0 +1,132 @@
+# DP: Proposed patch for PR libstdc++/39491.
+
+2009-04-16  Benjamin Kosnik  <bkoz@redhat.com>
+
+	* src/math_stubs_long_double.cc (__signbitl): Add for hppa linux only.
+
+Index: a/src/libstdc++-v3/src/math_stubs_long_double.cc
+===================================================================
+--- a/src/libstdc++-v3/src/math_stubs_long_double.cc	(revision 146216)
++++ b/src/libstdc++-v3/src/math_stubs_long_double.cc	(working copy)
+@@ -213,4 +221,111 @@
+     return tanh((double) x);
+   }
+ #endif
++
++  // From libmath/signbitl.c
++  // XXX ABI mistakenly exported
++#if defined (__hppa__) && defined (__linux__)
++# include <endian.h>
++# include <float.h>
++
++typedef unsigned int U_int32_t __attribute ((mode (SI)));
++typedef int Int32_t __attribute ((mode (SI)));
++typedef unsigned int U_int64_t __attribute ((mode (DI)));
++typedef int Int64_t __attribute ((mode (DI)));
++
++#if BYTE_ORDER == BIG_ENDIAN
++typedef union
++{
++  long double value;
++  struct
++  {
++    unsigned int sign_exponent:16;
++    unsigned int empty:16;
++    U_int32_t msw;
++    U_int32_t lsw;
++  } parts;
++} ieee_long_double_shape_type;
++#endif
++#if BYTE_ORDER == LITTLE_ENDIAN
++typedef union
++{
++  long double value;
++  struct
++  {
++    U_int32_t lsw;
++    U_int32_t msw;
++    unsigned int sign_exponent:16;
++    unsigned int empty:16;
++  } parts;
++} ieee_long_double_shape_type;
++#endif
++
++/* Get int from the exponent of a long double.  */
++#define GET_LDOUBLE_EXP(exp,d)                                  \
++do {                                                            \
++  ieee_long_double_shape_type ge_u;                             \
++  ge_u.value = (d);                                             \
++  (exp) = ge_u.parts.sign_exponent;                             \
++} while (0)
++
++#if BYTE_ORDER == BIG_ENDIAN
++typedef union
++{
++  long double value;
++  struct
++  {
++    U_int64_t msw;
++    U_int64_t lsw;
++  } parts64;
++  struct
++  {
++    U_int32_t w0, w1, w2, w3;
++  } parts32;
++} ieee_quad_double_shape_type;
++#endif
++
++#if BYTE_ORDER == LITTLE_ENDIAN
++typedef union
++{
++  long double value;
++  struct
++  {
++    U_int64_t lsw;
++    U_int64_t msw;
++  } parts64;
++  struct
++  {
++    U_int32_t w3, w2, w1, w0;
++  } parts32;
++} ieee_quad_double_shape_type;
++#endif
++
++/* Get most significant 64 bit int from a quad long double.  */
++#define GET_LDOUBLE_MSW64(msw,d)				\
++do {								\
++  ieee_quad_double_shape_type qw_u;				\
++  qw_u.value = (d);						\
++  (msw) = qw_u.parts64.msw;					\
++} while (0)
++
++int
++__signbitl (long double x)
++{
++#if LDBL_MANT_DIG == 113
++  Int64_t msw;
++
++  GET_LDOUBLE_MSW64 (msw, x);
++  return msw < 0;
++#else
++  Int32_t e;
++
++  GET_LDOUBLE_EXP (e, x);
++  return e & 0x8000;
++#endif
++}
++#endif
++
++#ifndef _GLIBCXX_HAVE___SIGNBITL
++
++#endif
+ } // extern "C"
+--- a/src/libstdc++-v3/config/abi/pre/gnu.ver~	2009-04-10 01:23:07.000000000 +0200
++++ b/src/libstdc++-v3/config/abi/pre/gnu.ver	2009-04-21 16:24:24.000000000 +0200
+@@ -635,6 +635,7 @@
+     sqrtf;
+     sqrtl;
+     copysignf;
++    __signbitl;
+ 
+    # GLIBCXX_ABI compatibility only.
+     # std::string
--- gcc-5-5.4.0.orig/debian/patches/pr47818.diff
+++ gcc-5-5.4.0/debian/patches/pr47818.diff
@@ -0,0 +1,24 @@
+# DP: Fix PR ada/47818: Pragma Assert is rejected with No_Implementation_Pragmas restriction.
+
+Index: b/src/gcc/ada/sem_prag.adb
+===================================================================
+--- a/src/gcc/ada/sem_prag.adb
++++ b/src/gcc/ada/sem_prag.adb
+@@ -11334,7 +11334,16 @@ package body Sem_Prag is
+             Str   : Node_Id;
+ 
+          begin
+-            GNAT_Pragma;
++            --  This could be a rewritten pragma Assert. If it is the case
++            --  then don't check restrictions, because they are different for
++            --  pragma Assert and were already checked.
++
++            if Nkind (Original_Node (N)) /= N_Pragma
++              or else Pragma_Name (Original_Node (N)) /= Name_Assert
++            then
++               GNAT_Pragma;
++            end if;
++
+             Check_At_Least_N_Arguments (2);
+             Check_At_Most_N_Arguments (3);
+             Check_Optional_Identifier (Arg1, Name_Name);
--- gcc-5-5.4.0.orig/debian/patches/pr61106.diff
+++ gcc-5-5.4.0/debian/patches/pr61106.diff
@@ -0,0 +1,24 @@
+# DP: Proposed patch for PR driver/61106
+
+--- a/src/gcc/optc-gen.awk
++++ b/src/gcc/optc-gen.awk
+@@ -404,15 +404,17 @@ for (i = 0; i < n_enabledby; i++) {
+     for (j = 1; j < n_enables; j++) {
+         opt_var_name = var_name(flags[opt_numbers[thisenable[j]]]);
+         if (opt_var_name != "") {
+             condition = "!opts_set->x_" opt_var_name
+             if (thisenableif[j] != "") {
+-                condition = condition " && (" thisenableif[j] ")"
++                value = "(" thisenableif[j] ")"
++            } else {
++                value = "value"
+             }
+             print "      if (" condition ")"
+             print "        handle_generated_option (opts, opts_set,"
+-            print "                                 " opt_enum(thisenable[j]) ", NULL, value,"
++            print "                                 " opt_enum(thisenable[j]) ", NULL, " value ","
+             print "                                 lang_mask, kind, loc, handlers, dc);"
+         } else {
+             print "#error " thisenable[j] " does not have a Var() flag"
+         }
+     }
--- gcc-5-5.4.0.orig/debian/patches/pr61126.diff
+++ gcc-5-5.4.0/debian/patches/pr61126.diff
@@ -0,0 +1,51 @@
+Index: gcc/fortran/lang.opt
+===================================================================
+--- a/src/gcc/fortran/lang.opt	(revision 210277)
++++ b/src/gcc/fortran/lang.opt	(working copy)
+@@ -301,6 +301,10 @@
+ Fortran Warning
+ Warn about unused dummy arguments.
+ 
++Wunused-parameter
++LangEnabledBy(Fortran,Wextra)
++; Documented in common.opt
++
+ Wzerotrip
+ Fortran Warning
+ Warn about zero-trip DO loops
+Index: gcc/fortran/options.c
+===================================================================
+--- a/src/gcc/fortran/options.c	(revision 210277)
++++ b/src/gcc/fortran/options.c	(working copy)
+@@ -674,12 +674,7 @@
+       break;
+ 
+     case OPT_Wextra:
+-      handle_generated_option (&global_options, &global_options_set,
+-			       OPT_Wunused_parameter, NULL, value,
+-			       gfc_option_lang_mask (), kind, loc,
+-			       handlers, global_dc);
+       set_Wextra (value);
+-
+       break;
+ 
+     case OPT_Wfunction_elimination:
+Index: gcc/opts-global.c
+===================================================================
+--- a/src/gcc/opts-global.c	(revision 210277)
++++ b/src/gcc/opts-global.c	(working copy)
+@@ -273,10 +273,10 @@
+   handlers->unknown_option_callback = unknown_option_callback;
+   handlers->wrong_lang_callback = complain_wrong_lang;
+   handlers->num_handlers = 3;
+-  handlers->handlers[0].handler = lang_handle_option;
+-  handlers->handlers[0].mask = initial_lang_mask;
+-  handlers->handlers[1].handler = common_handle_option;
+-  handlers->handlers[1].mask = CL_COMMON;
++  handlers->handlers[0].handler = common_handle_option;
++  handlers->handlers[0].mask = CL_COMMON;
++  handlers->handlers[1].handler = lang_handle_option;
++  handlers->handlers[1].mask = initial_lang_mask;
+   handlers->handlers[2].handler = target_handle_option;
+   handlers->handlers[2].mask = CL_TARGET;
+ }
--- gcc-5-5.4.0.orig/debian/patches/pr65913-workaround.diff
+++ gcc-5-5.4.0/debian/patches/pr65913-workaround.diff
@@ -0,0 +1,731 @@
+# DP: Work around PR c++/65913, link with -latomic (older than binutils 2.25)
+
+--- a/src/gcc/cp/g++spec.c
++++ b/src/gcc/cp/g++spec.c
+@@ -264,6 +264,8 @@
+ 
+   /* Add one for shared_libgcc or extra static library.  */
+   num_args = argc + added + need_math + (library > 0) * 4 + 1;
++  /* Link libatomic.  */
++  num_args += 2;
+   new_decoded_options = XNEWVEC (struct cl_decoded_option, num_args);
+ 
+   i = 0;
+@@ -389,6 +391,17 @@
+   if (shared_libgcc && !static_link)
+     generate_option (OPT_shared_libgcc, NULL, 1, CL_DRIVER,
+ 		     &new_decoded_options[j++]);
++  if (library > 0)
++    {
++      /* Work around http://gcc.gnu.org/PR65913.  */
++      generate_option (OPT_Wl_, "--as-needed", 1, CL_DRIVER,
++		       &new_decoded_options[j]);
++      j++;
++      generate_option (OPT_l, "atomic", 1, CL_DRIVER,
++		       &new_decoded_options[j]);
++      added_libraries++;
++      j++;
++    }
+ 
+   *in_decoded_options_count = j;
+   *in_decoded_options = new_decoded_options;
+--- a/src/configure.ac
++++ b/src/configure.ac
+@@ -2683,6 +2683,11 @@
+ build_configdirs=`echo "${build_configdirs}" | sed -e 's/build-//g'`
+ bootstrap_fixincludes=no
+ 
++# If we are building libatomic, bootstrap it.
++if echo " ${target_configdirs} " | grep " libatomic " > /dev/null 2>&1 ; then
++  bootstrap_target_libs=${bootstrap_target_libs}target-libatomic,
++fi
++
+ # If we are building libgomp, bootstrap it.
+ if echo " ${target_configdirs} " | grep " libgomp " > /dev/null 2>&1 ; then
+   bootstrap_target_libs=${bootstrap_target_libs}target-libgomp,
+@@ -3389,7 +3394,7 @@
+ GCC_TARGET_TOOL(cc, CC_FOR_TARGET, CC, [gcc/xgcc -B$$r/$(HOST_SUBDIR)/gcc/])
+ dnl see comments for CXX_FOR_TARGET_FLAG_TO_PASS
+ GCC_TARGET_TOOL(c++, CXX_FOR_TARGET, CXX,
+-		[gcc/xg++ -B$$r/$(HOST_SUBDIR)/gcc/ -nostdinc++ `if test -f $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags; then $(SHELL) $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags --build-includes; else echo -funconfigured-libstdc++-v3 ; fi` -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src/.libs -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs],
++		[gcc/xg++ -B$$r/$(HOST_SUBDIR)/gcc/ -nostdinc++ `if test -f $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags; then $(SHELL) $$r/$(TARGET_SUBDIR)/libstdc++-v3/scripts/testsuite_flags --build-includes; else echo -funconfigured-libstdc++-v3 ; fi` -L$$r/$(TARGET_SUBDIR)/libatomic/.libs -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src/.libs -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs],
+ 		c++)
+ GCC_TARGET_TOOL(c++ for libstdc++, RAW_CXX_FOR_TARGET, CXX,
+ 		[gcc/xgcc -shared-libgcc -B$$r/$(HOST_SUBDIR)/gcc -nostdinc++ -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/src/.libs -L$$r/$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs],
+--- a/src/Makefile.def
++++ b/src/Makefile.def
+@@ -166,7 +166,7 @@
+ target_modules = { module= libada; };
+ target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; };
+ target_modules = { module= libitm; lib_path=.libs; };
+-target_modules = { module= libatomic; lib_path=.libs; };
++target_modules = { module= libatomic; bootstrap= true; lib_path=.libs; };
+ 
+ // These are (some of) the make targets to be done in each subdirectory.
+ // Not all; these are the ones which don't have special options.
+@@ -549,6 +549,7 @@
+ dependencies = { module=all-target-libjava; on=all-target-libffi; };
+ dependencies = { module=configure-target-libobjc; on=configure-target-boehm-gc; };
+ dependencies = { module=all-target-libobjc; on=all-target-boehm-gc; };
++dependencies = { module=configure-target-libstdc++-v3; on=configure-target-libatomic; };
+ dependencies = { module=configure-target-libstdc++-v3; on=configure-target-libgomp; };
+ dependencies = { module=configure-target-liboffloadmic; on=configure-target-libgomp; };
+ dependencies = { module=configure-target-libsanitizer; on=all-target-libstdc++-v3; };
+@@ -574,6 +575,9 @@
+ dependencies = { module=install-target-libitm; on=install-target-libgcc; };
+ dependencies = { module=install-target-libobjc; on=install-target-libgcc; };
+ dependencies = { module=install-target-libstdc++-v3; on=install-target-libgcc; };
++dependencies = { module=install-target-libstdc++-v3; on=install-target-libatomic; };
++dependencies = { module=install-target-libcc1; on=install-target-libstdc++-v3; };
++dependencies = { module=install-target-libcc1; on=install-target-libatomic; };
+ 
+ // Target modules in the 'src' repository.
+ lang_env_dependencies = { module=libtermcap; };
+--- a/src/Makefile.tpl
++++ b/src/Makefile.tpl
+@@ -240,11 +240,13 @@
+ POSTSTAGE1_CXX_EXPORT = \
+ 	CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/xg++$(exeext) \
+ 	  -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ -nostdinc++ \
++	  -B$$r/prev-$(TARGET_SUBDIR)/libatomic/.libs \
+ 	  -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \
+ 	  -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include/$(TARGET_SUBDIR) \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$s/libstdc++-v3/libsupc++ \
++	  -L$$r/prev-$(TARGET_SUBDIR)/libatomic/.libs \
+ 	  -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \
+ 	  -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs"; \
+ 	  export CXX; \
+--- a/src/Makefile.in
++++ b/src/Makefile.in
+@@ -237,11 +237,13 @@
+ POSTSTAGE1_CXX_EXPORT = \
+ 	CXX="$(STAGE_CC_WRAPPER) $$r/$(HOST_SUBDIR)/prev-gcc/xg++$(exeext) \
+ 	  -B$$r/$(HOST_SUBDIR)/prev-gcc/ -B$(build_tooldir)/bin/ -nostdinc++ \
++	  -B$$r/prev-$(TARGET_SUBDIR)/libatomic/.libs \
+ 	  -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \
+ 	  -B$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include/$(TARGET_SUBDIR) \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/include \
+ 	  `if $(LEAN); then echo ' -isystem '; else echo ' -I'; fi`$$s/libstdc++-v3/libsupc++ \
++	  -L$$r/prev-$(TARGET_SUBDIR)/libatomic/.libs \
+ 	  -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/src/.libs \
+ 	  -L$$r/prev-$(TARGET_SUBDIR)/libstdc++-v3/libsupc++/.libs"; \
+ 	  export CXX; \
+@@ -1132,7 +1134,9 @@
+ all-target: maybe-all-target-libgomp
+ @endif target-libgomp-no-bootstrap
+ all-target: maybe-all-target-libitm
++@if target-libatomic-no-bootstrap
+ all-target: maybe-all-target-libatomic
++@endif target-libatomic-no-bootstrap
+ 
+ # Do a target for all the subdirectories.  A ``make do-X'' will do a
+ # ``make X'' in all subdirectories (because, in general, there is a
+@@ -46810,7 +46814,6 @@
+ @if target-libatomic
+ maybe-configure-target-libatomic: configure-target-libatomic
+ configure-target-libatomic: 
+-	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	echo "Checking multilib configuration for libatomic..."; \
+@@ -46848,8 +46851,279 @@
+ 
+ 
+ 
++.PHONY: configure-stage1-target-libatomic maybe-configure-stage1-target-libatomic
++maybe-configure-stage1-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stage1-target-libatomic: configure-stage1-target-libatomic
++configure-stage1-target-libatomic:
++	@[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE1_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage 1 in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   \
++	  $(STAGE1_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
+ 
++.PHONY: configure-stage2-target-libatomic maybe-configure-stage2-target-libatomic
++maybe-configure-stage2-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stage2-target-libatomic: configure-stage2-target-libatomic
++configure-stage2-target-libatomic:
++	@[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE2_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	 \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage 2 in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   --with-build-libsubdir=$(HOST_SUBDIR)  \
++	  $(STAGE2_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
+ 
++.PHONY: configure-stage3-target-libatomic maybe-configure-stage3-target-libatomic
++maybe-configure-stage3-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stage3-target-libatomic: configure-stage3-target-libatomic
++configure-stage3-target-libatomic:
++	@[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE3_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	 \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage 3 in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   --with-build-libsubdir=$(HOST_SUBDIR)  \
++	  $(STAGE3_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
++
++.PHONY: configure-stage4-target-libatomic maybe-configure-stage4-target-libatomic
++maybe-configure-stage4-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stage4-target-libatomic: configure-stage4-target-libatomic
++configure-stage4-target-libatomic:
++	@[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE4_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	 \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage 4 in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   --with-build-libsubdir=$(HOST_SUBDIR)  \
++	  $(STAGE4_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
++
++.PHONY: configure-stageprofile-target-libatomic maybe-configure-stageprofile-target-libatomic
++maybe-configure-stageprofile-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stageprofile-target-libatomic: configure-stageprofile-target-libatomic
++configure-stageprofile-target-libatomic:
++	@[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGEprofile_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	 \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage profile in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   --with-build-libsubdir=$(HOST_SUBDIR)  \
++	  $(STAGEprofile_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
++
++.PHONY: configure-stagefeedback-target-libatomic maybe-configure-stagefeedback-target-libatomic
++maybe-configure-stagefeedback-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-configure-stagefeedback-target-libatomic: configure-stagefeedback-target-libatomic
++configure-stagefeedback-target-libatomic:
++	@[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
++	@$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGEfeedback_TFLAGS)"; \
++	echo "Checking multilib configuration for libatomic..."; \
++	$(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libatomic/multilib.tmp 2> /dev/null ; \
++	if test -r $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	  if cmp -s $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; then \
++	    rm -f $(TARGET_SUBDIR)/libatomic/multilib.tmp; \
++	  else \
++	    rm -f $(TARGET_SUBDIR)/libatomic/Makefile; \
++	    mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	  fi; \
++	else \
++	  mv $(TARGET_SUBDIR)/libatomic/multilib.tmp $(TARGET_SUBDIR)/libatomic/multilib.out; \
++	fi; \
++	test ! -f $(TARGET_SUBDIR)/libatomic/Makefile || exit 0; \
++	$(NORMAL_TARGET_EXPORTS) \
++	 \
++	CFLAGS="$(CFLAGS_FOR_TARGET)"; export CFLAGS; \
++	CXXFLAGS="$(CXXFLAGS_FOR_TARGET)"; export CXXFLAGS; \
++	LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)"; export LIBCFLAGS;  \
++	echo Configuring stage feedback in $(TARGET_SUBDIR)/libatomic ; \
++	$(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libatomic ; \
++	cd $(TARGET_SUBDIR)/libatomic || exit 1; \
++	case $(srcdir) in \
++	  /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \
++	  *) topdir=`echo $(TARGET_SUBDIR)/libatomic/ | \
++		sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \
++	esac; \
++	module_srcdir=libatomic; \
++	$(SHELL) $$s/$$module_srcdir/configure \
++	  --srcdir=$${topdir}/$$module_srcdir \
++	  $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \
++	  --target=${target_alias} \
++	   --with-build-libsubdir=$(HOST_SUBDIR)  \
++	  $(STAGEfeedback_CONFIGURE_FLAGS)
++@endif target-libatomic-bootstrap
++
++
++
++
++
+ .PHONY: all-target-libatomic maybe-all-target-libatomic
+ maybe-all-target-libatomic:
+ @if gcc-bootstrap
+@@ -46859,7 +47133,6 @@
+ TARGET-target-libatomic=all
+ maybe-all-target-libatomic: all-target-libatomic
+ all-target-libatomic: configure-target-libatomic
+-	@: $(MAKE); $(unstage)
+ 	@r=`${PWD_COMMAND}`; export r; \
+ 	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
+ 	$(NORMAL_TARGET_EXPORTS)  \
+@@ -46870,8 +47143,257 @@
+ 
+ 
+ 
++.PHONY: all-stage1-target-libatomic maybe-all-stage1-target-libatomic
++.PHONY: clean-stage1-target-libatomic maybe-clean-stage1-target-libatomic
++maybe-all-stage1-target-libatomic:
++maybe-clean-stage1-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stage1-target-libatomic: all-stage1-target-libatomic
++all-stage1: all-stage1-target-libatomic
++TARGET-stage1-target-libatomic = $(TARGET-target-libatomic)
++all-stage1-target-libatomic: configure-stage1-target-libatomic
++	@[ $(current_stage) = stage1 ] || $(MAKE) stage1-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE1_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS)  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)  \
++		  \
++		TFLAGS="$(STAGE1_TFLAGS)" \
++		$(TARGET-stage1-target-libatomic)
+ 
++maybe-clean-stage1-target-libatomic: clean-stage1-target-libatomic
++clean-stage1: clean-stage1-target-libatomic
++clean-stage1-target-libatomic:
++	@if [ $(current_stage) = stage1 ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stage1-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stage1-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)  \
++	  clean
++@endif target-libatomic-bootstrap
+ 
++
++.PHONY: all-stage2-target-libatomic maybe-all-stage2-target-libatomic
++.PHONY: clean-stage2-target-libatomic maybe-clean-stage2-target-libatomic
++maybe-all-stage2-target-libatomic:
++maybe-clean-stage2-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stage2-target-libatomic: all-stage2-target-libatomic
++all-stage2: all-stage2-target-libatomic
++TARGET-stage2-target-libatomic = $(TARGET-target-libatomic)
++all-stage2-target-libatomic: configure-stage2-target-libatomic
++	@[ $(current_stage) = stage2 ] || $(MAKE) stage2-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE2_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS) \
++	  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)   \
++		TFLAGS="$(STAGE2_TFLAGS)" \
++		$(TARGET-stage2-target-libatomic)
++
++maybe-clean-stage2-target-libatomic: clean-stage2-target-libatomic
++clean-stage2: clean-stage2-target-libatomic
++clean-stage2-target-libatomic:
++	@if [ $(current_stage) = stage2 ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stage2-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stage2-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)   clean
++@endif target-libatomic-bootstrap
++
++
++.PHONY: all-stage3-target-libatomic maybe-all-stage3-target-libatomic
++.PHONY: clean-stage3-target-libatomic maybe-clean-stage3-target-libatomic
++maybe-all-stage3-target-libatomic:
++maybe-clean-stage3-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stage3-target-libatomic: all-stage3-target-libatomic
++all-stage3: all-stage3-target-libatomic
++TARGET-stage3-target-libatomic = $(TARGET-target-libatomic)
++all-stage3-target-libatomic: configure-stage3-target-libatomic
++	@[ $(current_stage) = stage3 ] || $(MAKE) stage3-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE3_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS) \
++	  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)   \
++		TFLAGS="$(STAGE3_TFLAGS)" \
++		$(TARGET-stage3-target-libatomic)
++
++maybe-clean-stage3-target-libatomic: clean-stage3-target-libatomic
++clean-stage3: clean-stage3-target-libatomic
++clean-stage3-target-libatomic:
++	@if [ $(current_stage) = stage3 ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stage3-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stage3-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)   clean
++@endif target-libatomic-bootstrap
++
++
++.PHONY: all-stage4-target-libatomic maybe-all-stage4-target-libatomic
++.PHONY: clean-stage4-target-libatomic maybe-clean-stage4-target-libatomic
++maybe-all-stage4-target-libatomic:
++maybe-clean-stage4-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stage4-target-libatomic: all-stage4-target-libatomic
++all-stage4: all-stage4-target-libatomic
++TARGET-stage4-target-libatomic = $(TARGET-target-libatomic)
++all-stage4-target-libatomic: configure-stage4-target-libatomic
++	@[ $(current_stage) = stage4 ] || $(MAKE) stage4-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGE4_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS) \
++	  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)   \
++		TFLAGS="$(STAGE4_TFLAGS)" \
++		$(TARGET-stage4-target-libatomic)
++
++maybe-clean-stage4-target-libatomic: clean-stage4-target-libatomic
++clean-stage4: clean-stage4-target-libatomic
++clean-stage4-target-libatomic:
++	@if [ $(current_stage) = stage4 ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stage4-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stage4-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)   clean
++@endif target-libatomic-bootstrap
++
++
++.PHONY: all-stageprofile-target-libatomic maybe-all-stageprofile-target-libatomic
++.PHONY: clean-stageprofile-target-libatomic maybe-clean-stageprofile-target-libatomic
++maybe-all-stageprofile-target-libatomic:
++maybe-clean-stageprofile-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stageprofile-target-libatomic: all-stageprofile-target-libatomic
++all-stageprofile: all-stageprofile-target-libatomic
++TARGET-stageprofile-target-libatomic = $(TARGET-target-libatomic)
++all-stageprofile-target-libatomic: configure-stageprofile-target-libatomic
++	@[ $(current_stage) = stageprofile ] || $(MAKE) stageprofile-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGEprofile_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS) \
++	  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)   \
++		TFLAGS="$(STAGEprofile_TFLAGS)" \
++		$(TARGET-stageprofile-target-libatomic)
++
++maybe-clean-stageprofile-target-libatomic: clean-stageprofile-target-libatomic
++clean-stageprofile: clean-stageprofile-target-libatomic
++clean-stageprofile-target-libatomic:
++	@if [ $(current_stage) = stageprofile ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stageprofile-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stageprofile-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)   clean
++@endif target-libatomic-bootstrap
++
++
++.PHONY: all-stagefeedback-target-libatomic maybe-all-stagefeedback-target-libatomic
++.PHONY: clean-stagefeedback-target-libatomic maybe-clean-stagefeedback-target-libatomic
++maybe-all-stagefeedback-target-libatomic:
++maybe-clean-stagefeedback-target-libatomic:
++@if target-libatomic-bootstrap
++maybe-all-stagefeedback-target-libatomic: all-stagefeedback-target-libatomic
++all-stagefeedback: all-stagefeedback-target-libatomic
++TARGET-stagefeedback-target-libatomic = $(TARGET-target-libatomic)
++all-stagefeedback-target-libatomic: configure-stagefeedback-target-libatomic
++	@[ $(current_stage) = stagefeedback ] || $(MAKE) stagefeedback-start
++	@r=`${PWD_COMMAND}`; export r; \
++	s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \
++	TFLAGS="$(STAGEfeedback_TFLAGS)"; \
++	$(NORMAL_TARGET_EXPORTS) \
++	  \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(BASE_FLAGS_TO_PASS) \
++		CFLAGS="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS="$(LIBCFLAGS_FOR_TARGET)" \
++		CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)" \
++		CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)" \
++		LIBCFLAGS_FOR_TARGET="$(LIBCFLAGS_FOR_TARGET)" \
++		$(EXTRA_TARGET_FLAGS)   \
++		TFLAGS="$(STAGEfeedback_TFLAGS)" \
++		$(TARGET-stagefeedback-target-libatomic)
++
++maybe-clean-stagefeedback-target-libatomic: clean-stagefeedback-target-libatomic
++clean-stagefeedback: clean-stagefeedback-target-libatomic
++clean-stagefeedback-target-libatomic:
++	@if [ $(current_stage) = stagefeedback ]; then \
++	  [ -f $(TARGET_SUBDIR)/libatomic/Makefile ] || exit 0; \
++	else \
++	  [ -f $(TARGET_SUBDIR)/stagefeedback-libatomic/Makefile ] || exit 0; \
++	  $(MAKE) stagefeedback-start; \
++	fi; \
++	cd $(TARGET_SUBDIR)/libatomic && \
++	$(MAKE) $(EXTRA_TARGET_FLAGS)   clean
++@endif target-libatomic-bootstrap
++
++
++
++
++
++
+ .PHONY: check-target-libatomic maybe-check-target-libatomic
+ maybe-check-target-libatomic:
+ @if target-libatomic
+@@ -49508,7 +50030,12 @@
+ configure-stageprofile-target-libgomp: maybe-all-stageprofile-gcc
+ configure-stagefeedback-target-libgomp: maybe-all-stagefeedback-gcc
+ configure-target-libitm: stage_last
+-configure-target-libatomic: stage_last
++configure-stage1-target-libatomic: maybe-all-stage1-gcc
++configure-stage2-target-libatomic: maybe-all-stage2-gcc
++configure-stage3-target-libatomic: maybe-all-stage3-gcc
++configure-stage4-target-libatomic: maybe-all-stage4-gcc
++configure-stageprofile-target-libatomic: maybe-all-stageprofile-gcc
++configure-stagefeedback-target-libatomic: maybe-all-stagefeedback-gcc
+ @endif gcc-bootstrap
+ 
+ @if gcc-no-bootstrap
+@@ -50328,6 +50855,14 @@
+ all-target-libjava: maybe-all-target-libffi
+ configure-target-libobjc: maybe-configure-target-boehm-gc
+ all-target-libobjc: maybe-all-target-boehm-gc
++configure-target-libstdc++-v3: maybe-configure-target-libatomic
++
++configure-stage1-target-libstdc++-v3: maybe-configure-stage1-target-libatomic
++configure-stage2-target-libstdc++-v3: maybe-configure-stage2-target-libatomic
++configure-stage3-target-libstdc++-v3: maybe-configure-stage3-target-libatomic
++configure-stage4-target-libstdc++-v3: maybe-configure-stage4-target-libatomic
++configure-stageprofile-target-libstdc++-v3: maybe-configure-stageprofile-target-libatomic
++configure-stagefeedback-target-libstdc++-v3: maybe-configure-stagefeedback-target-libatomic
+ configure-target-libstdc++-v3: maybe-configure-target-libgomp
+ 
+ configure-stage1-target-libstdc++-v3: maybe-configure-stage1-target-libgomp
+@@ -50377,6 +50912,9 @@
+ install-target-libitm: maybe-install-target-libgcc
+ install-target-libobjc: maybe-install-target-libgcc
+ install-target-libstdc++-v3: maybe-install-target-libgcc
++install-target-libstdc++-v3: maybe-install-target-libatomic
++install-target-libcc1: maybe-install-target-libstdc++-v3
++install-target-libcc1: maybe-install-target-libatomic
+ all-target-libgloss: maybe-all-target-newlib
+ all-target-winsup: maybe-all-target-libtermcap
+ configure-target-newlib: maybe-all-binutils
+@@ -50420,6 +50958,12 @@
+ configure-stage4-target-libgomp: maybe-all-stage4-target-libgcc
+ configure-stageprofile-target-libgomp: maybe-all-stageprofile-target-libgcc
+ configure-stagefeedback-target-libgomp: maybe-all-stagefeedback-target-libgcc
++configure-stage1-target-libatomic: maybe-all-stage1-target-libgcc
++configure-stage2-target-libatomic: maybe-all-stage2-target-libgcc
++configure-stage3-target-libatomic: maybe-all-stage3-target-libgcc
++configure-stage4-target-libatomic: maybe-all-stage4-target-libgcc
++configure-stageprofile-target-libatomic: maybe-all-stageprofile-target-libgcc
++configure-stagefeedback-target-libatomic: maybe-all-stagefeedback-target-libgcc
+ @endif gcc-bootstrap
+ 
+ @if gcc-no-bootstrap
--- gcc-5-5.4.0.orig/debian/patches/pr66368.diff
+++ gcc-5-5.4.0/debian/patches/pr66368.diff
@@ -0,0 +1,26 @@
+# DP: PR go/66368, build libgo with -fno-stack-protector
+
+Index: b/src/libgo/Makefile.am
+===================================================================
+--- a/src/libgo/Makefile.am
++++ b/src/libgo/Makefile.am
+@@ -42,6 +42,7 @@ AM_CPPFLAGS = -I $(srcdir)/runtime $(LIB
+ ACLOCAL_AMFLAGS = -I ./config -I ../config
+ 
+ AM_CFLAGS = -fexceptions -fnon-call-exceptions -fplan9-extensions \
++	-fno-stack-protector \
+ 	$(SPLIT_STACK) $(WARN_CFLAGS) \
+ 	$(STRINGOPS_FLAG) $(OSCFLAGS) \
+ 	-I $(srcdir)/../libgcc -I $(srcdir)/../libbacktrace \
+Index: b/src/libgo/Makefile.in
+===================================================================
+--- a/src/libgo/Makefile.in
++++ b/src/libgo/Makefile.in
+@@ -506,6 +506,7 @@ WARN_CFLAGS = $(WARN_FLAGS) $(WERROR)
+ AM_CPPFLAGS = -I $(srcdir)/runtime $(LIBFFIINCS) $(PTHREAD_CFLAGS)
+ ACLOCAL_AMFLAGS = -I ./config -I ../config
+ AM_CFLAGS = -fexceptions -fnon-call-exceptions -fplan9-extensions \
++	-fno-stack-protector \
+ 	$(SPLIT_STACK) $(WARN_CFLAGS) \
+ 	$(STRINGOPS_FLAG) $(OSCFLAGS) \
+ 	-I $(srcdir)/../libgcc -I $(srcdir)/../libbacktrace \
--- gcc-5-5.4.0.orig/debian/patches/pr66904.diff
+++ gcc-5-5.4.0/debian/patches/pr66904.diff
@@ -0,0 +1,141 @@
+# DP: PR go/66904, pass linker flags from "#cgo pkg-config:" directives.
+
+commit 6209b6e6b849b6d913be74253e0e972de01d4785
+Author: Michael Hudson-Doyle <michael.hudson@canonical.com>
+Date:   Thu Jan 21 14:53:55 2016 +1300
+
+    cmd/go: fix "#cgo pkg-config:" comments with gccgo
+    
+    DO NOT SUBMIT
+    
+    This is too late for Go 1.6 but we'd like to get a fix into Ubuntu (as a distro
+    patch) so a review would be appreciated.
+    
+    The unique difficulty of #cgo pkg-config is that the linker flags are recorded
+    when the package is compiled but (obviously) must be used when the package is
+    linked into an executable -- so the flags need to be stored on disk somewhere.
+    As it happens cgo already writes out a _cgo_flags file: nothing uses it
+    currently, but this change adds it to the lib$pkg.a file when compiling a
+    package, reads it out when linking (and passes a version of the .a file with
+    _cgo_flags stripped out of it to the linker). It's all fairly ugly but it works
+    and I can't really think of any way of reducing the essential level of
+    ugliness.
+    
+    Fixes #11739
+    
+    Change-Id: I35621878014e1e107eda77a5b0b23d0240ec5750
+
+--- a/src/libgo/go/cmd/go/build.go
++++ a/src/libgo/go/cmd/go/build.go
+@@ -887,6 +887,9 @@ func (b *builder) build(a *action) (err error) {
+ 		if err != nil {
+ 			return err
+ 		}
++		if _, ok := buildToolchain.(gccgoToolchain); ok {
++			cgoObjects = append(cgoObjects, filepath.Join(a.objdir, "_cgo_flags"))
++		}
+ 		cgoObjects = append(cgoObjects, outObj...)
+ 		gofiles = append(gofiles, outGo...)
+ 	}
+@@ -1928,6 +1931,57 @@ func (tools gccgoToolchain) ld(b *builder, p *Package, out string, allactions []
+ 	cxx := len(p.CXXFiles) > 0
+ 	objc := len(p.MFiles) > 0
+ 
++	readCgoFlags := func(flagsFile string) error {
++		flags, err := ioutil.ReadFile(flagsFile)
++		if err != nil {
++			return err
++		}
++		for _, line := range strings.Split(string(flags), "\n") {
++			if strings.HasPrefix(line, "_CGO_LDFLAGS=") {
++				cgoldflags = append(cgoldflags, strings.Fields(line[13:])...)
++			}
++		}
++		return nil
++	}
++
++	readAndRemoveCgoFlags := func(archive string) (string, error) {
++		newa, err := ioutil.TempFile(b.work, filepath.Base(archive))
++		if err != nil {
++			return "", err
++		}
++		olda, err := os.Open(archive)
++		if err != nil {
++			return "", err
++		}
++		_, err = io.Copy(newa, olda)
++		if err != nil {
++			return "", err
++		}
++		err = olda.Close()
++		if err != nil {
++			return "", err
++		}
++		err = newa.Close()
++		if err != nil {
++			return "", err
++		}
++
++		newarchive := newa.Name()
++		err = b.run(b.work, p.ImportPath, nil, "ar", "x", newarchive, "_cgo_flags")
++		if err != nil {
++			return "", err
++		}
++		err = b.run(".", p.ImportPath, nil, "ar", "d", newarchive, "_cgo_flags")
++		if err != nil {
++			return "", err
++		}
++		err = readCgoFlags(filepath.Join(b.work, "_cgo_flags"))
++		if err != nil {
++			return "", err
++		}
++		return newarchive, nil
++	}
++
+ 	// Prefer the output of an install action to the output of a build action,
+ 	// because the install action will delete the output of the build action.
+ 	// Iterate over the list backward (reverse dependency order) so that we
+@@ -1937,16 +1991,24 @@ func (tools gccgoToolchain) ld(b *builder, p *Package, out string, allactions []
+ 		if !a.p.Standard {
+ 			if a.p != nil && !apackagesSeen[a.p] {
+ 				apackagesSeen[a.p] = true
++				target := a.target
++				if len(a.p.CgoFiles) > 0 {
++					var err error
++					target, err = readAndRemoveCgoFlags(target)
++					if err != nil {
++						return err
++					}
++				}
+ 				if a.p.fake && a.p.external {
+ 					// external _tests, if present must come before
+ 					// internal _tests. Store these on a seperate list
+ 					// and place them at the head after this loop.
+-					xfiles = append(xfiles, a.target)
++					xfiles = append(xfiles, target)
+ 				} else if a.p.fake {
+ 					// move _test files to the top of the link order
+-					afiles = append([]string{a.target}, afiles...)
++					afiles = append([]string{target}, afiles...)
+ 				} else {
+-					afiles = append(afiles, a.target)
++					afiles = append(afiles, target)
+ 				}
+ 			}
+ 		}
+@@ -1970,6 +2032,15 @@ func (tools gccgoToolchain) ld(b *builder, p *Package, out string, allactions []
+ 			}
+ 		}
+ 	}
++
++	for i, o := range ofiles {
++		if filepath.Base(o) == "_cgo_flags" {
++			readCgoFlags(o)
++			ofiles = append(ofiles[:i], ofiles[i+1:]...)
++			break
++		}
++	}
++
+ 	ldflags = append(ldflags, afiles...)
+ 	ldflags = append(ldflags, cgoldflags...)
+ 	ldflags = append(ldflags, envList("CGO_LDFLAGS", "")...)
--- gcc-5-5.4.0.orig/debian/patches/pr67508.diff
+++ gcc-5-5.4.0/debian/patches/pr67508.diff
@@ -0,0 +1,107 @@
+# DP: libgo: Fix PR go/67508, rewrite lfstack packing/unpacking
+# DP: to look more like that in Go
+
+From 95eb3733500feffc2eeeec5bcfac7e34583514e2 Mon Sep 17 00:00:00 2001
+From: Michael Hudson-Doyle <michael.hudson@canonical.com>
+Date: Fri, 31 Jul 2015 11:45:45 +1200
+Subject: [PATCH] runtime: rewrite lfstack packing/unpacking to look more like that in Go
+
+Change-Id: I4ca61240c3f69c6dce1fde8d859f8507dfab80fc
+---
+
+diff --git a/libgo/runtime/lfstack.goc b/libgo/runtime/lfstack.goc
+index 060a0cc..9eb80d9 100644
+--- a/src/libgo/runtime/lfstack.goc
++++ b/src/libgo/runtime/lfstack.goc
+@@ -9,25 +9,41 @@
+ #include "arch.h"
+ 
+ #if __SIZEOF_POINTER__ == 8
+-// Amd64 uses 48-bit virtual addresses, 47-th bit is used as kernel/user flag.
+-// So we use 17msb of pointers as ABA counter.
+-# define PTR_BITS 47
+-#else
+-# define PTR_BITS 32
+-#endif
+-#define PTR_MASK ((1ull<<PTR_BITS)-1)
+-#define CNT_MASK (0ull-1)
+-
+-#if __SIZEOF_POINTER__ == 8 && (defined(__sparc__) || (defined(__sun__) && defined(__amd64__)))
+ // SPARC64 and Solaris on AMD64 uses all 64 bits of virtual addresses.
+ // Use low-order three bits as ABA counter.
+ // http://docs.oracle.com/cd/E19120-01/open.solaris/816-5138/6mba6ua5p/index.html
+-#undef PTR_BITS
+-#undef CNT_MASK
+-#undef PTR_MASK
+-#define PTR_BITS 0
+-#define CNT_MASK 7
+-#define PTR_MASK ((0ull-1)<<3)
++# if defined(__sparc__) || (defined(__sun__) && defined(__amd64__))
++static inline uint64 lfPack(LFNode *node, uintptr cnt) {
++	return ((uint64)(node)) | ((cnt)&7);
++}
++static inline LFNode* lfUnpack(uint64 val) {
++	return (LFNode*)(val&~7);
++}
++# else
++#  if defined(__aarch64__)
++// Depending on the kernel options, pointers on arm64 can have up to 48 significant
++// bits (see https://www.kernel.org/doc/Documentation/arm64/memory.txt).
++#   define PTR_BITS 48
++#  else
++// Amd64 uses 48-bit virtual addresses, 47-th bit is used as kernel/user flag.
++// So we use 17msb of pointers as ABA counter.
++#   define PTR_BITS 47
++#  endif
++# define CNT_BITS (64 - PTR_BITS + 3)
++static inline uint64 lfPack(LFNode *node, uintptr cnt) {
++	return ((uint64)(node)<<(64-PTR_BITS)) | (cnt&(((1<<CNT_BITS)-1)));
++}
++static inline LFNode* lfUnpack(uint64 val) {
++	return (LFNode*)((val >> CNT_BITS) << 3);
++}
++# endif
++#else
++static inline uint64 lfPack(LFNode *node, uintptr cnt) {
++	return ((uint64)(uintptr)(node)<<32) | cnt;
++}
++static inline LFNode* lfUnpack(uint64 val) {
++	return (LFNode*)(uintptr)(val >> 32);
++}
+ #endif
+ 
+ void
+@@ -35,16 +51,16 @@
+ {
+ 	uint64 old, new;
+ 
+-	if((uintptr)node != ((uintptr)node&PTR_MASK)) {
++	if(node != lfUnpack(lfPack(node, 0))) {
+ 		runtime_printf("p=%p\n", node);
+ 		runtime_throw("runtime_lfstackpush: invalid pointer");
+ 	}
+ 
+ 	node->pushcnt++;
+-	new = (uint64)(uintptr)node|(((uint64)node->pushcnt&CNT_MASK)<<PTR_BITS);
++	new = lfPack(node, node->pushcnt);
+ 	for(;;) {
+ 		old = runtime_atomicload64(head);
+-		node->next = (LFNode*)(uintptr)(old&PTR_MASK);
++		node->next = lfUnpack(old);
+ 		if(runtime_cas64(head, old, new))
+ 			break;
+ 	}
+@@ -60,11 +76,11 @@
+ 		old = runtime_atomicload64(head);
+ 		if(old == 0)
+ 			return nil;
+-		node = (LFNode*)(uintptr)(old&PTR_MASK);
++		node = lfUnpack(old);
+ 		node2 = runtime_atomicloadp(&node->next);
+ 		new = 0;
+ 		if(node2 != nil)
+-			new = (uint64)(uintptr)node2|(((uint64)node2->pushcnt&CNT_MASK)<<PTR_BITS);
++			new = lfPack(node2, node2->pushcnt);
+ 		if(runtime_cas64(head, old, new))
+ 			return node;
+ 	}
--- gcc-5-5.4.0.orig/debian/patches/pr67590.diff
+++ gcc-5-5.4.0/debian/patches/pr67590.diff
@@ -0,0 +1,38 @@
+# DP: Fix PR67590, setting objdump macro.
+
+Index: gcc-5-5.2.1/src/libcc1/configure.ac
+===================================================================
+--- gcc-5-5.2.1.orig/src/libcc1/configure.ac
++++ gcc-5-5.2.1/src/libcc1/configure.ac
+@@ -63,6 +63,31 @@ if test "$GXX" = yes; then
+ fi
+ AC_SUBST(libsuffix)
+ 
++# Figure out what objdump we will be using.
++AS_VAR_SET_IF(gcc_cv_objdump,, [
++if test -f $gcc_cv_binutils_srcdir/configure.in \
++     && test -f ../binutils/Makefile \
++     && test x$build = x$host; then
++	# Single tree build which includes binutils.
++	gcc_cv_objdump=../binutils/objdump$build_exeext
++elif test -x objdump$build_exeext; then
++	gcc_cv_objdump=./objdump$build_exeext
++elif ( set dummy $OBJDUMP_FOR_TARGET; test -x $[2] ); then
++        gcc_cv_objdump="$OBJDUMP_FOR_TARGET"
++else
++        AC_PATH_PROG(gcc_cv_objdump, $OBJDUMP_FOR_TARGET)
++fi])
++
++AC_MSG_CHECKING(what objdump to use)
++if test "$gcc_cv_objdump" = ../binutils/objdump$build_exeext; then
++	# Single tree build which includes binutils.
++	AC_MSG_RESULT(newly built objdump)
++elif test x$gcc_cv_objdump = x; then
++	AC_MSG_RESULT(not found)
++else
++	AC_MSG_RESULT($gcc_cv_objdump)
++fi
++
+ dnl Test for -lsocket and -lnsl.  Copied from libgo/configure.ac.
+ AC_CACHE_CHECK([for socket libraries], libcc1_cv_lib_sockets,
+   [libcc1_cv_lib_sockets=
--- gcc-5-5.4.0.orig/debian/patches/pr67899.diff
+++ gcc-5-5.4.0/debian/patches/pr67899.diff
@@ -0,0 +1,31 @@
+# DP: Proposed patch for PR sanitizer/67899
+
+--- a/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
++++ b/src/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -564,13 +564,12 @@
+ #else
+     __sanitizer_sigset_t sa_mask;
+ #ifndef __mips__
+-#if defined(__sparc__)
+-    unsigned long sa_flags;
+-#else
++#if defined(__sparc__) && defined(__arch64__)
++    int __pad;
++#endif
+     int sa_flags;
+ #endif
+ #endif
+-#endif
+ #if SANITIZER_LINUX
+     void (*sa_restorer)();
+ #endif
+@@ -593,7 +592,8 @@
+       void (*handler)(int signo);
+       void (*sigaction)(int signo, void *info, void *ctx);
+     };
+-    unsigned long sa_flags;
++    int __pad;
++    int sa_flags;
+     void (*sa_restorer)(void);
+     __sanitizer_kernel_sigset_t sa_mask;
+   };
--- gcc-5-5.4.0.orig/debian/patches/pr68273-proposed.diff
+++ gcc-5-5.4.0/debian/patches/pr68273-proposed.diff
@@ -0,0 +1,50 @@
+Richard Biener 2016-02-15 10:05:13 UTC
+
+eipa_sra introduces the remaining SSA name with non-default alignment via
+
+#0  make_ssa_name_fn (fn=0x7ffff68bb5e8, 
+    var=<parm_decl 0x7ffff69bc700 ISRA.81>, stmt=<gimple_nop 0x7ffff68bcf50>)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-ssanames.c:311
+#1  0x0000000000e203d1 in get_or_create_ssa_default_def (fn=0x7ffff68bb5e8, 
+    var=<parm_decl 0x7ffff69bc700 ISRA.81>)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-dfa.c:360
+#2  0x0000000000e6638e in get_reaching_def (
+    var=<parm_decl 0x7ffff69bc700 ISRA.81>)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-into-ssa.c:1168
+#3  0x0000000000e67855 in maybe_replace_use (use_p=0x7ffff6a17810)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-into-ssa.c:1753
+#4  0x0000000000e67eb9 in rewrite_update_stmt (
+    stmt=<gimple_assign 0x7ffff6966f50>, gsi=...)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-into-ssa.c:1950
+#5  0x0000000000e685f4 in rewrite_update_dom_walker::before_dom_children (
+    this=0x7fffffffd580, bb=<basic_block 0x7ffff6491f08 (2)>)
+    at /space/rguenther/src/svn/trunk3/gcc/tree-into-ssa.c:2130
+#6  0x00000000013e0993 in dom_walker::walk (this=0x7fffffffd580, 
+    bb=<basic_block 0x7ffff6491f08 (2)>)
+    at /space/rguenther/src/svn/trunk3/gcc/domwalk.c:265
+
+thus SSA rewrite.  ISRA.81 is a PARM_DECL built in ipa_modify_formal_parameters
+from an access present in the IL created by early SRA.
+
+Index: gcc-5-5.3.1/src/gcc/tree-sra.c
+===================================================================
+--- gcc-5-5.3.1.orig/src/gcc/tree-sra.c
++++ gcc-5-5.3.1/src/gcc/tree-sra.c
+@@ -936,7 +936,7 @@ create_access (tree expr, gimple stmt, b
+
+   access = create_access_1 (base, offset, size);
+   access->expr = expr;
+-  access->type = TREE_TYPE (expr);
++  access->type = TYPE_MAIN_VARIANT (TREE_TYPE (expr));
+   access->write = write;
+   access->grp_unscalarizable_region = unscalarizable_region;
+   access->stmt = stmt;
+@@ -1026,7 +1026,7 @@ completely_scalarize_var (tree var)
+
+   access = create_access_1 (var, 0, size);
+   access->expr = var;
+-  access->type = TREE_TYPE (var);
++  access->type = TYPE_MAIN_VARIANT (TREE_TYPE (var));
+   access->grp_total_scalarization = 1;
+
+   completely_scalarize_record (var, var, 0, var);
--- gcc-5-5.4.0.orig/debian/patches/pr68273.diff
+++ gcc-5-5.4.0/debian/patches/pr68273.diff
@@ -0,0 +1,104 @@
+2016-02-08  Richard Biener  <rguenther@suse.de>
+	Jeff Law  <law@redhat.com>
+
+	PR target/68273
+	* tree-ssanames.c (make_ssa_name_fn): Always use unqualified
+	types for anonymous SSA names.
+
+Index: b/src/gcc/testsuite/gcc.target/mips/pr68273.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/mips/pr68273.c
+@@ -0,0 +1,79 @@
++/* { dg-do compile } */
++/* { dg-options "-w -fdump-rtl-expand" } */
++/* { dg-skip-if "" { *-*-* }  { } { "-O2" } } */
++
++extern char errbuf[];
++typedef struct Symbol
++{
++  char *name;
++}
++Symbol;
++typedef struct Tnode
++{
++}
++Tnode;
++typedef union Value
++{
++  long long i;
++}
++Value;
++typedef struct Entry
++{
++}
++Entry;
++typedef struct Table
++{
++}
++Table;
++typedef struct Node
++{
++  Tnode *typ;
++  int sto;
++  Value val;
++}
++Node;
++struct Scope
++{
++  Table *table;
++} *sp;
++static Node op (Node);
++Entry *p, *q;
++union YYSTYPE
++{
++  Symbol *sym;
++  Node rec;
++};
++typedef union YYSTYPE YYSTYPE;
++typedef short int yytype_int16;
++
++int
++yyparse (void)
++{
++  YYSTYPE yyval;
++  int yyn;
++  YYSTYPE *yyvsp;
++  while (1)
++    {
++      if (yyn == 34)
++	{
++	  if ((yyvsp[-1].rec).sto & 0x10)
++	    sprintf (errbuf, "invalid typedef qualifier for '%s'",
++		     (yyvsp[0].sym)->name);
++	  p = enter (sp->table, (yyvsp[0].sym));
++	}
++      else
++	op ((yyvsp[0].rec));
++      *++yyvsp = yyval;
++    }
++}
++
++static Node
++op (Node q)
++{
++  integer (q.typ);
++  mgtype (q.typ);
++}
++
++
++/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 5 \\\$5\\\)" 2 "expand" } }  */
++/* { dg-final { scan-rtl-dump-times "\\\(set \\\(reg:SI 6 \\\$6\\\)" 1 "expand" } }  */
+Index: b/src/gcc/tree-ssanames.c
+===================================================================
+--- a/src/gcc/tree-ssanames.c
++++ b/src/gcc/tree-ssanames.c
+@@ -173,7 +173,7 @@ make_ssa_name_fn (struct function *fn, t
+ 
+   if (TYPE_P (var))
+     {
+-      TREE_TYPE (t) = var;
++      TREE_TYPE (t) = TYPE_MAIN_VARIANT (var);
+       SET_SSA_NAME_VAR_OR_IDENTIFIER (t, NULL_TREE);
+     }
+   else
--- gcc-5-5.4.0.orig/debian/patches/pr69144.diff
+++ gcc-5-5.4.0/debian/patches/pr69144.diff
@@ -0,0 +1,351 @@
+gcc/jit/
+
+2016-01-19  David Malcolm  <dmalcolm@redhat.com>
+
+	PR jit/69144
+	* jit-playback.c (gcc::jit::playback::compile_to_file::postprocess):
+	Potentially add the temporary artifact to the tempdir's list of
+	tempfiles needing additional cleanup.
+	(gcc::jit::playback::context::extract_any_requested_dumps): Likewise
+	for the dumpfile.
+	* jit-tempdir.c (gcc::jit::tempdir::~tempdir): Clean up additional
+	tempfiles.
+	* jit-tempdir.h (gcc::jit::tempdir::add_temp_file): New method.
+	(gcc::jit::tempdir::m_tempfiles): New field.
+	* docs/cp/intro/tutorial04.rst: Update for changes to toyvm.cc.
+	* docs/examples/tut04-toyvm/toyvm.cc (class compilation_result):
+	New.
+	(toyvm_function::compile): Change return type from function ptr
+	to a compilation_result.
+	(toyvm_function::get_function_name): New accessor.
+	(toyvm_function::m_funcname): New field.
+	(get_function_name): Convert to...
+	(toyvm_function::make_function_name): ...this new method.
+	(toyvm_function::parse): Call make_function_name.
+	(toyvm_function::compile): Convert return type from function ptr
+	to a compilation_result.  Use get_function_name.
+	(compilation_state::compile): Convert return type from
+	gcc_jit_result * to a compilation_result.
+	(test_script): Update for above changes, extracting the code from
+	the compilation_result.
+	(main): Likewise.
+
+ 
+Index: b/src/gcc/jit/docs/cp/intro/tutorial04.rst
+===================================================================
+--- a/src/gcc/jit/docs/cp/intro/tutorial04.rst
++++ b/src/gcc/jit/docs/cp/intro/tutorial04.rst
+@@ -297,15 +297,14 @@ Compiling the context
+ Having finished looping over the blocks and populating them with
+ statements, the context is complete.
+ 
+-We can now compile it, and extract machine code from the result:
++We can now compile it, extract machine code from the result, and
++run it:
+ 
+    .. literalinclude:: ../../examples/tut04-toyvm/toyvm.cc
+-    :start-after: /* We've now finished populating the context.  Compile it.  */
+-    :end-before: /* (this leaks "result" and "funcname") */
++    :start-after: /* Wrapper around a gcc_jit_result *.  */
++    :end-before: /* Functions are compiled to this function ptr type.  */
+     :language: c++
+ 
+-We can now run the result:
+-
+    .. literalinclude:: ../../examples/tut04-toyvm/toyvm.cc
+     :start-after: /* JIT-compilation.  */
+     :end-before: return 0;
+Index: b/src/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
+===================================================================
+--- a/src/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
++++ b/src/gcc/jit/docs/examples/tut04-toyvm/toyvm.cc
+@@ -28,6 +28,29 @@ along with GCC; see the file COPYING3.
+ 
+ #include <libgccjit++.h>
+ 
++/* Wrapper around a gcc_jit_result *.  */
++
++class compilation_result
++{
++public:
++  compilation_result (gcc_jit_result *result) :
++    m_result (result)
++  {
++  }
++  ~compilation_result ()
++  {
++    gcc_jit_result_release (m_result);
++  }
++
++  void *get_code (const char *funcname)
++  {
++    return gcc_jit_result_get_code (m_result, funcname);
++  }
++
++private:
++  gcc_jit_result *m_result;
++};
++
+ /* Functions are compiled to this function ptr type.  */
+ typedef int (*toyvm_compiled_func) (int);
+ 
+@@ -100,11 +123,19 @@ public:
+   int
+   interpret (int arg, FILE *trace);
+ 
+-  toyvm_compiled_func
++  compilation_result
+   compile ();
+ 
++  const char *
++  get_function_name () const { return m_funcname; }
++
++private:
++  void
++  make_function_name (const char *filename);
++
+ private:
+   const char *fn_filename;
++  char       *m_funcname;
+   int         fn_num_ops;
+   toyvm_op    fn_ops[MAX_OPS];
+   friend struct compilation_state;
+@@ -149,8 +180,8 @@ toyvm_function::add_unary_op (enum opcod
+   add_op (opcode, operand, linenum);
+ }
+ 
+-static char *
+-get_function_name (const char *filename)
++void
++toyvm_function::make_function_name (const char *filename)
+ {
+   /* Skip any path separators.  */
+   const char *pathsep = strrchr (filename, '/');
+@@ -158,14 +189,12 @@ get_function_name (const char *filename)
+     filename = pathsep + 1;
+ 
+   /* Copy filename to funcname.  */
+-  char *funcname = (char *)malloc (strlen (filename) + 1);
++  m_funcname = (char *)malloc (strlen (filename) + 1);
+ 
+-  strcpy (funcname, filename);
++  strcpy (m_funcname, filename);
+ 
+   /* Convert "." to NIL terminator.  */
+-  *(strchr (funcname, '.')) = '\0';
+-
+-  return funcname;
++  *(strchr (m_funcname, '.')) = '\0';
+ }
+ 
+ toyvm_function *
+@@ -197,6 +226,7 @@ toyvm_function::parse (const char *filen
+       goto error;
+     }
+   fn->fn_filename = filename;
++  fn->make_function_name (filename);
+ 
+   /* Read the lines of the file.  */
+   while ((linelen = getline (&line, &bufsize, f)) != -1)
+@@ -420,7 +450,7 @@ public:
+   void create_types ();
+   void create_locations ();
+   void create_function (const char *funcname);
+-  gcc_jit_result *compile ();
++  compilation_result compile ();
+ 
+ private:
+   void
+@@ -462,24 +492,18 @@ private:
+ 
+ /* The main compilation hook.  */
+ 
+-toyvm_compiled_func
++compilation_result
+ toyvm_function::compile ()
+ {
+   compilation_state state (*this);
+-  char *funcname;
+-
+-  funcname = get_function_name (fn_filename);
+ 
+   state.create_context ();
+   state.create_types ();
+   state.create_locations ();
+-  state.create_function (funcname);
++  state.create_function (get_function_name ());
+ 
+   /* We've now finished populating the context.  Compile it.  */
+-  gcc_jit_result *result = state.compile ();
+-
+-  return (toyvm_compiled_func)gcc_jit_result_get_code (result, funcname);
+-  /* (this leaks "result" and "funcname") */
++  return state.compile ();
+ }
+ 
+ /* Stack manipulation.  */
+@@ -767,7 +791,7 @@ compilation_state::create_function (cons
+     } /* end of loop on PC locations.  */
+ }
+ 
+-gcc_jit_result *
++compilation_result
+ compilation_state::compile ()
+ {
+   return ctxt.compile ();
+@@ -825,7 +849,10 @@ test_script (const char *scripts_dir, co
+   interpreted_result = fn->interpret (input, NULL);
+   CHECK_VALUE (interpreted_result, expected_result);
+ 
+-  code = fn->compile ();
++  compilation_result compiler_result = fn->compile ();
++
++  const char *funcname = fn->get_function_name ();
++  code = (toyvm_compiled_func)compiler_result.get_code (funcname);
+   CHECK_NON_NULL (code);
+ 
+   compiled_result = code (input);
+@@ -894,7 +921,12 @@ main (int argc, char **argv)
+ 	  fn->interpret (atoi (argv[2]), NULL));
+ 
+   /* JIT-compilation.  */
+-  toyvm_compiled_func code = fn->compile ();
++  compilation_result compiler_result = fn->compile ();
++
++  const char *funcname = fn->get_function_name ();
++  toyvm_compiled_func code
++    = (toyvm_compiled_func)compiler_result.get_code (funcname);
++
+   printf ("compiler result: %d\n",
+ 	  code (atoi (argv[2])));
+ 
+Index: b/src/gcc/jit/jit-playback.c
+===================================================================
+--- a/src/gcc/jit/jit-playback.c
++++ b/src/gcc/jit/jit-playback.c
+@@ -1954,6 +1954,7 @@ playback::compile_to_file::postprocess (
+     case GCC_JIT_OUTPUT_KIND_ASSEMBLER:
+       copy_file (get_tempdir ()->get_path_s_file (),
+ 		 m_output_path);
++      /* The .s file is automatically unlinked by tempdir::~tempdir.  */
+       break;
+ 
+     case GCC_JIT_OUTPUT_KIND_OBJECT_FILE:
+@@ -1968,9 +1969,13 @@ playback::compile_to_file::postprocess (
+ 		       false, /* bool shared, */
+ 		       false);/* bool run_linker */
+ 	if (!errors_occurred ())
+-	  copy_file (tmp_o_path,
+-		     m_output_path);
+-	free (tmp_o_path);
++	  {
++	    copy_file (tmp_o_path,
++		       m_output_path);
++	    get_tempdir ()->add_temp_file (tmp_o_path);
++	  }
++	else
++	  free (tmp_o_path);
+       }
+       break;
+ 
+@@ -1984,6 +1989,7 @@ playback::compile_to_file::postprocess (
+       if (!errors_occurred ())
+ 	copy_file (get_tempdir ()->get_path_so_file (),
+ 		   m_output_path);
++      /* The .so file is automatically unlinked by tempdir::~tempdir.  */
+       break;
+ 
+     case GCC_JIT_OUTPUT_KIND_EXECUTABLE:
+@@ -1998,9 +2004,13 @@ playback::compile_to_file::postprocess (
+ 		       false, /* bool shared, */
+ 		       true);/* bool run_linker */
+ 	if (!errors_occurred ())
+-	  copy_file (tmp_exe_path,
+-		     m_output_path);
+-	free (tmp_exe_path);
++	  {
++	    copy_file (tmp_exe_path,
++		       m_output_path);
++	    get_tempdir ()->add_temp_file (tmp_exe_path);
++	  }
++	else
++	  free (tmp_exe_path);
+       }
+       break;
+ 
+@@ -2340,7 +2350,7 @@ extract_any_requested_dumps (vec <record
+       filename = g->get_dumps ()->get_dump_file_name (dfi);
+       content = read_dump_file (filename);
+       *(d->m_out_ptr) = content;
+-      free (filename);
++      m_tempdir->add_temp_file (filename);
+     }
+ }
+ 
+Index: b/src/gcc/jit/jit-tempdir.c
+===================================================================
+--- a/src/gcc/jit/jit-tempdir.c
++++ b/src/gcc/jit/jit-tempdir.c
+@@ -121,7 +121,7 @@ gcc::jit::tempdir::~tempdir ()
+     fprintf (stderr, "intermediate files written to %s\n", m_path_tempdir);
+   else
+     {
+-      /* Clean up .s/.so and tempdir. */
++      /* Clean up .s/.so.  */
+       if (m_path_s_file)
+ 	{
+ 	  log ("unlinking .s file: %s", m_path_s_file);
+@@ -132,6 +132,17 @@ gcc::jit::tempdir::~tempdir ()
+ 	  log ("unlinking .so file: %s", m_path_so_file);
+ 	  unlink (m_path_so_file);
+ 	}
++
++      /* Clean up any other tempfiles.  */
++      int i;
++      char *tempfile;
++      FOR_EACH_VEC_ELT (m_tempfiles, i, tempfile)
++	{
++	  log ("unlinking tempfile: %s", tempfile);
++	  unlink (tempfile);
++	}
++
++      /* The tempdir should now be empty; remove it.  */
+       if (m_path_tempdir)
+ 	{
+ 	  log ("removing tempdir: %s", m_path_tempdir);
+@@ -145,4 +156,9 @@ gcc::jit::tempdir::~tempdir ()
+   free (m_path_c_file);
+   free (m_path_s_file);
+   free (m_path_so_file);
++
++  int i;
++  char *tempfile;
++  FOR_EACH_VEC_ELT (m_tempfiles, i, tempfile)
++    free (tempfile);
+ }
+Index: b/src/gcc/jit/jit-tempdir.h
+===================================================================
+--- a/src/gcc/jit/jit-tempdir.h
++++ b/src/gcc/jit/jit-tempdir.h
+@@ -58,6 +58,10 @@ class tempdir : public log_user
+   const char * get_path_s_file () const { return m_path_s_file; }
+   const char * get_path_so_file () const { return m_path_so_file; }
+ 
++  /* Add PATH to the vec of tempfiles that must be unlinked.
++     Take ownership of the buffer PATH; it will be freed.  */
++  void add_temp_file (char *path) { m_tempfiles.safe_push (path); }
++
+  private:
+   /* Was GCC_JIT_BOOL_OPTION_KEEP_INTERMEDIATES set?  If so, keep the
+      on-disk tempdir around after this wrapper object goes away.  */
+@@ -74,6 +78,10 @@ class tempdir : public log_user
+   char *m_path_s_file;
+   char *m_path_so_file;
+ 
++  /* Other files within the tempdir to be cleaned up:
++     - certain ahead-of-time compilation artifacts (.o and .exe files)
++     - dumpfiles that were requested via gcc_jit_context_enable_dump.  */
++  auto_vec <char *> m_tempfiles;
+ };
+ 
+ } // namespace gcc::jit
--- gcc-5-5.4.0.orig/debian/patches/pr69148.diff
+++ gcc-5-5.4.0/debian/patches/pr69148.diff
@@ -0,0 +1,93 @@
+# DP: Fix PR target/69148 (s390x), taken from the trunk
+
+gcc/
+
+2016-02-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/69148
+	* lra-constraints.c (curr_insn_transform): Find in/out operands
+	for secondary memory moves.  Update dups.
+
+gcc/testsuite/
+
+2016-02-10  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR target/69468
+	* gcc.target/s390/pr69148.c: New.
+
+Index: b/src/cc/testsuite/gcc.target/s390/pr69148.c
+===================================================================
+--- /dev/null
++++ b/src/cc/testsuite/gcc.target/s390/pr69148.c
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O -march=z196 -m64 -w" } */
++union U { int r; float f; };
++struct A {
++  int a;
++    union U b[64];
++    };
++    double foo (double);
++
++void
++bar (struct A *z, int x)
++{
++  union U y;
++  y.f = foo (z->b[x].f);
++  z->a = y.r ? 4 : y.r;
++}
+Index: b/src/gcc/lra-constraints.c
+===================================================================
+--- a/src/gcc/lra-constraints.c
++++ b/src/gcc/lra-constraints.c
+@@ -3533,14 +3533,26 @@ curr_insn_transform (bool check_only_p)
+ 
+   if (use_sec_mem_p)
+     {
++      int in = -1, out = -1;
+       rtx new_reg, src, dest, rld;
+       machine_mode sec_mode, rld_mode;
+ 
+-      lra_assert (sec_mem_p);
+-      lra_assert (curr_static_id->operand[0].type == OP_OUT
+-		  && curr_static_id->operand[1].type == OP_IN);
+-      dest = *curr_id->operand_loc[0];
+-      src = *curr_id->operand_loc[1];
++      lra_assert (curr_insn_set != NULL_RTX && sec_mem_p);
++      dest = SET_DEST (curr_insn_set);
++      src = SET_SRC (curr_insn_set);
++      for (i = 0; i < n_operands; i++)
++	if (*curr_id->operand_loc[i] == dest)
++	  out = i;
++	else if (*curr_id->operand_loc[i] == src)
++	  in = i;
++      for (i = 0; i < curr_static_id->n_dups; i++)
++	if (out < 0 && *curr_id->dup_loc[i] == dest)
++	  out = curr_static_id->dup_num[i];
++	else if (in < 0 && *curr_id->dup_loc[i] == src)
++	  in = curr_static_id->dup_num[i];
++      lra_assert (out >= 0 && in >= 0
++		  && curr_static_id->operand[out].type == OP_OUT
++		  && curr_static_id->operand[in].type == OP_IN);
+       rld = (GET_MODE_SIZE (GET_MODE (dest)) <= GET_MODE_SIZE (GET_MODE (src))
+ 	     ? dest : src);
+       rld_mode = GET_MODE (rld);
+@@ -3573,14 +3585,16 @@ curr_insn_transform (bool check_only_p)
+ 	}
+       else if (dest == rld)
+         {
+-	  *curr_id->operand_loc[0] = new_reg;
++	  *curr_id->operand_loc[out] = new_reg;
++	  lra_update_dup (curr_id, out);
+ 	  after = emit_spill_move (false, new_reg, dest);
+ 	  lra_process_new_insns (curr_insn, NULL, after,
+ 				 "Inserting the sec. move");
+ 	}
+       else
+ 	{
+-	  *curr_id->operand_loc[1] = new_reg;
++	  *curr_id->operand_loc[in] = new_reg;
++	  lra_update_dup (curr_id, in);
+ 	  /* See comments above.  */
+ 	  push_to_sequence (before);
+ 	  before = emit_spill_move (true, new_reg, src);
--- gcc-5-5.4.0.orig/debian/patches/pr69176-2.diff
+++ gcc-5-5.4.0/debian/patches/pr69176-2.diff
@@ -0,0 +1,49 @@
+# DP: Backport dependency for PR target/69176 backport.
+
+2015-12-04  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* config/aarch64/aarch64.md (add<mode>3_pluslong): Add register
+	constraints.
+
+2015-12-04  James Greenhalgh  <james.greenhalgh@arm.com>
+
+	* gcc.c-torture/compile/20151204.c: New.
+ 
+ 
+--- a/src/gcc/testsuite/gcc.c-torture/compile/20151204.c
++++ b/src/gcc/testsuite/gcc.c-torture/compile/20151204.c
+@@ -0,0 +1,19 @@
++typedef __SIZE_TYPE__ size_t;
++
++int strcmp (const char*, const char*);
++void *memchr (const void *, int, size_t);
++char* strncpy (char *, const char *, size_t);
++
++int
++main (int argc, char** argv)
++{
++  char target[32753] = "A";
++  char buffer[32753];
++  char *x;
++  x = buffer;
++
++  if (strcmp (target, "A")
++      || memchr (target, 'A', 0) != ((void *) 0))
++    if (strncpy (x, "", 4) != x);
++  return 0;
++}
+--- a/src/gcc/config/aarch64/aarch64.md
++++ b/src/gcc/config/aarch64/aarch64.md
+@@ -1615,9 +1615,9 @@
+ 
+ (define_insn_and_split "*add<mode>3_pluslong"
+   [(set
+-    (match_operand:GPI 0 "register_operand" "")
+-    (plus:GPI (match_operand:GPI 1 "register_operand" "")
+-	      (match_operand:GPI 2 "aarch64_pluslong_operand" "")))]
++    (match_operand:GPI 0 "register_operand" "=r")
++    (plus:GPI (match_operand:GPI 1 "register_operand" "r")
++	      (match_operand:GPI 2 "aarch64_pluslong_immediate" "i")))]
+   "!aarch64_plus_operand (operands[2], VOIDmode)
+    && !aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)"
+   "#"
--- gcc-5-5.4.0.orig/debian/patches/pr69176.diff
+++ gcc-5-5.4.0/debian/patches/pr69176.diff
@@ -0,0 +1,239 @@
+# DP: Backport PR target/69176.
+
+2016-01-18  Richard Henderson  <rth@redhat.com>
+
+	PR target/69176
+	* config/aarch64/aarch64.md (add<GPI>3): Move long immediate
+	operands to pseudo only if CSE is expected.  Split long immediate
+	operands only after reload, and for the stack pointer.
+	(*add<GPI>3_pluslong): Remove.
+	(*addsi3_aarch64, *adddi3_aarch64): Merge into...
+	(*add<GPI>3_aarch64): ... here.  Add r/rk/Upl alternative.
+	(*addsi3_aarch64_uxtw): Add r/rk/Upl alternative.
+	(*add<GPI>3 peepholes): New.
+	(*add<GPI>3 splitters): New.
+	* config/aarch64/constraints.md (Upl): New.
+	* config/aarch64/predicates.md (aarch64_pluslong_strict_immedate): New.
+
+ 
+--- a/src/gcc/config/aarch64/predicates.md	(Revision 232539)
++++ a/src/gcc/config/aarch64/predicates.md	(Revision 232540)
+@@ -107,6 +107,10 @@
+   (and (match_code "const_int")
+        (match_test "(INTVAL (op) < 0xffffff && INTVAL (op) > -0xffffff)")))
+ 
++(define_predicate "aarch64_pluslong_strict_immedate"
++  (and (match_operand 0 "aarch64_pluslong_immediate")
++       (not (match_operand 0 "aarch64_plus_immediate"))))
++
+ (define_predicate "aarch64_pluslong_operand"
+   (ior (match_operand 0 "register_operand")
+        (match_operand 0 "aarch64_pluslong_immediate")))
+--- a/src/gcc/config/aarch64/aarch64.md	(Revision 232539)
++++ a/src/gcc/config/aarch64/aarch64.md	(Revision 232540)
+@@ -1590,98 +1590,122 @@
+     (plus:GPI (match_operand:GPI 1 "register_operand" "")
+ 	      (match_operand:GPI 2 "aarch64_pluslong_operand" "")))]
+   ""
+-  "
+-  if (!aarch64_plus_operand (operands[2], VOIDmode))
++{
++  if (aarch64_pluslong_strict_immedate (operands[2], <MODE>mode))
+     {
+-      if (can_create_pseudo_p ())
++      /* Give CSE the opportunity to share this constant across additions.  */
++      if (!cse_not_expected && can_create_pseudo_p ())
++        operands[2] = force_reg (<MODE>mode, operands[2]);
++
++      /* Split will refuse to operate on a modification to the stack pointer.
++	 Aid the prologue and epilogue expanders by splitting this now.  */
++      else if (reload_completed && operands[0] == stack_pointer_rtx)
+ 	{
+-	  rtx tmp = gen_reg_rtx (<MODE>mode);
+-	  emit_move_insn (tmp, operands[2]);
+-	  operands[2] = tmp;
+-	}
+-      else
+-	{
+-	  HOST_WIDE_INT imm = INTVAL (operands[2]);
+-	  imm = imm >= 0 ? imm & 0xfff : -(-imm & 0xfff);
+-	  emit_insn (gen_add<mode>3 (operands[0], operands[1],
+-				     GEN_INT (INTVAL (operands[2]) - imm)));
++	  HOST_WIDE_INT i = INTVAL (operands[2]);
++	  HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++	  emit_insn (gen_rtx_SET (VOIDmode, operands[0],
++				  gen_rtx_PLUS (<MODE>mode, operands[1],
++						GEN_INT (i - s))));
+ 	  operands[1] = operands[0];
+-	  operands[2] = GEN_INT (imm);
++	  operands[2] = GEN_INT (s);
+ 	}
+     }
+-  "
+-)
++})
+ 
+-;; Find add with a 2-instruction immediate and merge into 2 add instructions.
+-
+-(define_insn_and_split "*add<mode>3_pluslong"
++(define_insn "*add<mode>3_aarch64"
+   [(set
+-    (match_operand:GPI 0 "register_operand" "=r")
+-    (plus:GPI (match_operand:GPI 1 "register_operand" "r")
+-	      (match_operand:GPI 2 "aarch64_pluslong_immediate" "i")))]
+-  "!aarch64_plus_operand (operands[2], VOIDmode)
+-   && !aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)"
+-  "#"
+-  "&& true"
+-  [(set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3)))
+-   (set (match_dup 0) (plus:GPI (match_dup 0) (match_dup 4)))]
+-  "
+-    {
+-      HOST_WIDE_INT imm = INTVAL (operands[2]);
+-      imm = imm >= 0 ? imm & 0xfff : -(-imm & 0xfff);
+-      operands[3] = GEN_INT (INTVAL (operands[2]) - imm);
+-      operands[4] = GEN_INT (imm);
+-    }
+-  "
+-)
+-
+-(define_insn "*addsi3_aarch64"
+-  [(set
+-    (match_operand:SI 0 "register_operand" "=rk,rk,w,rk")
+-    (plus:SI
+-     (match_operand:SI 1 "register_operand" "%rk,rk,w,rk")
+-     (match_operand:SI 2 "aarch64_plus_operand" "I,r,w,J")))]
++    (match_operand:GPI 0 "register_operand" "=rk,rk,w,rk,r")
++    (plus:GPI
++     (match_operand:GPI 1 "register_operand" "%rk,rk,w,rk,rk")
++     (match_operand:GPI 2 "aarch64_pluslong_operand" "I,r,w,J,Upl")))]
+   ""
+   "@
+-  add\\t%w0, %w1, %2
+-  add\\t%w0, %w1, %w2
+-  add\\t%0.2s, %1.2s, %2.2s
+-  sub\\t%w0, %w1, #%n2"
+-  [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm")
+-   (set_attr "simd" "*,*,yes,*")]
++  add\\t%<w>0, %<w>1, %2
++  add\\t%<w>0, %<w>1, %<w>2
++  add\\t%<rtn>0<vas>, %<rtn>1<vas>, %<rtn>2<vas>
++  sub\\t%<w>0, %<w>1, #%n2
++  #"
++  [(set_attr "type" "alu_imm,alu_sreg,neon_add,alu_imm,multiple")
++   (set_attr "simd" "*,*,yes,*,*")]
+ )
+ 
+ ;; zero_extend version of above
+ (define_insn "*addsi3_aarch64_uxtw"
+   [(set
+-    (match_operand:DI 0 "register_operand" "=rk,rk,rk")
++    (match_operand:DI 0 "register_operand" "=rk,rk,rk,r")
+     (zero_extend:DI
+-     (plus:SI (match_operand:SI 1 "register_operand" "%rk,rk,rk")
+-              (match_operand:SI 2 "aarch64_plus_operand" "I,r,J"))))]
++     (plus:SI (match_operand:SI 1 "register_operand" "%rk,rk,rk,rk")
++              (match_operand:SI 2 "aarch64_pluslong_operand" "I,r,J,Upl"))))]
+   ""
+   "@
+   add\\t%w0, %w1, %2
+   add\\t%w0, %w1, %w2
+-  sub\\t%w0, %w1, #%n2"
+-  [(set_attr "type" "alu_imm,alu_sreg,alu_imm")]
++  sub\\t%w0, %w1, #%n2
++  #"
++  [(set_attr "type" "alu_imm,alu_sreg,alu_imm,multiple")]
+ )
+ 
+-(define_insn "*adddi3_aarch64"
+-  [(set
+-    (match_operand:DI 0 "register_operand" "=rk,rk,rk,w")
+-    (plus:DI
+-     (match_operand:DI 1 "register_operand" "%rk,rk,rk,w")
+-     (match_operand:DI 2 "aarch64_plus_operand" "I,r,J,w")))]
+-  ""
+-  "@
+-  add\\t%x0, %x1, %2
+-  add\\t%x0, %x1, %x2
+-  sub\\t%x0, %x1, #%n2
+-  add\\t%d0, %d1, %d2"
+-  [(set_attr "type" "alu_imm,alu_sreg,alu_imm,neon_add")
+-   (set_attr "simd" "*,*,*,yes")]
++;; If there's a free register, and we can load the constant with a
++;; single instruction, do so.  This has a chance to improve scheduling.
++(define_peephole2
++  [(match_scratch:GPI 3 "r")
++   (set (match_operand:GPI 0 "register_operand")
++	(plus:GPI
++	  (match_operand:GPI 1 "register_operand")
++	  (match_operand:GPI 2 "aarch64_pluslong_strict_immedate")))]
++  "aarch64_move_imm (INTVAL (operands[2]), <MODE>mode)"
++  [(set (match_dup 3) (match_dup 2))
++   (set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3)))]
+ )
+ 
++(define_peephole2
++  [(match_scratch:SI 3 "r")
++   (set (match_operand:DI 0 "register_operand")
++	(zero_extend:DI
++	  (plus:SI
++	    (match_operand:SI 1 "register_operand")
++	    (match_operand:SI 2 "aarch64_pluslong_strict_immedate"))))]
++  "aarch64_move_imm (INTVAL (operands[2]), SImode)"
++  [(set (match_dup 3) (match_dup 2))
++   (set (match_dup 0) (zero_extend:DI (plus:SI (match_dup 1) (match_dup 3))))]
++)
++
++;; After peephole2 has had a chance to run, split any remaining long
++;; additions into two add immediates.
++(define_split
++  [(set (match_operand:GPI 0 "register_operand")
++	(plus:GPI
++	  (match_operand:GPI 1 "register_operand")
++	  (match_operand:GPI 2 "aarch64_pluslong_strict_immedate")))]
++  "epilogue_completed"
++  [(set (match_dup 0) (plus:GPI (match_dup 1) (match_dup 3)))
++   (set (match_dup 0) (plus:GPI (match_dup 0) (match_dup 4)))]
++  {
++    HOST_WIDE_INT i = INTVAL (operands[2]);
++    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++    operands[3] = GEN_INT (i - s);
++    operands[4] = GEN_INT (s);
++  }
++)
++
++(define_split
++  [(set (match_operand:DI 0 "register_operand")
++	(zero_extend:DI
++	  (plus:SI
++	    (match_operand:SI 1 "register_operand")
++	    (match_operand:SI 2 "aarch64_pluslong_strict_immedate"))))]
++  "epilogue_completed"
++  [(set (match_dup 5) (plus:SI (match_dup 1) (match_dup 3)))
++   (set (match_dup 0) (zero_extend:DI (plus:SI (match_dup 5) (match_dup 4))))]
++  {
++    HOST_WIDE_INT i = INTVAL (operands[2]);
++    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
++    operands[3] = GEN_INT (i - s);
++    operands[4] = GEN_INT (s);
++    operands[5] = gen_lowpart (SImode, operands[0]);
++  }
++)
++
+ (define_expand "addti3"
+   [(set (match_operand:TI 0 "register_operand" "")
+ 	(plus:TI (match_operand:TI 1 "register_operand" "")
+--- a/src/gcc/config/aarch64/constraints.md	(Revision 232539)
++++ a/src/gcc/config/aarch64/constraints.md	(Revision 232540)
+@@ -35,6 +35,11 @@
+  (and (match_code "const_int")
+       (match_test "aarch64_uimm12_shift (ival)")))
+ 
++(define_constraint "Upl"
++  "@internal A constant that matches two uses of add instructions."
++  (and (match_code "const_int")
++       (match_test "aarch64_pluslong_strict_immedate (op, VOIDmode)")))
++
+ (define_constraint "J"
+  "A constant that can be used with a SUB operation (once negated)."
+  (and (match_code "const_int")
--- gcc-5-5.4.0.orig/debian/patches/pr70192.diff
+++ gcc-5-5.4.0/debian/patches/pr70192.diff
@@ -0,0 +1,220 @@
+# DP: Fix PR driver/70192, taken from the trunk
+
+gcc/
+
+2016-03-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR driver/70192
+	* opts.c (finish_options): Don't set flag_pie to the default if
+	-fpic, -fPIC, -fno-pic or -fno-PIC is used.  Set flag_pic to 0
+	if it is -1.
+
+ 
+gcc/testsuite/
+
+2016-03-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR driver/70192
+	* gcc.dg/pic-1.c: New test.
+	* gcc.dg/pic-2.c: Likewise.
+	* gcc.dg/pic-3.c: Likewise.
+	* gcc.dg/pic-4.c: Likewise.
+	* gcc.dg/pie-1.c: Likewise.
+	* gcc.dg/pie-2.c: Likewise.
+	* gcc.dg/pie-3.c: Likewise.
+	* gcc.dg/pie-4.c: Likewise.
+	* gcc.dg/pie-5.c: Likewise.
+	* gcc.dg/pie-6.c: Likewise.
+
+Index: b/src/gcc/testsuite/gcc.dg/pic-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pic-2.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-fPIC" } */
++
++#if __PIC__ != 2
++# error __PIC__ is not 2!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-2.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile } */
++/* { dg-options "-fPIE" } */
++
++#if __PIC__ != 2
++# error __PIC__ is not 2!
++#endif
++
++#if __PIE__ != 2
++# error __PIE__ is not 2!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-6.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-6.c
+@@ -0,0 +1,6 @@
++/* { dg-do compile { target { ! pie_enabled } } } */
++/* { dg-options "" } */
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pic-3.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pic-3.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fno-pic" } */
++
++#ifdef __PIC__
++# error __PIC__ is defined!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-3.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-3.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fno-pie" } */
++
++#ifdef __PIC__
++# error __PIC__ is defined!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pic-4.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pic-4.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fno-PIC" } */
++
++#ifdef __PIC__
++# error __PIC__ is defined!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-4.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-4.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fno-PIE" } */
++
++#ifdef __PIC__
++# error __PIC__ is defined!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pic-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pic-1.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fpic" } */
++
++#if __PIC__ != 1
++# error __PIC__ is not 1!
++#endif
++
++#ifdef __PIE__
++# error __PIE__ is defined!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-1.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target { ! *-*-darwin* } } } */
++/* { dg-options "-fpie" } */
++
++#if __PIC__ != 1
++# error __PIC__ is not 1!
++#endif
++
++#if __PIE__ != 1
++# error __PIE__ is not 1!
++#endif
+Index: b/src/gcc/testsuite/gcc.dg/pie-5.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.dg/pie-5.c
+@@ -0,0 +1,10 @@
++/* { dg-do compile { target pie_enabled } } */
++/* { dg-options "" } */
++
++#ifndef __PIC__
++# error __PIC__ is not defined!
++#endif
++
++#ifndef __PIE__
++# error __PIE__ is not defined!
++#endif
+Index: b/src/gcc/opts.c
+===================================================================
+--- a/src/gcc/opts.c
++++ b/src/gcc/opts.c
+@@ -745,13 +745,18 @@ finish_options (struct gcc_options *opts
+ 	 default value.  */
+       if (opts->x_flag_pie == -1)
+ 	{
+-	  if (opts->x_flag_pic == 0)
++	  /* We initialize opts->x_flag_pic to -1 so that we can tell if
++	     -fpic, -fPIC, -fno-pic or -fno-PIC is used.  */
++	  if (opts->x_flag_pic == -1)
+ 	    opts->x_flag_pie = DEFAULT_FLAG_PIE;
+ 	  else
+ 	    opts->x_flag_pie = 0;
+ 	}
++      /* If -fPIE or -fpie is used, turn on PIC.  */
+       if (opts->x_flag_pie)
+ 	opts->x_flag_pic = opts->x_flag_pie;
++      else if (opts->x_flag_pic == -1)
++	opts->x_flag_pic = 0;
+       if (opts->x_flag_pic && !opts->x_flag_pie)
+ 	opts->x_flag_shlib = 1;
+       opts->x_flag_opts_finished = true;
+Index: b/src/gcc/common.opt
+===================================================================
+--- a/src/gcc/common.opt
++++ b/src/gcc/common.opt
+@@ -1764,7 +1764,7 @@ Common Report Var(flag_peephole2) Optimi
+ Enable an RTL peephole pass before sched2
+ 
+ fPIC
+-Common Report Var(flag_pic,2) Negative(fPIE)
++Common Report Var(flag_pic,2) Negative(fPIE) Init(-1)
+ Generate position-independent code if possible (large mode)
+ 
+ fPIE
+@@ -1772,7 +1772,7 @@ Common Report Var(flag_pie,2) Negative(f
+ Generate position-independent code for executables if possible (large mode)
+ 
+ fpic
+-Common Report Var(flag_pic,1) Negative(fpie)
++Common Report Var(flag_pic,1) Negative(fpie) Init(-1)
+ Generate position-independent code if possible (small mode)
+ 
+ fpie
--- gcc-5-5.4.0.orig/debian/patches/pr70218.diff
+++ gcc-5-5.4.0/debian/patches/pr70218.diff
@@ -0,0 +1,63 @@
+# DP: Fix PR c++/70218 (illegal access to private field succeeds)
+
+gcc/cp/ChangeLog:
+
+	PR c++/70218
+	* parser.c (cp_parser_lambda_expression): Move call to
+	pop_deferring_access_checks ahead of the call to
+	cp_parser_end_tentative_firewall.
+
+gcc/testsuite/ChangeLog:
+
+	PR c++/70218
+	* g++.dg/cpp0x/lambda/lambda-70218.C: New test.
+---
+ gcc/cp/parser.c                                  |  4 ++--
+ gcc/testsuite/g++.dg/cpp0x/lambda/lambda-70218.C | 17 +++++++++++++++++
+ 2 files changed, 19 insertions(+), 2 deletions(-)
+ create mode 100644 gcc/testsuite/g++.dg/cpp0x/lambda/lambda-70218.C
+
+Index: b/src/gcc/cp/parser.c
+===================================================================
+--- a/src/gcc/cp/parser.c
++++ b/src/gcc/cp/parser.c
+@@ -9112,8 +9112,6 @@ cp_parser_lambda_expression (cp_parser*
+ 	= auto_is_implicit_function_template_parm_p;
+   }
+ 
+-  pop_deferring_access_checks ();
+-
+   /* This field is only used during parsing of the lambda.  */
+   LAMBDA_EXPR_THIS_CAPTURE (lambda_expr) = NULL_TREE;
+ 
+@@ -9129,6 +9127,8 @@ cp_parser_lambda_expression (cp_parser*
+ 
+   cp_parser_end_tentative_firewall (parser, start, lambda_expr);
+ 
++  pop_deferring_access_checks ();
++
+   return lambda_expr;
+ }
+ 
+Index: b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-70218.C
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-70218.C
+@@ -0,0 +1,17 @@
++// PR c++/70218
++// { dg-do compile { target c++11 } }
++
++struct X {
++private:
++   int i;
++};
++
++struct Y {
++  Y (int) { }
++};
++
++void
++foo ()
++{
++  Y ([] { X x; x.i = 3; return 0; } ()); // { dg-error "private" }
++}
--- gcc-5-5.4.0.orig/debian/patches/pr71709.diff
+++ gcc-5-5.4.0/debian/patches/pr71709.diff
@@ -0,0 +1,26 @@
+# DP: Fix PR rtl-optimization/71709, taken from the gcc-5 branch.
+
+gcc/
+
+2016-09-28  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+	    Alan Modra  <amodra@gmail.com>
+
+	Backport from mainline
+	2016-07-01  Alan Modra  <amodra@gmail.com>
+
+	PR rtl-optimization/71709
+	* ira-lives.c (find_call_crossed_cheap_reg): Exit loop on arg reg
+	being set, not referenced.
+
+ 
+--- a/src/gcc/ira-lives.c
++++ b/src/gcc/ira-lives.c
+@@ -1042,7 +1042,7 @@
+ 		  break;
+ 		}
+ 
+-	      if (reg_overlap_mentioned_p (reg, PATTERN (prev)))
++	      if (reg_set_p (reg, prev))
+ 		break;
+ 	    }
+ 	  prev = PREV_INSN (prev);
--- gcc-5-5.4.0.orig/debian/patches/pr72863.diff
+++ gcc-5-5.4.0/debian/patches/pr72863.diff
@@ -0,0 +1,85 @@
+# DP: Fix PR target/72863, redundant swaps when using vec_vsx_ld/st.
+
+gcc/
+
+2016-08-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	Backport from mainline (minus test for POWER9 support)
+	2016-08-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	PR target/72863
+	* vsx.md (vsx_load_<mode>): For P8LE, emit swaps at expand time.
+	(vsx_store_<mode>): Likewise.
+
+gcc/testsuite/
+
+2016-08-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	Backport from mainline
+	2016-08-11  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	PR target/72863
+	* gcc.target/powerpc/pr72863.c: New test.
+ 
+--- a/src/gcc/testsuite/gcc.target/powerpc/pr72863.c
++++ a/src/gcc/testsuite/gcc.target/powerpc/pr72863.c
+@@ -0,0 +1,27 @@
++/* { dg-do compile { target { powerpc64le-*-* } } } */
++/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
++/* { dg-options "-mcpu=power8 -O3" } */
++/* { dg-final { scan-assembler "lxvd2x" } } */
++/* { dg-final { scan-assembler "stxvd2x" } } */
++/* { dg-final { scan-assembler-not "xxpermdi" } } */
++
++#include <altivec.h>
++
++extern unsigned char *src, *dst;
++
++void b(void)
++{
++  int i;
++
++  unsigned char *s8 = src;
++  unsigned char *d8 = dst;
++
++  for (i = 0; i < 100; i++) {
++    vector unsigned char vs = vec_vsx_ld(0, s8);
++    vector unsigned char vd = vec_vsx_ld(0, d8);
++    vector unsigned char vr = vec_xor(vs, vd);
++    vec_vsx_st(vr, 0, d8);
++    s8 += 16;
++    d8 += 16;
++  }
++}
+--- a/src/gcc/config/rs6000/vsx.md
++++ a/src/gcc/config/rs6000/vsx.md
+@@ -716,13 +716,27 @@
+   [(set (match_operand:VSX_M 0 "vsx_register_operand" "")
+ 	(match_operand:VSX_M 1 "memory_operand" ""))]
+   "VECTOR_MEM_VSX_P (<MODE>mode)"
+-  "")
++{
++  /* Expand to swaps if needed, prior to swap optimization.  */
++  if (!BYTES_BIG_ENDIAN)
++    {
++      rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode);
++      DONE;
++    }
++})
+ 
+ (define_expand "vsx_store_<mode>"
+   [(set (match_operand:VSX_M 0 "memory_operand" "")
+ 	(match_operand:VSX_M 1 "vsx_register_operand" ""))]
+   "VECTOR_MEM_VSX_P (<MODE>mode)"
+-  "")
++{
++  /* Expand to swaps if needed, prior to swap optimization.  */
++  if (!BYTES_BIG_ENDIAN)
++    {
++      rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode);
++      DONE;
++    }
++})
+ 
+ 
+ ;; VSX vector floating point arithmetic instructions.  The VSX scalar
--- gcc-5-5.4.0.orig/debian/patches/rename-info-files.diff
+++ gcc-5-5.4.0/debian/patches/rename-info-files.diff
@@ -0,0 +1,842 @@
+# DP: Allow transformations on info file names. Reference the
+# DP: transformed info file names in the texinfo files.
+
+
+2004-02-17  Matthias Klose  <doko@debian.org>
+
+gcc/ChangeLog:
+	* Makefile.in: Allow transformations on info file names.
+	Define MAKEINFODEFS, macros to pass transformated info file
+	names to makeinfo.
+	* doc/cpp.texi: Use macros defined in MAKEINFODEFS for references.
+	* doc/cppinternals.texi: Likewise.
+	* doc/extend.texi: Likewise.
+	* doc/gcc.texi: Likewise.
+	* doc/gccint.texi: Likewise.
+	* doc/invoke.texi: Likewise.
+	* doc/libgcc.texi: Likewise.
+	* doc/makefile.texi: Likewise.
+	* doc/passes.texi: Likewise.
+	* doc/sourcebuild.texi: Likewise.
+	* doc/standards.texi: Likewise.
+	* doc/trouble.texi: Likewise.
+
+gcc/fortran/ChangeLog:
+	* Make-lang.in: Allow transformations on info file names.
+	Pass macros of transformated info file defined in MAKEINFODEFS
+	names to makeinfo.
+	* gfortran.texi: Use macros defined in MAKEINFODEFS for references.
+
+gcc/java/ChangeLog:
+	* Make-lang.in: Allow transformations on info file names.
+	Pass macros of transformated info file defined in MAKEINFODEFS
+
+Index: b/src/gcc/fortran/gfortran.texi
+===================================================================
+--- a/src/gcc/fortran/gfortran.texi
++++ b/src/gcc/fortran/gfortran.texi
+@@ -101,7 +101,7 @@ Texts being (a) (see below), and with th
+ @ifinfo
+ @dircategory Software development
+ @direntry
+-* gfortran: (gfortran).                  The GNU Fortran Compiler.
++* @value{fngfortran}: (@value{fngfortran}).                  The GNU Fortran Compiler.
+ @end direntry
+ This file documents the use and the internals of
+ the GNU Fortran compiler, (@command{gfortran}).
+Index: b/src/gcc/fortran/Make-lang.in
+===================================================================
+--- a/src/gcc/fortran/Make-lang.in
++++ b/src/gcc/fortran/Make-lang.in
+@@ -114,7 +114,8 @@ fortran.tags: force
+ 	cd $(srcdir)/fortran; etags -o TAGS.sub *.c *.h; \
+ 	etags --include TAGS.sub --include ../TAGS.sub
+ 
+-fortran.info: doc/gfortran.info doc/gfc-internals.info
++INFO_FORTRAN_NAME = $(shell echo gfortran|sed '$(program_transform_name)')
++fortran.info: doc/$(INFO_FORTRAN_NAME).info
+ fortran.dvi: doc/gfortran.dvi doc/gfc-internals.dvi
+ 
+ F95_HTMLFILES = $(build_htmldir)/gfortran
+@@ -181,10 +182,10 @@ GFORTRAN_TEXI = \
+   $(srcdir)/doc/include/gcc-common.texi \
+   gcc-vers.texi
+ 
+-doc/gfortran.info: $(GFORTRAN_TEXI)
++doc/$(INFO_FORTRAN_NAME).info: $(GFORTRAN_TEXI)
+ 	if [ x$(BUILD_INFO) = xinfo ]; then \
+ 	  rm -f doc/gfortran.info-*; \
+-	  $(MAKEINFO) -I $(srcdir)/doc/include -I $(srcdir)/fortran \
++	  $(MAKEINFO) $(MAKEINFODEFS) -I $(srcdir)/doc/include -I $(srcdir)/fortran \
+ 	    -o $@ $<; \
+ 	else true; fi
+ 
+@@ -249,7 +250,7 @@ fortran.install-common: install-finclude
+ 
+ fortran.install-plugin:
+ 
+-fortran.install-info: $(DESTDIR)$(infodir)/gfortran.info
++fortran.install-info: $(DESTDIR)$(infodir)/$(INFO_FORTRAN_NAME).info
+ 
+ fortran.install-man: $(DESTDIR)$(man1dir)/$(GFORTRAN_INSTALL_NAME)$(man1ext)
+ 
+@@ -267,7 +268,7 @@ fortran.uninstall:
+ 	rm -rf $(DESTDIR)$(bindir)/$(GFORTRAN_INSTALL_NAME)$(exeext); \
+ 	rm -rf $(DESTDIR)$(man1dir)/$(GFORTRAN_INSTALL_NAME)$(man1ext); \
+ 	rm -rf $(DESTDIR)$(bindir)/$(GFORTRAN_TARGET_INSTALL_NAME)$(exeext); \
+-	rm -rf $(DESTDIR)$(infodir)/gfortran.info*
++	rm -rf $(DESTDIR)$(infodir)/$(INFO_FORTRAN_NAME).info*
+ 
+ #
+ # Clean hooks:
+Index: b/src/gcc/Makefile.in
+===================================================================
+--- a/src/gcc/Makefile.in
++++ b/src/gcc/Makefile.in
+@@ -2880,8 +2880,32 @@ install-no-fixedincludes:
+ 
+ doc: $(BUILD_INFO) $(GENERATED_MANPAGES)
+ 
+-INFOFILES = doc/cpp.info doc/gcc.info doc/gccint.info \
+-            doc/gccinstall.info doc/cppinternals.info
++INFO_CPP_NAME = $(shell echo cpp|sed '$(program_transform_name)')
++INFO_GCC_NAME = $(shell echo gcc|sed '$(program_transform_name)')
++INFO_GXX_NAME = $(shell echo g++|sed '$(program_transform_name)')
++INFO_GCCINT_NAME = $(shell echo gccint|sed '$(program_transform_name)')
++INFO_GCCINSTALL_NAME = $(shell echo gccinstall|sed '$(program_transform_name)')
++INFO_CPPINT_NAME = $(shell echo cppinternals|sed '$(program_transform_name)')
++
++INFO_FORTRAN_NAME = $(shell echo gfortran|sed '$(program_transform_name)')
++INFO_GCJ_NAME = $(shell echo gcj|sed '$(program_transform_name)')
++INFO_GCCGO_NAME = $(shell echo gccgo|sed '$(program_transform_name)')
++
++INFOFILES = doc/$(INFO_CPP_NAME).info doc/$(INFO_GCC_NAME).info \
++            doc/$(INFO_GCCINT_NAME).info \
++            doc/$(INFO_GCCINSTALL_NAME).info doc/$(INFO_CPPINT_NAME).info
++
++MAKEINFODEFS = -D 'fncpp $(INFO_CPP_NAME)' \
++               -D 'fngcc $(INFO_GCC_NAME)' \
++               -D 'fngcov $(INFO_GCC_NAME)' \
++               -D 'fngcovtool $(INFO_GCC_NAME)' \
++               -D 'fngxx $(INFO_GXX_NAME)' \
++               -D 'fngccint $(INFO_GCCINT_NAME)' \
++               -D 'fngccinstall $(INFO_GCCINSTALL_NAME)' \
++               -D 'fncppint $(INFO_CPPINT_NAME)' \
++               -D 'fngfortran $(INFO_FORTRAN_NAME)' \
++               -D 'fngcj $(INFO_GCJ_NAME)' \
++               -D 'fngccgo $(INFO_GCCGO_NAME)'
+ 
+ info: $(INFOFILES) lang.info @GENINSRC@ srcinfo lang.srcinfo
+ 
+@@ -2928,7 +2952,19 @@ gcc-vers.texi: $(BASEVER) $(DEVPHASE)
+ 	if [ -n "$(PKGVERSION)" ]; then \
+ 	  echo "@set VERSION_PACKAGE $(PKGVERSION)" >> $@T; \
+ 	fi
+-	echo "@set BUGURL $(BUGURL_TEXI)" >> $@T; \
++	echo "@set BUGURL $(BUGURL_TEXI)" >> $@T
++	( \
++	  echo '@set fncpp $(INFO_CPP_NAME)'; \
++	  echo '@set fngcc $(INFO_GCC_NAME)'; \
++	  echo '@set fngcov $(INFO_GCC_NAME)'; \
++	  echo '@set fngxx $(INFO_GXX_NAME)'; \
++	  echo '@set fngccint $(INFO_GCCINT_NAME)'; \
++	  echo '@set fngccinstall $(INFO_GCCINSTALL_NAME)'; \
++	  echo '@set fncppint $(INFO_CPPINT_NAME)'; \
++	  echo '@set fngfortran $(INFO_FORTRAN_NAME)'; \
++	  echo '@set fngcj $(INFO_GCJ_NAME)'; \
++	  echo '@set fngccgo $(INFO_GCCGO_NAME)'; \
++	) >> $@T
+ 	mv -f $@T $@
+ 
+ 
+@@ -2936,21 +2972,41 @@ gcc-vers.texi: $(BASEVER) $(DEVPHASE)
+ # patterns.  To use them, put each of the specific targets with its
+ # specific dependencies but no build commands.
+ 
+-doc/cpp.info: $(TEXI_CPP_FILES)
+-doc/gcc.info: $(TEXI_GCC_FILES)
+-doc/gccint.info: $(TEXI_GCCINT_FILES)
+-doc/cppinternals.info: $(TEXI_CPPINT_FILES)
+-
++# Generic entry to handle info files, which are not renamed (currently Ada)
+ doc/%.info: %.texi
+ 	if [ x$(BUILD_INFO) = xinfo ]; then \
+ 		$(MAKEINFO) $(MAKEINFOFLAGS) -I . -I $(gcc_docdir) \
+ 			-I $(gcc_docdir)/include -o $@ $<; \
+ 	fi
+ 
++doc/$(INFO_CPP_NAME).info: $(TEXI_CPP_FILES)
++	if [ x$(BUILD_INFO) = xinfo ]; then \
++		$(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
++			-I $(gcc_docdir)/include -o $@ $<; \
++	fi
++
++doc/$(INFO_GCC_NAME).info: $(TEXI_GCC_FILES)
++	if [ x$(BUILD_INFO) = xinfo ]; then \
++		$(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
++			-I $(gcc_docdir)/include -o $@ $<; \
++	fi
++
++doc/$(INFO_GCCINT_NAME).info: $(TEXI_GCCINT_FILES)
++	if [ x$(BUILD_INFO) = xinfo ]; then \
++		$(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
++			-I $(gcc_docdir)/include -o $@ $<; \
++	fi
++
++doc/$(INFO_CPPINT_NAME).info: $(TEXI_CPPINT_FILES)
++	if [ x$(BUILD_INFO) = xinfo ]; then \
++		$(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
++			-I $(gcc_docdir)/include -o $@ $<; \
++	fi
++
+ # Duplicate entry to handle renaming of gccinstall.info
+-doc/gccinstall.info: $(TEXI_GCCINSTALL_FILES)
++doc/$(INFO_GCCINSTALL_NAME).info: $(TEXI_GCCINSTALL_FILES)
+ 	if [ x$(BUILD_INFO) = xinfo ]; then \
+-		$(MAKEINFO) $(MAKEINFOFLAGS) -I $(gcc_docdir) \
++		$(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
+ 			-I $(gcc_docdir)/include -o $@ $<; \
+ 	fi
+ 
+@@ -3346,11 +3402,11 @@ install-driver: installdirs xgcc$(exeext
+ # $(INSTALL_DATA) might be a relative pathname, so we can't cd into srcdir
+ # to do the install.
+ install-info:: doc installdirs \
+-	$(DESTDIR)$(infodir)/cpp.info \
+-	$(DESTDIR)$(infodir)/gcc.info \
+-	$(DESTDIR)$(infodir)/cppinternals.info \
+-	$(DESTDIR)$(infodir)/gccinstall.info \
+-	$(DESTDIR)$(infodir)/gccint.info \
++	$(DESTDIR)$(infodir)/$(INFO_CPP_NAME).info \
++	$(DESTDIR)$(infodir)/$(INFO_GCC_NAME).info \
++	$(DESTDIR)$(infodir)/$(INFO_CPPINT_NAME).info \
++	$(DESTDIR)$(infodir)/$(INFO_GCCINSTALL_NAME).info \
++	$(DESTDIR)$(infodir)/$(INFO_GCCINT_NAME).info \
+ 	lang.install-info
+ 
+ $(DESTDIR)$(infodir)/%.info: doc/%.info installdirs
+@@ -3404,6 +3460,7 @@ install-man: lang.install-man \
+ 	$(DESTDIR)$(man1dir)/$(GCC_INSTALL_NAME)$(man1ext) \
+ 	$(DESTDIR)$(man1dir)/$(CPP_INSTALL_NAME)$(man1ext) \
+ 	$(DESTDIR)$(man1dir)/$(GCOV_INSTALL_NAME)$(man1ext) \
++	$(DESTDIR)$(man1dir)/$(GCOV_TOOL_INSTALL_NAME)$(man1ext) \
+ 	$(DESTDIR)$(man7dir)/fsf-funding$(man7ext) \
+ 	$(DESTDIR)$(man7dir)/gfdl$(man7ext) \
+ 	$(DESTDIR)$(man7dir)/gpl$(man7ext)
+@@ -3564,8 +3621,11 @@ uninstall: lang.uninstall
+ 	-rm -rf $(DESTDIR)$(bindir)/$(GCOV_INSTALL_NAME)$(exeext)
+ 	-rm -rf $(DESTDIR)$(man1dir)/$(GCC_INSTALL_NAME)$(man1ext)
+ 	-rm -rf $(DESTDIR)$(man1dir)/cpp$(man1ext)
+-	-rm -f $(DESTDIR)$(infodir)/cpp.info* $(DESTDIR)$(infodir)/gcc.info*
+-	-rm -f $(DESTDIR)$(infodir)/cppinternals.info* $(DESTDIR)$(infodir)/gccint.info*
++	-rm -f $(DESTDIR)$(infodir)/$(INFO_CPP_NAME).info*
++	-rm -f $(DESTDIR)$(infodir)/$(INFO_GCC_NAME).info*
++	-rm -f $(DESTDIR)$(infodir)/$(INFO_CPPINT_NAME).info*
++	-rm -f $(DESTDIR)$(infodir)/$(INFO_GCCINT_NAME).info*
++	-rm -f $(DESTDIR)$(infodir)/$(INFO_GCCINSTALL_NAME).info*
+ 	for i in ar nm ranlib ; do \
+ 	  install_name=`echo gcc-$$i|sed '$(program_transform_name)'`$(exeext) ;\
+ 	  target_install_name=$(target_noncanonical)-`echo gcc-$$i|sed '$(program_transform_name)'`$(exeext) ; \
+Index: b/src/gcc/java/gcj.texi
+===================================================================
+--- a/src/gcc/java/gcj.texi
++++ b/src/gcc/java/gcj.texi
+@@ -55,25 +55,25 @@ man page gfdl(7).
+ @format
+ @dircategory Software development
+ @direntry
+-* Gcj: (gcj).               Ahead-of-time compiler for the Java language
++* @value{fngcj}: (@value{fngcj}).               Ahead-of-time compiler for the Java language
+ @end direntry
+ 
+ @dircategory Individual utilities
+ @direntry
+-* jcf-dump: (gcj)Invoking jcf-dump.
++* jcf-dump: (@value{fngcj}) Invoking jcf-dump.
+                             Print information about Java class files
+-* gij: (gcj)Invoking gij.   GNU interpreter for Java bytecode
+-* gcj-dbtool: (gcj)Invoking gcj-dbtool.
++* gij: (@value{fngcj}) Invoking gij.   GNU interpreter for Java bytecode
++* gcj-dbtool: (@value{fngcj}) Invoking gcj-dbtool.
+                             Tool for manipulating class file databases.
+-* jv-convert: (gcj)Invoking jv-convert.
++* jv-convert: (@value{fngcj}) Invoking jv-convert.
+                             Convert file from one encoding to another
+-* grmic: (gcj)Invoking grmic.
++* grmic: (@value{fngcj}) Invoking grmic.
+                             Generate stubs for Remote Method Invocation.
+-* gc-analyze: (gcj)Invoking gc-analyze.
++* gc-analyze: (@value{fngcj}) Invoking gc-analyze.
+                             Analyze Garbage Collector (GC) memory dumps.
+-* aot-compile: (gcj)Invoking aot-compile.
++* aot-compile: (@value{fngcj})Invoking aot-compile.
+                             Compile bytecode to native and generate databases.
+-* rebuild-gcj-db: (gcj)Invoking rebuild-gcj-db.
++* rebuild-gcj-db: (@value{fngcj})Invoking rebuild-gcj-db.
+                             Merge the per-solib databases made by aot-compile
+                             into one system-wide database.
+ @end direntry
+@@ -159,7 +159,7 @@ and the Info entries for @file{gcj} and
+ 
+ As @command{gcj} is just another front end to @command{gcc}, it supports many
+ of the same options as gcc.  @xref{Option Summary, , Option Summary,
+-gcc, Using the GNU Compiler Collection (GCC)}.  This manual only documents the
++@value{fngcc}, Using the GNU Compiler Collection (GCC)}.  This manual only documents the
+ options specific to @command{gcj}.
+ 
+ @c man end
+Index: b/src/gcc/java/Make-lang.in
+===================================================================
+--- a/src/gcc/java/Make-lang.in
++++ b/src/gcc/java/Make-lang.in
+@@ -122,9 +122,10 @@ java.tags: force
+ 	etags --include TAGS.sub --include ../TAGS.sub
+ 
+ 
+-java.info: doc/gcj.info
++INFO_GCJ_NAME = $(shell echo gcj|sed '$(program_transform_name)')
++java.info: doc/$(INFO_GCJ_NAME).info
+ 
+-java.srcinfo: doc/gcj.info
++java.srcinfo: doc/$(INFO_GCJ_NAME).info
+ 	-cp -p $^ $(srcdir)/doc
+ 
+ java.dvi: doc/gcj.dvi
+@@ -190,7 +191,7 @@ java.uninstall:
+ 	-rm -rf $(DESTDIR)$(man1dir)/aot-compile$(man1ext)
+ 	-rm -rf $(DESTDIR)$(man1dir)/rebuild-gcj-db$(man1ext)
+ 
+-java.install-info: $(DESTDIR)$(infodir)/gcj.info
++java.install-info: $(DESTDIR)$(infodir)/$(INFO_GCJ_NAME).info
+ 
+ java.install-pdf: $(JAVA_PDFFILES)
+ 	@$(NORMAL_INSTALL)
+@@ -273,10 +274,10 @@ TEXI_JAVA_FILES = java/gcj.texi $(gcc_do
+ 	 gcc-vers.texi
+ 
+ # Documentation
+-doc/gcj.info: $(TEXI_JAVA_FILES)
++doc/$(INFO_GCJ_NAME).info: $(TEXI_JAVA_FILES)
+ 	if test "x$(BUILD_INFO)" = xinfo; then \
+-	  rm -f doc/gcj.info*; \
+-	  $(MAKEINFO) $(MAKEINFOFLAGS) -I $(gcc_docdir) \
++	  rm -f doc/$(INFO_GCJ_NAME).info*; \
++	  $(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
+ 		-I $(gcc_docdir)/include -o $@ $<; \
+ 	else true; fi
+ 
+Index: b/src/gcc/ada/gnat-style.texi
+===================================================================
+--- a/src/gcc/ada/gnat-style.texi
++++ b/src/gcc/ada/gnat-style.texi
+@@ -31,7 +31,7 @@ Texts.  A copy of the license is include
+ 
+ @dircategory Software development
+ @direntry
+-* gnat-style: (gnat-style).      GNAT Coding Style
++* gnat-style: (gnat-style-5).      GNAT Coding Style
+ @end direntry
+ 
+ @macro syntax{element}
+Index: b/src/gcc/ada/gnat_rm.texi
+===================================================================
+--- a/src/gcc/ada/gnat_rm.texi
++++ b/src/gcc/ada/gnat_rm.texi
+@@ -12,7 +12,7 @@
+ @finalout
+ @dircategory GNU Ada Tools 
+ @direntry
+-* gnat_rm: (gnat_rm.info). gnat_rm
++* GNAT Reference Manual: (gnat_rm-5).  Reference Manual for GNU Ada tools.
+ @end direntry
+ 
+ @definfoenclose strong,`,'
+Index: b/src/gcc/doc/invoke.texi
+===================================================================
+--- a/src/gcc/doc/invoke.texi
++++ b/src/gcc/doc/invoke.texi
+@@ -11188,7 +11188,7 @@ One of the standard libraries bypassed b
+ @option{-nodefaultlibs} is @file{libgcc.a}, a library of internal subroutines
+ which GCC uses to overcome shortcomings of particular machines, or special
+ needs for some languages.
+-(@xref{Interface,,Interfacing to GCC Output,gccint,GNU Compiler
++(@xref{Interface,,Interfacing to GCC Output,@value{fngccint},GNU Compiler
+ Collection (GCC) Internals},
+ for more discussion of @file{libgcc.a}.)
+ In most cases, you need @file{libgcc.a} even when you want to avoid
+@@ -11197,7 +11197,7 @@ or @option{-nodefaultlibs} you should us
+ This ensures that you have no unresolved references to internal GCC
+ library subroutines.
+ (An example of such an internal subroutine is @code{__main}, used to ensure C++
+-constructors are called; @pxref{Collect2,,@code{collect2}, gccint,
++constructors are called; @pxref{Collect2,,@code{collect2}, @value{fngccint},
+ GNU Compiler Collection (GCC) Internals}.)
+ 
+ @item -pie
+@@ -23994,7 +23994,7 @@ Note that you can also specify places to
+ @option{-B}, @option{-I} and @option{-L} (@pxref{Directory Options}).  These
+ take precedence over places specified using environment variables, which
+ in turn take precedence over those specified by the configuration of GCC@.
+-@xref{Driver,, Controlling the Compilation Driver @file{gcc}, gccint,
++@xref{Driver,, Controlling the Compilation Driver @file{gcc}, @value{fngccint},
+ GNU Compiler Collection (GCC) Internals}.
+ 
+ @table @env
+@@ -24154,7 +24154,7 @@ the headers it contains change.
+ 
+ A precompiled header file is searched for when @code{#include} is
+ seen in the compilation.  As it searches for the included file
+-(@pxref{Search Path,,Search Path,cpp,The C Preprocessor}) the
++(@pxref{Search Path,,Search Path,@value{fncpp},The C Preprocessor}) the
+ compiler looks for a precompiled header in each directory just before it
+ looks for the include file in that directory.  The name searched for is
+ the name specified in the @code{#include} with @samp{.gch} appended.  If
+Index: b/src/gcc/doc/extend.texi
+===================================================================
+--- a/src/gcc/doc/extend.texi
++++ b/src/gcc/doc/extend.texi
+@@ -18396,7 +18396,7 @@ want to write code that checks whether t
+ test for the GNU compiler the same way as for C programs: check for a
+ predefined macro @code{__GNUC__}.  You can also use @code{__GNUG__} to
+ test specifically for GNU C++ (@pxref{Common Predefined Macros,,
+-Predefined Macros,cpp,The GNU C Preprocessor}).
++Predefined Macros,@value{fncpp},The GNU C Preprocessor}).
+ 
+ @menu
+ * C++ Volatiles::       What constitutes an access to a volatile object.
+Index: b/src/gcc/doc/standards.texi
+===================================================================
+--- a/src/gcc/doc/standards.texi
++++ b/src/gcc/doc/standards.texi
+@@ -286,8 +286,8 @@ described at @uref{http://golang.org/doc
+ GNAT Reference Manual}, for information on standard
+ conformance and compatibility of the Ada compiler.
+ 
+-@xref{Standards,,Standards, gfortran, The GNU Fortran Compiler}, for details
++@xref{Standards,,Standards, @value{fngfortran}, The GNU Fortran Compiler}, for details
+ of standards supported by GNU Fortran.
+ 
+-@xref{Compatibility,,Compatibility with the Java Platform, gcj, GNU gcj},
++@xref{Compatibility,,Compatibility with the Java Platform, @value{fngcj}, GNU gcj},
+ for details of compatibility between @command{gcj} and the Java Platform.
+Index: b/src/gcc/doc/libgcc.texi
+===================================================================
+--- a/src/gcc/doc/libgcc.texi
++++ b/src/gcc/doc/libgcc.texi
+@@ -24,7 +24,7 @@ that needs them.
+ GCC will also generate calls to C library routines, such as
+ @code{memcpy} and @code{memset}, in some cases.  The set of routines
+ that GCC may possibly use is documented in @ref{Other
+-Builtins,,,gcc, Using the GNU Compiler Collection (GCC)}.
++Builtins,,,@value{fngcc}, Using the GNU Compiler Collection (GCC)}.
+ 
+ These routines take arguments and return values of a specific machine
+ mode, not a specific C type.  @xref{Machine Modes}, for an explanation
+Index: b/src/gcc/doc/gccint.texi
+===================================================================
+--- a/src/gcc/doc/gccint.texi
++++ b/src/gcc/doc/gccint.texi
+@@ -49,7 +49,7 @@ Texts being (a) (see below), and with th
+ @ifnottex
+ @dircategory Software development
+ @direntry
+-* gccint: (gccint).            Internals of the GNU Compiler Collection.
++* @value{fngccint}: (@value{fngccint}).            Internals of the GNU Compiler Collection.
+ @end direntry
+ This file documents the internals of the GNU compilers.
+ @sp 1
+@@ -81,7 +81,7 @@ write front ends for new languages.  It
+ @value{VERSION_PACKAGE}
+ @end ifset
+ version @value{version-GCC}.  The use of the GNU compilers is documented in a
+-separate manual.  @xref{Top,, Introduction, gcc, Using the GNU
++separate manual.  @xref{Top,, Introduction, @value{fngcc}, Using the GNU
+ Compiler Collection (GCC)}.
+ 
+ This manual is mainly a reference manual rather than a tutorial.  It
+Index: b/src/gcc/doc/cpp.texi
+===================================================================
+--- a/src/gcc/doc/cpp.texi
++++ b/src/gcc/doc/cpp.texi
+@@ -50,7 +50,7 @@ This manual contains no Invariant Sectio
+ @ifinfo
+ @dircategory Software development
+ @direntry
+-* Cpp: (cpp).                  The GNU C preprocessor.
++* @value{fncpp}: (@value{fncpp}).                  The GNU C preprocessor.
+ @end direntry
+ @end ifinfo
+ 
+Index: b/src/gcc/doc/gcc.texi
+===================================================================
+--- a/src/gcc/doc/gcc.texi
++++ b/src/gcc/doc/gcc.texi
+@@ -63,10 +63,10 @@ Texts being (a) (see below), and with th
+ @ifnottex
+ @dircategory Software development
+ @direntry
+-* gcc: (gcc).                  The GNU Compiler Collection.
+-* g++: (gcc).                  The GNU C++ compiler.
+-* gcov: (gcc) Gcov.            @command{gcov}---a test coverage program.
+-* gcov-tool: (gcc) Gcov-tool.  @command{gcov-tool}---an offline gcda profile processing program.
++* @value{fngcc}: (@value{fngcc}).                  The GNU Compiler Collection.
++* @value{fngxx}: (@value{fngcc}).                  The GNU C++ compiler.
++* @value{fngcov}: (@value{fngcc}) Gcov.            @command{gcov}---a test coverage program.
++* @value{fngcovtool}: (@value{fngcc}) Gcov.            @command{gcov-tool}---an offline gcda profile processing program.
+ @end direntry
+ This file documents the use of the GNU compilers.
+ @sp 1
+@@ -126,7 +126,7 @@ version @value{version-GCC}.
+ The internals of the GNU compilers, including how to port them to new
+ targets and some information about how to write front ends for new
+ languages, are documented in a separate manual.  @xref{Top,,
+-Introduction, gccint, GNU Compiler Collection (GCC) Internals}.
++Introduction, @value{fngccint}, GNU Compiler Collection (GCC) Internals}.
+ 
+ @menu
+ * G++ and GCC::     You can compile C or C++ programs.
+Index: b/src/gcc/doc/makefile.texi
+===================================================================
+--- a/src/gcc/doc/makefile.texi
++++ b/src/gcc/doc/makefile.texi
+@@ -139,7 +139,7 @@ regardless of how it itself was compiled
+ Builds a compiler with profiling feedback information.  In this case,
+ the second and third stages are named @samp{profile} and @samp{feedback},
+ respectively.  For more information, see
+-@ref{Building,,Building with profile feedback,gccinstall,Installing GCC}.
++@ref{Building,,Building with profile feedback,@value{fngccinstall},Installing GCC}.
+ 
+ @item restrap
+ Restart a bootstrap, so that everything that was not built with
+Index: b/src/gcc/doc/install.texi
+===================================================================
+--- a/src/gcc/doc/install.texi
++++ b/src/gcc/doc/install.texi
+@@ -94,7 +94,7 @@ Free Documentation License}''.
+ @end ifinfo
+ @dircategory Software development
+ @direntry
+-* gccinstall: (gccinstall).    Installing the GNU Compiler Collection.
++* @value{fngccinstall}: (@value{fngccinstall}).    Installing the GNU Compiler Collection.
+ @end direntry
+ 
+ @c Part 3 Titlepage and Copyright
+Index: b/src/gcc/doc/cppinternals.texi
+===================================================================
+--- a/src/gcc/doc/cppinternals.texi
++++ b/src/gcc/doc/cppinternals.texi
+@@ -7,7 +7,7 @@
+ @ifinfo
+ @dircategory Software development
+ @direntry
+-* Cpplib: (cppinternals).      Cpplib internals.
++* @value{fncppint}: (@value{fncppint}).      Cpplib internals.
+ @end direntry
+ @end ifinfo
+ 
+Index: b/src/libgomp/libgomp.texi
+===================================================================
+--- a/src/libgomp/libgomp.texi
++++ b/src/libgomp/libgomp.texi
+@@ -31,7 +31,7 @@ texts being (a) (see below), and with th
+ @ifinfo
+ @dircategory GNU Libraries
+ @direntry
+-* libgomp: (libgomp).          GNU Offloading and Multi Processing Runtime Library.
++* @value{fnlibgomp}: (@value{fnlibgomp}).          GNU Offloading and Multi Processing Runtime Library.
+ @end direntry
+ 
+ This manual documents libgomp, the GNU Offloading and Multi Processing
+Index: b/src/libgomp/Makefile.in
+===================================================================
+--- a/src/libgomp/Makefile.in
++++ b/src/libgomp/Makefile.in
+@@ -445,7 +445,8 @@ info_TEXINFOS = libgomp.texi
+ 
+ # AM_CONDITIONAL on configure check ACX_CHECK_PROG_VER([MAKEINFO])
+ @BUILD_INFO_TRUE@STAMP_BUILD_INFO = stamp-build-info
+-CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) libgomp.info
++INFO_LIBGOMP_NAME = $(shell echo libgomp|sed '$(program_transform_name)')
++CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) $(INFO_LIBGOMP_NAME).info
+ MAINTAINERCLEANFILES = $(srcdir)/libgomp.info
+ all: config.h
+ 	$(MAKE) $(AM_MAKEFLAGS) all-recursive
+@@ -1235,15 +1236,16 @@ env.lo: libgomp_f.h
+ env.o: libgomp_f.h
+ 
+ all-local: $(STAMP_GENINSRC)
+-
+-stamp-geninsrc: libgomp.info
+-	cp -p $(top_builddir)/libgomp.info $(srcdir)/libgomp.info
++stamp-geninsrc: $(INFO_LIBGOMP_NAME).info
++	cp -p $(top_builddir)/$(INFO_LIBGOMP_NAME).info $(srcdir)/libgomp.info
+ 	@touch $@
+ 
+-libgomp.info: $(STAMP_BUILD_INFO)
++libgomp.info: $(INFO_LIBGOMP_NAME).info
++	[ "$(INFO_LIBGOMP_NAME).info" = libgomp.info ] || cp $(INFO_LIBGOMP_NAME).info libgomp.info
++$(INFO_LIBGOMP_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ stamp-build-info: libgomp.texi
+-	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libgomp.info $(srcdir)/libgomp.texi
++	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -D 'fnlibgomp $(INFO_LIBGOMP_NAME)' -I $(srcdir) -o $(INFO_LIBGOMP_NAME).info $(srcdir)/libgomp.texi
+ 	@touch $@
+ 
+ # Tell versions [3.59,3.63) of GNU make to not export all variables.
+Index: b/src/libgomp/Makefile.am
+===================================================================
+--- a/src/libgomp/Makefile.am
++++ b/src/libgomp/Makefile.am
+@@ -125,16 +125,19 @@ endif
+ 
+ all-local: $(STAMP_GENINSRC)
+ 
+-stamp-geninsrc: libgomp.info
+-	cp -p $(top_builddir)/libgomp.info $(srcdir)/libgomp.info
++INFO_LIBGOMP_NAME = $(shell echo libgomp|sed '$(program_transform_name)')
++stamp-geninsrc: $(INFO_LIBGOMP_NAME).info
++	cp -p $(top_builddir)/$(INFO_LIBGOMP_NAME).info $(srcdir)/libgomp.info
+ 	@touch $@
+ 
+-libgomp.info: $(STAMP_BUILD_INFO)
++libgomp.info: $(INFO_LIBGOMP_NAME).info
++	cp $(INFO_LIBGOMP_NAME).info libgomp.info
++$(INFO_LIBGOMP_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ stamp-build-info: libgomp.texi
+-	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libgomp.info $(srcdir)/libgomp.texi
++	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -D 'fnlibgomp $(INFO_LIBGOMP_NAME)' -I $(srcdir) -o $(INFO_LIBGOMP_NAME).info $(srcdir)/libgomp.texi
+ 	@touch $@
+ 
+ 
+-CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) libgomp.info
++CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) $(INFO_LIBGOMP_NAME).info
+ MAINTAINERCLEANFILES = $(srcdir)/libgomp.info
+Index: b/src/libitm/libitm.texi
+===================================================================
+--- a/src/libitm/libitm.texi
++++ b/src/libitm/libitm.texi
+@@ -20,7 +20,7 @@ Free Documentation License''.
+ @ifinfo
+ @dircategory GNU Libraries
+ @direntry
+-* libitm: (libitm).                    GNU Transactional Memory Library
++* @value{fnlibitm}: (@value{fnlibitm}).                    GNU Transactional Memory Library
+ @end direntry
+ 
+ This manual documents the GNU Transactional Memory Library.
+Index: b/src/libitm/Makefile.am
+===================================================================
+--- a/src/libitm/Makefile.am
++++ b/src/libitm/Makefile.am
+@@ -107,14 +107,17 @@ endif
+ 
+ all-local: $(STAMP_GENINSRC)
+ 
+-stamp-geninsrc: libitm.info
+-	cp -p $(top_builddir)/libitm.info $(srcdir)/libitm.info
++INFO_LIBITM_NAME = $(shell echo libitm|sed '$(program_transform_name)')
++stamp-geninsrc: $(INFO_LIBITM_NAME).info
++	cp -p $(top_builddir)/$(INFO_LIBITM_NAME).info $(srcdir)/libitm.info
+ 	@touch $@
+ 
+-libitm.info: $(STAMP_BUILD_INFO)
++libitm.info: $(INFO_LIBITM_NAME).info
++       cp $(INFO_LIBITM_NAME).info libitm.info
++$(INFO_LIBITM_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ stamp-build-info: libitm.texi
+-	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libitm.info $(srcdir)/libitm.texi
++	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -D 'fnlibitm $(INFO_LIBITM_NAME)'-o $(INFO_LIBITM_NAME).info $(srcdir)/libitm.texi
+ 	@touch $@
+ 
+ 
+Index: b/src/libitm/Makefile.in
+===================================================================
+--- a/src/libitm/Makefile.in
++++ b/src/libitm/Makefile.in
+@@ -1057,14 +1057,17 @@ vpath % $(strip $(search_path))
+ 
+ all-local: $(STAMP_GENINSRC)
+ 
+-stamp-geninsrc: libitm.info
+-	cp -p $(top_builddir)/libitm.info $(srcdir)/libitm.info
++INFO_LIBITM_NAME = $(shell echo libitm|sed '$(program_transform_name)')
++stamp-geninsrc: $(INFO_LIBITM_NAME).info
++	cp -p $(top_builddir)/$(INFO_LIBITM_NAME).info $(srcdir)/libitm.info
+ 	@touch $@
+ 
+-libitm.info: $(STAMP_BUILD_INFO)
++libitm.info: $(INFO_LIBITM_NAME).info
++	cp $(INFO_LIBITM_NAME).info libitm.info
++$(INFO_LIBITM_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ stamp-build-info: libitm.texi
+-	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libitm.info $(srcdir)/libitm.texi
++	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -D 'fnlibitm $(INFO_LIBITM_NAME)' -o $(INFO_LIBITM_NAME).info $(srcdir)/libitm.texi
+ 	@touch $@
+ 
+ # Tell versions [3.59,3.63) of GNU make to not export all variables.
+Index: b/src/gcc/go/Make-lang.in
+===================================================================
+--- a/src/gcc/go/Make-lang.in
++++ b/src/gcc/go/Make-lang.in
+@@ -85,10 +85,11 @@ GO_TEXI_FILES = \
+ 	$(gcc_docdir)/include/gcc-common.texi \
+ 	gcc-vers.texi
+ 
+-doc/gccgo.info: $(GO_TEXI_FILES)
++INFO_GCCGO_NAME = $(shell echo gccgo|sed '$(program_transform_name)')
++doc/$(INFO_GCCGO_NAME).info: $(GO_TEXI_FILES)
+ 	if test "x$(BUILD_INFO)" = xinfo; then \
+-	  rm -f doc/gccgo.info*; \
+-	  $(MAKEINFO) $(MAKEINFOFLAGS) -I $(gcc_docdir) \
++	  rm -f doc/$(INFO_GCCGO_NAME).info*; \
++	  $(MAKEINFO) $(MAKEINFOFLAGS) $(MAKEINFODEFS) -I $(gcc_docdir) \
+ 		-I $(gcc_docdir)/include -o $@ $<; \
+ 	else true; fi
+ 
+@@ -114,7 +115,7 @@ gccgo.pod: go/gccgo.texi
+ go.all.cross: gccgo-cross$(exeext)
+ go.start.encap: gccgo$(exeext)
+ go.rest.encap:
+-go.info: doc/gccgo.info
++go.info: doc/$(INFO_GCCGO_NAME).info
+ go.dvi: doc/gccgo.dvi
+ go.pdf: doc/gccgo.pdf
+ go.html: $(build_htmldir)/go/index.html
+@@ -150,7 +151,7 @@ go.install-common: installdirs
+ 
+ go.install-plugin:
+ 
+-go.install-info: $(DESTDIR)$(infodir)/gccgo.info
++go.install-info: $(DESTDIR)$(infodir)/$(INFO_GCCGO_NAME).info
+ 
+ go.install-pdf: doc/gccgo.pdf
+ 	@$(NORMAL_INSTALL)
+@@ -190,7 +191,7 @@ go.uninstall:
+ 	rm -rf $(DESTDIR)$(bindir)/$(GCCGO_INSTALL_NAME)$(exeext)
+ 	rm -rf $(DESTDIR)$(man1dir)/$(GCCGO_INSTALL_NAME)$(man1ext)
+ 	rm -rf $(DESTDIR)$(bindir)/$(GCCGO_TARGET_INSTALL_NAME)$(exeext)
+-	rm -rf $(DESTDIR)$(infodir)/gccgo.info*
++	rm -rf $(DESTDIR)$(infodir)/$(INFO_GCCGO_NAME).info*
+ 
+ # Clean hooks.
+ 
+Index: b/src/gcc/go/gccgo.texi
+===================================================================
+--- a/src/gcc/go/gccgo.texi
++++ b/src/gcc/go/gccgo.texi
+@@ -50,7 +50,7 @@ man page gfdl(7).
+ @format
+ @dircategory Software development
+ @direntry
+-* Gccgo: (gccgo).           A GCC-based compiler for the Go language
++* @value{fngccgo}: (@value{fngccgo}).           A GCC-based compiler for the Go language
+ @end direntry
+ @end format
+ 
+@@ -123,7 +123,7 @@ and the Info entries for @file{gccgo} an
+ 
+ The @command{gccgo} command is a frontend to @command{gcc} and
+ supports many of the same options.  @xref{Option Summary, , Option
+-Summary, gcc, Using the GNU Compiler Collection (GCC)}.  This manual
++Summary, @value{fngcc}, Using the GNU Compiler Collection (GCC)}.  This manual
+ only documents the options specific to @command{gccgo}.
+ 
+ The @command{gccgo} command may be used to compile Go source code into
+Index: b/src/libquadmath/libquadmath.texi
+===================================================================
+--- a/src/libquadmath/libquadmath.texi
++++ b/src/libquadmath/libquadmath.texi
+@@ -25,7 +25,7 @@ copy and modify this GNU manual.
+ @ifinfo
+ @dircategory GNU Libraries
+ @direntry
+-* libquadmath: (libquadmath).                  GCC Quad-Precision Math Library
++* @value{fnlibquadmath}: (@value{fnlibquadmath}).                  GCC Quad-Precision Math Library
+ @end direntry
+ 
+ This manual documents the GCC Quad-Precision Math Library API.
+Index: b/src/libquadmath/Makefile.am
+===================================================================
+--- a/src/libquadmath/Makefile.am
++++ b/src/libquadmath/Makefile.am
+@@ -133,22 +133,24 @@ endif
+ 
+ all-local: $(STAMP_GENINSRC)
+ 
+-stamp-geninsrc: libquadmath.info
+-	cp -p $(top_builddir)/libquadmath.info $(srcdir)/libquadmath.info
++INFO_LIBQMATH_NAME = $(shell echo libquadmath|sed '$(program_transform_name)')
++
++stamp-geninsrc: $(INFO_LIBQMATH_NAME).info
++	cp -p $(top_builddir)/$(INFO_LIBQMATH_NAME).info $(srcdir)/libquadmath.info
+ 	@touch $@
+ 
+ stamp-build-info: libquadmath.texi $(libquadmath_TEXINFOS)
+-	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libquadmath.info $(srcdir)/libquadmath.texi
++	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o $(INFO_LIBQMATH_NAME).info $(srcdir)/libquadmath.texi
+ 	@touch $@
+ 
+-CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) libquadmath.info
+-MAINTAINERCLEANFILES = $(srcdir)/libquadmath.info
++CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) $(INFO_LIBQMATH_NAME).info
++MAINTAINERCLEANFILES = $(srcdir)/$(INFO_LIBQMATH_NAME).info
+ 
+ endif BUILD_LIBQUADMATH
+ 
+ # Unconditionally override this target, so that automake's definition
+ # does not wrongly interfere.
+-libquadmath.info: $(STAMP_BUILD_INFO)
++$(INFO_LIBQMATH_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ 
+ # Automake Documentation:
+Index: b/src/libquadmath/Makefile.in
+===================================================================
+--- a/src/libquadmath/Makefile.in
++++ b/src/libquadmath/Makefile.in
+@@ -169,7 +169,8 @@ MULTIDIRS =
+ MULTISUBDIR = 
+ MULTIDO = true
+ MULTICLEAN = true
+-INFO_DEPS = libquadmath.info
++INFO_LIBQMATH_NAME = $(shell echo libquadmath|sed '$(program_transform_name)')
++INFO_DEPS = $(INFO_LIBQMATH_NAME).info
+ am__TEXINFO_TEX_DIR = $(srcdir)/../gcc/doc/include
+ DVIS = libquadmath.dvi
+ PDFS = libquadmath.pdf
+@@ -406,8 +407,8 @@ AUTOMAKE_OPTIONS = 1.8 foreign
+ 
+ # AM_CONDITIONAL on configure check ACX_CHECK_PROG_VER([MAKEINFO])
+ @BUILD_INFO_TRUE@@BUILD_LIBQUADMATH_TRUE@STAMP_BUILD_INFO = stamp-build-info
+-@BUILD_LIBQUADMATH_TRUE@CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) libquadmath.info
+-@BUILD_LIBQUADMATH_TRUE@MAINTAINERCLEANFILES = $(srcdir)/libquadmath.info
++@BUILD_LIBQUADMATH_TRUE@CLEANFILES = $(STAMP_GENINSRC) $(STAMP_BUILD_INFO) $(INFO_LIBQMATH_NAME).info
++@BUILD_LIBQUADMATH_TRUE@MAINTAINERCLEANFILES = $(srcdir)/$(INFO_LIBQMATH_NAME).info
+ 
+ # Automake Documentation:
+ # If your package has Texinfo files in many directories, you can use the
+@@ -1466,17 +1467,17 @@ uninstall-am: uninstall-dvi-am uninstall
+ 
+ @BUILD_LIBQUADMATH_TRUE@all-local: $(STAMP_GENINSRC)
+ 
+-@BUILD_LIBQUADMATH_TRUE@stamp-geninsrc: libquadmath.info
+-@BUILD_LIBQUADMATH_TRUE@	cp -p $(top_builddir)/libquadmath.info $(srcdir)/libquadmath.info
++@BUILD_LIBQUADMATH_TRUE@stamp-geninsrc: $(INFO_LIBQMATH_NAME).info
++@BUILD_LIBQUADMATH_TRUE@	cp -p $(top_builddir)/$(INFO_LIBQMATH_NAME).info $(srcdir)/$(INFO_LIBQMATH_NAME).info
+ @BUILD_LIBQUADMATH_TRUE@	@touch $@
+ 
+ @BUILD_LIBQUADMATH_TRUE@stamp-build-info: libquadmath.texi $(libquadmath_TEXINFOS)
+-@BUILD_LIBQUADMATH_TRUE@	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o libquadmath.info $(srcdir)/libquadmath.texi
++@BUILD_LIBQUADMATH_TRUE@	$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) -o $(INFO_LIBQMATH_NAME).info $(srcdir)/libquadmath.texi
+ @BUILD_LIBQUADMATH_TRUE@	@touch $@
+ 
+ # Unconditionally override this target, so that automake's definition
+ # does not wrongly interfere.
+-libquadmath.info: $(STAMP_BUILD_INFO)
++$(INFO_LIBQMATH_NAME).info: $(STAMP_BUILD_INFO)
+ 
+ libquadmath-vers.texi:
+ 	echo "@set BUGURL $(REPORT_BUGS_TEXI)" > $@
--- gcc-5-5.4.0.orig/debian/patches/skip-bootstrap-multilib.diff
+++ gcc-5-5.4.0/debian/patches/skip-bootstrap-multilib.diff
@@ -0,0 +1,49 @@
+# DP: Skip non-default multilib and libstdc++-v3 debug builds in bootstrap builds
+
+Index: b/src/config-ml.in
+===================================================================
+--- a/src/config-ml.in
++++ b/src/config-ml.in
+@@ -479,6 +479,17 @@ esac
+ # Tests like `if [ -n "$multidirs" ]' require it.
+ multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'`
+ 
++# stage1 and stage2 builds of the non-default multilib configurations
++# are not needed; skip these to save some build time.
++if [ -f ../../stage_final ] && [ -f ../../stage_current ]; then
++    stage_final=`cat ../../stage_final`
++    stage_current=`cat ../../stage_current`
++    if [ "$stage_current" != "$stage_final" ]; then
++	echo "Skip `basename $ml_realsrcdir` non-default multilibs for bootstrap stage $stage_current"
++	multidirs=
++    fi
++fi
++
+ # Add code to library's top level makefile to handle building the multilib
+ # subdirs.
+ 
+Index: b/src/libstdc++-v3/acinclude.m4
+===================================================================
+--- a/src/libstdc++-v3/acinclude.m4
++++ b/src/libstdc++-v3/acinclude.m4
+@@ -2503,7 +2503,20 @@ dnl
+ AC_DEFUN([GLIBCXX_ENABLE_DEBUG], [
+   AC_MSG_CHECKING([for additional debug build])
+   GLIBCXX_ENABLE(libstdcxx-debug,$1,,[build extra debug library])
++  if test x$enable_libstdcxx_debug = xyes; then
++    if test -f $toplevel_builddir/../stage_final && test -f $toplevel_builddir/../stage_current; then
++      stage_final=`cat $toplevel_builddir/../stage_final`
++      stage_current=`cat $toplevel_builddir/../stage_current`
++      if test x$stage_current != x$stage_final ; then
++	skip_debug_build=yes
++	enable_libstdcxx_debug=no
++      fi
++    fi
++  fi
+   AC_MSG_RESULT($enable_libstdcxx_debug)
++  if test x$skip_debug_build = xyes ; then
++    AC_MSG_NOTICE([Skip libstdc++-v3 debug build for bootstrap stage $stage_current])
++  fi
+   GLIBCXX_CONDITIONAL(GLIBCXX_BUILD_DEBUG, test $enable_libstdcxx_debug = yes)
+ ])
+ 
--- gcc-5-5.4.0.orig/debian/patches/sparc-force-cpu.diff
+++ gcc-5-5.4.0/debian/patches/sparc-force-cpu.diff
@@ -0,0 +1,27 @@
+# DP: On sparc default to ultrasparc (v9a) in 32bit mode
+
+Index: b/src/gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -4369,6 +4369,20 @@ do
+ 			;;
+ 		esac
+ 
++		# setting this directly fails to build a biarch defaulting to 32bit
++		case "$target" in
++		    sparc-*-linux*)
++			if test "$option" = cpu; then
++				val=ultrasparc
++			fi
++			;;
++		    DISABLEDsparc64-*-linux*)
++			if test "$option" = cpu_32; then
++				val=ultrasparc
++			fi
++			;;
++		esac
++
+ 		if test "x$t" = x
+ 		then
+ 			t="{ \"$option\", \"$val\" }"
--- gcc-5-5.4.0.orig/debian/patches/sparc64-biarch-long-double-128.diff
+++ gcc-5-5.4.0/debian/patches/sparc64-biarch-long-double-128.diff
@@ -0,0 +1,35 @@
+# DP: Fix --with-long-double-128 for sparc32 when defaulting to 64-bit.
+
+On sparc, the --with-long-double-128 option doesn't change anything for
+a 64-bit compiler, as it always default to 128-bit long doubles. For
+a 32/64-bit compiler defaulting to 32-bit this correctly control the
+size of long double of the 32-bit compiler, however for a 32/64-bit
+compiler defaulting to 64-bit, the built-in specs force the 
+-mlong-double-64 option. This makes the option useless in this case.
+
+The patch below fixes that by removing the -mlong-double-64 from the
+built-in spec, using the default instead.
+
+Changelog gcc/
+
+2013-12-04  Aurelien Jarno  <aurelien@aurel32.net>
+
+	* config/sparc/linux64.h (CC1_SPEC): When defaulting to 64-bit,
+	don't force -mlong-double-64 when -m32 or -mv8plus is given.
+
+Index: b/src/gcc/config/sparc/linux64.h
+===================================================================
+--- a/src/gcc/config/sparc/linux64.h
++++ b/src/gcc/config/sparc/linux64.h
+@@ -154,9 +154,9 @@ extern const char *host_detect_local_cpu
+ #else
+ #define CC1_SPEC "%{profile:-p} \
+ %{m32:%{m64:%emay not use both -m32 and -m64}} \
+-%{m32:-mptr32 -mno-stack-bias %{!mlong-double-128:-mlong-double-64} \
++%{m32:-mptr32 -mno-stack-bias \
+   %{!mcpu*:-mcpu=cypress}} \
+-%{mv8plus:-mptr32 -mno-stack-bias %{!mlong-double-128:-mlong-double-64} \
++%{mv8plus:-mptr32 -mno-stack-bias \
+   %{!mcpu*:-mcpu=v9}} \
+ %{!m32:%{!mcpu*:-mcpu=ultrasparc}} \
+ %{!mno-vis:%{!m32:%{!mcpu=v9:-mvis}}} \
--- gcc-5-5.4.0.orig/debian/patches/svn-class-updates.diff
+++ gcc-5-5.4.0/debian/patches/svn-class-updates.diff
@@ -0,0 +1,27 @@
+# DP: updated class files from the 4.8 branch upto yyyymmdd.
+
+dir=gcc-4_8-branch
+dir=/scratch/packages/gcc/svn/gcc-4_8-branch
+tag=gcc_4_8_0_release
+branch=gcc-4_8-branch
+
+tmplist=files$$
+
+svn diff --summarize \
+        svn://gcc.gnu.org/svn/gcc/tags/$tag \
+        svn://gcc.gnu.org/svn/gcc/branches/$branch \
+    | grep '\.class$' > $tmplist
+
+sed -n '/^[AM].*\.class$/s,.*/'$tag'/\(.*\),\1,p' $tmplist \
+    > neworchanged.list
+sed -n '/^[D].*\.class$/s,.*/'$tag'/\(.*\),\1,p' $tmplist \
+    > removed.list
+sed -n '/^[^ADM].*\.class$/s,.*/'$tag'/\(.*\),\1,p' $tmplist \
+    > unknown.list
+
+echo "new or changed: $(wc -l neworchanged.list | cut '-d ' -f1), removed $(wc -l removed.list | cut '-d ' -f1): , unknown: $(wc -l unknown.list | cut '-d ' -f1)"
+tar -c -J -f java-class-files.tar.xz -C $dir -T neworchanged.list
+uuencode java-class-files.tar.xz java-class-files.tar.xz > java-class-files.tar.xz.uue
+
+rm -f $tmplist neworchanged.list removed.list unknown.list
+
--- gcc-5-5.4.0.orig/debian/patches/svn-doc-updates.diff
+++ gcc-5-5.4.0/debian/patches/svn-doc-updates.diff
@@ -0,0 +1,6 @@
+# DP: updates from the 5 branch upto 2016xxyy (documentation).
+
+svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_5_4_0_release svn://gcc.gnu.org/svn/gcc/branches/gcc-5-branch \
+	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
+	| awk '/^Index:.*\.texi/ {skip=0; print; next} /^Index:/ {skip=1; next} skip==0'
+
--- gcc-5-5.4.0.orig/debian/patches/svn-updates.diff
+++ gcc-5-5.4.0/debian/patches/svn-updates.diff
@@ -0,0 +1,420 @@
+# DP: updates from the 5 branch upto 2016xxxx (r237045).
+
+last_update()
+{
+	cat > ${dir}LAST_UPDATED <EOF
+Thu Jun  2 23:09:55 CEST 2016
+Thu Jun  2 21:09:55 UTC 2016 (revision 237045)
+EOF
+}
+
+LANG=C svn diff svn://gcc.gnu.org/svn/gcc/tags/gcc_5_4_0_release svn://gcc.gnu.org/svn/gcc/branches/gcc-5-branch \
+	| sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \
+	| awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0'
+
+Index: gcc/DATESTAMP
+===================================================================
+--- a/src/gcc/DATESTAMP	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/DATESTAMP	(.../branches/gcc-5-branch)
+@@ -1 +1 @@
+-20160603
++20160609
+Index: gcc/ChangeLog
+===================================================================
+--- a/src/gcc/ChangeLog	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/ChangeLog	(.../branches/gcc-5-branch)
+@@ -1,3 +1,40 @@
++2016-06-07  Peter Bergner  <bergner@vnet.ibm.com>
++
++	Backport from mainline
++	2016-06-07  Peter Bergner  <bergner@vnet.ibm.com>
++
++	* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mhtm and
++	-mno-htm.
++
++2016-06-07  Uros Bizjak  <ubizjak@gmail.com>
++
++	PR target/71389
++	* config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
++	Copy op1 RTX to avoid invalid sharing.
++	(ix86_expand_vector_move_misalign): Ditto.
++
++2016-06-05  Uros Bizjak  <ubizjak@gmail.com>
++
++	Backport from mainline
++	2016-06-01  Uros Bizjak  <ubizjak@gmail.com>
++		    Jocelyn Mayer  <l_indien@magic.fr>
++
++	PR target/67310
++	* config/i386/driver-i386.c (host_detect_local_cpu): Correctly
++	detect processor family for signature_CENTAUR_ebx.
++	<case PROCESSOR_I486>: Pass c3, winchip2 or winchip-c6 for
++	signature_CENTAUR_ebx.
++	<case PROCESSOR _PENTIUMPRO>: Pass c3-2 for signature_CENTAUR_ebx.
++	<default>: Pass x86-64 for has_longmode.
++
++2016-06-03  Andreas Tobler  <andreast@gcc.gnu.org>
++
++	Backport from mainline
++	2016-05-30  Andreas Tobler  <andreast@gcc.gnu.org>
++
++	* config.gcc: Move hard float support for arm*hf*-*-freebsd* into
++	armv6*-*-freebsd* for FreeBSD 11. Eliminate the arm*hf*-*-freebsd*
++	target.
+ 2016-06-03  Release Manager
+ 
+ 	* GCC 5.4.0 released.
+@@ -34,7 +76,7 @@
+ 
+ 	2016-03-24  Richard Henderson  <rth@redhat.com>
+ 
+-        PR middle-end/69845
++	PR middle-end/69845
+ 	* fold-const.c (extract_muldiv_1): Correct test for multiplication
+ 	overflow.
+ 
+@@ -2192,7 +2234,7 @@
+ 
+ 	Backport from mainline
+ 	2015-11-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+-	            Bernd Schmidt  <bschmidt@redhat.com>
++		    Bernd Schmidt  <bschmidt@redhat.com>
+ 
+ 	PR rtl-optimization/67226
+ 	* calls.c (store_one_arg): Take into account
+@@ -2252,7 +2294,7 @@
+ 
+ 	Backport from mainline
+ 	2015-11-24  Bernd Schmidt <bschmidt@redhat.com>
+-	            Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
++		    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+ 
+ 	PR rtl-optimization/68194
+ 	PR rtl-optimization/68328
+@@ -2525,7 +2567,7 @@
+ 
+ 	Backport from mainline
+ 	2015-11-16  Oleg Endo  <olegendo@gcc.gnu.org>
+-	            Kaz Kojima  <kkojima@gcc.gnu.org>
++		    Kaz Kojima  <kkojima@gcc.gnu.org>
+ 
+ 	PR target/68277
+ 	* config/sh/sh.md (addsi3_scr): Handle reg overlap of operands[0] and
+@@ -2599,7 +2641,7 @@
+ 
+ 	Backport from mainline
+ 	2015-10-23  Steve Ellcey  <sellcey@imgtec.com>
+-	            Andrew Pinski  <apinski@cavium.com>
++		    Andrew Pinski  <apinski@cavium.com>
+ 
+ 	PR rtl-optimization/67736
+ 	* combine.c (simplify_comparison): Use gen_lowpart_or_truncate instead
+Index: gcc/testsuite/ChangeLog
+===================================================================
+--- a/src/gcc/testsuite/ChangeLog	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/testsuite/ChangeLog	(.../branches/gcc-5-branch)
+@@ -1,3 +1,13 @@
++2016-06-08  Jakub Jelinek  <jakub@redhat.com>
++
++	PR c++/71442
++	* g++.dg/cpp0x/Wunused-variable-1.C: New test.
++
++2016-06-07  Uros Bizjak  <ubizjak@gmail.com>
++
++	PR target/71389
++	* g++.dg/pr71389.C: New test.
++
+ 2016-06-03  Release Manager
+ 
+ 	* GCC 5.4.0 released.
+@@ -31,7 +41,7 @@
+ 	* gcc.dg/pr69634.c: New.
+ 
+ 	2016-03-23  Patrick Palka  <ppalka@gcc.gnu.org>
+- 
++
+ 	PR c++/70347
+ 	* g++.dg/cpp1y/nsdmi-union1.C: New test.
+ 
+@@ -42,7 +52,7 @@
+ 
+ 	2016-03-24  Richard Henderson  <rth@redhat.com>
+ 
+-        PR middle-end/69845
++	PR middle-end/69845
+ 	* gcc.dg/tree-ssa/pr69845-1.c: New test.
+ 	* gcc.dg/tree-ssa/pr69845-2.c: New test.
+ 
+@@ -105,8 +115,8 @@
+ 	PR middle-end/67278
+ 	* gcc.dg/simd-7.c: Add -w -Wno-psabi to dg-options.
+ 
+- 	PR target/67278
+- 	* gcc.dg/simd-8.c: Add -w -Wno-psabi to dg-options.
++	PR target/67278
++	* gcc.dg/simd-8.c: Add -w -Wno-psabi to dg-options.
+ 
+ 2016-05-20  Richard Biener  <rguenther@suse.de>
+ 
+@@ -130,13 +140,13 @@
+ 	* gcc.dg/torture/pr70941.c: New testcase.
+ 
+ 	2016-05-06  Jakub Jelinek  <jakub@redhat.com>
+- 
++
+ 	PR middle-end/70941
+ 	* gcc.dg/torture/pr70941.c (abort): Remove prototype.
+ 	(a, b, c, d): Change type from char to signed char.
+ 	(main): Compare against (signed char) -1634678893 instead of
+ 	hardcoded -109.  Use __builtin_abort instead of abort.
+- 
++
+ 	2016-05-06  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR middle-end/70931
+Index: gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/testsuite/g++.dg/cpp0x/Wunused-variable-1.C	(.../branches/gcc-5-branch)
+@@ -0,0 +1,37 @@
++// PR c++/71442
++// { dg-do compile { target c++11 } }
++// { dg-options "-Wunused-variable" }
++
++struct C
++{
++  template<typename... Ts>
++  int operator()(Ts &&...)
++  {
++    return sizeof...(Ts);
++  }
++};
++
++int
++foo ()
++{
++  C {} (1, 1L, 1LL, 1.0);
++}
++
++template<int N>
++void
++bar ()
++{
++  char a;		// { dg-warning "unused variable" }
++  short b;		// { dg-warning "unused variable" }
++  int c;		// { dg-warning "unused variable" }
++  long d;		// { dg-warning "unused variable" }
++  long long e;		// { dg-warning "unused variable" }
++  float f;		// { dg-warning "unused variable" }
++  double g;		// { dg-warning "unused variable" }
++}
++
++void
++baz ()
++{
++  bar <0> ();
++}
+Index: gcc/testsuite/g++.dg/pr71389.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/pr71389.C	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/testsuite/g++.dg/pr71389.C	(.../branches/gcc-5-branch)
+@@ -0,0 +1,23 @@
++// { dg-do compile { target i?86-*-* x86_64-*-* } }
++// { dg-options "-std=c++11 -O3 -march=ivybridge" }
++
++#include <functional>
++
++extern int le_s6, le_s9, le_s11;
++long foo_v14[16][16];
++
++void fn1() {
++  std::array<std::array<int, 16>, 16> v13;
++  for (; le_s6;)
++    for (int k1 = 2; k1 < 4; k1 = k1 + 1) {
++      for (int n1 = 0; n1 < le_s9; n1 = 8) {
++        *foo_v14[6] = 20923310;
++        for (int i2 = n1; i2 < n1 + 8; i2 = i2 + 1)
++          v13.at(5).at(i2 + 6 - n1) = 306146921;
++      }
++
++      for (int l2 = 0; l2 < le_s11; l2 = l2 + 1)
++          *(l2 + v13.at(5).begin()) = 306146921;
++    }
++  v13.at(le_s6 - 4);
++}
+Index: gcc/cp/ChangeLog
+===================================================================
+--- a/src/gcc/cp/ChangeLog	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/cp/ChangeLog	(.../branches/gcc-5-branch)
+@@ -1,3 +1,8 @@
++2016-06-08  Jakub Jelinek  <jakub@redhat.com>
++
++	PR c++/71442
++	* pt.c (tsubst_copy): Only set TREE_USED on DECLs.
++
+ 2016-06-03  Release Manager
+ 
+ 	* GCC 5.4.0 released.
+Index: gcc/cp/pt.c
+===================================================================
+--- a/src/gcc/cp/pt.c	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/cp/pt.c	(.../branches/gcc-5-branch)
+@@ -13287,7 +13287,8 @@
+ 	      len = TREE_VEC_LENGTH (expanded);
+ 	      /* Set TREE_USED for the benefit of -Wunused.  */
+ 	      for (int i = 0; i < len; i++)
+-		TREE_USED (TREE_VEC_ELT (expanded, i)) = true;
++		if (DECL_P (TREE_VEC_ELT (expanded, i)))
++		  TREE_USED (TREE_VEC_ELT (expanded, i)) = true;
+ 	    }
+ 
+ 	  if (expanded == error_mark_node)
+Index: gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/config.gcc	(.../branches/gcc-5-branch)
+@@ -1026,13 +1026,11 @@
+ 	case $target in
+ 	armv6*-*-freebsd*)
+ 	    tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1"
++            if test $fbsd_major -ge 11; then
++               tm_defines="${tm_defines} TARGET_FREEBSD_ARM_HARD_FLOAT=1"
++            fi
+ 	    ;;
+ 	esac
+-	case $target in
+-	arm*hf-*-freebsd*)
+-	    tm_defines="${tm_defines} TARGET_FREEBSD_ARM_HARD_FLOAT=1"
+-	    ;;
+-	esac
+ 	with_tls=${with_tls:-gnu}
+ 	;;
+ arm*-*-netbsdelf*)
+Index: gcc/config/i386/driver-i386.c
+===================================================================
+--- a/src/gcc/config/i386/driver-i386.c	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/config/i386/driver-i386.c	(.../branches/gcc-5-branch)
+@@ -630,33 +630,27 @@
+     }
+   else if (vendor == signature_CENTAUR_ebx)
+     {
+-      if (arch)
++      processor = PROCESSOR_GENERIC;
++
++      switch (family)
+ 	{
+-	  switch (family)
+-	    {
+-	    case 6:
+-	      if (model > 9)
+-		/* Use the default detection procedure.  */
+-		processor = PROCESSOR_GENERIC;
+-	      else if (model == 9)
+-		cpu = "c3-2";
+-	      else if (model >= 6)
+-		cpu = "c3";
+-	      else
+-		processor = PROCESSOR_GENERIC;
+-	      break;
+-	    case 5:
+-	      if (has_3dnow)
+-		cpu = "winchip2";
+-	      else if (has_mmx)
+-		cpu = "winchip2-c6";
+-	      else
+-		processor = PROCESSOR_GENERIC;
+-	      break;
+-	    default:
+-	      /* We have no idea.  */
+-	      processor = PROCESSOR_GENERIC;
+-	    }
++	default:
++	  /* We have no idea.  */
++	  break;
++
++	case 5:
++	  if (has_3dnow || has_mmx)
++	    processor = PROCESSOR_I486;
++	  break;
++
++	case 6:
++	  if (model > 9 || has_longmode)
++	    /* Use the default detection procedure.  */
++	    ;
++	  else if (model == 9)
++	    processor = PROCESSOR_PENTIUMPRO;
++	  else if (model >= 6)
++	    processor = PROCESSOR_I486;
+ 	}
+     }
+   else
+@@ -687,7 +681,18 @@
+       /* Default.  */
+       break;
+     case PROCESSOR_I486:
+-      cpu = "i486";
++      if (arch && vendor == signature_CENTAUR_ebx)
++	{
++	  if (model >= 6)
++	    cpu = "c3";
++	  else if (has_3dnow)
++	    cpu = "winchip2";
++	  else
++	    /* Assume WinChip C6.  */
++	    cpu = "winchip-c6";
++	}
++      else
++	cpu = "i486";
+       break;
+     case PROCESSOR_PENTIUM:
+       if (arch && has_mmx)
+@@ -804,8 +809,13 @@
+ 		/* It is Pentium M.  */
+ 		cpu = "pentium-m";
+ 	      else if (has_sse)
+-		/* It is Pentium III.  */
+-		cpu = "pentium3";
++		{
++		  if (vendor == signature_CENTAUR_ebx)
++		    cpu = "c3-2";
++		  else
++		    /* It is Pentium III.  */
++		    cpu = "pentium3";
++		}
+ 	      else if (has_mmx)
+ 		/* It is Pentium II.  */
+ 		cpu = "pentium2";
+@@ -886,6 +896,11 @@
+ 	      else
+ 		cpu = "prescott";
+ 	    }
++	  else if (has_longmode)
++	    /* Perhaps some emulator?  Assume x86-64, otherwise gcc
++	       -march=native would be unusable for 64-bit compilations,
++	       as all the CPUs below are 32-bit only.  */
++	    cpu = "x86-64";
+ 	  else if (has_sse2)
+ 	    cpu = "pentium4";
+ 	  else if (has_cmov)
+Index: gcc/config/i386/i386.c
+===================================================================
+--- a/src/gcc/config/i386/i386.c	(.../tags/gcc_5_4_0_release)
++++ b/src/gcc/config/i386/i386.c	(.../branches/gcc-5-branch)
+@@ -17707,7 +17707,7 @@
+ 	  m = adjust_address (op0, mode, 0);
+ 	  emit_insn (extract (m, op1, const0_rtx));
+ 	  m = adjust_address (op0, mode, 16);
+-	  emit_insn (extract (m, op1, const1_rtx));
++	  emit_insn (extract (m, copy_rtx (op1), const1_rtx));
+ 	}
+       else
+ 	emit_insn (store_unaligned (op0, op1));
+@@ -18015,7 +18015,7 @@
+ 	      m = adjust_address (op0, V2SFmode, 0);
+ 	      emit_insn (gen_sse_storelps (m, op1));
+ 	      m = adjust_address (op0, V2SFmode, 8);
+-	      emit_insn (gen_sse_storehps (m, op1));
++	      emit_insn (gen_sse_storehps (m, copy_rtx (op1)));
+ 	    }
+ 	}
+     }
--- gcc-5-5.4.0.orig/debian/patches/sys-auxv-header.diff
+++ gcc-5-5.4.0/debian/patches/sys-auxv-header.diff
@@ -0,0 +1,46 @@
+# DP: Check for the sys/auxv.h header file.
+
+Index: b/src/gcc/configure.ac
+===================================================================
+--- a/src/gcc/configure.ac
++++ b/src/gcc/configure.ac
+@@ -1032,6 +1032,7 @@ AC_HEADER_TIOCGWINSZ
+ AC_CHECK_HEADERS(limits.h stddef.h string.h strings.h stdlib.h time.h iconv.h \
+ 		 fcntl.h ftw.h unistd.h sys/file.h sys/time.h sys/mman.h \
+ 		 sys/resource.h sys/param.h sys/times.h sys/stat.h \
++		 sys/auxv.h \
+ 		 direct.h malloc.h langinfo.h ldfcn.h locale.h wchar.h)
+ 
+ # Check for thread headers.
+Index: b/src/gcc/config.in
+===================================================================
+--- a/src/gcc/config.in
++++ b/src/gcc/config.in
+@@ -1652,6 +1652,12 @@
+ #endif
+ 
+ 
++/* Define to 1 if you have the <sys/auxv.h> header file. */
++#ifndef USED_FOR_TARGET
++#undef HAVE_SYS_AUXV_H
++#endif
++
++
+ /* Define to 1 if you have the <sys/file.h> header file. */
+ #ifndef USED_FOR_TARGET
+ #undef HAVE_SYS_FILE_H
+Index: b/src/gcc/config/rs6000/driver-rs6000.c
+===================================================================
+--- a/src/gcc/config/rs6000/driver-rs6000.c
++++ b/src/gcc/config/rs6000/driver-rs6000.c
+@@ -31,6 +31,10 @@ along with GCC; see the file COPYING3.
+ # include <link.h>
+ #endif
+ 
++#ifdef HAVE_SYS_AUXV_H
++# include <sys/auxv.h>
++#endif
++
+ #if defined (__APPLE__) || (__FreeBSD__)
+ # include <sys/types.h>
+ # include <sys/sysctl.h>
--- gcc-5-5.4.0.orig/debian/patches/testsuite-glibc-warnings.diff
+++ gcc-5-5.4.0/debian/patches/testsuite-glibc-warnings.diff
@@ -0,0 +1,29 @@
+# DP: fix testcases that triggered -Wunused-result with glibc
+# DP: Author: Steve Beattie <steve.beattie@canonical.com>
+---
+ src/gcc/testsuite/c-c++-common/cilk-plus/AN/comma_exp.c |    2 +-
+ src/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c      |    1 +
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+Index: b/src/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c
++++ b/src/gcc/testsuite/c-c++-common/tsan/fd_pipe_race.c
+@@ -1,5 +1,5 @@
+ /* { dg-shouldfail "tsan" } */
+-/* { dg-additional-options "-ldl" } */
++/* { dg-additional-options "-Wno-unused-result -ldl" } */
+ 
+ #include <pthread.h>
+ #include <unistd.h>
+Index: b/src/gcc/testsuite/c-c++-common/cilk-plus/AN/comma_exp.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/AN/comma_exp.c
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/AN/comma_exp.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-options "-fcilkplus" } */
++/* { dg-options "-fcilkplus -Wno-unused-result" } */
+ 
+ #include <stdlib.h>
+ 
--- gcc-5-5.4.0.orig/debian/patches/testsuite-hardening-format.diff
+++ gcc-5-5.4.0/debian/patches/testsuite-hardening-format.diff
@@ -0,0 +1,382 @@
+#! /bin/sh -e
+
+# All lines beginning with `# DPATCH:' are a description of the patch.
+# DP: Description: use -Wno-format on tests that cannot be adjusted other ways.
+# DP: Author: Kees Cook <kees@ubuntu.com>
+# DP: Ubuntu: https://bugs.launchpad.net/bugs/344502
+
+dir=
+if [ $# -eq 3 -a "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+    -patch)
+        patch $pdir -f --no-backup-if-mismatch -p1 < $0
+        #cd ${dir}gcc && autoconf
+        ;;
+    -unpatch)
+        patch $pdir -f --no-backup-if-mismatch -R -p1 < $0
+        #rm ${dir}gcc/configure
+        ;;
+    *)
+        echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+        exit 1
+esac
+exit 0
+
+---
+ src/boehm-gc/testsuite/boehm-gc.c/middle.c                 |    3 +++
+ src/gcc/testsuite/c-c++-common/torture/vector-compare-1.c  |    1 +
+ src/gcc/testsuite/g++.dg/abi/pragma-pack1.C                |    2 ++
+ src/gcc/testsuite/g++.dg/abi/regparm1.C                    |    1 +
+ src/gcc/testsuite/g++.dg/cpp0x/constexpr-tuple.C           |    1 +
+ src/gcc/testsuite/g++.dg/torture/pr51436.C                 |    1 +
+ src/gcc/testsuite/g++.old-deja/g++.law/weak.C              |    2 +-
+ src/gcc/testsuite/g++.old-deja/g++.other/std1.C            |    1 +
+ src/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.x   |    5 +++++
+ src/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.x    |    5 +++++
+ src/gcc/testsuite/gcc.dg/charset/builtin2.c                |    2 +-
+ src/gcc/testsuite/gcc.dg/format/format.exp                 |    2 +-
+ src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c                   |    2 +-
+ src/gcc/testsuite/gcc.dg/lto/20090218-2_0.c                |    2 ++
+ src/gcc/testsuite/gcc.dg/pr30473.c                         |    2 +-
+ src/gcc/testsuite/gcc.dg/pr38902.c                         |    2 +-
+ src/gcc/testsuite/gcc.dg/pr59418.c                         |    2 +-
+ src/gcc/testsuite/gcc.dg/torture/tls/tls-test.c            |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c      |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c  |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c       |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c   |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c     |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c      |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c  |    2 +-
+ src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c              |    2 +-
+ src/gcc/testsuite/objc.dg/torture/strings/const-str-3.m    |    2 +-
+ 28 files changed, 40 insertions(+), 18 deletions(-)
+
+Index: b/src/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.x
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.x
+@@ -0,0 +1,5 @@
++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to
++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567
++
++set additional_flags "-U_FORTIFY_SOURCE"
++return 0
+Index: b/src/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.x
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.x
+@@ -0,0 +1,5 @@
++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to
++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567
++
++set additional_flags "-U_FORTIFY_SOURCE"
++return 0
+Index: b/src/gcc/testsuite/gcc.dg/charset/builtin2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/charset/builtin2.c
++++ b/src/gcc/testsuite/gcc.dg/charset/builtin2.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-require-iconv "IBM1047" } */
+-/* { dg-options "-O2 -fexec-charset=IBM1047" } */
++/* { dg-options "-O2 -fexec-charset=IBM1047 -Wno-format" } */
+ /* { dg-final { scan-assembler-not "printf" } } */
+ /* { dg-final { scan-assembler-not "fprintf" } } */
+ /* { dg-final { scan-assembler-not "sprintf" } } */
+Index: b/src/gcc/testsuite/gcc.dg/format/format.exp
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/format/format.exp
++++ b/src/gcc/testsuite/gcc.dg/format/format.exp
+@@ -26,7 +26,7 @@ load_lib gcc-dg.exp
+ load_lib torture-options.exp
+ 
+ torture-init
+-set-torture-options [list { } { -DWIDE } ]
++set-torture-options [list { -Wformat=0 } { -DWIDE -Wformat=0 } ]
+ 
+ dg-init
+ gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] "" ""
+Index: b/src/gcc/testsuite/gcc.dg/pr30473.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr30473.c
++++ b/src/gcc/testsuite/gcc.dg/pr30473.c
+@@ -1,7 +1,7 @@
+ /* PR middle-end/30473 */
+ /* Make sure this doesn't ICE.  */
+ /* { dg-do compile } */
+-/* { dg-options "-O2" } */
++/* { dg-options "-O2 -Wno-format" } */
+ 
+ extern int sprintf (char *, const char *, ...);
+ 
+Index: b/src/gcc/testsuite/gcc.dg/pr38902.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr38902.c
++++ b/src/gcc/testsuite/gcc.dg/pr38902.c
+@@ -1,6 +1,6 @@
+ /* PR target/38902 */
+ /* { dg-do run } */
+-/* { dg-options "-O2 -fstack-protector" } */
++/* { dg-options "-O2 -fstack-protector -Wno-format" } */
+ /* { dg-require-effective-target fstack_protector } */
+ 
+ #ifdef DEBUG
+Index: b/src/gcc/testsuite/gcc.dg/pr59418.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pr59418.c
++++ b/src/gcc/testsuite/gcc.dg/pr59418.c
+@@ -2,7 +2,7 @@
+ /* Reported by Ryan Mansfield <rmansfield@qnx.com> */
+ 
+ /* { dg-do compile } */
+-/* { dg-options "-Os -g" } */
++/* { dg-options "-Os -g -Wno-format-zero-length" } */
+ /* { dg-options "-march=armv7-a -mfloat-abi=hard -Os -g" { target { arm*-*-* && { ! arm_thumb1 } } } } */
+ 
+ extern int printf (const char *__format, ...);
+Index: b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c
++++ b/src/gcc/testsuite/gcc.dg/ipa/ipa-sra-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-options "-O2 -fipa-sra -fdump-tree-eipa_sra-details"  } */
++/* { dg-options "-O2 -fipa-sra -fdump-tree-eipa_sra-details -Wformat=0"  } */
+ 
+ struct bovid
+ {
+Index: b/src/gcc/testsuite/gcc.dg/lto/20090218-2_0.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/lto/20090218-2_0.c
++++ b/src/gcc/testsuite/gcc.dg/lto/20090218-2_0.c
+@@ -1,3 +1,5 @@
++/* { dg-lto-options "-Wno-nonnull" } */
++
+ void set_mem_alias_set ();
+ void emit_push_insn () {
+   set_mem_alias_set ();
+Index: b/src/gcc/testsuite/c-c++-common/torture/vector-compare-1.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/torture/vector-compare-1.c
++++ b/src/gcc/testsuite/c-c++-common/torture/vector-compare-1.c
+@@ -1,4 +1,5 @@
+ /* { dg-do run } */
++/* { dg-options "-Wformat=0" } */
+ #define vector(elcount, type)  \
+ __attribute__((vector_size((elcount)*sizeof(type)))) type
+ 
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/isolate-4.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */ 
+-/* { dg-options "-O2 -fisolate-erroneous-paths-attribute -fdump-tree-isolate-paths -fdump-tree-phicprop1" } */
++/* { dg-options "-O2 -fisolate-erroneous-paths-attribute -fdump-tree-isolate-paths -fdump-tree-phicprop1 -Wno-nonnull" } */
+ /* { dg-skip-if "" keeps_null_pointer_checks } */
+ 
+ 
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-chk-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ #include <stdarg.h>
+ 
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vprintf-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ #include <stdarg.h>
+ 
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ extern int printf (const char *, ...);
+ volatile int vi0, vi1, vi2, vi3, vi4, vi5, vi6, vi7, vi8, vi9, via;
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-printf-chk-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ extern int __printf_chk (int, const char *, ...);
+ volatile int vi0, vi1, vi2, vi3, vi4, vi5, vi6, vi7, vi8, vi9, via;
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ typedef struct { int i; } FILE;
+ FILE *fp;
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-fprintf-chk-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ typedef struct { int i; } FILE;
+ FILE *fp;
+Index: b/src/gcc/testsuite/gcc.dg/torture/tls/tls-test.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/torture/tls/tls-test.c
++++ b/src/gcc/testsuite/gcc.dg/torture/tls/tls-test.c
+@@ -1,7 +1,7 @@
+ /* { dg-do run }  */
+ /* { dg-require-effective-target tls  }  */
+ /* { dg-require-effective-target pthread } */
+-/* { dg-options "-pthread" } */
++/* { dg-options "-pthread -Wformat=0" } */
+ 
+ #include <pthread.h>
+ extern int printf (char *,...);
+Index: b/src/boehm-gc/testsuite/boehm-gc.c/middle.c
+===================================================================
+--- a/src/boehm-gc/testsuite/boehm-gc.c/middle.c
++++ b/src/boehm-gc/testsuite/boehm-gc.c/middle.c
+@@ -2,6 +2,9 @@
+  * Test at the boundary between small and large objects.
+  * Inspired by a test case from Zoltan Varga.
+  */
++
++/* { dg-options "-Wformat=0" } */
++
+ #include <gc.h>
+ #include <stdio.h>
+ 
+Index: b/src/gcc/testsuite/objc.dg/torture/strings/const-str-3.m
+===================================================================
+--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-3.m
++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-3.m
+@@ -2,7 +2,7 @@
+ /* Developed by Markus Hitter <mah@jump-ing.de>.  */
+ /* { dg-do run } */
+ /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */
+-/* { dg-options "-fconstant-string-class=Foo" } */
++/* { dg-options "-fconstant-string-class=Foo -Wno-format-security" } */
+ /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=Foo" { target *-*-darwin* } } */
+ 
+ #include "../../../objc-obj-c++-shared/objc-test-suite-types.h"
+Index: b/src/gcc/testsuite/g++.dg/abi/pragma-pack1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/abi/pragma-pack1.C
++++ b/src/gcc/testsuite/g++.dg/abi/pragma-pack1.C
+@@ -1,5 +1,7 @@
+ // PR c++/7046
+ 
++// { dg-options "-Wformat=0" }
++
+ extern "C" int printf (const char *, ...);
+ 
+ #pragma pack(4)
+Index: b/src/gcc/testsuite/g++.dg/abi/regparm1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/abi/regparm1.C
++++ b/src/gcc/testsuite/g++.dg/abi/regparm1.C
+@@ -1,6 +1,7 @@
+ // PR c++/29911 (9381)
+ // { dg-do run { target i?86-*-* x86_64-*-* } }
+ // { dg-require-effective-target c++11 }
++// { dg-options "-Wformat=0" }
+ 
+ extern "C" int printf(const char *, ...);
+ 
+Index: b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-tuple.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-tuple.C
++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-tuple.C
+@@ -1,5 +1,6 @@
+ // PR c++/53202
+ // { dg-do run { target c++11 } }
++// { dg-options "-Wformat=0" }
+ 
+ #include <tuple>
+ 
+Index: b/src/gcc/testsuite/g++.dg/torture/pr51436.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/torture/pr51436.C
++++ b/src/gcc/testsuite/g++.dg/torture/pr51436.C
+@@ -1,4 +1,5 @@
+ /* { dg-do compile } */
++/* { dg-options "-Wno-nonnull" } */
+ 
+ typedef __SIZE_TYPE__ size_t;
+ extern "C" void *memcpy (void *, __const void *, size_t);
+Index: b/src/gcc/testsuite/g++.old-deja/g++.law/weak.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.law/weak.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.law/weak.C
+@@ -1,6 +1,6 @@
+ // { dg-do link { target i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } }
+ // { dg-require-effective-target static }
+-// { dg-options "-static" }
++// { dg-options "-static -Wno-nonnull" }
+ // Bug: g++ fails to instantiate operator<<.
+ 
+ // libc-5.4.xx has __IO_putc in its static C library, which can conflict
+Index: b/src/gcc/testsuite/g++.old-deja/g++.other/std1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.other/std1.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.other/std1.C
+@@ -1,4 +1,5 @@
+ // { dg-do assemble  }
++// { dg-options "-Wno-nonnull" }
+ // Origin: Mark Mitchell <mark@codesourcery.com>
+ 
+ extern "C" int memcmp (const void * __s1,
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ #include <stdarg.h>
+ 
+Index: b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/builtin-vfprintf-chk-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fdump-tree-fab1" } */
++/* { dg-options "-O2 -fdump-tree-fab1 -Wno-format-zero-length" } */
+ 
+ #include <stdarg.h>
+ 
--- gcc-5-5.4.0.orig/debian/patches/testsuite-hardening-printf-types.diff
+++ gcc-5-5.4.0/debian/patches/testsuite-hardening-printf-types.diff
@@ -0,0 +1,667 @@
+# DP: Description: adjust/standardize printf types to avoid -Wformat warnings.
+# DP: Author: Kees Cook <kees@ubuntu.com>
+# DP: Ubuntu: https://bugs.launchpad.net/bugs/344502
+
+Index: b/src/gcc/testsuite/g++.dg/ext/align1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/ext/align1.C
++++ b/src/gcc/testsuite/g++.dg/ext/align1.C
+@@ -16,6 +16,7 @@ float f1 __attribute__ ((aligned));
+ int
+ main (void)
+ {
+-  printf ("%d %d\n", __alignof (a1), __alignof (f1));
++  // "%td" is not allowed by ISO C++, so use %p with a void * cast
++  printf ("%p %p\n", (void*)__alignof (a1), (void*)__alignof (f1));
+   return (__alignof (a1) < __alignof (f1));
+ }
+Index: b/src/gcc/testsuite/g++.old-deja/g++.law/operators28.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.law/operators28.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.law/operators28.C
+@@ -14,7 +14,8 @@ void* new_test::operator new(size_t sz,
+ {
+   void *p;
+ 
+-  printf("%d %d %d\n", sz, count, type);
++  // ISO C++ does not support format size modifier "z", so use a cast
++  printf("%u %d %d\n", (unsigned int)sz, count, type);
+ 
+   p = new char[sz * count];
+   ((new_test *)p)->type = type;
+Index: b/src/gcc/testsuite/gcc.dg/torture/matrix-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/torture/matrix-2.c
++++ b/src/gcc/testsuite/gcc.dg/torture/matrix-2.c
+@@ -42,7 +42,7 @@ main (int argc, char **argv)
+     }
+   for (i = 0; i < ARCHnodes; i++)
+     for (j = 0; j < 3; j++)
+-      printf ("%x\n",vel[i][j]);
++      printf ("%p\n",vel[i][j]);
+       /*if (i!=1 || j!=1)*/
+       /*if (i==1 && j==1)
+         continue;
+@@ -83,14 +83,14 @@ mem_init (void)
+       for (j = 0; j < 3; j++)
+ 	{
+ 	  vel[i][j] = (int *) malloc (ARCHnodes1 * sizeof (int));
+-          printf ("%x %d %d\n",vel[i][j], ARCHnodes1, sizeof (int));
++          printf ("%p %d %d\n",vel[i][j], ARCHnodes1, (int)sizeof (int));
+ 	}
+     }
+    for (i = 0; i < ARCHnodes; i++)
+     {
+       for (j = 0; j < 3; j++)
+         {
+-          printf ("%x\n",vel[i][j]);
++          printf ("%p\n",vel[i][j]);
+         }
+     }
+ 
+@@ -99,7 +99,7 @@ mem_init (void)
+     {
+       for (j = 0; j < 3; j++)
+ 	{
+-	  printf ("%x\n",vel[i][j]);
++	  printf ("%p\n",vel[i][j]);
+           /*for (k = 0; k < ARCHnodes1; k++)
+ 	    {
+ 	      vel[i][j][k] = d;
+Index: b/src/gcc/testsuite/gcc.dg/packed-vla.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/packed-vla.c
++++ b/src/gcc/testsuite/gcc.dg/packed-vla.c
+@@ -18,8 +18,8 @@ int func(int levels)
+     int			b[4];
+   } __attribute__ ((__packed__)) foo;
+ 
+-  printf("foo %d\n", sizeof(foo));
+-  printf("bar %d\n", sizeof(bar));
++  printf("foo %d\n", (int)sizeof(foo));
++  printf("bar %d\n", (int)sizeof(bar));
+ 
+   if (sizeof (foo) != sizeof (bar))
+     abort ();
+Index: b/src/gcc/testsuite/g++.dg/opt/alias2.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/opt/alias2.C
++++ b/src/gcc/testsuite/g++.dg/opt/alias2.C
+@@ -30,14 +30,14 @@ public:
+ 
+ 
+ _Deque_base::~_Deque_base() {
+-  printf ("bb %x %x\n", this, *_M_start._M_node);
++  printf ("bb %p %x\n", this, *_M_start._M_node);
+ }
+ 
+ void
+ _Deque_base::_M_initialize_map()
+ {
+   yy = 0x123;
+-  printf ("aa %x %x\n", this, yy);
++  printf ("aa %p %x\n", this, yy);
+ 
+   _M_start._M_node = &yy;
+   _M_start._M_cur = yy;
+Index: b/src/gcc/testsuite/g++.old-deja/g++.abi/vbase1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.abi/vbase1.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.abi/vbase1.C
+@@ -33,7 +33,7 @@ struct VBase
+   void Offset () const
+   {
+     printf ("VBase\n");
+-    printf ("  VBase::member %d\n", &this->VBase::member - (int *)this);
++    printf ("  VBase::member %d\n", (int)(&this->VBase::member - (int *)this));
+   }
+ };
+ 
+@@ -55,8 +55,8 @@ struct VDerived : virtual VBase
+   void Offset () const
+   {
+     printf ("VDerived\n");
+-    printf ("  VBase::member %d\n", &this->VBase::member - (int *)this);
+-    printf ("  VDerived::member %d\n", &this->VDerived::member - (int *)this);
++    printf ("  VBase::member %d\n", (int)(&this->VBase::member - (int *)this));
++    printf ("  VDerived::member %d\n", (int)(&this->VDerived::member - (int *)this));
+   }
+ };
+ struct B : virtual VBase
+@@ -65,8 +65,8 @@ struct B : virtual VBase
+   void Offset () const
+   {
+     printf ("B\n");
+-    printf ("  VBase::member %d\n", &this->VBase::member - (int *)this);
+-    printf ("  B::member %d\n", &this->B::member - (int *)this);
++    printf ("  VBase::member %d\n", (int)(&this->VBase::member - (int *)this));
++    printf ("  B::member %d\n", (int)(&this->B::member - (int *)this));
+   }
+ };
+ struct MostDerived : B, virtual VDerived
+@@ -75,10 +75,10 @@ struct MostDerived : B, virtual VDerived
+   void Offset () const
+   {
+     printf ("MostDerived\n");
+-    printf ("  VBase::member %d\n", &this->VBase::member - (int *)this);
+-    printf ("  B::member %d\n", &this->B::member - (int *)this);
+-    printf ("  VDerived::member %d\n", &this->VDerived::member - (int *)this);
+-    printf ("  MostDerived::member %d\n", &this->MostDerived::member - (int *)this);
++    printf ("  VBase::member %d\n", (int)(&this->VBase::member - (int *)this));
++    printf ("  B::member %d\n", (int)(&this->B::member - (int *)this));
++    printf ("  VDerived::member %d\n", (int)(&this->VDerived::member - (int *)this));
++    printf ("  MostDerived::member %d\n", (int)(&this->MostDerived::member - (int *)this));
+   }
+ };
+ 
+@@ -95,10 +95,10 @@ int main ()
+     if (ctorVDerived != &dum.VDerived::member)
+       return 24;
+     
+-    printf ("  VBase::member %d\n", &dum.VBase::member - this_);
+-    printf ("  B::member %d\n", &dum.B::member - this_);
+-    printf ("  VDerived::member %d\n", &dum.VDerived::member - this_);
+-    printf ("  MostDerived::member %d\n", &dum.MostDerived::member - this_);
++    printf ("  VBase::member %d\n", (int)(&dum.VBase::member - this_));
++    printf ("  B::member %d\n", (int)(&dum.B::member - this_));
++    printf ("  VDerived::member %d\n", (int)(&dum.VDerived::member - this_));
++    printf ("  MostDerived::member %d\n", (int)(&dum.MostDerived::member - this_));
+     dum.MostDerived::Offset ();
+     dum.B::Offset ();
+     dum.VDerived::Offset ();
+Index: b/src/gcc/testsuite/g++.old-deja/g++.brendan/template8.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.brendan/template8.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.brendan/template8.C
+@@ -15,6 +15,6 @@ int main(){
+ 	
+ 	Double_alignt<20000> heap;
+ 
+-	printf(" &heap.array[0] = %d, &heap.for_alignt = %d\n", &heap.array[0], &heap.for_alignt);
++	printf(" &heap.array[0] = %p, &heap.for_alignt = %p\n", (void*)&heap.array[0], (void*)&heap.for_alignt);
+ 
+ }
+Index: b/src/gcc/testsuite/g++.old-deja/g++.eh/ptr1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.eh/ptr1.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.eh/ptr1.C
+@@ -16,7 +16,7 @@ int main()
+   }
+ 
+   catch (E *&e) {
+-    printf ("address of e is 0x%lx\n", (__SIZE_TYPE__)e);
++    printf ("address of e is %p\n", (void *)e);
+     return !((__SIZE_TYPE__)e != 5 && e->x == 5);
+   }
+   return 2;
+Index: b/src/gcc/testsuite/g++.old-deja/g++.jason/access23.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.jason/access23.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.jason/access23.C
+@@ -42,19 +42,19 @@ public:
+   void DoSomething() {
+     PUB_A = 0;
+     Foo::A = 0;
+-    printf("%x\n",pX);  
++    printf("%p\n",pX);  
+     Foo::PUB.A = 0;
+-    printf("%x\n",PUB.pX);  
++    printf("%p\n",PUB.pX);  
+     B = 0;			
+-    printf("%x\n",Foo::pY);  
++    printf("%p\n",Foo::pY);  
+     PRT_A = 0;
+     PRT.B = 0;		
+-    printf("%x\n",Foo::PRT.pY);	
++    printf("%p\n",Foo::PRT.pY);	
+     PRV_A = 0;			// { dg-error "" } 
+     Foo::C = 0;			// { dg-error "" } 
+-    printf("%x\n",pZ);  	// { dg-error "" } 
++    printf("%p\n",pZ);  	// { dg-error "" } 
+     Foo::PRV.C = 0;		// { dg-error "" } 
+-    printf("%x\n",PRV.pZ); 	// { dg-error "" } 
++    printf("%p\n",PRV.pZ); 	// { dg-error "" } 
+   }
+ };
+ 
+@@ -64,17 +64,17 @@ int main()
+ 
+   a.PUB_A = 0;
+   a.A = 0;
+-  printf("%x\n",a.pX);  
++  printf("%p\n",a.pX);  
+   a.PRT_A = 0;			// { dg-error "" } 
+   a.B = 0;			// { dg-error "" } 
+-  printf("%x\n",a.pY);  	// { dg-error "" } 
++  printf("%p\n",a.pY);  	// { dg-error "" } 
+   a.PRV_A = 0;			// { dg-error "" } 
+   a.C = 0;			// { dg-error "" } 
+-  printf("%x\n",a.pZ);  	// { dg-error "" } 
++  printf("%p\n",a.pZ);  	// { dg-error "" } 
+   a.PUB.A = 0;
+-  printf("%x\n",a.PUB.pX);  
++  printf("%p\n",a.PUB.pX);  
+   a.PRT.B = 0;			// { dg-error "" } 
+-  printf("%x\n",a.PRT.pY);  	// { dg-error "" } 
++  printf("%p\n",a.PRT.pY);  	// { dg-error "" } 
+   a.PRV.C = 0;			// { dg-error "" } 
+-  printf("%x\n",a.PRV.pZ);  	// { dg-error "" } 
++  printf("%p\n",a.PRV.pZ);  	// { dg-error "" } 
+ }
+Index: b/src/gcc/testsuite/g++.old-deja/g++.law/cvt8.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.law/cvt8.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.law/cvt8.C
+@@ -20,12 +20,12 @@ struct B {
+ B::operator const A&() const {
+         static A a;
+         a.i = i;
+-        printf("convert B to A at %x\n", &a);
++        printf("convert B to A at %p\n", (void*)&a);
+         return a;
+ }
+ 
+ void f(A &a) { // { dg-message "" } in passing argument
+-        printf("A at %x is %d\n", &a, a.i);
++  printf("A at %p is %d\n", (void*)&a, a.i);
+ }
+ 
+ int main() {
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/net35.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/net35.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/net35.C
+@@ -17,10 +17,10 @@ public:
+ 
+ int main() {
+   C c;
+-  printf("&c.x = %x\n", &c.x);
+-  printf("&c.B1::x = %x\n", &c.B1::x);
+-  printf("&c.B2::x = %x\n", &c.B2::x);
+-  printf("&c.A::x = %x\n", &c.A::x);
++  printf("&c.x = %p\n", (void*)&c.x);
++  printf("&c.B1::x = %p\n", (void*)&c.B1::x);
++  printf("&c.B2::x = %p\n", (void*)&c.B2::x);
++  printf("&c.A::x = %p\n", (void*)&c.A::x);
+   if (&c.x != &c.B1::x
+       || &c.x != &c.B2::x
+       || &c.x != &c.A::x)
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/offset1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/offset1.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/offset1.C
+@@ -6,7 +6,7 @@ int fail = 0;
+ class Foo {
+ public:
+    virtual void setName() {
+-     printf("Foo at %x\n", this);
++     printf("Foo at %p\n", (void*)this);
+      if (vp != (void*)this)
+        fail = 1;
+    }
+@@ -15,7 +15,7 @@ public:
+ class Bar : public Foo {
+ public:
+   virtual void init(int argc, char **argv) {
+-    printf("Bar's Foo at %x\n", (Foo*)this);
++    printf("Bar's Foo at %p\n", (void*)(Foo*)this);
+     vp = (void*)(Foo*)this;
+     setName();
+   }
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p12306.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p12306.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p12306.C
+@@ -18,7 +18,7 @@ public:
+     if (ptr2 != &(*this).slist)
+       fail = 6;
+ 
+-    if (0) printf("at %x %x\n", (RWSlistIterator*)this, &(*this).slist);
++    if (0) printf("at %p %p\n", (void*)(RWSlistIterator*)this, (void*)&(*this).slist);
+   }
+ };
+ 
+@@ -54,14 +54,14 @@ Sim_Event_Manager::Sim_Event_Manager ()
+ void Sim_Event_Manager::post_event () {
+   ptr1 = (RWSlistIterator*)&last_posted_event_position_;
+   ptr2 = &((RWSlistIterator*)&last_posted_event_position_)->slist;
+-  if (0) printf("at %x %x\n", (RWSlistIterator*)&last_posted_event_position_,
+-		&((RWSlistIterator*)&last_posted_event_position_)->slist);
++  if (0) printf("at %p %p\n", (void*)(RWSlistIterator*)&last_posted_event_position_,
++		(void*)&((RWSlistIterator*)&last_posted_event_position_)->slist);
+   if (ptr1 != (RWSlistIterator*)&last_posted_event_position_)
+     fail = 1;
+   if (ptr2 != &((RWSlistIterator&)last_posted_event_position_).slist)
+     fail = 2;
+-  if (0) printf("at %x ?%x\n", (RWSlistIterator*)&last_posted_event_position_,
+-		&((RWSlistIterator&)last_posted_event_position_).slist);
++  if (0) printf("at %p ?%p\n", (void*)(RWSlistIterator*)&last_posted_event_position_,
++		(void*)&((RWSlistIterator&)last_posted_event_position_).slist);
+   if (ptr1 != (RWSlistIterator*)&last_posted_event_position_)
+     fail = 3;
+   if (ptr2 != &((RWSlistIterator&)last_posted_event_position_).slist)
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p3579.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3579.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3579.C
+@@ -7,26 +7,26 @@ int num_x;
+ 
+ class Y {
+ public:
+-  Y () { printf("Y()            this: %x\n", this); }
+-  ~Y () { printf("~Y()           this: %x\n", this); }
++  Y () { printf("Y()            this: %p\n", (void*)this); }
++  ~Y () { printf("~Y()           this: %p\n", (void*)this); }
+ };
+ 
+ class X {
+ public:
+   X () {
+     ++num_x;
+-    printf("X()            this: %x\n", this);
++    printf("X()            this: %p\n", (void*)this);
+     Y y;
+     *this = (X) y;
+   }
+ 
+-  X (const Y & yy) { printf("X(const Y&)    this: %x\n", this); ++num_x; }
++  X (const Y & yy) { printf("X(const Y&)    this: %p\n", (void*)this); ++num_x; }
+   X & operator = (const X & xx) {
+-    printf("X.op=(X&)      this: %x\n", this);
++    printf("X.op=(X&)      this: %p\n", (void*)this);
+     return *this;
+   }
+ 
+-  ~X () { printf("~X()           this: %x\n", this); --num_x; }
++  ~X () { printf("~X()           this: %p\n", (void*)this); --num_x; }
+ };
+ 
+ int main (int, char **) {
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708a.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708a.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708a.C
+@@ -38,7 +38,7 @@ public:
+   virtual void xx(int doit) {
+     --num;
+     if (ptr != this)
+-      printf("FAIL\n%x != %x\n", ptr, this);
++      printf("FAIL\n%p != %p\n", ptr, (void*)this);
+     printf ("C is destructed.\n");
+     B::xx (0);
+     if (doit) A::xx (1);
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708b.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708b.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708b.C
+@@ -48,7 +48,7 @@ public:
+   virtual void xx(int doit) {
+     --num;
+     if (ptr != this) {
+-      printf("FAIL\n%x != %x\n", ptr, this);
++      printf("FAIL\n%p != %p\n", ptr, (void*)this);
+       exit(1);
+     }
+     printf ("D is destructed.\n");
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708.C
+@@ -38,7 +38,7 @@ public:
+   virtual void xx(int doit) {
+     --num;
+     if (ptr != this)
+-      printf("FAIL\n%x != %x\n", ptr, this);
++      printf("FAIL\n%p != %p\n", ptr, (void*)this);
+     printf ("C is destructed.\n");
+     B::xx (0);
+     if (doit) A::xx (1);
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p646.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p646.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p646.C
+@@ -35,20 +35,20 @@ int foo::si = 0;
+ foo::foo ()
+ {
+   si++;
+-  printf ("new foo @ 0x%x; now %d foos\n", this, si);
++  printf ("new foo @ %p; now %d foos\n", (void*)this, si);
+ }
+ 
+ foo::foo (const foo &other)
+ {
+   si++;
+-  printf ("another foo @ 0x%x; now %d foos\n", this, si);
++  printf ("another foo @ %p; now %d foos\n", (void*)this, si);
+   *this = other;
+ }
+ 
+ foo::~foo ()
+ {
+   si--;
+-  printf ("deleted foo @ 0x%x; now %d foos\n", this, si);
++  printf ("deleted foo @ %p; now %d foos\n", (void*)this, si);
+ }
+ 
+ int
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p710.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p710.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p710.C
+@@ -30,7 +30,7 @@ class B
+    virtual ~B() {}
+    void operator delete(void*,size_t s)
+   {
+-      printf("B::delete() %d\n",s);
++      printf("B::delete() %u\n",(unsigned int)s);
+    }
+    void operator delete(void*){}
+ };
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/p789a.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p789a.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p789a.C
+@@ -13,10 +13,10 @@ struct foo
+   int x;
+   foo () {
+     x = count++;
+-    printf("this %d = %x\n", x, (void *)this);
++    printf("this %d = %p\n", x, (void *)this);
+   }
+   virtual ~foo () {
+-    printf("this %d = %x\n", x, (void *)this);
++    printf("this %d = %p\n", x, (void *)this);
+     --count;
+   }
+ };
+@@ -31,7 +31,7 @@ int main ()
+       {
+ 	for (int j = 0; j < 3; j++)
+ 	  {
+-	    printf("&a[%d][%d] = %x\n", i, j, (void *)&array[i][j]);
++	    printf("&a[%d][%d] = %p\n", i, j, (void *)&array[i][j]);
+ 	  }
+       }
+       // The count should be nine, if not, fail the test.
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/pmf2.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/pmf2.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/pmf2.C
+@@ -42,7 +42,7 @@ B_table b;
+ bar jar;
+ 
+ int main() {
+-  printf("ptr to B_table=%x, ptr to A_table=%x\n",&b,(A_table*)&b);
++  printf("ptr to B_table=%p, ptr to A_table=%p\n",(void*)&b,(void*)(A_table*)&b);
+   B_table::B_ti_fn z = &B_table::func1;
+   int j = 1;
+   jar.call_fn_fn1(j,(void *)&z);
+Index: b/src/gcc/testsuite/g++.old-deja/g++.mike/temp.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.mike/temp.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/temp.C
+@@ -7,11 +7,11 @@ class T {
+ public:
+   T() {
+     i = 1;
+-    printf("T() at %x\n", this);
++    printf("T() at %p\n", (void*)this);
+   }
+   T(const T& o) {
+     i = o.i;
+-    printf("T(const T&) at %x <-- %x\n", this, &o);
++    printf("T(const T&) at %p <-- %p\n", (void*)this, (void*)&o);
+   }
+   T operator +(const T& o) {
+     T r;
+@@ -21,7 +21,7 @@ public:
+   operator int () {
+     return i;
+   }
+-  ~T() { printf("~T() at %x\n", this); }
++  ~T() { printf("~T() at %p\n", (void*)this); }
+ } s, b;
+ 
+ int foo() { return getenv("TEST") == 0; }
+Index: b/src/gcc/testsuite/g++.old-deja/g++.other/temporary1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.other/temporary1.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.other/temporary1.C
+@@ -5,16 +5,16 @@ int c, d;
+ class Foo 
+ {
+ public:
+-   Foo() { printf("Foo() 0x%08lx\n", (__SIZE_TYPE__)this); ++c; }
+-   Foo(Foo const &) { printf("Foo(Foo const &) 0x%08lx\n", (__SIZE_TYPE__)this); }
+-   ~Foo() { printf("~Foo() 0x%08lx\n", (__SIZE_TYPE__)this); ++d; }
++   Foo() { printf("Foo() %p\n", (void*)this); ++c; }
++   Foo(Foo const &) { printf("Foo(Foo const &) %p\n", (void*)this); }
++   ~Foo() { printf("~Foo() %p\n", (void*)this); ++d; }
+ };
+ 
+ // Bar creates constructs a temporary Foo() as a default
+ class Bar 
+ {
+ public:
+-   Bar(Foo const & = Foo()) { printf("Bar(Foo const &) 0x%08lx\n", (__SIZE_TYPE__)this); }
++   Bar(Foo const & = Foo()) { printf("Bar(Foo const &) %p\n", (void*)this); }
+ };
+ 
+ void fakeRef(Bar *)
+Index: b/src/gcc/testsuite/g++.old-deja/g++.other/virtual8.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.other/virtual8.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.other/virtual8.C
+@@ -4,7 +4,7 @@ extern "C" int printf (const char*, ...)
+ struct A
+ {
+   virtual void f () {
+-    printf ("%x\n", this);
++    printf ("%p\n", (void*)this);
+   }
+ };
+ 
+Index: b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp23.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp23.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp23.C
+@@ -13,7 +13,7 @@ struct S
+ 
+   template <class U>
+   void f(U u)
+-  { printf ("In S::f(U)\nsizeof(U) == %d\n", sizeof(u)); }
++  { printf ("In S::f(U)\nsizeof(U) == %d\n", (int)sizeof(u)); }
+ 
+   int c[16];
+ };
+Index: b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp24.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp24.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp24.C
+@@ -13,7 +13,7 @@ struct S
+ 
+   template <class U>
+   void f(U u)
+-  { printf ("In S::f(U)\nsizeof(U) == %d\n", sizeof(u)); }
++  { printf ("In S::f(U)\nsizeof(U) == %d\n", (int)sizeof(u)); }
+ 
+   int c[16];
+ };
+Index: b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp25.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp25.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp25.C
+@@ -6,7 +6,7 @@ template <class X>
+ struct S
+ {
+   template <class U>
+-  void f(U u) { printf ("%d\n", sizeof (U)); }
++  void f(U u) { printf ("%d\n", (int)sizeof (U)); }
+ 
+   int i[4];
+ };
+Index: b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp26.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp26.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp26.C
+@@ -16,7 +16,7 @@ template <class X>
+ template <class U>
+ void S<X>::f(U u)
+ {
+-  printf ("%d\n", sizeof (U));
++  printf ("%d\n", (int)sizeof (U));
+ }
+ 
+ 
+Index: b/src/gcc/testsuite/g++.old-deja/g++.pt/t39.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.pt/t39.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/t39.C
+@@ -10,9 +10,9 @@ struct frob {
+ 
+ template <class T>
+ void frob<T>::print () {
+-  printf ("this = %08x\n", this);
+-  printf (" ptr = %08x\n", ptr);
+-  printf (" values = %x %x %x ...\n", ptr[0], ptr[1], ptr[2]);
++  printf ("this = %p\n", (void*)this);
++  printf (" ptr = %p\n", (void*)ptr);
++  printf (" values = %x %x %x ...\n", (int)ptr[0], (int)ptr[1], (int)ptr[2]);
+ }
+ 
+   static int x[10];
+Index: b/src/gcc/testsuite/g++.old-deja/g++.robertl/eb17.C
+===================================================================
+--- a/src/gcc/testsuite/g++.old-deja/g++.robertl/eb17.C
++++ b/src/gcc/testsuite/g++.old-deja/g++.robertl/eb17.C
+@@ -44,15 +44,15 @@ int main()
+     A * a = new B;
+     B * b = dynamic_cast<B *>(a);
+ 
+-    printf("%p\n",b);                // (*2*)
++    printf("%p\n",(void*)b);                // (*2*)
+     b->print();
+ 
+     a = b;
+-    printf("%p\n",a);
++    printf("%p\n",(void*)a);
+     a->print();
+ 
+     a = a->clone();
+-    printf("%p\n",a);
++    printf("%p\n",(void*)a);
+     a->print();                      // (*1*)
+ 
+     return 0;
+Index: b/src/gcc/testsuite/gcc.dg/pch/inline-4.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/pch/inline-4.c
++++ b/src/gcc/testsuite/gcc.dg/pch/inline-4.c
+@@ -1,6 +1,6 @@
+ #include "inline-4.h"
+ extern int printf (const char *, ...);
+ int main(void) {
+-  printf (getstring());
++  printf ("%s", getstring());
+   return 0;
+ }
--- gcc-5-5.4.0.orig/debian/patches/testsuite-hardening-updates.diff
+++ gcc-5-5.4.0/debian/patches/testsuite-hardening-updates.diff
@@ -0,0 +1,143 @@
+# DP: Fix some gcc and g++ testcases to pass with hardening defaults
+
+---
+ src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c     |    2 +-
+ src/gcc/testsuite/c-c++-common/cilk-plus/CK/spawnee_inline.c |    2 +-
+ src/gcc/testsuite/g++.dg/asan/asan_test.C                    |    2 +-
+ src/gcc/testsuite/g++.dg/asan/interception-malloc-test-1.C   |    2 +-
+ src/gcc/testsuite/g++.dg/fstack-protector-strong.C           |    2 +-
+ src/gcc/testsuite/gcc.c-torture/execute/memset-1.c           |    1 -
+ src/gcc/testsuite/gcc.c-torture/execute/memset-1.x           |    5 +++++
+ src/gcc/testsuite/gcc.dg/fstack-protector-strong.c           |    2 +-
+ src/gcc/testsuite/gcc.dg/stack-usage-1.c                     |    2 +-
+ src/gcc/testsuite/gcc.dg/superblock.c                        |    2 +-
+ src/gcc/testsuite/gcc.target/i386/sw-1.c                     |    2 +-
+ 11 files changed, 14 insertions(+), 10 deletions(-)
+
+Index: b/src/gcc/testsuite/g++.dg/asan/asan_test.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/asan/asan_test.C
++++ b/src/gcc/testsuite/g++.dg/asan/asan_test.C
+@@ -2,7 +2,7 @@
+ // { dg-skip-if "" { *-*-* } { "*" } { "-O2" } }
+ // { dg-skip-if "" { *-*-* } { "-flto" } { "" } }
+ // { dg-additional-sources "asan_globals_test-wrapper.cc" }
+-// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Wno-format -Werror -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread -ldl" }
++// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Wno-format -Wno-unused-result -Werror -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread -ldl" }
+ // { dg-additional-options "-DASAN_NEEDS_SEGV=1" { target { ! arm*-*-* } } }
+ // { dg-additional-options "-DASAN_LOW_MEMORY=1 -DASAN_NEEDS_SEGV=0" { target arm*-*-* } }
+ // { dg-additional-options "-DASAN_AVOID_EXPENSIVE_TESTS=1" { target { ! run_expensive_tests } } }
+Index: b/src/gcc/testsuite/g++.dg/asan/interception-malloc-test-1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/asan/interception-malloc-test-1.C
++++ b/src/gcc/testsuite/g++.dg/asan/interception-malloc-test-1.C
+@@ -1,7 +1,7 @@
+ // ASan interceptor can be accessed with __interceptor_ prefix.
+ 
+ // { dg-do run { target *-*-linux* } }
+-// { dg-options "-fno-builtin-free" }
++// { dg-options "-fno-builtin-free -Wno-unused-result" }
+ // { dg-additional-options "-D__NO_INLINE__" { target { *-*-linux-gnu } } }
+ // { dg-shouldfail "asan" }
+ 
+Index: b/src/gcc/testsuite/gcc.c-torture/execute/memset-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.c-torture/execute/memset-1.c
++++ b/src/gcc/testsuite/gcc.c-torture/execute/memset-1.c
+@@ -1,3 +1,5 @@
++/* { dg-prune-output ".*warning: memset used with constant zero length parameter.*" } */
++
+ /* Copyright (C) 2002  Free Software Foundation.
+ 
+    Test memset with various combinations of pointer alignments and lengths to
+Index: b/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c
++++ b/src/gcc/testsuite/c-c++-common/asan/strncpy-overflow-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run } */
+-/* { dg-options "-fno-builtin-malloc -fno-builtin-strncpy" } */
++/* { dg-options "-fno-builtin-malloc -fno-builtin-strncpy -U_FORTIFY_SOURCE" } */
+ /* { dg-shouldfail "asan" } */
+ 
+ #include <string.h>
+Index: b/src/gcc/testsuite/gcc.dg/superblock.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/superblock.c
++++ b/src/gcc/testsuite/gcc.dg/superblock.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -fno-asynchronous-unwind-tables -fsched2-use-superblocks -fdump-rtl-sched2 -fdump-rtl-bbro" } */
++/* { dg-options "-O2 -fno-asynchronous-unwind-tables -fsched2-use-superblocks -fdump-rtl-sched2 -fdump-rtl-bbro -fno-stack-protector" } */
+ /* { dg-require-effective-target scheduling } */
+ 
+ typedef int aligned __attribute__ ((aligned (64)));
+Index: b/src/gcc/testsuite/gcc.dg/stack-usage-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/stack-usage-1.c
++++ b/src/gcc/testsuite/gcc.dg/stack-usage-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-fstack-usage" } */
++/* { dg-options "-fstack-usage -fno-stack-protector" } */
+ 
+ /* This is aimed at testing basic support for -fstack-usage in the back-ends.
+    See the SPARC back-end for example (grep flag_stack_usage_info in sparc.c).
+Index: b/src/gcc/testsuite/gcc.target/i386/sw-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/sw-1.c
++++ b/src/gcc/testsuite/gcc.target/i386/sw-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -mtune=generic -fshrink-wrap -fdump-rtl-pro_and_epilogue" } */
++/* { dg-options "-O2 -mtune=generic -fshrink-wrap -fdump-rtl-pro_and_epilogue -fno-stack-protector" } */
+ /* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } { "*" } { "" } } */
+ 
+ #include <string.h>
+Index: b/src/gcc/testsuite/c-c++-common/cilk-plus/CK/spawnee_inline.c
+===================================================================
+--- a/src/gcc/testsuite/c-c++-common/cilk-plus/CK/spawnee_inline.c
++++ b/src/gcc/testsuite/c-c++-common/cilk-plus/CK/spawnee_inline.c
+@@ -1,5 +1,5 @@
+ /* { dg-do run  { target { i?86-*-* x86_64-*-* } } } */
+-/* { dg-options "-fcilkplus -w" } */
++/* { dg-options "-fcilkplus -w -U_FORTIFY_SOURCE" } */
+ /* { dg-additional-options "-lcilkrts" { target { i?86-*-* x86_64-*-* } } } */
+ 
+ #include <stdio.h>
+Index: b/src/gcc/testsuite/gcc.dg/fstack-protector-strong.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/fstack-protector-strong.c
++++ b/src/gcc/testsuite/gcc.dg/fstack-protector-strong.c
+@@ -1,7 +1,7 @@
+ /* Test that stack protection is done on chosen functions. */
+ 
+ /* { dg-do compile { target i?86-*-* x86_64-*-* rs6000-*-* s390x-*-* } } */
+-/* { dg-options "-O2 -fstack-protector-strong" } */
++/* { dg-options "-O2 -fstack-protector-strong -U_FORTIFY_SOURCE" } */
+ 
+ /* This test checks the presence of __stack_chk_fail function in assembler.
+  * Compiler generates _stack_chk_fail_local (wrapper) calls instead for PIC.
+Index: b/src/gcc/testsuite/g++.dg/fstack-protector-strong.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/fstack-protector-strong.C
++++ b/src/gcc/testsuite/g++.dg/fstack-protector-strong.C
+@@ -1,7 +1,7 @@
+ /* Test that stack protection is done on chosen functions. */
+ 
+ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+-/* { dg-options "-O2 -fstack-protector-strong" } */
++/* { dg-options "-O2 -fstack-protector-strong -U_FORTIFY_SOURCE" } */
+ 
+ /* This test checks the presence of __stack_chk_fail function in assembler.
+  * Compiler generates _stack_chk_fail_local (wrapper) calls instead for PIC.
+Index: b/src/gcc/testsuite/gcc.c-torture/execute/memset-1.x
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.c-torture/execute/memset-1.x
+@@ -0,0 +1,5 @@
++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to
++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567
++
++set additional_flags "-U_FORTIFY_SOURCE"
++return 0
--- gcc-5-5.4.0.orig/debian/patches/vulcan-cpu-doc.diff
+++ gcc-5-5.4.0/debian/patches/vulcan-cpu-doc.diff
@@ -0,0 +1,27 @@
+# DP: Add AArch64 Vulcan cpu support, taken from the trunk (documentation).
+
+From: jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Tue, 21 Jun 2016 13:43:29 +0000 (+0000)
+Subject: [PATCH/AARCH64] Accept vulcan as a cpu name for the AArch64 port of GCC
+X-Git-Url: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff_plain;h=2c6ac78145ac8ff2fd83271d093e23ab80a15e4f
+
+[PATCH/AARCH64] Accept vulcan as a cpu name for the AArch64 port of GCC
+
+gcc/ChangeLog
+
+	* config/aarch64/aarch64-cores.def (vulcan): New core.
+	* config/aarch64/aarch64-tune.md: Regenerate.
+	* doc/invoke.texi: Document vulcan as an available option.
+
+diff -urpN a/src/gcc/doc/invoke.texi b/src/gcc/doc/invoke.texi
+--- a/src/gcc/doc/invoke.texi	2016-06-21 10:31:29.994143994 -0600
++++ b/src/gcc/doc/invoke.texi	2016-06-21 10:35:51.136081208 -0600
+@@ -12988,7 +12988,7 @@ Specify the name of the target processor
+ performance of the code.  Permissible values for this option are:
+ @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
+ @samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
+-@samp{xgene1}.
++@samp{vulcan}, @samp{xgene1}.
+ 
+ Additionally, this option can specify that GCC should tune the performance
+ of the code for a big.LITTLE system.  Permissible values for this
--- gcc-5-5.4.0.orig/debian/patches/vulcan-cpu-linaro.diff
+++ gcc-5-5.4.0/debian/patches/vulcan-cpu-linaro.diff
@@ -0,0 +1,39 @@
+# DP: Add AArch64 Vulcan cpu support, taken from the trunk.
+
+From: jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Tue, 21 Jun 2016 13:43:29 +0000 (+0000)
+Subject: [PATCH/AARCH64] Accept vulcan as a cpu name for the AArch64 port of GCC
+X-Git-Url: https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff_plain;h=2c6ac78145ac8ff2fd83271d093e23ab80a15e4f
+
+[PATCH/AARCH64] Accept vulcan as a cpu name for the AArch64 port of GCC
+
+gcc/ChangeLog
+
+	* config/aarch64/aarch64-cores.def (vulcan): New core.
+	* config/aarch64/aarch64-tune.md: Regenerate.
+	* doc/invoke.texi: Document vulcan as an available option.
+
+diff -urpN a/src/gcc/config/aarch64/aarch64-cores.def b/src/gcc/config/aarch64/aarch64-cores.def
+--- a/src/gcc/config/aarch64/aarch64-cores.def	2016-01-04 07:30:50.000000000 -0700
++++ b/src/gcc/config/aarch64/aarch64-cores.def	2016-06-21 10:32:59.191974071 -0600
+@@ -49,6 +49,10 @@ AARCH64_CORE("qdf24xx",     qdf24xx,   c
+ AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  "0x43", "0x0a1")
+ AARCH64_CORE("xgene1",      xgene1,    xgene1,    8A,  AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
+ 
++/* V8.1 Architecture Processors.  */
++
++AARCH64_CORE("vulcan",  vulcan, cortexa57, 8_1A,  AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, cortexa57, "0x42", "0x516")
++
+ /* V8 big.LITTLE implementations.  */
+ 
+ AARCH64_CORE("cortex-a57.cortex-a53",  cortexa57cortexa53, cortexa53, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03")
+diff -urpN a/src/gcc/config/aarch64/aarch64-tune.md b/src/gcc/config/aarch64/aarch64-tune.md
+--- a/src/gcc/config/aarch64/aarch64-tune.md	2016-04-27 02:22:11.000000000 -0600
++++ b/src/gcc/config/aarch64/aarch64-tune.md	2016-06-21 10:32:59.191974071 -0600
+@@ -1,5 +1,5 @@
+ ;; -*- buffer-read-only: t -*-
+ ;; Generated automatically by gentune.sh from aarch64-cores.def
+ (define_attr "tune"
+-	"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
++	"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,vulcan,cortexa57cortexa53,cortexa72cortexa53"
+ 	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
--- gcc-5-5.4.0.orig/debian/porting.html
+++ gcc-5-5.4.0/debian/porting.html
@@ -0,0 +1,30 @@
+<html lang="en">
+<head>
+<title>Porting libstdc++-v3</title>
+<meta http-equiv="Content-Type" content="text/html">
+<meta name="description" content="Porting libstdc++-v3">
+<meta name="generator" content="makeinfo 4.6">
+<meta http-equiv="Content-Style-Type" content="text/css">
+<style type="text/css"><!--
+  pre.display { font-family:inherit }
+  pre.format  { font-family:inherit }
+  pre.smalldisplay { font-family:inherit; font-size:smaller }
+  pre.smallformat  { font-family:inherit; font-size:smaller }
+  pre.smallexample { font-size:smaller }
+  pre.smalllisp    { font-size:smaller }
+--></style>
+</head>
+<body>
+<h1 class="settitle">Porting libstdc++-v3</h1>
+<div class="node">
+<p><hr>
+Node:&nbsp;<a name="Top">Top</a>,
+Next:&nbsp;<a rel="next" accesskey="n" href="#Operating%20system">Operating system</a>,
+Up:&nbsp;<a rel="up" accesskey="u" href="#dir">(dir)</a>
+<br>
+</div>
+
+The documentation in this file was removed, because it is licencensed
+under a non DFSG conforming licencse.
+
+</body></html>
--- gcc-5-5.4.0.orig/debian/reduce-test-diff.awk
+++ gcc-5-5.4.0/debian/reduce-test-diff.awk
@@ -0,0 +1,33 @@
+#! /usr/bin/gawk -f
+
+BEGIN {
+	skip=0
+	warn=0
+}
+
+/^-(FAIL|ERROR|UNRESOLVED|WARNING)/ {
+	next
+}
+
+# only compare gcc, g++, g77 and objc results
+/=== treelang tests ===/ {
+	skip=1
+}
+
+# omit extra files appended to test-summary
+/^\+Compiler version/ {
+	skip=1
+}
+
+skip == 0 {
+	print
+	next
+}
+
+/^\+(FAIL|ERROR|UNRESOLVED|WARNING)/ {
+	warn=1
+}
+
+END {
+	exit warn
+}
--- gcc-5-5.4.0.orig/debian/relink
+++ gcc-5-5.4.0/debian/relink
@@ -0,0 +1,74 @@
+#! /bin/sh
+#
+# Relink GNAT utilities using the shared library
+#
+
+set -e
+
+pwd=`pwd`
+
+# why?
+chmod a-w build/gcc/ada/rts/*.ali
+
+rm -rf tmp
+ln -s $pwd/build/gcc/ada/rts/libgnat.so.1 tmp/libgnat.so
+
+LD_LIBRARY_PATH=$pwd/tmp
+export LD_LIBRARY_PATH
+
+PATH=$pwd/debian:$pwd/tmp:$PATH
+export PATH
+
+echo "#! /bin/sh" > tmp/dgcc
+echo "$pwd/build/gcc/xgcc -B$pwd/build/gcc/ "'"$@"' >> tmp/dgcc
+chmod 755 tmp/dgcc
+
+echo "#! /bin/sh" > tmp/dgnatlink
+echo "$pwd/build/gcc/gnatlink --GCC=dgcc "'"$@"' >> tmp/dgnatlink
+chmod 755 tmp/dgnatlink
+
+GMCMD="$pwd/build/gcc/gnatmake -I- -Irts -I. -a -m --GNATBIND=$pwd/build/gcc/gnatbind --GNATLINK=dgnatlink --GCC=dgcc"
+
+#cd $pwd/build/gcc/ada
+#make CFLAGS="-O2" CC="../xgcc -B../" STAGE_PREFIX=../ a-link.o a-gmem.o
+#cd $pwd
+
+[ -f build/gcc/gnatmake.old ] || cp -p build/gcc/gnatmake build/gcc/gnatmake.old
+[ -f build/gcc/gnatlink.old ] || cp -p build/gcc/gnatlink build/gcc/gnatlink.old
+
+make -C build/gcc/ada \
+	CFLAGS='-gnatp -gnata -O2 ' \
+	ADA_INCLUDES="-I." \
+	CC="../xgcc -B../" \
+	STAGE_PREFIX=../ \
+    ../gnatmake ../gnatlink
+
+mv gnatmake bgnatmake
+mv gnatlink bgnatlink
+exit 0
+
+cd build/gcc/ada
+for i in ../gnatchop ../gnatcmd \
+    ../gnatkr ../gnatlbr \
+    ../gnatls ../gnatmake \
+    ../gnatprep ../gnatpsys \
+    ../gnatxref ../gnatfind
+do
+  rm -f $i
+  $GMCMD -O2 -gnatp -o $i `basename $i`.adb -largs -L..
+done
+
+rm -f ../gnatmem
+$GMCMD -O2 -gnatp -o ../gnatmem gnatmem.adb -largs -L.. a-gmem.o
+$GMCMD -O2 -gnatp -o ../gnatlink gnatlink -largs -L.. a-link.o
+rm -f ../gnatpsta
+
+make CFLAGS="-O2" CC="../xgcc -B../" a-gettty.o a-deftar.o
+$GMCMD -O2 -gnatp -o ../gnatpsta gnatpsta -largs -L.. a-gettty.o a-deftar.o
+rm -f ../gnatbl
+
+make CFLAGS="-O2" CC="../xgcc -B../" gnatbl.o
+../xgcc -B../ -o ../gnatbl gnatbl.o -L.. -lgnat
+rm -f ../bgnatmake ../bgnatlink ../debian/dgcc ../debian/dgnatlink
+
+chmod +w rts/*.ali
--- gcc-5-5.4.0.orig/debian/rules
+++ gcc-5-5.4.0/debian/rules
@@ -0,0 +1,83 @@
+#! /usr/bin/make -f
+# -*- makefile -*-
+# Build rules for gcc (>= 2.95) and gcc-snapshot
+# Targets found in this makefile:
+#	- unpack tarballs
+#	- patch sources
+#	- (re)create the control file
+#	- create a debian/rules.parameters file, which is included
+#	  by debian/rules2
+# All other targets are passed to the debian/rules2 file
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+unexport LANG LC_ALL LC_CTYPE LC_COLLATE LC_TIME LC_NUMERIC LC_MESSAGES
+
+default: build
+
+include debian/rules.defs
+include debian/rules.unpack
+include debian/rules.patch
+
+control: $(control_dependencies)
+	-mkdir -p $(stampdir)
+	$(MAKE) -f debian/rules.conf $@
+
+configure: control $(unpack_stamp) $(patch_stamp)
+	$(MAKE) -f debian/rules2 $@
+
+pre-build:
+#ifneq (,$(filter $(distrelease),squeeze sid))
+#ifeq (,$(filter $(DEB_TARGET_ARCH),amd64 i386))
+#	@echo explicitely fail the build for $(DEB_TARGET_ARCH)
+#	@echo no bug report required. please ask the port maintainers if they support gcc-4.5.
+#	false
+#endif
+#endif
+
+build: pre-build control
+	$(MAKE) $(NJOBS) -f debian/rules2 $@
+build-arch: pre-build control
+	$(MAKE) $(NJOBS) -f debian/rules2 $@
+build-indep: pre-build control
+	$(MAKE) $(NJOBS) -f debian/rules2 $@
+
+check: $(check_stamp)
+$(check_stamp): $(build_stamp)
+	$(MAKE) -f debian/rules2 $@
+
+clean:
+	rm -rf $(stampdir)
+# remove temporary dirs used for unpacking
+	rm -rf $(gcc_srcdir) $(gdc_srcdir)
+	-$(MAKE) -f debian/rules2 $@
+	rm -rf $(srcdir)* $(builddir)* debian/tmp* html
+	rm -f bootstrap-* first-move-stamp
+	rm -f debian/*.tmp
+	rm -f debian/soname-cache
+	find debian -name '.#*' | xargs -r rm -f
+	rm -f $(series_file)*
+	dh_clean
+
+install:
+	$(MAKE) -f debian/rules2 $@
+
+html-docs doxygen-docs update-doxygen-docs update-ada-files xxx:
+	$(MAKE) -f debian/rules2 $@
+
+binary-indep binary-arch binary:
+	$(MAKE) -f debian/rules2 $@
+
+source diff:
+	@echo >&2 'source and diff are obsolete - use dpkg-source -b'; false
+
+release:
+	foo=$(shell basename $(CURDIR)); \
+		if [ "$$foo" != "gcc-3.4" ]; then \
+			find -name CVS -o -name .cvsignore -o -name '.#*' | \
+				xargs rm -rf; \
+		fi
+
+.NOTPARALLEL:
+.PHONY: build clean binary-indep binary-arch binary release
--- gcc-5-5.4.0.orig/debian/rules.conf
+++ gcc-5-5.4.0/debian/rules.conf
@@ -0,0 +1,1461 @@
+# -*- makefile -*-
+# rules.conf
+#	- used to build debian/control and debian/rules.parameters
+#	- assumes unpacked sources
+
+include debian/rules.defs
+include debian/rules.sonames
+
+# manual ...
+ifeq ($(DEB_TARGET_GNU_CPU), $(findstring $(DEB_TARGET_GNU_CPU),hppa m68k))
+  ifeq ($(DEB_TARGET_ARCH),m68k)
+    GCC_SONAME := 2
+  endif
+  ifeq ($(DEB_TARGET_ARCH),hppa)
+    GCC_SONAME := 4
+  endif
+else
+  GCC_SONAME := 1
+endif
+DEB_LIBGCC_SOVERSION := $(DEB_SOEVERSION)
+DEB_LIBGCC_VERSION := $(DEB_EVERSION)
+
+_soname_map = gcc=$(GCC_SONAME) stdc++=$(CXX_SONAME) gomp=$(GOMP_SONAME) \
+	ssp=$(SSP_SONAME) gfortran=$(FORTRAN_SONAME) \
+	itm=$(ITM_SONAME) objc=$(OBJC_SONAME) quadmath=$(QUADMATH_SONAME) \
+	go=$(GO_SONAME) backtrace=$(BTRACE_SONAME) \
+	atomic=$(ATOMIC_SONAME) asan=$(ASAN_SONAME) lsan=$(LSAN_SONAME) \
+	tsan=$(TSAN_SONAME) ubsan=$(UBSAN_SONAME) \
+	vtv=$(VTV_SONAME) cilkrts=$(CILKRTS_SONAME) mpx=$(MPX_SONAME)
+_soname = $(patsubst $(1)=%,%,$(filter $(1)=%,$(_soname_map)))
+
+rel_on_dev := $(if $(filter libgcc-$(BASE_VERSION)-dev$(LS), $(shell dh_listpackages -i)),>=,=)
+# $(call _lib_name,<name>,<biarch>,<ext>)
+_lib_name = $(subst $(SPACE),, \
+  lib$(2)$(1) \
+  $(if $(filter dev,$(3)),,$(call _soname,$(1))) \
+  $(if $(or $(filter $(3),dev),$(and $(filter $(3),dbg),$(filter $(1),stdc++))),-$(BASE_VERSION)) \
+  $(if $(3),-$(3))$(LS)$(AQ))
+# $(call _lib_vers,<ext>,<vers>) 
+_lib_vers = ($(if $(filter $(1),dev),$(rel_on_dev),>=) $(2))
+
+# Helper to generate biarch/triarch dependencies.
+# For example, $(eval $(call gen_multilib_deps,gomp)) will create the
+# libgompbiarch variable, and make it contains the libgompbiarch{32,64,n32}
+# variables if biarch{32,64,n32} is set to yes.
+
+define gen_multilib_deps
+  lib$1biarch64$2  := $(call _lib_name,$(1),64,$(2)) $(call _lib_vers,$(2),$(3))
+  lib$1biarch32$2  := $(call _lib_name,$(1),32,$(2)) $(call _lib_vers,$(2),$(3))
+  lib$1biarchn32$2 := $(call _lib_name,$(1),n32,$(2)) $(call _lib_vers,$(2),$(3))
+  lib$1biarchx32$2 := $(call _lib_name,$(1),x32,$(2)) $(call _lib_vers,$(2),$(3))
+  lib$1biarchhf$2  := $(call _lib_name,$(1),hf,$(2)) $(call _lib_vers,$(2),$(3))
+  lib$1biarchsf$2  := $(call _lib_name,$(1),sf,$(2)) $(call _lib_vers,$(2),$(3))
+  ifeq ($$(biarch64),yes)
+    lib$1biarch$2 := $$(lib$1biarch64$2)
+  endif
+  ifeq ($$(biarch32),yes)
+    ifeq ($$(biarch64),yes)
+      lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarch32$2)
+    else
+      lib$1biarch$2 := $$(lib$1biarch32$2)
+    endif
+  endif
+  ifeq ($$(biarchx32),yes)
+    ifeq ($1,mpx)
+      ifeq ($$(biarch64),yes)
+        lib$1biarch$2 := $$(lib$1biarch64$2)
+      else ifeq ($$(biarch32),yes)
+        lib$1biarch$2 := $$(lib$1biarch32$2)
+      else
+        lib$1biarch$2 :=
+      endif
+    else ifeq ($$(biarch64),yes)
+      lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarchx32$2)
+    else ifeq ($$(biarch32),yes)
+      lib$1biarch$2 := $$(lib$1biarch32$2), $$(lib$1biarchx32$2)
+    else
+      lib$1biarch$2 := $$(lib$1biarchx32$2)
+    endif
+  endif
+  ifeq ($$(biarchn32),yes)
+    ifeq ($$(biarch64),yes)
+      lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarchn32$2)
+    else ifeq ($$(biarch32),yes)
+      lib$1biarch$2 := $$(lib$1biarch32$2), $$(lib$1biarchn32$2)
+    else
+      lib$1biarch$2 := $$(lib$1biarchn32$2)
+    endif
+  endif
+  ifeq ($$(biarchhf),yes)
+    lib$1biarch$2 := $$(lib$1biarchhf$2) | $(call _lib_name,$(1),hf,$(2))
+  endif
+  ifeq ($$(biarchsf),yes)
+    lib$1biarch$2 := $$(lib$1biarchsf$2) | $(call _lib_name,$(1),sf,$(2))
+  endif
+endef
+ifeq ($(with_shared_libgcc),yes)
+  LIBGCC_DEP := libgcc$(GCC_SONAME)$(LS)$(AQ) (>= $(DEB_LIBGCC_VERSION))
+  $(eval $(call gen_multilib_deps,gcc,,$(DEB_LIBGCC_VERSION)))
+endif
+LIBGCC_DEV_DEP := libgcc-$(BASE_VERSION)-dev$(LS)$(AQ) ($(rel_on_dev) $(DEB_VERSION))
+$(foreach x,stdc++ gomp ssp gfortran itm objc atomic asan lsan mpx ubsan quadmath go vtv cilkrts, \
+	$(eval $(call gen_multilib_deps,$(x),,$$$${gcc:Version})))
+$(foreach x,gcc stdc++ gfortran objc go phobos, \
+	$(eval $(call gen_multilib_deps,$(x),dev,$$$${gcc:Version})))
+$(foreach x,gcc stdc++ gfortran objc go, \
+	$(eval $(call gen_multilib_deps,$(x),dbg,$$$${gcc:Version})))
+
+# Helper to generate _no_archs variables.
+# For example, $(eval $(call gen_no_archs,java)) will create the java_no_archs
+# variable, using the java_no_cpu and java_no_systems variables.
+define gen_no_archs
+  $1_no_archs :=
+  ifneq (,$$($1_no_cpus))
+    $1_no_archs += $$(foreach cpu,$$(filter-out i386 amd64 alpha arm,$$($1_no_cpus)),!$$(cpu))
+    ifneq (,$$(filter i386,$$($1_no_cpus)))
+      $1_no_archs += !i386 !hurd-i386 !kfreebsd-i386
+    endif
+    ifneq (,$$(filter amd64,$$($1_no_cpus)))
+      $1_no_archs += !amd64 !kfreebsd-amd64
+    endif
+    ifneq (,$$(filter alpha,$$($1_no_cpus)))
+      $1_no_archs += !alpha !hurd-alpha
+    endif
+    ifneq (,$$(filter arm,$$($1_no_cpus)))
+      $1_no_archs += !arm !armel !armhf
+    endif
+    ifneq (,$$(strip $3))
+      $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$3$$(SPACE))
+      $1_no_archs += $$(foreach cpu,$$($1_no_cpus),$$(foreach system,$$($1_no_systems_tmp),!$$(subst gnu,$$(cpu),$$(system))))
+    endif
+  endif
+  ifneq (,$$($1_no_systems))
+    $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$$($1_no_systems)$$(SPACE))
+    $1_no_archs += $$(foreach system,$$($1_no_systems_tmp),$$(foreach cpu,$2,!$$(subst gnu,$$(cpu),$$(system))))
+  endif
+  $1_no_archs := $$(strip $$($1_no_archs))
+endef
+base_deb_cpus := amd64 i386 alpha
+base_deb_systems :=
+$(foreach x,ada java java_plugin fortran libphobos libgc check locale,$(eval $(call gen_no_archs,$(x),$(base_deb_cpus),$(base_deb_systems))))
+linux_no_archs := !hurd-any !kfreebsd-any
+
+GCC_VERSION := $(strip $(shell cat $(firstword $(wildcard $(srcdir)/gcc/FULL-VER $(srcdir)/gcc/BASE-VER))))
+NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \
+	awk -F. '{OFS="."; $$2 += 1; $$3=0; print}')
+GCC_MAJOR_VERSION := $(shell echo $(GCC_VERSION)   | sed -r 's/([0-9])\.[0-9]\.[0-9]/\1/')
+GCC_MINOR_VERSION := $(shell echo $(GCC_VERSION)   | sed -r 's/[0-9]\.([0-9])\.[0-9]/\1/')
+GCC_RELEASE_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/[0-9]\.[0-9]\.([0-9])/\1/')
+NEXT_GCC_MAJOR_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1)
+NEXT_GCC_MINOR_VERSION := $(shell expr $(echo $(GCC_MINOR_VERSION)) + 1)
+NEXT_GCC_RELEASE_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1)
+
+ifeq ($(single_package),yes)
+  BASE_VERSION := $(shell echo $(GCC_VERSION) | sed -e 's/\([1-9]*\).*/\1/')
+endif
+
+GCC_SOURCE_VERSION := $(shell echo $(DEB_VERSION) | sed 's/-.*//')
+NEXT_GCC_SOURCE_VERSION := $(shell echo $(GCC_SOURCE_VERSION) | \
+	awk -F. '{OFS="."; $$2 += 1; $$3=0; print}')
+
+MAINTAINER = Debian GCC Maintainers <debian-gcc@lists.debian.org>
+ifeq ($(distribution),Ubuntu)
+  ifneq (,$(findstring $(PKGSOURCE),gnat gdc))
+    MAINTAINER = Ubuntu MOTU Developers <ubuntu-motu@lists.ubuntu.com>
+  else
+    MAINTAINER = Ubuntu Core developers <ubuntu-devel-discuss@lists.ubuntu.com>
+  endif
+endif
+
+UPLOADERS = Matthias Klose <doko@debian.org>
+ifneq (,$(findstring $(PKGSOURCE),gnat))
+  UPLOADERS = Ludovic Brenta <lbrenta@debian.org>
+endif
+ifneq (,$(findstring $(PKGSOURCE),gdc))
+  UPLOADERS = Iain Buclaw <ibuclaw@ubuntu.com>, Matthias Klose <doko@debian.org>
+endif
+
+DPKGV = 1.14.15
+ifeq ($(with_multiarch_lib),yes)
+  DPKGV = 1.16.0~ubuntu4
+endif
+ifeq ($(multiarch_stage1),yes)
+  DPKGV = 1.16.0~ubuntu4
+endif
+ifeq (,$(filter $(distrelease),lenny etch squeeze wheezy dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal raring saucy trusty utopic))
+  DPKGV = 1.17.14
+endif
+DPKG_BUILD_DEP = dpkg-dev (>= $(DPKGV)),
+
+ifeq ($(DEB_HOST_ARCH),$(DEB_TARGET_ARCH))
+  TARGET_QUAL = :$(DEB_TARGET_ARCH)
+endif
+
+# The binutils version needed.
+# The oldest suitable versions for the various platforms can be found in
+# INSTALL/specific.html ; we take a tighter dependency if possible to be on
+# the safe side (something like newest( version in stable, versions for the
+# various platforms in INSTALL/specific.html) ).
+# We need binutils (>= 2.19.1) for a new dwarf unwind expression opcode.
+# See http://gcc.gnu.org/ml/gcc-patches/2008-09/msg01713.html
+ifeq ($(trunk_build),yes)
+  BINUTILSBDV = 2.23
+else
+  BINUTILSBDV = 2.22
+  ifneq (,$(filter $(distrelease),vivid))
+    BINUTILSBDV = 2.25-3~
+  else ifneq (,$(filter $(distrelease),jessie))
+    BINUTILSBDV = 2.25-7~
+  else ifneq (,$(filter $(distrelease),sid stretch xenial))
+    BINUTILSBDV = 2.26.1
+  endif
+endif
+ifeq ($(DEB_CROSS),yes)
+  BINUTILS_BUILD_DEP = binutils$(TS)$(NT) (>= $(BINUTILSBDV)), binutils-multiarch$(NT) (>= $(BINUTILSBDV))
+  BINUTILSV := $(shell dpkg -l binutils$(TS) \
+			| awk '/^ii/{print $$3;exit}' | sed 's/-.*//')
+else
+  BINUTILS_BUILD_DEP = binutils$(NT) (>= $(BINUTILSBDV)) | binutils-multiarch$(NT) (>= $(BINUTILSBDV))
+  ifneq (,$(findstring cross-build-,$(build_type)))
+    BINUTILSV := $(shell dpkg -l binutils$(TS) \
+			| awk '/^ii/{print $$3;exit}' | sed 's/-.*//')
+  else
+    BINUTILSV := $(shell dpkg -l binutils binutils-multiarch \
+			| awk '/^ii/{print $$3;exit}' | sed 's/-.*//')
+  endif
+endif
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+  ifeq ($(hppa64_archs),hppa)
+    BINUTILS_BUILD_DEP += , binutils-hppa64$(NT) (>= $(BINUTILSBDV)) [$(hppa64_archs)]
+  else
+    BINUTILS_BUILD_DEP += , binutils-hppa64-linux-gnu$(NT) (>= $(BINUTILSBDV)) [$(hppa64_archs)]
+  endif
+endif
+ifeq (,$(BINUTILSV))
+  BINUTILSV := $(BINUTILSBDV)
+endif
+
+# FIXME; stripping doesn't work with gold
+#BINUTILS_BUILD_DEP += , binutils-gold (>= $(BINUTILSV)) [$(gold_archs)]
+
+# libc-dev dependencies
+libc_ver := 2.11
+libc_dev_ver := $(libc_ver)
+ifeq ($(with_multiarch_lib),yes)
+  ifeq ($(derivative),Debian)
+    libc_dev_ver := 2.13-5
+  else
+    libc_dev_ver := 2.13-0ubuntu6
+  endif
+endif
+# first set LIBC_DEP/LIBC_DEV_DEP for native builds only
+ifeq ($(DEB_TARGET_ARCH_OS),linux)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),alpha ia64))
+    LIBC_DEP = libc6.1
+  else
+    LIBC_DEP = libc6
+  endif
+  ifneq (,$(findstring musl-linux-,$(DEB_TARGET_ARCH)))
+    LIBC_DEP = musl
+    libc_ver = 0.9
+    libc_dev_ver = 0.9
+  endif
+else
+  ifeq ($(DEB_TARGET_ARCH_OS),hurd)
+    LIBC_DEP = libc0.3
+  endif
+  ifeq ($(DEB_TARGET_ARCH_OS),kfreebsd)
+    LIBC_DEP = libc0.1
+  endif
+  ifeq ($(DEB_TARGET_ARCH),uclibc)
+       LIBC_DEP = libuclibc
+  endif
+endif
+LIBC_DEV_DEP := $(LIBC_DEP)-dev
+
+# this is about Debian archs name, *NOT* GNU target triplet
+biarch_deb_map := \
+	i386=amd64 amd64=i386 \
+	mips=mips64 mipsel=mips64 \
+	powerpc=ppc64 ppc64=powerpc \
+	sparc=sparc64 sparc64=sparc\
+	s390=s390x s390x=s390 \
+	kfreebsd-amd64=i386 \
+	armel=armhf \
+	armhf=armel
+biarch_deb_arch := $(patsubst $(DEB_TARGET_ARCH)=%,%, \
+	$(filter $(DEB_TARGET_ARCH)=%,$(biarch_deb_map)))
+
+LIBC_BIARCH_DEP :=
+LIBC_BIARCH_DEV_DEP :=
+ifneq (,$(findstring yes,$(biarch64) $(biarch32) $(biarchn32) $(biarchx32)$(biarchhf)$(biarchsf)))
+  LIBC_BIARCH_DEP := $${shlibs:Depends}
+  LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver))
+  # amd64, x32, i386
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),amd64 x32 i386))
+  ifeq ($(biarch64)$(biarch32),yesyes)
+    LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-i386$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  ifeq ($(biarch64)$(biarchx32),yesyes)
+    LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  ifeq ($(biarch32)$(biarchx32),yesyes)
+    LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-i386$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  endif
+  # mips*
+  ifneq (,$(findstring mips,$(DEB_TARGET_ARCH)))
+  ifeq ($(biarchn32)$(biarch32),yesyes)
+      LIBC_BIARCH_DEV_DEP := libc6-dev-mips32$(LS)$(AQ) (>= $(libc_ver)), libc6-dev-mipsn32$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  ifeq ($(biarch64)$(biarch32),yesyes)
+      triarch := $(COMMA)$(SPACE)
+      LIBC_BIARCH_DEV_DEP := libc6-dev-mips32$(LS)$(AQ) (>= $(libc_ver)), libc6-dev-mips64$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  ifeq ($(biarchn32)$(biarch64),yesyes)
+      triarch := $(COMMA)$(SPACE)
+      LIBC_BIARCH_DEV_DEP := libc6-dev-mips64$(LS)$(AQ) (>= $(libc_ver)), libc6-dev-mipsn32$(LS)$(AQ) (>= $(libc_ver))
+  endif
+  endif
+
+  ifeq ($(biarchhf),yes)
+    LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver))
+    LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ)
+    LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ)
+  endif
+  ifeq ($(biarchsf),yes)
+    LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver))
+    LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ)
+    LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ)
+  endif
+endif
+
+# now add the cross suffix and required version
+LIBC_DEP := $(LIBC_DEP)$(LS)$(AQ)
+LIBC_DEV_DEP := $(LIBC_DEV_DEP)$(LS)$(AQ) (>= $(libc_dev_ver))
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+  LIBC_DBG_DEP = libc6.1-dbg [alpha ia64] | libc0.3-dbg [hurd-i386] | libc0.1-dbg [kfreebsd-i386 kfreebsd-amd64] | libc6-dbg,
+endif
+
+# TODO: make this automatic, there must be a better way to define LIBC_DEP.
+ifneq ($(DEB_CROSS),yes)
+  LIBC_BUILD_DEP = libc6.1-dev (>= $(libc_dev_ver)) [alpha ia64] | libc0.3-dev (>= $(libc_dev_ver)) [hurd-i386] | libc0.1-dev (>= $(libc_dev_ver)) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= $(libc_dev_ver))
+  ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric))
+    LIBC_BUILD_DEP += , libc6-dev (>= 2.13-31) [armel armhf]
+  endif
+  LIBC_BIARCH_BUILD_DEP = libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 mipsn32 mipsn32el mips64 mips64el s390x sparc64 x32], libn32gcc1 [mips mipsel mips64 mips64el], lib64gcc1 [i386 mips mipsel mipsn32 mipsn32el powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel mipsn32 mipsn32el], libc6-dev-mipsn32 [mips mipsel mips64 mips64el], libc6-dev-mips32 [mipsn32 mipsn32el mips64 mips64el],
+  ifneq (,$(findstring amd64,$(biarchx32archs)))
+  LIBC_BIARCH_BUILD_DEP += libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386],
+endif
+ifneq (,$(findstring armel,$(biarchhfarchs)))
+  LIBC_BIARCH_BUILD_DEP += libc6-dev-armhf [armel], libhfgcc1 [armel],
+endif
+ifneq (,$(findstring armhf,$(biarchsfarchs)))
+  LIBC_BIARCH_BUILD_DEP += libc6-dev-armel [armhf], libsfgcc1 [armhf],
+endif
+else
+  LIBC_BUILD_DEP = $(LIBC_DEV_DEP),
+  ifneq ($(LIBC_BIARCH_DEV_DEP),)
+    LIBC_BIARCH_BUILD_DEP = $(LIBC_BIARCH_DEV_DEP),
+  else
+    LIBC_BIARCH_BUILD_DEP =
+  endif
+endif
+
+# needed for the include/asm symlink to run the testsuite for
+# non default multilibs
+ifneq (,$(multilib_archs))
+  GCC_MULTILIB_BUILD_DEP = g++-multilib [$(multilib_archs)]$(pf_ncross),
+endif
+GCC_MULTILIB_BUILD_DEP += g++-5 [arm64]$(pf_ncross),
+
+LIBUNWIND_DEV_DEP := libunwind7-dev$(LS)$(AQ) (>= 0.98.5-6)
+LIBUNWIND_BUILD_DEP := $(LIBUNWIND_DEV_DEP) [ia64],
+LIBATOMIC_OPS_BUILD_DEP := libatomic-ops-dev$(LS) [ia64],
+ifneq ($(DEB_TARGET_ARCH),ia64)
+  LIBUNWIND_DEV_DEP := # nothing
+endif
+
+ifneq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty))
+  GMP_BUILD_DEP = libgmp3-dev | libgmp-dev (>= 2:5.0.1~),
+  MPFR_BUILD_DEP = libmpfr-dev,
+else
+  GMP_BUILD_DEP = libgmp-dev (>= 2:5.0.1~),
+  MPFR_BUILD_DEP = libmpfr-dev (>= 3.0.0-9~),
+endif
+
+ISL_BUILD_DEP = libisl-dev,
+ifneq (,$(filter $(distrelease),jessie sid experimental))
+  ISL_BUILD_DEP = libisl-dev (>= 0.14),
+endif
+
+ifneq (,$(filter $(distrelease),lenny etch squeeze wheezy dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal raring))
+  MPC_BUILD_DEP = libmpc-dev,
+else
+  MPC_BUILD_DEP = libmpc-dev (>= 1.0),
+endif
+
+SOURCE_BUILD_DEP :=
+ifeq (,$(findstring gcc,$(PKGSOURCE)))
+  SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)),
+endif
+
+CHECK_BUILD_DEP := dejagnu [$(check_no_archs)],
+
+AUTO_BUILD_DEP := m4, libtool,
+AUTO_BUILD_DEP += autoconf2.64,
+
+ifeq (,$(filter $(distrelease),lenny etch squeeze wheezy dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal raring saucy trusty))
+  SDT_BUILD_DEP = systemtap-sdt-dev [linux-any kfreebsd-any hurd-any],
+endif
+
+# ensure that the common libs, built from the next GCC version are available
+ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+  ifneq ($(with_common_libs),yes)
+    BASE_BUILD_DEP = gcc-6-base,
+  endif
+endif
+
+ifneq ($(DEB_CROSS),yes)
+# all archs for which to create b-d's
+any_archs = alpha amd64 armel armhf arm64 i386 mips mipsel mips64 mips64el powerpc ppc64 ppc64el m68k sh4 sparc64 s390x x32
+arch_gnutype_map = \
+	alpha=alpha-linux-gnu \
+	amd64=x86-64-linux-gnu \
+	armel=arm-linux-gnueabi \
+	armhf=arm-linux-gnueabihf \
+	arm64=aarch64-linux-gnu \
+	i386=i686-linux-gnu \
+	mips=mips-linux-gnu \
+	mipsel=mipsel-linux-gnu \
+	mips64=mips64-linux-gnuabi64 \
+	mips64el=mips64el-linux-gnuabi64 \
+	powerpc=powerpc-linux-gnu \
+	ppc64=powerpc64-linux-gnu \
+	ppc64el=powerpc64le-linux-gnu \
+	m68k=m68k-linux-gnu \
+	sh4=sh4-linux-gnu \
+	sparc64=sparc64-linux-gnu \
+	s390x=s390x-linux-gnu \
+	x32=x86-64-linux-gnux32
+
+_element = $(filter $1=%,$(arch_gnutype_map))
+_gnu_type = $(subst $1=,,$(filter $1=%,$(arch_gnutype_map)))
+
+ifneq (,$(filter $(distrelease),lenny etch squeeze wheezy wheezy dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal raring saucy trusty utopic vivid))
+  DEBHELPER_BUILD_DEP = debhelper (>= 9),
+  TARGET_TOOL_BUILD_DEP = bash, # non-empty line
+  pf_cross =
+  pf_ncross =
+else
+  DEBHELPER_BUILD_DEP = debhelper (>= 9.20141010),
+  TARGET_TOOL_BUILD_DEP = \
+	$(foreach a, $(any_archs), \
+	  g++-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>, \
+	  $(if $(filter $(a), avr),, \
+	    gobjc-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>,) \
+	  gfortran-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>, \
+	  $(if $(filter $(a), avr),, \
+	    gcj-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>,) \
+	  $(if $(filter $(a), s390 sh4),, \
+	    gdc-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>,) \
+	  $(if $(filter $(a), hppa m68k sh4),, \
+	    gccgo-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>,) \
+	  $(if $(filter $(a), m68k mips64 powerpcspe sh4 sparc64 x32),, \
+	    gnat-$(BASE_VERSION)-$(call _gnu_type,$(a)) [$(a)] <cross>,) \
+	)
+  pf_cross = $(SPACE)<cross>
+  pf_ncross = $(SPACE)<!cross>
+  NT = :native
+endif
+
+JAVA_BUILD_DEP := zlib1g-dev, libantlr-java, python$(NT), libffi-dev,
+
+ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+  bd_java_archs =
+else ifeq ($(single_package)-$(with_java),yes-yes)
+  bd_java_archs =
+else
+  bd_java_archs = $(if $(java_no_archs),$(EMPTY) [$(java_no_archs)])
+endif
+
+ifneq (,$(java_awt_peers))
+  JAVA_BUILD_DEP += fastjar$(bd_java_archs), libmagic-dev$(bd_java_archs),
+  JAVA_BUILD_DEP += libecj-java (>= 3.3.0-2)$(bd_java_archs), zip$(bd_java_archs),
+  ifeq ($(with_java_maintainer_mode),yes)
+    # gcj-5 needed for gjavah-5.
+    JAVA_BUILD_DEP += gcj-5$(bd_java_archs), ecj (>= 3.3.0-2)$(bd_java_archs),
+  endif
+  JAVA_BUILD_DEP += libasound2-dev [$(java_no_archs) $(linux_no_archs)],
+  ifneq (,$(findstring gtk,$(java_awt_peers)))
+    JAVA_BUILD_DEP += libxtst-dev$(bd_java_archs), libxt-dev$(bd_java_archs), libgtk2.0-dev (>= 2.4.4-2)$(bd_java_archs), libart-2.0-dev$(bd_java_archs), libcairo2-dev$(bd_java_archs), libgraphite2-dev$(bd_java_archs),
+  endif
+  ifneq (,$(findstring qt,$(java_awt_peers)))
+    JAVA_BUILD_DEP += libqt4-dev (>= 4.1.0)$(bd_java_archs),
+  endif
+  # gconf peer, disabled by default
+  #JAVA_BUILD_DEP += libgconf2-dev$(bd_java_archs),
+  # gstreamer peer
+  #JAVA_BUILD_DEP += libgstreamer-plugins-base0.10-dev$(bd_java_archs),
+endif
+ifneq ($(with_standalone_gcj),yes)
+  ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+    JAVA_BUILD_DEP += $(SOURCE_BUILD_DEP)
+  endif
+endif
+#JAVA_BUILD_INDEP := gcj-$(BASE_VERSION)-jdk
+ifeq ($(single_package),yes)
+  LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base
+  LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns
+  JAVA_BUILD_INDEP :=
+endif
+ifeq ($(with_separate_libgcj),yes)
+  ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+    JAVA_BUILD_DEP :=
+    JAVA_BUILD_INDEP :=
+  endif
+endif
+
+ifeq ($(with_ecj),yes)
+  ifneq (./,$(dir $(ecj_jar)))
+    ECJ_DEP = libecj-java (>= 3.5.1)
+  endif
+else
+  ECJ_DEP = ecj, libecj-java (>= 3.5.1)
+  ECJ_DEP = ecj-gcj, libecj-java-gcj (>= 3.5.1)
+  ifneq (,$(filter $(DEB_HOST_ARCH),arm armel armhf))
+    ECJ_DEP +=, ecj1
+  endif
+endif
+
+ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+  LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base
+  ifeq (,$(filter $(distrelease),lenny etch dapper hardy jaunty karmic lucid maverick natty oneiric))
+    LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns
+  endif
+  JAVA_BUILD_INDEP :=, $(JAVA_BUILD_INDEP)
+endif
+
+GO_BUILD_DEP := netbase,
+
+# try to build with itself, or with the last version
+ifneq (,$(filter $(distrelease), jessie))
+  gnat_build_dep := gnat-4.9$(NT) [$(ada_no_archs)], g++-4.9$(NT)
+else ifneq (,$(filter $(distrelease), stretch sid wheezy precise trusty wily xenial yakkety))
+  gnat_build_dep := gnat-5$(NT) [$(ada_no_archs)], g++-5$(NT)
+else ifneq (,$(filter $(distrelease), squeeze lucid))
+  gnat_build_dep :=
+else
+  gnat_build_dep := gnat$(NT) [$(ada_no_archs)]
+endif
+
+ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+  ifneq ($(with_separate_gnat),yes)
+    # Build gnat as part of the combined gcc-x.y source package.  Do not fail
+    # if gnat is not present on unsupported architectures; the build scripts
+    # will not use gnat anyway.
+    GNAT_BUILD_DEP := $(gnat_build_dep),
+  endif
+else ifeq ($(single_package),yes)
+  # Ditto, as part of the gcc-snapshot package.
+  GNAT_BUILD_DEP := $(gnat_build_dep),
+else ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+  # Special source package just for gnat. Fail early if gnat is not present,
+  # rather than waste CPU cycles and fail later.
+  # Bootstrap step needs a gnatgcc symbolic link.
+  GNAT_BUILD_DEP := $(gnat_build_dep),
+  GNAT_BUILD_DEP += $(SOURCE_BUILD_DEP)
+  JAVA_BUILD_DEP :=
+  JAVA_BUILD_INDEP :=
+  GDC_BUILD_DEP :=
+  GO_BUILD_DEP :=
+else ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+  # Special source package just for gcj.
+  GNAT_BUILD_DEP :=
+  GDC_BUILD_DEP :=
+  GO_BUILD_DEP :=
+else ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION))
+  # Special source package just for gdc.
+  GNAT_BUILD_DEP :=
+  JAVA_BUILD_DEP :=
+  JAVA_BUILD_INDEP :=
+  GDC_BUILD_DEP := $(SOURCE_BUILD_DEP)
+  GO_BUILD_DEP :=
+else ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION))
+  # Special source package just for gccgo.
+  GNAT_BUILD_DEP :=
+  JAVA_BUILD_DEP :=
+  JAVA_BUILD_INDEP :=
+  GDC_BUILD_DEP := $(SOURCE_BUILD_DEP)
+endif
+
+
+else
+# build cross compiler
+  CROSS_BUILD_DEP := libc6-dev$(cross_lib_arch),
+ifneq (,$(findstring cross-build-,$(build_type)))
+  CROSS_BUILD_DEP += zlib1g-dev$(cross_lib_arch), libmpfr-dev$(cross_lib_arch),
+endif
+  SOURCE_BUILD_DEP :=
+  ifeq (,$(findstring gcc,$(PKGSOURCE)))
+    SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)),
+  endif
+  ifeq ($(with_java),yes)
+    JAVA_BUILD_DEP := zlib1g-dev, lib64z1-dev [i386 powerpc sparc s390], lib32z1-dev [amd64 ppc64 kfreebsd-amd64 s390x],
+  endif
+  JAVA_BUILD_INDEP :=
+  GNAT_BUILD_DEP :=
+endif # cross compiler
+
+BASE_BREAKS := gcc-4.4-base (<< 4.4.7), gcc-4.7-base (<< 4.7.3), gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~)
+# these would need proper updates, and are only needed for upgrades
+ifneq (,$(filter $(distrelease),squeeze wheezy lucid precise trusty))
+  BASE_BREAKS :=
+endif
+
+
+# The numeric part of the gcc version number (x.yy.zz)
+NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \
+		awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}')
+# first version with a new path component in gcc_lib_dir (i.e. GCC_VERSION
+# or TARGET_ALIAS changes), or last version available for all architectures
+DEB_GCC_SOFT_VERSION := 5.2.1-23
+DEB_GCJ_SOFT_VERSION := 5.2.1-23
+DEB_GNAT_SOFT_VERSION := 5.2.1-23
+
+ifeq ($(with_d),yes)
+  GDC_VERSION := $(BASE_VERSION)
+  DEB_GDC_VERSION := $(DEB_VERSION)
+endif
+
+# semiautomatic ...
+DEB_SOVERSION		:= $(DEB_VERSION)
+DEB_SOVERSION		:= 5
+DEB_SOEVERSION		:= $(EPOCH):5
+DEB_STDCXX_SOVERSION	:= 5
+DEB_GCJ_SOVERSION	:= 5
+DEB_GOMP_SOVERSION	:= $(DEB_SOVERSION)
+
+DEB_GCC_VERSION := $(DEB_VERSION)
+DEB_GCJ_VERSION := $(DEB_VERSION)
+ifeq ($(with_separate_libgcj),yes)
+  ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+    DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION)
+  endif
+endif
+
+DEB_GNAT_VERSION := $(DEB_VERSION)
+ifeq ($(with_separate_gnat),yes)
+  ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+    DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION)
+  endif
+endif
+
+GNAT_VERSION := $(BASE_VERSION)
+
+LIBGNAT_DEP :=
+ifeq ($(with_libgnat),yes)
+  LIBGNAT_DEP := libgnat-$(GNAT_VERSION)$(LS)$(AQ) (>= $${gcc:Version})
+endif
+
+pkg_ver := -$(BASE_VERSION)
+
+PKG_GCJ_EXT = $(GCJ_SONAME1)
+PKG_LIBGCJ_EXT = $(GCJ_SONAME1)$(if $(GCJ_SONAME2),-$(GCJ_SONAME2))
+
+ctrl_flags = \
+	-DBINUTILSV=$(BINUTILSV) \
+	-DBINUTILSBDV=$(BINUTILSBDV) \
+	-DSRCNAME=$(PKGSOURCE) \
+	-D__$(DEB_TARGET_GNU_CPU)__ \
+	-DARCH=$(DEB_TARGET_ARCH) \
+	-DDIST=$(distribution)
+
+ctrl_flags += \
+	-DLIBC_DEV_DEP="$(LIBC_DEV_DEP)" \
+	-DLIBC_BIARCH_BUILD_DEP="$(LIBC_BIARCH_BUILD_DEP)" \
+	-DLIBC_DBG_DEP="$(LIBC_DBG_DEP)" \
+	-DBASE_BUILD_DEP="$(BASE_BUILD_DEP)" \
+	-DFORTRAN_BUILD_DEP="$(FORTRAN_BUILD_DEP)" \
+	-DGNAT_BUILD_DEP="$(GNAT_BUILD_DEP)" \
+	-DJAVA_BUILD_DEP="$(JAVA_BUILD_DEP)" \
+	-DGO_BUILD_DEP="$(GO_BUILD_DEP)" \
+	-DJAVA_BUILD_INDEP="$(JAVA_BUILD_INDEP)" \
+	-DLIBSTDCXX_BUILD_INDEP="$(LIBSTDCXX_BUILD_INDEP)" \
+	-DGDC_BUILD_DEP="$(GDC_BUILD_DEP)" \
+	-DBINUTILS_BUILD_DEP="$(BINUTILS_BUILD_DEP)" \
+	-DLIBC_BUILD_DEP="$(LIBC_BUILD_DEP)" \
+	-DCHECK_BUILD_DEP="$(CHECK_BUILD_DEP)" \
+	-DAUTO_BUILD_DEP="$(AUTO_BUILD_DEP)" \
+	-DSDT_BUILD_DEP="$(SDT_BUILD_DEP)" \
+	-DISL_BUILD_DEP="$(ISL_BUILD_DEP)" \
+	-DGMP_BUILD_DEP="$(GMP_BUILD_DEP)" \
+	-DMPFR_BUILD_DEP="$(MPFR_BUILD_DEP)" \
+	-DMPC_BUILD_DEP="$(MPC_BUILD_DEP)" \
+	-DDEBHELPER_BUILD_DEP="$(DEBHELPER_BUILD_DEP)" \
+	-DDPKG_BUILD_DEP="$(DPKG_BUILD_DEP)" \
+	-DSOURCE_BUILD_DEP="$(SOURCE_BUILD_DEP)" \
+	-DCROSS_BUILD_DEP="$(CROSS_BUILD_DEP)" \
+	-DGCC_MULTILIB_BUILD_DEP='$(GCC_MULTILIB_BUILD_DEP)' \
+	-DTARGET_TOOL_BUILD_DEP='$(TARGET_TOOL_BUILD_DEP)' \
+	-DMULTILIB_ARCHS="$(multilib_archs)" \
+	-DNEON_ARCHS="$(neon_archs)" \
+	-DTP=$(TP) \
+	-DTS=$(TS) \
+	-DLS=$(LS) \
+	-DAQ=$(AQ) \
+	-DNT=$(NT)
+
+ifeq ($(DEB_CROSS),yes)
+  ctrl_flags += \
+	-DTARGET=$(DEB_TARGET_ARCH) \
+	-DLIBUNWIND_BUILD_DEP="$(LIBUNWIND_BUILD_DEP)" \
+	-DLIBATOMIC_OPS_BUILD_DEP="$(LIBATOMIC_OPS_BUILD_DEP)"
+  ifeq ($(DEB_STAGE),rtlibs)
+    ctrl_flags += -DCROSS_ARCH=$(DEB_TARGET_ARCH)
+  endif
+else
+  # add '-DPRI=optional' to ctrl_flags if this is not the default compiler
+  # ctrl_flags += \
+  #     -DPRI=optional
+endif
+
+ifeq ($(with_base_only),yes)
+  ctrl_flags += \
+	-DBASE_ONLY=yes
+endif
+
+ifeq ($(with_multiarch_lib),yes)
+  ctrl_flags += \
+	-DMULTIARCH=yes
+endif
+
+control: control-file readme-bugs-file parameters-file symbols-files copyright-file substvars-file versioned-files check-versions
+
+# stage1 and stage2 compilers are only C
+ifneq (,$(filter $(DEB_STAGE),stage1 stage2))
+  languages = c
+  addons = gccbase cdev plugindev
+  ifeq ($(with_gcclbase),yes)
+    addons += gcclbase
+  endif
+  ifeq ($(multilib),yes)
+    addons += multilib
+  endif
+  addons += $(if $(findstring armel,$(biarchhfarchs)),armml)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),armml)
+  addons += $(if $(findstring amd64,$(biarchx32archs)),x32dev)
+  ifeq ($(DEB_STAGE),stage2)
+    addons += libgcc
+    ifeq ($(multilib),yes)
+      addons += lib32gcc lib64gcc libn32gcc
+      addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc)
+      addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc)
+      addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc)
+    endif
+  else
+    LIBC_BIARCH_DEV_DEP :=
+  endif
+else
+languages = c c++ fortran objc objpp
+ifeq ($(DEB_STAGE),rtlibs)
+  ifeq (,$(filter libgfortran, $(with_rtlibs)))
+    languages := $(filter-out fortran, $(languages))
+  endif
+  ifeq (,$(filter libobjc, $(with_rtlibs)))
+    languages := $(filter-out objc objpp, $(languages))
+  endif
+endif
+ifeq ($(with_gccbase),yes)
+    addons += gccbase
+endif
+ifeq ($(with_gcclbase),yes)
+  addons += gcclbase
+endif
+ifneq ($(DEB_STAGE),rtlibs)
+  addons += cdev c++dev source multilib
+  ifeq ($(build_type),build-native)
+    addons += testresults
+  endif
+  ifneq (,$(filter fortran, $(languages)))
+      addons += fdev
+  endif
+  ifneq (,$(filter objc, $(languages)))
+      addons += objcdev
+  endif
+  ifneq (,$(filter objpp, $(languages)))
+      addons += objppdev
+  endif
+  addons += plugindev
+endif
+addons += $(if $(findstring armel,$(biarchhfarchs)),armml)
+addons += $(if $(findstring armhf,$(biarchsfarchs)),armml)
+addons += $(if $(findstring amd64,$(biarchx32archs)),x32dev)
+ifeq ($(with_libgcc),yes)
+  addons += libgcc lib4gcc lib32gcc lib64gcc libn32gcc
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc)
+endif
+ifeq ($(with_libcxx),yes)
+  addons += libcxx lib32cxx lib64cxx libn32cxx
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32cxx)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfcxx)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfcxx)
+endif
+addons += $(if $(findstring amd64,$(biarchx32archs)),libx32dbgcxx)
+addons += $(if $(findstring armel,$(biarchhfarchs)),libhfdbgcxx)
+addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfdbgcxx)
+ifeq ($(with_libgfortran),yes)
+  addons += libgfortran lib32gfortran lib64gfortran libn32gfortran
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gfortran)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgfortran)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgfortran)
+endif
+ifeq ($(with_libobjc),yes)
+  addons += libobjc lib32objc lib64objc libn32objc
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32objc)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfobjc)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfobjc)
+endif
+ifeq ($(with_libgomp),yes)
+  addons += libgomp lib32gomp lib64gomp libn32gomp
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gomp)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgomp)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgomp)
+endif
+ifeq ($(with_libitm),yes)
+  addons += libitm lib32itm lib64itm libn32itm
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32itm)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfitm)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfitm)
+endif
+ifeq ($(with_libatomic),yes)
+  addons += libatomic lib32atomic lib64atomic libn32atomic
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32atomic)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfatomic)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfatomic)
+endif
+ifeq ($(with_libbacktrace),yes)
+  addons += libbtrace lib32btrace lib64btrace libn32btrace
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32btrace)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfbtrace)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfbtrace)
+endif
+ifeq ($(with_libasan),yes)
+  addons += libasan lib32asan lib64asan libn32asan
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32asan)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfasan)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfasan)
+endif
+ifeq ($(with_liblsan),yes)
+  addons += liblsan lib32lsan lib64lsan libn32lsan
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32lsan)
+  #addons += $(if $(findstring armel,$(biarchhfarchs)),libhflsan)
+  #addons += $(if $(findstring armhf,$(biarchsfarchs)),libsflsan)
+endif
+ifeq ($(with_libtsan),yes)
+  addons += libtsan
+  addons += libtsan #lib32tsan lib64tsan libn32tsan
+  #addons += $(if $(findstring amd64,$(biarchx32archs)),libx32tsan)
+  #addons += $(if $(findstring armel,$(biarchhfarchs)),libhftsan)
+  #addons += $(if $(findstring armhf,$(biarchsfarchs)),libsftsan)
+endif
+ifeq ($(with_libubsan),yes)
+  addons += libubsan lib32ubsan lib64ubsan libn32ubsan
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32ubsan)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfubsan)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfubsan)
+endif
+ifeq ($(with_vtv),yes)
+  addons += libvtv lib32vtv lib64vtv #libn32vtv
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32vtv)
+  #addons += $(if $(findstring armel,$(biarchhfarchs)),libhfvtv)
+  #addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfvtv)
+endif
+ifeq ($(with_libcilkrts),yes)
+  addons += libcilkrts
+  addons += libcilkrts lib32cilkrts lib64cilkrts #libn32cilkrts
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32cilkrts)
+  #addons += $(if $(findstring armel,$(biarchhfarchs)),libhfcilkrts)
+  #addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfcilkrts)
+endif
+ifeq ($(with_mpx),yes)
+  addons += libmpx lib32mpx lib64mpx
+endif
+ifeq ($(with_libqmath),yes)
+  addons += libqmath lib32qmath lib64qmath libn32qmath
+  addons += $(if $(findstring amd64,$(biarchx32archs)),libx32qmath)
+  addons += $(if $(findstring armel,$(biarchhfarchs)),libhfqmath)
+  addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfqmath)
+endif
+ifeq ($(with_jit),yes)
+  addons += jit
+endif
+ifeq ($(with_libgccjit),yes)
+  addons += libjit
+endif
+ifeq ($(with_libcc1),yes)
+  addons += libcc1
+endif
+ifeq ($(with_d),yes)
+  languages += d
+  ifeq ($(with_libphobos),yes)
+    addons += libphobos
+    addons += $(if $(findstring amd64,$(biarchx32archs)),libx32phobos)
+  endif
+endif
+ifeq ($(with_go),yes)
+  addons += ggo godev
+  ifeq ($(with_libgo),yes)
+    addons += libggo lib32ggo lib64ggo libn32ggo
+    addons += $(if $(findstring amd64,$(biarchx32archs)),libx32ggo)
+  endif
+endif
+ifeq ($(with_ada),yes)
+  languages += ada
+  addons += libgnat libs # libgmath libnof lib64gnat ssp
+  ifeq ($(with_gnatsjlj),yes)
+    addons += adasjlj
+  endif
+endif
+ifeq ($(with_java),yes)
+  languages += java
+  addons += gcj
+  ifneq ($(DEB_CROSS),yes)
+    addons += libgcj libgcjdev gcjdoc gcjsrc
+  endif
+endif
+
+  ifneq ($(DEB_CROSS),yes)
+  ifneq (,$(neon_archs))
+    addons += libneongcc libneongomp libneonitm libneonobjc libneongfortran libneoncxx
+  endif
+  ifeq ($(with_fixincl),yes)
+    addons += $(if $(DEB_STAGE),,fixincl)
+  endif
+  ifeq ($(with_libgcj_doc),yes)
+    addons += gcjdoc
+  endif
+  endif # DEB_CROSS
+#  ifneq (,$(findstring gtk, $(java_awt_peers)))
+#    addons += gtkpeer
+#  endif
+#  ifneq (,$(findstring qt, $(java_awt_peers)))
+#    addons += qtpeer
+#  endif
+  ifeq ($(with_separate_libgcj),yes)
+    ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+      languages := $(filter-out java,$(languages))
+      addons := $(filter-out gcj libgcj libgcjdev gcjdoc gcjsrc gtkpeer qtpeer,$(addons))
+    endif
+    ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+      languages = java
+      addons = gcj libgcj libgcjdev gcjsrc
+      addons += $(if $(filter yes,$(with_gcjbase)),gcjbase)
+      addons += $(if $(filter yes,$(with_gcjxbase)),gcjxbase)
+    ifeq ($(with_libgcj_doc),yes)
+      addons += gcjdoc
+    endif
+#      ifneq (,$(findstring gtk, $(java_awt_peers)))
+#        addons += gtkpeer
+#      endif
+#      ifneq (,$(findstring qt, $(java_awt_peers)))
+#        addons += qtpeer
+#      endif
+      ifeq ($(with_standalone_gcj),yes)
+	addons += libgcc lib4gcc lib64gcc lib32gcc libn32gcc libx32gcc
+      endif
+    endif
+  endif
+  ifeq ($(DEB_CROSS),yes)
+    addons := $(filter-out gcjdoc gcjsrc,$(addons))
+  endif
+  ifeq ($(with_standalone_gcj),yes)
+    ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+      ctrl_flags += -DSTANDALONEJAVA
+    endif
+  endif
+  ifeq ($(with_separate_libgo),yes)
+    ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+      languages := $(filter-out go,$(languages))
+      addons := $(filter-out ggo godev libggo lib64ggo lib32ggo libn32ggo libx32ggo,$(addons))
+    endif
+    ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION))
+      languages = go
+      addons = ggo godev libggo lib64ggo lib32ggo libn32ggo gccbase multilib
+      addons += $(if $(findstring amd64,$(biarchx32archs)),libx32ggo)
+      ifeq ($(with_standalone_go),yes)
+        addons += libgcc lib4gcc lib32gcc lib64gcc libn32gcc
+        addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc)
+        addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc)
+        addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc)
+        ifeq ($(with_libcc1),yes)
+          addons += libcc1
+        endif
+      endif
+    endif
+  endif
+  ifeq ($(with_standalone_go),yes)
+    ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION))
+      ctrl_flags += -DSTANDALONEGO
+    endif
+  endif
+  ifeq ($(with_separate_gnat),yes)
+    ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+      languages := $(filter-out ada,$(languages))
+      addons := $(filter-out libgnat adasjlj,$(addons))
+    endif
+    ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+      languages = ada
+      addons = gnatbase libgnat
+    endif
+  endif
+  ifeq ($(with_separate_gdc),yes)
+    ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION))
+      languages := $(filter-out d,$(languages))
+    endif
+    ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION))
+      languages = d
+      addons = 
+      ifeq ($(with_libphobos),yes)
+        addons += libphobos
+      endif
+    endif
+  endif
+  ifneq ($(DEB_CROSS),yes) # no docs for cross compilers
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+    addons += gfdldoc
+  endif
+  endif
+endif # not stage
+
+control-file:
+	echo "addons: $(addons)"; \
+	m4 $(ctrl_flags) \
+	  -DPV=$(pkg_ver) \
+	  -DCXX_SO=$(CXX_SONAME) \
+	  -DGCC_SO=$(GCC_SONAME) \
+	  -DOBJC_SO=$(OBJC_SONAME) \
+	  -DFORTRAN_SO=$(FORTRAN_SONAME) \
+	  -DGCJ_SO=$(PKG_GCJ_EXT) \
+	  -DLIBGCJ_EXT=$(PKG_LIBGCJ_EXT) \
+	  -DGNAT_SO=$(GNAT_SONAME) \
+	  -DGNAT_V=$(GNAT_VERSION) \
+	  -DPHOBOS_V=$(libphobos_version) \
+	  -DGOMP_SO=$(GOMP_SONAME) \
+	  -DITM_SO=$(ITM_SONAME) \
+	  -DATOMIC_SO=$(ATOMIC_SONAME) \
+	  -DBTRACE_SO=$(BTRACE_SONAME) \
+	  -DASAN_SO=$(ASAN_SONAME) \
+	  -DLSAN_SO=$(LSAN_SONAME) \
+	  -DTSAN_SO=$(TSAN_SONAME) \
+	  -DUBSAN_SO=$(UBSAN_SONAME) \
+	  -DVTV_SO=$(VTV_SONAME) \
+	  -DCILKRTS_SO=$(CILKRTS_SONAME) \
+	  -DMPX_SO=$(MPX_SONAME) \
+	  -DQMATH_SO=$(QUADMATH_SONAME) \
+	  -DSSP_SO=$(SSP_SONAME) \
+	  -DGO_SO=$(GO_SONAME) \
+	  -DCC1_SO=$(CC1_SONAME) \
+	  -DGCCJIT_SO=$(GCCJIT_SONAME) \
+	  -Denabled_languages="$(languages) $(addons)" \
+	  -Dada_no_archs="$(ada_no_archs)" \
+	  -Djava_no_archs="$(java_no_archs)" \
+	  -Dfortran_no_archs="$(fortran_no_archs)" \
+	  -Dlibgc_no_archs="$(libgc_no_archs)" \
+	  -Dlibphobos_archs="$(libphobos_archs)" \
+	  -Dlibphobos_no_archs="$(libphobos_no_archs)" \
+	  -Dcheck_no_archs="$(check_no_archs)" \
+	  -Dlocale_no_archs="$(locale_no_archs)" \
+	  -Dlinux_gnu_archs="$(linux_gnu_archs)" \
+	  -Dbiarch32_archs="$(strip $(subst /, ,$(biarch32archs)))" \
+	  -Dbiarch64_archs="$(strip $(subst /, ,$(biarch64archs)))" \
+	  -Dbiarchn32_archs="$(strip $(subst /, ,$(biarchn32archs)))" \
+	  -Dbiarchx32_archs="$(strip $(subst /, ,$(biarchx32archs)))" \
+	  -Dbiarchhf_archs="$(strip $(subst /, ,$(biarchhfarchs)))" \
+	  -Dbiarchsf_archs="$(strip $(subst /, ,$(biarchsfarchs)))" \
+	  -Dadd_built_using=$(add_built_using) \
+	  -DGCC_PORTS_BUILD=$(GCC_PORTS_BUILD) \
+	  -DPR66145BREAKS="$(if $(findstring build-native,$(build_type)),$(if $(filter new,$(libstdcxx_abi)),$$(tr '\n' ' ' < debian/libstdc++-breaks.$(derivative))))" \
+		debian/control.m4 > debian/control.tmp2
+	uniq debian/control.tmp2 | sed '/^Build/s/ *, */, /g;/^  /s/ *, */, /g' \
+		$(if $(filter yes, $(with_base_only)), | awk '/^$$/ {if (p) exit; else p=1; } {print}') \
+		> debian/control.tmp
+	rm -f debian/control.tmp2
+	[ -e debian/control ] \
+	  && cmp -s debian/control debian/control.tmp \
+	  && rm -f debian/control.tmp && exit 0; \
+	  mv debian/control.tmp debian/control; touch $(control_stamp)
+
+readme-bugs-file:
+	m4 -DDIST=$(distribution) -DSRCNAME=$(PKGSOURCE) \
+		debian/README.Bugs.m4 > debian/README.Bugs
+
+copyright-file:
+	rm -f debian/copyright
+	if echo $(SOURCE_VERSION) | grep -E ^'[0-9]\.[0-9]-[0-9]{8}' ; \
+		then SVN_BRANCH="trunk" ; \
+	else \
+		SVN_BRANCH="gcc-$(subst .,_,$(BASE_VERSION))-branch" ; \
+	fi ; \
+	sed debian/copyright.in		\
+		-e "s/@BV@/$(BASE_VERSION)/g"		\
+		-e "s/@SVN_BRANCH@/$$SVN_BRANCH/g"	\
+		> debian/copyright
+
+substvars-file: control-file
+	rm -f debian/substvars.local.tmp
+	( \
+		echo 'libgcc:Version=$(DEB_LIBGCC_VERSION)'; \
+		echo 'gcc:Version=$(DEB_GCC_VERSION)'; \
+		echo 'gcc:EpochVersion=$(DEB_EVERSION)'; \
+		echo 'gcc:SoftVersion=$(DEB_GCC_SOFT_VERSION)'; \
+		echo 'gdc:Version=$(DEB_GDC_VERSION)'; \
+		echo 'gcj:Version=$(DEB_GCJ_VERSION)'; \
+		echo 'gcj:SoftVersion=$(DEB_GCJ_SOFT_VERSION)'; \
+		echo 'gcj:BaseVersion=$(BASE_VERSION)'; \
+		echo 'gnat:Version=$(DEB_GNAT_VERSION)'; \
+		echo 'gnat:SoftVersion=$(DEB_GNAT_SOFT_VERSION)'; \
+		echo 'binutils:Version=$(BINUTILSV)'; \
+		echo 'dep:libgcc=$(LIBGCC_DEP)'; \
+		echo 'dep:libgccdev=$(LIBGCC_DEV_DEP)'; \
+		echo 'dep:libgccbiarch=$(libgccbiarch)'; \
+		echo 'dep:libgccbiarchdev=$(libgccbiarchdev)'; \
+		echo 'dep:libc=$(LIBC_DEP) (>= $(libc_ver))'; \
+		echo 'dep:libcdev=$(LIBC_DEV_DEP)'; \
+		echo 'dep:libcbiarch=$(LIBC_BIARCH_DEP)'; \
+		echo 'dep:libcbiarchdev=$(LIBC_BIARCH_DEV_DEP)'; \
+		echo 'dep:libunwinddev=$(LIBUNWIND_DEV_DEP)'; \
+		echo 'dep:libcxxbiarchdev=$(libstdc++biarchdev)'; \
+		echo 'dep:libcxxbiarchdbg=$(libstdc++biarchdbg)'; \
+		echo 'dep:libgnat=$(LIBGNAT_DEP)'; \
+		echo 'dep:ecj=$(ECJ_DEP)'; \
+		echo 'base:Breaks=$(BASE_BREAKS)'; \
+	) > debian/substvars.local.tmp
+ifneq (,$(filter $(DEB_TARGET_ARCH), $(multilib_archs)))
+	( \
+		echo 'gcc:multilib=gcc-$(BASE_VERSION)-multilib$(TS)'; \
+		echo 'gxx:multilib=g++-$(BASE_VERSION)-multilib$(TS)'; \
+		echo 'gobjc:multilib=gobjc-$(BASE_VERSION)-multilib$(TS)'; \
+		echo 'gobjcxx:multilib=gobjc++-$(BASE_VERSION)-multilib$(TS)'; \
+		echo 'gfortran:multilib=gfortran-$(BASE_VERSION)-multilib$(TS)'; \
+	) >> debian/substvars.local.tmp
+endif
+ifeq ($(with_gold),yes)
+	echo 'dep:gold=binutils-gold (>= $(BINUTILSV))' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_libssp),yes)
+	echo 'dep:libssp=libssp$(SSP_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_gomp),yes)
+	echo 'dep:libgomp=libgomp$(GOMP_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_itm),yes)
+	echo 'dep:libitm=libitm$(ITM_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_atomic),yes)
+	echo 'dep:libatomic=libatomic$(ATOMIC_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_libbacktrace),yes)
+	echo 'dep:libbacktrace=libbtrace$(BTRACE_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_asan),yes)
+	echo 'dep:libasan=libasan$(ASAN_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_lsan),yes)
+	echo 'dep:liblsan=liblsan$(LSAN_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_tsan),yes)
+	echo 'dep:libtsan=libtsan$(TSAN_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_ubsan),yes)
+	echo 'dep:libubsan=libubsan$(UBSAN_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_vtv),yes)
+	echo 'dep:libvtv=libvtv$(VTV_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_cilkrts),yes)
+	echo 'dep:libcilkrts=libcilkrts$(CILKRTS_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_mpx),yes)
+	echo 'dep:libmpx=libmpx$(MPX_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_qmath),yes)
+	echo 'dep:libqmath=libquadmath$(QUADMATH_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(distribution),Debian)
+	echo 'dep:libx32z=$(if $(filter $(distribution), Debian),,libx32z1-dev)' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(multilib),yes)
+	echo 'dep:libgfortranbiarchdev=$(libgfortranbiarchdev)' \
+		>> debian/substvars.local.tmp
+	echo 'dep:libobjcbiarchdev=$(libobjcbiarchdev)' \
+		>> debian/substvars.local.tmp
+  ifeq ($(with_libphobos),yes)
+	echo 'dep:libphobosbiarchdev=$(libphobosbiarchdev)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_libssp),yes)
+	echo 'dep:libsspbiarch=$(libsspbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_gomp),yes)
+	echo 'dep:libgompbiarch=$(libgompbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_itm),yes)
+	echo 'dep:libitmbiarch=$(libitmbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_atomic),yes)
+	echo 'dep:libatomicbiarch=$(libatomicbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_libbacktrace),yes)
+	echo 'dep:libbtracebiarch=$(libbtracebiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_asan),yes)
+	echo 'dep:libasanbiarch=$(libasanbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_lsan),yes)
+	#echo 'dep:liblsanbiarch=$(liblsanbiarch)' \
+	#	>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_tsan),yes)
+	#echo 'dep:libtsanbiarch=$(libtsanbiarch)' \
+	#	>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_ubsan),yes)
+	echo 'dep:libubsanbiarch=$(libubsanbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_vtv),yes)
+	echo 'dep:libvtvbiarch=$(libvtvbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_cilkrts),yes)
+	echo 'dep:libcilkrtsbiarch=$(libcilkrtsbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_mpx),yes)
+	echo 'dep:libmpxbiarch=$(libmpxbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_qmath),yes)
+	echo 'dep:libqmathbiarch=$(libquadmathbiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(with_go),yes)
+	echo 'dep:libgobiarchdev=$(libgobiarchdev)' \
+		>> debian/substvars.local.tmp
+	echo 'dep:libgobiarch=$(libgobiarch)' \
+		>> debian/substvars.local.tmp
+  endif
+endif
+ifneq ($(with_standalone_gcj),yes)
+  ifneq (,$(filter $(DEB_HOST_ARCH),armel armhf))
+	echo 'dep:gcj=g++$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+  else
+	echo 'dep:gcj=gcc$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+  endif
+  ifeq ($(DEB_CROSS),yes)
+	echo 'dep:gcjcross=gcj$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+  endif
+endif
+ifeq ($(DEB_CROSS),yes)
+	echo 'dep:gdccross=gdc$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+endif
+ifeq ($(with_libphobos),yes)
+	echo 'dep:phobosdev=libphobos$(pkg_ver)-dev$(LS)$(AQ) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+  ifeq ($(DEB_CROSS),yes)
+	: # FIXME: make the cross gdc aware of both include paths
+	echo 'dep:gdccross=gdc$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \
+		>> debian/substvars.local.tmp
+  endif
+endif
+ifeq ($(with_cc1),yes)
+  ifneq (,$(findstring build-cross, $(build_type)))
+	echo 'dep:libcc1=libcc1-$(CC1_SONAME) (>= $(GCC_VERSION))' \
+		>> debian/substvars.local.tmp
+  else
+	echo 'dep:libcc1=libcc1-$(CC1_SONAME) (>= $${gcc:Version})' \
+		>> debian/substvars.local.tmp
+  endif
+endif
+#ifneq (,$(findstring gtk, $(java_awt_peers)))
+#	echo 'pkg:gcjgtk=libgcj$(subst 0,,$(GCJ_SONAME))-awt-gtk (>= $(DEB_GCJ_VERSION))' \
+#		>> debian/substvars.local.tmp
+#endif
+#ifneq (,$(findstring qt, $(java_awt_peers)))
+#	echo 'pkg:gcjqt=libgcj$(subst 0,,$(GCJ_SONAME))-awt-qt (>= $(DEB_GCJ_VERSION))' \
+#		>> debian/substvars.local.tmp
+#endif
+ifeq ($(DEB_HOST_ARCH),hppa)
+	echo 'dep:prctl=prctl' >> debian/substvars.local.tmp
+endif
+ifeq ($(derivative)-$(DEB_HOST_ARCH),Debian-amd64)
+	echo 'confl:lib32=libc6-i386 (<< 2.9-22)' >> debian/substvars.local.tmp
+endif
+ifeq ($(with_multiarch_lib),yes)
+	echo 'multiarch:breaks=gcc-4.3 (<< 4.3.6-1), gcc-4.4 (<< 4.4.6-4), gcc-4.5 (<< 4.5.3-2)' >> debian/substvars.local.tmp
+endif
+	echo 'golang:Conflicts=golang-go (<< 2:1.3.3-1ubuntu2)' >> debian/substvars.local.tmp
+ifeq ($(add_built_using),yes)
+	echo "Built-Using=$(shell dpkg-query -f '$${source:Package} (= $${source:Version}), ' -W gcc$(pkg_ver)-source)" \
+	>> debian/substvars.local.tmp
+endif
+	v=`sed -n '/^#define MOD_VERSION/s/.* "\([0-9]*\)"/\1/p' \
+		$(srcdir)/gcc/fortran/module.c`; \
+	echo "fortran:mod-version=gfortran-mod-$$v" >> debian/substvars.local.tmp
+
+	[ -e debian/substvars.local ] \
+	  && cmp -s debian/substvars.local debian/substvars.local.tmp \
+	  && rm -f debian/substvars.local.tmp && exit 0; \
+	  mv debian/substvars.local.tmp debian/substvars.local; \
+	  touch $(control_stamp)
+
+parameters-file:
+	rm -f debian/rules.parameters.tmp
+	( \
+		echo '# configuration parameters taken from upstream source files'; \
+		echo 'GCC_VERSION	:= $(GCC_VERSION)'; \
+		echo 'NEXT_GCC_VERSION	:= $(NEXT_GCC_VERSION)'; \
+		echo 'BASE_VERSION	:= $(BASE_VERSION)'; \
+		echo 'SOURCE_VERSION	:= $(SOURCE_VERSION)'; \
+		echo 'DEB_VERSION	:= $(DEB_VERSION)'; \
+		echo 'DEB_EVERSION	:= $(DEB_EVERSION)'; \
+		echo 'DEB_GDC_VERSION	:= $(DEB_GDC_VERSION)'; \
+		echo 'DEB_SOVERSION	:= $(DEB_SOVERSION)'; \
+		echo 'DEB_SOEVERSION	:= $(DEB_SOEVERSION)'; \
+		echo 'DEB_LIBGCC_SOVERSION	:= $(DEB_LIBGCC_SOVERSION)'; \
+		echo 'DEB_LIBGCC_VERSION	:= $(DEB_LIBGCC_VERSION)'; \
+		echo 'DEB_STDCXX_SOVERSION	:= $(DEB_STDCXX_SOVERSION)'; \
+		echo 'DEB_GCJ_SOVERSION	:= $(DEB_GCJ_SOVERSION)'; \
+		echo 'PKG_GCJ_EXT	:= $(PKG_GCJ_EXT)'; \
+		echo 'PKG_LIBGCJ_EXT	:= $(PKG_LIBGCJ_EXT)'; \
+		echo 'DEB_GOMP_SOVERSION	:= $(DEB_GOMP_SOVERSION)'; \
+		echo 'GCC_SONAME	:= $(GCC_SONAME)'; \
+		echo 'CXX_SONAME	:= $(CXX_SONAME)'; \
+		echo 'FORTRAN_SONAME	:= $(FORTRAN_SONAME)'; \
+		echo 'OBJC_SONAME	:= $(OBJC_SONAME)'; \
+		echo 'GCJ_SONAME	:= $(GCJ_SONAME)'; \
+		echo 'GDC_VERSION	:= $(GDC_VERSION)'; \
+		echo 'GNAT_VERSION	:= $(GNAT_VERSION)'; \
+		echo 'GNAT_SONAME	:= $(GNAT_SONAME)'; \
+		echo 'FFI_SONAME	:= $(FFI_SONAME)'; \
+		echo 'SSP_SONAME	:= $(SSP_SONAME)'; \
+		echo 'GOMP_SONAME	:= $(GOMP_SONAME)'; \
+		echo 'ITM_SONAME	:= $(ITM_SONAME)'; \
+		echo 'ATOMIC_SONAME	:= $(ATOMIC_SONAME)'; \
+		echo 'BTRACE_SONAME	:= $(BTRACE_SONAME)'; \
+		echo 'ASAN_SONAME	:= $(ASAN_SONAME)'; \
+		echo 'LSAN_SONAME	:= $(LSAN_SONAME)'; \
+		echo 'TSAN_SONAME	:= $(TSAN_SONAME)'; \
+		echo 'UBSAN_SONAME	:= $(UBSAN_SONAME)'; \
+		echo 'VTV_SONAME	:= $(VTV_SONAME)'; \
+		echo 'CILKRTS_SONAME	:= $(CILKRTS_SONAME)'; \
+		echo 'MPX_SONAME	:= $(MPX_SONAME)'; \
+		echo 'QUADMATH_SONAME	:= $(QUADMATH_SONAME)'; \
+		echo 'GO_SONAME		:= $(GO_SONAME)'; \
+		echo 'CC1_SONAME	:= $(CC1_SONAME)'; \
+		echo 'GCCJIT_SONAME	:= $(GCCJIT_SONAME)'; \
+		echo 'LIBC_DEP		:= $(LIBC_DEP)'; \
+	) > debian/rules.parameters.tmp
+	[ -e debian/rules.parameters ] \
+	  && cmp -s debian/rules.parameters debian/rules.parameters.tmp \
+	  && rm -f debian/rules.parameters.tmp && exit 0; \
+	  mv debian/rules.parameters.tmp debian/rules.parameters; \
+	  touch $(control_stamp)
+
+symbols-files: control-file
+ifeq ($(DEB_CROSS),yes)
+  ifneq ($(DEB_STAGE),rtlibs)
+	test -n "$(LS)"
+	set -e; \
+	for p in $$(dh_listpackages -i | grep '^lib'); do \
+	  p=$${p%$(LS)}; \
+	  if [ -f debian/$$p.symbols.$(DEB_TARGET_ARCH) ]; then \
+	    f=debian/$$p.symbols.$(DEB_TARGET_ARCH); \
+	  elif [ -f debian/$$p.symbols ]; then \
+	    f=debian/$$p.symbols; \
+	  else \
+	    continue; \
+	  fi; \
+	  link=debian/$$p$(LS).symbols; \
+	  if [ -L $$link ]; then \
+	    echo >&2 "removing left over symbols file link: $$link"; \
+	    rm -f $$link; \
+	  fi; \
+	  ln -s $$f $$link; \
+	done
+  endif
+endif
+
+versioned-files:
+	fs=`echo debian/*BV* debian/*GCJ* debian/*CXX* debian/*LC* | sort -u`; \
+	for f in $$fs debian/source.lintian-overrides.in; do \
+	  [ -f $$f ] || echo "CANNOT FIND $$f"; \
+	  [ -f $$f ] || continue; \
+	  if [ -z "$(DEB_CROSS)" ]; then case "$$f" in *-CR*) continue; esac; fi; \
+	  f2=$$(echo $$f \
+		| sed 's/BV/$(BASE_VERSION)/;s/CXX/$(CXX_SONAME)/;s/LGCJ/$(PKG_LIBGCJ_EXT)/;s/GCJ/$(PKG_GCJ_EXT)/;s/LC/$(GCC_SONAME)/;s/-CRB/$(cross_bin_arch)/;s/\.in$$//'); \
+	  sed -e 's/@BV@/$(BASE_VERSION)/g' \
+	      -e 's/@CXX@/$(CXX_SONAME)/g' \
+	      -e 's/@LGCJ@/$(PKG_LIBGCJ_EXT)/g' \
+	      -e 's/@GCJ@/$(PKG_GCJ_EXT)/g' \
+	      -e 's/@GCJSO@/$(GCJ_SONAME)/g' \
+	      -e 's/@LC@/$(GCC_SONAME)/g' \
+	      -e 's/@SRC@/$(PKGSOURCE)/g' \
+	      -e 's/@GFDL@/$(if $(filter yes,$(GFDL_INVARIANT_FREE)),#)/g' \
+	      -e 's/@java_priority@/$(java_priority)/g' \
+	      -e 's/@gcc_priority@/$(subst .,,$(BASE_VERSION))/g' \
+	      -e 's/@TARGET@/$(DEB_TARGET_GNU_TYPE)/g' \
+	      -e 's/@TARGET_QUAL@/$(TARGET_QUAL)/g' \
+	    $$f > $$f2; \
+	  touch -r $$f $$f2; \
+	done
+	for t in ar nm ranlib; do \
+	  sed "s/@BV@/$(BASE_VERSION)/g;s/@TOOL@/$$t/g" \
+	    debian/gcc-XX-BV.1 > debian/gcc-$$t-$(BASE_VERSION).1; \
+	done
+
+# don't encode versioned build dependencies in the control file, but check
+# these here instead.
+check-versions:
+	v=$$(dpkg-query -l dpkg-dev | awk '/^.i/ {print $$3}'); \
+	if dpkg --compare-versions "$$v" lt "$(DPKGV)"; then \
+	  echo "dpkg-dev (>= $(DPKGV)) required, found $$v"; \
+	  exit 1; \
+	fi
+	v=$$(dpkg-query -l binutils binutils-multiarch | awk '/^.i/ {print $$3;exit}'); \
+	if dpkg --compare-versions "$$v" lt "$(BINUTILSBDV)"; then \
+	  echo "binutils (>= $(BINUTILSBDV)) required, found $$v"; \
+	  exit 1; \
+	fi
+
+.PRECIOUS: $(stampdir)/%-stamp
--- gcc-5-5.4.0.orig/debian/rules.d/binary-ada.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-ada.mk
@@ -0,0 +1,396 @@
+ifeq ($(with_separate_gnat),yes)
+  $(lib_binaries) += gnatbase
+endif
+
+ifeq ($(with_libgnat),yes)
+  $(lib_binaries) += libgnat libgnatvsn libgnatprj
+endif
+
+arch_binaries := $(arch_binaries) ada
+ifneq ($(DEB_CROSS),yes)
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+    indep_binaries := $(indep_binaries) ada-doc
+  endif
+endif
+
+p_gbase		= $(p_xbase)
+p_glbase	= $(p_lbase)
+ifeq ($(with_separate_gnat),yes)
+  p_gbase	= gnat$(pkg_ver)$(cross_bin_arch)-base
+  p_glbase	= gnat$(pkg_ver)$(cross_bin_arch)-base
+endif
+
+p_gnat	= gnat-$(GNAT_VERSION)$(cross_bin_arch)
+p_gnatsjlj= gnat-$(GNAT_VERSION)-sjlj$(cross_bin_arch)
+p_lgnat	= libgnat-$(GNAT_VERSION)$(cross_lib_arch)
+p_lgnat_dbg = libgnat-$(GNAT_VERSION)-dbg$(cross_lib_arch)
+p_lgnatvsn = libgnatvsn$(GNAT_VERSION)$(cross_lib_arch)
+p_lgnatvsn_dev = libgnatvsn$(GNAT_VERSION)-dev$(cross_lib_arch)
+p_lgnatvsn_dbg = libgnatvsn$(GNAT_VERSION)-dbg$(cross_lib_arch)
+p_lgnatprj = libgnatprj$(GNAT_VERSION)$(cross_lib_arch)
+p_lgnatprj_dev = libgnatprj$(GNAT_VERSION)-dev$(cross_lib_arch)
+p_lgnatprj_dbg = libgnatprj$(GNAT_VERSION)-dbg$(cross_lib_arch)
+p_gnatd	= $(p_gnat)-doc
+
+d_gbase	= debian/$(p_gbase)
+d_gnat	= debian/$(p_gnat)
+d_gnatsjlj	= debian/$(p_gnatsjlj)
+d_lgnat	= debian/$(p_lgnat)
+d_lgnatvsn = debian/$(p_lgnatvsn)
+d_lgnatvsn_dev = debian/$(p_lgnatvsn_dev)
+d_lgnatprj = debian/$(p_lgnatprj)
+d_lgnatprj_dev = debian/$(p_lgnatprj_dev)
+d_gnatd	= debian/$(p_gnatd)
+
+GNAT_TOOLS = gnat gnatbind gnatchop gnatclean gnatfind gnatkr gnatlink \
+	     gnatls gnatmake gnatname gnatprep gnatxref gnathtml
+
+ifeq ($(with_gnatsjlj),yes)
+	rts_subdir = 
+endif
+
+dirs_gnat = \
+	$(docdir)/$(p_gbase) \
+	$(PF)/bin \
+	$(PF)/share/man/man1 \
+	$(gcc_lib_dir)/{adalib,adainclude} \
+	$(gcc_lexec_dir)
+
+files_gnat = \
+	$(gcc_lexec_dir)/gnat1 \
+	$(gcc_lib_dir)/adainclude/*.ad[bs] \
+	$(gcc_lib_dir)/adalib/*.ali \
+	$(gcc_lib_dir)/adalib/lib*.a \
+	$(foreach i,$(GNAT_TOOLS),$(PF)/bin/$(cmd_prefix)$(i)$(pkg_ver))
+
+dirs_lgnat = \
+	$(docdir) \
+	$(PF)/lib
+files_lgnat = \
+	$(usr_lib)/lib{gnat,gnarl}-$(GNAT_SONAME).so.1
+
+$(binary_stamp)-gnatbase: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	dh_installdocs -p$(p_gbase) debian/README.gnat debian/README.maintainers
+	: # $(p_gbase)
+ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+	mkdir -p $(d_gbase)/$(docdir)/$(p_xbase)
+	ln -sf ../$(p_gbase) $(d_gbase)/$(docdir)/$(p_xbase)/Ada
+endif
+	dh_installchangelogs -p$(p_gbase) src/gcc/ada/ChangeLog
+	dh_compress -p$(p_gbase)
+	dh_fixperms -p$(p_gbase)
+	dh_gencontrol -p$(p_gbase) -- -v$(DEB_VERSION) $(common_substvars)
+	dh_installdeb -p$(p_gbase)
+	dh_md5sums -p$(p_gbase)
+	dh_builddeb -p$(p_gbase)
+	touch $@
+
+
+$(binary_stamp)-libgnat: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	: # libgnat
+	rm -rf $(d_lgnat)
+	dh_installdirs -p$(p_lgnat) $(dirs_lgnat)
+
+	for lib in lib{gnat,gnarl}; do \
+	  vlib=$$lib-$(GNAT_SONAME); \
+	  mv $(d)/$(gcc_lib_dir)/$(rts_subdir)/adalib/$$vlib.so.1 $(d)/$(usr_lib)/. ; \
+	  rm -f $(d)/$(gcc_lib_dir)/adalib/$$lib.so.1; \
+	done
+	$(dh_compat2) dh_movefiles -p$(p_lgnat) $(files_lgnat)
+
+	debian/dh_doclink -p$(p_lgnat) $(p_glbase)
+
+	debian/dh_rmemptydirs -p$(p_lgnat)
+
+	b=libgnat; \
+	v=$(GNAT_VERSION); \
+	for ext in preinst postinst prerm postrm; do \
+	  for t in '' -dev -dbg; do \
+	    if [ -f debian/$$b$$t.$$ext ]; then \
+	      cp -pf debian/$$b$$t.$$ext debian/$$b$$v$$t.$$ext; \
+	    fi; \
+	  done; \
+	done
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_lgnat) -V '$(p_lgnat) (>= $(DEB_VERSION))'
+	$(call cross_mangle_shlibs,$(p_lgnat))
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	mkdir -p $(d_lgnat)/usr/share/lintian/overrides
+	cp -p debian/$(p_lgnat).overrides \
+		$(d_lgnat)/usr/share/lintian/overrides/$(p_lgnat)
+endif
+
+	dh_strip -p$(p_lgnat) --dbg-package=$(p_lgnat_dbg)
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_lgnat) \
+		$(call shlibdirs_to_search, \
+			$(subst gnat-$(GNAT_SONAME),gcc$(GCC_SONAME),$(p_lgnat)) \
+		,) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_lgnat))
+
+	: # $(p_lgnat_dbg)
+	debian/dh_doclink -p$(p_lgnat_dbg) $(p_glbase)
+
+	echo $(p_lgnat) $(p_lgnat_dbg) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+
+$(binary_stamp)-libgnatvsn: $(install_stamp)
+	: # $(p_lgnatvsn_dev)
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	$(dh_compat2) dh_movefiles -p$(p_lgnatvsn_dev) usr/lib/ada/adalib/gnatvsn
+	$(dh_compat2) dh_movefiles -p$(p_lgnatvsn_dev) usr/share/ada/adainclude/gnatvsn
+	dh_install -p$(p_lgnatvsn_dev) \
+	   debian/gnatvsn.gpr usr/share/ada/adainclude
+else
+	mkdir -p $(d_lgnatvsn_dev)/$(gcc_lib_dir)/{adalib,adainclude}/gnatvsn
+	mv $(d)/usr/lib/ada/adalib/gnatvsn $(d_lgnatvsn_dev)/$(gcc_lib_dir)/adalib/.
+	mv $(d)/usr/share/ada/adainclude/gnatvsn $(d_lgnatvsn_dev)/$(gcc_lib_dir)/adainclude/.
+	dh_install -p$(p_lgnatvsn_dev) \
+	   debian/gnatvsn.gpr $(gcc_lib_dir)/adainclude
+endif
+	$(dh_compat2) dh_movefiles -p$(p_lgnatvsn_dev) $(usr_lib)/libgnatvsn.a
+	dh_link -p$(p_lgnatvsn_dev) \
+	   $(usr_lib)/libgnatvsn.so.$(GNAT_VERSION) \
+	   $(usr_lib)/libgnatvsn.so
+	debian/dh_doclink -p$(p_lgnatvsn_dev) $(p_glbase)
+	dh_strip -p$(p_lgnatvsn_dev) -X.a --keep-debug
+
+	: # $(p_lgnatvsn)
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	mkdir -p $(d_lgnatvsn)/usr/share/lintian/overrides
+	cp -p debian/$(p_lgnatvsn).overrides \
+		$(d_lgnatvsn)/usr/share/lintian/overrides/$(p_lgnatvsn)
+endif
+	$(dh_compat2) dh_movefiles -p$(p_lgnatvsn) $(usr_lib)/libgnatvsn.so.$(GNAT_VERSION)
+	debian/dh_doclink -p$(p_lgnatvsn) $(p_glbase)
+	dh_strip -p$(p_lgnatvsn) --dbg-package=$(p_lgnatvsn_dbg)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_lgnatvsn) \
+		-V '$(p_lgnatvsn) (>= $(DEB_VERSION))'
+	$(call cross_mangle_shlibs,$(p_lgnatvsn))
+	cat debian/$(p_lgnatvsn)/DEBIAN/shlibs >> debian/shlibs.local
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_lgnatvsn) \
+		$(call shlibdirs_to_search, \
+			$(subst gnatvsn$(GNAT_SONAME),gcc$(GCC_SONAME),$(p_lgnatvsn)) \
+			$(subst gnatvsn$(GNAT_SONAME),gnat-$(GNAT_SONAME),$(p_lgnatvsn)) \
+		,) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_lgnatvsn))
+
+	: # $(p_lgnatvsn_dbg)
+	debian/dh_doclink -p$(p_lgnatvsn_dbg) $(p_glbase)
+
+	echo $(p_lgnatvsn) $(p_lgnatvsn_dev) $(p_lgnatvsn_dbg) >> debian/$(lib_binaries)
+	touch $@
+
+$(binary_stamp)-libgnatprj: $(install_stamp)
+	: # $(p_lgnatprj_dev)
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	$(dh_compat2) dh_movefiles -p$(p_lgnatprj_dev) usr/lib/ada/adalib/gnatprj
+	$(dh_compat2) dh_movefiles -p$(p_lgnatprj_dev) usr/share/ada/adainclude/gnatprj
+	dh_install -p$(p_lgnatprj_dev) \
+	   debian/gnatprj.gpr usr/share/ada/adainclude
+else
+	mkdir -p $(d_lgnatprj_dev)/$(gcc_lib_dir)/{adalib,adainclude}/gnatvsn
+	mv $(d)/usr/lib/ada/adalib/gnatprj $(d_lgnatprj_dev)/$(gcc_lib_dir)/adalib/.
+	mv $(d)/usr/share/ada/adainclude/gnatprj $(d_lgnatprj_dev)/$(gcc_lib_dir)/adainclude/.
+	dh_install -p$(p_lgnatprj_dev) \
+	   debian/gnatprj.gpr $(gcc_lib_dir)/adainclude
+endif
+	$(dh_compat2) dh_movefiles -p$(p_lgnatprj_dev) $(usr_lib)/libgnatprj.a
+	dh_link -p$(p_lgnatprj_dev) \
+	   $(usr_lib)/libgnatprj.so.$(GNAT_VERSION) \
+	   $(usr_lib)/libgnatprj.so
+	dh_strip -p$(p_lgnatprj_dev) -X.a --keep-debug
+	debian/dh_doclink -p$(p_lgnatprj_dev) $(p_glbase)
+
+	: # $(p_lgnatprj)
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	mkdir -p $(d_lgnatprj)/usr/share/lintian/overrides
+	cp -p debian/$(p_lgnatprj).overrides \
+		$(d_lgnatprj)/usr/share/lintian/overrides/$(p_lgnatprj)
+endif
+	$(dh_compat2) dh_movefiles -p$(p_lgnatprj) $(usr_lib)/libgnatprj.so.$(GNAT_VERSION)
+	debian/dh_doclink -p$(p_lgnatprj) $(p_glbase)
+	dh_strip -p$(p_lgnatprj) --dbg-package=$(p_lgnatprj_dbg)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_lgnatprj) \
+		-V '$(p_lgnatprj) (>= $(DEB_VERSION))'
+	$(call cross_mangle_shlibs,$(p_lgnatprj))
+	cat debian/$(p_lgnatprj)/DEBIAN/shlibs >> debian/shlibs.local
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_lgnatprj) \
+		$(call shlibdirs_to_search, \
+			$(subst gnatprj$(GNAT_SONAME),gcc$(GCC_SONAME),$(p_lgnatprj)) \
+			$(subst gnatprj$(GNAT_SONAME),gnat-$(GNAT_SONAME),$(p_lgnatprj)) \
+			$(subst gnatprj$(GNAT_SONAME),gnatvsn$(GNAT_SONAME),$(p_lgnatprj)) \
+		,) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_lgnatprj))
+
+	: # $(p_lgnatprj_dbg)
+	debian/dh_doclink -p$(p_lgnatprj_dbg) $(p_glbase)
+
+	echo $(p_lgnatprj) $(p_lgnatprj_dev) $(p_lgnatprj_dbg) >> debian/$(lib_binaries)
+	touch $@
+
+$(binary_stamp)-ada: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+	: # $(p_gnat)
+	rm -rf $(d_gnat)
+	dh_installdirs -p$(p_gnat) $(dirs_gnat)
+	: # Upstream does not install gnathtml.
+	cp src/gcc/ada/gnathtml.pl debian/tmp/$(PF)/bin/$(cmd_prefix)gnathtml$(pkg_ver)
+	chmod 755 debian/tmp/$(PF)/bin/$(cmd_prefix)gnathtml$(pkg_ver)
+	$(dh_compat2) dh_movefiles -p$(p_gnat) $(files_gnat)
+
+ifeq ($(with_gnatsjlj),yes)
+	dh_installdirs -p$(p_gnatsjlj) $(gcc_lib_dir)
+	$(dh_compat2) dh_movefiles -p$(p_gnatsjlj) $(gcc_lib_dir)/rts-sjlj/adalib $(gcc_lib_dir)/rts-sjlj/adainclude
+endif
+
+ifeq ($(with_libgnat),yes)
+	for lib in lib{gnat,gnarl}; do \
+	  vlib=$$lib-$(GNAT_SONAME); \
+	  dh_link -p$(p_gnat) \
+	    /$(usr_lib)/$$vlib.so.1 /$(usr_lib)/$$vlib.so \
+	    /$(usr_lib)/$$vlib.so.1 /$(usr_lib)/$$lib.so; \
+	done
+	for lib in lib{gnat,gnarl}; do \
+	  vlib=$$lib-$(GNAT_SONAME); \
+	  dh_link -p$(p_gnat) \
+	    /$(usr_lib)/$$vlib.so.1 $(gcc_lib_dir)/$(rts_subdir)adalib/$$lib.so; \
+	done
+endif
+	debian/dh_doclink -p$(p_gnat)      $(p_gbase)
+ifeq ($(with_gnatsjlj),yes)
+	debian/dh_doclink -p$(p_gnatsjlj) $(p_gbase)
+endif
+ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+  ifeq ($(with_check),yes)
+	cp -p test-summary $(d_gnat)/$(docdir)/$(p_gbase)/.
+  endif
+else
+	mkdir -p $(d_gnat)/$(docdir)/$(p_gbase)/ada
+	cp -p src/gcc/ada/ChangeLog $(d_gnat)/$(docdir)/$(p_gbase)/ada/.
+endif
+
+	for i in $(GNAT_TOOLS); do \
+	  case "$$i" in \
+	    gnat) cp -p debian/gnat.1 $(d_gnat)/$(PF)/share/man/man1/$(cmd_prefix)gnat$(pkg_ver).1 ;; \
+	    *) ln -sf $(cmd_prefix)gnat$(pkg_ver).1 $(d_gnat)/$(PF)/share/man/man1/$(cmd_prefix)$$i$(pkg_ver).1; \
+	  esac; \
+	done
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	: # ship the versioned prefixed names in the gnat package.
+	for i in $(GNAT_TOOLS); do \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver); \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(TARGET_ALIAS)-$$i$(pkg_ver); \
+	  ln -sf gnat$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver).1; \
+	  ln -sf $$i$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(TARGET_ALIAS)-$$i$(pkg_ver).1; \
+	done
+
+	: # still ship the unversioned names in the gnat package.
+	for i in $(GNAT_TOOLS); do \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$$i; \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$$i; \
+	  ln -sf gnat$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$$i.1; \
+	  ln -sf $$i$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$$i.1; \
+	done
+
+	: # still ship the unversioned prefixed names in the gnat package.
+	for i in $(GNAT_TOOLS); do \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-$$i; \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(TARGET_ALIAS)-$$i; \
+	  ln -sf gnat$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-$$i.1; \
+	  ln -sf $$i$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(TARGET_ALIAS)-$$i.1; \
+	done
+else
+	: # still ship the unversioned names in the gnat package.
+	for i in $(GNAT_TOOLS); do \
+	  ln -sf $(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-$$i; \
+	  ln -sf $(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver) \
+	    $(d_gnat)/$(PF)/bin/$(TARGET_ALIAS)-$$i; \
+	  ln -sf $(DEB_TARGET_GNU_TYPE)-gnat$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-$$i.1; \
+	  ln -sf $(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver).1 \
+	    $(d_gnat)/$(PF)/share/man/man1/$(TARGET_ALIAS)-$$i.1; \
+	done
+endif
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	dh_install -p$(p_gnat) debian/ada/debian_packaging.mk usr/share/ada
+	mv $(d_gnat)/usr/share/ada/debian_packaging.mk \
+	    $(d_gnat)/usr/share/ada/debian_packaging-$(GNAT_VERSION).mk
+endif
+	: # keep this one unversioned, see Debian #802838.
+	dh_link -p$(p_gnat) usr/bin/$(cmd_prefix)gcc$(pkg_ver) usr/bin/$(cmd_prefix)gnatgcc
+	dh_link -p$(p_gnat) usr/share/man/man1/$(cmd_prefix)gcc$(pkg_ver).1.gz usr/share/man/man1/$(cmd_prefix)gnatgcc.1.gz
+
+	debian/dh_rmemptydirs -p$(p_gnat)
+
+	dh_strip -p$(p_gnat)
+	find $(d_gnat) -name '*.ali' | xargs chmod 444
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_gnat) \
+		$(call shlibdirs_to_search, \
+			$(p_lgcc) $(p_lgnat) $(p_lgnatvsn) $(p_lgnatprj) \
+		,)
+	echo $(p_gnat) >> debian/arch_binaries
+
+ifeq ($(with_gnatsjlj),yes)
+	dh_strip -p$(p_gnatsjlj)
+	find $(d_gnatsjlj) -name '*.ali' | xargs chmod 444
+	$(cross_makeshlibs) dh_shlibdeps -p$(p_gnatsjlj)
+	echo $(p_gnatsjlj) >> debian/arch_binaries
+endif
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+
+$(build_gnatdoc_stamp): $(build_stamp)
+	mkdir -p html
+	rm -f html/*.info
+	echo -n gnat_ugn gnat_rm gnat-style | xargs -d ' ' -L 1 -P $(USE_CPUS) -I{} \
+	  sh -c 'cd html && \
+	    echo "generating {}-$(GNAT_VERSION).info"; \
+	    makeinfo -I $(srcdir)/gcc/doc/include -I $(srcdir)/gcc/ada \
+		-I $(builddir)/gcc \
+		-o {}-$(GNAT_VERSION).info \
+		$(srcdir)/gcc/ada/{}.texi'
+	touch $@
+
+$(binary_stamp)-ada-doc: $(build_html_stamp) $(build_gnatdoc_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gnatd)
+	dh_installdirs -p$(p_gnatd) \
+		$(PF)/share/info
+	cp -p html/gnat*info* $(d_gnatd)/$(PF)/share/info/.
+	dh_installdocs -p$(p_gnatd) \
+	    html/gnat_ugn.html html/gnat_rm.html html/gnat-style.html
+	echo $(p_gnatd) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-base.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-base.mk
@@ -0,0 +1,75 @@
+arch_binaries += base
+ifeq ($(with_gcclbase),yes)
+  ifneq ($(with_base_only),yes)
+    indep_binaries += lbase
+  endif
+endif
+
+# ---------------------------------------------------------------------------
+# gcc-base
+
+ifneq (,$(filter $(distrelease),oneiric precise wheezy sid))
+  additional_links =
+else ifneq (,$(filter $(distrelease),))
+  additional_links =
+else
+  additional_links =
+endif
+
+$(binary_stamp)-base: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d_base)
+	dh_installdirs -p$(p_base) \
+		$(gcc_lexec_dir)
+
+ifneq ($(DEB_STAGE),rtlibs)
+	ln -sf $(BASE_VERSION) \
+	    $(d_base)/$(subst /$(BASE_VERSION),/$(GCC_VERSION),$(gcc_lib_dir))
+	for link in $(additional_links); do \
+	  ln -sf $(BASE_VERSION) \
+	    $(d_base)/$$(dirname $(gcc_lib_dir))/$$link; \
+        done
+  ifneq ($(gcc_lib_dir),$(gcc_lexec_dir))
+	ln -sf $(BASE_VERSION) \
+	    $(d_base)/$(subst /$(BASE_VERSION),/$(GCC_VERSION),$(gcc_lexec_dir))
+	for link in $(additional_links); do \
+	  ln -sf $(BASE_VERSION) \
+	    $(d_base)/$$(dirname $(gcc_lexec_dir))/$$link; \
+        done
+  endif
+endif
+
+ifeq ($(with_base_only),yes)
+	dh_installdocs -p$(p_base) debian/README.Debian
+else
+	dh_installdocs -p$(p_base) debian/README.Debian.$(DEB_TARGET_ARCH)
+endif
+	rm -f $(d_base)/usr/share/doc/$(p_base)/README.Debian
+	dh_installchangelogs -p$(p_base)
+	dh_compress -p$(p_base)
+	dh_fixperms -p$(p_base)
+ifeq ($(DEB_STAGE)-$(DEB_CROSS),rtlibs-yes)
+	$(cross_gencontrol) dh_gencontrol -p$(p_base) -- -v$(DEB_VERSION) $(common_substvars)
+else
+	dh_gencontrol -p$(p_base) -- -v$(DEB_VERSION) $(common_substvars)
+endif
+	dh_installdeb -p$(p_base)
+	dh_md5sums -p$(p_base)
+	dh_builddeb -p$(p_base)
+	touch $@
+
+$(binary_stamp)-lbase: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d_lbase)
+	dh_installdocs -p$(p_lbase) debian/README.Debian
+	rm -f debian/$(p_lbase)/usr/share/doc/$(p_lbase)/README.Debian
+	dh_installchangelogs -p$(p_lbase)
+	dh_compress -p$(p_lbase)
+	dh_fixperms -p$(p_lbase)
+	dh_gencontrol -p$(p_lbase) -- -v$(DEB_VERSION) $(common_substvars)
+	dh_installdeb -p$(p_lbase)
+	dh_md5sums -p$(p_lbase)
+	dh_builddeb -p$(p_lbase)
+	touch $@
--- gcc-5-5.4.0.orig/debian/rules.d/binary-cpp.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-cpp.mk
@@ -0,0 +1,84 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  arch_binaries  := $(arch_binaries) cpp
+  ifneq ($(DEB_CROSS),yes)
+    ifneq ($(GFDL_INVARIANT_FREE),yes)
+      indep_binaries := $(indep_binaries) cpp-doc
+    endif
+  endif
+endif
+
+dirs_cpp = \
+	$(docdir) \
+	$(PF)/share/man/man1 \
+	$(PF)/bin \
+	$(gcc_lexec_dir)
+
+files_cpp = \
+	$(PF)/bin/$(cmd_prefix)cpp$(pkg_ver) \
+	$(gcc_lexec_dir)/cc1 \
+	$(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0}
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_cpp += \
+	$(PF)/share/man/man1/$(cmd_prefix)cpp$(pkg_ver).1
+endif
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-cpp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_cpp)
+	dh_installdirs -p$(p_cpp) $(dirs_cpp)
+	$(dh_compat2) dh_movefiles -p$(p_cpp) $(files_cpp)
+
+ifneq ($(DEB_CROSS),yes)
+	ln -sf cpp$(pkg_ver) \
+	    $(d_cpp)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-cpp$(pkg_ver)
+	ln -sf cpp$(pkg_ver) \
+	    $(d_cpp)/$(PF)/bin/$(TARGET_ALIAS)-cpp$(pkg_ver)
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+	ln -sf cpp$(pkg_ver).1 \
+	    $(d_cpp)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-cpp$(pkg_ver).1
+	ln -sf cpp$(pkg_ver).1 \
+	    $(d_cpp)/$(PF)/share/man/man1/$(TARGET_ALIAS)-cpp$(pkg_ver).1
+  endif
+endif
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_cpp)/usr/share/lintian/overrides
+	echo '$(p_cpp) binary: binary-without-manpage' \
+	  >> $(d_cpp)/usr/share/lintian/overrides/$(p_cpp)
+endif
+
+	debian/dh_doclink -p$(p_cpp) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_cpp)
+
+	dh_strip -p$(p_cpp) \
+	  $(if $(unstripped_exe),-X/cc1)
+	dh_shlibdeps -p$(p_cpp)
+	echo $(p_cpp) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-cpp-doc: $(build_html_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_cppd)
+	dh_installdirs -p$(p_cppd) \
+		$(docdir)/$(p_xbase) \
+		$(PF)/share/info
+	$(dh_compat2) dh_movefiles -p$(p_cppd) \
+		$(PF)/share/info/cpp*
+
+	debian/dh_doclink -p$(p_cppd) $(p_xbase)
+	dh_installdocs -p$(p_cppd) html/cpp.html html/cppinternals.html
+	rm -f $(d_cppd)/$(docdir)/$(p_xbase)/copyright
+	debian/dh_rmemptydirs -p$(p_cppd)
+	echo $(p_cppd) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-cxx.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-cxx.mk
@@ -0,0 +1,90 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) cxx-multi
+  endif
+  arch_binaries  := $(arch_binaries) cxx
+endif
+
+dirs_cxx = \
+	$(docdir)/$(p_xbase)/C++ \
+	$(PF)/bin \
+	$(PF)/share/info \
+	$(gcc_lexec_dir) \
+	$(PF)/share/man/man1
+files_cxx = \
+	$(PF)/bin/$(cmd_prefix)g++$(pkg_ver) \
+	$(gcc_lexec_dir)/cc1plus
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_cxx += \
+	$(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1
+endif
+
+p_cxx_m	= g++$(pkg_ver)-multilib$(cross_bin_arch)
+d_cxx_m	= debian/$(p_cxx_m)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-cxx: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_cxx)
+	dh_installdirs -p$(p_cxx) $(dirs_cxx)
+	$(dh_compat2) dh_movefiles -p$(p_cxx) $(files_cxx)
+
+ifneq ($(DEB_CROSS),yes)
+	ln -sf g++$(pkg_ver) \
+	    $(d_cxx)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-g++$(pkg_ver)
+	ln -sf g++$(pkg_ver) \
+	    $(d_cxx)/$(PF)/bin/$(TARGET_ALIAS)-g++$(pkg_ver)
+endif
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+# g++ man page is a .so link
+	rm -f $(d_cxx)/$(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1
+	ln -sf $(cmd_prefix)gcc$(pkg_ver).1.gz \
+		$(d_cxx)/$(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1.gz
+  ifneq ($(DEB_CROSS),yes)
+	ln -sf g++$(pkg_ver).1.gz \
+	    $(d_cxx)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-g++$(pkg_ver).1.gz
+	ln -sf g++$(pkg_ver).1.gz \
+	    $(d_cxx)/$(PF)/share/man/man1/$(TARGET_ALIAS)-g++$(pkg_ver).1.gz
+  endif
+endif
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_cxx)/usr/share/lintian/overrides
+	echo '$(p_cxx) binary: binary-without-manpage' \
+	  >> $(d_cxx)/usr/share/lintian/overrides/$(p_cxx)
+endif
+
+	debian/dh_doclink -p$(p_cxx) $(p_xbase)
+	cp -p debian/README.C++ $(d_cxx)/$(docdir)/$(p_xbase)/C++/
+	cp -p $(srcdir)/gcc/cp/ChangeLog \
+		$(d_cxx)/$(docdir)/$(p_xbase)/C++/changelog
+	debian/dh_rmemptydirs -p$(p_cxx)
+
+	dh_shlibdeps -p$(p_cxx)
+	dh_strip -p$(p_cxx) $(if $(unstripped_exe),-X/cc1plus)
+	echo $(p_cxx) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-cxx-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_cxx_m)
+	dh_installdirs -p$(p_cxx_m) \
+		$(docdir)
+
+	debian/dh_doclink -p$(p_cxx_m) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_cxx_m)
+
+	dh_strip -p$(p_cxx_m)
+	dh_shlibdeps -p$(p_cxx_m)
+	echo $(p_cxx_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-d.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-d.mk
@@ -0,0 +1,237 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) gdc-multi
+  endif
+  arch_binaries := $(arch_binaries) gdc
+
+  ifeq ($(with_libphobos),yes)
+    $(lib_binaries) += libphobos-dev
+  endif
+
+  ifeq ($(with_lib64phobosdev),yes)
+    $(lib_binaries)	+= lib64phobos-dev
+  endif
+  ifeq ($(with_lib32phobosdev),yes)
+    $(lib_binaries)	+= lib32phobos-dev
+  endif
+  ifeq ($(with_libn32phobosdev),yes)
+    $(lib_binaries)	+= libn32phobos-dev
+  endif
+  ifeq ($(with_libx32phobosdev),yes)
+    $(lib_binaries)	+= libx32phobos-dev
+  endif
+  ifeq ($(with_libhfphobosdev),yes)
+    $(lib_binaries)	+= libhfphobos-dev
+  endif
+  ifeq ($(with_libsfphobosdev),yes)
+    $(lib_binaries)	+= libsfphobos-dev
+  endif
+
+  ifeq (0,1)
+  ifeq ($(with_lib64phobos),yes)
+    $(lib_binaries)	+= lib64phobos
+  endif
+  ifeq ($(with_lib32phobos),yes)
+    $(lib_binaries)	+= lib32phobos
+  endif
+  ifeq ($(with_libn32phobos),yes)
+    $(lib_binaries)	+= libn32phobos
+  endif
+  ifeq ($(with_libx32phobos),yes)
+    $(lib_binaries)	+= libx32phobos
+  endif
+  ifeq ($(with_libhfphobos),yes)
+    $(lib_binaries)	+= libhfphobos
+  endif
+  ifeq ($(with_libsfphobos),yes)
+    $(lib_binaries)	+= libsfphobos
+  endif
+  endif
+endif
+
+p_gdc           = gdc$(pkg_ver)$(cross_bin_arch)
+p_gdc_m		= gdc$(pkg_ver)-multilib$(cross_bin_arch)
+p_libphobos     = libphobos$(pkg_ver)-dev
+
+d_gdc           = debian/$(p_gdc)
+d_gdc_m		= debian/$(p_gdc_m)
+d_libphobos     = debian/$(p_libphobos)
+
+ifeq ($(DEB_CROSS),yes)
+  gdc_include_dir := $(gcc_lib_dir)/include/d
+else
+  gdc_include_dir := $(PF)/include/d/$(BASE_VERSION)
+endif
+# FIXME: always here?
+gdc_include_dir := $(gcc_lib_dir)/include/d
+
+dirs_gdc = \
+	$(PF)/bin \
+	$(PF)/share/man/man1 \
+	$(gcc_lexec_dir)
+ifneq ($(DEB_CROSS),yes)
+  dirs_gdc += \
+	$(gdc_include_dir)
+endif
+
+files_gdc = \
+	$(PF)/bin/$(cmd_prefix)gdc$(pkg_ver) \
+	$(gcc_lexec_dir)/cc1d
+ifneq ($(GFDL_INVARIANT_FREE),yes-now-pure-gfdl)
+    files_gdc += \
+	$(PF)/share/man/man1/$(cmd_prefix)gdc$(pkg_ver).1
+endif
+
+dirs_libphobos = \
+	$(PF)/lib \
+	$(gdc_include_dir) \
+	$(gcc_lib_dir)
+
+$(binary_stamp)-gdc: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gdc)
+	dh_installdirs -p$(p_gdc) $(dirs_gdc)
+
+	dh_installdocs -p$(p_gdc) src/gcc/d/README
+	dh_installchangelogs -p$(p_gdc) src/gcc/d/ChangeLog
+
+	$(dh_compat2) dh_movefiles -p$(p_gdc) -X/zlib/ $(files_gdc)
+
+ifneq ($(DEB_CROSS),yes)
+	ln -sf gdc$(pkg_ver) \
+	    $(d_gdc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gdc$(pkg_ver)
+	ln -sf gdc$(pkg_ver) \
+	    $(d_gdc)/$(PF)/bin/$(TARGET_ALIAS)-gdc$(pkg_ver)
+  ifneq ($(GFDL_INVARIANT_FREE),yes-now-pure-gfdl)
+	ln -sf gdc$(pkg_ver).1 \
+	    $(d_gdc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gdc$(pkg_ver).1
+	ln -sf gdc$(pkg_ver).1 \
+	    $(d_gdc)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gdc$(pkg_ver).1
+  endif
+endif
+
+# FIXME: __entrypoint.di needs to go into a libgdc-dev Multi-Arch: same package
+	# Always needed by gdc.
+	mkdir -p $(d_gdc)/$(gdc_include_dir)
+	cp $(srcdir)/libphobos/libdruntime/__entrypoint.di \
+	    $(d_gdc)/$(gdc_include_dir)/.
+#ifneq ($(DEB_CROSS),yes)
+#	dh_link -p$(p_gdc) \
+#		/$(gdc_include_dir) \
+#		/$(dir $(gdc_include_dir))/$(GCC_VERSION)
+#endif
+
+	dh_link -p$(p_gdc) \
+		/$(docdir)/$(p_gcc)/README.Bugs \
+		/$(docdir)/$(p_gdc)/README.Bugs
+
+	dh_strip -p$(p_gdc) \
+	  $(if $(unstripped_exe),-X/cc1d)
+	dh_shlibdeps -p$(p_gdc)
+	echo $(p_gdc) >> debian/arch_binaries
+
+	find $(d_gdc) -type d -empty -delete
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-gdc-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gdc_m)
+	dh_installdirs -p$(p_gdc_m) $(docdir)
+
+	debian/dh_doclink -p$(p_gdc_m) $(p_xbase)
+
+	dh_strip -p$(p_gdc_m)
+	dh_shlibdeps -p$(p_gdc_m)
+	echo $(p_gdc_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-libphobos: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_libphobos)
+	dh_installdirs -p$(p_libphobos) $(dirs_libphobos)
+
+	mv $(d)/$(usr_lib)/libg{druntime,phobos2}.a \
+		$(d)/$(gcc_lib_dir)/.
+	$(dh_compat2) dh_movefiles -p$(p_libphobos) \
+		$(gcc_lib_dir)/libg{druntime,phobos2}.a
+
+	# included in gdc package
+	rm -f $(d_libphobos)/$(gdc_include_dir)/__entrypoint.di
+
+ifeq ($(with_separate_gdc),yes)
+	debian/dh_doclink -p$(p_libphobos) $(p_gdc)
+else
+	debian/dh_doclink -p$(p_libphobos) $(p_lbase)
+endif
+
+	dh_strip -p$(p_libphobos)
+	dh_shlibdeps -p$(p_libphobos)
+	echo $(p_libphobos) >> debian/arch_binaries
+
+	find $(d_libphobos) -type d -empty -delete
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+define __do_libphobos_dev
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l)
+	dh_installdirs -p$(p_l) \
+		$(gcc_lib_dir$(2))
+	mv $(d)/$(usr_lib$(2))/libg{druntime,phobos2}.a \
+		$(d)/$(gcc_lib_dir$(2))/.
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(gcc_lib_dir$(2))/libg{druntime,phobos2}.a
+	$(if $(2),,
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(gdc_include_dir)
+	)
+
+	: # included in gdc package
+	rm -f $(d_l)/$(gdc_include_dir)/__entrypoint.di
+
+	debian/dh_doclink -p$(p_l) \
+		$(if $(filter yes,$(with_separate_gdc)),$(p_gdc),$(p_lbase))
+	echo $(p_l) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# don't put this as a comment within define/endef
+#	$(call install_gcc_lib,libphobos,$(PHOBOS_SONAME),$(2),$(p_l))
+
+do_libphobos_dev = $(call __do_libphobos_dev,lib$(1)phobos-$(BASE_VERSION)-dev,$(1))
+
+$(binary_stamp)-libphobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,)
+
+$(binary_stamp)-lib64phobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,64)
+
+$(binary_stamp)-lib32phobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,32)
+
+$(binary_stamp)-libx32phobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,x32)
+
+$(binary_stamp)-libn32phobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,n32)
+
+$(binary_stamp)-libhfphobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,hf)
+
+$(binary_stamp)-libsfphobos-dev: $(install_stamp)
+	$(call do_libphobos_dev,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-fixincl.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-fixincl.mk
@@ -0,0 +1,42 @@
+arch_binaries  := $(arch_binaries) fixincl
+
+p_fix	= fixincludes
+d_fix	= debian/$(p_fix)
+
+dirs_fix = \
+	$(docdir)/$(p_xbase)/fixincludes \
+	$(PF)/share/man/man1 \
+	$(PF)/bin \
+	$(gcc_lexec_dir) \
+	$(gcc_lib_dir)
+files_fix = \
+	$(gcc_lexec_dir)/install-tools \
+	$(gcc_lib_dir)/install-tools
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-fixincl: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_fix)
+	dh_installdirs -p$(p_fix) $(dirs_fix)
+	$(dh_compat2) dh_movefiles -p$(p_fix) $(files_fix)
+
+#	$(IP) $(builddir)/gcc/fixinc/fixincl $(d_fix)/$(PF)/lib/fixincludes/
+#	sed -e "s,^FIXINCL=\(.*\),FIXINCL=/$(PF)/lib/fixincludes/fixincl," \
+#	    $(builddir)/gcc/fixinc.sh \
+#		> $(d_fix)/$(PF)/lib/fixincludes/fixinc.sh
+#	chmod 755 $(d_fix)/$(PF)/lib/fixincludes/fixinc.sh
+	$(IR) $(srcdir)/fixincludes/README \
+	    $(d_fix)/$(docdir)/$(p_xbase)/fixincludes
+	sed -e 's,@LIBEXECDIR@,$(gcc_lexec_dir),g' debian/fixincludes.in \
+	    > $(d_fix)/$(PF)/bin/fixincludes
+	chmod 755 $(d_fix)/$(PF)/bin/fixincludes
+
+	debian/dh_doclink -p$(p_fix) $(p_xbase)
+	dh_strip -p$(p_fix)
+	dh_shlibdeps -p$(p_fix)
+	echo $(p_fix) >> debian/arch_binaries.epoch
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-fortran.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-fortran.mk
@@ -0,0 +1,271 @@
+ifeq ($(with_libgfortran),yes)
+  $(lib_binaries) += libgfortran
+endif
+ifeq ($(with_fdev),yes)
+  $(lib_binaries) += libgfortran-dev
+endif
+ifeq ($(with_lib64gfortran),yes)
+  $(lib_binaries) += lib64fortran
+endif
+ifeq ($(with_lib64gfortrandev),yes)
+  $(lib_binaries) += lib64gfortran-dev
+endif
+ifeq ($(with_lib32gfortran),yes)
+  $(lib_binaries) += lib32fortran
+endif
+ifeq ($(with_lib32gfortrandev),yes)
+  $(lib_binaries) += lib32gfortran-dev
+endif
+ifeq ($(with_libn32gfortran),yes)
+  $(lib_binaries) += libn32fortran
+endif
+ifeq ($(with_libn32gfortrandev),yes)
+  $(lib_binaries) += libn32gfortran-dev
+endif
+ifeq ($(with_libx32gfortran),yes)
+  $(lib_binaries) += libx32fortran
+endif
+ifeq ($(with_libx32gfortrandev),yes)
+  $(lib_binaries) += libx32gfortran-dev
+endif
+ifeq ($(with_libhfgfortran),yes)
+  $(lib_binaries) += libhffortran
+endif
+ifeq ($(with_libhfgfortrandev),yes)
+  $(lib_binaries) += libhfgfortran-dev
+endif
+ifeq ($(with_libsfgfortran),yes)
+  $(lib_binaries) += libsffortran
+endif
+ifeq ($(with_libsfgfortrandev),yes)
+  $(lib_binaries) += libsfgfortran-dev
+endif
+
+ifeq ($(with_fdev),yes)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) fdev-multi
+  endif
+  arch_binaries  := $(arch_binaries) fdev
+  ifneq ($(DEB_CROSS),yes)
+    ifneq ($(GFDL_INVARIANT_FREE),yes)
+      indep_binaries := $(indep_binaries) fortran-doc
+    endif
+  endif
+endif
+
+p_g95	= gfortran$(pkg_ver)$(cross_bin_arch)
+p_g95_m	= gfortran$(pkg_ver)-multilib$(cross_bin_arch)
+p_g95d	= gfortran$(pkg_ver)-doc
+p_flib	= libgfortran$(FORTRAN_SONAME)$(cross_lib_arch)
+
+d_g95	= debian/$(p_g95)
+d_g95_m	= debian/$(p_g95_m)
+d_g95d	= debian/$(p_g95d)
+
+dirs_g95 = \
+	$(docdir)/$(p_xbase)/fortran \
+	$(PF)/bin \
+	$(gcc_lexec_dir) \
+	$(gcc_lib_dir) \
+	$(PF)/include \
+	$(PF)/share/man/man1
+files_g95 = \
+	$(PF)/bin/$(cmd_prefix)gfortran$(pkg_ver) \
+	$(gcc_lib_dir)/finclude \
+	$(gcc_lexec_dir)/f951 
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_g95 += \
+	$(PF)/share/man/man1/$(cmd_prefix)gfortran$(pkg_ver).1
+endif
+
+# ----------------------------------------------------------------------
+define __do_fortran
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libgfortran.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libgfortran.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst gfortran$(FORTRAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst gfortran$(FORTRAN_SONAME),gcc$(QUADMATH_SONAME),$(p_l)) \
+		,$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+do_fortran = $(call __do_fortran,lib$(1)gfortran$(FORTRAN_SONAME),$(1))
+
+
+define __do_libgfortran_dev
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l)
+	dh_installdirs -p$(1) $(gcc_lib_dir$(2))
+
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(gcc_lib_dir$(2))/libgfortranbegin.a \
+		$(gcc_lib_dir$(2))/libcaf_single.a
+	$(call install_gcc_lib,libgfortran,$(FORTRAN_SONAME),$(2),$(p_l))
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_rmemptydirs -p$(p_l)
+
+	dh_strip -p$(p_l)
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_l)
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+# ----------------------------------------------------------------------
+
+do_libgfortran_dev = $(call __do_libgfortran_dev,lib$(1)gfortran-$(BASE_VERSION)-dev,$(1))
+
+$(binary_stamp)-libgfortran: $(install_stamp)
+	$(call do_fortran,)
+
+$(binary_stamp)-lib64fortran: $(install_stamp)
+	$(call do_fortran,64)
+
+$(binary_stamp)-lib32fortran: $(install_stamp)
+	$(call do_fortran,32)
+
+$(binary_stamp)-libn32fortran: $(install_stamp)
+	$(call do_fortran,n32)
+
+$(binary_stamp)-libx32fortran: $(install_stamp)
+	$(call do_fortran,x32)
+
+$(binary_stamp)-libhffortran: $(install_stamp)
+	$(call do_fortran,hf)
+
+$(binary_stamp)-libsffortran: $(install_stamp)
+	$(call do_fortran,sf)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-fdev: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_g95)
+	dh_installdirs -p$(p_g95) $(dirs_g95)
+
+	$(dh_compat2) dh_movefiles -p$(p_g95) $(files_g95)
+
+	mv $(d)/$(usr_lib)/libgfortran.spec $(d_g95)/$(gcc_lib_dir)/
+
+ifneq ($(DEB_CROSS),yes)
+	ln -sf gfortran$(pkg_ver) \
+	    $(d_g95)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gfortran$(pkg_ver)
+	ln -sf gfortran$(pkg_ver) \
+	    $(d_g95)/$(PF)/bin/$(TARGET_ALIAS)-gfortran$(pkg_ver)
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	ln -sf gfortran$(pkg_ver).1 \
+	    $(d_g95)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gfortran$(pkg_ver).1
+	ln -sf gfortran$(pkg_ver).1 \
+	    $(d_g95)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gfortran$(pkg_ver).1
+endif
+endif
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_g95)/usr/share/lintian/overrides
+	echo '$(p_g95) binary: binary-without-manpage' \
+	  >> $(d_g95)/usr/share/lintian/overrides/$(p_g95)
+endif
+
+	debian/dh_doclink -p$(p_g95) $(p_xbase)
+
+	cp -p $(srcdir)/gcc/fortran/ChangeLog \
+		$(d_g95)/$(docdir)/$(p_xbase)/fortran/changelog
+	debian/dh_rmemptydirs -p$(p_g95)
+
+	dh_strip -p$(p_g95) \
+	  $(if $(unstripped_exe),-X/f951)
+	dh_shlibdeps -p$(p_g95)
+	echo $(p_g95) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-fdev-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_g95_m)
+	dh_installdirs -p$(p_g95_m) $(docdir)
+
+	debian/dh_doclink -p$(p_g95_m) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_g95_m)
+	dh_strip -p$(p_g95_m)
+	dh_shlibdeps -p$(p_g95_m)
+	echo $(p_g95_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-fortran-doc: $(build_html_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_g95d)
+	dh_installdirs -p$(p_g95d) \
+		$(docdir)/$(p_xbase)/fortran \
+		$(PF)/share/info
+	$(dh_compat2) dh_movefiles -p$(p_g95d) \
+		$(PF)/share/info/gfortran*
+
+	debian/dh_doclink -p$(p_g95d) $(p_xbase)
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	dh_installdocs -p$(p_g95d)
+	rm -f $(d_g95d)/$(docdir)/$(p_xbase)/copyright
+	cp -p html/gfortran.html $(d_g95d)/$(docdir)/$(p_xbase)/fortran/
+endif
+	echo $(p_g95d) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-libgfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,)
+
+$(binary_stamp)-lib64gfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,64)
+
+$(binary_stamp)-lib32gfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,32)
+
+$(binary_stamp)-libn32gfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,n32)
+
+$(binary_stamp)-libx32gfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,x32)
+
+$(binary_stamp)-libhfgfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,hf)
+
+$(binary_stamp)-libsfgfortran-dev: $(install_stamp)
+	$(call do_libgfortran_dev,sf)
+
--- gcc-5-5.4.0.orig/debian/rules.d/binary-gcc.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-gcc.mk
@@ -0,0 +1,368 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) gcc-multi
+  endif
+  ifeq ($(with_plugins),yes)
+    arch_binaries  := $(arch_binaries) gcc-plugindev
+  endif
+
+  arch_binaries  := $(arch_binaries) gcc
+
+  ifneq ($(DEB_CROSS),yes)
+    ifneq ($(GFDL_INVARIANT_FREE),yes)
+      indep_binaries := $(indep_binaries) gcc-doc
+    endif
+    ifeq ($(with_nls),yes)
+      indep_binaries := $(indep_binaries) gcc-locales
+    endif
+  endif
+
+  ifeq ($(build_type),build-native)
+    arch_binaries  := $(arch_binaries) testresults
+  endif
+endif
+
+# gcc must be moved after g77 and g++
+# not all files $(PF)/include/*.h are part of gcc,
+# but it becomes difficult to name all these files ...
+
+dirs_gcc = \
+	$(docdir)/$(p_xbase)/{gcc,libssp,gomp,itm,quadmath,sanitizer,cilkrts,mpx} \
+	$(PF)/bin \
+	$(gcc_lexec_dir) \
+	$(gcc_lib_dir)/{include,include-fixed} \
+	$(PF)/share/man/man1 $(libgcc_dir)
+
+# XXX: what about triarch mapping?
+files_gcc = \
+	$(PF)/bin/$(cmd_prefix){gcc,gcov,gcov-tool}$(pkg_ver) \
+	$(PF)/bin/$(cmd_prefix)gcc-{ar,ranlib,nm}$(pkg_ver) \
+	$(PF)/share/man/man1/$(cmd_prefix)gcc-{ar,nm,ranlib}$(pkg_ver).1 \
+	$(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \
+	$(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \
+		&& echo $(gcc_lib_dir)/SYSCALLS.c.X)
+
+ifeq ($(with_cc1),yes)
+    files_gcc += \
+	$(gcc_lib_dir)/plugin/libcc1plugin.so{,.0,.0.0.0}
+endif
+
+ifeq ($(DEB_STAGE),stage1)
+    files_gcc += \
+	$(gcc_lib_dir)/include \
+	$(shell for h in \
+		  README limits.h syslimits.h; \
+		do \
+		  test -e $(d)/$(gcc_lib_dir)/include-fixed/$$h \
+		    && echo $(gcc_lib_dir)/include-fixed/$$h; \
+		done)
+endif
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+    files_gcc += \
+	$(PF)/share/man/man1/$(cmd_prefix){gcc,gcov}$(pkg_ver).1
+endif
+
+usr_doc_files = debian/README.Bugs \
+	$(shell test -f $(srcdir)/FAQ && echo $(srcdir)/FAQ)
+
+p_loc	= gcc$(pkg_ver)-locales
+d_loc	= debian/$(p_loc)
+
+p_gcc_m	= gcc$(pkg_ver)-multilib$(cross_bin_arch)
+d_gcc_m	= debian/$(p_gcc_m)
+
+p_pld	= gcc$(pkg_ver)-plugin-dev$(cross_bin_arch)
+d_pld	= debian/$(p_pld)
+
+p_tst	= gcc$(pkg_ver)-test-results
+d_tst	= debian/$(p_tst)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcc: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gcc)
+	dh_installdirs -p$(p_gcc) $(dirs_gcc)
+
+ifeq ($(with_linaro_branch),yes)
+	if [ -f $(srcdir)/gcc/ChangeLog.linaro ]; then \
+	  cp -p $(srcdir)/gcc/ChangeLog.linaro \
+		$(d_gcc)/$(docdir)/$(p_xbase)/changelog.linaro; \
+	fi
+endif
+ifeq ($(with_libssp),yes)
+	cp -p $(srcdir)/libssp/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/libssp/changelog
+endif
+ifeq ($(with_gomp),yes)
+	mv $(d)/$(usr_lib)/libgomp*.spec $(d_gcc)/$(gcc_lib_dir)/
+	cp -p $(srcdir)/libgomp/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/gomp/changelog
+endif
+ifeq ($(with_itm),yes)
+	mv $(d)/$(usr_lib)/libitm*.spec $(d_gcc)/$(gcc_lib_dir)/
+	cp -p $(srcdir)/libitm/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/itm/changelog
+endif
+ifeq ($(with_qmath),yes)
+	cp -p $(srcdir)/libquadmath/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/quadmath/changelog
+endif
+ifeq ($(with_asan),yes)
+	mv $(d)/$(usr_lib)/libsanitizer*.spec $(d_gcc)/$(gcc_lib_dir)/
+	cp -p $(srcdir)/libsanitizer/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/sanitizer/changelog
+endif
+ifeq ($(with_cilkrts),yes)
+	mv $(d)/$(usr_lib)/libcilkrts.spec $(d_gcc)/$(gcc_lib_dir)/
+	cp -p $(srcdir)/libcilkrts/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/cilkrts/changelog
+endif
+ifeq ($(with_mpx),yes)
+	mv $(d)/$(usr_lib)/libmpx.spec $(d_gcc)/$(gcc_lib_dir)/
+	cp -p $(srcdir)/libmpx/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/mpx/changelog
+endif
+ifeq ($(with_cc1),yes)
+	rm -f $(d)/$(usr_lib)/libcc1.so
+	dh_link -p$(p_gcc) \
+		/$(usr_lib)/libcc1.so.$(CC1_SONAME) /$(gcc_lib_dir)/libcc1.so
+endif
+
+	$(dh_compat2) dh_movefiles -p$(p_gcc) $(files_gcc)
+
+ifneq ($(DEB_CROSS),yes)
+	for i in gcc gcov gcov-tool gcc-ar gcc-nm gcc-ranlib; do \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gcc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver); \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_gcc)/$(PF)/bin/$(TARGET_ALIAS)-$$i$(pkg_ver); \
+	done
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	for i in gcc gcov gcc-ar gcc-nm gcc-ranlib; do \
+	  ln -sf gcc$(pkg_ver).1 \
+	    $(d_gcc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver).1; \
+	  ln -sf $$i$(pkg_ver).1 \
+	    $(d_gcc)/$(PF)/share/man/man1/$(TARGET_ALIAS)-$$i$(pkg_ver).1; \
+	done
+endif
+endif
+
+#	dh_installdebconf
+	debian/dh_doclink -p$(p_gcc) $(p_xbase)
+	cp -p $(usr_doc_files) $(d_gcc)/$(docdir)/$(p_xbase)/.
+	cp -p debian/README.ssp $(d_gcc)/$(docdir)/$(p_xbase)/
+	cp -p debian/NEWS.gcc $(d_gcc)/$(docdir)/$(p_xbase)/NEWS
+	cp -p debian/NEWS.html $(d_gcc)/$(docdir)/$(p_xbase)/NEWS.html
+	cp -p $(srcdir)/ChangeLog $(d_gcc)/$(docdir)/$(p_xbase)/changelog
+	cp -p $(srcdir)/gcc/ChangeLog \
+		$(d_gcc)/$(docdir)/$(p_xbase)/gcc/changelog
+	if [ -f $(builddir)/gcc/.bad_compare ]; then \
+	  ( \
+	    echo "The comparision of the stage2 and stage3 object files shows differences."; \
+	    echo "The Debian package was modified to ignore these differences."; \
+	    echo ""; \
+	    echo "The following files differ:"; \
+	    echo ""; \
+	    cat $(builddir)/gcc/.bad_compare; \
+	  ) > $(d_gcc)/$(docdir)/$(p_xbase)/BOOTSTRAP_COMPARISION_FAILURE; \
+	else \
+	  true; \
+	fi
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_gcc)/usr/share/lintian/overrides
+	echo '$(p_gcc) binary: binary-without-manpage' \
+	  >> $(d_gcc)/usr/share/lintian/overrides/$(p_gcc)
+endif
+
+	debian/dh_rmemptydirs -p$(p_gcc)
+	dh_strip -p$(p_gcc) \
+	  # save some disk space $(if $(unstripped_exe),-X/lto1)
+	dh_shlibdeps -p$(p_gcc)
+	echo $(p_gcc) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+
+$(binary_stamp)-gcc-multi: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gcc_m)
+	dh_installdirs -p$(p_gcc_m) $(docdir)
+
+	debian/dh_doclink -p$(p_gcc_m) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_gcc_m)
+
+	dh_strip -p$(p_gcc_m)
+	dh_shlibdeps -p$(p_gcc_m)
+	echo $(p_gcc_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcc-plugindev: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_pld)
+	dh_installdirs -p$(p_pld) \
+		$(docdir) \
+		$(gcc_lib_dir)/plugin
+	$(dh_compat2) dh_movefiles -p$(p_pld) \
+		$(gcc_lib_dir)/plugin/include \
+		$(gcc_lib_dir)/plugin/gtype.state \
+		$(gcc_lexec_dir)/plugin/gengtype
+
+# files missing in upstream installation
+ifeq ($(DEB_TARGET_ARCH),m68k)
+	cp -p $(srcdir)/gcc/config/m68k/m68k-{devices,microarchs}.def \
+		$(d_pld)/$(gcc_lib_dir)/plugin/include/config/m68k/.
+endif
+ifeq ($(DEB_TARGET_ARCH),arm64)
+  ifeq ($(with_linaro_branch),yes)
+	cp -p $(srcdir)/gcc/config/aarch64/aarch64-arches.def \
+		$(d_pld)/$(gcc_lib_dir)/plugin/include/config/aarch64/.
+  endif
+endif
+
+	debian/dh_doclink -p$(p_pld) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_pld)
+	dh_strip -p$(p_pld)
+	dh_shlibdeps -p$(p_pld)
+	echo $(p_pld) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcc-locales: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_loc)
+	dh_installdirs -p$(p_loc) \
+		$(docdir)
+	$(dh_compat2) dh_movefiles -p$(p_loc) \
+		$(PF)/share/locale/*/*/cpplib*.* \
+		$(PF)/share/locale/*/*/gcc*.*
+
+	debian/dh_doclink -p$(p_loc) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_loc)
+	echo $(p_loc) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+
+# ----------------------------------------------------------------------
+
+$(binary_stamp)-testresults: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_tst)
+	dh_installdirs -p$(p_tst) $(docdir)
+
+	debian/dh_doclink -p$(p_tst) $(p_xbase)
+
+	mkdir -p $(d_tst)/$(docdir)/$(p_xbase)/test
+	echo "TEST COMPARE BEGIN"
+ifeq ($(with_check),yes)
+	for i in test-summary testsuite-comparision; do \
+	  [ -f $$i ] || continue; \
+	  cp -p $$i $(d_tst)/$(docdir)/$(p_xbase)/$$i; \
+	done
+# more than one libgo.sum, avoid it
+	cp -p $$(find $(builddir)/gcc/testsuite -maxdepth 2 \( -name '*.sum' -o -name '*.log' \)) \
+	      $$(find $(buildlibdir)/*/testsuite -maxdepth 1 \( -name '*.sum'  -o -name '*.log' \) ! -name 'libgo.*') \
+		$(d_tst)/$(docdir)/$(p_xbase)/test/
+  ifeq ($(with_go),yes)
+	cp -p $(buildlibdir)/libgo/libgo.sum \
+		$(d_tst)/$(docdir)/$(p_xbase)/test/
+  endif
+  ifeq (0,1)
+	cd $(builddir); \
+	for i in $(CURDIR)/$(d_tst)/$(docdir)/$(p_xbase)/test/*.sum; do \
+	  b=$$(basename $$i); \
+	  if [ -f /usr/share/doc/$(p_xbase)/test/$$b.gz ]; then \
+	    zcat /usr/share/doc/$(p_xbase)/test/$$b.gz > /tmp/$$b; \
+	    if sh $(srcdir)/contrib/test_summary /tmp/$$b $$i; then \
+	      echo "$$b: OK"; \
+	    else \
+	      echo "$$b: FAILURES"; \
+	    fi; \
+	    rm -f /tmp/$$b; \
+	  else \
+	    echo "Test summary for $$b is not available"; \
+	  fi; \
+	done
+  endif
+	if which xz 2>&1 >/dev/null; then \
+	  echo -n $(d_tst)/$(docdir)/$(p_xbase)/test/* \
+	    | xargs -d ' ' -L 1 -P $(USE_CPUS)	xz -7v; \
+	fi
+else
+	echo "Nothing to compare (testsuite not run)"
+	echo 'Test run disabled, reason: $(with_check)' \
+	  > $(d_tst)/$(docdir)/$(p_xbase)/test-run-disabled
+endif
+	echo "TEST COMPARE END"
+
+	debian/dh_rmemptydirs -p$(p_tst)
+
+	echo $(p_tst) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcc-doc: $(build_html_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_doc)
+	dh_installdirs -p$(p_doc) \
+		$(docdir)/$(p_xbase) \
+		$(PF)/share/info
+	$(dh_compat2) dh_movefiles -p$(p_doc) \
+		$(PF)/share/info/cpp{,internals}-* \
+		$(PF)/share/info/gcc{,int}-* \
+		$(PF)/share/info/lib{gomp,itm}-* \
+		$(if $(with_qmath),$(PF)/share/info/libquadmath-*)
+	rm -f $(d_doc)/$(PF)/share/info/gccinst*
+
+ifeq ($(with_gomp),yes)
+	$(MAKE) -C $(buildlibdir)/libgomp stamp-build-info
+	cp -p $(buildlibdir)/libgomp/libgomp$(pkg_ver).info $(d_doc)/$(PF)/share/info/
+endif
+ifeq ($(with_itm),yes)
+	-$(MAKE) -C $(buildlibdir)/libitm stamp-build-info
+	if [ -f $(buildlibdir)/libitm/libitm$(pkg_ver).info ]; then \
+	  cp -p $(buildlibdir)/libitm/libitm$(pkg_ver).info $(d_doc)/$(PF)/share/info/; \
+	fi
+endif
+
+	debian/dh_doclink -p$(p_doc) $(p_xbase)
+	dh_installdocs -p$(p_doc) html/gcc.html html/gccint.html
+ifeq ($(with_gomp),yes)
+	cp -p html/libgomp.html $(d_doc)/usr/share/doc/$(p_doc)/
+endif
+ifeq ($(with_itm),yes)
+	cp -p html/libitm.html $(d_doc)/usr/share/doc/$(p_doc)/
+endif
+ifeq ($(with_qmath),yes)
+	cp -p html/libquadmath.html $(d_doc)/usr/share/doc/$(p_doc)/
+endif
+	rm -f $(d_doc)/$(docdir)/$(p_xbase)/copyright
+	debian/dh_rmemptydirs -p$(p_doc)
+	echo $(p_doc) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-go.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-go.mk
@@ -0,0 +1,327 @@
+ifeq ($(with_libgo),yes)
+  $(lib_binaries) += libgo
+endif
+ifeq ($(with_lib64go),yes)
+  $(lib_binaries) += lib64go
+endif
+ifeq ($(with_lib32go),yes)
+  $(lib_binaries) += lib32go
+endif
+ifeq ($(with_libn32go),yes)
+  $(lib_binaries) += libn32go
+endif
+ifeq ($(with_libx32go),yes)
+  $(lib_binaries) += libx32go
+endif
+
+ifneq ($(DEB_STAGE),rtlibs)
+  arch_binaries  := $(arch_binaries) gccgo
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32)))
+    arch_binaries  := $(arch_binaries) gccgo-multi
+  endif
+  ifneq ($(DEB_CROSS),yes)
+    ifneq ($(GFDL_INVARIANT_FREE),yes)
+      indep_binaries := $(indep_binaries) go-doc
+    endif
+  endif
+endif
+
+p_go	= gccgo$(pkg_ver)$(cross_bin_arch)
+p_go_m	= gccgo$(pkg_ver)-multilib$(cross_bin_arch)
+p_god	= gccgo$(pkg_ver)-doc
+p_golib	= libgo$(GO_SONAME)$(cross_lib_arch)
+
+d_go	= debian/$(p_go)
+d_go_m	= debian/$(p_go_m)
+d_god	= debian/$(p_god)
+d_golib	= debian/$(p_golib)
+
+dirs_go = \
+	$(docdir)/$(p_xbase)/go \
+	$(PF)/bin \
+	$(gcc_lexec_dir) \
+	$(gcc_lib_dir) \
+	$(PF)/include \
+	$(PF)/share/man/man1
+files_go = \
+	$(PF)/bin/$(cmd_prefix)gccgo$(pkg_ver) \
+	$(gcc_lexec_dir)/go1
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+  files_go += \
+	$(PF)/bin/{go,gofmt}$(pkg_ver) \
+	$(gcc_lexec_dir)/cgo \
+	$(PF)/share/man/man1/{go,gofmt}$(pkg_ver).1
+endif
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_go += \
+	$(PF)/share/man/man1/$(cmd_prefix)gccgo$(pkg_ver).1
+endif
+
+ifeq ($(with_standalone_go),yes)
+
+  dirs_go += \
+	$(gcc_lib_dir)/include \
+	$(PF)/share/man/man1
+
+# XXX: what about triarch mapping?
+  files_go += \
+	$(PF)/bin/{cpp,gcc,gcov}$(pkg_ver) \
+	$(PF)/bin/$(cmd_prefix)gcc-{ar,ranlib,nm}$(pkg_ver) \
+	$(PF)/share/man/man1/$(cmd_prefix)gcc-{ar,nm,ranlib}$(pkg_ver).1 \
+	$(gcc_lexec_dir)/{cc1,collect2,lto1,lto-wrapper} \
+	$(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} \
+	$(gcc_lib_dir)/{libgcc*,libgcov.a,*.o} \
+	$(header_files) \
+	$(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \
+		&& echo $(gcc_lib_dir)/SYSCALLS.c.X)
+
+  ifeq ($(with_cc1),yes)
+    files_go += \
+	$(gcc_lib_dir)/plugin/libcc1plugin.so{,.0,.0.0.0}
+  endif
+
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+    files_go += \
+	$(PF)/share/man/man1/{cpp,gcc,gcov}$(pkg_ver).1
+  endif
+
+  ifeq ($(biarch64),yes)
+    files_go += $(gcc_lib_dir)/$(biarch64subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+  ifeq ($(biarch32),yes)
+    files_go += $(gcc_lib_dir)/$(biarch32subdir)/{libgcc*,*.o}
+  endif
+  ifeq ($(biarchn32),yes)
+    files_go += $(gcc_lib_dir)/$(biarchn32subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+  ifeq ($(biarchx32),yes)
+    files_go += $(gcc_lib_dir)/$(biarchx32subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+endif
+
+# ----------------------------------------------------------------------
+define __do_gccgo
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(usr_lib$(2))/libgo.so.* $(usr_lib$(2))/go
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	mkdir -p debian/$(p_l)/usr/share/lintian/overrides
+	echo '$(p_l) binary: unstripped-binary-or-object' \
+	  >> debian/$(p_l)/usr/share/lintian/overrides/$(p_l)
+
+	: # don't strip: https://gcc.gnu.org/ml/gcc-patches/2015-02/msg01722.html
+	: # dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst go$(GO_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst go$(GO_SONAME),atomic$(ATOMIC_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+do_gccgo = $(call __do_gccgo,lib$(1)go$(GO_SONAME),$(1))
+
+define install_gccgo_lib
+	mv $(d)/$(usr_lib$(3))/$(1).a debian/$(4)/$(gcc_lib_dir$(3))/
+	mv $(d)/$(usr_lib$(3))/$(1)libbegin.a debian/$(4)/$(gcc_lib_dir$(3))/
+	rm -f $(d)/$(usr_lib$(3))/$(1)*.{la,so}
+	dh_link -p$(4) \
+	  /$(usr_lib$(3))/$(1).so.$(2) /$(gcc_lib_dir$(3))/$(1).so
+endef
+
+# __do_gccgo_libgcc(flavour,package,todir,fromdir)
+define __do_gccgo_libgcc
+	$(if $(findstring gccgo,$(PKGSOURCE)),
+		: # libgcc_s.so may be a linker script on some architectures
+		set -e; \
+		if [ -h $(4)/libgcc_s.so ]; then \
+		  rm -f $(4)/libgcc_s.so; \
+		  dh_link -p$(2) /$(libgcc_dir$(1))/libgcc_s.so.$(GCC_SONAME) \
+		    $(3)/libgcc_s.so; \
+		else \
+		  mv $(4)/libgcc_s.so $(d)/$(3)/libgcc_s.so; \
+		  dh_link -p$(2) /$(libgcc_dir$(1))/libgcc_s.so.$(GCC_SONAME) \
+		    $(3)/libgcc_s.so.$(GCC_SONAME); \
+		fi; \
+		$(if $(1), dh_link -p$(2) /$(3)/libgcc_s.so \
+		    $(gcc_lib_dir)/libgcc_s_$(1).so;)
+	)
+endef
+
+define do_go_dev
+	dh_installdirs -p$(2) $(gcc_lib_dir$(1))
+	$(dh_compat2) dh_movefiles -p$(2) \
+		$(gcc_lib_dir$(1))/{libgobegin,libnetgo}.a
+	$(if $(filter yes, $(with_standalone_go)), \
+	  $(call install_gccgo_lib,libgomp,$(GOMP_SONAME),$(1),$(2)))
+	$(call install_gccgo_lib,libgo,$(GO_SONAME),$(1),$(2))
+	$(call __do_gccgo_libgcc,$(1),$(2),$(gcc_lib_dir$(1)),$(d)/$(usr_lib$(1)))
+endef
+# ----------------------------------------------------------------------
+$(binary_stamp)-libgo: $(install_stamp)
+	$(call do_gccgo,)
+
+$(binary_stamp)-lib64go: $(install_stamp)
+	$(call do_gccgo,64)
+
+$(binary_stamp)-lib32go: $(install_stamp)
+	$(call do_gccgo,32)
+
+$(binary_stamp)-libn32go: $(install_stamp)
+	$(call do_gccgo,n32)
+
+$(binary_stamp)-libx32go: $(install_stamp)
+	$(call do_gccgo,x32)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gccgo: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_go)
+	dh_installdirs -p$(p_go) $(dirs_go)
+
+	mv $(d)/$(usr_lib)/{libgobegin,libnetgo}.a \
+		$(d)/$(gcc_lib_dir)/
+	if [ -f $(d)/$(usr_lib64)/libgobegin.a ]; then \
+	    mv $(d)/$(usr_lib64)/{libgobegin,libnetgo}.a \
+		$(d)/$(gcc_lib_dir)/64/; \
+	fi
+	if [ -f $(d)/$(usr_lib32)/libgobegin.a ]; then \
+	    mv $(d)/$(usr_lib32)/{libgobegin,libnetgo}.a \
+		$(d)/$(gcc_lib_dir)/32/; \
+	fi
+	if [ -f $(d)/$(usr_libn32)/libgobegin.a ]; then \
+	    mv $(d)/$(usr_libn32)/{libgobegin,libnetgo}.a \
+		$(d)/$(gcc_lib_dir)/n32/; \
+	fi
+	if [ -f $(d)/$(usr_libx32)/libgobegin.a ]; then \
+	    mv $(d)/$(usr_libx32)/{libgobegin,libnetgo}.a \
+		$(d)/$(gcc_lib_dir)/x32/; \
+	fi
+
+	$(call do_go_dev,,$(p_go))
+
+	$(dh_compat2) dh_movefiles -p$(p_go) $(files_go)
+
+ifneq (,$(findstring gccgo,$(PKGSOURCE)))
+	rm -rf $(d_go)/$(gcc_lib_dir)/include/cilk
+	rm -rf $(d_go)/$(gcc_lib_dir)/include/openacc.h
+endif
+
+ifneq ($(DEB_CROSS),yes)
+	ln -sf gccgo$(pkg_ver) \
+	    $(d_go)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gccgo$(pkg_ver)
+	ln -sf gccgo$(pkg_ver) \
+	    $(d_go)/$(PF)/bin/$(TARGET_ALIAS)-gccgo$(pkg_ver)
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	ln -sf gccgo$(pkg_ver).1 \
+	    $(d_go)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gccgo$(pkg_ver).1
+	ln -sf gccgo$(pkg_ver).1 \
+	    $(d_go)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gccgo$(pkg_ver).1
+endif
+endif
+
+ifeq ($(with_standalone_go),yes)
+  ifneq ($(DEB_CROSS),yes)
+	for i in gcc gcov gcc-ar gcc-nm gcc-ranlib; do \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_go)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver); \
+	  ln -sf $$i$(pkg_ver) \
+	    $(d_go)/$(PF)/bin/$(TARGET_ALIAS)-$$i$(pkg_ver); \
+	done
+    ifneq ($(GFDL_INVARIANT_FREE),yes)
+	for i in gcc gcov gcc-ar gcc-nm gcc-ranlib; do \
+	  ln -sf gcc$(pkg_ver).1 \
+	    $(d_go)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-$$i$(pkg_ver).1; \
+	  ln -sf $$i$(pkg_ver).1 \
+	    $(d_go)/$(PF)/share/man/man1/$(TARGET_ALIAS)-$$i$(pkg_ver).1; \
+	done
+    endif
+  endif
+  ifeq ($(with_gomp),yes)
+	mv $(d)/$(usr_lib)/libgomp*.spec $(d_go)/$(gcc_lib_dir)/
+  endif
+  ifeq ($(with_cc1),yes)
+	rm -f $(d)/$(usr_lib)/libcc1.so
+	dh_link -p$(p_go) \
+		/$(usr_lib)/libcc1.so.$(CC1_SONAME) /$(gcc_lib_dir)/libcc1.so
+  endif
+endif
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_go)/usr/share/lintian/overrides
+	echo '$(p_go) binary: binary-without-manpage' \
+	  >> $(d_go)/usr/share/lintian/overrides/$(p_go)
+endif
+
+	debian/dh_doclink -p$(p_go) $(p_xbase)
+
+#	cp -p $(srcdir)/gcc/go/ChangeLog \
+#		$(d_go)/$(docdir)/$(p_base)/go/changelog
+	debian/dh_rmemptydirs -p$(p_go)
+
+	dh_strip -v -p$(p_go) -X/cgo -X/go$(pkg_ver) -X/gofmt$(pkg_ver) \
+	  $(if $(unstripped_exe),-X/go1)
+	dh_shlibdeps -p$(p_go)
+	echo $(p_go) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gccgo-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_go_m)
+	dh_installdirs -p$(p_go_m) $(docdir)
+
+	$(foreach flavour,$(flavours), \
+		$(call do_go_dev,$(flavour),$(p_go_m)))
+
+	debian/dh_doclink -p$(p_go_m) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_go_m)
+	dh_strip -p$(p_go_m)
+	dh_shlibdeps -p$(p_go_m)
+	echo $(p_go_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-go-doc: $(build_html_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_god)
+	dh_installdirs -p$(p_god) \
+		$(docdir)/$(p_xbase)/go \
+		$(PF)/share/info
+	$(dh_compat2) dh_movefiles -p$(p_god) \
+		$(PF)/share/info/gccgo*
+
+	debian/dh_doclink -p$(p_god) $(p_xbase)
+	dh_installdocs -p$(p_god)
+	rm -f $(d_god)/$(docdir)/$(p_xbase)/copyright
+	cp -p html/gccgo.html $(d_god)/$(docdir)/$(p_xbase)/go/
+	echo $(p_god) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-hppa64.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-hppa64.mk
@@ -0,0 +1,32 @@
+arch_binaries  := $(arch_binaries) hppa64
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-hppa64: $(install_hppa64_stamp)
+	dh_testdir
+	dh_testroot
+
+#	dh_installdirs -p$(p_hppa64)
+
+	rm -f $(d_hppa64)/usr/lib/libiberty.a
+	-find $(d_hppa64) ! -type d
+
+	: # provide as and ld links
+	dh_link -p $(p_hppa64) \
+		/usr/bin/hppa64-linux-gnu-as \
+		/$(hppa64libexecdir)/gcc/hppa64-linux-gnu/$(versiondir)/as \
+		/usr/bin/hppa64-linux-gnu-ld \
+		/$(hppa64libexecdir)/gcc/hppa64-linux-gnu/$(versiondir)/ld
+
+	debian/dh_doclink -p$(p_hppa64) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_hppa64)
+
+	dh_strip -p$(p_hppa64) -X.o -Xlibgcc.a -Xlibgcov.a
+	dh_shlibdeps -p$(p_hppa64)
+
+	mkdir -p $(d_hppa64)/usr/share/lintian/overrides
+	cp -p debian/$(p_hppa64).overrides \
+		$(d_hppa64)/usr/share/lintian/overrides/$(p_hppa64)
+
+	echo $(p_hppa64) >> debian/arch_binaries
+
+	touch $@
--- gcc-5-5.4.0.orig/debian/rules.d/binary-java.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-java.mk
@@ -0,0 +1,724 @@
+ifeq ($(with_gcj_base_only),yes)
+  arch_binaries  := $(arch_binaries) jbase
+else
+ifeq ($(with_separate_libgcj),yes)
+  ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+    arch_binaries  := $(arch_binaries) jbase
+  endif
+endif
+
+ifeq ($(with_libgcj),yes)
+  ifeq ($(with_java),yes)
+    arch_binaries  := $(arch_binaries) java gcjjre
+    indep_binaries  := $(indep_binaries) libgcjjar
+  endif
+
+  ifeq ($(with_javadev),yes)
+    arch_binaries  := $(arch_binaries) gcjjdk libgcjdev libgcjdbg
+    ifneq ($(DEB_CROSS),yes)
+      indep_binaries := $(indep_binaries) libgcjsrc
+      ifeq ($(with_libgcj_doc),yes)
+        indep_binaries := $(indep_binaries) libgcjdoc
+      endif
+    endif
+  endif
+endif
+
+ifeq ($(with_gcj),yes)
+    arch_binaries  := $(arch_binaries) gcj
+endif
+endif
+
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+  p_jbase = gcj$(pkg_ver)-base
+  ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),no-no)
+    p_jbase = gcc$(pkg_ver)-base
+  endif
+else
+  p_jbase = gcj$(pkg_ver)$(cross_bin_arch)-base
+  ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),no-no)
+    p_jbase = gcc$(pkg_ver)$(cross_bin_arch)-base
+  endif
+endif
+
+p_gcj	= gcj$(pkg_ver)$(cross_bin_arch)
+p_jdk	= gcj$(pkg_ver)-jdk$(cross_bin_arch)
+p_jrehl	= gcj$(pkg_ver)-jre-headless$(cross_bin_arch)
+p_jre	= gcj$(pkg_ver)-jre$(cross_bin_arch)
+p_jar	= gcj$(pkg_ver)-jre-lib$(cross_bin_arch)
+p_jsrc	= gcj$(pkg_ver)-source
+p_jlib	= libgcj$(PKG_LIBGCJ_EXT)$(cross_lib_arch)
+p_jdbg	= libgcj$(PKG_GCJ_EXT)-dbg$(cross_lib_arch)
+p_jlibx	= libgcj$(PKG_LIBGCJ_EXT)-awt$(cross_lib_arch)
+p_jgtk	= libgcj$(PKG_GCJ_EXT)-awt-gtk$(cross_lib_arch)
+p_jqt	= libgcj$(PKG_GCJ_EXT)-awt-qt$(cross_lib_arch)
+p_jdev	= libgcj$(PKG_GCJ_EXT)-dev$(cross_lib_arch)
+p_jdoc	= libgcj-doc
+
+d_jbase	= debian/$(p_jbase)
+d_gcj	= debian/$(p_gcj)
+d_jdk	= debian/$(p_jdk)
+d_jrehl	= debian/$(p_jrehl)
+d_jar	= debian/$(p_jar)
+d_jsrc	= debian/$(p_jsrc)
+d_jlib	= debian/$(p_jlib)
+d_jdbg	= debian/$(p_jdbg)
+d_jlibx	= debian/$(p_jlibx)
+d_jgtk	= debian/$(p_jgtk)
+d_jqt	= debian/$(p_jqt)
+d_jdev	= debian/$(p_jdev)
+d_jdoc	= debian/$(p_jdoc)
+d_jre	= debian/$(p_jre)
+
+GCJ_BASE_VERSION = $(BASE_VERSION)
+
+gcj_vlibdir	= $(PF)/$(libdir)/gcj-$(BASE_VERSION)-$(GCJ_SONAME)
+
+jre_tools = java keytool orbd rmid rmiregistry tnameserv
+jdk_tools = appletviewer jar jarsigner javac javadoc javah native2ascii rmic serialver
+
+dirs_gcj = \
+	$(docdir)/$(p_jbase) \
+	$(PF)/bin \
+	$(PF)/share/man/man1 \
+	$(gcc_lexec_dir)
+
+files_gcj = \
+	$(PF)/bin/$(cmd_prefix)gcj$(pkg_ver) \
+	$(gcc_lexec_dir)/{ecj1,jc1,jvgenmain}
+
+# FIXME: this really should be included, or else the cross compiler
+# can only be used to build libjava itself.
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+  files_gcj += \
+	$(PF)/$(libdir)/libgcj.spec
+endif
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_gcj += \
+	$(PF)/share/man/man1/$(cmd_prefix)gcj$(pkg_ver).1
+endif
+
+dirs_jdk = \
+	$(docdir)/$(p_jbase) \
+	$(PF)/bin \
+	$(PF)/share/man/man1 \
+	$(PF)/share/info \
+	$(gcc_lexec_dir) \
+	$(jvm_dir)/bin
+
+files_jdk = \
+	$(PF)/bin/{gappletviewer,gjdoc,gc-analyze,gjar,gjarsigner,gcjh,gjavah,gnative2ascii,grmic,gserialver,jv-convert,jcf-dump}$(pkg_ver) \
+	$(PF)/share/man/man1/{gappletviewer,gjdoc,gjar,gjarsigner,gcjh,gjavah,gnative2ascii,gserialver}$(pkg_ver).1 \
+	$(gcc_lib_dir)/include/{jni.h,jni_md.h,jvmpi.h} \
+	$(gcc_lib_dir)/include/{jawt.h,jawt_md.h} \
+	$(gcc_lib_dir)/include/gcj/libgcj-config.h \
+	$(PF)/$(libdir)/lib{gij,gcj,gcj-tools}.so \
+	$(jvm_dir)/include \
+	$(jvm_dir)/bin/{appletviewer,jar,jarsigner,javadoc,javah,native2ascii,rmic,serialver} \
+	$(PF)/lib/jvm-exports
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_jdk += \
+	$(PF)/share/info/gcj* \
+	$(PF)/share/man/man1/{gc-analyze,grmic,jv-convert,jcf-dump}$(pkg_ver).1
+endif
+
+dirs_jrehl = \
+	$(docdir)/$(p_jbase) \
+	$(PF)/bin \
+	$(PF)/share/man/man1 \
+	$(jvm_dir)/bin \
+	$(jvm_dir)/jre/lib \
+	$(jvm_dir)/lib \
+	var/lib/gcj$(pkg_ver)
+
+files_jrehl = \
+	$(PF)/bin/{gij,gcj-dbtool,gorbd,grmid,grmiregistry,gkeytool,gtnameserv}$(pkg_ver) \
+	$(PF)/share/man/man1/{gorbd,grmid,grmiregistry,gkeytool,gtnameserv}$(pkg_ver).1 \
+	$(jvm_dir)/jre/bin \
+	$(jvm_dir)/bin/{java,keytool,orbd,rmid,rmiregistry,tnameserv} \
+	$(jvm_dir)/jre/lib/rt.jar \
+	$(jvm_dir)/jre/lib/$(java_cpu)/{client,server} \
+	$(jvm_dir)/lib/tools.jar
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  files_jrehl += \
+	$(PF)/share/man/man1/{gij,gcj-dbtool}$(pkg_ver).1
+endif
+
+dirs_jre = \
+	$(docdir)/$(p_jbase) \
+	$(jvm_dir)/jre/lib/$(java_cpu)
+
+files_jre = \
+	$(jvm_dir)/jre/lib/$(java_cpu)/libjawt.so
+
+dirs_jlib = \
+	$(docdir)/$(p_jbase) \
+	$(gcj_vlibdir) \
+	$(PF)/$(libdir) \
+	$(jvm_dir)/jre/lib
+
+files_jlib = \
+	$(PF)/$(libdir)/libgij.so.* \
+	$(PF)/$(libdir)/libgcj-tools.so.* \
+	$(PF)/$(libdir)/libgcj.so.* \
+	$(gcj_vlibdir)/libjvm.so \
+	$(gcj_vlibdir)/libjavamath.so \
+	$(jvm_dir)/jre/lib/security
+
+#	$(gcj_vlibdir)/libgconfpeer.so
+
+ifeq ($(with_java_alsa),yes)
+  files_jlib += \
+	$(gcj_vlibdir)/libgjsmalsa.so
+endif
+
+dirs_jar = \
+	$(PF)/share/java
+
+files_jar = \
+	$(PF)/share/java/libgcj-$(BASE_VERSION).jar \
+	$(PF)/share/java/libgcj-tools-$(BASE_VERSION).jar
+
+dirs_jlibx = \
+	$(PF)/$(libdir) \
+	$(gcj_vlibdir) \
+	$(PF)/share/java
+
+files_jlibx = \
+	$(gcj_vlibdir)/libjawt.so \
+	$(gcj_vlibdir)/libgtkpeer.so
+
+#files_jgtk = \
+#	$(gcj_vlibdir)/libgtkpeer.so
+#files_jqt = \
+#	$(gcj_vlibdir)/libqtpeer.so
+
+dirs_jdev = \
+	$(PF)/{include,lib} \
+	$(jvm_dir)/include
+
+files_jdev = \
+	$(PF)/include/c++/$(BASE_VERSION)/{org,gcj,java,javax} \
+	$(PF)/include/c++/$(BASE_VERSION)/gnu/{awt,classpath,gcj,java,javax} \
+	$(PF)/$(libdir)/pkgconfig/libgcj-$(BASE_VERSION).pc \
+	$(gcj_vlibdir)/lib*peer.so
+
+ifeq ($(with_static_java),yes)
+  files_jdev += \
+	$(PF)/$(libdir)/libgij.a \
+	$(PF)/$(libdir)/libgcj.a \
+	$(PF)/$(libdir)/libgcj-tools.a
+endif
+
+ifeq (,$(p_l64gcc))
+  p_l64gcc = lib64gcc$(GCC_SONAME)
+  d_l64gcc = debian/$(p_l64gcc)
+endif
+
+ifeq ($(with_standalone_gcj),yes)
+
+  dirs_gcj += \
+	$(gcc_lib_dir)/include \
+	$(PF)/share/man/man1
+
+# XXX: what about triarch mapping?
+  files_gcj += \
+	$(PF)/bin/{cpp,gcc,gcov}$(pkg_ver) \
+	$(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \
+	$(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} \
+	$(gcc_lib_dir)/{libgcc*,libgcov.a,*.o} \
+	$(header_files) \
+	$(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \
+		&& echo $(gcc_lib_dir)/SYSCALLS.c.X)
+
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+    files_gcj += \
+	$(PF)/share/man/man1/{cpp,gcc,gcov}$(pkg_ver).1
+  endif
+
+  ifeq ($(biarch64),yes)
+    files_gcj += $(gcc_lib_dir)/$(biarch64subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+  ifeq ($(biarch32),yes)
+    files_gcj += $(gcc_lib_dir)/$(biarch32subdir)/{libgcc*,*.o}
+  endif
+  ifeq ($(biarchn32),yes)
+    files_gcj += $(gcc_lib_dir)/$(biarchn32subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+  ifeq ($(biarchx32),yes)
+    files_gcj += $(gcc_lib_dir)/$(biarchx32subdir)/{libgcc*,libgcov.a,*.o}
+  endif
+endif
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-jbase: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d_jbase)
+	dh_installdirs -p$(p_jbase)
+	dh_installdocs -p$(p_jbase)
+	dh_installchangelogs -p$(p_jbase)
+	dh_compress -p$(p_jbase)
+	dh_fixperms -p$(p_jbase)
+	dh_gencontrol -p$(p_jbase) -- -v$(DEB_VERSION) $(common_substvars)
+	dh_installdeb -p$(p_jbase)
+	dh_md5sums -p$(p_jbase)
+	dh_builddeb -p$(p_jbase)
+	touch $@
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcj: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_gcj)
+	dh_installdirs -p$(p_gcj)  $(dirs_gcj)
+
+ifeq ($(DEB_CROSS),yes)
+	ln -sf ../../../gcc/$(DEB_HOST_GNU_TYPE)/$(BASE_VERSION)/ecj1 \
+		$(d)/$(gcc_lib_dir)/ecj1
+endif
+	$(dh_compat2) dh_movefiles -p$(p_gcj)  $(files_gcj)
+ifneq (,$(filter $(build_type), build-native cross-build-native))
+	mv $(d_gcj)/$(PF)/$(libdir)/libgcj.spec $(d_gcj)/$(gcc_lib_dir)/
+endif
+
+ifneq (,$(filter $(DEB_HOST_ARCH), arm armel))
+	ln -sf ../../ecj1 $(d_gcj)/$(gcc_lexec_dir)/ecj1
+endif
+ifneq ($(DEB_CROSS),yes)
+	ln -sf gcj$(pkg_ver) \
+	    $(d_gcj)/$(PF)/bin/$(TARGET_ALIAS)-gcj$(pkg_ver)
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+	ln -sf gcj$(pkg_ver).1 \
+	    $(d_gcj)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gcj$(pkg_ver).1
+  endif
+endif
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_gcj)/usr/share/lintian/overrides
+	echo '$(p_gcj) binary: binary-without-manpage' \
+	  >> $(d_gcj)/usr/share/lintian/overrides/$(p_gcj)
+endif
+
+	debian/dh_doclink -p$(p_gcj) $(p_jbase)
+	debian/dh_rmemptydirs -p$(p_gcj)
+
+	dh_strip -p$(p_gcj) \
+	  $(if $(unstripped_exe),-X/jc1)
+	dh_shlibdeps -p$(p_gcj) -Xecj1
+	echo $(p_gcj) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libgcjjar: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	dh_installdirs -p$(p_jar) $(dirs_jar)
+	$(dh_compat2) dh_movefiles -p$(p_jar) $(files_jar)
+
+	ln -sf libgcj-$(BASE_VERSION).jar \
+		$(d_jar)/$(PF)/share/java/libgcj-$(GCC_VERSION).jar
+	ln -sf libgcj-tools-$(BASE_VERSION).jar \
+		$(d_jar)/$(PF)/share/java/libgcj-tools-$(GCC_VERSION).jar
+	debian/dh_doclink -p$(p_jar) $(p_jbase)
+	debian/dh_rmemptydirs -p$(p_jar)
+	echo $(p_jar) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(build_javasrc_stamp): $(build_stamp)
+	PATH=$(CURDIR)/bin:$$PATH \
+	  $(MAKE) -C $(buildlibdir)/libjava src.zip
+	touch $@
+
+$(binary_stamp)-libgcjsrc: $(install_stamp) $(build_javasrc_stamp)
+	dh_testdir
+	dh_testroot
+
+	dh_installdirs -p$(p_jsrc) $(PF)/share/java $(jvm_dir)
+	cp -p $(buildlibdir)/libjava/src.zip \
+	   $(d_jsrc)/$(PF)/share/java/libgcj-src-$(BASE_VERSION).zip
+	dh_link -p$(p_jsrc) \
+		$(PF)/share/java/libgcj-src-$(BASE_VERSION).zip \
+		$(jvm_dir)/src.zip
+	debian/dh_doclink -p$(p_jsrc) $(p_jbase)
+	debian/dh_rmemptydirs -p$(p_jsrc)
+	echo $(p_jsrc) >> debian/indep_binaries
+
+	touch $@
+
+# ----------------------------------------------------------------------
+libgcj_version = $$($(builddir)/gcc/xgcc -B$(builddir)/gcc/ --version \
+			 | sed -n '/^xgcc/s/[^)]*) *\(.*\)/\1/p' | sed 's/ \[[^[]*$$//')
+libgcj_title = LibGCJ Classpath
+libgcjhbox_href = http://gcc.gnu.org/java
+libgcjhbox = <span class='logo'><a href='$(libgcjhbox_href)' target='_top'>$(title)</a> ($(libgcj_version))
+
+$(build_javadoc_stamp): $(build_stamp) $(build_javasrc_stamp)
+	mkdir -p $(builddir)/java-src
+	cd $(builddir)/java-src && fastjar -xf $(buildlibdir)/libjava/src.zip
+
+	mkdir -p $(builddir)/html
+	$(buildlibdir)/libjava/gjdoc \
+	    -licensetext \
+	    -use \
+	    -sourcepath "$(builddir)/java-src" \
+	    -encoding UTF-8 \
+	    -breakiterator \
+	    -linksource \
+	    -splitindex \
+	    -d $(builddir)/html \
+	    -doctitle "$(libgcj_title) $(libgcj_version)" \
+	    -windowtitle "$(libgcj_title) $(libgcj_version) Documentation" \
+	    -header "$(classpathbox)" \
+	    -footer "$(classpathbox)" \
+	    -subpackages gnu:java:javax:org
+
+	touch $@
+
+$(binary_stamp)-libgcjdoc: $(install_stamp) $(build_javadoc_stamp)
+	dh_testdir
+	dh_testroot
+
+	dh_installdocs -p$(p_jdoc)
+	sed -i 's/gcc$(pkg_ver)-base/$(p_jbase)/' $(d_jdoc)/usr/share/doc-base/libgcj-doc
+	dh_installchangelogs -p$(p_jdoc)
+	mkdir -p $(d_jdoc)/usr/share/doc/$(p_jbase)
+	cp -al $(builddir)/html $(d_jdoc)/usr/share/doc/$(p_jbase)/api
+	ln -sf api $(d_jdoc)/usr/share/doc/$(p_jbase)/html
+	ln -sf ../$(p_jbase)/api $(d_jdoc)/usr/share/doc/$(p_jdoc)/api
+	ln -sf ../$(p_jbase)/html $(d_jdoc)/usr/share/doc/$(p_jdoc)/html
+	echo $(p_jdoc) >> debian/indep_binaries
+
+	touch $@
+
+# ----------------------------------------------------------------------
+
+#peer_pkgs =
+#ifneq (,$(findstring gtk, $(java_awt_peers)))
+#  peer_pkgs += -p$(p_jgtk)
+#endif
+#ifneq (,$(findstring qt, $(java_awt_peers)))
+#  peer_pkgs += -p$(p_jqt)
+#endif
+
+$(binary_stamp)-java: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	dh_installdirs -p$(p_jrehl)   $(dirs_jrehl)
+	dh_installdirs -p$(p_jlib)  $(dirs_jlib)
+	dh_installdirs -p$(p_jlibx) $(dirs_jlibx)
+
+	$(dh_compat2) dh_movefiles -p$(p_jrehl)   $(files_jrehl)
+	$(dh_compat2) dh_movefiles -p$(p_jlib)  $(files_jlib)
+	$(dh_compat2) dh_movefiles -p$(p_jlibx) $(files_jlibx)
+#ifneq (,$(findstring gtk, $(java_awt_peers)))
+#	$(dh_compat2) dh_movefiles -p$(p_jgtk) $(files_jgtk)
+#endif
+#ifneq (,$(findstring qt, $(java_awt_peers)))
+#	$(dh_compat2) dh_movefiles -p$(p_jqt) $(files_jqt)
+#endif
+
+	dh_link -p$(p_jrehl) \
+	  $(jvm_dir) $(PF)/lib/jvm/java-gcj$(pkg_ver) \
+	  $(PF)/bin/gij$(pkg_ver) $(jvm_dir)/bin/gij \
+	  $(PF)/bin/gij$(pkg_ver) $(jvm_dir)/jre/bin/gij \
+	  $(PF)/bin/gcj-dbtool$(pkg_ver) $(jvm_dir)/bin/gcj-dbtool \
+	  $(PF)/bin/gcj-dbtool$(pkg_ver) $(jvm_dir)/jre/bin/gcj-dbtool \
+	  $(PF)/share/man/man1/gkeytool$(pkg_ver).1 $(jvm_dir)/man/man1/keytool.1 \
+	  $(PF)/share/man/man1/gorbd$(pkg_ver).1 $(jvm_dir)/man/man1/orbd.1 \
+	  $(PF)/share/man/man1/grmid$(pkg_ver).1 $(jvm_dir)/man/man1/rmid.1 \
+	  $(PF)/share/man/man1/grmiregistry$(pkg_ver).1 $(jvm_dir)/man/man1/rmiregistry.1 \
+	  $(PF)/share/man/man1/gtnameserv$(pkg_ver).1 $(jvm_dir)/man/man1/tnameserv.1 \
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	dh_link -p$(p_jrehl) \
+	  $(PF)/share/man/man1/gij$(pkg_ver).1 $(jvm_dir)/man/man1/java.1 \
+	  $(PF)/share/man/man1/grmic$(pkg_ver).1 $(jvm_dir)/man/man1/rmiregistry.1
+endif
+
+ifneq ($(DEB_TARGET_ARCH_CPU),$(java_cpu))
+	ln -sf $(java_cpu) $(d_jlib)/$(jvm_dir)/jre/lib/$(DEB_TARGET_ARCH_CPU)
+endif
+
+	dh_link -p$(p_jlib) \
+	  /etc/java/cacerts-gcj /$(jvm_dir)/jre/lib/cacerts \
+	  $(foreach i, jvm javamath, \
+		/$(gcj_vlibdir)/lib$(i).so /$(jvm_dir)/lib/lib$(i).so)
+
+	dh_link -p$(p_jlib) \
+	  /etc/java/security/classpath.security \
+	  /$(jvm_dir)/jre/lib/security/java.security
+
+	dh_link -p$(p_jlibx) \
+	  $(foreach i, jawt, $(gcj_vlibdir)/lib$(i).so $(jvm_dir)/lib/lib$(i).so)
+
+ifeq ($(DEB_HOST_ARCH),hppa)
+	mv $(d_jrehl)/$(PF)/bin/gij$(pkg_ver) \
+		$(d_jrehl)/$(PF)/bin/gij$(pkg_ver).bin
+	install -m755 debian/gij-hppa $(d_jrehl)/$(PF)/bin/gij$(pkg_ver)
+endif
+
+	ln -s ../libgcj.so.$(GCJ_SONAME) \
+		$(d_jlib)/$(gcj_vlibdir)/libgcj_bc.so.1
+
+	: # provide .jinfo file
+	( \
+	  echo 'name=$(jvm_name_short)'; \
+	  echo 'alias=java-gcj$(pkg_ver)'; \
+	  echo 'priority=$(priority)'; \
+	  echo 'section=main'; \
+	  echo ''; \
+	  for i in $(jre_tools); do \
+	    echo "jre $$i /$(jvm_dir)/jre/bin/$$i"; \
+	  done; \
+	  for i in $(jdk_tools); do \
+	    echo "jdk $$i /$(jvm_dir)/bin/$$i"; \
+	  done; \
+	) > $(d_jrehl)/usr/lib/jvm/.java-gcj$(pkg_ver).jinfo
+
+ifneq (,$(findstring gcj,$(p_jbase)))
+	cp -p $(srcdir)/libjava/{NEWS,README,THANKS} \
+		$(d_jrehl)/usr/share/doc/$(p_jbase)/
+endif
+	debian/dh_doclink -p$(p_jrehl) $(p_jbase)
+	debian/dh_doclink -p$(p_jlib)  $(p_jbase)
+	debian/dh_doclink -p$(p_jlibx) $(p_jbase)
+
+#ifneq (,$(findstring gtk, $(java_awt_peers)))
+#	debian/dh_doclink -p$(p_jgtk) $(p_jbase)
+#endif
+#ifneq (,$(findstring qt, $(java_awt_peers)))
+#	debian/dh_doclink -p$(p_jqt) $(p_jbase)
+#endif
+
+ifeq ($(with_separate_libgcj),yes)
+  ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+    ifeq ($(with_check),yes)
+	cp -p test-summary $(d_jrehl)/usr/share/doc/$(p_jbase)/test-summary
+    endif
+  endif
+endif
+	debian/dh_rmemptydirs -p$(p_jrehl)
+	debian/dh_rmemptydirs -p$(p_jlib)
+	debian/dh_rmemptydirs -p$(p_jlibx)
+
+	mkdir -p $(d_jrehl)/var/lib/gcj$(pkg_ver)
+
+	dh_makeshlibs $(ldconfig_arg) -p$(p_jlib) -V '$(p_jlib) (>= $(DEB_GCJ_SOVERSION))'
+	echo "libgcj_bc 1 libgcj-bc (>= 4.2.2-1)" >> debian/$(p_jlib)/DEBIAN/shlibs
+	cat debian/$(p_jlib)/DEBIAN/shlibs >> debian/shlibs.local
+
+	dh_makeshlibs $(ldconfig_arg) -p$(p_jlibx) -V '$(p_jlibx) (>= $(DEB_GCJ_SOVERSION))'
+
+#ifneq (,$(findstring gtk, $(java_awt_peers)))
+#	dh_makeshlibs $(ldconfig_arg) -p$(p_jgtk) -V '$(p_jgtk) (>= $(DEB_GCJ_SOVERSION))'
+#endif
+#ifneq (,$(findstring qt, $(java_awt_peers)))
+#	dh_makeshlibs $(ldconfig_arg) -p$(p_jqt) -V '$(p_jqt) (>= $(DEB_GCJ_SOVERSION))'
+#endif
+
+	dh_strip -X/bin/ --dbg-package=$(p_jdbg) \
+		-p$(p_jrehl) -p$(p_jlib) -p$(p_jlibx) $(peer_pkgs)
+	rm -f $(d_jdbg)/$(gcc_lib_dir)/libgcj_bc.so
+
+	mkdir -p $(d_jlib)/usr/share/lintian/overrides
+	cp -p debian/$(p_jlib).overrides \
+		$(d_jlib)/usr/share/lintian/overrides/$(p_jlib)
+	mkdir -p $(d_jlibx)/usr/share/lintian/overrides
+	cp -p debian/$(p_jlibx).overrides \
+		$(d_jlibx)/usr/share/lintian/overrides/$(p_jlibx)
+	mkdir -p $(d_jrehl)/usr/share/lintian/overrides
+	cp -p debian/$(p_jrehl).overrides \
+		$(d_jrehl)/usr/share/lintian/overrides/$(p_jrehl)
+
+# the libstdc++ binary packages aren't built yet ...
+	echo 'libstdc++ $(CXX_SONAME) libstdc++$(CXX_SONAME) (>= $(DEB_STDCXX_SOVERSION))' \
+	    >> debian/shlibs.local
+	-[ -d $(d_l64gcc) ] && mv $(d_l64gcc) $(d_l64gcc).saved
+ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),yes-no)
+	dh_shlibdeps \
+		-L$(p_jlib) \
+		-l$(d_lib)/$(PF)/$(libdir):$(d_jlib)/$(PF)/$(libdir) \
+		-p$(p_jrehl) -p$(p_jlib) -p$(p_jlibx) $(peer_pkgs)
+else
+	dh_shlibdeps \
+		-L$(p_lgcc) \
+		-L$(p_jlib) \
+		-l:$(d)/$(PF)/$(libdir):$(d_lib)/$(PF)/$(libdir):$(d_jlib)/$(PF)/$(libdir):$(d_lgcc)/lib \
+		-p$(p_jrehl) -p$(p_jlib) -p$(p_jlibx) $(peer_pkgs)
+endif
+	-[ -d $(d_l64gcc).saved ] && mv $(d_l64gcc).saved $(d_l64gcc)
+	sed -e 's/$(p_jlib)[^,]*//' -e 's/, *,/,/' debian/$(p_jlib).substvars \
+		>> debian/$(p_jlib).substvars.tmp \
+	    && mv -f debian/$(p_jlib).substvars.tmp debian/$(p_jlib).substvars
+	rm -f debian/shlibs.local
+
+	echo $(p_jrehl) $(p_jlib) $(p_jlibx) $(subst -p,,$(peer_pkgs)) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcjjdk: $(build_html_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_jdk)
+	dh_installdirs -p$(p_jdk)  $(dirs_jdk)
+
+#	mkdir -p $(d_jdk)/usr/share/lintian/overrides
+#	cp -p debian/$(p_jdk).overrides \
+#		$(d_jdk)/usr/share/lintian/overrides/$(p_jdk)
+	cp -p $(srcdir)/gcc/java/ChangeLog \
+		$(d_jdk)/usr/share/doc/$(p_jbase)/changelog.gcj
+	cp -p $(srcdir)/libjava/ChangeLog \
+		$(d_jdk)/usr/share/doc/$(p_jbase)/changelog.libjava
+
+ifeq ($(with_standalone_gcj),yes)
+	rm -f $(d)/$(PF)/$(libdir)/libgcc_s.so
+	ln -sf /$(libdir)/libgcc_s.so.$(GCC_SONAME) $(d)/$(gcc_lib_dir)/libgcc_s.so
+endif
+	$(dh_compat2) dh_movefiles -p$(p_jdk)  $(files_jdk)
+
+	for i in libgij libgcj libgcj-tools; do \
+	  dh_link -p$(p_jdk) \
+	    /$(PF)/$(libdir)/$$i.so.$(GCJ_SONAME) /$(gcc_lib_dir)/$$i.so \
+	    /$(PF)/$(libdir)/$$i.so.$(GCJ_SONAME) /$(jvm_dir)/lib/$$i.so; \
+	  rm -f $(d_jdk)/$(PF)/$(libdir)/$$i.{la,so}; \
+	done
+
+	install -m755 debian/jdb.sh $(d_jdk)/$(jvm_dir)/bin/jdb
+
+	install -m 755 $(d)/$(PF)/$(libdir)/libgcj_bc.so.1 \
+		$(d_jdk)/$(gcc_lib_dir)/libgcj_bc.so
+	$(CC_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -shared -fpic -xc /dev/null \
+		-o build/libgcj.so -Wl,-soname,libgcj.so.$(GCJ_SONAME) -nostdlib
+	$(CC_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -shared -fpic \
+		$(srcdir)/libjava/libgcj_bc.c \
+		-o $(d_jdk)/$(gcc_lib_dir)/libgcj_bc.so \
+		-Wl,-soname,libgcj_bc.so.1 $(builddir)/libgcj.so -shared-libgcc 
+
+	dh_link -p$(p_jdk) \
+	  $(gcc_lib_dir)/include/gcj $(jvm_dir)/include/gcj \
+	  usr/bin/ecj $(jvm_dir)/bin/javac \
+	  usr/bin/fastjar $(jvm_dir)/bin/jar \
+	  $(PF)/share/man/man1/ecj.1.gz $(jvm_dir)/man/man1/javac.1.gz \
+	  $(PF)/share/man/man1/fastjar.1.gz $(jvm_dir)/man/man1/jar.1.gz
+
+	dh_link -p$(p_jdk) \
+	  $(PF)/bin/gcj$(pkg_ver) $(jvm_dir)/bin/gcj \
+	  $(PF)/share/man/man1/gjarsigner$(pkg_ver).1 $(jvm_dir)/man/man1/jarsigner.1 \
+	  $(PF)/share/man/man1/gjdoc$(pkg_ver).1 $(jvm_dir)/man/man1/javadoc.1 \
+	  $(PF)/share/man/man1/gjavah$(pkg_ver).1 $(jvm_dir)/man/man1/javah.1 \
+	  $(PF)/share/man/man1/gserialver$(pkg_ver).1 $(jvm_dir)/man/man1/serialver.1 \
+	  $(PF)/share/man/man1/gappletviewer$(pkg_ver).1 $(jvm_dir)/man/man1/appletviewer.1
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+	cp -p html/gcj.html $(d_jdk)/$(docdir)/$(p_jbase)/
+endif
+	debian/dh_doclink -p$(p_jdk) $(p_jbase)
+
+	cp -p debian/FAQ.gcj $(d_jdk)/$(docdir)/$(p_jbase)/
+
+	cp -p debian/gcj-wrapper$(pkg_ver) $(d_jdk)/$(PF)/bin/
+	chmod 755 $(d_jdk)/$(PF)/bin/gcj-wrapper$(pkg_ver)
+	cp -p debian/gcj-wrapper$(pkg_ver).1 $(d_jdk)/$(PF)/share/man/man1/
+
+	debian/dh_rmemptydirs -p$(p_jdk)
+
+	dh_strip -p$(p_jdk)
+	dh_shlibdeps -p$(p_jdk) -l$(d_lib)/$(PF)/$(libdir):$(d_jlib)/$(PF)/lib -Xecj1
+	echo $(p_jdk) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libgcjdev: $(build_html_stamp) $(install_stamp) $(binary_stamp)-java
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	dh_installdirs -p$(p_jdev) $(dirs_jdev)
+
+	$(dh_compat2) dh_movefiles -p$(p_jdev) $(files_jdev)
+
+ifeq ($(with_static_java),yes)
+	for i in libgij libgcj libgcj-tools; do \
+	  mv $(d_jdev)/$(PF)/$(libdir)/$$i.a $(d_jdev)/$(gcc_lib_dir)/; \
+	done
+endif
+
+	ln -sf libgcj-$(BASE_VERSION).pc \
+		$(d_jdev)/$(PF)/$(libdir)/pkgconfig/libgcj$(PKG_GCJ_EXT).pc
+	sed -i -e 's,-[IL][^ ]* *,,' \
+		$(d_jdev)/$(PF)/$(libdir)/pkgconfig/libgcj-$(BASE_VERSION).pc
+
+	debian/dh_doclink -p$(p_jdev) $(p_jbase)
+
+	debian/dh_rmemptydirs -p$(p_jdev)
+
+#	mkdir -p $(d_jdev)/usr/share/lintian/overrides
+#	cp -p debian/libgcj$(PKG_GCJ_EXT)-dev.overrides \
+#		$(d_jdev)/usr/share/lintian/overrides/$(p_jdev)
+
+	DH_COMPAT=5 dh_strip -p$(p_jdev) --dbg-package=$(p_jdbg)
+ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),yes-no)
+	dh_shlibdeps \
+		-l$(d_lib)/$(PF)/$(libdir):$(d_jlib)/$(PF)/$(libdir) \
+		-p$(p_jdev)
+else
+	dh_shlibdeps \
+		-L$(p_lgcc) \
+		-l:$(d)/$(PF)/$(libdir):$(d_lib)/$(PF)/$(libdir):$(d_jlib)/$(PF)/$(libdir):$(d_lgcc)/lib \
+		-p$(p_jdev)
+endif
+	echo $(p_jdev) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libgcjdbg: $(install_stamp) $(binary_stamp)-java $(binary_stamp)-libgcjdev $(binary_stamp)-gcjjre
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	debian/dh_doclink -p$(p_jdbg) $(p_jbase)
+
+	for i in libgij libgcj libgcj-tools; do \
+	  if [ -f $(d_jdbg)/usr/lib/debug/usr/lib/$$i.so.$(GCJ_SONAME).0.0 ]; then \
+	    ln -sf $$i.so.$(GCJ_SONAME).0.0 \
+	      $(d_jdbg)/usr/lib/debug/usr/lib/$$i.so.$(GCJ_SONAME); \
+	  fi; \
+	done
+#	ln -sf libgconfpeer.so.0.0.0 \
+#	  $(d_jdbg)/usr/lib/debug/$(gcj_vlibdir)/libgconfpeer.so.0
+	echo $(p_jdbg) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-gcjjre: $(install_stamp) $(binary_stamp)-java
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	dh_installdirs -p$(p_jre) $(dirs_jre)
+	$(dh_compat2) dh_movefiles -p$(p_jre)   $(files_jre)
+
+	debian/dh_doclink -p$(p_jre) $(p_jbase)
+	DH_COMPAT=5 dh_strip -p$(p_jre) --dbg-package=$(p_jdbg)
+	echo $(p_jre) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libasan.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libasan.mk
@@ -0,0 +1,76 @@
+$(lib_binaries)  += libasan
+ifeq ($(with_lib64asan),yes)
+  $(lib_binaries)  += lib64asan
+endif
+ifeq ($(with_lib32asan),yes)
+  $(lib_binaries)	+= lib32asan
+endif
+ifeq ($(with_libn32asan),yes)
+  $(lib_binaries)	+= libn32asan
+endif
+ifeq ($(with_libx32asan),yes)
+  $(lib_binaries)	+= libx32asan
+endif
+ifeq ($(with_libhfasan),yes)
+  $(lib_binaries)	+= libhfasan
+endif
+ifeq ($(with_libsfasan),yes)
+  $(lib_binaries)	+= libsfasan
+endif
+
+define __do_asan
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libasan.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst asan$(ASAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst asan$(ASAN_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_asan = $(call __do_asan,lib$(1)asan$(ASAN_SONAME),$(1))
+
+$(binary_stamp)-libasan: $(install_stamp)
+	$(call do_asan,)
+
+$(binary_stamp)-lib64asan: $(install_stamp)
+	$(call do_asan,64)
+
+$(binary_stamp)-lib32asan: $(install_stamp)
+	$(call do_asan,32)
+
+$(binary_stamp)-libn32asan: $(install_stamp)
+	$(call do_asan,n32)
+
+$(binary_stamp)-libx32asan: $(install_stamp)
+	$(call do_asan,x32)
+
+$(binary_stamp)-libhfasan: $(install_dependencies)
+	$(call do_asan,hf)
+
+$(binary_stamp)-libsfasan: $(install_dependencies)
+	$(call do_asan,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libatomic.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libatomic.mk
@@ -0,0 +1,68 @@
+$(lib_binaries)  += libatomic
+ifeq ($(with_lib64atomic),yes)
+  $(lib_binaries)  += lib64atomic
+endif
+ifeq ($(with_lib32atomic),yes)
+  $(lib_binaries)	+= lib32atomic
+endif
+ifeq ($(with_libn32atomic),yes)
+  $(lib_binaries)	+= libn32atomic
+endif
+ifeq ($(with_libx32atomic),yes)
+  $(lib_binaries)	+= libx32atomic
+endif
+ifeq ($(with_libhfatomic),yes)
+  $(lib_binaries)	+= libhfatomic
+endif
+ifeq ($(with_libsfatomic),yes)
+  $(lib_binaries)	+= libsfatomic
+endif
+
+define __do_atomic
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libatomic.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libatomic.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,,$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_atomic = $(call __do_atomic,lib$(1)atomic$(ATOMIC_SONAME),$(1))
+
+$(binary_stamp)-libatomic: $(install_stamp)
+	$(call do_atomic,)
+
+$(binary_stamp)-lib64atomic: $(install_stamp)
+	$(call do_atomic,64)
+
+$(binary_stamp)-lib32atomic: $(install_stamp)
+	$(call do_atomic,32)
+
+$(binary_stamp)-libn32atomic: $(install_stamp)
+	$(call do_atomic,n32)
+
+$(binary_stamp)-libx32atomic: $(install_stamp)
+	$(call do_atomic,x32)
+
+$(binary_stamp)-libhfatomic: $(install_dependencies)
+	$(call do_atomic,hf)
+
+$(binary_stamp)-libsfatomic: $(install_dependencies)
+	$(call do_atomic,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libcc1.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libcc1.mk
@@ -0,0 +1,31 @@
+ifeq ($(with_libcc1),yes)
+  ifneq ($(DEB_CROSS),yes)
+    arch_binaries  := $(arch_binaries) libcc1
+  endif
+endif
+
+p_cc1	= libcc1-$(CC1_SONAME)
+d_cc1	= debian/$(p_cc1)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libcc1: $(install_dependencies)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_cc1)
+	dh_installdirs -p$(p_cc1) \
+		$(docdir) \
+		$(usr_lib)
+	$(dh_compat2) dh_movefiles -p$(p_cc1) \
+		$(usr_lib)/libcc1.so.*
+
+	debian/dh_doclink -p$(p_cc1) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_cc1)
+
+	dh_strip -p$(p_cc1)
+	dh_makeshlibs -p$(p_cc1)
+	dh_shlibdeps -p$(p_cc1)
+	echo $(p_cc1) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libcilkrts.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libcilkrts.mk
@@ -0,0 +1,76 @@
+$(lib_binaries)  += libcilkrts
+ifeq ($(with_lib64cilkrts),yes)
+  $(lib_binaries)  += lib64cilkrts
+endif
+ifeq ($(with_lib32cilkrts),yes)
+  $(lib_binaries)	+= lib32cilkrts
+endif
+ifeq ($(with_libn32cilkrts),yes)
+  $(lib_binaries)	+= libn32cilkrts
+endif
+ifeq ($(with_libx32cilkrts),yes)
+  $(lib_binaries)	+= libx32cilkrts
+endif
+ifeq ($(with_libhfcilkrts),yes)
+  $(lib_binaries)	+= libhfcilkrts
+endif
+ifeq ($(with_libsfcilkrts),yes)
+  $(lib_binaries)	+= libsfcilkrts
+endif
+
+define __do_cilkrts
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libcilkrts.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libcilkrts.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst cilkrts$(CILKRTS_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst cilkrts$(CILKRTS_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_cilkrts = $(call __do_cilkrts,lib$(1)cilkrts$(CILKRTS_SONAME),$(1))
+
+$(binary_stamp)-libcilkrts: $(install_stamp)
+	$(call do_cilkrts,)
+
+$(binary_stamp)-lib64cilkrts: $(install_stamp)
+	$(call do_cilkrts,64)
+
+$(binary_stamp)-lib32cilkrts: $(install_stamp)
+	$(call do_cilkrts,32)
+
+$(binary_stamp)-libn32cilkrts: $(install_stamp)
+	$(call do_cilkrts,n32)
+
+$(binary_stamp)-libx32cilkrts: $(install_stamp)
+	$(call do_cilkrts,x32)
+
+$(binary_stamp)-libhfcilkrts: $(install_dependencies)
+	$(call do_cilkrts,hf)
+
+$(binary_stamp)-libsfcilkrts: $(install_dependencies)
+	$(call do_cilkrts,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libgcc.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libgcc.mk
@@ -0,0 +1,378 @@
+ifeq ($(with_libgcc),yes)
+  $(lib_binaries)	+= libgcc
+endif
+ifeq ($(with_lib64gcc),yes)
+  $(lib_binaries)	+= lib64gcc
+endif
+ifeq ($(with_lib32gcc),yes)
+  $(lib_binaries)	+= lib32gcc
+endif
+ifeq ($(with_libn32gcc),yes)
+  $(lib_binaries)	+= libn32gcc
+endif
+ifeq ($(with_libx32gcc),yes)
+  $(lib_binaries)	+= libx32gcc
+endif
+ifeq ($(with_libhfgcc),yes)
+  $(lib_binaries)	+= libhfgcc
+endif
+ifeq ($(with_libsfgcc),yes)
+  $(lib_binaries)	+= libsfgcc
+endif
+
+ifneq ($(DEB_STAGE),rtlibs)
+  ifeq ($(with_cdev),yes)
+    $(lib_binaries)  += libgcc-dev
+  endif
+  ifeq ($(with_lib64gccdev),yes)
+    $(lib_binaries)  += lib64gcc-dev
+  endif
+  ifeq ($(with_lib32gccdev),yes)
+    $(lib_binaries)  += lib32gcc-dev
+  endif
+  ifeq ($(with_libn32gccdev),yes)
+    $(lib_binaries)  += libn32gcc-dev
+  endif
+  ifeq ($(with_libx32gccdev),yes)
+    $(lib_binaries)  += libx32gcc-dev
+  endif
+  ifeq ($(with_libhfgccdev),yes)
+    $(lib_binaries)  += libhfgcc-dev
+  endif
+  ifeq ($(with_libsfgccdev),yes)
+    $(lib_binaries)  += libsfgcc-dev
+  endif
+endif
+
+header_files = \
+	$(gcc_lib_dir)/include/std*.h \
+	$(shell for h in \
+		    README features.h arm_neon.h loongson.h \
+		    {cpuid,decfloat,float,iso646,limits,mm3dnow,mm_malloc}.h \
+		    {ppu_intrinsics,paired,spu2vmx,vec_types,si2vmx}.h \
+		    {,a,b,e,i,n,p,s,t,w,x}mmintrin.h mmintrin-common.h \
+		    {abm,adx,avx,avx2,bmi,bmi2,f16c,fma,fma4,fxsr,ia32,}intrin.h \
+		    {lwp,lzcnt,popcnt,prfchw,rdseed,rtm,tbm,x86,xop,xsave{,opt},xtest,}intrin.h \
+		    {htm,htmxl,mwaitx,sha}intrin.h \
+		    avx512{bw,er,cd,dq,f,ifma,ifmavl,pf,vlbw,vbmi,vldq,vbmivl,vl}intrin.h \
+		    {clflushopt,clwb,pcommit,xsavec,xsaves}intrin.h \
+		    {arm_acle,unwind-arm-common,s390intrin}.h \
+		    {cross-stdarg,syslimits,unwind,varargs}.h; \
+		do \
+		  test -e $(d)/$(gcc_lib_dir)/include/$$h \
+		    && echo $(gcc_lib_dir)/include/$$h; \
+		  test -e $(d)/$(gcc_lib_dir)/include-fixed/$$h \
+		    && echo $(gcc_lib_dir)/include-fixed/$$h; \
+		done) \
+	$(shell for d in \
+		  asm bits cilk gnu linux sanitizer $(TARGET_ALIAS) \
+		  $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS)); \
+		do \
+		  test -e $(d)/$(gcc_lib_dir)/include/$$d \
+		    && echo $(gcc_lib_dir)/include/$$d; \
+		  test -e $(d)/$(gcc_lib_dir)/include-fixed/$$d \
+		    && echo $(gcc_lib_dir)/include-fixed/$$d; \
+		done)
+
+ifeq ($(with_libssp),yes)
+    header_files += $(gcc_lib_dir)/include/ssp
+endif
+ifeq ($(with_gomp),yes)
+    header_files += $(gcc_lib_dir)/include/{omp,openacc}.h
+endif
+ifeq ($(with_qmath),yes)
+    header_files += $(gcc_lib_dir)/include/quadmath{,_weak}.h
+endif
+
+ifeq ($(DEB_TARGET_ARCH),ia64)
+    header_files += $(gcc_lib_dir)/include/ia64intrin.h
+endif
+
+ifeq ($(DEB_TARGET_ARCH),m68k)
+    header_files += $(gcc_lib_dir)/include/math-68881.h
+endif
+
+ifeq ($(DEB_TARGET_ARCH),$(findstring $(DEB_TARGET_ARCH),powerpc ppc64 ppc64el powerpcspe))
+    header_files += $(gcc_lib_dir)/include/{altivec.h,ppc-asm.h,spe.h}
+endif
+
+p_lgcc		= libgcc$(GCC_SONAME)$(cross_lib_arch)
+p_lgccdbg	= libgcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_lgccdev	= libgcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_lgcc		= debian/$(p_lgcc)
+d_lgccdbg	= debian/$(p_lgccdbg)
+d_lgccdev	= debian/$(p_lgccdev)
+
+p_l32gcc	= lib32gcc$(GCC_SONAME)$(cross_lib_arch)
+p_l32gccdbg	= lib32gcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_l32gccdev	= lib32gcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_l32gcc	= debian/$(p_l32gcc)
+d_l32gccdbg	= debian/$(p_l32gccdbg)
+d_l32gccdev	= debian/$(p_l32gccdev)
+
+p_l64gcc	= lib64gcc$(GCC_SONAME)$(cross_lib_arch)
+p_l64gccdbg	= lib64gcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_l64gccdev	= lib64gcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_l64gcc	= debian/$(p_l64gcc)
+d_l64gccdbg	= debian/$(p_l64gccdbg)
+d_l64gccdev	= debian/$(p_l64gccdev)
+
+p_ln32gcc	= libn32gcc$(GCC_SONAME)$(cross_lib_arch)
+p_ln32gccdbg	= libn32gcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_ln32gccdev	= libn32gcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_ln32gcc	= debian/$(p_ln32gcc)
+d_ln32gccdbg	= debian/$(p_ln32gccdbg)
+d_ln32gccdev	= debian/$(p_ln32gccdev)
+
+p_lx32gcc	= libx32gcc$(GCC_SONAME)$(cross_lib_arch)
+p_lx32gccdbg	= libx32gcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_lx32gccdev	= libx32gcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_lx32gcc	= debian/$(p_lx32gcc)
+d_lx32gccdbg	= debian/$(p_lx32gccdbg)
+d_lx32gccdev	= debian/$(p_lx32gccdev)
+
+p_lhfgcc	= libhfgcc$(GCC_SONAME)$(cross_lib_arch)
+p_lhfgccdbg	= libhfgcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_lhfgccdev	= libhfgcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_lhfgcc	= debian/$(p_lhfgcc)
+d_lhfgccdbg	= debian/$(p_lhfgccdbg)
+d_lhfgccdev	= debian/$(p_lhfgccdev)
+
+p_lsfgcc	= libsfgcc$(GCC_SONAME)$(cross_lib_arch)
+p_lsfgccdbg	= libsfgcc$(GCC_SONAME)-dbg$(cross_lib_arch)
+p_lsfgccdev	= libsfgcc-$(BASE_VERSION)-dev$(cross_lib_arch)
+d_lsfgcc	= debian/$(p_lsfgcc)
+d_lsfgccdbg	= debian/$(p_lsfgccdbg)
+d_lsfgccdev	= debian/$(p_lsfgccdev)
+
+# __do_gcc_devels(flavour,package,todir,fromdir)
+define __do_gcc_devels
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	test -n "$(2)"
+	rm -rf debian/$(2)
+	dh_installdirs -p$(2) $(docdir) #TODO
+	dh_installdirs -p$(2) $(3)
+
+	$(call __do_gcc_devels2,$(1),$(2),$(3),$(4))
+
+	debian/dh_doclink -p$(2) $(p_lbase)
+	debian/dh_rmemptydirs -p$(2)
+
+	dh_strip -p$(2)
+	$(cross_shlibdeps) dh_shlibdeps -p$(2)
+	$(call cross_mangle_substvars,$(2))
+	echo $(2) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# __do_gcc_devels2(flavour,package,todir,fromdir)
+define __do_gcc_devels2
+# stage1 builds static libgcc only
+	$(if $(filter $(DEB_STAGE),stage1),,
+		: # libgcc_s.so may be a linker script on some architectures
+		set -e; \
+		if [ -h $(4)/libgcc_s.so ]; then \
+		  rm -f $(4)/libgcc_s.so; \
+		  dh_link -p$(2) /$(libgcc_dir$(1))/libgcc_s.so.$(GCC_SONAME) \
+		    /$(3)/libgcc_s.so; \
+		else \
+		  mv $(4)/libgcc_s.so $(d)/$(3)/libgcc_s.so; \
+		  dh_link -p$(2) /$(libgcc_dir$(1))/libgcc_s.so.$(GCC_SONAME) \
+		    /$(3)/libgcc_s.so.$(GCC_SONAME); \
+		fi; \
+		$(if $(1), dh_link -p$(2) /$(3)/libgcc_s.so \
+		    /$(gcc_lib_dir)/libgcc_s_$(1).so;)
+	)
+	$(dh_compat2) dh_movefiles -p$(2) \
+		$(3)/{libgcc*,libgcov.a,*.o} \
+		$(if $(1),,$(header_files)) # Only move headers for the "main" package
+
+	: # libbacktrace not installed by default
+	$(if $(filter yes, $(with_backtrace)),
+	if [ -f $(buildlibdir)/$(1)/libbacktrace/.libs/libbacktrace.a ]; then \
+	  install -m644 $(buildlibdir)/$(1)/libbacktrace/.libs/libbacktrace.a \
+	      debian/$(2)/$(gcc_lib_dir)/$(1); \
+	fi; \
+	$(if $(1),,
+	if [ -f $(buildlibdir)/libbacktrace/backtrace-supported.h ]; then \
+	  install -m644 $(buildlibdir)/libbacktrace/backtrace-supported.h \
+	    debian/$(2)/$(gcc_lib_dir)/include/; \
+	  install -m644 $(srcdir)/libbacktrace/backtrace.h \
+	    debian/$(2)/$(gcc_lib_dir)/include/; \
+	fi
+	))
+
+	: # If building a flavour, add a lintian override
+	$(if $(1),
+		#TODO: use a file instead of a hacky echo
+		# bu do we want to use one override file (in the source package) per
+		# flavour or not since they are essentially the same?
+		mkdir -p debian/$(2)/usr/share/lintian/overrides
+		echo "$(2) binary: binary-from-other-architecture" \
+			>> debian/$(2)/usr/share/lintian/overrides/$(2)
+	)
+	$(if $(filter yes, $(with_lib$(1)gmath)),
+		$(call install_gcc_lib,libgcc-math,$(GCC_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_libssp)),
+		$(call install_gcc_lib,libssp,$(SSP_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_ssp)),
+		mv $(4)/libssp_nonshared.a debian/$(2)/$(3)/;
+	)
+	$(if $(filter yes, $(with_gomp)),
+		$(call install_gcc_lib,libgomp,$(GOMP_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_itm)),
+		$(call install_gcc_lib,libitm,$(ITM_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_atomic)),
+		$(call install_gcc_lib,libatomic,$(ATOMIC_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_asan)),
+		$(call install_gcc_lib,libasan,$(ASAN_SONAME),$(1),$(2))
+		mv $(4)/libasan_preinit.o debian/$(2)/$(3)/;
+	)
+	$(if $(1),,$(if $(filter yes, $(with_lsan)),
+		$(call install_gcc_lib,liblsan,$(LSAN_SONAME),$(1),$(2))
+	))
+	$(if $(1),,$(if $(filter yes, $(with_tsan)),
+		$(call install_gcc_lib,libtsan,$(TSAN_SONAME),$(1),$(2))
+	))
+	$(if $(filter yes, $(with_ubsan)),
+		$(call install_gcc_lib,libubsan,$(UBSAN_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_vtv)),
+		$(call install_gcc_lib,libvtv,$(VTV_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_cilkrts)),
+		$(call install_gcc_lib,libcilkrts,$(CILKRTS_SONAME),$(1),$(2))
+	)
+	$(if $(filter yes, $(with_mpx)),
+	    $(if $(filter x32, $(1)),,
+		$(call install_gcc_lib,libmpxwrappers,$(MPX_SONAME),$(1),$(2))
+		$(call install_gcc_lib,libmpx,$(MPX_SONAME),$(1),$(2))
+	    )
+	)
+	$(if $(filter yes, $(with_qmath)),
+		$(call install_gcc_lib,libquadmath,$(QUADMATH_SONAME),$(1),$(2))
+	)
+endef
+
+# do_gcc_devels(flavour)
+define do_gcc_devels
+	$(call __do_gcc_devels,$(1),$(p_l$(1)gccdev),$(gcc_lib_dir$(1)),$(d)/$(usr_lib$(1)))
+endef
+
+
+define __do_libgcc
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+
+	dh_installdirs -p$(p_l) \
+		$(docdir)/$(p_l) \
+		$(libgcc_dir$(2))
+
+	$(if $(filter yes,$(with_shared_libgcc)),
+		mv $(d)/$(usr_lib$(2))/libgcc_s.so.$(GCC_SONAME) \
+			$(d_l)/$(libgcc_dir$(2))/.
+	)
+
+	debian/dh_doclink -p$(p_l) $(if $(3),$(3),$(p_lbase))
+	debian/dh_doclink -p$(p_d) $(if $(3),$(3),$(p_lbase))
+	debian/dh_rmemptydirs -p$(p_l)
+	debian/dh_rmemptydirs -p$(p_d)
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+
+	# see Debian #533843 for the __aeabi symbol handling; this construct is
+	# just to include the symbols for dpkg versions older than 1.15.3 which
+	# didn't allow bypassing the symbol blacklist
+	$(if $(filter yes,$(with_shared_libgcc)),
+		$(if $(findstring gcc1,$(p_l)), \
+		ln -sf libgcc.symbols debian/$(p_l).symbols \
+		)
+		$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l) -p$(p_d) \
+			-- -v$(DEB_LIBGCC_VERSION)
+		$(call cross_mangle_shlibs,$(p_l))
+		$(if $(filter arm-linux-gnueabi%,$(DEB_TARGET_GNU_TYPE)),
+			if head -1 $(d_l)/DEBIAN/symbols 2>/dev/null | grep -q '^lib'; then \
+			  grep -q '^ __aeabi' $(d_l)/DEBIAN/symbols \
+			    || cat debian/libgcc.symbols.aeabi \
+				>> $(d_l)/DEBIAN/symbols; \
+			fi
+		)
+	)
+
+	$(if $(DEB_STAGE),,
+	    $(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,,$(2))
+	)
+	$(call cross_mangle_substvars,$(p_l))
+
+	$(if $(2),,	# only for native
+		mkdir -p $(d_l)/usr/share/lintian/overrides
+		echo '$(p_l): package-name-doesnt-match-sonames' \
+			> $(d_l)/usr/share/lintian/overrides/$(p_l)
+	)
+
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries).epoch
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+do_libgcc = $(call __do_libgcc,lib$(1)gcc$(GCC_SONAME),$(1),$(2))
+# ----------------------------------------------------------------------
+
+$(binary_stamp)-libgcc: $(install_dependencies)
+ifeq ($(with_standalone_gcj),yes)
+	$(call do_libgcc,,$(p_jbase))
+else
+	$(call do_libgcc,,)
+endif
+
+$(binary_stamp)-lib64gcc: $(install_dependencies)
+	$(call do_libgcc,64,)
+
+$(binary_stamp)-lib32gcc: $(install_dependencies)
+	$(call do_libgcc,32,)
+
+$(binary_stamp)-libn32gcc: $(install_dependencies)
+	$(call do_libgcc,n32,)
+
+$(binary_stamp)-libx32gcc: $(install_dependencies)
+	$(call do_libgcc,x32,)
+
+$(binary_stamp)-libhfgcc: $(install_dependencies)
+	$(call do_libgcc,hf)
+
+$(binary_stamp)-libsfgcc: $(install_dependencies)
+	$(call do_libgcc,sf)
+
+$(binary_stamp)-libgcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,)
+
+$(binary_stamp)-lib64gcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,64)
+
+$(binary_stamp)-lib32gcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,32)
+
+$(binary_stamp)-libn32gcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,n32)
+
+$(binary_stamp)-libx32gcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,x32)
+
+$(binary_stamp)-libhfgcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,hf)
+
+$(binary_stamp)-libsfgcc-dev: $(install_dependencies)
+	$(call do_gcc_devels,sf)
+
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libgccjit.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libgccjit.mk
@@ -0,0 +1,89 @@
+ifeq ($(with_libgccjit),yes)
+  $(lib_binaries)  += libgccjit
+endif
+
+$(lib_binaries)  += libgccjitdev
+
+ifneq ($(DEB_CROSS),yes)
+  indep_binaries := $(indep_binaries) libgccjitdoc
+endif
+
+p_jitlib	= libgccjit$(GCCJIT_SONAME)
+p_jitdev	= libgccjit$(pkg_ver)-dev
+p_jitdbg	= libgccjit$(pkg_ver)-dbg
+p_jitdoc	= libgccjit$(pkg_ver)-doc
+
+d_jitlib	= debian/$(p_jitlib)
+d_jitdev	= debian/$(p_jitdev)
+d_jitdbg	= debian/$(p_jitdbg)
+d_jitdoc	= debian/$(p_jitdoc)
+
+$(binary_stamp)-libgccjit: $(install_jit_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_jitlib) $(d_jitdbg)
+	dh_installdirs -p$(p_jitlib) \
+		$(usr_lib)
+	dh_installdirs -p$(p_jitdbg)
+
+	$(dh_compat2) dh_movefiles -p$(p_jitlib) \
+		$(usr_lib)/libgccjit.so.*
+	rm -f $(d)/$(usr_lib)/libgccjit.so
+
+	debian/dh_doclink -p$(p_jitlib) $(p_base)
+	debian/dh_doclink -p$(p_jitdbg) $(p_base)
+
+	dh_strip -p$(p_jitlib) --dbg-package=$(p_jitdbg)
+	$(cross_makeshlibs) dh_makeshlibs -p$(p_jitlib)
+	$(call cross_mangle_shlibs,$(p_jitlib))
+	$(ignshld)$(cross_shlibdeps) dh_shlibdeps -p$(p_jitlib) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_jitlib))
+	echo $(p_jitlib) $(p_jitdbg) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+	touch $@
+
+$(binary_stamp)-libgccjitdev: $(install_jit_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_jitdev)
+	dh_installdirs -p$(p_jitdev) \
+		$(usr_lib) \
+		$(gcc_lib_dir)/include
+
+	rm -f $(d)/$(usr_lib)/libgccjit.so
+
+	$(dh_compat2) dh_movefiles -p$(p_jitdev) \
+		$(gcc_lib_dir)/include/libgccjit*.h
+	dh_link -p$(p_jitdev) \
+		$(usr_lib)/libgccjit.so.$(GCCJIT_SONAME) $(gcc_lib_dir)/libgccjit.so
+
+	debian/dh_doclink -p$(p_jitdev) $(p_base)
+
+	echo $(p_jitdev) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+	touch $@
+
+$(binary_stamp)-libgccjitdoc: $(install_jit_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_jitdoc)
+	dh_installdirs -p$(p_jitdoc) \
+		$(PF)/share/info
+
+	$(dh_compat2) dh_movefiles -p$(p_jitdoc) \
+		$(PF)/share/info/libgccjit*
+
+	debian/dh_doclink -p$(p_jitdoc) $(p_base)
+	echo $(p_jitdoc) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+	touch $@
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libgomp.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libgomp.mk
@@ -0,0 +1,68 @@
+$(lib_binaries)  += libgomp
+ifeq ($(with_lib64gomp),yes)
+  $(lib_binaries)  += lib64gomp
+endif
+ifeq ($(with_lib32gomp),yes)
+  $(lib_binaries)	+= lib32gomp
+endif
+ifeq ($(with_libn32gomp),yes)
+  $(lib_binaries)	+= libn32gomp
+endif
+ifeq ($(with_libx32gomp),yes)
+  $(lib_binaries)	+= libx32gomp
+endif
+ifeq ($(with_libhfgomp),yes)
+  $(lib_binaries)	+= libhfgomp
+endif
+ifeq ($(with_libsfgomp),yes)
+  $(lib_binaries)	+= libsfgomp
+endif
+
+define __do_gomp
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libgomp.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libgomp.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,$(subst gomp$(GOMP_SONAME),gcc$(GCC_SONAME),$(p_l)),$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_gomp = $(call __do_gomp,lib$(1)gomp$(GOMP_SONAME),$(1))
+
+$(binary_stamp)-libgomp: $(install_stamp)
+	$(call do_gomp,)
+
+$(binary_stamp)-lib64gomp: $(install_stamp)
+	$(call do_gomp,64)
+
+$(binary_stamp)-lib32gomp: $(install_stamp)
+	$(call do_gomp,32)
+
+$(binary_stamp)-libn32gomp: $(install_stamp)
+	$(call do_gomp,n32)
+
+$(binary_stamp)-libx32gomp: $(install_stamp)
+	$(call do_gomp,x32)
+
+$(binary_stamp)-libhfgomp: $(install_dependencies)
+	$(call do_gomp,hf)
+
+$(binary_stamp)-libsfgomp: $(install_dependencies)
+	$(call do_gomp,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libitm.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libitm.mk
@@ -0,0 +1,68 @@
+$(lib_binaries)  += libitm
+ifeq ($(with_lib64itm),yes)
+  $(lib_binaries)  += lib64itm
+endif
+ifeq ($(with_lib32itm),yes)
+  $(lib_binaries)	+= lib32itm
+endif
+ifeq ($(with_libn32itm),yes)
+  $(lib_binaries)	+= libn32itm
+endif
+ifeq ($(with_libx32itm),yes)
+  $(lib_binaries)	+= libx32itm
+endif
+ifeq ($(with_libhfitm),yes)
+  $(lib_binaries)	+= libhfitm
+endif
+ifeq ($(with_libsfitm),yes)
+  $(lib_binaries)	+= libsfitm
+endif
+
+define __do_itm
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libitm.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libitm.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,,$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_itm = $(call __do_itm,lib$(1)itm$(ITM_SONAME),$(1))
+
+$(binary_stamp)-libitm: $(install_stamp)
+	$(call do_itm,)
+
+$(binary_stamp)-lib64itm: $(install_stamp)
+	$(call do_itm,64)
+
+$(binary_stamp)-lib32itm: $(install_stamp)
+	$(call do_itm,32)
+
+$(binary_stamp)-libn32itm: $(install_stamp)
+	$(call do_itm,n32)
+
+$(binary_stamp)-libx32itm: $(install_stamp)
+	$(call do_itm,x32)
+
+$(binary_stamp)-libhfitm: $(install_dependencies)
+	$(call do_itm,hf)
+
+$(binary_stamp)-libsfitm: $(install_dependencies)
+	$(call do_itm,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-liblsan.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-liblsan.mk
@@ -0,0 +1,76 @@
+$(lib_binaries)  += liblsan
+ifeq ($(with_lib64lsan),yes)
+  $(lib_binaries)  += lib64lsan
+endif
+ifeq ($(with_lib32lsan),yes)
+  $(lib_binaries)	+= lib32lsan
+endif
+ifeq ($(with_libn32lsan),yes)
+  $(lib_binaries)	+= libn32lsan
+endif
+ifeq ($(with_libx32lsan),yes)
+  $(lib_binaries)	+= libx32lsan
+endif
+ifeq ($(with_libhflsan),yes)
+  $(lib_binaries)	+= libhflsan
+endif
+ifeq ($(with_libsflsan),yes)
+  $(lib_binaries)	+= libsflsan
+endif
+
+define __do_lsan
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/liblsan.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst lsan$(LSAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst lsan$(LSAN_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_lsan = $(call __do_lsan,lib$(1)lsan$(LSAN_SONAME),$(1))
+
+$(binary_stamp)-liblsan: $(install_stamp)
+	$(call do_lsan,)
+
+$(binary_stamp)-lib64lsan: $(install_stamp)
+	$(call do_lsan,64)
+
+$(binary_stamp)-lib32lsan: $(install_stamp)
+	$(call do_lsan,32)
+
+$(binary_stamp)-libn32lsan: $(install_stamp)
+	$(call do_lsan,n32)
+
+$(binary_stamp)-libx32lsan: $(install_stamp)
+	$(call do_lsan,x32)
+
+$(binary_stamp)-libhflsan: $(install_dependencies)
+	$(call do_lsan,hf)
+
+$(binary_stamp)-libsflsan: $(install_dependencies)
+	$(call do_lsan,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libmpx.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libmpx.mk
@@ -0,0 +1,74 @@
+$(lib_binaries)  += libmpx
+ifeq ($(with_lib64mpx),yes)
+  $(lib_binaries)  += lib64mpx
+endif
+ifeq ($(with_lib32mpx),yes)
+  $(lib_binaries)	+= lib32mpx
+endif
+ifeq ($(with_libn32mpx),yes)
+  $(lib_binaries)	+= libn32mpx
+endif
+ifeq ($(with_libx32mpx),yes)
+  $(lib_binaries)	+= libx32mpx
+endif
+ifeq ($(with_libhfmpx),yes)
+  $(lib_binaries)	+= libhfmpx
+endif
+ifeq ($(with_libsfmpx),yes)
+  $(lib_binaries)	+= libsfmpx
+endif
+
+define __do_mpx
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(usr_lib$(2))/libmpx.so.* \
+		$(usr_lib$(2))/libmpxwrappers.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libmpx.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l)
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_mpx = $(call __do_mpx,lib$(1)mpx$(MPX_SONAME),$(1))
+
+$(binary_stamp)-libmpx: $(install_stamp)
+	$(call do_mpx,)
+
+$(binary_stamp)-lib64mpx: $(install_stamp)
+	$(call do_mpx,64)
+
+$(binary_stamp)-lib32mpx: $(install_stamp)
+	$(call do_mpx,32)
+
+$(binary_stamp)-libn32mpx: $(install_stamp)
+	$(call do_mpx,n32)
+
+$(binary_stamp)-libx32mpx: $(install_stamp)
+	$(call do_mpx,x32)
+
+$(binary_stamp)-libhfmpx: $(install_dependencies)
+	$(call do_mpx,hf)
+
+$(binary_stamp)-libsfmpx: $(install_dependencies)
+	$(call do_mpx,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libobjc.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libobjc.mk
@@ -0,0 +1,153 @@
+ifeq ($(with_libobjc),yes)
+  $(lib_binaries) += libobjc
+endif
+ifeq ($(with_objcdev),yes)
+  $(lib_binaries) += libobjc-dev
+endif
+ifeq ($(with_lib64objc),yes)
+  $(lib_binaries)	+= lib64objc
+endif
+ifeq ($(with_lib64objcdev),yes)
+  $(lib_binaries)	+= lib64objc-dev
+endif
+ifeq ($(with_lib32objc),yes)
+  $(lib_binaries)	+= lib32objc
+endif
+ifeq ($(with_lib32objcdev),yes)
+  $(lib_binaries)	+= lib32objc-dev
+endif
+ifeq ($(with_libn32objc),yes)
+  $(lib_binaries)	+= libn32objc
+endif
+ifeq ($(with_libn32objcdev),yes)
+  $(lib_binaries)	+= libn32objc-dev
+endif
+ifeq ($(with_libx32objc),yes)
+  $(lib_binaries)	+= libx32objc
+endif
+ifeq ($(with_libx32objcdev),yes)
+  $(lib_binaries)	+= libx32objc-dev
+endif
+ifeq ($(with_libhfobjc),yes)
+  $(lib_binaries)	+= libhfobjc
+endif
+ifeq ($(with_libhfobjcdev),yes)
+  $(lib_binaries)	+= libhfobjc-dev
+endif
+ifeq ($(with_libsfobjc),yes)
+  $(lib_binaries)	+= libsfobjc
+endif
+ifeq ($(with_libsfobjcdev),yes)
+  $(lib_binaries)	+= libsfobjc-dev
+endif
+
+files_lobjcdev= \
+	$(gcc_lib_dir)/include/objc
+
+files_lobjc = \
+	$(usr_lib$(2))/libobjc.so.*
+ifeq ($(with_objc_gc),yes)
+  files_lobjc += \
+	$(usr_lib$(2))/libobjc_gc.so.*
+endif
+
+define __do_libobjc
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) \
+		$(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(files_lobjc)
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l) -Xlibobjc_gc.so
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,$(subst objc$(OBJC_SONAME),gcc$(GCC_SONAME),$(p_l)),$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+
+define __do_libobjc_dev
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l)
+	dh_installdirs -p$(p_l) \
+		$(gcc_lib_dir$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(files_lobjcdev)
+
+	$(call install_gcc_lib,libobjc,$(OBJC_SONAME),$(2),$(p_l))
+	$(if $(filter yes,$(with_objc_gc)),
+		dh_link -p$(p_l) \
+		  /$(usr_lib$(2))/libobjc_gc.so.$(OBJC_SONAME) \
+		  /$(gcc_lib_dir$(2))/libobjc_gc.so
+	)
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	echo $(p_l) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+
+
+# ----------------------------------------------------------------------
+
+do_libobjc = $(call __do_libobjc,lib$(1)objc$(OBJC_SONAME),$(1))
+do_libobjc_dev = $(call __do_libobjc_dev,lib$(1)objc-$(BASE_VERSION)-dev,$(1))
+
+$(binary_stamp)-libobjc: $(install_stamp)
+	$(call do_libobjc,)
+
+$(binary_stamp)-lib64objc: $(install_stamp)
+	$(call do_libobjc,64)
+
+$(binary_stamp)-lib32objc: $(install_stamp)
+	$(call do_libobjc,32)
+
+$(binary_stamp)-libn32objc: $(install_stamp)
+	$(call do_libobjc,n32)
+
+$(binary_stamp)-libx32objc: $(install_stamp)
+	$(call do_libobjc,x32)
+
+$(binary_stamp)-libhfobjc: $(install_stamp)
+	$(call do_libobjc,hf)
+
+$(binary_stamp)-libsfobjc: $(install_stamp)
+	$(call do_libobjc,sf)
+
+
+$(binary_stamp)-libobjc-dev: $(install_stamp)
+	$(call do_libobjc_dev,)
+
+$(binary_stamp)-lib64objc-dev: $(install_stamp)
+	$(call do_libobjc_dev,64)
+
+$(binary_stamp)-lib32objc-dev: $(install_stamp)
+	$(call do_libobjc_dev,32)
+
+$(binary_stamp)-libx32objc-dev: $(install_stamp)
+	$(call do_libobjc_dev,x32)
+
+$(binary_stamp)-libn32objc-dev: $(install_stamp)
+	$(call do_libobjc_dev,n32)
+
+$(binary_stamp)-libhfobjc-dev: $(install_stamp)
+	$(call do_libobjc_dev,hf)
+
+$(binary_stamp)-libsfobjc-dev: $(install_stamp)
+	$(call do_libobjc_dev,sf)
+
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libquadmath.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libquadmath.mk
@@ -0,0 +1,68 @@
+$(lib_binaries)  += libqmath
+ifeq ($(with_lib64qmath),yes)
+  $(lib_binaries)  += lib64qmath
+endif
+ifeq ($(with_lib32qmath),yes)
+  $(lib_binaries)	+= lib32qmath
+endif
+ifeq ($(with_libn32qmath),yes)
+  $(lib_binaries)	+= libn32qmath
+endif
+ifeq ($(with_libx32qmath),yes)
+  $(lib_binaries)	+= libx32qmath
+endif
+ifeq ($(with_libhfqmath),yes)
+  $(lib_binaries)	+= libhfqmath
+endif
+ifeq ($(with_libsfqmath),yes)
+  $(lib_binaries)	+= libsfqmath
+endif
+
+define __do_qmath
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libquadmath.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	ln -sf libquadmath.symbols debian/$(p_l).symbols
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,,$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_qmath = $(call __do_qmath,lib$(1)quadmath$(QUADMATH_SONAME),$(1))
+
+$(binary_stamp)-libqmath: $(install_stamp)
+	$(call do_qmath,)
+
+$(binary_stamp)-lib64qmath: $(install_stamp)
+	$(call do_qmath,64)
+
+$(binary_stamp)-lib32qmath: $(install_stamp)
+	$(call do_qmath,32)
+
+$(binary_stamp)-libn32qmath: $(install_stamp)
+	$(call do_qmath,n32)
+
+$(binary_stamp)-libx32qmath: $(install_stamp)
+	$(call do_qmath,x32)
+
+$(binary_stamp)-libhfqmath: $(install_stamp)
+	$(call do_qmath,hf)
+
+$(binary_stamp)-libsfqmath: $(install_stamp)
+	$(call do_qmath,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libssp.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libssp.mk
@@ -0,0 +1,155 @@
+arch_binaries  := $(arch_binaries) libssp
+ifeq ($(with_lib64ssp),yes)
+  arch_binaries  := $(arch_binaries) lib64ssp
+endif
+ifeq ($(with_lib32ssp),yes)
+  arch_binaries	:= $(arch_binaries) lib32ssp
+endif
+ifeq ($(with_libn32ssp),yes)
+  arch_binaries	:= $(arch_binaries) libn32ssp
+endif
+ifeq ($(with_libx32ssp),yes)
+  arch_binaries := $(arch_binaries) libx32ssp
+endif
+
+p_ssp	= libssp$(SSP_SONAME)
+p_ssp32	= lib32ssp$(SSP_SONAME)
+p_ssp64	= lib64ssp$(SSP_SONAME)
+p_sspx32 = libx32ssp$(SSP_SONAME)
+p_sspd	= libssp$(SSP_SONAME)-dev
+
+d_ssp	= debian/$(p_ssp)
+d_ssp32	= debian/$(p_ssp32)
+d_ssp64	= debian/$(p_ssp64)
+d_sspx32 = debian/$(p_sspx32)
+d_sspd	= debian/$(p_sspd)
+
+dirs_ssp = \
+	$(docdir)/$(p_base) \
+	$(PF)/$(libdir)
+files_ssp = \
+	$(PF)/$(libdir)/libssp.so.*
+
+dirs_sspd = \
+	$(docdir) \
+	$(PF)/include \
+	$(PF)/$(libdir)
+files_sspd = \
+	$(gcc_lib_dir)/include/ssp \
+	$(PF)/$(libdir)/libssp.{a,so} \
+	$(PF)/$(libdir)/libssp_nonshared.a
+
+ifeq ($(with_lib32ssp),yes)
+	dirs_sspd  += $(lib32)
+	files_sspd += $(lib32)/libssp.{a,so}
+	files_sspd += $(lib32)/libssp_nonshared.a
+endif
+ifeq ($(with_lib64ssp),yes)
+	dirs_sspd  += $(PF)/lib64
+	files_sspd += $(PF)/lib64/libssp.{a,so}
+	files_sspd += $(PF)/lib64/libssp_nonshared.a
+endif
+
+$(binary_stamp)-libssp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_ssp)
+	dh_installdirs -p$(p_ssp)
+
+	$(dh_compat2) dh_movefiles -p$(p_ssp) $(files_ssp)
+	debian/dh_doclink -p$(p_ssp) $(p_lbase)
+
+	debian/dh_rmemptydirs -p$(p_ssp)
+
+	dh_strip -p$(p_ssp)
+	dh_makeshlibs $(ldconfig_arg) -p$(p_ssp) -V '$(p_ssp) (>= $(DEB_SOVERSION))'
+	dh_shlibdeps -p$(p_ssp)
+	echo $(p_ssp) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-lib64ssp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_ssp64)
+	dh_installdirs -p$(p_ssp64) \
+		$(PF)/lib64
+	$(dh_compat2) dh_movefiles -p$(p_ssp64) \
+		$(PF)/lib64/libssp.so.*
+
+	debian/dh_doclink -p$(p_ssp64) $(p_lbase)
+
+	dh_strip -p$(p_ssp64)
+	dh_makeshlibs $(ldconfig_arg) -p$(p_ssp64) -V '$(p_ssp64) (>= $(DEB_SOVERSION))'
+#	dh_shlibdeps -p$(p_ssp64)
+	echo $(p_ssp64) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-lib32ssp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_ssp32)
+	dh_installdirs -p$(p_ssp32) \
+		$(lib32)
+	$(dh_compat2) dh_movefiles -p$(p_ssp32) \
+		$(lib32)/libssp.so.*
+
+	debian/dh_doclink -p$(p_ssp32) $(p_lbase)
+
+	dh_strip -p$(p_ssp32)
+	dh_makeshlibs $(ldconfig_arg) -p$(p_ssp32) -V '$(p_ssp32) (>= $(DEB_SOVERSION))'
+#	dh_shlibdeps -p$(p_ssp32)
+	echo $(p_ssp32) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libn32ssp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_sspn32)
+	dh_installdirs -p$(p_sspn32) \
+		$(PF)/$(libn32)
+	$(dh_compat2) dh_movefiles -p$(p_sspn32) \
+		$(PF)/$(libn32)/libssp.so.*
+
+	debian/dh_doclink -p$(p_sspn32) $(p_lbase)
+
+	dh_strip -p$(p_sspn32)
+	dh_makeshlibs $(ldconfig_arg) -p$(p_sspn32) -V '$(p_sspn32) (>= $(DEB_SOVERSION))'
+#	dh_shlibdeps -p$(p_sspn32)
+	echo $(p_sspn32) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libx32ssp: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_sspx32)
+	dh_installdirs -p$(p_sspx32) \
+		$(PF)/$(libx32)
+	$(dh_compat2) dh_movefiles -p$(p_sspx32) \
+		$(PF)/$(libx32)/libssp.so.*
+
+	debian/dh_doclink -p$(p_sspx32) $(p_lbase)
+
+	dh_strip -p$(p_sspx32)
+	dh_makeshlibs $(ldconfig_arg) -p$(p_sspx32) -V '$(p_sspx32) (>= $(DEB_SOVERSION))'
+#	dh_shlibdeps -p$(p_sspx32)
+	echo $(p_sspx32) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libstdcxx.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libstdcxx.mk
@@ -0,0 +1,527 @@
+ifeq ($(with_libcxx),yes)
+  $(lib_binaries)  += libstdcxx
+endif
+ifeq ($(with_lib64cxx),yes)
+  $(lib_binaries)  += lib64stdcxx
+endif
+ifeq ($(with_lib32cxx),yes)
+  $(lib_binaries)	+= lib32stdcxx
+endif
+ifeq ($(with_libn32cxx),yes)
+  $(lib_binaries)	+= libn32stdcxx
+endif
+ifeq ($(with_libx32cxx),yes)
+  $(lib_binaries)	+= libx32stdcxx
+endif
+ifeq ($(with_libhfcxx),yes)
+  $(lib_binaries)	+= libhfstdcxx
+endif
+ifeq ($(with_libsfcxx),yes)
+  $(lib_binaries)	+= libsfstdcxx
+endif
+
+ifneq ($(DEB_STAGE),rtlibs)
+  ifeq ($(with_lib64cxxdev),yes)
+    $(lib_binaries)	+= lib64stdcxx-dev
+  endif
+  ifeq ($(with_lib64cxxdbg),yes)
+    $(lib_binaries)	+= lib64stdcxxdbg
+  endif
+  ifeq ($(with_lib32cxxdev),yes)
+    $(lib_binaries)	+= lib32stdcxx-dev
+  endif
+  ifeq ($(with_lib32cxxdbg),yes)
+    $(lib_binaries)	+= lib32stdcxxdbg
+  endif
+  ifeq ($(with_libn32cxxdev),yes)
+    $(lib_binaries)	+= libn32stdcxx-dev
+  endif
+  ifeq ($(with_libn32cxxdbg),yes)
+    $(lib_binaries)	+= libn32stdcxxdbg
+  endif
+  ifeq ($(with_libx32cxxdev),yes)
+    $(lib_binaries)	+= libx32stdcxx-dev
+  endif
+  ifeq ($(with_libx32cxxdbg),yes)
+    $(lib_binaries)	+= libx32stdcxxdbg
+  endif
+  ifeq ($(with_libhfcxxdev),yes)
+    $(lib_binaries)	+= libhfstdcxx-dev
+  endif
+  ifeq ($(with_libhfcxxdbg),yes)
+    $(lib_binaries)	+= libhfstdcxxdbg
+  endif
+  ifeq ($(with_libsfcxxdev),yes)
+    $(lib_binaries)	+= libsfstdcxx-dev
+  endif
+  ifeq ($(with_libsfcxxdbg),yes)
+    $(lib_binaries)	+= libsfstdcxxdbg
+  endif
+
+  ifeq ($(with_cxxdev),yes)
+    $(lib_binaries)  += libstdcxx-dev
+    ifneq ($(DEB_CROSS),yes)
+      indep_binaries := $(indep_binaries) libstdcxx-doc
+    endif
+  endif
+endif
+
+libstdc_ext = -$(BASE_VERSION)
+
+p_lib	= libstdc++$(CXX_SONAME)$(cross_lib_arch)
+p_lib64	= lib64stdc++$(CXX_SONAME)$(cross_lib_arch)
+p_lib32	= lib32stdc++$(CXX_SONAME)$(cross_lib_arch)
+p_libn32= libn32stdc++$(CXX_SONAME)$(cross_lib_arch)
+p_libx32= libx32stdc++$(CXX_SONAME)$(cross_lib_arch)
+p_libhf	= libhfstdc++$(CXX_SONAME)$(cross_lib_arch)
+p_libsf	= libsfstdc++$(CXX_SONAME)$(cross_lib_arch)
+p_dev	= libstdc++$(libstdc_ext)-dev$(cross_lib_arch)
+p_pic	= libstdc++$(libstdc_ext)-pic$(cross_lib_arch)
+p_dbg	= libstdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbg64	= lib64stdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbg32	= lib32stdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbgn32= libn32stdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbgx32= libx32stdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbghf	= libhfstdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_dbgsf	= libsfstdc++$(CXX_SONAME)$(libstdc_ext)-dbg$(cross_lib_arch)
+p_libd	= libstdc++$(libstdc_ext)-doc
+
+d_lib	= debian/$(p_lib)
+d_lib64	= debian/$(p_lib64)
+d_lib32	= debian/$(p_lib32)
+d_libn32= debian/$(p_libn32)
+d_libx32= debian/$(p_libx32)
+d_libhf	= debian/$(p_libhf)
+d_libsf	= debian/$(p_libsf)
+d_dev	= debian/$(p_dev)
+d_pic	= debian/$(p_pic)
+d_dbg	= debian/$(p_dbg)
+d_dbg64	= debian/$(p_dbg64)
+d_dbg32	= debian/$(p_dbg32)
+d_dbghf	= debian/$(p_dbghf)
+d_dbgsf	= debian/$(p_dbgsf)
+d_libd	= debian/$(p_libd)
+
+dirs_dev = \
+	$(docdir)/$(p_base)/C++ \
+	$(usr_lib) \
+	$(gcc_lib_dir)/include \
+	$(PFL)/include/c++
+
+files_dev = \
+	$(PFL)/include/c++/$(BASE_VERSION) \
+	$(gcc_lib_dir)/libstdc++.{a,so} \
+	$(gcc_lib_dir)/libsupc++.a \
+	$(gcc_lib_dir)/libstdc++fs.a
+
+ifeq ($(with_multiarch_cxxheaders),yes)
+  dirs_dev += \
+	$(PF)/include/$(DEB_TARGET_MULTIARCH)/c++/$(BASE_VERSION)
+  files_dev += \
+	$(PF)/include/$(DEB_TARGET_MULTIARCH)/c++/$(BASE_VERSION)/{bits,ext}
+endif
+
+dirs_dbg = \
+	$(docdir) \
+	$(PF)/lib/debug/$(usr_lib) \
+	$(usr_lib)/debug \
+	$(PF)/share/gdb/auto-load/$(usr_lib)/debug \
+	$(gcc_lib_dir)
+files_dbg = \
+	$(usr_lib)/debug/libstdc++.{a,so*} \
+	$(usr_lib)/debug/libstdc++fs.a
+
+dirs_pic = \
+	$(docdir) \
+	$(gcc_lib_dir)
+files_pic = \
+	$(gcc_lib_dir)/libstdc++_pic.a
+
+# ----------------------------------------------------------------------
+
+gxx_baseline_dir = $(shell \
+			sed -n '/^baseline_dir *=/s,.*= *\(.*\)$$,\1,p' \
+			    $(buildlibdir)/libstdc++-v3/testsuite/Makefile)
+gxx_baseline_file = $(gxx_baseline_dir)/baseline_symbols.txt
+
+debian/README.libstdc++-baseline:
+	cat debian/README.libstdc++-baseline.in \
+		> debian/README.libstdc++-baseline
+
+	baseline_name=`basename $(gxx_baseline_dir)`; \
+	baseline_parentdir=`dirname $(gxx_baseline_dir)`; \
+	compat_baseline_name=""; \
+	if [ -f "$(gxx_baseline_file)" ]; then \
+	  ( \
+	    echo "A baseline file for $$baseline_name was found."; \
+	    echo "Running the check-abi script ..."; \
+	    echo ""; \
+	    $(MAKE) -C $(buildlibdir)/libstdc++-v3/testsuite \
+		check-abi; \
+	  ) >> debian/README.libstdc++-baseline; \
+	else \
+	  ( \
+	    echo "No baseline file found for $$baseline_name."; \
+	    echo "Generating a new baseline file ..."; \
+	    echo ""; \
+	  ) >> debian/README.libstdc++-baseline; \
+	  mkdir -p $(gxx_baseline_dir); \
+	  $(MAKE) -C $(buildlibdir)/libstdc++-v3/testsuite new-abi-baseline; \
+	  if [ -f $(gxx_baseline_file) ]; then \
+	    cat $(gxx_baseline_file); \
+	  else \
+	    cat $$(find $(buildlibdir)/libstdc++-v3 $(srcdir)/libstdc++-v3 -name '.new') || true; \
+	  fi >> debian/README.libstdc++-baseline; \
+	fi
+
+# ----------------------------------------------------------------------
+# FIXME: see #792204, libstdc++ symbols on sparc64, for now ignore errors
+# for the 32bit multilib build
+
+define __do_libstdcxx
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l)
+
+	dh_installdirs -p$(p_l) \
+		$(docdir) \
+		$(usr_lib$(2)) \
+		$(PF)/share/gdb/auto-load/$(usr_lib$(2))
+
+	$(if $(DEB_CROSS),,$(if $(2),,
+	dh_installdirs -p$(p_l) \
+		$(PF)/share/gcc-$(BASE_VERSION)/python
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(PF)/share/gcc-$(BASE_VERSION)/python/libstdcxx
+	))
+	cp -p $(d)/$(usr_lib$(2))/libstdc++.so.*.py \
+		$(d_l)/$(PF)/share/gdb/auto-load/$(usr_lib$(2))/.
+	sed -i -e "/^libdir *=/s,=.*,= '/$(usr_lib$(2))'," \
+		$(d_l)/$(PF)/share/gdb/auto-load/$(usr_lib$(2))/libstdc++.so.*.py
+
+	cp -a $(d)/$(usr_lib$(2))/libstdc++.so.*[0-9] \
+		$(d_l)/$(usr_lib$(2))/.
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_rmemptydirs -p$(p_l)
+
+	dh_strip -p$(p_l) $(if $(filter rtlibs,$(DEB_STAGE)),,--dbg-package=$(1)-$(BASE_VERSION)-dbg$(cross_lib_arch))
+
+	$(if $(filter $(DEB_TARGET_ARCH), armel hppa sparc64), \
+	  -$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l) \
+	  @echo "FIXME: libstdc++ not feature complete (https://gcc.gnu.org/ml/gcc/2014-07/msg00000.html)", \
+	  $(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l) \
+	)
+
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,$(subst stdc++$(CXX_SONAME),gcc$(GCC_SONAME),$(p_l)),$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+define __do_libstdcxx_dbg
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_d)
+	dh_installdirs -p$(p_d) \
+		$(PF)/lib/debug/$(usr_lib$(2)) \
+		$(usr_lib$(2))
+
+	$(if $(filter yes,$(with_lib$(2)cxx)),
+		cp -a $(d)/$(usr_lib$(2))/libstdc++.so.*[0-9] \
+			$(d_d)/$(usr_lib$(2))/.;
+		dh_strip -p$(p_d) --keep-debug;
+		$(if $(filter yes,$(with_common_libs)),, # if !with_common_libs
+			# remove the debug symbols for libstdc++
+			# built by a newer version of GCC
+			rm -rf $(d_d)/usr/lib/debug/$(PF);
+		)
+		rm -f $(d_d)/$(usr_lib$(2))/libstdc++.so.*[0-9]
+	)
+
+	$(if $(filter yes,$(with_cxx_debug)),
+		mkdir -p $(d_d)/$(usr_lib$(2))/debug;
+		mv $(d)/$(usr_lib$(2))/debug/libstdc++* $(d_d)/$(usr_lib$(2))/debug;
+		rm -f $(d_d)/$(usr_lib$(2))/debug/libstdc++_pic.a
+	)
+
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_d) \
+		$(call shlibdirs_to_search,$(subst $(pkg_ver),,$(subst stdc++$(CXX_SONAME),gcc$(GCC_SONAME),$(p_l))),$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_d))
+
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+	debian/dh_rmemptydirs -p$(p_d)
+	echo $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+define __do_libstdcxx_dev
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	mv $(d)/$(usr_lib$(2))/libstdc++.a $(d)/$(usr_lib$(2))/libstdc++fs.a $(d)/$(usr_lib$(2))/libsupc++.a \
+		$(d)/$(gcc_lib_dir$(2))/
+
+	rm -rf $(d_l)
+	dh_installdirs -p$(p_l) $(gcc_lib_dir$(2))
+
+	$(dh_compat2) dh_movefiles -p$(p_l) \
+		$(gcc_lib_dir$(2))/libstdc++.a \
+		$(gcc_lib_dir$(2))/libstdc++fs.a \
+		$(gcc_lib_dir$(2))/libsupc++.a \
+		$(if $(with_multiarch_cxxheaders),$(PF)/include/$(DEB_TARGET_MULTIARCH)/c++/$(BASE_VERSION)/$(2))
+	$(call install_gcc_lib,libstdc++,$(CXX_SONAME),$(2),$(p_l))
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_rmemptydirs -p$(p_l)
+	dh_strip -p$(p_l)
+	dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search,$(subst stdc++$(CXX_SONAME),gcc$(GCC_SONAME),$(p_l)),$(2))
+	echo $(p_l) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+do_libstdcxx = $(call __do_libstdcxx,lib$(1)stdc++$(CXX_SONAME),$(1))
+do_libstdcxx_dbg = $(call __do_libstdcxx_dbg,lib$(1)stdc++$(CXX_SONAME)$(libstdc_ext),$(1))
+do_libstdcxx_dev = $(call __do_libstdcxx_dev,lib$(1)stdc++-$(BASE_VERSION)-dev,$(1))
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-libstdcxx: $(install_stamp)
+	$(call do_libstdcxx,)
+
+$(binary_stamp)-lib64stdcxx: $(install_stamp)
+	$(call do_libstdcxx,64)
+
+$(binary_stamp)-lib32stdcxx: $(install_stamp)
+	$(call do_libstdcxx,32)
+
+$(binary_stamp)-libn32stdcxx: $(install_stamp)
+	$(call do_libstdcxx,n32)
+
+$(binary_stamp)-libx32stdcxx: $(install_stamp)
+	$(call do_libstdcxx,x32)
+
+$(binary_stamp)-libhfstdcxx: $(install_stamp)
+	$(call do_libstdcxx,hf)
+
+$(binary_stamp)-libsfstdcxx: $(install_stamp)
+	$(call do_libstdcxx,sf)
+
+$(binary_stamp)-lib64stdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,64)
+
+$(binary_stamp)-lib32stdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,32)
+
+$(binary_stamp)-libn32stdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,n32)
+
+$(binary_stamp)-libx32stdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,x32)
+
+$(binary_stamp)-libhfstdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,hf)
+
+$(binary_stamp)-libsfstdcxxdbg: $(install_stamp)
+	$(call do_libstdcxx_dbg,sf)
+
+$(binary_stamp)-lib64stdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,64)
+
+$(binary_stamp)-lib32stdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,32)
+
+$(binary_stamp)-libn32stdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,n32)
+
+$(binary_stamp)-libx32stdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,x32)
+
+$(binary_stamp)-libhfstdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,hf)
+
+$(binary_stamp)-libsfstdcxx-dev: $(install_stamp)
+	$(call do_libstdcxx_dev,sf)
+
+# ----------------------------------------------------------------------
+libcxxdev_deps = $(install_stamp)
+ifeq ($(with_libcxx),yes)
+  libcxxdev_deps += $(binary_stamp)-libstdcxx
+endif
+ifeq ($(with_check),yes)
+  libcxxdev_deps += debian/README.libstdc++-baseline
+endif
+$(binary_stamp)-libstdcxx-dev: $(libcxxdev_deps)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_dev) $(d_pic)
+	dh_installdirs -p$(p_dev) $(dirs_dev)
+	dh_installdirs -p$(p_pic) $(dirs_pic)
+	dh_installdirs -p$(p_dbg) $(dirs_dbg)
+
+	: # - correct libstdc++-v3 file locations
+	mv $(d)/$(usr_lib)/libsupc++.a $(d)/$(gcc_lib_dir)/
+	mv $(d)/$(usr_lib)/libstdc++fs.a $(d)/$(gcc_lib_dir)/
+	mv $(d)/$(usr_lib)/libstdc++.{a,so} $(d)/$(gcc_lib_dir)/
+	ln -sf ../../../$(DEB_TARGET_GNU_TYPE)/libstdc++.so.$(CXX_SONAME) \
+		$(d)/$(gcc_lib_dir)/libstdc++.so
+	mv $(d)/$(usr_lib)/libstdc++_pic.a $(d)/$(gcc_lib_dir)/
+
+	rm -f $(d)/$(usr_lib)/debug/libstdc++_pic.a
+	rm -f $(d)/$(usr_lib64)/debug/libstdc++_pic.a
+
+	: # remove precompiled headers
+	-find $(d) -type d -name '*.gch' | xargs rm -rf
+
+	for i in $(d)/$(PF)/include/c++/$(GCC_VERSION)/*-linux; do \
+	  if [ -d $$i ]; then mv $$i $$i-gnu; fi; \
+	done
+
+	$(dh_compat2) dh_movefiles -p$(p_dev) $(files_dev)
+	$(dh_compat2) dh_movefiles -p$(p_pic) $(files_pic)
+ifeq ($(with_cxx_debug),yes)
+	$(dh_compat2) dh_movefiles -p$(p_dbg) $(files_dbg)
+endif
+
+	dh_link -p$(p_dev) \
+		/$(usr_lib)/libstdc++.so.$(CXX_SONAME) \
+		/$(gcc_lib_dir)/libstdc++.so \
+		/$(PFL)/include/c++/$(BASE_VERSION) /$(PFL)/include/c++/$(GCC_VERSION)
+ifeq ($(with_multiarch_cxxheaders),yes)
+	dh_link -p$(p_dev) \
+		/$(PFL)/include/$(DEB_TARGET_MULTIARCH)/c++/$(BASE_VERSION) \
+		/$(PFL)/include/$(DEB_TARGET_MULTIARCH)/c++/$(GCC_VERSION)
+endif
+
+	debian/dh_doclink -p$(p_dev) $(p_lbase)
+	debian/dh_doclink -p$(p_pic) $(p_lbase)
+	debian/dh_doclink -p$(p_dbg) $(p_lbase)
+	cp -p $(srcdir)/libstdc++-v3/ChangeLog \
+		$(d_dev)/$(docdir)/$(p_base)/C++/changelog.libstdc++
+ifeq ($(with_check),yes)
+	cp -p debian/README.libstdc++-baseline \
+		$(d_dev)/$(docdir)/$(p_base)/C++/README.libstdc++-baseline.$(DEB_TARGET_ARCH)
+	if [ -f $(buildlibdir)/libstdc++-v3/testsuite/current_symbols.txt ]; \
+	then \
+	  cp -p $(buildlibdir)/libstdc++-v3/testsuite/current_symbols.txt \
+	    $(d_dev)/$(docdir)/$(p_base)/C++/libstdc++_symbols.txt.$(DEB_TARGET_ARCH); \
+	fi
+endif
+	cp -p $(buildlibdir)/libstdc++-v3/src/libstdc++-symbols.ver \
+		$(d_pic)/$(gcc_lib_dir)/libstdc++_pic.map
+
+	cp -p $(d)/$(usr_lib)/libstdc++.so.*.py \
+		$(d_dbg)/$(PF)/share/gdb/auto-load/$(usr_lib)/debug/.
+	sed -i -e "/^libdir *=/s,=.*,= '/$(usr_lib)'," \
+		$(d_dbg)/$(PF)/share/gdb/auto-load/$(usr_lib)/debug/libstdc++.so.*.py
+
+ifeq ($(with_libcxx),yes)
+	cp -a $(d)/$(usr_lib)/libstdc++.so.*[0-9] \
+		$(d_dbg)/$(usr_lib)/
+	dh_strip -p$(p_dbg) --keep-debug
+	rm -f $(d_dbg)/$(usr_lib)/libstdc++.so.*[0-9]
+endif
+
+	dh_strip -p$(p_dev) --dbg-package=$(p_dbg)
+ifneq ($(with_common_libs),yes)
+	: # remove the debug symbols for libstdc++ built by a newer version of GCC
+	rm -rf $(d_dbg)/usr/lib/debug/$(PF)
+endif
+	dh_strip -p$(p_pic)
+
+ifeq ($(with_cxxdev),yes)
+	debian/dh_rmemptydirs -p$(p_dev)
+	debian/dh_rmemptydirs -p$(p_pic)
+	debian/dh_rmemptydirs -p$(p_dbg)
+endif
+
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_dev) -p$(p_pic) -p$(p_dbg) \
+		$(call shlibdirs_to_search,,) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_dbg))
+	echo $(p_dev) $(p_pic) $(p_dbg) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+# ----------------------------------------------------------------------
+
+doxygen_doc_dir = $(buildlibdir)/libstdc++-v3/doc
+
+doxygen-docs: $(build_doxygen_stamp)
+$(build_doxygen_stamp): $(build_stamp)
+	$(MAKE) -C $(buildlibdir)/libstdc++-v3/doc SHELL=/bin/bash doc-html-doxygen
+	$(MAKE) -C $(buildlibdir)/libstdc++-v3/doc SHELL=/bin/bash doc-man-doxygen
+	-find $(doxygen_doc_dir)/doxygen/html -name 'struct*' -empty | xargs rm -f
+
+	touch $@
+
+$(binary_stamp)-libstdcxx-doc: $(install_stamp) doxygen-docs
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_libd)
+	dh_installdirs -p$(p_libd) \
+		$(docdir)/$(p_base)/libstdc++ \
+		$(PF)/share/man
+
+#	debian/dh_doclink -p$(p_libd) $(p_base)
+	dh_link -p$(p_libd) /usr/share/doc/$(p_base) /usr/share/doc/$(p_libd)
+	dh_installdocs -p$(p_libd)
+	rm -f $(d_libd)/$(docdir)/$(p_base)/copyright
+
+	cp -a $(srcdir)/libstdc++-v3/doc/html/* \
+		$(d_libd)/$(docdir)/$(p_base)/libstdc++/.
+	cp -a $(doxygen_doc_dir)/doxygen/html \
+		$(d_libd)/$(docdir)/$(p_base)/libstdc++/user
+	find $(d_libd)/$(docdir)/$(p_base)/libstdc++ -name '*.md5' \
+		| xargs -r rm -f
+
+# Broken docs ... see #766499
+#	rm -f $(d_libd)/$(docdir)/$(p_base)/libstdc++/*/jquery.js
+#	dh_link -p$(p_libd) \
+#		/usr/share/javascript/jquery/jquery.js \
+#		/$(docdir)/$(p_base)/libstdc++/html/jquery.js \
+#		/usr/share/javascript/jquery/jquery.js \
+#		/$(docdir)/$(p_base)/libstdc++/user/jquery.js
+
+	: FIXME: depending on the doxygen version
+	if [ -d $(doxygen_doc_dir)/doxygen/man/man3cxx ]; then \
+	  cp -a $(doxygen_doc_dir)/doxygen/man/man3cxx \
+	    $(d_libd)/$(PF)/share/man/man3; \
+	  if [ -d $(doxygen_doc_dir)/doxygen/man/man3 ]; then \
+	    cp -a $(doxygen_doc_dir)/doxygen/man/man3/* \
+	      $(d_libd)/$(PF)/share/man/man3/; \
+	  fi; \
+	elif [ -d $(doxygen_doc_dir)/doxygen/man/man3 ]; then \
+	  cp -a $(doxygen_doc_dir)/doxygen/man/man3 \
+	    $(d_libd)/$(PF)/share/man/man3; \
+	fi
+
+	for i in $(d_libd)/$(PF)/share/man/man3/*.3; do \
+	  [ -f $${i} ] || continue; \
+	  mv $${i} $${i}cxx; \
+	done
+	rm -f $(d_libd)/$(PF)/share/man/man3/todo.3*
+
+	mkdir -p $(d_libd)/usr/share/lintian/overrides
+	cp -p debian/$(p_libd).overrides \
+		$(d_libd)/usr/share/lintian/overrides/$(p_libd)
+
+	echo $(p_libd) >> debian/indep_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libtsan.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libtsan.mk
@@ -0,0 +1,78 @@
+$(lib_binaries)  += libtsan
+ifeq (0,1)
+ifeq ($(with_lib64tsan),yes)
+  $(lib_binaries)  += lib64tsan
+endif
+ifeq ($(with_lib32tsan),yes)
+  $(lib_binaries)	+= lib32tsan
+endif
+ifeq ($(with_libn32tsan),yes)
+  $(lib_binaries)	+= libn32tsan
+endif
+ifeq ($(with_libx32tsan),yes)
+  $(lib_binaries)	+= libx32tsan
+endif
+ifeq ($(with_libhftsan),yes)
+  $(lib_binaries)	+= libhftsan
+endif
+ifeq ($(with_libsftsan),yes)
+  $(lib_binaries)	+= libsftsan
+endif
+endif
+
+define __do_tsan
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libtsan.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst tsan$(TSAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst tsan$(TSAN_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_tsan = $(call __do_tsan,lib$(1)tsan$(TSAN_SONAME),$(1))
+
+$(binary_stamp)-libtsan: $(install_stamp)
+	$(call do_tsan,)
+
+$(binary_stamp)-lib64tsan: $(install_stamp)
+	$(call do_tsan,64)
+
+$(binary_stamp)-lib32tsan: $(install_stamp)
+	$(call do_tsan,32)
+
+$(binary_stamp)-libn32tsan: $(install_stamp)
+	$(call do_tsan,n32)
+
+$(binary_stamp)-libx32tsan: $(install_stamp)
+	$(call do_tsan,x32)
+
+$(binary_stamp)-libhftsan: $(install_dependencies)
+	$(call do_tsan,hf)
+
+$(binary_stamp)-libsftsan: $(install_dependencies)
+	$(call do_tsan,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libubsan.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libubsan.mk
@@ -0,0 +1,76 @@
+$(lib_binaries)  += libubsan
+ifeq ($(with_lib64ubsan),yes)
+  $(lib_binaries)  += lib64ubsan
+endif
+ifeq ($(with_lib32ubsan),yes)
+  $(lib_binaries)	+= lib32ubsan
+endif
+ifeq ($(with_libn32ubsan),yes)
+  $(lib_binaries)	+= libn32ubsan
+endif
+ifeq ($(with_libx32ubsan),yes)
+  $(lib_binaries)	+= libx32ubsan
+endif
+ifeq ($(with_libhfubsan),yes)
+  $(lib_binaries)	+= libhfubsan
+endif
+ifeq ($(with_libsfubsan),yes)
+  $(lib_binaries)	+= libsfubsan
+endif
+
+define __do_ubsan
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libubsan.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst ubsan$(UBSAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst ubsan$(UBSAN_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_ubsan = $(call __do_ubsan,lib$(1)ubsan$(UBSAN_SONAME),$(1))
+
+$(binary_stamp)-libubsan: $(install_stamp)
+	$(call do_ubsan,)
+
+$(binary_stamp)-lib64ubsan: $(install_stamp)
+	$(call do_ubsan,64)
+
+$(binary_stamp)-lib32ubsan: $(install_stamp)
+	$(call do_ubsan,32)
+
+$(binary_stamp)-libn32ubsan: $(install_stamp)
+	$(call do_ubsan,n32)
+
+$(binary_stamp)-libx32ubsan: $(install_stamp)
+	$(call do_ubsan,x32)
+
+$(binary_stamp)-libhfubsan: $(install_dependencies)
+	$(call do_ubsan,hf)
+
+$(binary_stamp)-libsfubsan: $(install_dependencies)
+	$(call do_ubsan,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-libvtv.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-libvtv.mk
@@ -0,0 +1,76 @@
+$(lib_binaries)  += libvtv
+ifeq ($(with_lib64vtv),yes)
+  $(lib_binaries)  += lib64vtv
+endif
+ifeq ($(with_lib32vtv),yes)
+  $(lib_binaries)	+= lib32vtv
+endif
+ifeq ($(with_libn32vtv),yes)
+  $(lib_binaries)	+= libn32vtv
+endif
+ifeq ($(with_libx32vtv),yes)
+  $(lib_binaries)	+= libx32vtv
+endif
+ifeq ($(with_libhfvtv),yes)
+  $(lib_binaries)	+= libhfvtv
+endif
+ifeq ($(with_libsfvtv),yes)
+  $(lib_binaries)	+= libsfvtv
+endif
+
+define __do_vtv
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_l) $(d_d)
+	dh_installdirs -p$(p_l) $(usr_lib$(2))
+	$(dh_compat2) dh_movefiles -p$(p_l) $(usr_lib$(2))/libvtv.so.*
+
+	debian/dh_doclink -p$(p_l) $(p_lbase)
+	debian/dh_doclink -p$(p_d) $(p_lbase)
+
+	if [ -f debian/$(p_l).overrides ]; then \
+		mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \
+		cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \
+	fi
+
+	dh_strip -p$(p_l) --dbg-package=$(p_d)
+	$(cross_makeshlibs) dh_makeshlibs $(ldconfig_arg) -p$(p_l)
+	$(call cross_mangle_shlibs,$(p_l))
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \
+		$(call shlibdirs_to_search, \
+			$(subst vtv$(VTV_SONAME),gcc$(GCC_SONAME),$(p_l)) \
+			$(subst vtv$(VTV_SONAME),stdc++$(CXX_SONAME),$(p_l)) \
+		,$(2)) \
+		$(if $(filter yes, $(with_common_libs)),,-- -Ldebian/shlibs.common$(2))
+	$(call cross_mangle_substvars,$(p_l))
+	echo $(p_l) $(p_d) >> debian/$(lib_binaries)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+endef
+
+# ----------------------------------------------------------------------
+
+do_vtv = $(call __do_vtv,lib$(1)vtv$(VTV_SONAME),$(1))
+
+$(binary_stamp)-libvtv: $(install_stamp)
+	$(call do_vtv,)
+
+$(binary_stamp)-lib64vtv: $(install_stamp)
+	$(call do_vtv,64)
+
+$(binary_stamp)-lib32vtv: $(install_stamp)
+	$(call do_vtv,32)
+
+$(binary_stamp)-libn32vtv: $(install_stamp)
+	$(call do_vtv,n32)
+
+$(binary_stamp)-libx32vtv: $(install_stamp)
+	$(call do_vtv,x32)
+
+$(binary_stamp)-libhfvtv: $(install_dependencies)
+	$(call do_vtv,hf)
+
+$(binary_stamp)-libsfvtv: $(install_dependencies)
+	$(call do_vtv,sf)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-neon.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-neon.mk
@@ -0,0 +1,47 @@
+arch_binaries  := $(arch_binaries) neon
+
+p_nlgcc		= libgcc$(GCC_SONAME)-neon
+p_ngomp		= libgomp$(GOMP_SONAME)-neon
+p_nlobjc	= libobjc$(OBJC_SONAME)-neon
+p_nflib		= libgfortran$(FORTRAN_SONAME)-neon
+p_nlcxx		= libstdc++$(CXX_SONAME)-neon
+
+d_nlgcc		= debian/$(p_nlgcc)
+d_ngomp		= debian/$(p_ngomp)
+d_nlobjc	= debian/$(p_nlobjc)
+d_nflib		= debian/$(p_nflib)
+d_nlcxx		= debian/$(p_nlcxx)
+
+neon_pkgs = -p$(p_nlgcc) -p$(p_ngomp) -p$(p_nlobjc) -p$(p_nflib) -p$(p_nlcxx)
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-neon: $(install_neon_stamp)
+	dh_testdir
+	dh_testroot
+
+	dh_installdirs -p$(p_nlgcc) \
+		$(PF)/share/doc \
+		lib/neon
+	dh_installdirs -A -p$(p_ngomp) -p$(p_nlobjc) -p$(p_nflib) -p$(p_nlcxx) \
+		$(PF)/share/doc \
+		$(PF)/lib/neon
+
+	cp -a $(d_neon)/$(PF)/lib/libgcc*.so.* \
+		$(d_nlgcc)/lib/neon/
+	cp -a $(d_neon)/$(PF)/lib/libgomp*.so.* \
+		$(d_ngomp)/$(PF)/lib/neon/
+	cp -a $(d_neon)/$(PF)/lib/libobjc*.so.* \
+		$(d_nlobjc)/$(PF)/lib/neon/
+	cp -a $(d_neon)/$(PF)/lib/libgfortran*.so.* \
+		$(d_nflib)/$(PF)/lib/neon/
+	cp -a $(d_neon)/$(PF)/lib/libstdc++*.so.* \
+		$(d_nlcxx)/$(PF)/lib/neon/
+
+	for p in $(p_nlgcc) $(p_ngomp) $(p_nlobjc) $(p_nflib) $(p_nlcxx); do \
+	  ln -s ../$(p_base) debian/$$p/usr/share/doc/$$p; \
+	done
+	dh_strip $(neon_pkgs)
+	dh_shlibdeps $(neon_pkgs)
+	echo $(p_nlgcc) $(p_ngomp) $(p_nlobjc) $(p_nflib) $(p_nlcxx) >> debian/arch_binaries
+
+	touch $@
--- gcc-5-5.4.0.orig/debian/rules.d/binary-nof.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-nof.mk
@@ -0,0 +1,51 @@
+arch_binaries  := $(arch_binaries) nof
+
+p_nof  = gcc$(pkg_ver)-nof
+d_nof  = debian/$(p_nof)
+
+dirs_nof = \
+	$(docdir) \
+	$(usr_lib)/nof
+ifeq ($(with_cdev),yes)
+  dirs_nof += \
+	$(gcc_lib_dir)/nof
+endif
+
+ifeq ($(with_cdev),yes)
+  files_nof = \
+	$(libgcc_dir)/libgcc_s_nof.so.$(GCC_SONAME) \
+	$(gcc_lib_dir)/libgcc_s_nof.so \
+	$(usr_lib)/nof \
+	$(gcc_lib_dir)/nof
+else
+  files_nof = \
+	$(usr_lib)/libgcc_s_nof.so.$(GCC_SONAME)
+endif
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-nof: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	mv $(d)/$(usr_lib)/libgcc_s_nof.so.$(GCC_SONAME) $(d)/$(libgcc_dir)/.
+	rm -f $(d)/$(usr_lib)/libgcc_s_nof.so
+	ln -sf $(libgcc_dir)/libgcc_s_nof.so.$(GCC_SONAME) \
+		$(d)/$(gcc_lib_dir)/libgcc_s_nof.so
+
+	rm -rf $(d_nof)
+	dh_installdirs -p$(p_nof) $(dirs_nof)
+	$(dh_compat2) dh_movefiles -p$(p_nof) $(files_nof)
+	debian/dh_doclink -p$(p_nof) $(p_xbase)
+	dh_strip -p$(p_nof)
+	dh_shlibdeps -p$(p_nof)
+
+	dh_makeshlibs $(ldconfig_arg) -p$(p_nof)
+	: # Only keep the shlibs file for the libgcc_s_nof library
+	fgrep libgcc_s_nof debian/$(p_nof)/DEBIAN/shlibs \
+		> debian/$(p_nof)/DEBIAN/shlibs.tmp
+	mv -f debian/$(p_nof)/DEBIAN/shlibs.tmp debian/$(p_nof)/DEBIAN/shlibs
+
+	echo $(p_nof) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-objc.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-objc.mk
@@ -0,0 +1,67 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) objc-multi
+  endif
+  arch_binaries := $(arch_binaries) objc
+endif
+
+p_objc	= gobjc$(pkg_ver)$(cross_bin_arch)
+d_objc	= debian/$(p_objc)
+
+p_objc_m= gobjc$(pkg_ver)-multilib$(cross_bin_arch)
+d_objc_m= debian/$(p_objc_m)
+
+dirs_objc = \
+	$(docdir)/$(p_xbase)/ObjC \
+	$(gcc_lexec_dir)
+
+files_objc = \
+	$(gcc_lexec_dir)/cc1obj
+
+$(binary_stamp)-objc: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_objc)
+	dh_installdirs -p$(p_objc) $(dirs_objc)
+	$(dh_compat2) dh_movefiles -p$(p_objc) $(files_objc)
+
+	cp -p $(srcdir)/libobjc/{README*,THREADS*} \
+		$(d_objc)/$(docdir)/$(p_xbase)/ObjC/.
+
+	cp -p $(srcdir)/libobjc/ChangeLog \
+		$(d_objc)/$(docdir)/$(p_xbase)/ObjC/changelog.libobjc
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_objc)/usr/share/lintian/overrides
+	echo '$(p_objc) binary: binary-without-manpage' \
+	  >> $(d_objc)/usr/share/lintian/overrides/$(p_objc)
+endif
+
+	debian/dh_doclink -p$(p_objc) $(p_xbase)
+
+	debian/dh_rmemptydirs -p$(p_objc)
+
+	dh_strip -p$(p_objc) \
+	  $(if $(unstripped_exe),-X/cc1obj)
+	dh_shlibdeps -p$(p_objc)
+	echo $(p_objc) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-objc-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_objc_m)
+	dh_installdirs -p$(p_objc_m) $(docdir)
+
+	debian/dh_doclink -p$(p_objc_m) $(p_xbase)
+
+	dh_strip -p$(p_objc_m)
+	dh_shlibdeps -p$(p_objc_m)
+	echo $(p_objc_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-objcxx.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-objcxx.mk
@@ -0,0 +1,60 @@
+ifneq ($(DEB_STAGE),rtlibs)
+  ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+    arch_binaries  := $(arch_binaries) objcxx-multi
+  endif
+  arch_binaries := $(arch_binaries) objcxx
+endif
+
+p_objcx		= gobjc++$(pkg_ver)$(cross_bin_arch)
+d_objcx		= debian/$(p_objcx)
+
+p_objcx_m	= gobjc++$(pkg_ver)-multilib$(cross_bin_arch)
+d_objcx_m	= debian/$(p_objcx_m)
+
+dirs_objcx = \
+	$(docdir)/$(p_xbase)/Obj-C++ \
+	$(gcc_lexec_dir)
+
+files_objcx = \
+	$(gcc_lexec_dir)/cc1objplus
+
+$(binary_stamp)-objcxx: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_objcx)
+	dh_installdirs -p$(p_objcx) $(dirs_objcx)
+	$(dh_compat2) dh_movefiles -p$(p_objcx) $(files_objcx)
+
+	debian/dh_doclink -p$(p_objcx) $(p_xbase)
+	cp -p $(srcdir)/gcc/objcp/ChangeLog \
+		$(d_objcx)/$(docdir)/$(p_xbase)/Obj-C++/changelog
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	mkdir -p $(d_objcx)/usr/share/lintian/overrides
+	echo '$(p_objcx) binary: binary-without-manpage' \
+	  >> $(d_objcx)/usr/share/lintian/overrides/$(p_objcx)
+endif
+
+	debian/dh_rmemptydirs -p$(p_objcx)
+
+	dh_strip -p$(p_objcx) \
+	  $(if $(unstripped_exe),-X/cc1objplus)
+	dh_shlibdeps -p$(p_objcx)
+	echo $(p_objcx) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
+
+$(binary_stamp)-objcxx-multi: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+	rm -rf $(d_objcx_m)
+	debian/dh_doclink -p$(p_objcx_m) $(p_xbase)
+	debian/dh_rmemptydirs -p$(p_objcx_m)
+	dh_strip -p$(p_objcx_m)
+	dh_shlibdeps -p$(p_objcx_m)
+	echo $(p_objcx_m) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-snapshot.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-snapshot.mk
@@ -0,0 +1,232 @@
+arch_binaries  := $(arch_binaries) snapshot
+
+ifneq (,$(findstring gcc-snapshot, $(PKGSOURCE)))
+  p_snap = gcc-snapshot
+else ifneq (,$(findstring gcc-linaro, $(PKGSOURCE)))
+  p_snap = gcc-linaro
+else
+  $(error unknown build for single gcc package)
+endif
+
+ifeq ($(DEB_CROSS),yes)
+  p_snap := $(p_snap)$(cross_bin_arch)
+endif
+d_snap	= debian/$(p_snap)
+
+dirs_snap = \
+	$(docdir)/$(p_snap) \
+	usr/lib
+
+ifeq ($(with_hppa64),yes)
+  snapshot_depends = binutils-hppa64
+endif
+
+$(stampdir)/ecj_binaries: $(install_snap_stamp)
+	mkdir -p $(builddir)/aot/jar $(builddir)/aot/bin
+	cp $(ecj_jar) $(builddir)/aot/jar/ecj-standalone.jar
+	zip -d $(builddir)/aot/jar/ecj-standalone.jar \
+		'org/eclipse/jdt/core/JDTCompilerAdapter*'
+
+	cd $(builddir)/aot/jar \
+	  && fastjar xf ecj-standalone.jar \
+	  && find -name '*.rsc' -o -name '*.properties' \
+		| fastjar -c -@ - -f ../resources.jar
+	rm -rf $(builddir)/aot/jar/META-INF $(builddir)/aot/jar/org
+	$(d)/$(PF)/bin/gcj \
+	    -c -O2 -g -fPIC -fjni -findirect-dispatch \
+	    -o $(builddir)/aot/bin/resources.o $(builddir)/aot/resources.jar
+
+	cp $(srcdir)/libjava/contrib/classfile.py $(builddir)/aot/
+	cp $(buildlibdir)/libjava/contrib/*.py $(builddir)/aot/
+	grep -v '^sys.path.insert' $(buildlibdir)/libjava/contrib/aot-compile \
+	    > $(builddir)/aot/aot-compile
+	chmod 755 $(builddir)/aot/aot-compile
+	patch -p1 < debian/patches/aotcompile.diff
+	LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(CURDIR)/$(d)/$(PF)/lib \
+	RPATH=-Wl,-rpath,/$(PF)/lib \
+	PYTHONPATH=$(builddir)/aot \
+	  python $(builddir)/aot/aot-compile \
+	    --gcj=$(CURDIR)/$(d)/$(PF)/bin/gcj \
+	    --dbtool=$(CURDIR)/$(d)/$(PF)/bin/gcj-dbtool \
+	    $(builddir)/aot/jar $(builddir)/aot/bin
+	touch $@
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-snapshot: $(install_snap_stamp) \
+    $(if $(filter $(with_ecj),yes),$(stampdir)/ecj_binaries)
+	dh_testdir
+	dh_testroot
+	mv $(install_snap_stamp) $(install_snap_stamp)-tmp
+
+	rm -rf $(d_snap)
+	dh_installdirs -p$(p_snap) $(dirs_snap)
+
+	mv $(d)/$(PF) $(d_snap)/usr/lib/
+
+	find $(d_snap) -name '*.gch' -type d | xargs -r rm -rf
+	find $(d_snap) -name '*.la' -o -name '*.lai' | xargs -r rm -f
+
+	: # FIXME: libbacktrace is not installed by default
+	for d in . 32 n32 64 sf hf; do \
+	  if [ -f $(buildlibdir)/$$d/libbacktrace/.libs/libbacktrace.a ]; then \
+	    install -m644 $(buildlibdir)/$$d/libbacktrace/.libs/libbacktrace.a \
+	      $(d_snap)/$(gcc_lib_dir)/$$d; \
+	  fi; \
+	done
+	if [ -f $(buildlibdir)/libbacktrace/backtrace-supported.h ]; then \
+	  install -m644 $(buildlibdir)/libbacktrace/backtrace-supported.h \
+	    $(d_snap)/$(gcc_lib_dir)/include/; \
+	  install -m644 $(srcdir)/libbacktrace/backtrace.h \
+	    $(d_snap)/$(gcc_lib_dir)/include/; \
+	fi
+
+	rm -rf $(d_snap)/$(PF)/lib/nof
+ifeq ($(with_java),yes)
+	mv $(d)/usr/lib/jvm $(d_snap)/usr/lib/
+
+	dh_link -p$(p_snap) \
+	  $(gcc_lib_dir)/include/gcj $(jvm_dir)/include/gcj \
+	  usr/bin/ecj $(jvm_dir)/bin/javac
+
+  ifneq ($(DEB_TARGET_ARCH_CPU),$(java_cpu))
+	ln -sf $(java_cpu) $(d_snap)/$(jvm_dir)/jre/lib/$(DEB_TARGET_ARCH_CPU)
+  endif
+  ifeq ($(with_ecj),yes)
+	install -m755 $(builddir)/aot/bin/javac $(d_snap)/$(jvm_dir)/bin/javac
+	install -m755 $(builddir)/aot/bin/ecj1 $(d_snap)/$(gcc_lexec_dir)/ecj1
+
+    ifeq (./,$(dir $(ecj_jar)))
+	install -m 644 $(ecj_jar) $(d_snap)/$(jvm_dir)/lib/ecj.jar
+    else
+	dh_link -p$(p_snap) \
+	  $(ecj_jar) $(jvm_dir)/lib/ecj.jar
+    endif
+  endif
+
+	: # provide .jinfo file
+	( \
+	  echo 'name=$(jvm_name_short)'; \
+	  echo 'alias=java-gcj$(pkg_ver)'; \
+	  echo 'priority=$(priority)'; \
+	  echo 'section=main'; \
+	  echo ''; \
+	  for i in $(jre_tools); do \
+	    echo "jre $$i /$(jvm_dir)/jre/bin/$$i"; \
+	  done; \
+	  for i in $(jdk_tools); do \
+	    echo "jdk $$i /$(jvm_dir)/bin/$$i"; \
+	  done; \
+	) > $(d_snap)/usr/lib/jvm/.java-gcj$(pkg_ver)-snap.jinfo
+endif
+
+ifeq ($(with_ada),yes FIXME: apply our ada patches)
+	dh_link -p$(p_snap) \
+	   $(gcc_lib_dir)/rts-sjlj/adalib/libgnat.a \
+	   $(gcc_lib_dir)/rts-sjlj/adalib/libgnat-$(GNAT_VERSION).a
+	dh_link -p$(p_snap) \
+	   $(gcc_lib_dir)/rts-sjlj/adalib/libgnarl.a \
+	   $(gcc_lib_dir)/rts-sjlj/adalib/libgnarl-$(GNAT_VERSION).a
+
+	set -e; \
+	for lib in lib{gnat,gnarl}; do \
+	  vlib=$$lib-$(GNAT_SONAME); \
+	  mv $(d_snap)/$(gcc_lib_dir)/adalib/$$vlib.so.1 $(d_snap)/$(PF)/$(libdir)/. ; \
+	  rm -f $(d_snap)/$(gcc_lib_dir)/adalib/$$lib.so.1; \
+	  dh_link -p$(p_snap) \
+	    /$(PF)/$(libdir)/$$vlib.so.1 /$(PF)/$(libdir)/$$vlib.so \
+	    /$(PF)/$(libdir)/$$vlib.so.1 /$(PF)/$(libdir)/$$lib.so \
+	    /$(PF)/$(libdir)/$$vlib.so.1 /$(gcc_lib_dir)/rts-native/adalib/$$lib.so; \
+	done
+endif
+ifeq ($(with_ada),yes)
+	ln -sf gcc $(d_snap)/$(PF)/bin/gnatgcc
+endif
+
+ifeq ($(with_hppa64),yes)
+	: # provide as and ld links
+	dh_link -p $(p_snap) \
+		/usr/bin/hppa64-linux-gnu-as \
+		/$(PF)/libexec/gcc/hppa64-linux-gnu/$(GCC_VERSION)/as \
+		/usr/bin/hppa64-linux-gnu-ld \
+		/$(PF)/libexec/gcc/hppa64-linux-gnu/$(GCC_VERSION)/ld
+endif
+
+ifeq ($(with_check),yes)
+	dh_installdocs -p$(p_snap) test-summary
+# more than one libgo.sum, avoid it 
+	mkdir -p $(d_snap)/$(docdir)/$(p_snap)/test-summaries
+	cp -p $$(find $(builddir)/gcc/testsuite -maxdepth 2 \( -name '*.sum' -o -name '*.log' \)) \
+	      $$(find $(buildlibdir)/*/testsuite -maxdepth 1 \( -name '*.sum'  -o -name '*.log' \) ! -name 'libgo.*') \
+		$(d_snap)/$(docdir)/$(p_snap)/test-summaries/
+  ifeq ($(with_go),yes)
+	cp -p $(buildlibdir)/libgo/libgo.sum \
+		$(d_snap)/$(docdir)/$(p_snap)/test-summaries/
+  endif
+	if which xz 2>&1 >/dev/null; then \
+	  echo -n $(d_snap)/$(docdir)/$(p_snap)/test-summaries/* \
+	    | xargs -d ' ' -L 1 -P $(USE_CPUS)	xz -7v; \
+	fi
+else
+	dh_installdocs -p$(p_snap)
+endif
+	if [ -f $(buildlibdir)/libstdc++-v3/testsuite/current_symbols.txt ]; \
+	then \
+	  cp -p $(buildlibdir)/libstdc++-v3/testsuite/current_symbols.txt \
+	    $(d_snap)/$(docdir)/$(p_snap)/libstdc++6_symbols.txt; \
+	fi
+	cp -p debian/README.snapshot \
+		$(d_snap)/$(docdir)/$(p_snap)/README.Debian
+	cp -p debian/README.Bugs \
+		$(d_snap)/$(docdir)/$(p_snap)/
+	dh_installchangelogs -p$(p_snap)
+ifeq ($(DEB_TARGET_ARCH),hppa)
+	dh_strip -p$(p_snap) -Xdebug -X.o -X.a -X/cgo -Xbin/go -Xbin/gofmt \
+	  $(if $(unstripped_exe),$(foreach i,cc1 cc1obj cc1objplus cc1plus cc1d f951 go1 jc1 lto1, -X/$(i)))
+else
+	dh_strip -p$(p_snap) -Xdebug -X/cgo -Xbin/go -Xbin/gofmt \
+	  $(if $(unstripped_exe),$(foreach i,cc1 cc1obj cc1objplus cc1plus cc1d f951 go1 jc1 lto1, -X/$(i)))
+endif
+	dh_compress -p$(p_snap) -X README.Bugs -X.log.xz -X.sum.xz
+	-find $(d_snap) -type d ! -perm 755 -exec chmod 755 {} \;
+	dh_fixperms -p$(p_snap)
+ifeq ($(with_ada),yes)
+	find $(d_snap)/$(gcc_lib_dir) -name '*.ali' | xargs -r chmod 444
+endif
+
+	mkdir -p $(d_snap)/usr/share/lintian/overrides
+	cp -p debian/gcc-snapshot.overrides \
+		$(d_snap)/usr/share/lintian/overrides/$(p_snap)
+
+	( \
+	  echo 'libgcc_s $(GCC_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libobjc $(OBJC_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgfortran $(FORTRAN_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libffi $(FFI_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgcj $(GCJ_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgcj-tools $(GCJ_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgij $(GCJ_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgcj_bc 1 ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgomp $(GOMP_SONAME) ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgnat-$(GNAT_SONAME) 1 ${p_snap} (>= $(DEB_VERSION))'; \
+	  echo 'libgnarl-$(GNAT_SONAME) 1 ${p_snap} (>= $(DEB_VERSION))'; \
+	) > debian/shlibs.local
+
+	$(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps)  \
+	  dh_shlibdeps -p$(p_snap) -l$(CURDIR)/$(d_snap)/$(PF)/lib:$(CURDIR)/$(d_snap)/$(PF)/$(if $(filter $(DEB_TARGET_ARCH),amd64 ppc64),lib32,lib64):/usr/$(DEB_TARGET_GNU_TYPE)/lib -Xlibgcj-tools
+	-sed -i -e 's/$(p_snap)[^,]*, //g' debian/$(p_snap).substvars
+
+ifeq ($(with_multiarch_lib),yes)
+	: # paths needed for relative lookups from startfile_prefixes
+	for ma in $(xarch_multiarch_names); do \
+	  mkdir -p $(d_snap)/lib/$$ma; \
+	  mkdir -p $(d_snap)/usr/lib/$$ma; \
+	done
+endif
+
+	dh_gencontrol -p$(p_snap) -- $(common_substvars) \
+		'-Vsnap:depends=$(snapshot_depends)' '-Vsnap:recommends=$(snapshot_recommends)'
+	dh_installdeb -p$(p_snap)
+	dh_md5sums -p$(p_snap)
+	dh_builddeb -p$(p_snap)
+
+	trap '' 1 2 3 15; touch $@; mv $(install_snap_stamp)-tmp $(install_snap_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-softfloat.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-softfloat.mk
@@ -0,0 +1,31 @@
+arch_binaries  := $(arch_binaries) softfloat
+
+p_softfloat  = gcc$(pkg_ver)-soft-float
+d_softfloat  = debian/$(p_softfloat)
+
+dirs_softfloat = \
+	$(PFL)/$(libdir) \
+	$(gcc_lib_dir)
+
+files_softfloat = \
+	$(PFL)/$(libdir)/soft-float \
+	$(gcc_lib_dir)/soft-float
+
+# ----------------------------------------------------------------------
+$(binary_stamp)-softfloat: $(install_stamp)
+	dh_testdir
+	dh_testroot
+	mv $(install_stamp) $(install_stamp)-tmp
+
+	rm -rf $(d_softfloat)
+	dh_installdirs -p$(p_softfloat) $(dirs_softfloat)
+	$(dh_compat2) dh_movefiles -p$(p_softfloat) $(files_softfloat)
+	rm -rf $(d_softfloat)/$(PFL)/$(libdir)/soft-float/libssp.so*
+	mv $(d_softfloat)/$(PFL)/$(libdir)/soft-float/libssp.a \
+		$(d_softfloat)/$(PFL)/$(libdir)/soft-float/libssp_nonshared.a
+	debian/dh_doclink -p$(p_softfloat) $(p_xbase)
+	dh_strip -p$(p_softfloat) -Xlibgcj.a
+	dh_shlibdeps -p$(p_softfloat)
+	echo $(p_softfloat) >> debian/arch_binaries
+
+	trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp)
--- gcc-5-5.4.0.orig/debian/rules.d/binary-source.mk
+++ gcc-5-5.4.0/debian/rules.d/binary-source.mk
@@ -0,0 +1,52 @@
+indep_binaries := $(indep_binaries) gcc-source
+
+ifeq ($(BACKPORT),true)
+  p_source = gcc$(pkg_ver)-$(GCC_VERSION)-source
+else
+  p_source = gcc$(pkg_ver)-source
+endif
+d_source= debian/$(p_source)
+
+$(binary_stamp)-gcc-source: $(install_stamp)
+	dh_testdir
+	dh_testroot
+
+	dh_installdocs -p$(p_source)
+	dh_installchangelogs -p$(p_source)
+
+	dh_install -p$(p_source) $(gcc_tarball) usr/src/gcc$(pkg_ver)
+ifneq (,$(gdc_tarball))
+	dh_install -p$(p_source) $(gdc_tarball) usr/src/gcc$(pkg_ver)
+endif
+	tar cf - $$(find './debian' -mindepth 1 \( \
+		-name .svn -prune -o \
+		-path './debian/gcc-*' -type d -prune -o \
+		-path './debian/cpp-*' -type d -prune -o \
+		-path './debian/*fortran*' -type d -prune -o \
+		-path './debian/lib*' -type d -prune -o \
+		-path './debian/patches/*' -prune -o \
+		-path './debian/tmp*' -prune -o \
+		-path './debian/files' -prune -o \
+		-path './debian/rules.d/*' -prune -o \
+		-path './debian/rules.parameters' -prune -o \
+		-path './debian/soname-cache' -prune -o \
+		-path './debian/*substvars*' -prune -o \
+		-path './debian/gcc-snapshot*' -prune -o \
+		-path './debian/*[0-9]*.p*' -prune -o \
+		-path './debian/*$(pkg_ver)[.-]*' -prune -o \
+		-print \) ) \
+	  | tar -x -C $(d_source)/usr/src/gcc$(pkg_ver)  -f -
+	# FIXME: Remove generated files
+	find $(d_source)/usr/src/gcc$(pkg_ver) -name '*.debhelper.log' -o -name .svn | xargs rm -rf
+
+	touch $(d_source)/usr/src/gcc$(pkg_ver)/debian/rules.parameters
+
+	dh_link -p$(p_source) \
+		/usr/src/gcc$(pkg_ver)/debian/patches /usr/src/gcc$(pkg_ver)/patches
+
+	mkdir -p $(d_source)/usr/share/lintian/overrides
+	cp -p debian/$(p_source).overrides \
+		$(d_source)/usr/share/lintian/overrides/$(p_source)
+	echo $(p_source) >> debian/indep_binaries
+
+	touch $@
--- gcc-5-5.4.0.orig/debian/rules.defs
+++ gcc-5-5.4.0/debian/rules.defs
@@ -0,0 +1,2055 @@
+# -*- makefile -*-
+# definitions used in more than one Makefile / rules file
+
+NJOBS :=
+USE_CPUS := 1
+ifneq (,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS))))
+  USE_CPUS := $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS))))
+  NJOBS := -j $(USE_CPUS)
+endif
+
+# common vars
+SHELL		= /bin/bash -e	# brace expansion used in rules file
+srcdir		= $(CURDIR)/src
+builddir	= $(CURDIR)/build
+builddir_jit	= $(CURDIR)/build-jit
+builddir_hppa64	= $(CURDIR)/build-hppa64
+stampdir	= stamps
+
+distribution	:= $(shell lsb_release -is)
+distrelease	:= $(shell lsb_release -cs)
+derivative	:= $(shell if dpkg-vendor --derives-from Ubuntu; then echo Ubuntu; \
+			elif dpkg-vendor --derives-from Debian; then echo Debian; \
+			else echo Unknown; fi)
+
+# On non official archives, "lsb_release -cs" default to "n/a". Assume
+# sid in that case 
+ifeq ($(distrelease),n/a)
+distrelease	:= sid
+endif
+
+on_buildd := $(shell [ -f /CurrentlyBuilding -o "$$LOGNAME" = buildd ] && echo yes)
+
+# creates {srcdir,builddir}_{hppa64,neon}
+$(foreach x,srcdir builddir,$(foreach target,hppa64 neon,$(eval \
+  $(x)_$(target) := $($(x))-$(target))))
+
+# for architecture dependent variables and changelog vars
+vafilt = $(subst $(2)=,,$(filter $(2)=%,$(1)))
+# for rules.sonames
+vafilt_defined = 1
+
+dpkg_target_vars := $(shell (dpkg-architecture | grep -q DEB_TARGET) && echo yes)
+ifeq ($(dpkg_target_vars),yes)
+  DEB_TARGET_ARCH=
+  DEB_TARGET_ARCH_BITS=
+  DEB_TARGET_ARCH_CPU=
+  DEB_TARGET_ARCH_ENDIAN=
+  DEB_TARGET_ARCH_OS=
+  DEB_TARGET_GNU_CPU=
+  DEB_TARGET_GNU_SYSTEM=
+  DEB_TARGET_GNU_TYPE=
+  DEB_TARGET_MULTIARCH=
+endif
+
+DPKG_VARS		:= $(shell dpkg-architecture)
+ifeq ($(dpkg_target_vars),yes)
+  DPKG_VARS		:= $(filter-out DEB_TARGET_%, $(DPKG_VARS))
+endif
+DEB_BUILD_ARCH		?= $(call vafilt,$(DPKG_VARS),DEB_BUILD_ARCH)
+DEB_BUILD_GNU_TYPE	?= $(call vafilt,$(DPKG_VARS),DEB_BUILD_GNU_TYPE)
+DEB_BUILD_MULTIARCH	?= $(call vafilt,$(DPKG_VARS),DEB_BUILD_MULTIARCH)
+DEB_HOST_ARCH		?= $(call vafilt,$(DPKG_VARS),DEB_HOST_ARCH)
+DEB_HOST_GNU_CPU	?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_CPU)
+DEB_HOST_GNU_SYSTEM	?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_SYSTEM)
+DEB_HOST_GNU_TYPE	?= $(call vafilt,$(DPKG_VARS),DEB_HOST_GNU_TYPE)
+DEB_HOST_MULTIARCH	?= $(call vafilt,$(DPKG_VARS),DEB_HOST_MULTIARCH)
+
+ifeq ($(derivative),Ubuntu)
+  ifeq (,$(filter $(distrelease),dapper hardy lucid precise quantal raring saucy trusty))
+    ifeq ($(DEB_BUILD_GNU_TYPE),i486-linux-gnu)
+      DEB_BUILD_GNU_TYPE = i686-linux-gnu
+    endif
+    ifeq ($(DEB_HOST_GNU_TYPE),i486-linux-gnu)
+      DEB_HOST_GNU_TYPE	= i686-linux-gnu
+    endif
+  endif
+else
+  ifneq (,$(filter $(distrelease),lenny etch squeeze wheezy))
+    # keep dpkg defaults
+  else ifneq (,$(filter $(distrelease),jessie))
+    ifeq ($(DEB_BUILD_GNU_TYPE),i486-linux-gnu)
+      DEB_BUILD_GNU_TYPE = i586-linux-gnu
+    endif
+    ifeq ($(DEB_HOST_GNU_TYPE),i486-linux-gnu)
+      DEB_HOST_GNU_TYPE	= i586-linux-gnu
+    endif
+  else
+    # stretch and newer ...
+    DEB_BUILD_GNU_TYPE := $(subst i586,i686,$(DEB_BUILD_GNU_TYPE))
+    DEB_HOST_GNU_TYPE := $(subst i586,i686,$(DEB_HOST_GNU_TYPE))
+  endif
+endif
+
+CHANGELOG_VARS := $(shell dpkg-parsechangelog | \
+	sed -n 's/ /_/g;/^[^_]/s/^\([^:]*\):_\(.*\)/\1=\2/p')
+
+# the name of the source package
+PKGSOURCE := $(call vafilt,$(CHANGELOG_VARS),Source)
+# those are required here too
+SOURCE_VERSION := $(call vafilt,$(CHANGELOG_VARS),Version)
+DEB_VERSION := $(strip $(shell echo $(SOURCE_VERSION) | \
+        sed -e 's/.*://' -e 's/ds[0-9]*//'))
+# epoch used for gcc versions up to 3.3.x, now used for some remaining
+# libraries: libgcc1, libobjc1
+EPOCH := 1
+DEB_EVERSION := $(EPOCH):$(DEB_VERSION)
+BASE_VERSION := $(shell echo $(DEB_VERSION) | sed -e 's/\([1-9]\).*-.*/\1/')
+
+# push glibc stack traces into stderr
+export LIBC_FATAL_STDERR_=1
+
+# ---------------------------------------------------------------------------
+# set target
+# - GNU triplet via DEB_TARGET_GNU_TYPE
+# - Debian arch in debian/target
+# - Debian arch via DEB_GCC_TARGET or GCC_TARGET
+#
+# alias
+ifdef GCC_TARGET
+  DEB_GCC_TARGET := $(GCC_TARGET)
+endif
+ifdef DEB_TARGET_GNU_TYPE
+  TARGET_VARS := $(shell dpkg-architecture -f -t$(DEB_TARGET_GNU_TYPE) 2>/dev/null)
+else
+  # allow debian/target to be used instead of DEB_GCC_TARGET - this was requested
+  # by toolchain-source maintainer
+  DEBIAN_TARGET_FILE := $(strip $(if $(wildcard debian/target),$(shell cat debian/target 2>/dev/null)))
+  ifndef DEB_TARGET_ARCH
+    ifneq (,$(DEBIAN_TARGET_FILE))
+      DEB_TARGET_ARCH := $(DEBIAN_TARGET_FILE)
+    else
+      ifdef DEB_GCC_TARGET
+        DEB_TARGET_ARCH := $(DEB_GCC_TARGET)
+      else
+        DEB_TARGET_ARCH := $(DEB_HOST_ARCH)
+      endif
+    endif
+  endif
+  TARGET_VARS := $(shell dpkg-architecture -f -a$(DEB_TARGET_ARCH) 2>/dev/null)
+endif
+ifeq ($(dpkg_target_vars),yes)
+  TARGET_VARS		:= $(filter-out DEB_TARGET_%, $(TARGET_VARS))
+endif
+
+DEB_TARGET_ARCH		:= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH)
+DEB_TARGET_ARCH_OS	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH_OS)
+DEB_TARGET_ARCH_CPU	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_ARCH_CPU)
+DEB_TARGET_GNU_CPU	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_CPU)
+DEB_TARGET_GNU_TYPE	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_TYPE)
+DEB_TARGET_GNU_SYSTEM	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_GNU_SYSTEM)
+DEB_TARGET_MULTIARCH	:= $(call vafilt,$(TARGET_VARS),DEB_HOST_MULTIARCH)
+
+ifeq ($(derivative),Ubuntu)
+  ifeq (,$(filter $(distrelease),dapper lucid))
+    ifeq ($(DEB_TARGET_GNU_TYPE),i486-linux-gnu)
+      DEB_TARGET_GNU_TYPE = i586-linux-gnu
+    endif
+  endif
+else
+  ifneq (,$(filter $(distrelease),stretch sid))
+    DEB_TARGET_GNU_TYPE := $(subst i586,i686,$(DEB_TARGET_GNU_TYPE))
+    i586_symlinks = $(if $(findstring i686,$(DEB_TARGET_GNU_TYPE)),yes)
+  endif
+endif
+
+ifeq ($(DEB_TARGET_ARCH),)
+  $(error Invalid architecure.)
+endif
+
+# Force this, people get confused about the default. See #760770.
+override with_deps_on_target_arch_pkgs :=
+
+# including unversiond symlinks for binaries
+#with_unversioned = yes
+
+# ---------------------------------------------------------------------------
+# cross-compiler config
+ifneq ($(DEB_BUILD_GNU_TYPE),$(DEB_HOST_GNU_TYPE))
+  ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_TARGET_GNU_TYPE))
+    # cross building a cross compiler, untested.
+    DEB_CROSS = yes
+    build_type = cross-build-cross
+  else
+    # cross building the native compiler
+    ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid))
+      with_sysroot = /
+    endif
+    build_type = cross-build-native
+  endif
+else
+  ifneq ($(DEB_HOST_GNU_TYPE),$(DEB_TARGET_GNU_TYPE))
+    # cross compiler, sets WITH_SYSROOT on it's own
+    DEB_CROSS = yes
+    build_type = build-cross
+  else
+    # native build
+    # first ones are wheezy and maverick
+    ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid))
+      with_sysroot = /
+    endif
+    build_type = build-native
+  endif
+endif
+
+# ---------------------------------------------------------------------------
+# cross compiler support
+ifeq ($(DEB_CROSS),yes)
+  # TARGET: Alias to DEB_TARGET_ARCH (Debian arch name)
+  # TP: Target Prefix. Used primarily as a prefix for cross tool
+  #     names (e.g. powerpc-linux-gcc).
+  # TS: Target Suffix. Used primarily at the end of cross compiler
+  #     package names (e.g. gcc-powerpc).
+  # LS: Library Suffix. Used primarily at the end of cross compiler
+  #     library package names (e.g. libgcc-powerpc-cross).
+  # AQ: Arch Qualifier. Used for cross-arch dependencies
+  DEB_TARGET_ALIAS ?= $(DEB_TARGET_GNU_TYPE)
+  TARGET := $(DEB_TARGET_ARCH)
+  TP :=  $(subst _,-,$(DEB_TARGET_GNU_TYPE))-
+  TS := -$(subst _,-,$(DEB_TARGET_ALIAS))
+  LS := -$(subst _,-,$(DEB_TARGET_ARCH))-cross
+  AQ :=
+
+  cross_bin_arch := -$(subst _,-,$(DEB_TARGET_ALIAS))
+  cross_lib_arch := -$(subst _,-,$(DEB_TARGET_ARCH))-cross
+  cmd_prefix := $(DEB_TARGET_GNU_TYPE)-
+
+  TARGET_ALIAS := $(DEB_TARGET_ALIAS)
+
+  lib_binaries := indep_binaries
+  cross_shlibdeps =  DEB_HOST_ARCH=$(TARGET) ARCH=$(DEB_TARGET_ARCH) MAKEFLAGS="CC=something"
+  cross_gencontrol = DEB_HOST_ARCH=$(TARGET)
+  cross_makeshlibs = DEB_HOST_ARCH=$(TARGET)
+  cross_clean = DEB_HOST_ARCH=$(TARGET)
+else
+  TARGET_ALIAS := $(DEB_TARGET_GNU_TYPE)
+
+  ifeq ($(TARGET_ALIAS),i386-gnu)
+    TARGET_ALIAS := i586-gnu
+  endif
+
+  cmd_prefix :=
+
+  #ifeq ($(TARGET_ALIAS),i486-linux-gnu)
+  #  TARGET_ALIAS := i686-linux-gnu
+  #endif
+
+  TARGET_ALIAS := $(subst i386,i486,$(TARGET_ALIAS))
+
+  # configure as linux-gnu, not linux
+  #ifeq ($(findstring linux,$(TARGET_ALIAS))/$(findstring linux-gnu,$(TARGET_ALIAS)),linux/)
+  #  TARGET_ALIAS := $(TARGET_ALIAS)-gnu
+  #endif
+
+  # configure as linux, not linux-gnu
+  #TARGET_ALIAS := $(subst linux-gnu,linux,$(TARGET_ALIAS))
+
+  lib_binaries := arch_binaries
+  cross_shlibdeps :=
+  cross_gencontrol :=
+  cross_makeshlibs :=
+  cross_clean :=
+endif
+
+printarch:
+	@echo DEB_TARGET_ARCH: $(DEB_TARGET_ARCH)
+	@echo DEB_TARGET_ARCH_OS: $(DEB_TARGET_ARCH_OS)
+	@echo DEB_TARGET_ARCH_CPU: $(DEB_TARGET_ARCH_CPU)
+	@echo DEB_TARGET_GNU_SYSTEM: $(DEB_TARGET_GNU_SYSTEM)
+	@echo DEB_TARGET_MULTIARCH: $(DEB_TARGET_MULTIARCH)
+	@echo MULTIARCH_CONFARG: $(MULTIARCH_CONFARG)
+	@echo TARGET_ALIAS: $(TARGET_ALIAS)
+	@echo TP: $(TP)
+	@echo TS: $(TS)
+
+# -------------------------------------------------------------------
+# bootstrap options
+ifdef WITH_BOOTSTRAP
+  # "yes" is the default and causes a 3-stage bootstrap.
+  # "off" runs a complete build with --disable-bootstrap
+  # "no" means to just build the first stage, and not create the stage1
+  # directory.
+  # "lean" means a lean 3-stage bootstrap, i.e. delete each stage when no
+  # longer needed.
+  with_bootstrap = $(WITH_BOOTSTRAP)
+endif
+ifneq ($(findstring nostrap, $(DEB_BUILD_OPTIONS)),)
+  with_bootstrap := off
+endif
+
+ifneq ($(findstring gccdebug, $(DEB_BUILD_OPTIONS)),)
+  with_bootstrap := off
+  DEB_BUILD_OPTIONS := $(DEB_BUILD_OPTIONS) nostrip
+  export DEB_BUILD_OPTIONS
+endif
+
+# -------------------------------------------------------------------
+# stage options
+ifdef DEB_STAGE
+  with_cdev := yes
+  separate_lang := yes
+  # "stage1" is minimal compiler with static libgcc
+  # "stage2" is minimal compiler with shared libgcc
+  # "rtlibs" is a subset of target libraries, without compilers
+  ifeq ($(DEB_STAGE),stage1)
+    with_shared_libgcc := no
+  endif
+  ifeq ($(DEB_STAGE),stage2)
+    with_libgcc := yes
+    with_shared_libgcc := yes
+  endif
+  ifeq ($(DEB_STAGE),rtlibs)
+    with_rtlibs := libgcc libgomp libstdc++ libgfortran libquadmath
+    ifeq ($(DEB_CROSS),yes)
+      LS :=
+      TS :=
+      cross_lib_arch :=
+    endif
+  endif
+endif
+
+ifeq ($(BACKPORT),true)
+  with_dev := no
+  with_source := yes
+  with_base_only := yes
+endif
+
+# -------------------------------------------------------------------
+# sysroot options
+ifdef WITH_SYSROOT
+  with_sysroot = $(WITH_SYSROOT)
+endif
+ifdef WITH_BUILD_SYSROOT
+  with_build_sysroot = $(WITH_BUILD_SYSROOT)
+endif
+
+# -------------------------------------------------------------------
+# for components configuration
+
+COMMA = ,
+SPACE = $(EMPTY) $(EMPTY)
+
+# lang= overwrites all of nolang=, overwrites all of WITHOUT_LANG
+
+DEB_LANG_OPT	:= $(filter lang=%,$(DEB_BUILD_OPTIONS))
+DEB_LANG	:= $(strip $(subst $(COMMA), ,$(patsubst lang=%,%,$(DEB_LANG_OPT))))
+DEB_NOLANG_OPT	:= $(filter nolang=%,$(DEB_BUILD_OPTIONS))
+DEB_NOLANG	:= $(strip $(subst $(COMMA), ,$(patsubst nolang=%,%,$(DEB_NOLANG_OPT))))
+lfilt	= $(strip $(if $(DEB_LANG), \
+		$(if $(filter $(1) $(2),$(DEB_LANG)),yes),$(3)))
+nlfilt	= $(strip $(if $(DEB_NOLANG), \
+		$(if $(filter $(1) $(2),$(DEB_NOLANG)),disabled by $(DEB_NOLANG_OPT),$(3))))
+wlfilt	= $(strip $(if $(filter $(1) $(2), $(subst $(COMMA), ,$(WITHOUT_LANG))), \
+		disabled by WITHOUT_LANG=$(WITHOUT_LANG),$(3)))
+envfilt	= $(strip $(or $(call lfilt,$(1),$(2)),$(call nlfilt,$(1),$(3)),$(call wlfilt,$(1),$(3)),$(4)))
+
+# -------------------------------------------------------------------
+# architecture specific config
+
+# FIXME: libjava is not ported for thumb, this hack only works for
+# separate gcj builds
+ifeq (,$(findstring gcj,$(PKGSOURCE)))
+  ifeq ($(DEB_TARGET_ARCH),armhf)
+    ifeq ($(distribution),Raspbian)
+      with_arm_thumb := no
+    else
+      with_arm_thumb := yes
+    endif
+  else
+    ifeq ($(derivative)-$(DEB_TARGET_ARCH),Ubuntu-armel)
+      ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise))
+        with_arm_thumb := yes
+      endif
+    endif
+  endif
+endif
+
+# build using fsf or linaro
+ifeq ($(distribution),Ubuntu)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),arm64 armel armhf))
+    with_linaro_branch = yes
+  endif
+endif
+
+# build using fsf or the ibm branch
+ifeq ($(distribution),Ubuntu)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),ppc64el))
+    with_ibm_branch = yes
+  endif
+endif
+
+# check if we're building for armel or armhf
+ifeq ($(DEB_TARGET_ARCH),armhf)
+  float_abi := hard
+else ifneq (,$(filter $(distribution)-$(DEB_TARGET_ARCH), Ubuntu-armel))
+  ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise))
+    float_abi := softfp
+  else
+    float_abi := soft
+  endif
+else ifneq (,$(filter $(DEB_TARGET_ARCH), arm armel))
+  float_abi := soft
+endif
+
+# -------------------------------------------------------------------
+# basic config
+
+# allows to wrote backtraces for ICEs
+#unstripped_exe = yes
+
+# common things ---------------
+# build common packages, where package names don't differ in different
+# gcc versions (fixincludes, libgcj-common) ...
+with_common_pkgs := yes
+# ... and some libraries, which do not change (libgcc1, libssp0).
+with_common_libs := yes
+# XXX: should with_common_libs be "yes" only if this is the default compiler
+# version on the targeted arch?
+
+# is this a multiarch-enabled build?
+ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick))
+  with_multiarch_lib := yes
+endif
+
+ifeq ($(with_multiarch_lib),yes)
+  ifneq ($(single_package),yes)
+    ifneq ($(DEB_CROSS),yes)
+      with_multiarch_cxxheaders := yes
+    endif
+  endif
+endif
+
+ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick))
+  multiarch_stage1 := yes
+endif
+
+# mapping for the non-default biarch multilib / multiarch names
+multiarch_xarch_map = \
+	amd64=i386-linux-gnu,x86_64-linux-gnux32 \
+	armel=arm-linux-gnueabi \
+	armhf=arm-linux-gnueabihf \
+	i386=x86_64-linux-gnu,x86_64-linux-gnux32 \
+	powerpc=powerpc64-linux-gnu \
+	ppc64=powerpc-linux-gnu \
+	sparc=sparc64-linux-gnu \
+	sparc64=sparc-linux-gnu \
+	s390=s390x-linux-gnu \
+	s390x=s390-linux-gnu \
+	mips=mips64-linux-gnuabin32,mips64-linux-gnuabi64 \
+	mipsel=mips64el-linux-gnuabin32,mips64el-linux-gnuabi64 \
+	mipsn32=mips-linux-gnu,mips64-linux-gnuabi64 \
+	mipsn32el=mipsel-linux-gnu,mips64el-linux-gnuabi64 \
+	mips64=mips-linux-gnu,mips64-linux-gnuabin32 \
+	mips64el=mipsel-linux-gnu,mips64el-linux-gnuabin32 \
+	mipsr6=mipsisa64r6-linux-gnuabin32,mipsisa64r6-linux-gnuabi64 \
+	mipsr6el=mipsisa64r6el-linux-gnuabin32,mipsisa64r6el-linux-gnuabi64 \
+	mipsn32r6=mipsisa32r6-linux-gnu,mipsisa64r6-linux-gnuabi64 \
+	mipsn32r6el=mipsisa32r6el-linux-gnu,mipsisa64r6el-linux-gnuabi64 \
+	mips64r6=mipsisa32r6-linux-gnu,mipsisa64r6-linux-gnuabin32 \
+	mips64r6el=mipsisa32r6el-linux-gnu,mipsisa64r6el-linux-gnuabin32 \
+	x32=x86_64-linux-gnu,i386-linux-gnu \
+	kfreebsd-amd64=i386-kfreebsd-gnu
+xarch_multiarch_names = $(subst $(COMMA),$(SPACE),$(patsubst $(DEB_TARGET_ARCH)=%,%, \
+		$(filter $(DEB_TARGET_ARCH)=%,$(multiarch_xarch_map))))
+
+multilib_multiarch_map = \
+	$(DEB_TARGET_ARCH)/=$(DEB_TARGET_MULTIARCH) \
+	amd64/32=i386-linux-gnu \
+	amd64/x32=x86_64-linux-gnux32 \
+	armel/hf=arm-linux-gnueabihf \
+	armhf/sf=arm-linux-gnueabi \
+	i386/64=x86_64-linux-gnu \
+	i386/x32=x86_64-linux-gnux32 \
+	powerpc/64=powerpc64-linux-gnu \
+	ppc64/32=powerpc-linux-gnu \
+	sparc/64=sparc64-linux-gnu \
+	sparc64/32=sparc-linux-gnu \
+	s390/64=s390x-linux-gnu \
+	s390x/32=s390-linux-gnu \
+	mips/n32=mips64-linux-gnuabin32 \
+	mips/64=mips64-linux-gnuabi64 \
+	mipsel/n32=mips64el-linux-gnuabin32 \
+	mipsel/64=mips64el-linux-gnuabi64 \
+	mipsn32/32=mips-linux-gnu \
+	mipsn32/64=mips64-linux-gnuabi64 \
+	mipsn32el/32=mipsel-linux-gnu \
+	mipsn32el/64=mips64el-linux-gnuabi64 \
+	mips64/32=mips-linux-gnu \
+	mips64/n32=mips64-linux-gnuabin32 \
+	mips64el/32=mipsel-linux-gnu \
+	mips64el/n32=mips64el-linux-gnuabin32 \
+	mipsr6/n32=mipsisa64r6-linux-gnuabin32 \
+	mipsr6/64=mipsisa64r6-linux-gnuabi64 \
+	mipsr6el/n32=mipsisa64r6el-linux-gnuabin32 \
+	mipsr6el/64=mipsisa64r6el-linux-gnuabi64 \
+	mipsn32r6/32=mipsisa32r6-linux-gnu \
+	mipsn32r6/64=mipsisa64r6-linux-gnuabi64 \
+	mipsn32r6el/32=mipsisa32r6el-linux-gnu \
+	mipsn32r6el/64=mipsisa64r6el-linux-gnuabi64 \
+	mips64r6/32=mipsisa32r6-linux-gnu \
+	mips64r6/n32=mipsisa64r6-linux-gnuabin32 \
+	mips64r6el/32=mipsisa32r6el-linux-gnu \
+	mips64r6el/n32=mipsisa64r6el-linux-gnuabin32 \
+	x32/32=i386-linux-gnu \
+	x32/64=x86_64-linux-gnu \
+	kfreebsd-amd64/32=i386-kfreebsd-gnu
+# $(call mlib_to_march,<empty>|32|64|n32|x32|hf|sf)
+mlib_to_march = $(patsubst $(DEB_TARGET_ARCH)/$(1)=%,%, \
+		   $(filter $(DEB_TARGET_ARCH)/$(1)=%,$(multilib_multiarch_map)))
+
+# build -base packages
+with_gccbase := yes
+ifeq ($(build_type),build-cross)
+  ifneq ($(DEB_STAGE),rtlibs)
+    with_gcclbase := yes
+  endif
+endif
+
+# build dev packages.
+ifneq ($(DEB_STAGE),rtlibs)
+  with_dev := yes
+endif
+
+with_cpp := yes
+
+# set lang when built from a different source package.
+separate_lang := no
+
+ifneq (,$(findstring gcc-snapshot, $(PKGSOURCE)))
+  single_package = yes
+  trunk_build = yes
+  with_linaro_branch =
+else ifneq (,$(findstring gcc-linaro, $(PKGSOURCE)))
+  single_package = yes
+  trunk_build = no
+else
+  # --program-suffix=-$(BASE_VERSION)
+  versioned_packages := yes
+endif
+
+#no_dummy_cpus := ia64 i386 hppa s390 sparc
+#ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(no_dummy_cpus)))
+#  with_base_only	:= no
+#  with_common_libs	:= yes
+#  with_common_pkgs	:= yes
+#else
+#  with_base_only	:= yes
+#  with_common_libs	:= no
+#  with_common_pkgs	:= no
+#  with_dev		:= no
+#endif
+
+ifeq ($(versioned_packages),yes)
+  pkg_ver := -$(BASE_VERSION)
+  PV := $(pkg_ver)
+endif
+
+# -------------------------------------------------------------------
+# configure languages
+
+# C ---------------------------
+enabled_languages := c
+
+with_jit = yes
+
+# FIXME: compiler bug
+jit_no_cpus	:= ia64
+
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(jit_no_cpus)))
+  with_jit := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifneq (,$(with_rtlibs))
+  with_jit := disabled for rtlibs stage
+endif
+with_jit := $(call envfilt, jit, , , $(with_jit))
+
+ifeq (,$(findstring gcc-,$(PKGSOURCE)))
+  with_jit :=
+endif
+
+ifneq (,$(findstring build-cross, $(build_type)))
+  with_jit := disabled for cross builds
+endif
+
+ifeq ($(with_jit),yes)
+    ifeq ($(with_common_libs),yes)
+      with_libgccjit := yes
+    endif
+endif
+
+with_cc1 := yes
+with_cc1 := $(call envfilt, cc1, , , $(with_cc1))
+ifeq ($(with_cc1),yes)
+  ifneq ($(DEB_CROSS),yes)
+    ifeq ($(with_common_libs),yes)
+      with_libcc1 := yes
+    endif
+  endif
+endif
+ifneq (,$(with_rtlibs))
+  with_libcc1 := disabled for rtlibs stage
+endif
+
+# Build all packages needed for C development
+ifneq ($(with_base_only),yes)
+  ifeq ($(with_dev),yes)
+    with_cdev := yes
+  endif
+endif
+
+ifeq (,$(filter $(DEB_STAGE),stage1 stage2))
+# Ada --------------------
+ada_no_cpus	:= m32r sh3 sh3eb sh4eb
+# no Debian builds ... some of these should exist
+ada_no_cpus += powerpcspe
+ada_no_cpus += mips64 # see https://gcc.gnu.org/PR65337
+ada_no_cpus += x32 # see https://gcc.gnu.org/PR61954
+ada_no_systems	:= 
+ada_no_cross	:= no
+ada_no_snap	:= no
+ifeq ($(single_package),yes)
+  ada_no_cpus += m68k powerpcspe sh4 sparc64
+  ada_no_cpus += alpha
+  ifneq (,$(filter $(DEB_TARGET_ARCH),m68k mips mipsel powerpcspe sh4 sparc64 hurd-i386 kfreebsd-i386 kfreebsd-amd64))
+    ada_no_cpus += mips mipsel
+    ada_no_cpus += hurd-i386 kfreebsd-i386 kfreebsd-amd64
+    ada_no_snap := yes
+  endif
+endif
+
+ifeq ($(with_dev),yes)
+  ifneq ($(separate_lang),yes)
+    with_ada := yes
+  endif
+endif
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(ada_no_cpus)))
+  with_ada := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifneq (,$(filter $(DEB_TARGET_ARCH),powerpcspe x32))
+  with_ada := disabled for architecture $(DEB_TARGET_ARCH)
+endif
+ifneq (,$(findstring cross,$(build_type)))
+  ifneq (,$(filter $(DEB_BUILD_ARCH),m68k powerpcspe sh4 x32))
+    with_ada := no gnat host compiler on $(DEB_BUILD_ARCH)
+  endif
+endif
+ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(ada_no_systems)))
+  with_ada := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+endif
+ifeq ($(ada_no_cross)-$(DEB_CROSS),yes-yes)
+  with_ada := disabled for cross compiler package
+endif
+ifeq ($(ada_no_snap)-$(single_package),yes-yes)
+  with_ada := disabled for snapshot build
+endif
+ifneq (,$(findstring gccgo,$(PKGSOURCE)))
+  with_ada :=
+endif
+ifneq (,$(filter $(distrelease),lucid))
+  with_ada :=
+endif
+with_ada := $(call envfilt, ada, , , $(with_ada))
+
+
+ifeq ($(DEB_STAGE)-$(filter libgnat, $(with_rtlibs)),rtlibs-)
+  with_ada := disabled for rtlibs stage
+endif
+
+#ifneq ($(single_package),yes)
+#  with_separate_gnat := yes
+#endif
+
+ifneq ($(with_separate_gnat),yes)
+  ifeq ($(with_ada),yes)
+    ifneq (,$(filter $(distrelease),squeeze lucid))
+      with_ada :=
+    endif
+  endif
+endif
+
+ifeq ($(with_ada)-$(with_separate_gnat),yes-yes)
+  ifneq (,$(findstring gnat,$(PKGSOURCE)))
+    languages := c
+    separate_lang := yes
+    with_mudflap := no
+    with_gccbase := no
+    with_cdev := no
+    with_cc1 := no
+    with_libcc1 := no
+  else
+    debian_extra_langs += ada
+    with_ada := built from separate source
+    with_libgnat := built from separate source
+  endif
+endif
+
+ifeq ($(with_ada),yes)
+  enabled_languages += ada
+  with_libgnat := yes
+  with_gnatsjlj := yes
+endif
+
+# C++ -------------------------
+cxx_no_cpus := avr
+ifneq ($(with_base_only),yes)
+  ifneq ($(separate_lang),yes)
+    with_cxx := yes
+  endif
+endif
+ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(cxx_no_cpus)))
+  with_cxx := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+with_cxx := $(call envfilt, c++, obj-c++ java, , $(with_cxx))
+
+# Set the default libstdc++ ABI. libstdc++ provides both ABI's.
+# Existing code still runs with the new c++11 ABI, however link
+# errors are seen when one object is compiled with the new std::string in scope,
+# another object is compiled with the old std::string in scope. both can link
+# to libstdc++.so but not to each other.
+# two objects (which might be some system library and a user's program) need to
+# agree on the version of std::string they're using
+
+libstdcxx_abi = new
+# backports default to the old ABI
+ifneq (,$(filter $(distrelease),squeeze wheezy jessie lucid precise trusty utopic vivid))
+  libstdcxx_abi = gcc4-compatible
+endif
+
+# Build all packages needed for C++ development
+ifeq ($(with_cxx),yes)
+  ifeq ($(with_dev),yes)
+    with_cxxdev := yes
+    with_libcxxdbg := yes
+  endif
+  ifeq ($(with_common_libs),yes)
+    with_libcxx := yes
+  endif
+
+  # debugging versions of libstdc++
+  ifneq (,$(findstring gcc-, $(PKGSOURCE)))
+  ifeq ($(with_cxxdev),yes)
+    with_cxx_debug := yes
+    debug_no_cpus :=
+    ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU),$(debug_no_cpus)))
+      with_cxx_debug := disabled for cpu $(DEB_TARGET_GNU_CPU)
+    endif
+  endif
+  endif
+  with_cxx_debug := $(call envfilt, debug, , , $(with_cxx_debug))
+
+  enabled_languages += c++
+endif
+
+# Java --------------------
+# - To build a standalone gcj package (with no corresponding gcc
+#   package): with_separate_libgcj=yes, with_standalone_gcj=yes
+# - To build the java packages from the gcc source package:
+#   with_separate_libgcj=no, with_standalone_gcj=no
+# - To build gcc and java from separate sources:
+#   with_separate_libgcj=yes, with_standalone_gcj=no
+
+java_no_cpus := # arm64 mips mipsel
+java_no_systems :=
+
+ifneq ($(single_package),yes)
+  with_separate_libgcj := yes
+endif
+with_separate_libgcj := no
+with_standalone_gcj := no
+
+ifneq ($(separate_lang),yes)
+  with_java := yes
+endif
+
+# java converted for V3 C++ ABI for some archs
+ifeq ($(with_base_only),yes)
+  with_java := no
+endif
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(java_no_cpus)))
+  with_java := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifneq (,$(filter $(DEB_TARGET_GNU_SYSTEM),$(java_no_systems)))
+  with_java := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+endif
+ifeq ($(java_no_cross)-$(DEB_CROSS),yes-yes)
+  with_java := disabled for cross compiler package
+endif
+with_java := $(call envfilt, java, , c++, $(with_java))
+
+ifeq ($(DEB_STAGE)-$(filter libgcj, $(with_rtlibs)),rtlibs-)
+  with_java := disabled for rtlibs stage
+endif
+
+ifneq (,$(findstring gccgo, $(PKGSOURCE)))
+  with_java :=
+endif
+
+ifeq ($(with_java)-$(with_separate_libgcj),yes-yes)
+  ifneq (,$(findstring gcj, $(PKGSOURCE)))
+    languages := c c++
+    separate_lang := yes
+  else
+    debian_extra_langs += java
+    with_java := built from separate source
+    with_gcj := built from separate source
+    with_libgcj := buit from separate source
+  endif
+endif
+
+with_java_plugin := no
+
+ifeq ($(with_java),yes)
+  # use the same names as OpenJDK
+  java_cpu_map = armel=arm armhf=arm arm64=aarch64 hppa=parisc \
+	i686=i386 i586=i386 i486=i386 x32=x32 \
+	mipsel=mips mips64=mips mips64el=mips mipsn32=mips mipsn32el=mips \
+	mipsr6=mips mipsr6el=mips mips64r6=mips mips64r6el=mips mipsn32r6=mips mipsn32r6el=mips \
+	powerpc=ppc ppc64el=ppc64le sh4=sh x32=x32
+  java_cpu = $(patsubst $(DEB_TARGET_ARCH_CPU)=%,%, \
+                         $(filter $(DEB_TARGET_ARCH_CPU)=%,$(java_cpu_map)))
+  ifeq (,$(java_cpu))
+    java_cpu = $(DEB_TARGET_ARCH_CPU)
+  endif
+  java_priority = 10$(subst .,,$(BASE_VERSION))0
+
+  with_libgcj := yes
+  with_libgcjbc := no
+
+  ifneq (,$(findstring gcj-4,$(PKGSOURCE)))
+    ifneq (,$(filter $(DEB_TARGET_ARCH), arm))
+      with_gcj_base_only := yes
+    endif
+  endif
+
+  ifeq ($(single_package),yes)
+    with_ecj := yes
+  endif
+
+  #ifneq (,$(filter $(DEB_TARGET_ARCH),hppa))
+  #  with_native_ecj := yes
+  #endif
+
+  with_java_maintainer_mode := no
+
+  # used as well in debian/rules.conf to determine the build deps
+  java_awt_peers = gtk # qt # xlib
+
+  ifeq ($(with_common_libs),yes)
+    with_libgcj_doc := yes
+  endif
+
+  # Build all packages needed for Java development (gcj, libgcj-dev)
+  ifeq ($(with_dev),yes)
+    with_javadev := yes
+    with_gcj := yes
+  endif
+
+  with_java_alsa := yes
+  ifeq (,$(filter $(DEB_TARGET_GNU_SYSTEM),linux-gnu))
+    with_java_alsa := no
+  endif
+
+  # Just build the cross compiler to be able to cross build a native build.
+  ifeq ($(DEB_CROSS),yes)
+    with_libgcj :=
+  endif
+
+  enabled_languages += java
+endif
+
+# Go -------------------
+# - To build a standalone gccgo package (with no corresponding gcc
+#   package): with_separate_libgo=yes, with_standalone_go=yes
+# - To build the go packages from the gcc source package:
+#   with_separate_libgo=no, with_standalone_go=no
+# - To build gcc and go from separate sources:
+#   with_separate_libgo=yes, with_standalone_go=no
+
+go_no_cross := yes
+go_no_cross := no
+
+ifneq (,$(findstring gccgo, $(PKGSOURCE)))
+  with_separate_libgo := yes
+  with_standalone_go := yes
+endif
+
+go_no_cpus := avr arm hppa m68k sh4
+ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric))
+  go_no_cpus := $(filter-out arm, $(go_no_cpus))
+endif
+go_no_systems := gnu kfreebsd-gnu
+
+ifneq ($(with_base_only),yes)
+  ifneq ($(separate_lang),yes)
+    with_go := yes
+  endif
+endif
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(go_no_cpus)))
+  with_go := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(go_no_systems)))
+  with_go := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+endif
+ifeq ($(go_no_cross)-$(DEB_CROSS),yes-yes)
+  with_go := disabled for cross compiler package
+endif
+ifeq ($(DEB_STAGE)-$(filter libgo, $(with_rtlibs)),rtlibs-)
+  with_go := disabled for rtlibs stage
+endif
+with_go := $(call envfilt, go, , , $(with_go))
+
+# Build all packages needed for Go development
+ifneq (,$(findstring gcc, $(PKGSOURCE)))
+  ifeq ($(with_go),yes)
+    with_libgo := yes
+    enabled_languages += go
+  endif
+endif
+
+ifeq ($(with_go)-$(with_separate_libgo),yes-yes)
+  ifneq (,$(findstring gccgo, $(PKGSOURCE)))
+    languages := c c++ go
+    separate_lang := yes
+    with_libgcc := yes
+    with_shared_libgcc := yes
+  else
+    debian_extra_langs += go
+    with_go := built from separate source
+    with_libgo := buit from separate source
+  endif
+endif
+
+# D ---------------------------
+d_no_cross := yes
+d_no_snap := yes
+d_no_cpus := s390
+
+ifneq ($(single_package),yes)
+  with_separate_gdc := yes
+endif
+with_separate_gdc := no
+
+ifneq ($(separate_lang),yes)
+  with_d := yes
+endif
+
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(d_no_cpus)))
+  with_d := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifeq ($(d_no_snap)-$(single_package),yes-yes)
+  with_d := disabled for snapshot build
+endif
+ifeq ($(DEB_STAGE)-$(filter libphobos, $(with_rtlibs)),rtlibs-)
+  with_d := disabled for rtlibs stage
+endif
+with_d := $(call envfilt, d, , , $(with_d))
+
+ifeq ($(with_base_only),yes)
+  with_d := no
+endif
+
+ifeq ($(with_d)-$(with_separate_gdc),yes-yes)
+  ifneq (,$(findstring gdc,$(PKGSOURCE)))
+    languages := c c++
+    separate_lang := yes
+
+    # FIXME: language selection needs improvement.
+    with_go := disabled for d
+  else
+    debian_extra_langs += d
+    with_d := built from separate source
+  endif
+endif
+
+ifeq ($(with_d),yes)
+  libphobos_archs = amd64 armel armhf i386 x32 kfreebsd-amd64 kfreebsd-i386
+  ifneq (,$(filter $(DEB_TARGET_ARCH), $(libphobos_archs)))
+    with_libphobos := yes
+  endif
+
+  libphobos_no_cpus := alpha avr arm64 hppa ia64 m68k \
+	mips mipsel mips64 mips64el mipsn32 mipsn32el \
+	powerpc powerpcspe ppc64 s390 s390x sh4 sparc sparc64
+  libphobos_no_systems := gnu kfreebsd-gnu
+  ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(libphobos_no_cpus)))
+    with_libphobos := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+  endif
+  ifneq (,$(filter $(DEB_TARGET_GNU_SYSTEM),$(libphobos_no_systems)))
+    with_libphobos := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+  endif
+
+  enabled_languages += d
+endif
+
+# Fortran 95 -------------------
+fortran_no_cross := yes
+fortran_no_cross := no
+
+ifneq ($(with_base_only),yes)
+  ifneq ($(separate_lang),yes)
+    with_fortran := yes
+  endif
+endif
+ifeq ($(fortran_no_cross)-$(DEB_CROSS),yes-yes)
+  with_fortran := disabled for cross compiler package
+endif
+ifeq ($(DEB_STAGE)-$(filter libgfortran libquadmath, $(with_rtlibs)),rtlibs-)
+  with_fortran := disabled for rtlibs stage
+endif
+
+with_fortran := $(call envfilt, fortran, , , $(with_fortran))
+
+# Build all packages needed for Fortran development
+ifeq ($(with_fortran),yes)
+  ifeq ($(with_dev),yes)
+    ifneq ($(DEB_STAGE)-$(filter libgfortran libquadmath, $(with_rtlibs)),rtlibs-)
+      with_fdev := yes
+    endif
+  endif
+  ifeq ($(with_common_libs),yes)
+    with_libgfortran := yes
+  endif
+  enabled_languages += fortran
+endif
+
+# libquadmath -------------------
+
+ifneq (,$(findstring $(DEB_TARGET_ARCH_CPU), ia64 i386 i486 i586 i686 amd64))
+  # FIXME: upstream build tied to gfortran build
+  ifeq ($(with_fortran),yes)
+    with_qmath := yes
+    ifneq (,$(findstring gcc-5,$(PKGSOURCE)))
+      ifeq ($(with_common_libs),yes)
+        with_libqmath := yes
+      endif
+    endif
+  endif
+endif
+
+# ObjC ------------------------
+objc_no_cross := no
+
+ifneq ($(with_base_only),yes)
+  ifneq ($(separate_lang),yes)
+    with_objc := yes
+    objc_no_archs =
+    ifneq (,$(filter $(DEB_TARGET_ARCH),$(objc_no_archs)))
+      with_objc :=
+    endif
+  endif
+endif
+ifeq ($(objc_no_cross)-$(DEB_CROSS),yes-yes)
+  with_objc := disabled for cross compiler package
+endif
+ifeq ($(DEB_STAGE)-$(filter libobjc, $(with_rtlibs)),rtlibs-)
+  with_objc := disabled for rtlibs stage
+endif
+with_objc := $(call envfilt, objc, obj-c++, , $(with_objc))
+
+ifeq ($(with_objc),yes)
+  # the ObjC runtime with garbage collection enabled needs the Boehm GC
+  with_objc_gc := yes
+
+  # disable ObjC garbage collection library (needs libgc)
+  libgc_no_cpus := arm64 avr mips mipsel # alpha amd64 arm armel armhf hppa i386 ia64 m68k mips mipsel powerpc ppc64 s390 s390x sparc
+  libgc_no_systems := knetbsd-gnu
+  ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(libgc_no_cpus)))
+    with_objc_gc := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+  endif
+  ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(libgc_no_systems)))
+    with_objc_gc := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+  endif
+
+  # Build all packages needed for Objective-C development
+  ifeq ($(with_dev),yes)
+    with_objcdev := yes
+  endif
+  ifeq ($(with_common_libs),yes)
+    with_libobjc := yes
+  endif
+
+  enabled_languages += objc
+endif
+
+# ObjC++ ----------------------
+objcxx_no_cross := no
+
+ifeq ($(with_objc),yes)
+  ifneq ($(with_base_only),yes)
+    ifneq ($(separate_lang),yes)
+      with_objcxx := yes
+    endif
+  endif
+endif
+ifeq ($(objcxx_no_cross)-$(DEB_CROSS),yes-yes)
+  with_objcxx := disabled for cross compiler package
+endif
+with_objcxx := $(call envfilt, obj-c++, , c++ objc, $(with_objcxx))
+
+ifeq ($(with_objcxx),yes)
+  enabled_languages += obj-c++
+endif
+
+# -------------------------------------------------------------------
+# other config
+
+# not built from the main source package
+ifeq (,$(findstring gcc-,$(PKGSOURCE)))
+  extra_package := yes
+endif
+
+with_nls := yes
+ifeq ($(trunk_build),yes)
+  with_nls := no
+endif
+with_nls := $(call envfilt, nls, , , $(with_nls))
+
+# powerpc nof libraries -----
+with_libnof := no
+
+ifneq (,$(findstring gcc-5,$(PKGSOURCE)))
+  ifeq (,$(with_rtlibs))
+    with_source := yes
+  endif
+endif
+with_source := $(call envfilt, source, , , $(with_source))
+
+ifeq ($(with_cdev),yes)
+
+# ssp & libssp -------------------------
+with_ssp := yes
+ssp_no_archs = alpha hppa ia64 m68k
+ifneq (, $(filter $(DEB_TARGET_ARCH),$(ssp_no_archs) $(ssp_no_archs:%=uclibc-%)))
+  with_ssp := not available on $(DEB_TARGET_ARCH)
+endif
+with_ssp := $(call envfilt, ssp, , , $(with_ssp))
+
+ifeq ($(with_ssp),yes)
+  ifneq ($(derivative),Debian)
+    ifneq (,$(findstring gcc-5, $(PKGSOURCE)))
+      with_ssp_default := yes
+    endif
+  endif
+endif
+
+# gomp --------------------
+with_gomp := yes
+with_gomp := $(call envfilt, gomp, , , $(with_gomp))
+gomp_no_archs =
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(gomp_no_archs)))
+  with_gomp :=
+endif
+
+# itm --------------------
+itm_archs = alpha amd64 arm64 i386 x32 ppc64 ppc64el s390x sh4 sparc64
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(itm_archs)))
+  with_itm := yes
+endif
+with_itm := $(call envfilt, itm, , , $(with_itm))
+
+# atomic --------------------
+with_atomic := yes
+atomic_no_archs =
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(atomic_no_archs)))
+  with_atomic :=
+endif
+
+# backtrace --------------------
+with_backtrace := yes
+backtrace_no_archs = m68k
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(backtrace_no_archs)))
+  with_backtrace :=
+endif
+
+# asan / sanitizer --------------------
+with_asan :=
+with_asan := $(call envfilt, asan, , , $(with_asan))
+asan_archs = amd64 armel armhf arm64 i386 powerpc ppc64 ppc64el x32 sparc sparc64
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(asan_archs)))
+  with_asan := yes
+endif
+
+# lsan / sanitizer --------------------
+with_lsan :=
+with_lsan := $(call envfilt, lsan, , , $(with_lsan))
+lsan_archs = amd64
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(lsan_archs)))
+  with_lsan := yes
+endif
+
+# tsan / sanitizer --------------------
+with_tsan :=
+with_tsan := $(call envfilt, tsan, , , $(with_tsan))
+tsan_archs = amd64
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(tsan_archs)))
+  with_tsan := yes
+endif
+
+endif # with_cdev
+
+# ubsan / sanitizer --------------------
+with_ubsan :=
+with_ubsan := $(call envfilt, ubsan, , , $(with_ubsan))
+ubsan_archs = amd64 armel armhf arm64 i386 powerpc ppc64 ppc64el x32 sparc sparc64
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(ubsan_archs)))
+  with_ubsan := yes
+endif
+
+# libvtv --------------------
+with_vtv :=
+with_vtv := $(call envfilt, vtv, , , $(with_vtv))
+vtv_archs = amd64 i386 x32
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(vtv_archs)))
+  with_vtv := yes
+  with_libvtv := yes
+endif
+# libvtv builds a modified libstdc++, don't enable it by default
+with_vtv :=
+with_libvtv :=
+
+# libcilkrts --------------------
+with_cilkrts :=
+with_cilkrts := $(call envfilt, cilkrts, , , $(with_cilkrts))
+cilkrts_archs = amd64 i386 x32
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(cilkrts_archs)))
+  with_cilkrts := yes
+endif
+
+# libmpx --------------------
+with_mpx :=
+with_mpx := $(call envfilt, mpx, , , $(with_mpx))
+mpx_archs = amd64 i386
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(mpx_archs)))
+  # requires newer binutils, or else libmpxwrappers isn't built
+  ifeq (,$(filter $(distrelease),squeeze lucid precise))
+    with_mpx := yes
+    ifneq (,$(findstring gcc-, $(PKGSOURCE)))
+      with_libmpx := yes
+    endif
+  endif
+endif
+
+# pie by default --------------------
+with_pie :=
+ifeq ($(distribution),Ubuntu)
+  ifeq (,$(filter $(distrelease),lucid precise trusty utopic vivid wily))
+    pie_archs = s390x
+  endif
+  ifeq (,$(filter $(distrelease),lucid precise trusty utopic vivid wily xenial))
+    pie_archs += amd64 ppc64el
+  endif
+  ifneq (,$(filter $(DEB_TARGET_ARCH),$(pie_archs)))
+    with_pie := yes
+  endif
+endif
+
+# gold --------------------
+# armel with binutils 2.20.51 only
+gold_archs = amd64 armel armhf i386 powerpc powerpcspe ppc64 ppc64el sparc sparc64 x32 hurd-i386
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(gold_archs)))
+  with_gold := yes
+endif
+
+# plugins --------------------
+with_plugins := yes
+ifneq (,$(with_rtlibs))
+  with_plugins := disabled for rtlibs stage
+endif
+
+endif # ifeq (,$(filter $(DEB_STAGE),stage1 stage2))
+
+# Don't include docs with GFDL invariant sections
+GFDL_INVARIANT_FREE := yes
+ifeq ($(derivative),Ubuntu)
+  GFDL_INVARIANT_FREE := no
+endif
+
+# -------------------------------------------------------------------
+# non-extra config
+ifeq ($(extra_package),yes)
+  ifeq ($(with_separate_libgcj)-$(with_standalone_gcj),yes-no)
+    # package stuff
+    with_gccbase := no
+    with_cdev := no
+    with_cxx := no
+    with_cxxdev := no
+
+    ifneq ($(DEB_CROSS),yes)
+      with_gcjbase := yes
+    else
+      with_gcjxbase := yes
+    endif
+  endif
+  ifeq ($(with_separate_libgo),yes)
+    # package stuff
+    with_gccbase := yes
+    with_cdev := no
+    with_cxx := no
+    with_cxxdev := no
+  endif
+else
+  # libssp ------------------
+  ifeq ($(with_ssp)-$(with_common_libs),yes-yes)
+    #ifneq ($(DEB_CROSS),yes)
+      with_libssp := $(if $(wildcard $(builddir)/gcc/auto-host.h),$(shell if grep -qs '^\#define TARGET_LIBC_PROVIDES_SSP 1' $(builddir)/gcc/auto-host.h; then echo 'libc provides ssp'; else echo 'yes'; fi))
+    #endif
+    with_libssp := libc provides ssp
+  endif
+
+  # libgomp -----------------
+  ifeq ($(with_gomp)-$(with_common_libs),yes-yes)
+      with_libgomp := yes
+  endif
+
+  # libitm -----------------
+  ifeq ($(with_itm)-$(with_common_libs),yes-yes)
+      with_libitm := yes
+  endif
+
+  # libatomic -----------------
+  ifeq ($(with_atomic)-$(with_common_libs),yes-yes)
+      with_libatomic := yes
+  endif
+
+  # libbacktrace -----------------
+  ifeq ($(with_backtrace)-$(with_common_libs),yes-yes)
+      # currently not a shared library
+      #with_libbacktrace := yes
+  endif
+
+  # libasan -----------------
+  # asan changes soname in GCC 6
+  #ifeq ($(with_asan)-$(with_common_libs),yes-yes)
+    ifeq ($(with_asan),yes)
+      with_libasan := yes
+    endif
+  #endif
+
+  # liblsan -----------------
+  ifeq ($(with_lsan)-$(with_common_libs),yes-yes)
+    #ifneq ($(DEB_CROSS),yes)
+      with_liblsan := yes
+    #endif
+  endif
+
+  # libtsan -----------------
+  ifeq ($(with_tsan)-$(with_common_libs),yes-yes)
+      with_libtsan := yes
+  endif
+
+  # libubsan -----------------
+  ifeq ($(with_ubsan)-$(with_common_libs),yes-yes)
+      with_libubsan := yes
+  endif
+
+  # libvtv -----------------
+  ifeq ($(with_vtv)-$(with_common_libs),yes-yes)
+      with_libvtv := yes
+  endif
+
+  # libcilkrts -----------------
+  ifeq ($(with_cilkrts)-$(with_common_libs),yes-yes)
+      with_libcilkrts := yes
+  endif
+
+  # libquadmath -----------------
+  ifeq ($(with_qmath)-$(with_common_libs),yes-yes)
+      with_libqmath := yes
+  endif
+
+  # fixincludes -------
+  ifneq ($(DEB_CROSS),yes)
+    ifeq ($(with_common_pkgs),yes)
+      with_fixincl	:= yes
+    endif
+  endif
+
+  # Shared libgcc --------------------
+  ifneq ($(DEB_STAGE),stage1)
+    with_shared_libgcc := yes
+    ifeq ($(with_common_libs),yes)
+      with_libgcc := yes
+    endif
+    ifneq (,$(filter $(distrelease),xenial yakkety))
+      ifneq (,$(filter $(build_type), build-native cross-build-native))
+        # built from the gccgo-6 package, but not for cross builds
+        with_libgcc :=
+      endif
+    endif
+  endif
+
+  # libgcc-math --------------------
+  with_libgmath := no
+  ifneq (,$(findstring i486,$(DEB_TARGET_ARCH)))
+    #with_libgccmath := yes
+    #with_lib64gmath := yes
+    #with_libgmathdev := yes
+  endif
+  ifeq ($(DEB_TARGET_ARCH),amd64)
+    #with_libgccmath := yes
+    #with_lib32gmath := yes
+    #with_libgmathdev := yes
+  endif
+
+  # hppa64 build ----------------
+  hppa64_no_snap := no
+  hppa64_archs := hppa
+  ifneq (,$(filter $(build_type), build-native cross-build-native))
+    ifeq (,$(filter $(distrelease),wheezy squeeze jessie lucid precise trusty utopic vivid wily))
+      hppa64_archs += amd64 i386 x32
+    endif
+    ifneq (,$(filter $(DEB_TARGET_ARCH),$(hppa64_archs)))
+      with_hppa64 := yes
+    endif
+  endif
+  ifeq ($(hppa64_no_snap)-$(trunk_build),yes-yes)
+    with_hppa64 := disabled for snapshot build
+  endif
+  with_hppa64 := $(call envfilt, hppa64, , , $(with_hppa64))
+
+  ifeq ($(DEB_STAGE),rtlibs)
+    with_libatomic := disabled for rtlibs stage
+    with_libasan := disabled for rtlibs stage
+    with_liblsan := disabled for rtlibs stage
+    with_libtsan := disabled for rtlibs stage
+    with_libubsan := disabled for rtlibs stage
+    with_libcilkrts := disabled for rtlibs stage
+    with_fixincl := disabled for rtlibs stage
+    with_hppa64 := disabled for rtlibs stage
+  endif
+
+  # neon build -------------------
+  # FIXME: build as a cross compiler to build on armv4 as well
+  ifneq (,$(findstring gcc-5, $(PKGSOURCE)))
+    ifeq ($(derivative),Ubuntu)
+#      neon_archs = armel armhf
+#      ifneq (, $(filter $(DEB_TARGET_ARCH),$(neon_archs)))
+#        with_neon = yes
+#      endif
+    endif
+  endif
+endif
+
+# run testsuite ---------------
+with_check := yes
+# if you don't want to run the gcc testsuite, uncomment the next line
+#with_check := disabled by hand
+ifeq ($(with_base_only),yes)
+  with_check := no
+endif
+ifeq ($(DEB_CROSS),yes)
+  with_check := disabled for cross compiler package
+endif
+ifneq (,$(findstring cross-build-,$(build_type)))
+  with_check := disabled for cross building the compiler
+endif
+ifneq (,$(with_rtlibs))
+  with_check := disabled for rtlibs stage
+endif
+check_no_cpus := m68k
+check_no_systems := # gnu kfreebsd-gnu
+ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),$(check_no_cpus)))
+  with_check := disabled for cpu $(DEB_TARGET_ARCH_CPU)
+endif
+ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(check_no_systems)))
+  with_check := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+endif
+ifeq ($(derivative)-$(DEB_HOST_ARCH),Ubuntu-hppa)
+  ifneq ($(single_package),yes)
+    with_check := disabled, testsuite timeouts with expect
+  endif
+endif
+ifneq (,$(findstring gdc,$(PKGSOURCE)))
+  with_check := disabled for D
+endif
+with_check := $(call envfilt, check, , , $(with_check))
+ifdef WITHOUT_CHECK
+  with_check := disabled by environment
+endif
+ifneq ($(findstring nocheck, $(DEB_BUILD_OPTIONS)),)
+  with_check := disabled by DEB_BUILD_OPTIONS
+endif
+ifneq (,$(filter $(DEB_HOST_ARCH), hppa mips))
+  ifneq ($(single_package),yes)
+    with_check := disabled for $(DEB_HOST_ARCH), testsuite timeouts with expect
+  endif
+endif
+#with_check := disabled for this upload
+
+# not a dependency on all archs, but if available, use it for the testsuite
+ifneq (,$(wildcard /usr/bin/localedef))
+  locale_data = generate
+endif
+
+ifneq (,$(filter $(build_type), build-cross cross-build-cross))
+  ldconfig_arg = --noscripts
+endif
+
+all_enabled_languages := $(enabled_languages)
+languages_without_lang_opt := c++ objc obj-c++
+
+debian_extra_langs := $(subst obj-c++,objcp,$(debian_extra_langs))
+export debian_extra_langs
+
+# multilib
+biarch_map := i686=x86_64 powerpc=powerpc64 sparc=sparc64 sparc64=sparc s390=s390x s390x=s390 \
+		x86_64=i686 powerpc64=powerpc \
+		mips=mips64 mipsel=mips64el mips64=mips mips64el=mipsel mipsn32=mips mipsn32el=mipsel \
+		# mipsr6=mips64r6 mipsr6el=mips64r6el mips64r6=mipsr6 mips64r6el=mipsr6el mipsn32r6=mipsr6 mipsn32r6el=mipsr6el
+ifneq (,$(filter $(derivative),Ubuntu))
+  ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid))
+    biarch_map := $(subst i686=,i486=,$(biarch_map))
+  endif
+else # Debian
+  biarch_map := $(subst i686=,i486=,$(biarch_map))
+endif
+
+ifeq ($(derivative),Ubuntu)
+  ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty))
+    biarch_map += arm=arm
+  endif
+endif
+biarch_cpu := $(strip $(patsubst $(DEB_TARGET_GNU_CPU)=%,%, \
+			 $(filter $(DEB_TARGET_GNU_CPU)=%,$(biarch_map))))
+
+biarch64 := no
+biarch32 := no
+biarchn32 := no
+biarchx32 := no
+biarchhf := no
+biarchsf := no
+flavours :=
+define gen_biarch
+  ifneq (yes,$$(call envfilt, biarch, , ,yes))
+    biarch$1archs :=
+  endif
+  ifneq (,$$(findstring /$$(DEB_TARGET_ARCH)/,$$(biarch$1archs)))
+    biarch$1 := yes
+    flavours += $1
+    #biarch$1subdir = $$(biarch_cpu)-$$(DEB_TARGET_GNU_SYSTEM)
+    biarch$1subdir = $1
+    ifeq ($$(with_libgcc),yes)
+      with_lib$1gcc := yes
+    endif
+    ifeq ($$(with_cdev),yes)
+      with_lib$1gccdev := yes
+    endif
+    ifeq ($$(with_libcxx),yes)
+      with_lib$1cxx := yes
+    endif
+    ifeq ($$(with_libcxxdbg),yes)
+      with_lib$1cxxdbg := yes
+    endif
+    ifeq ($$(with_cxxdev),yes)
+      with_lib$1cxxdev := yes
+    endif
+    ifeq ($$(with_libobjc),yes)
+      with_lib$1objc := yes
+    endif
+    ifeq ($$(with_objcdev),yes)
+      with_lib$1objcdev := yes
+    endif
+    ifeq ($$(with_libgfortran),yes)
+      with_lib$1gfortran := yes
+    endif
+    ifeq ($$(with_fdev),yes)
+      with_lib$1gfortrandev := yes
+    endif
+    ifeq ($$(with_libphobos),yes)
+      ifeq (,$(filter $1, hf))
+        with_lib$1phobosdev := yes
+      endif
+    endif
+    ifeq ($$(with_libssp),yes)
+      with_lib$1ssp := yes
+    endif
+    ifeq ($$(with_libgomp),yes)
+      with_lib$1gomp:= yes
+    endif
+    ifeq ($$(with_libitm),yes)
+      with_lib$1itm:= yes
+    endif
+    ifeq ($$(with_libatomic),yes)
+      with_lib$1atomic:= yes
+    endif
+    ifeq ($$(with_libbacktrace),yes)
+      with_lib$1backtrace:= yes
+    endif
+    ifeq ($$(with_libasan),yes)
+      with_lib$1asan:= yes
+    endif
+    ifeq ($$(with_liblsan),yes)
+      with_lib$1lsan := yes
+    endif
+    ifeq ($$(with_libtsan),yes)
+      with_lib$1tsan:= yes
+    endif
+    ifeq ($$(with_libubsan),yes)
+      with_lib$1ubsan := yes
+    endif
+    ifeq ($$(with_libvtv),yes)
+      with_lib$1vtv := yes
+    endif
+    ifeq ($$(with_libcilkrts),yes)
+      with_lib$1cilkrts := yes
+    endif
+    ifeq ($$(with_libmpx),yes)
+      ifneq (,$(filter $1, 32 64))
+        with_lib$1mpx := yes
+      endif
+    endif
+    ifeq ($$(with_libqmath),yes)
+      with_lib$1qmath := yes
+    endif
+    ifeq ($$(with_libgo),yes)
+      with_lib$1go := yes
+    endif
+
+    biarch_multidir_names = libiberty libgcc libbacktrace libatomic libgomp
+    ifneq (,$$(findstring gcc-, $$(PKGSOURCE)))
+      biarch_multidir_names += libstdc++-v3 libobjc libgfortran libssp \
+				zlib libitm libmpx \
+				libsanitizer \
+				libcilkrts libvtv
+      ifeq ($$(with_objc_gc),yes)
+        biarch_multidir_names += boehm-gc
+      endif
+    endif
+    ifneq (,$(findstring yes, $(with_java) $(with_go)))
+      biarch_multidir_names += libffi
+    endif
+    ifeq ($(with_fortran),yes)
+      biarch_multidir_names += libquadmath
+    endif
+    ifeq ($(with_go),yes)
+      biarch_multidir_names += libgo
+    endif
+    ifeq ($(with_libphobos),yes)
+      ifeq (,$(filter $1, hf))
+        biarch_multidir_names += libphobos
+      endif
+    endif
+    ifneq (,$$(findstring 32,$1))
+      TARGET64_MACHINE := $$(strip $$(subst $$(DEB_TARGET_GNU_CPU),$$(biarch_cpu), \
+				$$(TARGET_ALIAS)))
+      TARGET32_MACHINE := $$(TARGET_ALIAS)
+    else
+      TARGET64_MACHINE := $$(TARGET_ALIAS)
+      TARGET64_MACHINE := $$(strip $$(subst $$(DEB_TARGET_GNU_CPU),$$(biarch_cpu), \
+				$$(TARGET_ALIAS)))
+    endif
+    export TARGET32_MACHINE
+    export TARGET64_MACHINE
+  endif
+endef
+biarch32archs := /amd64/ppc64/kfreebsd-amd64/s390x/sparc64/x32/mipsn32/mipsn32el/mips64/mips64el/ # mipsn32r6/mipsn32r6el/mips64r6/mips64r6el/
+biarch64archs := /i386/powerpc/sparc/s390/mips/mipsel/mipsn32/mipsn32el/x32/ # mipsr6/mipsr6el/mipsn32r6/mipsn32r6el/
+biarchn32archs := /mips/mipsel/mips64/mips64el/ # mipsr6/mipsr6el/mips64r6/mips64r6el/
+ifeq ($(derivative),Ubuntu)
+  ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty))
+    biarchhfarchs := /armel/
+    biarchsfarchs := /armhf/
+  endif
+  ifeq (,$(filter $(distrelease),dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal))
+    biarchx32archs := /amd64/i386/
+  endif
+endif
+ifeq ($(derivative),Debian)
+  ifeq (,$(filter $(distrelease),etch squeeze wheezy))
+    biarchx32archs := /amd64/i386/
+  endif
+endif
+$(foreach x,32 64 n32 x32 hf sf,$(eval $(call gen_biarch,$(x))))
+
+ifeq ($(DEB_TARGET_ARCH),sh4)
+  biarch_multidir_names=none
+endif
+export biarch_multidir_names
+
+#ifeq ($(trunk_build),yes)
+#  no_biarch_libs := yes
+#endif
+no_biarch_libs :=
+
+ifeq ($(no_biarch_libs),yes)
+  with_lib64gcc		:= no
+  with_lib64cxx		:= no
+  with_lib64cxxdbg	:= no
+  with_lib64objc	:= no
+  with_lib64ffi		:= no
+  with_lib64gcj		:= no
+  with_lib64gfortran	:= no
+  with_lib64ssp		:= no
+  with_lib64go		:= no
+  with_lib64gomp	:= no
+  with_lib64itm		:= no
+  with_lib64qmath	:= no
+  with_lib64atomic	:= no
+  with_lib64backtrace	:= no
+  with_lib64asan	:= no
+  with_lib64lsan	:= no
+  with_lib64tsan	:= no
+  with_lib64ubsan	:= no
+  with_lib64vtv		:= no
+  with_lib64cilkrts	:= no
+  with_lib64mpx		:= no
+  with_lib64gccdev	:= no
+  with_lib64cxxdev	:= no
+  with_lib64objcdev	:= no
+  with_lib64gfortrandev	:= no
+  with_lib64phobosdev	:= no
+
+  with_lib32gcc		:= no
+  with_lib32cxx		:= no
+  with_lib32cxxdbg	:= no
+  with_lib32objc	:= no
+  with_lib32ffi		:= no
+  with_lib32gcj		:= no
+  with_lib32gfortran	:= no
+  with_lib32ssp		:= no
+  with_lib32go		:= no
+  with_lib32gomp	:= no
+  with_lib32itm		:= no
+  with_lib32qmath	:= no
+  with_lib32atomic	:= no
+  with_lib32backtrace	:= no
+  with_lib32asan	:= no
+  with_lib32lsan	:= no
+  with_lib32tsan	:= no
+  with_lib32ubsan	:= no
+  with_lib32vtv		:= no
+  with_lib32cilkrts	:= no
+  with_lib32mpx		:= no
+  with_lib32gccdev	:= no
+  with_lib32cxxdev	:= no
+  with_lib32objcdev	:= no
+  with_lib32gfortrandev	:= no
+  with_lib32phobosdev	:= no
+
+  with_libn32gcc	:= no
+  with_libn32cxx	:= no
+  with_libn32cxxdbg	:= no
+  with_libn32objc	:= no
+  with_libn32ffi	:= no
+  with_libn32gcj	:= no
+  with_libn32gfortran	:= no
+  with_libn32ssp	:= no
+  with_libn32go		:= no
+  with_libn32gomp	:= no
+  with_libn32itm	:= no
+  with_libn32qmath	:= no
+  with_libn32atomic	:= no
+  with_libn32backtrace	:= no
+  with_libn32asan	:= no
+  with_libn32lsan	:= no
+  with_libn32tsan	:= no
+  with_libn32ubsan	:= no
+  with_libn32gccdev	:= no
+  with_libn32cxxdev	:= no
+  with_libn32objcdev	:= no
+  with_libn32gfortrandev:= no
+  with_libn32phobosdev	:= no
+
+  with_libx32gcc	:= no
+  with_libx32cxx	:= no
+  with_libx32cxxdbg	:= no
+  with_libx32objc	:= no
+  with_libx32ffi	:= no
+  with_libx32gcj	:= no
+  with_libx32gfortran	:= no
+  with_libx32ssp	:= no
+  with_libx32go		:= no
+  with_libx32gomp	:= no
+  with_libx32itm	:= no
+  with_libx32qmath	:= no
+  with_libx32atomic	:= no
+  with_libx32backtrace	:= no
+  with_libx32asan	:= no
+  with_libx32lsan	:= no
+  with_libx32tsan	:= no
+  with_libx32ubsan	:= no
+  with_libx32vtv	:= no
+  with_libx32cilkrts	:= no
+  with_libx32gccdev	:= no
+  with_libx32cxxdev	:= no
+  with_libx32objcdev	:= no
+  with_libx32gfortrandev:= no
+  with_libx32phobosdev	:= no
+
+  with_libhfgcc		:= no
+  with_libhfcxx		:= no
+  with_libhfcxxdbg	:= no
+  with_libhfobjc	:= no
+  with_libhfffi		:= no
+  with_libhfgcj		:= no
+  with_libhfgfortran	:= no
+  with_libhfssp		:= no
+  with_libhfgo		:= no
+  with_libhfgomp	:= no
+  with_libhfitm		:= no
+  with_libhfqmath	:= no
+  with_libhfatomic	:= no
+  with_libhfbacktrace	:= no
+  with_libhfasan	:= no
+  with_libhflsan	:= no
+  with_libhftsan	:= no
+  with_libhfubsan	:= no
+  with_libhfgccdev	:= no
+  with_libhfcxxdev	:= no
+  with_libhfobjcdev	:= no
+  with_libhfgfortrandev	:= no
+  with_libhfphobosdev	:= no
+
+  with_libsfgcc		:= no
+  with_libsfcxx		:= no
+  with_libsfcxxdbg	:= no
+  with_libsfobjc	:= no
+  with_libsfffi		:= no
+  with_libsfgcj		:= no
+  with_libsfgfortran	:= no
+  with_libsfssp		:= no
+  with_libsfgo		:= no
+  with_libsfgomp	:= no
+  with_libsfitm		:= no
+  with_libsfqmath	:= no
+  with_libsfatomic	:= no
+  with_libsfbacktrace	:= no
+  with_libsfasan	:= no
+  with_libsflsan	:= no
+  with_libsftsan	:= no
+  with_libsfubsan	:= no
+  with_libsfgccdev	:= no
+  with_libsfcxxdev	:= no
+  with_libsfobjcdev	:= no
+  with_libsfgfortrandev	:= no
+  with_libsfphobosdev	:= no
+
+  with_java_plugin := no
+
+  ifeq ($(with_ada)-$(with_separate_gnat),yes-yes)
+    biarchhf	:= disabled for Ada
+    biarchsf	:= disabled for Ada
+  endif
+
+endif
+
+ifneq (,$(filter yes,$(biarch32) $(biarch64) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf)))
+  multilib := yes
+endif
+
+multilib_archs = $(sort $(subst /, , $(biarch64archs) $(biarch32archs) $(biarchn32archs) $(biarchx32archs) $(biarchhfarchs) $(biarchsfarchs)))
+
+biarchsubdirs := \
+  $(if $(filter yes,$(biarch64)),$(biarch64subdir),) \
+  $(if $(filter yes,$(biarch32)),$(biarch32subdir),) \
+  $(if $(filter yes,$(biarchn32)),$(biarchn32subdir),) \
+  $(if $(filter yes,$(biarchx32)),$(biarchx32subdir),) \
+  $(if $(filter yes,$(biarchhf)),$(biarchhfsubdir),) \
+  $(if $(filter yes,$(biarchsf)),$(biarchsfsubdir),)
+biarchsubdirs := {$(strip $(shell echo $(biarchsubdirs) | tr " " ","))}
+
+# GNU locales
+force_gnu_locales := yes
+locale_no_cpus :=
+locale_no_systems :=
+ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(locale_no_systems)))
+  force_gnu_locales := disabled for system $(DEB_TARGET_GNU_SYSTEM)
+endif
+
+gcc_tarpath		:= $(firstword $(wildcard gcc-*.tar.* /usr/src/gcc-5/gcc-*.tar.*))
+gcc_tarball		:= $(notdir $(gcc_tarpath))
+gcc_srcdir		:= $(subst -dfsg,,$(patsubst %.tar.xz,%,$(patsubst %.tar.lzma,%,$(patsubst %.tar.gz,%,$(gcc_tarball:.tar.bz2=)))))
+
+ifeq ($(with_d),yes)
+  gdc_tarpath		:= $(firstword $(wildcard gdc-*.tar.* /usr/src/gcc-$(BASE_VERSION)/gdc-*.tar.*))
+  gdc_tarball		:= $(notdir $(gdc_tarpath))
+  gdc_srcdir		:= $(patsubst %.tar.xz,%,$(patsubst %.tar.lzma,%,$(patsubst %.tar.gz,%,$(gdc_tarball:.tar.bz2=))))
+endif
+
+# NOTE: This is not yet used. when building gcj, gdc or gnat using the
+# gcc-source package, we don't require an exact binary dependency.
+ifneq ($(dir $(gcc_tarpath)),./)
+  built_using_external_source := yes
+else
+  built_using_external_source :=
+endif
+ifeq ($(DEB_CROSS),yes)
+  add_built_using = yes
+endif
+ifeq ($(with_ada)-$(with_separate_gnat),yes-yes)
+  add_built_using = yes
+endif
+
+ecj_jar := $(firstword $(wildcard ecj.jar /usr/share/java/eclipse-ecj.jar /usr/share/java/ecj.jar))
+
+unpack_stamp		:= $(stampdir)/01-unpack-stamp
+pre_patch_stamp		:= $(stampdir)/02-pre-patch-stamp
+patch_stamp		:= $(stampdir)/02-patch-stamp
+control_stamp		:= $(stampdir)/03-control-stamp
+configure_stamp		:= $(stampdir)/04-configure-stamp
+build_stamp		:= $(stampdir)/05-build-stamp
+build_arch_stamp	:= $(stampdir)/05-build-arch-stamp
+build_indep_stamp	:= $(stampdir)/05-build-indep-stamp
+build_html_stamp	:= $(stampdir)/05-build-html-stamp
+build_locale_stamp	:= $(stampdir)/05-build-locale-stamp
+build_doxygen_stamp	:= $(stampdir)/05-build-doxygen-stamp
+build_javasrc_stamp	:= $(stampdir)/05-build-javasrc-stamp
+build_javadoc_stamp	:= $(stampdir)/05-build-javadoc-stamp
+build_gnatdoc_stamp	:= $(stampdir)/05-build-gnatdoc-stamp
+check_stamp		:= $(stampdir)/06-check-stamp
+check_inst_stamp	:= $(stampdir)/06-check-inst-stamp
+install_stamp		:= $(stampdir)/07-install-stamp
+install_snap_stamp	:= $(stampdir)/07-install-snap-stamp
+binary_stamp		:= $(stampdir)/08-binary-stamp
+
+configure_dummy_stamp	:= $(stampdir)/04-configure-dummy-stamp
+build_dummy_stamp	:= $(stampdir)/05-build-dummy-stamp
+install_dummy_stamp	:= $(stampdir)/07-install-dummy-stamp
+
+configure_jit_stamp	:= $(stampdir)/04-configure-jit-stamp
+build_jit_stamp		:= $(stampdir)/05-build-jit-stamp
+install_jit_stamp	:= $(stampdir)/07-install-jit-stamp
+
+configure_hppa64_stamp	:= $(stampdir)/04-configure-hppa64-stamp
+build_hppa64_stamp	:= $(stampdir)/05-build-hppa64-stamp
+install_hppa64_stamp	:= $(stampdir)/07-install-hppa64-stamp
+
+configure_neon_stamp	:= $(stampdir)/04-configure-neon-stamp
+build_neon_stamp		:= $(stampdir)/05-build-neon-stamp
+install_neon_stamp	:= $(stampdir)/07-install-neon-stamp
+
+control_dependencies	:= $(patch_stamp)
+
+ifeq ($(single_package),yes)
+    configure_dependencies = $(configure_stamp)
+    build_dependencies = $(build_stamp)
+    install_dependencies = $(install_snap_stamp)
+    ifeq ($(with_check),yes)
+      check_dependencies += $(check_stamp)
+    endif
+else
+  ifeq ($(with_base_only),yes)
+    configure_dependencies = $(configure_dummy_stamp)
+    build_dependencies = $(build_dummy_stamp)
+    install_dependencies = $(install_dummy_stamp)
+  else
+    configure_dependencies = $(configure_stamp)
+    build_dependencies = $(build_stamp)
+    install_dependencies = $(install_stamp)
+    ifeq ($(with_check),yes)
+      check_dependencies += $(check_stamp)
+    endif
+  endif
+endif
+
+ifneq (,$(findstring gcj-, $(PKGSOURCE)))
+  ifeq ($(with_gcj_base_only),yes)
+    configure_dependencies = $(configure_dummy_stamp)
+    build_dependencies = $(build_dummy_stamp)
+    install_dependencies = $(install_dummy_stamp)
+  endif
+endif
+
+ifeq ($(with_jit),yes)
+  build_dependencies += $(build_jit_stamp)
+  install_dependencies += $(install_jit_stamp)
+endif
+
+ifeq ($(with_neon),yes)
+  build_dependencies += $(build_neon_stamp)
+  install_dependencies += $(install_neon_stamp)
+endif
+
+ifeq ($(with_hppa64),yes)
+  build_dependencies += $(build_hppa64_stamp)
+  ifneq ($(trunk_build),yes)
+    install_dependencies += $(install_hppa64_stamp)
+  endif
+endif
+
+build_dependencies += $(check_dependencies)
+
+build_arch_dependencies = $(build_dependencies)
+build_indep_dependencies = $(build_dependencies)
+
+ifneq (,$(findstring build-native, $(build_type)))
+  ifneq ($(single_package),yes)
+    build_indep_dependencies += $(build_html_stamp)
+    ifeq ($(with_cxx),yes)
+      build_indep_dependencies += $(build_doxygen_stamp)
+    endif
+    ifeq ($(with_java),yes)
+      build_arch_dependencies += $(build_html_stamp)
+      build_indep_dependencies += $(build_javasrc_stamp)
+      build_indep_dependencies += $(build_javadoc_stamp)
+    endif
+    ifeq ($(with_ada),yes)
+      build_indep_dependencies += $(build_gnatdoc_stamp)
+    endif
+  endif
+endif
+
+stamp-dir:
+	mkdir -p $(stampdir)
+
+ifeq ($(DEB_CROSS),yes)
+  define cross_mangle_shlibs
+	if [ -f debian/$(1)/DEBIAN/shlibs ]; then \
+	  sed -i s/$(cross_lib_arch)/:$(DEB_TARGET_ARCH)/g debian/$(1)/DEBIAN/shlibs; \
+	fi
+  endef
+  define cross_mangle_substvars
+	if [ -f debian/$(1).substvars ]; then \
+	  sed -i \
+	    -e 's/:$(DEB_TARGET_ARCH)/$(cross_lib_arch)/g' \
+	    -e 's/\(libc[.0-9]*-[^:]*\):\([a-z0-9-]*\)/\1-\2-cross/g' \
+	    $(if $(filter armel,$(DEB_TARGET_ARCH)),-e 's/:armhf/-armhf-cross/g') \
+	    $(if $(filter armhf,$(DEB_TARGET_ARCH)),-e 's/:armel/-armel-cross/g') \
+	    debian/$(1).substvars; \
+	fi
+  endef
+else
+  define cross_mangle_shlibs
+  endef
+  define cross_mangle_substvars
+  endef
+  # precise's dh_shlibdeps doesn't work well for ARM multilibs
+  # and dh_shlibdeps doesn't work well for cross builds, see #698881.
+  ifneq (,$(filter $(distrelease),precise quantal raring))
+    ifneq (,$(filter $(DEB_TARGET_ARCH), armel armhf arm64))
+      ignshld = -
+    endif
+  endif
+endif
+ifeq ($(DEB_STAGE),rtlibs)
+  define cross_mangle_shlibs
+  endef
+  define cross_mangle_substvars
+  endef
+endif
+
+# takes a *list* of package names as $1, the multilib dirname as $2
+_shlibdirs = \
+	$(if $(strip $(1)), \
+	  $(shell find $(foreach p,$(1),$(CURDIR)/debian/$(p)) \
+		-name '*.so.*' -printf '%h ' | uniq)) \
+	$(with_build_sysroot)/lib/$(call mlib_to_march,$(2)) \
+	$(with_build_sysroot)/usr/lib/$(call mlib_to_march,$(2)) \
+	$(with_build_sysroot)$(subst /usr,,/$(usr_lib$(2))) \
+	$(with_build_sysroot)/$(usr_lib$(2)) \
+	$(if $(filter yes,$(biarchsf) $(biarchhf)), \
+	  $(with_build_sysroot)/usr/$(call mlib_to_march,$(2))/lib) \
+	$(if $(filter yes, $(with_common_libs)),, \
+	  $(CURDIR)/$(d)/$(usr_lib$(2)) \
+	  $(CURDIR)/$(d)/usr/$(call mlib_to_march,$(2))/lib)
+shlibdirs_to_search = -l$(subst $(SPACE),:,$(foreach d,$(_shlibdirs),$(d)))
--- gcc-5-5.4.0.orig/debian/rules.parameters
+++ gcc-5-5.4.0/debian/rules.parameters
@@ -0,0 +1,43 @@
+# configuration parameters taken from upstream source files
+GCC_VERSION	:= 5.4.0
+NEXT_GCC_VERSION	:= 5.4.1
+BASE_VERSION	:= 5
+SOURCE_VERSION	:= 5.4.0-6ubuntu1~16.04.3
+DEB_VERSION	:= 5.4.0-6ubuntu1~16.04.3
+DEB_EVERSION	:= 1:5.4.0-6ubuntu1~16.04.3
+DEB_GDC_VERSION	:= 5.4.0-6ubuntu1~16.04.3
+DEB_SOVERSION	:= 5
+DEB_SOEVERSION	:= 1:5
+DEB_LIBGCC_SOVERSION	:= 
+DEB_LIBGCC_VERSION	:= 1:5.4.0-6ubuntu1~16.04.3
+DEB_STDCXX_SOVERSION	:= 5
+DEB_GCJ_SOVERSION	:= 5
+PKG_GCJ_EXT	:= 16
+PKG_LIBGCJ_EXT	:= 16
+DEB_GOMP_SOVERSION	:= 5
+GCC_SONAME	:= 1
+CXX_SONAME	:= 6
+FORTRAN_SONAME	:= 3
+OBJC_SONAME	:= 4
+GCJ_SONAME	:= 16
+GDC_VERSION	:= 5
+GNAT_VERSION	:= 5
+GNAT_SONAME	:= 5
+FFI_SONAME	:= 4
+SSP_SONAME	:= 0
+GOMP_SONAME	:= 1
+ITM_SONAME	:= 1
+ATOMIC_SONAME	:= 1
+BTRACE_SONAME	:= 1
+ASAN_SONAME	:= 2
+LSAN_SONAME	:= 0
+TSAN_SONAME	:= 0
+UBSAN_SONAME	:= 0
+VTV_SONAME	:= 0
+CILKRTS_SONAME	:= 5
+MPX_SONAME	:= 0
+QUADMATH_SONAME	:= 0
+GO_SONAME		:= 7
+CC1_SONAME	:= 0
+GCCJIT_SONAME	:= 0
+LIBC_DEP		:= libc6
--- gcc-5-5.4.0.orig/debian/rules.patch
+++ gcc-5-5.4.0/debian/rules.patch
@@ -0,0 +1,434 @@
+# -*- makefile -*-
+# rules to patch the unpacked files in the source directory
+# ---------------------------------------------------------------------------
+# various rules to unpack addons and (un)apply patches.
+# 	- patch / apply-patches
+#	- unpatch / reverse-patches
+
+.NOTPARALLEL:
+
+patchdir	?= debian/patches
+series_file	?= $(patchdir)/series
+
+# which patches should be applied?
+
+debian_patches = \
+	svn-updates \
+	$(if $(with_linaro_branch),gcc-linaro) \
+	$(if $(with_linaro_branch),gcc-linaro-no-macros) \
+
+#	$(if $(with_linaro_branch),gcc-linaro-revert-r236918) \
+#	$(if $(with_linaro_branch),gcc-linaro-revert-r236444) \
+#	svn-updates \
+
+ifeq ($(with_java),yes)
+#  debian_patches += \
+#	svn-class-updates
+endif
+
+ifneq ($(GFDL_INVARIANT_FREE),yes)
+  debian_patches += \
+	$(if $(with_linaro_branch),gcc-linaro-doc) \
+	$(if $(with_linaro_branch),vulcan-cpu-doc) \
+	rename-info-files \
+	gcc-configure-pie-doc \
+	gcc-SOURCE_DATE_EPOCH-doc \
+	gcc-SOURCE_DATE_EPOCH-2-doc \
+
+#	svn-doc-updates \
+#	$(if $(with_linaro_branch),,svn-doc-updates) \
+
+else
+endif
+debian_patches += \
+	gcc-gfdl-build
+
+#	boehm-gc-nocheck: seems to work on the buildds \
+
+debian_patches += \
+	gcc-textdomain \
+	gcc-driver-extra-langs$(if $(with_linaro_branch),-linaro)
+
+ifneq (,$(filter $(distrelease),etch lenny squeeze wheezy dapper hardy intrepid jaunty karmic lucid))
+  debian_patches += gcc-hash-style-both
+else
+  debian_patches += gcc-hash-style-gnu
+endif
+
+ifneq (,$(filter $(distrelease),wily xenial))
+  debian_patches += libstdc++-random-incl
+endif
+
+debian_patches += \
+	libstdc++-pic \
+	libstdc++-doclink \
+	libstdc++-man-3cxx \
+	libstdc++-test-installed \
+	libjava-stacktrace \
+	libjava-jnipath \
+	libjava-sjlj \
+	libjava-disable-plugin \
+	alpha-no-ev4-directive \
+	boehm-gc-getnprocs \
+	note-gnu-stack \
+	libgomp-omp_h-multilib \
+	sparc-force-cpu \
+	gccgo-version \
+	pr47818 \
+	gcc-base-version \
+	libgo-testsuite \
+	gcc-target-include-asm \
+	libgo-revert-timeout-exp \
+	libgo-setcontext-config \
+	gcc-auto-build \
+	kfreebsd-unwind \
+	kfreebsd-boehm-gc \
+	hurd-boehm-gc \
+	hurd-gprof \
+	libitm-no-fortify-source \
+	sparc64-biarch-long-double-128 \
+	gcc-ia64-bootstrap-ignore \
+	gotools-configury \
+	pr66368 \
+	pr67508 \
+	pr67590 \
+	gcc-configure-pie \
+	ada-gnattools-ldflags \
+	libjit-ldflags \
+	pr69144 \
+	pr66904 \
+	pr68273 \
+	pr70218 \
+	pr69148 \
+	gcc-SOURCE_DATE_EPOCH \
+	gcc-SOURCE_DATE_EPOCH-2$(if $(with_linaro_branch),-linaro) \
+	pr70192 \
+	gcc-ignore-fdebug-prefix-map-in-producer-string \
+	$(if $(with_linaro_branch),vulcan-cpu-linaro) \
+	pr71709 \
+	pr72863 \
+
+# this is still needed on powerpc, e.g. firefox and insighttoolkit4 will ftbfs.
+ifneq (,$(filter $(DEB_TARGET_ARCH),powerpc))
+  debian_patches += pr65913-workaround
+endif
+
+# this is needed on mips 32-bit to fix GCC generating wrong function calls.
+# people do not agree yet where that should be fixed, so only apply the
+# proposed patch on mips and mipsel.
+ifneq (,$(filter $(DEB_TARGET_ARCH),mips mipsel))
+  debian_patches += pr68273-proposed
+endif
+
+ifeq ($(libstdcxx_abi),new)
+  debian_patches += libstdc++-functexcept
+endif
+
+#	$(if $(filter yes, $(DEB_CROSS)),,gcc-print-file-name) \
+#	libstdc++-nothumb-check \
+# TODO: update ...
+#	libjava-rpath \
+
+hardening_patches =
+ifeq ($(with_ssp)-$(with_ssp_default),yes-yes)
+  hardening_patches += gcc-default-ssp
+  hardening_patches += gcc-default-format-security
+  ifeq (,$(filter $(distrelease),dapper hardy lucid maverick natty oneiric precise quantal raring saucy trusty))
+    hardening_patches += gcc-default-ssp-strong
+  endif
+endif
+ifeq ($(distribution),Ubuntu)
+  ifneq (,$(findstring gcc-5, $(PKGSOURCE)))
+    hardening_patches += \
+	gcc-default-fortify-source \
+	gcc-default-relro \
+	testsuite-hardening-format \
+	testsuite-hardening-printf-types \
+	testsuite-hardening-updates \
+	testsuite-glibc-warnings
+    ifeq ($(with_pie),yes)
+      hardening_patches += \
+	bind_now_when_pie-ubuntu
+    endif
+  endif
+endif
+
+# FIXME 4.5: Drop and adjust symbols files
+ifneq (,$(findstring 4.4, $(PKGSOURCE)))
+  debian_patches += pr39491
+endif
+
+debian_patches += ada-arm
+debian_patches += ada-hurd
+debian_patches += ada-kfreebsd
+debian_patches += ada-revert-pr63225
+
+ifeq ($(with_ada),yes)
+  debian_patches += \
+	ada-driver-check \
+	ada-gcc-name \
+	ada-default-project-path \
+	ada-library-project-files-soname
+
+	# FIXME: needs update
+	#ada-symbolic-tracebacks \
+
+  ifeq ($(biarch64),yes)
+    debian_patches += \
+	ada-nobiarch-check
+  endif
+
+  ifeq ($(with_libgnat),yes)
+    debian_patches += \
+	ada-link-lib \
+	ada-libgnatvsn \
+	ada-libgnatprj \
+	ada-gnattools-cross \
+	ada-acats \
+	libgnatprj-cross-hack
+    ifneq (,$(filter $(distrelease),lucid precise))
+      debian_patches += \
+	libgnatprj-link
+    endif
+  endif
+  ifeq ($(with_gnatsjlj),yes)
+    debian_patches += \
+	ada-sjlj
+  endif
+
+  debian_patches += ada-link-shlib
+endif
+
+ifeq ($(with_d),yes)
+  debian_patches += \
+	gdc-5 \
+	gdc-versym-cpu \
+	gdc-versym-os \
+	gdc-frontend-posix \
+	gdc-base-version \
+	gdc-profiledbuild \
+#	gdc-updates
+#	gdc-multiarch
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+#    debian_patches += gdc-5-doc
+  else
+    debian_patches += gdc-texinfo
+  endif
+  ifeq ($(with_libphobos),yes)
+    debian_patches += gdc-libphobos-build
+  else
+    debian_patches += gdc-driver-nophobos
+  endif
+  ifeq (,$(filter $(DEB_TARGET_ARCH),amd64 i386))
+    debian_patches += disable-gdc-tests
+  endif
+else
+  debian_patches += gcc-d-lang
+endif
+
+ifeq ($(DEB_TARGET_ARCH),alpha)
+  debian_patches += alpha-ieee
+  ifneq ($(GFDL_INVARIANT_FREE),yes)
+    debian_patches += alpha-ieee-doc
+  endif
+endif
+
+ifneq (,$(findstring $(DEB_TARGET_ARCH),arm armel armhf))
+  debian_patches += libjava-armel-unwind
+endif
+
+ifeq ($(DEB_TARGET_ARCH),armhf)
+ debian_patches += gcj-arm-mode
+else ifeq ($(DEB_TARGET_ARCH),armel)
+  ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise))
+    debian_patches += gcj-arm-mode
+  endif
+endif
+
+ifeq ($(DEB_TARGET_ARCH),powerpcspe)
+  debian_patches += powerpc_remove_many
+  debian_patches += powerpc_nofprs
+endif
+
+# Proposed patch to fix libjava on mips64el
+ifeq ($(DEB_TARGET_ARCH),mips64el)
+  debian_patches += libjava-mips64el-proposed
+endif
+
+#debian_patches += link-libs
+
+# all patches below this line are applied for gcc-snapshot builds as well
+
+ifeq ($(single_package),yes)
+  debian_patches =
+endif
+
+debian_patches += $(if $(with_linaro_branch),,gcc-sysroot)
+debian_patches += \
+	sys-auxv-header \
+	libcilkrts-targets \
+
+ifeq ($(with_ibm_branch),yes)
+  debian_patches += ibm-branch
+else
+  debian_patches += go-use-gold
+endif
+
+ifeq ($(with_softfloat),yes)
+  debian_patches += arm-multilib-soft-float
+else ifeq ($(multilib),yes)
+  ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise))
+    debian_patches += arm-multilib-softfp$(if $(filter yes,$(DEB_CROSS)),-cross)
+  else
+    debian_patches += arm-multilib-soft$(if $(filter yes,$(DEB_CROSS)),-cross)
+  endif
+endif
+debian_patches += arm-multilib-defaults
+
+ifeq ($(DEB_CROSS),yes)
+  debian_patches += cross-fixes
+  debian_patches += cross-install-location
+  ifeq ($(with_d),yes)
+    debian_patches += gdc-cross-install-location
+  endif
+endif
+
+ifeq ($(DEB_TARGET_ARCH_OS),hurd)
+  debian_patches += hurd-changes
+endif
+
+debian_patches += gcc-ice-dump
+debian_patches += gcc-ice-apport
+debian_patches += skip-bootstrap-multilib
+debian_patches += libjava-fixed-symlinks
+debian_patches += libffi-ro-eh_frame_sect
+
+# sigaction on sparc changed between glibc 2.19 and 2.21
+ifeq (,$(filter 2.1%, $(shell dpkg-query -l libc-bin | awk '/^.i/ {print $$3}')))
+  debian_patches += pr67899
+endif
+
+debian_patches += gcc-multiarch
+ifeq ($(with_multiarch_lib),yes)
+  ifneq ($(single_package),yes)
+    debian_patches += libjava-multiarch
+  endif
+endif
+debian_patches += libjava-nobiarch-check
+debian_patches += config-ml
+ifneq ($(single_package),yes)
+  ifeq ($(with_multiarch_cxxheaders),yes)
+    debian_patches += g++-multiarch-incdir
+    debian_patches += canonical-cpppath
+  endif
+endif
+ifneq (,$(filter $(build_type), build-cross cross-build-cross))
+  debian_patches += cross-no-locale-include
+  debian_patches += cross-biarch
+  ifeq ($(with_libphobos),yes)
+    debian_patches += gdc-cross-biarch
+  endif
+endif
+debian_patches += gcc-multilib-multiarch
+
+ifneq (,$(filter $(derivative),Ubuntu))
+  ifeq (,$(filter $(distrelease),dapper hardy intrepid jaunty karmic lucid maverick))
+    debian_patches += gcc-as-needed
+  endif
+else # Debian
+    #debian_patches += gcc-as-needed
+endif
+
+debian_patches += libgomp-kfreebsd-testsuite
+debian_patches += go-testsuite
+# FIXME: Still relevant?
+#debian_patches += pr61106
+
+# Ada patches needed for both the stable package and snapshot builds
+debian_patches += ada-749574
+debian_patches += ada-mips
+debian_patches += ada-bootstrap-compare
+ifeq ($(DEB_TARGET_ARCH),m68k)
+  debian_patches += ada-m68k
+  ifeq ($(with_ada),yes)
+    debian_patches += m68k-revert-pr45144
+  endif
+endif
+
+# don't remove, this is regularly overwritten, see PR sanitizer/63958.
+#debian_patches += libasan-sparc
+
+series_stamp = $(stampdir)/02-series-stamp
+series: $(series_stamp)
+$(series_stamp):
+	echo $(strip $(addsuffix .diff,$(debian_patches))) \
+	  | sed -r 's/  +/ /g' | tr " " "\n" > $(series_file)
+ifneq (,$(strip $(hardening_patches)))
+  ifneq ($(trunk_build),yes)
+	echo $(strip $(addsuffix .diff,$(hardening_patches))) \
+	  | sed -r 's/  +/ /g' | tr " " "\n" >> $(series_file)
+  endif
+endif
+	sed -r 's/(.)$$/\1 -p1/' -i $(series_file)
+	touch $@
+
+autoconf_files = $(filter-out src/libjava/classpath/m4/acinclude.m4, \
+	  $(shell lsdiff --no-filename $(foreach patch,$(debian_patches),$(patchdir)/$(patch).diff) \
+	    | sed -rn '/(configure\.ac|acinclude.m4)$$/s:[^/]+/src/:src/:p' | sort -u))
+autoconf_dirs = $(sort $(dir $(autoconf_files)))
+
+automake_files = $(addprefix ./, $(filter-out none, \
+	  $(shell lsdiff --no-filename $(foreach patch,$(debian_patches),$(patchdir)/$(patch).diff) \
+	    | sed -rn '/Makefile\.(am|in)$$/s:[^/]+/src/:src/:p' | sort -u)))
+
+autoconf_version = 2.64
+ifeq ($(trunk_build),yes)
+  # The actual version depends on the build-dependencies set by
+  # variable AUTO_BUILD_DEP in rules.conf.  Here, we assume the
+  # correct version is installed.
+  #autoconf_version =
+endif
+
+# FIXME: the auto* stuff is done every time for every subdir, which
+# leads to build errors. Idea: record the auto* calls in the patch
+# files (AUTO <dir> <auto-command with options>) and run them separately,
+# maybe only once per directory).
+$(patch_stamp): $(unpack_stamp) $(series_stamp)
+	sync
+	QUILT_PATCHES=$(patchdir) \
+	  quilt --quiltrc /dev/null push -a || test $$? = 2
+
+ifneq (,$(filter svn-updates, $(debian_patches)))
+	awk '/^EOF/ {exit} p==1 {print} /EOF$$/ {p=1}' \
+	  $(patchdir)/svn-updates.diff > src/LAST_UPDATED
+endif
+
+	: # only needed when we have changes, and currently fails with autogen 5.18
+	: #cd $(srcdir)/fixincludes && ./genfixes
+
+	sync
+	echo -n $(autoconf_dirs) | xargs -d ' ' -L 1 -P $(USE_CPUS) -I{} \
+	  sh -c 'echo "Running autoconf$(autoconf_version) in {}..." ; \
+	  cd $(CURDIR)/{} && \
+	  AUTOM4TE=/usr/bin/autom4te$(autoconf_version) autoconf$(autoconf_version)'
+
+	for i in $(debian_patches) $(hardening_patches); do \
+	  echo -e "\n$$i:" >> pxxx; \
+	  sed -n 's/^# *DP: */  /p' $(patchdir)/$$i.diff >> pxxx; \
+	done
+#	-$(srcdir)/move-if-change pxxx $@
+	mv pxxx $@
+
+unpatch:
+	QUILT_PATCHES=$(patchdir) \
+	  quilt --quiltrc /dev/null pop -a -R || test $$? = 2
+	rm -rf .pc
+
+update-patches: $(series_stamp)
+	export QUILT_PATCHES=$(patchdir); \
+	export QUILT_REFRESH_ARGS="--no-timestamps --no-index -pab"; \
+	export QUILT_DIFF_ARGS="--no-timestamps --no-index -pab"; \
+	while quilt push; do quilt refresh; done
+
+patch: $(patch_stamp)
+.PHONY: patch series quilt autotools
--- gcc-5-5.4.0.orig/debian/rules.sonames
+++ gcc-5-5.4.0/debian/rules.sonames
@@ -0,0 +1,96 @@
+ifneq ($(vafilt_defined),1)
+  $(error rules.defs must be included before rules.sonames)
+endif
+
+ifeq (,$(wildcard debian/soname-cache))
+  SONAME_VARS := $(shell \
+	cache=debian/soname-cache; \
+	rm -f $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libstdc++-v3/acinclude.m4`; \
+	echo CXX_SONAME=$$v >> $$cache; \
+	v=`awk -F= '/^VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libobjc/configure.ac`; \
+	echo OBJC_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libgfortran/libtool-version | cut -d: -f1`; \
+	echo FORTRAN_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libssp/libtool-version | cut -d: -f1`; \
+	echo SSP_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libjava/libtool-version | cut -d: -f1`; \
+	echo GCJ_SONAME=$$v >> $$cache; \
+	if [ "$$v" -ge 70 ]; then \
+	  echo GCJ_SONAME1=`echo $$v | sed 's/.$$//'` >> $$cache; \
+	  echo GCJ_SONAME2=`echo $$v | sed 's/.*\(.\)$$/\1/'` >> $$cache; \
+	else \
+	  echo GCJ_SONAME1=$$v >> $$cache; \
+	  echo GCJ_SONAME2= >> $$cache; \
+	fi; \
+	v=`tail -1 $(srcdir)/libffi/libtool-version | cut -d: -f1`; \
+	echo FFI_SONAME=$$v >> $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libgomp/configure.ac`; \
+	echo GOMP_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libsanitizer/asan/libtool-version | cut -d: -f1`; \
+	echo ASAN_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libsanitizer/lsan/libtool-version | cut -d: -f1`; \
+	echo LSAN_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libsanitizer/tsan/libtool-version | cut -d: -f1`; \
+	echo TSAN_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libsanitizer/ubsan/libtool-version | cut -d: -f1`; \
+	echo UBSAN_SONAME=$$v >> $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libatomic/configure.ac`; \
+        v=1; \
+	echo ATOMIC_SONAME=$$v >> $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libbacktrace/configure.ac`; \
+	echo BTRACE_SONAME=$$v >> $$cache; \
+	v=`tail -1 $(srcdir)/libquadmath/libtool-version | cut -d: -f1`; \
+	  echo QUADMATH_SONAME=$$v >> $$cache; \
+	v=`grep '[^_]Library_Version.*:' $(srcdir)/gcc/ada/gnatvsn.ads \
+		| sed -e 's/.*"\([^"]*\)".*/\1/'`; \
+	echo GNAT_SONAME=$$v >> $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libgo/configure.ac`; \
+	echo GO_SONAME=$$v >> $$cache; \
+	echo ITM_SONAME=1 >> $$cache; \
+	v=`awk -F= '/^libtool_VERSION/ {split($$2,v,":"); print v[1]}' \
+		$(srcdir)/libvtv/configure.ac`; \
+	v=0; \
+	echo VTV_SONAME=$$v >> $$cache; \
+	echo CILKRTS_SONAME=5 >> $$cache; \
+	echo CC1_SONAME=0 >> $$cache; \
+	echo GCCJIT_SONAME=0 >> $$cache; \
+	echo MPX_SONAME=0 >> $$cache; \
+	cat $$cache)
+else
+  SONAME_VARS := $(shell cat debian/soname-cache)
+endif
+CXX_SONAME	= $(call vafilt,$(SONAME_VARS),CXX_SONAME)
+OBJC_SONAME	= $(call vafilt,$(SONAME_VARS),OBJC_SONAME)
+FORTRAN_SONAME	= $(call vafilt,$(SONAME_VARS),FORTRAN_SONAME)
+SSP_SONAME	= $(call vafilt,$(SONAME_VARS),SSP_SONAME)
+GCJ_SONAME	= $(call vafilt,$(SONAME_VARS),GCJ_SONAME)
+GCJ_SONAME1	= $(call vafilt,$(SONAME_VARS),GCJ_SONAME1)
+GCJ_SONAME2	= $(call vafilt,$(SONAME_VARS),GCJ_SONAME2)
+FFI_SONAME	= $(call vafilt,$(SONAME_VARS),FFI_SONAME)
+GOMP_SONAME	= $(call vafilt,$(SONAME_VARS),GOMP_SONAME)
+ATOMIC_SONAME	= $(call vafilt,$(SONAME_VARS),ATOMIC_SONAME)
+BTRACE_SONAME	= $(call vafilt,$(SONAME_VARS),BTRACE_SONAME)
+ASAN_SONAME	= $(call vafilt,$(SONAME_VARS),ASAN_SONAME)
+LSAN_SONAME	= $(call vafilt,$(SONAME_VARS),LSAN_SONAME)
+TSAN_SONAME	= $(call vafilt,$(SONAME_VARS),TSAN_SONAME)
+UBSAN_SONAME	= $(call vafilt,$(SONAME_VARS),UBSAN_SONAME)
+VTV_SONAME	= $(call vafilt,$(SONAME_VARS),VTV_SONAME)
+CILKRTS_SONAME	= $(call vafilt,$(SONAME_VARS),CILKRTS_SONAME)
+QUADMATH_SONAME	= $(call vafilt,$(SONAME_VARS),QUADMATH_SONAME)
+GNAT_SONAME	= $(call vafilt,$(SONAME_VARS),GNAT_SONAME)
+GO_SONAME	= $(call vafilt,$(SONAME_VARS),GO_SONAME)
+ITM_SONAME	= $(call vafilt,$(SONAME_VARS),ITM_SONAME)
+CC1_SONAME	= $(call vafilt,$(SONAME_VARS),CC1_SONAME)
+GCCJIT_SONAME	= $(call vafilt,$(SONAME_VARS),GCCJIT_SONAME)
+MPX_SONAME	= $(call vafilt,$(SONAME_VARS),MPX_SONAME)
+
+# alias
+GFORTRAN_SONAME = $(FORTRAN_SONAME)
+STDC++_SONAME = $(CXX_SONAME)
--- gcc-5-5.4.0.orig/debian/rules.source
+++ gcc-5-5.4.0/debian/rules.source
@@ -0,0 +1,15 @@
+SOURCE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+patchdir = $(SOURCE_DIR)/patches
+
+include $(SOURCE_DIR)/debian/rules.defs
+include $(SOURCE_DIR)/debian/rules.patch
+include $(SOURCE_DIR)/debian/rules.unpack
+
+patch-source: $(patch_stamp)
+
+clean-source:
+	rm -rf $(stampdir)
+	rm -rf $(gcc_srcdir) $(gdc_srcdir)
+	rm -rf bin
+	rm -rf $(srcdir)
+
--- gcc-5-5.4.0.orig/debian/rules.unpack
+++ gcc-5-5.4.0/debian/rules.unpack
@@ -0,0 +1,244 @@
+# -*- makefile -*-
+# rules to unpack the source tarballs in $(srcdir); if the source dir already
+# exists, the rule exits with an error to prevent deletion of modified
+# source files. It has to be deleted manually.
+
+tarballs = $(gcc_tarball) # $(gcj_tarball)
+ifeq ($(with_d),yes)
+  tarballs += $(gdc_tarball)
+endif
+
+unpack_stamps = $(foreach i,$(tarballs),$(unpack_stamp)-$(i))
+
+unpack: stamp-dir $(unpack_stamp) debian-chmod
+$(unpack_stamp): $(unpack_stamps)
+$(unpack_stamp): $(foreach p,$(debian_tarballs),unpacked-$(p))
+	echo -e "\nBuilt from Debian source package $(PKGSOURCE)-$(SOURCE_VERSION)" \
+		> pxxx
+	echo -e "Integrated upstream packages in this version:\n" >> pxxx
+	for i in $(tarballs); do echo "  $$i" >> pxxx; done
+	mv -f pxxx $@
+
+debian-chmod:
+	@chmod 755 debian/dh_*
+
+# ---------------------------------------------------------------------------
+
+gfdl_texinfo_files = \
+	gcc/doc/avr-mmcu.texi \
+	gcc/doc/bugreport.texi \
+	gcc/doc/cfg.texi \
+	gcc/doc/collect2.texi \
+	gcc/doc/compat.texi \
+	gcc/doc/configfiles.texi \
+	gcc/doc/configterms.texi \
+	gcc/doc/contrib.texi \
+	gcc/doc/contribute.texi \
+	gcc/doc/cpp.texi \
+	gcc/doc/cppenv.texi \
+	gcc/doc/cppinternals.texi \
+	gcc/doc/cppopts.texi \
+	gcc/doc/extend.texi \
+	gcc/doc/fragments.texi \
+	gcc/doc/frontends.texi \
+	gcc/doc/gccint.texi \
+	gcc/doc/gcov.texi \
+	gcc/doc/generic.texi \
+	gcc/doc/gimple.texi \
+	gcc/doc/gnu.texi \
+	gcc/doc/gty.texi \
+	gcc/doc/headerdirs.texi \
+	gcc/doc/hostconfig.texi \
+	gcc/doc/implement-c.texi \
+	gcc/doc/implement-cxx.texi \
+	gcc/doc/install-old.texi \
+	gcc/doc/install.texi \
+	gcc/doc/interface.texi \
+	gcc/doc/invoke.texi \
+	gcc/doc/languages.texi \
+	gcc/doc/libgcc.texi \
+	gcc/doc/loop.texi \
+	gcc/doc/lto.texi \
+	gcc/doc/makefile.texi \
+	gcc/doc/match-and-simplify.texi \
+	gcc/doc/md.texi \
+	gcc/doc/objc.texi \
+	gcc/doc/optinfo.texi \
+	gcc/doc/options.texi \
+	gcc/doc/passes.texi \
+	gcc/doc/plugins.texi \
+	gcc/doc/portability.texi \
+	gcc/doc/rtl.texi \
+	gcc/doc/service.texi \
+	gcc/doc/sourcebuild.texi \
+	gcc/doc/standards.texi \
+	gcc/doc/tm.texi.in \
+	gcc/doc/tm.texi \
+	gcc/doc/tree-ssa.texi \
+	gcc/doc/trouble.texi \
+	gcc/doc/include/gcc-common.texi \
+	gcc/doc/include/funding.texi \
+	gcc/fortran/gfc-internals.texi \
+	gcc/fortran/invoke.texi \
+	gcc/fortran/intrinsic.texi \
+	gcc/ada/projects.texi \
+
+
+gfdl_toplevel_texinfo_files = \
+	gcc/doc/gcc.texi \
+	gcc/java/gcj.texi \
+	gcc/ada/gnat-style.texi \
+	gcc/ada/gnat_rm.texi \
+	gcc/ada/gnat_ugn.texi \
+	gcc/fortran/gfortran.texi \
+	gcc/go/gccgo.texi \
+	libgomp/libgomp.texi \
+	libquadmath/libquadmath.texi \
+
+gfdl_manpages = \
+	gcc/doc/cpp.1 \
+	gcc/doc/g++.1 \
+	gcc/doc/gc-analyze.1 \
+	gcc/doc/gcc.1 \
+	gcc/doc/gccgo.1 \
+	gcc/doc/gcj.1 \
+	gcc/doc/gcj-dbtool.1 \
+	gcc/doc/gcjh.1 \
+	gcc/doc/gcov.1 \
+	gcc/doc/gfortran.1 \
+	gcc/doc/gij.1 \
+	gcc/doc/grmic.1 \
+	gcc/doc/grmiregistry.1 \
+	gcc/doc/jcf-dump.1 \
+	gcc/doc/jv-convert.1 \
+	gcc/doc/fsf-funding.7 \
+
+# ---------------------------------------------------------------------------
+$(unpack_stamp)-$(gcc_tarball): $(gcc_tarpath)
+	: # unpack gcc tarball
+	mkdir -p $(stampdir)
+	if [ -d $(srcdir) ]; then \
+	  echo >&2 "Source directory $(srcdir) exists. Delete by hand"; \
+	  false; \
+	fi
+	rm -rf $(gcc_srcdir)
+	tar -x -f $(gcc_tarpath)
+	mv $(gcc_srcdir) $(srcdir)
+	ln -sf libsanitizer $(srcdir)/libasan
+ifneq (,$(wildcard java-class-files.tar.xz.uue))
+# work around #533356
+#	uudecode -o - java-class-files.tar.xz.uue | tar -C src -xvz
+	uudecode java-class-files.tar.xz.uue
+	xzcat java-class-files.tar.xz | tar -C src -xv -f -
+	rm -f java-class-files.tar.xz
+endif
+#ifeq ($(with_java),yes)
+#	tar -x -C $(srcdir)/libjava/testsuite/libmauve.exp \
+#		$(wildcard /usr/src/mauve*.tar.*)
+#endif
+ifeq (0,1)
+	cd $(srcdir) && tar cfj ../gcc-4.1.1-doc.tar.bz2 \
+		$(gfdl_texinfo_files) \
+		$(gfdl_toplevel_texinfo_files) \
+		$(gfdl_manpages)
+endif
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+  ifneq ($(single_package),yes)
+	rm -f $(srcdir)/gcc/doc/*.1
+	rm -f $(srcdir)/gcc/doc/fsf-funding.7
+	rm -f $(srcdir)/gcc/doc/*.info
+	rm -f $(srcdir)/gcc/fortran/*.info
+	rm -f $(srcdir)/libgomp/*.info
+	rm -f $(srcdir)/gcc/java/*.1
+	rm -f $(srcdir)/gcc/java/*.info
+	for i in $(gfdl_texinfo_files); do \
+	  if [ -f $(srcdir)/$$i ]; then \
+	    cp $(SOURCE_DIR)debian/dummy.texi $(srcdir)/$$i; \
+	  else \
+	    cp $(SOURCE_DIR)debian/dummy.texi $(srcdir)/$$i; \
+	    echo >&2 "$$i does not exist, fix debian/rules.unpack"; \
+	  fi; \
+	done
+	for i in $(gfdl_toplevel_texinfo_files); do \
+	  n=$$(basename $$i .texi); \
+	  if [ -f $(srcdir)/$$i ]; then \
+	    sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \
+	      > $(srcdir)/$$i; \
+	  else \
+	    sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \
+	      > $(srcdir)/$$i; \
+	    echo >&2 "$$i does not exist, fix debian/rules.unpack"; \
+	  fi; \
+	done
+	for i in $(gfdl_manpages); do \
+	  touch $(srcdir)/$$i; \
+	done
+	rm -f $(srcdir)/INSTALL/*.html
+  endif
+endif
+	echo "$(gcc_tarball) unpacked." > $@
+
+# ---------------------------------------------------------------------------
+ifneq (,$(gcj_tarball))
+$(unpack_stamp)-$(gcj_tarball): $(gcj_tarpath) $(unpack_stamp)-$(gcc_tarball)
+	: # unpack gcj tarball
+	rm -rf $(srcdir)/gcc/java $(srcdir)/libjava
+	tar -x -C $(srcdir) -f $(gcj_tarpath)
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+  ifneq ($(single_package),yes)
+	rm -f $(srcdir)/gcc/java/*.1
+	rm -f $(srcdir)/gcc/java/*.info
+	for i in $(gfdl_texinfo_files); do \
+	  if [ -f $(srcdir)/$$i ]; then \
+	    cp $(SOURCE_DIR)debian/dummy.texi $(srcdir)/$$i; \
+	  else \
+	    echo >&2 "$$i does not exist, fix debian/rules.unpack"; \
+	  fi; \
+	done
+	for i in $(gfdl_toplevel_texinfo_files); do \
+	  n=$$(basename $$i .texi); \
+	  if [ -f $(srcdir)/$$i ]; then \
+	    sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \
+	      > $(srcdir)/$$i; \
+	  else \
+	    echo >&2 "$$i does not exist, fix debian/rules.unpack"; \
+	  fi; \
+	done
+  endif
+endif
+	echo "$(gcj_tarball) unpacked." > $@
+endif
+
+# ---------------------------------------------------------------------------
+ifneq (,$(gdc_tarball))
+$(unpack_stamp)-$(gdc_tarball): $(gdc_tarpath) $(unpack_stamp)-$(gcc_tarball)
+	: # unpack gdc tarball
+	mkdir -p $(stampdir)
+	if [ -d $(srcdir)/gcc/d ]; then \
+	  echo >&2 "Source directory $(srcdir)/gcc/d exists. Delete by hand";\
+	  false; \
+	fi
+	#rm -rf $(gdc_srcdir)
+	rm -rf $(srcdir)/gcc/d
+	rm -rf $(srcdir)/gcc/testsuite/gdc.test
+	rm -f $(srcdir)/gcc/testsuite/lib/gdc*.exp
+	rm -rf $(srcdir)/libphobos
+	tar -x -C $(srcdir) --strip-components=1 -f $(gdc_tarpath)
+ifeq ($(GFDL_INVARIANT_FREE),yes-now-purge-gfdl)
+  ifneq ($(single_package),yes)
+	for i in gcc/d/gdc.texi; do \
+	  n=$$(basename $$i .texi); \
+	  if [ -f $(srcdir)/$$i ]; then \
+	    sed "s/@name@/$$n/g" $(SOURCE_DIR)debian/gcc-dummy.texi \
+	      > $(srcdir)/$$i; \
+	  else \
+	    echo >&2 "$$i does not exist, fix debian/rules.unpack"; \
+	  fi; \
+	done
+	for i in gcc/d/gdc.1; do \
+	  touch $(srcdir)/$$i; \
+	done
+  endif
+endif
+	echo "$(gdc_tarball) unpacked." > $@
+endif
--- gcc-5-5.4.0.orig/debian/rules2
+++ gcc-5-5.4.0/debian/rules2
@@ -0,0 +1,2617 @@
+#! /usr/bin/make -f
+# -*- makefile -*-
+
+# Uncomment this to turn on verbose mode.
+#export DH_VERBOSE=1
+
+.SUFFIXES:
+
+include debian/rules.defs
+include debian/rules.parameters
+
+dh_compat2 := $(shell dpkg --compare-versions "$$(dpkg-query -f '$${Version}' -W debhelper)" lt 9.20150811ubuntu2 \
+			&& echo DH_COMPAT=2)
+
+# some tools
+SHELL	= /bin/bash -e		# brace expansion in rules file
+IR	= install -m 644	# Install regular file
+IP	= install -m 755	# Install program
+IS	= install -m 755	# Install script
+
+# kernel-specific ulimit hack
+ifeq ($(findstring linux,$(DEB_HOST_GNU_SYSTEM)),linux)
+  ULIMIT_M =  if [ -e /proc/meminfo ]; then \
+	    m=`awk '/^((Mem|Swap)Free|Cached)/{m+=$$2}END{print int(m*.9)}' \
+		/proc/meminfo`; \
+	  else \
+	    m=`vmstat --free --swap-free --kilobytes|awk '{m+=$$2}END{print int(m*.9)}'`; \
+	  fi; \
+	  echo "Limiting memory for test runs to $${m}kB"; \
+	  if ulimit -m $$m; then \
+	    echo "  limited to `ulimit -m`kB"; \
+	  else \
+	    echo "  failed"; \
+	  fi
+else
+  ULIMIT_M = true
+endif
+
+ifeq ($(locale_data),generate)
+  SET_LOCPATH = LOCPATH=$(CURDIR)/locales
+endif
+
+SET_PATH = PATH=$(CURDIR)/bin:/usr/$(libdir)/gcc/bin:$$PATH
+ifeq ($(trunk_build),yes)
+  ifneq (,$(findstring sparc64-linux,$(DEB_TARGET_GNU_TYPE)))
+    SET_PATH = PATH=/usr/lib/gcc-snapshot/bin:$(CURDIR)/bin:/usr/$(libdir)/gcc/bin:$$PATH
+  endif
+  ifneq (,$(findstring ppc64-linux,$(DEB_TARGET_GNU_TYPE)))
+    SET_PATH = PATH=/usr/lib/gcc-snapshot/bin:$(CURDIR)/bin:/usr/$(libdir)/gcc/bin:$$PATH
+  endif
+endif
+
+# the recipient for the test summaries. Send with: debian/rules mail-summary
+S_EMAIL = gcc@packages.debian.org gcc-testresults@gcc.gnu.org
+
+# build not yet prepared to take variables from the environment
+define unsetenv
+  unexport $(1)
+  $(1) =
+endef
+$(foreach v, CPPFLAGS CFLAGS CXXFLAGS DFLAGS FFLAGS FCFLAGS LDFLAGS OBJCFLAGS OBJCXXFLAGS GCJFLAGS, $(if $(filter environment,$(origin $(v))),$(eval $(call unsetenv, $(v)))))
+
+CC = $(notdir $(firstword $(wildcard \
+	/usr/bin/$(DEB_HOST_GNU_TYPE)-gcc-5 /usr/bin/$(DEB_HOST_GNU_TYPE)-gcc)))
+CXX = $(notdir $(firstword $(wildcard \
+	/usr/bin/$(DEB_HOST_GNU_TYPE)-g++-5 /usr/bin/$(DEB_HOST_GNU_TYPE)-g++)))
+ifeq ($(with_ada),yes)
+  GNAT = $(notdir $(firstword $(wildcard \
+	/usr/bin/$(DEB_HOST_GNU_TYPE)-gnat-5 /usr/bin/$(DEB_HOST_GNU_TYPE)-gnat /usr/bin/gnatgcc)))
+  ifeq ($(GNAT),gnatgcc)
+    CC := $(shell readlink /usr/bin/gnatgcc)
+  else ifneq (,$(GNAT))
+    CC = $(subst gnat,gcc,$(GNAT))
+  else ifneq (,$(filter $(distrelease), trusty))
+    CC = gcc-4.8
+  else ifneq (,$(wildcard /usr/bin/$(DEB_HOST_GNU_TYPE)-gcc))
+    CC = $(DEB_HOST_GNU_TYPE)-gcc
+  else
+    CC = gcc
+  endif
+  CXX = $(subst gcc,g++,$(CC))
+endif
+
+ifneq (,$(filter $(build_type),cross-build-native cross-build-cross))
+  SET_TARGET_TOOLS = \
+	CC_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gcc-$(BASE_VERSION) \
+	CXX_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-g++-$(BASE_VERSION) \
+	GFORTRAN_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gfortran-$(BASE_VERSION) \
+	GCJ_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gcj-$(BASE_VERSION) \
+	GOC_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gccgo-$(BASE_VERSION) \
+	GNAT_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gnat-$(BASE_VERSION) \
+	GDC_FOR_TARGET=$(DEB_TARGET_GNU_TYPE)-gdc-$(BASE_VERSION)
+endif
+
+ifeq ($(DEB_BUILD_GNU_TYPE),$(DEB_TARGET_GNU_TYPE))
+  CC_FOR_TARGET = $(builddir)/gcc/xgcc -B$(builddir)/gcc/
+else
+  CC_FOR_TARGET = $(DEB_TARGET_GNU_TYPE)-gcc
+endif
+
+ifneq ($(derivative),Ubuntu)
+  ifneq (,$(filter $(DEB_TARGET_ARCH), arm armel mips mipsel))
+    STAGE1_CFLAGS = -g -O2
+  endif
+endif
+
+# work around PR 57689
+ifeq ($(DEB_TARGET_ARCH),ia64)
+  BOOT_CFLAGS	= -g -O1
+endif
+
+ifeq ($(with_ssp_default),yes)
+  STAGE1_CFLAGS	= -g
+  ifeq (,$(BOOT_CFLAGS))
+    BOOT_CFLAGS	= -g -O2
+  endif
+  LIBCFLAGS		= -g -O2
+  LIBCXXFLAGS	= -g -O2 -fno-implicit-templates
+  # Only use -fno-stack-protector when known to the stage1 compiler.
+  cc-fno-stack-protector := $(shell if $(CC) $(CFLAGS) -fno-stack-protector \
+                             -S -o /dev/null -xc /dev/null > /dev/null 2>&1; \
+							 then echo "-fno-stack-protector"; fi;)
+  $(foreach var,STAGE1_CFLAGS BOOT_CFLAGS LIBCFLAGS LIBCXXFLAGS,$(eval \
+    $(var) += $(cc-fno-stack-protector)))
+endif
+
+# FIXME: passing LDFLAGS for native doesn't do anything
+ifneq (,$(filter $(build_type), build-cross cross-build-cross))
+  CFLAGS	= -g -O2
+  LDFLAGS	= -Wl,-z,relro
+  ifeq ($(DEB_TARGET_ARCH),alpha)
+    LDFLAGS += -Wl,--no-relax
+  endif
+else
+  BOOT_LDFLAGS	= -Wl,-z,relro
+  ifeq ($(DEB_TARGET_ARCH),alpha)
+    BOOT_LDFLAGS += -Wl,--no-relax
+  endif
+endif
+LDFLAGS_FOR_TARGET = -Wl,-z,relro
+ifeq ($(DEB_TARGET_ARCH),alpha)
+  LDFLAGS := $(filter-out -Wl$(COMMA)--no-relax, $(LDFLAGS)) -Wl,--no-relax
+endif
+
+ifneq (,$(findstring static,$(DEB_BUILD_OPTIONS)))
+  LDFLAGS	+= -static
+endif
+
+ifneq ($(findstring gccdebug, $(DEB_BUILD_OPTIONS)),)
+  CFLAGS		= -O0 -g3 -fno-inline
+  CXXFLAGS		= -O0 -g3 -fno-inline
+  CFLAGS_FOR_BUILD	= -O0 -g3 -fno-inline
+  CXXFLAGS_FOR_BUILD	= -O0 -g3 -fno-inline
+  CFLAGS_FOR_TARGET	= -O0 -g3 -fno-inline
+  CXXFLAGS_FOR_TARGET	= -O0 -g3 -fno-inline
+  BOOT_CFLAGS		=
+  BOOT_LDFLAGS		=
+  STAGE1_CFLAGS		=
+  STAGE1_LDFLAGS	=
+endif
+
+# set CFLAGS/LDFLAGS for the configure step only, maybe be modifed for some target
+# all other flags are passed to the make step.
+CFLAGS_TO_PASS = \
+	$(if $(CFLAGS),CFLAGS="$(CFLAGS)") \
+	$(if $(CXXFLAGS),CXXFLAGS="$(CXXFLAGS)") \
+	$(if $(LIBCFLAGS),LIBCFLAGS="$(LIBCFLAGS)") \
+	$(if $(LIBCXXFLAGS),LIBCXXFLAGS="$(LIBCXXFLAGS)")
+LDFLAGS_TO_PASS = \
+	$(if $(LDFLAGS),LDFLAGS="$(LDFLAGS)")
+
+STAGE1_CFLAGS_TO_PASS = \
+	$(if $(STAGE1_CFLAGS),STAGE1_CFLAGS="$(STAGE1_CFLAGS)")
+STAGE1_LDFLAGS_TO_PASS = \
+	$(if $(STAGE1_LDFLAGS),STAGE1_LDFLAGS="$(STAGE1_LDFLAGS)")
+
+BOOT_CFLAGS_TO_PASS = \
+	$(if $(BOOT_CFLAGS),BOOT_CFLAGS="$(BOOT_CFLAGS)")
+BOOT_LDFLAGS_TO_PASS = \
+	$(if $(BOOT_LDFLAGS),BOOT_LDFLAGS="$(BOOT_LDFLAGS)")
+
+CFLAGS_FOR_BUILD_TO_PASS = \
+	$(if $(CFLAGS_FOR_BUILD),CFLAGS_FOR_BUILD="$(CFLAGS_FOR_BUILD)")
+CXXFLAGS_FOR_BUILD_TO_PASS = \
+	$(if $(CXXFLAGS_FOR_BUILD),CXXFLAGS_FOR_BUILD="$(CXXFLAGS_FOR_BUILD)")
+LDFLAGS_FOR_BUILD_TO_PASS = \
+	$(if $(LDFLAGS_FOR_BUILD),LDFLAGS_FOR_BUILD="$(LDFLAGS_FOR_BUILD)")
+
+CFLAGS_FOR_TARGET_TO_PASS = \
+	$(if $(CFLAGS_FOR_TARGET),CFLAGS_FOR_TARGET="$(CFLAGS_FOR_TARGET)")
+CXXFLAGS_FOR_TARGET_TO_PASS = \
+	$(if $(CXXFLAGS_FOR_TARGET),CXXFLAGS_FOR_TARGET="$(CXXFLAGS_FOR_TARGET)")
+LDFLAGS_FOR_TARGET_TO_PASS = \
+	$(if $(LDFLAGS_FOR_TARGET),LDFLAGS_FOR_TARGET="$(LDFLAGS_FOR_TARGET)")
+
+docdir		= usr/share/doc
+
+CONFARGS = -v \
+	--with-pkgversion='$(distribution)$(if $(with_linaro_branch),/Linaro)$(if $(with_ibm_branch),/IBM)___$(DEB_VERSION)' \
+	--with-bugurl='file:///usr/share/doc/$(subst gcj,gcc,$(PKGSOURCE))/README.Bugs'
+
+CONFARGS += \
+	--enable-languages=$(subst $(SPACE),$(COMMA),$(enabled_languages)) \
+	--prefix=/$(PF)
+
+ifeq ($(versioned_packages),yes)
+  CONFARGS += --program-suffix=-$(BASE_VERSION)
+endif
+
+ifneq (,$(filter $(DEB_STAGE),stage1 stage2))
+  CONFARGS += \
+	--disable-decimal-float \
+	--disable-libatomic  \
+	--disable-libgomp  \
+	--disable-libssp \
+	--disable-libquadmath \
+	--disable-libsanitizer \
+	--disable-threads \
+	--libexecdir=/$(libexecdir) \
+	--libdir=/$(PF)/$(configured_libdir) \
+	$(if $(with_build_sysroot),--with-build-sysroot=$(with_build_sysroot)) \
+	$(if $(with_sysroot),--with-sysroot=$(with_sysroot)) \
+	--enable-linker-build-id
+
+  ifeq ($(with_multiarch_lib),yes)
+    CONFARGS += \
+	--enable-multiarch
+  endif
+
+  ifeq ($(DEB_STAGE),stage1)
+    CONFARGS += \
+	--disable-shared  \
+	--with-newlib  \
+	--without-headers
+  else
+    # stage2
+    CONFARGS += \
+	--enable-shared
+  endif
+else
+  CONFARGS += \
+	--enable-shared \
+	--enable-linker-build-id \
+
+ifneq ($(single_package),yes)
+  CONFARGS += \
+        --libexecdir=/$(libexecdir) \
+        --without-included-gettext \
+        --enable-threads=posix \
+	--libdir=/$(PF)/$(configured_libdir)
+endif
+
+ifneq ($(with_cpp),yes)
+  CONFARGS += --disable-cpp
+endif
+
+ifeq ($(with_nls),yes)
+  CONFARGS += --enable-nls
+else
+  CONFARGS += --disable-nls
+endif
+
+ifeq ($(with_bootstrap),off)
+  CONFARGS += --disable-bootstrap
+else ifneq ($(with_bootstrap),)
+  CONFARGS += --enable-bootstrap=$(with_bootstrap)
+endif
+
+ifneq ($(with_sysroot),)
+  CONFARGS += --with-sysroot=$(with_sysroot)
+endif
+ifneq ($(with_build_sysroot),)
+  CONFARGS += --with-build-sysroot=$(with_build_sysroot)
+endif
+
+ifeq ($(force_gnu_locales),yes)
+  CONFARGS += --enable-clocale=gnu
+endif
+
+ifeq ($(with_cxx)-$(with_cxx_debug),yes-yes)
+  CONFARGS += --enable-libstdcxx-debug
+endif
+CONFARGS += --enable-libstdcxx-time=yes
+CONFARGS += --with-default-libstdcxx-abi=$(libstdcxx_abi)
+ifeq ($(libstdcxx_abi),gcc4-compatible)
+  CONFARGS += --disable-libstdcxx-dual-abi
+endif
+
+ifeq (,$(filter $(DEB_TARGET_ARCH), hurd-i386 kfreebsd-i386 kfreebsd-amd64))
+  CONFARGS += --enable-gnu-unique-object
+endif
+
+ifneq ($(with_ssp),yes)
+  CONFARGS += --disable-libssp
+endif
+
+ifneq ($(with_gomp),yes)
+  CONFARGS += --disable-libgomp
+endif
+
+ifneq ($(with_itm),yes)
+  CONFARGS += --disable-libitm
+endif
+
+ifneq ($(with_atomic),yes)
+  CONFARGS += --disable-libatomic
+endif
+
+ifneq (,$(filter $(DEB_TARGET_ARCH),$(vtv_archs)))
+  ifeq ($(with_vtv),yes)
+    CONFARGS += --enable-vtable-verify
+  else
+    CONFARGS += --disable-vtable-verify
+  endif
+endif
+
+ifneq ($(with_asan),yes)
+  CONFARGS += --disable-libsanitizer
+endif
+
+ifneq ($(with_qmath),yes)
+  CONFARGS += --disable-libquadmath
+endif
+
+ifeq ($(with_mpx),yes)
+  CONFARGS += --enable-libmpx
+endif
+
+ifeq ($(with_plugins),yes)
+  CONFARGS += --enable-plugin
+endif
+
+#ifeq ($(with_gold),yes)
+#  CONFARGS += --enable-gold --enable-ld=default
+#endif
+
+#CONFARGS += --with-plugin-ld=ld.gold
+#CONFARGS += --with-plugin-ld
+
+# enable pie-by-default on pie_archs
+ifeq ($(with_pie),yes)
+  CONFARGS += --enable-default-pie
+endif
+
+endif # !DEB_STAGE
+
+CONFARGS += --with-system-zlib
+
+jvm_name_short = java-1.5.0-gcj-$(BASE_VERSION)$(if $(findstring snap,$(PKGSOURCE)),-snap)
+jvm_name_long = $(jvm_name_short)-1.5.0.0
+
+ifeq ($(with_java),yes)
+  CONFARGS += --disable-browser-plugin
+  ifeq ($(with_java_maintainer_mode),yes)
+    CONFARGS += --enable-java-maintainer-mode
+  endif
+  ifeq ($(with_java_biarch_awt),yes)
+    CONFARGS += --enable-java-awt=$(subst $(SPACE),$(COMMA),$(foreach p,$(java_awt_peers),$(p)-default))
+  else
+    CONFARGS += --enable-java-awt=$(subst $(SPACE),$(COMMA),$(foreach p,$(java_awt_peers),$(p)))
+  endif
+  ifneq (,$(findstring gtk,$(java_awt_peers)))
+    CONFARGS += --enable-gtk-cairo
+  endif
+  jvm_ext = -$(DEB_TARGET_ARCH)$(if $(filter yes,$(DEB_CROSS)),-cross)
+  jvm_dir = /usr/lib/jvm/$(jvm_name_short)$(jvm_ext)
+  CONFARGS += --with-java-home=$(jvm_dir)/jre
+  CONFARGS += --enable-java-home \
+	--with-jvm-root-dir=$(jvm_dir) \
+	--with-jvm-jar-dir=/usr/lib/jvm-exports/$(jvm_name_short)$(jvm_ext)
+  CONFARGS += --with-arch-directory=$(java_cpu)
+  ifeq (./,$(dir $(ecj_jar)))
+    CONFARGS += --with-ecj-jar=$(jvm_dir)/lib/ecj.jar
+  else
+    CONFARGS += --with-ecj-jar=$(ecj_jar)
+  endif
+  ifneq ($(with_libgcj),yes)
+    CONFARGS += --disable-libgcj
+  endif
+endif
+
+ifeq ($(with_gcj),yes)
+  ifeq ($(DEB_HOST_GNU_CPU),m32r)
+    CONFARGS += --enable-libgcj
+  endif
+endif
+
+ifeq ($(with_objc)-$(with_objc_gc),yes-yes)
+  CONFARGS += --enable-objc-gc
+endif
+
+ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), i486-linux-gnu i586-linux-gnu i686-linux-gnu))
+    ifeq ($(multilib),yes)
+      ifeq ($(biarch64),yes)
+        CONFARGS += --enable-targets=all
+      endif
+    endif
+endif
+
+ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), x86_64-linux-gnu x86_64-linux-gnux32 x86_64-kfreebsd-gnu s390x-linux-gnu sparc64-linux-gnu))
+    ifneq ($(biarch32),yes)
+      CONFARGS += --disable-multilib
+    endif
+endif
+
+ifneq (,$(filter $(DEB_TARGET_GNU_TYPE), powerpc-linux-gnu powerpc-linux-gnuspe))
+    CONFARGS += --enable-secureplt
+    ifeq ($(biarch64),yes)
+      CONFARGS += --disable-softfloat --with-cpu=default32
+      ifeq ($(multilib),yes)
+        CONFARGS += --disable-softfloat \
+	  --enable-targets=powerpc-linux,powerpc64-linux
+      endif
+    else
+      CONFARGS += --disable-multilib
+    endif
+endif
+
+ifneq (,$(findstring powerpc64le-linux,$(DEB_TARGET_GNU_TYPE)))
+    CONFARGS += --enable-secureplt
+    ifneq (,$(filter $(distrelease),jessie trusty utopic vivid wily))
+      CONFARGS += --with-cpu=power7 --with-tune=power8
+    else
+      CONFARGS += --with-cpu=power8
+    endif
+    CONFARGS += --enable-targets=powerpcle-linux
+    CONFARGS += --disable-multilib
+endif
+
+ifneq (,$(findstring powerpc64-linux,$(DEB_TARGET_GNU_TYPE)))
+    CONFARGS += --enable-secureplt
+    ifeq ($(biarch32),yes)
+      ifeq ($(multilib),yes)
+        CONFARGS += --disable-softfloat --enable-targets=powerpc64-linux,powerpc-linux
+      endif
+    else
+      CONFARGS += --disable-multilib
+    endif
+    ifeq ($(derivative),Ubuntu)
+      CONFARGS += --with-cpu-32=power7 --with-cpu-64=power7
+    endif
+endif
+
+# FIXME: only needed for isl-0.13 for now
+#CONFARGS += --disable-isl-version-check
+
+ifneq (,$(findstring cross-build-,$(build_type)))
+  # FIXME: requires isl headers for the target
+  #CONFARGS += --without-isl
+  # FIXME: build currently fails build the precompiled headers
+  CONFARGS += --disable-libstdcxx-pch
+endif
+
+ifeq ($(with_multiarch_lib),yes)
+  CONFARGS += --enable-multiarch
+endif
+
+ifneq (,$(findstring aarch64,$(DEB_TARGET_GNU_CPU)))
+  # requires binutils 2.25.90 or newer
+  ifeq (,$(filter $(distrelease),squeeze precise trusty utopic vivid wily))
+    CONFARGS += --enable-fix-cortex-a53-843419
+  endif
+endif
+
+ifeq ($(findstring powerpcspe,$(DEB_TARGET_ARCH)),powerpcspe)
+  CONFARGS += --with-cpu=8548 --enable-e500_double
+endif
+
+ifneq (,$(findstring softfloat,$(DEB_TARGET_GNU_CPU)))
+  CONFARGS += --with-float=soft
+endif
+
+ifneq (,$(findstring arm-vfp,$(DEB_TARGET_GNU_CPU)))
+  CONFARGS += --with-fpu=vfp
+endif
+
+ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU)))
+  ifeq ($(multilib),yes)
+    CONFARGS += --enable-multilib
+  endif
+  CONFARGS += --disable-sjlj-exceptions
+  # FIXME: libjava is not ported for thumb, this hack only works for
+  # separate gcj builds
+  ifneq (,$(filter armhf,$(DEB_TARGET_ARCH)))
+    ifeq ($(distribution),Raspbian)
+      with_arm_arch = armv6
+      with_arm_fpu = vfp
+    else
+      ifneq (,$(findstring gcj,$(PKGSOURCE)))
+        with_arm_arch = armv6
+      else
+        with_arm_arch = armv7-a
+      endif
+      with_arm_fpu = vfpv3-d16
+    endif
+  else
+    # armel
+    ifeq ($(derivative),Debian)
+      with_arm_arch = armv4t
+    else ifneq (,$(filter $(distrelease),karmic))
+      with_arm_arch = armv6
+      with_arm_fpu = vfpv3-d16
+    else ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise))
+      ifneq (,$(findstring gcj,$(PKGSOURCE)))
+        with_arm_arch = armv6
+      else
+        with_arm_arch = armv7-a
+      endif
+      with_arm_fpu = vfpv3-d16
+    else
+      with_arm_arch = armv5t  # starting with quantal
+    endif
+  endif
+  CONFARGS += --with-arch=$(with_arm_arch)
+  ifneq (,$(with_arm_fpu))
+    CONFARGS += --with-fpu=$(with_arm_fpu)
+  endif
+  CONFARGS += --with-float=$(float_abi)
+  ifeq ($(with_arm_thumb),yes)
+    CONFARGS += --with-mode=thumb
+  endif
+endif
+
+ifeq ($(DEB_TARGET_GNU_CPU),$(findstring $(DEB_TARGET_GNU_CPU),m68k))
+  CONFARGS += --disable-werror
+endif
+# FIXME: correct fix-warnings.dpatch
+ifeq ($(derivative),Ubuntu)
+  CONFARGS += --disable-werror
+endif
+
+ifneq (,$(findstring sparc-linux,$(DEB_TARGET_GNU_TYPE)))
+  ifeq ($(biarch64),yes)
+    CONFARGS += --enable-targets=all
+  endif
+endif
+
+ifneq (,$(findstring sparc64-linux,$(DEB_TARGET_GNU_TYPE)))
+  ifeq ($(biarch32),yes)
+    CONFARGS += --enable-targets=all
+    # this doesn't work
+    #CONFARGS += --with-cpu-32=ultrasparc
+  endif
+endif
+
+ifneq (,$(findstring ia64-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-system-libunwind
+endif
+
+ifneq (,$(findstring sh4-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-cpu=sh4 --with-multilib-list=m4,m4-nofpu
+endif
+
+ifneq (,$(findstring m68k-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --disable-multilib
+endif
+
+ifeq ($(derivative),Ubuntu)
+  ifneq (,$(findstring s390x-linux,$(DEB_TARGET_GNU_TYPE)))
+    CONFARGS += --with-arch=zEC12
+  endif
+endif
+
+ifeq ($(DEB_TARGET_ARCH_OS),linux)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH), alpha powerpc powerpcspe ppc64 ppc64el s390 s390x sparc sparc64))
+    CONFARGS += --with-long-double-128
+  endif
+endif
+
+ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386 kfreebsd-i386 kfreebsd-amd64))
+  ifneq (,$(filter $(derivative),Ubuntu))
+    ifneq (,$(filter $(distrelease),dapper hardy))
+      CONFARGS += --with-arch-32=i486
+    else ifneq (,$(filter $(distrelease),jaunty karmic lucid))
+      CONFARGS += --with-arch-32=i586
+    else
+      CONFARGS += --with-arch-32=i686
+    endif
+  else # Debian
+    ifneq (,$(filter $(distrelease),etch lenny))
+      CONFARGS += --with-arch-32=i486
+    else ifneq (,$(filter $(distrelease),squeeze wheezy jessie))
+      CONFARGS += --with-arch-32=i586
+    else
+      CONFARGS += --with-arch-32=i686
+    endif
+  endif
+endif
+
+ifeq ($(DEB_TARGET_ARCH),amd64)
+  CONFARGS += --with-abi=m64
+endif
+ifeq ($(DEB_TARGET_ARCH),x32)
+  CONFARGS += --with-abi=mx32
+endif
+ifeq ($(multilib),yes)
+  ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386))
+    CONFARGS += --with-multilib-list=m32,m64$(if $(filter yes,$(biarchx32)),$(COMMA)mx32)
+  else ifeq ($(DEB_TARGET_ARCH),x32)
+    CONFARGS += --with-multilib-list=mx32,m64,m32
+  endif
+  CONFARGS += --enable-multilib
+endif
+
+ifneq (,$(filter $(DEB_TARGET_ARCH), hurd-i386))
+  CONFARGS += --with-arch=i586
+endif
+
+ifeq ($(DEB_TARGET_ARCH),lpia)
+  CONFARGS += --with-arch=pentium-m --with-tune=i586
+endif
+
+ifneq (,$(filter $(DEB_TARGET_ARCH), amd64 i386 hurd-i386 kfreebsd-i386 kfreebsd-amd64))
+  CONFARGS += --with-tune=generic
+endif
+
+ifneq (,$(findstring mips-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch64),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r2
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsel-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-arch-32=mips2 --with-tune-32=mips32r2 --with-fp-32=xx
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch64),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips3 --with-tune-64=mips64r2
+    endif
+  endif
+endif
+
+#FIXME: howto for mipsn32?
+ifneq (,$(findstring mips64el-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+  ifeq ($(multilib),yes)
+    ifeq ($(biarch64)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r2
+      CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mips64-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+  ifeq ($(multilib),yes)
+    ifeq ($(biarch64)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r2
+      CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mips64el-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  CONFARGS += --with-arch-64=mips64r2
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mips64-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  CONFARGS += --with-arch-64=mips64r2
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsisa32r6-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-arch-32=mips32r6 --with-tune-32=mips32r6
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch64),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r6 --with-tune-64=mips64r6
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsisa32r6el-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-arch-32=mips32r6 --with-tune-32=mips32r6
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch64),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r6 --with-tune-64=mips64r6
+    endif
+  endif
+endif
+
+#FIXME: howto for mipsn32?
+ifneq (,$(findstring mipsisa64r6el-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  ifeq ($(multilib),yes)
+    ifeq ($(biarch64)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r6
+      CONFARGS += --with-arch-32=mips32r6
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsisa64r6-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  ifeq ($(multilib),yes)
+    ifeq ($(biarch64)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-64=mips64r6
+      CONFARGS += --with-arch-32=mips32r6
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsisa64r6el-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  CONFARGS += --with-arch-64=mips64r6 --with-tune-64=mips64r6
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-32=mips32r6 --with-tune-32=mips32r6
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mipsisa64r6-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --with-mips-plt
+  CONFARGS += --with-arch-64=mips64r6 --with-tune-64=mips64r6
+  ifeq ($(multilib),yes)
+    ifeq ($(biarchn32)-$(biarch32),yes-yes)
+      CONFARGS += --enable-targets=all
+      CONFARGS += --with-arch-32=mips32r6 --with-tune-32=mips32r6
+    endif
+  endif
+endif
+
+ifneq (,$(findstring mips,$(DEB_TARGET_GNU_TYPE)))
+  ifeq (,$(filter yes,$(biarch32) $(biarchn32) $(biarch64)))
+      CONFARGS += --disable-multilib
+  endif
+endif
+
+ifneq (,$(findstring s390-linux,$(DEB_TARGET_GNU_TYPE)))
+  ifeq ($(multilib),yes)
+    ifeq ($(biarch64),yes)
+      CONFARGS += --enable-targets=all
+    endif
+  endif
+endif
+
+ifneq (,$(findstring hppa-linux,$(DEB_TARGET_GNU_TYPE)))
+  CONFARGS += --disable-libstdcxx-pch
+endif
+
+ifneq (,$(findstring gdc, $(PKGSOURCE)))
+    CONFARGS += --disable-libquadmath
+endif
+
+ifeq ($(trunk_build),yes)
+  ifeq ($(findstring --disable-werror, $(CONFARGS)),)
+    CONFARGS += --disable-werror
+  endif
+  CONFARGS += --enable-checking=yes
+else
+  CONFARGS += --enable-checking=release
+endif
+
+CONFARGS += \
+	--build=$(DEB_BUILD_GNU_TYPE) \
+	--host=$(DEB_HOST_GNU_TYPE) \
+	--target=$(TARGET_ALIAS)
+
+ifeq ($(DEB_CROSS),yes)
+  CONFARGS += \
+	--program-prefix=$(TARGET_ALIAS)- \
+	--includedir=/$(PFL)/include
+endif
+
+ifeq ($(with_bootstrap),off)
+  bootstrap_target =
+else ifeq ($(with_bootstrap),)
+  bootstrap_target = bootstrap
+  # no profiledbootstrap on the following architectures
+  # - m68k: we're happy that it builds at all
+  no_profiled_bs_archs := alpha arm hppa m68k mips mipsel mips64 mips64el \
+	powerpcspe s390 sh4 sparc sparc64
+  ifeq (,$(filter $(DEB_TARGET_ARCH),$(no_profiled_bs_archs)))
+    bootstrap_target = profiledbootstrap
+  endif
+  ifneq (, $(filter $(PKGSOURCE),gcj-$(BASE_VERSION) gnat-$(BASE_VERSION) gcc-snapshot))
+    bootstrap_target = bootstrap
+  endif
+  ifneq (,$(DEB_STAGE))
+    bootstrap_target = bootstrap
+  endif
+
+  ifeq ($(derivative),Debian)
+    # disable profiled bootstrap for backports
+    ifneq (,$(filter $(distrelease),squeeze wheezy jessie))
+      bootstrap_target = bootstrap
+    endif
+    # disable profiled bootstrap on slow archs, get to testing first ...
+    ifneq (,$(filter $(DEB_TARGET_ARCH), arm arm64 armel armhf mips mipsel sparc))
+      bootstrap_target = bootstrap
+    endif
+  endif
+  ifeq ($(derivative),Ubuntu)
+    ifneq (,$(filter $(distrelease),lucid precise trusty utopic vivid wily))
+      bootstrap_target = bootstrap
+    endif
+    ifeq ($(with_linaro_branch),yes)
+      bootstrap_target = bootstrap
+    endif
+  endif
+endif
+
+DEJAGNU_TIMEOUT=300
+# Increase the timeout for one testrun on slow architectures
+ifeq ($(derivative),Debian)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),arm arm64 armel armhf hppa m68k sparc))
+    DEJAGNU_TIMEOUT=600
+  else ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),amd64 i386 i486 i686 lpia))
+    DEJAGNU_TIMEOUT=180
+  endif
+  ifeq ($(DEB_TARGET_GNU_SYSTEM),gnu)
+    DEJAGNU_TIMEOUT=900
+  endif
+else ifeq ($(derivative),Ubuntu)
+  ifneq (,$(findstring $(DEB_TARGET_ARCH),arm64 armel armhf hppa ia64 sparc))
+    DEJAGNU_TIMEOUT=600
+  else ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),amd64 i386 i486 i686 lpia))
+    DEJAGNU_TIMEOUT=180
+  endif
+endif
+
+DEJAGNU_RUNS =
+ifneq ($(trunk_build),yes)
+ifeq ($(with_ssp),yes)
+  # the buildds are just slow ... don't check the non-default
+  ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),sh4 mips))
+    DEJAGNU_RUNS =
+  else ifneq (,$(filter $(DEB_TARGET_ARCH),armel))
+    DEJAGNU_RUNS =
+  else
+    ifneq ($(single_package),yes)
+      DEJAGNU_RUNS += $(if $(filter yes,$(with_ssp_default)),-fno-stack-protector,-fstack-protector)
+    endif
+  endif
+  ifeq ($(derivative),Ubuntu)
+    # the buildds are just slow ... don't check the non-default
+    ifneq (,$(findstring $(DEB_TARGET_GNU_CPU),ia64 sparc))
+      DEJAGNU_RUNS =
+    endif
+    # FIXME Ubuntu armel buildd hangs
+    ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU)))
+      DEJAGNU_RUNS =
+    endif
+  endif
+endif
+endif
+
+ifeq ($(derivative),Ubuntu)
+  ifneq (,$(findstring arm, $(DEB_TARGET_GNU_CPU)))
+    ifeq ($(with_arm_thumb),yes)
+      #DEJAGNU_RUNS += -marm
+    else
+      DEJAGNU_RUNS += -mthumb
+    endif
+  endif
+endif
+
+# no b-d on g++-multilib, this is run by the built compiler
+abi_run_check = $(strip $(if $(wildcard build/runcheck$(1).out), \
+				$(shell cat build/runcheck$(1).out), \
+				$(shell CC="$(builddir)/gcc/xg++ -B$(builddir)/gcc/ -static-libgcc $(1)" bash debian/runcheck.sh)))
+ifeq ($(biarch32),yes)
+  DEJAGNU_RUNS += $(call abi_run_check,$(if $(filter $(DEB_TARGET_ARCH_CPU),mips64 mips64el mipsn32 mipsn32el),-mabi=32,-m32))
+endif
+ifeq ($(biarch64),yes)
+  DEJAGNU_RUNS += $(call abi_run_check,$(if $(filter $(DEB_TARGET_ARCH_CPU),mips mipsel),-mabi=64,-m64))
+endif
+ifeq ($(biarchn32),yes)
+  DEJAGNU_RUNS += $(call abi_run_check,-mabi=n32)
+endif
+ifeq ($(biarchx32),yes)
+  DEJAGNU_RUNS += $(call abi_run_check,-mx32)
+endif
+
+# gdc is not multilib'd
+ifneq (,$(findstring gdc, $(PKGSOURCE)))
+  DEJAGNU_RUNS =
+endif
+
+ifneq (,$(findstring gcj, $(PKGSOURCE)))
+  DEJAGNU_RUNS =
+endif
+
+# neither is gnat
+ifneq (,$(findstring gnat, $(PKGSOURCE)))
+  DEJAGNU_RUNS =
+endif
+
+ifneq (,$(strip $(value DEJAGNU_RUNS)))
+  RUNTESTFLAGS = RUNTESTFLAGS="--target_board=unix\{,$(subst $(SPACE),$(COMMA),$(strip $(DEJAGNU_RUNS)))\}"
+endif
+
+# PF is the installation prefix for the package without the leading slash.
+# It's "usr" for gcc releases.
+ifneq (,$(PF))
+  # use value set in the environment
+else ifeq ($(trunk_build),yes)
+  PF		= usr/lib/gcc-snapshot
+else ifeq ($(PKGSOURCE),gcc-linaro)
+  PF		= usr/lib/gcc-linaro
+else
+  PF		= usr
+endif
+
+# PFL is the installation prefix with DEB_TARGET_GNU_TYPE attached for cross builds
+ifeq ($(DEB_CROSS),yes)
+  PFL		= $(PF)/$(DEB_TARGET_GNU_TYPE)
+else
+  PFL		= $(PF)
+endif
+
+# RPF is the base prefix or installation prefix with DEB_TARGET_GNU_TYPE attached for cross builds
+ifeq ($(DEB_CROSS),yes)
+  RPF		= $(PF)/$(DEB_TARGET_GNU_TYPE)
+else
+  RPF		=
+endif
+
+ifeq ($(with_multiarch_lib),yes)
+  ifeq ($(DEB_CROSS),yes)
+    libdir	= lib
+  else
+    libdir	= lib/$(DEB_TARGET_MULTIARCH)
+  endif
+else
+  libdir	= lib
+endif
+configured_libdir = lib
+
+hppa64libexecdir= $(PF)/lib
+
+# /usr/libexec doesn't follow the FHS
+ifeq ($(single_package),yes)
+  libdir	= lib
+  libexecdir	= $(PF)/libexec
+  versiondir	= $(GCC_VERSION)
+else
+  libexecdir	= $(PF)/$(configured_libdir)
+  versiondir	= $(BASE_VERSION)
+endif
+buildlibdir	= $(builddir)/$(TARGET_ALIAS)
+
+# install cross compilers in /usr/lib/gcc-cross, native ones in /usr/lib/gcc
+gcc_subdir_name = gcc
+ifneq ($(single_package),yes)
+  ifeq ($(DEB_CROSS),yes)
+    gcc_subdir_name = gcc-cross
+  endif
+endif
+
+gcc_lib_dir	= $(PF)/$(configured_libdir)/$(gcc_subdir_name)/$(TARGET_ALIAS)/$(versiondir)
+gcc_lexec_dir	= $(libexecdir)/$(gcc_subdir_name)/$(TARGET_ALIAS)/$(versiondir)
+
+lib32loc   = lib32
+ifneq (,$(findstring mips,$(DEB_TARGET_GNU_TYPE)))
+lib32loc   = libo32
+endif
+lib32      = $(PF)/$(lib32loc)
+lib64		= lib64
+libn32		= lib32
+libx32		= libx32
+
+p_l= $(1)$(cross_lib_arch)
+p_d= $(1)-dbg$(cross_lib_arch)
+d_l= debian/$(p_l)
+d_d= debian/$(p_d)
+
+ifeq ($(DEB_CROSS),yes)
+  usr_lib = $(PFL)/lib
+else
+  usr_lib = $(PFL)/$(libdir)
+endif
+usr_lib32 = $(PFL)/$(lib32loc)
+usr_libn32 = $(PFL)/lib32
+usr_libx32 = $(PFL)/libx32
+usr_lib64 = $(PFL)/lib64
+# FIXME: Move to the new location for native builds too
+ifeq ($(DEB_CROSS),yes)
+  usr_libhf = $(PFL)/libhf
+  usr_libsf = $(PFL)/libsf
+else
+  usr_libhf = $(PFL)/lib/arm-linux-gnueabihf
+  usr_libsf = $(PFL)/lib/arm-linux-gnueabi
+endif
+
+ifeq ($(DEB_STAGE)-$(DEB_CROSS),rtlibs-yes)
+  PFL		= $(PF)
+  RPF		=
+  libdir	= lib/$(DEB_TARGET_MULTIARCH)
+  usr_lib	= $(PF)/lib/$(DEB_TARGET_MULTIARCH)
+endif
+
+gcc_lib_dir32 = $(gcc_lib_dir)/$(biarch32subdir)
+gcc_lib_dirn32 = $(gcc_lib_dir)/$(biarchn32subdir)
+gcc_lib_dirx32 = $(gcc_lib_dir)/$(biarchx32subdir)
+gcc_lib_dir64 = $(gcc_lib_dir)/$(biarch64subdir)
+gcc_lib_dirhf = $(gcc_lib_dir)/$(biarchhfsubdir)
+gcc_lib_dirsf = $(gcc_lib_dir)/$(biarchsfsubdir)
+
+libgcc_dir = $(RPF)/$(libdir)
+# yes, really; lib32gcc_s ends up in usr
+libgcc_dir32 = $(PFL)/$(lib32loc)
+libgcc_dirn32 = $(RPF)/lib32
+# libx32gcc_s also ends up in usr
+libgcc_dirx32 = $(PFL)/libx32
+libgcc_dir64 = $(RPF)/lib64
+# FIXME: Move to the new location for native builds too
+ifeq ($(DEB_CROSS),yes)
+  libgcc_dirhf = $(RPF)/libhf
+  libgcc_dirsf = $(RPF)/libsf
+else
+  libgcc_dirhf = $(RPF)/lib/arm-linux-gnueabihf
+  libgcc_dirsf = $(RPF)/lib/arm-linux-gnueabi
+endif
+
+# install_gcc_lib(lib,soname,flavour,package)
+define install_gcc_lib
+	mv $(d)/$(usr_lib$(3))/$(1)*.a debian/$(4)/$(gcc_lib_dir$(3))/
+	rm -f $(d)/$(usr_lib$(3))/$(1)*.{la,so}
+	dh_link -p$(4) \
+	  /$(usr_lib$(3))/$(1).so.$(2) /$(gcc_lib_dir$(3))/$(1).so
+
+endef
+
+checkdirs = $(builddir)
+ifeq ($(with_separate_libgcj),yes)
+  ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION))
+    ifneq ($(with_standalone_gcj),yes)
+      checkdirs = $(buildlibdir)/libffi $(buildlibdir)/libjava
+    endif
+  endif
+endif
+ifeq ($(with_separate_go),yes)
+  ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION))
+    checkdirs = $(buildlibdir)/libgo
+  endif
+endif
+ifeq ($(with_separate_gnat),yes)
+  ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION))
+    checkdirs = $(builddir)/gcc
+  endif
+endif
+
+# FIXME: MULTIARCH_DIRNAME needed for g++-multiarch-incdir.diff
+MULTIARCH_DIRNAME := $(DEB_TARGET_MULTIARCH)
+export MULTIARCH_DIRNAME
+
+default: build
+
+configure: $(configure_dependencies)
+
+$(configure_dummy_stamp):
+	touch $(configure_dummy_stamp)
+
+$(configure_stamp):
+	dh_testdir
+	: # give information about the build process
+	@echo "------------------------ Build process variables ------------------------"
+	@echo "Memory on this machine:"
+	@egrep '^(Mem|Swap)' /proc/meminfo || true
+	@echo "Number of parallel processes used for the build: $(USE_CPUS)"
+	@echo "DEB_BUILD_OPTIONS: $$DEB_BUILD_OPTIONS"
+	@echo "Package source: $(PKGSOURCE)"
+	@echo "GCC version: $(GCC_VERSION)"
+	@echo "Base Debian version: $(BASE_VERSION)"
+	@echo -e "Configured with: $(subst ___, ,$(foreach i,$(CONFARGS),$(i)\n\t))"
+ifeq ($(DEB_CROSS),yes)
+	@echo "Building cross compiler for $(DEB_TARGET_ARCH)"
+endif
+	@echo "Using shell $(SHELL)"
+	@echo "Architecture: $(DEB_TARGET_ARCH) (GNU: $(TARGET_ALIAS))"
+	@echo "CPPFLAGS: $(CPPFLAGS)"
+	@echo "CFLAGS: $(CFLAGS)"
+	@echo "LDFLAGS: $(LDFLAGS)"
+	@echo "BOOT_CFLAGS: $(BOOT_CFLAGS)"
+	@echo "DEBIAN_BUILDARCH: $(DEBIAN_BUILDARCH)"
+	@echo "Install prefix: /$(PF)"
+ifeq ($(biarchn32)-$(biarch64),yes-yes)
+	@echo "Will build the triarch compilers (o32/n32/64, defaulting to o32)"
+else ifeq ($(biarchn32)-$(biarch32),yes-yes)
+	@echo "Will build the triarch compilers (o32/n32/64, defaulting to 64)"
+else ifeq ($(biarch64)-$(biarch32),yes-yes)
+  ifneq (,$(findstring mips,$(DEB_TARGET_GNU_TYPE)))
+	@echo "Will build the triarch compilers (n32/64/32, defaulting to n32)"
+  else 
+	@echo "Will build the triarch compilers (x32/64/32, defaulting to x32)"
+  endif
+else ifeq ($(biarch64)-$(biarchx32),yes-yes)
+	@echo "Will build the triarch compilers (32/64/x32, defaulting to 32bit)"
+else ifeq ($(biarch32)-$(biarchx32),yes-yes)
+	@echo "Will build the triarch compilers (64/32/x32, defaulting to 64bit)"
+else
+  ifeq ($(biarch64),yes)
+	@echo "Will build the biarch compilers (32/64, defaulting to 32bit)"
+  else
+    ifeq ($(biarch32),yes)
+	@echo "Will build the biarch compilers (64/32, defaulting to 64bit)"
+    else
+	@echo "Will not build the biarch compilers"
+    endif
+  endif
+endif
+
+ifeq ($(with_cxx),yes)
+	@echo "Will build the C++ compiler"
+else
+	@echo "Will not build the C++ compiler: $(with_cxx)"
+endif
+ifeq ($(with_objc),yes)
+	@echo "Will build the ObjC compiler."
+    ifeq ($(with_objc_gc),yes)
+	@echo "Will build the extra ObjC runtime for garbage collection."
+    else
+	@echo "Will not build the extra ObjC runtime for garbage collection."
+    endif
+else
+	@echo "Will not build the ObjC compiler: $(with_objc)"
+endif
+ifeq ($(with_objcxx),yes)
+	@echo "Will build the Obj-C++ compiler"
+else
+	@echo "Will not build the Obj-C++ compiler: $(with_objcxx)"
+endif
+ifeq ($(with_fortran),yes)
+	@echo "Will build the Fortran 95 compiler."
+else
+	@echo "Will not build the Fortran 95 compiler: $(with_fortran)"
+endif
+ifeq ($(with_java),yes)
+	@echo "Will build the Java compiler."
+else
+	@echo "Will not build the Java compiler: $(with_java)"
+endif
+ifeq ($(with_ada),yes)
+	@echo "Will build the Ada compiler."
+  ifeq ($(with_libgnat),yes)
+	@echo "Will build the shared Ada libraries."
+  else
+	@echo "Will not build the shared Ada libraries."
+  endif
+else
+	@echo "Will not build the Ada compiler: $(with_ada)"
+endif
+ifeq ($(with_go),yes)
+	@echo "Will build the Go compiler."
+else
+	@echo "Will not build the Go compiler: $(with_go)"
+endif
+ifeq ($(with_d),yes)
+	@echo "Will build the D compiler"
+  ifeq ($(with_libphobos),yes)
+	@echo "Will build the phobos D runtime library."
+  else
+	@echo "Will not build the phobos D runtime library: $(with_libphobos)"
+  endif
+else
+	@echo "Will not build the D compiler: $(with_d)"
+endif
+ifeq ($(with_ssp),yes)
+	@echo "Will build with SSP support."
+else
+	@echo "Will build without SSP support: $(with_ssp)"
+endif
+ifeq ($(with_check),yes)
+	@echo "Will run the testsuite."
+else
+	@echo "Will not run the testsuite: $(with_check)"
+endif
+ifeq ($(with_nls),yes)
+	@echo "Will enable national language support."
+else
+	@echo "Will disable national language support: $(with_nls)"
+endif
+	@echo "-----------------------------------------------------------------------------"
+	@echo ""
+ifeq ($(with_check),yes)
+	@if echo "spawn true" | /usr/bin/expect -f - >/dev/null; then \
+	  : ; \
+	else \
+	  echo "expect is failing on your system with the above error, which means the GCC"; \
+	  echo "testsuite will fail.  Please resolve the above issues and retry the build."; \
+	  echo "-----------------------------------------------------------------------------"; \
+	  exit 1; \
+	fi
+endif
+	rm -f $(configure_stamp) $(build_stamp)
+	cat debian/README.Debian $(patch_stamp) > debian/README.Debian.$(DEB_TARGET_ARCH)
+
+	rm -rf $(builddir)
+	mkdir $(builddir)
+
+	: # some tools like gettext are built with a newer libstdc++
+	mkdir -p bin
+	for i in msgfmt; do \
+	  install -m755 debian/bin-wrapper.in bin/$$i; \
+	done
+
+	: # configure
+	cd $(builddir) \
+	  && $(SET_PATH) \
+		CC="$(CC)" \
+		CXX="$(CXX)" \
+		$(CFLAGS_TO_PASS) \
+		$(CXXFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		$(CFLAGS_FOR_BUILD_TO_PASS) \
+		$(CXXFLAGS_FOR_BUILD_TO_PASS) \
+		$(LDFLAGS_FOR_BUILD_TO_PASS) \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(CXXFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS) \
+		$(SET_SHELL) $(SET_TARGET_TOOLS) \
+	LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(builddir)/gcc/ada/rts \
+		../src/configure $(subst ___, ,$(CONFARGS))
+
+	: # multilib builds without b-d on gcc-multilib (used in FLAGS_FOR_TARGET)
+	if [ -d /usr/include/$(DEB_TARGET_MULTIARCH)/asm ]; then \
+	  mkdir -p $(builddir)/sys-include; \
+	  ln -sf /usr/include/$(DEB_TARGET_MULTIARCH)/asm $(builddir)/sys-include/asm; \
+	fi
+
+	touch $(configure_stamp)
+
+build: $(sort $(build_arch_dependencies) $(build_indep_dependencies))
+build-arch: $(build_arch_dependencies)
+build-indep: $(build_indep_dependencies)
+
+$(build_dummy_stamp):
+	touch $(build_dummy_stamp)
+
+$(build_locale_stamp):
+ifeq ($(locale_data)-$(with_cxx),generate-yes)
+	: # build locales needed by libstdc++ testsuite
+	rm -rf locales
+	mkdir locales
+	-USE_CPUS=$(USE_CPUS) sh debian/locale-gen
+endif
+	touch $(build_locale_stamp)
+
+
+$(build_stamp): $(configure_stamp) $(build_locale_stamp)
+	dh_testdir
+	rm -f bootstrap-protocol
+	@echo TTTTT $$(date -R)
+ifeq ($(build_type),build-native)
+	: # native build
+  ifeq ($(with_java),yes)
+	mkdir -p bin
+	ln -sf /usr/bin/fastjar bin/jar
+    ifeq ($(with_native_ecj),yes)
+	: # prepare the standalone ecj jar
+	cp /usr/share/java/ecj.jar $(srcdir)/ecj-standalone.jar
+	zip -d $(srcdir)/ecj-standalone.jar 'org/eclipse/jdt/core/JDTCompilerAdapter*'
+    endif
+    ifeq ($(with_java_maintainer_mode),yes)
+	( \
+	  echo '#!/bin/sh'; \
+	  echo 'exec gij-5 -cp /usr/share/java/ecj.jar org.eclipse.jdt.internal.compiler.batch.GCCMain "$$@"'; \
+	) > bin/ecj1
+	chmod +x bin/ecj1
+	: # If we don't have gjavah in PATH, try to build it with the old gij
+	mkdir -p bin
+	if [ -x /usr/bin/gjavah-5 ]; then \
+	  ln -sf /usr/bin/gjavah-5 bin/gjavah; \
+	elif [ -x bin/gjavah ]; then \
+	  : ; \
+	else \
+	  mkdir -p $(builddir)/java_hacks; \
+	  cd $(builddir)/java_hacks; \
+	  cp -a $(srcdir)/libjava/classpath/tools/external external; \
+	  mkdir -p gnu/classpath/tools; \
+	  cp -a $(srcdir)/libjava/classpath/tools/gnu/classpath/tools/{common,javah,getopt} \
+	    gnu/classpath/tools/; \
+	  cp -a $(srcdir)/libjava/classpath/tools/resource/gnu/classpath/tools/common/Messages.properties \
+	    gnu/classpath/tools/common; \
+	  cd external/asm; \
+	  for i in `find . -name \*.java`; do gcj-5 --encoding ISO-8859-1 -C $$i -I.; done; \
+	  cd ../..; \
+	  for i in `find gnu -name \*.java`; do gcj-5 -C $$i -I. -Iexternal/asm/; done; \
+	  gcj-5 -findirect-dispatch -O2 -fmain=gnu.classpath.tools.javah.Main \
+	    -I. -Iexternal/asm/ `find . -name \*.class` -o $(CURDIR)/bin/gjavah.real; \
+	  ( \
+	    echo '#!/bin/sh'; \
+	    echo 'export CLASSPATH='`pwd`'$${CLASSPATH:+:$$CLASSPATH}'; \
+	    echo 'exec $(CURDIR)/bin/gjavah.real "$$@"'; \
+	  ) > $(CURDIR)/bin/gjavah; \
+	  chmod +x $(CURDIR)/bin/gjavah; \
+	fi
+    endif
+  endif
+	: # build native compiler
+	( \
+	  set +e; \
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  $(SET_LOCPATH) \
+	    $(MAKE) -C $(builddir) $(bootstrap_target) \
+		CC="$(CC)" \
+		$(STAGE1_CFLAGS_TO_PASS) \
+		$(STAGE1_LDFLAGS_TO_PASS) \
+		$(BOOT_CFLAGS_TO_PASS) \
+		$(BOOT_LDFLAGS_TO_PASS) \
+		$(CFLAGS_TO_PASS) \
+		$(CXXFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		$(CFLAGS_FOR_BUILD_TO_PASS) \
+		$(CXXFLAGS_FOR_BUILD_TO_PASS) \
+		$(LDFLAGS_FOR_BUILD_TO_PASS) \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(CXXFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS) \
+		; \
+	  echo $$? > status; \
+	) 2>&1 | tee bootstrap-protocol
+else ifneq (,$(filter $(build_type),build-cross cross-build-native cross-build-cross))
+	: # build cross compiler for $(TARGET_ALIAS)
+	( \
+	  set +e; \
+	  $(SET_PATH) \
+	  $(SET_LOCPATH) \
+	    $(MAKE) -C $(builddir) \
+		$(BOOT_CFLAGS_TO_PASS) \
+		$(BOOT_LDFLAGS_TO_PASS) \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS) \
+		; \
+	  echo $$? > status; \
+	) 2>&1 | tee bootstrap-protocol
+endif
+	@echo TTTTT $$(date -R)
+	s=`cat status`; rm -f status; \
+	if [ $$s -ne 0 ] && [ -z "$$NO_CONFIG_LOG_DUMP$$NO_CONFIG_LOG_DUMPS" ]; then \
+	  for log in $$(find $(builddir) -name config.log); do \
+	    case "$$log" in */build/build-*|*/stage1-*|*/prev-*) continue; esac; \
+	    echo LOGFILE START $$log; \
+	    cat $$log; \
+	    echo LOGFILE END $$log; \
+	  done; \
+	fi; \
+	test $$s -eq 0
+
+	if [ -f $(srcdir)/contrib/warn_summary ]; then \
+	  rm -f bootstrap-summary; \
+	  /bin/sh $(srcdir)/contrib/warn_summary bootstrap-protocol \
+	    > bootstrap-summary; \
+	fi
+
+	touch $(build_stamp)
+
+ifneq ($(build_type),build-native)
+  BUILT_CC = $(CC)
+  BUILT_CXX = $(CXX)
+else
+  BUILT_CC = $(builddir)/gcc/xgcc -B$(builddir)/gcc/
+  BUILT_CXX = $(builddir)/gcc/xg++ -B$(builddir)/gcc/ \
+	-B$(builddir)/$(TARGET_ALIAS)/libatomic/.libs \
+	-B$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/src/.libs \
+	-B$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/libsupc++/.libs \
+	-I$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/include \
+	-I$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/include/$(TARGET_ALIAS) \
+	-I$(srcdir)/libstdc++-v3/libsupc++ \
+	-L$(builddir)/$(TARGET_ALIAS)/libatomic/.libs \
+	-L$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/src/.libs \
+	-L$(builddir)/$(TARGET_ALIAS)/libstdc++-v3/libsupc++/.libs
+endif
+
+CONFARGS_JIT := \
+	$(filter-out --enable-languages=%, $(CONFARGS)) \
+	--enable-languages=c++,jit \
+	--enable-host-shared
+
+CONFARGS_JIT := \
+	$(filter-out %bootstrap, $(CONFARGS_JIT)) \
+	--disable-bootstrap
+
+$(configure_jit_stamp): $(build_stamp)
+	dh_testdir
+	rm -f $(configure_jit_stamp) $(build_jit_stamp)
+	rm -rf $(builddir_jit)
+	mkdir $(builddir_jit)
+
+	: # configure jit
+	cd $(builddir_jit) && \
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  CC="$(BUILT_CC)" \
+	  CXX="$(BUILT_CXX)" \
+	     ../src/configure $(CONFARGS_JIT)
+	touch $(configure_jit_stamp)
+
+$(build_jit_stamp): $(configure_jit_stamp)
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  $(SET_LOCPATH) \
+	  LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(builddir)/gcc \
+	  biarch_multidir_names=none \
+		$(MAKE) -C $(builddir_jit) \
+		$(BOOT_CFLAGS_TO_PASS) \
+		$(BOOT_LDFLAGS_TO_PASS) \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS)
+
+ifeq ($(with_check),yes)
+  # FIXME: #782444
+  ifeq (,$(filter $(DEB_TARGET_ARCH), kfreebsd-i386 kfreebsd-amd64))
+	-$(MAKE) -C $(builddir_jit)/gcc check-jit \
+		RUNTESTFLAGS="-v -v"
+  endif
+endif
+
+	touch $(build_jit_stamp)
+
+ifeq ($(versioned_packages),yes)
+  hppa64_configure_flags += --program-suffix=-$(BASE_VERSION)
+endif
+
+$(configure_hppa64_stamp): $(build_stamp)
+	dh_testdir
+	rm -f $(configure_hppa64_stamp) $(build_hppa64_stamp)
+	rm -rf $(builddir_hppa64)
+	mkdir $(builddir_hppa64)
+	: # configure hppa64
+	cd $(builddir_hppa64) && \
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  CC="$(BUILT_CC)" \
+	  CXX="$(BUILT_CXX)" \
+	  $(CFLAGS_TO_PASS) \
+	  $(LDFLAGS_TO_PASS) \
+	     ../src/configure \
+		--enable-languages=c \
+		--prefix=/$(PF) \
+		--libexecdir=/$(hppa64libexecdir) \
+		--disable-shared \
+		--disable-nls \
+		--disable-threads \
+		--disable-libatomic \
+		--disable-libgomp \
+		--disable-libitm \
+		--disable-libssp \
+		--disable-libquadmath \
+		--enable-plugin \
+		--with-system-zlib \
+		--with-as=/usr/bin/hppa64-linux-gnu-as \
+		--with-ld=/usr/bin/hppa64-linux-gnu-ld \
+		--includedir=/usr/hppa64-linux-gnu/include \
+		--build=$(DEB_BUILD_GNU_TYPE) \
+		--host=$(DEB_HOST_GNU_TYPE) \
+		--target=hppa64-linux-gnu
+	touch $(configure_hppa64_stamp)
+
+$(build_hppa64_stamp): $(configure_hppa64_stamp)
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  $(SET_LOCPATH) \
+	  LD_LIBRARY_PATH=$${LD_LIBRARY_PATH:+$$LD_LIBRARY_PATH:}$(builddir)/gcc \
+	    $(MAKE) -C $(builddir_hppa64) \
+		$(if $(CFLAGS_FOR_TARGET),CFLAGS="$(CFLAGS_FOR_TARGET)") \
+		$(if $(CXXFLAGS_FOR_TARGET),CXXFLAGS="$(CXXFLAGS_FOR_TARGET)") \
+		$(if $(LDFLAGS_FOR_TARGET),LDFLAGS="$(LDFLAGS_FOR_TARGET)") \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS)
+	touch $(build_hppa64_stamp)
+
+$(configure_neon_stamp): $(build_stamp)
+	dh_testdir
+	rm -f $(configure_neon_stamp) $(build_neon_stamp)
+	rm -rf $(builddir_neon)
+	mkdir $(builddir_neon)
+	: # configure neon
+	cd $(builddir_neon) && \
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  $(CFLAGS_TO_PASS) \
+	  $(LDFLAGS_TO_PASS) \
+	  CC="$(builddir)/gcc/xg++ -B$(builddir)/gcc/" \
+	     ../src/configure \
+		--disable-bootstrap \
+		--enable-languages=c,c++,objc,fortran \
+		--prefix=/$(PF) \
+		--libexecdir=/$(libexecdir) \
+		--program-suffix=-$(BASE_VERSION) \
+		--disable-nls \
+		--enable-plugin \
+		--with-arch=armv7-a --with-tune=cortex-a8 \
+		--with-float=$(float_abi) --with-fpu=neon \
+		--host=arm-linux-gnueabi \
+		--build=arm-linux-gnueabi \
+		--target=arm-linux-gnueabi
+	touch $(configure_neon_stamp)
+
+$(build_neon_stamp): $(configure_neon_stamp)
+	  $(SET_PATH) \
+	  $(SET_SHELL) \
+	  $(SET_LOCPATH) \
+	    $(MAKE) -C $(builddir_neon) \
+		$(BOOT_CFLAGS_TO_PASS) \
+		$(BOOT_LDFLAGS_TO_PASS) \
+		$(CFLAGS_FOR_TARGET_TO_PASS) \
+		$(LDFLAGS_FOR_TARGET_TO_PASS)
+	touch $(build_neon_stamp)
+
+
+ifeq ($(with_ada),yes)
+  MANUALS = \
+	$(srcdir)/gcc/ada/gnat_ugn.texi \
+	$(srcdir)/gcc/ada/gnat_rm.texi
+endif
+MANUALS += \
+	$(srcdir)/gcc/doc/gccint.texi \
+	$(srcdir)/gcc/doc/gcc.texi \
+	$(srcdir)/gcc/doc/cpp.texi \
+	$(srcdir)/gcc/doc/cppinternals.texi
+ifeq ($(with_fortran),yes)
+  MANUALS += $(srcdir)/gcc/fortran/gfortran.texi
+endif
+ifeq ($(with_java),yes)
+  MANUALS += $(srcdir)/gcc/java/gcj.texi
+endif
+ifeq ($(with_ada),yes)
+  MANUALS += $(srcdir)/gcc/ada/gnat-style.texi
+endif
+ifeq ($(with_gomp),yes)
+  MANUALS += $(srcdir)/libgomp/libgomp.texi
+endif
+ifeq ($(with_itm),yes)
+  MANUALS += $(srcdir)/libitm/libitm.texi
+endif
+ifeq ($(with_qmath),yes)
+  MANUALS += $(srcdir)/libquadmath/libquadmath.texi
+endif
+ifeq ($(with_go),yes)
+  MANUALS += $(srcdir)/gcc/go/gccgo.texi
+endif
+
+html-docs: $(build_html_stamp)
+#$(build_html_stamp): $(stampdir)/05-build-html-split
+$(build_html_stamp): $(stampdir)/05-build-html-nosplit
+
+html-makeinfo-split: $(stampdir)/05-build-html-split
+$(stampdir)/05-build-html-split: $(build_stamp)
+	mkdir -p html
+	rm -f html/*.html
+	cd $(builddir)/gcc; \
+	echo -n $(MANUALS) | xargs -d ' ' -L 1 -P $(USE_CPUS) -I{} \
+	  sh -c 'outname=`basename {} .texi`.html; \
+	  outname=`basename {} .texi`; \
+	  echo "generating $$outname ..."; \
+	  makeinfo --html --number-sections \
+		-I $(srcdir)/gcc/doc/include -I `dirname {}` \
+		-I $(srcdir)/gcc/p/doc \
+		-I $(srcdir)/gcc/p/doc/generated \
+		-I $(builddir)/gcc \
+		-I $(buildlibdir)/libquadmath \
+		-o $${outname} \
+		{}'
+	touch $@
+
+html-makeinfo-nosplit: $(stampdir)/05-build-html-nosplit
+$(stampdir)/05-build-html-nosplit: $(build_stamp)
+	mkdir -p html
+	rm -f html/*.html
+	cd $(builddir)/gcc; \
+	echo -n $(MANUALS) | xargs -d ' ' -L 1 -P $(USE_CPUS) -I{} \
+	  sh -c 'outname=`basename {} .texi`.html; \
+	  echo "generating $$outname ..."; \
+	  makeinfo --html --number-sections --no-split \
+		-I $(srcdir)/gcc/doc/include -I `dirname {}` \
+		-I $(srcdir)/gcc/p/doc \
+		-I $(srcdir)/gcc/p/doc/generated \
+		-I $(builddir)/gcc \
+		-I $(buildlibdir)/libquadmath \
+		-o $(CURDIR)/html/$${outname} \
+		{}'
+	touch $@
+
+# start the script only on architectures known to have slow autobuilders ...
+logwatch_archs := alpha arm m68k mips mipsel sparc
+ifeq ($(DEB_HOST_GNU_CPU), $(findstring $(DEB_HOST_GNU_CPU),$(logwatch_archs)))
+  start_logwatch = yes
+endif
+ifeq ($(DEB_HOST_GNU_SYSTEM),gnu)
+  start_logwatch = yes
+endif
+
+stamps/mauve-build: stamps/build
+	rm -rf mauve
+	mkdir -p mauve
+ifeq ($(with_mauve_check),yes)
+	tar xf $(wildcard /usr/src/mauve*.tar.*)
+	cd mauve \
+	    && aclocal \
+	    && automake \
+	    && autoconf2.59 \
+	    && PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH ./configure --host=$(DEB_HOST_GNU_TYPE) --build=$(DEB_BUILD_GNU_TYPE)
+	PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH $(MAKE) -C mauve
+endif
+	touch $@
+
+stamps/mauve-check: stamps/build stamps/mauve-build
+ifeq ($(with_mauve_check),yes)
+	-cd mauve && \
+	    JAVA_HOME=$(CURDIR)/$(sdkimg) \
+	    PATH=$(CURDIR)/$(sdkimg)/bin:$$PATH \
+		xvfb-run -s "-extension GLX" java Harness \
+		    -vm $(CURDIR)/$(sdkimg)/bin/java \
+		    -file $(CURDIR)/debian/mauve_tests \
+		    -timeout 30000 2>&1 \
+		| tee mauve_output
+	@sleep 5
+else
+	echo "mauve testsuite not run for this build" > mauve/mauve_output
+endif
+	touch $@
+
+check: $(check_stamp) # $(if $(filter yes, $(with_java)),stamps/05-build-mauve-stamp) #$(check_inst_stamp)
+$(check_stamp): $(filter $(build_stamp) $(build_jit_stamp) $(build_hppa64_stamp), $(build_dependencies))
+	rm -f test-protocol
+	rm -f $(builddir)/runcheck*
+
+	-chmod 755 $(srcdir)/contrib/test_summary
+
+	: # needed for the plugin tests to succeed
+	ln -sf gcc $(builddir)/prev-gcc
+	ln -sf $(DEB_TARGET_GNU_TYPE) $(builddir)/prev-$(DEB_TARGET_GNU_TYPE)
+
+ifneq ($(with_common_libs),yes)
+  ifeq ($(with_cxx),yes)
+	: # libstdc++6 built from newer gcc-X source, run testsuite against the installed lib
+
+	sed 's/-L[^ ]*//g' $(buildlibdir)/libstdc++-v3/scripts/testsuite_flags \
+	  > $(buildlibdir)/libstdc++-v3/scripts/testsuite_flags.installed
+	-$(ULIMIT_M); \
+	    set +e; \
+	    for d in $(buildlibdir)/libstdc++-v3/testsuite; do \
+	      echo "Running testsuite in $$d ..."; \
+	      TEST_INSTALLED=1 \
+	      $(SET_SHELL) \
+	      $(SET_LOCPATH) \
+	      $(SET_PATH) \
+	      DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \
+	      DEB_GCC_NO_O3=1 \
+		$(MAKE) -k -C $$d $(NJOBS) check $(RUNTESTFLAGS); \
+	    done 2>&1 | tee test-protocol2
+
+	BOOT_CFLAGS="$(BOOT_CFLAGS)" \
+	  $(srcdir)/contrib/test_summary -m "$(S_EMAIL)" > raw-test-summary
+	-( \
+	  sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-summary; \
+	  awk '/^cat/, /^EOF/' raw-test-summary | grep -v EOF; \
+	) > libstdc++-test-summary
+	echo 'BEGIN installed libstdc++-v3 test-summary'
+	cat libstdc++-test-summary
+	echo 'END installed libstdc++-v3 test-summary'
+	find $(buildlibdir)/libstdc++-v3/testsuite -name '*.log' -o -name '*.sum' \
+	  | xargs -r rm -f
+  endif
+endif
+
+ifeq ($(start_logwatch),yes)
+	: # start logwatch script for regular output during test runs
+	chmod +x debian/logwatch.sh
+	-debian/logwatch.sh -t 900 -p $(builddir)/logwatch.pid \
+		-m '\ntestsuite still running ...\n' \
+		test-protocol \
+		$(builddir)/gcc/testsuite/gcc/gcc.log \
+		$(builddir)/gcc/testsuite/g++/g++.log \
+		$(builddir)/gcc/testsuite/gfortran/gfortran.log \
+		$(builddir)/gcc/testsuite/objc/objc.log \
+		$(builddir)/gcc/testsuite/obj-c++/obj-c++.log \
+		$(builddir)/gcc/testsuite/gnat/gnat.log \
+		$(builddir)/gcc/testsuite/ada/acats/acats.log \
+		$(builddir)/gcc/testsuite/gfortran/gfortran.log \
+		$(builddir)/gcc/p/test/test_log \
+		$(buildlibdir)/libstdc++-v3/testsuite/libstdc++.log \
+		$(buildlibdir)/libjava/testsuite/libjava.log \
+		$(buildlibdir)/libgomp/testsuite/libgomp.log \
+		$(buildlibdir)/libffi/testsuite/libffi.log \
+		&
+endif
+
+ifeq ($(with_ada),yes)
+	chmod +x debian/acats-killer.sh
+	-debian/acats-killer.sh -p $(builddir)/acats-killer.pid \
+		$(builddir)/gcc/testsuite/ada/acats/acats.log \
+		$(builddir)/gcc/testsuite/g++.log \
+		&
+endif
+
+	-$(ULIMIT_M); \
+	    set +e; \
+	    for d in $(checkdirs); do \
+	      echo "Running testsuite in $$d ..."; \
+	      $(SET_SHELL) \
+	      $(SET_LOCPATH) \
+	      $(SET_PATH) \
+	      EXTRA_TEST_PFLAGS=-g0 \
+	      DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \
+	      DEB_GCC_NO_O3=1 \
+		$(MAKE) -k -C $$d $(NJOBS) check $(RUNTESTFLAGS); \
+	    done 2>&1 | tee test-protocol
+
+	-ps aux | fgrep logwatch | fgrep -v fgrep
+	-if [ -f $(builddir)/logwatch.pid ]; then \
+	  kill -1 `cat $(builddir)/logwatch.pid`; \
+	  sleep 1; \
+	  kill -9 `cat $(builddir)/logwatch.pid`; \
+	  rm -f $(builddir)/logwatch.pid; \
+	fi
+	-ps aux | fgrep logwatch | fgrep -v fgrep
+
+ifeq ($(with_ada),yes)
+	-if [ -f $(builddir)/acats-killer.pid ]; then \
+	  kill -1 `cat $(builddir)/acats-killer.pid`; \
+	  sleep 1; \
+	  kill -9 `cat $(builddir)/acats-killer.pid`; \
+	  rm -f $(builddir)/acats-killer.pid; \
+	fi
+endif
+
+	: # running the libjava testsuite alone is missing this information
+	$(builddir)/gcc/xgcc -B$(builddir)/gcc/ -v > $(builddir)/compiler_version.sum 2>&1
+
+	if [ -x $(srcdir)/contrib/test_summary ]; then \
+	  rm -f test-summary; \
+	  ( \
+	    cd $(builddir); \
+	    echo '' > ts-include; \
+	    echo '' >> ts-include; \
+	    if [ -f $(builddir)/gcc/.bad_compare ]; then \
+	      echo 'Bootstrap comparison failure:' >> ts-include; \
+	      cat $(builddir)/gcc/.bad_compare >> ts-include; \
+	      echo '' >> ts-include; \
+	      echo '' >> ts-include; \
+	    fi; \
+	    echo "Build Dependencies:" >> ts-include; \
+	    dpkg -l g++-* binutils* `echo '$(LIBC_DEP)' | awk '{print $$1}'` \
+		libgmp*-dev libmpfr-dev libmpc-dev libisl-dev \
+	        | fgrep -v '<none>' >> ts-include; \
+	    echo '' >> ts-include; \
+	    cat ../$(patch_stamp) >> ts-include; \
+	    BOOT_CFLAGS="$(BOOT_CFLAGS)" \
+	      $(srcdir)/contrib/test_summary \
+		-i ts-include -m "$(S_EMAIL)" \
+	  ) > raw-test-summary; \
+	  if [ -n "$(testsuite_tarball)" ]; then \
+	    echo "Test suite used: $(testsuite_srcdir)" > test-summary; \
+	    echo "  Do not interpret the results on its own" >> test-summary; \
+	    echo "  but compare them with the results from" >> test-summary; \
+	    echo "  the gcc-snapshot package." >> test-summary; \
+	  fi; \
+	  sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-summary \
+		>> test-summary; \
+	  awk '/^cat/, /^EOF/' raw-test-summary | grep -v EOF >> test-summary; \
+	  if [ -f bootstrap-summary -a "$(bootstrap_target)" != profiledbootstrap ]; then \
+	    echo '' >> test-summary; \
+	    cat bootstrap-summary >> test-summary; \
+	  fi; \
+	  echo 'BEGIN test-summary'; \
+	  cat test-summary; \
+	  echo 'END test-summary'; \
+	fi
+ifeq ($(with_d),yes)
+	: # the D test failures for the non-default multilibs are known, ignore them
+	egrep -v '^(FAIL|UNRESOLVED): (runnable|fail_c|comp)' test-summary > test-summary.tmp
+	mv -f test-summary.tmp test-summary
+endif
+
+	touch $(check_stamp)
+
+$(check_inst_stamp): $(check_stamp)
+	rm -f test-inst-protocol
+
+ifeq ($(start_logwatch),yes)
+	: # start logwatch script for regular output during test runs
+	chmod +x debian/logwatch.sh
+	-debian/logwatch.sh -t 900 -p $(builddir)/logwatch-inst.pid \
+		-m '\ntestsuite (3.3) still running ...\n' \
+		test-inst-protocol \
+		check-inst/{gcc,g++,g77,objc}.log \
+		&
+endif
+
+	rm -rf check-inst
+	mkdir check-inst
+
+	echo "Running testsuite ..."
+	-$(ULIMIT_M) ; \
+	    $(SET_SHELL) \
+	    $(SET_LOCPATH) \
+	    EXTRA_TEST_PFLAGS=-g0 \
+	    DEJAGNU_TIMEOUT=$(DEJAGNU_TIMEOUT) \
+	  cd check-inst && $(srcdir)/contrib/test_installed \
+	    --with-gcc=gcc-3.3 --with-g++=g++-3.3 --with-g77=g77-3.3 \
+		2>&1 | tee test-inst-protocol
+
+	-ps aux | fgrep logwatch | fgrep -v fgrep
+	if [ -f $(builddir)/logwatch-inst.pid ]; then \
+	  kill -1 `cat $(builddir)/logwatch-inst.pid`; \
+	else \
+	  true; \
+	fi
+	-ps aux | fgrep logwatch | fgrep -v fgrep
+
+	-chmod 755 $(srcdir)/contrib/test_summary
+	if [ -x $(srcdir)/contrib/test_summary ]; then \
+	  rm -f test-inst-summary; \
+	  ( \
+	    cd check-inst; \
+	    echo '' > ts-include; \
+	    echo '' >> ts-include; \
+	    echo "Build Dependencies:" >> ts-include; \
+	    dpkg -l g++-* binutils* `echo '$(LIBC_DEP)' | awk '{print $$1}'` \
+		libgmp*-dev libmpfr-dev libmpc-dev libisl*-dev \
+	        | fgrep -v '<none>' >> ts-include; \
+	    echo '' >> ts-include; \
+	    echo 'Results for the installed GCC-3.3 compilers' >> ts-include; \
+	    $(srcdir)/contrib/test_summary \
+		-i ts-include -m "$(S_EMAIL)" \
+	  ) > raw-test-inst-summary; \
+	  sed -n '/^Mail/s/.*"\([^"][^"]*\)".*/\1/p' raw-test-inst-summary \
+		>> test-inst-summary; \
+	  awk '/^cat/, /^EOF/' raw-test-inst-summary \
+		| grep -v EOF >> test-inst-summary; \
+	  echo 'BEGIN test-installed-summary'; \
+	  cat test-inst-summary; \
+	  echo 'END test-installed-summary'; \
+	fi
+
+	chmod 755 debian/reduce-test-diff.awk
+	if diff -u test-inst-summary test-summary \
+		| debian/reduce-test-diff.awk > diff-summary; \
+	then \
+	  mv -f diff-summary testsuite-comparision; \
+	else \
+	  ( \
+	    echo "WARNING: New failures in gcc-3.4 compared to gcc-3.3"; \
+	    echo ''; \
+	    cat diff-summary; \
+	  ) > testsuite-comparision; \
+	  rm -f diff-summary; \
+	fi
+	touch $(check_inst_stamp)
+
+clean: debian/control
+	dh_testdir
+	rm -f pxxx status
+	rm -f *-summary *-protocol testsuite-comparision summary-diff
+	rm -f $(srcdir)/gcc/po/*.gmo
+	rm -f debian/lib{gcc,gcj,objc,stdc++}{-v3,[0-9]}*.{{pre,post}{inst,rm},shlibs}
+	fs=`echo debian/*BV* debian/*GCJ* debian/*CXX* debian/*LC* debian/*MF* | sort -u`; \
+	for f in $$fs; do \
+	  [ -f $$f ] || continue; \
+	  f2=$$(echo $$f \
+		| sed 's/BV/$(BASE_VERSION)/;s/CXX/$(CXX_SONAME)/;s/LGCJ/$(PKG_LIBGCJ_EXT)/;s/GCJ/$(PKG_GCJ_EXT)/;s/LC/$(GCC_SONAME)/;s/-CRB/$(cross_bin_arch)/;s/\.in$$//'); \
+	  rm -f $$f2; \
+	done
+	rm -f debian/lib*gcc1.symbols
+	rm -f debian/lib*{atomic$(ATOMIC_SONAME),cilkrts$(CILKRTS_SONAME),gfortran$(FORTRAN_SONAME),gomp$(GOMP_SONAME),itm$(ITM_SONAME),mpx$(MPX_SONAME),quadmath$(QUADMATH_SONAME)}.symbols
+	find debian -maxdepth 1 -name '*-cross.symbols' -type l | xargs -r rm -f
+	rm -f debian/gcc-{XX,ar,nm,ranlib}-$(BASE_VERSION).1
+	rm -f debian/shlibs.local debian/shlibs.common* debian/substvars.local
+	rm -f debian/*.debhelper
+	-[ -d debian/bugs ] && $(MAKE) -C debian/bugs clean
+	rm -f debian/README.libstdc++-baseline debian/README.Bugs debian/README.Debian.$(DEB_TARGET_ARCH)
+	rm -f debian/lib*gcj-bc.shlibs
+	rm -f debian/arch_binaries* debian/indep_binaries*
+	rm -rf bin locales share
+	rm -rf check-inst
+	rm -rf .pc
+	dh_clean
+ifneq (,$(filter $(build_type), build-cross cross-build-cross))
+	$(cross_clean) dh_clean
+endif
+
+# -----------------------------------------------------------------------------
+# some abbrevations for the package names and directories;
+# p_XXX is the package name, d_XXX is the package directory
+# these macros are only used in the binary-* targets.
+
+ifeq ($(versioned_packages),yes)
+  pkg_ver := -$(BASE_VERSION)
+endif
+
+ifneq ($(DEB_CROSS),yes)
+  p_base = gcc$(pkg_ver)-base
+  p_lbase = $(p_base)
+  p_xbase = gcc$(pkg_ver)-base
+  p_gcc  = gcc$(pkg_ver)
+  p_cpp  = cpp$(pkg_ver)
+  p_cppd = cpp$(pkg_ver)-doc
+  p_cxx  = g++$(pkg_ver)
+  p_doc  = gcc$(pkg_ver)-doc
+else
+  # only triggered if DEB_CROSS set
+  p_base = gcc$(pkg_ver)$(cross_bin_arch)-base
+  p_lbase = gcc$(pkg_ver)-cross-base$(GCC_PORTS_BUILD)
+  p_xbase = gcc$(pkg_ver)$(cross_bin_arch)-base
+  p_cpp  = cpp$(pkg_ver)$(cross_bin_arch)
+  p_gcc  = gcc$(pkg_ver)$(cross_bin_arch)
+  p_cxx  = g++$(pkg_ver)$(cross_bin_arch)
+endif
+p_hppa64 = gcc$(pkg_ver)-hppa64-linux-gnu
+
+# needed for shlibs.common* generation
+ifeq (,$(p_lgcc))
+  p_lgcc = libgcc$(GCC_SONAME)$(cross_lib_arch)
+endif
+ifeq (,$(p_lib))
+  p_lib = libstdc++$(CXX_SONAME)$(cross_lib_arch)
+endif
+
+d	= debian/tmp
+d_base	= debian/$(p_base)
+d_xbase = debian/$(p_xbase)
+d_gcc	= debian/$(p_gcc)
+d_cpp	= debian/$(p_cpp)
+d_cppd	= debian/$(p_cppd)
+d_cxx	= debian/$(p_cxx)
+d_doc	= debian/$(p_doc)
+d_lgcc	= debian/$(p_lgcc)
+d_hppa64= debian/$(p_hppa64)
+
+d_neon   = debian/tmp-neon
+
+common_substvars = \
+	$(shell awk "{printf \"'-V%s' \", \$$0}" debian/substvars.local)
+
+ifeq ($(DEB_CROSS),yes)
+  lib_binaries := indep_binaries
+else
+  lib_binaries := arch_binaries
+endif
+
+# ---------------------------------------------------------------------------
+
+ifeq ($(single_package),yes)
+  include debian/rules.d/binary-snapshot.mk
+else
+
+ifneq ($(with_base_only),yes)
+ifneq ($(DEB_CROSS),yes)
+ifeq ($(with_source),yes)
+  include debian/rules.d/binary-source.mk
+endif
+endif
+endif
+
+ifneq ($(BACKPORT),true)
+
+ifeq ($(with_gccbase),yes)
+  include debian/rules.d/binary-base.mk
+endif
+
+ifneq ($(with_base_only),yes)
+
+# always include to get some definitions
+include debian/rules.d/binary-libgcc.mk
+
+ifeq ($(with_libqmath),yes)
+  include debian/rules.d/binary-libquadmath.mk
+endif
+
+ifeq ($(with_libgmath),yes)
+  include debian/rules.d/binary-libgccmath.mk
+endif
+
+ifeq ($(with_libgomp),yes)
+  include debian/rules.d/binary-libgomp.mk
+endif
+
+ifeq ($(with_libitm),yes)
+  include debian/rules.d/binary-libitm.mk
+endif
+
+ifeq ($(with_libatomic),yes)
+  include debian/rules.d/binary-libatomic.mk
+endif
+
+ifeq ($(with_libbacktrace),yes)
+  include debian/rules.d/binary-libbacktrace.mk
+endif
+
+ifeq ($(with_cdev),yes)
+  include debian/rules.d/binary-cpp.mk
+endif
+
+ifeq ($(with_fixincl),yes)
+  include debian/rules.d/binary-fixincl.mk
+endif
+
+ifeq ($(with_libssp),yes)
+  include debian/rules.d/binary-libssp.mk
+endif
+
+ifeq ($(with_objcxx),yes)
+  include debian/rules.d/binary-objcxx.mk
+endif
+
+ifeq ($(with_objc),yes)
+  include debian/rules.d/binary-objc.mk
+  include debian/rules.d/binary-libobjc.mk
+endif
+
+ifeq ($(with_go),yes)
+  include debian/rules.d/binary-go.mk
+endif
+
+# include before cxx
+ifeq ($(with_java),yes)
+  include debian/rules.d/binary-java.mk
+endif
+
+ifeq ($(with_cxxdev),yes)
+  include debian/rules.d/binary-cxx.mk
+endif
+ifeq ($(with_cxx),yes)
+  include debian/rules.d/binary-libstdcxx.mk
+endif
+
+ifeq ($(with_libasan),yes)
+  include debian/rules.d/binary-libasan.mk
+endif
+
+ifeq ($(with_liblsan),yes)
+  include debian/rules.d/binary-liblsan.mk
+endif
+
+ifeq ($(with_libtsan),yes)
+  include debian/rules.d/binary-libtsan.mk
+endif
+
+ifeq ($(with_libubsan),yes)
+  include debian/rules.d/binary-libubsan.mk
+endif
+
+ifeq ($(with_libvtv),yes)
+  include debian/rules.d/binary-libvtv.mk
+endif
+
+ifeq ($(with_libcilkrts),yes)
+  include debian/rules.d/binary-libcilkrts.mk
+endif
+
+ifeq ($(with_libmpx),yes)
+  include debian/rules.d/binary-libmpx.mk
+endif
+
+ifeq ($(with_f77),yes)
+  include debian/rules.d/binary-f77.mk
+endif
+
+ifeq ($(with_fortran),yes)
+  include debian/rules.d/binary-fortran.mk
+endif
+
+ifeq ($(with_ada),yes)
+  include debian/rules.d/binary-ada.mk
+endif
+
+ifeq ($(with_d),yes)
+  include debian/rules.d/binary-d.mk
+endif
+
+ifeq ($(with_libcc1),yes)
+  include debian/rules.d/binary-libcc1.mk
+endif
+
+ifeq ($(with_jit),yes)
+  include debian/rules.d/binary-libgccjit.mk
+endif
+
+ifeq ($(with_libnof),yes)
+  ifeq ($(DEB_TARGET_GNU_CPU),powerpc)
+    include debian/rules.d/binary-nof.mk
+  endif
+endif
+
+ifeq ($(with_softfloat),yes)
+  include debian/rules.d/binary-softfloat.mk
+endif
+
+# gcc must be moved/built after g77 and g++
+ifeq ($(with_cdev),yes)
+  include debian/rules.d/binary-gcc.mk
+endif
+
+ifeq ($(with_hppa64),yes)
+  include debian/rules.d/binary-hppa64.mk
+endif
+
+ifeq ($(with_neon),yes)
+  include debian/rules.d/binary-neon.mk
+endif
+
+endif # with_base_only
+endif # BACKPORT
+endif # ($(single_package),yes)
+
+# ----------------------------------------------------------------------
+install: $(install_dependencies)
+
+$(install_dummy_stamp): $(build_dummy_stamp)
+	touch $(install_dummy_stamp)
+
+$(install_snap_stamp): $(build_dependencies)
+	dh_testdir
+	dh_testroot
+	dh_prep
+
+	: # Install directories
+	rm -rf $(d)
+	mkdir -p $(d)/$(PF)
+
+ifeq ($(with_hppa64),yes)
+	: # Install hppa64
+	$(SET_PATH) \
+	    $(MAKE) -C $(builddir_hppa64) \
+		CC="$(CC)" \
+		$(CFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		DESTDIR=$(CURDIR)/$(d) \
+		    install
+
+	ls -l $(d)/$(PF)/bin
+	if [ ! -x $(d)/$(PF)/bin/hppa64-linux-gnu-gcc ]; then \
+	  mv $(d)/$(PF)/bin/hppa64-linux-gnu-gcc-5* $(d)/$(PF)/bin/hppa64-linux-gnu-gcc; \
+	else \
+	  rm -f $(d)/$(PF)/bin/hppa64-linux-gnu-gcc-5*; \
+	fi
+
+	for i in ar nm ranlib; do \
+	  cp debian/gcc-$$i-$(BASE_VERSION).1 \
+	    $(d)/$(PF)/share/man/man1/hppa64-linux-gnu-gcc-$$i.1; \
+	done
+
+	: # remove files not needed from the hppa64 build
+	rm -rf $(d)/$(PF)/share/info
+	rm -rf $(d)/$(PF)/share/man
+	rm -f $(d)/$(PF)/$(libdir)/libiberty.a
+	rm -f $(d)/$(PF)/bin/*{gcov,gcov-tool,gccbug,gcc}
+
+	rm -rf $(d)/$(PF)/hppa64-linux-gnu/include
+	rm -rf $(d)/$(PF)/hppa64-linux-gnu/lib
+	set -e; \
+	  cd $(d)/$(PF)/$(libdir)/gcc/hppa64-linux-gnu/$(versiondir)/include-fixed; \
+	  for i in *; do \
+	    case "$$i" in \
+	      README|features.h|syslimits.h|limits.h) ;; \
+	      linux|$(TARGET_ALIAS)) ;; \
+	      $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS))) ;; \
+	      *) echo "remove include-fixed/$$i"; rm -rf $$i; \
+	    esac; \
+	  done
+endif
+
+	: # Work around PR lto/41569
+	ln -sf gcc $(builddir)/prev-gcc
+	ln -sf $(DEB_TARGET_GNU_TYPE) $(builddir)/prev-$(DEB_TARGET_GNU_TYPE)
+
+	: # Install everything
+	$(SET_PATH) \
+	$(SET_SHELL) \
+	  $(MAKE) -C $(builddir) \
+	    $(CFLAGS_TO_PASS) \
+	    $(LDFLAGS_TO_PASS) \
+	    DESTDIR=$(CURDIR)/$(d) \
+	    infodir=/$(PF)/share/info \
+	    mandir=/$(PF)/share/man \
+		install
+
+	ls -l $(d)/$(PF)/bin
+
+	for i in ar nm ranlib; do \
+	  cp debian/gcc-$$i-$(BASE_VERSION).1 \
+	    $(d)/$(PF)/share/man/man1/$(cmd_prefix)gcc-$$i.1; \
+	done
+
+	if [ ! -x $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc ]; then \
+	  mv $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc-5* $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc; \
+	else \
+	  rm -f $(d)/$(PF)/bin/$(TARGET_ALIAS)-gcc-5*; \
+	fi
+	set -e; \
+	  cd $(d)/$(gcc_lib_dir)/include-fixed; \
+	  for i in *; do \
+	    case "$$i" in \
+	      README|features.h|syslimits.h|limits.h) ;; \
+	      linux|$(TARGET_ALIAS)) ;; \
+	      $(subst $(DEB_TARGET_GNU_CPU),$(biarch_cpu),$(TARGET_ALIAS))) ;; \
+	      *) echo "remove include-fixed/$$i"; rm -rf $$i; \
+	    esac; \
+	  done
+
+ifneq ($(configured_libdir),$(libdir))
+	for i in debug go pkgconfig '*.so' '*.so.*' '*.a' '*.la' '*.py' '*.spec'; do \
+	  mv $(d)/$(PF)/$(configured_libdir)/$$i \
+		$(d)/$(PF)/$(libdir)/. || true; \
+	done
+endif
+
+# FIXME: libjava/classpath not correctly patched
+ifeq ($(with_java),yes)
+	-if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \
+	  ls -l $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \
+	  mv $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME)/* \
+	    $(d)/$(PF)/lib/gcj-$(BASE_VERSION)-$(GCJ_SONAME)/; \
+	  rmdir $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \
+	fi
+
+	ln -sf libgcj.so.$(GCJ_SONAME).0.0 $(d)/$(PF)/lib/libgcj_bc.so.1.0.0
+
+	install -m 755 $(d)/$(PF)/lib/libgcj_bc.so.1 \
+		$(d)/$(gcc_lib_dir)/libgcj_bc.so
+	$(builddir)/gcc/xgcc -B$(builddir)/gcc/ -shared -fpic -xc /dev/null \
+		-o build/libgcj.so -Wl,-soname,libgcj.so.$(GCJ_SONAME) -nostdlib
+	$(builddir)/gcc/xgcc -B$(builddir)/gcc/ -shared -fpic \
+		$(srcdir)/libjava/libgcj_bc.c \
+		-o $(d)/$(gcc_lib_dir)/libgcj_bc.so \
+		-Wl,-soname,libgcj_bc.so.1 $(builddir)/libgcj.so -shared-libgcc
+endif
+
+	-ls -l $(d)/usr
+	if [ -d $(d)/usr/man/man1 ]; then \
+	  mv $(d)/usr/man/man1/* $(d)/usr/share/man/man1/; \
+	fi
+
+	chmod 755 debian/dh_*
+	touch $(install_snap_stamp)
+
+$(install_stamp): $(build_stamp)
+	dh_testdir
+	dh_testroot
+	dh_prep -N$(p_hppa64)
+
+	if [ -f $(binary_stamp)-hppa64 ]; then \
+	  mv $(binary_stamp)-hppa64 saved-stamp-hppa64; \
+	fi
+	rm -f $(binary_stamp)*
+	if [ -f saved-stamp-hppa64 ]; then \
+	  mv saved-stamp-hppa64 $(binary_stamp)-hppa64; \
+	fi
+
+	: # Install directories
+	rm -rf $(d)
+	mkdir -p $(d)/$(libdir) $(d)/$(PF) $(d)/$(PF)/$(libdir)/debug
+ifeq ($(biarch32),yes)
+	mkdir -p $(d)/$(PF)/$(lib32loc)/debug
+endif
+ifeq ($(biarch64),yes)
+	mkdir -p $(d)/$(PF)/lib64/debug
+endif
+ifeq ($(biarchn32),yes)
+	mkdir -p $(d)/$(PF)/$(libn32)/debug
+endif
+ifeq ($(biarchx32),yes)
+	mkdir -p $(d)/$(PF)/libx32/debug
+endif
+
+ifneq (,$(filter $(DEB_TARGET_GNU_CPU),x86_64 sparc64 s390x powerpc64))
+ifneq ($(DEB_TARGET_ARCH),x32)
+	: # link lib to lib64 and $(PF)/lib to $(PF)/lib64
+	: # (this works when CONFARGS contains '--disable-multilib')
+	ln -s $(configured_libdir) $(d)/lib64
+	mkdir -p $(d)/$(PF)/$(configured_libdir)
+	ln -s $(configured_libdir) $(d)/$(PF)/lib64
+endif
+endif
+ifeq ($(DEB_TARGET_ARCH),x32)
+	: # link lib to libx32 and $(PF)/lib to $(PF)/libx32
+	ln -s $(configured_libdir) $(d)/libx32
+	mkdir -p $(d)/$(PF)/$(configured_libdir)
+	ln -s $(configured_libdir) $(d)/$(PF)/libx32
+endif
+
+	: # Work around PR lto/41569
+	ln -sf gcc $(builddir)/prev-gcc
+
+	: # Install everything
+	$(SET_PATH) \
+	$(SET_SHELL) \
+	  $(MAKE) -C $(builddir) \
+	    $(CFLAGS_TO_PASS) \
+	    $(LDFLAGS_TO_PASS) \
+	    DESTDIR=$(CURDIR)/$(d) \
+	    infodir=/$(PF)/share/info \
+	    mandir=/$(PF)/share/man \
+		install
+
+ifeq ($(DEB_STAGE)-$(DEB_CROSS),rtlibs-yes)
+	@echo configured_libdir=$(configured_libdir) / libdir=$(libdir) / usr_lib=$(usr_lib)
+	ls $(d)/$(PF)/$(TARGET_ALIAS)/lib
+	set -x; \
+	if [ -d $(d)/$(PF)/$(TARGET_ALIAS)/lib ]; then \
+	  cp -a $(d)/$(PF)/$(TARGET_ALIAS)/lib/* $(d)/$(PF)/lib/$(DEB_TARGET_MULTIARCH)/.; \
+	fi
+	for d in $$(cd $(d)/$(PF)/$(TARGET_ALIAS); echo lib?*); do \
+	  [ -d $(d)/$(PF)/$(TARGET_ALIAS)/$$d ] || continue; \
+	  cp -a $(d)/$(PF)/$(TARGET_ALIAS)/$$d/* $(d)/$(PF)/$$d/.; \
+	done
+else
+  ifneq ($(configured_libdir),$(libdir))
+	for i in debug go pkgconfig '*.so' '*.so.*' '*.a' '*.la' '*.o' '*.py' '*.spec'; do \
+	  mv $(d)/$(PF)/$(configured_libdir)/$$i \
+		$(d)/$(PF)/$(libdir)/. || true; \
+	done
+  endif
+endif
+
+ifeq ($(with_libcxxdbg),yes)
+	: # FIXME: the libstdc++ gdb.py file is installed with a wrong name
+	for i in $$(find $(d)/$(PF) -name libstdc++_pic.a-gdb.py); do \
+	  [ -f $$i ] || continue; \
+	  d=$$(dirname $$i); \
+	  b=$$(basename $$i); \
+	  t=$$(cd $$d; echo libstdc++.so.*.*.*)-gdb.py; \
+	  mv $$i $$d/$$t; \
+	done
+endif
+
+	if [ -d $(d)/$(PF)/include/cilk ]; then \
+	  mv $(d)/$(PF)/include/cilk $(d)/$(gcc_lib_dir)/include/. ;\
+	fi
+
+ifeq ($(with_java),yes)
+# FIXME: libjava/classpath not correctly patched
+	-if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \
+	  ls -l $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \
+	  mv $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME)/* \
+	    $(d)/$(PF)/lib/gcj-$(BASE_VERSION)-$(GCJ_SONAME)/; \
+	  rmdir $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME); \
+	fi
+endif
+
+	: # remove rpath settings from binaries and shared libs
+	for i in $$(chrpath -k $(d)/$(PF)/bin/* $(d)/$(PFL)/lib*/lib*.so.* \
+			$(d)/$(gcc_lib_dir)/plugin/* \
+			$(if $(filter $(with_multiarch_lib),yes), \
+			  $(d)/$(PF)/lib/$(DEB_TARGET_MULTIARCH)/lib*.so.*) \
+			$(d)/$(PF)/lib*/gcj$(pkg_ver)*/lib*.so.* \
+			2>/dev/null | awk -F: '/RPATH=/ {print $$1}'); \
+	do \
+	  case "$$i" in ecj1|*gij-*|*libjawt*|*libjvm*) continue; esac; \
+	  [ -h $$i ] && continue; \
+	  chrpath --delete $$i; \
+	  echo "removed RPATH: $$i"; \
+	done
+
+	: # remove '*.la' and '*.lai' files, not shipped in any package.
+	find $(d) -name '*.la' -o -name '*.lai' | xargs -r rm -f
+
+ifeq ($(GFDL_INVARIANT_FREE),yes)
+	for i in gcc gcov; do \
+	  I=`echo $$i | tr a-z A-Z`; \
+	  sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \
+	    debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \
+	done
+
+  ifeq ($(with_fortran),yes)
+	for i in g77; do \
+	  I=`echo $$i | tr a-z A-Z`; \
+	  sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \
+	    debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \
+	done
+  endif
+  ifeq ($(with_java),yes)
+	for i in gcj gcjh gij jv-convert jv-scan jcf-dump grmic grmiregistry; \
+	do \
+	  I=`echo $$i | tr a-z A-Z`; \
+	  sed -e "s/@NAME@/$$I$(pkg_ver)/g" -e "s/@name@/$$i$(pkg_ver)/g" \
+	    debian/dummy-man.1 > $(d)/$(PF)/share/man/man1/$$i.1; \
+	done
+  endif
+endif
+
+ifneq ($(with_libgnat),yes)
+	rm -f $(d)/$(gcc_lib_dir)/adalib/lib*.so*
+endif
+
+# FIXME: libgnatprj and libgnatvsn need proper configury/Makefiles
+ifeq ($(DEB_CROSS),yes)
+  ifeq ($(with_ada),yes)
+	for i in 'libgnatprj*' 'libgnatvsn*'; do \
+	  mv $(d)/$(PF)/lib/$$i $(d)/$(usr_lib)/. || true; \
+	done
+  endif
+endif
+
+#  ifeq ($(with_ada),yes)
+#	: # rename files (versioned ada binaries)
+#	for i in ; do \
+#	  mv $(d)/$(PF)/bin/$$i $(d)/$(PF)/bin/$$i-$(GNAT_VERSION); \
+#	  mv $(d)/$(PF)/share/man/man1/$$i.1 \
+#		$(d)/$(PF)/share/man/man1/$$i-$(GNAT_VERSION).1; \
+#	done
+#	for i in $(GNAT_TOOLS); do \
+#	  mv $(d)/$(PF)/bin/$$i $(d)/$(PF)/bin/$$i-$(GNAT_VERSION); \
+#	done
+#  endif
+
+	for i in ar nm ranlib; do \
+	  cp debian/gcc-$$i-$(BASE_VERSION).1 \
+	    $(d)/$(PF)/share/man/man1/$(cmd_prefix)gcc-$$i$(pkg_ver).1; \
+	done
+
+	chmod 755 debian/dh_*
+
+ifneq ($(with_common_libs),yes)
+# for native builds, the default ml libs are always available; no need for a placeholder
+# apparently this changed with newer dpkg versions (1.18.7?) ...
+	echo 'libgcc_s $(GCC_SONAME) $(p_lgcc)' > debian/shlibs.common
+	echo 'libstdc++ $(CXX_SONAME) $(p_lib)' >> debian/shlibs.common
+	$(foreach ml,32 64 n32 x32 hf sf, \
+	  echo 'libgcc_s $(GCC_SONAME) $(subst lib,lib$(ml),$(p_lgcc))' > debian/shlibs.common$(ml); \
+	  echo 'libstdc++ $(CXX_SONAME) $(subst lib,lib$(ml),$(p_lib))' >> debian/shlibs.common$(ml); \
+	)
+endif
+
+	@echo XXXXX `date -R`
+	touch $(install_stamp)
+
+$(install_jit_stamp): $(build_jit_stamp) $(install_stamp)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d)-jit
+	mkdir -p $(d)-jit/$(PF)
+
+	$(SET_PATH) \
+	  biarch_multidir_names=none \
+	    $(MAKE) -C $(builddir_jit) \
+		CC="$(CC_FOR_JIT)" \
+		$(CFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		DESTDIR=$(CURDIR)/$(d)-jit \
+		    install
+
+	: # copy files to the standard build
+	cp -a $(d)-jit/$(PF)/include/libgccjit*.h \
+		$(d)/$(gcc_lib_dir)/include/.
+	cp -a $(d)-jit/$(PF)/lib/libgccjit.so* \
+		$(d)/$(usr_lib)/.
+	cp -a $(d)-jit/$(PF)/share/info/libgccjit* \
+		$(d)/$(PF)/share/info/.
+
+	@echo XXXXX `date -R`
+	touch $(install_jit_stamp)
+
+$(install_hppa64_stamp): $(build_hppa64_stamp)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d_hppa64)
+	mkdir -p $(d_hppa64)/$(PF)
+
+	$(SET_PATH) \
+	    $(MAKE) -C $(builddir_hppa64) \
+		CC="$(CC)" \
+		$(CFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		DESTDIR=$(CURDIR)/$(d_hppa64) \
+		    install
+
+	: # remove files not needed
+	rm -rf $(d_hppa64)/$(PF)/info $(d_hppa64)/$(PF)/share/info
+	rm -rf $(d_hppa64)/$(PF)/man $(d_hppa64)/$(PF)/share/man
+	rm -rf $(d_hppa64)/$(PF)/lib/gcc/hppa64-linux-gnu/$(BASE_VERSION)/plugin
+	rm -f $(d_hppa64)/$(PF)/lib/libiberty.a
+	rm -f $(d_hppa64)/$(PF)/lib/libcc1.*
+	rm -f $(d_hppa64)/$(PF)/bin/*{gcov,gcov-tool,gccbug,gcc}
+
+	rm -rf $(d_hppa64)/$(PF)/hppa64-linux-gnu
+	rm -rf $(d_hppa64)/$(PF)/lib/gcc/hppa64-linux-gnu/$(BASE_VERSION)/install-tools
+
+ifeq ($(versioned_packages),yes)
+	for i in cpp gcc-ar gcc-nm gcc-ranlib; do \
+	  mv -f $(d_hppa64)/$(PF)/bin/hppa64-linux-gnu-$$i \
+		$(d_hppa64)/$(PF)/bin/hppa64-linux-gnu-$$i$(pkg_ver); \
+	done
+endif
+	mkdir -p $(d_hppa64)/$(PF)/share/man/man1
+	for i in cpp gcc-ar gcc-nm gcc-ranlib; do \
+	  ln -sf $$i$(pkg_ver).1.gz \
+	    $(d_hppa64)/$(PF)/share/man/man1/hppa64-linux-gnu-$$i$(pkg_ver).1.gz; \
+	done
+
+	touch $(install_hppa64_stamp)
+
+$(install_neon_stamp): $(build_neon_stamp)
+	dh_testdir
+	dh_testroot
+	rm -rf $(d_neon)
+	mkdir -p $(d_neon)/$(PF)
+
+	$(SET_PATH) \
+	    $(MAKE) -C $(builddir_neon) \
+		CC="$(CC)" \
+		$(CFLAGS_TO_PASS) \
+		$(LDFLAGS_TO_PASS) \
+		DESTDIR=$(CURDIR)/$(d_neon) \
+		    install
+	touch $(install_neon_stamp)
+
+# ----------------------------------------------------------------------
+# Build architecture-dependent files here.
+debian/arch_binaries.all: $(foreach i,$(arch_binaries),$(binary_stamp)-$(i))
+	cd debian; xargs -r du -s < arch_binaries | sort -nr | awk '{print $$2}' \
+		> arch_binaries.tmp
+	mv debian/arch_binaries.tmp debian/arch_binaries
+	sed -i 's/ /\n/g' debian/arch_binaries.epoch || touch debian/arch_binaries.epoch
+	cat debian/arch_binaries debian/arch_binaries.epoch > debian/arch_binaries.all
+
+binary-arch: debian/arch_binaries.all
+	dh_compress $(foreach p,$(shell echo `cat debian/arch_binaries.all`),-p$(p)) \
+	  -X.log.xz -X.sum.xz -X.java -X.c -X.txt -X.tag -X.map -XREADME.Bugs
+ifeq ($(i586_symlinks),yes)
+	cd debian; \
+	for x in $$(find `cat arch_binaries` -type l -name 'i686-*'); do \
+	  link=$$(echo $$x | sed 's/i686-/i586-/'); \
+	  tgt=$$(basename $$x); \
+	  echo "Adding symlink: $$link -> $$tgt"; \
+	  rm -f $$link; cp -a $$x $$link; \
+	done
+endif
+	dh_fixperms $(foreach p,$(shell echo `cat debian/arch_binaries.all`),-p$(p))
+	dh_gencontrol $(foreach p,$(shell echo `cat debian/arch_binaries`),-p$(p)) \
+	  -- -v$(DEB_VERSION) $(common_substvars)
+	@set -e; \
+	pkgs='$(strip $(foreach p,$(shell echo `cat debian/arch_binaries.epoch`),-p$(p)))'; \
+	if [ -n "$$pkgs" ]; then \
+	  echo dh_gencontrol $$pkgs -- -v$(DEB_EVERSION) $(common_substvars); \
+	  dh_gencontrol $$pkgs -- -v$(DEB_EVERSION) $(common_substvars); \
+	fi
+	dh_installdeb $(foreach p,$(shell echo `cat debian/arch_binaries.all`),-p$(p))
+	dh_md5sums $(foreach p,$(shell echo `cat debian/arch_binaries.all`),-p$(p))
+	dh_builddeb $(foreach p,$(shell echo `cat debian/arch_binaries.all`),-p$(p))
+ifeq ($(with_check),yes)
+	@echo Done
+#	: # Send Email about sucessfull build.
+#	# cat raw-test-summary | sh; echo "Sent mail to $(S_EMAIL)"
+endif
+
+	: # remove empty directories, when all components are in place
+	-find $(d) -type d -empty -delete
+
+	@echo "Listing installed files not included in any package:"
+	-find $(d) ! -type d
+
+	@echo XXXXX `date -R`
+
+# ----------------------------------------------------------------------
+# Build architecture-independent files here.
+debian/indep_binaries.all: $(foreach i,$(indep_binaries),$(binary_stamp)-$(i))
+	cd debian; xargs -r du -s < indep_binaries | sort -nr | awk '{print $$2}' \
+		> indep_binaries.tmp
+	mv debian/indep_binaries.tmp debian/indep_binaries
+	sed -i 's/ /\n/g' debian/indep_binaries.epoch || touch debian/indep_binaries.epoch
+	cat debian/indep_binaries debian/indep_binaries.epoch > debian/indep_binaries.all
+
+binary-indep: debian/indep_binaries.all
+	dh_compress $(foreach p,$(shell echo `cat debian/indep_binaries.all`),-p$(p)) \
+	  -X.log.xz -X.sum.xz -X.java -X.c -X.txt -X.tag -X.map -XREADME.Bugs
+	dh_fixperms $(foreach p,$(shell echo `cat debian/indep_binaries.all`),-p$(p))
+	: # the export should be harmless for the binary indep packages of a native build
+	export DEB_HOST_ARCH=$(TARGET); \
+	dh_gencontrol $(foreach p,$(shell echo `cat debian/indep_binaries`),-p$(p)) \
+	  -- -v$(DEB_VERSION) $(common_substvars)
+	@set -e; \
+	export DEB_HOST_ARCH=$(TARGET); \
+	pkgs='$(strip $(foreach p,$(shell echo `cat debian/indep_binaries.epoch`),-p$(p)))'; \
+	if [ -n "$$pkgs" ]; then \
+	  echo dh_gencontrol $$pkgs -- -v$(DEB_EVERSION) $(common_substvars); \
+	  dh_gencontrol $$pkgs -- -v$(DEB_EVERSION) $(common_substvars); \
+	fi
+
+ifneq (,$(filter $(DEB_TARGET_ARCH), mips mipsel mips64 mips64el mipsn32 mipsn32el))
+	for p in `cat debian/indep_binaries debian/indep_binaries.epoch`; do \
+	  p=$${p#-p*}; \
+	  case "$$p" in \
+	    lib64*)  echo mangle $$p; sed -i -r '/^(Dep|Rec|Sug)/s/libn?32[^,]+(, *|$$)//g;/^(Dep|Rec|Sug)/s/$(p_lgcc)/$(p_l64gcc)/;/^(Dep|Rec|Sug)/s/ *, *$$//' debian/$$p/DEBIAN/control;; \
+	    libn32*) echo mangle $$p; sed -i -r '/^(Dep|Rec|Sug)/s/lib64[^,]+(, *|$$)//g;/^(Dep|Rec|Sug)/s/$(p_lgcc)/$(p_ln32gcc)/;/^(Dep|Rec|Sug)/s/ *, *$$//' debian/$$p/DEBIAN/control;; \
+	  esac; \
+	done
+endif
+
+	dh_installdeb $(foreach p,$(shell echo `cat debian/indep_binaries.all`),-p$(p))
+	dh_md5sums $(foreach p,$(shell echo `cat debian/indep_binaries.all`),-p$(p))
+	dh_builddeb $(foreach p,$(shell echo `cat debian/indep_binaries.all`),-p$(p))
+
+	@echo XXXXX `date -R`
+
+source diff:
+	@echo >&2 'source and diff are obsolete - use dpkg-source -b'; false
+
+binary: binary-indep binary-arch
+.PHONY: build clean binary-indep binary-arch binary 
+.PRECIOUS: $(stampdir)/%-stamp debian/indep_binaries.all debian/arch_binaries.all
--- gcc-5-5.4.0.orig/debian/runcheck.sh
+++ gcc-5-5.4.0/debian/runcheck.sh
@@ -0,0 +1,23 @@
+#! /bin/sh
+
+mkdir -p build
+
+abi=${CC##* }
+base=build/runcheck$abi
+
+cat >$base.c <<EOF
+#include <stdio.h>
+int main()
+{
+	printf("$abi");
+	return 0;
+}
+EOF
+
+
+if ${CC:-gcc} -o $base $base.c 2>/dev/null; then
+  if [ "$($base 2>&1)" = "$abi" ]; then
+    printf "%s" $abi > $base.out
+    printf "%s" $abi
+  fi
+fi
--- gcc-5-5.4.0.orig/debian/source.lintian-overrides
+++ gcc-5-5.4.0/debian/source.lintian-overrides
@@ -0,0 +1,4 @@
+gcc-5 source: invalid-arch-string-in-source-relation
+gcc-5 source: quilt-build-dep-but-no-series-file
+# lintian can't handle (>= ${gcc:Version})
+gcc-5 source: weak-library-dev-dependency
--- gcc-5-5.4.0.orig/debian/source.lintian-overrides.in
+++ gcc-5-5.4.0/debian/source.lintian-overrides.in
@@ -0,0 +1,4 @@
+@SRC@ source: invalid-arch-string-in-source-relation
+@SRC@ source: quilt-build-dep-but-no-series-file
+# lintian can't handle (>= ${gcc:Version})
+@SRC@ source: weak-library-dev-dependency
--- gcc-5-5.4.0.orig/debian/source/format
+++ gcc-5-5.4.0/debian/source/format
@@ -0,0 +1 @@
+1.0
--- gcc-5-5.4.0.orig/debian/watch
+++ gcc-5-5.4.0/debian/watch
@@ -0,0 +1,2 @@
+version=2
+ftp://gcc.gnu.org/pub/gcc/releases/gcc-(5\.[\d\.]*)	debian	uupdate
